diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-01.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-01.S index 84254324a..5e7173b3d 100644 --- a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-01.S +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-01.S @@ -19,7 +19,7 @@ // #include "model_test.h" #include "arch_test.h" -RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr") +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") .section .text.init .globl rvtest_entry_point @@ -30,7 +30,7 @@ RVTEST_CODE_BEGIN #ifdef TEST_CASE_1 RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) - +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) RVTEST_FP_ENABLE() RVTEST_VALBASEUPD(x3,test_dataset_0) RVTEST_SIGBASE(x1,signature_x1_1) @@ -38,382806 +38,1312 @@ RVTEST_SIGBASE(x1,signature_x1_1) inst_0: // rs2 == rd != rs1 and rs2 == rd != rs3 and rs3 != rs1, rs1==f23, rs2==f16, rs3==f25, rd==f16,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f23; op2:f16; op3:f25; dest:f16; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae800000; valaddr_reg:x3; val_offset:0*FLEN/8; rmval:dyn; +op3val:0xae800000; valaddr_reg:x3; val_offset:0*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f16, f23, f16, f25, dyn, 0, 0, x3, 0*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f16, f23, f16, f25, dyn, 0, 0, x3, 0*0 + 3*0*FLEN/8, x4, x1, x2) inst_1: // rs1 == rs2 == rs3 == rd, rs1==f22, rs2==f22, rs3==f22, rd==f22,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f22; op2:f22; op3:f22; dest:f22; op1val:0x7859914d; op2val:0x7859914d; -op3val:0x7859914d; valaddr_reg:x3; val_offset:3*FLEN/8; rmval:dyn; +op3val:0x7859914d; valaddr_reg:x3; val_offset:3*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f22, f22, f22, f22, dyn, 0, 0, x3, 3*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f22, f22, f22, f22, dyn, 0, 0, x3, 3*0 + 3*0*FLEN/8, x4, x1, x2) inst_2: // rs1 == rs2 == rd != rs3, rs1==f8, rs2==f8, rs3==f14, rd==f8,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f8; op2:f8; op3:f14; dest:f8; op1val:0x7859914d; op2val:0x7859914d; -op3val:0xae800003; valaddr_reg:x3; val_offset:6*FLEN/8; rmval:dyn; +op3val:0xae800003; valaddr_reg:x3; val_offset:6*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f8, f8, f8, f14, dyn, 0, 0, x3, 6*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f8, f8, f8, f14, dyn, 0, 0, x3, 6*0 + 3*0*FLEN/8, x4, x1, x2) inst_3: // rs1 != rs2 and rs1 != rd and rs1 != rs3 and rs2 != rs3 and rs2 != rd and rs3 != rd, rs1==f10, rs2==f5, rs3==f17, rd==f3,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f10; op2:f5; op3:f17; dest:f3; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae800007; valaddr_reg:x3; val_offset:9*FLEN/8; rmval:dyn; +op3val:0xae800007; valaddr_reg:x3; val_offset:9*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f3, f10, f5, f17, dyn, 0, 0, x3, 9*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f3, f10, f5, f17, dyn, 0, 0, x3, 9*0 + 3*0*FLEN/8, x4, x1, x2) inst_4: // rs1 == rs2 == rs3 != rd, rs1==f3, rs2==f3, rs3==f3, rd==f1,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f3; op2:f3; op3:f3; dest:f1; op1val:0x7859914d; op2val:0x7859914d; -op3val:0x7859914d; valaddr_reg:x3; val_offset:12*FLEN/8; rmval:dyn; +op3val:0x7859914d; valaddr_reg:x3; val_offset:12*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f1, f3, f3, f3, dyn, 0, 0, x3, 12*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f1, f3, f3, f3, dyn, 0, 0, x3, 12*0 + 3*0*FLEN/8, x4, x1, x2) inst_5: // rs1 == rd != rs2 and rs1 == rd != rs3 and rs3 != rs2, rs1==f29, rs2==f11, rs3==f5, rd==f29,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f29; op2:f11; op3:f5; dest:f29; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae80001f; valaddr_reg:x3; val_offset:15*FLEN/8; rmval:dyn; +op3val:0xae80001f; valaddr_reg:x3; val_offset:15*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f29, f29, f11, f5, dyn, 0, 0, x3, 15*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f29, f29, f11, f5, dyn, 0, 0, x3, 15*0 + 3*0*FLEN/8, x4, x1, x2) inst_6: // rd == rs2 == rs3 != rs1, rs1==f9, rs2==f7, rs3==f7, rd==f7,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f9; op2:f7; op3:f7; dest:f7; op1val:0x7859914d; op2val:0x86969c55; -op3val:0x86969c55; valaddr_reg:x3; val_offset:18*FLEN/8; rmval:dyn; +op3val:0x86969c55; valaddr_reg:x3; val_offset:18*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f7, f9, f7, f7, dyn, 0, 0, x3, 18*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f7, f9, f7, f7, dyn, 0, 0, x3, 18*0 + 3*0*FLEN/8, x4, x1, x2) inst_7: // rs1 == rs2 != rs3 and rs1 == rs2 != rd and rd != rs3, rs1==f30, rs2==f30, rs3==f11, rd==f9,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f30; op3:f11; dest:f9; op1val:0x7859914d; op2val:0x7859914d; -op3val:0xae80007f; valaddr_reg:x3; val_offset:21*FLEN/8; rmval:dyn; +op3val:0xae80007f; valaddr_reg:x3; val_offset:21*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f9, f30, f30, f11, dyn, 0, 0, x3, 21*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f9, f30, f30, f11, dyn, 0, 0, x3, 21*0 + 3*0*FLEN/8, x4, x1, x2) inst_8: // rs2 == rs3 != rs1 and rs2 == rs3 != rd and rd != rs1, rs1==f12, rs2==f0, rs3==f0, rd==f19,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f12; op2:f0; op3:f0; dest:f19; op1val:0x7859914d; op2val:0x86969c55; -op3val:0x86969c55; valaddr_reg:x3; val_offset:24*FLEN/8; rmval:dyn; +op3val:0x86969c55; valaddr_reg:x3; val_offset:24*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f19, f12, f0, f0, dyn, 0, 0, x3, 24*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f19, f12, f0, f0, dyn, 0, 0, x3, 24*0 + 3*0*FLEN/8, x4, x1, x2) inst_9: // rs1 == rd == rs3 != rs2, rs1==f31, rs2==f9, rs3==f31, rd==f31,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f31; op2:f9; op3:f31; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0x7859914d; valaddr_reg:x3; val_offset:27*FLEN/8; rmval:dyn; +op3val:0x7859914d; valaddr_reg:x3; val_offset:27*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f31, f9, f31, dyn, 0, 0, x3, 27*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f31, f9, f31, dyn, 0, 0, x3, 27*0 + 3*0*FLEN/8, x4, x1, x2) inst_10: // rs1 == rs3 != rs2 and rs1 == rs3 != rd and rd != rs2, rs1==f24, rs2==f31, rs3==f24, rd==f28,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f24; op2:f31; op3:f24; dest:f28; op1val:0x7859914d; op2val:0x86969c55; -op3val:0x7859914d; valaddr_reg:x3; val_offset:30*FLEN/8; rmval:dyn; +op3val:0x7859914d; valaddr_reg:x3; val_offset:30*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f28, f24, f31, f24, dyn, 0, 0, x3, 30*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f28, f24, f31, f24, dyn, 0, 0, x3, 30*0 + 3*0*FLEN/8, x4, x1, x2) inst_11: // rs3 == rd != rs1 and rs3 == rd != rs2 and rs2 != rs1, rs1==f5, rs2==f1, rs3==f2, rd==f2,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f5; op2:f1; op3:f2; dest:f2; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae8007ff; valaddr_reg:x3; val_offset:33*FLEN/8; rmval:dyn; +op3val:0xae8007ff; valaddr_reg:x3; val_offset:33*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f2, f5, f1, f2, dyn, 0, 0, x3, 33*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f2, f5, f1, f2, dyn, 0, 0, x3, 33*0 + 3*0*FLEN/8, x4, x1, x2) inst_12: // rs1==f14, rs2==f24, rs3==f26, rd==f10,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f14; op2:f24; op3:f26; dest:f10; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae800fff; valaddr_reg:x3; val_offset:36*FLEN/8; rmval:dyn; +op3val:0xae800fff; valaddr_reg:x3; val_offset:36*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f10, f14, f24, f26, dyn, 0, 0, x3, 36*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f10, f14, f24, f26, dyn, 0, 0, x3, 36*0 + 3*0*FLEN/8, x4, x1, x2) inst_13: // rs1==f7, rs2==f25, rs3==f4, rd==f6,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f7; op2:f25; op3:f4; dest:f6; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae801fff; valaddr_reg:x3; val_offset:39*FLEN/8; rmval:dyn; +op3val:0xae801fff; valaddr_reg:x3; val_offset:39*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f6, f7, f25, f4, dyn, 0, 0, x3, 39*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f6, f7, f25, f4, dyn, 0, 0, x3, 39*0 + 3*0*FLEN/8, x4, x1, x2) inst_14: // rs1==f13, rs2==f20, rs3==f30, rd==f18,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f13; op2:f20; op3:f30; dest:f18; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae803fff; valaddr_reg:x3; val_offset:42*FLEN/8; rmval:dyn; +op3val:0xae803fff; valaddr_reg:x3; val_offset:42*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f18, f13, f20, f30, dyn, 0, 0, x3, 42*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f18, f13, f20, f30, dyn, 0, 0, x3, 42*0 + 3*0*FLEN/8, x4, x1, x2) inst_15: // rs1==f6, rs2==f18, rs3==f20, rd==f14,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f6; op2:f18; op3:f20; dest:f14; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae807fff; valaddr_reg:x3; val_offset:45*FLEN/8; rmval:dyn; +op3val:0xae807fff; valaddr_reg:x3; val_offset:45*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f14, f6, f18, f20, dyn, 0, 0, x3, 45*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f14, f6, f18, f20, dyn, 0, 0, x3, 45*0 + 3*0*FLEN/8, x4, x1, x2) inst_16: // rs1==f17, rs2==f12, rs3==f8, rd==f24,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f17; op2:f12; op3:f8; dest:f24; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae80ffff; valaddr_reg:x3; val_offset:48*FLEN/8; rmval:dyn; +op3val:0xae80ffff; valaddr_reg:x3; val_offset:48*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f24, f17, f12, f8, dyn, 0, 0, x3, 48*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f24, f17, f12, f8, dyn, 0, 0, x3, 48*0 + 3*0*FLEN/8, x4, x1, x2) inst_17: // rs1==f27, rs2==f29, rs3==f12, rd==f15,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f27; op2:f29; op3:f12; dest:f15; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae81ffff; valaddr_reg:x3; val_offset:51*FLEN/8; rmval:dyn; +op3val:0xae81ffff; valaddr_reg:x3; val_offset:51*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f15, f27, f29, f12, dyn, 0, 0, x3, 51*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f15, f27, f29, f12, dyn, 0, 0, x3, 51*0 + 3*0*FLEN/8, x4, x1, x2) inst_18: // rs1==f18, rs2==f4, rs3==f21, rd==f23,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f18; op2:f4; op3:f21; dest:f23; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae83ffff; valaddr_reg:x3; val_offset:54*FLEN/8; rmval:dyn; +op3val:0xae83ffff; valaddr_reg:x3; val_offset:54*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f23, f18, f4, f21, dyn, 0, 0, x3, 54*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f23, f18, f4, f21, dyn, 0, 0, x3, 54*0 + 3*0*FLEN/8, x4, x1, x2) inst_19: // rs1==f28, rs2==f21, rs3==f18, rd==f26,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f28; op2:f21; op3:f18; dest:f26; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae87ffff; valaddr_reg:x3; val_offset:57*FLEN/8; rmval:dyn; +op3val:0xae87ffff; valaddr_reg:x3; val_offset:57*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f26, f28, f21, f18, dyn, 0, 0, x3, 57*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f26, f28, f21, f18, dyn, 0, 0, x3, 57*0 + 3*0*FLEN/8, x4, x1, x2) inst_20: // rs1==f1, rs2==f2, rs3==f10, rd==f12,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f1; op2:f2; op3:f10; dest:f12; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae8fffff; valaddr_reg:x3; val_offset:60*FLEN/8; rmval:dyn; +op3val:0xae8fffff; valaddr_reg:x3; val_offset:60*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f12, f1, f2, f10, dyn, 0, 0, x3, 60*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f12, f1, f2, f10, dyn, 0, 0, x3, 60*0 + 3*0*FLEN/8, x4, x1, x2) inst_21: // rs1==f16, rs2==f10, rs3==f19, rd==f4,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f16; op2:f10; op3:f19; dest:f4; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae9fffff; valaddr_reg:x3; val_offset:63*FLEN/8; rmval:dyn; +op3val:0xae9fffff; valaddr_reg:x3; val_offset:63*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f4, f16, f10, f19, dyn, 0, 0, x3, 63*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f4, f16, f10, f19, dyn, 0, 0, x3, 63*0 + 3*0*FLEN/8, x4, x1, x2) inst_22: // rs1==f20, rs2==f23, rs3==f6, rd==f30,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f20; op2:f23; op3:f6; dest:f30; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaebfffff; valaddr_reg:x3; val_offset:66*FLEN/8; rmval:dyn; +op3val:0xaebfffff; valaddr_reg:x3; val_offset:66*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f30, f20, f23, f6, dyn, 0, 0, x3, 66*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f30, f20, f23, f6, dyn, 0, 0, x3, 66*0 + 3*0*FLEN/8, x4, x1, x2) inst_23: // rs1==f15, rs2==f28, rs3==f16, rd==f11,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f15; op2:f28; op3:f16; dest:f11; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaec00000; valaddr_reg:x3; val_offset:69*FLEN/8; rmval:dyn; +op3val:0xaec00000; valaddr_reg:x3; val_offset:69*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f11, f15, f28, f16, dyn, 0, 0, x3, 69*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f11, f15, f28, f16, dyn, 0, 0, x3, 69*0 + 3*0*FLEN/8, x4, x1, x2) inst_24: // rs1==f0, rs2==f26, rs3==f1, rd==f27,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f0; op2:f26; op3:f1; dest:f27; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaee00000; valaddr_reg:x3; val_offset:72*FLEN/8; rmval:dyn; +op3val:0xaee00000; valaddr_reg:x3; val_offset:72*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f27, f0, f26, f1, dyn, 0, 0, x3, 72*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f27, f0, f26, f1, dyn, 0, 0, x3, 72*0 + 3*0*FLEN/8, x4, x1, x2) inst_25: // rs1==f25, rs2==f14, rs3==f28, rd==f21,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f25; op2:f14; op3:f28; dest:f21; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaef00000; valaddr_reg:x3; val_offset:75*FLEN/8; rmval:dyn; +op3val:0xaef00000; valaddr_reg:x3; val_offset:75*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f21, f25, f14, f28, dyn, 0, 0, x3, 75*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f21, f25, f14, f28, dyn, 0, 0, x3, 75*0 + 3*0*FLEN/8, x4, x1, x2) inst_26: // rs1==f11, rs2==f13, rs3==f9, rd==f17,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f11; op2:f13; op3:f9; dest:f17; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaef80000; valaddr_reg:x3; val_offset:78*FLEN/8; rmval:dyn; +op3val:0xaef80000; valaddr_reg:x3; val_offset:78*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f17, f11, f13, f9, dyn, 0, 0, x3, 78*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f17, f11, f13, f9, dyn, 0, 0, x3, 78*0 + 3*0*FLEN/8, x4, x1, x2) inst_27: // rs1==f21, rs2==f27, rs3==f15, rd==f5,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f21; op2:f27; op3:f15; dest:f5; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefc0000; valaddr_reg:x3; val_offset:81*FLEN/8; rmval:dyn; +op3val:0xaefc0000; valaddr_reg:x3; val_offset:81*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f5, f21, f27, f15, dyn, 0, 0, x3, 81*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f5, f21, f27, f15, dyn, 0, 0, x3, 81*0 + 3*0*FLEN/8, x4, x1, x2) inst_28: // rs1==f19, rs2==f6, rs3==f29, rd==f0,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f19; op2:f6; op3:f29; dest:f0; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefe0000; valaddr_reg:x3; val_offset:84*FLEN/8; rmval:dyn; +op3val:0xaefe0000; valaddr_reg:x3; val_offset:84*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f0, f19, f6, f29, dyn, 0, 0, x3, 84*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f0, f19, f6, f29, dyn, 0, 0, x3, 84*0 + 3*0*FLEN/8, x4, x1, x2) inst_29: // rs1==f4, rs2==f15, rs3==f13, rd==f25,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f4; op2:f15; op3:f13; dest:f25; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeff0000; valaddr_reg:x3; val_offset:87*FLEN/8; rmval:dyn; +op3val:0xaeff0000; valaddr_reg:x3; val_offset:87*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f25, f4, f15, f13, dyn, 0, 0, x3, 87*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f25, f4, f15, f13, dyn, 0, 0, x3, 87*0 + 3*0*FLEN/8, x4, x1, x2) inst_30: // rs1==f26, rs2==f19, rs3==f23, rd==f20,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f26; op2:f19; op3:f23; dest:f20; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeff8000; valaddr_reg:x3; val_offset:90*FLEN/8; rmval:dyn; +op3val:0xaeff8000; valaddr_reg:x3; val_offset:90*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f20, f26, f19, f23, dyn, 0, 0, x3, 90*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f20, f26, f19, f23, dyn, 0, 0, x3, 90*0 + 3*0*FLEN/8, x4, x1, x2) inst_31: // rs1==f2, rs2==f17, rs3==f27, rd==f13,fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f2; op2:f17; op3:f27; dest:f13; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeffc000; valaddr_reg:x3; val_offset:93*FLEN/8; rmval:dyn; +op3val:0xaeffc000; valaddr_reg:x3; val_offset:93*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f13, f2, f17, f27, dyn, 0, 0, x3, 93*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f13, f2, f17, f27, dyn, 0, 0, x3, 93*0 + 3*0*FLEN/8, x4, x1, x2) inst_32: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeffe000; valaddr_reg:x3; val_offset:96*FLEN/8; rmval:dyn; +op3val:0xaeffe000; valaddr_reg:x3; val_offset:96*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96*0 + 3*0*FLEN/8, x4, x1, x2) inst_33: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefff000; valaddr_reg:x3; val_offset:99*FLEN/8; rmval:dyn; +op3val:0xaefff000; valaddr_reg:x3; val_offset:99*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99*0 + 3*0*FLEN/8, x4, x1, x2) inst_34: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefff800; valaddr_reg:x3; val_offset:102*FLEN/8; rmval:dyn; +op3val:0xaefff800; valaddr_reg:x3; val_offset:102*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102*0 + 3*0*FLEN/8, x4, x1, x2) inst_35: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefffc00; valaddr_reg:x3; val_offset:105*FLEN/8; rmval:dyn; +op3val:0xaefffc00; valaddr_reg:x3; val_offset:105*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105*0 + 3*0*FLEN/8, x4, x1, x2) inst_36: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefffe00; valaddr_reg:x3; val_offset:108*FLEN/8; rmval:dyn; +op3val:0xaefffe00; valaddr_reg:x3; val_offset:108*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108*0 + 3*0*FLEN/8, x4, x1, x2) inst_37: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeffff00; valaddr_reg:x3; val_offset:111*FLEN/8; rmval:dyn; +op3val:0xaeffff00; valaddr_reg:x3; val_offset:111*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111*0 + 3*0*FLEN/8, x4, x1, x2) inst_38: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeffff80; valaddr_reg:x3; val_offset:114*FLEN/8; rmval:dyn; +op3val:0xaeffff80; valaddr_reg:x3; val_offset:114*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114*0 + 3*0*FLEN/8, x4, x1, x2) inst_39: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeffffc0; valaddr_reg:x3; val_offset:117*FLEN/8; rmval:dyn; +op3val:0xaeffffc0; valaddr_reg:x3; val_offset:117*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 117*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 117*0 + 3*0*FLEN/8, x4, x1, x2) inst_40: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeffffe0; valaddr_reg:x3; val_offset:120*FLEN/8; rmval:dyn; +op3val:0xaeffffe0; valaddr_reg:x3; val_offset:120*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 120*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 120*0 + 3*0*FLEN/8, x4, x1, x2) inst_41: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefffff0; valaddr_reg:x3; val_offset:123*FLEN/8; rmval:dyn; +op3val:0xaefffff0; valaddr_reg:x3; val_offset:123*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 123*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 123*0 + 3*0*FLEN/8, x4, x1, x2) inst_42: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefffff8; valaddr_reg:x3; val_offset:126*FLEN/8; rmval:dyn; +op3val:0xaefffff8; valaddr_reg:x3; val_offset:126*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 126*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 126*0 + 3*0*FLEN/8, x4, x1, x2) inst_43: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefffffc; valaddr_reg:x3; val_offset:129*FLEN/8; rmval:dyn; +op3val:0xaefffffc; valaddr_reg:x3; val_offset:129*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 129*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 129*0 + 3*0*FLEN/8, x4, x1, x2) inst_44: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaefffffe; valaddr_reg:x3; val_offset:132*FLEN/8; rmval:dyn; +op3val:0xaefffffe; valaddr_reg:x3; val_offset:132*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 132*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 132*0 + 3*0*FLEN/8, x4, x1, x2) inst_45: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xaeffffff; valaddr_reg:x3; val_offset:135*FLEN/8; rmval:dyn; +op3val:0xaeffffff; valaddr_reg:x3; val_offset:135*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 135*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 135*0 + 3*0*FLEN/8, x4, x1, x2) inst_46: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbf800001; valaddr_reg:x3; val_offset:138*FLEN/8; rmval:dyn; +op3val:0xbf800001; valaddr_reg:x3; val_offset:138*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 138*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 138*0 + 3*0*FLEN/8, x4, x1, x2) inst_47: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbf800003; valaddr_reg:x3; val_offset:141*FLEN/8; rmval:dyn; +op3val:0xbf800003; valaddr_reg:x3; val_offset:141*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 141*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 141*0 + 3*0*FLEN/8, x4, x1, x2) inst_48: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbf800007; valaddr_reg:x3; val_offset:144*FLEN/8; rmval:dyn; +op3val:0xbf800007; valaddr_reg:x3; val_offset:144*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 144*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 144*0 + 3*0*FLEN/8, x4, x1, x2) inst_49: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbf999999; valaddr_reg:x3; val_offset:147*FLEN/8; rmval:dyn; +op3val:0xbf999999; valaddr_reg:x3; val_offset:147*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 147*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 147*0 + 3*0*FLEN/8, x4, x1, x2) inst_50: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:150*FLEN/8; rmval:dyn; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:150*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 150*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 150*0 + 3*0*FLEN/8, x4, x1, x2) inst_51: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:153*FLEN/8; rmval:dyn; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:153*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 153*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 153*0 + 3*0*FLEN/8, x4, x1, x2) inst_52: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:156*FLEN/8; rmval:dyn; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:156*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 156*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 156*0 + 3*0*FLEN/8, x4, x1, x2) inst_53: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:159*FLEN/8; rmval:dyn; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:159*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 159*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 159*0 + 3*0*FLEN/8, x4, x1, x2) inst_54: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:162*FLEN/8; rmval:dyn; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:162*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 162*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 162*0 + 3*0*FLEN/8, x4, x1, x2) inst_55: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:165*FLEN/8; rmval:dyn; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:165*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 165*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 165*0 + 3*0*FLEN/8, x4, x1, x2) inst_56: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:168*FLEN/8; rmval:dyn; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:168*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 168*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 168*0 + 3*0*FLEN/8, x4, x1, x2) inst_57: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:171*FLEN/8; rmval:dyn; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:171*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 171*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 171*0 + 3*0*FLEN/8, x4, x1, x2) inst_58: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:174*FLEN/8; rmval:dyn; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:174*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 174*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 174*0 + 3*0*FLEN/8, x4, x1, x2) inst_59: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:177*FLEN/8; rmval:dyn; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:177*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 177*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 177*0 + 3*0*FLEN/8, x4, x1, x2) inst_60: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:180*FLEN/8; rmval:dyn; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:180*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 180*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 180*0 + 3*0*FLEN/8, x4, x1, x2) inst_61: // fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:183*FLEN/8; rmval:dyn; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:183*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 183*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 183*0 + 3*0*FLEN/8, x4, x1, x2) inst_62: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:186*FLEN/8; rmval:dyn; +op3val:0x80000001; valaddr_reg:x3; val_offset:186*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 186*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 186*0 + 3*0*FLEN/8, x4, x1, x2) inst_63: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:189*FLEN/8; rmval:dyn; +op3val:0x80000003; valaddr_reg:x3; val_offset:189*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 189*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 189*0 + 3*0*FLEN/8, x4, x1, x2) inst_64: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:192*FLEN/8; rmval:dyn; +op3val:0x80000007; valaddr_reg:x3; val_offset:192*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 192*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 192*0 + 3*0*FLEN/8, x4, x1, x2) inst_65: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:195*FLEN/8; rmval:dyn; +op3val:0x80199999; valaddr_reg:x3; val_offset:195*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 195*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 195*0 + 3*0*FLEN/8, x4, x1, x2) inst_66: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:198*FLEN/8; rmval:dyn; +op3val:0x80249249; valaddr_reg:x3; val_offset:198*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 198*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 198*0 + 3*0*FLEN/8, x4, x1, x2) inst_67: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:201*FLEN/8; rmval:dyn; +op3val:0x80333333; valaddr_reg:x3; val_offset:201*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 201*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 201*0 + 3*0*FLEN/8, x4, x1, x2) inst_68: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:204*FLEN/8; rmval:dyn; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:204*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 204*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 204*0 + 3*0*FLEN/8, x4, x1, x2) inst_69: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:207*FLEN/8; rmval:dyn; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:207*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 207*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 207*0 + 3*0*FLEN/8, x4, x1, x2) inst_70: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:210*FLEN/8; rmval:dyn; +op3val:0x80444444; valaddr_reg:x3; val_offset:210*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 210*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 210*0 + 3*0*FLEN/8, x4, x1, x2) inst_71: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:213*FLEN/8; rmval:dyn; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:213*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 213*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 213*0 + 3*0*FLEN/8, x4, x1, x2) inst_72: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:216*FLEN/8; rmval:dyn; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:216*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 216*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 216*0 + 3*0*FLEN/8, x4, x1, x2) inst_73: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:219*FLEN/8; rmval:dyn; +op3val:0x80666666; valaddr_reg:x3; val_offset:219*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 219*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 219*0 + 3*0*FLEN/8, x4, x1, x2) inst_74: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:222*FLEN/8; rmval:dyn; +op3val:0x806db6db; valaddr_reg:x3; val_offset:222*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 222*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 222*0 + 3*0*FLEN/8, x4, x1, x2) inst_75: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:225*FLEN/8; rmval:dyn; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:225*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 225*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 225*0 + 3*0*FLEN/8, x4, x1, x2) inst_76: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:228*FLEN/8; rmval:dyn; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:228*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 228*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 228*0 + 3*0*FLEN/8, x4, x1, x2) inst_77: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:231*FLEN/8; rmval:dyn; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:231*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 231*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 231*0 + 3*0*FLEN/8, x4, x1, x2) inst_78: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81000000; valaddr_reg:x3; val_offset:234*FLEN/8; rmval:dyn; +op3val:0x81000000; valaddr_reg:x3; val_offset:234*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 234*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 234*0 + 3*0*FLEN/8, x4, x1, x2) inst_79: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81000001; valaddr_reg:x3; val_offset:237*FLEN/8; rmval:dyn; +op3val:0x81000001; valaddr_reg:x3; val_offset:237*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 237*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 237*0 + 3*0*FLEN/8, x4, x1, x2) inst_80: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81000003; valaddr_reg:x3; val_offset:240*FLEN/8; rmval:dyn; +op3val:0x81000003; valaddr_reg:x3; val_offset:240*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 240*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 240*0 + 3*0*FLEN/8, x4, x1, x2) inst_81: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81000007; valaddr_reg:x3; val_offset:243*FLEN/8; rmval:dyn; +op3val:0x81000007; valaddr_reg:x3; val_offset:243*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 243*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 243*0 + 3*0*FLEN/8, x4, x1, x2) inst_82: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8100000f; valaddr_reg:x3; val_offset:246*FLEN/8; rmval:dyn; +op3val:0x8100000f; valaddr_reg:x3; val_offset:246*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 246*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 246*0 + 3*0*FLEN/8, x4, x1, x2) inst_83: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8100001f; valaddr_reg:x3; val_offset:249*FLEN/8; rmval:dyn; +op3val:0x8100001f; valaddr_reg:x3; val_offset:249*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 249*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 249*0 + 3*0*FLEN/8, x4, x1, x2) inst_84: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8100003f; valaddr_reg:x3; val_offset:252*FLEN/8; rmval:dyn; +op3val:0x8100003f; valaddr_reg:x3; val_offset:252*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 252*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 252*0 + 3*0*FLEN/8, x4, x1, x2) inst_85: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8100007f; valaddr_reg:x3; val_offset:255*FLEN/8; rmval:dyn; +op3val:0x8100007f; valaddr_reg:x3; val_offset:255*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 255*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 255*0 + 3*0*FLEN/8, x4, x1, x2) inst_86: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x810000ff; valaddr_reg:x3; val_offset:258*FLEN/8; rmval:dyn; +op3val:0x810000ff; valaddr_reg:x3; val_offset:258*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 258*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 258*0 + 3*0*FLEN/8, x4, x1, x2) inst_87: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x810001ff; valaddr_reg:x3; val_offset:261*FLEN/8; rmval:dyn; +op3val:0x810001ff; valaddr_reg:x3; val_offset:261*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 261*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 261*0 + 3*0*FLEN/8, x4, x1, x2) inst_88: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x810003ff; valaddr_reg:x3; val_offset:264*FLEN/8; rmval:dyn; +op3val:0x810003ff; valaddr_reg:x3; val_offset:264*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 264*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 264*0 + 3*0*FLEN/8, x4, x1, x2) inst_89: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x810007ff; valaddr_reg:x3; val_offset:267*FLEN/8; rmval:dyn; +op3val:0x810007ff; valaddr_reg:x3; val_offset:267*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 267*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 267*0 + 3*0*FLEN/8, x4, x1, x2) inst_90: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81000fff; valaddr_reg:x3; val_offset:270*FLEN/8; rmval:dyn; +op3val:0x81000fff; valaddr_reg:x3; val_offset:270*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 270*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 270*0 + 3*0*FLEN/8, x4, x1, x2) inst_91: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81001fff; valaddr_reg:x3; val_offset:273*FLEN/8; rmval:dyn; +op3val:0x81001fff; valaddr_reg:x3; val_offset:273*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 273*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 273*0 + 3*0*FLEN/8, x4, x1, x2) inst_92: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81003fff; valaddr_reg:x3; val_offset:276*FLEN/8; rmval:dyn; +op3val:0x81003fff; valaddr_reg:x3; val_offset:276*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 276*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 276*0 + 3*0*FLEN/8, x4, x1, x2) inst_93: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81007fff; valaddr_reg:x3; val_offset:279*FLEN/8; rmval:dyn; +op3val:0x81007fff; valaddr_reg:x3; val_offset:279*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 279*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 279*0 + 3*0*FLEN/8, x4, x1, x2) inst_94: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8100ffff; valaddr_reg:x3; val_offset:282*FLEN/8; rmval:dyn; +op3val:0x8100ffff; valaddr_reg:x3; val_offset:282*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 282*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 282*0 + 3*0*FLEN/8, x4, x1, x2) inst_95: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8101ffff; valaddr_reg:x3; val_offset:285*FLEN/8; rmval:dyn; +op3val:0x8101ffff; valaddr_reg:x3; val_offset:285*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 285*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 285*0 + 3*0*FLEN/8, x4, x1, x2) inst_96: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8103ffff; valaddr_reg:x3; val_offset:288*FLEN/8; rmval:dyn; +op3val:0x8103ffff; valaddr_reg:x3; val_offset:288*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 288*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 288*0 + 3*0*FLEN/8, x4, x1, x2) inst_97: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x8107ffff; valaddr_reg:x3; val_offset:291*FLEN/8; rmval:dyn; +op3val:0x8107ffff; valaddr_reg:x3; val_offset:291*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 291*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 291*0 + 3*0*FLEN/8, x4, x1, x2) inst_98: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x810fffff; valaddr_reg:x3; val_offset:294*FLEN/8; rmval:dyn; +op3val:0x810fffff; valaddr_reg:x3; val_offset:294*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 294*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 294*0 + 3*0*FLEN/8, x4, x1, x2) inst_99: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x811fffff; valaddr_reg:x3; val_offset:297*FLEN/8; rmval:dyn; +op3val:0x811fffff; valaddr_reg:x3; val_offset:297*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 297*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 297*0 + 3*0*FLEN/8, x4, x1, x2) inst_100: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x813fffff; valaddr_reg:x3; val_offset:300*FLEN/8; rmval:dyn; +op3val:0x813fffff; valaddr_reg:x3; val_offset:300*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 300*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 300*0 + 3*0*FLEN/8, x4, x1, x2) inst_101: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81400000; valaddr_reg:x3; val_offset:303*FLEN/8; rmval:dyn; +op3val:0x81400000; valaddr_reg:x3; val_offset:303*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 303*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 303*0 + 3*0*FLEN/8, x4, x1, x2) inst_102: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81600000; valaddr_reg:x3; val_offset:306*FLEN/8; rmval:dyn; +op3val:0x81600000; valaddr_reg:x3; val_offset:306*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 306*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 306*0 + 3*0*FLEN/8, x4, x1, x2) inst_103: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81700000; valaddr_reg:x3; val_offset:309*FLEN/8; rmval:dyn; +op3val:0x81700000; valaddr_reg:x3; val_offset:309*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 309*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 309*0 + 3*0*FLEN/8, x4, x1, x2) inst_104: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x81780000; valaddr_reg:x3; val_offset:312*FLEN/8; rmval:dyn; +op3val:0x81780000; valaddr_reg:x3; val_offset:312*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 312*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 312*0 + 3*0*FLEN/8, x4, x1, x2) inst_105: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817c0000; valaddr_reg:x3; val_offset:315*FLEN/8; rmval:dyn; +op3val:0x817c0000; valaddr_reg:x3; val_offset:315*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 315*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 315*0 + 3*0*FLEN/8, x4, x1, x2) inst_106: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817e0000; valaddr_reg:x3; val_offset:318*FLEN/8; rmval:dyn; +op3val:0x817e0000; valaddr_reg:x3; val_offset:318*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 318*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 318*0 + 3*0*FLEN/8, x4, x1, x2) inst_107: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817f0000; valaddr_reg:x3; val_offset:321*FLEN/8; rmval:dyn; +op3val:0x817f0000; valaddr_reg:x3; val_offset:321*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 321*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 321*0 + 3*0*FLEN/8, x4, x1, x2) inst_108: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817f8000; valaddr_reg:x3; val_offset:324*FLEN/8; rmval:dyn; +op3val:0x817f8000; valaddr_reg:x3; val_offset:324*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 324*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 324*0 + 3*0*FLEN/8, x4, x1, x2) inst_109: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817fc000; valaddr_reg:x3; val_offset:327*FLEN/8; rmval:dyn; +op3val:0x817fc000; valaddr_reg:x3; val_offset:327*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 327*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 327*0 + 3*0*FLEN/8, x4, x1, x2) inst_110: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817fe000; valaddr_reg:x3; val_offset:330*FLEN/8; rmval:dyn; +op3val:0x817fe000; valaddr_reg:x3; val_offset:330*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 330*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 330*0 + 3*0*FLEN/8, x4, x1, x2) inst_111: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817ff000; valaddr_reg:x3; val_offset:333*FLEN/8; rmval:dyn; +op3val:0x817ff000; valaddr_reg:x3; val_offset:333*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 333*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 333*0 + 3*0*FLEN/8, x4, x1, x2) inst_112: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817ff800; valaddr_reg:x3; val_offset:336*FLEN/8; rmval:dyn; +op3val:0x817ff800; valaddr_reg:x3; val_offset:336*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 336*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 336*0 + 3*0*FLEN/8, x4, x1, x2) inst_113: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817ffc00; valaddr_reg:x3; val_offset:339*FLEN/8; rmval:dyn; +op3val:0x817ffc00; valaddr_reg:x3; val_offset:339*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 339*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 339*0 + 3*0*FLEN/8, x4, x1, x2) inst_114: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817ffe00; valaddr_reg:x3; val_offset:342*FLEN/8; rmval:dyn; +op3val:0x817ffe00; valaddr_reg:x3; val_offset:342*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 342*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 342*0 + 3*0*FLEN/8, x4, x1, x2) inst_115: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817fff00; valaddr_reg:x3; val_offset:345*FLEN/8; rmval:dyn; +op3val:0x817fff00; valaddr_reg:x3; val_offset:345*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 345*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 345*0 + 3*0*FLEN/8, x4, x1, x2) inst_116: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817fff80; valaddr_reg:x3; val_offset:348*FLEN/8; rmval:dyn; +op3val:0x817fff80; valaddr_reg:x3; val_offset:348*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 348*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 348*0 + 3*0*FLEN/8, x4, x1, x2) inst_117: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817fffc0; valaddr_reg:x3; val_offset:351*FLEN/8; rmval:dyn; +op3val:0x817fffc0; valaddr_reg:x3; val_offset:351*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 351*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 351*0 + 3*0*FLEN/8, x4, x1, x2) inst_118: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817fffe0; valaddr_reg:x3; val_offset:354*FLEN/8; rmval:dyn; +op3val:0x817fffe0; valaddr_reg:x3; val_offset:354*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 354*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 354*0 + 3*0*FLEN/8, x4, x1, x2) inst_119: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817ffff0; valaddr_reg:x3; val_offset:357*FLEN/8; rmval:dyn; +op3val:0x817ffff0; valaddr_reg:x3; val_offset:357*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 357*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 357*0 + 3*0*FLEN/8, x4, x1, x2) inst_120: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817ffff8; valaddr_reg:x3; val_offset:360*FLEN/8; rmval:dyn; +op3val:0x817ffff8; valaddr_reg:x3; val_offset:360*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 360*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 360*0 + 3*0*FLEN/8, x4, x1, x2) inst_121: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817ffffc; valaddr_reg:x3; val_offset:363*FLEN/8; rmval:dyn; +op3val:0x817ffffc; valaddr_reg:x3; val_offset:363*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 363*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 363*0 + 3*0*FLEN/8, x4, x1, x2) inst_122: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817ffffe; valaddr_reg:x3; val_offset:366*FLEN/8; rmval:dyn; +op3val:0x817ffffe; valaddr_reg:x3; val_offset:366*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 366*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 366*0 + 3*0*FLEN/8, x4, x1, x2) inst_123: // fs1 == 0 and fe1 == 0xf4 and fm1 == 0x60affa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7a60affa; op2val:0x80000000; -op3val:0x817fffff; valaddr_reg:x3; val_offset:369*FLEN/8; rmval:dyn; +op3val:0x817fffff; valaddr_reg:x3; val_offset:369*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 369*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 369*0 + 3*0*FLEN/8, x4, x1, x2) inst_124: // fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea000000; valaddr_reg:x3; val_offset:372*FLEN/8; rmval:dyn; +op3val:0xea000000; valaddr_reg:x3; val_offset:372*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 372*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 372*0 + 3*0*FLEN/8, x4, x1, x2) inst_125: // fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea000001; valaddr_reg:x3; val_offset:375*FLEN/8; rmval:dyn; +op3val:0xea000001; valaddr_reg:x3; val_offset:375*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 375*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 375*0 + 3*0*FLEN/8, x4, x1, x2) inst_126: // fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea000003; valaddr_reg:x3; val_offset:378*FLEN/8; rmval:dyn; +op3val:0xea000003; valaddr_reg:x3; val_offset:378*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 378*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 378*0 + 3*0*FLEN/8, x4, x1, x2) inst_127: // fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 /* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea000007; valaddr_reg:x3; val_offset:381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 381*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_2) - -inst_128: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea00000f; valaddr_reg:x3; val_offset:384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 384*FLEN/8, x4, x1, x2) - -inst_129: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea00001f; valaddr_reg:x3; val_offset:387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 387*FLEN/8, x4, x1, x2) - -inst_130: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea00003f; valaddr_reg:x3; val_offset:390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 390*FLEN/8, x4, x1, x2) - -inst_131: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea00007f; valaddr_reg:x3; val_offset:393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 393*FLEN/8, x4, x1, x2) - -inst_132: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea0000ff; valaddr_reg:x3; val_offset:396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 396*FLEN/8, x4, x1, x2) - -inst_133: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea0001ff; valaddr_reg:x3; val_offset:399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 399*FLEN/8, x4, x1, x2) - -inst_134: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea0003ff; valaddr_reg:x3; val_offset:402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 402*FLEN/8, x4, x1, x2) - -inst_135: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea0007ff; valaddr_reg:x3; val_offset:405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 405*FLEN/8, x4, x1, x2) - -inst_136: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea000fff; valaddr_reg:x3; val_offset:408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 408*FLEN/8, x4, x1, x2) - -inst_137: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea001fff; valaddr_reg:x3; val_offset:411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 411*FLEN/8, x4, x1, x2) - -inst_138: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea003fff; valaddr_reg:x3; val_offset:414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 414*FLEN/8, x4, x1, x2) - -inst_139: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea007fff; valaddr_reg:x3; val_offset:417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 417*FLEN/8, x4, x1, x2) - -inst_140: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea00ffff; valaddr_reg:x3; val_offset:420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 420*FLEN/8, x4, x1, x2) - -inst_141: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea01ffff; valaddr_reg:x3; val_offset:423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 423*FLEN/8, x4, x1, x2) - -inst_142: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea03ffff; valaddr_reg:x3; val_offset:426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 426*FLEN/8, x4, x1, x2) - -inst_143: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea07ffff; valaddr_reg:x3; val_offset:429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 429*FLEN/8, x4, x1, x2) - -inst_144: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea0fffff; valaddr_reg:x3; val_offset:432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 432*FLEN/8, x4, x1, x2) - -inst_145: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea1fffff; valaddr_reg:x3; val_offset:435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 435*FLEN/8, x4, x1, x2) - -inst_146: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea3fffff; valaddr_reg:x3; val_offset:438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 438*FLEN/8, x4, x1, x2) - -inst_147: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea400000; valaddr_reg:x3; val_offset:441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 441*FLEN/8, x4, x1, x2) - -inst_148: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea600000; valaddr_reg:x3; val_offset:444*FLEN/8; rmval:dyn; +op3val:0xea000007; valaddr_reg:x3; val_offset:381*0 + 3*0*FLEN/8; rmval:dyn; testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 444*FLEN/8, x4, x1, x2) - -inst_149: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea700000; valaddr_reg:x3; val_offset:447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 447*FLEN/8, x4, x1, x2) - -inst_150: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea780000; valaddr_reg:x3; val_offset:450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 450*FLEN/8, x4, x1, x2) - -inst_151: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7c0000; valaddr_reg:x3; val_offset:453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 453*FLEN/8, x4, x1, x2) - -inst_152: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7e0000; valaddr_reg:x3; val_offset:456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 456*FLEN/8, x4, x1, x2) - -inst_153: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7f0000; valaddr_reg:x3; val_offset:459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 459*FLEN/8, x4, x1, x2) - -inst_154: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7f8000; valaddr_reg:x3; val_offset:462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 462*FLEN/8, x4, x1, x2) - -inst_155: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7fc000; valaddr_reg:x3; val_offset:465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 465*FLEN/8, x4, x1, x2) - -inst_156: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7fe000; valaddr_reg:x3; val_offset:468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 468*FLEN/8, x4, x1, x2) - -inst_157: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7ff000; valaddr_reg:x3; val_offset:471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 471*FLEN/8, x4, x1, x2) - -inst_158: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7ff800; valaddr_reg:x3; val_offset:474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 474*FLEN/8, x4, x1, x2) +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 381*0 + 3*0*FLEN/8, x4, x1, x2) +#endif -inst_159: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7ffc00; valaddr_reg:x3; val_offset:477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 477*FLEN/8, x4, x1, x2) -inst_160: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7ffe00; valaddr_reg:x3; val_offset:480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 480*FLEN/8, x4, x1, x2) +RVTEST_CODE_END +RVMODEL_HALT -inst_161: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7fff00; valaddr_reg:x3; val_offset:483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 483*FLEN/8, x4, x1, x2) +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624192,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2927624195,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624199,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624223,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2927624319,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927626239,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927628287,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927632383,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927640575,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927656959,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927689727,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927755263,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927886335,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2928148479,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2928672767,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2929721343,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2931818495,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2931818496,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2933915648,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2934964224,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2935488512,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2935750656,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2935881728,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2935947264,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2935980032,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2935996416,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936004608,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936008704,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936010752,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936011776,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012288,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012544,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012672,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012736,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012768,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012784,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012792,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012796,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012798,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2936012799,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260864,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260865,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260867,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260871,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260879,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260895,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260927,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260991,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261119,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261375,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261887,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164262911,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164264959,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164269055,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164277247,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164293631,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164326399,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164391935,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164523007,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164785151,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2165309439,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2166358015,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2168455167,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2168455168,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2170552320,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2171600896,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172125184,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172387328,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172518400,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172583936,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172616704,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172633088,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172641280,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172645376,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172647424,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172648448,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172648960,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649216,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649344,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649408,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649440,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649456,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649464,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649468,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649470,32,FLEN) +NAN_BOXED(2053156858,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649471,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868544,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868545,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868547,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868551,32,FLEN) +RVTEST_DATA_END -inst_162: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7fff80; valaddr_reg:x3; val_offset:486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 486*FLEN/8, x4, x1, x2) +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; -inst_163: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7fffc0; valaddr_reg:x3; val_offset:489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 489*FLEN/8, x4, x1, x2) -inst_164: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7fffe0; valaddr_reg:x3; val_offset:492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 492*FLEN/8, x4, x1, x2) +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef -inst_165: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7ffff0; valaddr_reg:x3; val_offset:495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 495*FLEN/8, x4, x1, x2) -inst_166: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7ffff8; valaddr_reg:x3; val_offset:498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 498*FLEN/8, x4, x1, x2) - -inst_167: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7ffffc; valaddr_reg:x3; val_offset:501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 501*FLEN/8, x4, x1, x2) - -inst_168: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7ffffe; valaddr_reg:x3; val_offset:504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 504*FLEN/8, x4, x1, x2) - -inst_169: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xea7fffff; valaddr_reg:x3; val_offset:507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 507*FLEN/8, x4, x1, x2) - -inst_170: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff000001; valaddr_reg:x3; val_offset:510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 510*FLEN/8, x4, x1, x2) - -inst_171: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff000003; valaddr_reg:x3; val_offset:513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 513*FLEN/8, x4, x1, x2) - -inst_172: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff000007; valaddr_reg:x3; val_offset:516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 516*FLEN/8, x4, x1, x2) - -inst_173: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff199999; valaddr_reg:x3; val_offset:519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 519*FLEN/8, x4, x1, x2) - -inst_174: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff249249; valaddr_reg:x3; val_offset:522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 522*FLEN/8, x4, x1, x2) - -inst_175: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff333333; valaddr_reg:x3; val_offset:525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 525*FLEN/8, x4, x1, x2) - -inst_176: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 528*FLEN/8, x4, x1, x2) - -inst_177: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 531*FLEN/8, x4, x1, x2) - -inst_178: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff444444; valaddr_reg:x3; val_offset:534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 534*FLEN/8, x4, x1, x2) - -inst_179: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 537*FLEN/8, x4, x1, x2) - -inst_180: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 540*FLEN/8, x4, x1, x2) - -inst_181: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff666666; valaddr_reg:x3; val_offset:543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 543*FLEN/8, x4, x1, x2) - -inst_182: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 546*FLEN/8, x4, x1, x2) - -inst_183: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 549*FLEN/8, x4, x1, x2) - -inst_184: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 552*FLEN/8, x4, x1, x2) - -inst_185: -// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 555*FLEN/8, x4, x1, x2) - -inst_186: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66800000; valaddr_reg:x3; val_offset:558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 558*FLEN/8, x4, x1, x2) - -inst_187: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66800001; valaddr_reg:x3; val_offset:561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 561*FLEN/8, x4, x1, x2) - -inst_188: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66800003; valaddr_reg:x3; val_offset:564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 564*FLEN/8, x4, x1, x2) - -inst_189: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66800007; valaddr_reg:x3; val_offset:567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 567*FLEN/8, x4, x1, x2) - -inst_190: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x6680000f; valaddr_reg:x3; val_offset:570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 570*FLEN/8, x4, x1, x2) - -inst_191: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x6680001f; valaddr_reg:x3; val_offset:573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 573*FLEN/8, x4, x1, x2) - -inst_192: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x6680003f; valaddr_reg:x3; val_offset:576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 576*FLEN/8, x4, x1, x2) - -inst_193: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x6680007f; valaddr_reg:x3; val_offset:579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 579*FLEN/8, x4, x1, x2) - -inst_194: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x668000ff; valaddr_reg:x3; val_offset:582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 582*FLEN/8, x4, x1, x2) - -inst_195: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x668001ff; valaddr_reg:x3; val_offset:585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 585*FLEN/8, x4, x1, x2) - -inst_196: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x668003ff; valaddr_reg:x3; val_offset:588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 588*FLEN/8, x4, x1, x2) - -inst_197: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x668007ff; valaddr_reg:x3; val_offset:591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 591*FLEN/8, x4, x1, x2) - -inst_198: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66800fff; valaddr_reg:x3; val_offset:594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 594*FLEN/8, x4, x1, x2) - -inst_199: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66801fff; valaddr_reg:x3; val_offset:597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 597*FLEN/8, x4, x1, x2) - -inst_200: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66803fff; valaddr_reg:x3; val_offset:600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 600*FLEN/8, x4, x1, x2) - -inst_201: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66807fff; valaddr_reg:x3; val_offset:603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 603*FLEN/8, x4, x1, x2) - -inst_202: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x6680ffff; valaddr_reg:x3; val_offset:606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 606*FLEN/8, x4, x1, x2) - -inst_203: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x6681ffff; valaddr_reg:x3; val_offset:609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 609*FLEN/8, x4, x1, x2) - -inst_204: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x6683ffff; valaddr_reg:x3; val_offset:612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 612*FLEN/8, x4, x1, x2) - -inst_205: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x6687ffff; valaddr_reg:x3; val_offset:615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 615*FLEN/8, x4, x1, x2) - -inst_206: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x668fffff; valaddr_reg:x3; val_offset:618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 618*FLEN/8, x4, x1, x2) - -inst_207: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x669fffff; valaddr_reg:x3; val_offset:621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 621*FLEN/8, x4, x1, x2) - -inst_208: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66bfffff; valaddr_reg:x3; val_offset:624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 624*FLEN/8, x4, x1, x2) - -inst_209: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66c00000; valaddr_reg:x3; val_offset:627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 627*FLEN/8, x4, x1, x2) - -inst_210: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66e00000; valaddr_reg:x3; val_offset:630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 630*FLEN/8, x4, x1, x2) - -inst_211: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66f00000; valaddr_reg:x3; val_offset:633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 633*FLEN/8, x4, x1, x2) - -inst_212: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66f80000; valaddr_reg:x3; val_offset:636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 636*FLEN/8, x4, x1, x2) - -inst_213: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fc0000; valaddr_reg:x3; val_offset:639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 639*FLEN/8, x4, x1, x2) - -inst_214: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fe0000; valaddr_reg:x3; val_offset:642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 642*FLEN/8, x4, x1, x2) - -inst_215: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ff0000; valaddr_reg:x3; val_offset:645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 645*FLEN/8, x4, x1, x2) - -inst_216: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ff8000; valaddr_reg:x3; val_offset:648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 648*FLEN/8, x4, x1, x2) - -inst_217: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ffc000; valaddr_reg:x3; val_offset:651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 651*FLEN/8, x4, x1, x2) - -inst_218: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ffe000; valaddr_reg:x3; val_offset:654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 654*FLEN/8, x4, x1, x2) - -inst_219: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fff000; valaddr_reg:x3; val_offset:657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 657*FLEN/8, x4, x1, x2) - -inst_220: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fff800; valaddr_reg:x3; val_offset:660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 660*FLEN/8, x4, x1, x2) - -inst_221: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fffc00; valaddr_reg:x3; val_offset:663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 663*FLEN/8, x4, x1, x2) - -inst_222: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fffe00; valaddr_reg:x3; val_offset:666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 666*FLEN/8, x4, x1, x2) - -inst_223: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ffff00; valaddr_reg:x3; val_offset:669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 669*FLEN/8, x4, x1, x2) - -inst_224: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ffff80; valaddr_reg:x3; val_offset:672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 672*FLEN/8, x4, x1, x2) - -inst_225: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ffffc0; valaddr_reg:x3; val_offset:675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 675*FLEN/8, x4, x1, x2) - -inst_226: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ffffe0; valaddr_reg:x3; val_offset:678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 678*FLEN/8, x4, x1, x2) - -inst_227: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fffff0; valaddr_reg:x3; val_offset:681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 681*FLEN/8, x4, x1, x2) - -inst_228: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fffff8; valaddr_reg:x3; val_offset:684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 684*FLEN/8, x4, x1, x2) - -inst_229: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fffffc; valaddr_reg:x3; val_offset:687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 687*FLEN/8, x4, x1, x2) - -inst_230: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66fffffe; valaddr_reg:x3; val_offset:690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 690*FLEN/8, x4, x1, x2) - -inst_231: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x66ffffff; valaddr_reg:x3; val_offset:693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 693*FLEN/8, x4, x1, x2) - -inst_232: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f000001; valaddr_reg:x3; val_offset:696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 696*FLEN/8, x4, x1, x2) - -inst_233: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f000003; valaddr_reg:x3; val_offset:699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 699*FLEN/8, x4, x1, x2) - -inst_234: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f000007; valaddr_reg:x3; val_offset:702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 702*FLEN/8, x4, x1, x2) - -inst_235: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f199999; valaddr_reg:x3; val_offset:705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 705*FLEN/8, x4, x1, x2) - -inst_236: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f249249; valaddr_reg:x3; val_offset:708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 708*FLEN/8, x4, x1, x2) - -inst_237: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f333333; valaddr_reg:x3; val_offset:711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 711*FLEN/8, x4, x1, x2) - -inst_238: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 714*FLEN/8, x4, x1, x2) - -inst_239: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 717*FLEN/8, x4, x1, x2) - -inst_240: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f444444; valaddr_reg:x3; val_offset:720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 720*FLEN/8, x4, x1, x2) - -inst_241: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 723*FLEN/8, x4, x1, x2) - -inst_242: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 726*FLEN/8, x4, x1, x2) - -inst_243: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f666666; valaddr_reg:x3; val_offset:729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 729*FLEN/8, x4, x1, x2) - -inst_244: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 732*FLEN/8, x4, x1, x2) - -inst_245: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 735*FLEN/8, x4, x1, x2) - -inst_246: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 738*FLEN/8, x4, x1, x2) - -inst_247: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 741*FLEN/8, x4, x1, x2) - -inst_248: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6800000; valaddr_reg:x3; val_offset:744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 744*FLEN/8, x4, x1, x2) - -inst_249: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6800001; valaddr_reg:x3; val_offset:747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 747*FLEN/8, x4, x1, x2) - -inst_250: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6800003; valaddr_reg:x3; val_offset:750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 750*FLEN/8, x4, x1, x2) - -inst_251: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6800007; valaddr_reg:x3; val_offset:753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 753*FLEN/8, x4, x1, x2) - -inst_252: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb680000f; valaddr_reg:x3; val_offset:756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 756*FLEN/8, x4, x1, x2) - -inst_253: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb680001f; valaddr_reg:x3; val_offset:759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 759*FLEN/8, x4, x1, x2) - -inst_254: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb680003f; valaddr_reg:x3; val_offset:762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 762*FLEN/8, x4, x1, x2) - -inst_255: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb680007f; valaddr_reg:x3; val_offset:765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 765*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_3) - -inst_256: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb68000ff; valaddr_reg:x3; val_offset:768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 768*FLEN/8, x4, x1, x2) - -inst_257: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb68001ff; valaddr_reg:x3; val_offset:771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 771*FLEN/8, x4, x1, x2) - -inst_258: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb68003ff; valaddr_reg:x3; val_offset:774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 774*FLEN/8, x4, x1, x2) - -inst_259: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb68007ff; valaddr_reg:x3; val_offset:777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 777*FLEN/8, x4, x1, x2) - -inst_260: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6800fff; valaddr_reg:x3; val_offset:780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 780*FLEN/8, x4, x1, x2) - -inst_261: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6801fff; valaddr_reg:x3; val_offset:783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 783*FLEN/8, x4, x1, x2) - -inst_262: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6803fff; valaddr_reg:x3; val_offset:786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 786*FLEN/8, x4, x1, x2) - -inst_263: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6807fff; valaddr_reg:x3; val_offset:789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 789*FLEN/8, x4, x1, x2) - -inst_264: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb680ffff; valaddr_reg:x3; val_offset:792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 792*FLEN/8, x4, x1, x2) - -inst_265: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb681ffff; valaddr_reg:x3; val_offset:795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 795*FLEN/8, x4, x1, x2) - -inst_266: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb683ffff; valaddr_reg:x3; val_offset:798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 798*FLEN/8, x4, x1, x2) - -inst_267: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb687ffff; valaddr_reg:x3; val_offset:801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 801*FLEN/8, x4, x1, x2) - -inst_268: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb68fffff; valaddr_reg:x3; val_offset:804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 804*FLEN/8, x4, x1, x2) - -inst_269: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb69fffff; valaddr_reg:x3; val_offset:807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 807*FLEN/8, x4, x1, x2) - -inst_270: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6bfffff; valaddr_reg:x3; val_offset:810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 810*FLEN/8, x4, x1, x2) - -inst_271: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6c00000; valaddr_reg:x3; val_offset:813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 813*FLEN/8, x4, x1, x2) - -inst_272: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6e00000; valaddr_reg:x3; val_offset:816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 816*FLEN/8, x4, x1, x2) - -inst_273: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6f00000; valaddr_reg:x3; val_offset:819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 819*FLEN/8, x4, x1, x2) - -inst_274: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6f80000; valaddr_reg:x3; val_offset:822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 822*FLEN/8, x4, x1, x2) - -inst_275: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fc0000; valaddr_reg:x3; val_offset:825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 825*FLEN/8, x4, x1, x2) - -inst_276: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fe0000; valaddr_reg:x3; val_offset:828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 828*FLEN/8, x4, x1, x2) - -inst_277: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ff0000; valaddr_reg:x3; val_offset:831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 831*FLEN/8, x4, x1, x2) - -inst_278: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ff8000; valaddr_reg:x3; val_offset:834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 834*FLEN/8, x4, x1, x2) - -inst_279: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ffc000; valaddr_reg:x3; val_offset:837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 837*FLEN/8, x4, x1, x2) - -inst_280: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ffe000; valaddr_reg:x3; val_offset:840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 840*FLEN/8, x4, x1, x2) - -inst_281: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fff000; valaddr_reg:x3; val_offset:843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 843*FLEN/8, x4, x1, x2) - -inst_282: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fff800; valaddr_reg:x3; val_offset:846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 846*FLEN/8, x4, x1, x2) - -inst_283: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fffc00; valaddr_reg:x3; val_offset:849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 849*FLEN/8, x4, x1, x2) - -inst_284: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fffe00; valaddr_reg:x3; val_offset:852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 852*FLEN/8, x4, x1, x2) - -inst_285: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ffff00; valaddr_reg:x3; val_offset:855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 855*FLEN/8, x4, x1, x2) - -inst_286: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ffff80; valaddr_reg:x3; val_offset:858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 858*FLEN/8, x4, x1, x2) - -inst_287: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ffffc0; valaddr_reg:x3; val_offset:861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 861*FLEN/8, x4, x1, x2) - -inst_288: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ffffe0; valaddr_reg:x3; val_offset:864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 864*FLEN/8, x4, x1, x2) - -inst_289: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fffff0; valaddr_reg:x3; val_offset:867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 867*FLEN/8, x4, x1, x2) - -inst_290: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fffff8; valaddr_reg:x3; val_offset:870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 870*FLEN/8, x4, x1, x2) - -inst_291: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fffffc; valaddr_reg:x3; val_offset:873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 873*FLEN/8, x4, x1, x2) - -inst_292: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6fffffe; valaddr_reg:x3; val_offset:876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 876*FLEN/8, x4, x1, x2) - -inst_293: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xb6ffffff; valaddr_reg:x3; val_offset:879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 879*FLEN/8, x4, x1, x2) - -inst_294: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbf800001; valaddr_reg:x3; val_offset:882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 882*FLEN/8, x4, x1, x2) - -inst_295: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbf800003; valaddr_reg:x3; val_offset:885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 885*FLEN/8, x4, x1, x2) - -inst_296: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbf800007; valaddr_reg:x3; val_offset:888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 888*FLEN/8, x4, x1, x2) - -inst_297: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbf999999; valaddr_reg:x3; val_offset:891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 891*FLEN/8, x4, x1, x2) - -inst_298: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 894*FLEN/8, x4, x1, x2) - -inst_299: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 897*FLEN/8, x4, x1, x2) - -inst_300: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 900*FLEN/8, x4, x1, x2) - -inst_301: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 903*FLEN/8, x4, x1, x2) - -inst_302: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 906*FLEN/8, x4, x1, x2) - -inst_303: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 909*FLEN/8, x4, x1, x2) - -inst_304: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 912*FLEN/8, x4, x1, x2) - -inst_305: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 915*FLEN/8, x4, x1, x2) - -inst_306: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 918*FLEN/8, x4, x1, x2) - -inst_307: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 921*FLEN/8, x4, x1, x2) - -inst_308: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 924*FLEN/8, x4, x1, x2) - -inst_309: -// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 927*FLEN/8, x4, x1, x2) - -inst_310: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb800000; valaddr_reg:x3; val_offset:930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 930*FLEN/8, x4, x1, x2) - -inst_311: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb800001; valaddr_reg:x3; val_offset:933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 933*FLEN/8, x4, x1, x2) - -inst_312: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb800003; valaddr_reg:x3; val_offset:936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 936*FLEN/8, x4, x1, x2) - -inst_313: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb800007; valaddr_reg:x3; val_offset:939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 939*FLEN/8, x4, x1, x2) - -inst_314: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb80000f; valaddr_reg:x3; val_offset:942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 942*FLEN/8, x4, x1, x2) - -inst_315: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb80001f; valaddr_reg:x3; val_offset:945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 945*FLEN/8, x4, x1, x2) - -inst_316: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb80003f; valaddr_reg:x3; val_offset:948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 948*FLEN/8, x4, x1, x2) - -inst_317: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb80007f; valaddr_reg:x3; val_offset:951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 951*FLEN/8, x4, x1, x2) - -inst_318: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb8000ff; valaddr_reg:x3; val_offset:954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 954*FLEN/8, x4, x1, x2) - -inst_319: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb8001ff; valaddr_reg:x3; val_offset:957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 957*FLEN/8, x4, x1, x2) - -inst_320: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb8003ff; valaddr_reg:x3; val_offset:960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 960*FLEN/8, x4, x1, x2) - -inst_321: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb8007ff; valaddr_reg:x3; val_offset:963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 963*FLEN/8, x4, x1, x2) - -inst_322: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb800fff; valaddr_reg:x3; val_offset:966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 966*FLEN/8, x4, x1, x2) - -inst_323: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb801fff; valaddr_reg:x3; val_offset:969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 969*FLEN/8, x4, x1, x2) - -inst_324: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb803fff; valaddr_reg:x3; val_offset:972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 972*FLEN/8, x4, x1, x2) - -inst_325: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb807fff; valaddr_reg:x3; val_offset:975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 975*FLEN/8, x4, x1, x2) - -inst_326: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb80ffff; valaddr_reg:x3; val_offset:978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 978*FLEN/8, x4, x1, x2) - -inst_327: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb81ffff; valaddr_reg:x3; val_offset:981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 981*FLEN/8, x4, x1, x2) - -inst_328: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb83ffff; valaddr_reg:x3; val_offset:984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 984*FLEN/8, x4, x1, x2) - -inst_329: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb87ffff; valaddr_reg:x3; val_offset:987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 987*FLEN/8, x4, x1, x2) - -inst_330: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb8fffff; valaddr_reg:x3; val_offset:990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 990*FLEN/8, x4, x1, x2) - -inst_331: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xeb9fffff; valaddr_reg:x3; val_offset:993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 993*FLEN/8, x4, x1, x2) - -inst_332: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebbfffff; valaddr_reg:x3; val_offset:996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 996*FLEN/8, x4, x1, x2) - -inst_333: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebc00000; valaddr_reg:x3; val_offset:999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 999*FLEN/8, x4, x1, x2) - -inst_334: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebe00000; valaddr_reg:x3; val_offset:1002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1002*FLEN/8, x4, x1, x2) - -inst_335: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebf00000; valaddr_reg:x3; val_offset:1005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1005*FLEN/8, x4, x1, x2) - -inst_336: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebf80000; valaddr_reg:x3; val_offset:1008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1008*FLEN/8, x4, x1, x2) - -inst_337: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfc0000; valaddr_reg:x3; val_offset:1011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1011*FLEN/8, x4, x1, x2) - -inst_338: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfe0000; valaddr_reg:x3; val_offset:1014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1014*FLEN/8, x4, x1, x2) - -inst_339: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebff0000; valaddr_reg:x3; val_offset:1017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1017*FLEN/8, x4, x1, x2) - -inst_340: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebff8000; valaddr_reg:x3; val_offset:1020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1020*FLEN/8, x4, x1, x2) - -inst_341: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebffc000; valaddr_reg:x3; val_offset:1023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1023*FLEN/8, x4, x1, x2) - -inst_342: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebffe000; valaddr_reg:x3; val_offset:1026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1026*FLEN/8, x4, x1, x2) - -inst_343: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfff000; valaddr_reg:x3; val_offset:1029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1029*FLEN/8, x4, x1, x2) - -inst_344: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfff800; valaddr_reg:x3; val_offset:1032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1032*FLEN/8, x4, x1, x2) - -inst_345: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfffc00; valaddr_reg:x3; val_offset:1035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1035*FLEN/8, x4, x1, x2) - -inst_346: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfffe00; valaddr_reg:x3; val_offset:1038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1038*FLEN/8, x4, x1, x2) - -inst_347: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebffff00; valaddr_reg:x3; val_offset:1041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1041*FLEN/8, x4, x1, x2) - -inst_348: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebffff80; valaddr_reg:x3; val_offset:1044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1044*FLEN/8, x4, x1, x2) - -inst_349: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebffffc0; valaddr_reg:x3; val_offset:1047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1047*FLEN/8, x4, x1, x2) - -inst_350: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebffffe0; valaddr_reg:x3; val_offset:1050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1050*FLEN/8, x4, x1, x2) - -inst_351: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfffff0; valaddr_reg:x3; val_offset:1053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1053*FLEN/8, x4, x1, x2) - -inst_352: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfffff8; valaddr_reg:x3; val_offset:1056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1056*FLEN/8, x4, x1, x2) - -inst_353: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfffffc; valaddr_reg:x3; val_offset:1059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1059*FLEN/8, x4, x1, x2) - -inst_354: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebfffffe; valaddr_reg:x3; val_offset:1062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1062*FLEN/8, x4, x1, x2) - -inst_355: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xebffffff; valaddr_reg:x3; val_offset:1065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1065*FLEN/8, x4, x1, x2) - -inst_356: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff000001; valaddr_reg:x3; val_offset:1068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1068*FLEN/8, x4, x1, x2) - -inst_357: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff000003; valaddr_reg:x3; val_offset:1071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1071*FLEN/8, x4, x1, x2) - -inst_358: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff000007; valaddr_reg:x3; val_offset:1074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1074*FLEN/8, x4, x1, x2) - -inst_359: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff199999; valaddr_reg:x3; val_offset:1077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1077*FLEN/8, x4, x1, x2) - -inst_360: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff249249; valaddr_reg:x3; val_offset:1080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1080*FLEN/8, x4, x1, x2) - -inst_361: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff333333; valaddr_reg:x3; val_offset:1083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1083*FLEN/8, x4, x1, x2) - -inst_362: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:1086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1086*FLEN/8, x4, x1, x2) - -inst_363: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:1089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1089*FLEN/8, x4, x1, x2) - -inst_364: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff444444; valaddr_reg:x3; val_offset:1092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1092*FLEN/8, x4, x1, x2) - -inst_365: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:1095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1095*FLEN/8, x4, x1, x2) - -inst_366: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:1098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1098*FLEN/8, x4, x1, x2) - -inst_367: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff666666; valaddr_reg:x3; val_offset:1101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1101*FLEN/8, x4, x1, x2) - -inst_368: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:1104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1104*FLEN/8, x4, x1, x2) - -inst_369: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:1107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1107*FLEN/8, x4, x1, x2) - -inst_370: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:1110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1110*FLEN/8, x4, x1, x2) - -inst_371: -// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:1113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1113*FLEN/8, x4, x1, x2) - -inst_372: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3f800001; valaddr_reg:x3; val_offset:1116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1116*FLEN/8, x4, x1, x2) - -inst_373: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3f800003; valaddr_reg:x3; val_offset:1119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1119*FLEN/8, x4, x1, x2) - -inst_374: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3f800007; valaddr_reg:x3; val_offset:1122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1122*FLEN/8, x4, x1, x2) - -inst_375: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3f999999; valaddr_reg:x3; val_offset:1125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1125*FLEN/8, x4, x1, x2) - -inst_376: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:1128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1128*FLEN/8, x4, x1, x2) - -inst_377: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:1131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1131*FLEN/8, x4, x1, x2) - -inst_378: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:1134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1134*FLEN/8, x4, x1, x2) - -inst_379: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:1137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1137*FLEN/8, x4, x1, x2) - -inst_380: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:1140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1140*FLEN/8, x4, x1, x2) - -inst_381: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:1143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1143*FLEN/8, x4, x1, x2) - -inst_382: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:1146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1146*FLEN/8, x4, x1, x2) - -inst_383: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:1149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1149*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_4) - -inst_384: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:1152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1152*FLEN/8, x4, x1, x2) - -inst_385: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:1155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1155*FLEN/8, x4, x1, x2) - -inst_386: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:1158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1158*FLEN/8, x4, x1, x2) - -inst_387: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:1161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1161*FLEN/8, x4, x1, x2) - -inst_388: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49800000; valaddr_reg:x3; val_offset:1164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1164*FLEN/8, x4, x1, x2) - -inst_389: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49800001; valaddr_reg:x3; val_offset:1167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1167*FLEN/8, x4, x1, x2) - -inst_390: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49800003; valaddr_reg:x3; val_offset:1170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1170*FLEN/8, x4, x1, x2) - -inst_391: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49800007; valaddr_reg:x3; val_offset:1173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1173*FLEN/8, x4, x1, x2) - -inst_392: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x4980000f; valaddr_reg:x3; val_offset:1176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1176*FLEN/8, x4, x1, x2) - -inst_393: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x4980001f; valaddr_reg:x3; val_offset:1179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1179*FLEN/8, x4, x1, x2) - -inst_394: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x4980003f; valaddr_reg:x3; val_offset:1182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1182*FLEN/8, x4, x1, x2) - -inst_395: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x4980007f; valaddr_reg:x3; val_offset:1185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1185*FLEN/8, x4, x1, x2) - -inst_396: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x498000ff; valaddr_reg:x3; val_offset:1188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1188*FLEN/8, x4, x1, x2) - -inst_397: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x498001ff; valaddr_reg:x3; val_offset:1191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1191*FLEN/8, x4, x1, x2) - -inst_398: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x498003ff; valaddr_reg:x3; val_offset:1194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1194*FLEN/8, x4, x1, x2) - -inst_399: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x498007ff; valaddr_reg:x3; val_offset:1197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1197*FLEN/8, x4, x1, x2) - -inst_400: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49800fff; valaddr_reg:x3; val_offset:1200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1200*FLEN/8, x4, x1, x2) - -inst_401: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49801fff; valaddr_reg:x3; val_offset:1203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1203*FLEN/8, x4, x1, x2) - -inst_402: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49803fff; valaddr_reg:x3; val_offset:1206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1206*FLEN/8, x4, x1, x2) - -inst_403: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49807fff; valaddr_reg:x3; val_offset:1209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1209*FLEN/8, x4, x1, x2) - -inst_404: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x4980ffff; valaddr_reg:x3; val_offset:1212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1212*FLEN/8, x4, x1, x2) - -inst_405: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x4981ffff; valaddr_reg:x3; val_offset:1215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1215*FLEN/8, x4, x1, x2) - -inst_406: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x4983ffff; valaddr_reg:x3; val_offset:1218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1218*FLEN/8, x4, x1, x2) - -inst_407: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x4987ffff; valaddr_reg:x3; val_offset:1221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1221*FLEN/8, x4, x1, x2) - -inst_408: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x498fffff; valaddr_reg:x3; val_offset:1224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1224*FLEN/8, x4, x1, x2) - -inst_409: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x499fffff; valaddr_reg:x3; val_offset:1227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1227*FLEN/8, x4, x1, x2) - -inst_410: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49bfffff; valaddr_reg:x3; val_offset:1230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1230*FLEN/8, x4, x1, x2) - -inst_411: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49c00000; valaddr_reg:x3; val_offset:1233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1233*FLEN/8, x4, x1, x2) - -inst_412: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49e00000; valaddr_reg:x3; val_offset:1236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1236*FLEN/8, x4, x1, x2) - -inst_413: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49f00000; valaddr_reg:x3; val_offset:1239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1239*FLEN/8, x4, x1, x2) - -inst_414: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49f80000; valaddr_reg:x3; val_offset:1242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1242*FLEN/8, x4, x1, x2) - -inst_415: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fc0000; valaddr_reg:x3; val_offset:1245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1245*FLEN/8, x4, x1, x2) - -inst_416: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fe0000; valaddr_reg:x3; val_offset:1248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1248*FLEN/8, x4, x1, x2) - -inst_417: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ff0000; valaddr_reg:x3; val_offset:1251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1251*FLEN/8, x4, x1, x2) - -inst_418: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ff8000; valaddr_reg:x3; val_offset:1254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1254*FLEN/8, x4, x1, x2) - -inst_419: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ffc000; valaddr_reg:x3; val_offset:1257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1257*FLEN/8, x4, x1, x2) - -inst_420: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ffe000; valaddr_reg:x3; val_offset:1260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1260*FLEN/8, x4, x1, x2) - -inst_421: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fff000; valaddr_reg:x3; val_offset:1263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1263*FLEN/8, x4, x1, x2) - -inst_422: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fff800; valaddr_reg:x3; val_offset:1266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1266*FLEN/8, x4, x1, x2) - -inst_423: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fffc00; valaddr_reg:x3; val_offset:1269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1269*FLEN/8, x4, x1, x2) - -inst_424: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fffe00; valaddr_reg:x3; val_offset:1272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1272*FLEN/8, x4, x1, x2) - -inst_425: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ffff00; valaddr_reg:x3; val_offset:1275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1275*FLEN/8, x4, x1, x2) - -inst_426: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ffff80; valaddr_reg:x3; val_offset:1278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1278*FLEN/8, x4, x1, x2) - -inst_427: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ffffc0; valaddr_reg:x3; val_offset:1281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1281*FLEN/8, x4, x1, x2) - -inst_428: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ffffe0; valaddr_reg:x3; val_offset:1284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1284*FLEN/8, x4, x1, x2) - -inst_429: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fffff0; valaddr_reg:x3; val_offset:1287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1287*FLEN/8, x4, x1, x2) - -inst_430: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fffff8; valaddr_reg:x3; val_offset:1290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1290*FLEN/8, x4, x1, x2) - -inst_431: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fffffc; valaddr_reg:x3; val_offset:1293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1293*FLEN/8, x4, x1, x2) - -inst_432: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49fffffe; valaddr_reg:x3; val_offset:1296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1296*FLEN/8, x4, x1, x2) - -inst_433: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; -op3val:0x49ffffff; valaddr_reg:x3; val_offset:1299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1299*FLEN/8, x4, x1, x2) - -inst_434: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7000000; valaddr_reg:x3; val_offset:1302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1302*FLEN/8, x4, x1, x2) - -inst_435: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7000001; valaddr_reg:x3; val_offset:1305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1305*FLEN/8, x4, x1, x2) - -inst_436: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7000003; valaddr_reg:x3; val_offset:1308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1308*FLEN/8, x4, x1, x2) - -inst_437: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7000007; valaddr_reg:x3; val_offset:1311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1311*FLEN/8, x4, x1, x2) - -inst_438: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb700000f; valaddr_reg:x3; val_offset:1314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1314*FLEN/8, x4, x1, x2) - -inst_439: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb700001f; valaddr_reg:x3; val_offset:1317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1317*FLEN/8, x4, x1, x2) - -inst_440: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb700003f; valaddr_reg:x3; val_offset:1320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1320*FLEN/8, x4, x1, x2) - -inst_441: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb700007f; valaddr_reg:x3; val_offset:1323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1323*FLEN/8, x4, x1, x2) - -inst_442: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb70000ff; valaddr_reg:x3; val_offset:1326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1326*FLEN/8, x4, x1, x2) - -inst_443: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb70001ff; valaddr_reg:x3; val_offset:1329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1329*FLEN/8, x4, x1, x2) - -inst_444: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb70003ff; valaddr_reg:x3; val_offset:1332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1332*FLEN/8, x4, x1, x2) - -inst_445: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb70007ff; valaddr_reg:x3; val_offset:1335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1335*FLEN/8, x4, x1, x2) - -inst_446: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7000fff; valaddr_reg:x3; val_offset:1338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1338*FLEN/8, x4, x1, x2) - -inst_447: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7001fff; valaddr_reg:x3; val_offset:1341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1341*FLEN/8, x4, x1, x2) - -inst_448: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7003fff; valaddr_reg:x3; val_offset:1344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1344*FLEN/8, x4, x1, x2) - -inst_449: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7007fff; valaddr_reg:x3; val_offset:1347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1347*FLEN/8, x4, x1, x2) - -inst_450: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb700ffff; valaddr_reg:x3; val_offset:1350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1350*FLEN/8, x4, x1, x2) - -inst_451: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb701ffff; valaddr_reg:x3; val_offset:1353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1353*FLEN/8, x4, x1, x2) - -inst_452: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb703ffff; valaddr_reg:x3; val_offset:1356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1356*FLEN/8, x4, x1, x2) - -inst_453: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb707ffff; valaddr_reg:x3; val_offset:1359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1359*FLEN/8, x4, x1, x2) - -inst_454: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb70fffff; valaddr_reg:x3; val_offset:1362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1362*FLEN/8, x4, x1, x2) - -inst_455: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb71fffff; valaddr_reg:x3; val_offset:1365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1365*FLEN/8, x4, x1, x2) - -inst_456: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb73fffff; valaddr_reg:x3; val_offset:1368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1368*FLEN/8, x4, x1, x2) - -inst_457: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7400000; valaddr_reg:x3; val_offset:1371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1371*FLEN/8, x4, x1, x2) - -inst_458: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7600000; valaddr_reg:x3; val_offset:1374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1374*FLEN/8, x4, x1, x2) - -inst_459: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7700000; valaddr_reg:x3; val_offset:1377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1377*FLEN/8, x4, x1, x2) - -inst_460: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb7780000; valaddr_reg:x3; val_offset:1380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1380*FLEN/8, x4, x1, x2) - -inst_461: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77c0000; valaddr_reg:x3; val_offset:1383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1383*FLEN/8, x4, x1, x2) - -inst_462: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77e0000; valaddr_reg:x3; val_offset:1386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1386*FLEN/8, x4, x1, x2) - -inst_463: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77f0000; valaddr_reg:x3; val_offset:1389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1389*FLEN/8, x4, x1, x2) - -inst_464: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77f8000; valaddr_reg:x3; val_offset:1392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1392*FLEN/8, x4, x1, x2) - -inst_465: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77fc000; valaddr_reg:x3; val_offset:1395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1395*FLEN/8, x4, x1, x2) - -inst_466: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77fe000; valaddr_reg:x3; val_offset:1398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1398*FLEN/8, x4, x1, x2) - -inst_467: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77ff000; valaddr_reg:x3; val_offset:1401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1401*FLEN/8, x4, x1, x2) - -inst_468: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77ff800; valaddr_reg:x3; val_offset:1404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1404*FLEN/8, x4, x1, x2) - -inst_469: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77ffc00; valaddr_reg:x3; val_offset:1407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1407*FLEN/8, x4, x1, x2) - -inst_470: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77ffe00; valaddr_reg:x3; val_offset:1410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1410*FLEN/8, x4, x1, x2) - -inst_471: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77fff00; valaddr_reg:x3; val_offset:1413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1413*FLEN/8, x4, x1, x2) - -inst_472: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77fff80; valaddr_reg:x3; val_offset:1416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1416*FLEN/8, x4, x1, x2) - -inst_473: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77fffc0; valaddr_reg:x3; val_offset:1419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1419*FLEN/8, x4, x1, x2) - -inst_474: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77fffe0; valaddr_reg:x3; val_offset:1422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1422*FLEN/8, x4, x1, x2) - -inst_475: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77ffff0; valaddr_reg:x3; val_offset:1425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1425*FLEN/8, x4, x1, x2) - -inst_476: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77ffff8; valaddr_reg:x3; val_offset:1428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1428*FLEN/8, x4, x1, x2) - -inst_477: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77ffffc; valaddr_reg:x3; val_offset:1431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1431*FLEN/8, x4, x1, x2) - -inst_478: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77ffffe; valaddr_reg:x3; val_offset:1434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1434*FLEN/8, x4, x1, x2) - -inst_479: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xb77fffff; valaddr_reg:x3; val_offset:1437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1437*FLEN/8, x4, x1, x2) - -inst_480: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbf800001; valaddr_reg:x3; val_offset:1440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1440*FLEN/8, x4, x1, x2) - -inst_481: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbf800003; valaddr_reg:x3; val_offset:1443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1443*FLEN/8, x4, x1, x2) - -inst_482: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbf800007; valaddr_reg:x3; val_offset:1446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1446*FLEN/8, x4, x1, x2) - -inst_483: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbf999999; valaddr_reg:x3; val_offset:1449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1449*FLEN/8, x4, x1, x2) - -inst_484: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:1452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1452*FLEN/8, x4, x1, x2) - -inst_485: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:1455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1455*FLEN/8, x4, x1, x2) - -inst_486: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:1458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1458*FLEN/8, x4, x1, x2) - -inst_487: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:1461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1461*FLEN/8, x4, x1, x2) - -inst_488: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:1464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1464*FLEN/8, x4, x1, x2) - -inst_489: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:1467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1467*FLEN/8, x4, x1, x2) - -inst_490: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:1470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1470*FLEN/8, x4, x1, x2) - -inst_491: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:1473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1473*FLEN/8, x4, x1, x2) - -inst_492: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:1476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1476*FLEN/8, x4, x1, x2) - -inst_493: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:1479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1479*FLEN/8, x4, x1, x2) - -inst_494: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:1482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1482*FLEN/8, x4, x1, x2) - -inst_495: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:1485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1485*FLEN/8, x4, x1, x2) - -inst_496: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5000000; valaddr_reg:x3; val_offset:1488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1488*FLEN/8, x4, x1, x2) - -inst_497: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5000001; valaddr_reg:x3; val_offset:1491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1491*FLEN/8, x4, x1, x2) - -inst_498: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5000003; valaddr_reg:x3; val_offset:1494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1494*FLEN/8, x4, x1, x2) - -inst_499: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5000007; valaddr_reg:x3; val_offset:1497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1497*FLEN/8, x4, x1, x2) - -inst_500: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb500000f; valaddr_reg:x3; val_offset:1500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1500*FLEN/8, x4, x1, x2) - -inst_501: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb500001f; valaddr_reg:x3; val_offset:1503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1503*FLEN/8, x4, x1, x2) - -inst_502: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb500003f; valaddr_reg:x3; val_offset:1506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1506*FLEN/8, x4, x1, x2) - -inst_503: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb500007f; valaddr_reg:x3; val_offset:1509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1509*FLEN/8, x4, x1, x2) - -inst_504: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb50000ff; valaddr_reg:x3; val_offset:1512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1512*FLEN/8, x4, x1, x2) - -inst_505: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb50001ff; valaddr_reg:x3; val_offset:1515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1515*FLEN/8, x4, x1, x2) - -inst_506: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb50003ff; valaddr_reg:x3; val_offset:1518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1518*FLEN/8, x4, x1, x2) - -inst_507: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb50007ff; valaddr_reg:x3; val_offset:1521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1521*FLEN/8, x4, x1, x2) - -inst_508: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5000fff; valaddr_reg:x3; val_offset:1524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1524*FLEN/8, x4, x1, x2) - -inst_509: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5001fff; valaddr_reg:x3; val_offset:1527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1527*FLEN/8, x4, x1, x2) - -inst_510: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5003fff; valaddr_reg:x3; val_offset:1530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1530*FLEN/8, x4, x1, x2) - -inst_511: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5007fff; valaddr_reg:x3; val_offset:1533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1533*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_5) - -inst_512: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb500ffff; valaddr_reg:x3; val_offset:1536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1536*FLEN/8, x4, x1, x2) - -inst_513: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb501ffff; valaddr_reg:x3; val_offset:1539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1539*FLEN/8, x4, x1, x2) - -inst_514: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb503ffff; valaddr_reg:x3; val_offset:1542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1542*FLEN/8, x4, x1, x2) - -inst_515: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb507ffff; valaddr_reg:x3; val_offset:1545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1545*FLEN/8, x4, x1, x2) - -inst_516: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb50fffff; valaddr_reg:x3; val_offset:1548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1548*FLEN/8, x4, x1, x2) - -inst_517: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb51fffff; valaddr_reg:x3; val_offset:1551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1551*FLEN/8, x4, x1, x2) - -inst_518: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb53fffff; valaddr_reg:x3; val_offset:1554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1554*FLEN/8, x4, x1, x2) - -inst_519: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5400000; valaddr_reg:x3; val_offset:1557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1557*FLEN/8, x4, x1, x2) - -inst_520: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5600000; valaddr_reg:x3; val_offset:1560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1560*FLEN/8, x4, x1, x2) - -inst_521: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5700000; valaddr_reg:x3; val_offset:1563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1563*FLEN/8, x4, x1, x2) - -inst_522: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb5780000; valaddr_reg:x3; val_offset:1566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1566*FLEN/8, x4, x1, x2) - -inst_523: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57c0000; valaddr_reg:x3; val_offset:1569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1569*FLEN/8, x4, x1, x2) - -inst_524: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57e0000; valaddr_reg:x3; val_offset:1572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1572*FLEN/8, x4, x1, x2) - -inst_525: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57f0000; valaddr_reg:x3; val_offset:1575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1575*FLEN/8, x4, x1, x2) - -inst_526: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57f8000; valaddr_reg:x3; val_offset:1578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1578*FLEN/8, x4, x1, x2) - -inst_527: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57fc000; valaddr_reg:x3; val_offset:1581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1581*FLEN/8, x4, x1, x2) - -inst_528: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57fe000; valaddr_reg:x3; val_offset:1584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1584*FLEN/8, x4, x1, x2) - -inst_529: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57ff000; valaddr_reg:x3; val_offset:1587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1587*FLEN/8, x4, x1, x2) - -inst_530: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57ff800; valaddr_reg:x3; val_offset:1590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1590*FLEN/8, x4, x1, x2) - -inst_531: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57ffc00; valaddr_reg:x3; val_offset:1593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1593*FLEN/8, x4, x1, x2) - -inst_532: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57ffe00; valaddr_reg:x3; val_offset:1596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1596*FLEN/8, x4, x1, x2) - -inst_533: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57fff00; valaddr_reg:x3; val_offset:1599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1599*FLEN/8, x4, x1, x2) - -inst_534: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57fff80; valaddr_reg:x3; val_offset:1602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1602*FLEN/8, x4, x1, x2) - -inst_535: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57fffc0; valaddr_reg:x3; val_offset:1605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1605*FLEN/8, x4, x1, x2) - -inst_536: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57fffe0; valaddr_reg:x3; val_offset:1608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1608*FLEN/8, x4, x1, x2) - -inst_537: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57ffff0; valaddr_reg:x3; val_offset:1611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1611*FLEN/8, x4, x1, x2) - -inst_538: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57ffff8; valaddr_reg:x3; val_offset:1614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1614*FLEN/8, x4, x1, x2) - -inst_539: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57ffffc; valaddr_reg:x3; val_offset:1617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1617*FLEN/8, x4, x1, x2) - -inst_540: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57ffffe; valaddr_reg:x3; val_offset:1620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1620*FLEN/8, x4, x1, x2) - -inst_541: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xb57fffff; valaddr_reg:x3; val_offset:1623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1623*FLEN/8, x4, x1, x2) - -inst_542: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbf800001; valaddr_reg:x3; val_offset:1626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1626*FLEN/8, x4, x1, x2) - -inst_543: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbf800003; valaddr_reg:x3; val_offset:1629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1629*FLEN/8, x4, x1, x2) - -inst_544: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbf800007; valaddr_reg:x3; val_offset:1632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1632*FLEN/8, x4, x1, x2) - -inst_545: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbf999999; valaddr_reg:x3; val_offset:1635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1635*FLEN/8, x4, x1, x2) - -inst_546: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:1638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1638*FLEN/8, x4, x1, x2) - -inst_547: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:1641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1641*FLEN/8, x4, x1, x2) - -inst_548: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:1644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1644*FLEN/8, x4, x1, x2) - -inst_549: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:1647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1647*FLEN/8, x4, x1, x2) - -inst_550: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:1650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1650*FLEN/8, x4, x1, x2) - -inst_551: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:1653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1653*FLEN/8, x4, x1, x2) - -inst_552: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:1656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1656*FLEN/8, x4, x1, x2) - -inst_553: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:1659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1659*FLEN/8, x4, x1, x2) - -inst_554: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:1662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1662*FLEN/8, x4, x1, x2) - -inst_555: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:1665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1665*FLEN/8, x4, x1, x2) - -inst_556: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:1668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1668*FLEN/8, x4, x1, x2) - -inst_557: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:1671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1671*FLEN/8, x4, x1, x2) - -inst_558: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:1674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1674*FLEN/8, x4, x1, x2) - -inst_559: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:1677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1677*FLEN/8, x4, x1, x2) - -inst_560: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:1680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1680*FLEN/8, x4, x1, x2) - -inst_561: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:1683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1683*FLEN/8, x4, x1, x2) - -inst_562: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:1686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1686*FLEN/8, x4, x1, x2) - -inst_563: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:1689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1689*FLEN/8, x4, x1, x2) - -inst_564: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:1692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1692*FLEN/8, x4, x1, x2) - -inst_565: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:1695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1695*FLEN/8, x4, x1, x2) - -inst_566: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:1698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1698*FLEN/8, x4, x1, x2) - -inst_567: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:1701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1701*FLEN/8, x4, x1, x2) - -inst_568: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:1704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1704*FLEN/8, x4, x1, x2) - -inst_569: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:1707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1707*FLEN/8, x4, x1, x2) - -inst_570: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:1710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1710*FLEN/8, x4, x1, x2) - -inst_571: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:1713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1713*FLEN/8, x4, x1, x2) - -inst_572: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:1716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1716*FLEN/8, x4, x1, x2) - -inst_573: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:1719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1719*FLEN/8, x4, x1, x2) - -inst_574: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd800000; valaddr_reg:x3; val_offset:1722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1722*FLEN/8, x4, x1, x2) - -inst_575: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd800001; valaddr_reg:x3; val_offset:1725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1725*FLEN/8, x4, x1, x2) - -inst_576: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd800003; valaddr_reg:x3; val_offset:1728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1728*FLEN/8, x4, x1, x2) - -inst_577: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd800007; valaddr_reg:x3; val_offset:1731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1731*FLEN/8, x4, x1, x2) - -inst_578: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd80000f; valaddr_reg:x3; val_offset:1734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1734*FLEN/8, x4, x1, x2) - -inst_579: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd80001f; valaddr_reg:x3; val_offset:1737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1737*FLEN/8, x4, x1, x2) - -inst_580: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd80003f; valaddr_reg:x3; val_offset:1740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1740*FLEN/8, x4, x1, x2) - -inst_581: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd80007f; valaddr_reg:x3; val_offset:1743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1743*FLEN/8, x4, x1, x2) - -inst_582: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd8000ff; valaddr_reg:x3; val_offset:1746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1746*FLEN/8, x4, x1, x2) - -inst_583: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd8001ff; valaddr_reg:x3; val_offset:1749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1749*FLEN/8, x4, x1, x2) - -inst_584: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd8003ff; valaddr_reg:x3; val_offset:1752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1752*FLEN/8, x4, x1, x2) - -inst_585: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd8007ff; valaddr_reg:x3; val_offset:1755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1755*FLEN/8, x4, x1, x2) - -inst_586: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd800fff; valaddr_reg:x3; val_offset:1758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1758*FLEN/8, x4, x1, x2) - -inst_587: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd801fff; valaddr_reg:x3; val_offset:1761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1761*FLEN/8, x4, x1, x2) - -inst_588: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd803fff; valaddr_reg:x3; val_offset:1764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1764*FLEN/8, x4, x1, x2) - -inst_589: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd807fff; valaddr_reg:x3; val_offset:1767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1767*FLEN/8, x4, x1, x2) - -inst_590: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd80ffff; valaddr_reg:x3; val_offset:1770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1770*FLEN/8, x4, x1, x2) - -inst_591: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd81ffff; valaddr_reg:x3; val_offset:1773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1773*FLEN/8, x4, x1, x2) - -inst_592: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd83ffff; valaddr_reg:x3; val_offset:1776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1776*FLEN/8, x4, x1, x2) - -inst_593: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd87ffff; valaddr_reg:x3; val_offset:1779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1779*FLEN/8, x4, x1, x2) - -inst_594: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd8fffff; valaddr_reg:x3; val_offset:1782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1782*FLEN/8, x4, x1, x2) - -inst_595: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xd9fffff; valaddr_reg:x3; val_offset:1785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1785*FLEN/8, x4, x1, x2) - -inst_596: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdbfffff; valaddr_reg:x3; val_offset:1788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1788*FLEN/8, x4, x1, x2) - -inst_597: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdc00000; valaddr_reg:x3; val_offset:1791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1791*FLEN/8, x4, x1, x2) - -inst_598: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xde00000; valaddr_reg:x3; val_offset:1794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1794*FLEN/8, x4, x1, x2) - -inst_599: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdf00000; valaddr_reg:x3; val_offset:1797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1797*FLEN/8, x4, x1, x2) - -inst_600: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdf80000; valaddr_reg:x3; val_offset:1800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1800*FLEN/8, x4, x1, x2) - -inst_601: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfc0000; valaddr_reg:x3; val_offset:1803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1803*FLEN/8, x4, x1, x2) - -inst_602: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfe0000; valaddr_reg:x3; val_offset:1806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1806*FLEN/8, x4, x1, x2) - -inst_603: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdff0000; valaddr_reg:x3; val_offset:1809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1809*FLEN/8, x4, x1, x2) - -inst_604: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdff8000; valaddr_reg:x3; val_offset:1812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1812*FLEN/8, x4, x1, x2) - -inst_605: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdffc000; valaddr_reg:x3; val_offset:1815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1815*FLEN/8, x4, x1, x2) - -inst_606: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdffe000; valaddr_reg:x3; val_offset:1818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1818*FLEN/8, x4, x1, x2) - -inst_607: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfff000; valaddr_reg:x3; val_offset:1821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1821*FLEN/8, x4, x1, x2) - -inst_608: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfff800; valaddr_reg:x3; val_offset:1824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1824*FLEN/8, x4, x1, x2) - -inst_609: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfffc00; valaddr_reg:x3; val_offset:1827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1827*FLEN/8, x4, x1, x2) - -inst_610: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfffe00; valaddr_reg:x3; val_offset:1830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1830*FLEN/8, x4, x1, x2) - -inst_611: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdffff00; valaddr_reg:x3; val_offset:1833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1833*FLEN/8, x4, x1, x2) - -inst_612: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdffff80; valaddr_reg:x3; val_offset:1836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1836*FLEN/8, x4, x1, x2) - -inst_613: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdffffc0; valaddr_reg:x3; val_offset:1839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1839*FLEN/8, x4, x1, x2) - -inst_614: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdffffe0; valaddr_reg:x3; val_offset:1842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1842*FLEN/8, x4, x1, x2) - -inst_615: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfffff0; valaddr_reg:x3; val_offset:1845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1845*FLEN/8, x4, x1, x2) - -inst_616: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfffff8; valaddr_reg:x3; val_offset:1848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1848*FLEN/8, x4, x1, x2) - -inst_617: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfffffc; valaddr_reg:x3; val_offset:1851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1851*FLEN/8, x4, x1, x2) - -inst_618: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdfffffe; valaddr_reg:x3; val_offset:1854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1854*FLEN/8, x4, x1, x2) - -inst_619: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; -op3val:0xdffffff; valaddr_reg:x3; val_offset:1857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1857*FLEN/8, x4, x1, x2) - -inst_620: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d000000; valaddr_reg:x3; val_offset:1860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1860*FLEN/8, x4, x1, x2) - -inst_621: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d000001; valaddr_reg:x3; val_offset:1863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1863*FLEN/8, x4, x1, x2) - -inst_622: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d000003; valaddr_reg:x3; val_offset:1866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1866*FLEN/8, x4, x1, x2) - -inst_623: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d000007; valaddr_reg:x3; val_offset:1869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1869*FLEN/8, x4, x1, x2) - -inst_624: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d00000f; valaddr_reg:x3; val_offset:1872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1872*FLEN/8, x4, x1, x2) - -inst_625: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d00001f; valaddr_reg:x3; val_offset:1875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1875*FLEN/8, x4, x1, x2) - -inst_626: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d00003f; valaddr_reg:x3; val_offset:1878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1878*FLEN/8, x4, x1, x2) - -inst_627: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d00007f; valaddr_reg:x3; val_offset:1881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1881*FLEN/8, x4, x1, x2) - -inst_628: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d0000ff; valaddr_reg:x3; val_offset:1884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1884*FLEN/8, x4, x1, x2) - -inst_629: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d0001ff; valaddr_reg:x3; val_offset:1887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1887*FLEN/8, x4, x1, x2) - -inst_630: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d0003ff; valaddr_reg:x3; val_offset:1890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1890*FLEN/8, x4, x1, x2) - -inst_631: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d0007ff; valaddr_reg:x3; val_offset:1893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1893*FLEN/8, x4, x1, x2) - -inst_632: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d000fff; valaddr_reg:x3; val_offset:1896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1896*FLEN/8, x4, x1, x2) - -inst_633: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d001fff; valaddr_reg:x3; val_offset:1899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1899*FLEN/8, x4, x1, x2) - -inst_634: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d003fff; valaddr_reg:x3; val_offset:1902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1902*FLEN/8, x4, x1, x2) - -inst_635: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d007fff; valaddr_reg:x3; val_offset:1905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1905*FLEN/8, x4, x1, x2) - -inst_636: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d00ffff; valaddr_reg:x3; val_offset:1908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1908*FLEN/8, x4, x1, x2) - -inst_637: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d01ffff; valaddr_reg:x3; val_offset:1911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1911*FLEN/8, x4, x1, x2) - -inst_638: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d03ffff; valaddr_reg:x3; val_offset:1914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1914*FLEN/8, x4, x1, x2) - -inst_639: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d07ffff; valaddr_reg:x3; val_offset:1917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1917*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_6) - -inst_640: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d0fffff; valaddr_reg:x3; val_offset:1920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1920*FLEN/8, x4, x1, x2) - -inst_641: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d1fffff; valaddr_reg:x3; val_offset:1923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1923*FLEN/8, x4, x1, x2) - -inst_642: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d3fffff; valaddr_reg:x3; val_offset:1926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1926*FLEN/8, x4, x1, x2) - -inst_643: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d400000; valaddr_reg:x3; val_offset:1929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1929*FLEN/8, x4, x1, x2) - -inst_644: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d600000; valaddr_reg:x3; val_offset:1932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1932*FLEN/8, x4, x1, x2) - -inst_645: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d700000; valaddr_reg:x3; val_offset:1935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1935*FLEN/8, x4, x1, x2) - -inst_646: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d780000; valaddr_reg:x3; val_offset:1938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1938*FLEN/8, x4, x1, x2) - -inst_647: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7c0000; valaddr_reg:x3; val_offset:1941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1941*FLEN/8, x4, x1, x2) - -inst_648: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7e0000; valaddr_reg:x3; val_offset:1944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1944*FLEN/8, x4, x1, x2) - -inst_649: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7f0000; valaddr_reg:x3; val_offset:1947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1947*FLEN/8, x4, x1, x2) - -inst_650: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7f8000; valaddr_reg:x3; val_offset:1950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1950*FLEN/8, x4, x1, x2) - -inst_651: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7fc000; valaddr_reg:x3; val_offset:1953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1953*FLEN/8, x4, x1, x2) - -inst_652: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7fe000; valaddr_reg:x3; val_offset:1956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1956*FLEN/8, x4, x1, x2) - -inst_653: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7ff000; valaddr_reg:x3; val_offset:1959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1959*FLEN/8, x4, x1, x2) - -inst_654: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7ff800; valaddr_reg:x3; val_offset:1962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1962*FLEN/8, x4, x1, x2) - -inst_655: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7ffc00; valaddr_reg:x3; val_offset:1965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1965*FLEN/8, x4, x1, x2) - -inst_656: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7ffe00; valaddr_reg:x3; val_offset:1968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1968*FLEN/8, x4, x1, x2) - -inst_657: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7fff00; valaddr_reg:x3; val_offset:1971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1971*FLEN/8, x4, x1, x2) - -inst_658: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7fff80; valaddr_reg:x3; val_offset:1974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1974*FLEN/8, x4, x1, x2) - -inst_659: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7fffc0; valaddr_reg:x3; val_offset:1977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1977*FLEN/8, x4, x1, x2) - -inst_660: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7fffe0; valaddr_reg:x3; val_offset:1980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1980*FLEN/8, x4, x1, x2) - -inst_661: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7ffff0; valaddr_reg:x3; val_offset:1983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1983*FLEN/8, x4, x1, x2) - -inst_662: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7ffff8; valaddr_reg:x3; val_offset:1986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1986*FLEN/8, x4, x1, x2) - -inst_663: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7ffffc; valaddr_reg:x3; val_offset:1989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1989*FLEN/8, x4, x1, x2) - -inst_664: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7ffffe; valaddr_reg:x3; val_offset:1992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1992*FLEN/8, x4, x1, x2) - -inst_665: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x2d7fffff; valaddr_reg:x3; val_offset:1995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1995*FLEN/8, x4, x1, x2) - -inst_666: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3f800001; valaddr_reg:x3; val_offset:1998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1998*FLEN/8, x4, x1, x2) - -inst_667: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3f800003; valaddr_reg:x3; val_offset:2001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2001*FLEN/8, x4, x1, x2) - -inst_668: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3f800007; valaddr_reg:x3; val_offset:2004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2004*FLEN/8, x4, x1, x2) - -inst_669: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3f999999; valaddr_reg:x3; val_offset:2007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2007*FLEN/8, x4, x1, x2) - -inst_670: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:2010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2010*FLEN/8, x4, x1, x2) - -inst_671: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:2013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2013*FLEN/8, x4, x1, x2) - -inst_672: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:2016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2016*FLEN/8, x4, x1, x2) - -inst_673: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:2019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2019*FLEN/8, x4, x1, x2) - -inst_674: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:2022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2022*FLEN/8, x4, x1, x2) - -inst_675: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:2025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2025*FLEN/8, x4, x1, x2) - -inst_676: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:2028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2028*FLEN/8, x4, x1, x2) - -inst_677: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:2031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2031*FLEN/8, x4, x1, x2) - -inst_678: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:2034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2034*FLEN/8, x4, x1, x2) - -inst_679: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:2037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2037*FLEN/8, x4, x1, x2) - -inst_680: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:2040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2040*FLEN/8, x4, x1, x2) - -inst_681: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:2043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2043*FLEN/8, x4, x1, x2) - -inst_682: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:2046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2046*FLEN/8, x4, x1, x2) - -inst_683: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:2049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2049*FLEN/8, x4, x1, x2) - -inst_684: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:2052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2052*FLEN/8, x4, x1, x2) - -inst_685: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:2055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2055*FLEN/8, x4, x1, x2) - -inst_686: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:2058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2058*FLEN/8, x4, x1, x2) - -inst_687: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:2061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2061*FLEN/8, x4, x1, x2) - -inst_688: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:2064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2064*FLEN/8, x4, x1, x2) - -inst_689: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:2067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2067*FLEN/8, x4, x1, x2) - -inst_690: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:2070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2070*FLEN/8, x4, x1, x2) - -inst_691: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:2073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2073*FLEN/8, x4, x1, x2) - -inst_692: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:2076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2076*FLEN/8, x4, x1, x2) - -inst_693: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:2079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2079*FLEN/8, x4, x1, x2) - -inst_694: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:2082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2082*FLEN/8, x4, x1, x2) - -inst_695: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:2085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2085*FLEN/8, x4, x1, x2) - -inst_696: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:2088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2088*FLEN/8, x4, x1, x2) - -inst_697: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:2091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2091*FLEN/8, x4, x1, x2) - -inst_698: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89000000; valaddr_reg:x3; val_offset:2094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2094*FLEN/8, x4, x1, x2) - -inst_699: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89000001; valaddr_reg:x3; val_offset:2097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2097*FLEN/8, x4, x1, x2) - -inst_700: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89000003; valaddr_reg:x3; val_offset:2100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2100*FLEN/8, x4, x1, x2) - -inst_701: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89000007; valaddr_reg:x3; val_offset:2103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2103*FLEN/8, x4, x1, x2) - -inst_702: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8900000f; valaddr_reg:x3; val_offset:2106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2106*FLEN/8, x4, x1, x2) - -inst_703: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8900001f; valaddr_reg:x3; val_offset:2109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2109*FLEN/8, x4, x1, x2) - -inst_704: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8900003f; valaddr_reg:x3; val_offset:2112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2112*FLEN/8, x4, x1, x2) - -inst_705: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8900007f; valaddr_reg:x3; val_offset:2115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2115*FLEN/8, x4, x1, x2) - -inst_706: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x890000ff; valaddr_reg:x3; val_offset:2118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2118*FLEN/8, x4, x1, x2) - -inst_707: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x890001ff; valaddr_reg:x3; val_offset:2121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2121*FLEN/8, x4, x1, x2) - -inst_708: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x890003ff; valaddr_reg:x3; val_offset:2124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2124*FLEN/8, x4, x1, x2) - -inst_709: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x890007ff; valaddr_reg:x3; val_offset:2127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2127*FLEN/8, x4, x1, x2) - -inst_710: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89000fff; valaddr_reg:x3; val_offset:2130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2130*FLEN/8, x4, x1, x2) - -inst_711: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89001fff; valaddr_reg:x3; val_offset:2133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2133*FLEN/8, x4, x1, x2) - -inst_712: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89003fff; valaddr_reg:x3; val_offset:2136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2136*FLEN/8, x4, x1, x2) - -inst_713: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89007fff; valaddr_reg:x3; val_offset:2139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2139*FLEN/8, x4, x1, x2) - -inst_714: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8900ffff; valaddr_reg:x3; val_offset:2142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2142*FLEN/8, x4, x1, x2) - -inst_715: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8901ffff; valaddr_reg:x3; val_offset:2145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2145*FLEN/8, x4, x1, x2) - -inst_716: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8903ffff; valaddr_reg:x3; val_offset:2148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2148*FLEN/8, x4, x1, x2) - -inst_717: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x8907ffff; valaddr_reg:x3; val_offset:2151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2151*FLEN/8, x4, x1, x2) - -inst_718: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x890fffff; valaddr_reg:x3; val_offset:2154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2154*FLEN/8, x4, x1, x2) - -inst_719: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x891fffff; valaddr_reg:x3; val_offset:2157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2157*FLEN/8, x4, x1, x2) - -inst_720: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x893fffff; valaddr_reg:x3; val_offset:2160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2160*FLEN/8, x4, x1, x2) - -inst_721: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89400000; valaddr_reg:x3; val_offset:2163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2163*FLEN/8, x4, x1, x2) - -inst_722: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89600000; valaddr_reg:x3; val_offset:2166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2166*FLEN/8, x4, x1, x2) - -inst_723: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89700000; valaddr_reg:x3; val_offset:2169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2169*FLEN/8, x4, x1, x2) - -inst_724: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x89780000; valaddr_reg:x3; val_offset:2172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2172*FLEN/8, x4, x1, x2) - -inst_725: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897c0000; valaddr_reg:x3; val_offset:2175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2175*FLEN/8, x4, x1, x2) - -inst_726: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897e0000; valaddr_reg:x3; val_offset:2178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2178*FLEN/8, x4, x1, x2) - -inst_727: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897f0000; valaddr_reg:x3; val_offset:2181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2181*FLEN/8, x4, x1, x2) - -inst_728: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897f8000; valaddr_reg:x3; val_offset:2184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2184*FLEN/8, x4, x1, x2) - -inst_729: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897fc000; valaddr_reg:x3; val_offset:2187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2187*FLEN/8, x4, x1, x2) - -inst_730: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897fe000; valaddr_reg:x3; val_offset:2190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2190*FLEN/8, x4, x1, x2) - -inst_731: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897ff000; valaddr_reg:x3; val_offset:2193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2193*FLEN/8, x4, x1, x2) - -inst_732: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897ff800; valaddr_reg:x3; val_offset:2196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2196*FLEN/8, x4, x1, x2) - -inst_733: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897ffc00; valaddr_reg:x3; val_offset:2199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2199*FLEN/8, x4, x1, x2) - -inst_734: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897ffe00; valaddr_reg:x3; val_offset:2202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2202*FLEN/8, x4, x1, x2) - -inst_735: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897fff00; valaddr_reg:x3; val_offset:2205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2205*FLEN/8, x4, x1, x2) - -inst_736: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897fff80; valaddr_reg:x3; val_offset:2208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2208*FLEN/8, x4, x1, x2) - -inst_737: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897fffc0; valaddr_reg:x3; val_offset:2211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2211*FLEN/8, x4, x1, x2) - -inst_738: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897fffe0; valaddr_reg:x3; val_offset:2214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2214*FLEN/8, x4, x1, x2) - -inst_739: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897ffff0; valaddr_reg:x3; val_offset:2217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2217*FLEN/8, x4, x1, x2) - -inst_740: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897ffff8; valaddr_reg:x3; val_offset:2220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2220*FLEN/8, x4, x1, x2) - -inst_741: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897ffffc; valaddr_reg:x3; val_offset:2223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2223*FLEN/8, x4, x1, x2) - -inst_742: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897ffffe; valaddr_reg:x3; val_offset:2226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2226*FLEN/8, x4, x1, x2) - -inst_743: -// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; -op3val:0x897fffff; valaddr_reg:x3; val_offset:2229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2229*FLEN/8, x4, x1, x2) - -inst_744: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe000000; valaddr_reg:x3; val_offset:2232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2232*FLEN/8, x4, x1, x2) - -inst_745: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe000001; valaddr_reg:x3; val_offset:2235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2235*FLEN/8, x4, x1, x2) - -inst_746: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe000003; valaddr_reg:x3; val_offset:2238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2238*FLEN/8, x4, x1, x2) - -inst_747: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe000007; valaddr_reg:x3; val_offset:2241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2241*FLEN/8, x4, x1, x2) - -inst_748: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe00000f; valaddr_reg:x3; val_offset:2244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2244*FLEN/8, x4, x1, x2) - -inst_749: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe00001f; valaddr_reg:x3; val_offset:2247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2247*FLEN/8, x4, x1, x2) - -inst_750: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe00003f; valaddr_reg:x3; val_offset:2250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2250*FLEN/8, x4, x1, x2) - -inst_751: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe00007f; valaddr_reg:x3; val_offset:2253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2253*FLEN/8, x4, x1, x2) - -inst_752: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe0000ff; valaddr_reg:x3; val_offset:2256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2256*FLEN/8, x4, x1, x2) - -inst_753: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe0001ff; valaddr_reg:x3; val_offset:2259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2259*FLEN/8, x4, x1, x2) - -inst_754: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe0003ff; valaddr_reg:x3; val_offset:2262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2262*FLEN/8, x4, x1, x2) - -inst_755: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe0007ff; valaddr_reg:x3; val_offset:2265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2265*FLEN/8, x4, x1, x2) - -inst_756: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe000fff; valaddr_reg:x3; val_offset:2268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2268*FLEN/8, x4, x1, x2) - -inst_757: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe001fff; valaddr_reg:x3; val_offset:2271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2271*FLEN/8, x4, x1, x2) - -inst_758: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe003fff; valaddr_reg:x3; val_offset:2274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2274*FLEN/8, x4, x1, x2) - -inst_759: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe007fff; valaddr_reg:x3; val_offset:2277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2277*FLEN/8, x4, x1, x2) - -inst_760: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe00ffff; valaddr_reg:x3; val_offset:2280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2280*FLEN/8, x4, x1, x2) - -inst_761: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe01ffff; valaddr_reg:x3; val_offset:2283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2283*FLEN/8, x4, x1, x2) - -inst_762: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe03ffff; valaddr_reg:x3; val_offset:2286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2286*FLEN/8, x4, x1, x2) - -inst_763: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe07ffff; valaddr_reg:x3; val_offset:2289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2289*FLEN/8, x4, x1, x2) - -inst_764: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe0fffff; valaddr_reg:x3; val_offset:2292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2292*FLEN/8, x4, x1, x2) - -inst_765: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe1fffff; valaddr_reg:x3; val_offset:2295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2295*FLEN/8, x4, x1, x2) - -inst_766: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe3fffff; valaddr_reg:x3; val_offset:2298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2298*FLEN/8, x4, x1, x2) - -inst_767: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe400000; valaddr_reg:x3; val_offset:2301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2301*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_7) - -inst_768: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe600000; valaddr_reg:x3; val_offset:2304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2304*FLEN/8, x4, x1, x2) - -inst_769: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe700000; valaddr_reg:x3; val_offset:2307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2307*FLEN/8, x4, x1, x2) - -inst_770: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe780000; valaddr_reg:x3; val_offset:2310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2310*FLEN/8, x4, x1, x2) - -inst_771: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7c0000; valaddr_reg:x3; val_offset:2313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2313*FLEN/8, x4, x1, x2) - -inst_772: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7e0000; valaddr_reg:x3; val_offset:2316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2316*FLEN/8, x4, x1, x2) - -inst_773: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7f0000; valaddr_reg:x3; val_offset:2319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2319*FLEN/8, x4, x1, x2) - -inst_774: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7f8000; valaddr_reg:x3; val_offset:2322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2322*FLEN/8, x4, x1, x2) - -inst_775: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7fc000; valaddr_reg:x3; val_offset:2325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2325*FLEN/8, x4, x1, x2) - -inst_776: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7fe000; valaddr_reg:x3; val_offset:2328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2328*FLEN/8, x4, x1, x2) - -inst_777: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7ff000; valaddr_reg:x3; val_offset:2331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2331*FLEN/8, x4, x1, x2) - -inst_778: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7ff800; valaddr_reg:x3; val_offset:2334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2334*FLEN/8, x4, x1, x2) - -inst_779: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7ffc00; valaddr_reg:x3; val_offset:2337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2337*FLEN/8, x4, x1, x2) - -inst_780: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7ffe00; valaddr_reg:x3; val_offset:2340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2340*FLEN/8, x4, x1, x2) - -inst_781: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7fff00; valaddr_reg:x3; val_offset:2343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2343*FLEN/8, x4, x1, x2) - -inst_782: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7fff80; valaddr_reg:x3; val_offset:2346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2346*FLEN/8, x4, x1, x2) - -inst_783: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7fffc0; valaddr_reg:x3; val_offset:2349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2349*FLEN/8, x4, x1, x2) - -inst_784: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7fffe0; valaddr_reg:x3; val_offset:2352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2352*FLEN/8, x4, x1, x2) - -inst_785: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7ffff0; valaddr_reg:x3; val_offset:2355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2355*FLEN/8, x4, x1, x2) - -inst_786: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7ffff8; valaddr_reg:x3; val_offset:2358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2358*FLEN/8, x4, x1, x2) - -inst_787: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7ffffc; valaddr_reg:x3; val_offset:2361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2361*FLEN/8, x4, x1, x2) - -inst_788: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7ffffe; valaddr_reg:x3; val_offset:2364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2364*FLEN/8, x4, x1, x2) - -inst_789: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbe7fffff; valaddr_reg:x3; val_offset:2367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2367*FLEN/8, x4, x1, x2) - -inst_790: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbf800001; valaddr_reg:x3; val_offset:2370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2370*FLEN/8, x4, x1, x2) - -inst_791: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbf800003; valaddr_reg:x3; val_offset:2373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2373*FLEN/8, x4, x1, x2) - -inst_792: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbf800007; valaddr_reg:x3; val_offset:2376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2376*FLEN/8, x4, x1, x2) - -inst_793: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbf999999; valaddr_reg:x3; val_offset:2379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2379*FLEN/8, x4, x1, x2) - -inst_794: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:2382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2382*FLEN/8, x4, x1, x2) - -inst_795: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:2385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2385*FLEN/8, x4, x1, x2) - -inst_796: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:2388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2388*FLEN/8, x4, x1, x2) - -inst_797: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:2391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2391*FLEN/8, x4, x1, x2) - -inst_798: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:2394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2394*FLEN/8, x4, x1, x2) - -inst_799: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:2397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2397*FLEN/8, x4, x1, x2) - -inst_800: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:2400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2400*FLEN/8, x4, x1, x2) - -inst_801: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:2403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2403*FLEN/8, x4, x1, x2) - -inst_802: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:2406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2406*FLEN/8, x4, x1, x2) - -inst_803: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:2409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2409*FLEN/8, x4, x1, x2) - -inst_804: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:2412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2412*FLEN/8, x4, x1, x2) - -inst_805: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:2415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2415*FLEN/8, x4, x1, x2) - -inst_806: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:2418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2418*FLEN/8, x4, x1, x2) - -inst_807: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:2421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2421*FLEN/8, x4, x1, x2) - -inst_808: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:2424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2424*FLEN/8, x4, x1, x2) - -inst_809: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:2427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2427*FLEN/8, x4, x1, x2) - -inst_810: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:2430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2430*FLEN/8, x4, x1, x2) - -inst_811: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:2433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2433*FLEN/8, x4, x1, x2) - -inst_812: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:2436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2436*FLEN/8, x4, x1, x2) - -inst_813: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:2439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2439*FLEN/8, x4, x1, x2) - -inst_814: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:2442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2442*FLEN/8, x4, x1, x2) - -inst_815: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:2445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2445*FLEN/8, x4, x1, x2) - -inst_816: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:2448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2448*FLEN/8, x4, x1, x2) - -inst_817: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:2451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2451*FLEN/8, x4, x1, x2) - -inst_818: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:2454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2454*FLEN/8, x4, x1, x2) - -inst_819: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:2457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2457*FLEN/8, x4, x1, x2) - -inst_820: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:2460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2460*FLEN/8, x4, x1, x2) - -inst_821: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:2463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2463*FLEN/8, x4, x1, x2) - -inst_822: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87800000; valaddr_reg:x3; val_offset:2466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2466*FLEN/8, x4, x1, x2) - -inst_823: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87800001; valaddr_reg:x3; val_offset:2469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2469*FLEN/8, x4, x1, x2) - -inst_824: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87800003; valaddr_reg:x3; val_offset:2472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2472*FLEN/8, x4, x1, x2) - -inst_825: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87800007; valaddr_reg:x3; val_offset:2475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2475*FLEN/8, x4, x1, x2) - -inst_826: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8780000f; valaddr_reg:x3; val_offset:2478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2478*FLEN/8, x4, x1, x2) - -inst_827: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8780001f; valaddr_reg:x3; val_offset:2481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2481*FLEN/8, x4, x1, x2) - -inst_828: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8780003f; valaddr_reg:x3; val_offset:2484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2484*FLEN/8, x4, x1, x2) - -inst_829: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8780007f; valaddr_reg:x3; val_offset:2487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2487*FLEN/8, x4, x1, x2) - -inst_830: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x878000ff; valaddr_reg:x3; val_offset:2490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2490*FLEN/8, x4, x1, x2) - -inst_831: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x878001ff; valaddr_reg:x3; val_offset:2493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2493*FLEN/8, x4, x1, x2) - -inst_832: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x878003ff; valaddr_reg:x3; val_offset:2496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2496*FLEN/8, x4, x1, x2) - -inst_833: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x878007ff; valaddr_reg:x3; val_offset:2499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2499*FLEN/8, x4, x1, x2) - -inst_834: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87800fff; valaddr_reg:x3; val_offset:2502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2502*FLEN/8, x4, x1, x2) - -inst_835: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87801fff; valaddr_reg:x3; val_offset:2505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2505*FLEN/8, x4, x1, x2) - -inst_836: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87803fff; valaddr_reg:x3; val_offset:2508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2508*FLEN/8, x4, x1, x2) - -inst_837: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87807fff; valaddr_reg:x3; val_offset:2511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2511*FLEN/8, x4, x1, x2) - -inst_838: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8780ffff; valaddr_reg:x3; val_offset:2514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2514*FLEN/8, x4, x1, x2) - -inst_839: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8781ffff; valaddr_reg:x3; val_offset:2517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2517*FLEN/8, x4, x1, x2) - -inst_840: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8783ffff; valaddr_reg:x3; val_offset:2520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2520*FLEN/8, x4, x1, x2) - -inst_841: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x8787ffff; valaddr_reg:x3; val_offset:2523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2523*FLEN/8, x4, x1, x2) - -inst_842: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x878fffff; valaddr_reg:x3; val_offset:2526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2526*FLEN/8, x4, x1, x2) - -inst_843: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x879fffff; valaddr_reg:x3; val_offset:2529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2529*FLEN/8, x4, x1, x2) - -inst_844: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87bfffff; valaddr_reg:x3; val_offset:2532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2532*FLEN/8, x4, x1, x2) - -inst_845: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87c00000; valaddr_reg:x3; val_offset:2535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2535*FLEN/8, x4, x1, x2) - -inst_846: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87e00000; valaddr_reg:x3; val_offset:2538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2538*FLEN/8, x4, x1, x2) - -inst_847: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87f00000; valaddr_reg:x3; val_offset:2541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2541*FLEN/8, x4, x1, x2) - -inst_848: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87f80000; valaddr_reg:x3; val_offset:2544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2544*FLEN/8, x4, x1, x2) - -inst_849: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fc0000; valaddr_reg:x3; val_offset:2547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2547*FLEN/8, x4, x1, x2) - -inst_850: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fe0000; valaddr_reg:x3; val_offset:2550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2550*FLEN/8, x4, x1, x2) - -inst_851: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ff0000; valaddr_reg:x3; val_offset:2553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2553*FLEN/8, x4, x1, x2) - -inst_852: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ff8000; valaddr_reg:x3; val_offset:2556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2556*FLEN/8, x4, x1, x2) - -inst_853: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ffc000; valaddr_reg:x3; val_offset:2559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2559*FLEN/8, x4, x1, x2) - -inst_854: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ffe000; valaddr_reg:x3; val_offset:2562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2562*FLEN/8, x4, x1, x2) - -inst_855: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fff000; valaddr_reg:x3; val_offset:2565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2565*FLEN/8, x4, x1, x2) - -inst_856: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fff800; valaddr_reg:x3; val_offset:2568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2568*FLEN/8, x4, x1, x2) - -inst_857: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fffc00; valaddr_reg:x3; val_offset:2571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2571*FLEN/8, x4, x1, x2) - -inst_858: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fffe00; valaddr_reg:x3; val_offset:2574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2574*FLEN/8, x4, x1, x2) - -inst_859: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ffff00; valaddr_reg:x3; val_offset:2577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2577*FLEN/8, x4, x1, x2) - -inst_860: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ffff80; valaddr_reg:x3; val_offset:2580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2580*FLEN/8, x4, x1, x2) - -inst_861: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ffffc0; valaddr_reg:x3; val_offset:2583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2583*FLEN/8, x4, x1, x2) - -inst_862: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ffffe0; valaddr_reg:x3; val_offset:2586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2586*FLEN/8, x4, x1, x2) - -inst_863: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fffff0; valaddr_reg:x3; val_offset:2589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2589*FLEN/8, x4, x1, x2) - -inst_864: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fffff8; valaddr_reg:x3; val_offset:2592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2592*FLEN/8, x4, x1, x2) - -inst_865: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fffffc; valaddr_reg:x3; val_offset:2595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2595*FLEN/8, x4, x1, x2) - -inst_866: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87fffffe; valaddr_reg:x3; val_offset:2598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2598*FLEN/8, x4, x1, x2) - -inst_867: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; -op3val:0x87ffffff; valaddr_reg:x3; val_offset:2601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2601*FLEN/8, x4, x1, x2) - -inst_868: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d800000; valaddr_reg:x3; val_offset:2604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2604*FLEN/8, x4, x1, x2) - -inst_869: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d800001; valaddr_reg:x3; val_offset:2607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2607*FLEN/8, x4, x1, x2) - -inst_870: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d800003; valaddr_reg:x3; val_offset:2610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2610*FLEN/8, x4, x1, x2) - -inst_871: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d800007; valaddr_reg:x3; val_offset:2613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2613*FLEN/8, x4, x1, x2) - -inst_872: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d80000f; valaddr_reg:x3; val_offset:2616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2616*FLEN/8, x4, x1, x2) - -inst_873: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d80001f; valaddr_reg:x3; val_offset:2619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2619*FLEN/8, x4, x1, x2) - -inst_874: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d80003f; valaddr_reg:x3; val_offset:2622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2622*FLEN/8, x4, x1, x2) - -inst_875: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d80007f; valaddr_reg:x3; val_offset:2625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2625*FLEN/8, x4, x1, x2) - -inst_876: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d8000ff; valaddr_reg:x3; val_offset:2628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2628*FLEN/8, x4, x1, x2) - -inst_877: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d8001ff; valaddr_reg:x3; val_offset:2631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2631*FLEN/8, x4, x1, x2) - -inst_878: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d8003ff; valaddr_reg:x3; val_offset:2634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2634*FLEN/8, x4, x1, x2) - -inst_879: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d8007ff; valaddr_reg:x3; val_offset:2637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2637*FLEN/8, x4, x1, x2) - -inst_880: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d800fff; valaddr_reg:x3; val_offset:2640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2640*FLEN/8, x4, x1, x2) - -inst_881: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d801fff; valaddr_reg:x3; val_offset:2643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2643*FLEN/8, x4, x1, x2) - -inst_882: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d803fff; valaddr_reg:x3; val_offset:2646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2646*FLEN/8, x4, x1, x2) - -inst_883: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d807fff; valaddr_reg:x3; val_offset:2649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2649*FLEN/8, x4, x1, x2) - -inst_884: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d80ffff; valaddr_reg:x3; val_offset:2652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2652*FLEN/8, x4, x1, x2) - -inst_885: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d81ffff; valaddr_reg:x3; val_offset:2655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2655*FLEN/8, x4, x1, x2) - -inst_886: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d83ffff; valaddr_reg:x3; val_offset:2658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2658*FLEN/8, x4, x1, x2) - -inst_887: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d87ffff; valaddr_reg:x3; val_offset:2661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2661*FLEN/8, x4, x1, x2) - -inst_888: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d8fffff; valaddr_reg:x3; val_offset:2664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2664*FLEN/8, x4, x1, x2) - -inst_889: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6d9fffff; valaddr_reg:x3; val_offset:2667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2667*FLEN/8, x4, x1, x2) - -inst_890: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dbfffff; valaddr_reg:x3; val_offset:2670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2670*FLEN/8, x4, x1, x2) - -inst_891: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dc00000; valaddr_reg:x3; val_offset:2673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2673*FLEN/8, x4, x1, x2) - -inst_892: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6de00000; valaddr_reg:x3; val_offset:2676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2676*FLEN/8, x4, x1, x2) - -inst_893: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6df00000; valaddr_reg:x3; val_offset:2679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2679*FLEN/8, x4, x1, x2) - -inst_894: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6df80000; valaddr_reg:x3; val_offset:2682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2682*FLEN/8, x4, x1, x2) - -inst_895: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfc0000; valaddr_reg:x3; val_offset:2685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2685*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_8) - -inst_896: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfe0000; valaddr_reg:x3; val_offset:2688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2688*FLEN/8, x4, x1, x2) - -inst_897: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dff0000; valaddr_reg:x3; val_offset:2691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2691*FLEN/8, x4, x1, x2) - -inst_898: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dff8000; valaddr_reg:x3; val_offset:2694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2694*FLEN/8, x4, x1, x2) - -inst_899: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dffc000; valaddr_reg:x3; val_offset:2697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2697*FLEN/8, x4, x1, x2) - -inst_900: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dffe000; valaddr_reg:x3; val_offset:2700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2700*FLEN/8, x4, x1, x2) - -inst_901: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfff000; valaddr_reg:x3; val_offset:2703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2703*FLEN/8, x4, x1, x2) - -inst_902: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfff800; valaddr_reg:x3; val_offset:2706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2706*FLEN/8, x4, x1, x2) - -inst_903: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfffc00; valaddr_reg:x3; val_offset:2709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2709*FLEN/8, x4, x1, x2) - -inst_904: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfffe00; valaddr_reg:x3; val_offset:2712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2712*FLEN/8, x4, x1, x2) - -inst_905: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dffff00; valaddr_reg:x3; val_offset:2715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2715*FLEN/8, x4, x1, x2) - -inst_906: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dffff80; valaddr_reg:x3; val_offset:2718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2718*FLEN/8, x4, x1, x2) - -inst_907: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dffffc0; valaddr_reg:x3; val_offset:2721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2721*FLEN/8, x4, x1, x2) - -inst_908: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dffffe0; valaddr_reg:x3; val_offset:2724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2724*FLEN/8, x4, x1, x2) - -inst_909: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfffff0; valaddr_reg:x3; val_offset:2727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2727*FLEN/8, x4, x1, x2) - -inst_910: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfffff8; valaddr_reg:x3; val_offset:2730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2730*FLEN/8, x4, x1, x2) - -inst_911: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfffffc; valaddr_reg:x3; val_offset:2733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2733*FLEN/8, x4, x1, x2) - -inst_912: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dfffffe; valaddr_reg:x3; val_offset:2736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2736*FLEN/8, x4, x1, x2) - -inst_913: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x6dffffff; valaddr_reg:x3; val_offset:2739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2739*FLEN/8, x4, x1, x2) - -inst_914: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f000001; valaddr_reg:x3; val_offset:2742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2742*FLEN/8, x4, x1, x2) - -inst_915: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f000003; valaddr_reg:x3; val_offset:2745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2745*FLEN/8, x4, x1, x2) - -inst_916: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f000007; valaddr_reg:x3; val_offset:2748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2748*FLEN/8, x4, x1, x2) - -inst_917: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f199999; valaddr_reg:x3; val_offset:2751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2751*FLEN/8, x4, x1, x2) - -inst_918: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f249249; valaddr_reg:x3; val_offset:2754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2754*FLEN/8, x4, x1, x2) - -inst_919: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f333333; valaddr_reg:x3; val_offset:2757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2757*FLEN/8, x4, x1, x2) - -inst_920: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:2760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2760*FLEN/8, x4, x1, x2) - -inst_921: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:2763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2763*FLEN/8, x4, x1, x2) - -inst_922: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f444444; valaddr_reg:x3; val_offset:2766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2766*FLEN/8, x4, x1, x2) - -inst_923: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:2769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2769*FLEN/8, x4, x1, x2) - -inst_924: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:2772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2772*FLEN/8, x4, x1, x2) - -inst_925: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f666666; valaddr_reg:x3; val_offset:2775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2775*FLEN/8, x4, x1, x2) - -inst_926: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:2778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2778*FLEN/8, x4, x1, x2) - -inst_927: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:2781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2781*FLEN/8, x4, x1, x2) - -inst_928: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:2784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2784*FLEN/8, x4, x1, x2) - -inst_929: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:2787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2787*FLEN/8, x4, x1, x2) - -inst_930: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8800000; valaddr_reg:x3; val_offset:2790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2790*FLEN/8, x4, x1, x2) - -inst_931: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8800001; valaddr_reg:x3; val_offset:2793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2793*FLEN/8, x4, x1, x2) - -inst_932: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8800003; valaddr_reg:x3; val_offset:2796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2796*FLEN/8, x4, x1, x2) - -inst_933: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8800007; valaddr_reg:x3; val_offset:2799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2799*FLEN/8, x4, x1, x2) - -inst_934: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa880000f; valaddr_reg:x3; val_offset:2802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2802*FLEN/8, x4, x1, x2) - -inst_935: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa880001f; valaddr_reg:x3; val_offset:2805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2805*FLEN/8, x4, x1, x2) - -inst_936: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa880003f; valaddr_reg:x3; val_offset:2808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2808*FLEN/8, x4, x1, x2) - -inst_937: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa880007f; valaddr_reg:x3; val_offset:2811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2811*FLEN/8, x4, x1, x2) - -inst_938: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa88000ff; valaddr_reg:x3; val_offset:2814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2814*FLEN/8, x4, x1, x2) - -inst_939: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa88001ff; valaddr_reg:x3; val_offset:2817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2817*FLEN/8, x4, x1, x2) - -inst_940: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa88003ff; valaddr_reg:x3; val_offset:2820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2820*FLEN/8, x4, x1, x2) - -inst_941: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa88007ff; valaddr_reg:x3; val_offset:2823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2823*FLEN/8, x4, x1, x2) - -inst_942: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8800fff; valaddr_reg:x3; val_offset:2826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2826*FLEN/8, x4, x1, x2) - -inst_943: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8801fff; valaddr_reg:x3; val_offset:2829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2829*FLEN/8, x4, x1, x2) - -inst_944: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8803fff; valaddr_reg:x3; val_offset:2832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2832*FLEN/8, x4, x1, x2) - -inst_945: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8807fff; valaddr_reg:x3; val_offset:2835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2835*FLEN/8, x4, x1, x2) - -inst_946: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa880ffff; valaddr_reg:x3; val_offset:2838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2838*FLEN/8, x4, x1, x2) - -inst_947: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa881ffff; valaddr_reg:x3; val_offset:2841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2841*FLEN/8, x4, x1, x2) - -inst_948: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa883ffff; valaddr_reg:x3; val_offset:2844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2844*FLEN/8, x4, x1, x2) - -inst_949: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa887ffff; valaddr_reg:x3; val_offset:2847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2847*FLEN/8, x4, x1, x2) - -inst_950: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa88fffff; valaddr_reg:x3; val_offset:2850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2850*FLEN/8, x4, x1, x2) - -inst_951: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa89fffff; valaddr_reg:x3; val_offset:2853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2853*FLEN/8, x4, x1, x2) - -inst_952: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8bfffff; valaddr_reg:x3; val_offset:2856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2856*FLEN/8, x4, x1, x2) - -inst_953: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8c00000; valaddr_reg:x3; val_offset:2859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2859*FLEN/8, x4, x1, x2) - -inst_954: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8e00000; valaddr_reg:x3; val_offset:2862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2862*FLEN/8, x4, x1, x2) - -inst_955: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8f00000; valaddr_reg:x3; val_offset:2865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2865*FLEN/8, x4, x1, x2) - -inst_956: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8f80000; valaddr_reg:x3; val_offset:2868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2868*FLEN/8, x4, x1, x2) - -inst_957: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fc0000; valaddr_reg:x3; val_offset:2871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2871*FLEN/8, x4, x1, x2) - -inst_958: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fe0000; valaddr_reg:x3; val_offset:2874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2874*FLEN/8, x4, x1, x2) - -inst_959: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ff0000; valaddr_reg:x3; val_offset:2877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2877*FLEN/8, x4, x1, x2) - -inst_960: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ff8000; valaddr_reg:x3; val_offset:2880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2880*FLEN/8, x4, x1, x2) - -inst_961: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ffc000; valaddr_reg:x3; val_offset:2883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2883*FLEN/8, x4, x1, x2) - -inst_962: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ffe000; valaddr_reg:x3; val_offset:2886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2886*FLEN/8, x4, x1, x2) - -inst_963: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fff000; valaddr_reg:x3; val_offset:2889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2889*FLEN/8, x4, x1, x2) - -inst_964: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fff800; valaddr_reg:x3; val_offset:2892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2892*FLEN/8, x4, x1, x2) - -inst_965: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fffc00; valaddr_reg:x3; val_offset:2895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2895*FLEN/8, x4, x1, x2) - -inst_966: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fffe00; valaddr_reg:x3; val_offset:2898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2898*FLEN/8, x4, x1, x2) - -inst_967: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ffff00; valaddr_reg:x3; val_offset:2901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2901*FLEN/8, x4, x1, x2) - -inst_968: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ffff80; valaddr_reg:x3; val_offset:2904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2904*FLEN/8, x4, x1, x2) - -inst_969: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ffffc0; valaddr_reg:x3; val_offset:2907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2907*FLEN/8, x4, x1, x2) - -inst_970: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ffffe0; valaddr_reg:x3; val_offset:2910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2910*FLEN/8, x4, x1, x2) - -inst_971: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fffff0; valaddr_reg:x3; val_offset:2913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2913*FLEN/8, x4, x1, x2) - -inst_972: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fffff8; valaddr_reg:x3; val_offset:2916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2916*FLEN/8, x4, x1, x2) - -inst_973: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fffffc; valaddr_reg:x3; val_offset:2919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2919*FLEN/8, x4, x1, x2) - -inst_974: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8fffffe; valaddr_reg:x3; val_offset:2922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2922*FLEN/8, x4, x1, x2) - -inst_975: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xa8ffffff; valaddr_reg:x3; val_offset:2925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2925*FLEN/8, x4, x1, x2) - -inst_976: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbf800001; valaddr_reg:x3; val_offset:2928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2928*FLEN/8, x4, x1, x2) - -inst_977: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbf800003; valaddr_reg:x3; val_offset:2931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2931*FLEN/8, x4, x1, x2) - -inst_978: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbf800007; valaddr_reg:x3; val_offset:2934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2934*FLEN/8, x4, x1, x2) - -inst_979: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbf999999; valaddr_reg:x3; val_offset:2937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2937*FLEN/8, x4, x1, x2) - -inst_980: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:2940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2940*FLEN/8, x4, x1, x2) - -inst_981: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:2943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2943*FLEN/8, x4, x1, x2) - -inst_982: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:2946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2946*FLEN/8, x4, x1, x2) - -inst_983: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:2949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2949*FLEN/8, x4, x1, x2) - -inst_984: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:2952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2952*FLEN/8, x4, x1, x2) - -inst_985: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:2955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2955*FLEN/8, x4, x1, x2) - -inst_986: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:2958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2958*FLEN/8, x4, x1, x2) - -inst_987: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:2961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2961*FLEN/8, x4, x1, x2) - -inst_988: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:2964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2964*FLEN/8, x4, x1, x2) - -inst_989: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:2967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2967*FLEN/8, x4, x1, x2) - -inst_990: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:2970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2970*FLEN/8, x4, x1, x2) - -inst_991: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:2973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2973*FLEN/8, x4, x1, x2) - -inst_992: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:2976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2976*FLEN/8, x4, x1, x2) - -inst_993: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:2979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2979*FLEN/8, x4, x1, x2) - -inst_994: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:2982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2982*FLEN/8, x4, x1, x2) - -inst_995: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:2985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2985*FLEN/8, x4, x1, x2) - -inst_996: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:2988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2988*FLEN/8, x4, x1, x2) - -inst_997: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:2991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2991*FLEN/8, x4, x1, x2) - -inst_998: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:2994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2994*FLEN/8, x4, x1, x2) - -inst_999: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:2997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2997*FLEN/8, x4, x1, x2) - -inst_1000: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:3000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3000*FLEN/8, x4, x1, x2) - -inst_1001: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:3003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3003*FLEN/8, x4, x1, x2) - -inst_1002: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:3006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3006*FLEN/8, x4, x1, x2) - -inst_1003: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:3009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3009*FLEN/8, x4, x1, x2) - -inst_1004: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:3012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3012*FLEN/8, x4, x1, x2) - -inst_1005: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:3015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3015*FLEN/8, x4, x1, x2) - -inst_1006: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:3018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3018*FLEN/8, x4, x1, x2) - -inst_1007: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:3021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3021*FLEN/8, x4, x1, x2) - -inst_1008: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7000000; valaddr_reg:x3; val_offset:3024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3024*FLEN/8, x4, x1, x2) - -inst_1009: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7000001; valaddr_reg:x3; val_offset:3027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3027*FLEN/8, x4, x1, x2) - -inst_1010: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7000003; valaddr_reg:x3; val_offset:3030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3030*FLEN/8, x4, x1, x2) - -inst_1011: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7000007; valaddr_reg:x3; val_offset:3033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3033*FLEN/8, x4, x1, x2) - -inst_1012: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x700000f; valaddr_reg:x3; val_offset:3036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3036*FLEN/8, x4, x1, x2) - -inst_1013: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x700001f; valaddr_reg:x3; val_offset:3039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3039*FLEN/8, x4, x1, x2) - -inst_1014: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x700003f; valaddr_reg:x3; val_offset:3042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3042*FLEN/8, x4, x1, x2) - -inst_1015: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x700007f; valaddr_reg:x3; val_offset:3045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3045*FLEN/8, x4, x1, x2) - -inst_1016: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x70000ff; valaddr_reg:x3; val_offset:3048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3048*FLEN/8, x4, x1, x2) - -inst_1017: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x70001ff; valaddr_reg:x3; val_offset:3051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3051*FLEN/8, x4, x1, x2) - -inst_1018: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x70003ff; valaddr_reg:x3; val_offset:3054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3054*FLEN/8, x4, x1, x2) - -inst_1019: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x70007ff; valaddr_reg:x3; val_offset:3057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3057*FLEN/8, x4, x1, x2) - -inst_1020: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7000fff; valaddr_reg:x3; val_offset:3060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3060*FLEN/8, x4, x1, x2) - -inst_1021: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7001fff; valaddr_reg:x3; val_offset:3063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3063*FLEN/8, x4, x1, x2) - -inst_1022: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7003fff; valaddr_reg:x3; val_offset:3066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3066*FLEN/8, x4, x1, x2) - -inst_1023: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7007fff; valaddr_reg:x3; val_offset:3069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3069*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_9) - -inst_1024: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x700ffff; valaddr_reg:x3; val_offset:3072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3072*FLEN/8, x4, x1, x2) - -inst_1025: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x701ffff; valaddr_reg:x3; val_offset:3075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3075*FLEN/8, x4, x1, x2) - -inst_1026: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x703ffff; valaddr_reg:x3; val_offset:3078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3078*FLEN/8, x4, x1, x2) - -inst_1027: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x707ffff; valaddr_reg:x3; val_offset:3081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3081*FLEN/8, x4, x1, x2) - -inst_1028: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x70fffff; valaddr_reg:x3; val_offset:3084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3084*FLEN/8, x4, x1, x2) - -inst_1029: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x71fffff; valaddr_reg:x3; val_offset:3087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3087*FLEN/8, x4, x1, x2) - -inst_1030: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x73fffff; valaddr_reg:x3; val_offset:3090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3090*FLEN/8, x4, x1, x2) - -inst_1031: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7400000; valaddr_reg:x3; val_offset:3093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3093*FLEN/8, x4, x1, x2) - -inst_1032: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7600000; valaddr_reg:x3; val_offset:3096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3096*FLEN/8, x4, x1, x2) - -inst_1033: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7700000; valaddr_reg:x3; val_offset:3099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3099*FLEN/8, x4, x1, x2) - -inst_1034: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x7780000; valaddr_reg:x3; val_offset:3102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3102*FLEN/8, x4, x1, x2) - -inst_1035: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77c0000; valaddr_reg:x3; val_offset:3105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3105*FLEN/8, x4, x1, x2) - -inst_1036: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77e0000; valaddr_reg:x3; val_offset:3108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3108*FLEN/8, x4, x1, x2) - -inst_1037: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77f0000; valaddr_reg:x3; val_offset:3111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3111*FLEN/8, x4, x1, x2) - -inst_1038: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77f8000; valaddr_reg:x3; val_offset:3114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3114*FLEN/8, x4, x1, x2) - -inst_1039: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77fc000; valaddr_reg:x3; val_offset:3117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3117*FLEN/8, x4, x1, x2) - -inst_1040: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77fe000; valaddr_reg:x3; val_offset:3120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3120*FLEN/8, x4, x1, x2) - -inst_1041: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77ff000; valaddr_reg:x3; val_offset:3123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3123*FLEN/8, x4, x1, x2) - -inst_1042: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77ff800; valaddr_reg:x3; val_offset:3126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3126*FLEN/8, x4, x1, x2) - -inst_1043: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77ffc00; valaddr_reg:x3; val_offset:3129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3129*FLEN/8, x4, x1, x2) - -inst_1044: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77ffe00; valaddr_reg:x3; val_offset:3132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3132*FLEN/8, x4, x1, x2) - -inst_1045: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77fff00; valaddr_reg:x3; val_offset:3135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3135*FLEN/8, x4, x1, x2) - -inst_1046: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77fff80; valaddr_reg:x3; val_offset:3138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3138*FLEN/8, x4, x1, x2) - -inst_1047: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77fffc0; valaddr_reg:x3; val_offset:3141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3141*FLEN/8, x4, x1, x2) - -inst_1048: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77fffe0; valaddr_reg:x3; val_offset:3144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3144*FLEN/8, x4, x1, x2) - -inst_1049: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77ffff0; valaddr_reg:x3; val_offset:3147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3147*FLEN/8, x4, x1, x2) - -inst_1050: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77ffff8; valaddr_reg:x3; val_offset:3150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3150*FLEN/8, x4, x1, x2) - -inst_1051: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77ffffc; valaddr_reg:x3; val_offset:3153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3153*FLEN/8, x4, x1, x2) - -inst_1052: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77ffffe; valaddr_reg:x3; val_offset:3156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3156*FLEN/8, x4, x1, x2) - -inst_1053: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; -op3val:0x77fffff; valaddr_reg:x3; val_offset:3159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3159*FLEN/8, x4, x1, x2) - -inst_1054: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5800000; valaddr_reg:x3; val_offset:3162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3162*FLEN/8, x4, x1, x2) - -inst_1055: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5800001; valaddr_reg:x3; val_offset:3165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3165*FLEN/8, x4, x1, x2) - -inst_1056: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5800003; valaddr_reg:x3; val_offset:3168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3168*FLEN/8, x4, x1, x2) - -inst_1057: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5800007; valaddr_reg:x3; val_offset:3171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3171*FLEN/8, x4, x1, x2) - -inst_1058: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x580000f; valaddr_reg:x3; val_offset:3174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3174*FLEN/8, x4, x1, x2) - -inst_1059: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x580001f; valaddr_reg:x3; val_offset:3177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3177*FLEN/8, x4, x1, x2) - -inst_1060: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x580003f; valaddr_reg:x3; val_offset:3180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3180*FLEN/8, x4, x1, x2) - -inst_1061: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x580007f; valaddr_reg:x3; val_offset:3183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3183*FLEN/8, x4, x1, x2) - -inst_1062: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x58000ff; valaddr_reg:x3; val_offset:3186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3186*FLEN/8, x4, x1, x2) - -inst_1063: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x58001ff; valaddr_reg:x3; val_offset:3189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3189*FLEN/8, x4, x1, x2) - -inst_1064: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x58003ff; valaddr_reg:x3; val_offset:3192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3192*FLEN/8, x4, x1, x2) - -inst_1065: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x58007ff; valaddr_reg:x3; val_offset:3195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3195*FLEN/8, x4, x1, x2) - -inst_1066: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5800fff; valaddr_reg:x3; val_offset:3198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3198*FLEN/8, x4, x1, x2) - -inst_1067: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5801fff; valaddr_reg:x3; val_offset:3201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3201*FLEN/8, x4, x1, x2) - -inst_1068: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5803fff; valaddr_reg:x3; val_offset:3204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3204*FLEN/8, x4, x1, x2) - -inst_1069: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5807fff; valaddr_reg:x3; val_offset:3207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3207*FLEN/8, x4, x1, x2) - -inst_1070: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x580ffff; valaddr_reg:x3; val_offset:3210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3210*FLEN/8, x4, x1, x2) - -inst_1071: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x581ffff; valaddr_reg:x3; val_offset:3213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3213*FLEN/8, x4, x1, x2) - -inst_1072: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x583ffff; valaddr_reg:x3; val_offset:3216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3216*FLEN/8, x4, x1, x2) - -inst_1073: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x587ffff; valaddr_reg:x3; val_offset:3219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3219*FLEN/8, x4, x1, x2) - -inst_1074: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x58fffff; valaddr_reg:x3; val_offset:3222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3222*FLEN/8, x4, x1, x2) - -inst_1075: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x59fffff; valaddr_reg:x3; val_offset:3225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3225*FLEN/8, x4, x1, x2) - -inst_1076: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5bfffff; valaddr_reg:x3; val_offset:3228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3228*FLEN/8, x4, x1, x2) - -inst_1077: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5c00000; valaddr_reg:x3; val_offset:3231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3231*FLEN/8, x4, x1, x2) - -inst_1078: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5e00000; valaddr_reg:x3; val_offset:3234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3234*FLEN/8, x4, x1, x2) - -inst_1079: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5f00000; valaddr_reg:x3; val_offset:3237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3237*FLEN/8, x4, x1, x2) - -inst_1080: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5f80000; valaddr_reg:x3; val_offset:3240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3240*FLEN/8, x4, x1, x2) - -inst_1081: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fc0000; valaddr_reg:x3; val_offset:3243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3243*FLEN/8, x4, x1, x2) - -inst_1082: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fe0000; valaddr_reg:x3; val_offset:3246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3246*FLEN/8, x4, x1, x2) - -inst_1083: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ff0000; valaddr_reg:x3; val_offset:3249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3249*FLEN/8, x4, x1, x2) - -inst_1084: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ff8000; valaddr_reg:x3; val_offset:3252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3252*FLEN/8, x4, x1, x2) - -inst_1085: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ffc000; valaddr_reg:x3; val_offset:3255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3255*FLEN/8, x4, x1, x2) - -inst_1086: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ffe000; valaddr_reg:x3; val_offset:3258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3258*FLEN/8, x4, x1, x2) - -inst_1087: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fff000; valaddr_reg:x3; val_offset:3261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3261*FLEN/8, x4, x1, x2) - -inst_1088: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fff800; valaddr_reg:x3; val_offset:3264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3264*FLEN/8, x4, x1, x2) - -inst_1089: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fffc00; valaddr_reg:x3; val_offset:3267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3267*FLEN/8, x4, x1, x2) - -inst_1090: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fffe00; valaddr_reg:x3; val_offset:3270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3270*FLEN/8, x4, x1, x2) - -inst_1091: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ffff00; valaddr_reg:x3; val_offset:3273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3273*FLEN/8, x4, x1, x2) - -inst_1092: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ffff80; valaddr_reg:x3; val_offset:3276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3276*FLEN/8, x4, x1, x2) - -inst_1093: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ffffc0; valaddr_reg:x3; val_offset:3279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3279*FLEN/8, x4, x1, x2) - -inst_1094: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ffffe0; valaddr_reg:x3; val_offset:3282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3282*FLEN/8, x4, x1, x2) - -inst_1095: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fffff0; valaddr_reg:x3; val_offset:3285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3285*FLEN/8, x4, x1, x2) - -inst_1096: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fffff8; valaddr_reg:x3; val_offset:3288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3288*FLEN/8, x4, x1, x2) - -inst_1097: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fffffc; valaddr_reg:x3; val_offset:3291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3291*FLEN/8, x4, x1, x2) - -inst_1098: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5fffffe; valaddr_reg:x3; val_offset:3294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3294*FLEN/8, x4, x1, x2) - -inst_1099: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x5ffffff; valaddr_reg:x3; val_offset:3297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3297*FLEN/8, x4, x1, x2) - -inst_1100: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3f800001; valaddr_reg:x3; val_offset:3300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3300*FLEN/8, x4, x1, x2) - -inst_1101: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3f800003; valaddr_reg:x3; val_offset:3303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3303*FLEN/8, x4, x1, x2) - -inst_1102: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3f800007; valaddr_reg:x3; val_offset:3306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3306*FLEN/8, x4, x1, x2) - -inst_1103: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3f999999; valaddr_reg:x3; val_offset:3309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3309*FLEN/8, x4, x1, x2) - -inst_1104: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:3312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3312*FLEN/8, x4, x1, x2) - -inst_1105: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:3315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3315*FLEN/8, x4, x1, x2) - -inst_1106: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:3318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3318*FLEN/8, x4, x1, x2) - -inst_1107: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:3321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3321*FLEN/8, x4, x1, x2) - -inst_1108: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:3324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3324*FLEN/8, x4, x1, x2) - -inst_1109: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:3327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3327*FLEN/8, x4, x1, x2) - -inst_1110: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:3330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3330*FLEN/8, x4, x1, x2) - -inst_1111: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:3333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3333*FLEN/8, x4, x1, x2) - -inst_1112: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:3336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3336*FLEN/8, x4, x1, x2) - -inst_1113: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:3339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3339*FLEN/8, x4, x1, x2) - -inst_1114: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:3342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3342*FLEN/8, x4, x1, x2) - -inst_1115: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:3345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3345*FLEN/8, x4, x1, x2) - -inst_1116: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:3348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3348*FLEN/8, x4, x1, x2) - -inst_1117: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:3351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3351*FLEN/8, x4, x1, x2) - -inst_1118: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:3354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3354*FLEN/8, x4, x1, x2) - -inst_1119: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:3357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3357*FLEN/8, x4, x1, x2) - -inst_1120: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:3360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3360*FLEN/8, x4, x1, x2) - -inst_1121: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:3363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3363*FLEN/8, x4, x1, x2) - -inst_1122: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:3366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3366*FLEN/8, x4, x1, x2) - -inst_1123: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:3369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3369*FLEN/8, x4, x1, x2) - -inst_1124: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:3372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3372*FLEN/8, x4, x1, x2) - -inst_1125: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:3375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3375*FLEN/8, x4, x1, x2) - -inst_1126: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:3378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3378*FLEN/8, x4, x1, x2) - -inst_1127: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:3381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3381*FLEN/8, x4, x1, x2) - -inst_1128: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:3384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3384*FLEN/8, x4, x1, x2) - -inst_1129: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:3387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3387*FLEN/8, x4, x1, x2) - -inst_1130: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:3390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3390*FLEN/8, x4, x1, x2) - -inst_1131: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:3393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3393*FLEN/8, x4, x1, x2) - -inst_1132: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80800000; valaddr_reg:x3; val_offset:3396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3396*FLEN/8, x4, x1, x2) - -inst_1133: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:3399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3399*FLEN/8, x4, x1, x2) - -inst_1134: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:3402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3402*FLEN/8, x4, x1, x2) - -inst_1135: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:3405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3405*FLEN/8, x4, x1, x2) - -inst_1136: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8080000f; valaddr_reg:x3; val_offset:3408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3408*FLEN/8, x4, x1, x2) - -inst_1137: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8080001f; valaddr_reg:x3; val_offset:3411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3411*FLEN/8, x4, x1, x2) - -inst_1138: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8080003f; valaddr_reg:x3; val_offset:3414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3414*FLEN/8, x4, x1, x2) - -inst_1139: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8080007f; valaddr_reg:x3; val_offset:3417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3417*FLEN/8, x4, x1, x2) - -inst_1140: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x808000ff; valaddr_reg:x3; val_offset:3420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3420*FLEN/8, x4, x1, x2) - -inst_1141: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x808001ff; valaddr_reg:x3; val_offset:3423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3423*FLEN/8, x4, x1, x2) - -inst_1142: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x808003ff; valaddr_reg:x3; val_offset:3426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3426*FLEN/8, x4, x1, x2) - -inst_1143: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x808007ff; valaddr_reg:x3; val_offset:3429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3429*FLEN/8, x4, x1, x2) - -inst_1144: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80800fff; valaddr_reg:x3; val_offset:3432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3432*FLEN/8, x4, x1, x2) - -inst_1145: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80801fff; valaddr_reg:x3; val_offset:3435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3435*FLEN/8, x4, x1, x2) - -inst_1146: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80803fff; valaddr_reg:x3; val_offset:3438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3438*FLEN/8, x4, x1, x2) - -inst_1147: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80807fff; valaddr_reg:x3; val_offset:3441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3441*FLEN/8, x4, x1, x2) - -inst_1148: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8080ffff; valaddr_reg:x3; val_offset:3444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3444*FLEN/8, x4, x1, x2) - -inst_1149: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8081ffff; valaddr_reg:x3; val_offset:3447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3447*FLEN/8, x4, x1, x2) - -inst_1150: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8083ffff; valaddr_reg:x3; val_offset:3450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3450*FLEN/8, x4, x1, x2) - -inst_1151: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x8087ffff; valaddr_reg:x3; val_offset:3453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3453*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_10) - -inst_1152: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x808fffff; valaddr_reg:x3; val_offset:3456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3456*FLEN/8, x4, x1, x2) - -inst_1153: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x809fffff; valaddr_reg:x3; val_offset:3459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3459*FLEN/8, x4, x1, x2) - -inst_1154: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80bfffff; valaddr_reg:x3; val_offset:3462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3462*FLEN/8, x4, x1, x2) - -inst_1155: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80c00000; valaddr_reg:x3; val_offset:3465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3465*FLEN/8, x4, x1, x2) - -inst_1156: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80e00000; valaddr_reg:x3; val_offset:3468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3468*FLEN/8, x4, x1, x2) - -inst_1157: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80f00000; valaddr_reg:x3; val_offset:3471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3471*FLEN/8, x4, x1, x2) - -inst_1158: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80f80000; valaddr_reg:x3; val_offset:3474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3474*FLEN/8, x4, x1, x2) - -inst_1159: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fc0000; valaddr_reg:x3; val_offset:3477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3477*FLEN/8, x4, x1, x2) - -inst_1160: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fe0000; valaddr_reg:x3; val_offset:3480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3480*FLEN/8, x4, x1, x2) - -inst_1161: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ff0000; valaddr_reg:x3; val_offset:3483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3483*FLEN/8, x4, x1, x2) - -inst_1162: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ff8000; valaddr_reg:x3; val_offset:3486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3486*FLEN/8, x4, x1, x2) - -inst_1163: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ffc000; valaddr_reg:x3; val_offset:3489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3489*FLEN/8, x4, x1, x2) - -inst_1164: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ffe000; valaddr_reg:x3; val_offset:3492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3492*FLEN/8, x4, x1, x2) - -inst_1165: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fff000; valaddr_reg:x3; val_offset:3495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3495*FLEN/8, x4, x1, x2) - -inst_1166: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fff800; valaddr_reg:x3; val_offset:3498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3498*FLEN/8, x4, x1, x2) - -inst_1167: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fffc00; valaddr_reg:x3; val_offset:3501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3501*FLEN/8, x4, x1, x2) - -inst_1168: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fffe00; valaddr_reg:x3; val_offset:3504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3504*FLEN/8, x4, x1, x2) - -inst_1169: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ffff00; valaddr_reg:x3; val_offset:3507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3507*FLEN/8, x4, x1, x2) - -inst_1170: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ffff80; valaddr_reg:x3; val_offset:3510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3510*FLEN/8, x4, x1, x2) - -inst_1171: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ffffc0; valaddr_reg:x3; val_offset:3513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3513*FLEN/8, x4, x1, x2) - -inst_1172: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ffffe0; valaddr_reg:x3; val_offset:3516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3516*FLEN/8, x4, x1, x2) - -inst_1173: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fffff0; valaddr_reg:x3; val_offset:3519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3519*FLEN/8, x4, x1, x2) - -inst_1174: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:3522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3522*FLEN/8, x4, x1, x2) - -inst_1175: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:3525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3525*FLEN/8, x4, x1, x2) - -inst_1176: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:3528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3528*FLEN/8, x4, x1, x2) - -inst_1177: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; -op3val:0x80ffffff; valaddr_reg:x3; val_offset:3531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3531*FLEN/8, x4, x1, x2) - -inst_1178: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9000000; valaddr_reg:x3; val_offset:3534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3534*FLEN/8, x4, x1, x2) - -inst_1179: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9000001; valaddr_reg:x3; val_offset:3537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3537*FLEN/8, x4, x1, x2) - -inst_1180: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9000003; valaddr_reg:x3; val_offset:3540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3540*FLEN/8, x4, x1, x2) - -inst_1181: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9000007; valaddr_reg:x3; val_offset:3543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3543*FLEN/8, x4, x1, x2) - -inst_1182: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf900000f; valaddr_reg:x3; val_offset:3546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3546*FLEN/8, x4, x1, x2) - -inst_1183: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf900001f; valaddr_reg:x3; val_offset:3549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3549*FLEN/8, x4, x1, x2) - -inst_1184: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf900003f; valaddr_reg:x3; val_offset:3552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3552*FLEN/8, x4, x1, x2) - -inst_1185: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf900007f; valaddr_reg:x3; val_offset:3555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3555*FLEN/8, x4, x1, x2) - -inst_1186: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf90000ff; valaddr_reg:x3; val_offset:3558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3558*FLEN/8, x4, x1, x2) - -inst_1187: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf90001ff; valaddr_reg:x3; val_offset:3561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3561*FLEN/8, x4, x1, x2) - -inst_1188: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf90003ff; valaddr_reg:x3; val_offset:3564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3564*FLEN/8, x4, x1, x2) - -inst_1189: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf90007ff; valaddr_reg:x3; val_offset:3567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3567*FLEN/8, x4, x1, x2) - -inst_1190: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9000fff; valaddr_reg:x3; val_offset:3570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3570*FLEN/8, x4, x1, x2) - -inst_1191: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9001fff; valaddr_reg:x3; val_offset:3573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3573*FLEN/8, x4, x1, x2) - -inst_1192: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9003fff; valaddr_reg:x3; val_offset:3576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3576*FLEN/8, x4, x1, x2) - -inst_1193: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9007fff; valaddr_reg:x3; val_offset:3579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3579*FLEN/8, x4, x1, x2) - -inst_1194: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf900ffff; valaddr_reg:x3; val_offset:3582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3582*FLEN/8, x4, x1, x2) - -inst_1195: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf901ffff; valaddr_reg:x3; val_offset:3585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3585*FLEN/8, x4, x1, x2) - -inst_1196: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf903ffff; valaddr_reg:x3; val_offset:3588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3588*FLEN/8, x4, x1, x2) - -inst_1197: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf907ffff; valaddr_reg:x3; val_offset:3591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3591*FLEN/8, x4, x1, x2) - -inst_1198: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf90fffff; valaddr_reg:x3; val_offset:3594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3594*FLEN/8, x4, x1, x2) - -inst_1199: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf91fffff; valaddr_reg:x3; val_offset:3597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3597*FLEN/8, x4, x1, x2) - -inst_1200: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf93fffff; valaddr_reg:x3; val_offset:3600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3600*FLEN/8, x4, x1, x2) - -inst_1201: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9400000; valaddr_reg:x3; val_offset:3603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3603*FLEN/8, x4, x1, x2) - -inst_1202: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9600000; valaddr_reg:x3; val_offset:3606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3606*FLEN/8, x4, x1, x2) - -inst_1203: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9700000; valaddr_reg:x3; val_offset:3609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3609*FLEN/8, x4, x1, x2) - -inst_1204: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf9780000; valaddr_reg:x3; val_offset:3612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3612*FLEN/8, x4, x1, x2) - -inst_1205: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97c0000; valaddr_reg:x3; val_offset:3615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3615*FLEN/8, x4, x1, x2) - -inst_1206: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97e0000; valaddr_reg:x3; val_offset:3618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3618*FLEN/8, x4, x1, x2) - -inst_1207: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97f0000; valaddr_reg:x3; val_offset:3621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3621*FLEN/8, x4, x1, x2) - -inst_1208: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97f8000; valaddr_reg:x3; val_offset:3624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3624*FLEN/8, x4, x1, x2) - -inst_1209: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97fc000; valaddr_reg:x3; val_offset:3627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3627*FLEN/8, x4, x1, x2) - -inst_1210: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97fe000; valaddr_reg:x3; val_offset:3630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3630*FLEN/8, x4, x1, x2) - -inst_1211: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97ff000; valaddr_reg:x3; val_offset:3633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3633*FLEN/8, x4, x1, x2) - -inst_1212: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97ff800; valaddr_reg:x3; val_offset:3636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3636*FLEN/8, x4, x1, x2) - -inst_1213: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97ffc00; valaddr_reg:x3; val_offset:3639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3639*FLEN/8, x4, x1, x2) - -inst_1214: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97ffe00; valaddr_reg:x3; val_offset:3642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3642*FLEN/8, x4, x1, x2) - -inst_1215: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97fff00; valaddr_reg:x3; val_offset:3645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3645*FLEN/8, x4, x1, x2) - -inst_1216: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97fff80; valaddr_reg:x3; val_offset:3648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3648*FLEN/8, x4, x1, x2) - -inst_1217: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97fffc0; valaddr_reg:x3; val_offset:3651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3651*FLEN/8, x4, x1, x2) - -inst_1218: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97fffe0; valaddr_reg:x3; val_offset:3654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3654*FLEN/8, x4, x1, x2) - -inst_1219: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97ffff0; valaddr_reg:x3; val_offset:3657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3657*FLEN/8, x4, x1, x2) - -inst_1220: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97ffff8; valaddr_reg:x3; val_offset:3660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3660*FLEN/8, x4, x1, x2) - -inst_1221: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97ffffc; valaddr_reg:x3; val_offset:3663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3663*FLEN/8, x4, x1, x2) - -inst_1222: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97ffffe; valaddr_reg:x3; val_offset:3666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3666*FLEN/8, x4, x1, x2) - -inst_1223: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xf97fffff; valaddr_reg:x3; val_offset:3669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3669*FLEN/8, x4, x1, x2) - -inst_1224: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff000001; valaddr_reg:x3; val_offset:3672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3672*FLEN/8, x4, x1, x2) - -inst_1225: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff000003; valaddr_reg:x3; val_offset:3675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3675*FLEN/8, x4, x1, x2) - -inst_1226: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff000007; valaddr_reg:x3; val_offset:3678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3678*FLEN/8, x4, x1, x2) - -inst_1227: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff199999; valaddr_reg:x3; val_offset:3681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3681*FLEN/8, x4, x1, x2) - -inst_1228: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff249249; valaddr_reg:x3; val_offset:3684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3684*FLEN/8, x4, x1, x2) - -inst_1229: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff333333; valaddr_reg:x3; val_offset:3687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3687*FLEN/8, x4, x1, x2) - -inst_1230: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:3690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3690*FLEN/8, x4, x1, x2) - -inst_1231: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:3693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3693*FLEN/8, x4, x1, x2) - -inst_1232: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff444444; valaddr_reg:x3; val_offset:3696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3696*FLEN/8, x4, x1, x2) - -inst_1233: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:3699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3699*FLEN/8, x4, x1, x2) - -inst_1234: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:3702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3702*FLEN/8, x4, x1, x2) - -inst_1235: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff666666; valaddr_reg:x3; val_offset:3705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3705*FLEN/8, x4, x1, x2) - -inst_1236: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:3708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3708*FLEN/8, x4, x1, x2) - -inst_1237: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:3711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3711*FLEN/8, x4, x1, x2) - -inst_1238: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:3714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3714*FLEN/8, x4, x1, x2) - -inst_1239: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:3717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3717*FLEN/8, x4, x1, x2) - -inst_1240: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:3720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3720*FLEN/8, x4, x1, x2) - -inst_1241: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:3723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3723*FLEN/8, x4, x1, x2) - -inst_1242: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:3726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3726*FLEN/8, x4, x1, x2) - -inst_1243: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:3729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3729*FLEN/8, x4, x1, x2) - -inst_1244: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:3732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3732*FLEN/8, x4, x1, x2) - -inst_1245: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:3735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3735*FLEN/8, x4, x1, x2) - -inst_1246: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:3738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3738*FLEN/8, x4, x1, x2) - -inst_1247: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:3741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3741*FLEN/8, x4, x1, x2) - -inst_1248: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:3744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3744*FLEN/8, x4, x1, x2) - -inst_1249: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:3747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3747*FLEN/8, x4, x1, x2) - -inst_1250: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:3750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3750*FLEN/8, x4, x1, x2) - -inst_1251: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:3753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3753*FLEN/8, x4, x1, x2) - -inst_1252: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:3756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3756*FLEN/8, x4, x1, x2) - -inst_1253: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:3759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3759*FLEN/8, x4, x1, x2) - -inst_1254: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:3762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3762*FLEN/8, x4, x1, x2) - -inst_1255: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:3765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3765*FLEN/8, x4, x1, x2) - -inst_1256: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6800000; valaddr_reg:x3; val_offset:3768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3768*FLEN/8, x4, x1, x2) - -inst_1257: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6800001; valaddr_reg:x3; val_offset:3771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3771*FLEN/8, x4, x1, x2) - -inst_1258: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6800003; valaddr_reg:x3; val_offset:3774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3774*FLEN/8, x4, x1, x2) - -inst_1259: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6800007; valaddr_reg:x3; val_offset:3777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3777*FLEN/8, x4, x1, x2) - -inst_1260: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x680000f; valaddr_reg:x3; val_offset:3780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3780*FLEN/8, x4, x1, x2) - -inst_1261: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x680001f; valaddr_reg:x3; val_offset:3783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3783*FLEN/8, x4, x1, x2) - -inst_1262: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x680003f; valaddr_reg:x3; val_offset:3786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3786*FLEN/8, x4, x1, x2) - -inst_1263: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x680007f; valaddr_reg:x3; val_offset:3789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3789*FLEN/8, x4, x1, x2) - -inst_1264: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x68000ff; valaddr_reg:x3; val_offset:3792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3792*FLEN/8, x4, x1, x2) - -inst_1265: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x68001ff; valaddr_reg:x3; val_offset:3795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3795*FLEN/8, x4, x1, x2) - -inst_1266: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x68003ff; valaddr_reg:x3; val_offset:3798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3798*FLEN/8, x4, x1, x2) - -inst_1267: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x68007ff; valaddr_reg:x3; val_offset:3801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3801*FLEN/8, x4, x1, x2) - -inst_1268: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6800fff; valaddr_reg:x3; val_offset:3804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3804*FLEN/8, x4, x1, x2) - -inst_1269: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6801fff; valaddr_reg:x3; val_offset:3807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3807*FLEN/8, x4, x1, x2) - -inst_1270: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6803fff; valaddr_reg:x3; val_offset:3810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3810*FLEN/8, x4, x1, x2) - -inst_1271: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6807fff; valaddr_reg:x3; val_offset:3813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3813*FLEN/8, x4, x1, x2) - -inst_1272: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x680ffff; valaddr_reg:x3; val_offset:3816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3816*FLEN/8, x4, x1, x2) - -inst_1273: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x681ffff; valaddr_reg:x3; val_offset:3819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3819*FLEN/8, x4, x1, x2) - -inst_1274: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x683ffff; valaddr_reg:x3; val_offset:3822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3822*FLEN/8, x4, x1, x2) - -inst_1275: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x687ffff; valaddr_reg:x3; val_offset:3825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3825*FLEN/8, x4, x1, x2) - -inst_1276: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x68fffff; valaddr_reg:x3; val_offset:3828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3828*FLEN/8, x4, x1, x2) - -inst_1277: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x69fffff; valaddr_reg:x3; val_offset:3831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3831*FLEN/8, x4, x1, x2) - -inst_1278: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6bfffff; valaddr_reg:x3; val_offset:3834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3834*FLEN/8, x4, x1, x2) - -inst_1279: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6c00000; valaddr_reg:x3; val_offset:3837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3837*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_11) - -inst_1280: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6e00000; valaddr_reg:x3; val_offset:3840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3840*FLEN/8, x4, x1, x2) - -inst_1281: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6f00000; valaddr_reg:x3; val_offset:3843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3843*FLEN/8, x4, x1, x2) - -inst_1282: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6f80000; valaddr_reg:x3; val_offset:3846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3846*FLEN/8, x4, x1, x2) - -inst_1283: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fc0000; valaddr_reg:x3; val_offset:3849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3849*FLEN/8, x4, x1, x2) - -inst_1284: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fe0000; valaddr_reg:x3; val_offset:3852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3852*FLEN/8, x4, x1, x2) - -inst_1285: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ff0000; valaddr_reg:x3; val_offset:3855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3855*FLEN/8, x4, x1, x2) - -inst_1286: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ff8000; valaddr_reg:x3; val_offset:3858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3858*FLEN/8, x4, x1, x2) - -inst_1287: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ffc000; valaddr_reg:x3; val_offset:3861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3861*FLEN/8, x4, x1, x2) - -inst_1288: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ffe000; valaddr_reg:x3; val_offset:3864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3864*FLEN/8, x4, x1, x2) - -inst_1289: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fff000; valaddr_reg:x3; val_offset:3867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3867*FLEN/8, x4, x1, x2) - -inst_1290: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fff800; valaddr_reg:x3; val_offset:3870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3870*FLEN/8, x4, x1, x2) - -inst_1291: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fffc00; valaddr_reg:x3; val_offset:3873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3873*FLEN/8, x4, x1, x2) - -inst_1292: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fffe00; valaddr_reg:x3; val_offset:3876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3876*FLEN/8, x4, x1, x2) - -inst_1293: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ffff00; valaddr_reg:x3; val_offset:3879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3879*FLEN/8, x4, x1, x2) - -inst_1294: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ffff80; valaddr_reg:x3; val_offset:3882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3882*FLEN/8, x4, x1, x2) - -inst_1295: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ffffc0; valaddr_reg:x3; val_offset:3885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3885*FLEN/8, x4, x1, x2) - -inst_1296: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ffffe0; valaddr_reg:x3; val_offset:3888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3888*FLEN/8, x4, x1, x2) - -inst_1297: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fffff0; valaddr_reg:x3; val_offset:3891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3891*FLEN/8, x4, x1, x2) - -inst_1298: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fffff8; valaddr_reg:x3; val_offset:3894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3894*FLEN/8, x4, x1, x2) - -inst_1299: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fffffc; valaddr_reg:x3; val_offset:3897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3897*FLEN/8, x4, x1, x2) - -inst_1300: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6fffffe; valaddr_reg:x3; val_offset:3900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3900*FLEN/8, x4, x1, x2) - -inst_1301: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; -op3val:0x6ffffff; valaddr_reg:x3; val_offset:3903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3903*FLEN/8, x4, x1, x2) - -inst_1302: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbf800001; valaddr_reg:x3; val_offset:3906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3906*FLEN/8, x4, x1, x2) - -inst_1303: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbf800003; valaddr_reg:x3; val_offset:3909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3909*FLEN/8, x4, x1, x2) - -inst_1304: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbf800007; valaddr_reg:x3; val_offset:3912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3912*FLEN/8, x4, x1, x2) - -inst_1305: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbf999999; valaddr_reg:x3; val_offset:3915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3915*FLEN/8, x4, x1, x2) - -inst_1306: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:3918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3918*FLEN/8, x4, x1, x2) - -inst_1307: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:3921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3921*FLEN/8, x4, x1, x2) - -inst_1308: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:3924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3924*FLEN/8, x4, x1, x2) - -inst_1309: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:3927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3927*FLEN/8, x4, x1, x2) - -inst_1310: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:3930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3930*FLEN/8, x4, x1, x2) - -inst_1311: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:3933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3933*FLEN/8, x4, x1, x2) - -inst_1312: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:3936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3936*FLEN/8, x4, x1, x2) - -inst_1313: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:3939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3939*FLEN/8, x4, x1, x2) - -inst_1314: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:3942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3942*FLEN/8, x4, x1, x2) - -inst_1315: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:3945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3945*FLEN/8, x4, x1, x2) - -inst_1316: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:3948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3948*FLEN/8, x4, x1, x2) - -inst_1317: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:3951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3951*FLEN/8, x4, x1, x2) - -inst_1318: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf800000; valaddr_reg:x3; val_offset:3954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3954*FLEN/8, x4, x1, x2) - -inst_1319: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf800001; valaddr_reg:x3; val_offset:3957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3957*FLEN/8, x4, x1, x2) - -inst_1320: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf800003; valaddr_reg:x3; val_offset:3960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3960*FLEN/8, x4, x1, x2) - -inst_1321: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf800007; valaddr_reg:x3; val_offset:3963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3963*FLEN/8, x4, x1, x2) - -inst_1322: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf80000f; valaddr_reg:x3; val_offset:3966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3966*FLEN/8, x4, x1, x2) - -inst_1323: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf80001f; valaddr_reg:x3; val_offset:3969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3969*FLEN/8, x4, x1, x2) - -inst_1324: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf80003f; valaddr_reg:x3; val_offset:3972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3972*FLEN/8, x4, x1, x2) - -inst_1325: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf80007f; valaddr_reg:x3; val_offset:3975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3975*FLEN/8, x4, x1, x2) - -inst_1326: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf8000ff; valaddr_reg:x3; val_offset:3978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3978*FLEN/8, x4, x1, x2) - -inst_1327: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf8001ff; valaddr_reg:x3; val_offset:3981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3981*FLEN/8, x4, x1, x2) - -inst_1328: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf8003ff; valaddr_reg:x3; val_offset:3984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3984*FLEN/8, x4, x1, x2) - -inst_1329: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf8007ff; valaddr_reg:x3; val_offset:3987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3987*FLEN/8, x4, x1, x2) - -inst_1330: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf800fff; valaddr_reg:x3; val_offset:3990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3990*FLEN/8, x4, x1, x2) - -inst_1331: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf801fff; valaddr_reg:x3; val_offset:3993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3993*FLEN/8, x4, x1, x2) - -inst_1332: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf803fff; valaddr_reg:x3; val_offset:3996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3996*FLEN/8, x4, x1, x2) - -inst_1333: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf807fff; valaddr_reg:x3; val_offset:3999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3999*FLEN/8, x4, x1, x2) - -inst_1334: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf80ffff; valaddr_reg:x3; val_offset:4002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4002*FLEN/8, x4, x1, x2) - -inst_1335: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf81ffff; valaddr_reg:x3; val_offset:4005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4005*FLEN/8, x4, x1, x2) - -inst_1336: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf83ffff; valaddr_reg:x3; val_offset:4008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4008*FLEN/8, x4, x1, x2) - -inst_1337: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf87ffff; valaddr_reg:x3; val_offset:4011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4011*FLEN/8, x4, x1, x2) - -inst_1338: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf8fffff; valaddr_reg:x3; val_offset:4014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4014*FLEN/8, x4, x1, x2) - -inst_1339: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcf9fffff; valaddr_reg:x3; val_offset:4017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4017*FLEN/8, x4, x1, x2) - -inst_1340: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfbfffff; valaddr_reg:x3; val_offset:4020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4020*FLEN/8, x4, x1, x2) - -inst_1341: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfc00000; valaddr_reg:x3; val_offset:4023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4023*FLEN/8, x4, x1, x2) - -inst_1342: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfe00000; valaddr_reg:x3; val_offset:4026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4026*FLEN/8, x4, x1, x2) - -inst_1343: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcff00000; valaddr_reg:x3; val_offset:4029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4029*FLEN/8, x4, x1, x2) - -inst_1344: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcff80000; valaddr_reg:x3; val_offset:4032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4032*FLEN/8, x4, x1, x2) - -inst_1345: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffc0000; valaddr_reg:x3; val_offset:4035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4035*FLEN/8, x4, x1, x2) - -inst_1346: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffe0000; valaddr_reg:x3; val_offset:4038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4038*FLEN/8, x4, x1, x2) - -inst_1347: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfff0000; valaddr_reg:x3; val_offset:4041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4041*FLEN/8, x4, x1, x2) - -inst_1348: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfff8000; valaddr_reg:x3; val_offset:4044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4044*FLEN/8, x4, x1, x2) - -inst_1349: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfffc000; valaddr_reg:x3; val_offset:4047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4047*FLEN/8, x4, x1, x2) - -inst_1350: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfffe000; valaddr_reg:x3; val_offset:4050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4050*FLEN/8, x4, x1, x2) - -inst_1351: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffff000; valaddr_reg:x3; val_offset:4053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4053*FLEN/8, x4, x1, x2) - -inst_1352: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffff800; valaddr_reg:x3; val_offset:4056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4056*FLEN/8, x4, x1, x2) - -inst_1353: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffffc00; valaddr_reg:x3; val_offset:4059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4059*FLEN/8, x4, x1, x2) - -inst_1354: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffffe00; valaddr_reg:x3; val_offset:4062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4062*FLEN/8, x4, x1, x2) - -inst_1355: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfffff00; valaddr_reg:x3; val_offset:4065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4065*FLEN/8, x4, x1, x2) - -inst_1356: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfffff80; valaddr_reg:x3; val_offset:4068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4068*FLEN/8, x4, x1, x2) - -inst_1357: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfffffc0; valaddr_reg:x3; val_offset:4071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4071*FLEN/8, x4, x1, x2) - -inst_1358: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfffffe0; valaddr_reg:x3; val_offset:4074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4074*FLEN/8, x4, x1, x2) - -inst_1359: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffffff0; valaddr_reg:x3; val_offset:4077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4077*FLEN/8, x4, x1, x2) - -inst_1360: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffffff8; valaddr_reg:x3; val_offset:4080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4080*FLEN/8, x4, x1, x2) - -inst_1361: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffffffc; valaddr_reg:x3; val_offset:4083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4083*FLEN/8, x4, x1, x2) - -inst_1362: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcffffffe; valaddr_reg:x3; val_offset:4086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4086*FLEN/8, x4, x1, x2) - -inst_1363: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; -op3val:0xcfffffff; valaddr_reg:x3; val_offset:4089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4089*FLEN/8, x4, x1, x2) - -inst_1364: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x0; valaddr_reg:x3; val_offset:4092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4092*FLEN/8, x4, x1, x2) - -inst_1365: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:4095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4095*FLEN/8, x4, x1, x2) - -inst_1366: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:4098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4098*FLEN/8, x4, x1, x2) - -inst_1367: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:4101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4101*FLEN/8, x4, x1, x2) - -inst_1368: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xf; valaddr_reg:x3; val_offset:4104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4104*FLEN/8, x4, x1, x2) - -inst_1369: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x1f; valaddr_reg:x3; val_offset:4107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4107*FLEN/8, x4, x1, x2) - -inst_1370: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x3f; valaddr_reg:x3; val_offset:4110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4110*FLEN/8, x4, x1, x2) - -inst_1371: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7f; valaddr_reg:x3; val_offset:4113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4113*FLEN/8, x4, x1, x2) - -inst_1372: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xff; valaddr_reg:x3; val_offset:4116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4116*FLEN/8, x4, x1, x2) - -inst_1373: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x1ff; valaddr_reg:x3; val_offset:4119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4119*FLEN/8, x4, x1, x2) - -inst_1374: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x3ff; valaddr_reg:x3; val_offset:4122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4122*FLEN/8, x4, x1, x2) - -inst_1375: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ff; valaddr_reg:x3; val_offset:4125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4125*FLEN/8, x4, x1, x2) - -inst_1376: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xfff; valaddr_reg:x3; val_offset:4128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4128*FLEN/8, x4, x1, x2) - -inst_1377: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x1fff; valaddr_reg:x3; val_offset:4131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4131*FLEN/8, x4, x1, x2) - -inst_1378: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x3fff; valaddr_reg:x3; val_offset:4134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4134*FLEN/8, x4, x1, x2) - -inst_1379: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7fff; valaddr_reg:x3; val_offset:4137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4137*FLEN/8, x4, x1, x2) - -inst_1380: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xffff; valaddr_reg:x3; val_offset:4140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4140*FLEN/8, x4, x1, x2) - -inst_1381: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x1ffff; valaddr_reg:x3; val_offset:4143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4143*FLEN/8, x4, x1, x2) - -inst_1382: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x3ffff; valaddr_reg:x3; val_offset:4146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4146*FLEN/8, x4, x1, x2) - -inst_1383: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ffff; valaddr_reg:x3; val_offset:4149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4149*FLEN/8, x4, x1, x2) - -inst_1384: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xfffff; valaddr_reg:x3; val_offset:4152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4152*FLEN/8, x4, x1, x2) - -inst_1385: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x1fffff; valaddr_reg:x3; val_offset:4155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4155*FLEN/8, x4, x1, x2) - -inst_1386: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x3fffff; valaddr_reg:x3; val_offset:4158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4158*FLEN/8, x4, x1, x2) - -inst_1387: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x400000; valaddr_reg:x3; val_offset:4161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4161*FLEN/8, x4, x1, x2) - -inst_1388: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x600000; valaddr_reg:x3; val_offset:4164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4164*FLEN/8, x4, x1, x2) - -inst_1389: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x700000; valaddr_reg:x3; val_offset:4167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4167*FLEN/8, x4, x1, x2) - -inst_1390: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x780000; valaddr_reg:x3; val_offset:4170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4170*FLEN/8, x4, x1, x2) - -inst_1391: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7c0000; valaddr_reg:x3; val_offset:4173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4173*FLEN/8, x4, x1, x2) - -inst_1392: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7e0000; valaddr_reg:x3; val_offset:4176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4176*FLEN/8, x4, x1, x2) - -inst_1393: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7f0000; valaddr_reg:x3; val_offset:4179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4179*FLEN/8, x4, x1, x2) - -inst_1394: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7f8000; valaddr_reg:x3; val_offset:4182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4182*FLEN/8, x4, x1, x2) - -inst_1395: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7fc000; valaddr_reg:x3; val_offset:4185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4185*FLEN/8, x4, x1, x2) - -inst_1396: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7fe000; valaddr_reg:x3; val_offset:4188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4188*FLEN/8, x4, x1, x2) - -inst_1397: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ff000; valaddr_reg:x3; val_offset:4191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4191*FLEN/8, x4, x1, x2) - -inst_1398: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ff800; valaddr_reg:x3; val_offset:4194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4194*FLEN/8, x4, x1, x2) - -inst_1399: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ffc00; valaddr_reg:x3; val_offset:4197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4197*FLEN/8, x4, x1, x2) - -inst_1400: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ffe00; valaddr_reg:x3; val_offset:4200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4200*FLEN/8, x4, x1, x2) - -inst_1401: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7fff00; valaddr_reg:x3; val_offset:4203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4203*FLEN/8, x4, x1, x2) - -inst_1402: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7fff80; valaddr_reg:x3; val_offset:4206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4206*FLEN/8, x4, x1, x2) - -inst_1403: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7fffc0; valaddr_reg:x3; val_offset:4209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4209*FLEN/8, x4, x1, x2) - -inst_1404: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7fffe0; valaddr_reg:x3; val_offset:4212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4212*FLEN/8, x4, x1, x2) - -inst_1405: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ffff0; valaddr_reg:x3; val_offset:4215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4215*FLEN/8, x4, x1, x2) - -inst_1406: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:4218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4218*FLEN/8, x4, x1, x2) - -inst_1407: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:4221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4221*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_12) - -inst_1408: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:4224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4224*FLEN/8, x4, x1, x2) - -inst_1409: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x7fffff; valaddr_reg:x3; val_offset:4227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4227*FLEN/8, x4, x1, x2) - -inst_1410: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:4230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4230*FLEN/8, x4, x1, x2) - -inst_1411: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:4233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4233*FLEN/8, x4, x1, x2) - -inst_1412: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:4236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4236*FLEN/8, x4, x1, x2) - -inst_1413: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:4239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4239*FLEN/8, x4, x1, x2) - -inst_1414: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:4242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4242*FLEN/8, x4, x1, x2) - -inst_1415: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:4245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4245*FLEN/8, x4, x1, x2) - -inst_1416: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:4248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4248*FLEN/8, x4, x1, x2) - -inst_1417: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:4251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4251*FLEN/8, x4, x1, x2) - -inst_1418: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:4254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4254*FLEN/8, x4, x1, x2) - -inst_1419: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:4257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4257*FLEN/8, x4, x1, x2) - -inst_1420: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:4260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4260*FLEN/8, x4, x1, x2) - -inst_1421: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:4263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4263*FLEN/8, x4, x1, x2) - -inst_1422: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:4266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4266*FLEN/8, x4, x1, x2) - -inst_1423: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:4269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4269*FLEN/8, x4, x1, x2) - -inst_1424: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:4272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4272*FLEN/8, x4, x1, x2) - -inst_1425: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:4275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4275*FLEN/8, x4, x1, x2) - -inst_1426: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21000000; valaddr_reg:x3; val_offset:4278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4278*FLEN/8, x4, x1, x2) - -inst_1427: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21000001; valaddr_reg:x3; val_offset:4281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4281*FLEN/8, x4, x1, x2) - -inst_1428: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21000003; valaddr_reg:x3; val_offset:4284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4284*FLEN/8, x4, x1, x2) - -inst_1429: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21000007; valaddr_reg:x3; val_offset:4287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4287*FLEN/8, x4, x1, x2) - -inst_1430: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x2100000f; valaddr_reg:x3; val_offset:4290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4290*FLEN/8, x4, x1, x2) - -inst_1431: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x2100001f; valaddr_reg:x3; val_offset:4293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4293*FLEN/8, x4, x1, x2) - -inst_1432: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x2100003f; valaddr_reg:x3; val_offset:4296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4296*FLEN/8, x4, x1, x2) - -inst_1433: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x2100007f; valaddr_reg:x3; val_offset:4299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4299*FLEN/8, x4, x1, x2) - -inst_1434: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x210000ff; valaddr_reg:x3; val_offset:4302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4302*FLEN/8, x4, x1, x2) - -inst_1435: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x210001ff; valaddr_reg:x3; val_offset:4305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4305*FLEN/8, x4, x1, x2) - -inst_1436: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x210003ff; valaddr_reg:x3; val_offset:4308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4308*FLEN/8, x4, x1, x2) - -inst_1437: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x210007ff; valaddr_reg:x3; val_offset:4311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4311*FLEN/8, x4, x1, x2) - -inst_1438: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21000fff; valaddr_reg:x3; val_offset:4314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4314*FLEN/8, x4, x1, x2) - -inst_1439: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21001fff; valaddr_reg:x3; val_offset:4317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4317*FLEN/8, x4, x1, x2) - -inst_1440: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21003fff; valaddr_reg:x3; val_offset:4320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4320*FLEN/8, x4, x1, x2) - -inst_1441: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21007fff; valaddr_reg:x3; val_offset:4323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4323*FLEN/8, x4, x1, x2) - -inst_1442: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x2100ffff; valaddr_reg:x3; val_offset:4326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4326*FLEN/8, x4, x1, x2) - -inst_1443: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x2101ffff; valaddr_reg:x3; val_offset:4329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4329*FLEN/8, x4, x1, x2) - -inst_1444: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x2103ffff; valaddr_reg:x3; val_offset:4332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4332*FLEN/8, x4, x1, x2) - -inst_1445: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x2107ffff; valaddr_reg:x3; val_offset:4335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4335*FLEN/8, x4, x1, x2) - -inst_1446: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x210fffff; valaddr_reg:x3; val_offset:4338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4338*FLEN/8, x4, x1, x2) - -inst_1447: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x211fffff; valaddr_reg:x3; val_offset:4341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4341*FLEN/8, x4, x1, x2) - -inst_1448: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x213fffff; valaddr_reg:x3; val_offset:4344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4344*FLEN/8, x4, x1, x2) - -inst_1449: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21400000; valaddr_reg:x3; val_offset:4347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4347*FLEN/8, x4, x1, x2) - -inst_1450: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21600000; valaddr_reg:x3; val_offset:4350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4350*FLEN/8, x4, x1, x2) - -inst_1451: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21700000; valaddr_reg:x3; val_offset:4353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4353*FLEN/8, x4, x1, x2) - -inst_1452: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x21780000; valaddr_reg:x3; val_offset:4356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4356*FLEN/8, x4, x1, x2) - -inst_1453: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217c0000; valaddr_reg:x3; val_offset:4359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4359*FLEN/8, x4, x1, x2) - -inst_1454: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217e0000; valaddr_reg:x3; val_offset:4362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4362*FLEN/8, x4, x1, x2) - -inst_1455: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217f0000; valaddr_reg:x3; val_offset:4365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4365*FLEN/8, x4, x1, x2) - -inst_1456: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217f8000; valaddr_reg:x3; val_offset:4368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4368*FLEN/8, x4, x1, x2) - -inst_1457: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217fc000; valaddr_reg:x3; val_offset:4371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4371*FLEN/8, x4, x1, x2) - -inst_1458: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217fe000; valaddr_reg:x3; val_offset:4374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4374*FLEN/8, x4, x1, x2) - -inst_1459: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217ff000; valaddr_reg:x3; val_offset:4377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4377*FLEN/8, x4, x1, x2) - -inst_1460: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217ff800; valaddr_reg:x3; val_offset:4380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4380*FLEN/8, x4, x1, x2) - -inst_1461: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217ffc00; valaddr_reg:x3; val_offset:4383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4383*FLEN/8, x4, x1, x2) - -inst_1462: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217ffe00; valaddr_reg:x3; val_offset:4386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4386*FLEN/8, x4, x1, x2) - -inst_1463: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217fff00; valaddr_reg:x3; val_offset:4389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4389*FLEN/8, x4, x1, x2) - -inst_1464: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217fff80; valaddr_reg:x3; val_offset:4392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4392*FLEN/8, x4, x1, x2) - -inst_1465: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217fffc0; valaddr_reg:x3; val_offset:4395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4395*FLEN/8, x4, x1, x2) - -inst_1466: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217fffe0; valaddr_reg:x3; val_offset:4398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4398*FLEN/8, x4, x1, x2) - -inst_1467: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217ffff0; valaddr_reg:x3; val_offset:4401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4401*FLEN/8, x4, x1, x2) - -inst_1468: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217ffff8; valaddr_reg:x3; val_offset:4404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4404*FLEN/8, x4, x1, x2) - -inst_1469: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217ffffc; valaddr_reg:x3; val_offset:4407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4407*FLEN/8, x4, x1, x2) - -inst_1470: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217ffffe; valaddr_reg:x3; val_offset:4410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4410*FLEN/8, x4, x1, x2) - -inst_1471: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x217fffff; valaddr_reg:x3; val_offset:4413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4413*FLEN/8, x4, x1, x2) - -inst_1472: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3f800001; valaddr_reg:x3; val_offset:4416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4416*FLEN/8, x4, x1, x2) - -inst_1473: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3f800003; valaddr_reg:x3; val_offset:4419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4419*FLEN/8, x4, x1, x2) - -inst_1474: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3f800007; valaddr_reg:x3; val_offset:4422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4422*FLEN/8, x4, x1, x2) - -inst_1475: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3f999999; valaddr_reg:x3; val_offset:4425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4425*FLEN/8, x4, x1, x2) - -inst_1476: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:4428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4428*FLEN/8, x4, x1, x2) - -inst_1477: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:4431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4431*FLEN/8, x4, x1, x2) - -inst_1478: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:4434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4434*FLEN/8, x4, x1, x2) - -inst_1479: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:4437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4437*FLEN/8, x4, x1, x2) - -inst_1480: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:4440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4440*FLEN/8, x4, x1, x2) - -inst_1481: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:4443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4443*FLEN/8, x4, x1, x2) - -inst_1482: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:4446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4446*FLEN/8, x4, x1, x2) - -inst_1483: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:4449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4449*FLEN/8, x4, x1, x2) - -inst_1484: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:4452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4452*FLEN/8, x4, x1, x2) - -inst_1485: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:4455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4455*FLEN/8, x4, x1, x2) - -inst_1486: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:4458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4458*FLEN/8, x4, x1, x2) - -inst_1487: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:4461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4461*FLEN/8, x4, x1, x2) - -inst_1488: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf000000; valaddr_reg:x3; val_offset:4464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4464*FLEN/8, x4, x1, x2) - -inst_1489: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf000001; valaddr_reg:x3; val_offset:4467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4467*FLEN/8, x4, x1, x2) - -inst_1490: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf000003; valaddr_reg:x3; val_offset:4470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4470*FLEN/8, x4, x1, x2) - -inst_1491: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf000007; valaddr_reg:x3; val_offset:4473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4473*FLEN/8, x4, x1, x2) - -inst_1492: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf00000f; valaddr_reg:x3; val_offset:4476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4476*FLEN/8, x4, x1, x2) - -inst_1493: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf00001f; valaddr_reg:x3; val_offset:4479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4479*FLEN/8, x4, x1, x2) - -inst_1494: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf00003f; valaddr_reg:x3; val_offset:4482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4482*FLEN/8, x4, x1, x2) - -inst_1495: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf00007f; valaddr_reg:x3; val_offset:4485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4485*FLEN/8, x4, x1, x2) - -inst_1496: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf0000ff; valaddr_reg:x3; val_offset:4488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4488*FLEN/8, x4, x1, x2) - -inst_1497: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf0001ff; valaddr_reg:x3; val_offset:4491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4491*FLEN/8, x4, x1, x2) - -inst_1498: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf0003ff; valaddr_reg:x3; val_offset:4494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4494*FLEN/8, x4, x1, x2) - -inst_1499: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf0007ff; valaddr_reg:x3; val_offset:4497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4497*FLEN/8, x4, x1, x2) - -inst_1500: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf000fff; valaddr_reg:x3; val_offset:4500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4500*FLEN/8, x4, x1, x2) - -inst_1501: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf001fff; valaddr_reg:x3; val_offset:4503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4503*FLEN/8, x4, x1, x2) - -inst_1502: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf003fff; valaddr_reg:x3; val_offset:4506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4506*FLEN/8, x4, x1, x2) - -inst_1503: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf007fff; valaddr_reg:x3; val_offset:4509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4509*FLEN/8, x4, x1, x2) - -inst_1504: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf00ffff; valaddr_reg:x3; val_offset:4512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4512*FLEN/8, x4, x1, x2) - -inst_1505: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf01ffff; valaddr_reg:x3; val_offset:4515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4515*FLEN/8, x4, x1, x2) - -inst_1506: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf03ffff; valaddr_reg:x3; val_offset:4518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4518*FLEN/8, x4, x1, x2) - -inst_1507: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf07ffff; valaddr_reg:x3; val_offset:4521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4521*FLEN/8, x4, x1, x2) - -inst_1508: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf0fffff; valaddr_reg:x3; val_offset:4524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4524*FLEN/8, x4, x1, x2) - -inst_1509: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf1fffff; valaddr_reg:x3; val_offset:4527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4527*FLEN/8, x4, x1, x2) - -inst_1510: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf3fffff; valaddr_reg:x3; val_offset:4530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4530*FLEN/8, x4, x1, x2) - -inst_1511: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf400000; valaddr_reg:x3; val_offset:4533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4533*FLEN/8, x4, x1, x2) - -inst_1512: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf600000; valaddr_reg:x3; val_offset:4536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4536*FLEN/8, x4, x1, x2) - -inst_1513: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf700000; valaddr_reg:x3; val_offset:4539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4539*FLEN/8, x4, x1, x2) - -inst_1514: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf780000; valaddr_reg:x3; val_offset:4542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4542*FLEN/8, x4, x1, x2) - -inst_1515: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7c0000; valaddr_reg:x3; val_offset:4545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4545*FLEN/8, x4, x1, x2) - -inst_1516: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7e0000; valaddr_reg:x3; val_offset:4548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4548*FLEN/8, x4, x1, x2) - -inst_1517: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7f0000; valaddr_reg:x3; val_offset:4551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4551*FLEN/8, x4, x1, x2) - -inst_1518: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7f8000; valaddr_reg:x3; val_offset:4554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4554*FLEN/8, x4, x1, x2) - -inst_1519: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7fc000; valaddr_reg:x3; val_offset:4557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4557*FLEN/8, x4, x1, x2) - -inst_1520: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7fe000; valaddr_reg:x3; val_offset:4560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4560*FLEN/8, x4, x1, x2) - -inst_1521: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7ff000; valaddr_reg:x3; val_offset:4563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4563*FLEN/8, x4, x1, x2) - -inst_1522: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7ff800; valaddr_reg:x3; val_offset:4566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4566*FLEN/8, x4, x1, x2) - -inst_1523: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7ffc00; valaddr_reg:x3; val_offset:4569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4569*FLEN/8, x4, x1, x2) - -inst_1524: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7ffe00; valaddr_reg:x3; val_offset:4572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4572*FLEN/8, x4, x1, x2) - -inst_1525: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7fff00; valaddr_reg:x3; val_offset:4575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4575*FLEN/8, x4, x1, x2) - -inst_1526: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7fff80; valaddr_reg:x3; val_offset:4578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4578*FLEN/8, x4, x1, x2) - -inst_1527: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7fffc0; valaddr_reg:x3; val_offset:4581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4581*FLEN/8, x4, x1, x2) - -inst_1528: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7fffe0; valaddr_reg:x3; val_offset:4584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4584*FLEN/8, x4, x1, x2) - -inst_1529: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7ffff0; valaddr_reg:x3; val_offset:4587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4587*FLEN/8, x4, x1, x2) - -inst_1530: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7ffff8; valaddr_reg:x3; val_offset:4590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4590*FLEN/8, x4, x1, x2) - -inst_1531: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7ffffc; valaddr_reg:x3; val_offset:4593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4593*FLEN/8, x4, x1, x2) - -inst_1532: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7ffffe; valaddr_reg:x3; val_offset:4596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4596*FLEN/8, x4, x1, x2) - -inst_1533: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xaf7fffff; valaddr_reg:x3; val_offset:4599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4599*FLEN/8, x4, x1, x2) - -inst_1534: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbf800001; valaddr_reg:x3; val_offset:4602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4602*FLEN/8, x4, x1, x2) - -inst_1535: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbf800003; valaddr_reg:x3; val_offset:4605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4605*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_13) - -inst_1536: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbf800007; valaddr_reg:x3; val_offset:4608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4608*FLEN/8, x4, x1, x2) - -inst_1537: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbf999999; valaddr_reg:x3; val_offset:4611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4611*FLEN/8, x4, x1, x2) - -inst_1538: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:4614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4614*FLEN/8, x4, x1, x2) - -inst_1539: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:4617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4617*FLEN/8, x4, x1, x2) - -inst_1540: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:4620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4620*FLEN/8, x4, x1, x2) - -inst_1541: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:4623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4623*FLEN/8, x4, x1, x2) - -inst_1542: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:4626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4626*FLEN/8, x4, x1, x2) - -inst_1543: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:4629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4629*FLEN/8, x4, x1, x2) - -inst_1544: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:4632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4632*FLEN/8, x4, x1, x2) - -inst_1545: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:4635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4635*FLEN/8, x4, x1, x2) - -inst_1546: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:4638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4638*FLEN/8, x4, x1, x2) - -inst_1547: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:4641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4641*FLEN/8, x4, x1, x2) - -inst_1548: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:4644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4644*FLEN/8, x4, x1, x2) - -inst_1549: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:4647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4647*FLEN/8, x4, x1, x2) - -inst_1550: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:4650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4650*FLEN/8, x4, x1, x2) - -inst_1551: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:4653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4653*FLEN/8, x4, x1, x2) - -inst_1552: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:4656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4656*FLEN/8, x4, x1, x2) - -inst_1553: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:4659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4659*FLEN/8, x4, x1, x2) - -inst_1554: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:4662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4662*FLEN/8, x4, x1, x2) - -inst_1555: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:4665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4665*FLEN/8, x4, x1, x2) - -inst_1556: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:4668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4668*FLEN/8, x4, x1, x2) - -inst_1557: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:4671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4671*FLEN/8, x4, x1, x2) - -inst_1558: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:4674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4674*FLEN/8, x4, x1, x2) - -inst_1559: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:4677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4677*FLEN/8, x4, x1, x2) - -inst_1560: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:4680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4680*FLEN/8, x4, x1, x2) - -inst_1561: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:4683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4683*FLEN/8, x4, x1, x2) - -inst_1562: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:4686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4686*FLEN/8, x4, x1, x2) - -inst_1563: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:4689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4689*FLEN/8, x4, x1, x2) - -inst_1564: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:4692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4692*FLEN/8, x4, x1, x2) - -inst_1565: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:4695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4695*FLEN/8, x4, x1, x2) - -inst_1566: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc000000; valaddr_reg:x3; val_offset:4698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4698*FLEN/8, x4, x1, x2) - -inst_1567: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc000001; valaddr_reg:x3; val_offset:4701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4701*FLEN/8, x4, x1, x2) - -inst_1568: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc000003; valaddr_reg:x3; val_offset:4704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4704*FLEN/8, x4, x1, x2) - -inst_1569: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc000007; valaddr_reg:x3; val_offset:4707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4707*FLEN/8, x4, x1, x2) - -inst_1570: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc00000f; valaddr_reg:x3; val_offset:4710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4710*FLEN/8, x4, x1, x2) - -inst_1571: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc00001f; valaddr_reg:x3; val_offset:4713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4713*FLEN/8, x4, x1, x2) - -inst_1572: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc00003f; valaddr_reg:x3; val_offset:4716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4716*FLEN/8, x4, x1, x2) - -inst_1573: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc00007f; valaddr_reg:x3; val_offset:4719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4719*FLEN/8, x4, x1, x2) - -inst_1574: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc0000ff; valaddr_reg:x3; val_offset:4722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4722*FLEN/8, x4, x1, x2) - -inst_1575: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc0001ff; valaddr_reg:x3; val_offset:4725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4725*FLEN/8, x4, x1, x2) - -inst_1576: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc0003ff; valaddr_reg:x3; val_offset:4728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4728*FLEN/8, x4, x1, x2) - -inst_1577: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc0007ff; valaddr_reg:x3; val_offset:4731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4731*FLEN/8, x4, x1, x2) - -inst_1578: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc000fff; valaddr_reg:x3; val_offset:4734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4734*FLEN/8, x4, x1, x2) - -inst_1579: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc001fff; valaddr_reg:x3; val_offset:4737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4737*FLEN/8, x4, x1, x2) - -inst_1580: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc003fff; valaddr_reg:x3; val_offset:4740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4740*FLEN/8, x4, x1, x2) - -inst_1581: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc007fff; valaddr_reg:x3; val_offset:4743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4743*FLEN/8, x4, x1, x2) - -inst_1582: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc00ffff; valaddr_reg:x3; val_offset:4746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4746*FLEN/8, x4, x1, x2) - -inst_1583: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc01ffff; valaddr_reg:x3; val_offset:4749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4749*FLEN/8, x4, x1, x2) - -inst_1584: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc03ffff; valaddr_reg:x3; val_offset:4752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4752*FLEN/8, x4, x1, x2) - -inst_1585: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc07ffff; valaddr_reg:x3; val_offset:4755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4755*FLEN/8, x4, x1, x2) - -inst_1586: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc0fffff; valaddr_reg:x3; val_offset:4758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4758*FLEN/8, x4, x1, x2) - -inst_1587: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc1fffff; valaddr_reg:x3; val_offset:4761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4761*FLEN/8, x4, x1, x2) - -inst_1588: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc3fffff; valaddr_reg:x3; val_offset:4764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4764*FLEN/8, x4, x1, x2) - -inst_1589: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc400000; valaddr_reg:x3; val_offset:4767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4767*FLEN/8, x4, x1, x2) - -inst_1590: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc600000; valaddr_reg:x3; val_offset:4770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4770*FLEN/8, x4, x1, x2) - -inst_1591: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc700000; valaddr_reg:x3; val_offset:4773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4773*FLEN/8, x4, x1, x2) - -inst_1592: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc780000; valaddr_reg:x3; val_offset:4776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4776*FLEN/8, x4, x1, x2) - -inst_1593: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7c0000; valaddr_reg:x3; val_offset:4779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4779*FLEN/8, x4, x1, x2) - -inst_1594: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7e0000; valaddr_reg:x3; val_offset:4782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4782*FLEN/8, x4, x1, x2) - -inst_1595: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7f0000; valaddr_reg:x3; val_offset:4785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4785*FLEN/8, x4, x1, x2) - -inst_1596: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7f8000; valaddr_reg:x3; val_offset:4788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4788*FLEN/8, x4, x1, x2) - -inst_1597: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7fc000; valaddr_reg:x3; val_offset:4791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4791*FLEN/8, x4, x1, x2) - -inst_1598: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7fe000; valaddr_reg:x3; val_offset:4794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4794*FLEN/8, x4, x1, x2) - -inst_1599: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7ff000; valaddr_reg:x3; val_offset:4797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4797*FLEN/8, x4, x1, x2) - -inst_1600: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7ff800; valaddr_reg:x3; val_offset:4800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4800*FLEN/8, x4, x1, x2) - -inst_1601: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7ffc00; valaddr_reg:x3; val_offset:4803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4803*FLEN/8, x4, x1, x2) - -inst_1602: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7ffe00; valaddr_reg:x3; val_offset:4806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4806*FLEN/8, x4, x1, x2) - -inst_1603: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7fff00; valaddr_reg:x3; val_offset:4809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4809*FLEN/8, x4, x1, x2) - -inst_1604: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7fff80; valaddr_reg:x3; val_offset:4812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4812*FLEN/8, x4, x1, x2) - -inst_1605: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7fffc0; valaddr_reg:x3; val_offset:4815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4815*FLEN/8, x4, x1, x2) - -inst_1606: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7fffe0; valaddr_reg:x3; val_offset:4818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4818*FLEN/8, x4, x1, x2) - -inst_1607: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7ffff0; valaddr_reg:x3; val_offset:4821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4821*FLEN/8, x4, x1, x2) - -inst_1608: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7ffff8; valaddr_reg:x3; val_offset:4824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4824*FLEN/8, x4, x1, x2) - -inst_1609: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7ffffc; valaddr_reg:x3; val_offset:4827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4827*FLEN/8, x4, x1, x2) - -inst_1610: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7ffffe; valaddr_reg:x3; val_offset:4830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4830*FLEN/8, x4, x1, x2) - -inst_1611: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; -op3val:0xc7fffff; valaddr_reg:x3; val_offset:4833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4833*FLEN/8, x4, x1, x2) - -inst_1612: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x0; valaddr_reg:x3; val_offset:4836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4836*FLEN/8, x4, x1, x2) - -inst_1613: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:4839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4839*FLEN/8, x4, x1, x2) - -inst_1614: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:4842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4842*FLEN/8, x4, x1, x2) - -inst_1615: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:4845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4845*FLEN/8, x4, x1, x2) - -inst_1616: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0xf; valaddr_reg:x3; val_offset:4848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4848*FLEN/8, x4, x1, x2) - -inst_1617: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x1f; valaddr_reg:x3; val_offset:4851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4851*FLEN/8, x4, x1, x2) - -inst_1618: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x3f; valaddr_reg:x3; val_offset:4854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4854*FLEN/8, x4, x1, x2) - -inst_1619: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7f; valaddr_reg:x3; val_offset:4857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4857*FLEN/8, x4, x1, x2) - -inst_1620: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0xff; valaddr_reg:x3; val_offset:4860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4860*FLEN/8, x4, x1, x2) - -inst_1621: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x1ff; valaddr_reg:x3; val_offset:4863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4863*FLEN/8, x4, x1, x2) - -inst_1622: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x3ff; valaddr_reg:x3; val_offset:4866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4866*FLEN/8, x4, x1, x2) - -inst_1623: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ff; valaddr_reg:x3; val_offset:4869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4869*FLEN/8, x4, x1, x2) - -inst_1624: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0xfff; valaddr_reg:x3; val_offset:4872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4872*FLEN/8, x4, x1, x2) - -inst_1625: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x1fff; valaddr_reg:x3; val_offset:4875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4875*FLEN/8, x4, x1, x2) - -inst_1626: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x3fff; valaddr_reg:x3; val_offset:4878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4878*FLEN/8, x4, x1, x2) - -inst_1627: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7fff; valaddr_reg:x3; val_offset:4881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4881*FLEN/8, x4, x1, x2) - -inst_1628: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0xffff; valaddr_reg:x3; val_offset:4884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4884*FLEN/8, x4, x1, x2) - -inst_1629: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x1ffff; valaddr_reg:x3; val_offset:4887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4887*FLEN/8, x4, x1, x2) - -inst_1630: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x3ffff; valaddr_reg:x3; val_offset:4890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4890*FLEN/8, x4, x1, x2) - -inst_1631: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ffff; valaddr_reg:x3; val_offset:4893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4893*FLEN/8, x4, x1, x2) - -inst_1632: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0xfffff; valaddr_reg:x3; val_offset:4896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4896*FLEN/8, x4, x1, x2) - -inst_1633: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:4899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4899*FLEN/8, x4, x1, x2) - -inst_1634: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x1fffff; valaddr_reg:x3; val_offset:4902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4902*FLEN/8, x4, x1, x2) - -inst_1635: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:4905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4905*FLEN/8, x4, x1, x2) - -inst_1636: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:4908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4908*FLEN/8, x4, x1, x2) - -inst_1637: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:4911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4911*FLEN/8, x4, x1, x2) - -inst_1638: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:4914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4914*FLEN/8, x4, x1, x2) - -inst_1639: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x3fffff; valaddr_reg:x3; val_offset:4917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4917*FLEN/8, x4, x1, x2) - -inst_1640: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x400000; valaddr_reg:x3; val_offset:4920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4920*FLEN/8, x4, x1, x2) - -inst_1641: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:4923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4923*FLEN/8, x4, x1, x2) - -inst_1642: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:4926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4926*FLEN/8, x4, x1, x2) - -inst_1643: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:4929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4929*FLEN/8, x4, x1, x2) - -inst_1644: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x600000; valaddr_reg:x3; val_offset:4932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4932*FLEN/8, x4, x1, x2) - -inst_1645: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:4935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4935*FLEN/8, x4, x1, x2) - -inst_1646: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:4938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4938*FLEN/8, x4, x1, x2) - -inst_1647: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x700000; valaddr_reg:x3; val_offset:4941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4941*FLEN/8, x4, x1, x2) - -inst_1648: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x780000; valaddr_reg:x3; val_offset:4944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4944*FLEN/8, x4, x1, x2) - -inst_1649: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7c0000; valaddr_reg:x3; val_offset:4947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4947*FLEN/8, x4, x1, x2) - -inst_1650: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7e0000; valaddr_reg:x3; val_offset:4950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4950*FLEN/8, x4, x1, x2) - -inst_1651: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7f0000; valaddr_reg:x3; val_offset:4953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4953*FLEN/8, x4, x1, x2) - -inst_1652: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7f8000; valaddr_reg:x3; val_offset:4956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4956*FLEN/8, x4, x1, x2) - -inst_1653: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7fc000; valaddr_reg:x3; val_offset:4959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4959*FLEN/8, x4, x1, x2) - -inst_1654: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7fe000; valaddr_reg:x3; val_offset:4962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4962*FLEN/8, x4, x1, x2) - -inst_1655: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ff000; valaddr_reg:x3; val_offset:4965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4965*FLEN/8, x4, x1, x2) - -inst_1656: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ff800; valaddr_reg:x3; val_offset:4968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4968*FLEN/8, x4, x1, x2) - -inst_1657: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ffc00; valaddr_reg:x3; val_offset:4971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4971*FLEN/8, x4, x1, x2) - -inst_1658: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ffe00; valaddr_reg:x3; val_offset:4974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4974*FLEN/8, x4, x1, x2) - -inst_1659: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7fff00; valaddr_reg:x3; val_offset:4977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4977*FLEN/8, x4, x1, x2) - -inst_1660: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7fff80; valaddr_reg:x3; val_offset:4980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4980*FLEN/8, x4, x1, x2) - -inst_1661: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7fffc0; valaddr_reg:x3; val_offset:4983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4983*FLEN/8, x4, x1, x2) - -inst_1662: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7fffe0; valaddr_reg:x3; val_offset:4986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4986*FLEN/8, x4, x1, x2) - -inst_1663: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ffff0; valaddr_reg:x3; val_offset:4989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4989*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_14) - -inst_1664: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:4992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4992*FLEN/8, x4, x1, x2) - -inst_1665: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:4995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4995*FLEN/8, x4, x1, x2) - -inst_1666: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:4998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4998*FLEN/8, x4, x1, x2) - -inst_1667: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; -op3val:0x7fffff; valaddr_reg:x3; val_offset:5001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5001*FLEN/8, x4, x1, x2) - -inst_1668: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3800000; valaddr_reg:x3; val_offset:5004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5004*FLEN/8, x4, x1, x2) - -inst_1669: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3800001; valaddr_reg:x3; val_offset:5007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5007*FLEN/8, x4, x1, x2) - -inst_1670: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3800003; valaddr_reg:x3; val_offset:5010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5010*FLEN/8, x4, x1, x2) - -inst_1671: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3800007; valaddr_reg:x3; val_offset:5013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5013*FLEN/8, x4, x1, x2) - -inst_1672: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf380000f; valaddr_reg:x3; val_offset:5016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5016*FLEN/8, x4, x1, x2) - -inst_1673: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf380001f; valaddr_reg:x3; val_offset:5019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5019*FLEN/8, x4, x1, x2) - -inst_1674: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf380003f; valaddr_reg:x3; val_offset:5022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5022*FLEN/8, x4, x1, x2) - -inst_1675: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf380007f; valaddr_reg:x3; val_offset:5025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5025*FLEN/8, x4, x1, x2) - -inst_1676: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf38000ff; valaddr_reg:x3; val_offset:5028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5028*FLEN/8, x4, x1, x2) - -inst_1677: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf38001ff; valaddr_reg:x3; val_offset:5031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5031*FLEN/8, x4, x1, x2) - -inst_1678: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf38003ff; valaddr_reg:x3; val_offset:5034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5034*FLEN/8, x4, x1, x2) - -inst_1679: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf38007ff; valaddr_reg:x3; val_offset:5037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5037*FLEN/8, x4, x1, x2) - -inst_1680: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3800fff; valaddr_reg:x3; val_offset:5040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5040*FLEN/8, x4, x1, x2) - -inst_1681: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3801fff; valaddr_reg:x3; val_offset:5043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5043*FLEN/8, x4, x1, x2) - -inst_1682: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3803fff; valaddr_reg:x3; val_offset:5046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5046*FLEN/8, x4, x1, x2) - -inst_1683: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3807fff; valaddr_reg:x3; val_offset:5049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5049*FLEN/8, x4, x1, x2) - -inst_1684: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf380ffff; valaddr_reg:x3; val_offset:5052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5052*FLEN/8, x4, x1, x2) - -inst_1685: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf381ffff; valaddr_reg:x3; val_offset:5055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5055*FLEN/8, x4, x1, x2) - -inst_1686: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf383ffff; valaddr_reg:x3; val_offset:5058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5058*FLEN/8, x4, x1, x2) - -inst_1687: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf387ffff; valaddr_reg:x3; val_offset:5061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5061*FLEN/8, x4, x1, x2) - -inst_1688: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf38fffff; valaddr_reg:x3; val_offset:5064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5064*FLEN/8, x4, x1, x2) - -inst_1689: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf39fffff; valaddr_reg:x3; val_offset:5067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5067*FLEN/8, x4, x1, x2) - -inst_1690: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3bfffff; valaddr_reg:x3; val_offset:5070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5070*FLEN/8, x4, x1, x2) - -inst_1691: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3c00000; valaddr_reg:x3; val_offset:5073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5073*FLEN/8, x4, x1, x2) - -inst_1692: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3e00000; valaddr_reg:x3; val_offset:5076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5076*FLEN/8, x4, x1, x2) - -inst_1693: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3f00000; valaddr_reg:x3; val_offset:5079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5079*FLEN/8, x4, x1, x2) - -inst_1694: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3f80000; valaddr_reg:x3; val_offset:5082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5082*FLEN/8, x4, x1, x2) - -inst_1695: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fc0000; valaddr_reg:x3; val_offset:5085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5085*FLEN/8, x4, x1, x2) - -inst_1696: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fe0000; valaddr_reg:x3; val_offset:5088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5088*FLEN/8, x4, x1, x2) - -inst_1697: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ff0000; valaddr_reg:x3; val_offset:5091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5091*FLEN/8, x4, x1, x2) - -inst_1698: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ff8000; valaddr_reg:x3; val_offset:5094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5094*FLEN/8, x4, x1, x2) - -inst_1699: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ffc000; valaddr_reg:x3; val_offset:5097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5097*FLEN/8, x4, x1, x2) - -inst_1700: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ffe000; valaddr_reg:x3; val_offset:5100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5100*FLEN/8, x4, x1, x2) - -inst_1701: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fff000; valaddr_reg:x3; val_offset:5103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5103*FLEN/8, x4, x1, x2) - -inst_1702: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fff800; valaddr_reg:x3; val_offset:5106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5106*FLEN/8, x4, x1, x2) - -inst_1703: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fffc00; valaddr_reg:x3; val_offset:5109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5109*FLEN/8, x4, x1, x2) - -inst_1704: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fffe00; valaddr_reg:x3; val_offset:5112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5112*FLEN/8, x4, x1, x2) - -inst_1705: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ffff00; valaddr_reg:x3; val_offset:5115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5115*FLEN/8, x4, x1, x2) - -inst_1706: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ffff80; valaddr_reg:x3; val_offset:5118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5118*FLEN/8, x4, x1, x2) - -inst_1707: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ffffc0; valaddr_reg:x3; val_offset:5121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5121*FLEN/8, x4, x1, x2) - -inst_1708: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ffffe0; valaddr_reg:x3; val_offset:5124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5124*FLEN/8, x4, x1, x2) - -inst_1709: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fffff0; valaddr_reg:x3; val_offset:5127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5127*FLEN/8, x4, x1, x2) - -inst_1710: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fffff8; valaddr_reg:x3; val_offset:5130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5130*FLEN/8, x4, x1, x2) - -inst_1711: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fffffc; valaddr_reg:x3; val_offset:5133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5133*FLEN/8, x4, x1, x2) - -inst_1712: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3fffffe; valaddr_reg:x3; val_offset:5136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5136*FLEN/8, x4, x1, x2) - -inst_1713: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xf3ffffff; valaddr_reg:x3; val_offset:5139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5139*FLEN/8, x4, x1, x2) - -inst_1714: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff000001; valaddr_reg:x3; val_offset:5142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5142*FLEN/8, x4, x1, x2) - -inst_1715: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff000003; valaddr_reg:x3; val_offset:5145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5145*FLEN/8, x4, x1, x2) - -inst_1716: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff000007; valaddr_reg:x3; val_offset:5148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5148*FLEN/8, x4, x1, x2) - -inst_1717: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff199999; valaddr_reg:x3; val_offset:5151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5151*FLEN/8, x4, x1, x2) - -inst_1718: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff249249; valaddr_reg:x3; val_offset:5154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5154*FLEN/8, x4, x1, x2) - -inst_1719: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff333333; valaddr_reg:x3; val_offset:5157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5157*FLEN/8, x4, x1, x2) - -inst_1720: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:5160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5160*FLEN/8, x4, x1, x2) - -inst_1721: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:5163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5163*FLEN/8, x4, x1, x2) - -inst_1722: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff444444; valaddr_reg:x3; val_offset:5166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5166*FLEN/8, x4, x1, x2) - -inst_1723: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:5169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5169*FLEN/8, x4, x1, x2) - -inst_1724: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:5172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5172*FLEN/8, x4, x1, x2) - -inst_1725: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff666666; valaddr_reg:x3; val_offset:5175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5175*FLEN/8, x4, x1, x2) - -inst_1726: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:5178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5178*FLEN/8, x4, x1, x2) - -inst_1727: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:5181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5181*FLEN/8, x4, x1, x2) - -inst_1728: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:5184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5184*FLEN/8, x4, x1, x2) - -inst_1729: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:5187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5187*FLEN/8, x4, x1, x2) - -inst_1730: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:5190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5190*FLEN/8, x4, x1, x2) - -inst_1731: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:5193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5193*FLEN/8, x4, x1, x2) - -inst_1732: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:5196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5196*FLEN/8, x4, x1, x2) - -inst_1733: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:5199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5199*FLEN/8, x4, x1, x2) - -inst_1734: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:5202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5202*FLEN/8, x4, x1, x2) - -inst_1735: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:5205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5205*FLEN/8, x4, x1, x2) - -inst_1736: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:5208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5208*FLEN/8, x4, x1, x2) - -inst_1737: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:5211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5211*FLEN/8, x4, x1, x2) - -inst_1738: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:5214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5214*FLEN/8, x4, x1, x2) - -inst_1739: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:5217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5217*FLEN/8, x4, x1, x2) - -inst_1740: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:5220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5220*FLEN/8, x4, x1, x2) - -inst_1741: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:5223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5223*FLEN/8, x4, x1, x2) - -inst_1742: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:5226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5226*FLEN/8, x4, x1, x2) - -inst_1743: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:5229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5229*FLEN/8, x4, x1, x2) - -inst_1744: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:5232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5232*FLEN/8, x4, x1, x2) - -inst_1745: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:5235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5235*FLEN/8, x4, x1, x2) - -inst_1746: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd000000; valaddr_reg:x3; val_offset:5238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5238*FLEN/8, x4, x1, x2) - -inst_1747: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd000001; valaddr_reg:x3; val_offset:5241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5241*FLEN/8, x4, x1, x2) - -inst_1748: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd000003; valaddr_reg:x3; val_offset:5244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5244*FLEN/8, x4, x1, x2) - -inst_1749: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd000007; valaddr_reg:x3; val_offset:5247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5247*FLEN/8, x4, x1, x2) - -inst_1750: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd00000f; valaddr_reg:x3; val_offset:5250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5250*FLEN/8, x4, x1, x2) - -inst_1751: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd00001f; valaddr_reg:x3; val_offset:5253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5253*FLEN/8, x4, x1, x2) - -inst_1752: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd00003f; valaddr_reg:x3; val_offset:5256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5256*FLEN/8, x4, x1, x2) - -inst_1753: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd00007f; valaddr_reg:x3; val_offset:5259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5259*FLEN/8, x4, x1, x2) - -inst_1754: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd0000ff; valaddr_reg:x3; val_offset:5262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5262*FLEN/8, x4, x1, x2) - -inst_1755: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd0001ff; valaddr_reg:x3; val_offset:5265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5265*FLEN/8, x4, x1, x2) - -inst_1756: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd0003ff; valaddr_reg:x3; val_offset:5268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5268*FLEN/8, x4, x1, x2) - -inst_1757: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd0007ff; valaddr_reg:x3; val_offset:5271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5271*FLEN/8, x4, x1, x2) - -inst_1758: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd000fff; valaddr_reg:x3; val_offset:5274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5274*FLEN/8, x4, x1, x2) - -inst_1759: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd001fff; valaddr_reg:x3; val_offset:5277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5277*FLEN/8, x4, x1, x2) - -inst_1760: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd003fff; valaddr_reg:x3; val_offset:5280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5280*FLEN/8, x4, x1, x2) - -inst_1761: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd007fff; valaddr_reg:x3; val_offset:5283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5283*FLEN/8, x4, x1, x2) - -inst_1762: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd00ffff; valaddr_reg:x3; val_offset:5286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5286*FLEN/8, x4, x1, x2) - -inst_1763: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd01ffff; valaddr_reg:x3; val_offset:5289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5289*FLEN/8, x4, x1, x2) - -inst_1764: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd03ffff; valaddr_reg:x3; val_offset:5292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5292*FLEN/8, x4, x1, x2) - -inst_1765: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd07ffff; valaddr_reg:x3; val_offset:5295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5295*FLEN/8, x4, x1, x2) - -inst_1766: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd0fffff; valaddr_reg:x3; val_offset:5298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5298*FLEN/8, x4, x1, x2) - -inst_1767: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd1fffff; valaddr_reg:x3; val_offset:5301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5301*FLEN/8, x4, x1, x2) - -inst_1768: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd3fffff; valaddr_reg:x3; val_offset:5304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5304*FLEN/8, x4, x1, x2) - -inst_1769: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd400000; valaddr_reg:x3; val_offset:5307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5307*FLEN/8, x4, x1, x2) - -inst_1770: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd600000; valaddr_reg:x3; val_offset:5310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5310*FLEN/8, x4, x1, x2) - -inst_1771: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd700000; valaddr_reg:x3; val_offset:5313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5313*FLEN/8, x4, x1, x2) - -inst_1772: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd780000; valaddr_reg:x3; val_offset:5316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5316*FLEN/8, x4, x1, x2) - -inst_1773: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7c0000; valaddr_reg:x3; val_offset:5319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5319*FLEN/8, x4, x1, x2) - -inst_1774: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7e0000; valaddr_reg:x3; val_offset:5322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5322*FLEN/8, x4, x1, x2) - -inst_1775: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7f0000; valaddr_reg:x3; val_offset:5325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5325*FLEN/8, x4, x1, x2) - -inst_1776: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7f8000; valaddr_reg:x3; val_offset:5328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5328*FLEN/8, x4, x1, x2) - -inst_1777: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7fc000; valaddr_reg:x3; val_offset:5331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5331*FLEN/8, x4, x1, x2) - -inst_1778: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7fe000; valaddr_reg:x3; val_offset:5334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5334*FLEN/8, x4, x1, x2) - -inst_1779: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7ff000; valaddr_reg:x3; val_offset:5337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5337*FLEN/8, x4, x1, x2) - -inst_1780: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7ff800; valaddr_reg:x3; val_offset:5340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5340*FLEN/8, x4, x1, x2) - -inst_1781: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7ffc00; valaddr_reg:x3; val_offset:5343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5343*FLEN/8, x4, x1, x2) - -inst_1782: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7ffe00; valaddr_reg:x3; val_offset:5346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5346*FLEN/8, x4, x1, x2) - -inst_1783: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7fff00; valaddr_reg:x3; val_offset:5349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5349*FLEN/8, x4, x1, x2) - -inst_1784: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7fff80; valaddr_reg:x3; val_offset:5352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5352*FLEN/8, x4, x1, x2) - -inst_1785: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7fffc0; valaddr_reg:x3; val_offset:5355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5355*FLEN/8, x4, x1, x2) - -inst_1786: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7fffe0; valaddr_reg:x3; val_offset:5358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5358*FLEN/8, x4, x1, x2) - -inst_1787: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7ffff0; valaddr_reg:x3; val_offset:5361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5361*FLEN/8, x4, x1, x2) - -inst_1788: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7ffff8; valaddr_reg:x3; val_offset:5364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5364*FLEN/8, x4, x1, x2) - -inst_1789: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7ffffc; valaddr_reg:x3; val_offset:5367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5367*FLEN/8, x4, x1, x2) - -inst_1790: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7ffffe; valaddr_reg:x3; val_offset:5370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5370*FLEN/8, x4, x1, x2) - -inst_1791: -// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; -op3val:0xd7fffff; valaddr_reg:x3; val_offset:5373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5373*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_15) - -inst_1792: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbf800001; valaddr_reg:x3; val_offset:5376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5376*FLEN/8, x4, x1, x2) - -inst_1793: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbf800003; valaddr_reg:x3; val_offset:5379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5379*FLEN/8, x4, x1, x2) - -inst_1794: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbf800007; valaddr_reg:x3; val_offset:5382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5382*FLEN/8, x4, x1, x2) - -inst_1795: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbf999999; valaddr_reg:x3; val_offset:5385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5385*FLEN/8, x4, x1, x2) - -inst_1796: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:5388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5388*FLEN/8, x4, x1, x2) - -inst_1797: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:5391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5391*FLEN/8, x4, x1, x2) - -inst_1798: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:5394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5394*FLEN/8, x4, x1, x2) - -inst_1799: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:5397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5397*FLEN/8, x4, x1, x2) - -inst_1800: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:5400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5400*FLEN/8, x4, x1, x2) - -inst_1801: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:5403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5403*FLEN/8, x4, x1, x2) - -inst_1802: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:5406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5406*FLEN/8, x4, x1, x2) - -inst_1803: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:5409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5409*FLEN/8, x4, x1, x2) - -inst_1804: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:5412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5412*FLEN/8, x4, x1, x2) - -inst_1805: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:5415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5415*FLEN/8, x4, x1, x2) - -inst_1806: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:5418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5418*FLEN/8, x4, x1, x2) - -inst_1807: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:5421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5421*FLEN/8, x4, x1, x2) - -inst_1808: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3800000; valaddr_reg:x3; val_offset:5424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5424*FLEN/8, x4, x1, x2) - -inst_1809: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3800001; valaddr_reg:x3; val_offset:5427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5427*FLEN/8, x4, x1, x2) - -inst_1810: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3800003; valaddr_reg:x3; val_offset:5430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5430*FLEN/8, x4, x1, x2) - -inst_1811: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3800007; valaddr_reg:x3; val_offset:5433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5433*FLEN/8, x4, x1, x2) - -inst_1812: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc380000f; valaddr_reg:x3; val_offset:5436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5436*FLEN/8, x4, x1, x2) - -inst_1813: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc380001f; valaddr_reg:x3; val_offset:5439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5439*FLEN/8, x4, x1, x2) - -inst_1814: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc380003f; valaddr_reg:x3; val_offset:5442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5442*FLEN/8, x4, x1, x2) - -inst_1815: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc380007f; valaddr_reg:x3; val_offset:5445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5445*FLEN/8, x4, x1, x2) - -inst_1816: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc38000ff; valaddr_reg:x3; val_offset:5448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5448*FLEN/8, x4, x1, x2) - -inst_1817: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc38001ff; valaddr_reg:x3; val_offset:5451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5451*FLEN/8, x4, x1, x2) - -inst_1818: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc38003ff; valaddr_reg:x3; val_offset:5454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5454*FLEN/8, x4, x1, x2) - -inst_1819: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc38007ff; valaddr_reg:x3; val_offset:5457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5457*FLEN/8, x4, x1, x2) - -inst_1820: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3800fff; valaddr_reg:x3; val_offset:5460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5460*FLEN/8, x4, x1, x2) - -inst_1821: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3801fff; valaddr_reg:x3; val_offset:5463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5463*FLEN/8, x4, x1, x2) - -inst_1822: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3803fff; valaddr_reg:x3; val_offset:5466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5466*FLEN/8, x4, x1, x2) - -inst_1823: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3807fff; valaddr_reg:x3; val_offset:5469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5469*FLEN/8, x4, x1, x2) - -inst_1824: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc380ffff; valaddr_reg:x3; val_offset:5472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5472*FLEN/8, x4, x1, x2) - -inst_1825: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc381ffff; valaddr_reg:x3; val_offset:5475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5475*FLEN/8, x4, x1, x2) - -inst_1826: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc383ffff; valaddr_reg:x3; val_offset:5478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5478*FLEN/8, x4, x1, x2) - -inst_1827: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc387ffff; valaddr_reg:x3; val_offset:5481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5481*FLEN/8, x4, x1, x2) - -inst_1828: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc38fffff; valaddr_reg:x3; val_offset:5484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5484*FLEN/8, x4, x1, x2) - -inst_1829: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc39fffff; valaddr_reg:x3; val_offset:5487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5487*FLEN/8, x4, x1, x2) - -inst_1830: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3bfffff; valaddr_reg:x3; val_offset:5490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5490*FLEN/8, x4, x1, x2) - -inst_1831: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3c00000; valaddr_reg:x3; val_offset:5493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5493*FLEN/8, x4, x1, x2) - -inst_1832: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3e00000; valaddr_reg:x3; val_offset:5496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5496*FLEN/8, x4, x1, x2) - -inst_1833: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3f00000; valaddr_reg:x3; val_offset:5499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5499*FLEN/8, x4, x1, x2) - -inst_1834: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3f80000; valaddr_reg:x3; val_offset:5502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5502*FLEN/8, x4, x1, x2) - -inst_1835: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fc0000; valaddr_reg:x3; val_offset:5505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5505*FLEN/8, x4, x1, x2) - -inst_1836: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fe0000; valaddr_reg:x3; val_offset:5508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5508*FLEN/8, x4, x1, x2) - -inst_1837: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ff0000; valaddr_reg:x3; val_offset:5511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5511*FLEN/8, x4, x1, x2) - -inst_1838: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ff8000; valaddr_reg:x3; val_offset:5514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5514*FLEN/8, x4, x1, x2) - -inst_1839: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ffc000; valaddr_reg:x3; val_offset:5517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5517*FLEN/8, x4, x1, x2) - -inst_1840: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ffe000; valaddr_reg:x3; val_offset:5520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5520*FLEN/8, x4, x1, x2) - -inst_1841: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fff000; valaddr_reg:x3; val_offset:5523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5523*FLEN/8, x4, x1, x2) - -inst_1842: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fff800; valaddr_reg:x3; val_offset:5526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5526*FLEN/8, x4, x1, x2) - -inst_1843: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fffc00; valaddr_reg:x3; val_offset:5529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5529*FLEN/8, x4, x1, x2) - -inst_1844: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fffe00; valaddr_reg:x3; val_offset:5532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5532*FLEN/8, x4, x1, x2) - -inst_1845: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ffff00; valaddr_reg:x3; val_offset:5535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5535*FLEN/8, x4, x1, x2) - -inst_1846: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ffff80; valaddr_reg:x3; val_offset:5538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5538*FLEN/8, x4, x1, x2) - -inst_1847: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ffffc0; valaddr_reg:x3; val_offset:5541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5541*FLEN/8, x4, x1, x2) - -inst_1848: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ffffe0; valaddr_reg:x3; val_offset:5544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5544*FLEN/8, x4, x1, x2) - -inst_1849: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fffff0; valaddr_reg:x3; val_offset:5547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5547*FLEN/8, x4, x1, x2) - -inst_1850: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fffff8; valaddr_reg:x3; val_offset:5550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5550*FLEN/8, x4, x1, x2) - -inst_1851: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fffffc; valaddr_reg:x3; val_offset:5553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5553*FLEN/8, x4, x1, x2) - -inst_1852: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3fffffe; valaddr_reg:x3; val_offset:5556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5556*FLEN/8, x4, x1, x2) - -inst_1853: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; -op3val:0xc3ffffff; valaddr_reg:x3; val_offset:5559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5559*FLEN/8, x4, x1, x2) - -inst_1854: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:5562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5562*FLEN/8, x4, x1, x2) - -inst_1855: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:5565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5565*FLEN/8, x4, x1, x2) - -inst_1856: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:5568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5568*FLEN/8, x4, x1, x2) - -inst_1857: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:5571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5571*FLEN/8, x4, x1, x2) - -inst_1858: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:5574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5574*FLEN/8, x4, x1, x2) - -inst_1859: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:5577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5577*FLEN/8, x4, x1, x2) - -inst_1860: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:5580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5580*FLEN/8, x4, x1, x2) - -inst_1861: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:5583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5583*FLEN/8, x4, x1, x2) - -inst_1862: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:5586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5586*FLEN/8, x4, x1, x2) - -inst_1863: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:5589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5589*FLEN/8, x4, x1, x2) - -inst_1864: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:5592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5592*FLEN/8, x4, x1, x2) - -inst_1865: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:5595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5595*FLEN/8, x4, x1, x2) - -inst_1866: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:5598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5598*FLEN/8, x4, x1, x2) - -inst_1867: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:5601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5601*FLEN/8, x4, x1, x2) - -inst_1868: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:5604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5604*FLEN/8, x4, x1, x2) - -inst_1869: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:5607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5607*FLEN/8, x4, x1, x2) - -inst_1870: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85800000; valaddr_reg:x3; val_offset:5610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5610*FLEN/8, x4, x1, x2) - -inst_1871: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85800001; valaddr_reg:x3; val_offset:5613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5613*FLEN/8, x4, x1, x2) - -inst_1872: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85800003; valaddr_reg:x3; val_offset:5616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5616*FLEN/8, x4, x1, x2) - -inst_1873: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85800007; valaddr_reg:x3; val_offset:5619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5619*FLEN/8, x4, x1, x2) - -inst_1874: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x8580000f; valaddr_reg:x3; val_offset:5622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5622*FLEN/8, x4, x1, x2) - -inst_1875: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x8580001f; valaddr_reg:x3; val_offset:5625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5625*FLEN/8, x4, x1, x2) - -inst_1876: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x8580003f; valaddr_reg:x3; val_offset:5628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5628*FLEN/8, x4, x1, x2) - -inst_1877: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x8580007f; valaddr_reg:x3; val_offset:5631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5631*FLEN/8, x4, x1, x2) - -inst_1878: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x858000ff; valaddr_reg:x3; val_offset:5634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5634*FLEN/8, x4, x1, x2) - -inst_1879: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x858001ff; valaddr_reg:x3; val_offset:5637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5637*FLEN/8, x4, x1, x2) - -inst_1880: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x858003ff; valaddr_reg:x3; val_offset:5640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5640*FLEN/8, x4, x1, x2) - -inst_1881: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x858007ff; valaddr_reg:x3; val_offset:5643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5643*FLEN/8, x4, x1, x2) - -inst_1882: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85800fff; valaddr_reg:x3; val_offset:5646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5646*FLEN/8, x4, x1, x2) - -inst_1883: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85801fff; valaddr_reg:x3; val_offset:5649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5649*FLEN/8, x4, x1, x2) - -inst_1884: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85803fff; valaddr_reg:x3; val_offset:5652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5652*FLEN/8, x4, x1, x2) - -inst_1885: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85807fff; valaddr_reg:x3; val_offset:5655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5655*FLEN/8, x4, x1, x2) - -inst_1886: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x8580ffff; valaddr_reg:x3; val_offset:5658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5658*FLEN/8, x4, x1, x2) - -inst_1887: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x8581ffff; valaddr_reg:x3; val_offset:5661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5661*FLEN/8, x4, x1, x2) - -inst_1888: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x8583ffff; valaddr_reg:x3; val_offset:5664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5664*FLEN/8, x4, x1, x2) - -inst_1889: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x8587ffff; valaddr_reg:x3; val_offset:5667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5667*FLEN/8, x4, x1, x2) - -inst_1890: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x858fffff; valaddr_reg:x3; val_offset:5670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5670*FLEN/8, x4, x1, x2) - -inst_1891: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x859fffff; valaddr_reg:x3; val_offset:5673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5673*FLEN/8, x4, x1, x2) - -inst_1892: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85bfffff; valaddr_reg:x3; val_offset:5676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5676*FLEN/8, x4, x1, x2) - -inst_1893: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85c00000; valaddr_reg:x3; val_offset:5679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5679*FLEN/8, x4, x1, x2) - -inst_1894: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85e00000; valaddr_reg:x3; val_offset:5682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5682*FLEN/8, x4, x1, x2) - -inst_1895: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85f00000; valaddr_reg:x3; val_offset:5685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5685*FLEN/8, x4, x1, x2) - -inst_1896: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85f80000; valaddr_reg:x3; val_offset:5688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5688*FLEN/8, x4, x1, x2) - -inst_1897: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fc0000; valaddr_reg:x3; val_offset:5691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5691*FLEN/8, x4, x1, x2) - -inst_1898: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fe0000; valaddr_reg:x3; val_offset:5694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5694*FLEN/8, x4, x1, x2) - -inst_1899: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ff0000; valaddr_reg:x3; val_offset:5697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5697*FLEN/8, x4, x1, x2) - -inst_1900: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ff8000; valaddr_reg:x3; val_offset:5700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5700*FLEN/8, x4, x1, x2) - -inst_1901: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ffc000; valaddr_reg:x3; val_offset:5703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5703*FLEN/8, x4, x1, x2) - -inst_1902: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ffe000; valaddr_reg:x3; val_offset:5706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5706*FLEN/8, x4, x1, x2) - -inst_1903: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fff000; valaddr_reg:x3; val_offset:5709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5709*FLEN/8, x4, x1, x2) - -inst_1904: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fff800; valaddr_reg:x3; val_offset:5712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5712*FLEN/8, x4, x1, x2) - -inst_1905: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fffc00; valaddr_reg:x3; val_offset:5715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5715*FLEN/8, x4, x1, x2) - -inst_1906: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fffe00; valaddr_reg:x3; val_offset:5718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5718*FLEN/8, x4, x1, x2) - -inst_1907: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ffff00; valaddr_reg:x3; val_offset:5721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5721*FLEN/8, x4, x1, x2) - -inst_1908: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ffff80; valaddr_reg:x3; val_offset:5724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5724*FLEN/8, x4, x1, x2) - -inst_1909: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ffffc0; valaddr_reg:x3; val_offset:5727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5727*FLEN/8, x4, x1, x2) - -inst_1910: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ffffe0; valaddr_reg:x3; val_offset:5730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5730*FLEN/8, x4, x1, x2) - -inst_1911: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fffff0; valaddr_reg:x3; val_offset:5733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5733*FLEN/8, x4, x1, x2) - -inst_1912: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fffff8; valaddr_reg:x3; val_offset:5736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5736*FLEN/8, x4, x1, x2) - -inst_1913: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fffffc; valaddr_reg:x3; val_offset:5739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5739*FLEN/8, x4, x1, x2) - -inst_1914: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85fffffe; valaddr_reg:x3; val_offset:5742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5742*FLEN/8, x4, x1, x2) - -inst_1915: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; -op3val:0x85ffffff; valaddr_reg:x3; val_offset:5745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5745*FLEN/8, x4, x1, x2) - -inst_1916: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:5748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5748*FLEN/8, x4, x1, x2) - -inst_1917: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:5751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5751*FLEN/8, x4, x1, x2) - -inst_1918: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:5754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5754*FLEN/8, x4, x1, x2) - -inst_1919: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:5757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5757*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_16) - -inst_1920: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:5760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5760*FLEN/8, x4, x1, x2) - -inst_1921: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:5763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5763*FLEN/8, x4, x1, x2) - -inst_1922: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:5766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5766*FLEN/8, x4, x1, x2) - -inst_1923: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:5769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5769*FLEN/8, x4, x1, x2) - -inst_1924: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:5772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5772*FLEN/8, x4, x1, x2) - -inst_1925: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:5775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5775*FLEN/8, x4, x1, x2) - -inst_1926: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:5778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5778*FLEN/8, x4, x1, x2) - -inst_1927: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:5781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5781*FLEN/8, x4, x1, x2) - -inst_1928: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:5784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5784*FLEN/8, x4, x1, x2) - -inst_1929: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:5787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5787*FLEN/8, x4, x1, x2) - -inst_1930: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:5790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5790*FLEN/8, x4, x1, x2) - -inst_1931: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:5793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5793*FLEN/8, x4, x1, x2) - -inst_1932: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5800000; valaddr_reg:x3; val_offset:5796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5796*FLEN/8, x4, x1, x2) - -inst_1933: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5800001; valaddr_reg:x3; val_offset:5799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5799*FLEN/8, x4, x1, x2) - -inst_1934: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5800003; valaddr_reg:x3; val_offset:5802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5802*FLEN/8, x4, x1, x2) - -inst_1935: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5800007; valaddr_reg:x3; val_offset:5805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5805*FLEN/8, x4, x1, x2) - -inst_1936: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x580000f; valaddr_reg:x3; val_offset:5808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5808*FLEN/8, x4, x1, x2) - -inst_1937: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x580001f; valaddr_reg:x3; val_offset:5811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5811*FLEN/8, x4, x1, x2) - -inst_1938: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x580003f; valaddr_reg:x3; val_offset:5814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5814*FLEN/8, x4, x1, x2) - -inst_1939: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x580007f; valaddr_reg:x3; val_offset:5817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5817*FLEN/8, x4, x1, x2) - -inst_1940: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x58000ff; valaddr_reg:x3; val_offset:5820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5820*FLEN/8, x4, x1, x2) - -inst_1941: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x58001ff; valaddr_reg:x3; val_offset:5823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5823*FLEN/8, x4, x1, x2) - -inst_1942: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x58003ff; valaddr_reg:x3; val_offset:5826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5826*FLEN/8, x4, x1, x2) - -inst_1943: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x58007ff; valaddr_reg:x3; val_offset:5829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5829*FLEN/8, x4, x1, x2) - -inst_1944: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5800fff; valaddr_reg:x3; val_offset:5832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5832*FLEN/8, x4, x1, x2) - -inst_1945: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5801fff; valaddr_reg:x3; val_offset:5835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5835*FLEN/8, x4, x1, x2) - -inst_1946: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5803fff; valaddr_reg:x3; val_offset:5838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5838*FLEN/8, x4, x1, x2) - -inst_1947: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5807fff; valaddr_reg:x3; val_offset:5841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5841*FLEN/8, x4, x1, x2) - -inst_1948: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x580ffff; valaddr_reg:x3; val_offset:5844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5844*FLEN/8, x4, x1, x2) - -inst_1949: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x581ffff; valaddr_reg:x3; val_offset:5847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5847*FLEN/8, x4, x1, x2) - -inst_1950: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x583ffff; valaddr_reg:x3; val_offset:5850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5850*FLEN/8, x4, x1, x2) - -inst_1951: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x587ffff; valaddr_reg:x3; val_offset:5853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5853*FLEN/8, x4, x1, x2) - -inst_1952: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x58fffff; valaddr_reg:x3; val_offset:5856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5856*FLEN/8, x4, x1, x2) - -inst_1953: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x59fffff; valaddr_reg:x3; val_offset:5859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5859*FLEN/8, x4, x1, x2) - -inst_1954: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5bfffff; valaddr_reg:x3; val_offset:5862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5862*FLEN/8, x4, x1, x2) - -inst_1955: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5c00000; valaddr_reg:x3; val_offset:5865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5865*FLEN/8, x4, x1, x2) - -inst_1956: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5e00000; valaddr_reg:x3; val_offset:5868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5868*FLEN/8, x4, x1, x2) - -inst_1957: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5f00000; valaddr_reg:x3; val_offset:5871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5871*FLEN/8, x4, x1, x2) - -inst_1958: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5f80000; valaddr_reg:x3; val_offset:5874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5874*FLEN/8, x4, x1, x2) - -inst_1959: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fc0000; valaddr_reg:x3; val_offset:5877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5877*FLEN/8, x4, x1, x2) - -inst_1960: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fe0000; valaddr_reg:x3; val_offset:5880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5880*FLEN/8, x4, x1, x2) - -inst_1961: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ff0000; valaddr_reg:x3; val_offset:5883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5883*FLEN/8, x4, x1, x2) - -inst_1962: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ff8000; valaddr_reg:x3; val_offset:5886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5886*FLEN/8, x4, x1, x2) - -inst_1963: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ffc000; valaddr_reg:x3; val_offset:5889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5889*FLEN/8, x4, x1, x2) - -inst_1964: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ffe000; valaddr_reg:x3; val_offset:5892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5892*FLEN/8, x4, x1, x2) - -inst_1965: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fff000; valaddr_reg:x3; val_offset:5895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5895*FLEN/8, x4, x1, x2) - -inst_1966: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fff800; valaddr_reg:x3; val_offset:5898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5898*FLEN/8, x4, x1, x2) - -inst_1967: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fffc00; valaddr_reg:x3; val_offset:5901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5901*FLEN/8, x4, x1, x2) - -inst_1968: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fffe00; valaddr_reg:x3; val_offset:5904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5904*FLEN/8, x4, x1, x2) - -inst_1969: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ffff00; valaddr_reg:x3; val_offset:5907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5907*FLEN/8, x4, x1, x2) - -inst_1970: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ffff80; valaddr_reg:x3; val_offset:5910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5910*FLEN/8, x4, x1, x2) - -inst_1971: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ffffc0; valaddr_reg:x3; val_offset:5913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5913*FLEN/8, x4, x1, x2) - -inst_1972: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ffffe0; valaddr_reg:x3; val_offset:5916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5916*FLEN/8, x4, x1, x2) - -inst_1973: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fffff0; valaddr_reg:x3; val_offset:5919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5919*FLEN/8, x4, x1, x2) - -inst_1974: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fffff8; valaddr_reg:x3; val_offset:5922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5922*FLEN/8, x4, x1, x2) - -inst_1975: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fffffc; valaddr_reg:x3; val_offset:5925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5925*FLEN/8, x4, x1, x2) - -inst_1976: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5fffffe; valaddr_reg:x3; val_offset:5928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5928*FLEN/8, x4, x1, x2) - -inst_1977: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; -op3val:0x5ffffff; valaddr_reg:x3; val_offset:5931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5931*FLEN/8, x4, x1, x2) - -inst_1978: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:5934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5934*FLEN/8, x4, x1, x2) - -inst_1979: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:5937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5937*FLEN/8, x4, x1, x2) - -inst_1980: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:5940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5940*FLEN/8, x4, x1, x2) - -inst_1981: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:5943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5943*FLEN/8, x4, x1, x2) - -inst_1982: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:5946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5946*FLEN/8, x4, x1, x2) - -inst_1983: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:5949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5949*FLEN/8, x4, x1, x2) - -inst_1984: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:5952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5952*FLEN/8, x4, x1, x2) - -inst_1985: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:5955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5955*FLEN/8, x4, x1, x2) - -inst_1986: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:5958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5958*FLEN/8, x4, x1, x2) - -inst_1987: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:5961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5961*FLEN/8, x4, x1, x2) - -inst_1988: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:5964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5964*FLEN/8, x4, x1, x2) - -inst_1989: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:5967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5967*FLEN/8, x4, x1, x2) - -inst_1990: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:5970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5970*FLEN/8, x4, x1, x2) - -inst_1991: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:5973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5973*FLEN/8, x4, x1, x2) - -inst_1992: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:5976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5976*FLEN/8, x4, x1, x2) - -inst_1993: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:5979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5979*FLEN/8, x4, x1, x2) - -inst_1994: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3000000; valaddr_reg:x3; val_offset:5982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5982*FLEN/8, x4, x1, x2) - -inst_1995: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3000001; valaddr_reg:x3; val_offset:5985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5985*FLEN/8, x4, x1, x2) - -inst_1996: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3000003; valaddr_reg:x3; val_offset:5988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5988*FLEN/8, x4, x1, x2) - -inst_1997: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3000007; valaddr_reg:x3; val_offset:5991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5991*FLEN/8, x4, x1, x2) - -inst_1998: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x300000f; valaddr_reg:x3; val_offset:5994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5994*FLEN/8, x4, x1, x2) - -inst_1999: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x300001f; valaddr_reg:x3; val_offset:5997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5997*FLEN/8, x4, x1, x2) - -inst_2000: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x300003f; valaddr_reg:x3; val_offset:6000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6000*FLEN/8, x4, x1, x2) - -inst_2001: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x300007f; valaddr_reg:x3; val_offset:6003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6003*FLEN/8, x4, x1, x2) - -inst_2002: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x30000ff; valaddr_reg:x3; val_offset:6006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6006*FLEN/8, x4, x1, x2) - -inst_2003: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x30001ff; valaddr_reg:x3; val_offset:6009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6009*FLEN/8, x4, x1, x2) - -inst_2004: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x30003ff; valaddr_reg:x3; val_offset:6012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6012*FLEN/8, x4, x1, x2) - -inst_2005: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x30007ff; valaddr_reg:x3; val_offset:6015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6015*FLEN/8, x4, x1, x2) - -inst_2006: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3000fff; valaddr_reg:x3; val_offset:6018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6018*FLEN/8, x4, x1, x2) - -inst_2007: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3001fff; valaddr_reg:x3; val_offset:6021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6021*FLEN/8, x4, x1, x2) - -inst_2008: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3003fff; valaddr_reg:x3; val_offset:6024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6024*FLEN/8, x4, x1, x2) - -inst_2009: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3007fff; valaddr_reg:x3; val_offset:6027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6027*FLEN/8, x4, x1, x2) - -inst_2010: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x300ffff; valaddr_reg:x3; val_offset:6030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6030*FLEN/8, x4, x1, x2) - -inst_2011: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x301ffff; valaddr_reg:x3; val_offset:6033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6033*FLEN/8, x4, x1, x2) - -inst_2012: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x303ffff; valaddr_reg:x3; val_offset:6036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6036*FLEN/8, x4, x1, x2) - -inst_2013: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x307ffff; valaddr_reg:x3; val_offset:6039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6039*FLEN/8, x4, x1, x2) - -inst_2014: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x30fffff; valaddr_reg:x3; val_offset:6042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6042*FLEN/8, x4, x1, x2) - -inst_2015: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x31fffff; valaddr_reg:x3; val_offset:6045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6045*FLEN/8, x4, x1, x2) - -inst_2016: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x33fffff; valaddr_reg:x3; val_offset:6048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6048*FLEN/8, x4, x1, x2) - -inst_2017: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3400000; valaddr_reg:x3; val_offset:6051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6051*FLEN/8, x4, x1, x2) - -inst_2018: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3600000; valaddr_reg:x3; val_offset:6054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6054*FLEN/8, x4, x1, x2) - -inst_2019: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3700000; valaddr_reg:x3; val_offset:6057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6057*FLEN/8, x4, x1, x2) - -inst_2020: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x3780000; valaddr_reg:x3; val_offset:6060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6060*FLEN/8, x4, x1, x2) - -inst_2021: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37c0000; valaddr_reg:x3; val_offset:6063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6063*FLEN/8, x4, x1, x2) - -inst_2022: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37e0000; valaddr_reg:x3; val_offset:6066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6066*FLEN/8, x4, x1, x2) - -inst_2023: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37f0000; valaddr_reg:x3; val_offset:6069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6069*FLEN/8, x4, x1, x2) - -inst_2024: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37f8000; valaddr_reg:x3; val_offset:6072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6072*FLEN/8, x4, x1, x2) - -inst_2025: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37fc000; valaddr_reg:x3; val_offset:6075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6075*FLEN/8, x4, x1, x2) - -inst_2026: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37fe000; valaddr_reg:x3; val_offset:6078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6078*FLEN/8, x4, x1, x2) - -inst_2027: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37ff000; valaddr_reg:x3; val_offset:6081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6081*FLEN/8, x4, x1, x2) - -inst_2028: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37ff800; valaddr_reg:x3; val_offset:6084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6084*FLEN/8, x4, x1, x2) - -inst_2029: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37ffc00; valaddr_reg:x3; val_offset:6087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6087*FLEN/8, x4, x1, x2) - -inst_2030: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37ffe00; valaddr_reg:x3; val_offset:6090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6090*FLEN/8, x4, x1, x2) - -inst_2031: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37fff00; valaddr_reg:x3; val_offset:6093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6093*FLEN/8, x4, x1, x2) - -inst_2032: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37fff80; valaddr_reg:x3; val_offset:6096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6096*FLEN/8, x4, x1, x2) - -inst_2033: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37fffc0; valaddr_reg:x3; val_offset:6099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6099*FLEN/8, x4, x1, x2) - -inst_2034: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37fffe0; valaddr_reg:x3; val_offset:6102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6102*FLEN/8, x4, x1, x2) - -inst_2035: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37ffff0; valaddr_reg:x3; val_offset:6105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6105*FLEN/8, x4, x1, x2) - -inst_2036: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37ffff8; valaddr_reg:x3; val_offset:6108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6108*FLEN/8, x4, x1, x2) - -inst_2037: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37ffffc; valaddr_reg:x3; val_offset:6111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6111*FLEN/8, x4, x1, x2) - -inst_2038: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37ffffe; valaddr_reg:x3; val_offset:6114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6114*FLEN/8, x4, x1, x2) - -inst_2039: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; -op3val:0x37fffff; valaddr_reg:x3; val_offset:6117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6117*FLEN/8, x4, x1, x2) - -inst_2040: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0800000; valaddr_reg:x3; val_offset:6120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6120*FLEN/8, x4, x1, x2) - -inst_2041: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0800001; valaddr_reg:x3; val_offset:6123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6123*FLEN/8, x4, x1, x2) - -inst_2042: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0800003; valaddr_reg:x3; val_offset:6126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6126*FLEN/8, x4, x1, x2) - -inst_2043: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0800007; valaddr_reg:x3; val_offset:6129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6129*FLEN/8, x4, x1, x2) - -inst_2044: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb080000f; valaddr_reg:x3; val_offset:6132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6132*FLEN/8, x4, x1, x2) - -inst_2045: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb080001f; valaddr_reg:x3; val_offset:6135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6135*FLEN/8, x4, x1, x2) - -inst_2046: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb080003f; valaddr_reg:x3; val_offset:6138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6138*FLEN/8, x4, x1, x2) - -inst_2047: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb080007f; valaddr_reg:x3; val_offset:6141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6141*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_17) - -inst_2048: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb08000ff; valaddr_reg:x3; val_offset:6144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6144*FLEN/8, x4, x1, x2) - -inst_2049: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb08001ff; valaddr_reg:x3; val_offset:6147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6147*FLEN/8, x4, x1, x2) - -inst_2050: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb08003ff; valaddr_reg:x3; val_offset:6150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6150*FLEN/8, x4, x1, x2) - -inst_2051: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb08007ff; valaddr_reg:x3; val_offset:6153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6153*FLEN/8, x4, x1, x2) - -inst_2052: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0800fff; valaddr_reg:x3; val_offset:6156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6156*FLEN/8, x4, x1, x2) - -inst_2053: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0801fff; valaddr_reg:x3; val_offset:6159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6159*FLEN/8, x4, x1, x2) - -inst_2054: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0803fff; valaddr_reg:x3; val_offset:6162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6162*FLEN/8, x4, x1, x2) - -inst_2055: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0807fff; valaddr_reg:x3; val_offset:6165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6165*FLEN/8, x4, x1, x2) - -inst_2056: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb080ffff; valaddr_reg:x3; val_offset:6168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6168*FLEN/8, x4, x1, x2) - -inst_2057: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb081ffff; valaddr_reg:x3; val_offset:6171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6171*FLEN/8, x4, x1, x2) - -inst_2058: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb083ffff; valaddr_reg:x3; val_offset:6174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6174*FLEN/8, x4, x1, x2) - -inst_2059: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb087ffff; valaddr_reg:x3; val_offset:6177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6177*FLEN/8, x4, x1, x2) - -inst_2060: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb08fffff; valaddr_reg:x3; val_offset:6180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6180*FLEN/8, x4, x1, x2) - -inst_2061: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb09fffff; valaddr_reg:x3; val_offset:6183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6183*FLEN/8, x4, x1, x2) - -inst_2062: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0bfffff; valaddr_reg:x3; val_offset:6186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6186*FLEN/8, x4, x1, x2) - -inst_2063: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0c00000; valaddr_reg:x3; val_offset:6189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6189*FLEN/8, x4, x1, x2) - -inst_2064: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0e00000; valaddr_reg:x3; val_offset:6192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6192*FLEN/8, x4, x1, x2) - -inst_2065: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0f00000; valaddr_reg:x3; val_offset:6195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6195*FLEN/8, x4, x1, x2) - -inst_2066: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0f80000; valaddr_reg:x3; val_offset:6198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6198*FLEN/8, x4, x1, x2) - -inst_2067: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fc0000; valaddr_reg:x3; val_offset:6201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6201*FLEN/8, x4, x1, x2) - -inst_2068: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fe0000; valaddr_reg:x3; val_offset:6204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6204*FLEN/8, x4, x1, x2) - -inst_2069: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ff0000; valaddr_reg:x3; val_offset:6207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6207*FLEN/8, x4, x1, x2) - -inst_2070: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ff8000; valaddr_reg:x3; val_offset:6210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6210*FLEN/8, x4, x1, x2) - -inst_2071: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ffc000; valaddr_reg:x3; val_offset:6213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6213*FLEN/8, x4, x1, x2) - -inst_2072: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ffe000; valaddr_reg:x3; val_offset:6216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6216*FLEN/8, x4, x1, x2) - -inst_2073: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fff000; valaddr_reg:x3; val_offset:6219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6219*FLEN/8, x4, x1, x2) - -inst_2074: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fff800; valaddr_reg:x3; val_offset:6222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6222*FLEN/8, x4, x1, x2) - -inst_2075: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fffc00; valaddr_reg:x3; val_offset:6225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6225*FLEN/8, x4, x1, x2) - -inst_2076: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fffe00; valaddr_reg:x3; val_offset:6228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6228*FLEN/8, x4, x1, x2) - -inst_2077: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ffff00; valaddr_reg:x3; val_offset:6231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6231*FLEN/8, x4, x1, x2) - -inst_2078: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ffff80; valaddr_reg:x3; val_offset:6234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6234*FLEN/8, x4, x1, x2) - -inst_2079: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ffffc0; valaddr_reg:x3; val_offset:6237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6237*FLEN/8, x4, x1, x2) - -inst_2080: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ffffe0; valaddr_reg:x3; val_offset:6240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6240*FLEN/8, x4, x1, x2) - -inst_2081: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fffff0; valaddr_reg:x3; val_offset:6243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6243*FLEN/8, x4, x1, x2) - -inst_2082: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fffff8; valaddr_reg:x3; val_offset:6246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6246*FLEN/8, x4, x1, x2) - -inst_2083: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fffffc; valaddr_reg:x3; val_offset:6249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6249*FLEN/8, x4, x1, x2) - -inst_2084: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0fffffe; valaddr_reg:x3; val_offset:6252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6252*FLEN/8, x4, x1, x2) - -inst_2085: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xb0ffffff; valaddr_reg:x3; val_offset:6255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6255*FLEN/8, x4, x1, x2) - -inst_2086: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbf800001; valaddr_reg:x3; val_offset:6258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6258*FLEN/8, x4, x1, x2) - -inst_2087: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbf800003; valaddr_reg:x3; val_offset:6261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6261*FLEN/8, x4, x1, x2) - -inst_2088: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbf800007; valaddr_reg:x3; val_offset:6264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6264*FLEN/8, x4, x1, x2) - -inst_2089: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbf999999; valaddr_reg:x3; val_offset:6267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6267*FLEN/8, x4, x1, x2) - -inst_2090: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:6270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6270*FLEN/8, x4, x1, x2) - -inst_2091: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:6273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6273*FLEN/8, x4, x1, x2) - -inst_2092: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:6276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6276*FLEN/8, x4, x1, x2) - -inst_2093: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:6279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6279*FLEN/8, x4, x1, x2) - -inst_2094: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:6282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6282*FLEN/8, x4, x1, x2) - -inst_2095: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:6285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6285*FLEN/8, x4, x1, x2) - -inst_2096: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:6288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6288*FLEN/8, x4, x1, x2) - -inst_2097: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:6291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6291*FLEN/8, x4, x1, x2) - -inst_2098: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:6294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6294*FLEN/8, x4, x1, x2) - -inst_2099: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:6297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6297*FLEN/8, x4, x1, x2) - -inst_2100: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:6300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6300*FLEN/8, x4, x1, x2) - -inst_2101: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:6303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6303*FLEN/8, x4, x1, x2) - -inst_2102: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:6306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6306*FLEN/8, x4, x1, x2) - -inst_2103: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:6309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6309*FLEN/8, x4, x1, x2) - -inst_2104: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:6312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6312*FLEN/8, x4, x1, x2) - -inst_2105: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:6315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6315*FLEN/8, x4, x1, x2) - -inst_2106: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:6318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6318*FLEN/8, x4, x1, x2) - -inst_2107: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:6321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6321*FLEN/8, x4, x1, x2) - -inst_2108: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:6324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6324*FLEN/8, x4, x1, x2) - -inst_2109: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:6327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6327*FLEN/8, x4, x1, x2) - -inst_2110: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:6330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6330*FLEN/8, x4, x1, x2) - -inst_2111: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:6333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6333*FLEN/8, x4, x1, x2) - -inst_2112: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:6336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6336*FLEN/8, x4, x1, x2) - -inst_2113: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:6339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6339*FLEN/8, x4, x1, x2) - -inst_2114: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:6342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6342*FLEN/8, x4, x1, x2) - -inst_2115: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:6345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6345*FLEN/8, x4, x1, x2) - -inst_2116: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:6348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6348*FLEN/8, x4, x1, x2) - -inst_2117: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:6351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6351*FLEN/8, x4, x1, x2) - -inst_2118: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b800000; valaddr_reg:x3; val_offset:6354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6354*FLEN/8, x4, x1, x2) - -inst_2119: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b800001; valaddr_reg:x3; val_offset:6357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6357*FLEN/8, x4, x1, x2) - -inst_2120: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b800003; valaddr_reg:x3; val_offset:6360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6360*FLEN/8, x4, x1, x2) - -inst_2121: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b800007; valaddr_reg:x3; val_offset:6363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6363*FLEN/8, x4, x1, x2) - -inst_2122: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b80000f; valaddr_reg:x3; val_offset:6366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6366*FLEN/8, x4, x1, x2) - -inst_2123: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b80001f; valaddr_reg:x3; val_offset:6369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6369*FLEN/8, x4, x1, x2) - -inst_2124: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b80003f; valaddr_reg:x3; val_offset:6372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6372*FLEN/8, x4, x1, x2) - -inst_2125: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b80007f; valaddr_reg:x3; val_offset:6375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6375*FLEN/8, x4, x1, x2) - -inst_2126: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b8000ff; valaddr_reg:x3; val_offset:6378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6378*FLEN/8, x4, x1, x2) - -inst_2127: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b8001ff; valaddr_reg:x3; val_offset:6381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6381*FLEN/8, x4, x1, x2) - -inst_2128: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b8003ff; valaddr_reg:x3; val_offset:6384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6384*FLEN/8, x4, x1, x2) - -inst_2129: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b8007ff; valaddr_reg:x3; val_offset:6387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6387*FLEN/8, x4, x1, x2) - -inst_2130: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b800fff; valaddr_reg:x3; val_offset:6390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6390*FLEN/8, x4, x1, x2) - -inst_2131: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b801fff; valaddr_reg:x3; val_offset:6393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6393*FLEN/8, x4, x1, x2) - -inst_2132: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b803fff; valaddr_reg:x3; val_offset:6396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6396*FLEN/8, x4, x1, x2) - -inst_2133: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b807fff; valaddr_reg:x3; val_offset:6399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6399*FLEN/8, x4, x1, x2) - -inst_2134: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b80ffff; valaddr_reg:x3; val_offset:6402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6402*FLEN/8, x4, x1, x2) - -inst_2135: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b81ffff; valaddr_reg:x3; val_offset:6405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6405*FLEN/8, x4, x1, x2) - -inst_2136: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b83ffff; valaddr_reg:x3; val_offset:6408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6408*FLEN/8, x4, x1, x2) - -inst_2137: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b87ffff; valaddr_reg:x3; val_offset:6411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6411*FLEN/8, x4, x1, x2) - -inst_2138: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b8fffff; valaddr_reg:x3; val_offset:6414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6414*FLEN/8, x4, x1, x2) - -inst_2139: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3b9fffff; valaddr_reg:x3; val_offset:6417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6417*FLEN/8, x4, x1, x2) - -inst_2140: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bbfffff; valaddr_reg:x3; val_offset:6420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6420*FLEN/8, x4, x1, x2) - -inst_2141: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bc00000; valaddr_reg:x3; val_offset:6423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6423*FLEN/8, x4, x1, x2) - -inst_2142: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3be00000; valaddr_reg:x3; val_offset:6426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6426*FLEN/8, x4, x1, x2) - -inst_2143: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bf00000; valaddr_reg:x3; val_offset:6429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6429*FLEN/8, x4, x1, x2) - -inst_2144: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bf80000; valaddr_reg:x3; val_offset:6432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6432*FLEN/8, x4, x1, x2) - -inst_2145: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfc0000; valaddr_reg:x3; val_offset:6435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6435*FLEN/8, x4, x1, x2) - -inst_2146: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfe0000; valaddr_reg:x3; val_offset:6438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6438*FLEN/8, x4, x1, x2) - -inst_2147: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bff0000; valaddr_reg:x3; val_offset:6441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6441*FLEN/8, x4, x1, x2) - -inst_2148: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bff8000; valaddr_reg:x3; val_offset:6444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6444*FLEN/8, x4, x1, x2) - -inst_2149: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bffc000; valaddr_reg:x3; val_offset:6447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6447*FLEN/8, x4, x1, x2) - -inst_2150: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bffe000; valaddr_reg:x3; val_offset:6450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6450*FLEN/8, x4, x1, x2) - -inst_2151: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfff000; valaddr_reg:x3; val_offset:6453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6453*FLEN/8, x4, x1, x2) - -inst_2152: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfff800; valaddr_reg:x3; val_offset:6456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6456*FLEN/8, x4, x1, x2) - -inst_2153: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfffc00; valaddr_reg:x3; val_offset:6459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6459*FLEN/8, x4, x1, x2) - -inst_2154: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfffe00; valaddr_reg:x3; val_offset:6462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6462*FLEN/8, x4, x1, x2) - -inst_2155: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bffff00; valaddr_reg:x3; val_offset:6465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6465*FLEN/8, x4, x1, x2) - -inst_2156: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bffff80; valaddr_reg:x3; val_offset:6468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6468*FLEN/8, x4, x1, x2) - -inst_2157: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bffffc0; valaddr_reg:x3; val_offset:6471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6471*FLEN/8, x4, x1, x2) - -inst_2158: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bffffe0; valaddr_reg:x3; val_offset:6474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6474*FLEN/8, x4, x1, x2) - -inst_2159: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfffff0; valaddr_reg:x3; val_offset:6477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6477*FLEN/8, x4, x1, x2) - -inst_2160: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfffff8; valaddr_reg:x3; val_offset:6480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6480*FLEN/8, x4, x1, x2) - -inst_2161: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfffffc; valaddr_reg:x3; val_offset:6483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6483*FLEN/8, x4, x1, x2) - -inst_2162: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bfffffe; valaddr_reg:x3; val_offset:6486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6486*FLEN/8, x4, x1, x2) - -inst_2163: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; -op3val:0x3bffffff; valaddr_reg:x3; val_offset:6489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6489*FLEN/8, x4, x1, x2) - -inst_2164: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f800000; valaddr_reg:x3; val_offset:6492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6492*FLEN/8, x4, x1, x2) - -inst_2165: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f800001; valaddr_reg:x3; val_offset:6495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6495*FLEN/8, x4, x1, x2) - -inst_2166: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f800003; valaddr_reg:x3; val_offset:6498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6498*FLEN/8, x4, x1, x2) - -inst_2167: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f800007; valaddr_reg:x3; val_offset:6501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6501*FLEN/8, x4, x1, x2) - -inst_2168: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f80000f; valaddr_reg:x3; val_offset:6504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6504*FLEN/8, x4, x1, x2) - -inst_2169: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f80001f; valaddr_reg:x3; val_offset:6507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6507*FLEN/8, x4, x1, x2) - -inst_2170: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f80003f; valaddr_reg:x3; val_offset:6510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6510*FLEN/8, x4, x1, x2) - -inst_2171: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f80007f; valaddr_reg:x3; val_offset:6513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6513*FLEN/8, x4, x1, x2) - -inst_2172: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f8000ff; valaddr_reg:x3; val_offset:6516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6516*FLEN/8, x4, x1, x2) - -inst_2173: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f8001ff; valaddr_reg:x3; val_offset:6519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6519*FLEN/8, x4, x1, x2) - -inst_2174: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f8003ff; valaddr_reg:x3; val_offset:6522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6522*FLEN/8, x4, x1, x2) - -inst_2175: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f8007ff; valaddr_reg:x3; val_offset:6525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6525*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_18) - -inst_2176: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f800fff; valaddr_reg:x3; val_offset:6528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6528*FLEN/8, x4, x1, x2) - -inst_2177: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f801fff; valaddr_reg:x3; val_offset:6531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6531*FLEN/8, x4, x1, x2) - -inst_2178: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f803fff; valaddr_reg:x3; val_offset:6534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6534*FLEN/8, x4, x1, x2) - -inst_2179: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f807fff; valaddr_reg:x3; val_offset:6537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6537*FLEN/8, x4, x1, x2) - -inst_2180: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f80ffff; valaddr_reg:x3; val_offset:6540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6540*FLEN/8, x4, x1, x2) - -inst_2181: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f81ffff; valaddr_reg:x3; val_offset:6543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6543*FLEN/8, x4, x1, x2) - -inst_2182: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f83ffff; valaddr_reg:x3; val_offset:6546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6546*FLEN/8, x4, x1, x2) - -inst_2183: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f87ffff; valaddr_reg:x3; val_offset:6549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6549*FLEN/8, x4, x1, x2) - -inst_2184: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f8fffff; valaddr_reg:x3; val_offset:6552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6552*FLEN/8, x4, x1, x2) - -inst_2185: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f999999; valaddr_reg:x3; val_offset:6555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6555*FLEN/8, x4, x1, x2) - -inst_2186: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3f9fffff; valaddr_reg:x3; val_offset:6558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6558*FLEN/8, x4, x1, x2) - -inst_2187: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:6561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6561*FLEN/8, x4, x1, x2) - -inst_2188: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:6564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6564*FLEN/8, x4, x1, x2) - -inst_2189: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:6567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6567*FLEN/8, x4, x1, x2) - -inst_2190: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:6570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6570*FLEN/8, x4, x1, x2) - -inst_2191: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fbfffff; valaddr_reg:x3; val_offset:6573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6573*FLEN/8, x4, x1, x2) - -inst_2192: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fc00000; valaddr_reg:x3; val_offset:6576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6576*FLEN/8, x4, x1, x2) - -inst_2193: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:6579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6579*FLEN/8, x4, x1, x2) - -inst_2194: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:6582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6582*FLEN/8, x4, x1, x2) - -inst_2195: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:6585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6585*FLEN/8, x4, x1, x2) - -inst_2196: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fe00000; valaddr_reg:x3; val_offset:6588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6588*FLEN/8, x4, x1, x2) - -inst_2197: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:6591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6591*FLEN/8, x4, x1, x2) - -inst_2198: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:6594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6594*FLEN/8, x4, x1, x2) - -inst_2199: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ff00000; valaddr_reg:x3; val_offset:6597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6597*FLEN/8, x4, x1, x2) - -inst_2200: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ff80000; valaddr_reg:x3; val_offset:6600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6600*FLEN/8, x4, x1, x2) - -inst_2201: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffc0000; valaddr_reg:x3; val_offset:6603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6603*FLEN/8, x4, x1, x2) - -inst_2202: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffe0000; valaddr_reg:x3; val_offset:6606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6606*FLEN/8, x4, x1, x2) - -inst_2203: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fff0000; valaddr_reg:x3; val_offset:6609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6609*FLEN/8, x4, x1, x2) - -inst_2204: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fff8000; valaddr_reg:x3; val_offset:6612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6612*FLEN/8, x4, x1, x2) - -inst_2205: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fffc000; valaddr_reg:x3; val_offset:6615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6615*FLEN/8, x4, x1, x2) - -inst_2206: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fffe000; valaddr_reg:x3; val_offset:6618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6618*FLEN/8, x4, x1, x2) - -inst_2207: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffff000; valaddr_reg:x3; val_offset:6621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6621*FLEN/8, x4, x1, x2) - -inst_2208: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffff800; valaddr_reg:x3; val_offset:6624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6624*FLEN/8, x4, x1, x2) - -inst_2209: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffffc00; valaddr_reg:x3; val_offset:6627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6627*FLEN/8, x4, x1, x2) - -inst_2210: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffffe00; valaddr_reg:x3; val_offset:6630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6630*FLEN/8, x4, x1, x2) - -inst_2211: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fffff00; valaddr_reg:x3; val_offset:6633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6633*FLEN/8, x4, x1, x2) - -inst_2212: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fffff80; valaddr_reg:x3; val_offset:6636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6636*FLEN/8, x4, x1, x2) - -inst_2213: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fffffc0; valaddr_reg:x3; val_offset:6639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6639*FLEN/8, x4, x1, x2) - -inst_2214: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fffffe0; valaddr_reg:x3; val_offset:6642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6642*FLEN/8, x4, x1, x2) - -inst_2215: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffffff0; valaddr_reg:x3; val_offset:6645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6645*FLEN/8, x4, x1, x2) - -inst_2216: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:6648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6648*FLEN/8, x4, x1, x2) - -inst_2217: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:6651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6651*FLEN/8, x4, x1, x2) - -inst_2218: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:6654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6654*FLEN/8, x4, x1, x2) - -inst_2219: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; -op3val:0x3fffffff; valaddr_reg:x3; val_offset:6657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6657*FLEN/8, x4, x1, x2) - -inst_2220: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b000000; valaddr_reg:x3; val_offset:6660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6660*FLEN/8, x4, x1, x2) - -inst_2221: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b000001; valaddr_reg:x3; val_offset:6663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6663*FLEN/8, x4, x1, x2) - -inst_2222: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b000003; valaddr_reg:x3; val_offset:6666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6666*FLEN/8, x4, x1, x2) - -inst_2223: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b000007; valaddr_reg:x3; val_offset:6669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6669*FLEN/8, x4, x1, x2) - -inst_2224: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b00000f; valaddr_reg:x3; val_offset:6672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6672*FLEN/8, x4, x1, x2) - -inst_2225: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b00001f; valaddr_reg:x3; val_offset:6675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6675*FLEN/8, x4, x1, x2) - -inst_2226: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b00003f; valaddr_reg:x3; val_offset:6678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6678*FLEN/8, x4, x1, x2) - -inst_2227: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b00007f; valaddr_reg:x3; val_offset:6681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6681*FLEN/8, x4, x1, x2) - -inst_2228: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b0000ff; valaddr_reg:x3; val_offset:6684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6684*FLEN/8, x4, x1, x2) - -inst_2229: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b0001ff; valaddr_reg:x3; val_offset:6687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6687*FLEN/8, x4, x1, x2) - -inst_2230: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b0003ff; valaddr_reg:x3; val_offset:6690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6690*FLEN/8, x4, x1, x2) - -inst_2231: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b0007ff; valaddr_reg:x3; val_offset:6693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6693*FLEN/8, x4, x1, x2) - -inst_2232: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b000fff; valaddr_reg:x3; val_offset:6696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6696*FLEN/8, x4, x1, x2) - -inst_2233: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b001fff; valaddr_reg:x3; val_offset:6699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6699*FLEN/8, x4, x1, x2) - -inst_2234: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b003fff; valaddr_reg:x3; val_offset:6702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6702*FLEN/8, x4, x1, x2) - -inst_2235: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b007fff; valaddr_reg:x3; val_offset:6705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6705*FLEN/8, x4, x1, x2) - -inst_2236: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b00ffff; valaddr_reg:x3; val_offset:6708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6708*FLEN/8, x4, x1, x2) - -inst_2237: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b01ffff; valaddr_reg:x3; val_offset:6711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6711*FLEN/8, x4, x1, x2) - -inst_2238: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b03ffff; valaddr_reg:x3; val_offset:6714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6714*FLEN/8, x4, x1, x2) - -inst_2239: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b07ffff; valaddr_reg:x3; val_offset:6717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6717*FLEN/8, x4, x1, x2) - -inst_2240: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b0fffff; valaddr_reg:x3; val_offset:6720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6720*FLEN/8, x4, x1, x2) - -inst_2241: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b1fffff; valaddr_reg:x3; val_offset:6723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6723*FLEN/8, x4, x1, x2) - -inst_2242: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b3fffff; valaddr_reg:x3; val_offset:6726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6726*FLEN/8, x4, x1, x2) - -inst_2243: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b400000; valaddr_reg:x3; val_offset:6729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6729*FLEN/8, x4, x1, x2) - -inst_2244: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b600000; valaddr_reg:x3; val_offset:6732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6732*FLEN/8, x4, x1, x2) - -inst_2245: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b700000; valaddr_reg:x3; val_offset:6735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6735*FLEN/8, x4, x1, x2) - -inst_2246: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b780000; valaddr_reg:x3; val_offset:6738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6738*FLEN/8, x4, x1, x2) - -inst_2247: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7c0000; valaddr_reg:x3; val_offset:6741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6741*FLEN/8, x4, x1, x2) - -inst_2248: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7e0000; valaddr_reg:x3; val_offset:6744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6744*FLEN/8, x4, x1, x2) - -inst_2249: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7f0000; valaddr_reg:x3; val_offset:6747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6747*FLEN/8, x4, x1, x2) - -inst_2250: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7f8000; valaddr_reg:x3; val_offset:6750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6750*FLEN/8, x4, x1, x2) - -inst_2251: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7fc000; valaddr_reg:x3; val_offset:6753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6753*FLEN/8, x4, x1, x2) - -inst_2252: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7fe000; valaddr_reg:x3; val_offset:6756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6756*FLEN/8, x4, x1, x2) - -inst_2253: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7ff000; valaddr_reg:x3; val_offset:6759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6759*FLEN/8, x4, x1, x2) - -inst_2254: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7ff800; valaddr_reg:x3; val_offset:6762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6762*FLEN/8, x4, x1, x2) - -inst_2255: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7ffc00; valaddr_reg:x3; val_offset:6765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6765*FLEN/8, x4, x1, x2) - -inst_2256: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7ffe00; valaddr_reg:x3; val_offset:6768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6768*FLEN/8, x4, x1, x2) - -inst_2257: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7fff00; valaddr_reg:x3; val_offset:6771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6771*FLEN/8, x4, x1, x2) - -inst_2258: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7fff80; valaddr_reg:x3; val_offset:6774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6774*FLEN/8, x4, x1, x2) - -inst_2259: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7fffc0; valaddr_reg:x3; val_offset:6777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6777*FLEN/8, x4, x1, x2) - -inst_2260: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7fffe0; valaddr_reg:x3; val_offset:6780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6780*FLEN/8, x4, x1, x2) - -inst_2261: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7ffff0; valaddr_reg:x3; val_offset:6783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6783*FLEN/8, x4, x1, x2) - -inst_2262: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7ffff8; valaddr_reg:x3; val_offset:6786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6786*FLEN/8, x4, x1, x2) - -inst_2263: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7ffffc; valaddr_reg:x3; val_offset:6789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6789*FLEN/8, x4, x1, x2) - -inst_2264: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7ffffe; valaddr_reg:x3; val_offset:6792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6792*FLEN/8, x4, x1, x2) - -inst_2265: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3b7fffff; valaddr_reg:x3; val_offset:6795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6795*FLEN/8, x4, x1, x2) - -inst_2266: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3f800001; valaddr_reg:x3; val_offset:6798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6798*FLEN/8, x4, x1, x2) - -inst_2267: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3f800003; valaddr_reg:x3; val_offset:6801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6801*FLEN/8, x4, x1, x2) - -inst_2268: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3f800007; valaddr_reg:x3; val_offset:6804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6804*FLEN/8, x4, x1, x2) - -inst_2269: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3f999999; valaddr_reg:x3; val_offset:6807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6807*FLEN/8, x4, x1, x2) - -inst_2270: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:6810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6810*FLEN/8, x4, x1, x2) - -inst_2271: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:6813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6813*FLEN/8, x4, x1, x2) - -inst_2272: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:6816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6816*FLEN/8, x4, x1, x2) - -inst_2273: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:6819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6819*FLEN/8, x4, x1, x2) - -inst_2274: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:6822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6822*FLEN/8, x4, x1, x2) - -inst_2275: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:6825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6825*FLEN/8, x4, x1, x2) - -inst_2276: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:6828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6828*FLEN/8, x4, x1, x2) - -inst_2277: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:6831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6831*FLEN/8, x4, x1, x2) - -inst_2278: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:6834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6834*FLEN/8, x4, x1, x2) - -inst_2279: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:6837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6837*FLEN/8, x4, x1, x2) - -inst_2280: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:6840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6840*FLEN/8, x4, x1, x2) - -inst_2281: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:6843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6843*FLEN/8, x4, x1, x2) - -inst_2282: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80000000; valaddr_reg:x3; val_offset:6846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6846*FLEN/8, x4, x1, x2) - -inst_2283: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:6849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6849*FLEN/8, x4, x1, x2) - -inst_2284: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:6852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6852*FLEN/8, x4, x1, x2) - -inst_2285: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:6855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6855*FLEN/8, x4, x1, x2) - -inst_2286: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8000000f; valaddr_reg:x3; val_offset:6858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6858*FLEN/8, x4, x1, x2) - -inst_2287: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8000001f; valaddr_reg:x3; val_offset:6861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6861*FLEN/8, x4, x1, x2) - -inst_2288: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8000003f; valaddr_reg:x3; val_offset:6864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6864*FLEN/8, x4, x1, x2) - -inst_2289: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8000007f; valaddr_reg:x3; val_offset:6867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6867*FLEN/8, x4, x1, x2) - -inst_2290: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x800000ff; valaddr_reg:x3; val_offset:6870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6870*FLEN/8, x4, x1, x2) - -inst_2291: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x800001ff; valaddr_reg:x3; val_offset:6873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6873*FLEN/8, x4, x1, x2) - -inst_2292: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x800003ff; valaddr_reg:x3; val_offset:6876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6876*FLEN/8, x4, x1, x2) - -inst_2293: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x800007ff; valaddr_reg:x3; val_offset:6879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6879*FLEN/8, x4, x1, x2) - -inst_2294: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80000fff; valaddr_reg:x3; val_offset:6882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6882*FLEN/8, x4, x1, x2) - -inst_2295: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80001fff; valaddr_reg:x3; val_offset:6885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6885*FLEN/8, x4, x1, x2) - -inst_2296: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80003fff; valaddr_reg:x3; val_offset:6888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6888*FLEN/8, x4, x1, x2) - -inst_2297: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80007fff; valaddr_reg:x3; val_offset:6891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6891*FLEN/8, x4, x1, x2) - -inst_2298: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8000ffff; valaddr_reg:x3; val_offset:6894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6894*FLEN/8, x4, x1, x2) - -inst_2299: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8001ffff; valaddr_reg:x3; val_offset:6897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6897*FLEN/8, x4, x1, x2) - -inst_2300: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8003ffff; valaddr_reg:x3; val_offset:6900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6900*FLEN/8, x4, x1, x2) - -inst_2301: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8007ffff; valaddr_reg:x3; val_offset:6903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6903*FLEN/8, x4, x1, x2) - -inst_2302: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x800fffff; valaddr_reg:x3; val_offset:6906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6906*FLEN/8, x4, x1, x2) - -inst_2303: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:6909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6909*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_19) - -inst_2304: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x801fffff; valaddr_reg:x3; val_offset:6912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6912*FLEN/8, x4, x1, x2) - -inst_2305: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:6915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6915*FLEN/8, x4, x1, x2) - -inst_2306: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:6918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6918*FLEN/8, x4, x1, x2) - -inst_2307: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:6921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6921*FLEN/8, x4, x1, x2) - -inst_2308: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:6924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6924*FLEN/8, x4, x1, x2) - -inst_2309: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x803fffff; valaddr_reg:x3; val_offset:6927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6927*FLEN/8, x4, x1, x2) - -inst_2310: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80400000; valaddr_reg:x3; val_offset:6930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6930*FLEN/8, x4, x1, x2) - -inst_2311: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:6933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6933*FLEN/8, x4, x1, x2) - -inst_2312: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:6936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6936*FLEN/8, x4, x1, x2) - -inst_2313: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:6939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6939*FLEN/8, x4, x1, x2) - -inst_2314: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80600000; valaddr_reg:x3; val_offset:6942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6942*FLEN/8, x4, x1, x2) - -inst_2315: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:6945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6945*FLEN/8, x4, x1, x2) - -inst_2316: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:6948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6948*FLEN/8, x4, x1, x2) - -inst_2317: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80700000; valaddr_reg:x3; val_offset:6951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6951*FLEN/8, x4, x1, x2) - -inst_2318: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x80780000; valaddr_reg:x3; val_offset:6954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6954*FLEN/8, x4, x1, x2) - -inst_2319: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807c0000; valaddr_reg:x3; val_offset:6957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6957*FLEN/8, x4, x1, x2) - -inst_2320: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807e0000; valaddr_reg:x3; val_offset:6960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6960*FLEN/8, x4, x1, x2) - -inst_2321: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807f0000; valaddr_reg:x3; val_offset:6963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6963*FLEN/8, x4, x1, x2) - -inst_2322: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807f8000; valaddr_reg:x3; val_offset:6966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6966*FLEN/8, x4, x1, x2) - -inst_2323: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807fc000; valaddr_reg:x3; val_offset:6969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6969*FLEN/8, x4, x1, x2) - -inst_2324: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807fe000; valaddr_reg:x3; val_offset:6972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6972*FLEN/8, x4, x1, x2) - -inst_2325: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807ff000; valaddr_reg:x3; val_offset:6975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6975*FLEN/8, x4, x1, x2) - -inst_2326: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807ff800; valaddr_reg:x3; val_offset:6978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6978*FLEN/8, x4, x1, x2) - -inst_2327: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807ffc00; valaddr_reg:x3; val_offset:6981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6981*FLEN/8, x4, x1, x2) - -inst_2328: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807ffe00; valaddr_reg:x3; val_offset:6984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6984*FLEN/8, x4, x1, x2) - -inst_2329: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807fff00; valaddr_reg:x3; val_offset:6987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6987*FLEN/8, x4, x1, x2) - -inst_2330: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807fff80; valaddr_reg:x3; val_offset:6990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6990*FLEN/8, x4, x1, x2) - -inst_2331: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807fffc0; valaddr_reg:x3; val_offset:6993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6993*FLEN/8, x4, x1, x2) - -inst_2332: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807fffe0; valaddr_reg:x3; val_offset:6996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6996*FLEN/8, x4, x1, x2) - -inst_2333: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807ffff0; valaddr_reg:x3; val_offset:6999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6999*FLEN/8, x4, x1, x2) - -inst_2334: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:7002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7002*FLEN/8, x4, x1, x2) - -inst_2335: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:7005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7005*FLEN/8, x4, x1, x2) - -inst_2336: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:7008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7008*FLEN/8, x4, x1, x2) - -inst_2337: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; -op3val:0x807fffff; valaddr_reg:x3; val_offset:7011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7011*FLEN/8, x4, x1, x2) - -inst_2338: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30000000; valaddr_reg:x3; val_offset:7014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7014*FLEN/8, x4, x1, x2) - -inst_2339: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30000001; valaddr_reg:x3; val_offset:7017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7017*FLEN/8, x4, x1, x2) - -inst_2340: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30000003; valaddr_reg:x3; val_offset:7020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7020*FLEN/8, x4, x1, x2) - -inst_2341: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30000007; valaddr_reg:x3; val_offset:7023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7023*FLEN/8, x4, x1, x2) - -inst_2342: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3000000f; valaddr_reg:x3; val_offset:7026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7026*FLEN/8, x4, x1, x2) - -inst_2343: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3000001f; valaddr_reg:x3; val_offset:7029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7029*FLEN/8, x4, x1, x2) - -inst_2344: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3000003f; valaddr_reg:x3; val_offset:7032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7032*FLEN/8, x4, x1, x2) - -inst_2345: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3000007f; valaddr_reg:x3; val_offset:7035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7035*FLEN/8, x4, x1, x2) - -inst_2346: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x300000ff; valaddr_reg:x3; val_offset:7038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7038*FLEN/8, x4, x1, x2) - -inst_2347: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x300001ff; valaddr_reg:x3; val_offset:7041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7041*FLEN/8, x4, x1, x2) - -inst_2348: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x300003ff; valaddr_reg:x3; val_offset:7044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7044*FLEN/8, x4, x1, x2) - -inst_2349: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x300007ff; valaddr_reg:x3; val_offset:7047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7047*FLEN/8, x4, x1, x2) - -inst_2350: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30000fff; valaddr_reg:x3; val_offset:7050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7050*FLEN/8, x4, x1, x2) - -inst_2351: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30001fff; valaddr_reg:x3; val_offset:7053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7053*FLEN/8, x4, x1, x2) - -inst_2352: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30003fff; valaddr_reg:x3; val_offset:7056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7056*FLEN/8, x4, x1, x2) - -inst_2353: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30007fff; valaddr_reg:x3; val_offset:7059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7059*FLEN/8, x4, x1, x2) - -inst_2354: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3000ffff; valaddr_reg:x3; val_offset:7062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7062*FLEN/8, x4, x1, x2) - -inst_2355: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3001ffff; valaddr_reg:x3; val_offset:7065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7065*FLEN/8, x4, x1, x2) - -inst_2356: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3003ffff; valaddr_reg:x3; val_offset:7068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7068*FLEN/8, x4, x1, x2) - -inst_2357: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3007ffff; valaddr_reg:x3; val_offset:7071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7071*FLEN/8, x4, x1, x2) - -inst_2358: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x300fffff; valaddr_reg:x3; val_offset:7074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7074*FLEN/8, x4, x1, x2) - -inst_2359: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x301fffff; valaddr_reg:x3; val_offset:7077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7077*FLEN/8, x4, x1, x2) - -inst_2360: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x303fffff; valaddr_reg:x3; val_offset:7080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7080*FLEN/8, x4, x1, x2) - -inst_2361: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30400000; valaddr_reg:x3; val_offset:7083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7083*FLEN/8, x4, x1, x2) - -inst_2362: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30600000; valaddr_reg:x3; val_offset:7086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7086*FLEN/8, x4, x1, x2) - -inst_2363: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30700000; valaddr_reg:x3; val_offset:7089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7089*FLEN/8, x4, x1, x2) - -inst_2364: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x30780000; valaddr_reg:x3; val_offset:7092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7092*FLEN/8, x4, x1, x2) - -inst_2365: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307c0000; valaddr_reg:x3; val_offset:7095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7095*FLEN/8, x4, x1, x2) - -inst_2366: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307e0000; valaddr_reg:x3; val_offset:7098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7098*FLEN/8, x4, x1, x2) - -inst_2367: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307f0000; valaddr_reg:x3; val_offset:7101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7101*FLEN/8, x4, x1, x2) - -inst_2368: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307f8000; valaddr_reg:x3; val_offset:7104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7104*FLEN/8, x4, x1, x2) - -inst_2369: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307fc000; valaddr_reg:x3; val_offset:7107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7107*FLEN/8, x4, x1, x2) - -inst_2370: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307fe000; valaddr_reg:x3; val_offset:7110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7110*FLEN/8, x4, x1, x2) - -inst_2371: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307ff000; valaddr_reg:x3; val_offset:7113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7113*FLEN/8, x4, x1, x2) - -inst_2372: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307ff800; valaddr_reg:x3; val_offset:7116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7116*FLEN/8, x4, x1, x2) - -inst_2373: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307ffc00; valaddr_reg:x3; val_offset:7119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7119*FLEN/8, x4, x1, x2) - -inst_2374: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307ffe00; valaddr_reg:x3; val_offset:7122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7122*FLEN/8, x4, x1, x2) - -inst_2375: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307fff00; valaddr_reg:x3; val_offset:7125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7125*FLEN/8, x4, x1, x2) - -inst_2376: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307fff80; valaddr_reg:x3; val_offset:7128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7128*FLEN/8, x4, x1, x2) - -inst_2377: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307fffc0; valaddr_reg:x3; val_offset:7131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7131*FLEN/8, x4, x1, x2) - -inst_2378: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307fffe0; valaddr_reg:x3; val_offset:7134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7134*FLEN/8, x4, x1, x2) - -inst_2379: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307ffff0; valaddr_reg:x3; val_offset:7137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7137*FLEN/8, x4, x1, x2) - -inst_2380: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307ffff8; valaddr_reg:x3; val_offset:7140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7140*FLEN/8, x4, x1, x2) - -inst_2381: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307ffffc; valaddr_reg:x3; val_offset:7143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7143*FLEN/8, x4, x1, x2) - -inst_2382: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307ffffe; valaddr_reg:x3; val_offset:7146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7146*FLEN/8, x4, x1, x2) - -inst_2383: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x307fffff; valaddr_reg:x3; val_offset:7149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7149*FLEN/8, x4, x1, x2) - -inst_2384: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3f800001; valaddr_reg:x3; val_offset:7152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7152*FLEN/8, x4, x1, x2) - -inst_2385: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3f800003; valaddr_reg:x3; val_offset:7155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7155*FLEN/8, x4, x1, x2) - -inst_2386: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3f800007; valaddr_reg:x3; val_offset:7158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7158*FLEN/8, x4, x1, x2) - -inst_2387: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3f999999; valaddr_reg:x3; val_offset:7161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7161*FLEN/8, x4, x1, x2) - -inst_2388: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:7164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7164*FLEN/8, x4, x1, x2) - -inst_2389: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:7167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7167*FLEN/8, x4, x1, x2) - -inst_2390: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:7170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7170*FLEN/8, x4, x1, x2) - -inst_2391: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:7173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7173*FLEN/8, x4, x1, x2) - -inst_2392: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:7176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7176*FLEN/8, x4, x1, x2) - -inst_2393: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:7179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7179*FLEN/8, x4, x1, x2) - -inst_2394: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:7182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7182*FLEN/8, x4, x1, x2) - -inst_2395: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:7185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7185*FLEN/8, x4, x1, x2) - -inst_2396: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:7188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7188*FLEN/8, x4, x1, x2) - -inst_2397: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:7191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7191*FLEN/8, x4, x1, x2) - -inst_2398: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:7194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7194*FLEN/8, x4, x1, x2) - -inst_2399: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:7197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7197*FLEN/8, x4, x1, x2) - -inst_2400: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:7200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7200*FLEN/8, x4, x1, x2) - -inst_2401: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:7203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7203*FLEN/8, x4, x1, x2) - -inst_2402: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:7206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7206*FLEN/8, x4, x1, x2) - -inst_2403: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:7209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7209*FLEN/8, x4, x1, x2) - -inst_2404: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:7212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7212*FLEN/8, x4, x1, x2) - -inst_2405: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:7215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7215*FLEN/8, x4, x1, x2) - -inst_2406: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:7218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7218*FLEN/8, x4, x1, x2) - -inst_2407: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:7221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7221*FLEN/8, x4, x1, x2) - -inst_2408: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:7224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7224*FLEN/8, x4, x1, x2) - -inst_2409: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:7227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7227*FLEN/8, x4, x1, x2) - -inst_2410: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:7230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7230*FLEN/8, x4, x1, x2) - -inst_2411: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:7233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7233*FLEN/8, x4, x1, x2) - -inst_2412: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:7236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7236*FLEN/8, x4, x1, x2) - -inst_2413: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:7239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7239*FLEN/8, x4, x1, x2) - -inst_2414: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:7242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7242*FLEN/8, x4, x1, x2) - -inst_2415: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:7245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7245*FLEN/8, x4, x1, x2) - -inst_2416: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf000000; valaddr_reg:x3; val_offset:7248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7248*FLEN/8, x4, x1, x2) - -inst_2417: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf000001; valaddr_reg:x3; val_offset:7251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7251*FLEN/8, x4, x1, x2) - -inst_2418: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf000003; valaddr_reg:x3; val_offset:7254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7254*FLEN/8, x4, x1, x2) - -inst_2419: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf000007; valaddr_reg:x3; val_offset:7257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7257*FLEN/8, x4, x1, x2) - -inst_2420: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf00000f; valaddr_reg:x3; val_offset:7260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7260*FLEN/8, x4, x1, x2) - -inst_2421: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf00001f; valaddr_reg:x3; val_offset:7263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7263*FLEN/8, x4, x1, x2) - -inst_2422: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf00003f; valaddr_reg:x3; val_offset:7266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7266*FLEN/8, x4, x1, x2) - -inst_2423: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf00007f; valaddr_reg:x3; val_offset:7269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7269*FLEN/8, x4, x1, x2) - -inst_2424: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf0000ff; valaddr_reg:x3; val_offset:7272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7272*FLEN/8, x4, x1, x2) - -inst_2425: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf0001ff; valaddr_reg:x3; val_offset:7275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7275*FLEN/8, x4, x1, x2) - -inst_2426: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf0003ff; valaddr_reg:x3; val_offset:7278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7278*FLEN/8, x4, x1, x2) - -inst_2427: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf0007ff; valaddr_reg:x3; val_offset:7281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7281*FLEN/8, x4, x1, x2) - -inst_2428: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf000fff; valaddr_reg:x3; val_offset:7284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7284*FLEN/8, x4, x1, x2) - -inst_2429: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf001fff; valaddr_reg:x3; val_offset:7287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7287*FLEN/8, x4, x1, x2) - -inst_2430: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf003fff; valaddr_reg:x3; val_offset:7290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7290*FLEN/8, x4, x1, x2) - -inst_2431: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf007fff; valaddr_reg:x3; val_offset:7293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7293*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_20) - -inst_2432: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf00ffff; valaddr_reg:x3; val_offset:7296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7296*FLEN/8, x4, x1, x2) - -inst_2433: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf01ffff; valaddr_reg:x3; val_offset:7299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7299*FLEN/8, x4, x1, x2) - -inst_2434: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf03ffff; valaddr_reg:x3; val_offset:7302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7302*FLEN/8, x4, x1, x2) - -inst_2435: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf07ffff; valaddr_reg:x3; val_offset:7305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7305*FLEN/8, x4, x1, x2) - -inst_2436: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf0fffff; valaddr_reg:x3; val_offset:7308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7308*FLEN/8, x4, x1, x2) - -inst_2437: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf1fffff; valaddr_reg:x3; val_offset:7311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7311*FLEN/8, x4, x1, x2) - -inst_2438: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf3fffff; valaddr_reg:x3; val_offset:7314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7314*FLEN/8, x4, x1, x2) - -inst_2439: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf400000; valaddr_reg:x3; val_offset:7317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7317*FLEN/8, x4, x1, x2) - -inst_2440: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf600000; valaddr_reg:x3; val_offset:7320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7320*FLEN/8, x4, x1, x2) - -inst_2441: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf700000; valaddr_reg:x3; val_offset:7323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7323*FLEN/8, x4, x1, x2) - -inst_2442: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf780000; valaddr_reg:x3; val_offset:7326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7326*FLEN/8, x4, x1, x2) - -inst_2443: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7c0000; valaddr_reg:x3; val_offset:7329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7329*FLEN/8, x4, x1, x2) - -inst_2444: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7e0000; valaddr_reg:x3; val_offset:7332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7332*FLEN/8, x4, x1, x2) - -inst_2445: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7f0000; valaddr_reg:x3; val_offset:7335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7335*FLEN/8, x4, x1, x2) - -inst_2446: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7f8000; valaddr_reg:x3; val_offset:7338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7338*FLEN/8, x4, x1, x2) - -inst_2447: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7fc000; valaddr_reg:x3; val_offset:7341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7341*FLEN/8, x4, x1, x2) - -inst_2448: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7fe000; valaddr_reg:x3; val_offset:7344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7344*FLEN/8, x4, x1, x2) - -inst_2449: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7ff000; valaddr_reg:x3; val_offset:7347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7347*FLEN/8, x4, x1, x2) - -inst_2450: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7ff800; valaddr_reg:x3; val_offset:7350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7350*FLEN/8, x4, x1, x2) - -inst_2451: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7ffc00; valaddr_reg:x3; val_offset:7353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7353*FLEN/8, x4, x1, x2) - -inst_2452: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7ffe00; valaddr_reg:x3; val_offset:7356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7356*FLEN/8, x4, x1, x2) - -inst_2453: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7fff00; valaddr_reg:x3; val_offset:7359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7359*FLEN/8, x4, x1, x2) - -inst_2454: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7fff80; valaddr_reg:x3; val_offset:7362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7362*FLEN/8, x4, x1, x2) - -inst_2455: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7fffc0; valaddr_reg:x3; val_offset:7365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7365*FLEN/8, x4, x1, x2) - -inst_2456: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7fffe0; valaddr_reg:x3; val_offset:7368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7368*FLEN/8, x4, x1, x2) - -inst_2457: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7ffff0; valaddr_reg:x3; val_offset:7371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7371*FLEN/8, x4, x1, x2) - -inst_2458: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7ffff8; valaddr_reg:x3; val_offset:7374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7374*FLEN/8, x4, x1, x2) - -inst_2459: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7ffffc; valaddr_reg:x3; val_offset:7377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7377*FLEN/8, x4, x1, x2) - -inst_2460: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7ffffe; valaddr_reg:x3; val_offset:7380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7380*FLEN/8, x4, x1, x2) - -inst_2461: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; -op3val:0xf7fffff; valaddr_reg:x3; val_offset:7383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7383*FLEN/8, x4, x1, x2) - -inst_2462: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab800000; valaddr_reg:x3; val_offset:7386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7386*FLEN/8, x4, x1, x2) - -inst_2463: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab800001; valaddr_reg:x3; val_offset:7389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7389*FLEN/8, x4, x1, x2) - -inst_2464: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab800003; valaddr_reg:x3; val_offset:7392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7392*FLEN/8, x4, x1, x2) - -inst_2465: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab800007; valaddr_reg:x3; val_offset:7395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7395*FLEN/8, x4, x1, x2) - -inst_2466: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab80000f; valaddr_reg:x3; val_offset:7398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7398*FLEN/8, x4, x1, x2) - -inst_2467: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab80001f; valaddr_reg:x3; val_offset:7401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7401*FLEN/8, x4, x1, x2) - -inst_2468: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab80003f; valaddr_reg:x3; val_offset:7404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7404*FLEN/8, x4, x1, x2) - -inst_2469: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab80007f; valaddr_reg:x3; val_offset:7407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7407*FLEN/8, x4, x1, x2) - -inst_2470: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab8000ff; valaddr_reg:x3; val_offset:7410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7410*FLEN/8, x4, x1, x2) - -inst_2471: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab8001ff; valaddr_reg:x3; val_offset:7413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7413*FLEN/8, x4, x1, x2) - -inst_2472: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab8003ff; valaddr_reg:x3; val_offset:7416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7416*FLEN/8, x4, x1, x2) - -inst_2473: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab8007ff; valaddr_reg:x3; val_offset:7419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7419*FLEN/8, x4, x1, x2) - -inst_2474: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab800fff; valaddr_reg:x3; val_offset:7422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7422*FLEN/8, x4, x1, x2) - -inst_2475: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab801fff; valaddr_reg:x3; val_offset:7425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7425*FLEN/8, x4, x1, x2) - -inst_2476: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab803fff; valaddr_reg:x3; val_offset:7428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7428*FLEN/8, x4, x1, x2) - -inst_2477: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab807fff; valaddr_reg:x3; val_offset:7431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7431*FLEN/8, x4, x1, x2) - -inst_2478: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab80ffff; valaddr_reg:x3; val_offset:7434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7434*FLEN/8, x4, x1, x2) - -inst_2479: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab81ffff; valaddr_reg:x3; val_offset:7437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7437*FLEN/8, x4, x1, x2) - -inst_2480: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab83ffff; valaddr_reg:x3; val_offset:7440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7440*FLEN/8, x4, x1, x2) - -inst_2481: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab87ffff; valaddr_reg:x3; val_offset:7443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7443*FLEN/8, x4, x1, x2) - -inst_2482: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab8fffff; valaddr_reg:x3; val_offset:7446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7446*FLEN/8, x4, x1, x2) - -inst_2483: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xab9fffff; valaddr_reg:x3; val_offset:7449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7449*FLEN/8, x4, x1, x2) - -inst_2484: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabbfffff; valaddr_reg:x3; val_offset:7452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7452*FLEN/8, x4, x1, x2) - -inst_2485: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabc00000; valaddr_reg:x3; val_offset:7455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7455*FLEN/8, x4, x1, x2) - -inst_2486: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabe00000; valaddr_reg:x3; val_offset:7458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7458*FLEN/8, x4, x1, x2) - -inst_2487: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabf00000; valaddr_reg:x3; val_offset:7461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7461*FLEN/8, x4, x1, x2) - -inst_2488: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabf80000; valaddr_reg:x3; val_offset:7464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7464*FLEN/8, x4, x1, x2) - -inst_2489: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfc0000; valaddr_reg:x3; val_offset:7467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7467*FLEN/8, x4, x1, x2) - -inst_2490: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfe0000; valaddr_reg:x3; val_offset:7470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7470*FLEN/8, x4, x1, x2) - -inst_2491: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabff0000; valaddr_reg:x3; val_offset:7473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7473*FLEN/8, x4, x1, x2) - -inst_2492: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabff8000; valaddr_reg:x3; val_offset:7476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7476*FLEN/8, x4, x1, x2) - -inst_2493: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabffc000; valaddr_reg:x3; val_offset:7479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7479*FLEN/8, x4, x1, x2) - -inst_2494: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabffe000; valaddr_reg:x3; val_offset:7482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7482*FLEN/8, x4, x1, x2) - -inst_2495: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfff000; valaddr_reg:x3; val_offset:7485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7485*FLEN/8, x4, x1, x2) - -inst_2496: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfff800; valaddr_reg:x3; val_offset:7488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7488*FLEN/8, x4, x1, x2) - -inst_2497: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfffc00; valaddr_reg:x3; val_offset:7491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7491*FLEN/8, x4, x1, x2) - -inst_2498: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfffe00; valaddr_reg:x3; val_offset:7494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7494*FLEN/8, x4, x1, x2) - -inst_2499: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabffff00; valaddr_reg:x3; val_offset:7497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7497*FLEN/8, x4, x1, x2) - -inst_2500: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabffff80; valaddr_reg:x3; val_offset:7500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7500*FLEN/8, x4, x1, x2) - -inst_2501: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabffffc0; valaddr_reg:x3; val_offset:7503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7503*FLEN/8, x4, x1, x2) - -inst_2502: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabffffe0; valaddr_reg:x3; val_offset:7506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7506*FLEN/8, x4, x1, x2) - -inst_2503: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfffff0; valaddr_reg:x3; val_offset:7509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7509*FLEN/8, x4, x1, x2) - -inst_2504: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfffff8; valaddr_reg:x3; val_offset:7512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7512*FLEN/8, x4, x1, x2) - -inst_2505: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfffffc; valaddr_reg:x3; val_offset:7515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7515*FLEN/8, x4, x1, x2) - -inst_2506: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabfffffe; valaddr_reg:x3; val_offset:7518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7518*FLEN/8, x4, x1, x2) - -inst_2507: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xabffffff; valaddr_reg:x3; val_offset:7521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7521*FLEN/8, x4, x1, x2) - -inst_2508: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbf800001; valaddr_reg:x3; val_offset:7524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7524*FLEN/8, x4, x1, x2) - -inst_2509: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbf800003; valaddr_reg:x3; val_offset:7527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7527*FLEN/8, x4, x1, x2) - -inst_2510: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbf800007; valaddr_reg:x3; val_offset:7530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7530*FLEN/8, x4, x1, x2) - -inst_2511: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbf999999; valaddr_reg:x3; val_offset:7533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7533*FLEN/8, x4, x1, x2) - -inst_2512: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:7536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7536*FLEN/8, x4, x1, x2) - -inst_2513: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:7539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7539*FLEN/8, x4, x1, x2) - -inst_2514: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:7542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7542*FLEN/8, x4, x1, x2) - -inst_2515: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:7545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7545*FLEN/8, x4, x1, x2) - -inst_2516: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:7548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7548*FLEN/8, x4, x1, x2) - -inst_2517: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:7551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7551*FLEN/8, x4, x1, x2) - -inst_2518: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:7554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7554*FLEN/8, x4, x1, x2) - -inst_2519: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:7557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7557*FLEN/8, x4, x1, x2) - -inst_2520: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:7560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7560*FLEN/8, x4, x1, x2) - -inst_2521: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:7563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7563*FLEN/8, x4, x1, x2) - -inst_2522: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:7566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7566*FLEN/8, x4, x1, x2) - -inst_2523: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:7569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7569*FLEN/8, x4, x1, x2) - -inst_2524: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:7572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7572*FLEN/8, x4, x1, x2) - -inst_2525: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:7575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7575*FLEN/8, x4, x1, x2) - -inst_2526: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:7578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7578*FLEN/8, x4, x1, x2) - -inst_2527: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:7581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7581*FLEN/8, x4, x1, x2) - -inst_2528: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:7584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7584*FLEN/8, x4, x1, x2) - -inst_2529: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:7587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7587*FLEN/8, x4, x1, x2) - -inst_2530: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:7590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7590*FLEN/8, x4, x1, x2) - -inst_2531: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:7593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7593*FLEN/8, x4, x1, x2) - -inst_2532: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:7596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7596*FLEN/8, x4, x1, x2) - -inst_2533: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:7599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7599*FLEN/8, x4, x1, x2) - -inst_2534: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:7602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7602*FLEN/8, x4, x1, x2) - -inst_2535: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:7605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7605*FLEN/8, x4, x1, x2) - -inst_2536: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:7608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7608*FLEN/8, x4, x1, x2) - -inst_2537: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:7611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7611*FLEN/8, x4, x1, x2) - -inst_2538: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:7614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7614*FLEN/8, x4, x1, x2) - -inst_2539: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:7617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7617*FLEN/8, x4, x1, x2) - -inst_2540: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf000000; valaddr_reg:x3; val_offset:7620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7620*FLEN/8, x4, x1, x2) - -inst_2541: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf000001; valaddr_reg:x3; val_offset:7623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7623*FLEN/8, x4, x1, x2) - -inst_2542: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf000003; valaddr_reg:x3; val_offset:7626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7626*FLEN/8, x4, x1, x2) - -inst_2543: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf000007; valaddr_reg:x3; val_offset:7629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7629*FLEN/8, x4, x1, x2) - -inst_2544: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf00000f; valaddr_reg:x3; val_offset:7632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7632*FLEN/8, x4, x1, x2) - -inst_2545: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf00001f; valaddr_reg:x3; val_offset:7635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7635*FLEN/8, x4, x1, x2) - -inst_2546: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf00003f; valaddr_reg:x3; val_offset:7638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7638*FLEN/8, x4, x1, x2) - -inst_2547: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf00007f; valaddr_reg:x3; val_offset:7641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7641*FLEN/8, x4, x1, x2) - -inst_2548: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf0000ff; valaddr_reg:x3; val_offset:7644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7644*FLEN/8, x4, x1, x2) - -inst_2549: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf0001ff; valaddr_reg:x3; val_offset:7647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7647*FLEN/8, x4, x1, x2) - -inst_2550: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf0003ff; valaddr_reg:x3; val_offset:7650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7650*FLEN/8, x4, x1, x2) - -inst_2551: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf0007ff; valaddr_reg:x3; val_offset:7653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7653*FLEN/8, x4, x1, x2) - -inst_2552: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf000fff; valaddr_reg:x3; val_offset:7656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7656*FLEN/8, x4, x1, x2) - -inst_2553: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf001fff; valaddr_reg:x3; val_offset:7659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7659*FLEN/8, x4, x1, x2) - -inst_2554: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf003fff; valaddr_reg:x3; val_offset:7662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7662*FLEN/8, x4, x1, x2) - -inst_2555: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf007fff; valaddr_reg:x3; val_offset:7665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7665*FLEN/8, x4, x1, x2) - -inst_2556: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf00ffff; valaddr_reg:x3; val_offset:7668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7668*FLEN/8, x4, x1, x2) - -inst_2557: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf01ffff; valaddr_reg:x3; val_offset:7671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7671*FLEN/8, x4, x1, x2) - -inst_2558: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf03ffff; valaddr_reg:x3; val_offset:7674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7674*FLEN/8, x4, x1, x2) - -inst_2559: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf07ffff; valaddr_reg:x3; val_offset:7677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7677*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_21) - -inst_2560: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf0fffff; valaddr_reg:x3; val_offset:7680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7680*FLEN/8, x4, x1, x2) - -inst_2561: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf1fffff; valaddr_reg:x3; val_offset:7683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7683*FLEN/8, x4, x1, x2) - -inst_2562: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf3fffff; valaddr_reg:x3; val_offset:7686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7686*FLEN/8, x4, x1, x2) - -inst_2563: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf400000; valaddr_reg:x3; val_offset:7689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7689*FLEN/8, x4, x1, x2) - -inst_2564: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf600000; valaddr_reg:x3; val_offset:7692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7692*FLEN/8, x4, x1, x2) - -inst_2565: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf700000; valaddr_reg:x3; val_offset:7695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7695*FLEN/8, x4, x1, x2) - -inst_2566: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf780000; valaddr_reg:x3; val_offset:7698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7698*FLEN/8, x4, x1, x2) - -inst_2567: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7c0000; valaddr_reg:x3; val_offset:7701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7701*FLEN/8, x4, x1, x2) - -inst_2568: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7e0000; valaddr_reg:x3; val_offset:7704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7704*FLEN/8, x4, x1, x2) - -inst_2569: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7f0000; valaddr_reg:x3; val_offset:7707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7707*FLEN/8, x4, x1, x2) - -inst_2570: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7f8000; valaddr_reg:x3; val_offset:7710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7710*FLEN/8, x4, x1, x2) - -inst_2571: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7fc000; valaddr_reg:x3; val_offset:7713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7713*FLEN/8, x4, x1, x2) - -inst_2572: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7fe000; valaddr_reg:x3; val_offset:7716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7716*FLEN/8, x4, x1, x2) - -inst_2573: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7ff000; valaddr_reg:x3; val_offset:7719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7719*FLEN/8, x4, x1, x2) - -inst_2574: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7ff800; valaddr_reg:x3; val_offset:7722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7722*FLEN/8, x4, x1, x2) - -inst_2575: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7ffc00; valaddr_reg:x3; val_offset:7725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7725*FLEN/8, x4, x1, x2) - -inst_2576: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7ffe00; valaddr_reg:x3; val_offset:7728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7728*FLEN/8, x4, x1, x2) - -inst_2577: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7fff00; valaddr_reg:x3; val_offset:7731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7731*FLEN/8, x4, x1, x2) - -inst_2578: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7fff80; valaddr_reg:x3; val_offset:7734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7734*FLEN/8, x4, x1, x2) - -inst_2579: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7fffc0; valaddr_reg:x3; val_offset:7737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7737*FLEN/8, x4, x1, x2) - -inst_2580: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7fffe0; valaddr_reg:x3; val_offset:7740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7740*FLEN/8, x4, x1, x2) - -inst_2581: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7ffff0; valaddr_reg:x3; val_offset:7743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7743*FLEN/8, x4, x1, x2) - -inst_2582: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7ffff8; valaddr_reg:x3; val_offset:7746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7746*FLEN/8, x4, x1, x2) - -inst_2583: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7ffffc; valaddr_reg:x3; val_offset:7749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7749*FLEN/8, x4, x1, x2) - -inst_2584: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7ffffe; valaddr_reg:x3; val_offset:7752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7752*FLEN/8, x4, x1, x2) - -inst_2585: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; -op3val:0xf7fffff; valaddr_reg:x3; val_offset:7755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7755*FLEN/8, x4, x1, x2) - -inst_2586: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:7758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7758*FLEN/8, x4, x1, x2) - -inst_2587: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:7761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7761*FLEN/8, x4, x1, x2) - -inst_2588: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:7764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7764*FLEN/8, x4, x1, x2) - -inst_2589: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:7767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7767*FLEN/8, x4, x1, x2) - -inst_2590: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:7770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7770*FLEN/8, x4, x1, x2) - -inst_2591: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:7773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7773*FLEN/8, x4, x1, x2) - -inst_2592: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:7776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7776*FLEN/8, x4, x1, x2) - -inst_2593: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:7779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7779*FLEN/8, x4, x1, x2) - -inst_2594: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:7782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7782*FLEN/8, x4, x1, x2) - -inst_2595: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:7785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7785*FLEN/8, x4, x1, x2) - -inst_2596: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:7788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7788*FLEN/8, x4, x1, x2) - -inst_2597: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:7791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7791*FLEN/8, x4, x1, x2) - -inst_2598: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:7794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7794*FLEN/8, x4, x1, x2) - -inst_2599: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:7797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7797*FLEN/8, x4, x1, x2) - -inst_2600: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:7800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7800*FLEN/8, x4, x1, x2) - -inst_2601: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:7803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7803*FLEN/8, x4, x1, x2) - -inst_2602: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa800000; valaddr_reg:x3; val_offset:7806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7806*FLEN/8, x4, x1, x2) - -inst_2603: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa800001; valaddr_reg:x3; val_offset:7809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7809*FLEN/8, x4, x1, x2) - -inst_2604: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa800003; valaddr_reg:x3; val_offset:7812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7812*FLEN/8, x4, x1, x2) - -inst_2605: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa800007; valaddr_reg:x3; val_offset:7815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7815*FLEN/8, x4, x1, x2) - -inst_2606: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa80000f; valaddr_reg:x3; val_offset:7818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7818*FLEN/8, x4, x1, x2) - -inst_2607: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa80001f; valaddr_reg:x3; val_offset:7821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7821*FLEN/8, x4, x1, x2) - -inst_2608: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa80003f; valaddr_reg:x3; val_offset:7824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7824*FLEN/8, x4, x1, x2) - -inst_2609: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa80007f; valaddr_reg:x3; val_offset:7827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7827*FLEN/8, x4, x1, x2) - -inst_2610: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa8000ff; valaddr_reg:x3; val_offset:7830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7830*FLEN/8, x4, x1, x2) - -inst_2611: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa8001ff; valaddr_reg:x3; val_offset:7833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7833*FLEN/8, x4, x1, x2) - -inst_2612: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa8003ff; valaddr_reg:x3; val_offset:7836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7836*FLEN/8, x4, x1, x2) - -inst_2613: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa8007ff; valaddr_reg:x3; val_offset:7839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7839*FLEN/8, x4, x1, x2) - -inst_2614: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa800fff; valaddr_reg:x3; val_offset:7842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7842*FLEN/8, x4, x1, x2) - -inst_2615: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa801fff; valaddr_reg:x3; val_offset:7845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7845*FLEN/8, x4, x1, x2) - -inst_2616: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa803fff; valaddr_reg:x3; val_offset:7848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7848*FLEN/8, x4, x1, x2) - -inst_2617: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa807fff; valaddr_reg:x3; val_offset:7851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7851*FLEN/8, x4, x1, x2) - -inst_2618: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa80ffff; valaddr_reg:x3; val_offset:7854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7854*FLEN/8, x4, x1, x2) - -inst_2619: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa81ffff; valaddr_reg:x3; val_offset:7857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7857*FLEN/8, x4, x1, x2) - -inst_2620: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa83ffff; valaddr_reg:x3; val_offset:7860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7860*FLEN/8, x4, x1, x2) - -inst_2621: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa87ffff; valaddr_reg:x3; val_offset:7863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7863*FLEN/8, x4, x1, x2) - -inst_2622: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa8fffff; valaddr_reg:x3; val_offset:7866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7866*FLEN/8, x4, x1, x2) - -inst_2623: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xa9fffff; valaddr_reg:x3; val_offset:7869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7869*FLEN/8, x4, x1, x2) - -inst_2624: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xabfffff; valaddr_reg:x3; val_offset:7872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7872*FLEN/8, x4, x1, x2) - -inst_2625: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xac00000; valaddr_reg:x3; val_offset:7875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7875*FLEN/8, x4, x1, x2) - -inst_2626: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xae00000; valaddr_reg:x3; val_offset:7878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7878*FLEN/8, x4, x1, x2) - -inst_2627: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaf00000; valaddr_reg:x3; val_offset:7881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7881*FLEN/8, x4, x1, x2) - -inst_2628: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaf80000; valaddr_reg:x3; val_offset:7884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7884*FLEN/8, x4, x1, x2) - -inst_2629: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafc0000; valaddr_reg:x3; val_offset:7887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7887*FLEN/8, x4, x1, x2) - -inst_2630: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafe0000; valaddr_reg:x3; val_offset:7890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7890*FLEN/8, x4, x1, x2) - -inst_2631: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaff0000; valaddr_reg:x3; val_offset:7893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7893*FLEN/8, x4, x1, x2) - -inst_2632: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaff8000; valaddr_reg:x3; val_offset:7896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7896*FLEN/8, x4, x1, x2) - -inst_2633: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaffc000; valaddr_reg:x3; val_offset:7899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7899*FLEN/8, x4, x1, x2) - -inst_2634: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaffe000; valaddr_reg:x3; val_offset:7902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7902*FLEN/8, x4, x1, x2) - -inst_2635: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafff000; valaddr_reg:x3; val_offset:7905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7905*FLEN/8, x4, x1, x2) - -inst_2636: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafff800; valaddr_reg:x3; val_offset:7908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7908*FLEN/8, x4, x1, x2) - -inst_2637: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafffc00; valaddr_reg:x3; val_offset:7911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7911*FLEN/8, x4, x1, x2) - -inst_2638: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafffe00; valaddr_reg:x3; val_offset:7914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7914*FLEN/8, x4, x1, x2) - -inst_2639: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaffff00; valaddr_reg:x3; val_offset:7917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7917*FLEN/8, x4, x1, x2) - -inst_2640: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaffff80; valaddr_reg:x3; val_offset:7920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7920*FLEN/8, x4, x1, x2) - -inst_2641: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaffffc0; valaddr_reg:x3; val_offset:7923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7923*FLEN/8, x4, x1, x2) - -inst_2642: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaffffe0; valaddr_reg:x3; val_offset:7926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7926*FLEN/8, x4, x1, x2) - -inst_2643: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafffff0; valaddr_reg:x3; val_offset:7929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7929*FLEN/8, x4, x1, x2) - -inst_2644: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafffff8; valaddr_reg:x3; val_offset:7932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7932*FLEN/8, x4, x1, x2) - -inst_2645: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafffffc; valaddr_reg:x3; val_offset:7935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7935*FLEN/8, x4, x1, x2) - -inst_2646: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xafffffe; valaddr_reg:x3; val_offset:7938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7938*FLEN/8, x4, x1, x2) - -inst_2647: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; -op3val:0xaffffff; valaddr_reg:x3; val_offset:7941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7941*FLEN/8, x4, x1, x2) - -inst_2648: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f000000; valaddr_reg:x3; val_offset:7944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7944*FLEN/8, x4, x1, x2) - -inst_2649: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f000001; valaddr_reg:x3; val_offset:7947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7947*FLEN/8, x4, x1, x2) - -inst_2650: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f000003; valaddr_reg:x3; val_offset:7950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7950*FLEN/8, x4, x1, x2) - -inst_2651: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f000007; valaddr_reg:x3; val_offset:7953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7953*FLEN/8, x4, x1, x2) - -inst_2652: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f00000f; valaddr_reg:x3; val_offset:7956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7956*FLEN/8, x4, x1, x2) - -inst_2653: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f00001f; valaddr_reg:x3; val_offset:7959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7959*FLEN/8, x4, x1, x2) - -inst_2654: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f00003f; valaddr_reg:x3; val_offset:7962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7962*FLEN/8, x4, x1, x2) - -inst_2655: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f00007f; valaddr_reg:x3; val_offset:7965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7965*FLEN/8, x4, x1, x2) - -inst_2656: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f0000ff; valaddr_reg:x3; val_offset:7968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7968*FLEN/8, x4, x1, x2) - -inst_2657: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f0001ff; valaddr_reg:x3; val_offset:7971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7971*FLEN/8, x4, x1, x2) - -inst_2658: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f0003ff; valaddr_reg:x3; val_offset:7974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7974*FLEN/8, x4, x1, x2) - -inst_2659: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f0007ff; valaddr_reg:x3; val_offset:7977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7977*FLEN/8, x4, x1, x2) - -inst_2660: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f000fff; valaddr_reg:x3; val_offset:7980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7980*FLEN/8, x4, x1, x2) - -inst_2661: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f001fff; valaddr_reg:x3; val_offset:7983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7983*FLEN/8, x4, x1, x2) - -inst_2662: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f003fff; valaddr_reg:x3; val_offset:7986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7986*FLEN/8, x4, x1, x2) - -inst_2663: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f007fff; valaddr_reg:x3; val_offset:7989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7989*FLEN/8, x4, x1, x2) - -inst_2664: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f00ffff; valaddr_reg:x3; val_offset:7992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7992*FLEN/8, x4, x1, x2) - -inst_2665: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f01ffff; valaddr_reg:x3; val_offset:7995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7995*FLEN/8, x4, x1, x2) - -inst_2666: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f03ffff; valaddr_reg:x3; val_offset:7998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7998*FLEN/8, x4, x1, x2) - -inst_2667: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f07ffff; valaddr_reg:x3; val_offset:8001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8001*FLEN/8, x4, x1, x2) - -inst_2668: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f0fffff; valaddr_reg:x3; val_offset:8004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8004*FLEN/8, x4, x1, x2) - -inst_2669: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f1fffff; valaddr_reg:x3; val_offset:8007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8007*FLEN/8, x4, x1, x2) - -inst_2670: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f3fffff; valaddr_reg:x3; val_offset:8010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8010*FLEN/8, x4, x1, x2) - -inst_2671: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f400000; valaddr_reg:x3; val_offset:8013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8013*FLEN/8, x4, x1, x2) - -inst_2672: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f600000; valaddr_reg:x3; val_offset:8016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8016*FLEN/8, x4, x1, x2) - -inst_2673: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f700000; valaddr_reg:x3; val_offset:8019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8019*FLEN/8, x4, x1, x2) - -inst_2674: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f780000; valaddr_reg:x3; val_offset:8022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8022*FLEN/8, x4, x1, x2) - -inst_2675: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7c0000; valaddr_reg:x3; val_offset:8025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8025*FLEN/8, x4, x1, x2) - -inst_2676: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7e0000; valaddr_reg:x3; val_offset:8028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8028*FLEN/8, x4, x1, x2) - -inst_2677: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7f0000; valaddr_reg:x3; val_offset:8031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8031*FLEN/8, x4, x1, x2) - -inst_2678: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7f8000; valaddr_reg:x3; val_offset:8034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8034*FLEN/8, x4, x1, x2) - -inst_2679: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7fc000; valaddr_reg:x3; val_offset:8037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8037*FLEN/8, x4, x1, x2) - -inst_2680: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7fe000; valaddr_reg:x3; val_offset:8040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8040*FLEN/8, x4, x1, x2) - -inst_2681: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7ff000; valaddr_reg:x3; val_offset:8043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8043*FLEN/8, x4, x1, x2) - -inst_2682: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7ff800; valaddr_reg:x3; val_offset:8046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8046*FLEN/8, x4, x1, x2) - -inst_2683: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7ffc00; valaddr_reg:x3; val_offset:8049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8049*FLEN/8, x4, x1, x2) - -inst_2684: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7ffe00; valaddr_reg:x3; val_offset:8052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8052*FLEN/8, x4, x1, x2) - -inst_2685: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7fff00; valaddr_reg:x3; val_offset:8055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8055*FLEN/8, x4, x1, x2) - -inst_2686: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7fff80; valaddr_reg:x3; val_offset:8058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8058*FLEN/8, x4, x1, x2) - -inst_2687: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7fffc0; valaddr_reg:x3; val_offset:8061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8061*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_22) - -inst_2688: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7fffe0; valaddr_reg:x3; val_offset:8064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8064*FLEN/8, x4, x1, x2) - -inst_2689: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7ffff0; valaddr_reg:x3; val_offset:8067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8067*FLEN/8, x4, x1, x2) - -inst_2690: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7ffff8; valaddr_reg:x3; val_offset:8070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8070*FLEN/8, x4, x1, x2) - -inst_2691: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7ffffc; valaddr_reg:x3; val_offset:8073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8073*FLEN/8, x4, x1, x2) - -inst_2692: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7ffffe; valaddr_reg:x3; val_offset:8076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8076*FLEN/8, x4, x1, x2) - -inst_2693: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x1f7fffff; valaddr_reg:x3; val_offset:8079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8079*FLEN/8, x4, x1, x2) - -inst_2694: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3f800001; valaddr_reg:x3; val_offset:8082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8082*FLEN/8, x4, x1, x2) - -inst_2695: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3f800003; valaddr_reg:x3; val_offset:8085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8085*FLEN/8, x4, x1, x2) - -inst_2696: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3f800007; valaddr_reg:x3; val_offset:8088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8088*FLEN/8, x4, x1, x2) - -inst_2697: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3f999999; valaddr_reg:x3; val_offset:8091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8091*FLEN/8, x4, x1, x2) - -inst_2698: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:8094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8094*FLEN/8, x4, x1, x2) - -inst_2699: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:8097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8097*FLEN/8, x4, x1, x2) - -inst_2700: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:8100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8100*FLEN/8, x4, x1, x2) - -inst_2701: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:8103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8103*FLEN/8, x4, x1, x2) - -inst_2702: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:8106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8106*FLEN/8, x4, x1, x2) - -inst_2703: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:8109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8109*FLEN/8, x4, x1, x2) - -inst_2704: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:8112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8112*FLEN/8, x4, x1, x2) - -inst_2705: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:8115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8115*FLEN/8, x4, x1, x2) - -inst_2706: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:8118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8118*FLEN/8, x4, x1, x2) - -inst_2707: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:8121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8121*FLEN/8, x4, x1, x2) - -inst_2708: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:8124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8124*FLEN/8, x4, x1, x2) - -inst_2709: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:8127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8127*FLEN/8, x4, x1, x2) - -inst_2710: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d800000; valaddr_reg:x3; val_offset:8130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8130*FLEN/8, x4, x1, x2) - -inst_2711: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d800001; valaddr_reg:x3; val_offset:8133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8133*FLEN/8, x4, x1, x2) - -inst_2712: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d800003; valaddr_reg:x3; val_offset:8136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8136*FLEN/8, x4, x1, x2) - -inst_2713: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d800007; valaddr_reg:x3; val_offset:8139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8139*FLEN/8, x4, x1, x2) - -inst_2714: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d80000f; valaddr_reg:x3; val_offset:8142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8142*FLEN/8, x4, x1, x2) - -inst_2715: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d80001f; valaddr_reg:x3; val_offset:8145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8145*FLEN/8, x4, x1, x2) - -inst_2716: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d80003f; valaddr_reg:x3; val_offset:8148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8148*FLEN/8, x4, x1, x2) - -inst_2717: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d80007f; valaddr_reg:x3; val_offset:8151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8151*FLEN/8, x4, x1, x2) - -inst_2718: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d8000ff; valaddr_reg:x3; val_offset:8154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8154*FLEN/8, x4, x1, x2) - -inst_2719: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d8001ff; valaddr_reg:x3; val_offset:8157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8157*FLEN/8, x4, x1, x2) - -inst_2720: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d8003ff; valaddr_reg:x3; val_offset:8160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8160*FLEN/8, x4, x1, x2) - -inst_2721: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d8007ff; valaddr_reg:x3; val_offset:8163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8163*FLEN/8, x4, x1, x2) - -inst_2722: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d800fff; valaddr_reg:x3; val_offset:8166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8166*FLEN/8, x4, x1, x2) - -inst_2723: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d801fff; valaddr_reg:x3; val_offset:8169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8169*FLEN/8, x4, x1, x2) - -inst_2724: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d803fff; valaddr_reg:x3; val_offset:8172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8172*FLEN/8, x4, x1, x2) - -inst_2725: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d807fff; valaddr_reg:x3; val_offset:8175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8175*FLEN/8, x4, x1, x2) - -inst_2726: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d80ffff; valaddr_reg:x3; val_offset:8178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8178*FLEN/8, x4, x1, x2) - -inst_2727: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d81ffff; valaddr_reg:x3; val_offset:8181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8181*FLEN/8, x4, x1, x2) - -inst_2728: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d83ffff; valaddr_reg:x3; val_offset:8184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8184*FLEN/8, x4, x1, x2) - -inst_2729: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d87ffff; valaddr_reg:x3; val_offset:8187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8187*FLEN/8, x4, x1, x2) - -inst_2730: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d8fffff; valaddr_reg:x3; val_offset:8190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8190*FLEN/8, x4, x1, x2) - -inst_2731: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3d9fffff; valaddr_reg:x3; val_offset:8193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8193*FLEN/8, x4, x1, x2) - -inst_2732: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dbfffff; valaddr_reg:x3; val_offset:8196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8196*FLEN/8, x4, x1, x2) - -inst_2733: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dc00000; valaddr_reg:x3; val_offset:8199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8199*FLEN/8, x4, x1, x2) - -inst_2734: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3de00000; valaddr_reg:x3; val_offset:8202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8202*FLEN/8, x4, x1, x2) - -inst_2735: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3df00000; valaddr_reg:x3; val_offset:8205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8205*FLEN/8, x4, x1, x2) - -inst_2736: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3df80000; valaddr_reg:x3; val_offset:8208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8208*FLEN/8, x4, x1, x2) - -inst_2737: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfc0000; valaddr_reg:x3; val_offset:8211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8211*FLEN/8, x4, x1, x2) - -inst_2738: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfe0000; valaddr_reg:x3; val_offset:8214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8214*FLEN/8, x4, x1, x2) - -inst_2739: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dff0000; valaddr_reg:x3; val_offset:8217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8217*FLEN/8, x4, x1, x2) - -inst_2740: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dff8000; valaddr_reg:x3; val_offset:8220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8220*FLEN/8, x4, x1, x2) - -inst_2741: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dffc000; valaddr_reg:x3; val_offset:8223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8223*FLEN/8, x4, x1, x2) - -inst_2742: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dffe000; valaddr_reg:x3; val_offset:8226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8226*FLEN/8, x4, x1, x2) - -inst_2743: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfff000; valaddr_reg:x3; val_offset:8229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8229*FLEN/8, x4, x1, x2) - -inst_2744: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfff800; valaddr_reg:x3; val_offset:8232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8232*FLEN/8, x4, x1, x2) - -inst_2745: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfffc00; valaddr_reg:x3; val_offset:8235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8235*FLEN/8, x4, x1, x2) - -inst_2746: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfffe00; valaddr_reg:x3; val_offset:8238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8238*FLEN/8, x4, x1, x2) - -inst_2747: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dffff00; valaddr_reg:x3; val_offset:8241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8241*FLEN/8, x4, x1, x2) - -inst_2748: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dffff80; valaddr_reg:x3; val_offset:8244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8244*FLEN/8, x4, x1, x2) - -inst_2749: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dffffc0; valaddr_reg:x3; val_offset:8247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8247*FLEN/8, x4, x1, x2) - -inst_2750: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dffffe0; valaddr_reg:x3; val_offset:8250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8250*FLEN/8, x4, x1, x2) - -inst_2751: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfffff0; valaddr_reg:x3; val_offset:8253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8253*FLEN/8, x4, x1, x2) - -inst_2752: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfffff8; valaddr_reg:x3; val_offset:8256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8256*FLEN/8, x4, x1, x2) - -inst_2753: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfffffc; valaddr_reg:x3; val_offset:8259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8259*FLEN/8, x4, x1, x2) - -inst_2754: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dfffffe; valaddr_reg:x3; val_offset:8262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8262*FLEN/8, x4, x1, x2) - -inst_2755: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3dffffff; valaddr_reg:x3; val_offset:8265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8265*FLEN/8, x4, x1, x2) - -inst_2756: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3f800001; valaddr_reg:x3; val_offset:8268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8268*FLEN/8, x4, x1, x2) - -inst_2757: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3f800003; valaddr_reg:x3; val_offset:8271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8271*FLEN/8, x4, x1, x2) - -inst_2758: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3f800007; valaddr_reg:x3; val_offset:8274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8274*FLEN/8, x4, x1, x2) - -inst_2759: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3f999999; valaddr_reg:x3; val_offset:8277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8277*FLEN/8, x4, x1, x2) - -inst_2760: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:8280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8280*FLEN/8, x4, x1, x2) - -inst_2761: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:8283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8283*FLEN/8, x4, x1, x2) - -inst_2762: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:8286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8286*FLEN/8, x4, x1, x2) - -inst_2763: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:8289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8289*FLEN/8, x4, x1, x2) - -inst_2764: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:8292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8292*FLEN/8, x4, x1, x2) - -inst_2765: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:8295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8295*FLEN/8, x4, x1, x2) - -inst_2766: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:8298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8298*FLEN/8, x4, x1, x2) - -inst_2767: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:8301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8301*FLEN/8, x4, x1, x2) - -inst_2768: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:8304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8304*FLEN/8, x4, x1, x2) - -inst_2769: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:8307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8307*FLEN/8, x4, x1, x2) - -inst_2770: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:8310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8310*FLEN/8, x4, x1, x2) - -inst_2771: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:8313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8313*FLEN/8, x4, x1, x2) - -inst_2772: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:8316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8316*FLEN/8, x4, x1, x2) - -inst_2773: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:8319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8319*FLEN/8, x4, x1, x2) - -inst_2774: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:8322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8322*FLEN/8, x4, x1, x2) - -inst_2775: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:8325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8325*FLEN/8, x4, x1, x2) - -inst_2776: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:8328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8328*FLEN/8, x4, x1, x2) - -inst_2777: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:8331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8331*FLEN/8, x4, x1, x2) - -inst_2778: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:8334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8334*FLEN/8, x4, x1, x2) - -inst_2779: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:8337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8337*FLEN/8, x4, x1, x2) - -inst_2780: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:8340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8340*FLEN/8, x4, x1, x2) - -inst_2781: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:8343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8343*FLEN/8, x4, x1, x2) - -inst_2782: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:8346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8346*FLEN/8, x4, x1, x2) - -inst_2783: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:8349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8349*FLEN/8, x4, x1, x2) - -inst_2784: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:8352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8352*FLEN/8, x4, x1, x2) - -inst_2785: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:8355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8355*FLEN/8, x4, x1, x2) - -inst_2786: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:8358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8358*FLEN/8, x4, x1, x2) - -inst_2787: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:8361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8361*FLEN/8, x4, x1, x2) - -inst_2788: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4800000; valaddr_reg:x3; val_offset:8364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8364*FLEN/8, x4, x1, x2) - -inst_2789: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4800001; valaddr_reg:x3; val_offset:8367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8367*FLEN/8, x4, x1, x2) - -inst_2790: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4800003; valaddr_reg:x3; val_offset:8370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8370*FLEN/8, x4, x1, x2) - -inst_2791: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4800007; valaddr_reg:x3; val_offset:8373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8373*FLEN/8, x4, x1, x2) - -inst_2792: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x480000f; valaddr_reg:x3; val_offset:8376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8376*FLEN/8, x4, x1, x2) - -inst_2793: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x480001f; valaddr_reg:x3; val_offset:8379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8379*FLEN/8, x4, x1, x2) - -inst_2794: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x480003f; valaddr_reg:x3; val_offset:8382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8382*FLEN/8, x4, x1, x2) - -inst_2795: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x480007f; valaddr_reg:x3; val_offset:8385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8385*FLEN/8, x4, x1, x2) - -inst_2796: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x48000ff; valaddr_reg:x3; val_offset:8388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8388*FLEN/8, x4, x1, x2) - -inst_2797: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x48001ff; valaddr_reg:x3; val_offset:8391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8391*FLEN/8, x4, x1, x2) - -inst_2798: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x48003ff; valaddr_reg:x3; val_offset:8394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8394*FLEN/8, x4, x1, x2) - -inst_2799: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x48007ff; valaddr_reg:x3; val_offset:8397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8397*FLEN/8, x4, x1, x2) - -inst_2800: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4800fff; valaddr_reg:x3; val_offset:8400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8400*FLEN/8, x4, x1, x2) - -inst_2801: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4801fff; valaddr_reg:x3; val_offset:8403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8403*FLEN/8, x4, x1, x2) - -inst_2802: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4803fff; valaddr_reg:x3; val_offset:8406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8406*FLEN/8, x4, x1, x2) - -inst_2803: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4807fff; valaddr_reg:x3; val_offset:8409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8409*FLEN/8, x4, x1, x2) - -inst_2804: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x480ffff; valaddr_reg:x3; val_offset:8412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8412*FLEN/8, x4, x1, x2) - -inst_2805: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x481ffff; valaddr_reg:x3; val_offset:8415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8415*FLEN/8, x4, x1, x2) - -inst_2806: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x483ffff; valaddr_reg:x3; val_offset:8418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8418*FLEN/8, x4, x1, x2) - -inst_2807: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x487ffff; valaddr_reg:x3; val_offset:8421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8421*FLEN/8, x4, x1, x2) - -inst_2808: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x48fffff; valaddr_reg:x3; val_offset:8424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8424*FLEN/8, x4, x1, x2) - -inst_2809: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x49fffff; valaddr_reg:x3; val_offset:8427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8427*FLEN/8, x4, x1, x2) - -inst_2810: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4bfffff; valaddr_reg:x3; val_offset:8430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8430*FLEN/8, x4, x1, x2) - -inst_2811: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4c00000; valaddr_reg:x3; val_offset:8433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8433*FLEN/8, x4, x1, x2) - -inst_2812: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4e00000; valaddr_reg:x3; val_offset:8436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8436*FLEN/8, x4, x1, x2) - -inst_2813: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4f00000; valaddr_reg:x3; val_offset:8439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8439*FLEN/8, x4, x1, x2) - -inst_2814: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4f80000; valaddr_reg:x3; val_offset:8442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8442*FLEN/8, x4, x1, x2) - -inst_2815: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fc0000; valaddr_reg:x3; val_offset:8445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8445*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_23) - -inst_2816: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fe0000; valaddr_reg:x3; val_offset:8448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8448*FLEN/8, x4, x1, x2) - -inst_2817: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ff0000; valaddr_reg:x3; val_offset:8451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8451*FLEN/8, x4, x1, x2) - -inst_2818: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ff8000; valaddr_reg:x3; val_offset:8454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8454*FLEN/8, x4, x1, x2) - -inst_2819: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ffc000; valaddr_reg:x3; val_offset:8457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8457*FLEN/8, x4, x1, x2) - -inst_2820: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ffe000; valaddr_reg:x3; val_offset:8460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8460*FLEN/8, x4, x1, x2) - -inst_2821: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fff000; valaddr_reg:x3; val_offset:8463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8463*FLEN/8, x4, x1, x2) - -inst_2822: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fff800; valaddr_reg:x3; val_offset:8466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8466*FLEN/8, x4, x1, x2) - -inst_2823: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fffc00; valaddr_reg:x3; val_offset:8469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8469*FLEN/8, x4, x1, x2) - -inst_2824: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fffe00; valaddr_reg:x3; val_offset:8472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8472*FLEN/8, x4, x1, x2) - -inst_2825: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ffff00; valaddr_reg:x3; val_offset:8475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8475*FLEN/8, x4, x1, x2) - -inst_2826: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ffff80; valaddr_reg:x3; val_offset:8478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8478*FLEN/8, x4, x1, x2) - -inst_2827: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ffffc0; valaddr_reg:x3; val_offset:8481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8481*FLEN/8, x4, x1, x2) - -inst_2828: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ffffe0; valaddr_reg:x3; val_offset:8484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8484*FLEN/8, x4, x1, x2) - -inst_2829: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fffff0; valaddr_reg:x3; val_offset:8487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8487*FLEN/8, x4, x1, x2) - -inst_2830: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fffff8; valaddr_reg:x3; val_offset:8490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8490*FLEN/8, x4, x1, x2) - -inst_2831: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fffffc; valaddr_reg:x3; val_offset:8493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8493*FLEN/8, x4, x1, x2) - -inst_2832: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4fffffe; valaddr_reg:x3; val_offset:8496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8496*FLEN/8, x4, x1, x2) - -inst_2833: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; -op3val:0x4ffffff; valaddr_reg:x3; val_offset:8499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8499*FLEN/8, x4, x1, x2) - -inst_2834: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e000000; valaddr_reg:x3; val_offset:8502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8502*FLEN/8, x4, x1, x2) - -inst_2835: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e000001; valaddr_reg:x3; val_offset:8505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8505*FLEN/8, x4, x1, x2) - -inst_2836: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e000003; valaddr_reg:x3; val_offset:8508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8508*FLEN/8, x4, x1, x2) - -inst_2837: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e000007; valaddr_reg:x3; val_offset:8511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8511*FLEN/8, x4, x1, x2) - -inst_2838: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e00000f; valaddr_reg:x3; val_offset:8514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8514*FLEN/8, x4, x1, x2) - -inst_2839: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e00001f; valaddr_reg:x3; val_offset:8517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8517*FLEN/8, x4, x1, x2) - -inst_2840: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e00003f; valaddr_reg:x3; val_offset:8520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8520*FLEN/8, x4, x1, x2) - -inst_2841: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e00007f; valaddr_reg:x3; val_offset:8523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8523*FLEN/8, x4, x1, x2) - -inst_2842: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e0000ff; valaddr_reg:x3; val_offset:8526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8526*FLEN/8, x4, x1, x2) - -inst_2843: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e0001ff; valaddr_reg:x3; val_offset:8529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8529*FLEN/8, x4, x1, x2) - -inst_2844: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e0003ff; valaddr_reg:x3; val_offset:8532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8532*FLEN/8, x4, x1, x2) - -inst_2845: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e0007ff; valaddr_reg:x3; val_offset:8535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8535*FLEN/8, x4, x1, x2) - -inst_2846: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e000fff; valaddr_reg:x3; val_offset:8538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8538*FLEN/8, x4, x1, x2) - -inst_2847: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e001fff; valaddr_reg:x3; val_offset:8541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8541*FLEN/8, x4, x1, x2) - -inst_2848: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e003fff; valaddr_reg:x3; val_offset:8544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8544*FLEN/8, x4, x1, x2) - -inst_2849: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e007fff; valaddr_reg:x3; val_offset:8547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8547*FLEN/8, x4, x1, x2) - -inst_2850: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e00ffff; valaddr_reg:x3; val_offset:8550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8550*FLEN/8, x4, x1, x2) - -inst_2851: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e01ffff; valaddr_reg:x3; val_offset:8553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8553*FLEN/8, x4, x1, x2) - -inst_2852: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e03ffff; valaddr_reg:x3; val_offset:8556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8556*FLEN/8, x4, x1, x2) - -inst_2853: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e07ffff; valaddr_reg:x3; val_offset:8559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8559*FLEN/8, x4, x1, x2) - -inst_2854: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e0fffff; valaddr_reg:x3; val_offset:8562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8562*FLEN/8, x4, x1, x2) - -inst_2855: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e1fffff; valaddr_reg:x3; val_offset:8565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8565*FLEN/8, x4, x1, x2) - -inst_2856: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e3fffff; valaddr_reg:x3; val_offset:8568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8568*FLEN/8, x4, x1, x2) - -inst_2857: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e400000; valaddr_reg:x3; val_offset:8571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8571*FLEN/8, x4, x1, x2) - -inst_2858: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e600000; valaddr_reg:x3; val_offset:8574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8574*FLEN/8, x4, x1, x2) - -inst_2859: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e700000; valaddr_reg:x3; val_offset:8577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8577*FLEN/8, x4, x1, x2) - -inst_2860: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e780000; valaddr_reg:x3; val_offset:8580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8580*FLEN/8, x4, x1, x2) - -inst_2861: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7c0000; valaddr_reg:x3; val_offset:8583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8583*FLEN/8, x4, x1, x2) - -inst_2862: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7e0000; valaddr_reg:x3; val_offset:8586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8586*FLEN/8, x4, x1, x2) - -inst_2863: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7f0000; valaddr_reg:x3; val_offset:8589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8589*FLEN/8, x4, x1, x2) - -inst_2864: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7f8000; valaddr_reg:x3; val_offset:8592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8592*FLEN/8, x4, x1, x2) - -inst_2865: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7fc000; valaddr_reg:x3; val_offset:8595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8595*FLEN/8, x4, x1, x2) - -inst_2866: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7fe000; valaddr_reg:x3; val_offset:8598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8598*FLEN/8, x4, x1, x2) - -inst_2867: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7ff000; valaddr_reg:x3; val_offset:8601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8601*FLEN/8, x4, x1, x2) - -inst_2868: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7ff800; valaddr_reg:x3; val_offset:8604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8604*FLEN/8, x4, x1, x2) - -inst_2869: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7ffc00; valaddr_reg:x3; val_offset:8607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8607*FLEN/8, x4, x1, x2) - -inst_2870: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7ffe00; valaddr_reg:x3; val_offset:8610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8610*FLEN/8, x4, x1, x2) - -inst_2871: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7fff00; valaddr_reg:x3; val_offset:8613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8613*FLEN/8, x4, x1, x2) - -inst_2872: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7fff80; valaddr_reg:x3; val_offset:8616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8616*FLEN/8, x4, x1, x2) - -inst_2873: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7fffc0; valaddr_reg:x3; val_offset:8619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8619*FLEN/8, x4, x1, x2) - -inst_2874: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7fffe0; valaddr_reg:x3; val_offset:8622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8622*FLEN/8, x4, x1, x2) - -inst_2875: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7ffff0; valaddr_reg:x3; val_offset:8625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8625*FLEN/8, x4, x1, x2) - -inst_2876: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7ffff8; valaddr_reg:x3; val_offset:8628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8628*FLEN/8, x4, x1, x2) - -inst_2877: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7ffffc; valaddr_reg:x3; val_offset:8631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8631*FLEN/8, x4, x1, x2) - -inst_2878: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7ffffe; valaddr_reg:x3; val_offset:8634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8634*FLEN/8, x4, x1, x2) - -inst_2879: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3e7fffff; valaddr_reg:x3; val_offset:8637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8637*FLEN/8, x4, x1, x2) - -inst_2880: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3f800001; valaddr_reg:x3; val_offset:8640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8640*FLEN/8, x4, x1, x2) - -inst_2881: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3f800003; valaddr_reg:x3; val_offset:8643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8643*FLEN/8, x4, x1, x2) - -inst_2882: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3f800007; valaddr_reg:x3; val_offset:8646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8646*FLEN/8, x4, x1, x2) - -inst_2883: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3f999999; valaddr_reg:x3; val_offset:8649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8649*FLEN/8, x4, x1, x2) - -inst_2884: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:8652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8652*FLEN/8, x4, x1, x2) - -inst_2885: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:8655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8655*FLEN/8, x4, x1, x2) - -inst_2886: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:8658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8658*FLEN/8, x4, x1, x2) - -inst_2887: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:8661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8661*FLEN/8, x4, x1, x2) - -inst_2888: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:8664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8664*FLEN/8, x4, x1, x2) - -inst_2889: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:8667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8667*FLEN/8, x4, x1, x2) - -inst_2890: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:8670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8670*FLEN/8, x4, x1, x2) - -inst_2891: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:8673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8673*FLEN/8, x4, x1, x2) - -inst_2892: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:8676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8676*FLEN/8, x4, x1, x2) - -inst_2893: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:8679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8679*FLEN/8, x4, x1, x2) - -inst_2894: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:8682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8682*FLEN/8, x4, x1, x2) - -inst_2895: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:8685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8685*FLEN/8, x4, x1, x2) - -inst_2896: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:8688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8688*FLEN/8, x4, x1, x2) - -inst_2897: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:8691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8691*FLEN/8, x4, x1, x2) - -inst_2898: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:8694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8694*FLEN/8, x4, x1, x2) - -inst_2899: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:8697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8697*FLEN/8, x4, x1, x2) - -inst_2900: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:8700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8700*FLEN/8, x4, x1, x2) - -inst_2901: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:8703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8703*FLEN/8, x4, x1, x2) - -inst_2902: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:8706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8706*FLEN/8, x4, x1, x2) - -inst_2903: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:8709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8709*FLEN/8, x4, x1, x2) - -inst_2904: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:8712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8712*FLEN/8, x4, x1, x2) - -inst_2905: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:8715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8715*FLEN/8, x4, x1, x2) - -inst_2906: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:8718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8718*FLEN/8, x4, x1, x2) - -inst_2907: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:8721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8721*FLEN/8, x4, x1, x2) - -inst_2908: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:8724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8724*FLEN/8, x4, x1, x2) - -inst_2909: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:8727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8727*FLEN/8, x4, x1, x2) - -inst_2910: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:8730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8730*FLEN/8, x4, x1, x2) - -inst_2911: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:8733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8733*FLEN/8, x4, x1, x2) - -inst_2912: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9800000; valaddr_reg:x3; val_offset:8736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8736*FLEN/8, x4, x1, x2) - -inst_2913: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9800001; valaddr_reg:x3; val_offset:8739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8739*FLEN/8, x4, x1, x2) - -inst_2914: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9800003; valaddr_reg:x3; val_offset:8742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8742*FLEN/8, x4, x1, x2) - -inst_2915: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9800007; valaddr_reg:x3; val_offset:8745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8745*FLEN/8, x4, x1, x2) - -inst_2916: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x980000f; valaddr_reg:x3; val_offset:8748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8748*FLEN/8, x4, x1, x2) - -inst_2917: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x980001f; valaddr_reg:x3; val_offset:8751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8751*FLEN/8, x4, x1, x2) - -inst_2918: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x980003f; valaddr_reg:x3; val_offset:8754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8754*FLEN/8, x4, x1, x2) - -inst_2919: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x980007f; valaddr_reg:x3; val_offset:8757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8757*FLEN/8, x4, x1, x2) - -inst_2920: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x98000ff; valaddr_reg:x3; val_offset:8760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8760*FLEN/8, x4, x1, x2) - -inst_2921: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x98001ff; valaddr_reg:x3; val_offset:8763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8763*FLEN/8, x4, x1, x2) - -inst_2922: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x98003ff; valaddr_reg:x3; val_offset:8766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8766*FLEN/8, x4, x1, x2) - -inst_2923: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x98007ff; valaddr_reg:x3; val_offset:8769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8769*FLEN/8, x4, x1, x2) - -inst_2924: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9800fff; valaddr_reg:x3; val_offset:8772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8772*FLEN/8, x4, x1, x2) - -inst_2925: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9801fff; valaddr_reg:x3; val_offset:8775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8775*FLEN/8, x4, x1, x2) - -inst_2926: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9803fff; valaddr_reg:x3; val_offset:8778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8778*FLEN/8, x4, x1, x2) - -inst_2927: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9807fff; valaddr_reg:x3; val_offset:8781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8781*FLEN/8, x4, x1, x2) - -inst_2928: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x980ffff; valaddr_reg:x3; val_offset:8784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8784*FLEN/8, x4, x1, x2) - -inst_2929: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x981ffff; valaddr_reg:x3; val_offset:8787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8787*FLEN/8, x4, x1, x2) - -inst_2930: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x983ffff; valaddr_reg:x3; val_offset:8790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8790*FLEN/8, x4, x1, x2) - -inst_2931: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x987ffff; valaddr_reg:x3; val_offset:8793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8793*FLEN/8, x4, x1, x2) - -inst_2932: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x98fffff; valaddr_reg:x3; val_offset:8796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8796*FLEN/8, x4, x1, x2) - -inst_2933: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x99fffff; valaddr_reg:x3; val_offset:8799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8799*FLEN/8, x4, x1, x2) - -inst_2934: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9bfffff; valaddr_reg:x3; val_offset:8802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8802*FLEN/8, x4, x1, x2) - -inst_2935: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9c00000; valaddr_reg:x3; val_offset:8805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8805*FLEN/8, x4, x1, x2) - -inst_2936: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9e00000; valaddr_reg:x3; val_offset:8808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8808*FLEN/8, x4, x1, x2) - -inst_2937: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9f00000; valaddr_reg:x3; val_offset:8811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8811*FLEN/8, x4, x1, x2) - -inst_2938: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9f80000; valaddr_reg:x3; val_offset:8814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8814*FLEN/8, x4, x1, x2) - -inst_2939: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fc0000; valaddr_reg:x3; val_offset:8817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8817*FLEN/8, x4, x1, x2) - -inst_2940: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fe0000; valaddr_reg:x3; val_offset:8820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8820*FLEN/8, x4, x1, x2) - -inst_2941: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ff0000; valaddr_reg:x3; val_offset:8823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8823*FLEN/8, x4, x1, x2) - -inst_2942: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ff8000; valaddr_reg:x3; val_offset:8826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8826*FLEN/8, x4, x1, x2) - -inst_2943: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ffc000; valaddr_reg:x3; val_offset:8829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8829*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_24) - -inst_2944: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ffe000; valaddr_reg:x3; val_offset:8832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8832*FLEN/8, x4, x1, x2) - -inst_2945: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fff000; valaddr_reg:x3; val_offset:8835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8835*FLEN/8, x4, x1, x2) - -inst_2946: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fff800; valaddr_reg:x3; val_offset:8838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8838*FLEN/8, x4, x1, x2) - -inst_2947: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fffc00; valaddr_reg:x3; val_offset:8841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8841*FLEN/8, x4, x1, x2) - -inst_2948: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fffe00; valaddr_reg:x3; val_offset:8844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8844*FLEN/8, x4, x1, x2) - -inst_2949: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ffff00; valaddr_reg:x3; val_offset:8847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8847*FLEN/8, x4, x1, x2) - -inst_2950: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ffff80; valaddr_reg:x3; val_offset:8850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8850*FLEN/8, x4, x1, x2) - -inst_2951: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ffffc0; valaddr_reg:x3; val_offset:8853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8853*FLEN/8, x4, x1, x2) - -inst_2952: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ffffe0; valaddr_reg:x3; val_offset:8856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8856*FLEN/8, x4, x1, x2) - -inst_2953: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fffff0; valaddr_reg:x3; val_offset:8859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8859*FLEN/8, x4, x1, x2) - -inst_2954: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fffff8; valaddr_reg:x3; val_offset:8862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8862*FLEN/8, x4, x1, x2) - -inst_2955: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fffffc; valaddr_reg:x3; val_offset:8865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8865*FLEN/8, x4, x1, x2) - -inst_2956: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9fffffe; valaddr_reg:x3; val_offset:8868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8868*FLEN/8, x4, x1, x2) - -inst_2957: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; -op3val:0x9ffffff; valaddr_reg:x3; val_offset:8871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8871*FLEN/8, x4, x1, x2) - -inst_2958: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34000000; valaddr_reg:x3; val_offset:8874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8874*FLEN/8, x4, x1, x2) - -inst_2959: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34000001; valaddr_reg:x3; val_offset:8877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8877*FLEN/8, x4, x1, x2) - -inst_2960: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34000003; valaddr_reg:x3; val_offset:8880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8880*FLEN/8, x4, x1, x2) - -inst_2961: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34000007; valaddr_reg:x3; val_offset:8883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8883*FLEN/8, x4, x1, x2) - -inst_2962: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3400000f; valaddr_reg:x3; val_offset:8886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8886*FLEN/8, x4, x1, x2) - -inst_2963: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3400001f; valaddr_reg:x3; val_offset:8889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8889*FLEN/8, x4, x1, x2) - -inst_2964: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3400003f; valaddr_reg:x3; val_offset:8892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8892*FLEN/8, x4, x1, x2) - -inst_2965: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3400007f; valaddr_reg:x3; val_offset:8895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8895*FLEN/8, x4, x1, x2) - -inst_2966: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x340000ff; valaddr_reg:x3; val_offset:8898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8898*FLEN/8, x4, x1, x2) - -inst_2967: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x340001ff; valaddr_reg:x3; val_offset:8901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8901*FLEN/8, x4, x1, x2) - -inst_2968: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x340003ff; valaddr_reg:x3; val_offset:8904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8904*FLEN/8, x4, x1, x2) - -inst_2969: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x340007ff; valaddr_reg:x3; val_offset:8907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8907*FLEN/8, x4, x1, x2) - -inst_2970: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34000fff; valaddr_reg:x3; val_offset:8910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8910*FLEN/8, x4, x1, x2) - -inst_2971: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34001fff; valaddr_reg:x3; val_offset:8913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8913*FLEN/8, x4, x1, x2) - -inst_2972: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34003fff; valaddr_reg:x3; val_offset:8916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8916*FLEN/8, x4, x1, x2) - -inst_2973: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34007fff; valaddr_reg:x3; val_offset:8919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8919*FLEN/8, x4, x1, x2) - -inst_2974: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3400ffff; valaddr_reg:x3; val_offset:8922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8922*FLEN/8, x4, x1, x2) - -inst_2975: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3401ffff; valaddr_reg:x3; val_offset:8925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8925*FLEN/8, x4, x1, x2) - -inst_2976: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3403ffff; valaddr_reg:x3; val_offset:8928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8928*FLEN/8, x4, x1, x2) - -inst_2977: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3407ffff; valaddr_reg:x3; val_offset:8931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8931*FLEN/8, x4, x1, x2) - -inst_2978: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x340fffff; valaddr_reg:x3; val_offset:8934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8934*FLEN/8, x4, x1, x2) - -inst_2979: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x341fffff; valaddr_reg:x3; val_offset:8937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8937*FLEN/8, x4, x1, x2) - -inst_2980: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x343fffff; valaddr_reg:x3; val_offset:8940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8940*FLEN/8, x4, x1, x2) - -inst_2981: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34400000; valaddr_reg:x3; val_offset:8943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8943*FLEN/8, x4, x1, x2) - -inst_2982: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34600000; valaddr_reg:x3; val_offset:8946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8946*FLEN/8, x4, x1, x2) - -inst_2983: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34700000; valaddr_reg:x3; val_offset:8949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8949*FLEN/8, x4, x1, x2) - -inst_2984: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x34780000; valaddr_reg:x3; val_offset:8952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8952*FLEN/8, x4, x1, x2) - -inst_2985: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347c0000; valaddr_reg:x3; val_offset:8955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8955*FLEN/8, x4, x1, x2) - -inst_2986: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347e0000; valaddr_reg:x3; val_offset:8958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8958*FLEN/8, x4, x1, x2) - -inst_2987: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347f0000; valaddr_reg:x3; val_offset:8961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8961*FLEN/8, x4, x1, x2) - -inst_2988: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347f8000; valaddr_reg:x3; val_offset:8964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8964*FLEN/8, x4, x1, x2) - -inst_2989: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347fc000; valaddr_reg:x3; val_offset:8967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8967*FLEN/8, x4, x1, x2) - -inst_2990: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347fe000; valaddr_reg:x3; val_offset:8970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8970*FLEN/8, x4, x1, x2) - -inst_2991: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347ff000; valaddr_reg:x3; val_offset:8973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8973*FLEN/8, x4, x1, x2) - -inst_2992: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347ff800; valaddr_reg:x3; val_offset:8976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8976*FLEN/8, x4, x1, x2) - -inst_2993: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347ffc00; valaddr_reg:x3; val_offset:8979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8979*FLEN/8, x4, x1, x2) - -inst_2994: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347ffe00; valaddr_reg:x3; val_offset:8982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8982*FLEN/8, x4, x1, x2) - -inst_2995: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347fff00; valaddr_reg:x3; val_offset:8985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8985*FLEN/8, x4, x1, x2) - -inst_2996: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347fff80; valaddr_reg:x3; val_offset:8988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8988*FLEN/8, x4, x1, x2) - -inst_2997: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347fffc0; valaddr_reg:x3; val_offset:8991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8991*FLEN/8, x4, x1, x2) - -inst_2998: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347fffe0; valaddr_reg:x3; val_offset:8994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8994*FLEN/8, x4, x1, x2) - -inst_2999: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347ffff0; valaddr_reg:x3; val_offset:8997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8997*FLEN/8, x4, x1, x2) - -inst_3000: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347ffff8; valaddr_reg:x3; val_offset:9000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9000*FLEN/8, x4, x1, x2) - -inst_3001: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347ffffc; valaddr_reg:x3; val_offset:9003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9003*FLEN/8, x4, x1, x2) - -inst_3002: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347ffffe; valaddr_reg:x3; val_offset:9006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9006*FLEN/8, x4, x1, x2) - -inst_3003: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x347fffff; valaddr_reg:x3; val_offset:9009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9009*FLEN/8, x4, x1, x2) - -inst_3004: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3f800001; valaddr_reg:x3; val_offset:9012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9012*FLEN/8, x4, x1, x2) - -inst_3005: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3f800003; valaddr_reg:x3; val_offset:9015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9015*FLEN/8, x4, x1, x2) - -inst_3006: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3f800007; valaddr_reg:x3; val_offset:9018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9018*FLEN/8, x4, x1, x2) - -inst_3007: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3f999999; valaddr_reg:x3; val_offset:9021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9021*FLEN/8, x4, x1, x2) - -inst_3008: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:9024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9024*FLEN/8, x4, x1, x2) - -inst_3009: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:9027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9027*FLEN/8, x4, x1, x2) - -inst_3010: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:9030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9030*FLEN/8, x4, x1, x2) - -inst_3011: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:9033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9033*FLEN/8, x4, x1, x2) - -inst_3012: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:9036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9036*FLEN/8, x4, x1, x2) - -inst_3013: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:9039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9039*FLEN/8, x4, x1, x2) - -inst_3014: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:9042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9042*FLEN/8, x4, x1, x2) - -inst_3015: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:9045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9045*FLEN/8, x4, x1, x2) - -inst_3016: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:9048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9048*FLEN/8, x4, x1, x2) - -inst_3017: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:9051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9051*FLEN/8, x4, x1, x2) - -inst_3018: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:9054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9054*FLEN/8, x4, x1, x2) - -inst_3019: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:9057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9057*FLEN/8, x4, x1, x2) - -inst_3020: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:9060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9060*FLEN/8, x4, x1, x2) - -inst_3021: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:9063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9063*FLEN/8, x4, x1, x2) - -inst_3022: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:9066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9066*FLEN/8, x4, x1, x2) - -inst_3023: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:9069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9069*FLEN/8, x4, x1, x2) - -inst_3024: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:9072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9072*FLEN/8, x4, x1, x2) - -inst_3025: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:9075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9075*FLEN/8, x4, x1, x2) - -inst_3026: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:9078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9078*FLEN/8, x4, x1, x2) - -inst_3027: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:9081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9081*FLEN/8, x4, x1, x2) - -inst_3028: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:9084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9084*FLEN/8, x4, x1, x2) - -inst_3029: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:9087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9087*FLEN/8, x4, x1, x2) - -inst_3030: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:9090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9090*FLEN/8, x4, x1, x2) - -inst_3031: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:9093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9093*FLEN/8, x4, x1, x2) - -inst_3032: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:9096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9096*FLEN/8, x4, x1, x2) - -inst_3033: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:9099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9099*FLEN/8, x4, x1, x2) - -inst_3034: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:9102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9102*FLEN/8, x4, x1, x2) - -inst_3035: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:9105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9105*FLEN/8, x4, x1, x2) - -inst_3036: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85000000; valaddr_reg:x3; val_offset:9108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9108*FLEN/8, x4, x1, x2) - -inst_3037: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85000001; valaddr_reg:x3; val_offset:9111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9111*FLEN/8, x4, x1, x2) - -inst_3038: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85000003; valaddr_reg:x3; val_offset:9114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9114*FLEN/8, x4, x1, x2) - -inst_3039: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85000007; valaddr_reg:x3; val_offset:9117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9117*FLEN/8, x4, x1, x2) - -inst_3040: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x8500000f; valaddr_reg:x3; val_offset:9120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9120*FLEN/8, x4, x1, x2) - -inst_3041: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x8500001f; valaddr_reg:x3; val_offset:9123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9123*FLEN/8, x4, x1, x2) - -inst_3042: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x8500003f; valaddr_reg:x3; val_offset:9126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9126*FLEN/8, x4, x1, x2) - -inst_3043: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x8500007f; valaddr_reg:x3; val_offset:9129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9129*FLEN/8, x4, x1, x2) - -inst_3044: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x850000ff; valaddr_reg:x3; val_offset:9132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9132*FLEN/8, x4, x1, x2) - -inst_3045: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x850001ff; valaddr_reg:x3; val_offset:9135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9135*FLEN/8, x4, x1, x2) - -inst_3046: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x850003ff; valaddr_reg:x3; val_offset:9138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9138*FLEN/8, x4, x1, x2) - -inst_3047: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x850007ff; valaddr_reg:x3; val_offset:9141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9141*FLEN/8, x4, x1, x2) - -inst_3048: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85000fff; valaddr_reg:x3; val_offset:9144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9144*FLEN/8, x4, x1, x2) - -inst_3049: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85001fff; valaddr_reg:x3; val_offset:9147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9147*FLEN/8, x4, x1, x2) - -inst_3050: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85003fff; valaddr_reg:x3; val_offset:9150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9150*FLEN/8, x4, x1, x2) - -inst_3051: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85007fff; valaddr_reg:x3; val_offset:9153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9153*FLEN/8, x4, x1, x2) - -inst_3052: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x8500ffff; valaddr_reg:x3; val_offset:9156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9156*FLEN/8, x4, x1, x2) - -inst_3053: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x8501ffff; valaddr_reg:x3; val_offset:9159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9159*FLEN/8, x4, x1, x2) - -inst_3054: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x8503ffff; valaddr_reg:x3; val_offset:9162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9162*FLEN/8, x4, x1, x2) - -inst_3055: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x8507ffff; valaddr_reg:x3; val_offset:9165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9165*FLEN/8, x4, x1, x2) - -inst_3056: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x850fffff; valaddr_reg:x3; val_offset:9168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9168*FLEN/8, x4, x1, x2) - -inst_3057: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x851fffff; valaddr_reg:x3; val_offset:9171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9171*FLEN/8, x4, x1, x2) - -inst_3058: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x853fffff; valaddr_reg:x3; val_offset:9174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9174*FLEN/8, x4, x1, x2) - -inst_3059: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85400000; valaddr_reg:x3; val_offset:9177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9177*FLEN/8, x4, x1, x2) - -inst_3060: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85600000; valaddr_reg:x3; val_offset:9180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9180*FLEN/8, x4, x1, x2) - -inst_3061: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85700000; valaddr_reg:x3; val_offset:9183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9183*FLEN/8, x4, x1, x2) - -inst_3062: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x85780000; valaddr_reg:x3; val_offset:9186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9186*FLEN/8, x4, x1, x2) - -inst_3063: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857c0000; valaddr_reg:x3; val_offset:9189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9189*FLEN/8, x4, x1, x2) - -inst_3064: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857e0000; valaddr_reg:x3; val_offset:9192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9192*FLEN/8, x4, x1, x2) - -inst_3065: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857f0000; valaddr_reg:x3; val_offset:9195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9195*FLEN/8, x4, x1, x2) - -inst_3066: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857f8000; valaddr_reg:x3; val_offset:9198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9198*FLEN/8, x4, x1, x2) - -inst_3067: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857fc000; valaddr_reg:x3; val_offset:9201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9201*FLEN/8, x4, x1, x2) - -inst_3068: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857fe000; valaddr_reg:x3; val_offset:9204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9204*FLEN/8, x4, x1, x2) - -inst_3069: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857ff000; valaddr_reg:x3; val_offset:9207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9207*FLEN/8, x4, x1, x2) - -inst_3070: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857ff800; valaddr_reg:x3; val_offset:9210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9210*FLEN/8, x4, x1, x2) - -inst_3071: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857ffc00; valaddr_reg:x3; val_offset:9213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9213*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_25) - -inst_3072: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857ffe00; valaddr_reg:x3; val_offset:9216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9216*FLEN/8, x4, x1, x2) - -inst_3073: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857fff00; valaddr_reg:x3; val_offset:9219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9219*FLEN/8, x4, x1, x2) - -inst_3074: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857fff80; valaddr_reg:x3; val_offset:9222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9222*FLEN/8, x4, x1, x2) - -inst_3075: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857fffc0; valaddr_reg:x3; val_offset:9225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9225*FLEN/8, x4, x1, x2) - -inst_3076: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857fffe0; valaddr_reg:x3; val_offset:9228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9228*FLEN/8, x4, x1, x2) - -inst_3077: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857ffff0; valaddr_reg:x3; val_offset:9231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9231*FLEN/8, x4, x1, x2) - -inst_3078: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857ffff8; valaddr_reg:x3; val_offset:9234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9234*FLEN/8, x4, x1, x2) - -inst_3079: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857ffffc; valaddr_reg:x3; val_offset:9237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9237*FLEN/8, x4, x1, x2) - -inst_3080: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857ffffe; valaddr_reg:x3; val_offset:9240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9240*FLEN/8, x4, x1, x2) - -inst_3081: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; -op3val:0x857fffff; valaddr_reg:x3; val_offset:9243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9243*FLEN/8, x4, x1, x2) - -inst_3082: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:9246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9246*FLEN/8, x4, x1, x2) - -inst_3083: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:9249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9249*FLEN/8, x4, x1, x2) - -inst_3084: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:9252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9252*FLEN/8, x4, x1, x2) - -inst_3085: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:9255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9255*FLEN/8, x4, x1, x2) - -inst_3086: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:9258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9258*FLEN/8, x4, x1, x2) - -inst_3087: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:9261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9261*FLEN/8, x4, x1, x2) - -inst_3088: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:9264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9264*FLEN/8, x4, x1, x2) - -inst_3089: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:9267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9267*FLEN/8, x4, x1, x2) - -inst_3090: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:9270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9270*FLEN/8, x4, x1, x2) - -inst_3091: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:9273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9273*FLEN/8, x4, x1, x2) - -inst_3092: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:9276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9276*FLEN/8, x4, x1, x2) - -inst_3093: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:9279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9279*FLEN/8, x4, x1, x2) - -inst_3094: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:9282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9282*FLEN/8, x4, x1, x2) - -inst_3095: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:9285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9285*FLEN/8, x4, x1, x2) - -inst_3096: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:9288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9288*FLEN/8, x4, x1, x2) - -inst_3097: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:9291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9291*FLEN/8, x4, x1, x2) - -inst_3098: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83000000; valaddr_reg:x3; val_offset:9294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9294*FLEN/8, x4, x1, x2) - -inst_3099: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83000001; valaddr_reg:x3; val_offset:9297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9297*FLEN/8, x4, x1, x2) - -inst_3100: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83000003; valaddr_reg:x3; val_offset:9300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9300*FLEN/8, x4, x1, x2) - -inst_3101: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83000007; valaddr_reg:x3; val_offset:9303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9303*FLEN/8, x4, x1, x2) - -inst_3102: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8300000f; valaddr_reg:x3; val_offset:9306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9306*FLEN/8, x4, x1, x2) - -inst_3103: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8300001f; valaddr_reg:x3; val_offset:9309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9309*FLEN/8, x4, x1, x2) - -inst_3104: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8300003f; valaddr_reg:x3; val_offset:9312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9312*FLEN/8, x4, x1, x2) - -inst_3105: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8300007f; valaddr_reg:x3; val_offset:9315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9315*FLEN/8, x4, x1, x2) - -inst_3106: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x830000ff; valaddr_reg:x3; val_offset:9318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9318*FLEN/8, x4, x1, x2) - -inst_3107: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x830001ff; valaddr_reg:x3; val_offset:9321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9321*FLEN/8, x4, x1, x2) - -inst_3108: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x830003ff; valaddr_reg:x3; val_offset:9324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9324*FLEN/8, x4, x1, x2) - -inst_3109: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x830007ff; valaddr_reg:x3; val_offset:9327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9327*FLEN/8, x4, x1, x2) - -inst_3110: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83000fff; valaddr_reg:x3; val_offset:9330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9330*FLEN/8, x4, x1, x2) - -inst_3111: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83001fff; valaddr_reg:x3; val_offset:9333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9333*FLEN/8, x4, x1, x2) - -inst_3112: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83003fff; valaddr_reg:x3; val_offset:9336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9336*FLEN/8, x4, x1, x2) - -inst_3113: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83007fff; valaddr_reg:x3; val_offset:9339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9339*FLEN/8, x4, x1, x2) - -inst_3114: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8300ffff; valaddr_reg:x3; val_offset:9342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9342*FLEN/8, x4, x1, x2) - -inst_3115: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8301ffff; valaddr_reg:x3; val_offset:9345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9345*FLEN/8, x4, x1, x2) - -inst_3116: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8303ffff; valaddr_reg:x3; val_offset:9348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9348*FLEN/8, x4, x1, x2) - -inst_3117: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x8307ffff; valaddr_reg:x3; val_offset:9351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9351*FLEN/8, x4, x1, x2) - -inst_3118: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x830fffff; valaddr_reg:x3; val_offset:9354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9354*FLEN/8, x4, x1, x2) - -inst_3119: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x831fffff; valaddr_reg:x3; val_offset:9357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9357*FLEN/8, x4, x1, x2) - -inst_3120: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x833fffff; valaddr_reg:x3; val_offset:9360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9360*FLEN/8, x4, x1, x2) - -inst_3121: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83400000; valaddr_reg:x3; val_offset:9363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9363*FLEN/8, x4, x1, x2) - -inst_3122: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83600000; valaddr_reg:x3; val_offset:9366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9366*FLEN/8, x4, x1, x2) - -inst_3123: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83700000; valaddr_reg:x3; val_offset:9369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9369*FLEN/8, x4, x1, x2) - -inst_3124: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x83780000; valaddr_reg:x3; val_offset:9372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9372*FLEN/8, x4, x1, x2) - -inst_3125: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837c0000; valaddr_reg:x3; val_offset:9375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9375*FLEN/8, x4, x1, x2) - -inst_3126: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837e0000; valaddr_reg:x3; val_offset:9378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9378*FLEN/8, x4, x1, x2) - -inst_3127: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837f0000; valaddr_reg:x3; val_offset:9381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9381*FLEN/8, x4, x1, x2) - -inst_3128: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837f8000; valaddr_reg:x3; val_offset:9384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9384*FLEN/8, x4, x1, x2) - -inst_3129: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837fc000; valaddr_reg:x3; val_offset:9387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9387*FLEN/8, x4, x1, x2) - -inst_3130: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837fe000; valaddr_reg:x3; val_offset:9390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9390*FLEN/8, x4, x1, x2) - -inst_3131: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837ff000; valaddr_reg:x3; val_offset:9393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9393*FLEN/8, x4, x1, x2) - -inst_3132: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837ff800; valaddr_reg:x3; val_offset:9396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9396*FLEN/8, x4, x1, x2) - -inst_3133: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837ffc00; valaddr_reg:x3; val_offset:9399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9399*FLEN/8, x4, x1, x2) - -inst_3134: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837ffe00; valaddr_reg:x3; val_offset:9402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9402*FLEN/8, x4, x1, x2) - -inst_3135: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837fff00; valaddr_reg:x3; val_offset:9405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9405*FLEN/8, x4, x1, x2) - -inst_3136: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837fff80; valaddr_reg:x3; val_offset:9408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9408*FLEN/8, x4, x1, x2) - -inst_3137: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837fffc0; valaddr_reg:x3; val_offset:9411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9411*FLEN/8, x4, x1, x2) - -inst_3138: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837fffe0; valaddr_reg:x3; val_offset:9414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9414*FLEN/8, x4, x1, x2) - -inst_3139: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837ffff0; valaddr_reg:x3; val_offset:9417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9417*FLEN/8, x4, x1, x2) - -inst_3140: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837ffff8; valaddr_reg:x3; val_offset:9420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9420*FLEN/8, x4, x1, x2) - -inst_3141: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837ffffc; valaddr_reg:x3; val_offset:9423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9423*FLEN/8, x4, x1, x2) - -inst_3142: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837ffffe; valaddr_reg:x3; val_offset:9426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9426*FLEN/8, x4, x1, x2) - -inst_3143: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; -op3val:0x837fffff; valaddr_reg:x3; val_offset:9429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9429*FLEN/8, x4, x1, x2) - -inst_3144: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3f800001; valaddr_reg:x3; val_offset:9432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9432*FLEN/8, x4, x1, x2) - -inst_3145: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3f800003; valaddr_reg:x3; val_offset:9435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9435*FLEN/8, x4, x1, x2) - -inst_3146: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3f800007; valaddr_reg:x3; val_offset:9438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9438*FLEN/8, x4, x1, x2) - -inst_3147: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3f999999; valaddr_reg:x3; val_offset:9441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9441*FLEN/8, x4, x1, x2) - -inst_3148: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:9444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9444*FLEN/8, x4, x1, x2) - -inst_3149: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:9447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9447*FLEN/8, x4, x1, x2) - -inst_3150: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:9450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9450*FLEN/8, x4, x1, x2) - -inst_3151: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:9453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9453*FLEN/8, x4, x1, x2) - -inst_3152: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:9456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9456*FLEN/8, x4, x1, x2) - -inst_3153: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:9459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9459*FLEN/8, x4, x1, x2) - -inst_3154: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:9462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9462*FLEN/8, x4, x1, x2) - -inst_3155: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:9465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9465*FLEN/8, x4, x1, x2) - -inst_3156: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:9468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9468*FLEN/8, x4, x1, x2) - -inst_3157: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:9471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9471*FLEN/8, x4, x1, x2) - -inst_3158: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:9474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9474*FLEN/8, x4, x1, x2) - -inst_3159: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:9477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9477*FLEN/8, x4, x1, x2) - -inst_3160: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f000000; valaddr_reg:x3; val_offset:9480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9480*FLEN/8, x4, x1, x2) - -inst_3161: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f000001; valaddr_reg:x3; val_offset:9483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9483*FLEN/8, x4, x1, x2) - -inst_3162: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f000003; valaddr_reg:x3; val_offset:9486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9486*FLEN/8, x4, x1, x2) - -inst_3163: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f000007; valaddr_reg:x3; val_offset:9489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9489*FLEN/8, x4, x1, x2) - -inst_3164: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f00000f; valaddr_reg:x3; val_offset:9492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9492*FLEN/8, x4, x1, x2) - -inst_3165: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f00001f; valaddr_reg:x3; val_offset:9495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9495*FLEN/8, x4, x1, x2) - -inst_3166: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f00003f; valaddr_reg:x3; val_offset:9498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9498*FLEN/8, x4, x1, x2) - -inst_3167: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f00007f; valaddr_reg:x3; val_offset:9501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9501*FLEN/8, x4, x1, x2) - -inst_3168: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f0000ff; valaddr_reg:x3; val_offset:9504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9504*FLEN/8, x4, x1, x2) - -inst_3169: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f0001ff; valaddr_reg:x3; val_offset:9507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9507*FLEN/8, x4, x1, x2) - -inst_3170: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f0003ff; valaddr_reg:x3; val_offset:9510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9510*FLEN/8, x4, x1, x2) - -inst_3171: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f0007ff; valaddr_reg:x3; val_offset:9513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9513*FLEN/8, x4, x1, x2) - -inst_3172: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f000fff; valaddr_reg:x3; val_offset:9516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9516*FLEN/8, x4, x1, x2) - -inst_3173: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f001fff; valaddr_reg:x3; val_offset:9519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9519*FLEN/8, x4, x1, x2) - -inst_3174: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f003fff; valaddr_reg:x3; val_offset:9522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9522*FLEN/8, x4, x1, x2) - -inst_3175: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f007fff; valaddr_reg:x3; val_offset:9525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9525*FLEN/8, x4, x1, x2) - -inst_3176: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f00ffff; valaddr_reg:x3; val_offset:9528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9528*FLEN/8, x4, x1, x2) - -inst_3177: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f01ffff; valaddr_reg:x3; val_offset:9531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9531*FLEN/8, x4, x1, x2) - -inst_3178: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f03ffff; valaddr_reg:x3; val_offset:9534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9534*FLEN/8, x4, x1, x2) - -inst_3179: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f07ffff; valaddr_reg:x3; val_offset:9537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9537*FLEN/8, x4, x1, x2) - -inst_3180: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f0fffff; valaddr_reg:x3; val_offset:9540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9540*FLEN/8, x4, x1, x2) - -inst_3181: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f1fffff; valaddr_reg:x3; val_offset:9543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9543*FLEN/8, x4, x1, x2) - -inst_3182: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f3fffff; valaddr_reg:x3; val_offset:9546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9546*FLEN/8, x4, x1, x2) - -inst_3183: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f400000; valaddr_reg:x3; val_offset:9549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9549*FLEN/8, x4, x1, x2) - -inst_3184: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f600000; valaddr_reg:x3; val_offset:9552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9552*FLEN/8, x4, x1, x2) - -inst_3185: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f700000; valaddr_reg:x3; val_offset:9555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9555*FLEN/8, x4, x1, x2) - -inst_3186: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f780000; valaddr_reg:x3; val_offset:9558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9558*FLEN/8, x4, x1, x2) - -inst_3187: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7c0000; valaddr_reg:x3; val_offset:9561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9561*FLEN/8, x4, x1, x2) - -inst_3188: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7e0000; valaddr_reg:x3; val_offset:9564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9564*FLEN/8, x4, x1, x2) - -inst_3189: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7f0000; valaddr_reg:x3; val_offset:9567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9567*FLEN/8, x4, x1, x2) - -inst_3190: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7f8000; valaddr_reg:x3; val_offset:9570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9570*FLEN/8, x4, x1, x2) - -inst_3191: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7fc000; valaddr_reg:x3; val_offset:9573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9573*FLEN/8, x4, x1, x2) - -inst_3192: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7fe000; valaddr_reg:x3; val_offset:9576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9576*FLEN/8, x4, x1, x2) - -inst_3193: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7ff000; valaddr_reg:x3; val_offset:9579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9579*FLEN/8, x4, x1, x2) - -inst_3194: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7ff800; valaddr_reg:x3; val_offset:9582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9582*FLEN/8, x4, x1, x2) - -inst_3195: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7ffc00; valaddr_reg:x3; val_offset:9585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9585*FLEN/8, x4, x1, x2) - -inst_3196: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7ffe00; valaddr_reg:x3; val_offset:9588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9588*FLEN/8, x4, x1, x2) - -inst_3197: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7fff00; valaddr_reg:x3; val_offset:9591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9591*FLEN/8, x4, x1, x2) - -inst_3198: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7fff80; valaddr_reg:x3; val_offset:9594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9594*FLEN/8, x4, x1, x2) - -inst_3199: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7fffc0; valaddr_reg:x3; val_offset:9597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9597*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_26) - -inst_3200: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7fffe0; valaddr_reg:x3; val_offset:9600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9600*FLEN/8, x4, x1, x2) - -inst_3201: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7ffff0; valaddr_reg:x3; val_offset:9603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9603*FLEN/8, x4, x1, x2) - -inst_3202: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7ffff8; valaddr_reg:x3; val_offset:9606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9606*FLEN/8, x4, x1, x2) - -inst_3203: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7ffffc; valaddr_reg:x3; val_offset:9609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9609*FLEN/8, x4, x1, x2) - -inst_3204: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7ffffe; valaddr_reg:x3; val_offset:9612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9612*FLEN/8, x4, x1, x2) - -inst_3205: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; -op3val:0x4f7fffff; valaddr_reg:x3; val_offset:9615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9615*FLEN/8, x4, x1, x2) - -inst_3206: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21800000; valaddr_reg:x3; val_offset:9618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9618*FLEN/8, x4, x1, x2) - -inst_3207: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21800001; valaddr_reg:x3; val_offset:9621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9621*FLEN/8, x4, x1, x2) - -inst_3208: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21800003; valaddr_reg:x3; val_offset:9624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9624*FLEN/8, x4, x1, x2) - -inst_3209: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21800007; valaddr_reg:x3; val_offset:9627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9627*FLEN/8, x4, x1, x2) - -inst_3210: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x2180000f; valaddr_reg:x3; val_offset:9630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9630*FLEN/8, x4, x1, x2) - -inst_3211: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x2180001f; valaddr_reg:x3; val_offset:9633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9633*FLEN/8, x4, x1, x2) - -inst_3212: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x2180003f; valaddr_reg:x3; val_offset:9636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9636*FLEN/8, x4, x1, x2) - -inst_3213: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x2180007f; valaddr_reg:x3; val_offset:9639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9639*FLEN/8, x4, x1, x2) - -inst_3214: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x218000ff; valaddr_reg:x3; val_offset:9642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9642*FLEN/8, x4, x1, x2) - -inst_3215: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x218001ff; valaddr_reg:x3; val_offset:9645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9645*FLEN/8, x4, x1, x2) - -inst_3216: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x218003ff; valaddr_reg:x3; val_offset:9648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9648*FLEN/8, x4, x1, x2) - -inst_3217: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x218007ff; valaddr_reg:x3; val_offset:9651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9651*FLEN/8, x4, x1, x2) - -inst_3218: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21800fff; valaddr_reg:x3; val_offset:9654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9654*FLEN/8, x4, x1, x2) - -inst_3219: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21801fff; valaddr_reg:x3; val_offset:9657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9657*FLEN/8, x4, x1, x2) - -inst_3220: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21803fff; valaddr_reg:x3; val_offset:9660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9660*FLEN/8, x4, x1, x2) - -inst_3221: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21807fff; valaddr_reg:x3; val_offset:9663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9663*FLEN/8, x4, x1, x2) - -inst_3222: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x2180ffff; valaddr_reg:x3; val_offset:9666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9666*FLEN/8, x4, x1, x2) - -inst_3223: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x2181ffff; valaddr_reg:x3; val_offset:9669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9669*FLEN/8, x4, x1, x2) - -inst_3224: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x2183ffff; valaddr_reg:x3; val_offset:9672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9672*FLEN/8, x4, x1, x2) - -inst_3225: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x2187ffff; valaddr_reg:x3; val_offset:9675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9675*FLEN/8, x4, x1, x2) - -inst_3226: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x218fffff; valaddr_reg:x3; val_offset:9678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9678*FLEN/8, x4, x1, x2) - -inst_3227: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x219fffff; valaddr_reg:x3; val_offset:9681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9681*FLEN/8, x4, x1, x2) - -inst_3228: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21bfffff; valaddr_reg:x3; val_offset:9684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9684*FLEN/8, x4, x1, x2) - -inst_3229: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21c00000; valaddr_reg:x3; val_offset:9687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9687*FLEN/8, x4, x1, x2) - -inst_3230: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21e00000; valaddr_reg:x3; val_offset:9690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9690*FLEN/8, x4, x1, x2) - -inst_3231: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21f00000; valaddr_reg:x3; val_offset:9693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9693*FLEN/8, x4, x1, x2) - -inst_3232: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21f80000; valaddr_reg:x3; val_offset:9696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9696*FLEN/8, x4, x1, x2) - -inst_3233: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fc0000; valaddr_reg:x3; val_offset:9699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9699*FLEN/8, x4, x1, x2) - -inst_3234: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fe0000; valaddr_reg:x3; val_offset:9702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9702*FLEN/8, x4, x1, x2) - -inst_3235: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ff0000; valaddr_reg:x3; val_offset:9705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9705*FLEN/8, x4, x1, x2) - -inst_3236: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ff8000; valaddr_reg:x3; val_offset:9708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9708*FLEN/8, x4, x1, x2) - -inst_3237: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ffc000; valaddr_reg:x3; val_offset:9711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9711*FLEN/8, x4, x1, x2) - -inst_3238: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ffe000; valaddr_reg:x3; val_offset:9714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9714*FLEN/8, x4, x1, x2) - -inst_3239: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fff000; valaddr_reg:x3; val_offset:9717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9717*FLEN/8, x4, x1, x2) - -inst_3240: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fff800; valaddr_reg:x3; val_offset:9720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9720*FLEN/8, x4, x1, x2) - -inst_3241: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fffc00; valaddr_reg:x3; val_offset:9723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9723*FLEN/8, x4, x1, x2) - -inst_3242: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fffe00; valaddr_reg:x3; val_offset:9726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9726*FLEN/8, x4, x1, x2) - -inst_3243: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ffff00; valaddr_reg:x3; val_offset:9729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9729*FLEN/8, x4, x1, x2) - -inst_3244: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ffff80; valaddr_reg:x3; val_offset:9732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9732*FLEN/8, x4, x1, x2) - -inst_3245: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ffffc0; valaddr_reg:x3; val_offset:9735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9735*FLEN/8, x4, x1, x2) - -inst_3246: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ffffe0; valaddr_reg:x3; val_offset:9738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9738*FLEN/8, x4, x1, x2) - -inst_3247: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fffff0; valaddr_reg:x3; val_offset:9741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9741*FLEN/8, x4, x1, x2) - -inst_3248: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fffff8; valaddr_reg:x3; val_offset:9744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9744*FLEN/8, x4, x1, x2) - -inst_3249: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fffffc; valaddr_reg:x3; val_offset:9747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9747*FLEN/8, x4, x1, x2) - -inst_3250: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21fffffe; valaddr_reg:x3; val_offset:9750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9750*FLEN/8, x4, x1, x2) - -inst_3251: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x21ffffff; valaddr_reg:x3; val_offset:9753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9753*FLEN/8, x4, x1, x2) - -inst_3252: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3f800001; valaddr_reg:x3; val_offset:9756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9756*FLEN/8, x4, x1, x2) - -inst_3253: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3f800003; valaddr_reg:x3; val_offset:9759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9759*FLEN/8, x4, x1, x2) - -inst_3254: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3f800007; valaddr_reg:x3; val_offset:9762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9762*FLEN/8, x4, x1, x2) - -inst_3255: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3f999999; valaddr_reg:x3; val_offset:9765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9765*FLEN/8, x4, x1, x2) - -inst_3256: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:9768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9768*FLEN/8, x4, x1, x2) - -inst_3257: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:9771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9771*FLEN/8, x4, x1, x2) - -inst_3258: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:9774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9774*FLEN/8, x4, x1, x2) - -inst_3259: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:9777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9777*FLEN/8, x4, x1, x2) - -inst_3260: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:9780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9780*FLEN/8, x4, x1, x2) - -inst_3261: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:9783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9783*FLEN/8, x4, x1, x2) - -inst_3262: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:9786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9786*FLEN/8, x4, x1, x2) - -inst_3263: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:9789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9789*FLEN/8, x4, x1, x2) - -inst_3264: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:9792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9792*FLEN/8, x4, x1, x2) - -inst_3265: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:9795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9795*FLEN/8, x4, x1, x2) - -inst_3266: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:9798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9798*FLEN/8, x4, x1, x2) - -inst_3267: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:9801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9801*FLEN/8, x4, x1, x2) - -inst_3268: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:9804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9804*FLEN/8, x4, x1, x2) - -inst_3269: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:9807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9807*FLEN/8, x4, x1, x2) - -inst_3270: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:9810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9810*FLEN/8, x4, x1, x2) - -inst_3271: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:9813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9813*FLEN/8, x4, x1, x2) - -inst_3272: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:9816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9816*FLEN/8, x4, x1, x2) - -inst_3273: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:9819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9819*FLEN/8, x4, x1, x2) - -inst_3274: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:9822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9822*FLEN/8, x4, x1, x2) - -inst_3275: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:9825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9825*FLEN/8, x4, x1, x2) - -inst_3276: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:9828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9828*FLEN/8, x4, x1, x2) - -inst_3277: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:9831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9831*FLEN/8, x4, x1, x2) - -inst_3278: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:9834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9834*FLEN/8, x4, x1, x2) - -inst_3279: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:9837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9837*FLEN/8, x4, x1, x2) - -inst_3280: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:9840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9840*FLEN/8, x4, x1, x2) - -inst_3281: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:9843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9843*FLEN/8, x4, x1, x2) - -inst_3282: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:9846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9846*FLEN/8, x4, x1, x2) - -inst_3283: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:9849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9849*FLEN/8, x4, x1, x2) - -inst_3284: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87000000; valaddr_reg:x3; val_offset:9852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9852*FLEN/8, x4, x1, x2) - -inst_3285: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87000001; valaddr_reg:x3; val_offset:9855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9855*FLEN/8, x4, x1, x2) - -inst_3286: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87000003; valaddr_reg:x3; val_offset:9858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9858*FLEN/8, x4, x1, x2) - -inst_3287: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87000007; valaddr_reg:x3; val_offset:9861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9861*FLEN/8, x4, x1, x2) - -inst_3288: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8700000f; valaddr_reg:x3; val_offset:9864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9864*FLEN/8, x4, x1, x2) - -inst_3289: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8700001f; valaddr_reg:x3; val_offset:9867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9867*FLEN/8, x4, x1, x2) - -inst_3290: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8700003f; valaddr_reg:x3; val_offset:9870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9870*FLEN/8, x4, x1, x2) - -inst_3291: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8700007f; valaddr_reg:x3; val_offset:9873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9873*FLEN/8, x4, x1, x2) - -inst_3292: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x870000ff; valaddr_reg:x3; val_offset:9876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9876*FLEN/8, x4, x1, x2) - -inst_3293: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x870001ff; valaddr_reg:x3; val_offset:9879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9879*FLEN/8, x4, x1, x2) - -inst_3294: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x870003ff; valaddr_reg:x3; val_offset:9882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9882*FLEN/8, x4, x1, x2) - -inst_3295: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x870007ff; valaddr_reg:x3; val_offset:9885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9885*FLEN/8, x4, x1, x2) - -inst_3296: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87000fff; valaddr_reg:x3; val_offset:9888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9888*FLEN/8, x4, x1, x2) - -inst_3297: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87001fff; valaddr_reg:x3; val_offset:9891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9891*FLEN/8, x4, x1, x2) - -inst_3298: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87003fff; valaddr_reg:x3; val_offset:9894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9894*FLEN/8, x4, x1, x2) - -inst_3299: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87007fff; valaddr_reg:x3; val_offset:9897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9897*FLEN/8, x4, x1, x2) - -inst_3300: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8700ffff; valaddr_reg:x3; val_offset:9900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9900*FLEN/8, x4, x1, x2) - -inst_3301: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8701ffff; valaddr_reg:x3; val_offset:9903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9903*FLEN/8, x4, x1, x2) - -inst_3302: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8703ffff; valaddr_reg:x3; val_offset:9906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9906*FLEN/8, x4, x1, x2) - -inst_3303: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x8707ffff; valaddr_reg:x3; val_offset:9909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9909*FLEN/8, x4, x1, x2) - -inst_3304: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x870fffff; valaddr_reg:x3; val_offset:9912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9912*FLEN/8, x4, x1, x2) - -inst_3305: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x871fffff; valaddr_reg:x3; val_offset:9915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9915*FLEN/8, x4, x1, x2) - -inst_3306: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x873fffff; valaddr_reg:x3; val_offset:9918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9918*FLEN/8, x4, x1, x2) - -inst_3307: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87400000; valaddr_reg:x3; val_offset:9921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9921*FLEN/8, x4, x1, x2) - -inst_3308: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87600000; valaddr_reg:x3; val_offset:9924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9924*FLEN/8, x4, x1, x2) - -inst_3309: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87700000; valaddr_reg:x3; val_offset:9927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9927*FLEN/8, x4, x1, x2) - -inst_3310: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x87780000; valaddr_reg:x3; val_offset:9930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9930*FLEN/8, x4, x1, x2) - -inst_3311: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877c0000; valaddr_reg:x3; val_offset:9933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9933*FLEN/8, x4, x1, x2) - -inst_3312: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877e0000; valaddr_reg:x3; val_offset:9936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9936*FLEN/8, x4, x1, x2) - -inst_3313: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877f0000; valaddr_reg:x3; val_offset:9939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9939*FLEN/8, x4, x1, x2) - -inst_3314: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877f8000; valaddr_reg:x3; val_offset:9942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9942*FLEN/8, x4, x1, x2) - -inst_3315: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877fc000; valaddr_reg:x3; val_offset:9945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9945*FLEN/8, x4, x1, x2) - -inst_3316: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877fe000; valaddr_reg:x3; val_offset:9948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9948*FLEN/8, x4, x1, x2) - -inst_3317: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877ff000; valaddr_reg:x3; val_offset:9951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9951*FLEN/8, x4, x1, x2) - -inst_3318: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877ff800; valaddr_reg:x3; val_offset:9954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9954*FLEN/8, x4, x1, x2) - -inst_3319: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877ffc00; valaddr_reg:x3; val_offset:9957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9957*FLEN/8, x4, x1, x2) - -inst_3320: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877ffe00; valaddr_reg:x3; val_offset:9960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9960*FLEN/8, x4, x1, x2) - -inst_3321: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877fff00; valaddr_reg:x3; val_offset:9963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9963*FLEN/8, x4, x1, x2) - -inst_3322: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877fff80; valaddr_reg:x3; val_offset:9966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9966*FLEN/8, x4, x1, x2) - -inst_3323: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877fffc0; valaddr_reg:x3; val_offset:9969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9969*FLEN/8, x4, x1, x2) - -inst_3324: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877fffe0; valaddr_reg:x3; val_offset:9972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9972*FLEN/8, x4, x1, x2) - -inst_3325: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877ffff0; valaddr_reg:x3; val_offset:9975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9975*FLEN/8, x4, x1, x2) - -inst_3326: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877ffff8; valaddr_reg:x3; val_offset:9978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9978*FLEN/8, x4, x1, x2) - -inst_3327: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877ffffc; valaddr_reg:x3; val_offset:9981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9981*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_27) - -inst_3328: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877ffffe; valaddr_reg:x3; val_offset:9984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9984*FLEN/8, x4, x1, x2) - -inst_3329: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; -op3val:0x877fffff; valaddr_reg:x3; val_offset:9987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9987*FLEN/8, x4, x1, x2) - -inst_3330: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4000000; valaddr_reg:x3; val_offset:9990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9990*FLEN/8, x4, x1, x2) - -inst_3331: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4000001; valaddr_reg:x3; val_offset:9993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9993*FLEN/8, x4, x1, x2) - -inst_3332: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4000003; valaddr_reg:x3; val_offset:9996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9996*FLEN/8, x4, x1, x2) - -inst_3333: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4000007; valaddr_reg:x3; val_offset:9999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9999*FLEN/8, x4, x1, x2) - -inst_3334: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa400000f; valaddr_reg:x3; val_offset:10002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10002*FLEN/8, x4, x1, x2) - -inst_3335: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa400001f; valaddr_reg:x3; val_offset:10005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10005*FLEN/8, x4, x1, x2) - -inst_3336: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa400003f; valaddr_reg:x3; val_offset:10008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10008*FLEN/8, x4, x1, x2) - -inst_3337: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa400007f; valaddr_reg:x3; val_offset:10011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10011*FLEN/8, x4, x1, x2) - -inst_3338: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa40000ff; valaddr_reg:x3; val_offset:10014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10014*FLEN/8, x4, x1, x2) - -inst_3339: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa40001ff; valaddr_reg:x3; val_offset:10017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10017*FLEN/8, x4, x1, x2) - -inst_3340: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa40003ff; valaddr_reg:x3; val_offset:10020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10020*FLEN/8, x4, x1, x2) - -inst_3341: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa40007ff; valaddr_reg:x3; val_offset:10023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10023*FLEN/8, x4, x1, x2) - -inst_3342: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4000fff; valaddr_reg:x3; val_offset:10026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10026*FLEN/8, x4, x1, x2) - -inst_3343: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4001fff; valaddr_reg:x3; val_offset:10029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10029*FLEN/8, x4, x1, x2) - -inst_3344: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4003fff; valaddr_reg:x3; val_offset:10032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10032*FLEN/8, x4, x1, x2) - -inst_3345: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4007fff; valaddr_reg:x3; val_offset:10035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10035*FLEN/8, x4, x1, x2) - -inst_3346: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa400ffff; valaddr_reg:x3; val_offset:10038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10038*FLEN/8, x4, x1, x2) - -inst_3347: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa401ffff; valaddr_reg:x3; val_offset:10041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10041*FLEN/8, x4, x1, x2) - -inst_3348: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa403ffff; valaddr_reg:x3; val_offset:10044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10044*FLEN/8, x4, x1, x2) - -inst_3349: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa407ffff; valaddr_reg:x3; val_offset:10047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10047*FLEN/8, x4, x1, x2) - -inst_3350: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa40fffff; valaddr_reg:x3; val_offset:10050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10050*FLEN/8, x4, x1, x2) - -inst_3351: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa41fffff; valaddr_reg:x3; val_offset:10053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10053*FLEN/8, x4, x1, x2) - -inst_3352: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa43fffff; valaddr_reg:x3; val_offset:10056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10056*FLEN/8, x4, x1, x2) - -inst_3353: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4400000; valaddr_reg:x3; val_offset:10059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10059*FLEN/8, x4, x1, x2) - -inst_3354: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4600000; valaddr_reg:x3; val_offset:10062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10062*FLEN/8, x4, x1, x2) - -inst_3355: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4700000; valaddr_reg:x3; val_offset:10065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10065*FLEN/8, x4, x1, x2) - -inst_3356: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa4780000; valaddr_reg:x3; val_offset:10068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10068*FLEN/8, x4, x1, x2) - -inst_3357: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47c0000; valaddr_reg:x3; val_offset:10071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10071*FLEN/8, x4, x1, x2) - -inst_3358: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47e0000; valaddr_reg:x3; val_offset:10074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10074*FLEN/8, x4, x1, x2) - -inst_3359: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47f0000; valaddr_reg:x3; val_offset:10077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10077*FLEN/8, x4, x1, x2) - -inst_3360: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47f8000; valaddr_reg:x3; val_offset:10080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10080*FLEN/8, x4, x1, x2) - -inst_3361: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47fc000; valaddr_reg:x3; val_offset:10083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10083*FLEN/8, x4, x1, x2) - -inst_3362: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47fe000; valaddr_reg:x3; val_offset:10086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10086*FLEN/8, x4, x1, x2) - -inst_3363: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47ff000; valaddr_reg:x3; val_offset:10089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10089*FLEN/8, x4, x1, x2) - -inst_3364: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47ff800; valaddr_reg:x3; val_offset:10092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10092*FLEN/8, x4, x1, x2) - -inst_3365: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47ffc00; valaddr_reg:x3; val_offset:10095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10095*FLEN/8, x4, x1, x2) - -inst_3366: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47ffe00; valaddr_reg:x3; val_offset:10098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10098*FLEN/8, x4, x1, x2) - -inst_3367: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47fff00; valaddr_reg:x3; val_offset:10101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10101*FLEN/8, x4, x1, x2) - -inst_3368: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47fff80; valaddr_reg:x3; val_offset:10104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10104*FLEN/8, x4, x1, x2) - -inst_3369: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47fffc0; valaddr_reg:x3; val_offset:10107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10107*FLEN/8, x4, x1, x2) - -inst_3370: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47fffe0; valaddr_reg:x3; val_offset:10110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10110*FLEN/8, x4, x1, x2) - -inst_3371: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47ffff0; valaddr_reg:x3; val_offset:10113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10113*FLEN/8, x4, x1, x2) - -inst_3372: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47ffff8; valaddr_reg:x3; val_offset:10116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10116*FLEN/8, x4, x1, x2) - -inst_3373: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47ffffc; valaddr_reg:x3; val_offset:10119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10119*FLEN/8, x4, x1, x2) - -inst_3374: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47ffffe; valaddr_reg:x3; val_offset:10122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10122*FLEN/8, x4, x1, x2) - -inst_3375: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xa47fffff; valaddr_reg:x3; val_offset:10125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10125*FLEN/8, x4, x1, x2) - -inst_3376: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbf800001; valaddr_reg:x3; val_offset:10128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10128*FLEN/8, x4, x1, x2) - -inst_3377: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbf800003; valaddr_reg:x3; val_offset:10131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10131*FLEN/8, x4, x1, x2) - -inst_3378: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbf800007; valaddr_reg:x3; val_offset:10134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10134*FLEN/8, x4, x1, x2) - -inst_3379: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbf999999; valaddr_reg:x3; val_offset:10137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10137*FLEN/8, x4, x1, x2) - -inst_3380: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:10140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10140*FLEN/8, x4, x1, x2) - -inst_3381: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:10143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10143*FLEN/8, x4, x1, x2) - -inst_3382: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:10146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10146*FLEN/8, x4, x1, x2) - -inst_3383: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:10149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10149*FLEN/8, x4, x1, x2) - -inst_3384: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:10152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10152*FLEN/8, x4, x1, x2) - -inst_3385: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:10155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10155*FLEN/8, x4, x1, x2) - -inst_3386: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:10158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10158*FLEN/8, x4, x1, x2) - -inst_3387: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:10161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10161*FLEN/8, x4, x1, x2) - -inst_3388: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:10164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10164*FLEN/8, x4, x1, x2) - -inst_3389: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:10167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10167*FLEN/8, x4, x1, x2) - -inst_3390: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:10170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10170*FLEN/8, x4, x1, x2) - -inst_3391: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:10173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10173*FLEN/8, x4, x1, x2) - -inst_3392: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72000000; valaddr_reg:x3; val_offset:10176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10176*FLEN/8, x4, x1, x2) - -inst_3393: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72000001; valaddr_reg:x3; val_offset:10179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10179*FLEN/8, x4, x1, x2) - -inst_3394: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72000003; valaddr_reg:x3; val_offset:10182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10182*FLEN/8, x4, x1, x2) - -inst_3395: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72000007; valaddr_reg:x3; val_offset:10185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10185*FLEN/8, x4, x1, x2) - -inst_3396: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7200000f; valaddr_reg:x3; val_offset:10188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10188*FLEN/8, x4, x1, x2) - -inst_3397: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7200001f; valaddr_reg:x3; val_offset:10191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10191*FLEN/8, x4, x1, x2) - -inst_3398: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7200003f; valaddr_reg:x3; val_offset:10194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10194*FLEN/8, x4, x1, x2) - -inst_3399: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7200007f; valaddr_reg:x3; val_offset:10197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10197*FLEN/8, x4, x1, x2) - -inst_3400: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x720000ff; valaddr_reg:x3; val_offset:10200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10200*FLEN/8, x4, x1, x2) - -inst_3401: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x720001ff; valaddr_reg:x3; val_offset:10203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10203*FLEN/8, x4, x1, x2) - -inst_3402: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x720003ff; valaddr_reg:x3; val_offset:10206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10206*FLEN/8, x4, x1, x2) - -inst_3403: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x720007ff; valaddr_reg:x3; val_offset:10209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10209*FLEN/8, x4, x1, x2) - -inst_3404: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72000fff; valaddr_reg:x3; val_offset:10212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10212*FLEN/8, x4, x1, x2) - -inst_3405: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72001fff; valaddr_reg:x3; val_offset:10215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10215*FLEN/8, x4, x1, x2) - -inst_3406: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72003fff; valaddr_reg:x3; val_offset:10218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10218*FLEN/8, x4, x1, x2) - -inst_3407: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72007fff; valaddr_reg:x3; val_offset:10221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10221*FLEN/8, x4, x1, x2) - -inst_3408: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7200ffff; valaddr_reg:x3; val_offset:10224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10224*FLEN/8, x4, x1, x2) - -inst_3409: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7201ffff; valaddr_reg:x3; val_offset:10227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10227*FLEN/8, x4, x1, x2) - -inst_3410: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7203ffff; valaddr_reg:x3; val_offset:10230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10230*FLEN/8, x4, x1, x2) - -inst_3411: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7207ffff; valaddr_reg:x3; val_offset:10233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10233*FLEN/8, x4, x1, x2) - -inst_3412: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x720fffff; valaddr_reg:x3; val_offset:10236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10236*FLEN/8, x4, x1, x2) - -inst_3413: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x721fffff; valaddr_reg:x3; val_offset:10239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10239*FLEN/8, x4, x1, x2) - -inst_3414: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x723fffff; valaddr_reg:x3; val_offset:10242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10242*FLEN/8, x4, x1, x2) - -inst_3415: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72400000; valaddr_reg:x3; val_offset:10245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10245*FLEN/8, x4, x1, x2) - -inst_3416: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72600000; valaddr_reg:x3; val_offset:10248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10248*FLEN/8, x4, x1, x2) - -inst_3417: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72700000; valaddr_reg:x3; val_offset:10251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10251*FLEN/8, x4, x1, x2) - -inst_3418: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x72780000; valaddr_reg:x3; val_offset:10254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10254*FLEN/8, x4, x1, x2) - -inst_3419: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727c0000; valaddr_reg:x3; val_offset:10257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10257*FLEN/8, x4, x1, x2) - -inst_3420: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727e0000; valaddr_reg:x3; val_offset:10260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10260*FLEN/8, x4, x1, x2) - -inst_3421: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727f0000; valaddr_reg:x3; val_offset:10263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10263*FLEN/8, x4, x1, x2) - -inst_3422: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727f8000; valaddr_reg:x3; val_offset:10266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10266*FLEN/8, x4, x1, x2) - -inst_3423: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727fc000; valaddr_reg:x3; val_offset:10269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10269*FLEN/8, x4, x1, x2) - -inst_3424: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727fe000; valaddr_reg:x3; val_offset:10272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10272*FLEN/8, x4, x1, x2) - -inst_3425: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727ff000; valaddr_reg:x3; val_offset:10275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10275*FLEN/8, x4, x1, x2) - -inst_3426: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727ff800; valaddr_reg:x3; val_offset:10278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10278*FLEN/8, x4, x1, x2) - -inst_3427: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727ffc00; valaddr_reg:x3; val_offset:10281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10281*FLEN/8, x4, x1, x2) - -inst_3428: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727ffe00; valaddr_reg:x3; val_offset:10284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10284*FLEN/8, x4, x1, x2) - -inst_3429: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727fff00; valaddr_reg:x3; val_offset:10287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10287*FLEN/8, x4, x1, x2) - -inst_3430: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727fff80; valaddr_reg:x3; val_offset:10290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10290*FLEN/8, x4, x1, x2) - -inst_3431: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727fffc0; valaddr_reg:x3; val_offset:10293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10293*FLEN/8, x4, x1, x2) - -inst_3432: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727fffe0; valaddr_reg:x3; val_offset:10296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10296*FLEN/8, x4, x1, x2) - -inst_3433: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727ffff0; valaddr_reg:x3; val_offset:10299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10299*FLEN/8, x4, x1, x2) - -inst_3434: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727ffff8; valaddr_reg:x3; val_offset:10302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10302*FLEN/8, x4, x1, x2) - -inst_3435: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727ffffc; valaddr_reg:x3; val_offset:10305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10305*FLEN/8, x4, x1, x2) - -inst_3436: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727ffffe; valaddr_reg:x3; val_offset:10308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10308*FLEN/8, x4, x1, x2) - -inst_3437: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x727fffff; valaddr_reg:x3; val_offset:10311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10311*FLEN/8, x4, x1, x2) - -inst_3438: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f000001; valaddr_reg:x3; val_offset:10314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10314*FLEN/8, x4, x1, x2) - -inst_3439: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f000003; valaddr_reg:x3; val_offset:10317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10317*FLEN/8, x4, x1, x2) - -inst_3440: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f000007; valaddr_reg:x3; val_offset:10320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10320*FLEN/8, x4, x1, x2) - -inst_3441: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f199999; valaddr_reg:x3; val_offset:10323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10323*FLEN/8, x4, x1, x2) - -inst_3442: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f249249; valaddr_reg:x3; val_offset:10326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10326*FLEN/8, x4, x1, x2) - -inst_3443: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f333333; valaddr_reg:x3; val_offset:10329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10329*FLEN/8, x4, x1, x2) - -inst_3444: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:10332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10332*FLEN/8, x4, x1, x2) - -inst_3445: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:10335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10335*FLEN/8, x4, x1, x2) - -inst_3446: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f444444; valaddr_reg:x3; val_offset:10338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10338*FLEN/8, x4, x1, x2) - -inst_3447: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:10341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10341*FLEN/8, x4, x1, x2) - -inst_3448: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:10344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10344*FLEN/8, x4, x1, x2) - -inst_3449: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f666666; valaddr_reg:x3; val_offset:10347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10347*FLEN/8, x4, x1, x2) - -inst_3450: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:10350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10350*FLEN/8, x4, x1, x2) - -inst_3451: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:10353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10353*FLEN/8, x4, x1, x2) - -inst_3452: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:10356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10356*FLEN/8, x4, x1, x2) - -inst_3453: -// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:10359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10359*FLEN/8, x4, x1, x2) - -inst_3454: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:10362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10362*FLEN/8, x4, x1, x2) - -inst_3455: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:10365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10365*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_28) - -inst_3456: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:10368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10368*FLEN/8, x4, x1, x2) - -inst_3457: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:10371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10371*FLEN/8, x4, x1, x2) - -inst_3458: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:10374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10374*FLEN/8, x4, x1, x2) - -inst_3459: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:10377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10377*FLEN/8, x4, x1, x2) - -inst_3460: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:10380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10380*FLEN/8, x4, x1, x2) - -inst_3461: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:10383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10383*FLEN/8, x4, x1, x2) - -inst_3462: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:10386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10386*FLEN/8, x4, x1, x2) - -inst_3463: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:10389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10389*FLEN/8, x4, x1, x2) - -inst_3464: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:10392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10392*FLEN/8, x4, x1, x2) - -inst_3465: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:10395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10395*FLEN/8, x4, x1, x2) - -inst_3466: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:10398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10398*FLEN/8, x4, x1, x2) - -inst_3467: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:10401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10401*FLEN/8, x4, x1, x2) - -inst_3468: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:10404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10404*FLEN/8, x4, x1, x2) - -inst_3469: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:10407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10407*FLEN/8, x4, x1, x2) - -inst_3470: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83000000; valaddr_reg:x3; val_offset:10410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10410*FLEN/8, x4, x1, x2) - -inst_3471: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83000001; valaddr_reg:x3; val_offset:10413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10413*FLEN/8, x4, x1, x2) - -inst_3472: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83000003; valaddr_reg:x3; val_offset:10416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10416*FLEN/8, x4, x1, x2) - -inst_3473: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83000007; valaddr_reg:x3; val_offset:10419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10419*FLEN/8, x4, x1, x2) - -inst_3474: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8300000f; valaddr_reg:x3; val_offset:10422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10422*FLEN/8, x4, x1, x2) - -inst_3475: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8300001f; valaddr_reg:x3; val_offset:10425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10425*FLEN/8, x4, x1, x2) - -inst_3476: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8300003f; valaddr_reg:x3; val_offset:10428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10428*FLEN/8, x4, x1, x2) - -inst_3477: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8300007f; valaddr_reg:x3; val_offset:10431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10431*FLEN/8, x4, x1, x2) - -inst_3478: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x830000ff; valaddr_reg:x3; val_offset:10434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10434*FLEN/8, x4, x1, x2) - -inst_3479: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x830001ff; valaddr_reg:x3; val_offset:10437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10437*FLEN/8, x4, x1, x2) - -inst_3480: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x830003ff; valaddr_reg:x3; val_offset:10440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10440*FLEN/8, x4, x1, x2) - -inst_3481: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x830007ff; valaddr_reg:x3; val_offset:10443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10443*FLEN/8, x4, x1, x2) - -inst_3482: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83000fff; valaddr_reg:x3; val_offset:10446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10446*FLEN/8, x4, x1, x2) - -inst_3483: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83001fff; valaddr_reg:x3; val_offset:10449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10449*FLEN/8, x4, x1, x2) - -inst_3484: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83003fff; valaddr_reg:x3; val_offset:10452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10452*FLEN/8, x4, x1, x2) - -inst_3485: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83007fff; valaddr_reg:x3; val_offset:10455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10455*FLEN/8, x4, x1, x2) - -inst_3486: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8300ffff; valaddr_reg:x3; val_offset:10458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10458*FLEN/8, x4, x1, x2) - -inst_3487: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8301ffff; valaddr_reg:x3; val_offset:10461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10461*FLEN/8, x4, x1, x2) - -inst_3488: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8303ffff; valaddr_reg:x3; val_offset:10464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10464*FLEN/8, x4, x1, x2) - -inst_3489: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x8307ffff; valaddr_reg:x3; val_offset:10467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10467*FLEN/8, x4, x1, x2) - -inst_3490: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x830fffff; valaddr_reg:x3; val_offset:10470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10470*FLEN/8, x4, x1, x2) - -inst_3491: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x831fffff; valaddr_reg:x3; val_offset:10473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10473*FLEN/8, x4, x1, x2) - -inst_3492: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x833fffff; valaddr_reg:x3; val_offset:10476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10476*FLEN/8, x4, x1, x2) - -inst_3493: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83400000; valaddr_reg:x3; val_offset:10479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10479*FLEN/8, x4, x1, x2) - -inst_3494: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83600000; valaddr_reg:x3; val_offset:10482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10482*FLEN/8, x4, x1, x2) - -inst_3495: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83700000; valaddr_reg:x3; val_offset:10485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10485*FLEN/8, x4, x1, x2) - -inst_3496: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x83780000; valaddr_reg:x3; val_offset:10488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10488*FLEN/8, x4, x1, x2) - -inst_3497: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837c0000; valaddr_reg:x3; val_offset:10491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10491*FLEN/8, x4, x1, x2) - -inst_3498: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837e0000; valaddr_reg:x3; val_offset:10494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10494*FLEN/8, x4, x1, x2) - -inst_3499: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837f0000; valaddr_reg:x3; val_offset:10497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10497*FLEN/8, x4, x1, x2) - -inst_3500: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837f8000; valaddr_reg:x3; val_offset:10500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10500*FLEN/8, x4, x1, x2) - -inst_3501: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837fc000; valaddr_reg:x3; val_offset:10503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10503*FLEN/8, x4, x1, x2) - -inst_3502: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837fe000; valaddr_reg:x3; val_offset:10506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10506*FLEN/8, x4, x1, x2) - -inst_3503: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837ff000; valaddr_reg:x3; val_offset:10509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10509*FLEN/8, x4, x1, x2) - -inst_3504: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837ff800; valaddr_reg:x3; val_offset:10512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10512*FLEN/8, x4, x1, x2) - -inst_3505: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837ffc00; valaddr_reg:x3; val_offset:10515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10515*FLEN/8, x4, x1, x2) - -inst_3506: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837ffe00; valaddr_reg:x3; val_offset:10518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10518*FLEN/8, x4, x1, x2) - -inst_3507: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837fff00; valaddr_reg:x3; val_offset:10521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10521*FLEN/8, x4, x1, x2) - -inst_3508: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837fff80; valaddr_reg:x3; val_offset:10524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10524*FLEN/8, x4, x1, x2) - -inst_3509: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837fffc0; valaddr_reg:x3; val_offset:10527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10527*FLEN/8, x4, x1, x2) - -inst_3510: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837fffe0; valaddr_reg:x3; val_offset:10530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10530*FLEN/8, x4, x1, x2) - -inst_3511: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837ffff0; valaddr_reg:x3; val_offset:10533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10533*FLEN/8, x4, x1, x2) - -inst_3512: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837ffff8; valaddr_reg:x3; val_offset:10536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10536*FLEN/8, x4, x1, x2) - -inst_3513: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837ffffc; valaddr_reg:x3; val_offset:10539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10539*FLEN/8, x4, x1, x2) - -inst_3514: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837ffffe; valaddr_reg:x3; val_offset:10542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10542*FLEN/8, x4, x1, x2) - -inst_3515: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; -op3val:0x837fffff; valaddr_reg:x3; val_offset:10545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10545*FLEN/8, x4, x1, x2) - -inst_3516: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:10548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10548*FLEN/8, x4, x1, x2) - -inst_3517: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:10551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10551*FLEN/8, x4, x1, x2) - -inst_3518: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:10554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10554*FLEN/8, x4, x1, x2) - -inst_3519: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:10557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10557*FLEN/8, x4, x1, x2) - -inst_3520: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:10560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10560*FLEN/8, x4, x1, x2) - -inst_3521: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:10563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10563*FLEN/8, x4, x1, x2) - -inst_3522: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:10566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10566*FLEN/8, x4, x1, x2) - -inst_3523: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:10569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10569*FLEN/8, x4, x1, x2) - -inst_3524: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:10572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10572*FLEN/8, x4, x1, x2) - -inst_3525: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:10575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10575*FLEN/8, x4, x1, x2) - -inst_3526: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:10578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10578*FLEN/8, x4, x1, x2) - -inst_3527: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:10581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10581*FLEN/8, x4, x1, x2) - -inst_3528: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:10584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10584*FLEN/8, x4, x1, x2) - -inst_3529: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:10587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10587*FLEN/8, x4, x1, x2) - -inst_3530: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:10590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10590*FLEN/8, x4, x1, x2) - -inst_3531: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:10593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10593*FLEN/8, x4, x1, x2) - -inst_3532: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb000000; valaddr_reg:x3; val_offset:10596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10596*FLEN/8, x4, x1, x2) - -inst_3533: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb000001; valaddr_reg:x3; val_offset:10599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10599*FLEN/8, x4, x1, x2) - -inst_3534: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb000003; valaddr_reg:x3; val_offset:10602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10602*FLEN/8, x4, x1, x2) - -inst_3535: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb000007; valaddr_reg:x3; val_offset:10605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10605*FLEN/8, x4, x1, x2) - -inst_3536: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb00000f; valaddr_reg:x3; val_offset:10608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10608*FLEN/8, x4, x1, x2) - -inst_3537: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb00001f; valaddr_reg:x3; val_offset:10611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10611*FLEN/8, x4, x1, x2) - -inst_3538: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb00003f; valaddr_reg:x3; val_offset:10614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10614*FLEN/8, x4, x1, x2) - -inst_3539: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb00007f; valaddr_reg:x3; val_offset:10617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10617*FLEN/8, x4, x1, x2) - -inst_3540: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb0000ff; valaddr_reg:x3; val_offset:10620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10620*FLEN/8, x4, x1, x2) - -inst_3541: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb0001ff; valaddr_reg:x3; val_offset:10623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10623*FLEN/8, x4, x1, x2) - -inst_3542: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb0003ff; valaddr_reg:x3; val_offset:10626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10626*FLEN/8, x4, x1, x2) - -inst_3543: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb0007ff; valaddr_reg:x3; val_offset:10629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10629*FLEN/8, x4, x1, x2) - -inst_3544: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb000fff; valaddr_reg:x3; val_offset:10632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10632*FLEN/8, x4, x1, x2) - -inst_3545: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb001fff; valaddr_reg:x3; val_offset:10635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10635*FLEN/8, x4, x1, x2) - -inst_3546: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb003fff; valaddr_reg:x3; val_offset:10638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10638*FLEN/8, x4, x1, x2) - -inst_3547: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb007fff; valaddr_reg:x3; val_offset:10641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10641*FLEN/8, x4, x1, x2) - -inst_3548: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb00ffff; valaddr_reg:x3; val_offset:10644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10644*FLEN/8, x4, x1, x2) - -inst_3549: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb01ffff; valaddr_reg:x3; val_offset:10647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10647*FLEN/8, x4, x1, x2) - -inst_3550: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb03ffff; valaddr_reg:x3; val_offset:10650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10650*FLEN/8, x4, x1, x2) - -inst_3551: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb07ffff; valaddr_reg:x3; val_offset:10653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10653*FLEN/8, x4, x1, x2) - -inst_3552: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb0fffff; valaddr_reg:x3; val_offset:10656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10656*FLEN/8, x4, x1, x2) - -inst_3553: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb1fffff; valaddr_reg:x3; val_offset:10659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10659*FLEN/8, x4, x1, x2) - -inst_3554: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb3fffff; valaddr_reg:x3; val_offset:10662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10662*FLEN/8, x4, x1, x2) - -inst_3555: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb400000; valaddr_reg:x3; val_offset:10665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10665*FLEN/8, x4, x1, x2) - -inst_3556: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb600000; valaddr_reg:x3; val_offset:10668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10668*FLEN/8, x4, x1, x2) - -inst_3557: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb700000; valaddr_reg:x3; val_offset:10671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10671*FLEN/8, x4, x1, x2) - -inst_3558: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb780000; valaddr_reg:x3; val_offset:10674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10674*FLEN/8, x4, x1, x2) - -inst_3559: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7c0000; valaddr_reg:x3; val_offset:10677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10677*FLEN/8, x4, x1, x2) - -inst_3560: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7e0000; valaddr_reg:x3; val_offset:10680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10680*FLEN/8, x4, x1, x2) - -inst_3561: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7f0000; valaddr_reg:x3; val_offset:10683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10683*FLEN/8, x4, x1, x2) - -inst_3562: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7f8000; valaddr_reg:x3; val_offset:10686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10686*FLEN/8, x4, x1, x2) - -inst_3563: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7fc000; valaddr_reg:x3; val_offset:10689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10689*FLEN/8, x4, x1, x2) - -inst_3564: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7fe000; valaddr_reg:x3; val_offset:10692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10692*FLEN/8, x4, x1, x2) - -inst_3565: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7ff000; valaddr_reg:x3; val_offset:10695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10695*FLEN/8, x4, x1, x2) - -inst_3566: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7ff800; valaddr_reg:x3; val_offset:10698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10698*FLEN/8, x4, x1, x2) - -inst_3567: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7ffc00; valaddr_reg:x3; val_offset:10701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10701*FLEN/8, x4, x1, x2) - -inst_3568: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7ffe00; valaddr_reg:x3; val_offset:10704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10704*FLEN/8, x4, x1, x2) - -inst_3569: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7fff00; valaddr_reg:x3; val_offset:10707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10707*FLEN/8, x4, x1, x2) - -inst_3570: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7fff80; valaddr_reg:x3; val_offset:10710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10710*FLEN/8, x4, x1, x2) - -inst_3571: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7fffc0; valaddr_reg:x3; val_offset:10713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10713*FLEN/8, x4, x1, x2) - -inst_3572: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7fffe0; valaddr_reg:x3; val_offset:10716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10716*FLEN/8, x4, x1, x2) - -inst_3573: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7ffff0; valaddr_reg:x3; val_offset:10719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10719*FLEN/8, x4, x1, x2) - -inst_3574: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7ffff8; valaddr_reg:x3; val_offset:10722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10722*FLEN/8, x4, x1, x2) - -inst_3575: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7ffffc; valaddr_reg:x3; val_offset:10725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10725*FLEN/8, x4, x1, x2) - -inst_3576: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7ffffe; valaddr_reg:x3; val_offset:10728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10728*FLEN/8, x4, x1, x2) - -inst_3577: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; -op3val:0xb7fffff; valaddr_reg:x3; val_offset:10731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10731*FLEN/8, x4, x1, x2) - -inst_3578: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:10734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10734*FLEN/8, x4, x1, x2) - -inst_3579: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:10737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10737*FLEN/8, x4, x1, x2) - -inst_3580: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:10740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10740*FLEN/8, x4, x1, x2) - -inst_3581: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:10743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10743*FLEN/8, x4, x1, x2) - -inst_3582: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:10746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10746*FLEN/8, x4, x1, x2) - -inst_3583: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:10749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10749*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_29) - -inst_3584: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:10752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10752*FLEN/8, x4, x1, x2) - -inst_3585: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:10755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10755*FLEN/8, x4, x1, x2) - -inst_3586: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:10758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10758*FLEN/8, x4, x1, x2) - -inst_3587: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:10761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10761*FLEN/8, x4, x1, x2) - -inst_3588: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:10764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10764*FLEN/8, x4, x1, x2) - -inst_3589: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:10767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10767*FLEN/8, x4, x1, x2) - -inst_3590: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:10770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10770*FLEN/8, x4, x1, x2) - -inst_3591: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:10773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10773*FLEN/8, x4, x1, x2) - -inst_3592: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:10776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10776*FLEN/8, x4, x1, x2) - -inst_3593: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:10779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10779*FLEN/8, x4, x1, x2) - -inst_3594: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf800000; valaddr_reg:x3; val_offset:10782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10782*FLEN/8, x4, x1, x2) - -inst_3595: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf800001; valaddr_reg:x3; val_offset:10785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10785*FLEN/8, x4, x1, x2) - -inst_3596: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf800003; valaddr_reg:x3; val_offset:10788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10788*FLEN/8, x4, x1, x2) - -inst_3597: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf800007; valaddr_reg:x3; val_offset:10791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10791*FLEN/8, x4, x1, x2) - -inst_3598: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf80000f; valaddr_reg:x3; val_offset:10794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10794*FLEN/8, x4, x1, x2) - -inst_3599: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf80001f; valaddr_reg:x3; val_offset:10797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10797*FLEN/8, x4, x1, x2) - -inst_3600: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf80003f; valaddr_reg:x3; val_offset:10800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10800*FLEN/8, x4, x1, x2) - -inst_3601: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf80007f; valaddr_reg:x3; val_offset:10803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10803*FLEN/8, x4, x1, x2) - -inst_3602: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf8000ff; valaddr_reg:x3; val_offset:10806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10806*FLEN/8, x4, x1, x2) - -inst_3603: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf8001ff; valaddr_reg:x3; val_offset:10809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10809*FLEN/8, x4, x1, x2) - -inst_3604: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf8003ff; valaddr_reg:x3; val_offset:10812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10812*FLEN/8, x4, x1, x2) - -inst_3605: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf8007ff; valaddr_reg:x3; val_offset:10815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10815*FLEN/8, x4, x1, x2) - -inst_3606: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf800fff; valaddr_reg:x3; val_offset:10818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10818*FLEN/8, x4, x1, x2) - -inst_3607: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf801fff; valaddr_reg:x3; val_offset:10821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10821*FLEN/8, x4, x1, x2) - -inst_3608: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf803fff; valaddr_reg:x3; val_offset:10824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10824*FLEN/8, x4, x1, x2) - -inst_3609: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf807fff; valaddr_reg:x3; val_offset:10827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10827*FLEN/8, x4, x1, x2) - -inst_3610: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf80ffff; valaddr_reg:x3; val_offset:10830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10830*FLEN/8, x4, x1, x2) - -inst_3611: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf81ffff; valaddr_reg:x3; val_offset:10833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10833*FLEN/8, x4, x1, x2) - -inst_3612: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf83ffff; valaddr_reg:x3; val_offset:10836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10836*FLEN/8, x4, x1, x2) - -inst_3613: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf87ffff; valaddr_reg:x3; val_offset:10839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10839*FLEN/8, x4, x1, x2) - -inst_3614: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf8fffff; valaddr_reg:x3; val_offset:10842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10842*FLEN/8, x4, x1, x2) - -inst_3615: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xf9fffff; valaddr_reg:x3; val_offset:10845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10845*FLEN/8, x4, x1, x2) - -inst_3616: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfbfffff; valaddr_reg:x3; val_offset:10848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10848*FLEN/8, x4, x1, x2) - -inst_3617: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfc00000; valaddr_reg:x3; val_offset:10851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10851*FLEN/8, x4, x1, x2) - -inst_3618: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfe00000; valaddr_reg:x3; val_offset:10854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10854*FLEN/8, x4, x1, x2) - -inst_3619: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xff00000; valaddr_reg:x3; val_offset:10857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10857*FLEN/8, x4, x1, x2) - -inst_3620: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xff80000; valaddr_reg:x3; val_offset:10860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10860*FLEN/8, x4, x1, x2) - -inst_3621: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffc0000; valaddr_reg:x3; val_offset:10863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10863*FLEN/8, x4, x1, x2) - -inst_3622: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffe0000; valaddr_reg:x3; val_offset:10866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10866*FLEN/8, x4, x1, x2) - -inst_3623: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfff0000; valaddr_reg:x3; val_offset:10869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10869*FLEN/8, x4, x1, x2) - -inst_3624: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfff8000; valaddr_reg:x3; val_offset:10872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10872*FLEN/8, x4, x1, x2) - -inst_3625: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfffc000; valaddr_reg:x3; val_offset:10875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10875*FLEN/8, x4, x1, x2) - -inst_3626: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfffe000; valaddr_reg:x3; val_offset:10878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10878*FLEN/8, x4, x1, x2) - -inst_3627: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffff000; valaddr_reg:x3; val_offset:10881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10881*FLEN/8, x4, x1, x2) - -inst_3628: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffff800; valaddr_reg:x3; val_offset:10884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10884*FLEN/8, x4, x1, x2) - -inst_3629: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffffc00; valaddr_reg:x3; val_offset:10887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10887*FLEN/8, x4, x1, x2) - -inst_3630: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffffe00; valaddr_reg:x3; val_offset:10890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10890*FLEN/8, x4, x1, x2) - -inst_3631: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfffff00; valaddr_reg:x3; val_offset:10893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10893*FLEN/8, x4, x1, x2) - -inst_3632: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfffff80; valaddr_reg:x3; val_offset:10896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10896*FLEN/8, x4, x1, x2) - -inst_3633: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfffffc0; valaddr_reg:x3; val_offset:10899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10899*FLEN/8, x4, x1, x2) - -inst_3634: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfffffe0; valaddr_reg:x3; val_offset:10902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10902*FLEN/8, x4, x1, x2) - -inst_3635: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffffff0; valaddr_reg:x3; val_offset:10905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10905*FLEN/8, x4, x1, x2) - -inst_3636: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffffff8; valaddr_reg:x3; val_offset:10908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10908*FLEN/8, x4, x1, x2) - -inst_3637: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffffffc; valaddr_reg:x3; val_offset:10911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10911*FLEN/8, x4, x1, x2) - -inst_3638: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xffffffe; valaddr_reg:x3; val_offset:10914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10914*FLEN/8, x4, x1, x2) - -inst_3639: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; -op3val:0xfffffff; valaddr_reg:x3; val_offset:10917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10917*FLEN/8, x4, x1, x2) - -inst_3640: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:10920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10920*FLEN/8, x4, x1, x2) - -inst_3641: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:10923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10923*FLEN/8, x4, x1, x2) - -inst_3642: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:10926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10926*FLEN/8, x4, x1, x2) - -inst_3643: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:10929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10929*FLEN/8, x4, x1, x2) - -inst_3644: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:10932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10932*FLEN/8, x4, x1, x2) - -inst_3645: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:10935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10935*FLEN/8, x4, x1, x2) - -inst_3646: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:10938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10938*FLEN/8, x4, x1, x2) - -inst_3647: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:10941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10941*FLEN/8, x4, x1, x2) - -inst_3648: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:10944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10944*FLEN/8, x4, x1, x2) - -inst_3649: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:10947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10947*FLEN/8, x4, x1, x2) - -inst_3650: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:10950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10950*FLEN/8, x4, x1, x2) - -inst_3651: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:10953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10953*FLEN/8, x4, x1, x2) - -inst_3652: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:10956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10956*FLEN/8, x4, x1, x2) - -inst_3653: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:10959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10959*FLEN/8, x4, x1, x2) - -inst_3654: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:10962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10962*FLEN/8, x4, x1, x2) - -inst_3655: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:10965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10965*FLEN/8, x4, x1, x2) - -inst_3656: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81000000; valaddr_reg:x3; val_offset:10968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10968*FLEN/8, x4, x1, x2) - -inst_3657: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81000001; valaddr_reg:x3; val_offset:10971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10971*FLEN/8, x4, x1, x2) - -inst_3658: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81000003; valaddr_reg:x3; val_offset:10974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10974*FLEN/8, x4, x1, x2) - -inst_3659: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81000007; valaddr_reg:x3; val_offset:10977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10977*FLEN/8, x4, x1, x2) - -inst_3660: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8100000f; valaddr_reg:x3; val_offset:10980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10980*FLEN/8, x4, x1, x2) - -inst_3661: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8100001f; valaddr_reg:x3; val_offset:10983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10983*FLEN/8, x4, x1, x2) - -inst_3662: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8100003f; valaddr_reg:x3; val_offset:10986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10986*FLEN/8, x4, x1, x2) - -inst_3663: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8100007f; valaddr_reg:x3; val_offset:10989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10989*FLEN/8, x4, x1, x2) - -inst_3664: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x810000ff; valaddr_reg:x3; val_offset:10992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10992*FLEN/8, x4, x1, x2) - -inst_3665: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x810001ff; valaddr_reg:x3; val_offset:10995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10995*FLEN/8, x4, x1, x2) - -inst_3666: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x810003ff; valaddr_reg:x3; val_offset:10998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10998*FLEN/8, x4, x1, x2) - -inst_3667: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x810007ff; valaddr_reg:x3; val_offset:11001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11001*FLEN/8, x4, x1, x2) - -inst_3668: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81000fff; valaddr_reg:x3; val_offset:11004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11004*FLEN/8, x4, x1, x2) - -inst_3669: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81001fff; valaddr_reg:x3; val_offset:11007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11007*FLEN/8, x4, x1, x2) - -inst_3670: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81003fff; valaddr_reg:x3; val_offset:11010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11010*FLEN/8, x4, x1, x2) - -inst_3671: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81007fff; valaddr_reg:x3; val_offset:11013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11013*FLEN/8, x4, x1, x2) - -inst_3672: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8100ffff; valaddr_reg:x3; val_offset:11016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11016*FLEN/8, x4, x1, x2) - -inst_3673: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8101ffff; valaddr_reg:x3; val_offset:11019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11019*FLEN/8, x4, x1, x2) - -inst_3674: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8103ffff; valaddr_reg:x3; val_offset:11022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11022*FLEN/8, x4, x1, x2) - -inst_3675: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x8107ffff; valaddr_reg:x3; val_offset:11025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11025*FLEN/8, x4, x1, x2) - -inst_3676: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x810fffff; valaddr_reg:x3; val_offset:11028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11028*FLEN/8, x4, x1, x2) - -inst_3677: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x811fffff; valaddr_reg:x3; val_offset:11031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11031*FLEN/8, x4, x1, x2) - -inst_3678: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x813fffff; valaddr_reg:x3; val_offset:11034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11034*FLEN/8, x4, x1, x2) - -inst_3679: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81400000; valaddr_reg:x3; val_offset:11037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11037*FLEN/8, x4, x1, x2) - -inst_3680: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81600000; valaddr_reg:x3; val_offset:11040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11040*FLEN/8, x4, x1, x2) - -inst_3681: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81700000; valaddr_reg:x3; val_offset:11043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11043*FLEN/8, x4, x1, x2) - -inst_3682: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x81780000; valaddr_reg:x3; val_offset:11046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11046*FLEN/8, x4, x1, x2) - -inst_3683: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817c0000; valaddr_reg:x3; val_offset:11049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11049*FLEN/8, x4, x1, x2) - -inst_3684: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817e0000; valaddr_reg:x3; val_offset:11052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11052*FLEN/8, x4, x1, x2) - -inst_3685: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817f0000; valaddr_reg:x3; val_offset:11055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11055*FLEN/8, x4, x1, x2) - -inst_3686: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817f8000; valaddr_reg:x3; val_offset:11058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11058*FLEN/8, x4, x1, x2) - -inst_3687: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817fc000; valaddr_reg:x3; val_offset:11061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11061*FLEN/8, x4, x1, x2) - -inst_3688: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817fe000; valaddr_reg:x3; val_offset:11064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11064*FLEN/8, x4, x1, x2) - -inst_3689: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817ff000; valaddr_reg:x3; val_offset:11067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11067*FLEN/8, x4, x1, x2) - -inst_3690: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817ff800; valaddr_reg:x3; val_offset:11070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11070*FLEN/8, x4, x1, x2) - -inst_3691: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817ffc00; valaddr_reg:x3; val_offset:11073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11073*FLEN/8, x4, x1, x2) - -inst_3692: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817ffe00; valaddr_reg:x3; val_offset:11076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11076*FLEN/8, x4, x1, x2) - -inst_3693: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817fff00; valaddr_reg:x3; val_offset:11079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11079*FLEN/8, x4, x1, x2) - -inst_3694: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817fff80; valaddr_reg:x3; val_offset:11082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11082*FLEN/8, x4, x1, x2) - -inst_3695: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817fffc0; valaddr_reg:x3; val_offset:11085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11085*FLEN/8, x4, x1, x2) - -inst_3696: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817fffe0; valaddr_reg:x3; val_offset:11088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11088*FLEN/8, x4, x1, x2) - -inst_3697: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817ffff0; valaddr_reg:x3; val_offset:11091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11091*FLEN/8, x4, x1, x2) - -inst_3698: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817ffff8; valaddr_reg:x3; val_offset:11094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11094*FLEN/8, x4, x1, x2) - -inst_3699: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817ffffc; valaddr_reg:x3; val_offset:11097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11097*FLEN/8, x4, x1, x2) - -inst_3700: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817ffffe; valaddr_reg:x3; val_offset:11100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11100*FLEN/8, x4, x1, x2) - -inst_3701: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; -op3val:0x817fffff; valaddr_reg:x3; val_offset:11103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11103*FLEN/8, x4, x1, x2) - -inst_3702: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36800000; valaddr_reg:x3; val_offset:11106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11106*FLEN/8, x4, x1, x2) - -inst_3703: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36800001; valaddr_reg:x3; val_offset:11109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11109*FLEN/8, x4, x1, x2) - -inst_3704: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36800003; valaddr_reg:x3; val_offset:11112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11112*FLEN/8, x4, x1, x2) - -inst_3705: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36800007; valaddr_reg:x3; val_offset:11115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11115*FLEN/8, x4, x1, x2) - -inst_3706: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3680000f; valaddr_reg:x3; val_offset:11118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11118*FLEN/8, x4, x1, x2) - -inst_3707: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3680001f; valaddr_reg:x3; val_offset:11121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11121*FLEN/8, x4, x1, x2) - -inst_3708: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3680003f; valaddr_reg:x3; val_offset:11124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11124*FLEN/8, x4, x1, x2) - -inst_3709: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3680007f; valaddr_reg:x3; val_offset:11127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11127*FLEN/8, x4, x1, x2) - -inst_3710: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x368000ff; valaddr_reg:x3; val_offset:11130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11130*FLEN/8, x4, x1, x2) - -inst_3711: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x368001ff; valaddr_reg:x3; val_offset:11133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11133*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_30) - -inst_3712: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x368003ff; valaddr_reg:x3; val_offset:11136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11136*FLEN/8, x4, x1, x2) - -inst_3713: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x368007ff; valaddr_reg:x3; val_offset:11139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11139*FLEN/8, x4, x1, x2) - -inst_3714: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36800fff; valaddr_reg:x3; val_offset:11142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11142*FLEN/8, x4, x1, x2) - -inst_3715: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36801fff; valaddr_reg:x3; val_offset:11145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11145*FLEN/8, x4, x1, x2) - -inst_3716: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36803fff; valaddr_reg:x3; val_offset:11148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11148*FLEN/8, x4, x1, x2) - -inst_3717: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36807fff; valaddr_reg:x3; val_offset:11151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11151*FLEN/8, x4, x1, x2) - -inst_3718: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3680ffff; valaddr_reg:x3; val_offset:11154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11154*FLEN/8, x4, x1, x2) - -inst_3719: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3681ffff; valaddr_reg:x3; val_offset:11157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11157*FLEN/8, x4, x1, x2) - -inst_3720: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3683ffff; valaddr_reg:x3; val_offset:11160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11160*FLEN/8, x4, x1, x2) - -inst_3721: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3687ffff; valaddr_reg:x3; val_offset:11163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11163*FLEN/8, x4, x1, x2) - -inst_3722: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x368fffff; valaddr_reg:x3; val_offset:11166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11166*FLEN/8, x4, x1, x2) - -inst_3723: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x369fffff; valaddr_reg:x3; val_offset:11169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11169*FLEN/8, x4, x1, x2) - -inst_3724: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36bfffff; valaddr_reg:x3; val_offset:11172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11172*FLEN/8, x4, x1, x2) - -inst_3725: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36c00000; valaddr_reg:x3; val_offset:11175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11175*FLEN/8, x4, x1, x2) - -inst_3726: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36e00000; valaddr_reg:x3; val_offset:11178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11178*FLEN/8, x4, x1, x2) - -inst_3727: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36f00000; valaddr_reg:x3; val_offset:11181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11181*FLEN/8, x4, x1, x2) - -inst_3728: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36f80000; valaddr_reg:x3; val_offset:11184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11184*FLEN/8, x4, x1, x2) - -inst_3729: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fc0000; valaddr_reg:x3; val_offset:11187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11187*FLEN/8, x4, x1, x2) - -inst_3730: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fe0000; valaddr_reg:x3; val_offset:11190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11190*FLEN/8, x4, x1, x2) - -inst_3731: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ff0000; valaddr_reg:x3; val_offset:11193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11193*FLEN/8, x4, x1, x2) - -inst_3732: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ff8000; valaddr_reg:x3; val_offset:11196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11196*FLEN/8, x4, x1, x2) - -inst_3733: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ffc000; valaddr_reg:x3; val_offset:11199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11199*FLEN/8, x4, x1, x2) - -inst_3734: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ffe000; valaddr_reg:x3; val_offset:11202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11202*FLEN/8, x4, x1, x2) - -inst_3735: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fff000; valaddr_reg:x3; val_offset:11205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11205*FLEN/8, x4, x1, x2) - -inst_3736: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fff800; valaddr_reg:x3; val_offset:11208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11208*FLEN/8, x4, x1, x2) - -inst_3737: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fffc00; valaddr_reg:x3; val_offset:11211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11211*FLEN/8, x4, x1, x2) - -inst_3738: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fffe00; valaddr_reg:x3; val_offset:11214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11214*FLEN/8, x4, x1, x2) - -inst_3739: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ffff00; valaddr_reg:x3; val_offset:11217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11217*FLEN/8, x4, x1, x2) - -inst_3740: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ffff80; valaddr_reg:x3; val_offset:11220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11220*FLEN/8, x4, x1, x2) - -inst_3741: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ffffc0; valaddr_reg:x3; val_offset:11223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11223*FLEN/8, x4, x1, x2) - -inst_3742: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ffffe0; valaddr_reg:x3; val_offset:11226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11226*FLEN/8, x4, x1, x2) - -inst_3743: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fffff0; valaddr_reg:x3; val_offset:11229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11229*FLEN/8, x4, x1, x2) - -inst_3744: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fffff8; valaddr_reg:x3; val_offset:11232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11232*FLEN/8, x4, x1, x2) - -inst_3745: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fffffc; valaddr_reg:x3; val_offset:11235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11235*FLEN/8, x4, x1, x2) - -inst_3746: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36fffffe; valaddr_reg:x3; val_offset:11238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11238*FLEN/8, x4, x1, x2) - -inst_3747: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x36ffffff; valaddr_reg:x3; val_offset:11241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11241*FLEN/8, x4, x1, x2) - -inst_3748: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3f800001; valaddr_reg:x3; val_offset:11244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11244*FLEN/8, x4, x1, x2) - -inst_3749: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3f800003; valaddr_reg:x3; val_offset:11247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11247*FLEN/8, x4, x1, x2) - -inst_3750: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3f800007; valaddr_reg:x3; val_offset:11250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11250*FLEN/8, x4, x1, x2) - -inst_3751: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3f999999; valaddr_reg:x3; val_offset:11253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11253*FLEN/8, x4, x1, x2) - -inst_3752: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:11256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11256*FLEN/8, x4, x1, x2) - -inst_3753: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:11259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11259*FLEN/8, x4, x1, x2) - -inst_3754: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:11262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11262*FLEN/8, x4, x1, x2) - -inst_3755: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:11265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11265*FLEN/8, x4, x1, x2) - -inst_3756: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:11268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11268*FLEN/8, x4, x1, x2) - -inst_3757: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:11271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11271*FLEN/8, x4, x1, x2) - -inst_3758: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:11274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11274*FLEN/8, x4, x1, x2) - -inst_3759: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:11277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11277*FLEN/8, x4, x1, x2) - -inst_3760: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:11280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11280*FLEN/8, x4, x1, x2) - -inst_3761: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:11283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11283*FLEN/8, x4, x1, x2) - -inst_3762: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:11286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11286*FLEN/8, x4, x1, x2) - -inst_3763: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:11289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11289*FLEN/8, x4, x1, x2) - -inst_3764: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80000000; valaddr_reg:x3; val_offset:11292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11292*FLEN/8, x4, x1, x2) - -inst_3765: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:11295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11295*FLEN/8, x4, x1, x2) - -inst_3766: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:11298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11298*FLEN/8, x4, x1, x2) - -inst_3767: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:11301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11301*FLEN/8, x4, x1, x2) - -inst_3768: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8000000f; valaddr_reg:x3; val_offset:11304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11304*FLEN/8, x4, x1, x2) - -inst_3769: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8000001f; valaddr_reg:x3; val_offset:11307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11307*FLEN/8, x4, x1, x2) - -inst_3770: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8000003f; valaddr_reg:x3; val_offset:11310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11310*FLEN/8, x4, x1, x2) - -inst_3771: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8000007f; valaddr_reg:x3; val_offset:11313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11313*FLEN/8, x4, x1, x2) - -inst_3772: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x800000ff; valaddr_reg:x3; val_offset:11316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11316*FLEN/8, x4, x1, x2) - -inst_3773: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x800001ff; valaddr_reg:x3; val_offset:11319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11319*FLEN/8, x4, x1, x2) - -inst_3774: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x800003ff; valaddr_reg:x3; val_offset:11322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11322*FLEN/8, x4, x1, x2) - -inst_3775: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x800007ff; valaddr_reg:x3; val_offset:11325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11325*FLEN/8, x4, x1, x2) - -inst_3776: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80000fff; valaddr_reg:x3; val_offset:11328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11328*FLEN/8, x4, x1, x2) - -inst_3777: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80001fff; valaddr_reg:x3; val_offset:11331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11331*FLEN/8, x4, x1, x2) - -inst_3778: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80003fff; valaddr_reg:x3; val_offset:11334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11334*FLEN/8, x4, x1, x2) - -inst_3779: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80007fff; valaddr_reg:x3; val_offset:11337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11337*FLEN/8, x4, x1, x2) - -inst_3780: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8000ffff; valaddr_reg:x3; val_offset:11340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11340*FLEN/8, x4, x1, x2) - -inst_3781: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8001ffff; valaddr_reg:x3; val_offset:11343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11343*FLEN/8, x4, x1, x2) - -inst_3782: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8003ffff; valaddr_reg:x3; val_offset:11346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11346*FLEN/8, x4, x1, x2) - -inst_3783: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8007ffff; valaddr_reg:x3; val_offset:11349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11349*FLEN/8, x4, x1, x2) - -inst_3784: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x800fffff; valaddr_reg:x3; val_offset:11352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11352*FLEN/8, x4, x1, x2) - -inst_3785: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:11355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11355*FLEN/8, x4, x1, x2) - -inst_3786: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x801fffff; valaddr_reg:x3; val_offset:11358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11358*FLEN/8, x4, x1, x2) - -inst_3787: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:11361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11361*FLEN/8, x4, x1, x2) - -inst_3788: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:11364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11364*FLEN/8, x4, x1, x2) - -inst_3789: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:11367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11367*FLEN/8, x4, x1, x2) - -inst_3790: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:11370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11370*FLEN/8, x4, x1, x2) - -inst_3791: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x803fffff; valaddr_reg:x3; val_offset:11373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11373*FLEN/8, x4, x1, x2) - -inst_3792: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80400000; valaddr_reg:x3; val_offset:11376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11376*FLEN/8, x4, x1, x2) - -inst_3793: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:11379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11379*FLEN/8, x4, x1, x2) - -inst_3794: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:11382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11382*FLEN/8, x4, x1, x2) - -inst_3795: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:11385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11385*FLEN/8, x4, x1, x2) - -inst_3796: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80600000; valaddr_reg:x3; val_offset:11388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11388*FLEN/8, x4, x1, x2) - -inst_3797: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:11391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11391*FLEN/8, x4, x1, x2) - -inst_3798: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:11394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11394*FLEN/8, x4, x1, x2) - -inst_3799: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80700000; valaddr_reg:x3; val_offset:11397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11397*FLEN/8, x4, x1, x2) - -inst_3800: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x80780000; valaddr_reg:x3; val_offset:11400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11400*FLEN/8, x4, x1, x2) - -inst_3801: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807c0000; valaddr_reg:x3; val_offset:11403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11403*FLEN/8, x4, x1, x2) - -inst_3802: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807e0000; valaddr_reg:x3; val_offset:11406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11406*FLEN/8, x4, x1, x2) - -inst_3803: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807f0000; valaddr_reg:x3; val_offset:11409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11409*FLEN/8, x4, x1, x2) - -inst_3804: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807f8000; valaddr_reg:x3; val_offset:11412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11412*FLEN/8, x4, x1, x2) - -inst_3805: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807fc000; valaddr_reg:x3; val_offset:11415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11415*FLEN/8, x4, x1, x2) - -inst_3806: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807fe000; valaddr_reg:x3; val_offset:11418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11418*FLEN/8, x4, x1, x2) - -inst_3807: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807ff000; valaddr_reg:x3; val_offset:11421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11421*FLEN/8, x4, x1, x2) - -inst_3808: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807ff800; valaddr_reg:x3; val_offset:11424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11424*FLEN/8, x4, x1, x2) - -inst_3809: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807ffc00; valaddr_reg:x3; val_offset:11427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11427*FLEN/8, x4, x1, x2) - -inst_3810: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807ffe00; valaddr_reg:x3; val_offset:11430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11430*FLEN/8, x4, x1, x2) - -inst_3811: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807fff00; valaddr_reg:x3; val_offset:11433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11433*FLEN/8, x4, x1, x2) - -inst_3812: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807fff80; valaddr_reg:x3; val_offset:11436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11436*FLEN/8, x4, x1, x2) - -inst_3813: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807fffc0; valaddr_reg:x3; val_offset:11439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11439*FLEN/8, x4, x1, x2) - -inst_3814: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807fffe0; valaddr_reg:x3; val_offset:11442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11442*FLEN/8, x4, x1, x2) - -inst_3815: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807ffff0; valaddr_reg:x3; val_offset:11445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11445*FLEN/8, x4, x1, x2) - -inst_3816: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:11448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11448*FLEN/8, x4, x1, x2) - -inst_3817: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:11451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11451*FLEN/8, x4, x1, x2) - -inst_3818: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:11454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11454*FLEN/8, x4, x1, x2) - -inst_3819: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; -op3val:0x807fffff; valaddr_reg:x3; val_offset:11457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11457*FLEN/8, x4, x1, x2) - -inst_3820: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:11460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11460*FLEN/8, x4, x1, x2) - -inst_3821: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:11463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11463*FLEN/8, x4, x1, x2) - -inst_3822: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:11466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11466*FLEN/8, x4, x1, x2) - -inst_3823: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:11469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11469*FLEN/8, x4, x1, x2) - -inst_3824: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:11472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11472*FLEN/8, x4, x1, x2) - -inst_3825: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:11475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11475*FLEN/8, x4, x1, x2) - -inst_3826: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:11478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11478*FLEN/8, x4, x1, x2) - -inst_3827: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:11481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11481*FLEN/8, x4, x1, x2) - -inst_3828: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:11484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11484*FLEN/8, x4, x1, x2) - -inst_3829: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:11487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11487*FLEN/8, x4, x1, x2) - -inst_3830: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:11490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11490*FLEN/8, x4, x1, x2) - -inst_3831: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:11493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11493*FLEN/8, x4, x1, x2) - -inst_3832: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:11496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11496*FLEN/8, x4, x1, x2) - -inst_3833: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:11499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11499*FLEN/8, x4, x1, x2) - -inst_3834: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:11502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11502*FLEN/8, x4, x1, x2) - -inst_3835: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:11505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11505*FLEN/8, x4, x1, x2) - -inst_3836: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89800000; valaddr_reg:x3; val_offset:11508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11508*FLEN/8, x4, x1, x2) - -inst_3837: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89800001; valaddr_reg:x3; val_offset:11511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11511*FLEN/8, x4, x1, x2) - -inst_3838: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89800003; valaddr_reg:x3; val_offset:11514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11514*FLEN/8, x4, x1, x2) - -inst_3839: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89800007; valaddr_reg:x3; val_offset:11517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11517*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_31) - -inst_3840: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x8980000f; valaddr_reg:x3; val_offset:11520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11520*FLEN/8, x4, x1, x2) - -inst_3841: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x8980001f; valaddr_reg:x3; val_offset:11523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11523*FLEN/8, x4, x1, x2) - -inst_3842: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x8980003f; valaddr_reg:x3; val_offset:11526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11526*FLEN/8, x4, x1, x2) - -inst_3843: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x8980007f; valaddr_reg:x3; val_offset:11529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11529*FLEN/8, x4, x1, x2) - -inst_3844: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x898000ff; valaddr_reg:x3; val_offset:11532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11532*FLEN/8, x4, x1, x2) - -inst_3845: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x898001ff; valaddr_reg:x3; val_offset:11535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11535*FLEN/8, x4, x1, x2) - -inst_3846: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x898003ff; valaddr_reg:x3; val_offset:11538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11538*FLEN/8, x4, x1, x2) - -inst_3847: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x898007ff; valaddr_reg:x3; val_offset:11541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11541*FLEN/8, x4, x1, x2) - -inst_3848: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89800fff; valaddr_reg:x3; val_offset:11544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11544*FLEN/8, x4, x1, x2) - -inst_3849: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89801fff; valaddr_reg:x3; val_offset:11547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11547*FLEN/8, x4, x1, x2) - -inst_3850: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89803fff; valaddr_reg:x3; val_offset:11550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11550*FLEN/8, x4, x1, x2) - -inst_3851: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89807fff; valaddr_reg:x3; val_offset:11553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11553*FLEN/8, x4, x1, x2) - -inst_3852: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x8980ffff; valaddr_reg:x3; val_offset:11556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11556*FLEN/8, x4, x1, x2) - -inst_3853: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x8981ffff; valaddr_reg:x3; val_offset:11559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11559*FLEN/8, x4, x1, x2) - -inst_3854: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x8983ffff; valaddr_reg:x3; val_offset:11562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11562*FLEN/8, x4, x1, x2) - -inst_3855: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x8987ffff; valaddr_reg:x3; val_offset:11565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11565*FLEN/8, x4, x1, x2) - -inst_3856: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x898fffff; valaddr_reg:x3; val_offset:11568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11568*FLEN/8, x4, x1, x2) - -inst_3857: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x899fffff; valaddr_reg:x3; val_offset:11571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11571*FLEN/8, x4, x1, x2) - -inst_3858: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89bfffff; valaddr_reg:x3; val_offset:11574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11574*FLEN/8, x4, x1, x2) - -inst_3859: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89c00000; valaddr_reg:x3; val_offset:11577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11577*FLEN/8, x4, x1, x2) - -inst_3860: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89e00000; valaddr_reg:x3; val_offset:11580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11580*FLEN/8, x4, x1, x2) - -inst_3861: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89f00000; valaddr_reg:x3; val_offset:11583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11583*FLEN/8, x4, x1, x2) - -inst_3862: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89f80000; valaddr_reg:x3; val_offset:11586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11586*FLEN/8, x4, x1, x2) - -inst_3863: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fc0000; valaddr_reg:x3; val_offset:11589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11589*FLEN/8, x4, x1, x2) - -inst_3864: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fe0000; valaddr_reg:x3; val_offset:11592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11592*FLEN/8, x4, x1, x2) - -inst_3865: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ff0000; valaddr_reg:x3; val_offset:11595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11595*FLEN/8, x4, x1, x2) - -inst_3866: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ff8000; valaddr_reg:x3; val_offset:11598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11598*FLEN/8, x4, x1, x2) - -inst_3867: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ffc000; valaddr_reg:x3; val_offset:11601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11601*FLEN/8, x4, x1, x2) - -inst_3868: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ffe000; valaddr_reg:x3; val_offset:11604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11604*FLEN/8, x4, x1, x2) - -inst_3869: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fff000; valaddr_reg:x3; val_offset:11607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11607*FLEN/8, x4, x1, x2) - -inst_3870: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fff800; valaddr_reg:x3; val_offset:11610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11610*FLEN/8, x4, x1, x2) - -inst_3871: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fffc00; valaddr_reg:x3; val_offset:11613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11613*FLEN/8, x4, x1, x2) - -inst_3872: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fffe00; valaddr_reg:x3; val_offset:11616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11616*FLEN/8, x4, x1, x2) - -inst_3873: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ffff00; valaddr_reg:x3; val_offset:11619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11619*FLEN/8, x4, x1, x2) - -inst_3874: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ffff80; valaddr_reg:x3; val_offset:11622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11622*FLEN/8, x4, x1, x2) - -inst_3875: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ffffc0; valaddr_reg:x3; val_offset:11625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11625*FLEN/8, x4, x1, x2) - -inst_3876: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ffffe0; valaddr_reg:x3; val_offset:11628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11628*FLEN/8, x4, x1, x2) - -inst_3877: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fffff0; valaddr_reg:x3; val_offset:11631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11631*FLEN/8, x4, x1, x2) - -inst_3878: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fffff8; valaddr_reg:x3; val_offset:11634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11634*FLEN/8, x4, x1, x2) - -inst_3879: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fffffc; valaddr_reg:x3; val_offset:11637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11637*FLEN/8, x4, x1, x2) - -inst_3880: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89fffffe; valaddr_reg:x3; val_offset:11640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11640*FLEN/8, x4, x1, x2) - -inst_3881: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; -op3val:0x89ffffff; valaddr_reg:x3; val_offset:11643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11643*FLEN/8, x4, x1, x2) - -inst_3882: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbf800001; valaddr_reg:x3; val_offset:11646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11646*FLEN/8, x4, x1, x2) - -inst_3883: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbf800003; valaddr_reg:x3; val_offset:11649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11649*FLEN/8, x4, x1, x2) - -inst_3884: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbf800007; valaddr_reg:x3; val_offset:11652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11652*FLEN/8, x4, x1, x2) - -inst_3885: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbf999999; valaddr_reg:x3; val_offset:11655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11655*FLEN/8, x4, x1, x2) - -inst_3886: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:11658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11658*FLEN/8, x4, x1, x2) - -inst_3887: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:11661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11661*FLEN/8, x4, x1, x2) - -inst_3888: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:11664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11664*FLEN/8, x4, x1, x2) - -inst_3889: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:11667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11667*FLEN/8, x4, x1, x2) - -inst_3890: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:11670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11670*FLEN/8, x4, x1, x2) - -inst_3891: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:11673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11673*FLEN/8, x4, x1, x2) - -inst_3892: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:11676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11676*FLEN/8, x4, x1, x2) - -inst_3893: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:11679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11679*FLEN/8, x4, x1, x2) - -inst_3894: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:11682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11682*FLEN/8, x4, x1, x2) - -inst_3895: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:11685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11685*FLEN/8, x4, x1, x2) - -inst_3896: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:11688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11688*FLEN/8, x4, x1, x2) - -inst_3897: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:11691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11691*FLEN/8, x4, x1, x2) - -inst_3898: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce800000; valaddr_reg:x3; val_offset:11694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11694*FLEN/8, x4, x1, x2) - -inst_3899: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce800001; valaddr_reg:x3; val_offset:11697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11697*FLEN/8, x4, x1, x2) - -inst_3900: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce800003; valaddr_reg:x3; val_offset:11700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11700*FLEN/8, x4, x1, x2) - -inst_3901: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce800007; valaddr_reg:x3; val_offset:11703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11703*FLEN/8, x4, x1, x2) - -inst_3902: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce80000f; valaddr_reg:x3; val_offset:11706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11706*FLEN/8, x4, x1, x2) - -inst_3903: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce80001f; valaddr_reg:x3; val_offset:11709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11709*FLEN/8, x4, x1, x2) - -inst_3904: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce80003f; valaddr_reg:x3; val_offset:11712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11712*FLEN/8, x4, x1, x2) - -inst_3905: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce80007f; valaddr_reg:x3; val_offset:11715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11715*FLEN/8, x4, x1, x2) - -inst_3906: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce8000ff; valaddr_reg:x3; val_offset:11718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11718*FLEN/8, x4, x1, x2) - -inst_3907: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce8001ff; valaddr_reg:x3; val_offset:11721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11721*FLEN/8, x4, x1, x2) - -inst_3908: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce8003ff; valaddr_reg:x3; val_offset:11724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11724*FLEN/8, x4, x1, x2) - -inst_3909: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce8007ff; valaddr_reg:x3; val_offset:11727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11727*FLEN/8, x4, x1, x2) - -inst_3910: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce800fff; valaddr_reg:x3; val_offset:11730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11730*FLEN/8, x4, x1, x2) - -inst_3911: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce801fff; valaddr_reg:x3; val_offset:11733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11733*FLEN/8, x4, x1, x2) - -inst_3912: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce803fff; valaddr_reg:x3; val_offset:11736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11736*FLEN/8, x4, x1, x2) - -inst_3913: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce807fff; valaddr_reg:x3; val_offset:11739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11739*FLEN/8, x4, x1, x2) - -inst_3914: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce80ffff; valaddr_reg:x3; val_offset:11742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11742*FLEN/8, x4, x1, x2) - -inst_3915: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce81ffff; valaddr_reg:x3; val_offset:11745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11745*FLEN/8, x4, x1, x2) - -inst_3916: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce83ffff; valaddr_reg:x3; val_offset:11748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11748*FLEN/8, x4, x1, x2) - -inst_3917: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce87ffff; valaddr_reg:x3; val_offset:11751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11751*FLEN/8, x4, x1, x2) - -inst_3918: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce8fffff; valaddr_reg:x3; val_offset:11754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11754*FLEN/8, x4, x1, x2) - -inst_3919: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xce9fffff; valaddr_reg:x3; val_offset:11757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11757*FLEN/8, x4, x1, x2) - -inst_3920: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcebfffff; valaddr_reg:x3; val_offset:11760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11760*FLEN/8, x4, x1, x2) - -inst_3921: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcec00000; valaddr_reg:x3; val_offset:11763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11763*FLEN/8, x4, x1, x2) - -inst_3922: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcee00000; valaddr_reg:x3; val_offset:11766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11766*FLEN/8, x4, x1, x2) - -inst_3923: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcef00000; valaddr_reg:x3; val_offset:11769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11769*FLEN/8, x4, x1, x2) - -inst_3924: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcef80000; valaddr_reg:x3; val_offset:11772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11772*FLEN/8, x4, x1, x2) - -inst_3925: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefc0000; valaddr_reg:x3; val_offset:11775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11775*FLEN/8, x4, x1, x2) - -inst_3926: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefe0000; valaddr_reg:x3; val_offset:11778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11778*FLEN/8, x4, x1, x2) - -inst_3927: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceff0000; valaddr_reg:x3; val_offset:11781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11781*FLEN/8, x4, x1, x2) - -inst_3928: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceff8000; valaddr_reg:x3; val_offset:11784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11784*FLEN/8, x4, x1, x2) - -inst_3929: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceffc000; valaddr_reg:x3; val_offset:11787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11787*FLEN/8, x4, x1, x2) - -inst_3930: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceffe000; valaddr_reg:x3; val_offset:11790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11790*FLEN/8, x4, x1, x2) - -inst_3931: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefff000; valaddr_reg:x3; val_offset:11793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11793*FLEN/8, x4, x1, x2) - -inst_3932: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefff800; valaddr_reg:x3; val_offset:11796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11796*FLEN/8, x4, x1, x2) - -inst_3933: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefffc00; valaddr_reg:x3; val_offset:11799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11799*FLEN/8, x4, x1, x2) - -inst_3934: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefffe00; valaddr_reg:x3; val_offset:11802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11802*FLEN/8, x4, x1, x2) - -inst_3935: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceffff00; valaddr_reg:x3; val_offset:11805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11805*FLEN/8, x4, x1, x2) - -inst_3936: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceffff80; valaddr_reg:x3; val_offset:11808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11808*FLEN/8, x4, x1, x2) - -inst_3937: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceffffc0; valaddr_reg:x3; val_offset:11811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11811*FLEN/8, x4, x1, x2) - -inst_3938: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceffffe0; valaddr_reg:x3; val_offset:11814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11814*FLEN/8, x4, x1, x2) - -inst_3939: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefffff0; valaddr_reg:x3; val_offset:11817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11817*FLEN/8, x4, x1, x2) - -inst_3940: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefffff8; valaddr_reg:x3; val_offset:11820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11820*FLEN/8, x4, x1, x2) - -inst_3941: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefffffc; valaddr_reg:x3; val_offset:11823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11823*FLEN/8, x4, x1, x2) - -inst_3942: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xcefffffe; valaddr_reg:x3; val_offset:11826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11826*FLEN/8, x4, x1, x2) - -inst_3943: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; -op3val:0xceffffff; valaddr_reg:x3; val_offset:11829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11829*FLEN/8, x4, x1, x2) - -inst_3944: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:11832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11832*FLEN/8, x4, x1, x2) - -inst_3945: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:11835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11835*FLEN/8, x4, x1, x2) - -inst_3946: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:11838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11838*FLEN/8, x4, x1, x2) - -inst_3947: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:11841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11841*FLEN/8, x4, x1, x2) - -inst_3948: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:11844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11844*FLEN/8, x4, x1, x2) - -inst_3949: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:11847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11847*FLEN/8, x4, x1, x2) - -inst_3950: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:11850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11850*FLEN/8, x4, x1, x2) - -inst_3951: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:11853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11853*FLEN/8, x4, x1, x2) - -inst_3952: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:11856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11856*FLEN/8, x4, x1, x2) - -inst_3953: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:11859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11859*FLEN/8, x4, x1, x2) - -inst_3954: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:11862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11862*FLEN/8, x4, x1, x2) - -inst_3955: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:11865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11865*FLEN/8, x4, x1, x2) - -inst_3956: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:11868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11868*FLEN/8, x4, x1, x2) - -inst_3957: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:11871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11871*FLEN/8, x4, x1, x2) - -inst_3958: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:11874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11874*FLEN/8, x4, x1, x2) - -inst_3959: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:11877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11877*FLEN/8, x4, x1, x2) - -inst_3960: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5800000; valaddr_reg:x3; val_offset:11880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11880*FLEN/8, x4, x1, x2) - -inst_3961: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5800001; valaddr_reg:x3; val_offset:11883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11883*FLEN/8, x4, x1, x2) - -inst_3962: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5800003; valaddr_reg:x3; val_offset:11886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11886*FLEN/8, x4, x1, x2) - -inst_3963: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5800007; valaddr_reg:x3; val_offset:11889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11889*FLEN/8, x4, x1, x2) - -inst_3964: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x580000f; valaddr_reg:x3; val_offset:11892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11892*FLEN/8, x4, x1, x2) - -inst_3965: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x580001f; valaddr_reg:x3; val_offset:11895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11895*FLEN/8, x4, x1, x2) - -inst_3966: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x580003f; valaddr_reg:x3; val_offset:11898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11898*FLEN/8, x4, x1, x2) - -inst_3967: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x580007f; valaddr_reg:x3; val_offset:11901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11901*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_32) - -inst_3968: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x58000ff; valaddr_reg:x3; val_offset:11904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11904*FLEN/8, x4, x1, x2) - -inst_3969: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x58001ff; valaddr_reg:x3; val_offset:11907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11907*FLEN/8, x4, x1, x2) - -inst_3970: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x58003ff; valaddr_reg:x3; val_offset:11910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11910*FLEN/8, x4, x1, x2) - -inst_3971: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x58007ff; valaddr_reg:x3; val_offset:11913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11913*FLEN/8, x4, x1, x2) - -inst_3972: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5800fff; valaddr_reg:x3; val_offset:11916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11916*FLEN/8, x4, x1, x2) - -inst_3973: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5801fff; valaddr_reg:x3; val_offset:11919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11919*FLEN/8, x4, x1, x2) - -inst_3974: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5803fff; valaddr_reg:x3; val_offset:11922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11922*FLEN/8, x4, x1, x2) - -inst_3975: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5807fff; valaddr_reg:x3; val_offset:11925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11925*FLEN/8, x4, x1, x2) - -inst_3976: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x580ffff; valaddr_reg:x3; val_offset:11928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11928*FLEN/8, x4, x1, x2) - -inst_3977: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x581ffff; valaddr_reg:x3; val_offset:11931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11931*FLEN/8, x4, x1, x2) - -inst_3978: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x583ffff; valaddr_reg:x3; val_offset:11934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11934*FLEN/8, x4, x1, x2) - -inst_3979: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x587ffff; valaddr_reg:x3; val_offset:11937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11937*FLEN/8, x4, x1, x2) - -inst_3980: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x58fffff; valaddr_reg:x3; val_offset:11940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11940*FLEN/8, x4, x1, x2) - -inst_3981: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x59fffff; valaddr_reg:x3; val_offset:11943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11943*FLEN/8, x4, x1, x2) - -inst_3982: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5bfffff; valaddr_reg:x3; val_offset:11946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11946*FLEN/8, x4, x1, x2) - -inst_3983: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5c00000; valaddr_reg:x3; val_offset:11949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11949*FLEN/8, x4, x1, x2) - -inst_3984: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5e00000; valaddr_reg:x3; val_offset:11952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11952*FLEN/8, x4, x1, x2) - -inst_3985: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5f00000; valaddr_reg:x3; val_offset:11955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11955*FLEN/8, x4, x1, x2) - -inst_3986: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5f80000; valaddr_reg:x3; val_offset:11958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11958*FLEN/8, x4, x1, x2) - -inst_3987: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fc0000; valaddr_reg:x3; val_offset:11961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11961*FLEN/8, x4, x1, x2) - -inst_3988: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fe0000; valaddr_reg:x3; val_offset:11964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11964*FLEN/8, x4, x1, x2) - -inst_3989: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ff0000; valaddr_reg:x3; val_offset:11967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11967*FLEN/8, x4, x1, x2) - -inst_3990: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ff8000; valaddr_reg:x3; val_offset:11970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11970*FLEN/8, x4, x1, x2) - -inst_3991: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ffc000; valaddr_reg:x3; val_offset:11973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11973*FLEN/8, x4, x1, x2) - -inst_3992: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ffe000; valaddr_reg:x3; val_offset:11976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11976*FLEN/8, x4, x1, x2) - -inst_3993: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fff000; valaddr_reg:x3; val_offset:11979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11979*FLEN/8, x4, x1, x2) - -inst_3994: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fff800; valaddr_reg:x3; val_offset:11982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11982*FLEN/8, x4, x1, x2) - -inst_3995: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fffc00; valaddr_reg:x3; val_offset:11985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11985*FLEN/8, x4, x1, x2) - -inst_3996: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fffe00; valaddr_reg:x3; val_offset:11988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11988*FLEN/8, x4, x1, x2) - -inst_3997: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ffff00; valaddr_reg:x3; val_offset:11991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11991*FLEN/8, x4, x1, x2) - -inst_3998: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ffff80; valaddr_reg:x3; val_offset:11994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11994*FLEN/8, x4, x1, x2) - -inst_3999: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ffffc0; valaddr_reg:x3; val_offset:11997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11997*FLEN/8, x4, x1, x2) - -inst_4000: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ffffe0; valaddr_reg:x3; val_offset:12000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12000*FLEN/8, x4, x1, x2) - -inst_4001: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fffff0; valaddr_reg:x3; val_offset:12003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12003*FLEN/8, x4, x1, x2) - -inst_4002: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fffff8; valaddr_reg:x3; val_offset:12006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12006*FLEN/8, x4, x1, x2) - -inst_4003: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fffffc; valaddr_reg:x3; val_offset:12009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12009*FLEN/8, x4, x1, x2) - -inst_4004: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5fffffe; valaddr_reg:x3; val_offset:12012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12012*FLEN/8, x4, x1, x2) - -inst_4005: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; -op3val:0x5ffffff; valaddr_reg:x3; val_offset:12015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12015*FLEN/8, x4, x1, x2) - -inst_4006: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:12018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12018*FLEN/8, x4, x1, x2) - -inst_4007: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:12021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12021*FLEN/8, x4, x1, x2) - -inst_4008: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:12024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12024*FLEN/8, x4, x1, x2) - -inst_4009: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:12027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12027*FLEN/8, x4, x1, x2) - -inst_4010: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:12030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12030*FLEN/8, x4, x1, x2) - -inst_4011: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:12033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12033*FLEN/8, x4, x1, x2) - -inst_4012: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:12036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12036*FLEN/8, x4, x1, x2) - -inst_4013: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:12039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12039*FLEN/8, x4, x1, x2) - -inst_4014: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:12042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12042*FLEN/8, x4, x1, x2) - -inst_4015: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:12045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12045*FLEN/8, x4, x1, x2) - -inst_4016: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:12048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12048*FLEN/8, x4, x1, x2) - -inst_4017: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:12051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12051*FLEN/8, x4, x1, x2) - -inst_4018: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:12054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12054*FLEN/8, x4, x1, x2) - -inst_4019: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:12057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12057*FLEN/8, x4, x1, x2) - -inst_4020: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:12060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12060*FLEN/8, x4, x1, x2) - -inst_4021: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:12063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12063*FLEN/8, x4, x1, x2) - -inst_4022: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91800000; valaddr_reg:x3; val_offset:12066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12066*FLEN/8, x4, x1, x2) - -inst_4023: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91800001; valaddr_reg:x3; val_offset:12069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12069*FLEN/8, x4, x1, x2) - -inst_4024: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91800003; valaddr_reg:x3; val_offset:12072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12072*FLEN/8, x4, x1, x2) - -inst_4025: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91800007; valaddr_reg:x3; val_offset:12075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12075*FLEN/8, x4, x1, x2) - -inst_4026: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x9180000f; valaddr_reg:x3; val_offset:12078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12078*FLEN/8, x4, x1, x2) - -inst_4027: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x9180001f; valaddr_reg:x3; val_offset:12081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12081*FLEN/8, x4, x1, x2) - -inst_4028: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x9180003f; valaddr_reg:x3; val_offset:12084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12084*FLEN/8, x4, x1, x2) - -inst_4029: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x9180007f; valaddr_reg:x3; val_offset:12087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12087*FLEN/8, x4, x1, x2) - -inst_4030: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x918000ff; valaddr_reg:x3; val_offset:12090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12090*FLEN/8, x4, x1, x2) - -inst_4031: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x918001ff; valaddr_reg:x3; val_offset:12093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12093*FLEN/8, x4, x1, x2) - -inst_4032: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x918003ff; valaddr_reg:x3; val_offset:12096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12096*FLEN/8, x4, x1, x2) - -inst_4033: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x918007ff; valaddr_reg:x3; val_offset:12099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12099*FLEN/8, x4, x1, x2) - -inst_4034: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91800fff; valaddr_reg:x3; val_offset:12102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12102*FLEN/8, x4, x1, x2) - -inst_4035: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91801fff; valaddr_reg:x3; val_offset:12105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12105*FLEN/8, x4, x1, x2) - -inst_4036: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91803fff; valaddr_reg:x3; val_offset:12108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12108*FLEN/8, x4, x1, x2) - -inst_4037: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91807fff; valaddr_reg:x3; val_offset:12111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12111*FLEN/8, x4, x1, x2) - -inst_4038: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x9180ffff; valaddr_reg:x3; val_offset:12114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12114*FLEN/8, x4, x1, x2) - -inst_4039: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x9181ffff; valaddr_reg:x3; val_offset:12117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12117*FLEN/8, x4, x1, x2) - -inst_4040: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x9183ffff; valaddr_reg:x3; val_offset:12120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12120*FLEN/8, x4, x1, x2) - -inst_4041: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x9187ffff; valaddr_reg:x3; val_offset:12123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12123*FLEN/8, x4, x1, x2) - -inst_4042: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x918fffff; valaddr_reg:x3; val_offset:12126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12126*FLEN/8, x4, x1, x2) - -inst_4043: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x919fffff; valaddr_reg:x3; val_offset:12129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12129*FLEN/8, x4, x1, x2) - -inst_4044: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91bfffff; valaddr_reg:x3; val_offset:12132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12132*FLEN/8, x4, x1, x2) - -inst_4045: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91c00000; valaddr_reg:x3; val_offset:12135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12135*FLEN/8, x4, x1, x2) - -inst_4046: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91e00000; valaddr_reg:x3; val_offset:12138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12138*FLEN/8, x4, x1, x2) - -inst_4047: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91f00000; valaddr_reg:x3; val_offset:12141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12141*FLEN/8, x4, x1, x2) - -inst_4048: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91f80000; valaddr_reg:x3; val_offset:12144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12144*FLEN/8, x4, x1, x2) - -inst_4049: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fc0000; valaddr_reg:x3; val_offset:12147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12147*FLEN/8, x4, x1, x2) - -inst_4050: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fe0000; valaddr_reg:x3; val_offset:12150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12150*FLEN/8, x4, x1, x2) - -inst_4051: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ff0000; valaddr_reg:x3; val_offset:12153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12153*FLEN/8, x4, x1, x2) - -inst_4052: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ff8000; valaddr_reg:x3; val_offset:12156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12156*FLEN/8, x4, x1, x2) - -inst_4053: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ffc000; valaddr_reg:x3; val_offset:12159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12159*FLEN/8, x4, x1, x2) - -inst_4054: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ffe000; valaddr_reg:x3; val_offset:12162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12162*FLEN/8, x4, x1, x2) - -inst_4055: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fff000; valaddr_reg:x3; val_offset:12165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12165*FLEN/8, x4, x1, x2) - -inst_4056: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fff800; valaddr_reg:x3; val_offset:12168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12168*FLEN/8, x4, x1, x2) - -inst_4057: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fffc00; valaddr_reg:x3; val_offset:12171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12171*FLEN/8, x4, x1, x2) - -inst_4058: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fffe00; valaddr_reg:x3; val_offset:12174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12174*FLEN/8, x4, x1, x2) - -inst_4059: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ffff00; valaddr_reg:x3; val_offset:12177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12177*FLEN/8, x4, x1, x2) - -inst_4060: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ffff80; valaddr_reg:x3; val_offset:12180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12180*FLEN/8, x4, x1, x2) - -inst_4061: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ffffc0; valaddr_reg:x3; val_offset:12183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12183*FLEN/8, x4, x1, x2) - -inst_4062: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ffffe0; valaddr_reg:x3; val_offset:12186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12186*FLEN/8, x4, x1, x2) - -inst_4063: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fffff0; valaddr_reg:x3; val_offset:12189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12189*FLEN/8, x4, x1, x2) - -inst_4064: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fffff8; valaddr_reg:x3; val_offset:12192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12192*FLEN/8, x4, x1, x2) - -inst_4065: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fffffc; valaddr_reg:x3; val_offset:12195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12195*FLEN/8, x4, x1, x2) - -inst_4066: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91fffffe; valaddr_reg:x3; val_offset:12198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12198*FLEN/8, x4, x1, x2) - -inst_4067: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; -op3val:0x91ffffff; valaddr_reg:x3; val_offset:12201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12201*FLEN/8, x4, x1, x2) - -inst_4068: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:12204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12204*FLEN/8, x4, x1, x2) - -inst_4069: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:12207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12207*FLEN/8, x4, x1, x2) - -inst_4070: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:12210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12210*FLEN/8, x4, x1, x2) - -inst_4071: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:12213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12213*FLEN/8, x4, x1, x2) - -inst_4072: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:12216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12216*FLEN/8, x4, x1, x2) - -inst_4073: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:12219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12219*FLEN/8, x4, x1, x2) - -inst_4074: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:12222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12222*FLEN/8, x4, x1, x2) - -inst_4075: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:12225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12225*FLEN/8, x4, x1, x2) - -inst_4076: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:12228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12228*FLEN/8, x4, x1, x2) - -inst_4077: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:12231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12231*FLEN/8, x4, x1, x2) - -inst_4078: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:12234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12234*FLEN/8, x4, x1, x2) - -inst_4079: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:12237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12237*FLEN/8, x4, x1, x2) - -inst_4080: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:12240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12240*FLEN/8, x4, x1, x2) - -inst_4081: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:12243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12243*FLEN/8, x4, x1, x2) - -inst_4082: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:12246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12246*FLEN/8, x4, x1, x2) - -inst_4083: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:12249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12249*FLEN/8, x4, x1, x2) - -inst_4084: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9000000; valaddr_reg:x3; val_offset:12252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12252*FLEN/8, x4, x1, x2) - -inst_4085: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9000001; valaddr_reg:x3; val_offset:12255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12255*FLEN/8, x4, x1, x2) - -inst_4086: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9000003; valaddr_reg:x3; val_offset:12258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12258*FLEN/8, x4, x1, x2) - -inst_4087: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9000007; valaddr_reg:x3; val_offset:12261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12261*FLEN/8, x4, x1, x2) - -inst_4088: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x900000f; valaddr_reg:x3; val_offset:12264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12264*FLEN/8, x4, x1, x2) - -inst_4089: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x900001f; valaddr_reg:x3; val_offset:12267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12267*FLEN/8, x4, x1, x2) - -inst_4090: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x900003f; valaddr_reg:x3; val_offset:12270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12270*FLEN/8, x4, x1, x2) - -inst_4091: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x900007f; valaddr_reg:x3; val_offset:12273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12273*FLEN/8, x4, x1, x2) - -inst_4092: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x90000ff; valaddr_reg:x3; val_offset:12276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12276*FLEN/8, x4, x1, x2) - -inst_4093: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x90001ff; valaddr_reg:x3; val_offset:12279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12279*FLEN/8, x4, x1, x2) - -inst_4094: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x90003ff; valaddr_reg:x3; val_offset:12282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12282*FLEN/8, x4, x1, x2) - -inst_4095: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x90007ff; valaddr_reg:x3; val_offset:12285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12285*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_33) - -inst_4096: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9000fff; valaddr_reg:x3; val_offset:12288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12288*FLEN/8, x4, x1, x2) - -inst_4097: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9001fff; valaddr_reg:x3; val_offset:12291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12291*FLEN/8, x4, x1, x2) - -inst_4098: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9003fff; valaddr_reg:x3; val_offset:12294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12294*FLEN/8, x4, x1, x2) - -inst_4099: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9007fff; valaddr_reg:x3; val_offset:12297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12297*FLEN/8, x4, x1, x2) - -inst_4100: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x900ffff; valaddr_reg:x3; val_offset:12300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12300*FLEN/8, x4, x1, x2) - -inst_4101: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x901ffff; valaddr_reg:x3; val_offset:12303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12303*FLEN/8, x4, x1, x2) - -inst_4102: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x903ffff; valaddr_reg:x3; val_offset:12306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12306*FLEN/8, x4, x1, x2) - -inst_4103: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x907ffff; valaddr_reg:x3; val_offset:12309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12309*FLEN/8, x4, x1, x2) - -inst_4104: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x90fffff; valaddr_reg:x3; val_offset:12312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12312*FLEN/8, x4, x1, x2) - -inst_4105: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x91fffff; valaddr_reg:x3; val_offset:12315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12315*FLEN/8, x4, x1, x2) - -inst_4106: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x93fffff; valaddr_reg:x3; val_offset:12318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12318*FLEN/8, x4, x1, x2) - -inst_4107: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9400000; valaddr_reg:x3; val_offset:12321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12321*FLEN/8, x4, x1, x2) - -inst_4108: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9600000; valaddr_reg:x3; val_offset:12324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12324*FLEN/8, x4, x1, x2) - -inst_4109: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9700000; valaddr_reg:x3; val_offset:12327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12327*FLEN/8, x4, x1, x2) - -inst_4110: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x9780000; valaddr_reg:x3; val_offset:12330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12330*FLEN/8, x4, x1, x2) - -inst_4111: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97c0000; valaddr_reg:x3; val_offset:12333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12333*FLEN/8, x4, x1, x2) - -inst_4112: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97e0000; valaddr_reg:x3; val_offset:12336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12336*FLEN/8, x4, x1, x2) - -inst_4113: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97f0000; valaddr_reg:x3; val_offset:12339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12339*FLEN/8, x4, x1, x2) - -inst_4114: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97f8000; valaddr_reg:x3; val_offset:12342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12342*FLEN/8, x4, x1, x2) - -inst_4115: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97fc000; valaddr_reg:x3; val_offset:12345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12345*FLEN/8, x4, x1, x2) - -inst_4116: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97fe000; valaddr_reg:x3; val_offset:12348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12348*FLEN/8, x4, x1, x2) - -inst_4117: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97ff000; valaddr_reg:x3; val_offset:12351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12351*FLEN/8, x4, x1, x2) - -inst_4118: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97ff800; valaddr_reg:x3; val_offset:12354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12354*FLEN/8, x4, x1, x2) - -inst_4119: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97ffc00; valaddr_reg:x3; val_offset:12357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12357*FLEN/8, x4, x1, x2) - -inst_4120: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97ffe00; valaddr_reg:x3; val_offset:12360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12360*FLEN/8, x4, x1, x2) - -inst_4121: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97fff00; valaddr_reg:x3; val_offset:12363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12363*FLEN/8, x4, x1, x2) - -inst_4122: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97fff80; valaddr_reg:x3; val_offset:12366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12366*FLEN/8, x4, x1, x2) - -inst_4123: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97fffc0; valaddr_reg:x3; val_offset:12369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12369*FLEN/8, x4, x1, x2) - -inst_4124: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97fffe0; valaddr_reg:x3; val_offset:12372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12372*FLEN/8, x4, x1, x2) - -inst_4125: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97ffff0; valaddr_reg:x3; val_offset:12375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12375*FLEN/8, x4, x1, x2) - -inst_4126: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97ffff8; valaddr_reg:x3; val_offset:12378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12378*FLEN/8, x4, x1, x2) - -inst_4127: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97ffffc; valaddr_reg:x3; val_offset:12381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12381*FLEN/8, x4, x1, x2) - -inst_4128: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97ffffe; valaddr_reg:x3; val_offset:12384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12384*FLEN/8, x4, x1, x2) - -inst_4129: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; -op3val:0x97fffff; valaddr_reg:x3; val_offset:12387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12387*FLEN/8, x4, x1, x2) - -inst_4130: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:12390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12390*FLEN/8, x4, x1, x2) - -inst_4131: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:12393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12393*FLEN/8, x4, x1, x2) - -inst_4132: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:12396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12396*FLEN/8, x4, x1, x2) - -inst_4133: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:12399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12399*FLEN/8, x4, x1, x2) - -inst_4134: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:12402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12402*FLEN/8, x4, x1, x2) - -inst_4135: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:12405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12405*FLEN/8, x4, x1, x2) - -inst_4136: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:12408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12408*FLEN/8, x4, x1, x2) - -inst_4137: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:12411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12411*FLEN/8, x4, x1, x2) - -inst_4138: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:12414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12414*FLEN/8, x4, x1, x2) - -inst_4139: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:12417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12417*FLEN/8, x4, x1, x2) - -inst_4140: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:12420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12420*FLEN/8, x4, x1, x2) - -inst_4141: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:12423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12423*FLEN/8, x4, x1, x2) - -inst_4142: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:12426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12426*FLEN/8, x4, x1, x2) - -inst_4143: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:12429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12429*FLEN/8, x4, x1, x2) - -inst_4144: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:12432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12432*FLEN/8, x4, x1, x2) - -inst_4145: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:12435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12435*FLEN/8, x4, x1, x2) - -inst_4146: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90000000; valaddr_reg:x3; val_offset:12438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12438*FLEN/8, x4, x1, x2) - -inst_4147: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90000001; valaddr_reg:x3; val_offset:12441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12441*FLEN/8, x4, x1, x2) - -inst_4148: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90000003; valaddr_reg:x3; val_offset:12444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12444*FLEN/8, x4, x1, x2) - -inst_4149: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90000007; valaddr_reg:x3; val_offset:12447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12447*FLEN/8, x4, x1, x2) - -inst_4150: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x9000000f; valaddr_reg:x3; val_offset:12450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12450*FLEN/8, x4, x1, x2) - -inst_4151: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x9000001f; valaddr_reg:x3; val_offset:12453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12453*FLEN/8, x4, x1, x2) - -inst_4152: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x9000003f; valaddr_reg:x3; val_offset:12456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12456*FLEN/8, x4, x1, x2) - -inst_4153: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x9000007f; valaddr_reg:x3; val_offset:12459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12459*FLEN/8, x4, x1, x2) - -inst_4154: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x900000ff; valaddr_reg:x3; val_offset:12462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12462*FLEN/8, x4, x1, x2) - -inst_4155: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x900001ff; valaddr_reg:x3; val_offset:12465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12465*FLEN/8, x4, x1, x2) - -inst_4156: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x900003ff; valaddr_reg:x3; val_offset:12468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12468*FLEN/8, x4, x1, x2) - -inst_4157: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x900007ff; valaddr_reg:x3; val_offset:12471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12471*FLEN/8, x4, x1, x2) - -inst_4158: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90000fff; valaddr_reg:x3; val_offset:12474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12474*FLEN/8, x4, x1, x2) - -inst_4159: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90001fff; valaddr_reg:x3; val_offset:12477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12477*FLEN/8, x4, x1, x2) - -inst_4160: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90003fff; valaddr_reg:x3; val_offset:12480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12480*FLEN/8, x4, x1, x2) - -inst_4161: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90007fff; valaddr_reg:x3; val_offset:12483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12483*FLEN/8, x4, x1, x2) - -inst_4162: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x9000ffff; valaddr_reg:x3; val_offset:12486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12486*FLEN/8, x4, x1, x2) - -inst_4163: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x9001ffff; valaddr_reg:x3; val_offset:12489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12489*FLEN/8, x4, x1, x2) - -inst_4164: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x9003ffff; valaddr_reg:x3; val_offset:12492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12492*FLEN/8, x4, x1, x2) - -inst_4165: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x9007ffff; valaddr_reg:x3; val_offset:12495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12495*FLEN/8, x4, x1, x2) - -inst_4166: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x900fffff; valaddr_reg:x3; val_offset:12498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12498*FLEN/8, x4, x1, x2) - -inst_4167: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x901fffff; valaddr_reg:x3; val_offset:12501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12501*FLEN/8, x4, x1, x2) - -inst_4168: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x903fffff; valaddr_reg:x3; val_offset:12504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12504*FLEN/8, x4, x1, x2) - -inst_4169: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90400000; valaddr_reg:x3; val_offset:12507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12507*FLEN/8, x4, x1, x2) - -inst_4170: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90600000; valaddr_reg:x3; val_offset:12510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12510*FLEN/8, x4, x1, x2) - -inst_4171: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90700000; valaddr_reg:x3; val_offset:12513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12513*FLEN/8, x4, x1, x2) - -inst_4172: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x90780000; valaddr_reg:x3; val_offset:12516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12516*FLEN/8, x4, x1, x2) - -inst_4173: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907c0000; valaddr_reg:x3; val_offset:12519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12519*FLEN/8, x4, x1, x2) - -inst_4174: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907e0000; valaddr_reg:x3; val_offset:12522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12522*FLEN/8, x4, x1, x2) - -inst_4175: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907f0000; valaddr_reg:x3; val_offset:12525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12525*FLEN/8, x4, x1, x2) - -inst_4176: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907f8000; valaddr_reg:x3; val_offset:12528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12528*FLEN/8, x4, x1, x2) - -inst_4177: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907fc000; valaddr_reg:x3; val_offset:12531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12531*FLEN/8, x4, x1, x2) - -inst_4178: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907fe000; valaddr_reg:x3; val_offset:12534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12534*FLEN/8, x4, x1, x2) - -inst_4179: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907ff000; valaddr_reg:x3; val_offset:12537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12537*FLEN/8, x4, x1, x2) - -inst_4180: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907ff800; valaddr_reg:x3; val_offset:12540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12540*FLEN/8, x4, x1, x2) - -inst_4181: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907ffc00; valaddr_reg:x3; val_offset:12543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12543*FLEN/8, x4, x1, x2) - -inst_4182: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907ffe00; valaddr_reg:x3; val_offset:12546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12546*FLEN/8, x4, x1, x2) - -inst_4183: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907fff00; valaddr_reg:x3; val_offset:12549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12549*FLEN/8, x4, x1, x2) - -inst_4184: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907fff80; valaddr_reg:x3; val_offset:12552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12552*FLEN/8, x4, x1, x2) - -inst_4185: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907fffc0; valaddr_reg:x3; val_offset:12555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12555*FLEN/8, x4, x1, x2) - -inst_4186: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907fffe0; valaddr_reg:x3; val_offset:12558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12558*FLEN/8, x4, x1, x2) - -inst_4187: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907ffff0; valaddr_reg:x3; val_offset:12561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12561*FLEN/8, x4, x1, x2) - -inst_4188: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907ffff8; valaddr_reg:x3; val_offset:12564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12564*FLEN/8, x4, x1, x2) - -inst_4189: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907ffffc; valaddr_reg:x3; val_offset:12567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12567*FLEN/8, x4, x1, x2) - -inst_4190: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907ffffe; valaddr_reg:x3; val_offset:12570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12570*FLEN/8, x4, x1, x2) - -inst_4191: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; -op3val:0x907fffff; valaddr_reg:x3; val_offset:12573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12573*FLEN/8, x4, x1, x2) - -inst_4192: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:12576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12576*FLEN/8, x4, x1, x2) - -inst_4193: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:12579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12579*FLEN/8, x4, x1, x2) - -inst_4194: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:12582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12582*FLEN/8, x4, x1, x2) - -inst_4195: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:12585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12585*FLEN/8, x4, x1, x2) - -inst_4196: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:12588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12588*FLEN/8, x4, x1, x2) - -inst_4197: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:12591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12591*FLEN/8, x4, x1, x2) - -inst_4198: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:12594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12594*FLEN/8, x4, x1, x2) - -inst_4199: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:12597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12597*FLEN/8, x4, x1, x2) - -inst_4200: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:12600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12600*FLEN/8, x4, x1, x2) - -inst_4201: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:12603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12603*FLEN/8, x4, x1, x2) - -inst_4202: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:12606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12606*FLEN/8, x4, x1, x2) - -inst_4203: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:12609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12609*FLEN/8, x4, x1, x2) - -inst_4204: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:12612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12612*FLEN/8, x4, x1, x2) - -inst_4205: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:12615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12615*FLEN/8, x4, x1, x2) - -inst_4206: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:12618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12618*FLEN/8, x4, x1, x2) - -inst_4207: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:12621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12621*FLEN/8, x4, x1, x2) - -inst_4208: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6800000; valaddr_reg:x3; val_offset:12624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12624*FLEN/8, x4, x1, x2) - -inst_4209: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6800001; valaddr_reg:x3; val_offset:12627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12627*FLEN/8, x4, x1, x2) - -inst_4210: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6800003; valaddr_reg:x3; val_offset:12630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12630*FLEN/8, x4, x1, x2) - -inst_4211: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6800007; valaddr_reg:x3; val_offset:12633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12633*FLEN/8, x4, x1, x2) - -inst_4212: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x680000f; valaddr_reg:x3; val_offset:12636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12636*FLEN/8, x4, x1, x2) - -inst_4213: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x680001f; valaddr_reg:x3; val_offset:12639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12639*FLEN/8, x4, x1, x2) - -inst_4214: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x680003f; valaddr_reg:x3; val_offset:12642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12642*FLEN/8, x4, x1, x2) - -inst_4215: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x680007f; valaddr_reg:x3; val_offset:12645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12645*FLEN/8, x4, x1, x2) - -inst_4216: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x68000ff; valaddr_reg:x3; val_offset:12648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12648*FLEN/8, x4, x1, x2) - -inst_4217: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x68001ff; valaddr_reg:x3; val_offset:12651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12651*FLEN/8, x4, x1, x2) - -inst_4218: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x68003ff; valaddr_reg:x3; val_offset:12654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12654*FLEN/8, x4, x1, x2) - -inst_4219: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x68007ff; valaddr_reg:x3; val_offset:12657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12657*FLEN/8, x4, x1, x2) - -inst_4220: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6800fff; valaddr_reg:x3; val_offset:12660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12660*FLEN/8, x4, x1, x2) - -inst_4221: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6801fff; valaddr_reg:x3; val_offset:12663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12663*FLEN/8, x4, x1, x2) - -inst_4222: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6803fff; valaddr_reg:x3; val_offset:12666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12666*FLEN/8, x4, x1, x2) - -inst_4223: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6807fff; valaddr_reg:x3; val_offset:12669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12669*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_34) - -inst_4224: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x680ffff; valaddr_reg:x3; val_offset:12672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12672*FLEN/8, x4, x1, x2) - -inst_4225: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x681ffff; valaddr_reg:x3; val_offset:12675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12675*FLEN/8, x4, x1, x2) - -inst_4226: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x683ffff; valaddr_reg:x3; val_offset:12678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12678*FLEN/8, x4, x1, x2) - -inst_4227: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x687ffff; valaddr_reg:x3; val_offset:12681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12681*FLEN/8, x4, x1, x2) - -inst_4228: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x68fffff; valaddr_reg:x3; val_offset:12684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12684*FLEN/8, x4, x1, x2) - -inst_4229: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x69fffff; valaddr_reg:x3; val_offset:12687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12687*FLEN/8, x4, x1, x2) - -inst_4230: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6bfffff; valaddr_reg:x3; val_offset:12690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12690*FLEN/8, x4, x1, x2) - -inst_4231: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6c00000; valaddr_reg:x3; val_offset:12693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12693*FLEN/8, x4, x1, x2) - -inst_4232: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6e00000; valaddr_reg:x3; val_offset:12696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12696*FLEN/8, x4, x1, x2) - -inst_4233: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6f00000; valaddr_reg:x3; val_offset:12699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12699*FLEN/8, x4, x1, x2) - -inst_4234: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6f80000; valaddr_reg:x3; val_offset:12702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12702*FLEN/8, x4, x1, x2) - -inst_4235: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fc0000; valaddr_reg:x3; val_offset:12705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12705*FLEN/8, x4, x1, x2) - -inst_4236: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fe0000; valaddr_reg:x3; val_offset:12708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12708*FLEN/8, x4, x1, x2) - -inst_4237: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ff0000; valaddr_reg:x3; val_offset:12711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12711*FLEN/8, x4, x1, x2) - -inst_4238: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ff8000; valaddr_reg:x3; val_offset:12714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12714*FLEN/8, x4, x1, x2) - -inst_4239: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ffc000; valaddr_reg:x3; val_offset:12717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12717*FLEN/8, x4, x1, x2) - -inst_4240: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ffe000; valaddr_reg:x3; val_offset:12720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12720*FLEN/8, x4, x1, x2) - -inst_4241: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fff000; valaddr_reg:x3; val_offset:12723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12723*FLEN/8, x4, x1, x2) - -inst_4242: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fff800; valaddr_reg:x3; val_offset:12726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12726*FLEN/8, x4, x1, x2) - -inst_4243: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fffc00; valaddr_reg:x3; val_offset:12729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12729*FLEN/8, x4, x1, x2) - -inst_4244: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fffe00; valaddr_reg:x3; val_offset:12732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12732*FLEN/8, x4, x1, x2) - -inst_4245: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ffff00; valaddr_reg:x3; val_offset:12735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12735*FLEN/8, x4, x1, x2) - -inst_4246: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ffff80; valaddr_reg:x3; val_offset:12738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12738*FLEN/8, x4, x1, x2) - -inst_4247: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ffffc0; valaddr_reg:x3; val_offset:12741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12741*FLEN/8, x4, x1, x2) - -inst_4248: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ffffe0; valaddr_reg:x3; val_offset:12744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12744*FLEN/8, x4, x1, x2) - -inst_4249: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fffff0; valaddr_reg:x3; val_offset:12747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12747*FLEN/8, x4, x1, x2) - -inst_4250: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fffff8; valaddr_reg:x3; val_offset:12750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12750*FLEN/8, x4, x1, x2) - -inst_4251: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fffffc; valaddr_reg:x3; val_offset:12753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12753*FLEN/8, x4, x1, x2) - -inst_4252: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6fffffe; valaddr_reg:x3; val_offset:12756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12756*FLEN/8, x4, x1, x2) - -inst_4253: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; -op3val:0x6ffffff; valaddr_reg:x3; val_offset:12759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12759*FLEN/8, x4, x1, x2) - -inst_4254: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6000000; valaddr_reg:x3; val_offset:12762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12762*FLEN/8, x4, x1, x2) - -inst_4255: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6000001; valaddr_reg:x3; val_offset:12765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12765*FLEN/8, x4, x1, x2) - -inst_4256: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6000003; valaddr_reg:x3; val_offset:12768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12768*FLEN/8, x4, x1, x2) - -inst_4257: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6000007; valaddr_reg:x3; val_offset:12771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12771*FLEN/8, x4, x1, x2) - -inst_4258: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf600000f; valaddr_reg:x3; val_offset:12774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12774*FLEN/8, x4, x1, x2) - -inst_4259: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf600001f; valaddr_reg:x3; val_offset:12777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12777*FLEN/8, x4, x1, x2) - -inst_4260: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf600003f; valaddr_reg:x3; val_offset:12780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12780*FLEN/8, x4, x1, x2) - -inst_4261: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf600007f; valaddr_reg:x3; val_offset:12783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12783*FLEN/8, x4, x1, x2) - -inst_4262: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf60000ff; valaddr_reg:x3; val_offset:12786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12786*FLEN/8, x4, x1, x2) - -inst_4263: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf60001ff; valaddr_reg:x3; val_offset:12789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12789*FLEN/8, x4, x1, x2) - -inst_4264: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf60003ff; valaddr_reg:x3; val_offset:12792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12792*FLEN/8, x4, x1, x2) - -inst_4265: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf60007ff; valaddr_reg:x3; val_offset:12795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12795*FLEN/8, x4, x1, x2) - -inst_4266: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6000fff; valaddr_reg:x3; val_offset:12798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12798*FLEN/8, x4, x1, x2) - -inst_4267: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6001fff; valaddr_reg:x3; val_offset:12801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12801*FLEN/8, x4, x1, x2) - -inst_4268: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6003fff; valaddr_reg:x3; val_offset:12804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12804*FLEN/8, x4, x1, x2) - -inst_4269: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6007fff; valaddr_reg:x3; val_offset:12807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12807*FLEN/8, x4, x1, x2) - -inst_4270: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf600ffff; valaddr_reg:x3; val_offset:12810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12810*FLEN/8, x4, x1, x2) - -inst_4271: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf601ffff; valaddr_reg:x3; val_offset:12813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12813*FLEN/8, x4, x1, x2) - -inst_4272: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf603ffff; valaddr_reg:x3; val_offset:12816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12816*FLEN/8, x4, x1, x2) - -inst_4273: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf607ffff; valaddr_reg:x3; val_offset:12819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12819*FLEN/8, x4, x1, x2) - -inst_4274: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf60fffff; valaddr_reg:x3; val_offset:12822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12822*FLEN/8, x4, x1, x2) - -inst_4275: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf61fffff; valaddr_reg:x3; val_offset:12825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12825*FLEN/8, x4, x1, x2) - -inst_4276: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf63fffff; valaddr_reg:x3; val_offset:12828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12828*FLEN/8, x4, x1, x2) - -inst_4277: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6400000; valaddr_reg:x3; val_offset:12831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12831*FLEN/8, x4, x1, x2) - -inst_4278: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6600000; valaddr_reg:x3; val_offset:12834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12834*FLEN/8, x4, x1, x2) - -inst_4279: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6700000; valaddr_reg:x3; val_offset:12837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12837*FLEN/8, x4, x1, x2) - -inst_4280: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf6780000; valaddr_reg:x3; val_offset:12840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12840*FLEN/8, x4, x1, x2) - -inst_4281: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67c0000; valaddr_reg:x3; val_offset:12843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12843*FLEN/8, x4, x1, x2) - -inst_4282: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67e0000; valaddr_reg:x3; val_offset:12846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12846*FLEN/8, x4, x1, x2) - -inst_4283: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67f0000; valaddr_reg:x3; val_offset:12849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12849*FLEN/8, x4, x1, x2) - -inst_4284: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67f8000; valaddr_reg:x3; val_offset:12852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12852*FLEN/8, x4, x1, x2) - -inst_4285: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67fc000; valaddr_reg:x3; val_offset:12855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12855*FLEN/8, x4, x1, x2) - -inst_4286: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67fe000; valaddr_reg:x3; val_offset:12858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12858*FLEN/8, x4, x1, x2) - -inst_4287: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67ff000; valaddr_reg:x3; val_offset:12861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12861*FLEN/8, x4, x1, x2) - -inst_4288: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67ff800; valaddr_reg:x3; val_offset:12864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12864*FLEN/8, x4, x1, x2) - -inst_4289: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67ffc00; valaddr_reg:x3; val_offset:12867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12867*FLEN/8, x4, x1, x2) - -inst_4290: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67ffe00; valaddr_reg:x3; val_offset:12870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12870*FLEN/8, x4, x1, x2) - -inst_4291: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67fff00; valaddr_reg:x3; val_offset:12873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12873*FLEN/8, x4, x1, x2) - -inst_4292: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67fff80; valaddr_reg:x3; val_offset:12876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12876*FLEN/8, x4, x1, x2) - -inst_4293: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67fffc0; valaddr_reg:x3; val_offset:12879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12879*FLEN/8, x4, x1, x2) - -inst_4294: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67fffe0; valaddr_reg:x3; val_offset:12882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12882*FLEN/8, x4, x1, x2) - -inst_4295: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67ffff0; valaddr_reg:x3; val_offset:12885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12885*FLEN/8, x4, x1, x2) - -inst_4296: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67ffff8; valaddr_reg:x3; val_offset:12888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12888*FLEN/8, x4, x1, x2) - -inst_4297: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67ffffc; valaddr_reg:x3; val_offset:12891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12891*FLEN/8, x4, x1, x2) - -inst_4298: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67ffffe; valaddr_reg:x3; val_offset:12894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12894*FLEN/8, x4, x1, x2) - -inst_4299: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xf67fffff; valaddr_reg:x3; val_offset:12897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12897*FLEN/8, x4, x1, x2) - -inst_4300: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff000001; valaddr_reg:x3; val_offset:12900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12900*FLEN/8, x4, x1, x2) - -inst_4301: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff000003; valaddr_reg:x3; val_offset:12903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12903*FLEN/8, x4, x1, x2) - -inst_4302: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff000007; valaddr_reg:x3; val_offset:12906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12906*FLEN/8, x4, x1, x2) - -inst_4303: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff199999; valaddr_reg:x3; val_offset:12909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12909*FLEN/8, x4, x1, x2) - -inst_4304: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff249249; valaddr_reg:x3; val_offset:12912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12912*FLEN/8, x4, x1, x2) - -inst_4305: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff333333; valaddr_reg:x3; val_offset:12915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12915*FLEN/8, x4, x1, x2) - -inst_4306: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:12918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12918*FLEN/8, x4, x1, x2) - -inst_4307: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:12921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12921*FLEN/8, x4, x1, x2) - -inst_4308: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff444444; valaddr_reg:x3; val_offset:12924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12924*FLEN/8, x4, x1, x2) - -inst_4309: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:12927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12927*FLEN/8, x4, x1, x2) - -inst_4310: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:12930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12930*FLEN/8, x4, x1, x2) - -inst_4311: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff666666; valaddr_reg:x3; val_offset:12933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12933*FLEN/8, x4, x1, x2) - -inst_4312: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:12936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12936*FLEN/8, x4, x1, x2) - -inst_4313: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:12939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12939*FLEN/8, x4, x1, x2) - -inst_4314: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:12942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12942*FLEN/8, x4, x1, x2) - -inst_4315: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:12945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12945*FLEN/8, x4, x1, x2) - -inst_4316: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:12948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12948*FLEN/8, x4, x1, x2) - -inst_4317: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:12951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12951*FLEN/8, x4, x1, x2) - -inst_4318: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:12954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12954*FLEN/8, x4, x1, x2) - -inst_4319: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:12957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12957*FLEN/8, x4, x1, x2) - -inst_4320: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:12960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12960*FLEN/8, x4, x1, x2) - -inst_4321: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:12963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12963*FLEN/8, x4, x1, x2) - -inst_4322: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:12966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12966*FLEN/8, x4, x1, x2) - -inst_4323: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:12969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12969*FLEN/8, x4, x1, x2) - -inst_4324: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:12972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12972*FLEN/8, x4, x1, x2) - -inst_4325: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:12975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12975*FLEN/8, x4, x1, x2) - -inst_4326: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:12978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12978*FLEN/8, x4, x1, x2) - -inst_4327: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:12981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12981*FLEN/8, x4, x1, x2) - -inst_4328: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:12984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12984*FLEN/8, x4, x1, x2) - -inst_4329: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:12987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12987*FLEN/8, x4, x1, x2) - -inst_4330: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:12990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12990*FLEN/8, x4, x1, x2) - -inst_4331: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:12993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12993*FLEN/8, x4, x1, x2) - -inst_4332: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c800000; valaddr_reg:x3; val_offset:12996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12996*FLEN/8, x4, x1, x2) - -inst_4333: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c800001; valaddr_reg:x3; val_offset:12999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12999*FLEN/8, x4, x1, x2) - -inst_4334: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c800003; valaddr_reg:x3; val_offset:13002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13002*FLEN/8, x4, x1, x2) - -inst_4335: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c800007; valaddr_reg:x3; val_offset:13005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13005*FLEN/8, x4, x1, x2) - -inst_4336: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c80000f; valaddr_reg:x3; val_offset:13008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13008*FLEN/8, x4, x1, x2) - -inst_4337: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c80001f; valaddr_reg:x3; val_offset:13011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13011*FLEN/8, x4, x1, x2) - -inst_4338: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c80003f; valaddr_reg:x3; val_offset:13014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13014*FLEN/8, x4, x1, x2) - -inst_4339: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c80007f; valaddr_reg:x3; val_offset:13017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13017*FLEN/8, x4, x1, x2) - -inst_4340: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c8000ff; valaddr_reg:x3; val_offset:13020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13020*FLEN/8, x4, x1, x2) - -inst_4341: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c8001ff; valaddr_reg:x3; val_offset:13023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13023*FLEN/8, x4, x1, x2) - -inst_4342: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c8003ff; valaddr_reg:x3; val_offset:13026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13026*FLEN/8, x4, x1, x2) - -inst_4343: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c8007ff; valaddr_reg:x3; val_offset:13029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13029*FLEN/8, x4, x1, x2) - -inst_4344: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c800fff; valaddr_reg:x3; val_offset:13032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13032*FLEN/8, x4, x1, x2) - -inst_4345: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c801fff; valaddr_reg:x3; val_offset:13035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13035*FLEN/8, x4, x1, x2) - -inst_4346: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c803fff; valaddr_reg:x3; val_offset:13038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13038*FLEN/8, x4, x1, x2) - -inst_4347: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c807fff; valaddr_reg:x3; val_offset:13041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13041*FLEN/8, x4, x1, x2) - -inst_4348: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c80ffff; valaddr_reg:x3; val_offset:13044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13044*FLEN/8, x4, x1, x2) - -inst_4349: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c81ffff; valaddr_reg:x3; val_offset:13047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13047*FLEN/8, x4, x1, x2) - -inst_4350: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c83ffff; valaddr_reg:x3; val_offset:13050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13050*FLEN/8, x4, x1, x2) - -inst_4351: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c87ffff; valaddr_reg:x3; val_offset:13053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13053*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_35) - -inst_4352: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c8fffff; valaddr_reg:x3; val_offset:13056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13056*FLEN/8, x4, x1, x2) - -inst_4353: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8c9fffff; valaddr_reg:x3; val_offset:13059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13059*FLEN/8, x4, x1, x2) - -inst_4354: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cbfffff; valaddr_reg:x3; val_offset:13062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13062*FLEN/8, x4, x1, x2) - -inst_4355: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cc00000; valaddr_reg:x3; val_offset:13065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13065*FLEN/8, x4, x1, x2) - -inst_4356: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8ce00000; valaddr_reg:x3; val_offset:13068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13068*FLEN/8, x4, x1, x2) - -inst_4357: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cf00000; valaddr_reg:x3; val_offset:13071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13071*FLEN/8, x4, x1, x2) - -inst_4358: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cf80000; valaddr_reg:x3; val_offset:13074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13074*FLEN/8, x4, x1, x2) - -inst_4359: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfc0000; valaddr_reg:x3; val_offset:13077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13077*FLEN/8, x4, x1, x2) - -inst_4360: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfe0000; valaddr_reg:x3; val_offset:13080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13080*FLEN/8, x4, x1, x2) - -inst_4361: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cff0000; valaddr_reg:x3; val_offset:13083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13083*FLEN/8, x4, x1, x2) - -inst_4362: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cff8000; valaddr_reg:x3; val_offset:13086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13086*FLEN/8, x4, x1, x2) - -inst_4363: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cffc000; valaddr_reg:x3; val_offset:13089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13089*FLEN/8, x4, x1, x2) - -inst_4364: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cffe000; valaddr_reg:x3; val_offset:13092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13092*FLEN/8, x4, x1, x2) - -inst_4365: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfff000; valaddr_reg:x3; val_offset:13095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13095*FLEN/8, x4, x1, x2) - -inst_4366: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfff800; valaddr_reg:x3; val_offset:13098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13098*FLEN/8, x4, x1, x2) - -inst_4367: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfffc00; valaddr_reg:x3; val_offset:13101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13101*FLEN/8, x4, x1, x2) - -inst_4368: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfffe00; valaddr_reg:x3; val_offset:13104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13104*FLEN/8, x4, x1, x2) - -inst_4369: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cffff00; valaddr_reg:x3; val_offset:13107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13107*FLEN/8, x4, x1, x2) - -inst_4370: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cffff80; valaddr_reg:x3; val_offset:13110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13110*FLEN/8, x4, x1, x2) - -inst_4371: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cffffc0; valaddr_reg:x3; val_offset:13113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13113*FLEN/8, x4, x1, x2) - -inst_4372: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cffffe0; valaddr_reg:x3; val_offset:13116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13116*FLEN/8, x4, x1, x2) - -inst_4373: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfffff0; valaddr_reg:x3; val_offset:13119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13119*FLEN/8, x4, x1, x2) - -inst_4374: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfffff8; valaddr_reg:x3; val_offset:13122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13122*FLEN/8, x4, x1, x2) - -inst_4375: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfffffc; valaddr_reg:x3; val_offset:13125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13125*FLEN/8, x4, x1, x2) - -inst_4376: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cfffffe; valaddr_reg:x3; val_offset:13128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13128*FLEN/8, x4, x1, x2) - -inst_4377: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; -op3val:0x8cffffff; valaddr_reg:x3; val_offset:13131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13131*FLEN/8, x4, x1, x2) - -inst_4378: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:13134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13134*FLEN/8, x4, x1, x2) - -inst_4379: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:13137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13137*FLEN/8, x4, x1, x2) - -inst_4380: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:13140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13140*FLEN/8, x4, x1, x2) - -inst_4381: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:13143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13143*FLEN/8, x4, x1, x2) - -inst_4382: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:13146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13146*FLEN/8, x4, x1, x2) - -inst_4383: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:13149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13149*FLEN/8, x4, x1, x2) - -inst_4384: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:13152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13152*FLEN/8, x4, x1, x2) - -inst_4385: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:13155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13155*FLEN/8, x4, x1, x2) - -inst_4386: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:13158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13158*FLEN/8, x4, x1, x2) - -inst_4387: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:13161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13161*FLEN/8, x4, x1, x2) - -inst_4388: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:13164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13164*FLEN/8, x4, x1, x2) - -inst_4389: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:13167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13167*FLEN/8, x4, x1, x2) - -inst_4390: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:13170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13170*FLEN/8, x4, x1, x2) - -inst_4391: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:13173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13173*FLEN/8, x4, x1, x2) - -inst_4392: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:13176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13176*FLEN/8, x4, x1, x2) - -inst_4393: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:13179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13179*FLEN/8, x4, x1, x2) - -inst_4394: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e800000; valaddr_reg:x3; val_offset:13182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13182*FLEN/8, x4, x1, x2) - -inst_4395: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e800001; valaddr_reg:x3; val_offset:13185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13185*FLEN/8, x4, x1, x2) - -inst_4396: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e800003; valaddr_reg:x3; val_offset:13188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13188*FLEN/8, x4, x1, x2) - -inst_4397: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e800007; valaddr_reg:x3; val_offset:13191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13191*FLEN/8, x4, x1, x2) - -inst_4398: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e80000f; valaddr_reg:x3; val_offset:13194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13194*FLEN/8, x4, x1, x2) - -inst_4399: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e80001f; valaddr_reg:x3; val_offset:13197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13197*FLEN/8, x4, x1, x2) - -inst_4400: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e80003f; valaddr_reg:x3; val_offset:13200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13200*FLEN/8, x4, x1, x2) - -inst_4401: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e80007f; valaddr_reg:x3; val_offset:13203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13203*FLEN/8, x4, x1, x2) - -inst_4402: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e8000ff; valaddr_reg:x3; val_offset:13206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13206*FLEN/8, x4, x1, x2) - -inst_4403: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e8001ff; valaddr_reg:x3; val_offset:13209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13209*FLEN/8, x4, x1, x2) - -inst_4404: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e8003ff; valaddr_reg:x3; val_offset:13212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13212*FLEN/8, x4, x1, x2) - -inst_4405: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e8007ff; valaddr_reg:x3; val_offset:13215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13215*FLEN/8, x4, x1, x2) - -inst_4406: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e800fff; valaddr_reg:x3; val_offset:13218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13218*FLEN/8, x4, x1, x2) - -inst_4407: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e801fff; valaddr_reg:x3; val_offset:13221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13221*FLEN/8, x4, x1, x2) - -inst_4408: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e803fff; valaddr_reg:x3; val_offset:13224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13224*FLEN/8, x4, x1, x2) - -inst_4409: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e807fff; valaddr_reg:x3; val_offset:13227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13227*FLEN/8, x4, x1, x2) - -inst_4410: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e80ffff; valaddr_reg:x3; val_offset:13230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13230*FLEN/8, x4, x1, x2) - -inst_4411: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e81ffff; valaddr_reg:x3; val_offset:13233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13233*FLEN/8, x4, x1, x2) - -inst_4412: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e83ffff; valaddr_reg:x3; val_offset:13236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13236*FLEN/8, x4, x1, x2) - -inst_4413: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e87ffff; valaddr_reg:x3; val_offset:13239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13239*FLEN/8, x4, x1, x2) - -inst_4414: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e8fffff; valaddr_reg:x3; val_offset:13242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13242*FLEN/8, x4, x1, x2) - -inst_4415: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8e9fffff; valaddr_reg:x3; val_offset:13245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13245*FLEN/8, x4, x1, x2) - -inst_4416: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8ebfffff; valaddr_reg:x3; val_offset:13248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13248*FLEN/8, x4, x1, x2) - -inst_4417: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8ec00000; valaddr_reg:x3; val_offset:13251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13251*FLEN/8, x4, x1, x2) - -inst_4418: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8ee00000; valaddr_reg:x3; val_offset:13254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13254*FLEN/8, x4, x1, x2) - -inst_4419: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8ef00000; valaddr_reg:x3; val_offset:13257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13257*FLEN/8, x4, x1, x2) - -inst_4420: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8ef80000; valaddr_reg:x3; val_offset:13260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13260*FLEN/8, x4, x1, x2) - -inst_4421: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efc0000; valaddr_reg:x3; val_offset:13263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13263*FLEN/8, x4, x1, x2) - -inst_4422: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efe0000; valaddr_reg:x3; val_offset:13266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13266*FLEN/8, x4, x1, x2) - -inst_4423: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8eff0000; valaddr_reg:x3; val_offset:13269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13269*FLEN/8, x4, x1, x2) - -inst_4424: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8eff8000; valaddr_reg:x3; val_offset:13272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13272*FLEN/8, x4, x1, x2) - -inst_4425: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8effc000; valaddr_reg:x3; val_offset:13275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13275*FLEN/8, x4, x1, x2) - -inst_4426: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8effe000; valaddr_reg:x3; val_offset:13278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13278*FLEN/8, x4, x1, x2) - -inst_4427: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efff000; valaddr_reg:x3; val_offset:13281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13281*FLEN/8, x4, x1, x2) - -inst_4428: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efff800; valaddr_reg:x3; val_offset:13284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13284*FLEN/8, x4, x1, x2) - -inst_4429: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efffc00; valaddr_reg:x3; val_offset:13287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13287*FLEN/8, x4, x1, x2) - -inst_4430: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efffe00; valaddr_reg:x3; val_offset:13290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13290*FLEN/8, x4, x1, x2) - -inst_4431: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8effff00; valaddr_reg:x3; val_offset:13293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13293*FLEN/8, x4, x1, x2) - -inst_4432: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8effff80; valaddr_reg:x3; val_offset:13296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13296*FLEN/8, x4, x1, x2) - -inst_4433: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8effffc0; valaddr_reg:x3; val_offset:13299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13299*FLEN/8, x4, x1, x2) - -inst_4434: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8effffe0; valaddr_reg:x3; val_offset:13302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13302*FLEN/8, x4, x1, x2) - -inst_4435: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efffff0; valaddr_reg:x3; val_offset:13305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13305*FLEN/8, x4, x1, x2) - -inst_4436: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efffff8; valaddr_reg:x3; val_offset:13308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13308*FLEN/8, x4, x1, x2) - -inst_4437: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efffffc; valaddr_reg:x3; val_offset:13311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13311*FLEN/8, x4, x1, x2) - -inst_4438: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8efffffe; valaddr_reg:x3; val_offset:13314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13314*FLEN/8, x4, x1, x2) - -inst_4439: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; -op3val:0x8effffff; valaddr_reg:x3; val_offset:13317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13317*FLEN/8, x4, x1, x2) - -inst_4440: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:13320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13320*FLEN/8, x4, x1, x2) - -inst_4441: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:13323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13323*FLEN/8, x4, x1, x2) - -inst_4442: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:13326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13326*FLEN/8, x4, x1, x2) - -inst_4443: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:13329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13329*FLEN/8, x4, x1, x2) - -inst_4444: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:13332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13332*FLEN/8, x4, x1, x2) - -inst_4445: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:13335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13335*FLEN/8, x4, x1, x2) - -inst_4446: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:13338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13338*FLEN/8, x4, x1, x2) - -inst_4447: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:13341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13341*FLEN/8, x4, x1, x2) - -inst_4448: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:13344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13344*FLEN/8, x4, x1, x2) - -inst_4449: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:13347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13347*FLEN/8, x4, x1, x2) - -inst_4450: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:13350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13350*FLEN/8, x4, x1, x2) - -inst_4451: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:13353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13353*FLEN/8, x4, x1, x2) - -inst_4452: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:13356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13356*FLEN/8, x4, x1, x2) - -inst_4453: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:13359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13359*FLEN/8, x4, x1, x2) - -inst_4454: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:13362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13362*FLEN/8, x4, x1, x2) - -inst_4455: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:13365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13365*FLEN/8, x4, x1, x2) - -inst_4456: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8800000; valaddr_reg:x3; val_offset:13368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13368*FLEN/8, x4, x1, x2) - -inst_4457: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8800001; valaddr_reg:x3; val_offset:13371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13371*FLEN/8, x4, x1, x2) - -inst_4458: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8800003; valaddr_reg:x3; val_offset:13374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13374*FLEN/8, x4, x1, x2) - -inst_4459: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8800007; valaddr_reg:x3; val_offset:13377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13377*FLEN/8, x4, x1, x2) - -inst_4460: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x880000f; valaddr_reg:x3; val_offset:13380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13380*FLEN/8, x4, x1, x2) - -inst_4461: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x880001f; valaddr_reg:x3; val_offset:13383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13383*FLEN/8, x4, x1, x2) - -inst_4462: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x880003f; valaddr_reg:x3; val_offset:13386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13386*FLEN/8, x4, x1, x2) - -inst_4463: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x880007f; valaddr_reg:x3; val_offset:13389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13389*FLEN/8, x4, x1, x2) - -inst_4464: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x88000ff; valaddr_reg:x3; val_offset:13392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13392*FLEN/8, x4, x1, x2) - -inst_4465: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x88001ff; valaddr_reg:x3; val_offset:13395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13395*FLEN/8, x4, x1, x2) - -inst_4466: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x88003ff; valaddr_reg:x3; val_offset:13398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13398*FLEN/8, x4, x1, x2) - -inst_4467: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x88007ff; valaddr_reg:x3; val_offset:13401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13401*FLEN/8, x4, x1, x2) - -inst_4468: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8800fff; valaddr_reg:x3; val_offset:13404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13404*FLEN/8, x4, x1, x2) - -inst_4469: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8801fff; valaddr_reg:x3; val_offset:13407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13407*FLEN/8, x4, x1, x2) - -inst_4470: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8803fff; valaddr_reg:x3; val_offset:13410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13410*FLEN/8, x4, x1, x2) - -inst_4471: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8807fff; valaddr_reg:x3; val_offset:13413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13413*FLEN/8, x4, x1, x2) - -inst_4472: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x880ffff; valaddr_reg:x3; val_offset:13416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13416*FLEN/8, x4, x1, x2) - -inst_4473: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x881ffff; valaddr_reg:x3; val_offset:13419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13419*FLEN/8, x4, x1, x2) - -inst_4474: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x883ffff; valaddr_reg:x3; val_offset:13422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13422*FLEN/8, x4, x1, x2) - -inst_4475: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x887ffff; valaddr_reg:x3; val_offset:13425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13425*FLEN/8, x4, x1, x2) - -inst_4476: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x88fffff; valaddr_reg:x3; val_offset:13428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13428*FLEN/8, x4, x1, x2) - -inst_4477: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x89fffff; valaddr_reg:x3; val_offset:13431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13431*FLEN/8, x4, x1, x2) - -inst_4478: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8bfffff; valaddr_reg:x3; val_offset:13434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13434*FLEN/8, x4, x1, x2) - -inst_4479: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8c00000; valaddr_reg:x3; val_offset:13437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13437*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_36) - -inst_4480: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8e00000; valaddr_reg:x3; val_offset:13440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13440*FLEN/8, x4, x1, x2) - -inst_4481: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8f00000; valaddr_reg:x3; val_offset:13443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13443*FLEN/8, x4, x1, x2) - -inst_4482: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8f80000; valaddr_reg:x3; val_offset:13446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13446*FLEN/8, x4, x1, x2) - -inst_4483: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fc0000; valaddr_reg:x3; val_offset:13449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13449*FLEN/8, x4, x1, x2) - -inst_4484: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fe0000; valaddr_reg:x3; val_offset:13452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13452*FLEN/8, x4, x1, x2) - -inst_4485: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ff0000; valaddr_reg:x3; val_offset:13455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13455*FLEN/8, x4, x1, x2) - -inst_4486: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ff8000; valaddr_reg:x3; val_offset:13458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13458*FLEN/8, x4, x1, x2) - -inst_4487: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ffc000; valaddr_reg:x3; val_offset:13461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13461*FLEN/8, x4, x1, x2) - -inst_4488: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ffe000; valaddr_reg:x3; val_offset:13464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13464*FLEN/8, x4, x1, x2) - -inst_4489: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fff000; valaddr_reg:x3; val_offset:13467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13467*FLEN/8, x4, x1, x2) - -inst_4490: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fff800; valaddr_reg:x3; val_offset:13470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13470*FLEN/8, x4, x1, x2) - -inst_4491: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fffc00; valaddr_reg:x3; val_offset:13473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13473*FLEN/8, x4, x1, x2) - -inst_4492: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fffe00; valaddr_reg:x3; val_offset:13476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13476*FLEN/8, x4, x1, x2) - -inst_4493: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ffff00; valaddr_reg:x3; val_offset:13479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13479*FLEN/8, x4, x1, x2) - -inst_4494: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ffff80; valaddr_reg:x3; val_offset:13482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13482*FLEN/8, x4, x1, x2) - -inst_4495: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ffffc0; valaddr_reg:x3; val_offset:13485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13485*FLEN/8, x4, x1, x2) - -inst_4496: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ffffe0; valaddr_reg:x3; val_offset:13488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13488*FLEN/8, x4, x1, x2) - -inst_4497: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fffff0; valaddr_reg:x3; val_offset:13491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13491*FLEN/8, x4, x1, x2) - -inst_4498: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fffff8; valaddr_reg:x3; val_offset:13494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13494*FLEN/8, x4, x1, x2) - -inst_4499: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fffffc; valaddr_reg:x3; val_offset:13497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13497*FLEN/8, x4, x1, x2) - -inst_4500: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8fffffe; valaddr_reg:x3; val_offset:13500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13500*FLEN/8, x4, x1, x2) - -inst_4501: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; -op3val:0x8ffffff; valaddr_reg:x3; val_offset:13503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13503*FLEN/8, x4, x1, x2) - -inst_4502: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:13506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13506*FLEN/8, x4, x1, x2) - -inst_4503: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:13509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13509*FLEN/8, x4, x1, x2) - -inst_4504: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:13512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13512*FLEN/8, x4, x1, x2) - -inst_4505: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:13515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13515*FLEN/8, x4, x1, x2) - -inst_4506: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:13518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13518*FLEN/8, x4, x1, x2) - -inst_4507: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:13521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13521*FLEN/8, x4, x1, x2) - -inst_4508: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:13524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13524*FLEN/8, x4, x1, x2) - -inst_4509: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:13527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13527*FLEN/8, x4, x1, x2) - -inst_4510: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:13530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13530*FLEN/8, x4, x1, x2) - -inst_4511: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:13533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13533*FLEN/8, x4, x1, x2) - -inst_4512: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:13536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13536*FLEN/8, x4, x1, x2) - -inst_4513: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:13539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13539*FLEN/8, x4, x1, x2) - -inst_4514: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:13542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13542*FLEN/8, x4, x1, x2) - -inst_4515: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:13545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13545*FLEN/8, x4, x1, x2) - -inst_4516: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:13548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13548*FLEN/8, x4, x1, x2) - -inst_4517: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:13551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13551*FLEN/8, x4, x1, x2) - -inst_4518: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89000000; valaddr_reg:x3; val_offset:13554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13554*FLEN/8, x4, x1, x2) - -inst_4519: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89000001; valaddr_reg:x3; val_offset:13557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13557*FLEN/8, x4, x1, x2) - -inst_4520: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89000003; valaddr_reg:x3; val_offset:13560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13560*FLEN/8, x4, x1, x2) - -inst_4521: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89000007; valaddr_reg:x3; val_offset:13563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13563*FLEN/8, x4, x1, x2) - -inst_4522: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8900000f; valaddr_reg:x3; val_offset:13566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13566*FLEN/8, x4, x1, x2) - -inst_4523: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8900001f; valaddr_reg:x3; val_offset:13569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13569*FLEN/8, x4, x1, x2) - -inst_4524: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8900003f; valaddr_reg:x3; val_offset:13572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13572*FLEN/8, x4, x1, x2) - -inst_4525: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8900007f; valaddr_reg:x3; val_offset:13575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13575*FLEN/8, x4, x1, x2) - -inst_4526: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x890000ff; valaddr_reg:x3; val_offset:13578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13578*FLEN/8, x4, x1, x2) - -inst_4527: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x890001ff; valaddr_reg:x3; val_offset:13581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13581*FLEN/8, x4, x1, x2) - -inst_4528: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x890003ff; valaddr_reg:x3; val_offset:13584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13584*FLEN/8, x4, x1, x2) - -inst_4529: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x890007ff; valaddr_reg:x3; val_offset:13587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13587*FLEN/8, x4, x1, x2) - -inst_4530: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89000fff; valaddr_reg:x3; val_offset:13590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13590*FLEN/8, x4, x1, x2) - -inst_4531: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89001fff; valaddr_reg:x3; val_offset:13593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13593*FLEN/8, x4, x1, x2) - -inst_4532: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89003fff; valaddr_reg:x3; val_offset:13596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13596*FLEN/8, x4, x1, x2) - -inst_4533: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89007fff; valaddr_reg:x3; val_offset:13599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13599*FLEN/8, x4, x1, x2) - -inst_4534: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8900ffff; valaddr_reg:x3; val_offset:13602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13602*FLEN/8, x4, x1, x2) - -inst_4535: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8901ffff; valaddr_reg:x3; val_offset:13605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13605*FLEN/8, x4, x1, x2) - -inst_4536: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8903ffff; valaddr_reg:x3; val_offset:13608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13608*FLEN/8, x4, x1, x2) - -inst_4537: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x8907ffff; valaddr_reg:x3; val_offset:13611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13611*FLEN/8, x4, x1, x2) - -inst_4538: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x890fffff; valaddr_reg:x3; val_offset:13614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13614*FLEN/8, x4, x1, x2) - -inst_4539: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x891fffff; valaddr_reg:x3; val_offset:13617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13617*FLEN/8, x4, x1, x2) - -inst_4540: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x893fffff; valaddr_reg:x3; val_offset:13620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13620*FLEN/8, x4, x1, x2) - -inst_4541: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89400000; valaddr_reg:x3; val_offset:13623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13623*FLEN/8, x4, x1, x2) - -inst_4542: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89600000; valaddr_reg:x3; val_offset:13626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13626*FLEN/8, x4, x1, x2) - -inst_4543: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89700000; valaddr_reg:x3; val_offset:13629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13629*FLEN/8, x4, x1, x2) - -inst_4544: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x89780000; valaddr_reg:x3; val_offset:13632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13632*FLEN/8, x4, x1, x2) - -inst_4545: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897c0000; valaddr_reg:x3; val_offset:13635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13635*FLEN/8, x4, x1, x2) - -inst_4546: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897e0000; valaddr_reg:x3; val_offset:13638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13638*FLEN/8, x4, x1, x2) - -inst_4547: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897f0000; valaddr_reg:x3; val_offset:13641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13641*FLEN/8, x4, x1, x2) - -inst_4548: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897f8000; valaddr_reg:x3; val_offset:13644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13644*FLEN/8, x4, x1, x2) - -inst_4549: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897fc000; valaddr_reg:x3; val_offset:13647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13647*FLEN/8, x4, x1, x2) - -inst_4550: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897fe000; valaddr_reg:x3; val_offset:13650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13650*FLEN/8, x4, x1, x2) - -inst_4551: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897ff000; valaddr_reg:x3; val_offset:13653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13653*FLEN/8, x4, x1, x2) - -inst_4552: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897ff800; valaddr_reg:x3; val_offset:13656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13656*FLEN/8, x4, x1, x2) - -inst_4553: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897ffc00; valaddr_reg:x3; val_offset:13659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13659*FLEN/8, x4, x1, x2) - -inst_4554: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897ffe00; valaddr_reg:x3; val_offset:13662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13662*FLEN/8, x4, x1, x2) - -inst_4555: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897fff00; valaddr_reg:x3; val_offset:13665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13665*FLEN/8, x4, x1, x2) - -inst_4556: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897fff80; valaddr_reg:x3; val_offset:13668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13668*FLEN/8, x4, x1, x2) - -inst_4557: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897fffc0; valaddr_reg:x3; val_offset:13671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13671*FLEN/8, x4, x1, x2) - -inst_4558: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897fffe0; valaddr_reg:x3; val_offset:13674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13674*FLEN/8, x4, x1, x2) - -inst_4559: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897ffff0; valaddr_reg:x3; val_offset:13677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13677*FLEN/8, x4, x1, x2) - -inst_4560: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897ffff8; valaddr_reg:x3; val_offset:13680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13680*FLEN/8, x4, x1, x2) - -inst_4561: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897ffffc; valaddr_reg:x3; val_offset:13683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13683*FLEN/8, x4, x1, x2) - -inst_4562: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897ffffe; valaddr_reg:x3; val_offset:13686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13686*FLEN/8, x4, x1, x2) - -inst_4563: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; -op3val:0x897fffff; valaddr_reg:x3; val_offset:13689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13689*FLEN/8, x4, x1, x2) - -inst_4564: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:13692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13692*FLEN/8, x4, x1, x2) - -inst_4565: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:13695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13695*FLEN/8, x4, x1, x2) - -inst_4566: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:13698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13698*FLEN/8, x4, x1, x2) - -inst_4567: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:13701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13701*FLEN/8, x4, x1, x2) - -inst_4568: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:13704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13704*FLEN/8, x4, x1, x2) - -inst_4569: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:13707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13707*FLEN/8, x4, x1, x2) - -inst_4570: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:13710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13710*FLEN/8, x4, x1, x2) - -inst_4571: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:13713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13713*FLEN/8, x4, x1, x2) - -inst_4572: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:13716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13716*FLEN/8, x4, x1, x2) - -inst_4573: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:13719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13719*FLEN/8, x4, x1, x2) - -inst_4574: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:13722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13722*FLEN/8, x4, x1, x2) - -inst_4575: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:13725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13725*FLEN/8, x4, x1, x2) - -inst_4576: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:13728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13728*FLEN/8, x4, x1, x2) - -inst_4577: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:13731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13731*FLEN/8, x4, x1, x2) - -inst_4578: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:13734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13734*FLEN/8, x4, x1, x2) - -inst_4579: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:13737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13737*FLEN/8, x4, x1, x2) - -inst_4580: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d000000; valaddr_reg:x3; val_offset:13740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13740*FLEN/8, x4, x1, x2) - -inst_4581: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d000001; valaddr_reg:x3; val_offset:13743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13743*FLEN/8, x4, x1, x2) - -inst_4582: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d000003; valaddr_reg:x3; val_offset:13746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13746*FLEN/8, x4, x1, x2) - -inst_4583: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d000007; valaddr_reg:x3; val_offset:13749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13749*FLEN/8, x4, x1, x2) - -inst_4584: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d00000f; valaddr_reg:x3; val_offset:13752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13752*FLEN/8, x4, x1, x2) - -inst_4585: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d00001f; valaddr_reg:x3; val_offset:13755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13755*FLEN/8, x4, x1, x2) - -inst_4586: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d00003f; valaddr_reg:x3; val_offset:13758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13758*FLEN/8, x4, x1, x2) - -inst_4587: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d00007f; valaddr_reg:x3; val_offset:13761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13761*FLEN/8, x4, x1, x2) - -inst_4588: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d0000ff; valaddr_reg:x3; val_offset:13764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13764*FLEN/8, x4, x1, x2) - -inst_4589: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d0001ff; valaddr_reg:x3; val_offset:13767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13767*FLEN/8, x4, x1, x2) - -inst_4590: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d0003ff; valaddr_reg:x3; val_offset:13770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13770*FLEN/8, x4, x1, x2) - -inst_4591: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d0007ff; valaddr_reg:x3; val_offset:13773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13773*FLEN/8, x4, x1, x2) - -inst_4592: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d000fff; valaddr_reg:x3; val_offset:13776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13776*FLEN/8, x4, x1, x2) - -inst_4593: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d001fff; valaddr_reg:x3; val_offset:13779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13779*FLEN/8, x4, x1, x2) - -inst_4594: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d003fff; valaddr_reg:x3; val_offset:13782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13782*FLEN/8, x4, x1, x2) - -inst_4595: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d007fff; valaddr_reg:x3; val_offset:13785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13785*FLEN/8, x4, x1, x2) - -inst_4596: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d00ffff; valaddr_reg:x3; val_offset:13788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13788*FLEN/8, x4, x1, x2) - -inst_4597: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d01ffff; valaddr_reg:x3; val_offset:13791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13791*FLEN/8, x4, x1, x2) - -inst_4598: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d03ffff; valaddr_reg:x3; val_offset:13794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13794*FLEN/8, x4, x1, x2) - -inst_4599: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d07ffff; valaddr_reg:x3; val_offset:13797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13797*FLEN/8, x4, x1, x2) - -inst_4600: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d0fffff; valaddr_reg:x3; val_offset:13800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13800*FLEN/8, x4, x1, x2) - -inst_4601: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d1fffff; valaddr_reg:x3; val_offset:13803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13803*FLEN/8, x4, x1, x2) - -inst_4602: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d3fffff; valaddr_reg:x3; val_offset:13806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13806*FLEN/8, x4, x1, x2) - -inst_4603: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d400000; valaddr_reg:x3; val_offset:13809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13809*FLEN/8, x4, x1, x2) - -inst_4604: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d600000; valaddr_reg:x3; val_offset:13812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13812*FLEN/8, x4, x1, x2) - -inst_4605: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d700000; valaddr_reg:x3; val_offset:13815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13815*FLEN/8, x4, x1, x2) - -inst_4606: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d780000; valaddr_reg:x3; val_offset:13818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13818*FLEN/8, x4, x1, x2) - -inst_4607: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7c0000; valaddr_reg:x3; val_offset:13821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13821*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_37) - -inst_4608: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7e0000; valaddr_reg:x3; val_offset:13824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13824*FLEN/8, x4, x1, x2) - -inst_4609: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7f0000; valaddr_reg:x3; val_offset:13827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13827*FLEN/8, x4, x1, x2) - -inst_4610: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7f8000; valaddr_reg:x3; val_offset:13830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13830*FLEN/8, x4, x1, x2) - -inst_4611: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7fc000; valaddr_reg:x3; val_offset:13833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13833*FLEN/8, x4, x1, x2) - -inst_4612: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7fe000; valaddr_reg:x3; val_offset:13836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13836*FLEN/8, x4, x1, x2) - -inst_4613: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7ff000; valaddr_reg:x3; val_offset:13839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13839*FLEN/8, x4, x1, x2) - -inst_4614: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7ff800; valaddr_reg:x3; val_offset:13842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13842*FLEN/8, x4, x1, x2) - -inst_4615: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:13845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13845*FLEN/8, x4, x1, x2) - -inst_4616: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:13848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13848*FLEN/8, x4, x1, x2) - -inst_4617: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7fff00; valaddr_reg:x3; val_offset:13851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13851*FLEN/8, x4, x1, x2) - -inst_4618: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7fff80; valaddr_reg:x3; val_offset:13854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13854*FLEN/8, x4, x1, x2) - -inst_4619: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:13857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13857*FLEN/8, x4, x1, x2) - -inst_4620: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:13860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13860*FLEN/8, x4, x1, x2) - -inst_4621: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:13863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13863*FLEN/8, x4, x1, x2) - -inst_4622: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:13866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13866*FLEN/8, x4, x1, x2) - -inst_4623: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:13869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13869*FLEN/8, x4, x1, x2) - -inst_4624: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:13872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13872*FLEN/8, x4, x1, x2) - -inst_4625: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; -op3val:0x8d7fffff; valaddr_reg:x3; val_offset:13875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13875*FLEN/8, x4, x1, x2) - -inst_4626: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:13878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13878*FLEN/8, x4, x1, x2) - -inst_4627: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:13881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13881*FLEN/8, x4, x1, x2) - -inst_4628: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:13884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13884*FLEN/8, x4, x1, x2) - -inst_4629: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:13887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13887*FLEN/8, x4, x1, x2) - -inst_4630: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:13890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13890*FLEN/8, x4, x1, x2) - -inst_4631: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:13893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13893*FLEN/8, x4, x1, x2) - -inst_4632: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:13896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13896*FLEN/8, x4, x1, x2) - -inst_4633: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:13899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13899*FLEN/8, x4, x1, x2) - -inst_4634: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:13902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13902*FLEN/8, x4, x1, x2) - -inst_4635: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:13905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13905*FLEN/8, x4, x1, x2) - -inst_4636: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:13908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13908*FLEN/8, x4, x1, x2) - -inst_4637: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:13911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13911*FLEN/8, x4, x1, x2) - -inst_4638: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:13914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13914*FLEN/8, x4, x1, x2) - -inst_4639: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:13917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13917*FLEN/8, x4, x1, x2) - -inst_4640: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:13920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13920*FLEN/8, x4, x1, x2) - -inst_4641: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:13923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13923*FLEN/8, x4, x1, x2) - -inst_4642: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86000000; valaddr_reg:x3; val_offset:13926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13926*FLEN/8, x4, x1, x2) - -inst_4643: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86000001; valaddr_reg:x3; val_offset:13929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13929*FLEN/8, x4, x1, x2) - -inst_4644: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86000003; valaddr_reg:x3; val_offset:13932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13932*FLEN/8, x4, x1, x2) - -inst_4645: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86000007; valaddr_reg:x3; val_offset:13935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13935*FLEN/8, x4, x1, x2) - -inst_4646: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8600000f; valaddr_reg:x3; val_offset:13938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13938*FLEN/8, x4, x1, x2) - -inst_4647: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8600001f; valaddr_reg:x3; val_offset:13941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13941*FLEN/8, x4, x1, x2) - -inst_4648: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8600003f; valaddr_reg:x3; val_offset:13944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13944*FLEN/8, x4, x1, x2) - -inst_4649: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8600007f; valaddr_reg:x3; val_offset:13947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13947*FLEN/8, x4, x1, x2) - -inst_4650: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x860000ff; valaddr_reg:x3; val_offset:13950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13950*FLEN/8, x4, x1, x2) - -inst_4651: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x860001ff; valaddr_reg:x3; val_offset:13953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13953*FLEN/8, x4, x1, x2) - -inst_4652: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x860003ff; valaddr_reg:x3; val_offset:13956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13956*FLEN/8, x4, x1, x2) - -inst_4653: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x860007ff; valaddr_reg:x3; val_offset:13959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13959*FLEN/8, x4, x1, x2) - -inst_4654: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86000fff; valaddr_reg:x3; val_offset:13962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13962*FLEN/8, x4, x1, x2) - -inst_4655: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86001fff; valaddr_reg:x3; val_offset:13965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13965*FLEN/8, x4, x1, x2) - -inst_4656: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86003fff; valaddr_reg:x3; val_offset:13968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13968*FLEN/8, x4, x1, x2) - -inst_4657: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86007fff; valaddr_reg:x3; val_offset:13971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13971*FLEN/8, x4, x1, x2) - -inst_4658: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8600ffff; valaddr_reg:x3; val_offset:13974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13974*FLEN/8, x4, x1, x2) - -inst_4659: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8601ffff; valaddr_reg:x3; val_offset:13977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13977*FLEN/8, x4, x1, x2) - -inst_4660: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8603ffff; valaddr_reg:x3; val_offset:13980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13980*FLEN/8, x4, x1, x2) - -inst_4661: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x8607ffff; valaddr_reg:x3; val_offset:13983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13983*FLEN/8, x4, x1, x2) - -inst_4662: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x860fffff; valaddr_reg:x3; val_offset:13986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13986*FLEN/8, x4, x1, x2) - -inst_4663: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x861fffff; valaddr_reg:x3; val_offset:13989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13989*FLEN/8, x4, x1, x2) - -inst_4664: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x863fffff; valaddr_reg:x3; val_offset:13992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13992*FLEN/8, x4, x1, x2) - -inst_4665: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86400000; valaddr_reg:x3; val_offset:13995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13995*FLEN/8, x4, x1, x2) - -inst_4666: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86600000; valaddr_reg:x3; val_offset:13998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13998*FLEN/8, x4, x1, x2) - -inst_4667: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86700000; valaddr_reg:x3; val_offset:14001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14001*FLEN/8, x4, x1, x2) - -inst_4668: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x86780000; valaddr_reg:x3; val_offset:14004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14004*FLEN/8, x4, x1, x2) - -inst_4669: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867c0000; valaddr_reg:x3; val_offset:14007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14007*FLEN/8, x4, x1, x2) - -inst_4670: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867e0000; valaddr_reg:x3; val_offset:14010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14010*FLEN/8, x4, x1, x2) - -inst_4671: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867f0000; valaddr_reg:x3; val_offset:14013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14013*FLEN/8, x4, x1, x2) - -inst_4672: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867f8000; valaddr_reg:x3; val_offset:14016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14016*FLEN/8, x4, x1, x2) - -inst_4673: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867fc000; valaddr_reg:x3; val_offset:14019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14019*FLEN/8, x4, x1, x2) - -inst_4674: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867fe000; valaddr_reg:x3; val_offset:14022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14022*FLEN/8, x4, x1, x2) - -inst_4675: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867ff000; valaddr_reg:x3; val_offset:14025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14025*FLEN/8, x4, x1, x2) - -inst_4676: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867ff800; valaddr_reg:x3; val_offset:14028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14028*FLEN/8, x4, x1, x2) - -inst_4677: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867ffc00; valaddr_reg:x3; val_offset:14031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14031*FLEN/8, x4, x1, x2) - -inst_4678: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867ffe00; valaddr_reg:x3; val_offset:14034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14034*FLEN/8, x4, x1, x2) - -inst_4679: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867fff00; valaddr_reg:x3; val_offset:14037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14037*FLEN/8, x4, x1, x2) - -inst_4680: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867fff80; valaddr_reg:x3; val_offset:14040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14040*FLEN/8, x4, x1, x2) - -inst_4681: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867fffc0; valaddr_reg:x3; val_offset:14043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14043*FLEN/8, x4, x1, x2) - -inst_4682: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867fffe0; valaddr_reg:x3; val_offset:14046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14046*FLEN/8, x4, x1, x2) - -inst_4683: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867ffff0; valaddr_reg:x3; val_offset:14049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14049*FLEN/8, x4, x1, x2) - -inst_4684: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867ffff8; valaddr_reg:x3; val_offset:14052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14052*FLEN/8, x4, x1, x2) - -inst_4685: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867ffffc; valaddr_reg:x3; val_offset:14055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14055*FLEN/8, x4, x1, x2) - -inst_4686: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867ffffe; valaddr_reg:x3; val_offset:14058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14058*FLEN/8, x4, x1, x2) - -inst_4687: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; -op3val:0x867fffff; valaddr_reg:x3; val_offset:14061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14061*FLEN/8, x4, x1, x2) - -inst_4688: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbf800001; valaddr_reg:x3; val_offset:14064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14064*FLEN/8, x4, x1, x2) - -inst_4689: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbf800003; valaddr_reg:x3; val_offset:14067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14067*FLEN/8, x4, x1, x2) - -inst_4690: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbf800007; valaddr_reg:x3; val_offset:14070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14070*FLEN/8, x4, x1, x2) - -inst_4691: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbf999999; valaddr_reg:x3; val_offset:14073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14073*FLEN/8, x4, x1, x2) - -inst_4692: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:14076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14076*FLEN/8, x4, x1, x2) - -inst_4693: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:14079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14079*FLEN/8, x4, x1, x2) - -inst_4694: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:14082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14082*FLEN/8, x4, x1, x2) - -inst_4695: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:14085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14085*FLEN/8, x4, x1, x2) - -inst_4696: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:14088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14088*FLEN/8, x4, x1, x2) - -inst_4697: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:14091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14091*FLEN/8, x4, x1, x2) - -inst_4698: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:14094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14094*FLEN/8, x4, x1, x2) - -inst_4699: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:14097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14097*FLEN/8, x4, x1, x2) - -inst_4700: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:14100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14100*FLEN/8, x4, x1, x2) - -inst_4701: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:14103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14103*FLEN/8, x4, x1, x2) - -inst_4702: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:14106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14106*FLEN/8, x4, x1, x2) - -inst_4703: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:14109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14109*FLEN/8, x4, x1, x2) - -inst_4704: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2000000; valaddr_reg:x3; val_offset:14112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14112*FLEN/8, x4, x1, x2) - -inst_4705: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2000001; valaddr_reg:x3; val_offset:14115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14115*FLEN/8, x4, x1, x2) - -inst_4706: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2000003; valaddr_reg:x3; val_offset:14118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14118*FLEN/8, x4, x1, x2) - -inst_4707: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2000007; valaddr_reg:x3; val_offset:14121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14121*FLEN/8, x4, x1, x2) - -inst_4708: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc200000f; valaddr_reg:x3; val_offset:14124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14124*FLEN/8, x4, x1, x2) - -inst_4709: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc200001f; valaddr_reg:x3; val_offset:14127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14127*FLEN/8, x4, x1, x2) - -inst_4710: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc200003f; valaddr_reg:x3; val_offset:14130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14130*FLEN/8, x4, x1, x2) - -inst_4711: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc200007f; valaddr_reg:x3; val_offset:14133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14133*FLEN/8, x4, x1, x2) - -inst_4712: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc20000ff; valaddr_reg:x3; val_offset:14136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14136*FLEN/8, x4, x1, x2) - -inst_4713: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc20001ff; valaddr_reg:x3; val_offset:14139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14139*FLEN/8, x4, x1, x2) - -inst_4714: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc20003ff; valaddr_reg:x3; val_offset:14142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14142*FLEN/8, x4, x1, x2) - -inst_4715: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc20007ff; valaddr_reg:x3; val_offset:14145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14145*FLEN/8, x4, x1, x2) - -inst_4716: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2000fff; valaddr_reg:x3; val_offset:14148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14148*FLEN/8, x4, x1, x2) - -inst_4717: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2001fff; valaddr_reg:x3; val_offset:14151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14151*FLEN/8, x4, x1, x2) - -inst_4718: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2003fff; valaddr_reg:x3; val_offset:14154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14154*FLEN/8, x4, x1, x2) - -inst_4719: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2007fff; valaddr_reg:x3; val_offset:14157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14157*FLEN/8, x4, x1, x2) - -inst_4720: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc200ffff; valaddr_reg:x3; val_offset:14160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14160*FLEN/8, x4, x1, x2) - -inst_4721: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc201ffff; valaddr_reg:x3; val_offset:14163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14163*FLEN/8, x4, x1, x2) - -inst_4722: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc203ffff; valaddr_reg:x3; val_offset:14166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14166*FLEN/8, x4, x1, x2) - -inst_4723: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc207ffff; valaddr_reg:x3; val_offset:14169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14169*FLEN/8, x4, x1, x2) - -inst_4724: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc20fffff; valaddr_reg:x3; val_offset:14172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14172*FLEN/8, x4, x1, x2) - -inst_4725: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc21fffff; valaddr_reg:x3; val_offset:14175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14175*FLEN/8, x4, x1, x2) - -inst_4726: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc23fffff; valaddr_reg:x3; val_offset:14178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14178*FLEN/8, x4, x1, x2) - -inst_4727: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2400000; valaddr_reg:x3; val_offset:14181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14181*FLEN/8, x4, x1, x2) - -inst_4728: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2600000; valaddr_reg:x3; val_offset:14184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14184*FLEN/8, x4, x1, x2) - -inst_4729: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2700000; valaddr_reg:x3; val_offset:14187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14187*FLEN/8, x4, x1, x2) - -inst_4730: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc2780000; valaddr_reg:x3; val_offset:14190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14190*FLEN/8, x4, x1, x2) - -inst_4731: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27c0000; valaddr_reg:x3; val_offset:14193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14193*FLEN/8, x4, x1, x2) - -inst_4732: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27e0000; valaddr_reg:x3; val_offset:14196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14196*FLEN/8, x4, x1, x2) - -inst_4733: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27f0000; valaddr_reg:x3; val_offset:14199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14199*FLEN/8, x4, x1, x2) - -inst_4734: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27f8000; valaddr_reg:x3; val_offset:14202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14202*FLEN/8, x4, x1, x2) - -inst_4735: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27fc000; valaddr_reg:x3; val_offset:14205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14205*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_38) - -inst_4736: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27fe000; valaddr_reg:x3; val_offset:14208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14208*FLEN/8, x4, x1, x2) - -inst_4737: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27ff000; valaddr_reg:x3; val_offset:14211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14211*FLEN/8, x4, x1, x2) - -inst_4738: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27ff800; valaddr_reg:x3; val_offset:14214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14214*FLEN/8, x4, x1, x2) - -inst_4739: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27ffc00; valaddr_reg:x3; val_offset:14217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14217*FLEN/8, x4, x1, x2) - -inst_4740: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27ffe00; valaddr_reg:x3; val_offset:14220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14220*FLEN/8, x4, x1, x2) - -inst_4741: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27fff00; valaddr_reg:x3; val_offset:14223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14223*FLEN/8, x4, x1, x2) - -inst_4742: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27fff80; valaddr_reg:x3; val_offset:14226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14226*FLEN/8, x4, x1, x2) - -inst_4743: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27fffc0; valaddr_reg:x3; val_offset:14229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14229*FLEN/8, x4, x1, x2) - -inst_4744: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27fffe0; valaddr_reg:x3; val_offset:14232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14232*FLEN/8, x4, x1, x2) - -inst_4745: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27ffff0; valaddr_reg:x3; val_offset:14235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14235*FLEN/8, x4, x1, x2) - -inst_4746: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27ffff8; valaddr_reg:x3; val_offset:14238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14238*FLEN/8, x4, x1, x2) - -inst_4747: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27ffffc; valaddr_reg:x3; val_offset:14241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14241*FLEN/8, x4, x1, x2) - -inst_4748: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27ffffe; valaddr_reg:x3; val_offset:14244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14244*FLEN/8, x4, x1, x2) - -inst_4749: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; -op3val:0xc27fffff; valaddr_reg:x3; val_offset:14247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14247*FLEN/8, x4, x1, x2) - -inst_4750: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b000000; valaddr_reg:x3; val_offset:14250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14250*FLEN/8, x4, x1, x2) - -inst_4751: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b000001; valaddr_reg:x3; val_offset:14253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14253*FLEN/8, x4, x1, x2) - -inst_4752: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b000003; valaddr_reg:x3; val_offset:14256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14256*FLEN/8, x4, x1, x2) - -inst_4753: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b000007; valaddr_reg:x3; val_offset:14259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14259*FLEN/8, x4, x1, x2) - -inst_4754: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b00000f; valaddr_reg:x3; val_offset:14262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14262*FLEN/8, x4, x1, x2) - -inst_4755: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b00001f; valaddr_reg:x3; val_offset:14265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14265*FLEN/8, x4, x1, x2) - -inst_4756: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b00003f; valaddr_reg:x3; val_offset:14268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14268*FLEN/8, x4, x1, x2) - -inst_4757: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b00007f; valaddr_reg:x3; val_offset:14271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14271*FLEN/8, x4, x1, x2) - -inst_4758: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b0000ff; valaddr_reg:x3; val_offset:14274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14274*FLEN/8, x4, x1, x2) - -inst_4759: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b0001ff; valaddr_reg:x3; val_offset:14277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14277*FLEN/8, x4, x1, x2) - -inst_4760: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b0003ff; valaddr_reg:x3; val_offset:14280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14280*FLEN/8, x4, x1, x2) - -inst_4761: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b0007ff; valaddr_reg:x3; val_offset:14283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14283*FLEN/8, x4, x1, x2) - -inst_4762: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b000fff; valaddr_reg:x3; val_offset:14286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14286*FLEN/8, x4, x1, x2) - -inst_4763: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b001fff; valaddr_reg:x3; val_offset:14289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14289*FLEN/8, x4, x1, x2) - -inst_4764: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b003fff; valaddr_reg:x3; val_offset:14292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14292*FLEN/8, x4, x1, x2) - -inst_4765: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b007fff; valaddr_reg:x3; val_offset:14295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14295*FLEN/8, x4, x1, x2) - -inst_4766: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b00ffff; valaddr_reg:x3; val_offset:14298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14298*FLEN/8, x4, x1, x2) - -inst_4767: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b01ffff; valaddr_reg:x3; val_offset:14301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14301*FLEN/8, x4, x1, x2) - -inst_4768: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b03ffff; valaddr_reg:x3; val_offset:14304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14304*FLEN/8, x4, x1, x2) - -inst_4769: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b07ffff; valaddr_reg:x3; val_offset:14307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14307*FLEN/8, x4, x1, x2) - -inst_4770: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b0fffff; valaddr_reg:x3; val_offset:14310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14310*FLEN/8, x4, x1, x2) - -inst_4771: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b1fffff; valaddr_reg:x3; val_offset:14313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14313*FLEN/8, x4, x1, x2) - -inst_4772: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b3fffff; valaddr_reg:x3; val_offset:14316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14316*FLEN/8, x4, x1, x2) - -inst_4773: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b400000; valaddr_reg:x3; val_offset:14319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14319*FLEN/8, x4, x1, x2) - -inst_4774: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b600000; valaddr_reg:x3; val_offset:14322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14322*FLEN/8, x4, x1, x2) - -inst_4775: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b700000; valaddr_reg:x3; val_offset:14325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14325*FLEN/8, x4, x1, x2) - -inst_4776: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b780000; valaddr_reg:x3; val_offset:14328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14328*FLEN/8, x4, x1, x2) - -inst_4777: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7c0000; valaddr_reg:x3; val_offset:14331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14331*FLEN/8, x4, x1, x2) - -inst_4778: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7e0000; valaddr_reg:x3; val_offset:14334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14334*FLEN/8, x4, x1, x2) - -inst_4779: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7f0000; valaddr_reg:x3; val_offset:14337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14337*FLEN/8, x4, x1, x2) - -inst_4780: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7f8000; valaddr_reg:x3; val_offset:14340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14340*FLEN/8, x4, x1, x2) - -inst_4781: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7fc000; valaddr_reg:x3; val_offset:14343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14343*FLEN/8, x4, x1, x2) - -inst_4782: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7fe000; valaddr_reg:x3; val_offset:14346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14346*FLEN/8, x4, x1, x2) - -inst_4783: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7ff000; valaddr_reg:x3; val_offset:14349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14349*FLEN/8, x4, x1, x2) - -inst_4784: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7ff800; valaddr_reg:x3; val_offset:14352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14352*FLEN/8, x4, x1, x2) - -inst_4785: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7ffc00; valaddr_reg:x3; val_offset:14355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14355*FLEN/8, x4, x1, x2) - -inst_4786: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7ffe00; valaddr_reg:x3; val_offset:14358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14358*FLEN/8, x4, x1, x2) - -inst_4787: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7fff00; valaddr_reg:x3; val_offset:14361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14361*FLEN/8, x4, x1, x2) - -inst_4788: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7fff80; valaddr_reg:x3; val_offset:14364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14364*FLEN/8, x4, x1, x2) - -inst_4789: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7fffc0; valaddr_reg:x3; val_offset:14367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14367*FLEN/8, x4, x1, x2) - -inst_4790: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7fffe0; valaddr_reg:x3; val_offset:14370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14370*FLEN/8, x4, x1, x2) - -inst_4791: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7ffff0; valaddr_reg:x3; val_offset:14373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14373*FLEN/8, x4, x1, x2) - -inst_4792: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7ffff8; valaddr_reg:x3; val_offset:14376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14376*FLEN/8, x4, x1, x2) - -inst_4793: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7ffffc; valaddr_reg:x3; val_offset:14379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14379*FLEN/8, x4, x1, x2) - -inst_4794: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7ffffe; valaddr_reg:x3; val_offset:14382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14382*FLEN/8, x4, x1, x2) - -inst_4795: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x2b7fffff; valaddr_reg:x3; val_offset:14385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14385*FLEN/8, x4, x1, x2) - -inst_4796: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3f800001; valaddr_reg:x3; val_offset:14388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14388*FLEN/8, x4, x1, x2) - -inst_4797: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3f800003; valaddr_reg:x3; val_offset:14391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14391*FLEN/8, x4, x1, x2) - -inst_4798: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3f800007; valaddr_reg:x3; val_offset:14394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14394*FLEN/8, x4, x1, x2) - -inst_4799: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3f999999; valaddr_reg:x3; val_offset:14397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14397*FLEN/8, x4, x1, x2) - -inst_4800: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:14400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14400*FLEN/8, x4, x1, x2) - -inst_4801: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:14403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14403*FLEN/8, x4, x1, x2) - -inst_4802: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:14406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14406*FLEN/8, x4, x1, x2) - -inst_4803: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:14409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14409*FLEN/8, x4, x1, x2) - -inst_4804: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:14412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14412*FLEN/8, x4, x1, x2) - -inst_4805: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:14415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14415*FLEN/8, x4, x1, x2) - -inst_4806: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:14418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14418*FLEN/8, x4, x1, x2) - -inst_4807: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:14421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14421*FLEN/8, x4, x1, x2) - -inst_4808: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:14424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14424*FLEN/8, x4, x1, x2) - -inst_4809: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:14427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14427*FLEN/8, x4, x1, x2) - -inst_4810: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:14430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14430*FLEN/8, x4, x1, x2) - -inst_4811: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:14433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14433*FLEN/8, x4, x1, x2) - -inst_4812: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf800000; valaddr_reg:x3; val_offset:14436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14436*FLEN/8, x4, x1, x2) - -inst_4813: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf800001; valaddr_reg:x3; val_offset:14439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14439*FLEN/8, x4, x1, x2) - -inst_4814: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf800003; valaddr_reg:x3; val_offset:14442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14442*FLEN/8, x4, x1, x2) - -inst_4815: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf800007; valaddr_reg:x3; val_offset:14445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14445*FLEN/8, x4, x1, x2) - -inst_4816: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf80000f; valaddr_reg:x3; val_offset:14448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14448*FLEN/8, x4, x1, x2) - -inst_4817: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf80001f; valaddr_reg:x3; val_offset:14451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14451*FLEN/8, x4, x1, x2) - -inst_4818: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf80003f; valaddr_reg:x3; val_offset:14454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14454*FLEN/8, x4, x1, x2) - -inst_4819: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf80007f; valaddr_reg:x3; val_offset:14457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14457*FLEN/8, x4, x1, x2) - -inst_4820: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf8000ff; valaddr_reg:x3; val_offset:14460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14460*FLEN/8, x4, x1, x2) - -inst_4821: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf8001ff; valaddr_reg:x3; val_offset:14463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14463*FLEN/8, x4, x1, x2) - -inst_4822: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf8003ff; valaddr_reg:x3; val_offset:14466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14466*FLEN/8, x4, x1, x2) - -inst_4823: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf8007ff; valaddr_reg:x3; val_offset:14469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14469*FLEN/8, x4, x1, x2) - -inst_4824: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf800fff; valaddr_reg:x3; val_offset:14472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14472*FLEN/8, x4, x1, x2) - -inst_4825: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf801fff; valaddr_reg:x3; val_offset:14475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14475*FLEN/8, x4, x1, x2) - -inst_4826: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf803fff; valaddr_reg:x3; val_offset:14478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14478*FLEN/8, x4, x1, x2) - -inst_4827: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf807fff; valaddr_reg:x3; val_offset:14481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14481*FLEN/8, x4, x1, x2) - -inst_4828: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf80ffff; valaddr_reg:x3; val_offset:14484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14484*FLEN/8, x4, x1, x2) - -inst_4829: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf81ffff; valaddr_reg:x3; val_offset:14487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14487*FLEN/8, x4, x1, x2) - -inst_4830: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf83ffff; valaddr_reg:x3; val_offset:14490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14490*FLEN/8, x4, x1, x2) - -inst_4831: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf87ffff; valaddr_reg:x3; val_offset:14493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14493*FLEN/8, x4, x1, x2) - -inst_4832: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf8fffff; valaddr_reg:x3; val_offset:14496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14496*FLEN/8, x4, x1, x2) - -inst_4833: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf999999; valaddr_reg:x3; val_offset:14499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14499*FLEN/8, x4, x1, x2) - -inst_4834: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbf9fffff; valaddr_reg:x3; val_offset:14502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14502*FLEN/8, x4, x1, x2) - -inst_4835: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:14505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14505*FLEN/8, x4, x1, x2) - -inst_4836: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:14508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14508*FLEN/8, x4, x1, x2) - -inst_4837: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:14511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14511*FLEN/8, x4, x1, x2) - -inst_4838: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:14514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14514*FLEN/8, x4, x1, x2) - -inst_4839: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfbfffff; valaddr_reg:x3; val_offset:14517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14517*FLEN/8, x4, x1, x2) - -inst_4840: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfc00000; valaddr_reg:x3; val_offset:14520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14520*FLEN/8, x4, x1, x2) - -inst_4841: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:14523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14523*FLEN/8, x4, x1, x2) - -inst_4842: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:14526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14526*FLEN/8, x4, x1, x2) - -inst_4843: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:14529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14529*FLEN/8, x4, x1, x2) - -inst_4844: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfe00000; valaddr_reg:x3; val_offset:14532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14532*FLEN/8, x4, x1, x2) - -inst_4845: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:14535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14535*FLEN/8, x4, x1, x2) - -inst_4846: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:14538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14538*FLEN/8, x4, x1, x2) - -inst_4847: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbff00000; valaddr_reg:x3; val_offset:14541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14541*FLEN/8, x4, x1, x2) - -inst_4848: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbff80000; valaddr_reg:x3; val_offset:14544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14544*FLEN/8, x4, x1, x2) - -inst_4849: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffc0000; valaddr_reg:x3; val_offset:14547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14547*FLEN/8, x4, x1, x2) - -inst_4850: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffe0000; valaddr_reg:x3; val_offset:14550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14550*FLEN/8, x4, x1, x2) - -inst_4851: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfff0000; valaddr_reg:x3; val_offset:14553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14553*FLEN/8, x4, x1, x2) - -inst_4852: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfff8000; valaddr_reg:x3; val_offset:14556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14556*FLEN/8, x4, x1, x2) - -inst_4853: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfffc000; valaddr_reg:x3; val_offset:14559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14559*FLEN/8, x4, x1, x2) - -inst_4854: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfffe000; valaddr_reg:x3; val_offset:14562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14562*FLEN/8, x4, x1, x2) - -inst_4855: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffff000; valaddr_reg:x3; val_offset:14565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14565*FLEN/8, x4, x1, x2) - -inst_4856: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffff800; valaddr_reg:x3; val_offset:14568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14568*FLEN/8, x4, x1, x2) - -inst_4857: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffffc00; valaddr_reg:x3; val_offset:14571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14571*FLEN/8, x4, x1, x2) - -inst_4858: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffffe00; valaddr_reg:x3; val_offset:14574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14574*FLEN/8, x4, x1, x2) - -inst_4859: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfffff00; valaddr_reg:x3; val_offset:14577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14577*FLEN/8, x4, x1, x2) - -inst_4860: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfffff80; valaddr_reg:x3; val_offset:14580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14580*FLEN/8, x4, x1, x2) - -inst_4861: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfffffc0; valaddr_reg:x3; val_offset:14583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14583*FLEN/8, x4, x1, x2) - -inst_4862: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfffffe0; valaddr_reg:x3; val_offset:14586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14586*FLEN/8, x4, x1, x2) - -inst_4863: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffffff0; valaddr_reg:x3; val_offset:14589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14589*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_39) - -inst_4864: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:14592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14592*FLEN/8, x4, x1, x2) - -inst_4865: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:14595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14595*FLEN/8, x4, x1, x2) - -inst_4866: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:14598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14598*FLEN/8, x4, x1, x2) - -inst_4867: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; -op3val:0xbfffffff; valaddr_reg:x3; val_offset:14601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14601*FLEN/8, x4, x1, x2) - -inst_4868: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37800000; valaddr_reg:x3; val_offset:14604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14604*FLEN/8, x4, x1, x2) - -inst_4869: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37800001; valaddr_reg:x3; val_offset:14607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14607*FLEN/8, x4, x1, x2) - -inst_4870: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37800003; valaddr_reg:x3; val_offset:14610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14610*FLEN/8, x4, x1, x2) - -inst_4871: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37800007; valaddr_reg:x3; val_offset:14613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14613*FLEN/8, x4, x1, x2) - -inst_4872: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3780000f; valaddr_reg:x3; val_offset:14616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14616*FLEN/8, x4, x1, x2) - -inst_4873: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3780001f; valaddr_reg:x3; val_offset:14619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14619*FLEN/8, x4, x1, x2) - -inst_4874: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3780003f; valaddr_reg:x3; val_offset:14622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14622*FLEN/8, x4, x1, x2) - -inst_4875: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3780007f; valaddr_reg:x3; val_offset:14625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14625*FLEN/8, x4, x1, x2) - -inst_4876: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x378000ff; valaddr_reg:x3; val_offset:14628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14628*FLEN/8, x4, x1, x2) - -inst_4877: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x378001ff; valaddr_reg:x3; val_offset:14631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14631*FLEN/8, x4, x1, x2) - -inst_4878: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x378003ff; valaddr_reg:x3; val_offset:14634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14634*FLEN/8, x4, x1, x2) - -inst_4879: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x378007ff; valaddr_reg:x3; val_offset:14637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14637*FLEN/8, x4, x1, x2) - -inst_4880: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37800fff; valaddr_reg:x3; val_offset:14640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14640*FLEN/8, x4, x1, x2) - -inst_4881: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37801fff; valaddr_reg:x3; val_offset:14643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14643*FLEN/8, x4, x1, x2) - -inst_4882: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37803fff; valaddr_reg:x3; val_offset:14646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14646*FLEN/8, x4, x1, x2) - -inst_4883: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37807fff; valaddr_reg:x3; val_offset:14649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14649*FLEN/8, x4, x1, x2) - -inst_4884: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3780ffff; valaddr_reg:x3; val_offset:14652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14652*FLEN/8, x4, x1, x2) - -inst_4885: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3781ffff; valaddr_reg:x3; val_offset:14655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14655*FLEN/8, x4, x1, x2) - -inst_4886: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3783ffff; valaddr_reg:x3; val_offset:14658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14658*FLEN/8, x4, x1, x2) - -inst_4887: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3787ffff; valaddr_reg:x3; val_offset:14661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14661*FLEN/8, x4, x1, x2) - -inst_4888: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x378fffff; valaddr_reg:x3; val_offset:14664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14664*FLEN/8, x4, x1, x2) - -inst_4889: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x379fffff; valaddr_reg:x3; val_offset:14667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14667*FLEN/8, x4, x1, x2) - -inst_4890: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37bfffff; valaddr_reg:x3; val_offset:14670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14670*FLEN/8, x4, x1, x2) - -inst_4891: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37c00000; valaddr_reg:x3; val_offset:14673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14673*FLEN/8, x4, x1, x2) - -inst_4892: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37e00000; valaddr_reg:x3; val_offset:14676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14676*FLEN/8, x4, x1, x2) - -inst_4893: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37f00000; valaddr_reg:x3; val_offset:14679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14679*FLEN/8, x4, x1, x2) - -inst_4894: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37f80000; valaddr_reg:x3; val_offset:14682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14682*FLEN/8, x4, x1, x2) - -inst_4895: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fc0000; valaddr_reg:x3; val_offset:14685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14685*FLEN/8, x4, x1, x2) - -inst_4896: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fe0000; valaddr_reg:x3; val_offset:14688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14688*FLEN/8, x4, x1, x2) - -inst_4897: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ff0000; valaddr_reg:x3; val_offset:14691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14691*FLEN/8, x4, x1, x2) - -inst_4898: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ff8000; valaddr_reg:x3; val_offset:14694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14694*FLEN/8, x4, x1, x2) - -inst_4899: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ffc000; valaddr_reg:x3; val_offset:14697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14697*FLEN/8, x4, x1, x2) - -inst_4900: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ffe000; valaddr_reg:x3; val_offset:14700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14700*FLEN/8, x4, x1, x2) - -inst_4901: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fff000; valaddr_reg:x3; val_offset:14703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14703*FLEN/8, x4, x1, x2) - -inst_4902: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fff800; valaddr_reg:x3; val_offset:14706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14706*FLEN/8, x4, x1, x2) - -inst_4903: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fffc00; valaddr_reg:x3; val_offset:14709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14709*FLEN/8, x4, x1, x2) - -inst_4904: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fffe00; valaddr_reg:x3; val_offset:14712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14712*FLEN/8, x4, x1, x2) - -inst_4905: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ffff00; valaddr_reg:x3; val_offset:14715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14715*FLEN/8, x4, x1, x2) - -inst_4906: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ffff80; valaddr_reg:x3; val_offset:14718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14718*FLEN/8, x4, x1, x2) - -inst_4907: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ffffc0; valaddr_reg:x3; val_offset:14721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14721*FLEN/8, x4, x1, x2) - -inst_4908: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ffffe0; valaddr_reg:x3; val_offset:14724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14724*FLEN/8, x4, x1, x2) - -inst_4909: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fffff0; valaddr_reg:x3; val_offset:14727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14727*FLEN/8, x4, x1, x2) - -inst_4910: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fffff8; valaddr_reg:x3; val_offset:14730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14730*FLEN/8, x4, x1, x2) - -inst_4911: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fffffc; valaddr_reg:x3; val_offset:14733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14733*FLEN/8, x4, x1, x2) - -inst_4912: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37fffffe; valaddr_reg:x3; val_offset:14736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14736*FLEN/8, x4, x1, x2) - -inst_4913: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x37ffffff; valaddr_reg:x3; val_offset:14739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14739*FLEN/8, x4, x1, x2) - -inst_4914: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3f800001; valaddr_reg:x3; val_offset:14742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14742*FLEN/8, x4, x1, x2) - -inst_4915: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3f800003; valaddr_reg:x3; val_offset:14745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14745*FLEN/8, x4, x1, x2) - -inst_4916: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3f800007; valaddr_reg:x3; val_offset:14748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14748*FLEN/8, x4, x1, x2) - -inst_4917: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3f999999; valaddr_reg:x3; val_offset:14751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14751*FLEN/8, x4, x1, x2) - -inst_4918: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:14754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14754*FLEN/8, x4, x1, x2) - -inst_4919: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:14757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14757*FLEN/8, x4, x1, x2) - -inst_4920: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:14760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14760*FLEN/8, x4, x1, x2) - -inst_4921: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:14763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14763*FLEN/8, x4, x1, x2) - -inst_4922: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:14766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14766*FLEN/8, x4, x1, x2) - -inst_4923: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:14769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14769*FLEN/8, x4, x1, x2) - -inst_4924: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:14772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14772*FLEN/8, x4, x1, x2) - -inst_4925: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:14775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14775*FLEN/8, x4, x1, x2) - -inst_4926: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:14778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14778*FLEN/8, x4, x1, x2) - -inst_4927: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:14781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14781*FLEN/8, x4, x1, x2) - -inst_4928: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:14784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14784*FLEN/8, x4, x1, x2) - -inst_4929: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:14787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14787*FLEN/8, x4, x1, x2) - -inst_4930: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:14790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14790*FLEN/8, x4, x1, x2) - -inst_4931: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:14793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14793*FLEN/8, x4, x1, x2) - -inst_4932: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:14796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14796*FLEN/8, x4, x1, x2) - -inst_4933: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:14799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14799*FLEN/8, x4, x1, x2) - -inst_4934: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:14802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14802*FLEN/8, x4, x1, x2) - -inst_4935: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:14805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14805*FLEN/8, x4, x1, x2) - -inst_4936: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:14808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14808*FLEN/8, x4, x1, x2) - -inst_4937: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:14811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14811*FLEN/8, x4, x1, x2) - -inst_4938: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:14814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14814*FLEN/8, x4, x1, x2) - -inst_4939: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:14817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14817*FLEN/8, x4, x1, x2) - -inst_4940: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:14820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14820*FLEN/8, x4, x1, x2) - -inst_4941: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:14823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14823*FLEN/8, x4, x1, x2) - -inst_4942: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:14826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14826*FLEN/8, x4, x1, x2) - -inst_4943: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:14829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14829*FLEN/8, x4, x1, x2) - -inst_4944: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:14832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14832*FLEN/8, x4, x1, x2) - -inst_4945: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:14835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14835*FLEN/8, x4, x1, x2) - -inst_4946: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48000000; valaddr_reg:x3; val_offset:14838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14838*FLEN/8, x4, x1, x2) - -inst_4947: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48000001; valaddr_reg:x3; val_offset:14841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14841*FLEN/8, x4, x1, x2) - -inst_4948: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48000003; valaddr_reg:x3; val_offset:14844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14844*FLEN/8, x4, x1, x2) - -inst_4949: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48000007; valaddr_reg:x3; val_offset:14847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14847*FLEN/8, x4, x1, x2) - -inst_4950: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x4800000f; valaddr_reg:x3; val_offset:14850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14850*FLEN/8, x4, x1, x2) - -inst_4951: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x4800001f; valaddr_reg:x3; val_offset:14853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14853*FLEN/8, x4, x1, x2) - -inst_4952: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x4800003f; valaddr_reg:x3; val_offset:14856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14856*FLEN/8, x4, x1, x2) - -inst_4953: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x4800007f; valaddr_reg:x3; val_offset:14859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14859*FLEN/8, x4, x1, x2) - -inst_4954: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x480000ff; valaddr_reg:x3; val_offset:14862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14862*FLEN/8, x4, x1, x2) - -inst_4955: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x480001ff; valaddr_reg:x3; val_offset:14865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14865*FLEN/8, x4, x1, x2) - -inst_4956: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x480003ff; valaddr_reg:x3; val_offset:14868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14868*FLEN/8, x4, x1, x2) - -inst_4957: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x480007ff; valaddr_reg:x3; val_offset:14871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14871*FLEN/8, x4, x1, x2) - -inst_4958: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48000fff; valaddr_reg:x3; val_offset:14874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14874*FLEN/8, x4, x1, x2) - -inst_4959: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48001fff; valaddr_reg:x3; val_offset:14877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14877*FLEN/8, x4, x1, x2) - -inst_4960: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48003fff; valaddr_reg:x3; val_offset:14880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14880*FLEN/8, x4, x1, x2) - -inst_4961: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48007fff; valaddr_reg:x3; val_offset:14883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14883*FLEN/8, x4, x1, x2) - -inst_4962: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x4800ffff; valaddr_reg:x3; val_offset:14886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14886*FLEN/8, x4, x1, x2) - -inst_4963: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x4801ffff; valaddr_reg:x3; val_offset:14889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14889*FLEN/8, x4, x1, x2) - -inst_4964: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x4803ffff; valaddr_reg:x3; val_offset:14892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14892*FLEN/8, x4, x1, x2) - -inst_4965: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x4807ffff; valaddr_reg:x3; val_offset:14895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14895*FLEN/8, x4, x1, x2) - -inst_4966: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x480fffff; valaddr_reg:x3; val_offset:14898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14898*FLEN/8, x4, x1, x2) - -inst_4967: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x481fffff; valaddr_reg:x3; val_offset:14901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14901*FLEN/8, x4, x1, x2) - -inst_4968: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x483fffff; valaddr_reg:x3; val_offset:14904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14904*FLEN/8, x4, x1, x2) - -inst_4969: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48400000; valaddr_reg:x3; val_offset:14907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14907*FLEN/8, x4, x1, x2) - -inst_4970: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48600000; valaddr_reg:x3; val_offset:14910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14910*FLEN/8, x4, x1, x2) - -inst_4971: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48700000; valaddr_reg:x3; val_offset:14913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14913*FLEN/8, x4, x1, x2) - -inst_4972: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x48780000; valaddr_reg:x3; val_offset:14916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14916*FLEN/8, x4, x1, x2) - -inst_4973: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487c0000; valaddr_reg:x3; val_offset:14919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14919*FLEN/8, x4, x1, x2) - -inst_4974: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487e0000; valaddr_reg:x3; val_offset:14922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14922*FLEN/8, x4, x1, x2) - -inst_4975: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487f0000; valaddr_reg:x3; val_offset:14925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14925*FLEN/8, x4, x1, x2) - -inst_4976: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487f8000; valaddr_reg:x3; val_offset:14928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14928*FLEN/8, x4, x1, x2) - -inst_4977: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487fc000; valaddr_reg:x3; val_offset:14931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14931*FLEN/8, x4, x1, x2) - -inst_4978: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487fe000; valaddr_reg:x3; val_offset:14934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14934*FLEN/8, x4, x1, x2) - -inst_4979: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487ff000; valaddr_reg:x3; val_offset:14937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14937*FLEN/8, x4, x1, x2) - -inst_4980: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487ff800; valaddr_reg:x3; val_offset:14940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14940*FLEN/8, x4, x1, x2) - -inst_4981: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487ffc00; valaddr_reg:x3; val_offset:14943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14943*FLEN/8, x4, x1, x2) - -inst_4982: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487ffe00; valaddr_reg:x3; val_offset:14946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14946*FLEN/8, x4, x1, x2) - -inst_4983: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487fff00; valaddr_reg:x3; val_offset:14949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14949*FLEN/8, x4, x1, x2) - -inst_4984: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487fff80; valaddr_reg:x3; val_offset:14952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14952*FLEN/8, x4, x1, x2) - -inst_4985: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487fffc0; valaddr_reg:x3; val_offset:14955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14955*FLEN/8, x4, x1, x2) - -inst_4986: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487fffe0; valaddr_reg:x3; val_offset:14958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14958*FLEN/8, x4, x1, x2) - -inst_4987: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487ffff0; valaddr_reg:x3; val_offset:14961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14961*FLEN/8, x4, x1, x2) - -inst_4988: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487ffff8; valaddr_reg:x3; val_offset:14964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14964*FLEN/8, x4, x1, x2) - -inst_4989: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487ffffc; valaddr_reg:x3; val_offset:14967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14967*FLEN/8, x4, x1, x2) - -inst_4990: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487ffffe; valaddr_reg:x3; val_offset:14970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14970*FLEN/8, x4, x1, x2) - -inst_4991: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; -op3val:0x487fffff; valaddr_reg:x3; val_offset:14973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14973*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_40) - -inst_4992: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36000000; valaddr_reg:x3; val_offset:14976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14976*FLEN/8, x4, x1, x2) - -inst_4993: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36000001; valaddr_reg:x3; val_offset:14979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14979*FLEN/8, x4, x1, x2) - -inst_4994: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36000003; valaddr_reg:x3; val_offset:14982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14982*FLEN/8, x4, x1, x2) - -inst_4995: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36000007; valaddr_reg:x3; val_offset:14985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14985*FLEN/8, x4, x1, x2) - -inst_4996: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3600000f; valaddr_reg:x3; val_offset:14988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14988*FLEN/8, x4, x1, x2) - -inst_4997: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3600001f; valaddr_reg:x3; val_offset:14991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14991*FLEN/8, x4, x1, x2) - -inst_4998: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3600003f; valaddr_reg:x3; val_offset:14994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14994*FLEN/8, x4, x1, x2) - -inst_4999: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3600007f; valaddr_reg:x3; val_offset:14997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14997*FLEN/8, x4, x1, x2) - -inst_5000: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x360000ff; valaddr_reg:x3; val_offset:15000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15000*FLEN/8, x4, x1, x2) - -inst_5001: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x360001ff; valaddr_reg:x3; val_offset:15003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15003*FLEN/8, x4, x1, x2) - -inst_5002: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x360003ff; valaddr_reg:x3; val_offset:15006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15006*FLEN/8, x4, x1, x2) - -inst_5003: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x360007ff; valaddr_reg:x3; val_offset:15009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15009*FLEN/8, x4, x1, x2) - -inst_5004: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36000fff; valaddr_reg:x3; val_offset:15012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15012*FLEN/8, x4, x1, x2) - -inst_5005: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36001fff; valaddr_reg:x3; val_offset:15015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15015*FLEN/8, x4, x1, x2) - -inst_5006: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36003fff; valaddr_reg:x3; val_offset:15018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15018*FLEN/8, x4, x1, x2) - -inst_5007: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36007fff; valaddr_reg:x3; val_offset:15021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15021*FLEN/8, x4, x1, x2) - -inst_5008: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3600ffff; valaddr_reg:x3; val_offset:15024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15024*FLEN/8, x4, x1, x2) - -inst_5009: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3601ffff; valaddr_reg:x3; val_offset:15027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15027*FLEN/8, x4, x1, x2) - -inst_5010: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3603ffff; valaddr_reg:x3; val_offset:15030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15030*FLEN/8, x4, x1, x2) - -inst_5011: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3607ffff; valaddr_reg:x3; val_offset:15033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15033*FLEN/8, x4, x1, x2) - -inst_5012: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x360fffff; valaddr_reg:x3; val_offset:15036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15036*FLEN/8, x4, x1, x2) - -inst_5013: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x361fffff; valaddr_reg:x3; val_offset:15039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15039*FLEN/8, x4, x1, x2) - -inst_5014: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x363fffff; valaddr_reg:x3; val_offset:15042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15042*FLEN/8, x4, x1, x2) - -inst_5015: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36400000; valaddr_reg:x3; val_offset:15045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15045*FLEN/8, x4, x1, x2) - -inst_5016: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36600000; valaddr_reg:x3; val_offset:15048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15048*FLEN/8, x4, x1, x2) - -inst_5017: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36700000; valaddr_reg:x3; val_offset:15051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15051*FLEN/8, x4, x1, x2) - -inst_5018: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x36780000; valaddr_reg:x3; val_offset:15054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15054*FLEN/8, x4, x1, x2) - -inst_5019: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367c0000; valaddr_reg:x3; val_offset:15057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15057*FLEN/8, x4, x1, x2) - -inst_5020: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367e0000; valaddr_reg:x3; val_offset:15060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15060*FLEN/8, x4, x1, x2) - -inst_5021: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367f0000; valaddr_reg:x3; val_offset:15063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15063*FLEN/8, x4, x1, x2) - -inst_5022: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367f8000; valaddr_reg:x3; val_offset:15066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15066*FLEN/8, x4, x1, x2) - -inst_5023: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367fc000; valaddr_reg:x3; val_offset:15069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15069*FLEN/8, x4, x1, x2) - -inst_5024: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367fe000; valaddr_reg:x3; val_offset:15072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15072*FLEN/8, x4, x1, x2) - -inst_5025: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367ff000; valaddr_reg:x3; val_offset:15075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15075*FLEN/8, x4, x1, x2) - -inst_5026: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367ff800; valaddr_reg:x3; val_offset:15078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15078*FLEN/8, x4, x1, x2) - -inst_5027: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367ffc00; valaddr_reg:x3; val_offset:15081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15081*FLEN/8, x4, x1, x2) - -inst_5028: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367ffe00; valaddr_reg:x3; val_offset:15084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15084*FLEN/8, x4, x1, x2) - -inst_5029: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367fff00; valaddr_reg:x3; val_offset:15087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15087*FLEN/8, x4, x1, x2) - -inst_5030: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367fff80; valaddr_reg:x3; val_offset:15090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15090*FLEN/8, x4, x1, x2) - -inst_5031: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367fffc0; valaddr_reg:x3; val_offset:15093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15093*FLEN/8, x4, x1, x2) - -inst_5032: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367fffe0; valaddr_reg:x3; val_offset:15096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15096*FLEN/8, x4, x1, x2) - -inst_5033: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367ffff0; valaddr_reg:x3; val_offset:15099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15099*FLEN/8, x4, x1, x2) - -inst_5034: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367ffff8; valaddr_reg:x3; val_offset:15102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15102*FLEN/8, x4, x1, x2) - -inst_5035: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367ffffc; valaddr_reg:x3; val_offset:15105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15105*FLEN/8, x4, x1, x2) - -inst_5036: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367ffffe; valaddr_reg:x3; val_offset:15108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15108*FLEN/8, x4, x1, x2) - -inst_5037: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x367fffff; valaddr_reg:x3; val_offset:15111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15111*FLEN/8, x4, x1, x2) - -inst_5038: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3f800001; valaddr_reg:x3; val_offset:15114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15114*FLEN/8, x4, x1, x2) - -inst_5039: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3f800003; valaddr_reg:x3; val_offset:15117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15117*FLEN/8, x4, x1, x2) - -inst_5040: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3f800007; valaddr_reg:x3; val_offset:15120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15120*FLEN/8, x4, x1, x2) - -inst_5041: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3f999999; valaddr_reg:x3; val_offset:15123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15123*FLEN/8, x4, x1, x2) - -inst_5042: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:15126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15126*FLEN/8, x4, x1, x2) - -inst_5043: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:15129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15129*FLEN/8, x4, x1, x2) - -inst_5044: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:15132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15132*FLEN/8, x4, x1, x2) - -inst_5045: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:15135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15135*FLEN/8, x4, x1, x2) - -inst_5046: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:15138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15138*FLEN/8, x4, x1, x2) - -inst_5047: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:15141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15141*FLEN/8, x4, x1, x2) - -inst_5048: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:15144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15144*FLEN/8, x4, x1, x2) - -inst_5049: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:15147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15147*FLEN/8, x4, x1, x2) - -inst_5050: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:15150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15150*FLEN/8, x4, x1, x2) - -inst_5051: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:15153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15153*FLEN/8, x4, x1, x2) - -inst_5052: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:15156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15156*FLEN/8, x4, x1, x2) - -inst_5053: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:15159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15159*FLEN/8, x4, x1, x2) - -inst_5054: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2800000; valaddr_reg:x3; val_offset:15162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15162*FLEN/8, x4, x1, x2) - -inst_5055: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2800001; valaddr_reg:x3; val_offset:15165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15165*FLEN/8, x4, x1, x2) - -inst_5056: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2800003; valaddr_reg:x3; val_offset:15168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15168*FLEN/8, x4, x1, x2) - -inst_5057: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2800007; valaddr_reg:x3; val_offset:15171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15171*FLEN/8, x4, x1, x2) - -inst_5058: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf280000f; valaddr_reg:x3; val_offset:15174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15174*FLEN/8, x4, x1, x2) - -inst_5059: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf280001f; valaddr_reg:x3; val_offset:15177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15177*FLEN/8, x4, x1, x2) - -inst_5060: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf280003f; valaddr_reg:x3; val_offset:15180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15180*FLEN/8, x4, x1, x2) - -inst_5061: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf280007f; valaddr_reg:x3; val_offset:15183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15183*FLEN/8, x4, x1, x2) - -inst_5062: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf28000ff; valaddr_reg:x3; val_offset:15186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15186*FLEN/8, x4, x1, x2) - -inst_5063: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf28001ff; valaddr_reg:x3; val_offset:15189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15189*FLEN/8, x4, x1, x2) - -inst_5064: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf28003ff; valaddr_reg:x3; val_offset:15192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15192*FLEN/8, x4, x1, x2) - -inst_5065: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf28007ff; valaddr_reg:x3; val_offset:15195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15195*FLEN/8, x4, x1, x2) - -inst_5066: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2800fff; valaddr_reg:x3; val_offset:15198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15198*FLEN/8, x4, x1, x2) - -inst_5067: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2801fff; valaddr_reg:x3; val_offset:15201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15201*FLEN/8, x4, x1, x2) - -inst_5068: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2803fff; valaddr_reg:x3; val_offset:15204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15204*FLEN/8, x4, x1, x2) - -inst_5069: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2807fff; valaddr_reg:x3; val_offset:15207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15207*FLEN/8, x4, x1, x2) - -inst_5070: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf280ffff; valaddr_reg:x3; val_offset:15210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15210*FLEN/8, x4, x1, x2) - -inst_5071: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf281ffff; valaddr_reg:x3; val_offset:15213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15213*FLEN/8, x4, x1, x2) - -inst_5072: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf283ffff; valaddr_reg:x3; val_offset:15216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15216*FLEN/8, x4, x1, x2) - -inst_5073: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf287ffff; valaddr_reg:x3; val_offset:15219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15219*FLEN/8, x4, x1, x2) - -inst_5074: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf28fffff; valaddr_reg:x3; val_offset:15222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15222*FLEN/8, x4, x1, x2) - -inst_5075: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf29fffff; valaddr_reg:x3; val_offset:15225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15225*FLEN/8, x4, x1, x2) - -inst_5076: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2bfffff; valaddr_reg:x3; val_offset:15228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15228*FLEN/8, x4, x1, x2) - -inst_5077: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2c00000; valaddr_reg:x3; val_offset:15231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15231*FLEN/8, x4, x1, x2) - -inst_5078: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2e00000; valaddr_reg:x3; val_offset:15234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15234*FLEN/8, x4, x1, x2) - -inst_5079: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2f00000; valaddr_reg:x3; val_offset:15237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15237*FLEN/8, x4, x1, x2) - -inst_5080: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2f80000; valaddr_reg:x3; val_offset:15240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15240*FLEN/8, x4, x1, x2) - -inst_5081: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fc0000; valaddr_reg:x3; val_offset:15243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15243*FLEN/8, x4, x1, x2) - -inst_5082: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fe0000; valaddr_reg:x3; val_offset:15246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15246*FLEN/8, x4, x1, x2) - -inst_5083: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ff0000; valaddr_reg:x3; val_offset:15249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15249*FLEN/8, x4, x1, x2) - -inst_5084: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ff8000; valaddr_reg:x3; val_offset:15252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15252*FLEN/8, x4, x1, x2) - -inst_5085: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ffc000; valaddr_reg:x3; val_offset:15255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15255*FLEN/8, x4, x1, x2) - -inst_5086: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ffe000; valaddr_reg:x3; val_offset:15258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15258*FLEN/8, x4, x1, x2) - -inst_5087: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fff000; valaddr_reg:x3; val_offset:15261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15261*FLEN/8, x4, x1, x2) - -inst_5088: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fff800; valaddr_reg:x3; val_offset:15264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15264*FLEN/8, x4, x1, x2) - -inst_5089: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fffc00; valaddr_reg:x3; val_offset:15267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15267*FLEN/8, x4, x1, x2) - -inst_5090: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fffe00; valaddr_reg:x3; val_offset:15270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15270*FLEN/8, x4, x1, x2) - -inst_5091: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ffff00; valaddr_reg:x3; val_offset:15273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15273*FLEN/8, x4, x1, x2) - -inst_5092: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ffff80; valaddr_reg:x3; val_offset:15276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15276*FLEN/8, x4, x1, x2) - -inst_5093: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ffffc0; valaddr_reg:x3; val_offset:15279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15279*FLEN/8, x4, x1, x2) - -inst_5094: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ffffe0; valaddr_reg:x3; val_offset:15282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15282*FLEN/8, x4, x1, x2) - -inst_5095: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fffff0; valaddr_reg:x3; val_offset:15285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15285*FLEN/8, x4, x1, x2) - -inst_5096: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fffff8; valaddr_reg:x3; val_offset:15288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15288*FLEN/8, x4, x1, x2) - -inst_5097: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fffffc; valaddr_reg:x3; val_offset:15291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15291*FLEN/8, x4, x1, x2) - -inst_5098: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2fffffe; valaddr_reg:x3; val_offset:15294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15294*FLEN/8, x4, x1, x2) - -inst_5099: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xf2ffffff; valaddr_reg:x3; val_offset:15297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15297*FLEN/8, x4, x1, x2) - -inst_5100: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff000001; valaddr_reg:x3; val_offset:15300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15300*FLEN/8, x4, x1, x2) - -inst_5101: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff000003; valaddr_reg:x3; val_offset:15303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15303*FLEN/8, x4, x1, x2) - -inst_5102: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff000007; valaddr_reg:x3; val_offset:15306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15306*FLEN/8, x4, x1, x2) - -inst_5103: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff199999; valaddr_reg:x3; val_offset:15309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15309*FLEN/8, x4, x1, x2) - -inst_5104: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff249249; valaddr_reg:x3; val_offset:15312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15312*FLEN/8, x4, x1, x2) - -inst_5105: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff333333; valaddr_reg:x3; val_offset:15315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15315*FLEN/8, x4, x1, x2) - -inst_5106: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:15318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15318*FLEN/8, x4, x1, x2) - -inst_5107: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:15321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15321*FLEN/8, x4, x1, x2) - -inst_5108: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff444444; valaddr_reg:x3; val_offset:15324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15324*FLEN/8, x4, x1, x2) - -inst_5109: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:15327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15327*FLEN/8, x4, x1, x2) - -inst_5110: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:15330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15330*FLEN/8, x4, x1, x2) - -inst_5111: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff666666; valaddr_reg:x3; val_offset:15333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15333*FLEN/8, x4, x1, x2) - -inst_5112: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:15336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15336*FLEN/8, x4, x1, x2) - -inst_5113: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:15339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15339*FLEN/8, x4, x1, x2) - -inst_5114: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:15342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15342*FLEN/8, x4, x1, x2) - -inst_5115: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:15345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15345*FLEN/8, x4, x1, x2) - -inst_5116: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62000000; valaddr_reg:x3; val_offset:15348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15348*FLEN/8, x4, x1, x2) - -inst_5117: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62000001; valaddr_reg:x3; val_offset:15351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15351*FLEN/8, x4, x1, x2) - -inst_5118: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62000003; valaddr_reg:x3; val_offset:15354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15354*FLEN/8, x4, x1, x2) - -inst_5119: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62000007; valaddr_reg:x3; val_offset:15357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15357*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_41) - -inst_5120: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x6200000f; valaddr_reg:x3; val_offset:15360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15360*FLEN/8, x4, x1, x2) - -inst_5121: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x6200001f; valaddr_reg:x3; val_offset:15363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15363*FLEN/8, x4, x1, x2) - -inst_5122: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x6200003f; valaddr_reg:x3; val_offset:15366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15366*FLEN/8, x4, x1, x2) - -inst_5123: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x6200007f; valaddr_reg:x3; val_offset:15369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15369*FLEN/8, x4, x1, x2) - -inst_5124: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x620000ff; valaddr_reg:x3; val_offset:15372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15372*FLEN/8, x4, x1, x2) - -inst_5125: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x620001ff; valaddr_reg:x3; val_offset:15375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15375*FLEN/8, x4, x1, x2) - -inst_5126: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x620003ff; valaddr_reg:x3; val_offset:15378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15378*FLEN/8, x4, x1, x2) - -inst_5127: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x620007ff; valaddr_reg:x3; val_offset:15381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15381*FLEN/8, x4, x1, x2) - -inst_5128: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62000fff; valaddr_reg:x3; val_offset:15384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15384*FLEN/8, x4, x1, x2) - -inst_5129: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62001fff; valaddr_reg:x3; val_offset:15387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15387*FLEN/8, x4, x1, x2) - -inst_5130: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62003fff; valaddr_reg:x3; val_offset:15390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15390*FLEN/8, x4, x1, x2) - -inst_5131: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62007fff; valaddr_reg:x3; val_offset:15393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15393*FLEN/8, x4, x1, x2) - -inst_5132: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x6200ffff; valaddr_reg:x3; val_offset:15396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15396*FLEN/8, x4, x1, x2) - -inst_5133: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x6201ffff; valaddr_reg:x3; val_offset:15399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15399*FLEN/8, x4, x1, x2) - -inst_5134: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x6203ffff; valaddr_reg:x3; val_offset:15402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15402*FLEN/8, x4, x1, x2) - -inst_5135: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x6207ffff; valaddr_reg:x3; val_offset:15405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15405*FLEN/8, x4, x1, x2) - -inst_5136: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x620fffff; valaddr_reg:x3; val_offset:15408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15408*FLEN/8, x4, x1, x2) - -inst_5137: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x621fffff; valaddr_reg:x3; val_offset:15411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15411*FLEN/8, x4, x1, x2) - -inst_5138: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x623fffff; valaddr_reg:x3; val_offset:15414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15414*FLEN/8, x4, x1, x2) - -inst_5139: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62400000; valaddr_reg:x3; val_offset:15417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15417*FLEN/8, x4, x1, x2) - -inst_5140: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62600000; valaddr_reg:x3; val_offset:15420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15420*FLEN/8, x4, x1, x2) - -inst_5141: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62700000; valaddr_reg:x3; val_offset:15423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15423*FLEN/8, x4, x1, x2) - -inst_5142: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x62780000; valaddr_reg:x3; val_offset:15426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15426*FLEN/8, x4, x1, x2) - -inst_5143: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627c0000; valaddr_reg:x3; val_offset:15429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15429*FLEN/8, x4, x1, x2) - -inst_5144: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627e0000; valaddr_reg:x3; val_offset:15432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15432*FLEN/8, x4, x1, x2) - -inst_5145: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627f0000; valaddr_reg:x3; val_offset:15435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15435*FLEN/8, x4, x1, x2) - -inst_5146: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627f8000; valaddr_reg:x3; val_offset:15438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15438*FLEN/8, x4, x1, x2) - -inst_5147: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627fc000; valaddr_reg:x3; val_offset:15441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15441*FLEN/8, x4, x1, x2) - -inst_5148: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627fe000; valaddr_reg:x3; val_offset:15444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15444*FLEN/8, x4, x1, x2) - -inst_5149: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627ff000; valaddr_reg:x3; val_offset:15447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15447*FLEN/8, x4, x1, x2) - -inst_5150: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627ff800; valaddr_reg:x3; val_offset:15450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15450*FLEN/8, x4, x1, x2) - -inst_5151: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627ffc00; valaddr_reg:x3; val_offset:15453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15453*FLEN/8, x4, x1, x2) - -inst_5152: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627ffe00; valaddr_reg:x3; val_offset:15456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15456*FLEN/8, x4, x1, x2) - -inst_5153: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627fff00; valaddr_reg:x3; val_offset:15459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15459*FLEN/8, x4, x1, x2) - -inst_5154: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627fff80; valaddr_reg:x3; val_offset:15462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15462*FLEN/8, x4, x1, x2) - -inst_5155: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627fffc0; valaddr_reg:x3; val_offset:15465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15465*FLEN/8, x4, x1, x2) - -inst_5156: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627fffe0; valaddr_reg:x3; val_offset:15468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15468*FLEN/8, x4, x1, x2) - -inst_5157: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627ffff0; valaddr_reg:x3; val_offset:15471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15471*FLEN/8, x4, x1, x2) - -inst_5158: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627ffff8; valaddr_reg:x3; val_offset:15474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15474*FLEN/8, x4, x1, x2) - -inst_5159: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627ffffc; valaddr_reg:x3; val_offset:15477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15477*FLEN/8, x4, x1, x2) - -inst_5160: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627ffffe; valaddr_reg:x3; val_offset:15480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15480*FLEN/8, x4, x1, x2) - -inst_5161: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x627fffff; valaddr_reg:x3; val_offset:15483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15483*FLEN/8, x4, x1, x2) - -inst_5162: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f000001; valaddr_reg:x3; val_offset:15486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15486*FLEN/8, x4, x1, x2) - -inst_5163: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f000003; valaddr_reg:x3; val_offset:15489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15489*FLEN/8, x4, x1, x2) - -inst_5164: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f000007; valaddr_reg:x3; val_offset:15492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15492*FLEN/8, x4, x1, x2) - -inst_5165: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f199999; valaddr_reg:x3; val_offset:15495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15495*FLEN/8, x4, x1, x2) - -inst_5166: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f249249; valaddr_reg:x3; val_offset:15498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15498*FLEN/8, x4, x1, x2) - -inst_5167: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f333333; valaddr_reg:x3; val_offset:15501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15501*FLEN/8, x4, x1, x2) - -inst_5168: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:15504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15504*FLEN/8, x4, x1, x2) - -inst_5169: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:15507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15507*FLEN/8, x4, x1, x2) - -inst_5170: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f444444; valaddr_reg:x3; val_offset:15510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15510*FLEN/8, x4, x1, x2) - -inst_5171: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:15513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15513*FLEN/8, x4, x1, x2) - -inst_5172: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:15516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15516*FLEN/8, x4, x1, x2) - -inst_5173: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f666666; valaddr_reg:x3; val_offset:15519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15519*FLEN/8, x4, x1, x2) - -inst_5174: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:15522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15522*FLEN/8, x4, x1, x2) - -inst_5175: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:15525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15525*FLEN/8, x4, x1, x2) - -inst_5176: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:15528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15528*FLEN/8, x4, x1, x2) - -inst_5177: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:15531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15531*FLEN/8, x4, x1, x2) - -inst_5178: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:15534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15534*FLEN/8, x4, x1, x2) - -inst_5179: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:15537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15537*FLEN/8, x4, x1, x2) - -inst_5180: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:15540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15540*FLEN/8, x4, x1, x2) - -inst_5181: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:15543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15543*FLEN/8, x4, x1, x2) - -inst_5182: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:15546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15546*FLEN/8, x4, x1, x2) - -inst_5183: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:15549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15549*FLEN/8, x4, x1, x2) - -inst_5184: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:15552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15552*FLEN/8, x4, x1, x2) - -inst_5185: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:15555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15555*FLEN/8, x4, x1, x2) - -inst_5186: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:15558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15558*FLEN/8, x4, x1, x2) - -inst_5187: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:15561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15561*FLEN/8, x4, x1, x2) - -inst_5188: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:15564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15564*FLEN/8, x4, x1, x2) - -inst_5189: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:15567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15567*FLEN/8, x4, x1, x2) - -inst_5190: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:15570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15570*FLEN/8, x4, x1, x2) - -inst_5191: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:15573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15573*FLEN/8, x4, x1, x2) - -inst_5192: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:15576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15576*FLEN/8, x4, x1, x2) - -inst_5193: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:15579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15579*FLEN/8, x4, x1, x2) - -inst_5194: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe000000; valaddr_reg:x3; val_offset:15582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15582*FLEN/8, x4, x1, x2) - -inst_5195: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe000001; valaddr_reg:x3; val_offset:15585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15585*FLEN/8, x4, x1, x2) - -inst_5196: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe000003; valaddr_reg:x3; val_offset:15588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15588*FLEN/8, x4, x1, x2) - -inst_5197: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe000007; valaddr_reg:x3; val_offset:15591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15591*FLEN/8, x4, x1, x2) - -inst_5198: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe00000f; valaddr_reg:x3; val_offset:15594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15594*FLEN/8, x4, x1, x2) - -inst_5199: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe00001f; valaddr_reg:x3; val_offset:15597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15597*FLEN/8, x4, x1, x2) - -inst_5200: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe00003f; valaddr_reg:x3; val_offset:15600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15600*FLEN/8, x4, x1, x2) - -inst_5201: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe00007f; valaddr_reg:x3; val_offset:15603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15603*FLEN/8, x4, x1, x2) - -inst_5202: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe0000ff; valaddr_reg:x3; val_offset:15606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15606*FLEN/8, x4, x1, x2) - -inst_5203: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe0001ff; valaddr_reg:x3; val_offset:15609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15609*FLEN/8, x4, x1, x2) - -inst_5204: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe0003ff; valaddr_reg:x3; val_offset:15612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15612*FLEN/8, x4, x1, x2) - -inst_5205: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe0007ff; valaddr_reg:x3; val_offset:15615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15615*FLEN/8, x4, x1, x2) - -inst_5206: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe000fff; valaddr_reg:x3; val_offset:15618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15618*FLEN/8, x4, x1, x2) - -inst_5207: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe001fff; valaddr_reg:x3; val_offset:15621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15621*FLEN/8, x4, x1, x2) - -inst_5208: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe003fff; valaddr_reg:x3; val_offset:15624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15624*FLEN/8, x4, x1, x2) - -inst_5209: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe007fff; valaddr_reg:x3; val_offset:15627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15627*FLEN/8, x4, x1, x2) - -inst_5210: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe00ffff; valaddr_reg:x3; val_offset:15630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15630*FLEN/8, x4, x1, x2) - -inst_5211: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe01ffff; valaddr_reg:x3; val_offset:15633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15633*FLEN/8, x4, x1, x2) - -inst_5212: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe03ffff; valaddr_reg:x3; val_offset:15636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15636*FLEN/8, x4, x1, x2) - -inst_5213: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe07ffff; valaddr_reg:x3; val_offset:15639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15639*FLEN/8, x4, x1, x2) - -inst_5214: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe0fffff; valaddr_reg:x3; val_offset:15642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15642*FLEN/8, x4, x1, x2) - -inst_5215: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe1fffff; valaddr_reg:x3; val_offset:15645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15645*FLEN/8, x4, x1, x2) - -inst_5216: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe3fffff; valaddr_reg:x3; val_offset:15648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15648*FLEN/8, x4, x1, x2) - -inst_5217: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe400000; valaddr_reg:x3; val_offset:15651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15651*FLEN/8, x4, x1, x2) - -inst_5218: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe600000; valaddr_reg:x3; val_offset:15654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15654*FLEN/8, x4, x1, x2) - -inst_5219: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe700000; valaddr_reg:x3; val_offset:15657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15657*FLEN/8, x4, x1, x2) - -inst_5220: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe780000; valaddr_reg:x3; val_offset:15660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15660*FLEN/8, x4, x1, x2) - -inst_5221: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7c0000; valaddr_reg:x3; val_offset:15663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15663*FLEN/8, x4, x1, x2) - -inst_5222: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7e0000; valaddr_reg:x3; val_offset:15666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15666*FLEN/8, x4, x1, x2) - -inst_5223: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7f0000; valaddr_reg:x3; val_offset:15669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15669*FLEN/8, x4, x1, x2) - -inst_5224: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7f8000; valaddr_reg:x3; val_offset:15672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15672*FLEN/8, x4, x1, x2) - -inst_5225: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7fc000; valaddr_reg:x3; val_offset:15675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15675*FLEN/8, x4, x1, x2) - -inst_5226: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7fe000; valaddr_reg:x3; val_offset:15678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15678*FLEN/8, x4, x1, x2) - -inst_5227: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7ff000; valaddr_reg:x3; val_offset:15681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15681*FLEN/8, x4, x1, x2) - -inst_5228: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7ff800; valaddr_reg:x3; val_offset:15684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15684*FLEN/8, x4, x1, x2) - -inst_5229: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7ffc00; valaddr_reg:x3; val_offset:15687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15687*FLEN/8, x4, x1, x2) - -inst_5230: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7ffe00; valaddr_reg:x3; val_offset:15690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15690*FLEN/8, x4, x1, x2) - -inst_5231: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7fff00; valaddr_reg:x3; val_offset:15693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15693*FLEN/8, x4, x1, x2) - -inst_5232: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7fff80; valaddr_reg:x3; val_offset:15696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15696*FLEN/8, x4, x1, x2) - -inst_5233: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7fffc0; valaddr_reg:x3; val_offset:15699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15699*FLEN/8, x4, x1, x2) - -inst_5234: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7fffe0; valaddr_reg:x3; val_offset:15702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15702*FLEN/8, x4, x1, x2) - -inst_5235: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7ffff0; valaddr_reg:x3; val_offset:15705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15705*FLEN/8, x4, x1, x2) - -inst_5236: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7ffff8; valaddr_reg:x3; val_offset:15708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15708*FLEN/8, x4, x1, x2) - -inst_5237: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7ffffc; valaddr_reg:x3; val_offset:15711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15711*FLEN/8, x4, x1, x2) - -inst_5238: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7ffffe; valaddr_reg:x3; val_offset:15714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15714*FLEN/8, x4, x1, x2) - -inst_5239: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; -op3val:0xe7fffff; valaddr_reg:x3; val_offset:15717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15717*FLEN/8, x4, x1, x2) - -inst_5240: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34800000; valaddr_reg:x3; val_offset:15720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15720*FLEN/8, x4, x1, x2) - -inst_5241: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34800001; valaddr_reg:x3; val_offset:15723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15723*FLEN/8, x4, x1, x2) - -inst_5242: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34800003; valaddr_reg:x3; val_offset:15726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15726*FLEN/8, x4, x1, x2) - -inst_5243: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34800007; valaddr_reg:x3; val_offset:15729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15729*FLEN/8, x4, x1, x2) - -inst_5244: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3480000f; valaddr_reg:x3; val_offset:15732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15732*FLEN/8, x4, x1, x2) - -inst_5245: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3480001f; valaddr_reg:x3; val_offset:15735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15735*FLEN/8, x4, x1, x2) - -inst_5246: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3480003f; valaddr_reg:x3; val_offset:15738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15738*FLEN/8, x4, x1, x2) - -inst_5247: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3480007f; valaddr_reg:x3; val_offset:15741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15741*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_42) - -inst_5248: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x348000ff; valaddr_reg:x3; val_offset:15744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15744*FLEN/8, x4, x1, x2) - -inst_5249: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x348001ff; valaddr_reg:x3; val_offset:15747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15747*FLEN/8, x4, x1, x2) - -inst_5250: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x348003ff; valaddr_reg:x3; val_offset:15750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15750*FLEN/8, x4, x1, x2) - -inst_5251: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x348007ff; valaddr_reg:x3; val_offset:15753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15753*FLEN/8, x4, x1, x2) - -inst_5252: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34800fff; valaddr_reg:x3; val_offset:15756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15756*FLEN/8, x4, x1, x2) - -inst_5253: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34801fff; valaddr_reg:x3; val_offset:15759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15759*FLEN/8, x4, x1, x2) - -inst_5254: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34803fff; valaddr_reg:x3; val_offset:15762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15762*FLEN/8, x4, x1, x2) - -inst_5255: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34807fff; valaddr_reg:x3; val_offset:15765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15765*FLEN/8, x4, x1, x2) - -inst_5256: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3480ffff; valaddr_reg:x3; val_offset:15768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15768*FLEN/8, x4, x1, x2) - -inst_5257: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3481ffff; valaddr_reg:x3; val_offset:15771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15771*FLEN/8, x4, x1, x2) - -inst_5258: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3483ffff; valaddr_reg:x3; val_offset:15774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15774*FLEN/8, x4, x1, x2) - -inst_5259: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3487ffff; valaddr_reg:x3; val_offset:15777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15777*FLEN/8, x4, x1, x2) - -inst_5260: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x348fffff; valaddr_reg:x3; val_offset:15780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15780*FLEN/8, x4, x1, x2) - -inst_5261: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x349fffff; valaddr_reg:x3; val_offset:15783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15783*FLEN/8, x4, x1, x2) - -inst_5262: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34bfffff; valaddr_reg:x3; val_offset:15786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15786*FLEN/8, x4, x1, x2) - -inst_5263: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34c00000; valaddr_reg:x3; val_offset:15789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15789*FLEN/8, x4, x1, x2) - -inst_5264: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34e00000; valaddr_reg:x3; val_offset:15792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15792*FLEN/8, x4, x1, x2) - -inst_5265: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34f00000; valaddr_reg:x3; val_offset:15795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15795*FLEN/8, x4, x1, x2) - -inst_5266: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34f80000; valaddr_reg:x3; val_offset:15798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15798*FLEN/8, x4, x1, x2) - -inst_5267: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fc0000; valaddr_reg:x3; val_offset:15801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15801*FLEN/8, x4, x1, x2) - -inst_5268: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fe0000; valaddr_reg:x3; val_offset:15804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15804*FLEN/8, x4, x1, x2) - -inst_5269: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ff0000; valaddr_reg:x3; val_offset:15807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15807*FLEN/8, x4, x1, x2) - -inst_5270: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ff8000; valaddr_reg:x3; val_offset:15810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15810*FLEN/8, x4, x1, x2) - -inst_5271: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ffc000; valaddr_reg:x3; val_offset:15813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15813*FLEN/8, x4, x1, x2) - -inst_5272: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ffe000; valaddr_reg:x3; val_offset:15816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15816*FLEN/8, x4, x1, x2) - -inst_5273: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fff000; valaddr_reg:x3; val_offset:15819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15819*FLEN/8, x4, x1, x2) - -inst_5274: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fff800; valaddr_reg:x3; val_offset:15822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15822*FLEN/8, x4, x1, x2) - -inst_5275: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fffc00; valaddr_reg:x3; val_offset:15825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15825*FLEN/8, x4, x1, x2) - -inst_5276: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fffe00; valaddr_reg:x3; val_offset:15828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15828*FLEN/8, x4, x1, x2) - -inst_5277: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ffff00; valaddr_reg:x3; val_offset:15831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15831*FLEN/8, x4, x1, x2) - -inst_5278: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ffff80; valaddr_reg:x3; val_offset:15834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15834*FLEN/8, x4, x1, x2) - -inst_5279: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ffffc0; valaddr_reg:x3; val_offset:15837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15837*FLEN/8, x4, x1, x2) - -inst_5280: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ffffe0; valaddr_reg:x3; val_offset:15840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15840*FLEN/8, x4, x1, x2) - -inst_5281: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fffff0; valaddr_reg:x3; val_offset:15843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15843*FLEN/8, x4, x1, x2) - -inst_5282: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fffff8; valaddr_reg:x3; val_offset:15846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15846*FLEN/8, x4, x1, x2) - -inst_5283: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fffffc; valaddr_reg:x3; val_offset:15849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15849*FLEN/8, x4, x1, x2) - -inst_5284: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34fffffe; valaddr_reg:x3; val_offset:15852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15852*FLEN/8, x4, x1, x2) - -inst_5285: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x34ffffff; valaddr_reg:x3; val_offset:15855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15855*FLEN/8, x4, x1, x2) - -inst_5286: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3f800001; valaddr_reg:x3; val_offset:15858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15858*FLEN/8, x4, x1, x2) - -inst_5287: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3f800003; valaddr_reg:x3; val_offset:15861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15861*FLEN/8, x4, x1, x2) - -inst_5288: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3f800007; valaddr_reg:x3; val_offset:15864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15864*FLEN/8, x4, x1, x2) - -inst_5289: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3f999999; valaddr_reg:x3; val_offset:15867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15867*FLEN/8, x4, x1, x2) - -inst_5290: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:15870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15870*FLEN/8, x4, x1, x2) - -inst_5291: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:15873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15873*FLEN/8, x4, x1, x2) - -inst_5292: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:15876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15876*FLEN/8, x4, x1, x2) - -inst_5293: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:15879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15879*FLEN/8, x4, x1, x2) - -inst_5294: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:15882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15882*FLEN/8, x4, x1, x2) - -inst_5295: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:15885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15885*FLEN/8, x4, x1, x2) - -inst_5296: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:15888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15888*FLEN/8, x4, x1, x2) - -inst_5297: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:15891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15891*FLEN/8, x4, x1, x2) - -inst_5298: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:15894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15894*FLEN/8, x4, x1, x2) - -inst_5299: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:15897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15897*FLEN/8, x4, x1, x2) - -inst_5300: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:15900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15900*FLEN/8, x4, x1, x2) - -inst_5301: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:15903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15903*FLEN/8, x4, x1, x2) - -inst_5302: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74800000; valaddr_reg:x3; val_offset:15906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15906*FLEN/8, x4, x1, x2) - -inst_5303: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74800001; valaddr_reg:x3; val_offset:15909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15909*FLEN/8, x4, x1, x2) - -inst_5304: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74800003; valaddr_reg:x3; val_offset:15912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15912*FLEN/8, x4, x1, x2) - -inst_5305: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74800007; valaddr_reg:x3; val_offset:15915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15915*FLEN/8, x4, x1, x2) - -inst_5306: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7480000f; valaddr_reg:x3; val_offset:15918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15918*FLEN/8, x4, x1, x2) - -inst_5307: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7480001f; valaddr_reg:x3; val_offset:15921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15921*FLEN/8, x4, x1, x2) - -inst_5308: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7480003f; valaddr_reg:x3; val_offset:15924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15924*FLEN/8, x4, x1, x2) - -inst_5309: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7480007f; valaddr_reg:x3; val_offset:15927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15927*FLEN/8, x4, x1, x2) - -inst_5310: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x748000ff; valaddr_reg:x3; val_offset:15930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15930*FLEN/8, x4, x1, x2) - -inst_5311: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x748001ff; valaddr_reg:x3; val_offset:15933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15933*FLEN/8, x4, x1, x2) - -inst_5312: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x748003ff; valaddr_reg:x3; val_offset:15936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15936*FLEN/8, x4, x1, x2) - -inst_5313: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x748007ff; valaddr_reg:x3; val_offset:15939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15939*FLEN/8, x4, x1, x2) - -inst_5314: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74800fff; valaddr_reg:x3; val_offset:15942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15942*FLEN/8, x4, x1, x2) - -inst_5315: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74801fff; valaddr_reg:x3; val_offset:15945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15945*FLEN/8, x4, x1, x2) - -inst_5316: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74803fff; valaddr_reg:x3; val_offset:15948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15948*FLEN/8, x4, x1, x2) - -inst_5317: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74807fff; valaddr_reg:x3; val_offset:15951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15951*FLEN/8, x4, x1, x2) - -inst_5318: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7480ffff; valaddr_reg:x3; val_offset:15954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15954*FLEN/8, x4, x1, x2) - -inst_5319: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7481ffff; valaddr_reg:x3; val_offset:15957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15957*FLEN/8, x4, x1, x2) - -inst_5320: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7483ffff; valaddr_reg:x3; val_offset:15960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15960*FLEN/8, x4, x1, x2) - -inst_5321: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7487ffff; valaddr_reg:x3; val_offset:15963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15963*FLEN/8, x4, x1, x2) - -inst_5322: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x748fffff; valaddr_reg:x3; val_offset:15966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15966*FLEN/8, x4, x1, x2) - -inst_5323: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x749fffff; valaddr_reg:x3; val_offset:15969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15969*FLEN/8, x4, x1, x2) - -inst_5324: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74bfffff; valaddr_reg:x3; val_offset:15972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15972*FLEN/8, x4, x1, x2) - -inst_5325: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74c00000; valaddr_reg:x3; val_offset:15975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15975*FLEN/8, x4, x1, x2) - -inst_5326: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74e00000; valaddr_reg:x3; val_offset:15978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15978*FLEN/8, x4, x1, x2) - -inst_5327: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74f00000; valaddr_reg:x3; val_offset:15981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15981*FLEN/8, x4, x1, x2) - -inst_5328: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74f80000; valaddr_reg:x3; val_offset:15984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15984*FLEN/8, x4, x1, x2) - -inst_5329: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fc0000; valaddr_reg:x3; val_offset:15987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15987*FLEN/8, x4, x1, x2) - -inst_5330: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fe0000; valaddr_reg:x3; val_offset:15990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15990*FLEN/8, x4, x1, x2) - -inst_5331: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ff0000; valaddr_reg:x3; val_offset:15993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15993*FLEN/8, x4, x1, x2) - -inst_5332: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ff8000; valaddr_reg:x3; val_offset:15996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15996*FLEN/8, x4, x1, x2) - -inst_5333: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ffc000; valaddr_reg:x3; val_offset:15999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15999*FLEN/8, x4, x1, x2) - -inst_5334: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ffe000; valaddr_reg:x3; val_offset:16002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16002*FLEN/8, x4, x1, x2) - -inst_5335: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fff000; valaddr_reg:x3; val_offset:16005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16005*FLEN/8, x4, x1, x2) - -inst_5336: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fff800; valaddr_reg:x3; val_offset:16008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16008*FLEN/8, x4, x1, x2) - -inst_5337: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fffc00; valaddr_reg:x3; val_offset:16011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16011*FLEN/8, x4, x1, x2) - -inst_5338: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fffe00; valaddr_reg:x3; val_offset:16014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16014*FLEN/8, x4, x1, x2) - -inst_5339: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ffff00; valaddr_reg:x3; val_offset:16017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16017*FLEN/8, x4, x1, x2) - -inst_5340: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ffff80; valaddr_reg:x3; val_offset:16020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16020*FLEN/8, x4, x1, x2) - -inst_5341: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ffffc0; valaddr_reg:x3; val_offset:16023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16023*FLEN/8, x4, x1, x2) - -inst_5342: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ffffe0; valaddr_reg:x3; val_offset:16026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16026*FLEN/8, x4, x1, x2) - -inst_5343: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fffff0; valaddr_reg:x3; val_offset:16029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16029*FLEN/8, x4, x1, x2) - -inst_5344: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fffff8; valaddr_reg:x3; val_offset:16032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16032*FLEN/8, x4, x1, x2) - -inst_5345: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fffffc; valaddr_reg:x3; val_offset:16035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16035*FLEN/8, x4, x1, x2) - -inst_5346: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74fffffe; valaddr_reg:x3; val_offset:16038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16038*FLEN/8, x4, x1, x2) - -inst_5347: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x74ffffff; valaddr_reg:x3; val_offset:16041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16041*FLEN/8, x4, x1, x2) - -inst_5348: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f000001; valaddr_reg:x3; val_offset:16044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16044*FLEN/8, x4, x1, x2) - -inst_5349: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f000003; valaddr_reg:x3; val_offset:16047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16047*FLEN/8, x4, x1, x2) - -inst_5350: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f000007; valaddr_reg:x3; val_offset:16050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16050*FLEN/8, x4, x1, x2) - -inst_5351: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f199999; valaddr_reg:x3; val_offset:16053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16053*FLEN/8, x4, x1, x2) - -inst_5352: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f249249; valaddr_reg:x3; val_offset:16056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16056*FLEN/8, x4, x1, x2) - -inst_5353: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f333333; valaddr_reg:x3; val_offset:16059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16059*FLEN/8, x4, x1, x2) - -inst_5354: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:16062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16062*FLEN/8, x4, x1, x2) - -inst_5355: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:16065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16065*FLEN/8, x4, x1, x2) - -inst_5356: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f444444; valaddr_reg:x3; val_offset:16068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16068*FLEN/8, x4, x1, x2) - -inst_5357: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:16071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16071*FLEN/8, x4, x1, x2) - -inst_5358: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:16074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16074*FLEN/8, x4, x1, x2) - -inst_5359: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f666666; valaddr_reg:x3; val_offset:16077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16077*FLEN/8, x4, x1, x2) - -inst_5360: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:16080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16080*FLEN/8, x4, x1, x2) - -inst_5361: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:16083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16083*FLEN/8, x4, x1, x2) - -inst_5362: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:16086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16086*FLEN/8, x4, x1, x2) - -inst_5363: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:16089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16089*FLEN/8, x4, x1, x2) - -inst_5364: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:16092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16092*FLEN/8, x4, x1, x2) - -inst_5365: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:16095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16095*FLEN/8, x4, x1, x2) - -inst_5366: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:16098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16098*FLEN/8, x4, x1, x2) - -inst_5367: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:16101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16101*FLEN/8, x4, x1, x2) - -inst_5368: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:16104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16104*FLEN/8, x4, x1, x2) - -inst_5369: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:16107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16107*FLEN/8, x4, x1, x2) - -inst_5370: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:16110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16110*FLEN/8, x4, x1, x2) - -inst_5371: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:16113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16113*FLEN/8, x4, x1, x2) - -inst_5372: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:16116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16116*FLEN/8, x4, x1, x2) - -inst_5373: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:16119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16119*FLEN/8, x4, x1, x2) - -inst_5374: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:16122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16122*FLEN/8, x4, x1, x2) - -inst_5375: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:16125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16125*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_43) - -inst_5376: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:16128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16128*FLEN/8, x4, x1, x2) - -inst_5377: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:16131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16131*FLEN/8, x4, x1, x2) - -inst_5378: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:16134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16134*FLEN/8, x4, x1, x2) - -inst_5379: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:16137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16137*FLEN/8, x4, x1, x2) - -inst_5380: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10000000; valaddr_reg:x3; val_offset:16140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16140*FLEN/8, x4, x1, x2) - -inst_5381: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10000001; valaddr_reg:x3; val_offset:16143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16143*FLEN/8, x4, x1, x2) - -inst_5382: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10000003; valaddr_reg:x3; val_offset:16146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16146*FLEN/8, x4, x1, x2) - -inst_5383: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10000007; valaddr_reg:x3; val_offset:16149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16149*FLEN/8, x4, x1, x2) - -inst_5384: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x1000000f; valaddr_reg:x3; val_offset:16152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16152*FLEN/8, x4, x1, x2) - -inst_5385: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x1000001f; valaddr_reg:x3; val_offset:16155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16155*FLEN/8, x4, x1, x2) - -inst_5386: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x1000003f; valaddr_reg:x3; val_offset:16158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16158*FLEN/8, x4, x1, x2) - -inst_5387: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x1000007f; valaddr_reg:x3; val_offset:16161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16161*FLEN/8, x4, x1, x2) - -inst_5388: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x100000ff; valaddr_reg:x3; val_offset:16164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16164*FLEN/8, x4, x1, x2) - -inst_5389: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x100001ff; valaddr_reg:x3; val_offset:16167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16167*FLEN/8, x4, x1, x2) - -inst_5390: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x100003ff; valaddr_reg:x3; val_offset:16170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16170*FLEN/8, x4, x1, x2) - -inst_5391: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x100007ff; valaddr_reg:x3; val_offset:16173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16173*FLEN/8, x4, x1, x2) - -inst_5392: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10000fff; valaddr_reg:x3; val_offset:16176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16176*FLEN/8, x4, x1, x2) - -inst_5393: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10001fff; valaddr_reg:x3; val_offset:16179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16179*FLEN/8, x4, x1, x2) - -inst_5394: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10003fff; valaddr_reg:x3; val_offset:16182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16182*FLEN/8, x4, x1, x2) - -inst_5395: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10007fff; valaddr_reg:x3; val_offset:16185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16185*FLEN/8, x4, x1, x2) - -inst_5396: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x1000ffff; valaddr_reg:x3; val_offset:16188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16188*FLEN/8, x4, x1, x2) - -inst_5397: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x1001ffff; valaddr_reg:x3; val_offset:16191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16191*FLEN/8, x4, x1, x2) - -inst_5398: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x1003ffff; valaddr_reg:x3; val_offset:16194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16194*FLEN/8, x4, x1, x2) - -inst_5399: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x1007ffff; valaddr_reg:x3; val_offset:16197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16197*FLEN/8, x4, x1, x2) - -inst_5400: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x100fffff; valaddr_reg:x3; val_offset:16200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16200*FLEN/8, x4, x1, x2) - -inst_5401: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x101fffff; valaddr_reg:x3; val_offset:16203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16203*FLEN/8, x4, x1, x2) - -inst_5402: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x103fffff; valaddr_reg:x3; val_offset:16206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16206*FLEN/8, x4, x1, x2) - -inst_5403: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10400000; valaddr_reg:x3; val_offset:16209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16209*FLEN/8, x4, x1, x2) - -inst_5404: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10600000; valaddr_reg:x3; val_offset:16212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16212*FLEN/8, x4, x1, x2) - -inst_5405: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10700000; valaddr_reg:x3; val_offset:16215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16215*FLEN/8, x4, x1, x2) - -inst_5406: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x10780000; valaddr_reg:x3; val_offset:16218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16218*FLEN/8, x4, x1, x2) - -inst_5407: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107c0000; valaddr_reg:x3; val_offset:16221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16221*FLEN/8, x4, x1, x2) - -inst_5408: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107e0000; valaddr_reg:x3; val_offset:16224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16224*FLEN/8, x4, x1, x2) - -inst_5409: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107f0000; valaddr_reg:x3; val_offset:16227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16227*FLEN/8, x4, x1, x2) - -inst_5410: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107f8000; valaddr_reg:x3; val_offset:16230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16230*FLEN/8, x4, x1, x2) - -inst_5411: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107fc000; valaddr_reg:x3; val_offset:16233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16233*FLEN/8, x4, x1, x2) - -inst_5412: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107fe000; valaddr_reg:x3; val_offset:16236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16236*FLEN/8, x4, x1, x2) - -inst_5413: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107ff000; valaddr_reg:x3; val_offset:16239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16239*FLEN/8, x4, x1, x2) - -inst_5414: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107ff800; valaddr_reg:x3; val_offset:16242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16242*FLEN/8, x4, x1, x2) - -inst_5415: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107ffc00; valaddr_reg:x3; val_offset:16245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16245*FLEN/8, x4, x1, x2) - -inst_5416: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107ffe00; valaddr_reg:x3; val_offset:16248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16248*FLEN/8, x4, x1, x2) - -inst_5417: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107fff00; valaddr_reg:x3; val_offset:16251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16251*FLEN/8, x4, x1, x2) - -inst_5418: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107fff80; valaddr_reg:x3; val_offset:16254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16254*FLEN/8, x4, x1, x2) - -inst_5419: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107fffc0; valaddr_reg:x3; val_offset:16257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16257*FLEN/8, x4, x1, x2) - -inst_5420: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107fffe0; valaddr_reg:x3; val_offset:16260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16260*FLEN/8, x4, x1, x2) - -inst_5421: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107ffff0; valaddr_reg:x3; val_offset:16263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16263*FLEN/8, x4, x1, x2) - -inst_5422: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107ffff8; valaddr_reg:x3; val_offset:16266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16266*FLEN/8, x4, x1, x2) - -inst_5423: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107ffffc; valaddr_reg:x3; val_offset:16269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16269*FLEN/8, x4, x1, x2) - -inst_5424: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107ffffe; valaddr_reg:x3; val_offset:16272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16272*FLEN/8, x4, x1, x2) - -inst_5425: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; -op3val:0x107fffff; valaddr_reg:x3; val_offset:16275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16275*FLEN/8, x4, x1, x2) - -inst_5426: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20000000; valaddr_reg:x3; val_offset:16278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16278*FLEN/8, x4, x1, x2) - -inst_5427: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20000001; valaddr_reg:x3; val_offset:16281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16281*FLEN/8, x4, x1, x2) - -inst_5428: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20000003; valaddr_reg:x3; val_offset:16284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16284*FLEN/8, x4, x1, x2) - -inst_5429: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20000007; valaddr_reg:x3; val_offset:16287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16287*FLEN/8, x4, x1, x2) - -inst_5430: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x2000000f; valaddr_reg:x3; val_offset:16290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16290*FLEN/8, x4, x1, x2) - -inst_5431: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x2000001f; valaddr_reg:x3; val_offset:16293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16293*FLEN/8, x4, x1, x2) - -inst_5432: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x2000003f; valaddr_reg:x3; val_offset:16296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16296*FLEN/8, x4, x1, x2) - -inst_5433: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x2000007f; valaddr_reg:x3; val_offset:16299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16299*FLEN/8, x4, x1, x2) - -inst_5434: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x200000ff; valaddr_reg:x3; val_offset:16302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16302*FLEN/8, x4, x1, x2) - -inst_5435: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x200001ff; valaddr_reg:x3; val_offset:16305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16305*FLEN/8, x4, x1, x2) - -inst_5436: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x200003ff; valaddr_reg:x3; val_offset:16308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16308*FLEN/8, x4, x1, x2) - -inst_5437: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x200007ff; valaddr_reg:x3; val_offset:16311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16311*FLEN/8, x4, x1, x2) - -inst_5438: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20000fff; valaddr_reg:x3; val_offset:16314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16314*FLEN/8, x4, x1, x2) - -inst_5439: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20001fff; valaddr_reg:x3; val_offset:16317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16317*FLEN/8, x4, x1, x2) - -inst_5440: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20003fff; valaddr_reg:x3; val_offset:16320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16320*FLEN/8, x4, x1, x2) - -inst_5441: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20007fff; valaddr_reg:x3; val_offset:16323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16323*FLEN/8, x4, x1, x2) - -inst_5442: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x2000ffff; valaddr_reg:x3; val_offset:16326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16326*FLEN/8, x4, x1, x2) - -inst_5443: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x2001ffff; valaddr_reg:x3; val_offset:16329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16329*FLEN/8, x4, x1, x2) - -inst_5444: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x2003ffff; valaddr_reg:x3; val_offset:16332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16332*FLEN/8, x4, x1, x2) - -inst_5445: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x2007ffff; valaddr_reg:x3; val_offset:16335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16335*FLEN/8, x4, x1, x2) - -inst_5446: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x200fffff; valaddr_reg:x3; val_offset:16338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16338*FLEN/8, x4, x1, x2) - -inst_5447: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x201fffff; valaddr_reg:x3; val_offset:16341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16341*FLEN/8, x4, x1, x2) - -inst_5448: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x203fffff; valaddr_reg:x3; val_offset:16344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16344*FLEN/8, x4, x1, x2) - -inst_5449: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20400000; valaddr_reg:x3; val_offset:16347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16347*FLEN/8, x4, x1, x2) - -inst_5450: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20600000; valaddr_reg:x3; val_offset:16350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16350*FLEN/8, x4, x1, x2) - -inst_5451: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20700000; valaddr_reg:x3; val_offset:16353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16353*FLEN/8, x4, x1, x2) - -inst_5452: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x20780000; valaddr_reg:x3; val_offset:16356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16356*FLEN/8, x4, x1, x2) - -inst_5453: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207c0000; valaddr_reg:x3; val_offset:16359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16359*FLEN/8, x4, x1, x2) - -inst_5454: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207e0000; valaddr_reg:x3; val_offset:16362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16362*FLEN/8, x4, x1, x2) - -inst_5455: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207f0000; valaddr_reg:x3; val_offset:16365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16365*FLEN/8, x4, x1, x2) - -inst_5456: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207f8000; valaddr_reg:x3; val_offset:16368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16368*FLEN/8, x4, x1, x2) - -inst_5457: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207fc000; valaddr_reg:x3; val_offset:16371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16371*FLEN/8, x4, x1, x2) - -inst_5458: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207fe000; valaddr_reg:x3; val_offset:16374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16374*FLEN/8, x4, x1, x2) - -inst_5459: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207ff000; valaddr_reg:x3; val_offset:16377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16377*FLEN/8, x4, x1, x2) - -inst_5460: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207ff800; valaddr_reg:x3; val_offset:16380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16380*FLEN/8, x4, x1, x2) - -inst_5461: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207ffc00; valaddr_reg:x3; val_offset:16383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16383*FLEN/8, x4, x1, x2) - -inst_5462: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207ffe00; valaddr_reg:x3; val_offset:16386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16386*FLEN/8, x4, x1, x2) - -inst_5463: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207fff00; valaddr_reg:x3; val_offset:16389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16389*FLEN/8, x4, x1, x2) - -inst_5464: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207fff80; valaddr_reg:x3; val_offset:16392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16392*FLEN/8, x4, x1, x2) - -inst_5465: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207fffc0; valaddr_reg:x3; val_offset:16395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16395*FLEN/8, x4, x1, x2) - -inst_5466: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207fffe0; valaddr_reg:x3; val_offset:16398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16398*FLEN/8, x4, x1, x2) - -inst_5467: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207ffff0; valaddr_reg:x3; val_offset:16401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16401*FLEN/8, x4, x1, x2) - -inst_5468: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207ffff8; valaddr_reg:x3; val_offset:16404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16404*FLEN/8, x4, x1, x2) - -inst_5469: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207ffffc; valaddr_reg:x3; val_offset:16407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16407*FLEN/8, x4, x1, x2) - -inst_5470: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207ffffe; valaddr_reg:x3; val_offset:16410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16410*FLEN/8, x4, x1, x2) - -inst_5471: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x207fffff; valaddr_reg:x3; val_offset:16413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16413*FLEN/8, x4, x1, x2) - -inst_5472: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3f800001; valaddr_reg:x3; val_offset:16416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16416*FLEN/8, x4, x1, x2) - -inst_5473: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3f800003; valaddr_reg:x3; val_offset:16419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16419*FLEN/8, x4, x1, x2) - -inst_5474: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3f800007; valaddr_reg:x3; val_offset:16422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16422*FLEN/8, x4, x1, x2) - -inst_5475: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3f999999; valaddr_reg:x3; val_offset:16425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16425*FLEN/8, x4, x1, x2) - -inst_5476: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:16428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16428*FLEN/8, x4, x1, x2) - -inst_5477: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:16431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16431*FLEN/8, x4, x1, x2) - -inst_5478: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:16434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16434*FLEN/8, x4, x1, x2) - -inst_5479: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:16437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16437*FLEN/8, x4, x1, x2) - -inst_5480: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:16440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16440*FLEN/8, x4, x1, x2) - -inst_5481: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:16443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16443*FLEN/8, x4, x1, x2) - -inst_5482: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:16446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16446*FLEN/8, x4, x1, x2) - -inst_5483: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:16449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16449*FLEN/8, x4, x1, x2) - -inst_5484: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:16452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16452*FLEN/8, x4, x1, x2) - -inst_5485: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:16455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16455*FLEN/8, x4, x1, x2) - -inst_5486: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:16458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16458*FLEN/8, x4, x1, x2) - -inst_5487: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:16461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16461*FLEN/8, x4, x1, x2) - -inst_5488: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4800000; valaddr_reg:x3; val_offset:16464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16464*FLEN/8, x4, x1, x2) - -inst_5489: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4800001; valaddr_reg:x3; val_offset:16467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16467*FLEN/8, x4, x1, x2) - -inst_5490: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4800003; valaddr_reg:x3; val_offset:16470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16470*FLEN/8, x4, x1, x2) - -inst_5491: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4800007; valaddr_reg:x3; val_offset:16473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16473*FLEN/8, x4, x1, x2) - -inst_5492: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb480000f; valaddr_reg:x3; val_offset:16476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16476*FLEN/8, x4, x1, x2) - -inst_5493: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb480001f; valaddr_reg:x3; val_offset:16479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16479*FLEN/8, x4, x1, x2) - -inst_5494: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb480003f; valaddr_reg:x3; val_offset:16482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16482*FLEN/8, x4, x1, x2) - -inst_5495: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb480007f; valaddr_reg:x3; val_offset:16485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16485*FLEN/8, x4, x1, x2) - -inst_5496: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb48000ff; valaddr_reg:x3; val_offset:16488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16488*FLEN/8, x4, x1, x2) - -inst_5497: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb48001ff; valaddr_reg:x3; val_offset:16491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16491*FLEN/8, x4, x1, x2) - -inst_5498: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb48003ff; valaddr_reg:x3; val_offset:16494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16494*FLEN/8, x4, x1, x2) - -inst_5499: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb48007ff; valaddr_reg:x3; val_offset:16497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16497*FLEN/8, x4, x1, x2) - -inst_5500: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4800fff; valaddr_reg:x3; val_offset:16500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16500*FLEN/8, x4, x1, x2) - -inst_5501: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4801fff; valaddr_reg:x3; val_offset:16503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16503*FLEN/8, x4, x1, x2) - -inst_5502: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4803fff; valaddr_reg:x3; val_offset:16506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16506*FLEN/8, x4, x1, x2) - -inst_5503: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4807fff; valaddr_reg:x3; val_offset:16509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16509*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_44) - -inst_5504: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb480ffff; valaddr_reg:x3; val_offset:16512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16512*FLEN/8, x4, x1, x2) - -inst_5505: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb481ffff; valaddr_reg:x3; val_offset:16515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16515*FLEN/8, x4, x1, x2) - -inst_5506: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb483ffff; valaddr_reg:x3; val_offset:16518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16518*FLEN/8, x4, x1, x2) - -inst_5507: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb487ffff; valaddr_reg:x3; val_offset:16521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16521*FLEN/8, x4, x1, x2) - -inst_5508: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb48fffff; valaddr_reg:x3; val_offset:16524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16524*FLEN/8, x4, x1, x2) - -inst_5509: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb49fffff; valaddr_reg:x3; val_offset:16527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16527*FLEN/8, x4, x1, x2) - -inst_5510: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4bfffff; valaddr_reg:x3; val_offset:16530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16530*FLEN/8, x4, x1, x2) - -inst_5511: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4c00000; valaddr_reg:x3; val_offset:16533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16533*FLEN/8, x4, x1, x2) - -inst_5512: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4e00000; valaddr_reg:x3; val_offset:16536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16536*FLEN/8, x4, x1, x2) - -inst_5513: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4f00000; valaddr_reg:x3; val_offset:16539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16539*FLEN/8, x4, x1, x2) - -inst_5514: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4f80000; valaddr_reg:x3; val_offset:16542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16542*FLEN/8, x4, x1, x2) - -inst_5515: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fc0000; valaddr_reg:x3; val_offset:16545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16545*FLEN/8, x4, x1, x2) - -inst_5516: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fe0000; valaddr_reg:x3; val_offset:16548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16548*FLEN/8, x4, x1, x2) - -inst_5517: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ff0000; valaddr_reg:x3; val_offset:16551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16551*FLEN/8, x4, x1, x2) - -inst_5518: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ff8000; valaddr_reg:x3; val_offset:16554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16554*FLEN/8, x4, x1, x2) - -inst_5519: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ffc000; valaddr_reg:x3; val_offset:16557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16557*FLEN/8, x4, x1, x2) - -inst_5520: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ffe000; valaddr_reg:x3; val_offset:16560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16560*FLEN/8, x4, x1, x2) - -inst_5521: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fff000; valaddr_reg:x3; val_offset:16563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16563*FLEN/8, x4, x1, x2) - -inst_5522: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fff800; valaddr_reg:x3; val_offset:16566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16566*FLEN/8, x4, x1, x2) - -inst_5523: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fffc00; valaddr_reg:x3; val_offset:16569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16569*FLEN/8, x4, x1, x2) - -inst_5524: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fffe00; valaddr_reg:x3; val_offset:16572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16572*FLEN/8, x4, x1, x2) - -inst_5525: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ffff00; valaddr_reg:x3; val_offset:16575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16575*FLEN/8, x4, x1, x2) - -inst_5526: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ffff80; valaddr_reg:x3; val_offset:16578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16578*FLEN/8, x4, x1, x2) - -inst_5527: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ffffc0; valaddr_reg:x3; val_offset:16581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16581*FLEN/8, x4, x1, x2) - -inst_5528: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ffffe0; valaddr_reg:x3; val_offset:16584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16584*FLEN/8, x4, x1, x2) - -inst_5529: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fffff0; valaddr_reg:x3; val_offset:16587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16587*FLEN/8, x4, x1, x2) - -inst_5530: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fffff8; valaddr_reg:x3; val_offset:16590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16590*FLEN/8, x4, x1, x2) - -inst_5531: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fffffc; valaddr_reg:x3; val_offset:16593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16593*FLEN/8, x4, x1, x2) - -inst_5532: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4fffffe; valaddr_reg:x3; val_offset:16596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16596*FLEN/8, x4, x1, x2) - -inst_5533: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xb4ffffff; valaddr_reg:x3; val_offset:16599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16599*FLEN/8, x4, x1, x2) - -inst_5534: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbf800001; valaddr_reg:x3; val_offset:16602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16602*FLEN/8, x4, x1, x2) - -inst_5535: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbf800003; valaddr_reg:x3; val_offset:16605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16605*FLEN/8, x4, x1, x2) - -inst_5536: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbf800007; valaddr_reg:x3; val_offset:16608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16608*FLEN/8, x4, x1, x2) - -inst_5537: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbf999999; valaddr_reg:x3; val_offset:16611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16611*FLEN/8, x4, x1, x2) - -inst_5538: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:16614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16614*FLEN/8, x4, x1, x2) - -inst_5539: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:16617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16617*FLEN/8, x4, x1, x2) - -inst_5540: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:16620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16620*FLEN/8, x4, x1, x2) - -inst_5541: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:16623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16623*FLEN/8, x4, x1, x2) - -inst_5542: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:16626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16626*FLEN/8, x4, x1, x2) - -inst_5543: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:16629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16629*FLEN/8, x4, x1, x2) - -inst_5544: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:16632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16632*FLEN/8, x4, x1, x2) - -inst_5545: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:16635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16635*FLEN/8, x4, x1, x2) - -inst_5546: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:16638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16638*FLEN/8, x4, x1, x2) - -inst_5547: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:16641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16641*FLEN/8, x4, x1, x2) - -inst_5548: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:16644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16644*FLEN/8, x4, x1, x2) - -inst_5549: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:16647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16647*FLEN/8, x4, x1, x2) - -inst_5550: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a000000; valaddr_reg:x3; val_offset:16650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16650*FLEN/8, x4, x1, x2) - -inst_5551: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a000001; valaddr_reg:x3; val_offset:16653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16653*FLEN/8, x4, x1, x2) - -inst_5552: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a000003; valaddr_reg:x3; val_offset:16656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16656*FLEN/8, x4, x1, x2) - -inst_5553: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a000007; valaddr_reg:x3; val_offset:16659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16659*FLEN/8, x4, x1, x2) - -inst_5554: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a00000f; valaddr_reg:x3; val_offset:16662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16662*FLEN/8, x4, x1, x2) - -inst_5555: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a00001f; valaddr_reg:x3; val_offset:16665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16665*FLEN/8, x4, x1, x2) - -inst_5556: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a00003f; valaddr_reg:x3; val_offset:16668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16668*FLEN/8, x4, x1, x2) - -inst_5557: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a00007f; valaddr_reg:x3; val_offset:16671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16671*FLEN/8, x4, x1, x2) - -inst_5558: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a0000ff; valaddr_reg:x3; val_offset:16674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16674*FLEN/8, x4, x1, x2) - -inst_5559: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a0001ff; valaddr_reg:x3; val_offset:16677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16677*FLEN/8, x4, x1, x2) - -inst_5560: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a0003ff; valaddr_reg:x3; val_offset:16680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16680*FLEN/8, x4, x1, x2) - -inst_5561: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a0007ff; valaddr_reg:x3; val_offset:16683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16683*FLEN/8, x4, x1, x2) - -inst_5562: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a000fff; valaddr_reg:x3; val_offset:16686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16686*FLEN/8, x4, x1, x2) - -inst_5563: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a001fff; valaddr_reg:x3; val_offset:16689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16689*FLEN/8, x4, x1, x2) - -inst_5564: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a003fff; valaddr_reg:x3; val_offset:16692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16692*FLEN/8, x4, x1, x2) - -inst_5565: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a007fff; valaddr_reg:x3; val_offset:16695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16695*FLEN/8, x4, x1, x2) - -inst_5566: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a00ffff; valaddr_reg:x3; val_offset:16698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16698*FLEN/8, x4, x1, x2) - -inst_5567: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a01ffff; valaddr_reg:x3; val_offset:16701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16701*FLEN/8, x4, x1, x2) - -inst_5568: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a03ffff; valaddr_reg:x3; val_offset:16704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16704*FLEN/8, x4, x1, x2) - -inst_5569: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a07ffff; valaddr_reg:x3; val_offset:16707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16707*FLEN/8, x4, x1, x2) - -inst_5570: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a0fffff; valaddr_reg:x3; val_offset:16710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16710*FLEN/8, x4, x1, x2) - -inst_5571: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a1fffff; valaddr_reg:x3; val_offset:16713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16713*FLEN/8, x4, x1, x2) - -inst_5572: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a3fffff; valaddr_reg:x3; val_offset:16716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16716*FLEN/8, x4, x1, x2) - -inst_5573: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a400000; valaddr_reg:x3; val_offset:16719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16719*FLEN/8, x4, x1, x2) - -inst_5574: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a600000; valaddr_reg:x3; val_offset:16722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16722*FLEN/8, x4, x1, x2) - -inst_5575: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a700000; valaddr_reg:x3; val_offset:16725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16725*FLEN/8, x4, x1, x2) - -inst_5576: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a780000; valaddr_reg:x3; val_offset:16728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16728*FLEN/8, x4, x1, x2) - -inst_5577: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7c0000; valaddr_reg:x3; val_offset:16731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16731*FLEN/8, x4, x1, x2) - -inst_5578: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7e0000; valaddr_reg:x3; val_offset:16734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16734*FLEN/8, x4, x1, x2) - -inst_5579: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7f0000; valaddr_reg:x3; val_offset:16737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16737*FLEN/8, x4, x1, x2) - -inst_5580: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7f8000; valaddr_reg:x3; val_offset:16740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16740*FLEN/8, x4, x1, x2) - -inst_5581: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7fc000; valaddr_reg:x3; val_offset:16743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16743*FLEN/8, x4, x1, x2) - -inst_5582: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7fe000; valaddr_reg:x3; val_offset:16746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16746*FLEN/8, x4, x1, x2) - -inst_5583: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7ff000; valaddr_reg:x3; val_offset:16749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16749*FLEN/8, x4, x1, x2) - -inst_5584: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7ff800; valaddr_reg:x3; val_offset:16752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16752*FLEN/8, x4, x1, x2) - -inst_5585: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7ffc00; valaddr_reg:x3; val_offset:16755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16755*FLEN/8, x4, x1, x2) - -inst_5586: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7ffe00; valaddr_reg:x3; val_offset:16758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16758*FLEN/8, x4, x1, x2) - -inst_5587: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7fff00; valaddr_reg:x3; val_offset:16761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16761*FLEN/8, x4, x1, x2) - -inst_5588: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7fff80; valaddr_reg:x3; val_offset:16764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16764*FLEN/8, x4, x1, x2) - -inst_5589: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7fffc0; valaddr_reg:x3; val_offset:16767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16767*FLEN/8, x4, x1, x2) - -inst_5590: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7fffe0; valaddr_reg:x3; val_offset:16770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16770*FLEN/8, x4, x1, x2) - -inst_5591: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7ffff0; valaddr_reg:x3; val_offset:16773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16773*FLEN/8, x4, x1, x2) - -inst_5592: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7ffff8; valaddr_reg:x3; val_offset:16776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16776*FLEN/8, x4, x1, x2) - -inst_5593: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7ffffc; valaddr_reg:x3; val_offset:16779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16779*FLEN/8, x4, x1, x2) - -inst_5594: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7ffffe; valaddr_reg:x3; val_offset:16782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16782*FLEN/8, x4, x1, x2) - -inst_5595: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7a7fffff; valaddr_reg:x3; val_offset:16785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16785*FLEN/8, x4, x1, x2) - -inst_5596: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f000001; valaddr_reg:x3; val_offset:16788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16788*FLEN/8, x4, x1, x2) - -inst_5597: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f000003; valaddr_reg:x3; val_offset:16791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16791*FLEN/8, x4, x1, x2) - -inst_5598: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f000007; valaddr_reg:x3; val_offset:16794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16794*FLEN/8, x4, x1, x2) - -inst_5599: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f199999; valaddr_reg:x3; val_offset:16797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16797*FLEN/8, x4, x1, x2) - -inst_5600: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f249249; valaddr_reg:x3; val_offset:16800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16800*FLEN/8, x4, x1, x2) - -inst_5601: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f333333; valaddr_reg:x3; val_offset:16803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16803*FLEN/8, x4, x1, x2) - -inst_5602: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:16806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16806*FLEN/8, x4, x1, x2) - -inst_5603: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:16809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16809*FLEN/8, x4, x1, x2) - -inst_5604: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f444444; valaddr_reg:x3; val_offset:16812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16812*FLEN/8, x4, x1, x2) - -inst_5605: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:16815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16815*FLEN/8, x4, x1, x2) - -inst_5606: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:16818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16818*FLEN/8, x4, x1, x2) - -inst_5607: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f666666; valaddr_reg:x3; val_offset:16821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16821*FLEN/8, x4, x1, x2) - -inst_5608: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:16824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16824*FLEN/8, x4, x1, x2) - -inst_5609: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:16827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16827*FLEN/8, x4, x1, x2) - -inst_5610: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:16830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16830*FLEN/8, x4, x1, x2) - -inst_5611: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:16833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16833*FLEN/8, x4, x1, x2) - -inst_5612: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2000000; valaddr_reg:x3; val_offset:16836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16836*FLEN/8, x4, x1, x2) - -inst_5613: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2000001; valaddr_reg:x3; val_offset:16839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16839*FLEN/8, x4, x1, x2) - -inst_5614: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2000003; valaddr_reg:x3; val_offset:16842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16842*FLEN/8, x4, x1, x2) - -inst_5615: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2000007; valaddr_reg:x3; val_offset:16845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16845*FLEN/8, x4, x1, x2) - -inst_5616: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa200000f; valaddr_reg:x3; val_offset:16848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16848*FLEN/8, x4, x1, x2) - -inst_5617: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa200001f; valaddr_reg:x3; val_offset:16851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16851*FLEN/8, x4, x1, x2) - -inst_5618: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa200003f; valaddr_reg:x3; val_offset:16854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16854*FLEN/8, x4, x1, x2) - -inst_5619: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa200007f; valaddr_reg:x3; val_offset:16857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16857*FLEN/8, x4, x1, x2) - -inst_5620: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa20000ff; valaddr_reg:x3; val_offset:16860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16860*FLEN/8, x4, x1, x2) - -inst_5621: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa20001ff; valaddr_reg:x3; val_offset:16863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16863*FLEN/8, x4, x1, x2) - -inst_5622: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa20003ff; valaddr_reg:x3; val_offset:16866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16866*FLEN/8, x4, x1, x2) - -inst_5623: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa20007ff; valaddr_reg:x3; val_offset:16869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16869*FLEN/8, x4, x1, x2) - -inst_5624: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2000fff; valaddr_reg:x3; val_offset:16872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16872*FLEN/8, x4, x1, x2) - -inst_5625: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2001fff; valaddr_reg:x3; val_offset:16875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16875*FLEN/8, x4, x1, x2) - -inst_5626: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2003fff; valaddr_reg:x3; val_offset:16878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16878*FLEN/8, x4, x1, x2) - -inst_5627: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2007fff; valaddr_reg:x3; val_offset:16881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16881*FLEN/8, x4, x1, x2) - -inst_5628: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa200ffff; valaddr_reg:x3; val_offset:16884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16884*FLEN/8, x4, x1, x2) - -inst_5629: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa201ffff; valaddr_reg:x3; val_offset:16887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16887*FLEN/8, x4, x1, x2) - -inst_5630: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa203ffff; valaddr_reg:x3; val_offset:16890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16890*FLEN/8, x4, x1, x2) - -inst_5631: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa207ffff; valaddr_reg:x3; val_offset:16893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16893*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_45) - -inst_5632: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa20fffff; valaddr_reg:x3; val_offset:16896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16896*FLEN/8, x4, x1, x2) - -inst_5633: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa21fffff; valaddr_reg:x3; val_offset:16899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16899*FLEN/8, x4, x1, x2) - -inst_5634: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa23fffff; valaddr_reg:x3; val_offset:16902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16902*FLEN/8, x4, x1, x2) - -inst_5635: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2400000; valaddr_reg:x3; val_offset:16905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16905*FLEN/8, x4, x1, x2) - -inst_5636: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2600000; valaddr_reg:x3; val_offset:16908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16908*FLEN/8, x4, x1, x2) - -inst_5637: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2700000; valaddr_reg:x3; val_offset:16911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16911*FLEN/8, x4, x1, x2) - -inst_5638: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa2780000; valaddr_reg:x3; val_offset:16914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16914*FLEN/8, x4, x1, x2) - -inst_5639: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27c0000; valaddr_reg:x3; val_offset:16917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16917*FLEN/8, x4, x1, x2) - -inst_5640: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27e0000; valaddr_reg:x3; val_offset:16920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16920*FLEN/8, x4, x1, x2) - -inst_5641: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27f0000; valaddr_reg:x3; val_offset:16923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16923*FLEN/8, x4, x1, x2) - -inst_5642: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27f8000; valaddr_reg:x3; val_offset:16926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16926*FLEN/8, x4, x1, x2) - -inst_5643: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27fc000; valaddr_reg:x3; val_offset:16929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16929*FLEN/8, x4, x1, x2) - -inst_5644: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27fe000; valaddr_reg:x3; val_offset:16932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16932*FLEN/8, x4, x1, x2) - -inst_5645: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27ff000; valaddr_reg:x3; val_offset:16935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16935*FLEN/8, x4, x1, x2) - -inst_5646: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27ff800; valaddr_reg:x3; val_offset:16938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16938*FLEN/8, x4, x1, x2) - -inst_5647: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27ffc00; valaddr_reg:x3; val_offset:16941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16941*FLEN/8, x4, x1, x2) - -inst_5648: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27ffe00; valaddr_reg:x3; val_offset:16944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16944*FLEN/8, x4, x1, x2) - -inst_5649: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27fff00; valaddr_reg:x3; val_offset:16947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16947*FLEN/8, x4, x1, x2) - -inst_5650: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27fff80; valaddr_reg:x3; val_offset:16950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16950*FLEN/8, x4, x1, x2) - -inst_5651: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27fffc0; valaddr_reg:x3; val_offset:16953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16953*FLEN/8, x4, x1, x2) - -inst_5652: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27fffe0; valaddr_reg:x3; val_offset:16956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16956*FLEN/8, x4, x1, x2) - -inst_5653: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27ffff0; valaddr_reg:x3; val_offset:16959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16959*FLEN/8, x4, x1, x2) - -inst_5654: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27ffff8; valaddr_reg:x3; val_offset:16962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16962*FLEN/8, x4, x1, x2) - -inst_5655: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27ffffc; valaddr_reg:x3; val_offset:16965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16965*FLEN/8, x4, x1, x2) - -inst_5656: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27ffffe; valaddr_reg:x3; val_offset:16968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16968*FLEN/8, x4, x1, x2) - -inst_5657: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xa27fffff; valaddr_reg:x3; val_offset:16971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16971*FLEN/8, x4, x1, x2) - -inst_5658: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbf800001; valaddr_reg:x3; val_offset:16974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16974*FLEN/8, x4, x1, x2) - -inst_5659: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbf800003; valaddr_reg:x3; val_offset:16977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16977*FLEN/8, x4, x1, x2) - -inst_5660: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbf800007; valaddr_reg:x3; val_offset:16980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16980*FLEN/8, x4, x1, x2) - -inst_5661: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbf999999; valaddr_reg:x3; val_offset:16983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16983*FLEN/8, x4, x1, x2) - -inst_5662: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:16986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16986*FLEN/8, x4, x1, x2) - -inst_5663: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:16989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16989*FLEN/8, x4, x1, x2) - -inst_5664: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:16992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16992*FLEN/8, x4, x1, x2) - -inst_5665: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:16995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16995*FLEN/8, x4, x1, x2) - -inst_5666: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:16998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16998*FLEN/8, x4, x1, x2) - -inst_5667: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:17001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17001*FLEN/8, x4, x1, x2) - -inst_5668: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:17004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17004*FLEN/8, x4, x1, x2) - -inst_5669: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:17007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17007*FLEN/8, x4, x1, x2) - -inst_5670: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:17010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17010*FLEN/8, x4, x1, x2) - -inst_5671: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:17013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17013*FLEN/8, x4, x1, x2) - -inst_5672: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:17016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17016*FLEN/8, x4, x1, x2) - -inst_5673: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:17019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17019*FLEN/8, x4, x1, x2) - -inst_5674: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbf800001; valaddr_reg:x3; val_offset:17022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17022*FLEN/8, x4, x1, x2) - -inst_5675: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbf800003; valaddr_reg:x3; val_offset:17025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17025*FLEN/8, x4, x1, x2) - -inst_5676: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbf800007; valaddr_reg:x3; val_offset:17028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17028*FLEN/8, x4, x1, x2) - -inst_5677: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbf999999; valaddr_reg:x3; val_offset:17031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17031*FLEN/8, x4, x1, x2) - -inst_5678: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:17034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17034*FLEN/8, x4, x1, x2) - -inst_5679: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:17037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17037*FLEN/8, x4, x1, x2) - -inst_5680: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:17040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17040*FLEN/8, x4, x1, x2) - -inst_5681: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:17043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17043*FLEN/8, x4, x1, x2) - -inst_5682: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:17046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17046*FLEN/8, x4, x1, x2) - -inst_5683: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:17049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17049*FLEN/8, x4, x1, x2) - -inst_5684: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:17052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17052*FLEN/8, x4, x1, x2) - -inst_5685: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:17055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17055*FLEN/8, x4, x1, x2) - -inst_5686: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:17058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17058*FLEN/8, x4, x1, x2) - -inst_5687: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:17061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17061*FLEN/8, x4, x1, x2) - -inst_5688: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:17064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17064*FLEN/8, x4, x1, x2) - -inst_5689: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:17067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17067*FLEN/8, x4, x1, x2) - -inst_5690: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc800000; valaddr_reg:x3; val_offset:17070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17070*FLEN/8, x4, x1, x2) - -inst_5691: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc800001; valaddr_reg:x3; val_offset:17073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17073*FLEN/8, x4, x1, x2) - -inst_5692: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc800003; valaddr_reg:x3; val_offset:17076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17076*FLEN/8, x4, x1, x2) - -inst_5693: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc800007; valaddr_reg:x3; val_offset:17079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17079*FLEN/8, x4, x1, x2) - -inst_5694: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc80000f; valaddr_reg:x3; val_offset:17082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17082*FLEN/8, x4, x1, x2) - -inst_5695: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc80001f; valaddr_reg:x3; val_offset:17085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17085*FLEN/8, x4, x1, x2) - -inst_5696: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc80003f; valaddr_reg:x3; val_offset:17088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17088*FLEN/8, x4, x1, x2) - -inst_5697: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc80007f; valaddr_reg:x3; val_offset:17091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17091*FLEN/8, x4, x1, x2) - -inst_5698: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc8000ff; valaddr_reg:x3; val_offset:17094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17094*FLEN/8, x4, x1, x2) - -inst_5699: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc8001ff; valaddr_reg:x3; val_offset:17097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17097*FLEN/8, x4, x1, x2) - -inst_5700: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc8003ff; valaddr_reg:x3; val_offset:17100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17100*FLEN/8, x4, x1, x2) - -inst_5701: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc8007ff; valaddr_reg:x3; val_offset:17103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17103*FLEN/8, x4, x1, x2) - -inst_5702: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc800fff; valaddr_reg:x3; val_offset:17106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17106*FLEN/8, x4, x1, x2) - -inst_5703: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc801fff; valaddr_reg:x3; val_offset:17109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17109*FLEN/8, x4, x1, x2) - -inst_5704: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc803fff; valaddr_reg:x3; val_offset:17112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17112*FLEN/8, x4, x1, x2) - -inst_5705: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc807fff; valaddr_reg:x3; val_offset:17115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17115*FLEN/8, x4, x1, x2) - -inst_5706: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc80ffff; valaddr_reg:x3; val_offset:17118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17118*FLEN/8, x4, x1, x2) - -inst_5707: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc81ffff; valaddr_reg:x3; val_offset:17121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17121*FLEN/8, x4, x1, x2) - -inst_5708: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc83ffff; valaddr_reg:x3; val_offset:17124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17124*FLEN/8, x4, x1, x2) - -inst_5709: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc87ffff; valaddr_reg:x3; val_offset:17127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17127*FLEN/8, x4, x1, x2) - -inst_5710: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc8fffff; valaddr_reg:x3; val_offset:17130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17130*FLEN/8, x4, x1, x2) - -inst_5711: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcc9fffff; valaddr_reg:x3; val_offset:17133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17133*FLEN/8, x4, x1, x2) - -inst_5712: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccbfffff; valaddr_reg:x3; val_offset:17136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17136*FLEN/8, x4, x1, x2) - -inst_5713: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccc00000; valaddr_reg:x3; val_offset:17139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17139*FLEN/8, x4, x1, x2) - -inst_5714: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xcce00000; valaddr_reg:x3; val_offset:17142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17142*FLEN/8, x4, x1, x2) - -inst_5715: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccf00000; valaddr_reg:x3; val_offset:17145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17145*FLEN/8, x4, x1, x2) - -inst_5716: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccf80000; valaddr_reg:x3; val_offset:17148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17148*FLEN/8, x4, x1, x2) - -inst_5717: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfc0000; valaddr_reg:x3; val_offset:17151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17151*FLEN/8, x4, x1, x2) - -inst_5718: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfe0000; valaddr_reg:x3; val_offset:17154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17154*FLEN/8, x4, x1, x2) - -inst_5719: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccff0000; valaddr_reg:x3; val_offset:17157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17157*FLEN/8, x4, x1, x2) - -inst_5720: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccff8000; valaddr_reg:x3; val_offset:17160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17160*FLEN/8, x4, x1, x2) - -inst_5721: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccffc000; valaddr_reg:x3; val_offset:17163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17163*FLEN/8, x4, x1, x2) - -inst_5722: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccffe000; valaddr_reg:x3; val_offset:17166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17166*FLEN/8, x4, x1, x2) - -inst_5723: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfff000; valaddr_reg:x3; val_offset:17169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17169*FLEN/8, x4, x1, x2) - -inst_5724: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfff800; valaddr_reg:x3; val_offset:17172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17172*FLEN/8, x4, x1, x2) - -inst_5725: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfffc00; valaddr_reg:x3; val_offset:17175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17175*FLEN/8, x4, x1, x2) - -inst_5726: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfffe00; valaddr_reg:x3; val_offset:17178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17178*FLEN/8, x4, x1, x2) - -inst_5727: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccffff00; valaddr_reg:x3; val_offset:17181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17181*FLEN/8, x4, x1, x2) - -inst_5728: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccffff80; valaddr_reg:x3; val_offset:17184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17184*FLEN/8, x4, x1, x2) - -inst_5729: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccffffc0; valaddr_reg:x3; val_offset:17187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17187*FLEN/8, x4, x1, x2) - -inst_5730: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccffffe0; valaddr_reg:x3; val_offset:17190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17190*FLEN/8, x4, x1, x2) - -inst_5731: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfffff0; valaddr_reg:x3; val_offset:17193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17193*FLEN/8, x4, x1, x2) - -inst_5732: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfffff8; valaddr_reg:x3; val_offset:17196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17196*FLEN/8, x4, x1, x2) - -inst_5733: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfffffc; valaddr_reg:x3; val_offset:17199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17199*FLEN/8, x4, x1, x2) - -inst_5734: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccfffffe; valaddr_reg:x3; val_offset:17202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17202*FLEN/8, x4, x1, x2) - -inst_5735: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; -op3val:0xccffffff; valaddr_reg:x3; val_offset:17205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17205*FLEN/8, x4, x1, x2) - -inst_5736: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:17208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17208*FLEN/8, x4, x1, x2) - -inst_5737: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:17211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17211*FLEN/8, x4, x1, x2) - -inst_5738: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:17214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17214*FLEN/8, x4, x1, x2) - -inst_5739: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:17217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17217*FLEN/8, x4, x1, x2) - -inst_5740: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:17220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17220*FLEN/8, x4, x1, x2) - -inst_5741: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:17223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17223*FLEN/8, x4, x1, x2) - -inst_5742: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:17226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17226*FLEN/8, x4, x1, x2) - -inst_5743: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:17229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17229*FLEN/8, x4, x1, x2) - -inst_5744: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:17232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17232*FLEN/8, x4, x1, x2) - -inst_5745: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:17235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17235*FLEN/8, x4, x1, x2) - -inst_5746: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:17238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17238*FLEN/8, x4, x1, x2) - -inst_5747: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:17241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17241*FLEN/8, x4, x1, x2) - -inst_5748: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:17244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17244*FLEN/8, x4, x1, x2) - -inst_5749: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:17247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17247*FLEN/8, x4, x1, x2) - -inst_5750: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:17250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17250*FLEN/8, x4, x1, x2) - -inst_5751: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:17253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17253*FLEN/8, x4, x1, x2) - -inst_5752: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4800000; valaddr_reg:x3; val_offset:17256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17256*FLEN/8, x4, x1, x2) - -inst_5753: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4800001; valaddr_reg:x3; val_offset:17259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17259*FLEN/8, x4, x1, x2) - -inst_5754: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4800003; valaddr_reg:x3; val_offset:17262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17262*FLEN/8, x4, x1, x2) - -inst_5755: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4800007; valaddr_reg:x3; val_offset:17265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17265*FLEN/8, x4, x1, x2) - -inst_5756: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x480000f; valaddr_reg:x3; val_offset:17268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17268*FLEN/8, x4, x1, x2) - -inst_5757: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x480001f; valaddr_reg:x3; val_offset:17271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17271*FLEN/8, x4, x1, x2) - -inst_5758: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x480003f; valaddr_reg:x3; val_offset:17274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17274*FLEN/8, x4, x1, x2) - -inst_5759: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x480007f; valaddr_reg:x3; val_offset:17277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17277*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_46) - -inst_5760: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x48000ff; valaddr_reg:x3; val_offset:17280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17280*FLEN/8, x4, x1, x2) - -inst_5761: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x48001ff; valaddr_reg:x3; val_offset:17283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17283*FLEN/8, x4, x1, x2) - -inst_5762: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x48003ff; valaddr_reg:x3; val_offset:17286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17286*FLEN/8, x4, x1, x2) - -inst_5763: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x48007ff; valaddr_reg:x3; val_offset:17289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17289*FLEN/8, x4, x1, x2) - -inst_5764: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4800fff; valaddr_reg:x3; val_offset:17292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17292*FLEN/8, x4, x1, x2) - -inst_5765: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4801fff; valaddr_reg:x3; val_offset:17295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17295*FLEN/8, x4, x1, x2) - -inst_5766: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4803fff; valaddr_reg:x3; val_offset:17298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17298*FLEN/8, x4, x1, x2) - -inst_5767: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4807fff; valaddr_reg:x3; val_offset:17301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17301*FLEN/8, x4, x1, x2) - -inst_5768: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x480ffff; valaddr_reg:x3; val_offset:17304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17304*FLEN/8, x4, x1, x2) - -inst_5769: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x481ffff; valaddr_reg:x3; val_offset:17307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17307*FLEN/8, x4, x1, x2) - -inst_5770: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x483ffff; valaddr_reg:x3; val_offset:17310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17310*FLEN/8, x4, x1, x2) - -inst_5771: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x487ffff; valaddr_reg:x3; val_offset:17313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17313*FLEN/8, x4, x1, x2) - -inst_5772: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x48fffff; valaddr_reg:x3; val_offset:17316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17316*FLEN/8, x4, x1, x2) - -inst_5773: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x49fffff; valaddr_reg:x3; val_offset:17319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17319*FLEN/8, x4, x1, x2) - -inst_5774: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4bfffff; valaddr_reg:x3; val_offset:17322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17322*FLEN/8, x4, x1, x2) - -inst_5775: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4c00000; valaddr_reg:x3; val_offset:17325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17325*FLEN/8, x4, x1, x2) - -inst_5776: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4e00000; valaddr_reg:x3; val_offset:17328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17328*FLEN/8, x4, x1, x2) - -inst_5777: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4f00000; valaddr_reg:x3; val_offset:17331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17331*FLEN/8, x4, x1, x2) - -inst_5778: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4f80000; valaddr_reg:x3; val_offset:17334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17334*FLEN/8, x4, x1, x2) - -inst_5779: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fc0000; valaddr_reg:x3; val_offset:17337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17337*FLEN/8, x4, x1, x2) - -inst_5780: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fe0000; valaddr_reg:x3; val_offset:17340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17340*FLEN/8, x4, x1, x2) - -inst_5781: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ff0000; valaddr_reg:x3; val_offset:17343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17343*FLEN/8, x4, x1, x2) - -inst_5782: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ff8000; valaddr_reg:x3; val_offset:17346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17346*FLEN/8, x4, x1, x2) - -inst_5783: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ffc000; valaddr_reg:x3; val_offset:17349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17349*FLEN/8, x4, x1, x2) - -inst_5784: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ffe000; valaddr_reg:x3; val_offset:17352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17352*FLEN/8, x4, x1, x2) - -inst_5785: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fff000; valaddr_reg:x3; val_offset:17355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17355*FLEN/8, x4, x1, x2) - -inst_5786: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fff800; valaddr_reg:x3; val_offset:17358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17358*FLEN/8, x4, x1, x2) - -inst_5787: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fffc00; valaddr_reg:x3; val_offset:17361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17361*FLEN/8, x4, x1, x2) - -inst_5788: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fffe00; valaddr_reg:x3; val_offset:17364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17364*FLEN/8, x4, x1, x2) - -inst_5789: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ffff00; valaddr_reg:x3; val_offset:17367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17367*FLEN/8, x4, x1, x2) - -inst_5790: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ffff80; valaddr_reg:x3; val_offset:17370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17370*FLEN/8, x4, x1, x2) - -inst_5791: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ffffc0; valaddr_reg:x3; val_offset:17373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17373*FLEN/8, x4, x1, x2) - -inst_5792: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ffffe0; valaddr_reg:x3; val_offset:17376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17376*FLEN/8, x4, x1, x2) - -inst_5793: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fffff0; valaddr_reg:x3; val_offset:17379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17379*FLEN/8, x4, x1, x2) - -inst_5794: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fffff8; valaddr_reg:x3; val_offset:17382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17382*FLEN/8, x4, x1, x2) - -inst_5795: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fffffc; valaddr_reg:x3; val_offset:17385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17385*FLEN/8, x4, x1, x2) - -inst_5796: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4fffffe; valaddr_reg:x3; val_offset:17388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17388*FLEN/8, x4, x1, x2) - -inst_5797: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; -op3val:0x4ffffff; valaddr_reg:x3; val_offset:17391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17391*FLEN/8, x4, x1, x2) - -inst_5798: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:17394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17394*FLEN/8, x4, x1, x2) - -inst_5799: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:17397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17397*FLEN/8, x4, x1, x2) - -inst_5800: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:17400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17400*FLEN/8, x4, x1, x2) - -inst_5801: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:17403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17403*FLEN/8, x4, x1, x2) - -inst_5802: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:17406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17406*FLEN/8, x4, x1, x2) - -inst_5803: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:17409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17409*FLEN/8, x4, x1, x2) - -inst_5804: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:17412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17412*FLEN/8, x4, x1, x2) - -inst_5805: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:17415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17415*FLEN/8, x4, x1, x2) - -inst_5806: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:17418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17418*FLEN/8, x4, x1, x2) - -inst_5807: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:17421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17421*FLEN/8, x4, x1, x2) - -inst_5808: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:17424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17424*FLEN/8, x4, x1, x2) - -inst_5809: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:17427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17427*FLEN/8, x4, x1, x2) - -inst_5810: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:17430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17430*FLEN/8, x4, x1, x2) - -inst_5811: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:17433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17433*FLEN/8, x4, x1, x2) - -inst_5812: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:17436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17436*FLEN/8, x4, x1, x2) - -inst_5813: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:17439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17439*FLEN/8, x4, x1, x2) - -inst_5814: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5000000; valaddr_reg:x3; val_offset:17442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17442*FLEN/8, x4, x1, x2) - -inst_5815: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5000001; valaddr_reg:x3; val_offset:17445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17445*FLEN/8, x4, x1, x2) - -inst_5816: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5000003; valaddr_reg:x3; val_offset:17448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17448*FLEN/8, x4, x1, x2) - -inst_5817: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5000007; valaddr_reg:x3; val_offset:17451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17451*FLEN/8, x4, x1, x2) - -inst_5818: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x500000f; valaddr_reg:x3; val_offset:17454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17454*FLEN/8, x4, x1, x2) - -inst_5819: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x500001f; valaddr_reg:x3; val_offset:17457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17457*FLEN/8, x4, x1, x2) - -inst_5820: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x500003f; valaddr_reg:x3; val_offset:17460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17460*FLEN/8, x4, x1, x2) - -inst_5821: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x500007f; valaddr_reg:x3; val_offset:17463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17463*FLEN/8, x4, x1, x2) - -inst_5822: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x50000ff; valaddr_reg:x3; val_offset:17466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17466*FLEN/8, x4, x1, x2) - -inst_5823: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x50001ff; valaddr_reg:x3; val_offset:17469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17469*FLEN/8, x4, x1, x2) - -inst_5824: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x50003ff; valaddr_reg:x3; val_offset:17472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17472*FLEN/8, x4, x1, x2) - -inst_5825: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x50007ff; valaddr_reg:x3; val_offset:17475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17475*FLEN/8, x4, x1, x2) - -inst_5826: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5000fff; valaddr_reg:x3; val_offset:17478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17478*FLEN/8, x4, x1, x2) - -inst_5827: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5001fff; valaddr_reg:x3; val_offset:17481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17481*FLEN/8, x4, x1, x2) - -inst_5828: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5003fff; valaddr_reg:x3; val_offset:17484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17484*FLEN/8, x4, x1, x2) - -inst_5829: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5007fff; valaddr_reg:x3; val_offset:17487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17487*FLEN/8, x4, x1, x2) - -inst_5830: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x500ffff; valaddr_reg:x3; val_offset:17490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17490*FLEN/8, x4, x1, x2) - -inst_5831: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x501ffff; valaddr_reg:x3; val_offset:17493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17493*FLEN/8, x4, x1, x2) - -inst_5832: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x503ffff; valaddr_reg:x3; val_offset:17496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17496*FLEN/8, x4, x1, x2) - -inst_5833: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x507ffff; valaddr_reg:x3; val_offset:17499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17499*FLEN/8, x4, x1, x2) - -inst_5834: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x50fffff; valaddr_reg:x3; val_offset:17502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17502*FLEN/8, x4, x1, x2) - -inst_5835: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x51fffff; valaddr_reg:x3; val_offset:17505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17505*FLEN/8, x4, x1, x2) - -inst_5836: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x53fffff; valaddr_reg:x3; val_offset:17508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17508*FLEN/8, x4, x1, x2) - -inst_5837: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5400000; valaddr_reg:x3; val_offset:17511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17511*FLEN/8, x4, x1, x2) - -inst_5838: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5600000; valaddr_reg:x3; val_offset:17514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17514*FLEN/8, x4, x1, x2) - -inst_5839: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5700000; valaddr_reg:x3; val_offset:17517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17517*FLEN/8, x4, x1, x2) - -inst_5840: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x5780000; valaddr_reg:x3; val_offset:17520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17520*FLEN/8, x4, x1, x2) - -inst_5841: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57c0000; valaddr_reg:x3; val_offset:17523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17523*FLEN/8, x4, x1, x2) - -inst_5842: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57e0000; valaddr_reg:x3; val_offset:17526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17526*FLEN/8, x4, x1, x2) - -inst_5843: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57f0000; valaddr_reg:x3; val_offset:17529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17529*FLEN/8, x4, x1, x2) - -inst_5844: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57f8000; valaddr_reg:x3; val_offset:17532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17532*FLEN/8, x4, x1, x2) - -inst_5845: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57fc000; valaddr_reg:x3; val_offset:17535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17535*FLEN/8, x4, x1, x2) - -inst_5846: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57fe000; valaddr_reg:x3; val_offset:17538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17538*FLEN/8, x4, x1, x2) - -inst_5847: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57ff000; valaddr_reg:x3; val_offset:17541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17541*FLEN/8, x4, x1, x2) - -inst_5848: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57ff800; valaddr_reg:x3; val_offset:17544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17544*FLEN/8, x4, x1, x2) - -inst_5849: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57ffc00; valaddr_reg:x3; val_offset:17547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17547*FLEN/8, x4, x1, x2) - -inst_5850: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57ffe00; valaddr_reg:x3; val_offset:17550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17550*FLEN/8, x4, x1, x2) - -inst_5851: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57fff00; valaddr_reg:x3; val_offset:17553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17553*FLEN/8, x4, x1, x2) - -inst_5852: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57fff80; valaddr_reg:x3; val_offset:17556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17556*FLEN/8, x4, x1, x2) - -inst_5853: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57fffc0; valaddr_reg:x3; val_offset:17559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17559*FLEN/8, x4, x1, x2) - -inst_5854: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57fffe0; valaddr_reg:x3; val_offset:17562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17562*FLEN/8, x4, x1, x2) - -inst_5855: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57ffff0; valaddr_reg:x3; val_offset:17565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17565*FLEN/8, x4, x1, x2) - -inst_5856: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57ffff8; valaddr_reg:x3; val_offset:17568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17568*FLEN/8, x4, x1, x2) - -inst_5857: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57ffffc; valaddr_reg:x3; val_offset:17571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17571*FLEN/8, x4, x1, x2) - -inst_5858: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57ffffe; valaddr_reg:x3; val_offset:17574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17574*FLEN/8, x4, x1, x2) - -inst_5859: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; -op3val:0x57fffff; valaddr_reg:x3; val_offset:17577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17577*FLEN/8, x4, x1, x2) - -inst_5860: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b000000; valaddr_reg:x3; val_offset:17580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17580*FLEN/8, x4, x1, x2) - -inst_5861: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b000001; valaddr_reg:x3; val_offset:17583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17583*FLEN/8, x4, x1, x2) - -inst_5862: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b000003; valaddr_reg:x3; val_offset:17586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17586*FLEN/8, x4, x1, x2) - -inst_5863: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b000007; valaddr_reg:x3; val_offset:17589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17589*FLEN/8, x4, x1, x2) - -inst_5864: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b00000f; valaddr_reg:x3; val_offset:17592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17592*FLEN/8, x4, x1, x2) - -inst_5865: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b00001f; valaddr_reg:x3; val_offset:17595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17595*FLEN/8, x4, x1, x2) - -inst_5866: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b00003f; valaddr_reg:x3; val_offset:17598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17598*FLEN/8, x4, x1, x2) - -inst_5867: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b00007f; valaddr_reg:x3; val_offset:17601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17601*FLEN/8, x4, x1, x2) - -inst_5868: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b0000ff; valaddr_reg:x3; val_offset:17604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17604*FLEN/8, x4, x1, x2) - -inst_5869: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b0001ff; valaddr_reg:x3; val_offset:17607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17607*FLEN/8, x4, x1, x2) - -inst_5870: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b0003ff; valaddr_reg:x3; val_offset:17610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17610*FLEN/8, x4, x1, x2) - -inst_5871: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b0007ff; valaddr_reg:x3; val_offset:17613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17613*FLEN/8, x4, x1, x2) - -inst_5872: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b000fff; valaddr_reg:x3; val_offset:17616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17616*FLEN/8, x4, x1, x2) - -inst_5873: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b001fff; valaddr_reg:x3; val_offset:17619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17619*FLEN/8, x4, x1, x2) - -inst_5874: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b003fff; valaddr_reg:x3; val_offset:17622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17622*FLEN/8, x4, x1, x2) - -inst_5875: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b007fff; valaddr_reg:x3; val_offset:17625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17625*FLEN/8, x4, x1, x2) - -inst_5876: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b00ffff; valaddr_reg:x3; val_offset:17628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17628*FLEN/8, x4, x1, x2) - -inst_5877: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b01ffff; valaddr_reg:x3; val_offset:17631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17631*FLEN/8, x4, x1, x2) - -inst_5878: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b03ffff; valaddr_reg:x3; val_offset:17634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17634*FLEN/8, x4, x1, x2) - -inst_5879: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b07ffff; valaddr_reg:x3; val_offset:17637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17637*FLEN/8, x4, x1, x2) - -inst_5880: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b0fffff; valaddr_reg:x3; val_offset:17640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17640*FLEN/8, x4, x1, x2) - -inst_5881: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b1fffff; valaddr_reg:x3; val_offset:17643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17643*FLEN/8, x4, x1, x2) - -inst_5882: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b3fffff; valaddr_reg:x3; val_offset:17646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17646*FLEN/8, x4, x1, x2) - -inst_5883: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b400000; valaddr_reg:x3; val_offset:17649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17649*FLEN/8, x4, x1, x2) - -inst_5884: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b600000; valaddr_reg:x3; val_offset:17652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17652*FLEN/8, x4, x1, x2) - -inst_5885: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b700000; valaddr_reg:x3; val_offset:17655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17655*FLEN/8, x4, x1, x2) - -inst_5886: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b780000; valaddr_reg:x3; val_offset:17658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17658*FLEN/8, x4, x1, x2) - -inst_5887: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7c0000; valaddr_reg:x3; val_offset:17661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17661*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_47) - -inst_5888: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7e0000; valaddr_reg:x3; val_offset:17664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17664*FLEN/8, x4, x1, x2) - -inst_5889: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7f0000; valaddr_reg:x3; val_offset:17667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17667*FLEN/8, x4, x1, x2) - -inst_5890: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7f8000; valaddr_reg:x3; val_offset:17670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17670*FLEN/8, x4, x1, x2) - -inst_5891: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7fc000; valaddr_reg:x3; val_offset:17673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17673*FLEN/8, x4, x1, x2) - -inst_5892: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7fe000; valaddr_reg:x3; val_offset:17676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17676*FLEN/8, x4, x1, x2) - -inst_5893: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7ff000; valaddr_reg:x3; val_offset:17679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17679*FLEN/8, x4, x1, x2) - -inst_5894: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7ff800; valaddr_reg:x3; val_offset:17682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17682*FLEN/8, x4, x1, x2) - -inst_5895: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7ffc00; valaddr_reg:x3; val_offset:17685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17685*FLEN/8, x4, x1, x2) - -inst_5896: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7ffe00; valaddr_reg:x3; val_offset:17688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17688*FLEN/8, x4, x1, x2) - -inst_5897: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7fff00; valaddr_reg:x3; val_offset:17691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17691*FLEN/8, x4, x1, x2) - -inst_5898: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7fff80; valaddr_reg:x3; val_offset:17694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17694*FLEN/8, x4, x1, x2) - -inst_5899: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7fffc0; valaddr_reg:x3; val_offset:17697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17697*FLEN/8, x4, x1, x2) - -inst_5900: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7fffe0; valaddr_reg:x3; val_offset:17700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17700*FLEN/8, x4, x1, x2) - -inst_5901: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7ffff0; valaddr_reg:x3; val_offset:17703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17703*FLEN/8, x4, x1, x2) - -inst_5902: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7ffff8; valaddr_reg:x3; val_offset:17706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17706*FLEN/8, x4, x1, x2) - -inst_5903: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7ffffc; valaddr_reg:x3; val_offset:17709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17709*FLEN/8, x4, x1, x2) - -inst_5904: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7ffffe; valaddr_reg:x3; val_offset:17712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17712*FLEN/8, x4, x1, x2) - -inst_5905: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x6b7fffff; valaddr_reg:x3; val_offset:17715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17715*FLEN/8, x4, x1, x2) - -inst_5906: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f000001; valaddr_reg:x3; val_offset:17718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17718*FLEN/8, x4, x1, x2) - -inst_5907: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f000003; valaddr_reg:x3; val_offset:17721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17721*FLEN/8, x4, x1, x2) - -inst_5908: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f000007; valaddr_reg:x3; val_offset:17724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17724*FLEN/8, x4, x1, x2) - -inst_5909: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f199999; valaddr_reg:x3; val_offset:17727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17727*FLEN/8, x4, x1, x2) - -inst_5910: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f249249; valaddr_reg:x3; val_offset:17730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17730*FLEN/8, x4, x1, x2) - -inst_5911: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f333333; valaddr_reg:x3; val_offset:17733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17733*FLEN/8, x4, x1, x2) - -inst_5912: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:17736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17736*FLEN/8, x4, x1, x2) - -inst_5913: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:17739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17739*FLEN/8, x4, x1, x2) - -inst_5914: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f444444; valaddr_reg:x3; val_offset:17742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17742*FLEN/8, x4, x1, x2) - -inst_5915: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:17745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17745*FLEN/8, x4, x1, x2) - -inst_5916: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:17748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17748*FLEN/8, x4, x1, x2) - -inst_5917: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f666666; valaddr_reg:x3; val_offset:17751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17751*FLEN/8, x4, x1, x2) - -inst_5918: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:17754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17754*FLEN/8, x4, x1, x2) - -inst_5919: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:17757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17757*FLEN/8, x4, x1, x2) - -inst_5920: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:17760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17760*FLEN/8, x4, x1, x2) - -inst_5921: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:17763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17763*FLEN/8, x4, x1, x2) - -inst_5922: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7800000; valaddr_reg:x3; val_offset:17766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17766*FLEN/8, x4, x1, x2) - -inst_5923: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7800001; valaddr_reg:x3; val_offset:17769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17769*FLEN/8, x4, x1, x2) - -inst_5924: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7800003; valaddr_reg:x3; val_offset:17772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17772*FLEN/8, x4, x1, x2) - -inst_5925: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7800007; valaddr_reg:x3; val_offset:17775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17775*FLEN/8, x4, x1, x2) - -inst_5926: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe780000f; valaddr_reg:x3; val_offset:17778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17778*FLEN/8, x4, x1, x2) - -inst_5927: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe780001f; valaddr_reg:x3; val_offset:17781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17781*FLEN/8, x4, x1, x2) - -inst_5928: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe780003f; valaddr_reg:x3; val_offset:17784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17784*FLEN/8, x4, x1, x2) - -inst_5929: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe780007f; valaddr_reg:x3; val_offset:17787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17787*FLEN/8, x4, x1, x2) - -inst_5930: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe78000ff; valaddr_reg:x3; val_offset:17790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17790*FLEN/8, x4, x1, x2) - -inst_5931: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe78001ff; valaddr_reg:x3; val_offset:17793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17793*FLEN/8, x4, x1, x2) - -inst_5932: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe78003ff; valaddr_reg:x3; val_offset:17796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17796*FLEN/8, x4, x1, x2) - -inst_5933: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe78007ff; valaddr_reg:x3; val_offset:17799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17799*FLEN/8, x4, x1, x2) - -inst_5934: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7800fff; valaddr_reg:x3; val_offset:17802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17802*FLEN/8, x4, x1, x2) - -inst_5935: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7801fff; valaddr_reg:x3; val_offset:17805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17805*FLEN/8, x4, x1, x2) - -inst_5936: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7803fff; valaddr_reg:x3; val_offset:17808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17808*FLEN/8, x4, x1, x2) - -inst_5937: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7807fff; valaddr_reg:x3; val_offset:17811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17811*FLEN/8, x4, x1, x2) - -inst_5938: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe780ffff; valaddr_reg:x3; val_offset:17814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17814*FLEN/8, x4, x1, x2) - -inst_5939: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe781ffff; valaddr_reg:x3; val_offset:17817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17817*FLEN/8, x4, x1, x2) - -inst_5940: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe783ffff; valaddr_reg:x3; val_offset:17820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17820*FLEN/8, x4, x1, x2) - -inst_5941: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe787ffff; valaddr_reg:x3; val_offset:17823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17823*FLEN/8, x4, x1, x2) - -inst_5942: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe78fffff; valaddr_reg:x3; val_offset:17826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17826*FLEN/8, x4, x1, x2) - -inst_5943: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe79fffff; valaddr_reg:x3; val_offset:17829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17829*FLEN/8, x4, x1, x2) - -inst_5944: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7bfffff; valaddr_reg:x3; val_offset:17832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17832*FLEN/8, x4, x1, x2) - -inst_5945: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7c00000; valaddr_reg:x3; val_offset:17835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17835*FLEN/8, x4, x1, x2) - -inst_5946: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7e00000; valaddr_reg:x3; val_offset:17838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17838*FLEN/8, x4, x1, x2) - -inst_5947: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7f00000; valaddr_reg:x3; val_offset:17841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17841*FLEN/8, x4, x1, x2) - -inst_5948: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7f80000; valaddr_reg:x3; val_offset:17844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17844*FLEN/8, x4, x1, x2) - -inst_5949: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fc0000; valaddr_reg:x3; val_offset:17847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17847*FLEN/8, x4, x1, x2) - -inst_5950: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fe0000; valaddr_reg:x3; val_offset:17850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17850*FLEN/8, x4, x1, x2) - -inst_5951: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ff0000; valaddr_reg:x3; val_offset:17853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17853*FLEN/8, x4, x1, x2) - -inst_5952: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ff8000; valaddr_reg:x3; val_offset:17856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17856*FLEN/8, x4, x1, x2) - -inst_5953: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ffc000; valaddr_reg:x3; val_offset:17859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17859*FLEN/8, x4, x1, x2) - -inst_5954: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ffe000; valaddr_reg:x3; val_offset:17862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17862*FLEN/8, x4, x1, x2) - -inst_5955: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fff000; valaddr_reg:x3; val_offset:17865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17865*FLEN/8, x4, x1, x2) - -inst_5956: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fff800; valaddr_reg:x3; val_offset:17868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17868*FLEN/8, x4, x1, x2) - -inst_5957: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fffc00; valaddr_reg:x3; val_offset:17871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17871*FLEN/8, x4, x1, x2) - -inst_5958: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fffe00; valaddr_reg:x3; val_offset:17874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17874*FLEN/8, x4, x1, x2) - -inst_5959: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ffff00; valaddr_reg:x3; val_offset:17877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17877*FLEN/8, x4, x1, x2) - -inst_5960: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ffff80; valaddr_reg:x3; val_offset:17880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17880*FLEN/8, x4, x1, x2) - -inst_5961: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ffffc0; valaddr_reg:x3; val_offset:17883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17883*FLEN/8, x4, x1, x2) - -inst_5962: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ffffe0; valaddr_reg:x3; val_offset:17886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17886*FLEN/8, x4, x1, x2) - -inst_5963: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fffff0; valaddr_reg:x3; val_offset:17889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17889*FLEN/8, x4, x1, x2) - -inst_5964: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fffff8; valaddr_reg:x3; val_offset:17892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17892*FLEN/8, x4, x1, x2) - -inst_5965: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fffffc; valaddr_reg:x3; val_offset:17895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17895*FLEN/8, x4, x1, x2) - -inst_5966: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7fffffe; valaddr_reg:x3; val_offset:17898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17898*FLEN/8, x4, x1, x2) - -inst_5967: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xe7ffffff; valaddr_reg:x3; val_offset:17901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17901*FLEN/8, x4, x1, x2) - -inst_5968: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff000001; valaddr_reg:x3; val_offset:17904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17904*FLEN/8, x4, x1, x2) - -inst_5969: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff000003; valaddr_reg:x3; val_offset:17907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17907*FLEN/8, x4, x1, x2) - -inst_5970: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff000007; valaddr_reg:x3; val_offset:17910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17910*FLEN/8, x4, x1, x2) - -inst_5971: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff199999; valaddr_reg:x3; val_offset:17913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17913*FLEN/8, x4, x1, x2) - -inst_5972: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff249249; valaddr_reg:x3; val_offset:17916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17916*FLEN/8, x4, x1, x2) - -inst_5973: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff333333; valaddr_reg:x3; val_offset:17919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17919*FLEN/8, x4, x1, x2) - -inst_5974: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:17922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17922*FLEN/8, x4, x1, x2) - -inst_5975: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:17925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17925*FLEN/8, x4, x1, x2) - -inst_5976: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff444444; valaddr_reg:x3; val_offset:17928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17928*FLEN/8, x4, x1, x2) - -inst_5977: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:17931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17931*FLEN/8, x4, x1, x2) - -inst_5978: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:17934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17934*FLEN/8, x4, x1, x2) - -inst_5979: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff666666; valaddr_reg:x3; val_offset:17937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17937*FLEN/8, x4, x1, x2) - -inst_5980: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:17940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17940*FLEN/8, x4, x1, x2) - -inst_5981: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:17943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17943*FLEN/8, x4, x1, x2) - -inst_5982: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:17946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17946*FLEN/8, x4, x1, x2) - -inst_5983: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:17949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17949*FLEN/8, x4, x1, x2) - -inst_5984: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66000000; valaddr_reg:x3; val_offset:17952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17952*FLEN/8, x4, x1, x2) - -inst_5985: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66000001; valaddr_reg:x3; val_offset:17955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17955*FLEN/8, x4, x1, x2) - -inst_5986: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66000003; valaddr_reg:x3; val_offset:17958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17958*FLEN/8, x4, x1, x2) - -inst_5987: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66000007; valaddr_reg:x3; val_offset:17961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17961*FLEN/8, x4, x1, x2) - -inst_5988: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x6600000f; valaddr_reg:x3; val_offset:17964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17964*FLEN/8, x4, x1, x2) - -inst_5989: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x6600001f; valaddr_reg:x3; val_offset:17967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17967*FLEN/8, x4, x1, x2) - -inst_5990: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x6600003f; valaddr_reg:x3; val_offset:17970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17970*FLEN/8, x4, x1, x2) - -inst_5991: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x6600007f; valaddr_reg:x3; val_offset:17973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17973*FLEN/8, x4, x1, x2) - -inst_5992: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x660000ff; valaddr_reg:x3; val_offset:17976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17976*FLEN/8, x4, x1, x2) - -inst_5993: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x660001ff; valaddr_reg:x3; val_offset:17979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17979*FLEN/8, x4, x1, x2) - -inst_5994: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x660003ff; valaddr_reg:x3; val_offset:17982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17982*FLEN/8, x4, x1, x2) - -inst_5995: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x660007ff; valaddr_reg:x3; val_offset:17985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17985*FLEN/8, x4, x1, x2) - -inst_5996: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66000fff; valaddr_reg:x3; val_offset:17988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17988*FLEN/8, x4, x1, x2) - -inst_5997: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66001fff; valaddr_reg:x3; val_offset:17991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17991*FLEN/8, x4, x1, x2) - -inst_5998: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66003fff; valaddr_reg:x3; val_offset:17994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17994*FLEN/8, x4, x1, x2) - -inst_5999: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66007fff; valaddr_reg:x3; val_offset:17997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17997*FLEN/8, x4, x1, x2) - -inst_6000: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x6600ffff; valaddr_reg:x3; val_offset:18000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18000*FLEN/8, x4, x1, x2) - -inst_6001: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x6601ffff; valaddr_reg:x3; val_offset:18003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18003*FLEN/8, x4, x1, x2) - -inst_6002: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x6603ffff; valaddr_reg:x3; val_offset:18006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18006*FLEN/8, x4, x1, x2) - -inst_6003: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x6607ffff; valaddr_reg:x3; val_offset:18009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18009*FLEN/8, x4, x1, x2) - -inst_6004: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x660fffff; valaddr_reg:x3; val_offset:18012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18012*FLEN/8, x4, x1, x2) - -inst_6005: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x661fffff; valaddr_reg:x3; val_offset:18015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18015*FLEN/8, x4, x1, x2) - -inst_6006: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x663fffff; valaddr_reg:x3; val_offset:18018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18018*FLEN/8, x4, x1, x2) - -inst_6007: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66400000; valaddr_reg:x3; val_offset:18021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18021*FLEN/8, x4, x1, x2) - -inst_6008: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66600000; valaddr_reg:x3; val_offset:18024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18024*FLEN/8, x4, x1, x2) - -inst_6009: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66700000; valaddr_reg:x3; val_offset:18027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18027*FLEN/8, x4, x1, x2) - -inst_6010: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x66780000; valaddr_reg:x3; val_offset:18030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18030*FLEN/8, x4, x1, x2) - -inst_6011: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667c0000; valaddr_reg:x3; val_offset:18033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18033*FLEN/8, x4, x1, x2) - -inst_6012: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667e0000; valaddr_reg:x3; val_offset:18036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18036*FLEN/8, x4, x1, x2) - -inst_6013: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667f0000; valaddr_reg:x3; val_offset:18039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18039*FLEN/8, x4, x1, x2) - -inst_6014: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667f8000; valaddr_reg:x3; val_offset:18042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18042*FLEN/8, x4, x1, x2) - -inst_6015: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667fc000; valaddr_reg:x3; val_offset:18045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18045*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_48) - -inst_6016: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667fe000; valaddr_reg:x3; val_offset:18048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18048*FLEN/8, x4, x1, x2) - -inst_6017: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667ff000; valaddr_reg:x3; val_offset:18051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18051*FLEN/8, x4, x1, x2) - -inst_6018: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667ff800; valaddr_reg:x3; val_offset:18054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18054*FLEN/8, x4, x1, x2) - -inst_6019: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667ffc00; valaddr_reg:x3; val_offset:18057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18057*FLEN/8, x4, x1, x2) - -inst_6020: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667ffe00; valaddr_reg:x3; val_offset:18060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18060*FLEN/8, x4, x1, x2) - -inst_6021: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667fff00; valaddr_reg:x3; val_offset:18063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18063*FLEN/8, x4, x1, x2) - -inst_6022: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667fff80; valaddr_reg:x3; val_offset:18066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18066*FLEN/8, x4, x1, x2) - -inst_6023: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667fffc0; valaddr_reg:x3; val_offset:18069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18069*FLEN/8, x4, x1, x2) - -inst_6024: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667fffe0; valaddr_reg:x3; val_offset:18072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18072*FLEN/8, x4, x1, x2) - -inst_6025: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667ffff0; valaddr_reg:x3; val_offset:18075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18075*FLEN/8, x4, x1, x2) - -inst_6026: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667ffff8; valaddr_reg:x3; val_offset:18078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18078*FLEN/8, x4, x1, x2) - -inst_6027: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667ffffc; valaddr_reg:x3; val_offset:18081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18081*FLEN/8, x4, x1, x2) - -inst_6028: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667ffffe; valaddr_reg:x3; val_offset:18084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18084*FLEN/8, x4, x1, x2) - -inst_6029: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x667fffff; valaddr_reg:x3; val_offset:18087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18087*FLEN/8, x4, x1, x2) - -inst_6030: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f000001; valaddr_reg:x3; val_offset:18090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18090*FLEN/8, x4, x1, x2) - -inst_6031: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f000003; valaddr_reg:x3; val_offset:18093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18093*FLEN/8, x4, x1, x2) - -inst_6032: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f000007; valaddr_reg:x3; val_offset:18096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18096*FLEN/8, x4, x1, x2) - -inst_6033: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f199999; valaddr_reg:x3; val_offset:18099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18099*FLEN/8, x4, x1, x2) - -inst_6034: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f249249; valaddr_reg:x3; val_offset:18102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18102*FLEN/8, x4, x1, x2) - -inst_6035: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f333333; valaddr_reg:x3; val_offset:18105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18105*FLEN/8, x4, x1, x2) - -inst_6036: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:18108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18108*FLEN/8, x4, x1, x2) - -inst_6037: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:18111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18111*FLEN/8, x4, x1, x2) - -inst_6038: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f444444; valaddr_reg:x3; val_offset:18114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18114*FLEN/8, x4, x1, x2) - -inst_6039: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:18117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18117*FLEN/8, x4, x1, x2) - -inst_6040: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:18120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18120*FLEN/8, x4, x1, x2) - -inst_6041: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f666666; valaddr_reg:x3; val_offset:18123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18123*FLEN/8, x4, x1, x2) - -inst_6042: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:18126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18126*FLEN/8, x4, x1, x2) - -inst_6043: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:18129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18129*FLEN/8, x4, x1, x2) - -inst_6044: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:18132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18132*FLEN/8, x4, x1, x2) - -inst_6045: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:18135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18135*FLEN/8, x4, x1, x2) - -inst_6046: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74000000; valaddr_reg:x3; val_offset:18138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18138*FLEN/8, x4, x1, x2) - -inst_6047: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74000001; valaddr_reg:x3; val_offset:18141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18141*FLEN/8, x4, x1, x2) - -inst_6048: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74000003; valaddr_reg:x3; val_offset:18144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18144*FLEN/8, x4, x1, x2) - -inst_6049: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74000007; valaddr_reg:x3; val_offset:18147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18147*FLEN/8, x4, x1, x2) - -inst_6050: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7400000f; valaddr_reg:x3; val_offset:18150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18150*FLEN/8, x4, x1, x2) - -inst_6051: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7400001f; valaddr_reg:x3; val_offset:18153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18153*FLEN/8, x4, x1, x2) - -inst_6052: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7400003f; valaddr_reg:x3; val_offset:18156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18156*FLEN/8, x4, x1, x2) - -inst_6053: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7400007f; valaddr_reg:x3; val_offset:18159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18159*FLEN/8, x4, x1, x2) - -inst_6054: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x740000ff; valaddr_reg:x3; val_offset:18162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18162*FLEN/8, x4, x1, x2) - -inst_6055: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x740001ff; valaddr_reg:x3; val_offset:18165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18165*FLEN/8, x4, x1, x2) - -inst_6056: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x740003ff; valaddr_reg:x3; val_offset:18168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18168*FLEN/8, x4, x1, x2) - -inst_6057: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x740007ff; valaddr_reg:x3; val_offset:18171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18171*FLEN/8, x4, x1, x2) - -inst_6058: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74000fff; valaddr_reg:x3; val_offset:18174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18174*FLEN/8, x4, x1, x2) - -inst_6059: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74001fff; valaddr_reg:x3; val_offset:18177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18177*FLEN/8, x4, x1, x2) - -inst_6060: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74003fff; valaddr_reg:x3; val_offset:18180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18180*FLEN/8, x4, x1, x2) - -inst_6061: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74007fff; valaddr_reg:x3; val_offset:18183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18183*FLEN/8, x4, x1, x2) - -inst_6062: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7400ffff; valaddr_reg:x3; val_offset:18186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18186*FLEN/8, x4, x1, x2) - -inst_6063: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7401ffff; valaddr_reg:x3; val_offset:18189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18189*FLEN/8, x4, x1, x2) - -inst_6064: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7403ffff; valaddr_reg:x3; val_offset:18192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18192*FLEN/8, x4, x1, x2) - -inst_6065: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7407ffff; valaddr_reg:x3; val_offset:18195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18195*FLEN/8, x4, x1, x2) - -inst_6066: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x740fffff; valaddr_reg:x3; val_offset:18198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18198*FLEN/8, x4, x1, x2) - -inst_6067: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x741fffff; valaddr_reg:x3; val_offset:18201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18201*FLEN/8, x4, x1, x2) - -inst_6068: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x743fffff; valaddr_reg:x3; val_offset:18204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18204*FLEN/8, x4, x1, x2) - -inst_6069: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74400000; valaddr_reg:x3; val_offset:18207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18207*FLEN/8, x4, x1, x2) - -inst_6070: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74600000; valaddr_reg:x3; val_offset:18210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18210*FLEN/8, x4, x1, x2) - -inst_6071: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74700000; valaddr_reg:x3; val_offset:18213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18213*FLEN/8, x4, x1, x2) - -inst_6072: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x74780000; valaddr_reg:x3; val_offset:18216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18216*FLEN/8, x4, x1, x2) - -inst_6073: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747c0000; valaddr_reg:x3; val_offset:18219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18219*FLEN/8, x4, x1, x2) - -inst_6074: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747e0000; valaddr_reg:x3; val_offset:18222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18222*FLEN/8, x4, x1, x2) - -inst_6075: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747f0000; valaddr_reg:x3; val_offset:18225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18225*FLEN/8, x4, x1, x2) - -inst_6076: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747f8000; valaddr_reg:x3; val_offset:18228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18228*FLEN/8, x4, x1, x2) - -inst_6077: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747fc000; valaddr_reg:x3; val_offset:18231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18231*FLEN/8, x4, x1, x2) - -inst_6078: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747fe000; valaddr_reg:x3; val_offset:18234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18234*FLEN/8, x4, x1, x2) - -inst_6079: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747ff000; valaddr_reg:x3; val_offset:18237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18237*FLEN/8, x4, x1, x2) - -inst_6080: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747ff800; valaddr_reg:x3; val_offset:18240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18240*FLEN/8, x4, x1, x2) - -inst_6081: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747ffc00; valaddr_reg:x3; val_offset:18243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18243*FLEN/8, x4, x1, x2) - -inst_6082: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747ffe00; valaddr_reg:x3; val_offset:18246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18246*FLEN/8, x4, x1, x2) - -inst_6083: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747fff00; valaddr_reg:x3; val_offset:18249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18249*FLEN/8, x4, x1, x2) - -inst_6084: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747fff80; valaddr_reg:x3; val_offset:18252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18252*FLEN/8, x4, x1, x2) - -inst_6085: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747fffc0; valaddr_reg:x3; val_offset:18255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18255*FLEN/8, x4, x1, x2) - -inst_6086: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747fffe0; valaddr_reg:x3; val_offset:18258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18258*FLEN/8, x4, x1, x2) - -inst_6087: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747ffff0; valaddr_reg:x3; val_offset:18261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18261*FLEN/8, x4, x1, x2) - -inst_6088: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747ffff8; valaddr_reg:x3; val_offset:18264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18264*FLEN/8, x4, x1, x2) - -inst_6089: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747ffffc; valaddr_reg:x3; val_offset:18267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18267*FLEN/8, x4, x1, x2) - -inst_6090: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747ffffe; valaddr_reg:x3; val_offset:18270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18270*FLEN/8, x4, x1, x2) - -inst_6091: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x747fffff; valaddr_reg:x3; val_offset:18273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18273*FLEN/8, x4, x1, x2) - -inst_6092: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f000001; valaddr_reg:x3; val_offset:18276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18276*FLEN/8, x4, x1, x2) - -inst_6093: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f000003; valaddr_reg:x3; val_offset:18279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18279*FLEN/8, x4, x1, x2) - -inst_6094: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f000007; valaddr_reg:x3; val_offset:18282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18282*FLEN/8, x4, x1, x2) - -inst_6095: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f199999; valaddr_reg:x3; val_offset:18285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18285*FLEN/8, x4, x1, x2) - -inst_6096: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f249249; valaddr_reg:x3; val_offset:18288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18288*FLEN/8, x4, x1, x2) - -inst_6097: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f333333; valaddr_reg:x3; val_offset:18291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18291*FLEN/8, x4, x1, x2) - -inst_6098: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:18294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18294*FLEN/8, x4, x1, x2) - -inst_6099: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:18297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18297*FLEN/8, x4, x1, x2) - -inst_6100: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f444444; valaddr_reg:x3; val_offset:18300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18300*FLEN/8, x4, x1, x2) - -inst_6101: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:18303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18303*FLEN/8, x4, x1, x2) - -inst_6102: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:18306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18306*FLEN/8, x4, x1, x2) - -inst_6103: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f666666; valaddr_reg:x3; val_offset:18309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18309*FLEN/8, x4, x1, x2) - -inst_6104: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:18312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18312*FLEN/8, x4, x1, x2) - -inst_6105: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:18315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18315*FLEN/8, x4, x1, x2) - -inst_6106: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:18318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18318*FLEN/8, x4, x1, x2) - -inst_6107: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:18321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18321*FLEN/8, x4, x1, x2) - -inst_6108: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:18324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18324*FLEN/8, x4, x1, x2) - -inst_6109: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:18327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18327*FLEN/8, x4, x1, x2) - -inst_6110: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:18330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18330*FLEN/8, x4, x1, x2) - -inst_6111: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:18333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18333*FLEN/8, x4, x1, x2) - -inst_6112: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:18336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18336*FLEN/8, x4, x1, x2) - -inst_6113: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:18339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18339*FLEN/8, x4, x1, x2) - -inst_6114: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:18342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18342*FLEN/8, x4, x1, x2) - -inst_6115: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:18345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18345*FLEN/8, x4, x1, x2) - -inst_6116: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:18348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18348*FLEN/8, x4, x1, x2) - -inst_6117: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:18351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18351*FLEN/8, x4, x1, x2) - -inst_6118: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:18354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18354*FLEN/8, x4, x1, x2) - -inst_6119: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:18357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18357*FLEN/8, x4, x1, x2) - -inst_6120: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:18360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18360*FLEN/8, x4, x1, x2) - -inst_6121: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:18363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18363*FLEN/8, x4, x1, x2) - -inst_6122: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:18366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18366*FLEN/8, x4, x1, x2) - -inst_6123: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:18369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18369*FLEN/8, x4, x1, x2) - -inst_6124: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8800000; valaddr_reg:x3; val_offset:18372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18372*FLEN/8, x4, x1, x2) - -inst_6125: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8800001; valaddr_reg:x3; val_offset:18375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18375*FLEN/8, x4, x1, x2) - -inst_6126: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8800003; valaddr_reg:x3; val_offset:18378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18378*FLEN/8, x4, x1, x2) - -inst_6127: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8800007; valaddr_reg:x3; val_offset:18381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18381*FLEN/8, x4, x1, x2) - -inst_6128: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x880000f; valaddr_reg:x3; val_offset:18384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18384*FLEN/8, x4, x1, x2) - -inst_6129: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x880001f; valaddr_reg:x3; val_offset:18387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18387*FLEN/8, x4, x1, x2) - -inst_6130: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x880003f; valaddr_reg:x3; val_offset:18390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18390*FLEN/8, x4, x1, x2) - -inst_6131: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x880007f; valaddr_reg:x3; val_offset:18393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18393*FLEN/8, x4, x1, x2) - -inst_6132: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x88000ff; valaddr_reg:x3; val_offset:18396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18396*FLEN/8, x4, x1, x2) - -inst_6133: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x88001ff; valaddr_reg:x3; val_offset:18399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18399*FLEN/8, x4, x1, x2) - -inst_6134: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x88003ff; valaddr_reg:x3; val_offset:18402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18402*FLEN/8, x4, x1, x2) - -inst_6135: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x88007ff; valaddr_reg:x3; val_offset:18405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18405*FLEN/8, x4, x1, x2) - -inst_6136: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8800fff; valaddr_reg:x3; val_offset:18408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18408*FLEN/8, x4, x1, x2) - -inst_6137: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8801fff; valaddr_reg:x3; val_offset:18411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18411*FLEN/8, x4, x1, x2) - -inst_6138: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8803fff; valaddr_reg:x3; val_offset:18414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18414*FLEN/8, x4, x1, x2) - -inst_6139: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8807fff; valaddr_reg:x3; val_offset:18417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18417*FLEN/8, x4, x1, x2) - -inst_6140: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x880ffff; valaddr_reg:x3; val_offset:18420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18420*FLEN/8, x4, x1, x2) - -inst_6141: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x881ffff; valaddr_reg:x3; val_offset:18423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18423*FLEN/8, x4, x1, x2) - -inst_6142: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x883ffff; valaddr_reg:x3; val_offset:18426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18426*FLEN/8, x4, x1, x2) - -inst_6143: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x887ffff; valaddr_reg:x3; val_offset:18429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18429*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_49) - -inst_6144: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x88fffff; valaddr_reg:x3; val_offset:18432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18432*FLEN/8, x4, x1, x2) - -inst_6145: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x89fffff; valaddr_reg:x3; val_offset:18435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18435*FLEN/8, x4, x1, x2) - -inst_6146: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8bfffff; valaddr_reg:x3; val_offset:18438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18438*FLEN/8, x4, x1, x2) - -inst_6147: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8c00000; valaddr_reg:x3; val_offset:18441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18441*FLEN/8, x4, x1, x2) - -inst_6148: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8e00000; valaddr_reg:x3; val_offset:18444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18444*FLEN/8, x4, x1, x2) - -inst_6149: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8f00000; valaddr_reg:x3; val_offset:18447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18447*FLEN/8, x4, x1, x2) - -inst_6150: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8f80000; valaddr_reg:x3; val_offset:18450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18450*FLEN/8, x4, x1, x2) - -inst_6151: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fc0000; valaddr_reg:x3; val_offset:18453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18453*FLEN/8, x4, x1, x2) - -inst_6152: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fe0000; valaddr_reg:x3; val_offset:18456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18456*FLEN/8, x4, x1, x2) - -inst_6153: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ff0000; valaddr_reg:x3; val_offset:18459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18459*FLEN/8, x4, x1, x2) - -inst_6154: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ff8000; valaddr_reg:x3; val_offset:18462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18462*FLEN/8, x4, x1, x2) - -inst_6155: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ffc000; valaddr_reg:x3; val_offset:18465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18465*FLEN/8, x4, x1, x2) - -inst_6156: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ffe000; valaddr_reg:x3; val_offset:18468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18468*FLEN/8, x4, x1, x2) - -inst_6157: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fff000; valaddr_reg:x3; val_offset:18471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18471*FLEN/8, x4, x1, x2) - -inst_6158: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fff800; valaddr_reg:x3; val_offset:18474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18474*FLEN/8, x4, x1, x2) - -inst_6159: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fffc00; valaddr_reg:x3; val_offset:18477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18477*FLEN/8, x4, x1, x2) - -inst_6160: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fffe00; valaddr_reg:x3; val_offset:18480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18480*FLEN/8, x4, x1, x2) - -inst_6161: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ffff00; valaddr_reg:x3; val_offset:18483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18483*FLEN/8, x4, x1, x2) - -inst_6162: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ffff80; valaddr_reg:x3; val_offset:18486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18486*FLEN/8, x4, x1, x2) - -inst_6163: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ffffc0; valaddr_reg:x3; val_offset:18489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18489*FLEN/8, x4, x1, x2) - -inst_6164: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ffffe0; valaddr_reg:x3; val_offset:18492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18492*FLEN/8, x4, x1, x2) - -inst_6165: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fffff0; valaddr_reg:x3; val_offset:18495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18495*FLEN/8, x4, x1, x2) - -inst_6166: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fffff8; valaddr_reg:x3; val_offset:18498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18498*FLEN/8, x4, x1, x2) - -inst_6167: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fffffc; valaddr_reg:x3; val_offset:18501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18501*FLEN/8, x4, x1, x2) - -inst_6168: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8fffffe; valaddr_reg:x3; val_offset:18504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18504*FLEN/8, x4, x1, x2) - -inst_6169: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; -op3val:0x8ffffff; valaddr_reg:x3; val_offset:18507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18507*FLEN/8, x4, x1, x2) - -inst_6170: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:18510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18510*FLEN/8, x4, x1, x2) - -inst_6171: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:18513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18513*FLEN/8, x4, x1, x2) - -inst_6172: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:18516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18516*FLEN/8, x4, x1, x2) - -inst_6173: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:18519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18519*FLEN/8, x4, x1, x2) - -inst_6174: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:18522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18522*FLEN/8, x4, x1, x2) - -inst_6175: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:18525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18525*FLEN/8, x4, x1, x2) - -inst_6176: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:18528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18528*FLEN/8, x4, x1, x2) - -inst_6177: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:18531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18531*FLEN/8, x4, x1, x2) - -inst_6178: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:18534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18534*FLEN/8, x4, x1, x2) - -inst_6179: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:18537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18537*FLEN/8, x4, x1, x2) - -inst_6180: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:18540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18540*FLEN/8, x4, x1, x2) - -inst_6181: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:18543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18543*FLEN/8, x4, x1, x2) - -inst_6182: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:18546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18546*FLEN/8, x4, x1, x2) - -inst_6183: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:18549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18549*FLEN/8, x4, x1, x2) - -inst_6184: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:18552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18552*FLEN/8, x4, x1, x2) - -inst_6185: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:18555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18555*FLEN/8, x4, x1, x2) - -inst_6186: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7000000; valaddr_reg:x3; val_offset:18558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18558*FLEN/8, x4, x1, x2) - -inst_6187: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7000001; valaddr_reg:x3; val_offset:18561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18561*FLEN/8, x4, x1, x2) - -inst_6188: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7000003; valaddr_reg:x3; val_offset:18564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18564*FLEN/8, x4, x1, x2) - -inst_6189: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7000007; valaddr_reg:x3; val_offset:18567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18567*FLEN/8, x4, x1, x2) - -inst_6190: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x700000f; valaddr_reg:x3; val_offset:18570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18570*FLEN/8, x4, x1, x2) - -inst_6191: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x700001f; valaddr_reg:x3; val_offset:18573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18573*FLEN/8, x4, x1, x2) - -inst_6192: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x700003f; valaddr_reg:x3; val_offset:18576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18576*FLEN/8, x4, x1, x2) - -inst_6193: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x700007f; valaddr_reg:x3; val_offset:18579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18579*FLEN/8, x4, x1, x2) - -inst_6194: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x70000ff; valaddr_reg:x3; val_offset:18582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18582*FLEN/8, x4, x1, x2) - -inst_6195: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x70001ff; valaddr_reg:x3; val_offset:18585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18585*FLEN/8, x4, x1, x2) - -inst_6196: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x70003ff; valaddr_reg:x3; val_offset:18588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18588*FLEN/8, x4, x1, x2) - -inst_6197: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x70007ff; valaddr_reg:x3; val_offset:18591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18591*FLEN/8, x4, x1, x2) - -inst_6198: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7000fff; valaddr_reg:x3; val_offset:18594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18594*FLEN/8, x4, x1, x2) - -inst_6199: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7001fff; valaddr_reg:x3; val_offset:18597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18597*FLEN/8, x4, x1, x2) - -inst_6200: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7003fff; valaddr_reg:x3; val_offset:18600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18600*FLEN/8, x4, x1, x2) - -inst_6201: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7007fff; valaddr_reg:x3; val_offset:18603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18603*FLEN/8, x4, x1, x2) - -inst_6202: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x700ffff; valaddr_reg:x3; val_offset:18606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18606*FLEN/8, x4, x1, x2) - -inst_6203: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x701ffff; valaddr_reg:x3; val_offset:18609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18609*FLEN/8, x4, x1, x2) - -inst_6204: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x703ffff; valaddr_reg:x3; val_offset:18612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18612*FLEN/8, x4, x1, x2) - -inst_6205: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x707ffff; valaddr_reg:x3; val_offset:18615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18615*FLEN/8, x4, x1, x2) - -inst_6206: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x70fffff; valaddr_reg:x3; val_offset:18618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18618*FLEN/8, x4, x1, x2) - -inst_6207: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x71fffff; valaddr_reg:x3; val_offset:18621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18621*FLEN/8, x4, x1, x2) - -inst_6208: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x73fffff; valaddr_reg:x3; val_offset:18624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18624*FLEN/8, x4, x1, x2) - -inst_6209: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7400000; valaddr_reg:x3; val_offset:18627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18627*FLEN/8, x4, x1, x2) - -inst_6210: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7600000; valaddr_reg:x3; val_offset:18630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18630*FLEN/8, x4, x1, x2) - -inst_6211: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7700000; valaddr_reg:x3; val_offset:18633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18633*FLEN/8, x4, x1, x2) - -inst_6212: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x7780000; valaddr_reg:x3; val_offset:18636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18636*FLEN/8, x4, x1, x2) - -inst_6213: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77c0000; valaddr_reg:x3; val_offset:18639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18639*FLEN/8, x4, x1, x2) - -inst_6214: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77e0000; valaddr_reg:x3; val_offset:18642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18642*FLEN/8, x4, x1, x2) - -inst_6215: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77f0000; valaddr_reg:x3; val_offset:18645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18645*FLEN/8, x4, x1, x2) - -inst_6216: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77f8000; valaddr_reg:x3; val_offset:18648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18648*FLEN/8, x4, x1, x2) - -inst_6217: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77fc000; valaddr_reg:x3; val_offset:18651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18651*FLEN/8, x4, x1, x2) - -inst_6218: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77fe000; valaddr_reg:x3; val_offset:18654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18654*FLEN/8, x4, x1, x2) - -inst_6219: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77ff000; valaddr_reg:x3; val_offset:18657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18657*FLEN/8, x4, x1, x2) - -inst_6220: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77ff800; valaddr_reg:x3; val_offset:18660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18660*FLEN/8, x4, x1, x2) - -inst_6221: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77ffc00; valaddr_reg:x3; val_offset:18663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18663*FLEN/8, x4, x1, x2) - -inst_6222: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77ffe00; valaddr_reg:x3; val_offset:18666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18666*FLEN/8, x4, x1, x2) - -inst_6223: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77fff00; valaddr_reg:x3; val_offset:18669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18669*FLEN/8, x4, x1, x2) - -inst_6224: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77fff80; valaddr_reg:x3; val_offset:18672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18672*FLEN/8, x4, x1, x2) - -inst_6225: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77fffc0; valaddr_reg:x3; val_offset:18675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18675*FLEN/8, x4, x1, x2) - -inst_6226: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77fffe0; valaddr_reg:x3; val_offset:18678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18678*FLEN/8, x4, x1, x2) - -inst_6227: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77ffff0; valaddr_reg:x3; val_offset:18681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18681*FLEN/8, x4, x1, x2) - -inst_6228: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77ffff8; valaddr_reg:x3; val_offset:18684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18684*FLEN/8, x4, x1, x2) - -inst_6229: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77ffffc; valaddr_reg:x3; val_offset:18687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18687*FLEN/8, x4, x1, x2) - -inst_6230: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77ffffe; valaddr_reg:x3; val_offset:18690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18690*FLEN/8, x4, x1, x2) - -inst_6231: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; -op3val:0x77fffff; valaddr_reg:x3; val_offset:18693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18693*FLEN/8, x4, x1, x2) - -inst_6232: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:18696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18696*FLEN/8, x4, x1, x2) - -inst_6233: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:18699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18699*FLEN/8, x4, x1, x2) - -inst_6234: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:18702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18702*FLEN/8, x4, x1, x2) - -inst_6235: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:18705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18705*FLEN/8, x4, x1, x2) - -inst_6236: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:18708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18708*FLEN/8, x4, x1, x2) - -inst_6237: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:18711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18711*FLEN/8, x4, x1, x2) - -inst_6238: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:18714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18714*FLEN/8, x4, x1, x2) - -inst_6239: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:18717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18717*FLEN/8, x4, x1, x2) - -inst_6240: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:18720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18720*FLEN/8, x4, x1, x2) - -inst_6241: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:18723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18723*FLEN/8, x4, x1, x2) - -inst_6242: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:18726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18726*FLEN/8, x4, x1, x2) - -inst_6243: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:18729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18729*FLEN/8, x4, x1, x2) - -inst_6244: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:18732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18732*FLEN/8, x4, x1, x2) - -inst_6245: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:18735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18735*FLEN/8, x4, x1, x2) - -inst_6246: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:18738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18738*FLEN/8, x4, x1, x2) - -inst_6247: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:18741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18741*FLEN/8, x4, x1, x2) - -inst_6248: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf800000; valaddr_reg:x3; val_offset:18744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18744*FLEN/8, x4, x1, x2) - -inst_6249: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf800001; valaddr_reg:x3; val_offset:18747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18747*FLEN/8, x4, x1, x2) - -inst_6250: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf800003; valaddr_reg:x3; val_offset:18750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18750*FLEN/8, x4, x1, x2) - -inst_6251: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf800007; valaddr_reg:x3; val_offset:18753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18753*FLEN/8, x4, x1, x2) - -inst_6252: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf80000f; valaddr_reg:x3; val_offset:18756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18756*FLEN/8, x4, x1, x2) - -inst_6253: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf80001f; valaddr_reg:x3; val_offset:18759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18759*FLEN/8, x4, x1, x2) - -inst_6254: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf80003f; valaddr_reg:x3; val_offset:18762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18762*FLEN/8, x4, x1, x2) - -inst_6255: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf80007f; valaddr_reg:x3; val_offset:18765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18765*FLEN/8, x4, x1, x2) - -inst_6256: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf8000ff; valaddr_reg:x3; val_offset:18768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18768*FLEN/8, x4, x1, x2) - -inst_6257: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf8001ff; valaddr_reg:x3; val_offset:18771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18771*FLEN/8, x4, x1, x2) - -inst_6258: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf8003ff; valaddr_reg:x3; val_offset:18774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18774*FLEN/8, x4, x1, x2) - -inst_6259: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf8007ff; valaddr_reg:x3; val_offset:18777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18777*FLEN/8, x4, x1, x2) - -inst_6260: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf800fff; valaddr_reg:x3; val_offset:18780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18780*FLEN/8, x4, x1, x2) - -inst_6261: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf801fff; valaddr_reg:x3; val_offset:18783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18783*FLEN/8, x4, x1, x2) - -inst_6262: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf803fff; valaddr_reg:x3; val_offset:18786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18786*FLEN/8, x4, x1, x2) - -inst_6263: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf807fff; valaddr_reg:x3; val_offset:18789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18789*FLEN/8, x4, x1, x2) - -inst_6264: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf80ffff; valaddr_reg:x3; val_offset:18792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18792*FLEN/8, x4, x1, x2) - -inst_6265: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf81ffff; valaddr_reg:x3; val_offset:18795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18795*FLEN/8, x4, x1, x2) - -inst_6266: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf83ffff; valaddr_reg:x3; val_offset:18798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18798*FLEN/8, x4, x1, x2) - -inst_6267: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf87ffff; valaddr_reg:x3; val_offset:18801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18801*FLEN/8, x4, x1, x2) - -inst_6268: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf8fffff; valaddr_reg:x3; val_offset:18804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18804*FLEN/8, x4, x1, x2) - -inst_6269: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xf9fffff; valaddr_reg:x3; val_offset:18807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18807*FLEN/8, x4, x1, x2) - -inst_6270: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfbfffff; valaddr_reg:x3; val_offset:18810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18810*FLEN/8, x4, x1, x2) - -inst_6271: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfc00000; valaddr_reg:x3; val_offset:18813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18813*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_50) - -inst_6272: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfe00000; valaddr_reg:x3; val_offset:18816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18816*FLEN/8, x4, x1, x2) - -inst_6273: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xff00000; valaddr_reg:x3; val_offset:18819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18819*FLEN/8, x4, x1, x2) - -inst_6274: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xff80000; valaddr_reg:x3; val_offset:18822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18822*FLEN/8, x4, x1, x2) - -inst_6275: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffc0000; valaddr_reg:x3; val_offset:18825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18825*FLEN/8, x4, x1, x2) - -inst_6276: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffe0000; valaddr_reg:x3; val_offset:18828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18828*FLEN/8, x4, x1, x2) - -inst_6277: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfff0000; valaddr_reg:x3; val_offset:18831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18831*FLEN/8, x4, x1, x2) - -inst_6278: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfff8000; valaddr_reg:x3; val_offset:18834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18834*FLEN/8, x4, x1, x2) - -inst_6279: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfffc000; valaddr_reg:x3; val_offset:18837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18837*FLEN/8, x4, x1, x2) - -inst_6280: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfffe000; valaddr_reg:x3; val_offset:18840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18840*FLEN/8, x4, x1, x2) - -inst_6281: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffff000; valaddr_reg:x3; val_offset:18843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18843*FLEN/8, x4, x1, x2) - -inst_6282: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffff800; valaddr_reg:x3; val_offset:18846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18846*FLEN/8, x4, x1, x2) - -inst_6283: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffffc00; valaddr_reg:x3; val_offset:18849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18849*FLEN/8, x4, x1, x2) - -inst_6284: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffffe00; valaddr_reg:x3; val_offset:18852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18852*FLEN/8, x4, x1, x2) - -inst_6285: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfffff00; valaddr_reg:x3; val_offset:18855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18855*FLEN/8, x4, x1, x2) - -inst_6286: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfffff80; valaddr_reg:x3; val_offset:18858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18858*FLEN/8, x4, x1, x2) - -inst_6287: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfffffc0; valaddr_reg:x3; val_offset:18861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18861*FLEN/8, x4, x1, x2) - -inst_6288: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfffffe0; valaddr_reg:x3; val_offset:18864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18864*FLEN/8, x4, x1, x2) - -inst_6289: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffffff0; valaddr_reg:x3; val_offset:18867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18867*FLEN/8, x4, x1, x2) - -inst_6290: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffffff8; valaddr_reg:x3; val_offset:18870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18870*FLEN/8, x4, x1, x2) - -inst_6291: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffffffc; valaddr_reg:x3; val_offset:18873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18873*FLEN/8, x4, x1, x2) - -inst_6292: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xffffffe; valaddr_reg:x3; val_offset:18876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18876*FLEN/8, x4, x1, x2) - -inst_6293: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; -op3val:0xfffffff; valaddr_reg:x3; val_offset:18879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18879*FLEN/8, x4, x1, x2) - -inst_6294: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20800000; valaddr_reg:x3; val_offset:18882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18882*FLEN/8, x4, x1, x2) - -inst_6295: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20800001; valaddr_reg:x3; val_offset:18885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18885*FLEN/8, x4, x1, x2) - -inst_6296: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20800003; valaddr_reg:x3; val_offset:18888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18888*FLEN/8, x4, x1, x2) - -inst_6297: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20800007; valaddr_reg:x3; val_offset:18891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18891*FLEN/8, x4, x1, x2) - -inst_6298: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x2080000f; valaddr_reg:x3; val_offset:18894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18894*FLEN/8, x4, x1, x2) - -inst_6299: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x2080001f; valaddr_reg:x3; val_offset:18897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18897*FLEN/8, x4, x1, x2) - -inst_6300: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x2080003f; valaddr_reg:x3; val_offset:18900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18900*FLEN/8, x4, x1, x2) - -inst_6301: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x2080007f; valaddr_reg:x3; val_offset:18903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18903*FLEN/8, x4, x1, x2) - -inst_6302: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x208000ff; valaddr_reg:x3; val_offset:18906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18906*FLEN/8, x4, x1, x2) - -inst_6303: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x208001ff; valaddr_reg:x3; val_offset:18909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18909*FLEN/8, x4, x1, x2) - -inst_6304: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x208003ff; valaddr_reg:x3; val_offset:18912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18912*FLEN/8, x4, x1, x2) - -inst_6305: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x208007ff; valaddr_reg:x3; val_offset:18915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18915*FLEN/8, x4, x1, x2) - -inst_6306: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20800fff; valaddr_reg:x3; val_offset:18918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18918*FLEN/8, x4, x1, x2) - -inst_6307: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20801fff; valaddr_reg:x3; val_offset:18921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18921*FLEN/8, x4, x1, x2) - -inst_6308: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20803fff; valaddr_reg:x3; val_offset:18924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18924*FLEN/8, x4, x1, x2) - -inst_6309: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20807fff; valaddr_reg:x3; val_offset:18927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18927*FLEN/8, x4, x1, x2) - -inst_6310: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x2080ffff; valaddr_reg:x3; val_offset:18930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18930*FLEN/8, x4, x1, x2) - -inst_6311: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x2081ffff; valaddr_reg:x3; val_offset:18933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18933*FLEN/8, x4, x1, x2) - -inst_6312: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x2083ffff; valaddr_reg:x3; val_offset:18936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18936*FLEN/8, x4, x1, x2) - -inst_6313: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x2087ffff; valaddr_reg:x3; val_offset:18939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18939*FLEN/8, x4, x1, x2) - -inst_6314: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x208fffff; valaddr_reg:x3; val_offset:18942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18942*FLEN/8, x4, x1, x2) - -inst_6315: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x209fffff; valaddr_reg:x3; val_offset:18945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18945*FLEN/8, x4, x1, x2) - -inst_6316: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20bfffff; valaddr_reg:x3; val_offset:18948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18948*FLEN/8, x4, x1, x2) - -inst_6317: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20c00000; valaddr_reg:x3; val_offset:18951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18951*FLEN/8, x4, x1, x2) - -inst_6318: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20e00000; valaddr_reg:x3; val_offset:18954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18954*FLEN/8, x4, x1, x2) - -inst_6319: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20f00000; valaddr_reg:x3; val_offset:18957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18957*FLEN/8, x4, x1, x2) - -inst_6320: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20f80000; valaddr_reg:x3; val_offset:18960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18960*FLEN/8, x4, x1, x2) - -inst_6321: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fc0000; valaddr_reg:x3; val_offset:18963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18963*FLEN/8, x4, x1, x2) - -inst_6322: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fe0000; valaddr_reg:x3; val_offset:18966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18966*FLEN/8, x4, x1, x2) - -inst_6323: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ff0000; valaddr_reg:x3; val_offset:18969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18969*FLEN/8, x4, x1, x2) - -inst_6324: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ff8000; valaddr_reg:x3; val_offset:18972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18972*FLEN/8, x4, x1, x2) - -inst_6325: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ffc000; valaddr_reg:x3; val_offset:18975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18975*FLEN/8, x4, x1, x2) - -inst_6326: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ffe000; valaddr_reg:x3; val_offset:18978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18978*FLEN/8, x4, x1, x2) - -inst_6327: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fff000; valaddr_reg:x3; val_offset:18981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18981*FLEN/8, x4, x1, x2) - -inst_6328: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fff800; valaddr_reg:x3; val_offset:18984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18984*FLEN/8, x4, x1, x2) - -inst_6329: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fffc00; valaddr_reg:x3; val_offset:18987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18987*FLEN/8, x4, x1, x2) - -inst_6330: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fffe00; valaddr_reg:x3; val_offset:18990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18990*FLEN/8, x4, x1, x2) - -inst_6331: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ffff00; valaddr_reg:x3; val_offset:18993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18993*FLEN/8, x4, x1, x2) - -inst_6332: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ffff80; valaddr_reg:x3; val_offset:18996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18996*FLEN/8, x4, x1, x2) - -inst_6333: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ffffc0; valaddr_reg:x3; val_offset:18999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18999*FLEN/8, x4, x1, x2) - -inst_6334: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ffffe0; valaddr_reg:x3; val_offset:19002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19002*FLEN/8, x4, x1, x2) - -inst_6335: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fffff0; valaddr_reg:x3; val_offset:19005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19005*FLEN/8, x4, x1, x2) - -inst_6336: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fffff8; valaddr_reg:x3; val_offset:19008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19008*FLEN/8, x4, x1, x2) - -inst_6337: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fffffc; valaddr_reg:x3; val_offset:19011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19011*FLEN/8, x4, x1, x2) - -inst_6338: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20fffffe; valaddr_reg:x3; val_offset:19014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19014*FLEN/8, x4, x1, x2) - -inst_6339: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x20ffffff; valaddr_reg:x3; val_offset:19017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19017*FLEN/8, x4, x1, x2) - -inst_6340: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:19020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19020*FLEN/8, x4, x1, x2) - -inst_6341: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:19023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19023*FLEN/8, x4, x1, x2) - -inst_6342: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:19026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19026*FLEN/8, x4, x1, x2) - -inst_6343: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:19029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19029*FLEN/8, x4, x1, x2) - -inst_6344: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:19032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19032*FLEN/8, x4, x1, x2) - -inst_6345: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:19035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19035*FLEN/8, x4, x1, x2) - -inst_6346: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:19038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19038*FLEN/8, x4, x1, x2) - -inst_6347: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:19041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19041*FLEN/8, x4, x1, x2) - -inst_6348: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:19044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19044*FLEN/8, x4, x1, x2) - -inst_6349: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:19047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19047*FLEN/8, x4, x1, x2) - -inst_6350: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:19050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19050*FLEN/8, x4, x1, x2) - -inst_6351: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:19053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19053*FLEN/8, x4, x1, x2) - -inst_6352: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:19056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19056*FLEN/8, x4, x1, x2) - -inst_6353: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:19059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19059*FLEN/8, x4, x1, x2) - -inst_6354: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:19062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19062*FLEN/8, x4, x1, x2) - -inst_6355: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:19065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19065*FLEN/8, x4, x1, x2) - -inst_6356: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:19068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19068*FLEN/8, x4, x1, x2) - -inst_6357: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:19071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19071*FLEN/8, x4, x1, x2) - -inst_6358: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:19074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19074*FLEN/8, x4, x1, x2) - -inst_6359: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:19077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19077*FLEN/8, x4, x1, x2) - -inst_6360: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:19080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19080*FLEN/8, x4, x1, x2) - -inst_6361: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:19083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19083*FLEN/8, x4, x1, x2) - -inst_6362: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:19086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19086*FLEN/8, x4, x1, x2) - -inst_6363: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:19089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19089*FLEN/8, x4, x1, x2) - -inst_6364: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:19092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19092*FLEN/8, x4, x1, x2) - -inst_6365: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:19095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19095*FLEN/8, x4, x1, x2) - -inst_6366: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:19098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19098*FLEN/8, x4, x1, x2) - -inst_6367: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:19101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19101*FLEN/8, x4, x1, x2) - -inst_6368: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:19104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19104*FLEN/8, x4, x1, x2) - -inst_6369: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:19107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19107*FLEN/8, x4, x1, x2) - -inst_6370: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:19110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19110*FLEN/8, x4, x1, x2) - -inst_6371: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:19113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19113*FLEN/8, x4, x1, x2) - -inst_6372: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6800000; valaddr_reg:x3; val_offset:19116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19116*FLEN/8, x4, x1, x2) - -inst_6373: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6800001; valaddr_reg:x3; val_offset:19119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19119*FLEN/8, x4, x1, x2) - -inst_6374: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6800003; valaddr_reg:x3; val_offset:19122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19122*FLEN/8, x4, x1, x2) - -inst_6375: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6800007; valaddr_reg:x3; val_offset:19125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19125*FLEN/8, x4, x1, x2) - -inst_6376: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x680000f; valaddr_reg:x3; val_offset:19128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19128*FLEN/8, x4, x1, x2) - -inst_6377: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x680001f; valaddr_reg:x3; val_offset:19131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19131*FLEN/8, x4, x1, x2) - -inst_6378: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x680003f; valaddr_reg:x3; val_offset:19134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19134*FLEN/8, x4, x1, x2) - -inst_6379: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x680007f; valaddr_reg:x3; val_offset:19137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19137*FLEN/8, x4, x1, x2) - -inst_6380: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x68000ff; valaddr_reg:x3; val_offset:19140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19140*FLEN/8, x4, x1, x2) - -inst_6381: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x68001ff; valaddr_reg:x3; val_offset:19143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19143*FLEN/8, x4, x1, x2) - -inst_6382: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x68003ff; valaddr_reg:x3; val_offset:19146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19146*FLEN/8, x4, x1, x2) - -inst_6383: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x68007ff; valaddr_reg:x3; val_offset:19149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19149*FLEN/8, x4, x1, x2) - -inst_6384: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6800fff; valaddr_reg:x3; val_offset:19152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19152*FLEN/8, x4, x1, x2) - -inst_6385: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6801fff; valaddr_reg:x3; val_offset:19155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19155*FLEN/8, x4, x1, x2) - -inst_6386: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6803fff; valaddr_reg:x3; val_offset:19158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19158*FLEN/8, x4, x1, x2) - -inst_6387: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6807fff; valaddr_reg:x3; val_offset:19161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19161*FLEN/8, x4, x1, x2) - -inst_6388: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x680ffff; valaddr_reg:x3; val_offset:19164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19164*FLEN/8, x4, x1, x2) - -inst_6389: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x681ffff; valaddr_reg:x3; val_offset:19167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19167*FLEN/8, x4, x1, x2) - -inst_6390: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x683ffff; valaddr_reg:x3; val_offset:19170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19170*FLEN/8, x4, x1, x2) - -inst_6391: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x687ffff; valaddr_reg:x3; val_offset:19173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19173*FLEN/8, x4, x1, x2) - -inst_6392: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x68fffff; valaddr_reg:x3; val_offset:19176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19176*FLEN/8, x4, x1, x2) - -inst_6393: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x69fffff; valaddr_reg:x3; val_offset:19179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19179*FLEN/8, x4, x1, x2) - -inst_6394: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6bfffff; valaddr_reg:x3; val_offset:19182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19182*FLEN/8, x4, x1, x2) - -inst_6395: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6c00000; valaddr_reg:x3; val_offset:19185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19185*FLEN/8, x4, x1, x2) - -inst_6396: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6e00000; valaddr_reg:x3; val_offset:19188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19188*FLEN/8, x4, x1, x2) - -inst_6397: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6f00000; valaddr_reg:x3; val_offset:19191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19191*FLEN/8, x4, x1, x2) - -inst_6398: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6f80000; valaddr_reg:x3; val_offset:19194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19194*FLEN/8, x4, x1, x2) - -inst_6399: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fc0000; valaddr_reg:x3; val_offset:19197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19197*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_51) - -inst_6400: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fe0000; valaddr_reg:x3; val_offset:19200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19200*FLEN/8, x4, x1, x2) - -inst_6401: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ff0000; valaddr_reg:x3; val_offset:19203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19203*FLEN/8, x4, x1, x2) - -inst_6402: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ff8000; valaddr_reg:x3; val_offset:19206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19206*FLEN/8, x4, x1, x2) - -inst_6403: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ffc000; valaddr_reg:x3; val_offset:19209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19209*FLEN/8, x4, x1, x2) - -inst_6404: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ffe000; valaddr_reg:x3; val_offset:19212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19212*FLEN/8, x4, x1, x2) - -inst_6405: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fff000; valaddr_reg:x3; val_offset:19215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19215*FLEN/8, x4, x1, x2) - -inst_6406: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fff800; valaddr_reg:x3; val_offset:19218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19218*FLEN/8, x4, x1, x2) - -inst_6407: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fffc00; valaddr_reg:x3; val_offset:19221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19221*FLEN/8, x4, x1, x2) - -inst_6408: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fffe00; valaddr_reg:x3; val_offset:19224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19224*FLEN/8, x4, x1, x2) - -inst_6409: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ffff00; valaddr_reg:x3; val_offset:19227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19227*FLEN/8, x4, x1, x2) - -inst_6410: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ffff80; valaddr_reg:x3; val_offset:19230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19230*FLEN/8, x4, x1, x2) - -inst_6411: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ffffc0; valaddr_reg:x3; val_offset:19233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19233*FLEN/8, x4, x1, x2) - -inst_6412: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ffffe0; valaddr_reg:x3; val_offset:19236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19236*FLEN/8, x4, x1, x2) - -inst_6413: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fffff0; valaddr_reg:x3; val_offset:19239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19239*FLEN/8, x4, x1, x2) - -inst_6414: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fffff8; valaddr_reg:x3; val_offset:19242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19242*FLEN/8, x4, x1, x2) - -inst_6415: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fffffc; valaddr_reg:x3; val_offset:19245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19245*FLEN/8, x4, x1, x2) - -inst_6416: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6fffffe; valaddr_reg:x3; val_offset:19248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19248*FLEN/8, x4, x1, x2) - -inst_6417: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; -op3val:0x6ffffff; valaddr_reg:x3; val_offset:19251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19251*FLEN/8, x4, x1, x2) - -inst_6418: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:19254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19254*FLEN/8, x4, x1, x2) - -inst_6419: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:19257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19257*FLEN/8, x4, x1, x2) - -inst_6420: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:19260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19260*FLEN/8, x4, x1, x2) - -inst_6421: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:19263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19263*FLEN/8, x4, x1, x2) - -inst_6422: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:19266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19266*FLEN/8, x4, x1, x2) - -inst_6423: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:19269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19269*FLEN/8, x4, x1, x2) - -inst_6424: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:19272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19272*FLEN/8, x4, x1, x2) - -inst_6425: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:19275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19275*FLEN/8, x4, x1, x2) - -inst_6426: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:19278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19278*FLEN/8, x4, x1, x2) - -inst_6427: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:19281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19281*FLEN/8, x4, x1, x2) - -inst_6428: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:19284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19284*FLEN/8, x4, x1, x2) - -inst_6429: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:19287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19287*FLEN/8, x4, x1, x2) - -inst_6430: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:19290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19290*FLEN/8, x4, x1, x2) - -inst_6431: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:19293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19293*FLEN/8, x4, x1, x2) - -inst_6432: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:19296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19296*FLEN/8, x4, x1, x2) - -inst_6433: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:19299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19299*FLEN/8, x4, x1, x2) - -inst_6434: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3000000; valaddr_reg:x3; val_offset:19302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19302*FLEN/8, x4, x1, x2) - -inst_6435: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3000001; valaddr_reg:x3; val_offset:19305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19305*FLEN/8, x4, x1, x2) - -inst_6436: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3000003; valaddr_reg:x3; val_offset:19308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19308*FLEN/8, x4, x1, x2) - -inst_6437: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3000007; valaddr_reg:x3; val_offset:19311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19311*FLEN/8, x4, x1, x2) - -inst_6438: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x300000f; valaddr_reg:x3; val_offset:19314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19314*FLEN/8, x4, x1, x2) - -inst_6439: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x300001f; valaddr_reg:x3; val_offset:19317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19317*FLEN/8, x4, x1, x2) - -inst_6440: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x300003f; valaddr_reg:x3; val_offset:19320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19320*FLEN/8, x4, x1, x2) - -inst_6441: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x300007f; valaddr_reg:x3; val_offset:19323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19323*FLEN/8, x4, x1, x2) - -inst_6442: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x30000ff; valaddr_reg:x3; val_offset:19326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19326*FLEN/8, x4, x1, x2) - -inst_6443: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x30001ff; valaddr_reg:x3; val_offset:19329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19329*FLEN/8, x4, x1, x2) - -inst_6444: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x30003ff; valaddr_reg:x3; val_offset:19332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19332*FLEN/8, x4, x1, x2) - -inst_6445: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x30007ff; valaddr_reg:x3; val_offset:19335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19335*FLEN/8, x4, x1, x2) - -inst_6446: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3000fff; valaddr_reg:x3; val_offset:19338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19338*FLEN/8, x4, x1, x2) - -inst_6447: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3001fff; valaddr_reg:x3; val_offset:19341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19341*FLEN/8, x4, x1, x2) - -inst_6448: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3003fff; valaddr_reg:x3; val_offset:19344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19344*FLEN/8, x4, x1, x2) - -inst_6449: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3007fff; valaddr_reg:x3; val_offset:19347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19347*FLEN/8, x4, x1, x2) - -inst_6450: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x300ffff; valaddr_reg:x3; val_offset:19350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19350*FLEN/8, x4, x1, x2) - -inst_6451: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x301ffff; valaddr_reg:x3; val_offset:19353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19353*FLEN/8, x4, x1, x2) - -inst_6452: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x303ffff; valaddr_reg:x3; val_offset:19356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19356*FLEN/8, x4, x1, x2) - -inst_6453: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x307ffff; valaddr_reg:x3; val_offset:19359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19359*FLEN/8, x4, x1, x2) - -inst_6454: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x30fffff; valaddr_reg:x3; val_offset:19362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19362*FLEN/8, x4, x1, x2) - -inst_6455: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x31fffff; valaddr_reg:x3; val_offset:19365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19365*FLEN/8, x4, x1, x2) - -inst_6456: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x33fffff; valaddr_reg:x3; val_offset:19368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19368*FLEN/8, x4, x1, x2) - -inst_6457: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3400000; valaddr_reg:x3; val_offset:19371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19371*FLEN/8, x4, x1, x2) - -inst_6458: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3600000; valaddr_reg:x3; val_offset:19374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19374*FLEN/8, x4, x1, x2) - -inst_6459: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3700000; valaddr_reg:x3; val_offset:19377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19377*FLEN/8, x4, x1, x2) - -inst_6460: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x3780000; valaddr_reg:x3; val_offset:19380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19380*FLEN/8, x4, x1, x2) - -inst_6461: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37c0000; valaddr_reg:x3; val_offset:19383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19383*FLEN/8, x4, x1, x2) - -inst_6462: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37e0000; valaddr_reg:x3; val_offset:19386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19386*FLEN/8, x4, x1, x2) - -inst_6463: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37f0000; valaddr_reg:x3; val_offset:19389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19389*FLEN/8, x4, x1, x2) - -inst_6464: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37f8000; valaddr_reg:x3; val_offset:19392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19392*FLEN/8, x4, x1, x2) - -inst_6465: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37fc000; valaddr_reg:x3; val_offset:19395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19395*FLEN/8, x4, x1, x2) - -inst_6466: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37fe000; valaddr_reg:x3; val_offset:19398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19398*FLEN/8, x4, x1, x2) - -inst_6467: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37ff000; valaddr_reg:x3; val_offset:19401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19401*FLEN/8, x4, x1, x2) - -inst_6468: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37ff800; valaddr_reg:x3; val_offset:19404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19404*FLEN/8, x4, x1, x2) - -inst_6469: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37ffc00; valaddr_reg:x3; val_offset:19407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19407*FLEN/8, x4, x1, x2) - -inst_6470: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37ffe00; valaddr_reg:x3; val_offset:19410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19410*FLEN/8, x4, x1, x2) - -inst_6471: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37fff00; valaddr_reg:x3; val_offset:19413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19413*FLEN/8, x4, x1, x2) - -inst_6472: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37fff80; valaddr_reg:x3; val_offset:19416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19416*FLEN/8, x4, x1, x2) - -inst_6473: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37fffc0; valaddr_reg:x3; val_offset:19419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19419*FLEN/8, x4, x1, x2) - -inst_6474: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37fffe0; valaddr_reg:x3; val_offset:19422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19422*FLEN/8, x4, x1, x2) - -inst_6475: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37ffff0; valaddr_reg:x3; val_offset:19425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19425*FLEN/8, x4, x1, x2) - -inst_6476: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37ffff8; valaddr_reg:x3; val_offset:19428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19428*FLEN/8, x4, x1, x2) - -inst_6477: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37ffffc; valaddr_reg:x3; val_offset:19431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19431*FLEN/8, x4, x1, x2) - -inst_6478: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37ffffe; valaddr_reg:x3; val_offset:19434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19434*FLEN/8, x4, x1, x2) - -inst_6479: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; -op3val:0x37fffff; valaddr_reg:x3; val_offset:19437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19437*FLEN/8, x4, x1, x2) - -inst_6480: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3f800001; valaddr_reg:x3; val_offset:19440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19440*FLEN/8, x4, x1, x2) - -inst_6481: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3f800003; valaddr_reg:x3; val_offset:19443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19443*FLEN/8, x4, x1, x2) - -inst_6482: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3f800007; valaddr_reg:x3; val_offset:19446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19446*FLEN/8, x4, x1, x2) - -inst_6483: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3f999999; valaddr_reg:x3; val_offset:19449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19449*FLEN/8, x4, x1, x2) - -inst_6484: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:19452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19452*FLEN/8, x4, x1, x2) - -inst_6485: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:19455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19455*FLEN/8, x4, x1, x2) - -inst_6486: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:19458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19458*FLEN/8, x4, x1, x2) - -inst_6487: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:19461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19461*FLEN/8, x4, x1, x2) - -inst_6488: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:19464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19464*FLEN/8, x4, x1, x2) - -inst_6489: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:19467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19467*FLEN/8, x4, x1, x2) - -inst_6490: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:19470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19470*FLEN/8, x4, x1, x2) - -inst_6491: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:19473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19473*FLEN/8, x4, x1, x2) - -inst_6492: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:19476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19476*FLEN/8, x4, x1, x2) - -inst_6493: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:19479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19479*FLEN/8, x4, x1, x2) - -inst_6494: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:19482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19482*FLEN/8, x4, x1, x2) - -inst_6495: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:19485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19485*FLEN/8, x4, x1, x2) - -inst_6496: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d800000; valaddr_reg:x3; val_offset:19488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19488*FLEN/8, x4, x1, x2) - -inst_6497: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d800001; valaddr_reg:x3; val_offset:19491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19491*FLEN/8, x4, x1, x2) - -inst_6498: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d800003; valaddr_reg:x3; val_offset:19494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19494*FLEN/8, x4, x1, x2) - -inst_6499: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d800007; valaddr_reg:x3; val_offset:19497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19497*FLEN/8, x4, x1, x2) - -inst_6500: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d80000f; valaddr_reg:x3; val_offset:19500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19500*FLEN/8, x4, x1, x2) - -inst_6501: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d80001f; valaddr_reg:x3; val_offset:19503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19503*FLEN/8, x4, x1, x2) - -inst_6502: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d80003f; valaddr_reg:x3; val_offset:19506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19506*FLEN/8, x4, x1, x2) - -inst_6503: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d80007f; valaddr_reg:x3; val_offset:19509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19509*FLEN/8, x4, x1, x2) - -inst_6504: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d8000ff; valaddr_reg:x3; val_offset:19512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19512*FLEN/8, x4, x1, x2) - -inst_6505: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d8001ff; valaddr_reg:x3; val_offset:19515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19515*FLEN/8, x4, x1, x2) - -inst_6506: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d8003ff; valaddr_reg:x3; val_offset:19518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19518*FLEN/8, x4, x1, x2) - -inst_6507: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d8007ff; valaddr_reg:x3; val_offset:19521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19521*FLEN/8, x4, x1, x2) - -inst_6508: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d800fff; valaddr_reg:x3; val_offset:19524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19524*FLEN/8, x4, x1, x2) - -inst_6509: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d801fff; valaddr_reg:x3; val_offset:19527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19527*FLEN/8, x4, x1, x2) - -inst_6510: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d803fff; valaddr_reg:x3; val_offset:19530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19530*FLEN/8, x4, x1, x2) - -inst_6511: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d807fff; valaddr_reg:x3; val_offset:19533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19533*FLEN/8, x4, x1, x2) - -inst_6512: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d80ffff; valaddr_reg:x3; val_offset:19536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19536*FLEN/8, x4, x1, x2) - -inst_6513: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d81ffff; valaddr_reg:x3; val_offset:19539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19539*FLEN/8, x4, x1, x2) - -inst_6514: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d83ffff; valaddr_reg:x3; val_offset:19542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19542*FLEN/8, x4, x1, x2) - -inst_6515: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d87ffff; valaddr_reg:x3; val_offset:19545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19545*FLEN/8, x4, x1, x2) - -inst_6516: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d8fffff; valaddr_reg:x3; val_offset:19548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19548*FLEN/8, x4, x1, x2) - -inst_6517: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4d9fffff; valaddr_reg:x3; val_offset:19551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19551*FLEN/8, x4, x1, x2) - -inst_6518: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dbfffff; valaddr_reg:x3; val_offset:19554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19554*FLEN/8, x4, x1, x2) - -inst_6519: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dc00000; valaddr_reg:x3; val_offset:19557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19557*FLEN/8, x4, x1, x2) - -inst_6520: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4de00000; valaddr_reg:x3; val_offset:19560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19560*FLEN/8, x4, x1, x2) - -inst_6521: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4df00000; valaddr_reg:x3; val_offset:19563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19563*FLEN/8, x4, x1, x2) - -inst_6522: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4df80000; valaddr_reg:x3; val_offset:19566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19566*FLEN/8, x4, x1, x2) - -inst_6523: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfc0000; valaddr_reg:x3; val_offset:19569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19569*FLEN/8, x4, x1, x2) - -inst_6524: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfe0000; valaddr_reg:x3; val_offset:19572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19572*FLEN/8, x4, x1, x2) - -inst_6525: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dff0000; valaddr_reg:x3; val_offset:19575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19575*FLEN/8, x4, x1, x2) - -inst_6526: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dff8000; valaddr_reg:x3; val_offset:19578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19578*FLEN/8, x4, x1, x2) - -inst_6527: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dffc000; valaddr_reg:x3; val_offset:19581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19581*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_52) - -inst_6528: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dffe000; valaddr_reg:x3; val_offset:19584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19584*FLEN/8, x4, x1, x2) - -inst_6529: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfff000; valaddr_reg:x3; val_offset:19587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19587*FLEN/8, x4, x1, x2) - -inst_6530: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfff800; valaddr_reg:x3; val_offset:19590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19590*FLEN/8, x4, x1, x2) - -inst_6531: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfffc00; valaddr_reg:x3; val_offset:19593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19593*FLEN/8, x4, x1, x2) - -inst_6532: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfffe00; valaddr_reg:x3; val_offset:19596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19596*FLEN/8, x4, x1, x2) - -inst_6533: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dffff00; valaddr_reg:x3; val_offset:19599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19599*FLEN/8, x4, x1, x2) - -inst_6534: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dffff80; valaddr_reg:x3; val_offset:19602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19602*FLEN/8, x4, x1, x2) - -inst_6535: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dffffc0; valaddr_reg:x3; val_offset:19605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19605*FLEN/8, x4, x1, x2) - -inst_6536: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dffffe0; valaddr_reg:x3; val_offset:19608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19608*FLEN/8, x4, x1, x2) - -inst_6537: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfffff0; valaddr_reg:x3; val_offset:19611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19611*FLEN/8, x4, x1, x2) - -inst_6538: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfffff8; valaddr_reg:x3; val_offset:19614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19614*FLEN/8, x4, x1, x2) - -inst_6539: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfffffc; valaddr_reg:x3; val_offset:19617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19617*FLEN/8, x4, x1, x2) - -inst_6540: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dfffffe; valaddr_reg:x3; val_offset:19620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19620*FLEN/8, x4, x1, x2) - -inst_6541: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; -op3val:0x4dffffff; valaddr_reg:x3; val_offset:19623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19623*FLEN/8, x4, x1, x2) - -inst_6542: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbf800001; valaddr_reg:x3; val_offset:19626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19626*FLEN/8, x4, x1, x2) - -inst_6543: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbf800003; valaddr_reg:x3; val_offset:19629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19629*FLEN/8, x4, x1, x2) - -inst_6544: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbf800007; valaddr_reg:x3; val_offset:19632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19632*FLEN/8, x4, x1, x2) - -inst_6545: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbf999999; valaddr_reg:x3; val_offset:19635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19635*FLEN/8, x4, x1, x2) - -inst_6546: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:19638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19638*FLEN/8, x4, x1, x2) - -inst_6547: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:19641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19641*FLEN/8, x4, x1, x2) - -inst_6548: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:19644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19644*FLEN/8, x4, x1, x2) - -inst_6549: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:19647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19647*FLEN/8, x4, x1, x2) - -inst_6550: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:19650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19650*FLEN/8, x4, x1, x2) - -inst_6551: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:19653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19653*FLEN/8, x4, x1, x2) - -inst_6552: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:19656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19656*FLEN/8, x4, x1, x2) - -inst_6553: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:19659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19659*FLEN/8, x4, x1, x2) - -inst_6554: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:19662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19662*FLEN/8, x4, x1, x2) - -inst_6555: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:19665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19665*FLEN/8, x4, x1, x2) - -inst_6556: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:19668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19668*FLEN/8, x4, x1, x2) - -inst_6557: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:19671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19671*FLEN/8, x4, x1, x2) - -inst_6558: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2800000; valaddr_reg:x3; val_offset:19674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19674*FLEN/8, x4, x1, x2) - -inst_6559: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2800001; valaddr_reg:x3; val_offset:19677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19677*FLEN/8, x4, x1, x2) - -inst_6560: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2800003; valaddr_reg:x3; val_offset:19680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19680*FLEN/8, x4, x1, x2) - -inst_6561: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2800007; valaddr_reg:x3; val_offset:19683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19683*FLEN/8, x4, x1, x2) - -inst_6562: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc280000f; valaddr_reg:x3; val_offset:19686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19686*FLEN/8, x4, x1, x2) - -inst_6563: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc280001f; valaddr_reg:x3; val_offset:19689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19689*FLEN/8, x4, x1, x2) - -inst_6564: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc280003f; valaddr_reg:x3; val_offset:19692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19692*FLEN/8, x4, x1, x2) - -inst_6565: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc280007f; valaddr_reg:x3; val_offset:19695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19695*FLEN/8, x4, x1, x2) - -inst_6566: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc28000ff; valaddr_reg:x3; val_offset:19698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19698*FLEN/8, x4, x1, x2) - -inst_6567: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc28001ff; valaddr_reg:x3; val_offset:19701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19701*FLEN/8, x4, x1, x2) - -inst_6568: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc28003ff; valaddr_reg:x3; val_offset:19704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19704*FLEN/8, x4, x1, x2) - -inst_6569: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc28007ff; valaddr_reg:x3; val_offset:19707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19707*FLEN/8, x4, x1, x2) - -inst_6570: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2800fff; valaddr_reg:x3; val_offset:19710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19710*FLEN/8, x4, x1, x2) - -inst_6571: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2801fff; valaddr_reg:x3; val_offset:19713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19713*FLEN/8, x4, x1, x2) - -inst_6572: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2803fff; valaddr_reg:x3; val_offset:19716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19716*FLEN/8, x4, x1, x2) - -inst_6573: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2807fff; valaddr_reg:x3; val_offset:19719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19719*FLEN/8, x4, x1, x2) - -inst_6574: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc280ffff; valaddr_reg:x3; val_offset:19722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19722*FLEN/8, x4, x1, x2) - -inst_6575: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc281ffff; valaddr_reg:x3; val_offset:19725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19725*FLEN/8, x4, x1, x2) - -inst_6576: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc283ffff; valaddr_reg:x3; val_offset:19728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19728*FLEN/8, x4, x1, x2) - -inst_6577: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc287ffff; valaddr_reg:x3; val_offset:19731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19731*FLEN/8, x4, x1, x2) - -inst_6578: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc28fffff; valaddr_reg:x3; val_offset:19734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19734*FLEN/8, x4, x1, x2) - -inst_6579: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc29fffff; valaddr_reg:x3; val_offset:19737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19737*FLEN/8, x4, x1, x2) - -inst_6580: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2bfffff; valaddr_reg:x3; val_offset:19740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19740*FLEN/8, x4, x1, x2) - -inst_6581: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2c00000; valaddr_reg:x3; val_offset:19743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19743*FLEN/8, x4, x1, x2) - -inst_6582: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2e00000; valaddr_reg:x3; val_offset:19746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19746*FLEN/8, x4, x1, x2) - -inst_6583: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2f00000; valaddr_reg:x3; val_offset:19749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19749*FLEN/8, x4, x1, x2) - -inst_6584: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2f80000; valaddr_reg:x3; val_offset:19752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19752*FLEN/8, x4, x1, x2) - -inst_6585: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fc0000; valaddr_reg:x3; val_offset:19755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19755*FLEN/8, x4, x1, x2) - -inst_6586: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fe0000; valaddr_reg:x3; val_offset:19758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19758*FLEN/8, x4, x1, x2) - -inst_6587: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ff0000; valaddr_reg:x3; val_offset:19761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19761*FLEN/8, x4, x1, x2) - -inst_6588: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ff8000; valaddr_reg:x3; val_offset:19764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19764*FLEN/8, x4, x1, x2) - -inst_6589: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ffc000; valaddr_reg:x3; val_offset:19767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19767*FLEN/8, x4, x1, x2) - -inst_6590: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ffe000; valaddr_reg:x3; val_offset:19770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19770*FLEN/8, x4, x1, x2) - -inst_6591: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fff000; valaddr_reg:x3; val_offset:19773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19773*FLEN/8, x4, x1, x2) - -inst_6592: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fff800; valaddr_reg:x3; val_offset:19776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19776*FLEN/8, x4, x1, x2) - -inst_6593: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fffc00; valaddr_reg:x3; val_offset:19779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19779*FLEN/8, x4, x1, x2) - -inst_6594: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fffe00; valaddr_reg:x3; val_offset:19782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19782*FLEN/8, x4, x1, x2) - -inst_6595: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ffff00; valaddr_reg:x3; val_offset:19785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19785*FLEN/8, x4, x1, x2) - -inst_6596: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ffff80; valaddr_reg:x3; val_offset:19788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19788*FLEN/8, x4, x1, x2) - -inst_6597: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ffffc0; valaddr_reg:x3; val_offset:19791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19791*FLEN/8, x4, x1, x2) - -inst_6598: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ffffe0; valaddr_reg:x3; val_offset:19794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19794*FLEN/8, x4, x1, x2) - -inst_6599: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fffff0; valaddr_reg:x3; val_offset:19797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19797*FLEN/8, x4, x1, x2) - -inst_6600: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fffff8; valaddr_reg:x3; val_offset:19800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19800*FLEN/8, x4, x1, x2) - -inst_6601: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fffffc; valaddr_reg:x3; val_offset:19803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19803*FLEN/8, x4, x1, x2) - -inst_6602: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2fffffe; valaddr_reg:x3; val_offset:19806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19806*FLEN/8, x4, x1, x2) - -inst_6603: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; -op3val:0xc2ffffff; valaddr_reg:x3; val_offset:19809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19809*FLEN/8, x4, x1, x2) - -inst_6604: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee000000; valaddr_reg:x3; val_offset:19812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19812*FLEN/8, x4, x1, x2) - -inst_6605: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee000001; valaddr_reg:x3; val_offset:19815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19815*FLEN/8, x4, x1, x2) - -inst_6606: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee000003; valaddr_reg:x3; val_offset:19818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19818*FLEN/8, x4, x1, x2) - -inst_6607: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee000007; valaddr_reg:x3; val_offset:19821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19821*FLEN/8, x4, x1, x2) - -inst_6608: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee00000f; valaddr_reg:x3; val_offset:19824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19824*FLEN/8, x4, x1, x2) - -inst_6609: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee00001f; valaddr_reg:x3; val_offset:19827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19827*FLEN/8, x4, x1, x2) - -inst_6610: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee00003f; valaddr_reg:x3; val_offset:19830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19830*FLEN/8, x4, x1, x2) - -inst_6611: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee00007f; valaddr_reg:x3; val_offset:19833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19833*FLEN/8, x4, x1, x2) - -inst_6612: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee0000ff; valaddr_reg:x3; val_offset:19836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19836*FLEN/8, x4, x1, x2) - -inst_6613: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee0001ff; valaddr_reg:x3; val_offset:19839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19839*FLEN/8, x4, x1, x2) - -inst_6614: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee0003ff; valaddr_reg:x3; val_offset:19842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19842*FLEN/8, x4, x1, x2) - -inst_6615: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee0007ff; valaddr_reg:x3; val_offset:19845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19845*FLEN/8, x4, x1, x2) - -inst_6616: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee000fff; valaddr_reg:x3; val_offset:19848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19848*FLEN/8, x4, x1, x2) - -inst_6617: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee001fff; valaddr_reg:x3; val_offset:19851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19851*FLEN/8, x4, x1, x2) - -inst_6618: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee003fff; valaddr_reg:x3; val_offset:19854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19854*FLEN/8, x4, x1, x2) - -inst_6619: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee007fff; valaddr_reg:x3; val_offset:19857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19857*FLEN/8, x4, x1, x2) - -inst_6620: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee00ffff; valaddr_reg:x3; val_offset:19860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19860*FLEN/8, x4, x1, x2) - -inst_6621: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee01ffff; valaddr_reg:x3; val_offset:19863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19863*FLEN/8, x4, x1, x2) - -inst_6622: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee03ffff; valaddr_reg:x3; val_offset:19866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19866*FLEN/8, x4, x1, x2) - -inst_6623: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee07ffff; valaddr_reg:x3; val_offset:19869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19869*FLEN/8, x4, x1, x2) - -inst_6624: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee0fffff; valaddr_reg:x3; val_offset:19872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19872*FLEN/8, x4, x1, x2) - -inst_6625: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee1fffff; valaddr_reg:x3; val_offset:19875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19875*FLEN/8, x4, x1, x2) - -inst_6626: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee3fffff; valaddr_reg:x3; val_offset:19878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19878*FLEN/8, x4, x1, x2) - -inst_6627: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee400000; valaddr_reg:x3; val_offset:19881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19881*FLEN/8, x4, x1, x2) - -inst_6628: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee600000; valaddr_reg:x3; val_offset:19884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19884*FLEN/8, x4, x1, x2) - -inst_6629: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee700000; valaddr_reg:x3; val_offset:19887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19887*FLEN/8, x4, x1, x2) - -inst_6630: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee780000; valaddr_reg:x3; val_offset:19890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19890*FLEN/8, x4, x1, x2) - -inst_6631: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7c0000; valaddr_reg:x3; val_offset:19893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19893*FLEN/8, x4, x1, x2) - -inst_6632: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7e0000; valaddr_reg:x3; val_offset:19896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19896*FLEN/8, x4, x1, x2) - -inst_6633: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7f0000; valaddr_reg:x3; val_offset:19899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19899*FLEN/8, x4, x1, x2) - -inst_6634: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7f8000; valaddr_reg:x3; val_offset:19902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19902*FLEN/8, x4, x1, x2) - -inst_6635: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7fc000; valaddr_reg:x3; val_offset:19905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19905*FLEN/8, x4, x1, x2) - -inst_6636: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7fe000; valaddr_reg:x3; val_offset:19908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19908*FLEN/8, x4, x1, x2) - -inst_6637: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7ff000; valaddr_reg:x3; val_offset:19911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19911*FLEN/8, x4, x1, x2) - -inst_6638: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7ff800; valaddr_reg:x3; val_offset:19914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19914*FLEN/8, x4, x1, x2) - -inst_6639: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7ffc00; valaddr_reg:x3; val_offset:19917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19917*FLEN/8, x4, x1, x2) - -inst_6640: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7ffe00; valaddr_reg:x3; val_offset:19920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19920*FLEN/8, x4, x1, x2) - -inst_6641: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7fff00; valaddr_reg:x3; val_offset:19923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19923*FLEN/8, x4, x1, x2) - -inst_6642: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7fff80; valaddr_reg:x3; val_offset:19926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19926*FLEN/8, x4, x1, x2) - -inst_6643: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7fffc0; valaddr_reg:x3; val_offset:19929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19929*FLEN/8, x4, x1, x2) - -inst_6644: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7fffe0; valaddr_reg:x3; val_offset:19932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19932*FLEN/8, x4, x1, x2) - -inst_6645: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7ffff0; valaddr_reg:x3; val_offset:19935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19935*FLEN/8, x4, x1, x2) - -inst_6646: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7ffff8; valaddr_reg:x3; val_offset:19938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19938*FLEN/8, x4, x1, x2) - -inst_6647: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7ffffc; valaddr_reg:x3; val_offset:19941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19941*FLEN/8, x4, x1, x2) - -inst_6648: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7ffffe; valaddr_reg:x3; val_offset:19944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19944*FLEN/8, x4, x1, x2) - -inst_6649: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xee7fffff; valaddr_reg:x3; val_offset:19947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19947*FLEN/8, x4, x1, x2) - -inst_6650: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff000001; valaddr_reg:x3; val_offset:19950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19950*FLEN/8, x4, x1, x2) - -inst_6651: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff000003; valaddr_reg:x3; val_offset:19953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19953*FLEN/8, x4, x1, x2) - -inst_6652: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff000007; valaddr_reg:x3; val_offset:19956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19956*FLEN/8, x4, x1, x2) - -inst_6653: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff199999; valaddr_reg:x3; val_offset:19959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19959*FLEN/8, x4, x1, x2) - -inst_6654: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff249249; valaddr_reg:x3; val_offset:19962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19962*FLEN/8, x4, x1, x2) - -inst_6655: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff333333; valaddr_reg:x3; val_offset:19965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19965*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_53) - -inst_6656: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:19968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19968*FLEN/8, x4, x1, x2) - -inst_6657: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:19971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19971*FLEN/8, x4, x1, x2) - -inst_6658: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff444444; valaddr_reg:x3; val_offset:19974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19974*FLEN/8, x4, x1, x2) - -inst_6659: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:19977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19977*FLEN/8, x4, x1, x2) - -inst_6660: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:19980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19980*FLEN/8, x4, x1, x2) - -inst_6661: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff666666; valaddr_reg:x3; val_offset:19983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19983*FLEN/8, x4, x1, x2) - -inst_6662: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:19986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19986*FLEN/8, x4, x1, x2) - -inst_6663: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:19989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19989*FLEN/8, x4, x1, x2) - -inst_6664: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:19992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19992*FLEN/8, x4, x1, x2) - -inst_6665: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:19995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19995*FLEN/8, x4, x1, x2) - -inst_6666: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3f800001; valaddr_reg:x3; val_offset:19998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19998*FLEN/8, x4, x1, x2) - -inst_6667: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3f800003; valaddr_reg:x3; val_offset:20001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20001*FLEN/8, x4, x1, x2) - -inst_6668: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3f800007; valaddr_reg:x3; val_offset:20004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20004*FLEN/8, x4, x1, x2) - -inst_6669: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3f999999; valaddr_reg:x3; val_offset:20007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20007*FLEN/8, x4, x1, x2) - -inst_6670: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:20010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20010*FLEN/8, x4, x1, x2) - -inst_6671: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:20013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20013*FLEN/8, x4, x1, x2) - -inst_6672: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:20016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20016*FLEN/8, x4, x1, x2) - -inst_6673: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:20019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20019*FLEN/8, x4, x1, x2) - -inst_6674: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:20022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20022*FLEN/8, x4, x1, x2) - -inst_6675: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:20025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20025*FLEN/8, x4, x1, x2) - -inst_6676: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:20028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20028*FLEN/8, x4, x1, x2) - -inst_6677: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:20031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20031*FLEN/8, x4, x1, x2) - -inst_6678: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:20034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20034*FLEN/8, x4, x1, x2) - -inst_6679: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:20037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20037*FLEN/8, x4, x1, x2) - -inst_6680: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:20040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20040*FLEN/8, x4, x1, x2) - -inst_6681: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:20043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20043*FLEN/8, x4, x1, x2) - -inst_6682: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46800000; valaddr_reg:x3; val_offset:20046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20046*FLEN/8, x4, x1, x2) - -inst_6683: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46800001; valaddr_reg:x3; val_offset:20049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20049*FLEN/8, x4, x1, x2) - -inst_6684: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46800003; valaddr_reg:x3; val_offset:20052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20052*FLEN/8, x4, x1, x2) - -inst_6685: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46800007; valaddr_reg:x3; val_offset:20055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20055*FLEN/8, x4, x1, x2) - -inst_6686: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x4680000f; valaddr_reg:x3; val_offset:20058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20058*FLEN/8, x4, x1, x2) - -inst_6687: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x4680001f; valaddr_reg:x3; val_offset:20061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20061*FLEN/8, x4, x1, x2) - -inst_6688: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x4680003f; valaddr_reg:x3; val_offset:20064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20064*FLEN/8, x4, x1, x2) - -inst_6689: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x4680007f; valaddr_reg:x3; val_offset:20067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20067*FLEN/8, x4, x1, x2) - -inst_6690: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x468000ff; valaddr_reg:x3; val_offset:20070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20070*FLEN/8, x4, x1, x2) - -inst_6691: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x468001ff; valaddr_reg:x3; val_offset:20073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20073*FLEN/8, x4, x1, x2) - -inst_6692: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x468003ff; valaddr_reg:x3; val_offset:20076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20076*FLEN/8, x4, x1, x2) - -inst_6693: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x468007ff; valaddr_reg:x3; val_offset:20079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20079*FLEN/8, x4, x1, x2) - -inst_6694: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46800fff; valaddr_reg:x3; val_offset:20082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20082*FLEN/8, x4, x1, x2) - -inst_6695: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46801fff; valaddr_reg:x3; val_offset:20085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20085*FLEN/8, x4, x1, x2) - -inst_6696: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46803fff; valaddr_reg:x3; val_offset:20088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20088*FLEN/8, x4, x1, x2) - -inst_6697: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46807fff; valaddr_reg:x3; val_offset:20091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20091*FLEN/8, x4, x1, x2) - -inst_6698: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x4680ffff; valaddr_reg:x3; val_offset:20094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20094*FLEN/8, x4, x1, x2) - -inst_6699: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x4681ffff; valaddr_reg:x3; val_offset:20097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20097*FLEN/8, x4, x1, x2) - -inst_6700: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x4683ffff; valaddr_reg:x3; val_offset:20100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20100*FLEN/8, x4, x1, x2) - -inst_6701: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x4687ffff; valaddr_reg:x3; val_offset:20103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20103*FLEN/8, x4, x1, x2) - -inst_6702: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x468fffff; valaddr_reg:x3; val_offset:20106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20106*FLEN/8, x4, x1, x2) - -inst_6703: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x469fffff; valaddr_reg:x3; val_offset:20109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20109*FLEN/8, x4, x1, x2) - -inst_6704: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46bfffff; valaddr_reg:x3; val_offset:20112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20112*FLEN/8, x4, x1, x2) - -inst_6705: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46c00000; valaddr_reg:x3; val_offset:20115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20115*FLEN/8, x4, x1, x2) - -inst_6706: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46e00000; valaddr_reg:x3; val_offset:20118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20118*FLEN/8, x4, x1, x2) - -inst_6707: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46f00000; valaddr_reg:x3; val_offset:20121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20121*FLEN/8, x4, x1, x2) - -inst_6708: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46f80000; valaddr_reg:x3; val_offset:20124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20124*FLEN/8, x4, x1, x2) - -inst_6709: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fc0000; valaddr_reg:x3; val_offset:20127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20127*FLEN/8, x4, x1, x2) - -inst_6710: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fe0000; valaddr_reg:x3; val_offset:20130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20130*FLEN/8, x4, x1, x2) - -inst_6711: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ff0000; valaddr_reg:x3; val_offset:20133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20133*FLEN/8, x4, x1, x2) - -inst_6712: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ff8000; valaddr_reg:x3; val_offset:20136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20136*FLEN/8, x4, x1, x2) - -inst_6713: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ffc000; valaddr_reg:x3; val_offset:20139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20139*FLEN/8, x4, x1, x2) - -inst_6714: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ffe000; valaddr_reg:x3; val_offset:20142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20142*FLEN/8, x4, x1, x2) - -inst_6715: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fff000; valaddr_reg:x3; val_offset:20145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20145*FLEN/8, x4, x1, x2) - -inst_6716: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fff800; valaddr_reg:x3; val_offset:20148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20148*FLEN/8, x4, x1, x2) - -inst_6717: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fffc00; valaddr_reg:x3; val_offset:20151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20151*FLEN/8, x4, x1, x2) - -inst_6718: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fffe00; valaddr_reg:x3; val_offset:20154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20154*FLEN/8, x4, x1, x2) - -inst_6719: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ffff00; valaddr_reg:x3; val_offset:20157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20157*FLEN/8, x4, x1, x2) - -inst_6720: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ffff80; valaddr_reg:x3; val_offset:20160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20160*FLEN/8, x4, x1, x2) - -inst_6721: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ffffc0; valaddr_reg:x3; val_offset:20163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20163*FLEN/8, x4, x1, x2) - -inst_6722: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ffffe0; valaddr_reg:x3; val_offset:20166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20166*FLEN/8, x4, x1, x2) - -inst_6723: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fffff0; valaddr_reg:x3; val_offset:20169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20169*FLEN/8, x4, x1, x2) - -inst_6724: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fffff8; valaddr_reg:x3; val_offset:20172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20172*FLEN/8, x4, x1, x2) - -inst_6725: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fffffc; valaddr_reg:x3; val_offset:20175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20175*FLEN/8, x4, x1, x2) - -inst_6726: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46fffffe; valaddr_reg:x3; val_offset:20178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20178*FLEN/8, x4, x1, x2) - -inst_6727: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; -op3val:0x46ffffff; valaddr_reg:x3; val_offset:20181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20181*FLEN/8, x4, x1, x2) - -inst_6728: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5800000; valaddr_reg:x3; val_offset:20184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20184*FLEN/8, x4, x1, x2) - -inst_6729: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5800001; valaddr_reg:x3; val_offset:20187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20187*FLEN/8, x4, x1, x2) - -inst_6730: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5800003; valaddr_reg:x3; val_offset:20190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20190*FLEN/8, x4, x1, x2) - -inst_6731: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5800007; valaddr_reg:x3; val_offset:20193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20193*FLEN/8, x4, x1, x2) - -inst_6732: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa580000f; valaddr_reg:x3; val_offset:20196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20196*FLEN/8, x4, x1, x2) - -inst_6733: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa580001f; valaddr_reg:x3; val_offset:20199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20199*FLEN/8, x4, x1, x2) - -inst_6734: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa580003f; valaddr_reg:x3; val_offset:20202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20202*FLEN/8, x4, x1, x2) - -inst_6735: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa580007f; valaddr_reg:x3; val_offset:20205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20205*FLEN/8, x4, x1, x2) - -inst_6736: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa58000ff; valaddr_reg:x3; val_offset:20208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20208*FLEN/8, x4, x1, x2) - -inst_6737: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa58001ff; valaddr_reg:x3; val_offset:20211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20211*FLEN/8, x4, x1, x2) - -inst_6738: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa58003ff; valaddr_reg:x3; val_offset:20214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20214*FLEN/8, x4, x1, x2) - -inst_6739: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa58007ff; valaddr_reg:x3; val_offset:20217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20217*FLEN/8, x4, x1, x2) - -inst_6740: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5800fff; valaddr_reg:x3; val_offset:20220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20220*FLEN/8, x4, x1, x2) - -inst_6741: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5801fff; valaddr_reg:x3; val_offset:20223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20223*FLEN/8, x4, x1, x2) - -inst_6742: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5803fff; valaddr_reg:x3; val_offset:20226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20226*FLEN/8, x4, x1, x2) - -inst_6743: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5807fff; valaddr_reg:x3; val_offset:20229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20229*FLEN/8, x4, x1, x2) - -inst_6744: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa580ffff; valaddr_reg:x3; val_offset:20232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20232*FLEN/8, x4, x1, x2) - -inst_6745: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa581ffff; valaddr_reg:x3; val_offset:20235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20235*FLEN/8, x4, x1, x2) - -inst_6746: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa583ffff; valaddr_reg:x3; val_offset:20238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20238*FLEN/8, x4, x1, x2) - -inst_6747: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa587ffff; valaddr_reg:x3; val_offset:20241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20241*FLEN/8, x4, x1, x2) - -inst_6748: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa58fffff; valaddr_reg:x3; val_offset:20244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20244*FLEN/8, x4, x1, x2) - -inst_6749: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa59fffff; valaddr_reg:x3; val_offset:20247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20247*FLEN/8, x4, x1, x2) - -inst_6750: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5bfffff; valaddr_reg:x3; val_offset:20250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20250*FLEN/8, x4, x1, x2) - -inst_6751: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5c00000; valaddr_reg:x3; val_offset:20253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20253*FLEN/8, x4, x1, x2) - -inst_6752: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5e00000; valaddr_reg:x3; val_offset:20256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20256*FLEN/8, x4, x1, x2) - -inst_6753: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5f00000; valaddr_reg:x3; val_offset:20259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20259*FLEN/8, x4, x1, x2) - -inst_6754: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5f80000; valaddr_reg:x3; val_offset:20262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20262*FLEN/8, x4, x1, x2) - -inst_6755: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fc0000; valaddr_reg:x3; val_offset:20265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20265*FLEN/8, x4, x1, x2) - -inst_6756: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fe0000; valaddr_reg:x3; val_offset:20268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20268*FLEN/8, x4, x1, x2) - -inst_6757: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ff0000; valaddr_reg:x3; val_offset:20271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20271*FLEN/8, x4, x1, x2) - -inst_6758: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ff8000; valaddr_reg:x3; val_offset:20274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20274*FLEN/8, x4, x1, x2) - -inst_6759: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ffc000; valaddr_reg:x3; val_offset:20277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20277*FLEN/8, x4, x1, x2) - -inst_6760: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ffe000; valaddr_reg:x3; val_offset:20280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20280*FLEN/8, x4, x1, x2) - -inst_6761: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fff000; valaddr_reg:x3; val_offset:20283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20283*FLEN/8, x4, x1, x2) - -inst_6762: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fff800; valaddr_reg:x3; val_offset:20286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20286*FLEN/8, x4, x1, x2) - -inst_6763: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fffc00; valaddr_reg:x3; val_offset:20289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20289*FLEN/8, x4, x1, x2) - -inst_6764: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fffe00; valaddr_reg:x3; val_offset:20292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20292*FLEN/8, x4, x1, x2) - -inst_6765: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ffff00; valaddr_reg:x3; val_offset:20295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20295*FLEN/8, x4, x1, x2) - -inst_6766: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ffff80; valaddr_reg:x3; val_offset:20298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20298*FLEN/8, x4, x1, x2) - -inst_6767: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ffffc0; valaddr_reg:x3; val_offset:20301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20301*FLEN/8, x4, x1, x2) - -inst_6768: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ffffe0; valaddr_reg:x3; val_offset:20304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20304*FLEN/8, x4, x1, x2) - -inst_6769: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fffff0; valaddr_reg:x3; val_offset:20307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20307*FLEN/8, x4, x1, x2) - -inst_6770: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fffff8; valaddr_reg:x3; val_offset:20310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20310*FLEN/8, x4, x1, x2) - -inst_6771: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fffffc; valaddr_reg:x3; val_offset:20313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20313*FLEN/8, x4, x1, x2) - -inst_6772: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5fffffe; valaddr_reg:x3; val_offset:20316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20316*FLEN/8, x4, x1, x2) - -inst_6773: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xa5ffffff; valaddr_reg:x3; val_offset:20319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20319*FLEN/8, x4, x1, x2) - -inst_6774: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbf800001; valaddr_reg:x3; val_offset:20322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20322*FLEN/8, x4, x1, x2) - -inst_6775: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbf800003; valaddr_reg:x3; val_offset:20325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20325*FLEN/8, x4, x1, x2) - -inst_6776: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbf800007; valaddr_reg:x3; val_offset:20328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20328*FLEN/8, x4, x1, x2) - -inst_6777: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbf999999; valaddr_reg:x3; val_offset:20331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20331*FLEN/8, x4, x1, x2) - -inst_6778: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:20334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20334*FLEN/8, x4, x1, x2) - -inst_6779: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:20337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20337*FLEN/8, x4, x1, x2) - -inst_6780: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:20340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20340*FLEN/8, x4, x1, x2) - -inst_6781: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:20343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20343*FLEN/8, x4, x1, x2) - -inst_6782: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:20346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20346*FLEN/8, x4, x1, x2) - -inst_6783: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:20349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20349*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_54) - -inst_6784: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:20352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20352*FLEN/8, x4, x1, x2) - -inst_6785: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:20355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20355*FLEN/8, x4, x1, x2) - -inst_6786: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:20358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20358*FLEN/8, x4, x1, x2) - -inst_6787: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:20361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20361*FLEN/8, x4, x1, x2) - -inst_6788: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:20364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20364*FLEN/8, x4, x1, x2) - -inst_6789: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:20367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20367*FLEN/8, x4, x1, x2) - -inst_6790: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:20370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20370*FLEN/8, x4, x1, x2) - -inst_6791: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:20373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20373*FLEN/8, x4, x1, x2) - -inst_6792: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:20376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20376*FLEN/8, x4, x1, x2) - -inst_6793: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:20379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20379*FLEN/8, x4, x1, x2) - -inst_6794: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:20382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20382*FLEN/8, x4, x1, x2) - -inst_6795: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:20385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20385*FLEN/8, x4, x1, x2) - -inst_6796: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:20388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20388*FLEN/8, x4, x1, x2) - -inst_6797: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:20391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20391*FLEN/8, x4, x1, x2) - -inst_6798: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:20394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20394*FLEN/8, x4, x1, x2) - -inst_6799: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:20397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20397*FLEN/8, x4, x1, x2) - -inst_6800: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:20400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20400*FLEN/8, x4, x1, x2) - -inst_6801: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:20403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20403*FLEN/8, x4, x1, x2) - -inst_6802: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:20406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20406*FLEN/8, x4, x1, x2) - -inst_6803: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:20409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20409*FLEN/8, x4, x1, x2) - -inst_6804: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:20412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20412*FLEN/8, x4, x1, x2) - -inst_6805: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:20415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20415*FLEN/8, x4, x1, x2) - -inst_6806: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf000000; valaddr_reg:x3; val_offset:20418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20418*FLEN/8, x4, x1, x2) - -inst_6807: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf000001; valaddr_reg:x3; val_offset:20421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20421*FLEN/8, x4, x1, x2) - -inst_6808: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf000003; valaddr_reg:x3; val_offset:20424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20424*FLEN/8, x4, x1, x2) - -inst_6809: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf000007; valaddr_reg:x3; val_offset:20427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20427*FLEN/8, x4, x1, x2) - -inst_6810: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf00000f; valaddr_reg:x3; val_offset:20430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20430*FLEN/8, x4, x1, x2) - -inst_6811: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf00001f; valaddr_reg:x3; val_offset:20433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20433*FLEN/8, x4, x1, x2) - -inst_6812: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf00003f; valaddr_reg:x3; val_offset:20436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20436*FLEN/8, x4, x1, x2) - -inst_6813: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf00007f; valaddr_reg:x3; val_offset:20439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20439*FLEN/8, x4, x1, x2) - -inst_6814: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf0000ff; valaddr_reg:x3; val_offset:20442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20442*FLEN/8, x4, x1, x2) - -inst_6815: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf0001ff; valaddr_reg:x3; val_offset:20445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20445*FLEN/8, x4, x1, x2) - -inst_6816: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf0003ff; valaddr_reg:x3; val_offset:20448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20448*FLEN/8, x4, x1, x2) - -inst_6817: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf0007ff; valaddr_reg:x3; val_offset:20451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20451*FLEN/8, x4, x1, x2) - -inst_6818: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf000fff; valaddr_reg:x3; val_offset:20454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20454*FLEN/8, x4, x1, x2) - -inst_6819: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf001fff; valaddr_reg:x3; val_offset:20457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20457*FLEN/8, x4, x1, x2) - -inst_6820: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf003fff; valaddr_reg:x3; val_offset:20460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20460*FLEN/8, x4, x1, x2) - -inst_6821: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf007fff; valaddr_reg:x3; val_offset:20463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20463*FLEN/8, x4, x1, x2) - -inst_6822: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf00ffff; valaddr_reg:x3; val_offset:20466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20466*FLEN/8, x4, x1, x2) - -inst_6823: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf01ffff; valaddr_reg:x3; val_offset:20469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20469*FLEN/8, x4, x1, x2) - -inst_6824: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf03ffff; valaddr_reg:x3; val_offset:20472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20472*FLEN/8, x4, x1, x2) - -inst_6825: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf07ffff; valaddr_reg:x3; val_offset:20475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20475*FLEN/8, x4, x1, x2) - -inst_6826: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf0fffff; valaddr_reg:x3; val_offset:20478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20478*FLEN/8, x4, x1, x2) - -inst_6827: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf1fffff; valaddr_reg:x3; val_offset:20481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20481*FLEN/8, x4, x1, x2) - -inst_6828: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf3fffff; valaddr_reg:x3; val_offset:20484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20484*FLEN/8, x4, x1, x2) - -inst_6829: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf400000; valaddr_reg:x3; val_offset:20487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20487*FLEN/8, x4, x1, x2) - -inst_6830: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf600000; valaddr_reg:x3; val_offset:20490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20490*FLEN/8, x4, x1, x2) - -inst_6831: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf700000; valaddr_reg:x3; val_offset:20493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20493*FLEN/8, x4, x1, x2) - -inst_6832: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf780000; valaddr_reg:x3; val_offset:20496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20496*FLEN/8, x4, x1, x2) - -inst_6833: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7c0000; valaddr_reg:x3; val_offset:20499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20499*FLEN/8, x4, x1, x2) - -inst_6834: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7e0000; valaddr_reg:x3; val_offset:20502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20502*FLEN/8, x4, x1, x2) - -inst_6835: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7f0000; valaddr_reg:x3; val_offset:20505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20505*FLEN/8, x4, x1, x2) - -inst_6836: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7f8000; valaddr_reg:x3; val_offset:20508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20508*FLEN/8, x4, x1, x2) - -inst_6837: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7fc000; valaddr_reg:x3; val_offset:20511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20511*FLEN/8, x4, x1, x2) - -inst_6838: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7fe000; valaddr_reg:x3; val_offset:20514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20514*FLEN/8, x4, x1, x2) - -inst_6839: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7ff000; valaddr_reg:x3; val_offset:20517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20517*FLEN/8, x4, x1, x2) - -inst_6840: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7ff800; valaddr_reg:x3; val_offset:20520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20520*FLEN/8, x4, x1, x2) - -inst_6841: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7ffc00; valaddr_reg:x3; val_offset:20523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20523*FLEN/8, x4, x1, x2) - -inst_6842: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7ffe00; valaddr_reg:x3; val_offset:20526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20526*FLEN/8, x4, x1, x2) - -inst_6843: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7fff00; valaddr_reg:x3; val_offset:20529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20529*FLEN/8, x4, x1, x2) - -inst_6844: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7fff80; valaddr_reg:x3; val_offset:20532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20532*FLEN/8, x4, x1, x2) - -inst_6845: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7fffc0; valaddr_reg:x3; val_offset:20535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20535*FLEN/8, x4, x1, x2) - -inst_6846: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7fffe0; valaddr_reg:x3; val_offset:20538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20538*FLEN/8, x4, x1, x2) - -inst_6847: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7ffff0; valaddr_reg:x3; val_offset:20541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20541*FLEN/8, x4, x1, x2) - -inst_6848: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7ffff8; valaddr_reg:x3; val_offset:20544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20544*FLEN/8, x4, x1, x2) - -inst_6849: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7ffffc; valaddr_reg:x3; val_offset:20547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20547*FLEN/8, x4, x1, x2) - -inst_6850: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7ffffe; valaddr_reg:x3; val_offset:20550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20550*FLEN/8, x4, x1, x2) - -inst_6851: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; -op3val:0xf7fffff; valaddr_reg:x3; val_offset:20553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20553*FLEN/8, x4, x1, x2) - -inst_6852: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3f800001; valaddr_reg:x3; val_offset:20556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20556*FLEN/8, x4, x1, x2) - -inst_6853: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3f800003; valaddr_reg:x3; val_offset:20559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20559*FLEN/8, x4, x1, x2) - -inst_6854: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3f800007; valaddr_reg:x3; val_offset:20562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20562*FLEN/8, x4, x1, x2) - -inst_6855: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3f999999; valaddr_reg:x3; val_offset:20565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20565*FLEN/8, x4, x1, x2) - -inst_6856: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:20568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20568*FLEN/8, x4, x1, x2) - -inst_6857: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:20571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20571*FLEN/8, x4, x1, x2) - -inst_6858: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:20574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20574*FLEN/8, x4, x1, x2) - -inst_6859: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:20577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20577*FLEN/8, x4, x1, x2) - -inst_6860: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:20580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20580*FLEN/8, x4, x1, x2) - -inst_6861: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:20583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20583*FLEN/8, x4, x1, x2) - -inst_6862: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:20586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20586*FLEN/8, x4, x1, x2) - -inst_6863: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:20589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20589*FLEN/8, x4, x1, x2) - -inst_6864: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:20592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20592*FLEN/8, x4, x1, x2) - -inst_6865: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:20595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20595*FLEN/8, x4, x1, x2) - -inst_6866: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:20598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20598*FLEN/8, x4, x1, x2) - -inst_6867: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:20601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20601*FLEN/8, x4, x1, x2) - -inst_6868: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47000000; valaddr_reg:x3; val_offset:20604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20604*FLEN/8, x4, x1, x2) - -inst_6869: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47000001; valaddr_reg:x3; val_offset:20607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20607*FLEN/8, x4, x1, x2) - -inst_6870: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47000003; valaddr_reg:x3; val_offset:20610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20610*FLEN/8, x4, x1, x2) - -inst_6871: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47000007; valaddr_reg:x3; val_offset:20613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20613*FLEN/8, x4, x1, x2) - -inst_6872: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x4700000f; valaddr_reg:x3; val_offset:20616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20616*FLEN/8, x4, x1, x2) - -inst_6873: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x4700001f; valaddr_reg:x3; val_offset:20619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20619*FLEN/8, x4, x1, x2) - -inst_6874: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x4700003f; valaddr_reg:x3; val_offset:20622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20622*FLEN/8, x4, x1, x2) - -inst_6875: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x4700007f; valaddr_reg:x3; val_offset:20625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20625*FLEN/8, x4, x1, x2) - -inst_6876: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x470000ff; valaddr_reg:x3; val_offset:20628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20628*FLEN/8, x4, x1, x2) - -inst_6877: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x470001ff; valaddr_reg:x3; val_offset:20631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20631*FLEN/8, x4, x1, x2) - -inst_6878: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x470003ff; valaddr_reg:x3; val_offset:20634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20634*FLEN/8, x4, x1, x2) - -inst_6879: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x470007ff; valaddr_reg:x3; val_offset:20637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20637*FLEN/8, x4, x1, x2) - -inst_6880: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47000fff; valaddr_reg:x3; val_offset:20640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20640*FLEN/8, x4, x1, x2) - -inst_6881: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47001fff; valaddr_reg:x3; val_offset:20643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20643*FLEN/8, x4, x1, x2) - -inst_6882: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47003fff; valaddr_reg:x3; val_offset:20646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20646*FLEN/8, x4, x1, x2) - -inst_6883: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47007fff; valaddr_reg:x3; val_offset:20649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20649*FLEN/8, x4, x1, x2) - -inst_6884: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x4700ffff; valaddr_reg:x3; val_offset:20652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20652*FLEN/8, x4, x1, x2) - -inst_6885: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x4701ffff; valaddr_reg:x3; val_offset:20655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20655*FLEN/8, x4, x1, x2) - -inst_6886: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x4703ffff; valaddr_reg:x3; val_offset:20658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20658*FLEN/8, x4, x1, x2) - -inst_6887: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x4707ffff; valaddr_reg:x3; val_offset:20661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20661*FLEN/8, x4, x1, x2) - -inst_6888: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x470fffff; valaddr_reg:x3; val_offset:20664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20664*FLEN/8, x4, x1, x2) - -inst_6889: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x471fffff; valaddr_reg:x3; val_offset:20667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20667*FLEN/8, x4, x1, x2) - -inst_6890: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x473fffff; valaddr_reg:x3; val_offset:20670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20670*FLEN/8, x4, x1, x2) - -inst_6891: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47400000; valaddr_reg:x3; val_offset:20673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20673*FLEN/8, x4, x1, x2) - -inst_6892: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47600000; valaddr_reg:x3; val_offset:20676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20676*FLEN/8, x4, x1, x2) - -inst_6893: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47700000; valaddr_reg:x3; val_offset:20679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20679*FLEN/8, x4, x1, x2) - -inst_6894: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x47780000; valaddr_reg:x3; val_offset:20682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20682*FLEN/8, x4, x1, x2) - -inst_6895: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477c0000; valaddr_reg:x3; val_offset:20685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20685*FLEN/8, x4, x1, x2) - -inst_6896: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477e0000; valaddr_reg:x3; val_offset:20688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20688*FLEN/8, x4, x1, x2) - -inst_6897: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477f0000; valaddr_reg:x3; val_offset:20691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20691*FLEN/8, x4, x1, x2) - -inst_6898: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477f8000; valaddr_reg:x3; val_offset:20694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20694*FLEN/8, x4, x1, x2) - -inst_6899: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477fc000; valaddr_reg:x3; val_offset:20697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20697*FLEN/8, x4, x1, x2) - -inst_6900: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477fe000; valaddr_reg:x3; val_offset:20700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20700*FLEN/8, x4, x1, x2) - -inst_6901: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477ff000; valaddr_reg:x3; val_offset:20703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20703*FLEN/8, x4, x1, x2) - -inst_6902: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477ff800; valaddr_reg:x3; val_offset:20706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20706*FLEN/8, x4, x1, x2) - -inst_6903: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477ffc00; valaddr_reg:x3; val_offset:20709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20709*FLEN/8, x4, x1, x2) - -inst_6904: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477ffe00; valaddr_reg:x3; val_offset:20712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20712*FLEN/8, x4, x1, x2) - -inst_6905: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477fff00; valaddr_reg:x3; val_offset:20715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20715*FLEN/8, x4, x1, x2) - -inst_6906: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477fff80; valaddr_reg:x3; val_offset:20718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20718*FLEN/8, x4, x1, x2) - -inst_6907: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477fffc0; valaddr_reg:x3; val_offset:20721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20721*FLEN/8, x4, x1, x2) - -inst_6908: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477fffe0; valaddr_reg:x3; val_offset:20724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20724*FLEN/8, x4, x1, x2) - -inst_6909: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477ffff0; valaddr_reg:x3; val_offset:20727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20727*FLEN/8, x4, x1, x2) - -inst_6910: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477ffff8; valaddr_reg:x3; val_offset:20730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20730*FLEN/8, x4, x1, x2) - -inst_6911: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477ffffc; valaddr_reg:x3; val_offset:20733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20733*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_55) - -inst_6912: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477ffffe; valaddr_reg:x3; val_offset:20736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20736*FLEN/8, x4, x1, x2) - -inst_6913: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; -op3val:0x477fffff; valaddr_reg:x3; val_offset:20739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20739*FLEN/8, x4, x1, x2) - -inst_6914: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc800000; valaddr_reg:x3; val_offset:20742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20742*FLEN/8, x4, x1, x2) - -inst_6915: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc800001; valaddr_reg:x3; val_offset:20745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20745*FLEN/8, x4, x1, x2) - -inst_6916: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc800003; valaddr_reg:x3; val_offset:20748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20748*FLEN/8, x4, x1, x2) - -inst_6917: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc800007; valaddr_reg:x3; val_offset:20751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20751*FLEN/8, x4, x1, x2) - -inst_6918: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc80000f; valaddr_reg:x3; val_offset:20754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20754*FLEN/8, x4, x1, x2) - -inst_6919: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc80001f; valaddr_reg:x3; val_offset:20757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20757*FLEN/8, x4, x1, x2) - -inst_6920: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc80003f; valaddr_reg:x3; val_offset:20760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20760*FLEN/8, x4, x1, x2) - -inst_6921: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc80007f; valaddr_reg:x3; val_offset:20763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20763*FLEN/8, x4, x1, x2) - -inst_6922: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc8000ff; valaddr_reg:x3; val_offset:20766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20766*FLEN/8, x4, x1, x2) - -inst_6923: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc8001ff; valaddr_reg:x3; val_offset:20769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20769*FLEN/8, x4, x1, x2) - -inst_6924: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc8003ff; valaddr_reg:x3; val_offset:20772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20772*FLEN/8, x4, x1, x2) - -inst_6925: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc8007ff; valaddr_reg:x3; val_offset:20775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20775*FLEN/8, x4, x1, x2) - -inst_6926: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc800fff; valaddr_reg:x3; val_offset:20778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20778*FLEN/8, x4, x1, x2) - -inst_6927: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc801fff; valaddr_reg:x3; val_offset:20781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20781*FLEN/8, x4, x1, x2) - -inst_6928: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc803fff; valaddr_reg:x3; val_offset:20784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20784*FLEN/8, x4, x1, x2) - -inst_6929: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc807fff; valaddr_reg:x3; val_offset:20787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20787*FLEN/8, x4, x1, x2) - -inst_6930: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc80ffff; valaddr_reg:x3; val_offset:20790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20790*FLEN/8, x4, x1, x2) - -inst_6931: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc81ffff; valaddr_reg:x3; val_offset:20793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20793*FLEN/8, x4, x1, x2) - -inst_6932: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc83ffff; valaddr_reg:x3; val_offset:20796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20796*FLEN/8, x4, x1, x2) - -inst_6933: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc87ffff; valaddr_reg:x3; val_offset:20799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20799*FLEN/8, x4, x1, x2) - -inst_6934: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc8fffff; valaddr_reg:x3; val_offset:20802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20802*FLEN/8, x4, x1, x2) - -inst_6935: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfc9fffff; valaddr_reg:x3; val_offset:20805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20805*FLEN/8, x4, x1, x2) - -inst_6936: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcbfffff; valaddr_reg:x3; val_offset:20808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20808*FLEN/8, x4, x1, x2) - -inst_6937: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcc00000; valaddr_reg:x3; val_offset:20811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20811*FLEN/8, x4, x1, x2) - -inst_6938: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfce00000; valaddr_reg:x3; val_offset:20814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20814*FLEN/8, x4, x1, x2) - -inst_6939: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcf00000; valaddr_reg:x3; val_offset:20817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20817*FLEN/8, x4, x1, x2) - -inst_6940: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcf80000; valaddr_reg:x3; val_offset:20820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20820*FLEN/8, x4, x1, x2) - -inst_6941: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfc0000; valaddr_reg:x3; val_offset:20823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20823*FLEN/8, x4, x1, x2) - -inst_6942: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfe0000; valaddr_reg:x3; val_offset:20826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20826*FLEN/8, x4, x1, x2) - -inst_6943: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcff0000; valaddr_reg:x3; val_offset:20829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20829*FLEN/8, x4, x1, x2) - -inst_6944: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcff8000; valaddr_reg:x3; val_offset:20832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20832*FLEN/8, x4, x1, x2) - -inst_6945: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcffc000; valaddr_reg:x3; val_offset:20835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20835*FLEN/8, x4, x1, x2) - -inst_6946: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcffe000; valaddr_reg:x3; val_offset:20838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20838*FLEN/8, x4, x1, x2) - -inst_6947: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfff000; valaddr_reg:x3; val_offset:20841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20841*FLEN/8, x4, x1, x2) - -inst_6948: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfff800; valaddr_reg:x3; val_offset:20844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20844*FLEN/8, x4, x1, x2) - -inst_6949: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfffc00; valaddr_reg:x3; val_offset:20847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20847*FLEN/8, x4, x1, x2) - -inst_6950: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfffe00; valaddr_reg:x3; val_offset:20850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20850*FLEN/8, x4, x1, x2) - -inst_6951: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcffff00; valaddr_reg:x3; val_offset:20853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20853*FLEN/8, x4, x1, x2) - -inst_6952: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcffff80; valaddr_reg:x3; val_offset:20856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20856*FLEN/8, x4, x1, x2) - -inst_6953: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcffffc0; valaddr_reg:x3; val_offset:20859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20859*FLEN/8, x4, x1, x2) - -inst_6954: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcffffe0; valaddr_reg:x3; val_offset:20862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20862*FLEN/8, x4, x1, x2) - -inst_6955: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfffff0; valaddr_reg:x3; val_offset:20865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20865*FLEN/8, x4, x1, x2) - -inst_6956: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfffff8; valaddr_reg:x3; val_offset:20868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20868*FLEN/8, x4, x1, x2) - -inst_6957: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfffffc; valaddr_reg:x3; val_offset:20871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20871*FLEN/8, x4, x1, x2) - -inst_6958: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcfffffe; valaddr_reg:x3; val_offset:20874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20874*FLEN/8, x4, x1, x2) - -inst_6959: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xfcffffff; valaddr_reg:x3; val_offset:20877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20877*FLEN/8, x4, x1, x2) - -inst_6960: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff000001; valaddr_reg:x3; val_offset:20880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20880*FLEN/8, x4, x1, x2) - -inst_6961: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff000003; valaddr_reg:x3; val_offset:20883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20883*FLEN/8, x4, x1, x2) - -inst_6962: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff000007; valaddr_reg:x3; val_offset:20886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20886*FLEN/8, x4, x1, x2) - -inst_6963: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff199999; valaddr_reg:x3; val_offset:20889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20889*FLEN/8, x4, x1, x2) - -inst_6964: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff249249; valaddr_reg:x3; val_offset:20892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20892*FLEN/8, x4, x1, x2) - -inst_6965: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff333333; valaddr_reg:x3; val_offset:20895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20895*FLEN/8, x4, x1, x2) - -inst_6966: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:20898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20898*FLEN/8, x4, x1, x2) - -inst_6967: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:20901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20901*FLEN/8, x4, x1, x2) - -inst_6968: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff444444; valaddr_reg:x3; val_offset:20904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20904*FLEN/8, x4, x1, x2) - -inst_6969: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:20907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20907*FLEN/8, x4, x1, x2) - -inst_6970: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:20910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20910*FLEN/8, x4, x1, x2) - -inst_6971: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff666666; valaddr_reg:x3; val_offset:20913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20913*FLEN/8, x4, x1, x2) - -inst_6972: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:20916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20916*FLEN/8, x4, x1, x2) - -inst_6973: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:20919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20919*FLEN/8, x4, x1, x2) - -inst_6974: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:20922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20922*FLEN/8, x4, x1, x2) - -inst_6975: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:20925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20925*FLEN/8, x4, x1, x2) - -inst_6976: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:20928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20928*FLEN/8, x4, x1, x2) - -inst_6977: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:20931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20931*FLEN/8, x4, x1, x2) - -inst_6978: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:20934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20934*FLEN/8, x4, x1, x2) - -inst_6979: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:20937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20937*FLEN/8, x4, x1, x2) - -inst_6980: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:20940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20940*FLEN/8, x4, x1, x2) - -inst_6981: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:20943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20943*FLEN/8, x4, x1, x2) - -inst_6982: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:20946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20946*FLEN/8, x4, x1, x2) - -inst_6983: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:20949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20949*FLEN/8, x4, x1, x2) - -inst_6984: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:20952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20952*FLEN/8, x4, x1, x2) - -inst_6985: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:20955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20955*FLEN/8, x4, x1, x2) - -inst_6986: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:20958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20958*FLEN/8, x4, x1, x2) - -inst_6987: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:20961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20961*FLEN/8, x4, x1, x2) - -inst_6988: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:20964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20964*FLEN/8, x4, x1, x2) - -inst_6989: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:20967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20967*FLEN/8, x4, x1, x2) - -inst_6990: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:20970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20970*FLEN/8, x4, x1, x2) - -inst_6991: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:20973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20973*FLEN/8, x4, x1, x2) - -inst_6992: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f000000; valaddr_reg:x3; val_offset:20976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20976*FLEN/8, x4, x1, x2) - -inst_6993: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f000001; valaddr_reg:x3; val_offset:20979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20979*FLEN/8, x4, x1, x2) - -inst_6994: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f000003; valaddr_reg:x3; val_offset:20982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20982*FLEN/8, x4, x1, x2) - -inst_6995: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f000007; valaddr_reg:x3; val_offset:20985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20985*FLEN/8, x4, x1, x2) - -inst_6996: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f00000f; valaddr_reg:x3; val_offset:20988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20988*FLEN/8, x4, x1, x2) - -inst_6997: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f00001f; valaddr_reg:x3; val_offset:20991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20991*FLEN/8, x4, x1, x2) - -inst_6998: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f00003f; valaddr_reg:x3; val_offset:20994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20994*FLEN/8, x4, x1, x2) - -inst_6999: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f00007f; valaddr_reg:x3; val_offset:20997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20997*FLEN/8, x4, x1, x2) - -inst_7000: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f0000ff; valaddr_reg:x3; val_offset:21000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21000*FLEN/8, x4, x1, x2) - -inst_7001: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f0001ff; valaddr_reg:x3; val_offset:21003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21003*FLEN/8, x4, x1, x2) - -inst_7002: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f0003ff; valaddr_reg:x3; val_offset:21006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21006*FLEN/8, x4, x1, x2) - -inst_7003: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f0007ff; valaddr_reg:x3; val_offset:21009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21009*FLEN/8, x4, x1, x2) - -inst_7004: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f000fff; valaddr_reg:x3; val_offset:21012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21012*FLEN/8, x4, x1, x2) - -inst_7005: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f001fff; valaddr_reg:x3; val_offset:21015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21015*FLEN/8, x4, x1, x2) - -inst_7006: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f003fff; valaddr_reg:x3; val_offset:21018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21018*FLEN/8, x4, x1, x2) - -inst_7007: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f007fff; valaddr_reg:x3; val_offset:21021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21021*FLEN/8, x4, x1, x2) - -inst_7008: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f00ffff; valaddr_reg:x3; val_offset:21024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21024*FLEN/8, x4, x1, x2) - -inst_7009: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f01ffff; valaddr_reg:x3; val_offset:21027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21027*FLEN/8, x4, x1, x2) - -inst_7010: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f03ffff; valaddr_reg:x3; val_offset:21030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21030*FLEN/8, x4, x1, x2) - -inst_7011: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f07ffff; valaddr_reg:x3; val_offset:21033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21033*FLEN/8, x4, x1, x2) - -inst_7012: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f0fffff; valaddr_reg:x3; val_offset:21036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21036*FLEN/8, x4, x1, x2) - -inst_7013: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f1fffff; valaddr_reg:x3; val_offset:21039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21039*FLEN/8, x4, x1, x2) - -inst_7014: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f3fffff; valaddr_reg:x3; val_offset:21042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21042*FLEN/8, x4, x1, x2) - -inst_7015: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f400000; valaddr_reg:x3; val_offset:21045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21045*FLEN/8, x4, x1, x2) - -inst_7016: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f600000; valaddr_reg:x3; val_offset:21048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21048*FLEN/8, x4, x1, x2) - -inst_7017: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f700000; valaddr_reg:x3; val_offset:21051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21051*FLEN/8, x4, x1, x2) - -inst_7018: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f780000; valaddr_reg:x3; val_offset:21054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21054*FLEN/8, x4, x1, x2) - -inst_7019: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7c0000; valaddr_reg:x3; val_offset:21057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21057*FLEN/8, x4, x1, x2) - -inst_7020: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7e0000; valaddr_reg:x3; val_offset:21060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21060*FLEN/8, x4, x1, x2) - -inst_7021: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7f0000; valaddr_reg:x3; val_offset:21063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21063*FLEN/8, x4, x1, x2) - -inst_7022: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7f8000; valaddr_reg:x3; val_offset:21066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21066*FLEN/8, x4, x1, x2) - -inst_7023: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7fc000; valaddr_reg:x3; val_offset:21069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21069*FLEN/8, x4, x1, x2) - -inst_7024: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7fe000; valaddr_reg:x3; val_offset:21072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21072*FLEN/8, x4, x1, x2) - -inst_7025: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7ff000; valaddr_reg:x3; val_offset:21075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21075*FLEN/8, x4, x1, x2) - -inst_7026: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7ff800; valaddr_reg:x3; val_offset:21078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21078*FLEN/8, x4, x1, x2) - -inst_7027: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:21081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21081*FLEN/8, x4, x1, x2) - -inst_7028: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:21084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21084*FLEN/8, x4, x1, x2) - -inst_7029: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7fff00; valaddr_reg:x3; val_offset:21087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21087*FLEN/8, x4, x1, x2) - -inst_7030: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7fff80; valaddr_reg:x3; val_offset:21090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21090*FLEN/8, x4, x1, x2) - -inst_7031: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:21093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21093*FLEN/8, x4, x1, x2) - -inst_7032: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:21096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21096*FLEN/8, x4, x1, x2) - -inst_7033: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:21099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21099*FLEN/8, x4, x1, x2) - -inst_7034: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:21102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21102*FLEN/8, x4, x1, x2) - -inst_7035: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:21105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21105*FLEN/8, x4, x1, x2) - -inst_7036: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:21108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21108*FLEN/8, x4, x1, x2) - -inst_7037: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; -op3val:0x8f7fffff; valaddr_reg:x3; val_offset:21111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21111*FLEN/8, x4, x1, x2) - -inst_7038: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab000000; valaddr_reg:x3; val_offset:21114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21114*FLEN/8, x4, x1, x2) - -inst_7039: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab000001; valaddr_reg:x3; val_offset:21117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21117*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_56) - -inst_7040: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab000003; valaddr_reg:x3; val_offset:21120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21120*FLEN/8, x4, x1, x2) - -inst_7041: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab000007; valaddr_reg:x3; val_offset:21123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21123*FLEN/8, x4, x1, x2) - -inst_7042: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab00000f; valaddr_reg:x3; val_offset:21126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21126*FLEN/8, x4, x1, x2) - -inst_7043: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab00001f; valaddr_reg:x3; val_offset:21129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21129*FLEN/8, x4, x1, x2) - -inst_7044: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab00003f; valaddr_reg:x3; val_offset:21132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21132*FLEN/8, x4, x1, x2) - -inst_7045: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab00007f; valaddr_reg:x3; val_offset:21135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21135*FLEN/8, x4, x1, x2) - -inst_7046: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab0000ff; valaddr_reg:x3; val_offset:21138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21138*FLEN/8, x4, x1, x2) - -inst_7047: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab0001ff; valaddr_reg:x3; val_offset:21141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21141*FLEN/8, x4, x1, x2) - -inst_7048: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab0003ff; valaddr_reg:x3; val_offset:21144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21144*FLEN/8, x4, x1, x2) - -inst_7049: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab0007ff; valaddr_reg:x3; val_offset:21147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21147*FLEN/8, x4, x1, x2) - -inst_7050: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab000fff; valaddr_reg:x3; val_offset:21150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21150*FLEN/8, x4, x1, x2) - -inst_7051: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab001fff; valaddr_reg:x3; val_offset:21153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21153*FLEN/8, x4, x1, x2) - -inst_7052: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab003fff; valaddr_reg:x3; val_offset:21156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21156*FLEN/8, x4, x1, x2) - -inst_7053: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab007fff; valaddr_reg:x3; val_offset:21159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21159*FLEN/8, x4, x1, x2) - -inst_7054: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab00ffff; valaddr_reg:x3; val_offset:21162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21162*FLEN/8, x4, x1, x2) - -inst_7055: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab01ffff; valaddr_reg:x3; val_offset:21165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21165*FLEN/8, x4, x1, x2) - -inst_7056: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab03ffff; valaddr_reg:x3; val_offset:21168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21168*FLEN/8, x4, x1, x2) - -inst_7057: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab07ffff; valaddr_reg:x3; val_offset:21171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21171*FLEN/8, x4, x1, x2) - -inst_7058: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab0fffff; valaddr_reg:x3; val_offset:21174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21174*FLEN/8, x4, x1, x2) - -inst_7059: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab1fffff; valaddr_reg:x3; val_offset:21177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21177*FLEN/8, x4, x1, x2) - -inst_7060: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab3fffff; valaddr_reg:x3; val_offset:21180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21180*FLEN/8, x4, x1, x2) - -inst_7061: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab400000; valaddr_reg:x3; val_offset:21183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21183*FLEN/8, x4, x1, x2) - -inst_7062: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab600000; valaddr_reg:x3; val_offset:21186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21186*FLEN/8, x4, x1, x2) - -inst_7063: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab700000; valaddr_reg:x3; val_offset:21189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21189*FLEN/8, x4, x1, x2) - -inst_7064: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab780000; valaddr_reg:x3; val_offset:21192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21192*FLEN/8, x4, x1, x2) - -inst_7065: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7c0000; valaddr_reg:x3; val_offset:21195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21195*FLEN/8, x4, x1, x2) - -inst_7066: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7e0000; valaddr_reg:x3; val_offset:21198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21198*FLEN/8, x4, x1, x2) - -inst_7067: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7f0000; valaddr_reg:x3; val_offset:21201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21201*FLEN/8, x4, x1, x2) - -inst_7068: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7f8000; valaddr_reg:x3; val_offset:21204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21204*FLEN/8, x4, x1, x2) - -inst_7069: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7fc000; valaddr_reg:x3; val_offset:21207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21207*FLEN/8, x4, x1, x2) - -inst_7070: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7fe000; valaddr_reg:x3; val_offset:21210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21210*FLEN/8, x4, x1, x2) - -inst_7071: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7ff000; valaddr_reg:x3; val_offset:21213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21213*FLEN/8, x4, x1, x2) - -inst_7072: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7ff800; valaddr_reg:x3; val_offset:21216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21216*FLEN/8, x4, x1, x2) - -inst_7073: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7ffc00; valaddr_reg:x3; val_offset:21219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21219*FLEN/8, x4, x1, x2) - -inst_7074: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7ffe00; valaddr_reg:x3; val_offset:21222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21222*FLEN/8, x4, x1, x2) - -inst_7075: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7fff00; valaddr_reg:x3; val_offset:21225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21225*FLEN/8, x4, x1, x2) - -inst_7076: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7fff80; valaddr_reg:x3; val_offset:21228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21228*FLEN/8, x4, x1, x2) - -inst_7077: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7fffc0; valaddr_reg:x3; val_offset:21231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21231*FLEN/8, x4, x1, x2) - -inst_7078: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7fffe0; valaddr_reg:x3; val_offset:21234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21234*FLEN/8, x4, x1, x2) - -inst_7079: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7ffff0; valaddr_reg:x3; val_offset:21237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21237*FLEN/8, x4, x1, x2) - -inst_7080: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7ffff8; valaddr_reg:x3; val_offset:21240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21240*FLEN/8, x4, x1, x2) - -inst_7081: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7ffffc; valaddr_reg:x3; val_offset:21243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21243*FLEN/8, x4, x1, x2) - -inst_7082: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7ffffe; valaddr_reg:x3; val_offset:21246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21246*FLEN/8, x4, x1, x2) - -inst_7083: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xab7fffff; valaddr_reg:x3; val_offset:21249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21249*FLEN/8, x4, x1, x2) - -inst_7084: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbf800001; valaddr_reg:x3; val_offset:21252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21252*FLEN/8, x4, x1, x2) - -inst_7085: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbf800003; valaddr_reg:x3; val_offset:21255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21255*FLEN/8, x4, x1, x2) - -inst_7086: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbf800007; valaddr_reg:x3; val_offset:21258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21258*FLEN/8, x4, x1, x2) - -inst_7087: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbf999999; valaddr_reg:x3; val_offset:21261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21261*FLEN/8, x4, x1, x2) - -inst_7088: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:21264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21264*FLEN/8, x4, x1, x2) - -inst_7089: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:21267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21267*FLEN/8, x4, x1, x2) - -inst_7090: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:21270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21270*FLEN/8, x4, x1, x2) - -inst_7091: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:21273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21273*FLEN/8, x4, x1, x2) - -inst_7092: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:21276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21276*FLEN/8, x4, x1, x2) - -inst_7093: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:21279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21279*FLEN/8, x4, x1, x2) - -inst_7094: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:21282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21282*FLEN/8, x4, x1, x2) - -inst_7095: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:21285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21285*FLEN/8, x4, x1, x2) - -inst_7096: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:21288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21288*FLEN/8, x4, x1, x2) - -inst_7097: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:21291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21291*FLEN/8, x4, x1, x2) - -inst_7098: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:21294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21294*FLEN/8, x4, x1, x2) - -inst_7099: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:21297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21297*FLEN/8, x4, x1, x2) - -inst_7100: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:21300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21300*FLEN/8, x4, x1, x2) - -inst_7101: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:21303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21303*FLEN/8, x4, x1, x2) - -inst_7102: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:21306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21306*FLEN/8, x4, x1, x2) - -inst_7103: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:21309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21309*FLEN/8, x4, x1, x2) - -inst_7104: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:21312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21312*FLEN/8, x4, x1, x2) - -inst_7105: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:21315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21315*FLEN/8, x4, x1, x2) - -inst_7106: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:21318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21318*FLEN/8, x4, x1, x2) - -inst_7107: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:21321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21321*FLEN/8, x4, x1, x2) - -inst_7108: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:21324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21324*FLEN/8, x4, x1, x2) - -inst_7109: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:21327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21327*FLEN/8, x4, x1, x2) - -inst_7110: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:21330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21330*FLEN/8, x4, x1, x2) - -inst_7111: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:21333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21333*FLEN/8, x4, x1, x2) - -inst_7112: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:21336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21336*FLEN/8, x4, x1, x2) - -inst_7113: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:21339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21339*FLEN/8, x4, x1, x2) - -inst_7114: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:21342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21342*FLEN/8, x4, x1, x2) - -inst_7115: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:21345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21345*FLEN/8, x4, x1, x2) - -inst_7116: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85000000; valaddr_reg:x3; val_offset:21348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21348*FLEN/8, x4, x1, x2) - -inst_7117: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85000001; valaddr_reg:x3; val_offset:21351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21351*FLEN/8, x4, x1, x2) - -inst_7118: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85000003; valaddr_reg:x3; val_offset:21354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21354*FLEN/8, x4, x1, x2) - -inst_7119: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85000007; valaddr_reg:x3; val_offset:21357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21357*FLEN/8, x4, x1, x2) - -inst_7120: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8500000f; valaddr_reg:x3; val_offset:21360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21360*FLEN/8, x4, x1, x2) - -inst_7121: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8500001f; valaddr_reg:x3; val_offset:21363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21363*FLEN/8, x4, x1, x2) - -inst_7122: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8500003f; valaddr_reg:x3; val_offset:21366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21366*FLEN/8, x4, x1, x2) - -inst_7123: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8500007f; valaddr_reg:x3; val_offset:21369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21369*FLEN/8, x4, x1, x2) - -inst_7124: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x850000ff; valaddr_reg:x3; val_offset:21372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21372*FLEN/8, x4, x1, x2) - -inst_7125: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x850001ff; valaddr_reg:x3; val_offset:21375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21375*FLEN/8, x4, x1, x2) - -inst_7126: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x850003ff; valaddr_reg:x3; val_offset:21378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21378*FLEN/8, x4, x1, x2) - -inst_7127: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x850007ff; valaddr_reg:x3; val_offset:21381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21381*FLEN/8, x4, x1, x2) - -inst_7128: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85000fff; valaddr_reg:x3; val_offset:21384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21384*FLEN/8, x4, x1, x2) - -inst_7129: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85001fff; valaddr_reg:x3; val_offset:21387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21387*FLEN/8, x4, x1, x2) - -inst_7130: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85003fff; valaddr_reg:x3; val_offset:21390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21390*FLEN/8, x4, x1, x2) - -inst_7131: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85007fff; valaddr_reg:x3; val_offset:21393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21393*FLEN/8, x4, x1, x2) - -inst_7132: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8500ffff; valaddr_reg:x3; val_offset:21396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21396*FLEN/8, x4, x1, x2) - -inst_7133: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8501ffff; valaddr_reg:x3; val_offset:21399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21399*FLEN/8, x4, x1, x2) - -inst_7134: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8503ffff; valaddr_reg:x3; val_offset:21402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21402*FLEN/8, x4, x1, x2) - -inst_7135: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x8507ffff; valaddr_reg:x3; val_offset:21405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21405*FLEN/8, x4, x1, x2) - -inst_7136: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x850fffff; valaddr_reg:x3; val_offset:21408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21408*FLEN/8, x4, x1, x2) - -inst_7137: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x851fffff; valaddr_reg:x3; val_offset:21411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21411*FLEN/8, x4, x1, x2) - -inst_7138: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x853fffff; valaddr_reg:x3; val_offset:21414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21414*FLEN/8, x4, x1, x2) - -inst_7139: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85400000; valaddr_reg:x3; val_offset:21417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21417*FLEN/8, x4, x1, x2) - -inst_7140: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85600000; valaddr_reg:x3; val_offset:21420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21420*FLEN/8, x4, x1, x2) - -inst_7141: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85700000; valaddr_reg:x3; val_offset:21423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21423*FLEN/8, x4, x1, x2) - -inst_7142: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x85780000; valaddr_reg:x3; val_offset:21426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21426*FLEN/8, x4, x1, x2) - -inst_7143: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857c0000; valaddr_reg:x3; val_offset:21429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21429*FLEN/8, x4, x1, x2) - -inst_7144: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857e0000; valaddr_reg:x3; val_offset:21432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21432*FLEN/8, x4, x1, x2) - -inst_7145: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857f0000; valaddr_reg:x3; val_offset:21435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21435*FLEN/8, x4, x1, x2) - -inst_7146: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857f8000; valaddr_reg:x3; val_offset:21438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21438*FLEN/8, x4, x1, x2) - -inst_7147: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857fc000; valaddr_reg:x3; val_offset:21441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21441*FLEN/8, x4, x1, x2) - -inst_7148: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857fe000; valaddr_reg:x3; val_offset:21444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21444*FLEN/8, x4, x1, x2) - -inst_7149: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857ff000; valaddr_reg:x3; val_offset:21447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21447*FLEN/8, x4, x1, x2) - -inst_7150: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857ff800; valaddr_reg:x3; val_offset:21450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21450*FLEN/8, x4, x1, x2) - -inst_7151: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857ffc00; valaddr_reg:x3; val_offset:21453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21453*FLEN/8, x4, x1, x2) - -inst_7152: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857ffe00; valaddr_reg:x3; val_offset:21456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21456*FLEN/8, x4, x1, x2) - -inst_7153: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857fff00; valaddr_reg:x3; val_offset:21459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21459*FLEN/8, x4, x1, x2) - -inst_7154: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857fff80; valaddr_reg:x3; val_offset:21462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21462*FLEN/8, x4, x1, x2) - -inst_7155: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857fffc0; valaddr_reg:x3; val_offset:21465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21465*FLEN/8, x4, x1, x2) - -inst_7156: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857fffe0; valaddr_reg:x3; val_offset:21468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21468*FLEN/8, x4, x1, x2) - -inst_7157: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857ffff0; valaddr_reg:x3; val_offset:21471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21471*FLEN/8, x4, x1, x2) - -inst_7158: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857ffff8; valaddr_reg:x3; val_offset:21474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21474*FLEN/8, x4, x1, x2) - -inst_7159: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857ffffc; valaddr_reg:x3; val_offset:21477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21477*FLEN/8, x4, x1, x2) - -inst_7160: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857ffffe; valaddr_reg:x3; val_offset:21480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21480*FLEN/8, x4, x1, x2) - -inst_7161: -// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; -op3val:0x857fffff; valaddr_reg:x3; val_offset:21483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21483*FLEN/8, x4, x1, x2) - -inst_7162: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f000000; valaddr_reg:x3; val_offset:21486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21486*FLEN/8, x4, x1, x2) - -inst_7163: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f000001; valaddr_reg:x3; val_offset:21489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21489*FLEN/8, x4, x1, x2) - -inst_7164: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f000003; valaddr_reg:x3; val_offset:21492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21492*FLEN/8, x4, x1, x2) - -inst_7165: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f000007; valaddr_reg:x3; val_offset:21495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21495*FLEN/8, x4, x1, x2) - -inst_7166: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f00000f; valaddr_reg:x3; val_offset:21498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21498*FLEN/8, x4, x1, x2) - -inst_7167: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f00001f; valaddr_reg:x3; val_offset:21501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21501*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_57) - -inst_7168: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f00003f; valaddr_reg:x3; val_offset:21504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21504*FLEN/8, x4, x1, x2) - -inst_7169: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f00007f; valaddr_reg:x3; val_offset:21507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21507*FLEN/8, x4, x1, x2) - -inst_7170: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f0000ff; valaddr_reg:x3; val_offset:21510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21510*FLEN/8, x4, x1, x2) - -inst_7171: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f0001ff; valaddr_reg:x3; val_offset:21513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21513*FLEN/8, x4, x1, x2) - -inst_7172: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f0003ff; valaddr_reg:x3; val_offset:21516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21516*FLEN/8, x4, x1, x2) - -inst_7173: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f0007ff; valaddr_reg:x3; val_offset:21519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21519*FLEN/8, x4, x1, x2) - -inst_7174: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f000fff; valaddr_reg:x3; val_offset:21522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21522*FLEN/8, x4, x1, x2) - -inst_7175: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f001fff; valaddr_reg:x3; val_offset:21525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21525*FLEN/8, x4, x1, x2) - -inst_7176: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f003fff; valaddr_reg:x3; val_offset:21528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21528*FLEN/8, x4, x1, x2) - -inst_7177: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f007fff; valaddr_reg:x3; val_offset:21531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21531*FLEN/8, x4, x1, x2) - -inst_7178: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f00ffff; valaddr_reg:x3; val_offset:21534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21534*FLEN/8, x4, x1, x2) - -inst_7179: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f01ffff; valaddr_reg:x3; val_offset:21537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21537*FLEN/8, x4, x1, x2) - -inst_7180: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f03ffff; valaddr_reg:x3; val_offset:21540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21540*FLEN/8, x4, x1, x2) - -inst_7181: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f07ffff; valaddr_reg:x3; val_offset:21543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21543*FLEN/8, x4, x1, x2) - -inst_7182: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f0fffff; valaddr_reg:x3; val_offset:21546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21546*FLEN/8, x4, x1, x2) - -inst_7183: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f1fffff; valaddr_reg:x3; val_offset:21549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21549*FLEN/8, x4, x1, x2) - -inst_7184: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f3fffff; valaddr_reg:x3; val_offset:21552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21552*FLEN/8, x4, x1, x2) - -inst_7185: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f400000; valaddr_reg:x3; val_offset:21555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21555*FLEN/8, x4, x1, x2) - -inst_7186: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f600000; valaddr_reg:x3; val_offset:21558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21558*FLEN/8, x4, x1, x2) - -inst_7187: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f700000; valaddr_reg:x3; val_offset:21561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21561*FLEN/8, x4, x1, x2) - -inst_7188: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f780000; valaddr_reg:x3; val_offset:21564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21564*FLEN/8, x4, x1, x2) - -inst_7189: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7c0000; valaddr_reg:x3; val_offset:21567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21567*FLEN/8, x4, x1, x2) - -inst_7190: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7e0000; valaddr_reg:x3; val_offset:21570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21570*FLEN/8, x4, x1, x2) - -inst_7191: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7f0000; valaddr_reg:x3; val_offset:21573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21573*FLEN/8, x4, x1, x2) - -inst_7192: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7f8000; valaddr_reg:x3; val_offset:21576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21576*FLEN/8, x4, x1, x2) - -inst_7193: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7fc000; valaddr_reg:x3; val_offset:21579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21579*FLEN/8, x4, x1, x2) - -inst_7194: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7fe000; valaddr_reg:x3; val_offset:21582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21582*FLEN/8, x4, x1, x2) - -inst_7195: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7ff000; valaddr_reg:x3; val_offset:21585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21585*FLEN/8, x4, x1, x2) - -inst_7196: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7ff800; valaddr_reg:x3; val_offset:21588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21588*FLEN/8, x4, x1, x2) - -inst_7197: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7ffc00; valaddr_reg:x3; val_offset:21591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21591*FLEN/8, x4, x1, x2) - -inst_7198: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7ffe00; valaddr_reg:x3; val_offset:21594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21594*FLEN/8, x4, x1, x2) - -inst_7199: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7fff00; valaddr_reg:x3; val_offset:21597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21597*FLEN/8, x4, x1, x2) - -inst_7200: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7fff80; valaddr_reg:x3; val_offset:21600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21600*FLEN/8, x4, x1, x2) - -inst_7201: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7fffc0; valaddr_reg:x3; val_offset:21603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21603*FLEN/8, x4, x1, x2) - -inst_7202: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7fffe0; valaddr_reg:x3; val_offset:21606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21606*FLEN/8, x4, x1, x2) - -inst_7203: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7ffff0; valaddr_reg:x3; val_offset:21609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21609*FLEN/8, x4, x1, x2) - -inst_7204: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7ffff8; valaddr_reg:x3; val_offset:21612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21612*FLEN/8, x4, x1, x2) - -inst_7205: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7ffffc; valaddr_reg:x3; val_offset:21615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21615*FLEN/8, x4, x1, x2) - -inst_7206: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7ffffe; valaddr_reg:x3; val_offset:21618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21618*FLEN/8, x4, x1, x2) - -inst_7207: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x2f7fffff; valaddr_reg:x3; val_offset:21621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21621*FLEN/8, x4, x1, x2) - -inst_7208: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3f800001; valaddr_reg:x3; val_offset:21624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21624*FLEN/8, x4, x1, x2) - -inst_7209: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3f800003; valaddr_reg:x3; val_offset:21627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21627*FLEN/8, x4, x1, x2) - -inst_7210: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3f800007; valaddr_reg:x3; val_offset:21630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21630*FLEN/8, x4, x1, x2) - -inst_7211: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3f999999; valaddr_reg:x3; val_offset:21633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21633*FLEN/8, x4, x1, x2) - -inst_7212: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:21636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21636*FLEN/8, x4, x1, x2) - -inst_7213: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:21639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21639*FLEN/8, x4, x1, x2) - -inst_7214: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:21642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21642*FLEN/8, x4, x1, x2) - -inst_7215: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:21645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21645*FLEN/8, x4, x1, x2) - -inst_7216: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:21648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21648*FLEN/8, x4, x1, x2) - -inst_7217: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:21651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21651*FLEN/8, x4, x1, x2) - -inst_7218: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:21654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21654*FLEN/8, x4, x1, x2) - -inst_7219: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:21657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21657*FLEN/8, x4, x1, x2) - -inst_7220: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:21660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21660*FLEN/8, x4, x1, x2) - -inst_7221: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:21663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21663*FLEN/8, x4, x1, x2) - -inst_7222: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:21666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21666*FLEN/8, x4, x1, x2) - -inst_7223: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:21669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21669*FLEN/8, x4, x1, x2) - -inst_7224: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63800000; valaddr_reg:x3; val_offset:21672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21672*FLEN/8, x4, x1, x2) - -inst_7225: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63800001; valaddr_reg:x3; val_offset:21675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21675*FLEN/8, x4, x1, x2) - -inst_7226: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63800003; valaddr_reg:x3; val_offset:21678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21678*FLEN/8, x4, x1, x2) - -inst_7227: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63800007; valaddr_reg:x3; val_offset:21681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21681*FLEN/8, x4, x1, x2) - -inst_7228: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x6380000f; valaddr_reg:x3; val_offset:21684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21684*FLEN/8, x4, x1, x2) - -inst_7229: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x6380001f; valaddr_reg:x3; val_offset:21687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21687*FLEN/8, x4, x1, x2) - -inst_7230: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x6380003f; valaddr_reg:x3; val_offset:21690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21690*FLEN/8, x4, x1, x2) - -inst_7231: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x6380007f; valaddr_reg:x3; val_offset:21693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21693*FLEN/8, x4, x1, x2) - -inst_7232: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x638000ff; valaddr_reg:x3; val_offset:21696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21696*FLEN/8, x4, x1, x2) - -inst_7233: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x638001ff; valaddr_reg:x3; val_offset:21699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21699*FLEN/8, x4, x1, x2) - -inst_7234: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x638003ff; valaddr_reg:x3; val_offset:21702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21702*FLEN/8, x4, x1, x2) - -inst_7235: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x638007ff; valaddr_reg:x3; val_offset:21705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21705*FLEN/8, x4, x1, x2) - -inst_7236: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63800fff; valaddr_reg:x3; val_offset:21708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21708*FLEN/8, x4, x1, x2) - -inst_7237: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63801fff; valaddr_reg:x3; val_offset:21711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21711*FLEN/8, x4, x1, x2) - -inst_7238: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63803fff; valaddr_reg:x3; val_offset:21714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21714*FLEN/8, x4, x1, x2) - -inst_7239: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63807fff; valaddr_reg:x3; val_offset:21717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21717*FLEN/8, x4, x1, x2) - -inst_7240: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x6380ffff; valaddr_reg:x3; val_offset:21720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21720*FLEN/8, x4, x1, x2) - -inst_7241: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x6381ffff; valaddr_reg:x3; val_offset:21723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21723*FLEN/8, x4, x1, x2) - -inst_7242: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x6383ffff; valaddr_reg:x3; val_offset:21726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21726*FLEN/8, x4, x1, x2) - -inst_7243: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x6387ffff; valaddr_reg:x3; val_offset:21729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21729*FLEN/8, x4, x1, x2) - -inst_7244: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x638fffff; valaddr_reg:x3; val_offset:21732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21732*FLEN/8, x4, x1, x2) - -inst_7245: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x639fffff; valaddr_reg:x3; val_offset:21735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21735*FLEN/8, x4, x1, x2) - -inst_7246: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63bfffff; valaddr_reg:x3; val_offset:21738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21738*FLEN/8, x4, x1, x2) - -inst_7247: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63c00000; valaddr_reg:x3; val_offset:21741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21741*FLEN/8, x4, x1, x2) - -inst_7248: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63e00000; valaddr_reg:x3; val_offset:21744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21744*FLEN/8, x4, x1, x2) - -inst_7249: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63f00000; valaddr_reg:x3; val_offset:21747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21747*FLEN/8, x4, x1, x2) - -inst_7250: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63f80000; valaddr_reg:x3; val_offset:21750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21750*FLEN/8, x4, x1, x2) - -inst_7251: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fc0000; valaddr_reg:x3; val_offset:21753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21753*FLEN/8, x4, x1, x2) - -inst_7252: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fe0000; valaddr_reg:x3; val_offset:21756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21756*FLEN/8, x4, x1, x2) - -inst_7253: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ff0000; valaddr_reg:x3; val_offset:21759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21759*FLEN/8, x4, x1, x2) - -inst_7254: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ff8000; valaddr_reg:x3; val_offset:21762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21762*FLEN/8, x4, x1, x2) - -inst_7255: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ffc000; valaddr_reg:x3; val_offset:21765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21765*FLEN/8, x4, x1, x2) - -inst_7256: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ffe000; valaddr_reg:x3; val_offset:21768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21768*FLEN/8, x4, x1, x2) - -inst_7257: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fff000; valaddr_reg:x3; val_offset:21771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21771*FLEN/8, x4, x1, x2) - -inst_7258: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fff800; valaddr_reg:x3; val_offset:21774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21774*FLEN/8, x4, x1, x2) - -inst_7259: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fffc00; valaddr_reg:x3; val_offset:21777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21777*FLEN/8, x4, x1, x2) - -inst_7260: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fffe00; valaddr_reg:x3; val_offset:21780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21780*FLEN/8, x4, x1, x2) - -inst_7261: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ffff00; valaddr_reg:x3; val_offset:21783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21783*FLEN/8, x4, x1, x2) - -inst_7262: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ffff80; valaddr_reg:x3; val_offset:21786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21786*FLEN/8, x4, x1, x2) - -inst_7263: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ffffc0; valaddr_reg:x3; val_offset:21789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21789*FLEN/8, x4, x1, x2) - -inst_7264: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ffffe0; valaddr_reg:x3; val_offset:21792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21792*FLEN/8, x4, x1, x2) - -inst_7265: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fffff0; valaddr_reg:x3; val_offset:21795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21795*FLEN/8, x4, x1, x2) - -inst_7266: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fffff8; valaddr_reg:x3; val_offset:21798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21798*FLEN/8, x4, x1, x2) - -inst_7267: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fffffc; valaddr_reg:x3; val_offset:21801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21801*FLEN/8, x4, x1, x2) - -inst_7268: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63fffffe; valaddr_reg:x3; val_offset:21804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21804*FLEN/8, x4, x1, x2) - -inst_7269: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x63ffffff; valaddr_reg:x3; val_offset:21807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21807*FLEN/8, x4, x1, x2) - -inst_7270: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f000001; valaddr_reg:x3; val_offset:21810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21810*FLEN/8, x4, x1, x2) - -inst_7271: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f000003; valaddr_reg:x3; val_offset:21813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21813*FLEN/8, x4, x1, x2) - -inst_7272: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f000007; valaddr_reg:x3; val_offset:21816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21816*FLEN/8, x4, x1, x2) - -inst_7273: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f199999; valaddr_reg:x3; val_offset:21819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21819*FLEN/8, x4, x1, x2) - -inst_7274: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f249249; valaddr_reg:x3; val_offset:21822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21822*FLEN/8, x4, x1, x2) - -inst_7275: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f333333; valaddr_reg:x3; val_offset:21825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21825*FLEN/8, x4, x1, x2) - -inst_7276: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:21828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21828*FLEN/8, x4, x1, x2) - -inst_7277: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:21831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21831*FLEN/8, x4, x1, x2) - -inst_7278: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f444444; valaddr_reg:x3; val_offset:21834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21834*FLEN/8, x4, x1, x2) - -inst_7279: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:21837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21837*FLEN/8, x4, x1, x2) - -inst_7280: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:21840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21840*FLEN/8, x4, x1, x2) - -inst_7281: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f666666; valaddr_reg:x3; val_offset:21843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21843*FLEN/8, x4, x1, x2) - -inst_7282: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:21846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21846*FLEN/8, x4, x1, x2) - -inst_7283: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:21849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21849*FLEN/8, x4, x1, x2) - -inst_7284: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:21852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21852*FLEN/8, x4, x1, x2) - -inst_7285: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:21855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21855*FLEN/8, x4, x1, x2) - -inst_7286: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbf800001; valaddr_reg:x3; val_offset:21858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21858*FLEN/8, x4, x1, x2) - -inst_7287: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbf800003; valaddr_reg:x3; val_offset:21861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21861*FLEN/8, x4, x1, x2) - -inst_7288: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbf800007; valaddr_reg:x3; val_offset:21864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21864*FLEN/8, x4, x1, x2) - -inst_7289: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbf999999; valaddr_reg:x3; val_offset:21867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21867*FLEN/8, x4, x1, x2) - -inst_7290: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:21870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21870*FLEN/8, x4, x1, x2) - -inst_7291: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:21873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21873*FLEN/8, x4, x1, x2) - -inst_7292: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:21876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21876*FLEN/8, x4, x1, x2) - -inst_7293: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:21879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21879*FLEN/8, x4, x1, x2) - -inst_7294: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:21882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21882*FLEN/8, x4, x1, x2) - -inst_7295: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:21885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21885*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_58) - -inst_7296: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:21888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21888*FLEN/8, x4, x1, x2) - -inst_7297: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:21891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21891*FLEN/8, x4, x1, x2) - -inst_7298: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:21894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21894*FLEN/8, x4, x1, x2) - -inst_7299: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:21897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21897*FLEN/8, x4, x1, x2) - -inst_7300: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:21900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21900*FLEN/8, x4, x1, x2) - -inst_7301: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:21903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21903*FLEN/8, x4, x1, x2) - -inst_7302: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb000000; valaddr_reg:x3; val_offset:21906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21906*FLEN/8, x4, x1, x2) - -inst_7303: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb000001; valaddr_reg:x3; val_offset:21909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21909*FLEN/8, x4, x1, x2) - -inst_7304: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb000003; valaddr_reg:x3; val_offset:21912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21912*FLEN/8, x4, x1, x2) - -inst_7305: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb000007; valaddr_reg:x3; val_offset:21915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21915*FLEN/8, x4, x1, x2) - -inst_7306: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb00000f; valaddr_reg:x3; val_offset:21918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21918*FLEN/8, x4, x1, x2) - -inst_7307: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb00001f; valaddr_reg:x3; val_offset:21921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21921*FLEN/8, x4, x1, x2) - -inst_7308: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb00003f; valaddr_reg:x3; val_offset:21924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21924*FLEN/8, x4, x1, x2) - -inst_7309: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb00007f; valaddr_reg:x3; val_offset:21927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21927*FLEN/8, x4, x1, x2) - -inst_7310: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb0000ff; valaddr_reg:x3; val_offset:21930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21930*FLEN/8, x4, x1, x2) - -inst_7311: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb0001ff; valaddr_reg:x3; val_offset:21933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21933*FLEN/8, x4, x1, x2) - -inst_7312: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb0003ff; valaddr_reg:x3; val_offset:21936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21936*FLEN/8, x4, x1, x2) - -inst_7313: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb0007ff; valaddr_reg:x3; val_offset:21939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21939*FLEN/8, x4, x1, x2) - -inst_7314: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb000fff; valaddr_reg:x3; val_offset:21942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21942*FLEN/8, x4, x1, x2) - -inst_7315: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb001fff; valaddr_reg:x3; val_offset:21945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21945*FLEN/8, x4, x1, x2) - -inst_7316: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb003fff; valaddr_reg:x3; val_offset:21948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21948*FLEN/8, x4, x1, x2) - -inst_7317: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb007fff; valaddr_reg:x3; val_offset:21951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21951*FLEN/8, x4, x1, x2) - -inst_7318: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb00ffff; valaddr_reg:x3; val_offset:21954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21954*FLEN/8, x4, x1, x2) - -inst_7319: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb01ffff; valaddr_reg:x3; val_offset:21957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21957*FLEN/8, x4, x1, x2) - -inst_7320: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb03ffff; valaddr_reg:x3; val_offset:21960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21960*FLEN/8, x4, x1, x2) - -inst_7321: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb07ffff; valaddr_reg:x3; val_offset:21963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21963*FLEN/8, x4, x1, x2) - -inst_7322: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb0fffff; valaddr_reg:x3; val_offset:21966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21966*FLEN/8, x4, x1, x2) - -inst_7323: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb1fffff; valaddr_reg:x3; val_offset:21969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21969*FLEN/8, x4, x1, x2) - -inst_7324: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb3fffff; valaddr_reg:x3; val_offset:21972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21972*FLEN/8, x4, x1, x2) - -inst_7325: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb400000; valaddr_reg:x3; val_offset:21975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21975*FLEN/8, x4, x1, x2) - -inst_7326: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb600000; valaddr_reg:x3; val_offset:21978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21978*FLEN/8, x4, x1, x2) - -inst_7327: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb700000; valaddr_reg:x3; val_offset:21981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21981*FLEN/8, x4, x1, x2) - -inst_7328: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb780000; valaddr_reg:x3; val_offset:21984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21984*FLEN/8, x4, x1, x2) - -inst_7329: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7c0000; valaddr_reg:x3; val_offset:21987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21987*FLEN/8, x4, x1, x2) - -inst_7330: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7e0000; valaddr_reg:x3; val_offset:21990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21990*FLEN/8, x4, x1, x2) - -inst_7331: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7f0000; valaddr_reg:x3; val_offset:21993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21993*FLEN/8, x4, x1, x2) - -inst_7332: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7f8000; valaddr_reg:x3; val_offset:21996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21996*FLEN/8, x4, x1, x2) - -inst_7333: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7fc000; valaddr_reg:x3; val_offset:21999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21999*FLEN/8, x4, x1, x2) - -inst_7334: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7fe000; valaddr_reg:x3; val_offset:22002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22002*FLEN/8, x4, x1, x2) - -inst_7335: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7ff000; valaddr_reg:x3; val_offset:22005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22005*FLEN/8, x4, x1, x2) - -inst_7336: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7ff800; valaddr_reg:x3; val_offset:22008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22008*FLEN/8, x4, x1, x2) - -inst_7337: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7ffc00; valaddr_reg:x3; val_offset:22011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22011*FLEN/8, x4, x1, x2) - -inst_7338: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7ffe00; valaddr_reg:x3; val_offset:22014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22014*FLEN/8, x4, x1, x2) - -inst_7339: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7fff00; valaddr_reg:x3; val_offset:22017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22017*FLEN/8, x4, x1, x2) - -inst_7340: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7fff80; valaddr_reg:x3; val_offset:22020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22020*FLEN/8, x4, x1, x2) - -inst_7341: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7fffc0; valaddr_reg:x3; val_offset:22023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22023*FLEN/8, x4, x1, x2) - -inst_7342: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7fffe0; valaddr_reg:x3; val_offset:22026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22026*FLEN/8, x4, x1, x2) - -inst_7343: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7ffff0; valaddr_reg:x3; val_offset:22029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22029*FLEN/8, x4, x1, x2) - -inst_7344: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7ffff8; valaddr_reg:x3; val_offset:22032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22032*FLEN/8, x4, x1, x2) - -inst_7345: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7ffffc; valaddr_reg:x3; val_offset:22035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22035*FLEN/8, x4, x1, x2) - -inst_7346: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7ffffe; valaddr_reg:x3; val_offset:22038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22038*FLEN/8, x4, x1, x2) - -inst_7347: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; -op3val:0xcb7fffff; valaddr_reg:x3; val_offset:22041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22041*FLEN/8, x4, x1, x2) - -inst_7348: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:22044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22044*FLEN/8, x4, x1, x2) - -inst_7349: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:22047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22047*FLEN/8, x4, x1, x2) - -inst_7350: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:22050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22050*FLEN/8, x4, x1, x2) - -inst_7351: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:22053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22053*FLEN/8, x4, x1, x2) - -inst_7352: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:22056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22056*FLEN/8, x4, x1, x2) - -inst_7353: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:22059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22059*FLEN/8, x4, x1, x2) - -inst_7354: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:22062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22062*FLEN/8, x4, x1, x2) - -inst_7355: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:22065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22065*FLEN/8, x4, x1, x2) - -inst_7356: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:22068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22068*FLEN/8, x4, x1, x2) - -inst_7357: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:22071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22071*FLEN/8, x4, x1, x2) - -inst_7358: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:22074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22074*FLEN/8, x4, x1, x2) - -inst_7359: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:22077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22077*FLEN/8, x4, x1, x2) - -inst_7360: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:22080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22080*FLEN/8, x4, x1, x2) - -inst_7361: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:22083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22083*FLEN/8, x4, x1, x2) - -inst_7362: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:22086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22086*FLEN/8, x4, x1, x2) - -inst_7363: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:22089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22089*FLEN/8, x4, x1, x2) - -inst_7364: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3800000; valaddr_reg:x3; val_offset:22092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22092*FLEN/8, x4, x1, x2) - -inst_7365: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3800001; valaddr_reg:x3; val_offset:22095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22095*FLEN/8, x4, x1, x2) - -inst_7366: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3800003; valaddr_reg:x3; val_offset:22098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22098*FLEN/8, x4, x1, x2) - -inst_7367: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3800007; valaddr_reg:x3; val_offset:22101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22101*FLEN/8, x4, x1, x2) - -inst_7368: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x380000f; valaddr_reg:x3; val_offset:22104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22104*FLEN/8, x4, x1, x2) - -inst_7369: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x380001f; valaddr_reg:x3; val_offset:22107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22107*FLEN/8, x4, x1, x2) - -inst_7370: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x380003f; valaddr_reg:x3; val_offset:22110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22110*FLEN/8, x4, x1, x2) - -inst_7371: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x380007f; valaddr_reg:x3; val_offset:22113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22113*FLEN/8, x4, x1, x2) - -inst_7372: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x38000ff; valaddr_reg:x3; val_offset:22116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22116*FLEN/8, x4, x1, x2) - -inst_7373: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x38001ff; valaddr_reg:x3; val_offset:22119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22119*FLEN/8, x4, x1, x2) - -inst_7374: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x38003ff; valaddr_reg:x3; val_offset:22122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22122*FLEN/8, x4, x1, x2) - -inst_7375: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x38007ff; valaddr_reg:x3; val_offset:22125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22125*FLEN/8, x4, x1, x2) - -inst_7376: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3800fff; valaddr_reg:x3; val_offset:22128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22128*FLEN/8, x4, x1, x2) - -inst_7377: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3801fff; valaddr_reg:x3; val_offset:22131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22131*FLEN/8, x4, x1, x2) - -inst_7378: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3803fff; valaddr_reg:x3; val_offset:22134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22134*FLEN/8, x4, x1, x2) - -inst_7379: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3807fff; valaddr_reg:x3; val_offset:22137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22137*FLEN/8, x4, x1, x2) - -inst_7380: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x380ffff; valaddr_reg:x3; val_offset:22140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22140*FLEN/8, x4, x1, x2) - -inst_7381: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x381ffff; valaddr_reg:x3; val_offset:22143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22143*FLEN/8, x4, x1, x2) - -inst_7382: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x383ffff; valaddr_reg:x3; val_offset:22146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22146*FLEN/8, x4, x1, x2) - -inst_7383: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x387ffff; valaddr_reg:x3; val_offset:22149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22149*FLEN/8, x4, x1, x2) - -inst_7384: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x38fffff; valaddr_reg:x3; val_offset:22152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22152*FLEN/8, x4, x1, x2) - -inst_7385: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x39fffff; valaddr_reg:x3; val_offset:22155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22155*FLEN/8, x4, x1, x2) - -inst_7386: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3bfffff; valaddr_reg:x3; val_offset:22158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22158*FLEN/8, x4, x1, x2) - -inst_7387: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3c00000; valaddr_reg:x3; val_offset:22161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22161*FLEN/8, x4, x1, x2) - -inst_7388: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3e00000; valaddr_reg:x3; val_offset:22164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22164*FLEN/8, x4, x1, x2) - -inst_7389: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3f00000; valaddr_reg:x3; val_offset:22167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22167*FLEN/8, x4, x1, x2) - -inst_7390: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3f80000; valaddr_reg:x3; val_offset:22170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22170*FLEN/8, x4, x1, x2) - -inst_7391: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fc0000; valaddr_reg:x3; val_offset:22173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22173*FLEN/8, x4, x1, x2) - -inst_7392: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fe0000; valaddr_reg:x3; val_offset:22176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22176*FLEN/8, x4, x1, x2) - -inst_7393: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ff0000; valaddr_reg:x3; val_offset:22179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22179*FLEN/8, x4, x1, x2) - -inst_7394: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ff8000; valaddr_reg:x3; val_offset:22182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22182*FLEN/8, x4, x1, x2) - -inst_7395: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ffc000; valaddr_reg:x3; val_offset:22185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22185*FLEN/8, x4, x1, x2) - -inst_7396: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ffe000; valaddr_reg:x3; val_offset:22188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22188*FLEN/8, x4, x1, x2) - -inst_7397: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fff000; valaddr_reg:x3; val_offset:22191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22191*FLEN/8, x4, x1, x2) - -inst_7398: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fff800; valaddr_reg:x3; val_offset:22194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22194*FLEN/8, x4, x1, x2) - -inst_7399: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fffc00; valaddr_reg:x3; val_offset:22197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22197*FLEN/8, x4, x1, x2) - -inst_7400: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fffe00; valaddr_reg:x3; val_offset:22200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22200*FLEN/8, x4, x1, x2) - -inst_7401: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ffff00; valaddr_reg:x3; val_offset:22203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22203*FLEN/8, x4, x1, x2) - -inst_7402: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ffff80; valaddr_reg:x3; val_offset:22206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22206*FLEN/8, x4, x1, x2) - -inst_7403: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ffffc0; valaddr_reg:x3; val_offset:22209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22209*FLEN/8, x4, x1, x2) - -inst_7404: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ffffe0; valaddr_reg:x3; val_offset:22212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22212*FLEN/8, x4, x1, x2) - -inst_7405: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fffff0; valaddr_reg:x3; val_offset:22215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22215*FLEN/8, x4, x1, x2) - -inst_7406: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fffff8; valaddr_reg:x3; val_offset:22218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22218*FLEN/8, x4, x1, x2) - -inst_7407: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fffffc; valaddr_reg:x3; val_offset:22221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22221*FLEN/8, x4, x1, x2) - -inst_7408: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3fffffe; valaddr_reg:x3; val_offset:22224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22224*FLEN/8, x4, x1, x2) - -inst_7409: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; -op3val:0x3ffffff; valaddr_reg:x3; val_offset:22227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22227*FLEN/8, x4, x1, x2) - -inst_7410: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc000000; valaddr_reg:x3; val_offset:22230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22230*FLEN/8, x4, x1, x2) - -inst_7411: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc000001; valaddr_reg:x3; val_offset:22233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22233*FLEN/8, x4, x1, x2) - -inst_7412: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc000003; valaddr_reg:x3; val_offset:22236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22236*FLEN/8, x4, x1, x2) - -inst_7413: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc000007; valaddr_reg:x3; val_offset:22239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22239*FLEN/8, x4, x1, x2) - -inst_7414: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc00000f; valaddr_reg:x3; val_offset:22242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22242*FLEN/8, x4, x1, x2) - -inst_7415: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc00001f; valaddr_reg:x3; val_offset:22245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22245*FLEN/8, x4, x1, x2) - -inst_7416: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc00003f; valaddr_reg:x3; val_offset:22248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22248*FLEN/8, x4, x1, x2) - -inst_7417: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc00007f; valaddr_reg:x3; val_offset:22251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22251*FLEN/8, x4, x1, x2) - -inst_7418: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc0000ff; valaddr_reg:x3; val_offset:22254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22254*FLEN/8, x4, x1, x2) - -inst_7419: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc0001ff; valaddr_reg:x3; val_offset:22257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22257*FLEN/8, x4, x1, x2) - -inst_7420: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc0003ff; valaddr_reg:x3; val_offset:22260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22260*FLEN/8, x4, x1, x2) - -inst_7421: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc0007ff; valaddr_reg:x3; val_offset:22263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22263*FLEN/8, x4, x1, x2) - -inst_7422: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc000fff; valaddr_reg:x3; val_offset:22266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22266*FLEN/8, x4, x1, x2) - -inst_7423: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc001fff; valaddr_reg:x3; val_offset:22269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22269*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_59) - -inst_7424: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc003fff; valaddr_reg:x3; val_offset:22272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22272*FLEN/8, x4, x1, x2) - -inst_7425: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc007fff; valaddr_reg:x3; val_offset:22275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22275*FLEN/8, x4, x1, x2) - -inst_7426: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc00ffff; valaddr_reg:x3; val_offset:22278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22278*FLEN/8, x4, x1, x2) - -inst_7427: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc01ffff; valaddr_reg:x3; val_offset:22281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22281*FLEN/8, x4, x1, x2) - -inst_7428: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc03ffff; valaddr_reg:x3; val_offset:22284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22284*FLEN/8, x4, x1, x2) - -inst_7429: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc07ffff; valaddr_reg:x3; val_offset:22287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22287*FLEN/8, x4, x1, x2) - -inst_7430: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc0fffff; valaddr_reg:x3; val_offset:22290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22290*FLEN/8, x4, x1, x2) - -inst_7431: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc1fffff; valaddr_reg:x3; val_offset:22293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22293*FLEN/8, x4, x1, x2) - -inst_7432: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc3fffff; valaddr_reg:x3; val_offset:22296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22296*FLEN/8, x4, x1, x2) - -inst_7433: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc400000; valaddr_reg:x3; val_offset:22299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22299*FLEN/8, x4, x1, x2) - -inst_7434: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc600000; valaddr_reg:x3; val_offset:22302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22302*FLEN/8, x4, x1, x2) - -inst_7435: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc700000; valaddr_reg:x3; val_offset:22305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22305*FLEN/8, x4, x1, x2) - -inst_7436: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc780000; valaddr_reg:x3; val_offset:22308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22308*FLEN/8, x4, x1, x2) - -inst_7437: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7c0000; valaddr_reg:x3; val_offset:22311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22311*FLEN/8, x4, x1, x2) - -inst_7438: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7e0000; valaddr_reg:x3; val_offset:22314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22314*FLEN/8, x4, x1, x2) - -inst_7439: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7f0000; valaddr_reg:x3; val_offset:22317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22317*FLEN/8, x4, x1, x2) - -inst_7440: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7f8000; valaddr_reg:x3; val_offset:22320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22320*FLEN/8, x4, x1, x2) - -inst_7441: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7fc000; valaddr_reg:x3; val_offset:22323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22323*FLEN/8, x4, x1, x2) - -inst_7442: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7fe000; valaddr_reg:x3; val_offset:22326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22326*FLEN/8, x4, x1, x2) - -inst_7443: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7ff000; valaddr_reg:x3; val_offset:22329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22329*FLEN/8, x4, x1, x2) - -inst_7444: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7ff800; valaddr_reg:x3; val_offset:22332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22332*FLEN/8, x4, x1, x2) - -inst_7445: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7ffc00; valaddr_reg:x3; val_offset:22335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22335*FLEN/8, x4, x1, x2) - -inst_7446: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7ffe00; valaddr_reg:x3; val_offset:22338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22338*FLEN/8, x4, x1, x2) - -inst_7447: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7fff00; valaddr_reg:x3; val_offset:22341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22341*FLEN/8, x4, x1, x2) - -inst_7448: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7fff80; valaddr_reg:x3; val_offset:22344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22344*FLEN/8, x4, x1, x2) - -inst_7449: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7fffc0; valaddr_reg:x3; val_offset:22347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22347*FLEN/8, x4, x1, x2) - -inst_7450: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7fffe0; valaddr_reg:x3; val_offset:22350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22350*FLEN/8, x4, x1, x2) - -inst_7451: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7ffff0; valaddr_reg:x3; val_offset:22353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22353*FLEN/8, x4, x1, x2) - -inst_7452: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7ffff8; valaddr_reg:x3; val_offset:22356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22356*FLEN/8, x4, x1, x2) - -inst_7453: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7ffffc; valaddr_reg:x3; val_offset:22359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22359*FLEN/8, x4, x1, x2) - -inst_7454: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7ffffe; valaddr_reg:x3; val_offset:22362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22362*FLEN/8, x4, x1, x2) - -inst_7455: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbc7fffff; valaddr_reg:x3; val_offset:22365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22365*FLEN/8, x4, x1, x2) - -inst_7456: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbf800001; valaddr_reg:x3; val_offset:22368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22368*FLEN/8, x4, x1, x2) - -inst_7457: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbf800003; valaddr_reg:x3; val_offset:22371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22371*FLEN/8, x4, x1, x2) - -inst_7458: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbf800007; valaddr_reg:x3; val_offset:22374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22374*FLEN/8, x4, x1, x2) - -inst_7459: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbf999999; valaddr_reg:x3; val_offset:22377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22377*FLEN/8, x4, x1, x2) - -inst_7460: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:22380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22380*FLEN/8, x4, x1, x2) - -inst_7461: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:22383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22383*FLEN/8, x4, x1, x2) - -inst_7462: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:22386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22386*FLEN/8, x4, x1, x2) - -inst_7463: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:22389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22389*FLEN/8, x4, x1, x2) - -inst_7464: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:22392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22392*FLEN/8, x4, x1, x2) - -inst_7465: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:22395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22395*FLEN/8, x4, x1, x2) - -inst_7466: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:22398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22398*FLEN/8, x4, x1, x2) - -inst_7467: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:22401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22401*FLEN/8, x4, x1, x2) - -inst_7468: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:22404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22404*FLEN/8, x4, x1, x2) - -inst_7469: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:22407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22407*FLEN/8, x4, x1, x2) - -inst_7470: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:22410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22410*FLEN/8, x4, x1, x2) - -inst_7471: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:22413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22413*FLEN/8, x4, x1, x2) - -inst_7472: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76800000; valaddr_reg:x3; val_offset:22416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22416*FLEN/8, x4, x1, x2) - -inst_7473: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76800001; valaddr_reg:x3; val_offset:22419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22419*FLEN/8, x4, x1, x2) - -inst_7474: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76800003; valaddr_reg:x3; val_offset:22422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22422*FLEN/8, x4, x1, x2) - -inst_7475: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76800007; valaddr_reg:x3; val_offset:22425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22425*FLEN/8, x4, x1, x2) - -inst_7476: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7680000f; valaddr_reg:x3; val_offset:22428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22428*FLEN/8, x4, x1, x2) - -inst_7477: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7680001f; valaddr_reg:x3; val_offset:22431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22431*FLEN/8, x4, x1, x2) - -inst_7478: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7680003f; valaddr_reg:x3; val_offset:22434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22434*FLEN/8, x4, x1, x2) - -inst_7479: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7680007f; valaddr_reg:x3; val_offset:22437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22437*FLEN/8, x4, x1, x2) - -inst_7480: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x768000ff; valaddr_reg:x3; val_offset:22440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22440*FLEN/8, x4, x1, x2) - -inst_7481: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x768001ff; valaddr_reg:x3; val_offset:22443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22443*FLEN/8, x4, x1, x2) - -inst_7482: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x768003ff; valaddr_reg:x3; val_offset:22446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22446*FLEN/8, x4, x1, x2) - -inst_7483: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x768007ff; valaddr_reg:x3; val_offset:22449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22449*FLEN/8, x4, x1, x2) - -inst_7484: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76800fff; valaddr_reg:x3; val_offset:22452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22452*FLEN/8, x4, x1, x2) - -inst_7485: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76801fff; valaddr_reg:x3; val_offset:22455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22455*FLEN/8, x4, x1, x2) - -inst_7486: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76803fff; valaddr_reg:x3; val_offset:22458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22458*FLEN/8, x4, x1, x2) - -inst_7487: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76807fff; valaddr_reg:x3; val_offset:22461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22461*FLEN/8, x4, x1, x2) - -inst_7488: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7680ffff; valaddr_reg:x3; val_offset:22464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22464*FLEN/8, x4, x1, x2) - -inst_7489: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7681ffff; valaddr_reg:x3; val_offset:22467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22467*FLEN/8, x4, x1, x2) - -inst_7490: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7683ffff; valaddr_reg:x3; val_offset:22470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22470*FLEN/8, x4, x1, x2) - -inst_7491: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7687ffff; valaddr_reg:x3; val_offset:22473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22473*FLEN/8, x4, x1, x2) - -inst_7492: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x768fffff; valaddr_reg:x3; val_offset:22476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22476*FLEN/8, x4, x1, x2) - -inst_7493: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x769fffff; valaddr_reg:x3; val_offset:22479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22479*FLEN/8, x4, x1, x2) - -inst_7494: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76bfffff; valaddr_reg:x3; val_offset:22482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22482*FLEN/8, x4, x1, x2) - -inst_7495: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76c00000; valaddr_reg:x3; val_offset:22485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22485*FLEN/8, x4, x1, x2) - -inst_7496: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76e00000; valaddr_reg:x3; val_offset:22488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22488*FLEN/8, x4, x1, x2) - -inst_7497: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76f00000; valaddr_reg:x3; val_offset:22491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22491*FLEN/8, x4, x1, x2) - -inst_7498: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76f80000; valaddr_reg:x3; val_offset:22494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22494*FLEN/8, x4, x1, x2) - -inst_7499: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fc0000; valaddr_reg:x3; val_offset:22497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22497*FLEN/8, x4, x1, x2) - -inst_7500: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fe0000; valaddr_reg:x3; val_offset:22500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22500*FLEN/8, x4, x1, x2) - -inst_7501: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ff0000; valaddr_reg:x3; val_offset:22503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22503*FLEN/8, x4, x1, x2) - -inst_7502: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ff8000; valaddr_reg:x3; val_offset:22506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22506*FLEN/8, x4, x1, x2) - -inst_7503: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ffc000; valaddr_reg:x3; val_offset:22509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22509*FLEN/8, x4, x1, x2) - -inst_7504: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ffe000; valaddr_reg:x3; val_offset:22512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22512*FLEN/8, x4, x1, x2) - -inst_7505: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fff000; valaddr_reg:x3; val_offset:22515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22515*FLEN/8, x4, x1, x2) - -inst_7506: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fff800; valaddr_reg:x3; val_offset:22518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22518*FLEN/8, x4, x1, x2) - -inst_7507: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fffc00; valaddr_reg:x3; val_offset:22521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22521*FLEN/8, x4, x1, x2) - -inst_7508: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fffe00; valaddr_reg:x3; val_offset:22524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22524*FLEN/8, x4, x1, x2) - -inst_7509: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ffff00; valaddr_reg:x3; val_offset:22527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22527*FLEN/8, x4, x1, x2) - -inst_7510: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ffff80; valaddr_reg:x3; val_offset:22530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22530*FLEN/8, x4, x1, x2) - -inst_7511: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ffffc0; valaddr_reg:x3; val_offset:22533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22533*FLEN/8, x4, x1, x2) - -inst_7512: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ffffe0; valaddr_reg:x3; val_offset:22536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22536*FLEN/8, x4, x1, x2) - -inst_7513: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fffff0; valaddr_reg:x3; val_offset:22539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22539*FLEN/8, x4, x1, x2) - -inst_7514: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fffff8; valaddr_reg:x3; val_offset:22542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22542*FLEN/8, x4, x1, x2) - -inst_7515: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fffffc; valaddr_reg:x3; val_offset:22545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22545*FLEN/8, x4, x1, x2) - -inst_7516: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76fffffe; valaddr_reg:x3; val_offset:22548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22548*FLEN/8, x4, x1, x2) - -inst_7517: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x76ffffff; valaddr_reg:x3; val_offset:22551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22551*FLEN/8, x4, x1, x2) - -inst_7518: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f000001; valaddr_reg:x3; val_offset:22554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22554*FLEN/8, x4, x1, x2) - -inst_7519: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f000003; valaddr_reg:x3; val_offset:22557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22557*FLEN/8, x4, x1, x2) - -inst_7520: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f000007; valaddr_reg:x3; val_offset:22560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22560*FLEN/8, x4, x1, x2) - -inst_7521: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f199999; valaddr_reg:x3; val_offset:22563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22563*FLEN/8, x4, x1, x2) - -inst_7522: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f249249; valaddr_reg:x3; val_offset:22566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22566*FLEN/8, x4, x1, x2) - -inst_7523: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f333333; valaddr_reg:x3; val_offset:22569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22569*FLEN/8, x4, x1, x2) - -inst_7524: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:22572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22572*FLEN/8, x4, x1, x2) - -inst_7525: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:22575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22575*FLEN/8, x4, x1, x2) - -inst_7526: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f444444; valaddr_reg:x3; val_offset:22578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22578*FLEN/8, x4, x1, x2) - -inst_7527: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:22581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22581*FLEN/8, x4, x1, x2) - -inst_7528: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:22584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22584*FLEN/8, x4, x1, x2) - -inst_7529: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f666666; valaddr_reg:x3; val_offset:22587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22587*FLEN/8, x4, x1, x2) - -inst_7530: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:22590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22590*FLEN/8, x4, x1, x2) - -inst_7531: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:22593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22593*FLEN/8, x4, x1, x2) - -inst_7532: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:22596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22596*FLEN/8, x4, x1, x2) - -inst_7533: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:22599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22599*FLEN/8, x4, x1, x2) - -inst_7534: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35000000; valaddr_reg:x3; val_offset:22602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22602*FLEN/8, x4, x1, x2) - -inst_7535: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35000001; valaddr_reg:x3; val_offset:22605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22605*FLEN/8, x4, x1, x2) - -inst_7536: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35000003; valaddr_reg:x3; val_offset:22608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22608*FLEN/8, x4, x1, x2) - -inst_7537: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35000007; valaddr_reg:x3; val_offset:22611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22611*FLEN/8, x4, x1, x2) - -inst_7538: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3500000f; valaddr_reg:x3; val_offset:22614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22614*FLEN/8, x4, x1, x2) - -inst_7539: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3500001f; valaddr_reg:x3; val_offset:22617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22617*FLEN/8, x4, x1, x2) - -inst_7540: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3500003f; valaddr_reg:x3; val_offset:22620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22620*FLEN/8, x4, x1, x2) - -inst_7541: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3500007f; valaddr_reg:x3; val_offset:22623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22623*FLEN/8, x4, x1, x2) - -inst_7542: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x350000ff; valaddr_reg:x3; val_offset:22626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22626*FLEN/8, x4, x1, x2) - -inst_7543: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x350001ff; valaddr_reg:x3; val_offset:22629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22629*FLEN/8, x4, x1, x2) - -inst_7544: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x350003ff; valaddr_reg:x3; val_offset:22632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22632*FLEN/8, x4, x1, x2) - -inst_7545: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x350007ff; valaddr_reg:x3; val_offset:22635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22635*FLEN/8, x4, x1, x2) - -inst_7546: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35000fff; valaddr_reg:x3; val_offset:22638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22638*FLEN/8, x4, x1, x2) - -inst_7547: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35001fff; valaddr_reg:x3; val_offset:22641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22641*FLEN/8, x4, x1, x2) - -inst_7548: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35003fff; valaddr_reg:x3; val_offset:22644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22644*FLEN/8, x4, x1, x2) - -inst_7549: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35007fff; valaddr_reg:x3; val_offset:22647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22647*FLEN/8, x4, x1, x2) - -inst_7550: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3500ffff; valaddr_reg:x3; val_offset:22650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22650*FLEN/8, x4, x1, x2) - -inst_7551: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3501ffff; valaddr_reg:x3; val_offset:22653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22653*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_60) - -inst_7552: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3503ffff; valaddr_reg:x3; val_offset:22656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22656*FLEN/8, x4, x1, x2) - -inst_7553: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3507ffff; valaddr_reg:x3; val_offset:22659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22659*FLEN/8, x4, x1, x2) - -inst_7554: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x350fffff; valaddr_reg:x3; val_offset:22662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22662*FLEN/8, x4, x1, x2) - -inst_7555: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x351fffff; valaddr_reg:x3; val_offset:22665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22665*FLEN/8, x4, x1, x2) - -inst_7556: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x353fffff; valaddr_reg:x3; val_offset:22668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22668*FLEN/8, x4, x1, x2) - -inst_7557: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35400000; valaddr_reg:x3; val_offset:22671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22671*FLEN/8, x4, x1, x2) - -inst_7558: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35600000; valaddr_reg:x3; val_offset:22674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22674*FLEN/8, x4, x1, x2) - -inst_7559: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35700000; valaddr_reg:x3; val_offset:22677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22677*FLEN/8, x4, x1, x2) - -inst_7560: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x35780000; valaddr_reg:x3; val_offset:22680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22680*FLEN/8, x4, x1, x2) - -inst_7561: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357c0000; valaddr_reg:x3; val_offset:22683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22683*FLEN/8, x4, x1, x2) - -inst_7562: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357e0000; valaddr_reg:x3; val_offset:22686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22686*FLEN/8, x4, x1, x2) - -inst_7563: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357f0000; valaddr_reg:x3; val_offset:22689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22689*FLEN/8, x4, x1, x2) - -inst_7564: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357f8000; valaddr_reg:x3; val_offset:22692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22692*FLEN/8, x4, x1, x2) - -inst_7565: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357fc000; valaddr_reg:x3; val_offset:22695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22695*FLEN/8, x4, x1, x2) - -inst_7566: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357fe000; valaddr_reg:x3; val_offset:22698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22698*FLEN/8, x4, x1, x2) - -inst_7567: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357ff000; valaddr_reg:x3; val_offset:22701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22701*FLEN/8, x4, x1, x2) - -inst_7568: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357ff800; valaddr_reg:x3; val_offset:22704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22704*FLEN/8, x4, x1, x2) - -inst_7569: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357ffc00; valaddr_reg:x3; val_offset:22707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22707*FLEN/8, x4, x1, x2) - -inst_7570: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357ffe00; valaddr_reg:x3; val_offset:22710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22710*FLEN/8, x4, x1, x2) - -inst_7571: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357fff00; valaddr_reg:x3; val_offset:22713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22713*FLEN/8, x4, x1, x2) - -inst_7572: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357fff80; valaddr_reg:x3; val_offset:22716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22716*FLEN/8, x4, x1, x2) - -inst_7573: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357fffc0; valaddr_reg:x3; val_offset:22719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22719*FLEN/8, x4, x1, x2) - -inst_7574: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357fffe0; valaddr_reg:x3; val_offset:22722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22722*FLEN/8, x4, x1, x2) - -inst_7575: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357ffff0; valaddr_reg:x3; val_offset:22725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22725*FLEN/8, x4, x1, x2) - -inst_7576: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357ffff8; valaddr_reg:x3; val_offset:22728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22728*FLEN/8, x4, x1, x2) - -inst_7577: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357ffffc; valaddr_reg:x3; val_offset:22731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22731*FLEN/8, x4, x1, x2) - -inst_7578: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357ffffe; valaddr_reg:x3; val_offset:22734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22734*FLEN/8, x4, x1, x2) - -inst_7579: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x357fffff; valaddr_reg:x3; val_offset:22737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22737*FLEN/8, x4, x1, x2) - -inst_7580: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3f800001; valaddr_reg:x3; val_offset:22740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22740*FLEN/8, x4, x1, x2) - -inst_7581: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3f800003; valaddr_reg:x3; val_offset:22743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22743*FLEN/8, x4, x1, x2) - -inst_7582: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3f800007; valaddr_reg:x3; val_offset:22746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22746*FLEN/8, x4, x1, x2) - -inst_7583: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3f999999; valaddr_reg:x3; val_offset:22749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22749*FLEN/8, x4, x1, x2) - -inst_7584: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:22752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22752*FLEN/8, x4, x1, x2) - -inst_7585: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:22755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22755*FLEN/8, x4, x1, x2) - -inst_7586: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:22758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22758*FLEN/8, x4, x1, x2) - -inst_7587: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:22761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22761*FLEN/8, x4, x1, x2) - -inst_7588: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:22764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22764*FLEN/8, x4, x1, x2) - -inst_7589: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:22767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22767*FLEN/8, x4, x1, x2) - -inst_7590: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:22770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22770*FLEN/8, x4, x1, x2) - -inst_7591: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:22773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22773*FLEN/8, x4, x1, x2) - -inst_7592: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:22776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22776*FLEN/8, x4, x1, x2) - -inst_7593: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:22779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22779*FLEN/8, x4, x1, x2) - -inst_7594: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:22782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22782*FLEN/8, x4, x1, x2) - -inst_7595: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:22785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22785*FLEN/8, x4, x1, x2) - -inst_7596: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:22788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22788*FLEN/8, x4, x1, x2) - -inst_7597: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:22791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22791*FLEN/8, x4, x1, x2) - -inst_7598: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:22794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22794*FLEN/8, x4, x1, x2) - -inst_7599: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:22797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22797*FLEN/8, x4, x1, x2) - -inst_7600: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:22800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22800*FLEN/8, x4, x1, x2) - -inst_7601: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:22803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22803*FLEN/8, x4, x1, x2) - -inst_7602: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:22806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22806*FLEN/8, x4, x1, x2) - -inst_7603: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:22809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22809*FLEN/8, x4, x1, x2) - -inst_7604: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:22812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22812*FLEN/8, x4, x1, x2) - -inst_7605: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:22815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22815*FLEN/8, x4, x1, x2) - -inst_7606: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:22818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22818*FLEN/8, x4, x1, x2) - -inst_7607: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:22821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22821*FLEN/8, x4, x1, x2) - -inst_7608: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:22824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22824*FLEN/8, x4, x1, x2) - -inst_7609: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:22827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22827*FLEN/8, x4, x1, x2) - -inst_7610: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:22830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22830*FLEN/8, x4, x1, x2) - -inst_7611: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:22833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22833*FLEN/8, x4, x1, x2) - -inst_7612: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82000000; valaddr_reg:x3; val_offset:22836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22836*FLEN/8, x4, x1, x2) - -inst_7613: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82000001; valaddr_reg:x3; val_offset:22839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22839*FLEN/8, x4, x1, x2) - -inst_7614: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82000003; valaddr_reg:x3; val_offset:22842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22842*FLEN/8, x4, x1, x2) - -inst_7615: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82000007; valaddr_reg:x3; val_offset:22845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22845*FLEN/8, x4, x1, x2) - -inst_7616: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x8200000f; valaddr_reg:x3; val_offset:22848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22848*FLEN/8, x4, x1, x2) - -inst_7617: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x8200001f; valaddr_reg:x3; val_offset:22851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22851*FLEN/8, x4, x1, x2) - -inst_7618: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x8200003f; valaddr_reg:x3; val_offset:22854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22854*FLEN/8, x4, x1, x2) - -inst_7619: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x8200007f; valaddr_reg:x3; val_offset:22857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22857*FLEN/8, x4, x1, x2) - -inst_7620: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x820000ff; valaddr_reg:x3; val_offset:22860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22860*FLEN/8, x4, x1, x2) - -inst_7621: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x820001ff; valaddr_reg:x3; val_offset:22863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22863*FLEN/8, x4, x1, x2) - -inst_7622: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x820003ff; valaddr_reg:x3; val_offset:22866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22866*FLEN/8, x4, x1, x2) - -inst_7623: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x820007ff; valaddr_reg:x3; val_offset:22869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22869*FLEN/8, x4, x1, x2) - -inst_7624: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82000fff; valaddr_reg:x3; val_offset:22872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22872*FLEN/8, x4, x1, x2) - -inst_7625: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82001fff; valaddr_reg:x3; val_offset:22875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22875*FLEN/8, x4, x1, x2) - -inst_7626: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82003fff; valaddr_reg:x3; val_offset:22878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22878*FLEN/8, x4, x1, x2) - -inst_7627: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82007fff; valaddr_reg:x3; val_offset:22881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22881*FLEN/8, x4, x1, x2) - -inst_7628: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x8200ffff; valaddr_reg:x3; val_offset:22884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22884*FLEN/8, x4, x1, x2) - -inst_7629: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x8201ffff; valaddr_reg:x3; val_offset:22887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22887*FLEN/8, x4, x1, x2) - -inst_7630: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x8203ffff; valaddr_reg:x3; val_offset:22890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22890*FLEN/8, x4, x1, x2) - -inst_7631: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x8207ffff; valaddr_reg:x3; val_offset:22893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22893*FLEN/8, x4, x1, x2) - -inst_7632: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x820fffff; valaddr_reg:x3; val_offset:22896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22896*FLEN/8, x4, x1, x2) - -inst_7633: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x821fffff; valaddr_reg:x3; val_offset:22899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22899*FLEN/8, x4, x1, x2) - -inst_7634: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x823fffff; valaddr_reg:x3; val_offset:22902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22902*FLEN/8, x4, x1, x2) - -inst_7635: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82400000; valaddr_reg:x3; val_offset:22905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22905*FLEN/8, x4, x1, x2) - -inst_7636: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82600000; valaddr_reg:x3; val_offset:22908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22908*FLEN/8, x4, x1, x2) - -inst_7637: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82700000; valaddr_reg:x3; val_offset:22911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22911*FLEN/8, x4, x1, x2) - -inst_7638: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x82780000; valaddr_reg:x3; val_offset:22914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22914*FLEN/8, x4, x1, x2) - -inst_7639: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827c0000; valaddr_reg:x3; val_offset:22917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22917*FLEN/8, x4, x1, x2) - -inst_7640: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827e0000; valaddr_reg:x3; val_offset:22920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22920*FLEN/8, x4, x1, x2) - -inst_7641: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827f0000; valaddr_reg:x3; val_offset:22923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22923*FLEN/8, x4, x1, x2) - -inst_7642: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827f8000; valaddr_reg:x3; val_offset:22926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22926*FLEN/8, x4, x1, x2) - -inst_7643: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827fc000; valaddr_reg:x3; val_offset:22929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22929*FLEN/8, x4, x1, x2) - -inst_7644: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827fe000; valaddr_reg:x3; val_offset:22932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22932*FLEN/8, x4, x1, x2) - -inst_7645: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827ff000; valaddr_reg:x3; val_offset:22935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22935*FLEN/8, x4, x1, x2) - -inst_7646: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827ff800; valaddr_reg:x3; val_offset:22938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22938*FLEN/8, x4, x1, x2) - -inst_7647: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827ffc00; valaddr_reg:x3; val_offset:22941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22941*FLEN/8, x4, x1, x2) - -inst_7648: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827ffe00; valaddr_reg:x3; val_offset:22944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22944*FLEN/8, x4, x1, x2) - -inst_7649: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827fff00; valaddr_reg:x3; val_offset:22947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22947*FLEN/8, x4, x1, x2) - -inst_7650: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827fff80; valaddr_reg:x3; val_offset:22950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22950*FLEN/8, x4, x1, x2) - -inst_7651: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827fffc0; valaddr_reg:x3; val_offset:22953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22953*FLEN/8, x4, x1, x2) - -inst_7652: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827fffe0; valaddr_reg:x3; val_offset:22956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22956*FLEN/8, x4, x1, x2) - -inst_7653: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827ffff0; valaddr_reg:x3; val_offset:22959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22959*FLEN/8, x4, x1, x2) - -inst_7654: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827ffff8; valaddr_reg:x3; val_offset:22962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22962*FLEN/8, x4, x1, x2) - -inst_7655: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827ffffc; valaddr_reg:x3; val_offset:22965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22965*FLEN/8, x4, x1, x2) - -inst_7656: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827ffffe; valaddr_reg:x3; val_offset:22968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22968*FLEN/8, x4, x1, x2) - -inst_7657: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; -op3val:0x827fffff; valaddr_reg:x3; val_offset:22971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22971*FLEN/8, x4, x1, x2) - -inst_7658: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:22974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22974*FLEN/8, x4, x1, x2) - -inst_7659: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:22977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22977*FLEN/8, x4, x1, x2) - -inst_7660: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:22980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22980*FLEN/8, x4, x1, x2) - -inst_7661: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:22983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22983*FLEN/8, x4, x1, x2) - -inst_7662: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:22986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22986*FLEN/8, x4, x1, x2) - -inst_7663: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:22989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22989*FLEN/8, x4, x1, x2) - -inst_7664: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:22992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22992*FLEN/8, x4, x1, x2) - -inst_7665: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:22995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22995*FLEN/8, x4, x1, x2) - -inst_7666: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:22998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22998*FLEN/8, x4, x1, x2) - -inst_7667: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:23001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23001*FLEN/8, x4, x1, x2) - -inst_7668: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:23004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23004*FLEN/8, x4, x1, x2) - -inst_7669: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:23007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23007*FLEN/8, x4, x1, x2) - -inst_7670: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:23010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23010*FLEN/8, x4, x1, x2) - -inst_7671: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:23013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23013*FLEN/8, x4, x1, x2) - -inst_7672: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:23016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23016*FLEN/8, x4, x1, x2) - -inst_7673: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:23019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23019*FLEN/8, x4, x1, x2) - -inst_7674: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90000000; valaddr_reg:x3; val_offset:23022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23022*FLEN/8, x4, x1, x2) - -inst_7675: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90000001; valaddr_reg:x3; val_offset:23025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23025*FLEN/8, x4, x1, x2) - -inst_7676: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90000003; valaddr_reg:x3; val_offset:23028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23028*FLEN/8, x4, x1, x2) - -inst_7677: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90000007; valaddr_reg:x3; val_offset:23031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23031*FLEN/8, x4, x1, x2) - -inst_7678: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x9000000f; valaddr_reg:x3; val_offset:23034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23034*FLEN/8, x4, x1, x2) - -inst_7679: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x9000001f; valaddr_reg:x3; val_offset:23037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23037*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_61) - -inst_7680: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x9000003f; valaddr_reg:x3; val_offset:23040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23040*FLEN/8, x4, x1, x2) - -inst_7681: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x9000007f; valaddr_reg:x3; val_offset:23043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23043*FLEN/8, x4, x1, x2) - -inst_7682: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x900000ff; valaddr_reg:x3; val_offset:23046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23046*FLEN/8, x4, x1, x2) - -inst_7683: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x900001ff; valaddr_reg:x3; val_offset:23049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23049*FLEN/8, x4, x1, x2) - -inst_7684: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x900003ff; valaddr_reg:x3; val_offset:23052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23052*FLEN/8, x4, x1, x2) - -inst_7685: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x900007ff; valaddr_reg:x3; val_offset:23055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23055*FLEN/8, x4, x1, x2) - -inst_7686: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90000fff; valaddr_reg:x3; val_offset:23058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23058*FLEN/8, x4, x1, x2) - -inst_7687: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90001fff; valaddr_reg:x3; val_offset:23061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23061*FLEN/8, x4, x1, x2) - -inst_7688: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90003fff; valaddr_reg:x3; val_offset:23064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23064*FLEN/8, x4, x1, x2) - -inst_7689: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90007fff; valaddr_reg:x3; val_offset:23067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23067*FLEN/8, x4, x1, x2) - -inst_7690: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x9000ffff; valaddr_reg:x3; val_offset:23070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23070*FLEN/8, x4, x1, x2) - -inst_7691: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x9001ffff; valaddr_reg:x3; val_offset:23073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23073*FLEN/8, x4, x1, x2) - -inst_7692: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x9003ffff; valaddr_reg:x3; val_offset:23076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23076*FLEN/8, x4, x1, x2) - -inst_7693: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x9007ffff; valaddr_reg:x3; val_offset:23079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23079*FLEN/8, x4, x1, x2) - -inst_7694: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x900fffff; valaddr_reg:x3; val_offset:23082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23082*FLEN/8, x4, x1, x2) - -inst_7695: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x901fffff; valaddr_reg:x3; val_offset:23085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23085*FLEN/8, x4, x1, x2) - -inst_7696: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x903fffff; valaddr_reg:x3; val_offset:23088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23088*FLEN/8, x4, x1, x2) - -inst_7697: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90400000; valaddr_reg:x3; val_offset:23091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23091*FLEN/8, x4, x1, x2) - -inst_7698: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90600000; valaddr_reg:x3; val_offset:23094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23094*FLEN/8, x4, x1, x2) - -inst_7699: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90700000; valaddr_reg:x3; val_offset:23097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23097*FLEN/8, x4, x1, x2) - -inst_7700: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x90780000; valaddr_reg:x3; val_offset:23100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23100*FLEN/8, x4, x1, x2) - -inst_7701: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907c0000; valaddr_reg:x3; val_offset:23103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23103*FLEN/8, x4, x1, x2) - -inst_7702: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907e0000; valaddr_reg:x3; val_offset:23106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23106*FLEN/8, x4, x1, x2) - -inst_7703: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907f0000; valaddr_reg:x3; val_offset:23109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23109*FLEN/8, x4, x1, x2) - -inst_7704: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907f8000; valaddr_reg:x3; val_offset:23112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23112*FLEN/8, x4, x1, x2) - -inst_7705: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907fc000; valaddr_reg:x3; val_offset:23115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23115*FLEN/8, x4, x1, x2) - -inst_7706: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907fe000; valaddr_reg:x3; val_offset:23118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23118*FLEN/8, x4, x1, x2) - -inst_7707: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907ff000; valaddr_reg:x3; val_offset:23121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23121*FLEN/8, x4, x1, x2) - -inst_7708: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907ff800; valaddr_reg:x3; val_offset:23124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23124*FLEN/8, x4, x1, x2) - -inst_7709: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907ffc00; valaddr_reg:x3; val_offset:23127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23127*FLEN/8, x4, x1, x2) - -inst_7710: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907ffe00; valaddr_reg:x3; val_offset:23130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23130*FLEN/8, x4, x1, x2) - -inst_7711: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907fff00; valaddr_reg:x3; val_offset:23133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23133*FLEN/8, x4, x1, x2) - -inst_7712: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907fff80; valaddr_reg:x3; val_offset:23136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23136*FLEN/8, x4, x1, x2) - -inst_7713: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907fffc0; valaddr_reg:x3; val_offset:23139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23139*FLEN/8, x4, x1, x2) - -inst_7714: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907fffe0; valaddr_reg:x3; val_offset:23142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23142*FLEN/8, x4, x1, x2) - -inst_7715: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907ffff0; valaddr_reg:x3; val_offset:23145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23145*FLEN/8, x4, x1, x2) - -inst_7716: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907ffff8; valaddr_reg:x3; val_offset:23148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23148*FLEN/8, x4, x1, x2) - -inst_7717: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907ffffc; valaddr_reg:x3; val_offset:23151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23151*FLEN/8, x4, x1, x2) - -inst_7718: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907ffffe; valaddr_reg:x3; val_offset:23154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23154*FLEN/8, x4, x1, x2) - -inst_7719: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; -op3val:0x907fffff; valaddr_reg:x3; val_offset:23157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23157*FLEN/8, x4, x1, x2) - -inst_7720: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c800000; valaddr_reg:x3; val_offset:23160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23160*FLEN/8, x4, x1, x2) - -inst_7721: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c800001; valaddr_reg:x3; val_offset:23163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23163*FLEN/8, x4, x1, x2) - -inst_7722: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c800003; valaddr_reg:x3; val_offset:23166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23166*FLEN/8, x4, x1, x2) - -inst_7723: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c800007; valaddr_reg:x3; val_offset:23169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23169*FLEN/8, x4, x1, x2) - -inst_7724: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c80000f; valaddr_reg:x3; val_offset:23172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23172*FLEN/8, x4, x1, x2) - -inst_7725: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c80001f; valaddr_reg:x3; val_offset:23175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23175*FLEN/8, x4, x1, x2) - -inst_7726: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c80003f; valaddr_reg:x3; val_offset:23178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23178*FLEN/8, x4, x1, x2) - -inst_7727: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c80007f; valaddr_reg:x3; val_offset:23181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23181*FLEN/8, x4, x1, x2) - -inst_7728: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c8000ff; valaddr_reg:x3; val_offset:23184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23184*FLEN/8, x4, x1, x2) - -inst_7729: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c8001ff; valaddr_reg:x3; val_offset:23187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23187*FLEN/8, x4, x1, x2) - -inst_7730: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c8003ff; valaddr_reg:x3; val_offset:23190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23190*FLEN/8, x4, x1, x2) - -inst_7731: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c8007ff; valaddr_reg:x3; val_offset:23193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23193*FLEN/8, x4, x1, x2) - -inst_7732: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c800fff; valaddr_reg:x3; val_offset:23196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23196*FLEN/8, x4, x1, x2) - -inst_7733: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c801fff; valaddr_reg:x3; val_offset:23199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23199*FLEN/8, x4, x1, x2) - -inst_7734: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c803fff; valaddr_reg:x3; val_offset:23202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23202*FLEN/8, x4, x1, x2) - -inst_7735: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c807fff; valaddr_reg:x3; val_offset:23205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23205*FLEN/8, x4, x1, x2) - -inst_7736: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c80ffff; valaddr_reg:x3; val_offset:23208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23208*FLEN/8, x4, x1, x2) - -inst_7737: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c81ffff; valaddr_reg:x3; val_offset:23211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23211*FLEN/8, x4, x1, x2) - -inst_7738: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c83ffff; valaddr_reg:x3; val_offset:23214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23214*FLEN/8, x4, x1, x2) - -inst_7739: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c87ffff; valaddr_reg:x3; val_offset:23217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23217*FLEN/8, x4, x1, x2) - -inst_7740: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c8fffff; valaddr_reg:x3; val_offset:23220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23220*FLEN/8, x4, x1, x2) - -inst_7741: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2c9fffff; valaddr_reg:x3; val_offset:23223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23223*FLEN/8, x4, x1, x2) - -inst_7742: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cbfffff; valaddr_reg:x3; val_offset:23226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23226*FLEN/8, x4, x1, x2) - -inst_7743: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cc00000; valaddr_reg:x3; val_offset:23229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23229*FLEN/8, x4, x1, x2) - -inst_7744: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2ce00000; valaddr_reg:x3; val_offset:23232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23232*FLEN/8, x4, x1, x2) - -inst_7745: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cf00000; valaddr_reg:x3; val_offset:23235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23235*FLEN/8, x4, x1, x2) - -inst_7746: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cf80000; valaddr_reg:x3; val_offset:23238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23238*FLEN/8, x4, x1, x2) - -inst_7747: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfc0000; valaddr_reg:x3; val_offset:23241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23241*FLEN/8, x4, x1, x2) - -inst_7748: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfe0000; valaddr_reg:x3; val_offset:23244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23244*FLEN/8, x4, x1, x2) - -inst_7749: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cff0000; valaddr_reg:x3; val_offset:23247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23247*FLEN/8, x4, x1, x2) - -inst_7750: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cff8000; valaddr_reg:x3; val_offset:23250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23250*FLEN/8, x4, x1, x2) - -inst_7751: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cffc000; valaddr_reg:x3; val_offset:23253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23253*FLEN/8, x4, x1, x2) - -inst_7752: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cffe000; valaddr_reg:x3; val_offset:23256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23256*FLEN/8, x4, x1, x2) - -inst_7753: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfff000; valaddr_reg:x3; val_offset:23259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23259*FLEN/8, x4, x1, x2) - -inst_7754: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfff800; valaddr_reg:x3; val_offset:23262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23262*FLEN/8, x4, x1, x2) - -inst_7755: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfffc00; valaddr_reg:x3; val_offset:23265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23265*FLEN/8, x4, x1, x2) - -inst_7756: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfffe00; valaddr_reg:x3; val_offset:23268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23268*FLEN/8, x4, x1, x2) - -inst_7757: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cffff00; valaddr_reg:x3; val_offset:23271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23271*FLEN/8, x4, x1, x2) - -inst_7758: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cffff80; valaddr_reg:x3; val_offset:23274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23274*FLEN/8, x4, x1, x2) - -inst_7759: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cffffc0; valaddr_reg:x3; val_offset:23277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23277*FLEN/8, x4, x1, x2) - -inst_7760: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cffffe0; valaddr_reg:x3; val_offset:23280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23280*FLEN/8, x4, x1, x2) - -inst_7761: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfffff0; valaddr_reg:x3; val_offset:23283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23283*FLEN/8, x4, x1, x2) - -inst_7762: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfffff8; valaddr_reg:x3; val_offset:23286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23286*FLEN/8, x4, x1, x2) - -inst_7763: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfffffc; valaddr_reg:x3; val_offset:23289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23289*FLEN/8, x4, x1, x2) - -inst_7764: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cfffffe; valaddr_reg:x3; val_offset:23292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23292*FLEN/8, x4, x1, x2) - -inst_7765: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x2cffffff; valaddr_reg:x3; val_offset:23295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23295*FLEN/8, x4, x1, x2) - -inst_7766: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3f800001; valaddr_reg:x3; val_offset:23298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23298*FLEN/8, x4, x1, x2) - -inst_7767: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3f800003; valaddr_reg:x3; val_offset:23301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23301*FLEN/8, x4, x1, x2) - -inst_7768: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3f800007; valaddr_reg:x3; val_offset:23304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23304*FLEN/8, x4, x1, x2) - -inst_7769: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3f999999; valaddr_reg:x3; val_offset:23307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23307*FLEN/8, x4, x1, x2) - -inst_7770: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:23310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23310*FLEN/8, x4, x1, x2) - -inst_7771: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:23313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23313*FLEN/8, x4, x1, x2) - -inst_7772: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:23316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23316*FLEN/8, x4, x1, x2) - -inst_7773: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:23319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23319*FLEN/8, x4, x1, x2) - -inst_7774: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:23322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23322*FLEN/8, x4, x1, x2) - -inst_7775: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:23325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23325*FLEN/8, x4, x1, x2) - -inst_7776: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:23328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23328*FLEN/8, x4, x1, x2) - -inst_7777: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:23331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23331*FLEN/8, x4, x1, x2) - -inst_7778: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:23334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23334*FLEN/8, x4, x1, x2) - -inst_7779: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:23337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23337*FLEN/8, x4, x1, x2) - -inst_7780: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:23340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23340*FLEN/8, x4, x1, x2) - -inst_7781: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:23343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23343*FLEN/8, x4, x1, x2) - -inst_7782: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9800000; valaddr_reg:x3; val_offset:23346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23346*FLEN/8, x4, x1, x2) - -inst_7783: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9800001; valaddr_reg:x3; val_offset:23349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23349*FLEN/8, x4, x1, x2) - -inst_7784: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9800003; valaddr_reg:x3; val_offset:23352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23352*FLEN/8, x4, x1, x2) - -inst_7785: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9800007; valaddr_reg:x3; val_offset:23355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23355*FLEN/8, x4, x1, x2) - -inst_7786: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb980000f; valaddr_reg:x3; val_offset:23358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23358*FLEN/8, x4, x1, x2) - -inst_7787: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb980001f; valaddr_reg:x3; val_offset:23361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23361*FLEN/8, x4, x1, x2) - -inst_7788: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb980003f; valaddr_reg:x3; val_offset:23364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23364*FLEN/8, x4, x1, x2) - -inst_7789: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb980007f; valaddr_reg:x3; val_offset:23367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23367*FLEN/8, x4, x1, x2) - -inst_7790: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb98000ff; valaddr_reg:x3; val_offset:23370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23370*FLEN/8, x4, x1, x2) - -inst_7791: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb98001ff; valaddr_reg:x3; val_offset:23373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23373*FLEN/8, x4, x1, x2) - -inst_7792: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb98003ff; valaddr_reg:x3; val_offset:23376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23376*FLEN/8, x4, x1, x2) - -inst_7793: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb98007ff; valaddr_reg:x3; val_offset:23379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23379*FLEN/8, x4, x1, x2) - -inst_7794: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9800fff; valaddr_reg:x3; val_offset:23382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23382*FLEN/8, x4, x1, x2) - -inst_7795: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9801fff; valaddr_reg:x3; val_offset:23385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23385*FLEN/8, x4, x1, x2) - -inst_7796: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9803fff; valaddr_reg:x3; val_offset:23388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23388*FLEN/8, x4, x1, x2) - -inst_7797: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9807fff; valaddr_reg:x3; val_offset:23391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23391*FLEN/8, x4, x1, x2) - -inst_7798: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb980ffff; valaddr_reg:x3; val_offset:23394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23394*FLEN/8, x4, x1, x2) - -inst_7799: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb981ffff; valaddr_reg:x3; val_offset:23397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23397*FLEN/8, x4, x1, x2) - -inst_7800: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb983ffff; valaddr_reg:x3; val_offset:23400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23400*FLEN/8, x4, x1, x2) - -inst_7801: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb987ffff; valaddr_reg:x3; val_offset:23403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23403*FLEN/8, x4, x1, x2) - -inst_7802: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb98fffff; valaddr_reg:x3; val_offset:23406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23406*FLEN/8, x4, x1, x2) - -inst_7803: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb99fffff; valaddr_reg:x3; val_offset:23409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23409*FLEN/8, x4, x1, x2) - -inst_7804: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9bfffff; valaddr_reg:x3; val_offset:23412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23412*FLEN/8, x4, x1, x2) - -inst_7805: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9c00000; valaddr_reg:x3; val_offset:23415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23415*FLEN/8, x4, x1, x2) - -inst_7806: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9e00000; valaddr_reg:x3; val_offset:23418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23418*FLEN/8, x4, x1, x2) - -inst_7807: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9f00000; valaddr_reg:x3; val_offset:23421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23421*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_62) - -inst_7808: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9f80000; valaddr_reg:x3; val_offset:23424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23424*FLEN/8, x4, x1, x2) - -inst_7809: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fc0000; valaddr_reg:x3; val_offset:23427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23427*FLEN/8, x4, x1, x2) - -inst_7810: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fe0000; valaddr_reg:x3; val_offset:23430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23430*FLEN/8, x4, x1, x2) - -inst_7811: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ff0000; valaddr_reg:x3; val_offset:23433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23433*FLEN/8, x4, x1, x2) - -inst_7812: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ff8000; valaddr_reg:x3; val_offset:23436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23436*FLEN/8, x4, x1, x2) - -inst_7813: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ffc000; valaddr_reg:x3; val_offset:23439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23439*FLEN/8, x4, x1, x2) - -inst_7814: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ffe000; valaddr_reg:x3; val_offset:23442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23442*FLEN/8, x4, x1, x2) - -inst_7815: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fff000; valaddr_reg:x3; val_offset:23445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23445*FLEN/8, x4, x1, x2) - -inst_7816: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fff800; valaddr_reg:x3; val_offset:23448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23448*FLEN/8, x4, x1, x2) - -inst_7817: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fffc00; valaddr_reg:x3; val_offset:23451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23451*FLEN/8, x4, x1, x2) - -inst_7818: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fffe00; valaddr_reg:x3; val_offset:23454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23454*FLEN/8, x4, x1, x2) - -inst_7819: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ffff00; valaddr_reg:x3; val_offset:23457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23457*FLEN/8, x4, x1, x2) - -inst_7820: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ffff80; valaddr_reg:x3; val_offset:23460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23460*FLEN/8, x4, x1, x2) - -inst_7821: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ffffc0; valaddr_reg:x3; val_offset:23463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23463*FLEN/8, x4, x1, x2) - -inst_7822: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ffffe0; valaddr_reg:x3; val_offset:23466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23466*FLEN/8, x4, x1, x2) - -inst_7823: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fffff0; valaddr_reg:x3; val_offset:23469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23469*FLEN/8, x4, x1, x2) - -inst_7824: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fffff8; valaddr_reg:x3; val_offset:23472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23472*FLEN/8, x4, x1, x2) - -inst_7825: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fffffc; valaddr_reg:x3; val_offset:23475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23475*FLEN/8, x4, x1, x2) - -inst_7826: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9fffffe; valaddr_reg:x3; val_offset:23478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23478*FLEN/8, x4, x1, x2) - -inst_7827: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xb9ffffff; valaddr_reg:x3; val_offset:23481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23481*FLEN/8, x4, x1, x2) - -inst_7828: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbf800001; valaddr_reg:x3; val_offset:23484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23484*FLEN/8, x4, x1, x2) - -inst_7829: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbf800003; valaddr_reg:x3; val_offset:23487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23487*FLEN/8, x4, x1, x2) - -inst_7830: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbf800007; valaddr_reg:x3; val_offset:23490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23490*FLEN/8, x4, x1, x2) - -inst_7831: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbf999999; valaddr_reg:x3; val_offset:23493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23493*FLEN/8, x4, x1, x2) - -inst_7832: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:23496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23496*FLEN/8, x4, x1, x2) - -inst_7833: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:23499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23499*FLEN/8, x4, x1, x2) - -inst_7834: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:23502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23502*FLEN/8, x4, x1, x2) - -inst_7835: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:23505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23505*FLEN/8, x4, x1, x2) - -inst_7836: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:23508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23508*FLEN/8, x4, x1, x2) - -inst_7837: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:23511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23511*FLEN/8, x4, x1, x2) - -inst_7838: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:23514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23514*FLEN/8, x4, x1, x2) - -inst_7839: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:23517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23517*FLEN/8, x4, x1, x2) - -inst_7840: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:23520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23520*FLEN/8, x4, x1, x2) - -inst_7841: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:23523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23523*FLEN/8, x4, x1, x2) - -inst_7842: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:23526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23526*FLEN/8, x4, x1, x2) - -inst_7843: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:23529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23529*FLEN/8, x4, x1, x2) - -inst_7844: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:23532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23532*FLEN/8, x4, x1, x2) - -inst_7845: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:23535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23535*FLEN/8, x4, x1, x2) - -inst_7846: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:23538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23538*FLEN/8, x4, x1, x2) - -inst_7847: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:23541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23541*FLEN/8, x4, x1, x2) - -inst_7848: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:23544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23544*FLEN/8, x4, x1, x2) - -inst_7849: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:23547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23547*FLEN/8, x4, x1, x2) - -inst_7850: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:23550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23550*FLEN/8, x4, x1, x2) - -inst_7851: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:23553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23553*FLEN/8, x4, x1, x2) - -inst_7852: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:23556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23556*FLEN/8, x4, x1, x2) - -inst_7853: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:23559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23559*FLEN/8, x4, x1, x2) - -inst_7854: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:23562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23562*FLEN/8, x4, x1, x2) - -inst_7855: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:23565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23565*FLEN/8, x4, x1, x2) - -inst_7856: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:23568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23568*FLEN/8, x4, x1, x2) - -inst_7857: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:23571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23571*FLEN/8, x4, x1, x2) - -inst_7858: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:23574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23574*FLEN/8, x4, x1, x2) - -inst_7859: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:23577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23577*FLEN/8, x4, x1, x2) - -inst_7860: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84000000; valaddr_reg:x3; val_offset:23580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23580*FLEN/8, x4, x1, x2) - -inst_7861: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84000001; valaddr_reg:x3; val_offset:23583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23583*FLEN/8, x4, x1, x2) - -inst_7862: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84000003; valaddr_reg:x3; val_offset:23586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23586*FLEN/8, x4, x1, x2) - -inst_7863: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84000007; valaddr_reg:x3; val_offset:23589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23589*FLEN/8, x4, x1, x2) - -inst_7864: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8400000f; valaddr_reg:x3; val_offset:23592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23592*FLEN/8, x4, x1, x2) - -inst_7865: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8400001f; valaddr_reg:x3; val_offset:23595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23595*FLEN/8, x4, x1, x2) - -inst_7866: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8400003f; valaddr_reg:x3; val_offset:23598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23598*FLEN/8, x4, x1, x2) - -inst_7867: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8400007f; valaddr_reg:x3; val_offset:23601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23601*FLEN/8, x4, x1, x2) - -inst_7868: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x840000ff; valaddr_reg:x3; val_offset:23604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23604*FLEN/8, x4, x1, x2) - -inst_7869: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x840001ff; valaddr_reg:x3; val_offset:23607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23607*FLEN/8, x4, x1, x2) - -inst_7870: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x840003ff; valaddr_reg:x3; val_offset:23610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23610*FLEN/8, x4, x1, x2) - -inst_7871: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x840007ff; valaddr_reg:x3; val_offset:23613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23613*FLEN/8, x4, x1, x2) - -inst_7872: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84000fff; valaddr_reg:x3; val_offset:23616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23616*FLEN/8, x4, x1, x2) - -inst_7873: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84001fff; valaddr_reg:x3; val_offset:23619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23619*FLEN/8, x4, x1, x2) - -inst_7874: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84003fff; valaddr_reg:x3; val_offset:23622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23622*FLEN/8, x4, x1, x2) - -inst_7875: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84007fff; valaddr_reg:x3; val_offset:23625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23625*FLEN/8, x4, x1, x2) - -inst_7876: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8400ffff; valaddr_reg:x3; val_offset:23628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23628*FLEN/8, x4, x1, x2) - -inst_7877: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8401ffff; valaddr_reg:x3; val_offset:23631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23631*FLEN/8, x4, x1, x2) - -inst_7878: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8403ffff; valaddr_reg:x3; val_offset:23634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23634*FLEN/8, x4, x1, x2) - -inst_7879: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x8407ffff; valaddr_reg:x3; val_offset:23637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23637*FLEN/8, x4, x1, x2) - -inst_7880: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x840fffff; valaddr_reg:x3; val_offset:23640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23640*FLEN/8, x4, x1, x2) - -inst_7881: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x841fffff; valaddr_reg:x3; val_offset:23643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23643*FLEN/8, x4, x1, x2) - -inst_7882: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x843fffff; valaddr_reg:x3; val_offset:23646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23646*FLEN/8, x4, x1, x2) - -inst_7883: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84400000; valaddr_reg:x3; val_offset:23649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23649*FLEN/8, x4, x1, x2) - -inst_7884: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84600000; valaddr_reg:x3; val_offset:23652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23652*FLEN/8, x4, x1, x2) - -inst_7885: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84700000; valaddr_reg:x3; val_offset:23655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23655*FLEN/8, x4, x1, x2) - -inst_7886: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x84780000; valaddr_reg:x3; val_offset:23658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23658*FLEN/8, x4, x1, x2) - -inst_7887: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847c0000; valaddr_reg:x3; val_offset:23661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23661*FLEN/8, x4, x1, x2) - -inst_7888: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847e0000; valaddr_reg:x3; val_offset:23664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23664*FLEN/8, x4, x1, x2) - -inst_7889: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847f0000; valaddr_reg:x3; val_offset:23667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23667*FLEN/8, x4, x1, x2) - -inst_7890: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847f8000; valaddr_reg:x3; val_offset:23670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23670*FLEN/8, x4, x1, x2) - -inst_7891: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847fc000; valaddr_reg:x3; val_offset:23673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23673*FLEN/8, x4, x1, x2) - -inst_7892: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847fe000; valaddr_reg:x3; val_offset:23676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23676*FLEN/8, x4, x1, x2) - -inst_7893: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847ff000; valaddr_reg:x3; val_offset:23679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23679*FLEN/8, x4, x1, x2) - -inst_7894: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847ff800; valaddr_reg:x3; val_offset:23682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23682*FLEN/8, x4, x1, x2) - -inst_7895: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847ffc00; valaddr_reg:x3; val_offset:23685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23685*FLEN/8, x4, x1, x2) - -inst_7896: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847ffe00; valaddr_reg:x3; val_offset:23688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23688*FLEN/8, x4, x1, x2) - -inst_7897: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847fff00; valaddr_reg:x3; val_offset:23691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23691*FLEN/8, x4, x1, x2) - -inst_7898: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847fff80; valaddr_reg:x3; val_offset:23694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23694*FLEN/8, x4, x1, x2) - -inst_7899: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847fffc0; valaddr_reg:x3; val_offset:23697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23697*FLEN/8, x4, x1, x2) - -inst_7900: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847fffe0; valaddr_reg:x3; val_offset:23700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23700*FLEN/8, x4, x1, x2) - -inst_7901: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847ffff0; valaddr_reg:x3; val_offset:23703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23703*FLEN/8, x4, x1, x2) - -inst_7902: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847ffff8; valaddr_reg:x3; val_offset:23706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23706*FLEN/8, x4, x1, x2) - -inst_7903: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847ffffc; valaddr_reg:x3; val_offset:23709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23709*FLEN/8, x4, x1, x2) - -inst_7904: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847ffffe; valaddr_reg:x3; val_offset:23712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23712*FLEN/8, x4, x1, x2) - -inst_7905: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; -op3val:0x847fffff; valaddr_reg:x3; val_offset:23715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23715*FLEN/8, x4, x1, x2) - -inst_7906: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:23718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23718*FLEN/8, x4, x1, x2) - -inst_7907: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:23721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23721*FLEN/8, x4, x1, x2) - -inst_7908: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:23724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23724*FLEN/8, x4, x1, x2) - -inst_7909: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:23727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23727*FLEN/8, x4, x1, x2) - -inst_7910: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:23730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23730*FLEN/8, x4, x1, x2) - -inst_7911: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:23733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23733*FLEN/8, x4, x1, x2) - -inst_7912: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:23736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23736*FLEN/8, x4, x1, x2) - -inst_7913: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:23739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23739*FLEN/8, x4, x1, x2) - -inst_7914: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:23742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23742*FLEN/8, x4, x1, x2) - -inst_7915: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:23745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23745*FLEN/8, x4, x1, x2) - -inst_7916: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:23748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23748*FLEN/8, x4, x1, x2) - -inst_7917: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:23751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23751*FLEN/8, x4, x1, x2) - -inst_7918: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:23754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23754*FLEN/8, x4, x1, x2) - -inst_7919: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:23757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23757*FLEN/8, x4, x1, x2) - -inst_7920: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:23760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23760*FLEN/8, x4, x1, x2) - -inst_7921: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:23763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23763*FLEN/8, x4, x1, x2) - -inst_7922: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85800000; valaddr_reg:x3; val_offset:23766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23766*FLEN/8, x4, x1, x2) - -inst_7923: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85800001; valaddr_reg:x3; val_offset:23769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23769*FLEN/8, x4, x1, x2) - -inst_7924: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85800003; valaddr_reg:x3; val_offset:23772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23772*FLEN/8, x4, x1, x2) - -inst_7925: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85800007; valaddr_reg:x3; val_offset:23775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23775*FLEN/8, x4, x1, x2) - -inst_7926: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8580000f; valaddr_reg:x3; val_offset:23778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23778*FLEN/8, x4, x1, x2) - -inst_7927: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8580001f; valaddr_reg:x3; val_offset:23781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23781*FLEN/8, x4, x1, x2) - -inst_7928: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8580003f; valaddr_reg:x3; val_offset:23784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23784*FLEN/8, x4, x1, x2) - -inst_7929: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8580007f; valaddr_reg:x3; val_offset:23787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23787*FLEN/8, x4, x1, x2) - -inst_7930: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x858000ff; valaddr_reg:x3; val_offset:23790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23790*FLEN/8, x4, x1, x2) - -inst_7931: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x858001ff; valaddr_reg:x3; val_offset:23793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23793*FLEN/8, x4, x1, x2) - -inst_7932: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x858003ff; valaddr_reg:x3; val_offset:23796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23796*FLEN/8, x4, x1, x2) - -inst_7933: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x858007ff; valaddr_reg:x3; val_offset:23799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23799*FLEN/8, x4, x1, x2) - -inst_7934: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85800fff; valaddr_reg:x3; val_offset:23802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23802*FLEN/8, x4, x1, x2) - -inst_7935: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85801fff; valaddr_reg:x3; val_offset:23805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23805*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_63) - -inst_7936: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85803fff; valaddr_reg:x3; val_offset:23808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23808*FLEN/8, x4, x1, x2) - -inst_7937: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85807fff; valaddr_reg:x3; val_offset:23811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23811*FLEN/8, x4, x1, x2) - -inst_7938: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8580ffff; valaddr_reg:x3; val_offset:23814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23814*FLEN/8, x4, x1, x2) - -inst_7939: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8581ffff; valaddr_reg:x3; val_offset:23817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23817*FLEN/8, x4, x1, x2) - -inst_7940: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8583ffff; valaddr_reg:x3; val_offset:23820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23820*FLEN/8, x4, x1, x2) - -inst_7941: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x8587ffff; valaddr_reg:x3; val_offset:23823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23823*FLEN/8, x4, x1, x2) - -inst_7942: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x858fffff; valaddr_reg:x3; val_offset:23826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23826*FLEN/8, x4, x1, x2) - -inst_7943: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x859fffff; valaddr_reg:x3; val_offset:23829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23829*FLEN/8, x4, x1, x2) - -inst_7944: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85bfffff; valaddr_reg:x3; val_offset:23832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23832*FLEN/8, x4, x1, x2) - -inst_7945: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85c00000; valaddr_reg:x3; val_offset:23835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23835*FLEN/8, x4, x1, x2) - -inst_7946: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85e00000; valaddr_reg:x3; val_offset:23838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23838*FLEN/8, x4, x1, x2) - -inst_7947: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85f00000; valaddr_reg:x3; val_offset:23841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23841*FLEN/8, x4, x1, x2) - -inst_7948: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85f80000; valaddr_reg:x3; val_offset:23844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23844*FLEN/8, x4, x1, x2) - -inst_7949: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fc0000; valaddr_reg:x3; val_offset:23847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23847*FLEN/8, x4, x1, x2) - -inst_7950: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fe0000; valaddr_reg:x3; val_offset:23850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23850*FLEN/8, x4, x1, x2) - -inst_7951: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ff0000; valaddr_reg:x3; val_offset:23853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23853*FLEN/8, x4, x1, x2) - -inst_7952: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ff8000; valaddr_reg:x3; val_offset:23856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23856*FLEN/8, x4, x1, x2) - -inst_7953: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ffc000; valaddr_reg:x3; val_offset:23859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23859*FLEN/8, x4, x1, x2) - -inst_7954: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ffe000; valaddr_reg:x3; val_offset:23862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23862*FLEN/8, x4, x1, x2) - -inst_7955: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fff000; valaddr_reg:x3; val_offset:23865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23865*FLEN/8, x4, x1, x2) - -inst_7956: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fff800; valaddr_reg:x3; val_offset:23868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23868*FLEN/8, x4, x1, x2) - -inst_7957: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fffc00; valaddr_reg:x3; val_offset:23871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23871*FLEN/8, x4, x1, x2) - -inst_7958: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fffe00; valaddr_reg:x3; val_offset:23874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23874*FLEN/8, x4, x1, x2) - -inst_7959: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ffff00; valaddr_reg:x3; val_offset:23877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23877*FLEN/8, x4, x1, x2) - -inst_7960: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ffff80; valaddr_reg:x3; val_offset:23880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23880*FLEN/8, x4, x1, x2) - -inst_7961: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ffffc0; valaddr_reg:x3; val_offset:23883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23883*FLEN/8, x4, x1, x2) - -inst_7962: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ffffe0; valaddr_reg:x3; val_offset:23886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23886*FLEN/8, x4, x1, x2) - -inst_7963: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fffff0; valaddr_reg:x3; val_offset:23889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23889*FLEN/8, x4, x1, x2) - -inst_7964: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fffff8; valaddr_reg:x3; val_offset:23892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23892*FLEN/8, x4, x1, x2) - -inst_7965: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fffffc; valaddr_reg:x3; val_offset:23895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23895*FLEN/8, x4, x1, x2) - -inst_7966: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85fffffe; valaddr_reg:x3; val_offset:23898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23898*FLEN/8, x4, x1, x2) - -inst_7967: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; -op3val:0x85ffffff; valaddr_reg:x3; val_offset:23901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23901*FLEN/8, x4, x1, x2) - -inst_7968: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38800000; valaddr_reg:x3; val_offset:23904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23904*FLEN/8, x4, x1, x2) - -inst_7969: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38800001; valaddr_reg:x3; val_offset:23907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23907*FLEN/8, x4, x1, x2) - -inst_7970: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38800003; valaddr_reg:x3; val_offset:23910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23910*FLEN/8, x4, x1, x2) - -inst_7971: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38800007; valaddr_reg:x3; val_offset:23913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23913*FLEN/8, x4, x1, x2) - -inst_7972: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3880000f; valaddr_reg:x3; val_offset:23916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23916*FLEN/8, x4, x1, x2) - -inst_7973: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3880001f; valaddr_reg:x3; val_offset:23919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23919*FLEN/8, x4, x1, x2) - -inst_7974: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3880003f; valaddr_reg:x3; val_offset:23922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23922*FLEN/8, x4, x1, x2) - -inst_7975: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3880007f; valaddr_reg:x3; val_offset:23925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23925*FLEN/8, x4, x1, x2) - -inst_7976: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x388000ff; valaddr_reg:x3; val_offset:23928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23928*FLEN/8, x4, x1, x2) - -inst_7977: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x388001ff; valaddr_reg:x3; val_offset:23931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23931*FLEN/8, x4, x1, x2) - -inst_7978: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x388003ff; valaddr_reg:x3; val_offset:23934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23934*FLEN/8, x4, x1, x2) - -inst_7979: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x388007ff; valaddr_reg:x3; val_offset:23937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23937*FLEN/8, x4, x1, x2) - -inst_7980: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38800fff; valaddr_reg:x3; val_offset:23940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23940*FLEN/8, x4, x1, x2) - -inst_7981: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38801fff; valaddr_reg:x3; val_offset:23943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23943*FLEN/8, x4, x1, x2) - -inst_7982: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38803fff; valaddr_reg:x3; val_offset:23946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23946*FLEN/8, x4, x1, x2) - -inst_7983: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38807fff; valaddr_reg:x3; val_offset:23949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23949*FLEN/8, x4, x1, x2) - -inst_7984: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3880ffff; valaddr_reg:x3; val_offset:23952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23952*FLEN/8, x4, x1, x2) - -inst_7985: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3881ffff; valaddr_reg:x3; val_offset:23955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23955*FLEN/8, x4, x1, x2) - -inst_7986: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3883ffff; valaddr_reg:x3; val_offset:23958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23958*FLEN/8, x4, x1, x2) - -inst_7987: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3887ffff; valaddr_reg:x3; val_offset:23961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23961*FLEN/8, x4, x1, x2) - -inst_7988: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x388fffff; valaddr_reg:x3; val_offset:23964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23964*FLEN/8, x4, x1, x2) - -inst_7989: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x389fffff; valaddr_reg:x3; val_offset:23967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23967*FLEN/8, x4, x1, x2) - -inst_7990: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38bfffff; valaddr_reg:x3; val_offset:23970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23970*FLEN/8, x4, x1, x2) - -inst_7991: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38c00000; valaddr_reg:x3; val_offset:23973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23973*FLEN/8, x4, x1, x2) - -inst_7992: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38e00000; valaddr_reg:x3; val_offset:23976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23976*FLEN/8, x4, x1, x2) - -inst_7993: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38f00000; valaddr_reg:x3; val_offset:23979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23979*FLEN/8, x4, x1, x2) - -inst_7994: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38f80000; valaddr_reg:x3; val_offset:23982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23982*FLEN/8, x4, x1, x2) - -inst_7995: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fc0000; valaddr_reg:x3; val_offset:23985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23985*FLEN/8, x4, x1, x2) - -inst_7996: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fe0000; valaddr_reg:x3; val_offset:23988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23988*FLEN/8, x4, x1, x2) - -inst_7997: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ff0000; valaddr_reg:x3; val_offset:23991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23991*FLEN/8, x4, x1, x2) - -inst_7998: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ff8000; valaddr_reg:x3; val_offset:23994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23994*FLEN/8, x4, x1, x2) - -inst_7999: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ffc000; valaddr_reg:x3; val_offset:23997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23997*FLEN/8, x4, x1, x2) - -inst_8000: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ffe000; valaddr_reg:x3; val_offset:24000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24000*FLEN/8, x4, x1, x2) - -inst_8001: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fff000; valaddr_reg:x3; val_offset:24003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24003*FLEN/8, x4, x1, x2) - -inst_8002: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fff800; valaddr_reg:x3; val_offset:24006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24006*FLEN/8, x4, x1, x2) - -inst_8003: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fffc00; valaddr_reg:x3; val_offset:24009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24009*FLEN/8, x4, x1, x2) - -inst_8004: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fffe00; valaddr_reg:x3; val_offset:24012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24012*FLEN/8, x4, x1, x2) - -inst_8005: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ffff00; valaddr_reg:x3; val_offset:24015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24015*FLEN/8, x4, x1, x2) - -inst_8006: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ffff80; valaddr_reg:x3; val_offset:24018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24018*FLEN/8, x4, x1, x2) - -inst_8007: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ffffc0; valaddr_reg:x3; val_offset:24021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24021*FLEN/8, x4, x1, x2) - -inst_8008: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ffffe0; valaddr_reg:x3; val_offset:24024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24024*FLEN/8, x4, x1, x2) - -inst_8009: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fffff0; valaddr_reg:x3; val_offset:24027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24027*FLEN/8, x4, x1, x2) - -inst_8010: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fffff8; valaddr_reg:x3; val_offset:24030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24030*FLEN/8, x4, x1, x2) - -inst_8011: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fffffc; valaddr_reg:x3; val_offset:24033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24033*FLEN/8, x4, x1, x2) - -inst_8012: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38fffffe; valaddr_reg:x3; val_offset:24036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24036*FLEN/8, x4, x1, x2) - -inst_8013: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x38ffffff; valaddr_reg:x3; val_offset:24039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24039*FLEN/8, x4, x1, x2) - -inst_8014: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3f800001; valaddr_reg:x3; val_offset:24042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24042*FLEN/8, x4, x1, x2) - -inst_8015: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3f800003; valaddr_reg:x3; val_offset:24045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24045*FLEN/8, x4, x1, x2) - -inst_8016: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3f800007; valaddr_reg:x3; val_offset:24048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24048*FLEN/8, x4, x1, x2) - -inst_8017: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3f999999; valaddr_reg:x3; val_offset:24051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24051*FLEN/8, x4, x1, x2) - -inst_8018: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:24054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24054*FLEN/8, x4, x1, x2) - -inst_8019: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:24057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24057*FLEN/8, x4, x1, x2) - -inst_8020: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:24060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24060*FLEN/8, x4, x1, x2) - -inst_8021: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:24063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24063*FLEN/8, x4, x1, x2) - -inst_8022: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:24066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24066*FLEN/8, x4, x1, x2) - -inst_8023: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:24069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24069*FLEN/8, x4, x1, x2) - -inst_8024: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:24072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24072*FLEN/8, x4, x1, x2) - -inst_8025: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:24075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24075*FLEN/8, x4, x1, x2) - -inst_8026: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:24078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24078*FLEN/8, x4, x1, x2) - -inst_8027: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:24081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24081*FLEN/8, x4, x1, x2) - -inst_8028: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:24084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24084*FLEN/8, x4, x1, x2) - -inst_8029: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:24087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24087*FLEN/8, x4, x1, x2) - -inst_8030: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba800000; valaddr_reg:x3; val_offset:24090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24090*FLEN/8, x4, x1, x2) - -inst_8031: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba800001; valaddr_reg:x3; val_offset:24093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24093*FLEN/8, x4, x1, x2) - -inst_8032: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba800003; valaddr_reg:x3; val_offset:24096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24096*FLEN/8, x4, x1, x2) - -inst_8033: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba800007; valaddr_reg:x3; val_offset:24099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24099*FLEN/8, x4, x1, x2) - -inst_8034: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba80000f; valaddr_reg:x3; val_offset:24102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24102*FLEN/8, x4, x1, x2) - -inst_8035: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba80001f; valaddr_reg:x3; val_offset:24105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24105*FLEN/8, x4, x1, x2) - -inst_8036: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba80003f; valaddr_reg:x3; val_offset:24108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24108*FLEN/8, x4, x1, x2) - -inst_8037: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba80007f; valaddr_reg:x3; val_offset:24111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24111*FLEN/8, x4, x1, x2) - -inst_8038: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba8000ff; valaddr_reg:x3; val_offset:24114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24114*FLEN/8, x4, x1, x2) - -inst_8039: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba8001ff; valaddr_reg:x3; val_offset:24117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24117*FLEN/8, x4, x1, x2) - -inst_8040: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba8003ff; valaddr_reg:x3; val_offset:24120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24120*FLEN/8, x4, x1, x2) - -inst_8041: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba8007ff; valaddr_reg:x3; val_offset:24123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24123*FLEN/8, x4, x1, x2) - -inst_8042: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba800fff; valaddr_reg:x3; val_offset:24126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24126*FLEN/8, x4, x1, x2) - -inst_8043: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba801fff; valaddr_reg:x3; val_offset:24129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24129*FLEN/8, x4, x1, x2) - -inst_8044: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba803fff; valaddr_reg:x3; val_offset:24132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24132*FLEN/8, x4, x1, x2) - -inst_8045: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba807fff; valaddr_reg:x3; val_offset:24135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24135*FLEN/8, x4, x1, x2) - -inst_8046: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba80ffff; valaddr_reg:x3; val_offset:24138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24138*FLEN/8, x4, x1, x2) - -inst_8047: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba81ffff; valaddr_reg:x3; val_offset:24141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24141*FLEN/8, x4, x1, x2) - -inst_8048: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba83ffff; valaddr_reg:x3; val_offset:24144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24144*FLEN/8, x4, x1, x2) - -inst_8049: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba87ffff; valaddr_reg:x3; val_offset:24147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24147*FLEN/8, x4, x1, x2) - -inst_8050: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba8fffff; valaddr_reg:x3; val_offset:24150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24150*FLEN/8, x4, x1, x2) - -inst_8051: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xba9fffff; valaddr_reg:x3; val_offset:24153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24153*FLEN/8, x4, x1, x2) - -inst_8052: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbabfffff; valaddr_reg:x3; val_offset:24156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24156*FLEN/8, x4, x1, x2) - -inst_8053: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbac00000; valaddr_reg:x3; val_offset:24159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24159*FLEN/8, x4, x1, x2) - -inst_8054: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbae00000; valaddr_reg:x3; val_offset:24162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24162*FLEN/8, x4, x1, x2) - -inst_8055: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaf00000; valaddr_reg:x3; val_offset:24165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24165*FLEN/8, x4, x1, x2) - -inst_8056: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaf80000; valaddr_reg:x3; val_offset:24168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24168*FLEN/8, x4, x1, x2) - -inst_8057: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafc0000; valaddr_reg:x3; val_offset:24171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24171*FLEN/8, x4, x1, x2) - -inst_8058: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafe0000; valaddr_reg:x3; val_offset:24174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24174*FLEN/8, x4, x1, x2) - -inst_8059: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaff0000; valaddr_reg:x3; val_offset:24177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24177*FLEN/8, x4, x1, x2) - -inst_8060: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaff8000; valaddr_reg:x3; val_offset:24180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24180*FLEN/8, x4, x1, x2) - -inst_8061: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaffc000; valaddr_reg:x3; val_offset:24183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24183*FLEN/8, x4, x1, x2) - -inst_8062: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaffe000; valaddr_reg:x3; val_offset:24186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24186*FLEN/8, x4, x1, x2) - -inst_8063: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafff000; valaddr_reg:x3; val_offset:24189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24189*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_64) - -inst_8064: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafff800; valaddr_reg:x3; val_offset:24192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24192*FLEN/8, x4, x1, x2) - -inst_8065: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafffc00; valaddr_reg:x3; val_offset:24195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24195*FLEN/8, x4, x1, x2) - -inst_8066: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafffe00; valaddr_reg:x3; val_offset:24198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24198*FLEN/8, x4, x1, x2) - -inst_8067: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaffff00; valaddr_reg:x3; val_offset:24201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24201*FLEN/8, x4, x1, x2) - -inst_8068: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaffff80; valaddr_reg:x3; val_offset:24204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24204*FLEN/8, x4, x1, x2) - -inst_8069: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaffffc0; valaddr_reg:x3; val_offset:24207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24207*FLEN/8, x4, x1, x2) - -inst_8070: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaffffe0; valaddr_reg:x3; val_offset:24210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24210*FLEN/8, x4, x1, x2) - -inst_8071: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafffff0; valaddr_reg:x3; val_offset:24213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24213*FLEN/8, x4, x1, x2) - -inst_8072: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafffff8; valaddr_reg:x3; val_offset:24216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24216*FLEN/8, x4, x1, x2) - -inst_8073: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafffffc; valaddr_reg:x3; val_offset:24219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24219*FLEN/8, x4, x1, x2) - -inst_8074: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbafffffe; valaddr_reg:x3; val_offset:24222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24222*FLEN/8, x4, x1, x2) - -inst_8075: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbaffffff; valaddr_reg:x3; val_offset:24225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24225*FLEN/8, x4, x1, x2) - -inst_8076: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbf800001; valaddr_reg:x3; val_offset:24228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24228*FLEN/8, x4, x1, x2) - -inst_8077: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbf800003; valaddr_reg:x3; val_offset:24231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24231*FLEN/8, x4, x1, x2) - -inst_8078: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbf800007; valaddr_reg:x3; val_offset:24234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24234*FLEN/8, x4, x1, x2) - -inst_8079: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbf999999; valaddr_reg:x3; val_offset:24237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24237*FLEN/8, x4, x1, x2) - -inst_8080: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:24240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24240*FLEN/8, x4, x1, x2) - -inst_8081: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:24243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24243*FLEN/8, x4, x1, x2) - -inst_8082: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:24246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24246*FLEN/8, x4, x1, x2) - -inst_8083: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:24249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24249*FLEN/8, x4, x1, x2) - -inst_8084: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:24252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24252*FLEN/8, x4, x1, x2) - -inst_8085: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:24255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24255*FLEN/8, x4, x1, x2) - -inst_8086: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:24258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24258*FLEN/8, x4, x1, x2) - -inst_8087: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:24261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24261*FLEN/8, x4, x1, x2) - -inst_8088: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:24264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24264*FLEN/8, x4, x1, x2) - -inst_8089: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:24267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24267*FLEN/8, x4, x1, x2) - -inst_8090: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:24270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24270*FLEN/8, x4, x1, x2) - -inst_8091: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:24273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24273*FLEN/8, x4, x1, x2) - -inst_8092: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:24276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24276*FLEN/8, x4, x1, x2) - -inst_8093: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:24279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24279*FLEN/8, x4, x1, x2) - -inst_8094: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:24282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24282*FLEN/8, x4, x1, x2) - -inst_8095: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:24285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24285*FLEN/8, x4, x1, x2) - -inst_8096: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:24288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24288*FLEN/8, x4, x1, x2) - -inst_8097: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:24291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24291*FLEN/8, x4, x1, x2) - -inst_8098: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:24294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24294*FLEN/8, x4, x1, x2) - -inst_8099: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:24297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24297*FLEN/8, x4, x1, x2) - -inst_8100: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:24300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24300*FLEN/8, x4, x1, x2) - -inst_8101: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:24303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24303*FLEN/8, x4, x1, x2) - -inst_8102: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:24306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24306*FLEN/8, x4, x1, x2) - -inst_8103: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:24309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24309*FLEN/8, x4, x1, x2) - -inst_8104: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:24312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24312*FLEN/8, x4, x1, x2) - -inst_8105: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:24315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24315*FLEN/8, x4, x1, x2) - -inst_8106: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:24318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24318*FLEN/8, x4, x1, x2) - -inst_8107: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:24321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24321*FLEN/8, x4, x1, x2) - -inst_8108: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89000000; valaddr_reg:x3; val_offset:24324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24324*FLEN/8, x4, x1, x2) - -inst_8109: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89000001; valaddr_reg:x3; val_offset:24327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24327*FLEN/8, x4, x1, x2) - -inst_8110: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89000003; valaddr_reg:x3; val_offset:24330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24330*FLEN/8, x4, x1, x2) - -inst_8111: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89000007; valaddr_reg:x3; val_offset:24333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24333*FLEN/8, x4, x1, x2) - -inst_8112: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8900000f; valaddr_reg:x3; val_offset:24336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24336*FLEN/8, x4, x1, x2) - -inst_8113: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8900001f; valaddr_reg:x3; val_offset:24339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24339*FLEN/8, x4, x1, x2) - -inst_8114: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8900003f; valaddr_reg:x3; val_offset:24342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24342*FLEN/8, x4, x1, x2) - -inst_8115: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8900007f; valaddr_reg:x3; val_offset:24345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24345*FLEN/8, x4, x1, x2) - -inst_8116: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x890000ff; valaddr_reg:x3; val_offset:24348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24348*FLEN/8, x4, x1, x2) - -inst_8117: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x890001ff; valaddr_reg:x3; val_offset:24351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24351*FLEN/8, x4, x1, x2) - -inst_8118: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x890003ff; valaddr_reg:x3; val_offset:24354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24354*FLEN/8, x4, x1, x2) - -inst_8119: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x890007ff; valaddr_reg:x3; val_offset:24357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24357*FLEN/8, x4, x1, x2) - -inst_8120: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89000fff; valaddr_reg:x3; val_offset:24360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24360*FLEN/8, x4, x1, x2) - -inst_8121: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89001fff; valaddr_reg:x3; val_offset:24363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24363*FLEN/8, x4, x1, x2) - -inst_8122: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89003fff; valaddr_reg:x3; val_offset:24366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24366*FLEN/8, x4, x1, x2) - -inst_8123: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89007fff; valaddr_reg:x3; val_offset:24369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24369*FLEN/8, x4, x1, x2) - -inst_8124: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8900ffff; valaddr_reg:x3; val_offset:24372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24372*FLEN/8, x4, x1, x2) - -inst_8125: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8901ffff; valaddr_reg:x3; val_offset:24375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24375*FLEN/8, x4, x1, x2) - -inst_8126: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8903ffff; valaddr_reg:x3; val_offset:24378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24378*FLEN/8, x4, x1, x2) - -inst_8127: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x8907ffff; valaddr_reg:x3; val_offset:24381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24381*FLEN/8, x4, x1, x2) - -inst_8128: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x890fffff; valaddr_reg:x3; val_offset:24384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24384*FLEN/8, x4, x1, x2) - -inst_8129: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x891fffff; valaddr_reg:x3; val_offset:24387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24387*FLEN/8, x4, x1, x2) - -inst_8130: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x893fffff; valaddr_reg:x3; val_offset:24390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24390*FLEN/8, x4, x1, x2) - -inst_8131: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89400000; valaddr_reg:x3; val_offset:24393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24393*FLEN/8, x4, x1, x2) - -inst_8132: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89600000; valaddr_reg:x3; val_offset:24396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24396*FLEN/8, x4, x1, x2) - -inst_8133: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89700000; valaddr_reg:x3; val_offset:24399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24399*FLEN/8, x4, x1, x2) - -inst_8134: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x89780000; valaddr_reg:x3; val_offset:24402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24402*FLEN/8, x4, x1, x2) - -inst_8135: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897c0000; valaddr_reg:x3; val_offset:24405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24405*FLEN/8, x4, x1, x2) - -inst_8136: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897e0000; valaddr_reg:x3; val_offset:24408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24408*FLEN/8, x4, x1, x2) - -inst_8137: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897f0000; valaddr_reg:x3; val_offset:24411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24411*FLEN/8, x4, x1, x2) - -inst_8138: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897f8000; valaddr_reg:x3; val_offset:24414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24414*FLEN/8, x4, x1, x2) - -inst_8139: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897fc000; valaddr_reg:x3; val_offset:24417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24417*FLEN/8, x4, x1, x2) - -inst_8140: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897fe000; valaddr_reg:x3; val_offset:24420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24420*FLEN/8, x4, x1, x2) - -inst_8141: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897ff000; valaddr_reg:x3; val_offset:24423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24423*FLEN/8, x4, x1, x2) - -inst_8142: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897ff800; valaddr_reg:x3; val_offset:24426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24426*FLEN/8, x4, x1, x2) - -inst_8143: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897ffc00; valaddr_reg:x3; val_offset:24429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24429*FLEN/8, x4, x1, x2) - -inst_8144: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897ffe00; valaddr_reg:x3; val_offset:24432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24432*FLEN/8, x4, x1, x2) - -inst_8145: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897fff00; valaddr_reg:x3; val_offset:24435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24435*FLEN/8, x4, x1, x2) - -inst_8146: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897fff80; valaddr_reg:x3; val_offset:24438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24438*FLEN/8, x4, x1, x2) - -inst_8147: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897fffc0; valaddr_reg:x3; val_offset:24441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24441*FLEN/8, x4, x1, x2) - -inst_8148: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897fffe0; valaddr_reg:x3; val_offset:24444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24444*FLEN/8, x4, x1, x2) - -inst_8149: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897ffff0; valaddr_reg:x3; val_offset:24447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24447*FLEN/8, x4, x1, x2) - -inst_8150: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897ffff8; valaddr_reg:x3; val_offset:24450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24450*FLEN/8, x4, x1, x2) - -inst_8151: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897ffffc; valaddr_reg:x3; val_offset:24453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24453*FLEN/8, x4, x1, x2) - -inst_8152: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897ffffe; valaddr_reg:x3; val_offset:24456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24456*FLEN/8, x4, x1, x2) - -inst_8153: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; -op3val:0x897fffff; valaddr_reg:x3; val_offset:24459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24459*FLEN/8, x4, x1, x2) - -inst_8154: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:24462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24462*FLEN/8, x4, x1, x2) - -inst_8155: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:24465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24465*FLEN/8, x4, x1, x2) - -inst_8156: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:24468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24468*FLEN/8, x4, x1, x2) - -inst_8157: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:24471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24471*FLEN/8, x4, x1, x2) - -inst_8158: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:24474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24474*FLEN/8, x4, x1, x2) - -inst_8159: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:24477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24477*FLEN/8, x4, x1, x2) - -inst_8160: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:24480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24480*FLEN/8, x4, x1, x2) - -inst_8161: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:24483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24483*FLEN/8, x4, x1, x2) - -inst_8162: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:24486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24486*FLEN/8, x4, x1, x2) - -inst_8163: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:24489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24489*FLEN/8, x4, x1, x2) - -inst_8164: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:24492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24492*FLEN/8, x4, x1, x2) - -inst_8165: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:24495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24495*FLEN/8, x4, x1, x2) - -inst_8166: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:24498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24498*FLEN/8, x4, x1, x2) - -inst_8167: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:24501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24501*FLEN/8, x4, x1, x2) - -inst_8168: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:24504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24504*FLEN/8, x4, x1, x2) - -inst_8169: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:24507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24507*FLEN/8, x4, x1, x2) - -inst_8170: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3000000; valaddr_reg:x3; val_offset:24510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24510*FLEN/8, x4, x1, x2) - -inst_8171: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3000001; valaddr_reg:x3; val_offset:24513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24513*FLEN/8, x4, x1, x2) - -inst_8172: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3000003; valaddr_reg:x3; val_offset:24516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24516*FLEN/8, x4, x1, x2) - -inst_8173: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3000007; valaddr_reg:x3; val_offset:24519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24519*FLEN/8, x4, x1, x2) - -inst_8174: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x300000f; valaddr_reg:x3; val_offset:24522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24522*FLEN/8, x4, x1, x2) - -inst_8175: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x300001f; valaddr_reg:x3; val_offset:24525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24525*FLEN/8, x4, x1, x2) - -inst_8176: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x300003f; valaddr_reg:x3; val_offset:24528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24528*FLEN/8, x4, x1, x2) - -inst_8177: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x300007f; valaddr_reg:x3; val_offset:24531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24531*FLEN/8, x4, x1, x2) - -inst_8178: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x30000ff; valaddr_reg:x3; val_offset:24534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24534*FLEN/8, x4, x1, x2) - -inst_8179: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x30001ff; valaddr_reg:x3; val_offset:24537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24537*FLEN/8, x4, x1, x2) - -inst_8180: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x30003ff; valaddr_reg:x3; val_offset:24540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24540*FLEN/8, x4, x1, x2) - -inst_8181: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x30007ff; valaddr_reg:x3; val_offset:24543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24543*FLEN/8, x4, x1, x2) - -inst_8182: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3000fff; valaddr_reg:x3; val_offset:24546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24546*FLEN/8, x4, x1, x2) - -inst_8183: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3001fff; valaddr_reg:x3; val_offset:24549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24549*FLEN/8, x4, x1, x2) - -inst_8184: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3003fff; valaddr_reg:x3; val_offset:24552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24552*FLEN/8, x4, x1, x2) - -inst_8185: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3007fff; valaddr_reg:x3; val_offset:24555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24555*FLEN/8, x4, x1, x2) - -inst_8186: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x300ffff; valaddr_reg:x3; val_offset:24558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24558*FLEN/8, x4, x1, x2) - -inst_8187: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x301ffff; valaddr_reg:x3; val_offset:24561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24561*FLEN/8, x4, x1, x2) - -inst_8188: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x303ffff; valaddr_reg:x3; val_offset:24564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24564*FLEN/8, x4, x1, x2) - -inst_8189: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x307ffff; valaddr_reg:x3; val_offset:24567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24567*FLEN/8, x4, x1, x2) - -inst_8190: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x30fffff; valaddr_reg:x3; val_offset:24570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24570*FLEN/8, x4, x1, x2) - -inst_8191: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x31fffff; valaddr_reg:x3; val_offset:24573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24573*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_65) - -inst_8192: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x33fffff; valaddr_reg:x3; val_offset:24576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24576*FLEN/8, x4, x1, x2) - -inst_8193: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3400000; valaddr_reg:x3; val_offset:24579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24579*FLEN/8, x4, x1, x2) - -inst_8194: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3600000; valaddr_reg:x3; val_offset:24582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24582*FLEN/8, x4, x1, x2) - -inst_8195: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3700000; valaddr_reg:x3; val_offset:24585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24585*FLEN/8, x4, x1, x2) - -inst_8196: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x3780000; valaddr_reg:x3; val_offset:24588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24588*FLEN/8, x4, x1, x2) - -inst_8197: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37c0000; valaddr_reg:x3; val_offset:24591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24591*FLEN/8, x4, x1, x2) - -inst_8198: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37e0000; valaddr_reg:x3; val_offset:24594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24594*FLEN/8, x4, x1, x2) - -inst_8199: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37f0000; valaddr_reg:x3; val_offset:24597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24597*FLEN/8, x4, x1, x2) - -inst_8200: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37f8000; valaddr_reg:x3; val_offset:24600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24600*FLEN/8, x4, x1, x2) - -inst_8201: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37fc000; valaddr_reg:x3; val_offset:24603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24603*FLEN/8, x4, x1, x2) - -inst_8202: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37fe000; valaddr_reg:x3; val_offset:24606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24606*FLEN/8, x4, x1, x2) - -inst_8203: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37ff000; valaddr_reg:x3; val_offset:24609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24609*FLEN/8, x4, x1, x2) - -inst_8204: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37ff800; valaddr_reg:x3; val_offset:24612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24612*FLEN/8, x4, x1, x2) - -inst_8205: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37ffc00; valaddr_reg:x3; val_offset:24615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24615*FLEN/8, x4, x1, x2) - -inst_8206: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37ffe00; valaddr_reg:x3; val_offset:24618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24618*FLEN/8, x4, x1, x2) - -inst_8207: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37fff00; valaddr_reg:x3; val_offset:24621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24621*FLEN/8, x4, x1, x2) - -inst_8208: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37fff80; valaddr_reg:x3; val_offset:24624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24624*FLEN/8, x4, x1, x2) - -inst_8209: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37fffc0; valaddr_reg:x3; val_offset:24627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24627*FLEN/8, x4, x1, x2) - -inst_8210: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37fffe0; valaddr_reg:x3; val_offset:24630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24630*FLEN/8, x4, x1, x2) - -inst_8211: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37ffff0; valaddr_reg:x3; val_offset:24633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24633*FLEN/8, x4, x1, x2) - -inst_8212: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37ffff8; valaddr_reg:x3; val_offset:24636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24636*FLEN/8, x4, x1, x2) - -inst_8213: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37ffffc; valaddr_reg:x3; val_offset:24639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24639*FLEN/8, x4, x1, x2) - -inst_8214: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37ffffe; valaddr_reg:x3; val_offset:24642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24642*FLEN/8, x4, x1, x2) - -inst_8215: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; -op3val:0x37fffff; valaddr_reg:x3; val_offset:24645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24645*FLEN/8, x4, x1, x2) - -inst_8216: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:24648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24648*FLEN/8, x4, x1, x2) - -inst_8217: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:24651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24651*FLEN/8, x4, x1, x2) - -inst_8218: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:24654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24654*FLEN/8, x4, x1, x2) - -inst_8219: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:24657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24657*FLEN/8, x4, x1, x2) - -inst_8220: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:24660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24660*FLEN/8, x4, x1, x2) - -inst_8221: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:24663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24663*FLEN/8, x4, x1, x2) - -inst_8222: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:24666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24666*FLEN/8, x4, x1, x2) - -inst_8223: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:24669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24669*FLEN/8, x4, x1, x2) - -inst_8224: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:24672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24672*FLEN/8, x4, x1, x2) - -inst_8225: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:24675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24675*FLEN/8, x4, x1, x2) - -inst_8226: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:24678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24678*FLEN/8, x4, x1, x2) - -inst_8227: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:24681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24681*FLEN/8, x4, x1, x2) - -inst_8228: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:24684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24684*FLEN/8, x4, x1, x2) - -inst_8229: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:24687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24687*FLEN/8, x4, x1, x2) - -inst_8230: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:24690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24690*FLEN/8, x4, x1, x2) - -inst_8231: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:24693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24693*FLEN/8, x4, x1, x2) - -inst_8232: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45000000; valaddr_reg:x3; val_offset:24696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24696*FLEN/8, x4, x1, x2) - -inst_8233: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45000001; valaddr_reg:x3; val_offset:24699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24699*FLEN/8, x4, x1, x2) - -inst_8234: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45000003; valaddr_reg:x3; val_offset:24702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24702*FLEN/8, x4, x1, x2) - -inst_8235: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45000007; valaddr_reg:x3; val_offset:24705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24705*FLEN/8, x4, x1, x2) - -inst_8236: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x4500000f; valaddr_reg:x3; val_offset:24708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24708*FLEN/8, x4, x1, x2) - -inst_8237: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x4500001f; valaddr_reg:x3; val_offset:24711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24711*FLEN/8, x4, x1, x2) - -inst_8238: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x4500003f; valaddr_reg:x3; val_offset:24714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24714*FLEN/8, x4, x1, x2) - -inst_8239: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x4500007f; valaddr_reg:x3; val_offset:24717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24717*FLEN/8, x4, x1, x2) - -inst_8240: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x450000ff; valaddr_reg:x3; val_offset:24720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24720*FLEN/8, x4, x1, x2) - -inst_8241: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x450001ff; valaddr_reg:x3; val_offset:24723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24723*FLEN/8, x4, x1, x2) - -inst_8242: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x450003ff; valaddr_reg:x3; val_offset:24726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24726*FLEN/8, x4, x1, x2) - -inst_8243: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x450007ff; valaddr_reg:x3; val_offset:24729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24729*FLEN/8, x4, x1, x2) - -inst_8244: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45000fff; valaddr_reg:x3; val_offset:24732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24732*FLEN/8, x4, x1, x2) - -inst_8245: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45001fff; valaddr_reg:x3; val_offset:24735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24735*FLEN/8, x4, x1, x2) - -inst_8246: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45003fff; valaddr_reg:x3; val_offset:24738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24738*FLEN/8, x4, x1, x2) - -inst_8247: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45007fff; valaddr_reg:x3; val_offset:24741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24741*FLEN/8, x4, x1, x2) - -inst_8248: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x4500ffff; valaddr_reg:x3; val_offset:24744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24744*FLEN/8, x4, x1, x2) - -inst_8249: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x4501ffff; valaddr_reg:x3; val_offset:24747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24747*FLEN/8, x4, x1, x2) - -inst_8250: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x4503ffff; valaddr_reg:x3; val_offset:24750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24750*FLEN/8, x4, x1, x2) - -inst_8251: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x4507ffff; valaddr_reg:x3; val_offset:24753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24753*FLEN/8, x4, x1, x2) - -inst_8252: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x450fffff; valaddr_reg:x3; val_offset:24756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24756*FLEN/8, x4, x1, x2) - -inst_8253: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x451fffff; valaddr_reg:x3; val_offset:24759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24759*FLEN/8, x4, x1, x2) - -inst_8254: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x453fffff; valaddr_reg:x3; val_offset:24762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24762*FLEN/8, x4, x1, x2) - -inst_8255: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45400000; valaddr_reg:x3; val_offset:24765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24765*FLEN/8, x4, x1, x2) - -inst_8256: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45600000; valaddr_reg:x3; val_offset:24768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24768*FLEN/8, x4, x1, x2) - -inst_8257: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45700000; valaddr_reg:x3; val_offset:24771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24771*FLEN/8, x4, x1, x2) - -inst_8258: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x45780000; valaddr_reg:x3; val_offset:24774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24774*FLEN/8, x4, x1, x2) - -inst_8259: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457c0000; valaddr_reg:x3; val_offset:24777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24777*FLEN/8, x4, x1, x2) - -inst_8260: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457e0000; valaddr_reg:x3; val_offset:24780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24780*FLEN/8, x4, x1, x2) - -inst_8261: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457f0000; valaddr_reg:x3; val_offset:24783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24783*FLEN/8, x4, x1, x2) - -inst_8262: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457f8000; valaddr_reg:x3; val_offset:24786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24786*FLEN/8, x4, x1, x2) - -inst_8263: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457fc000; valaddr_reg:x3; val_offset:24789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24789*FLEN/8, x4, x1, x2) - -inst_8264: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457fe000; valaddr_reg:x3; val_offset:24792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24792*FLEN/8, x4, x1, x2) - -inst_8265: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457ff000; valaddr_reg:x3; val_offset:24795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24795*FLEN/8, x4, x1, x2) - -inst_8266: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457ff800; valaddr_reg:x3; val_offset:24798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24798*FLEN/8, x4, x1, x2) - -inst_8267: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457ffc00; valaddr_reg:x3; val_offset:24801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24801*FLEN/8, x4, x1, x2) - -inst_8268: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457ffe00; valaddr_reg:x3; val_offset:24804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24804*FLEN/8, x4, x1, x2) - -inst_8269: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457fff00; valaddr_reg:x3; val_offset:24807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24807*FLEN/8, x4, x1, x2) - -inst_8270: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457fff80; valaddr_reg:x3; val_offset:24810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24810*FLEN/8, x4, x1, x2) - -inst_8271: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457fffc0; valaddr_reg:x3; val_offset:24813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24813*FLEN/8, x4, x1, x2) - -inst_8272: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457fffe0; valaddr_reg:x3; val_offset:24816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24816*FLEN/8, x4, x1, x2) - -inst_8273: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457ffff0; valaddr_reg:x3; val_offset:24819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24819*FLEN/8, x4, x1, x2) - -inst_8274: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457ffff8; valaddr_reg:x3; val_offset:24822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24822*FLEN/8, x4, x1, x2) - -inst_8275: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457ffffc; valaddr_reg:x3; val_offset:24825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24825*FLEN/8, x4, x1, x2) - -inst_8276: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457ffffe; valaddr_reg:x3; val_offset:24828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24828*FLEN/8, x4, x1, x2) - -inst_8277: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; -op3val:0x457fffff; valaddr_reg:x3; val_offset:24831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24831*FLEN/8, x4, x1, x2) - -inst_8278: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9800000; valaddr_reg:x3; val_offset:24834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24834*FLEN/8, x4, x1, x2) - -inst_8279: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9800001; valaddr_reg:x3; val_offset:24837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24837*FLEN/8, x4, x1, x2) - -inst_8280: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9800003; valaddr_reg:x3; val_offset:24840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24840*FLEN/8, x4, x1, x2) - -inst_8281: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9800007; valaddr_reg:x3; val_offset:24843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24843*FLEN/8, x4, x1, x2) - -inst_8282: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe980000f; valaddr_reg:x3; val_offset:24846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24846*FLEN/8, x4, x1, x2) - -inst_8283: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe980001f; valaddr_reg:x3; val_offset:24849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24849*FLEN/8, x4, x1, x2) - -inst_8284: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe980003f; valaddr_reg:x3; val_offset:24852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24852*FLEN/8, x4, x1, x2) - -inst_8285: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe980007f; valaddr_reg:x3; val_offset:24855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24855*FLEN/8, x4, x1, x2) - -inst_8286: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe98000ff; valaddr_reg:x3; val_offset:24858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24858*FLEN/8, x4, x1, x2) - -inst_8287: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe98001ff; valaddr_reg:x3; val_offset:24861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24861*FLEN/8, x4, x1, x2) - -inst_8288: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe98003ff; valaddr_reg:x3; val_offset:24864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24864*FLEN/8, x4, x1, x2) - -inst_8289: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe98007ff; valaddr_reg:x3; val_offset:24867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24867*FLEN/8, x4, x1, x2) - -inst_8290: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9800fff; valaddr_reg:x3; val_offset:24870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24870*FLEN/8, x4, x1, x2) - -inst_8291: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9801fff; valaddr_reg:x3; val_offset:24873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24873*FLEN/8, x4, x1, x2) - -inst_8292: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9803fff; valaddr_reg:x3; val_offset:24876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24876*FLEN/8, x4, x1, x2) - -inst_8293: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9807fff; valaddr_reg:x3; val_offset:24879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24879*FLEN/8, x4, x1, x2) - -inst_8294: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe980ffff; valaddr_reg:x3; val_offset:24882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24882*FLEN/8, x4, x1, x2) - -inst_8295: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe981ffff; valaddr_reg:x3; val_offset:24885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24885*FLEN/8, x4, x1, x2) - -inst_8296: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe983ffff; valaddr_reg:x3; val_offset:24888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24888*FLEN/8, x4, x1, x2) - -inst_8297: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe987ffff; valaddr_reg:x3; val_offset:24891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24891*FLEN/8, x4, x1, x2) - -inst_8298: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe98fffff; valaddr_reg:x3; val_offset:24894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24894*FLEN/8, x4, x1, x2) - -inst_8299: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe99fffff; valaddr_reg:x3; val_offset:24897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24897*FLEN/8, x4, x1, x2) - -inst_8300: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9bfffff; valaddr_reg:x3; val_offset:24900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24900*FLEN/8, x4, x1, x2) - -inst_8301: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9c00000; valaddr_reg:x3; val_offset:24903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24903*FLEN/8, x4, x1, x2) - -inst_8302: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9e00000; valaddr_reg:x3; val_offset:24906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24906*FLEN/8, x4, x1, x2) - -inst_8303: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9f00000; valaddr_reg:x3; val_offset:24909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24909*FLEN/8, x4, x1, x2) - -inst_8304: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9f80000; valaddr_reg:x3; val_offset:24912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24912*FLEN/8, x4, x1, x2) - -inst_8305: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fc0000; valaddr_reg:x3; val_offset:24915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24915*FLEN/8, x4, x1, x2) - -inst_8306: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fe0000; valaddr_reg:x3; val_offset:24918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24918*FLEN/8, x4, x1, x2) - -inst_8307: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ff0000; valaddr_reg:x3; val_offset:24921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24921*FLEN/8, x4, x1, x2) - -inst_8308: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ff8000; valaddr_reg:x3; val_offset:24924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24924*FLEN/8, x4, x1, x2) - -inst_8309: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ffc000; valaddr_reg:x3; val_offset:24927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24927*FLEN/8, x4, x1, x2) - -inst_8310: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ffe000; valaddr_reg:x3; val_offset:24930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24930*FLEN/8, x4, x1, x2) - -inst_8311: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fff000; valaddr_reg:x3; val_offset:24933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24933*FLEN/8, x4, x1, x2) - -inst_8312: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fff800; valaddr_reg:x3; val_offset:24936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24936*FLEN/8, x4, x1, x2) - -inst_8313: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fffc00; valaddr_reg:x3; val_offset:24939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24939*FLEN/8, x4, x1, x2) - -inst_8314: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fffe00; valaddr_reg:x3; val_offset:24942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24942*FLEN/8, x4, x1, x2) - -inst_8315: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ffff00; valaddr_reg:x3; val_offset:24945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24945*FLEN/8, x4, x1, x2) - -inst_8316: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ffff80; valaddr_reg:x3; val_offset:24948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24948*FLEN/8, x4, x1, x2) - -inst_8317: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ffffc0; valaddr_reg:x3; val_offset:24951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24951*FLEN/8, x4, x1, x2) - -inst_8318: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ffffe0; valaddr_reg:x3; val_offset:24954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24954*FLEN/8, x4, x1, x2) - -inst_8319: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fffff0; valaddr_reg:x3; val_offset:24957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24957*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_66) - -inst_8320: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fffff8; valaddr_reg:x3; val_offset:24960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24960*FLEN/8, x4, x1, x2) - -inst_8321: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fffffc; valaddr_reg:x3; val_offset:24963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24963*FLEN/8, x4, x1, x2) - -inst_8322: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9fffffe; valaddr_reg:x3; val_offset:24966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24966*FLEN/8, x4, x1, x2) - -inst_8323: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xe9ffffff; valaddr_reg:x3; val_offset:24969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24969*FLEN/8, x4, x1, x2) - -inst_8324: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff000001; valaddr_reg:x3; val_offset:24972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24972*FLEN/8, x4, x1, x2) - -inst_8325: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff000003; valaddr_reg:x3; val_offset:24975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24975*FLEN/8, x4, x1, x2) - -inst_8326: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff000007; valaddr_reg:x3; val_offset:24978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24978*FLEN/8, x4, x1, x2) - -inst_8327: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff199999; valaddr_reg:x3; val_offset:24981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24981*FLEN/8, x4, x1, x2) - -inst_8328: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff249249; valaddr_reg:x3; val_offset:24984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24984*FLEN/8, x4, x1, x2) - -inst_8329: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff333333; valaddr_reg:x3; val_offset:24987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24987*FLEN/8, x4, x1, x2) - -inst_8330: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:24990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24990*FLEN/8, x4, x1, x2) - -inst_8331: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:24993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24993*FLEN/8, x4, x1, x2) - -inst_8332: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff444444; valaddr_reg:x3; val_offset:24996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24996*FLEN/8, x4, x1, x2) - -inst_8333: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:24999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24999*FLEN/8, x4, x1, x2) - -inst_8334: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:25002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25002*FLEN/8, x4, x1, x2) - -inst_8335: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff666666; valaddr_reg:x3; val_offset:25005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25005*FLEN/8, x4, x1, x2) - -inst_8336: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:25008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25008*FLEN/8, x4, x1, x2) - -inst_8337: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:25011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25011*FLEN/8, x4, x1, x2) - -inst_8338: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:25014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25014*FLEN/8, x4, x1, x2) - -inst_8339: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:25017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25017*FLEN/8, x4, x1, x2) - -inst_8340: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf800000; valaddr_reg:x3; val_offset:25020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25020*FLEN/8, x4, x1, x2) - -inst_8341: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf800001; valaddr_reg:x3; val_offset:25023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25023*FLEN/8, x4, x1, x2) - -inst_8342: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf800003; valaddr_reg:x3; val_offset:25026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25026*FLEN/8, x4, x1, x2) - -inst_8343: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf800007; valaddr_reg:x3; val_offset:25029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25029*FLEN/8, x4, x1, x2) - -inst_8344: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf80000f; valaddr_reg:x3; val_offset:25032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25032*FLEN/8, x4, x1, x2) - -inst_8345: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf80001f; valaddr_reg:x3; val_offset:25035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25035*FLEN/8, x4, x1, x2) - -inst_8346: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf80003f; valaddr_reg:x3; val_offset:25038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25038*FLEN/8, x4, x1, x2) - -inst_8347: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf80007f; valaddr_reg:x3; val_offset:25041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25041*FLEN/8, x4, x1, x2) - -inst_8348: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf8000ff; valaddr_reg:x3; val_offset:25044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25044*FLEN/8, x4, x1, x2) - -inst_8349: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf8001ff; valaddr_reg:x3; val_offset:25047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25047*FLEN/8, x4, x1, x2) - -inst_8350: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf8003ff; valaddr_reg:x3; val_offset:25050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25050*FLEN/8, x4, x1, x2) - -inst_8351: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf8007ff; valaddr_reg:x3; val_offset:25053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25053*FLEN/8, x4, x1, x2) - -inst_8352: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf800fff; valaddr_reg:x3; val_offset:25056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25056*FLEN/8, x4, x1, x2) - -inst_8353: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf801fff; valaddr_reg:x3; val_offset:25059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25059*FLEN/8, x4, x1, x2) - -inst_8354: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf803fff; valaddr_reg:x3; val_offset:25062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25062*FLEN/8, x4, x1, x2) - -inst_8355: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf807fff; valaddr_reg:x3; val_offset:25065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25065*FLEN/8, x4, x1, x2) - -inst_8356: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf80ffff; valaddr_reg:x3; val_offset:25068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25068*FLEN/8, x4, x1, x2) - -inst_8357: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf81ffff; valaddr_reg:x3; val_offset:25071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25071*FLEN/8, x4, x1, x2) - -inst_8358: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf83ffff; valaddr_reg:x3; val_offset:25074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25074*FLEN/8, x4, x1, x2) - -inst_8359: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf87ffff; valaddr_reg:x3; val_offset:25077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25077*FLEN/8, x4, x1, x2) - -inst_8360: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf8fffff; valaddr_reg:x3; val_offset:25080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25080*FLEN/8, x4, x1, x2) - -inst_8361: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdf9fffff; valaddr_reg:x3; val_offset:25083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25083*FLEN/8, x4, x1, x2) - -inst_8362: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfbfffff; valaddr_reg:x3; val_offset:25086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25086*FLEN/8, x4, x1, x2) - -inst_8363: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfc00000; valaddr_reg:x3; val_offset:25089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25089*FLEN/8, x4, x1, x2) - -inst_8364: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfe00000; valaddr_reg:x3; val_offset:25092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25092*FLEN/8, x4, x1, x2) - -inst_8365: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdff00000; valaddr_reg:x3; val_offset:25095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25095*FLEN/8, x4, x1, x2) - -inst_8366: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdff80000; valaddr_reg:x3; val_offset:25098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25098*FLEN/8, x4, x1, x2) - -inst_8367: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffc0000; valaddr_reg:x3; val_offset:25101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25101*FLEN/8, x4, x1, x2) - -inst_8368: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffe0000; valaddr_reg:x3; val_offset:25104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25104*FLEN/8, x4, x1, x2) - -inst_8369: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfff0000; valaddr_reg:x3; val_offset:25107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25107*FLEN/8, x4, x1, x2) - -inst_8370: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfff8000; valaddr_reg:x3; val_offset:25110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25110*FLEN/8, x4, x1, x2) - -inst_8371: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfffc000; valaddr_reg:x3; val_offset:25113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25113*FLEN/8, x4, x1, x2) - -inst_8372: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfffe000; valaddr_reg:x3; val_offset:25116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25116*FLEN/8, x4, x1, x2) - -inst_8373: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffff000; valaddr_reg:x3; val_offset:25119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25119*FLEN/8, x4, x1, x2) - -inst_8374: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffff800; valaddr_reg:x3; val_offset:25122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25122*FLEN/8, x4, x1, x2) - -inst_8375: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffffc00; valaddr_reg:x3; val_offset:25125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25125*FLEN/8, x4, x1, x2) - -inst_8376: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffffe00; valaddr_reg:x3; val_offset:25128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25128*FLEN/8, x4, x1, x2) - -inst_8377: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfffff00; valaddr_reg:x3; val_offset:25131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25131*FLEN/8, x4, x1, x2) - -inst_8378: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfffff80; valaddr_reg:x3; val_offset:25134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25134*FLEN/8, x4, x1, x2) - -inst_8379: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfffffc0; valaddr_reg:x3; val_offset:25137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25137*FLEN/8, x4, x1, x2) - -inst_8380: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfffffe0; valaddr_reg:x3; val_offset:25140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25140*FLEN/8, x4, x1, x2) - -inst_8381: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffffff0; valaddr_reg:x3; val_offset:25143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25143*FLEN/8, x4, x1, x2) - -inst_8382: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffffff8; valaddr_reg:x3; val_offset:25146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25146*FLEN/8, x4, x1, x2) - -inst_8383: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffffffc; valaddr_reg:x3; val_offset:25149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25149*FLEN/8, x4, x1, x2) - -inst_8384: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdffffffe; valaddr_reg:x3; val_offset:25152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25152*FLEN/8, x4, x1, x2) - -inst_8385: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xdfffffff; valaddr_reg:x3; val_offset:25155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25155*FLEN/8, x4, x1, x2) - -inst_8386: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff000001; valaddr_reg:x3; val_offset:25158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25158*FLEN/8, x4, x1, x2) - -inst_8387: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff000003; valaddr_reg:x3; val_offset:25161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25161*FLEN/8, x4, x1, x2) - -inst_8388: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff000007; valaddr_reg:x3; val_offset:25164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25164*FLEN/8, x4, x1, x2) - -inst_8389: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff199999; valaddr_reg:x3; val_offset:25167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25167*FLEN/8, x4, x1, x2) - -inst_8390: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff249249; valaddr_reg:x3; val_offset:25170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25170*FLEN/8, x4, x1, x2) - -inst_8391: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff333333; valaddr_reg:x3; val_offset:25173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25173*FLEN/8, x4, x1, x2) - -inst_8392: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:25176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25176*FLEN/8, x4, x1, x2) - -inst_8393: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:25179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25179*FLEN/8, x4, x1, x2) - -inst_8394: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff444444; valaddr_reg:x3; val_offset:25182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25182*FLEN/8, x4, x1, x2) - -inst_8395: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:25185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25185*FLEN/8, x4, x1, x2) - -inst_8396: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:25188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25188*FLEN/8, x4, x1, x2) - -inst_8397: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff666666; valaddr_reg:x3; val_offset:25191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25191*FLEN/8, x4, x1, x2) - -inst_8398: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:25194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25194*FLEN/8, x4, x1, x2) - -inst_8399: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:25197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25197*FLEN/8, x4, x1, x2) - -inst_8400: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:25200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25200*FLEN/8, x4, x1, x2) - -inst_8401: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:25203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25203*FLEN/8, x4, x1, x2) - -inst_8402: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:25206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25206*FLEN/8, x4, x1, x2) - -inst_8403: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:25209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25209*FLEN/8, x4, x1, x2) - -inst_8404: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:25212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25212*FLEN/8, x4, x1, x2) - -inst_8405: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:25215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25215*FLEN/8, x4, x1, x2) - -inst_8406: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:25218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25218*FLEN/8, x4, x1, x2) - -inst_8407: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:25221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25221*FLEN/8, x4, x1, x2) - -inst_8408: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:25224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25224*FLEN/8, x4, x1, x2) - -inst_8409: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:25227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25227*FLEN/8, x4, x1, x2) - -inst_8410: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:25230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25230*FLEN/8, x4, x1, x2) - -inst_8411: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:25233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25233*FLEN/8, x4, x1, x2) - -inst_8412: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:25236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25236*FLEN/8, x4, x1, x2) - -inst_8413: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:25239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25239*FLEN/8, x4, x1, x2) - -inst_8414: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:25242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25242*FLEN/8, x4, x1, x2) - -inst_8415: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:25245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25245*FLEN/8, x4, x1, x2) - -inst_8416: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:25248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25248*FLEN/8, x4, x1, x2) - -inst_8417: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:25251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25251*FLEN/8, x4, x1, x2) - -inst_8418: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd000000; valaddr_reg:x3; val_offset:25254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25254*FLEN/8, x4, x1, x2) - -inst_8419: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd000001; valaddr_reg:x3; val_offset:25257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25257*FLEN/8, x4, x1, x2) - -inst_8420: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd000003; valaddr_reg:x3; val_offset:25260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25260*FLEN/8, x4, x1, x2) - -inst_8421: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd000007; valaddr_reg:x3; val_offset:25263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25263*FLEN/8, x4, x1, x2) - -inst_8422: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd00000f; valaddr_reg:x3; val_offset:25266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25266*FLEN/8, x4, x1, x2) - -inst_8423: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd00001f; valaddr_reg:x3; val_offset:25269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25269*FLEN/8, x4, x1, x2) - -inst_8424: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd00003f; valaddr_reg:x3; val_offset:25272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25272*FLEN/8, x4, x1, x2) - -inst_8425: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd00007f; valaddr_reg:x3; val_offset:25275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25275*FLEN/8, x4, x1, x2) - -inst_8426: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd0000ff; valaddr_reg:x3; val_offset:25278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25278*FLEN/8, x4, x1, x2) - -inst_8427: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd0001ff; valaddr_reg:x3; val_offset:25281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25281*FLEN/8, x4, x1, x2) - -inst_8428: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd0003ff; valaddr_reg:x3; val_offset:25284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25284*FLEN/8, x4, x1, x2) - -inst_8429: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd0007ff; valaddr_reg:x3; val_offset:25287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25287*FLEN/8, x4, x1, x2) - -inst_8430: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd000fff; valaddr_reg:x3; val_offset:25290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25290*FLEN/8, x4, x1, x2) - -inst_8431: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd001fff; valaddr_reg:x3; val_offset:25293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25293*FLEN/8, x4, x1, x2) - -inst_8432: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd003fff; valaddr_reg:x3; val_offset:25296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25296*FLEN/8, x4, x1, x2) - -inst_8433: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd007fff; valaddr_reg:x3; val_offset:25299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25299*FLEN/8, x4, x1, x2) - -inst_8434: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd00ffff; valaddr_reg:x3; val_offset:25302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25302*FLEN/8, x4, x1, x2) - -inst_8435: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd01ffff; valaddr_reg:x3; val_offset:25305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25305*FLEN/8, x4, x1, x2) - -inst_8436: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd03ffff; valaddr_reg:x3; val_offset:25308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25308*FLEN/8, x4, x1, x2) - -inst_8437: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd07ffff; valaddr_reg:x3; val_offset:25311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25311*FLEN/8, x4, x1, x2) - -inst_8438: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd0fffff; valaddr_reg:x3; val_offset:25314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25314*FLEN/8, x4, x1, x2) - -inst_8439: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd1fffff; valaddr_reg:x3; val_offset:25317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25317*FLEN/8, x4, x1, x2) - -inst_8440: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd3fffff; valaddr_reg:x3; val_offset:25320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25320*FLEN/8, x4, x1, x2) - -inst_8441: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd400000; valaddr_reg:x3; val_offset:25323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25323*FLEN/8, x4, x1, x2) - -inst_8442: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd600000; valaddr_reg:x3; val_offset:25326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25326*FLEN/8, x4, x1, x2) - -inst_8443: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd700000; valaddr_reg:x3; val_offset:25329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25329*FLEN/8, x4, x1, x2) - -inst_8444: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd780000; valaddr_reg:x3; val_offset:25332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25332*FLEN/8, x4, x1, x2) - -inst_8445: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7c0000; valaddr_reg:x3; val_offset:25335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25335*FLEN/8, x4, x1, x2) - -inst_8446: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7e0000; valaddr_reg:x3; val_offset:25338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25338*FLEN/8, x4, x1, x2) - -inst_8447: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7f0000; valaddr_reg:x3; val_offset:25341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25341*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_67) - -inst_8448: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7f8000; valaddr_reg:x3; val_offset:25344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25344*FLEN/8, x4, x1, x2) - -inst_8449: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7fc000; valaddr_reg:x3; val_offset:25347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25347*FLEN/8, x4, x1, x2) - -inst_8450: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7fe000; valaddr_reg:x3; val_offset:25350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25350*FLEN/8, x4, x1, x2) - -inst_8451: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7ff000; valaddr_reg:x3; val_offset:25353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25353*FLEN/8, x4, x1, x2) - -inst_8452: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7ff800; valaddr_reg:x3; val_offset:25356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25356*FLEN/8, x4, x1, x2) - -inst_8453: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7ffc00; valaddr_reg:x3; val_offset:25359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25359*FLEN/8, x4, x1, x2) - -inst_8454: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7ffe00; valaddr_reg:x3; val_offset:25362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25362*FLEN/8, x4, x1, x2) - -inst_8455: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7fff00; valaddr_reg:x3; val_offset:25365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25365*FLEN/8, x4, x1, x2) - -inst_8456: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7fff80; valaddr_reg:x3; val_offset:25368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25368*FLEN/8, x4, x1, x2) - -inst_8457: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7fffc0; valaddr_reg:x3; val_offset:25371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25371*FLEN/8, x4, x1, x2) - -inst_8458: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7fffe0; valaddr_reg:x3; val_offset:25374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25374*FLEN/8, x4, x1, x2) - -inst_8459: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7ffff0; valaddr_reg:x3; val_offset:25377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25377*FLEN/8, x4, x1, x2) - -inst_8460: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7ffff8; valaddr_reg:x3; val_offset:25380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25380*FLEN/8, x4, x1, x2) - -inst_8461: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7ffffc; valaddr_reg:x3; val_offset:25383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25383*FLEN/8, x4, x1, x2) - -inst_8462: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7ffffe; valaddr_reg:x3; val_offset:25386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25386*FLEN/8, x4, x1, x2) - -inst_8463: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; -op3val:0xd7fffff; valaddr_reg:x3; val_offset:25389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25389*FLEN/8, x4, x1, x2) - -inst_8464: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbf800001; valaddr_reg:x3; val_offset:25392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25392*FLEN/8, x4, x1, x2) - -inst_8465: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbf800003; valaddr_reg:x3; val_offset:25395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25395*FLEN/8, x4, x1, x2) - -inst_8466: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbf800007; valaddr_reg:x3; val_offset:25398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25398*FLEN/8, x4, x1, x2) - -inst_8467: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbf999999; valaddr_reg:x3; val_offset:25401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25401*FLEN/8, x4, x1, x2) - -inst_8468: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:25404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25404*FLEN/8, x4, x1, x2) - -inst_8469: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:25407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25407*FLEN/8, x4, x1, x2) - -inst_8470: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:25410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25410*FLEN/8, x4, x1, x2) - -inst_8471: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:25413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25413*FLEN/8, x4, x1, x2) - -inst_8472: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:25416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25416*FLEN/8, x4, x1, x2) - -inst_8473: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:25419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25419*FLEN/8, x4, x1, x2) - -inst_8474: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:25422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25422*FLEN/8, x4, x1, x2) - -inst_8475: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:25425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25425*FLEN/8, x4, x1, x2) - -inst_8476: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:25428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25428*FLEN/8, x4, x1, x2) - -inst_8477: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:25431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25431*FLEN/8, x4, x1, x2) - -inst_8478: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:25434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25434*FLEN/8, x4, x1, x2) - -inst_8479: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:25437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25437*FLEN/8, x4, x1, x2) - -inst_8480: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4000000; valaddr_reg:x3; val_offset:25440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25440*FLEN/8, x4, x1, x2) - -inst_8481: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4000001; valaddr_reg:x3; val_offset:25443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25443*FLEN/8, x4, x1, x2) - -inst_8482: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4000003; valaddr_reg:x3; val_offset:25446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25446*FLEN/8, x4, x1, x2) - -inst_8483: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4000007; valaddr_reg:x3; val_offset:25449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25449*FLEN/8, x4, x1, x2) - -inst_8484: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc400000f; valaddr_reg:x3; val_offset:25452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25452*FLEN/8, x4, x1, x2) - -inst_8485: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc400001f; valaddr_reg:x3; val_offset:25455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25455*FLEN/8, x4, x1, x2) - -inst_8486: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc400003f; valaddr_reg:x3; val_offset:25458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25458*FLEN/8, x4, x1, x2) - -inst_8487: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc400007f; valaddr_reg:x3; val_offset:25461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25461*FLEN/8, x4, x1, x2) - -inst_8488: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc40000ff; valaddr_reg:x3; val_offset:25464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25464*FLEN/8, x4, x1, x2) - -inst_8489: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc40001ff; valaddr_reg:x3; val_offset:25467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25467*FLEN/8, x4, x1, x2) - -inst_8490: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc40003ff; valaddr_reg:x3; val_offset:25470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25470*FLEN/8, x4, x1, x2) - -inst_8491: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc40007ff; valaddr_reg:x3; val_offset:25473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25473*FLEN/8, x4, x1, x2) - -inst_8492: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4000fff; valaddr_reg:x3; val_offset:25476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25476*FLEN/8, x4, x1, x2) - -inst_8493: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4001fff; valaddr_reg:x3; val_offset:25479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25479*FLEN/8, x4, x1, x2) - -inst_8494: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4003fff; valaddr_reg:x3; val_offset:25482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25482*FLEN/8, x4, x1, x2) - -inst_8495: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4007fff; valaddr_reg:x3; val_offset:25485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25485*FLEN/8, x4, x1, x2) - -inst_8496: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc400ffff; valaddr_reg:x3; val_offset:25488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25488*FLEN/8, x4, x1, x2) - -inst_8497: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc401ffff; valaddr_reg:x3; val_offset:25491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25491*FLEN/8, x4, x1, x2) - -inst_8498: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc403ffff; valaddr_reg:x3; val_offset:25494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25494*FLEN/8, x4, x1, x2) - -inst_8499: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc407ffff; valaddr_reg:x3; val_offset:25497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25497*FLEN/8, x4, x1, x2) - -inst_8500: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc40fffff; valaddr_reg:x3; val_offset:25500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25500*FLEN/8, x4, x1, x2) - -inst_8501: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc41fffff; valaddr_reg:x3; val_offset:25503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25503*FLEN/8, x4, x1, x2) - -inst_8502: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc43fffff; valaddr_reg:x3; val_offset:25506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25506*FLEN/8, x4, x1, x2) - -inst_8503: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4400000; valaddr_reg:x3; val_offset:25509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25509*FLEN/8, x4, x1, x2) - -inst_8504: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4600000; valaddr_reg:x3; val_offset:25512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25512*FLEN/8, x4, x1, x2) - -inst_8505: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4700000; valaddr_reg:x3; val_offset:25515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25515*FLEN/8, x4, x1, x2) - -inst_8506: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc4780000; valaddr_reg:x3; val_offset:25518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25518*FLEN/8, x4, x1, x2) - -inst_8507: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47c0000; valaddr_reg:x3; val_offset:25521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25521*FLEN/8, x4, x1, x2) - -inst_8508: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47e0000; valaddr_reg:x3; val_offset:25524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25524*FLEN/8, x4, x1, x2) - -inst_8509: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47f0000; valaddr_reg:x3; val_offset:25527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25527*FLEN/8, x4, x1, x2) - -inst_8510: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47f8000; valaddr_reg:x3; val_offset:25530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25530*FLEN/8, x4, x1, x2) - -inst_8511: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47fc000; valaddr_reg:x3; val_offset:25533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25533*FLEN/8, x4, x1, x2) - -inst_8512: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47fe000; valaddr_reg:x3; val_offset:25536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25536*FLEN/8, x4, x1, x2) - -inst_8513: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47ff000; valaddr_reg:x3; val_offset:25539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25539*FLEN/8, x4, x1, x2) - -inst_8514: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47ff800; valaddr_reg:x3; val_offset:25542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25542*FLEN/8, x4, x1, x2) - -inst_8515: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47ffc00; valaddr_reg:x3; val_offset:25545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25545*FLEN/8, x4, x1, x2) - -inst_8516: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47ffe00; valaddr_reg:x3; val_offset:25548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25548*FLEN/8, x4, x1, x2) - -inst_8517: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47fff00; valaddr_reg:x3; val_offset:25551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25551*FLEN/8, x4, x1, x2) - -inst_8518: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47fff80; valaddr_reg:x3; val_offset:25554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25554*FLEN/8, x4, x1, x2) - -inst_8519: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47fffc0; valaddr_reg:x3; val_offset:25557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25557*FLEN/8, x4, x1, x2) - -inst_8520: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47fffe0; valaddr_reg:x3; val_offset:25560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25560*FLEN/8, x4, x1, x2) - -inst_8521: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47ffff0; valaddr_reg:x3; val_offset:25563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25563*FLEN/8, x4, x1, x2) - -inst_8522: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47ffff8; valaddr_reg:x3; val_offset:25566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25566*FLEN/8, x4, x1, x2) - -inst_8523: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47ffffc; valaddr_reg:x3; val_offset:25569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25569*FLEN/8, x4, x1, x2) - -inst_8524: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47ffffe; valaddr_reg:x3; val_offset:25572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25572*FLEN/8, x4, x1, x2) - -inst_8525: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; -op3val:0xc47fffff; valaddr_reg:x3; val_offset:25575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25575*FLEN/8, x4, x1, x2) - -inst_8526: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e000000; valaddr_reg:x3; val_offset:25578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25578*FLEN/8, x4, x1, x2) - -inst_8527: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e000001; valaddr_reg:x3; val_offset:25581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25581*FLEN/8, x4, x1, x2) - -inst_8528: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e000003; valaddr_reg:x3; val_offset:25584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25584*FLEN/8, x4, x1, x2) - -inst_8529: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e000007; valaddr_reg:x3; val_offset:25587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25587*FLEN/8, x4, x1, x2) - -inst_8530: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e00000f; valaddr_reg:x3; val_offset:25590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25590*FLEN/8, x4, x1, x2) - -inst_8531: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e00001f; valaddr_reg:x3; val_offset:25593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25593*FLEN/8, x4, x1, x2) - -inst_8532: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e00003f; valaddr_reg:x3; val_offset:25596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25596*FLEN/8, x4, x1, x2) - -inst_8533: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e00007f; valaddr_reg:x3; val_offset:25599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25599*FLEN/8, x4, x1, x2) - -inst_8534: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e0000ff; valaddr_reg:x3; val_offset:25602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25602*FLEN/8, x4, x1, x2) - -inst_8535: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e0001ff; valaddr_reg:x3; val_offset:25605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25605*FLEN/8, x4, x1, x2) - -inst_8536: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e0003ff; valaddr_reg:x3; val_offset:25608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25608*FLEN/8, x4, x1, x2) - -inst_8537: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e0007ff; valaddr_reg:x3; val_offset:25611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25611*FLEN/8, x4, x1, x2) - -inst_8538: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e000fff; valaddr_reg:x3; val_offset:25614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25614*FLEN/8, x4, x1, x2) - -inst_8539: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e001fff; valaddr_reg:x3; val_offset:25617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25617*FLEN/8, x4, x1, x2) - -inst_8540: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e003fff; valaddr_reg:x3; val_offset:25620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25620*FLEN/8, x4, x1, x2) - -inst_8541: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e007fff; valaddr_reg:x3; val_offset:25623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25623*FLEN/8, x4, x1, x2) - -inst_8542: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e00ffff; valaddr_reg:x3; val_offset:25626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25626*FLEN/8, x4, x1, x2) - -inst_8543: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e01ffff; valaddr_reg:x3; val_offset:25629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25629*FLEN/8, x4, x1, x2) - -inst_8544: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e03ffff; valaddr_reg:x3; val_offset:25632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25632*FLEN/8, x4, x1, x2) - -inst_8545: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e07ffff; valaddr_reg:x3; val_offset:25635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25635*FLEN/8, x4, x1, x2) - -inst_8546: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e0fffff; valaddr_reg:x3; val_offset:25638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25638*FLEN/8, x4, x1, x2) - -inst_8547: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e1fffff; valaddr_reg:x3; val_offset:25641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25641*FLEN/8, x4, x1, x2) - -inst_8548: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e3fffff; valaddr_reg:x3; val_offset:25644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25644*FLEN/8, x4, x1, x2) - -inst_8549: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e400000; valaddr_reg:x3; val_offset:25647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25647*FLEN/8, x4, x1, x2) - -inst_8550: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e600000; valaddr_reg:x3; val_offset:25650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25650*FLEN/8, x4, x1, x2) - -inst_8551: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e700000; valaddr_reg:x3; val_offset:25653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25653*FLEN/8, x4, x1, x2) - -inst_8552: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e780000; valaddr_reg:x3; val_offset:25656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25656*FLEN/8, x4, x1, x2) - -inst_8553: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7c0000; valaddr_reg:x3; val_offset:25659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25659*FLEN/8, x4, x1, x2) - -inst_8554: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7e0000; valaddr_reg:x3; val_offset:25662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25662*FLEN/8, x4, x1, x2) - -inst_8555: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7f0000; valaddr_reg:x3; val_offset:25665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25665*FLEN/8, x4, x1, x2) - -inst_8556: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7f8000; valaddr_reg:x3; val_offset:25668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25668*FLEN/8, x4, x1, x2) - -inst_8557: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7fc000; valaddr_reg:x3; val_offset:25671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25671*FLEN/8, x4, x1, x2) - -inst_8558: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7fe000; valaddr_reg:x3; val_offset:25674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25674*FLEN/8, x4, x1, x2) - -inst_8559: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7ff000; valaddr_reg:x3; val_offset:25677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25677*FLEN/8, x4, x1, x2) - -inst_8560: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7ff800; valaddr_reg:x3; val_offset:25680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25680*FLEN/8, x4, x1, x2) - -inst_8561: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7ffc00; valaddr_reg:x3; val_offset:25683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25683*FLEN/8, x4, x1, x2) - -inst_8562: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7ffe00; valaddr_reg:x3; val_offset:25686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25686*FLEN/8, x4, x1, x2) - -inst_8563: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7fff00; valaddr_reg:x3; val_offset:25689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25689*FLEN/8, x4, x1, x2) - -inst_8564: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7fff80; valaddr_reg:x3; val_offset:25692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25692*FLEN/8, x4, x1, x2) - -inst_8565: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7fffc0; valaddr_reg:x3; val_offset:25695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25695*FLEN/8, x4, x1, x2) - -inst_8566: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7fffe0; valaddr_reg:x3; val_offset:25698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25698*FLEN/8, x4, x1, x2) - -inst_8567: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7ffff0; valaddr_reg:x3; val_offset:25701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25701*FLEN/8, x4, x1, x2) - -inst_8568: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7ffff8; valaddr_reg:x3; val_offset:25704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25704*FLEN/8, x4, x1, x2) - -inst_8569: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7ffffc; valaddr_reg:x3; val_offset:25707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25707*FLEN/8, x4, x1, x2) - -inst_8570: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7ffffe; valaddr_reg:x3; val_offset:25710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25710*FLEN/8, x4, x1, x2) - -inst_8571: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x6e7fffff; valaddr_reg:x3; val_offset:25713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25713*FLEN/8, x4, x1, x2) - -inst_8572: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f000001; valaddr_reg:x3; val_offset:25716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25716*FLEN/8, x4, x1, x2) - -inst_8573: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f000003; valaddr_reg:x3; val_offset:25719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25719*FLEN/8, x4, x1, x2) - -inst_8574: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f000007; valaddr_reg:x3; val_offset:25722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25722*FLEN/8, x4, x1, x2) - -inst_8575: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f199999; valaddr_reg:x3; val_offset:25725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25725*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_68) - -inst_8576: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f249249; valaddr_reg:x3; val_offset:25728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25728*FLEN/8, x4, x1, x2) - -inst_8577: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f333333; valaddr_reg:x3; val_offset:25731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25731*FLEN/8, x4, x1, x2) - -inst_8578: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:25734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25734*FLEN/8, x4, x1, x2) - -inst_8579: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:25737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25737*FLEN/8, x4, x1, x2) - -inst_8580: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f444444; valaddr_reg:x3; val_offset:25740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25740*FLEN/8, x4, x1, x2) - -inst_8581: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:25743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25743*FLEN/8, x4, x1, x2) - -inst_8582: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:25746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25746*FLEN/8, x4, x1, x2) - -inst_8583: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f666666; valaddr_reg:x3; val_offset:25749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25749*FLEN/8, x4, x1, x2) - -inst_8584: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:25752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25752*FLEN/8, x4, x1, x2) - -inst_8585: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:25755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25755*FLEN/8, x4, x1, x2) - -inst_8586: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:25758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25758*FLEN/8, x4, x1, x2) - -inst_8587: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:25761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25761*FLEN/8, x4, x1, x2) - -inst_8588: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25800000; valaddr_reg:x3; val_offset:25764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25764*FLEN/8, x4, x1, x2) - -inst_8589: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25800001; valaddr_reg:x3; val_offset:25767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25767*FLEN/8, x4, x1, x2) - -inst_8590: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25800003; valaddr_reg:x3; val_offset:25770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25770*FLEN/8, x4, x1, x2) - -inst_8591: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25800007; valaddr_reg:x3; val_offset:25773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25773*FLEN/8, x4, x1, x2) - -inst_8592: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x2580000f; valaddr_reg:x3; val_offset:25776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25776*FLEN/8, x4, x1, x2) - -inst_8593: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x2580001f; valaddr_reg:x3; val_offset:25779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25779*FLEN/8, x4, x1, x2) - -inst_8594: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x2580003f; valaddr_reg:x3; val_offset:25782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25782*FLEN/8, x4, x1, x2) - -inst_8595: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x2580007f; valaddr_reg:x3; val_offset:25785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25785*FLEN/8, x4, x1, x2) - -inst_8596: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x258000ff; valaddr_reg:x3; val_offset:25788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25788*FLEN/8, x4, x1, x2) - -inst_8597: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x258001ff; valaddr_reg:x3; val_offset:25791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25791*FLEN/8, x4, x1, x2) - -inst_8598: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x258003ff; valaddr_reg:x3; val_offset:25794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25794*FLEN/8, x4, x1, x2) - -inst_8599: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x258007ff; valaddr_reg:x3; val_offset:25797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25797*FLEN/8, x4, x1, x2) - -inst_8600: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25800fff; valaddr_reg:x3; val_offset:25800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25800*FLEN/8, x4, x1, x2) - -inst_8601: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25801fff; valaddr_reg:x3; val_offset:25803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25803*FLEN/8, x4, x1, x2) - -inst_8602: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25803fff; valaddr_reg:x3; val_offset:25806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25806*FLEN/8, x4, x1, x2) - -inst_8603: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25807fff; valaddr_reg:x3; val_offset:25809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25809*FLEN/8, x4, x1, x2) - -inst_8604: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x2580ffff; valaddr_reg:x3; val_offset:25812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25812*FLEN/8, x4, x1, x2) - -inst_8605: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x2581ffff; valaddr_reg:x3; val_offset:25815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25815*FLEN/8, x4, x1, x2) - -inst_8606: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x2583ffff; valaddr_reg:x3; val_offset:25818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25818*FLEN/8, x4, x1, x2) - -inst_8607: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x2587ffff; valaddr_reg:x3; val_offset:25821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25821*FLEN/8, x4, x1, x2) - -inst_8608: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x258fffff; valaddr_reg:x3; val_offset:25824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25824*FLEN/8, x4, x1, x2) - -inst_8609: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x259fffff; valaddr_reg:x3; val_offset:25827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25827*FLEN/8, x4, x1, x2) - -inst_8610: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25bfffff; valaddr_reg:x3; val_offset:25830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25830*FLEN/8, x4, x1, x2) - -inst_8611: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25c00000; valaddr_reg:x3; val_offset:25833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25833*FLEN/8, x4, x1, x2) - -inst_8612: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25e00000; valaddr_reg:x3; val_offset:25836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25836*FLEN/8, x4, x1, x2) - -inst_8613: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25f00000; valaddr_reg:x3; val_offset:25839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25839*FLEN/8, x4, x1, x2) - -inst_8614: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25f80000; valaddr_reg:x3; val_offset:25842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25842*FLEN/8, x4, x1, x2) - -inst_8615: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fc0000; valaddr_reg:x3; val_offset:25845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25845*FLEN/8, x4, x1, x2) - -inst_8616: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fe0000; valaddr_reg:x3; val_offset:25848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25848*FLEN/8, x4, x1, x2) - -inst_8617: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ff0000; valaddr_reg:x3; val_offset:25851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25851*FLEN/8, x4, x1, x2) - -inst_8618: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ff8000; valaddr_reg:x3; val_offset:25854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25854*FLEN/8, x4, x1, x2) - -inst_8619: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ffc000; valaddr_reg:x3; val_offset:25857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25857*FLEN/8, x4, x1, x2) - -inst_8620: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ffe000; valaddr_reg:x3; val_offset:25860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25860*FLEN/8, x4, x1, x2) - -inst_8621: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fff000; valaddr_reg:x3; val_offset:25863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25863*FLEN/8, x4, x1, x2) - -inst_8622: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fff800; valaddr_reg:x3; val_offset:25866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25866*FLEN/8, x4, x1, x2) - -inst_8623: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fffc00; valaddr_reg:x3; val_offset:25869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25869*FLEN/8, x4, x1, x2) - -inst_8624: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fffe00; valaddr_reg:x3; val_offset:25872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25872*FLEN/8, x4, x1, x2) - -inst_8625: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ffff00; valaddr_reg:x3; val_offset:25875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25875*FLEN/8, x4, x1, x2) - -inst_8626: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ffff80; valaddr_reg:x3; val_offset:25878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25878*FLEN/8, x4, x1, x2) - -inst_8627: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ffffc0; valaddr_reg:x3; val_offset:25881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25881*FLEN/8, x4, x1, x2) - -inst_8628: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ffffe0; valaddr_reg:x3; val_offset:25884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25884*FLEN/8, x4, x1, x2) - -inst_8629: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fffff0; valaddr_reg:x3; val_offset:25887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25887*FLEN/8, x4, x1, x2) - -inst_8630: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fffff8; valaddr_reg:x3; val_offset:25890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25890*FLEN/8, x4, x1, x2) - -inst_8631: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fffffc; valaddr_reg:x3; val_offset:25893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25893*FLEN/8, x4, x1, x2) - -inst_8632: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25fffffe; valaddr_reg:x3; val_offset:25896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25896*FLEN/8, x4, x1, x2) - -inst_8633: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x25ffffff; valaddr_reg:x3; val_offset:25899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25899*FLEN/8, x4, x1, x2) - -inst_8634: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3f800001; valaddr_reg:x3; val_offset:25902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25902*FLEN/8, x4, x1, x2) - -inst_8635: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3f800003; valaddr_reg:x3; val_offset:25905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25905*FLEN/8, x4, x1, x2) - -inst_8636: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3f800007; valaddr_reg:x3; val_offset:25908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25908*FLEN/8, x4, x1, x2) - -inst_8637: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3f999999; valaddr_reg:x3; val_offset:25911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25911*FLEN/8, x4, x1, x2) - -inst_8638: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:25914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25914*FLEN/8, x4, x1, x2) - -inst_8639: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:25917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25917*FLEN/8, x4, x1, x2) - -inst_8640: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:25920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25920*FLEN/8, x4, x1, x2) - -inst_8641: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:25923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25923*FLEN/8, x4, x1, x2) - -inst_8642: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:25926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25926*FLEN/8, x4, x1, x2) - -inst_8643: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:25929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25929*FLEN/8, x4, x1, x2) - -inst_8644: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:25932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25932*FLEN/8, x4, x1, x2) - -inst_8645: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:25935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25935*FLEN/8, x4, x1, x2) - -inst_8646: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:25938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25938*FLEN/8, x4, x1, x2) - -inst_8647: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:25941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25941*FLEN/8, x4, x1, x2) - -inst_8648: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:25944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25944*FLEN/8, x4, x1, x2) - -inst_8649: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:25947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25947*FLEN/8, x4, x1, x2) - -inst_8650: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:25950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25950*FLEN/8, x4, x1, x2) - -inst_8651: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:25953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25953*FLEN/8, x4, x1, x2) - -inst_8652: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:25956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25956*FLEN/8, x4, x1, x2) - -inst_8653: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:25959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25959*FLEN/8, x4, x1, x2) - -inst_8654: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:25962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25962*FLEN/8, x4, x1, x2) - -inst_8655: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:25965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25965*FLEN/8, x4, x1, x2) - -inst_8656: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:25968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25968*FLEN/8, x4, x1, x2) - -inst_8657: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:25971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25971*FLEN/8, x4, x1, x2) - -inst_8658: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:25974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25974*FLEN/8, x4, x1, x2) - -inst_8659: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:25977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25977*FLEN/8, x4, x1, x2) - -inst_8660: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:25980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25980*FLEN/8, x4, x1, x2) - -inst_8661: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:25983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25983*FLEN/8, x4, x1, x2) - -inst_8662: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:25986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25986*FLEN/8, x4, x1, x2) - -inst_8663: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:25989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25989*FLEN/8, x4, x1, x2) - -inst_8664: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:25992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25992*FLEN/8, x4, x1, x2) - -inst_8665: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:25995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25995*FLEN/8, x4, x1, x2) - -inst_8666: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89000000; valaddr_reg:x3; val_offset:25998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25998*FLEN/8, x4, x1, x2) - -inst_8667: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89000001; valaddr_reg:x3; val_offset:26001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26001*FLEN/8, x4, x1, x2) - -inst_8668: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89000003; valaddr_reg:x3; val_offset:26004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26004*FLEN/8, x4, x1, x2) - -inst_8669: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89000007; valaddr_reg:x3; val_offset:26007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26007*FLEN/8, x4, x1, x2) - -inst_8670: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x8900000f; valaddr_reg:x3; val_offset:26010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26010*FLEN/8, x4, x1, x2) - -inst_8671: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x8900001f; valaddr_reg:x3; val_offset:26013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26013*FLEN/8, x4, x1, x2) - -inst_8672: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x8900003f; valaddr_reg:x3; val_offset:26016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26016*FLEN/8, x4, x1, x2) - -inst_8673: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x8900007f; valaddr_reg:x3; val_offset:26019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26019*FLEN/8, x4, x1, x2) - -inst_8674: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x890000ff; valaddr_reg:x3; val_offset:26022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26022*FLEN/8, x4, x1, x2) - -inst_8675: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x890001ff; valaddr_reg:x3; val_offset:26025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26025*FLEN/8, x4, x1, x2) - -inst_8676: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x890003ff; valaddr_reg:x3; val_offset:26028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26028*FLEN/8, x4, x1, x2) - -inst_8677: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x890007ff; valaddr_reg:x3; val_offset:26031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26031*FLEN/8, x4, x1, x2) - -inst_8678: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89000fff; valaddr_reg:x3; val_offset:26034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26034*FLEN/8, x4, x1, x2) - -inst_8679: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89001fff; valaddr_reg:x3; val_offset:26037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26037*FLEN/8, x4, x1, x2) - -inst_8680: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89003fff; valaddr_reg:x3; val_offset:26040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26040*FLEN/8, x4, x1, x2) - -inst_8681: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89007fff; valaddr_reg:x3; val_offset:26043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26043*FLEN/8, x4, x1, x2) - -inst_8682: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x8900ffff; valaddr_reg:x3; val_offset:26046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26046*FLEN/8, x4, x1, x2) - -inst_8683: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x8901ffff; valaddr_reg:x3; val_offset:26049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26049*FLEN/8, x4, x1, x2) - -inst_8684: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x8903ffff; valaddr_reg:x3; val_offset:26052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26052*FLEN/8, x4, x1, x2) - -inst_8685: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x8907ffff; valaddr_reg:x3; val_offset:26055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26055*FLEN/8, x4, x1, x2) - -inst_8686: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x890fffff; valaddr_reg:x3; val_offset:26058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26058*FLEN/8, x4, x1, x2) - -inst_8687: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x891fffff; valaddr_reg:x3; val_offset:26061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26061*FLEN/8, x4, x1, x2) - -inst_8688: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x893fffff; valaddr_reg:x3; val_offset:26064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26064*FLEN/8, x4, x1, x2) - -inst_8689: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89400000; valaddr_reg:x3; val_offset:26067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26067*FLEN/8, x4, x1, x2) - -inst_8690: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89600000; valaddr_reg:x3; val_offset:26070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26070*FLEN/8, x4, x1, x2) - -inst_8691: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89700000; valaddr_reg:x3; val_offset:26073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26073*FLEN/8, x4, x1, x2) - -inst_8692: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x89780000; valaddr_reg:x3; val_offset:26076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26076*FLEN/8, x4, x1, x2) - -inst_8693: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897c0000; valaddr_reg:x3; val_offset:26079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26079*FLEN/8, x4, x1, x2) - -inst_8694: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897e0000; valaddr_reg:x3; val_offset:26082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26082*FLEN/8, x4, x1, x2) - -inst_8695: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897f0000; valaddr_reg:x3; val_offset:26085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26085*FLEN/8, x4, x1, x2) - -inst_8696: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897f8000; valaddr_reg:x3; val_offset:26088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26088*FLEN/8, x4, x1, x2) - -inst_8697: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897fc000; valaddr_reg:x3; val_offset:26091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26091*FLEN/8, x4, x1, x2) - -inst_8698: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897fe000; valaddr_reg:x3; val_offset:26094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26094*FLEN/8, x4, x1, x2) - -inst_8699: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897ff000; valaddr_reg:x3; val_offset:26097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26097*FLEN/8, x4, x1, x2) - -inst_8700: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897ff800; valaddr_reg:x3; val_offset:26100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26100*FLEN/8, x4, x1, x2) - -inst_8701: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897ffc00; valaddr_reg:x3; val_offset:26103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26103*FLEN/8, x4, x1, x2) - -inst_8702: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897ffe00; valaddr_reg:x3; val_offset:26106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26106*FLEN/8, x4, x1, x2) - -inst_8703: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897fff00; valaddr_reg:x3; val_offset:26109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26109*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_69) - -inst_8704: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897fff80; valaddr_reg:x3; val_offset:26112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26112*FLEN/8, x4, x1, x2) - -inst_8705: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897fffc0; valaddr_reg:x3; val_offset:26115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26115*FLEN/8, x4, x1, x2) - -inst_8706: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897fffe0; valaddr_reg:x3; val_offset:26118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26118*FLEN/8, x4, x1, x2) - -inst_8707: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897ffff0; valaddr_reg:x3; val_offset:26121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26121*FLEN/8, x4, x1, x2) - -inst_8708: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897ffff8; valaddr_reg:x3; val_offset:26124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26124*FLEN/8, x4, x1, x2) - -inst_8709: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897ffffc; valaddr_reg:x3; val_offset:26127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26127*FLEN/8, x4, x1, x2) - -inst_8710: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897ffffe; valaddr_reg:x3; val_offset:26130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26130*FLEN/8, x4, x1, x2) - -inst_8711: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; -op3val:0x897fffff; valaddr_reg:x3; val_offset:26133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26133*FLEN/8, x4, x1, x2) - -inst_8712: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:26136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26136*FLEN/8, x4, x1, x2) - -inst_8713: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:26139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26139*FLEN/8, x4, x1, x2) - -inst_8714: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:26142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26142*FLEN/8, x4, x1, x2) - -inst_8715: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:26145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26145*FLEN/8, x4, x1, x2) - -inst_8716: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:26148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26148*FLEN/8, x4, x1, x2) - -inst_8717: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:26151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26151*FLEN/8, x4, x1, x2) - -inst_8718: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:26154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26154*FLEN/8, x4, x1, x2) - -inst_8719: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:26157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26157*FLEN/8, x4, x1, x2) - -inst_8720: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:26160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26160*FLEN/8, x4, x1, x2) - -inst_8721: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:26163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26163*FLEN/8, x4, x1, x2) - -inst_8722: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:26166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26166*FLEN/8, x4, x1, x2) - -inst_8723: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:26169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26169*FLEN/8, x4, x1, x2) - -inst_8724: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:26172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26172*FLEN/8, x4, x1, x2) - -inst_8725: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:26175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26175*FLEN/8, x4, x1, x2) - -inst_8726: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:26178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26178*FLEN/8, x4, x1, x2) - -inst_8727: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:26181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26181*FLEN/8, x4, x1, x2) - -inst_8728: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82800000; valaddr_reg:x3; val_offset:26184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26184*FLEN/8, x4, x1, x2) - -inst_8729: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82800001; valaddr_reg:x3; val_offset:26187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26187*FLEN/8, x4, x1, x2) - -inst_8730: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82800003; valaddr_reg:x3; val_offset:26190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26190*FLEN/8, x4, x1, x2) - -inst_8731: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82800007; valaddr_reg:x3; val_offset:26193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26193*FLEN/8, x4, x1, x2) - -inst_8732: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8280000f; valaddr_reg:x3; val_offset:26196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26196*FLEN/8, x4, x1, x2) - -inst_8733: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8280001f; valaddr_reg:x3; val_offset:26199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26199*FLEN/8, x4, x1, x2) - -inst_8734: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8280003f; valaddr_reg:x3; val_offset:26202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26202*FLEN/8, x4, x1, x2) - -inst_8735: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8280007f; valaddr_reg:x3; val_offset:26205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26205*FLEN/8, x4, x1, x2) - -inst_8736: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x828000ff; valaddr_reg:x3; val_offset:26208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26208*FLEN/8, x4, x1, x2) - -inst_8737: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x828001ff; valaddr_reg:x3; val_offset:26211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26211*FLEN/8, x4, x1, x2) - -inst_8738: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x828003ff; valaddr_reg:x3; val_offset:26214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26214*FLEN/8, x4, x1, x2) - -inst_8739: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x828007ff; valaddr_reg:x3; val_offset:26217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26217*FLEN/8, x4, x1, x2) - -inst_8740: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82800fff; valaddr_reg:x3; val_offset:26220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26220*FLEN/8, x4, x1, x2) - -inst_8741: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82801fff; valaddr_reg:x3; val_offset:26223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26223*FLEN/8, x4, x1, x2) - -inst_8742: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82803fff; valaddr_reg:x3; val_offset:26226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26226*FLEN/8, x4, x1, x2) - -inst_8743: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82807fff; valaddr_reg:x3; val_offset:26229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26229*FLEN/8, x4, x1, x2) - -inst_8744: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8280ffff; valaddr_reg:x3; val_offset:26232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26232*FLEN/8, x4, x1, x2) - -inst_8745: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8281ffff; valaddr_reg:x3; val_offset:26235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26235*FLEN/8, x4, x1, x2) - -inst_8746: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8283ffff; valaddr_reg:x3; val_offset:26238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26238*FLEN/8, x4, x1, x2) - -inst_8747: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x8287ffff; valaddr_reg:x3; val_offset:26241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26241*FLEN/8, x4, x1, x2) - -inst_8748: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x828fffff; valaddr_reg:x3; val_offset:26244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26244*FLEN/8, x4, x1, x2) - -inst_8749: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x829fffff; valaddr_reg:x3; val_offset:26247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26247*FLEN/8, x4, x1, x2) - -inst_8750: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82bfffff; valaddr_reg:x3; val_offset:26250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26250*FLEN/8, x4, x1, x2) - -inst_8751: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82c00000; valaddr_reg:x3; val_offset:26253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26253*FLEN/8, x4, x1, x2) - -inst_8752: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82e00000; valaddr_reg:x3; val_offset:26256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26256*FLEN/8, x4, x1, x2) - -inst_8753: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82f00000; valaddr_reg:x3; val_offset:26259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26259*FLEN/8, x4, x1, x2) - -inst_8754: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82f80000; valaddr_reg:x3; val_offset:26262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26262*FLEN/8, x4, x1, x2) - -inst_8755: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fc0000; valaddr_reg:x3; val_offset:26265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26265*FLEN/8, x4, x1, x2) - -inst_8756: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fe0000; valaddr_reg:x3; val_offset:26268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26268*FLEN/8, x4, x1, x2) - -inst_8757: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ff0000; valaddr_reg:x3; val_offset:26271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26271*FLEN/8, x4, x1, x2) - -inst_8758: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ff8000; valaddr_reg:x3; val_offset:26274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26274*FLEN/8, x4, x1, x2) - -inst_8759: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ffc000; valaddr_reg:x3; val_offset:26277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26277*FLEN/8, x4, x1, x2) - -inst_8760: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ffe000; valaddr_reg:x3; val_offset:26280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26280*FLEN/8, x4, x1, x2) - -inst_8761: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fff000; valaddr_reg:x3; val_offset:26283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26283*FLEN/8, x4, x1, x2) - -inst_8762: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fff800; valaddr_reg:x3; val_offset:26286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26286*FLEN/8, x4, x1, x2) - -inst_8763: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fffc00; valaddr_reg:x3; val_offset:26289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26289*FLEN/8, x4, x1, x2) - -inst_8764: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fffe00; valaddr_reg:x3; val_offset:26292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26292*FLEN/8, x4, x1, x2) - -inst_8765: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ffff00; valaddr_reg:x3; val_offset:26295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26295*FLEN/8, x4, x1, x2) - -inst_8766: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ffff80; valaddr_reg:x3; val_offset:26298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26298*FLEN/8, x4, x1, x2) - -inst_8767: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ffffc0; valaddr_reg:x3; val_offset:26301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26301*FLEN/8, x4, x1, x2) - -inst_8768: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ffffe0; valaddr_reg:x3; val_offset:26304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26304*FLEN/8, x4, x1, x2) - -inst_8769: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fffff0; valaddr_reg:x3; val_offset:26307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26307*FLEN/8, x4, x1, x2) - -inst_8770: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fffff8; valaddr_reg:x3; val_offset:26310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26310*FLEN/8, x4, x1, x2) - -inst_8771: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fffffc; valaddr_reg:x3; val_offset:26313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26313*FLEN/8, x4, x1, x2) - -inst_8772: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82fffffe; valaddr_reg:x3; val_offset:26316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26316*FLEN/8, x4, x1, x2) - -inst_8773: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; -op3val:0x82ffffff; valaddr_reg:x3; val_offset:26319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26319*FLEN/8, x4, x1, x2) - -inst_8774: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:26322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26322*FLEN/8, x4, x1, x2) - -inst_8775: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:26325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26325*FLEN/8, x4, x1, x2) - -inst_8776: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:26328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26328*FLEN/8, x4, x1, x2) - -inst_8777: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:26331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26331*FLEN/8, x4, x1, x2) - -inst_8778: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:26334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26334*FLEN/8, x4, x1, x2) - -inst_8779: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:26337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26337*FLEN/8, x4, x1, x2) - -inst_8780: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:26340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26340*FLEN/8, x4, x1, x2) - -inst_8781: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:26343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26343*FLEN/8, x4, x1, x2) - -inst_8782: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:26346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26346*FLEN/8, x4, x1, x2) - -inst_8783: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:26349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26349*FLEN/8, x4, x1, x2) - -inst_8784: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:26352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26352*FLEN/8, x4, x1, x2) - -inst_8785: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:26355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26355*FLEN/8, x4, x1, x2) - -inst_8786: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:26358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26358*FLEN/8, x4, x1, x2) - -inst_8787: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:26361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26361*FLEN/8, x4, x1, x2) - -inst_8788: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:26364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26364*FLEN/8, x4, x1, x2) - -inst_8789: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:26367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26367*FLEN/8, x4, x1, x2) - -inst_8790: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4000000; valaddr_reg:x3; val_offset:26370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26370*FLEN/8, x4, x1, x2) - -inst_8791: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4000001; valaddr_reg:x3; val_offset:26373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26373*FLEN/8, x4, x1, x2) - -inst_8792: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4000003; valaddr_reg:x3; val_offset:26376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26376*FLEN/8, x4, x1, x2) - -inst_8793: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4000007; valaddr_reg:x3; val_offset:26379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26379*FLEN/8, x4, x1, x2) - -inst_8794: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x400000f; valaddr_reg:x3; val_offset:26382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26382*FLEN/8, x4, x1, x2) - -inst_8795: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x400001f; valaddr_reg:x3; val_offset:26385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26385*FLEN/8, x4, x1, x2) - -inst_8796: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x400003f; valaddr_reg:x3; val_offset:26388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26388*FLEN/8, x4, x1, x2) - -inst_8797: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x400007f; valaddr_reg:x3; val_offset:26391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26391*FLEN/8, x4, x1, x2) - -inst_8798: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x40000ff; valaddr_reg:x3; val_offset:26394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26394*FLEN/8, x4, x1, x2) - -inst_8799: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x40001ff; valaddr_reg:x3; val_offset:26397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26397*FLEN/8, x4, x1, x2) - -inst_8800: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x40003ff; valaddr_reg:x3; val_offset:26400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26400*FLEN/8, x4, x1, x2) - -inst_8801: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x40007ff; valaddr_reg:x3; val_offset:26403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26403*FLEN/8, x4, x1, x2) - -inst_8802: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4000fff; valaddr_reg:x3; val_offset:26406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26406*FLEN/8, x4, x1, x2) - -inst_8803: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4001fff; valaddr_reg:x3; val_offset:26409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26409*FLEN/8, x4, x1, x2) - -inst_8804: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4003fff; valaddr_reg:x3; val_offset:26412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26412*FLEN/8, x4, x1, x2) - -inst_8805: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4007fff; valaddr_reg:x3; val_offset:26415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26415*FLEN/8, x4, x1, x2) - -inst_8806: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x400ffff; valaddr_reg:x3; val_offset:26418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26418*FLEN/8, x4, x1, x2) - -inst_8807: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x401ffff; valaddr_reg:x3; val_offset:26421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26421*FLEN/8, x4, x1, x2) - -inst_8808: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x403ffff; valaddr_reg:x3; val_offset:26424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26424*FLEN/8, x4, x1, x2) - -inst_8809: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x407ffff; valaddr_reg:x3; val_offset:26427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26427*FLEN/8, x4, x1, x2) - -inst_8810: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x40fffff; valaddr_reg:x3; val_offset:26430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26430*FLEN/8, x4, x1, x2) - -inst_8811: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x41fffff; valaddr_reg:x3; val_offset:26433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26433*FLEN/8, x4, x1, x2) - -inst_8812: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x43fffff; valaddr_reg:x3; val_offset:26436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26436*FLEN/8, x4, x1, x2) - -inst_8813: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4400000; valaddr_reg:x3; val_offset:26439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26439*FLEN/8, x4, x1, x2) - -inst_8814: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4600000; valaddr_reg:x3; val_offset:26442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26442*FLEN/8, x4, x1, x2) - -inst_8815: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4700000; valaddr_reg:x3; val_offset:26445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26445*FLEN/8, x4, x1, x2) - -inst_8816: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x4780000; valaddr_reg:x3; val_offset:26448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26448*FLEN/8, x4, x1, x2) - -inst_8817: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47c0000; valaddr_reg:x3; val_offset:26451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26451*FLEN/8, x4, x1, x2) - -inst_8818: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47e0000; valaddr_reg:x3; val_offset:26454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26454*FLEN/8, x4, x1, x2) - -inst_8819: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47f0000; valaddr_reg:x3; val_offset:26457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26457*FLEN/8, x4, x1, x2) - -inst_8820: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47f8000; valaddr_reg:x3; val_offset:26460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26460*FLEN/8, x4, x1, x2) - -inst_8821: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47fc000; valaddr_reg:x3; val_offset:26463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26463*FLEN/8, x4, x1, x2) - -inst_8822: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47fe000; valaddr_reg:x3; val_offset:26466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26466*FLEN/8, x4, x1, x2) - -inst_8823: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47ff000; valaddr_reg:x3; val_offset:26469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26469*FLEN/8, x4, x1, x2) - -inst_8824: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47ff800; valaddr_reg:x3; val_offset:26472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26472*FLEN/8, x4, x1, x2) - -inst_8825: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47ffc00; valaddr_reg:x3; val_offset:26475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26475*FLEN/8, x4, x1, x2) - -inst_8826: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47ffe00; valaddr_reg:x3; val_offset:26478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26478*FLEN/8, x4, x1, x2) - -inst_8827: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47fff00; valaddr_reg:x3; val_offset:26481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26481*FLEN/8, x4, x1, x2) - -inst_8828: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47fff80; valaddr_reg:x3; val_offset:26484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26484*FLEN/8, x4, x1, x2) - -inst_8829: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47fffc0; valaddr_reg:x3; val_offset:26487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26487*FLEN/8, x4, x1, x2) - -inst_8830: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47fffe0; valaddr_reg:x3; val_offset:26490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26490*FLEN/8, x4, x1, x2) - -inst_8831: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47ffff0; valaddr_reg:x3; val_offset:26493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26493*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_70) - -inst_8832: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47ffff8; valaddr_reg:x3; val_offset:26496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26496*FLEN/8, x4, x1, x2) - -inst_8833: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47ffffc; valaddr_reg:x3; val_offset:26499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26499*FLEN/8, x4, x1, x2) - -inst_8834: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47ffffe; valaddr_reg:x3; val_offset:26502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26502*FLEN/8, x4, x1, x2) - -inst_8835: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; -op3val:0x47fffff; valaddr_reg:x3; val_offset:26505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26505*FLEN/8, x4, x1, x2) - -inst_8836: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:26508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26508*FLEN/8, x4, x1, x2) - -inst_8837: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:26511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26511*FLEN/8, x4, x1, x2) - -inst_8838: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:26514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26514*FLEN/8, x4, x1, x2) - -inst_8839: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:26517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26517*FLEN/8, x4, x1, x2) - -inst_8840: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:26520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26520*FLEN/8, x4, x1, x2) - -inst_8841: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:26523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26523*FLEN/8, x4, x1, x2) - -inst_8842: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:26526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26526*FLEN/8, x4, x1, x2) - -inst_8843: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:26529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26529*FLEN/8, x4, x1, x2) - -inst_8844: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:26532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26532*FLEN/8, x4, x1, x2) - -inst_8845: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:26535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26535*FLEN/8, x4, x1, x2) - -inst_8846: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:26538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26538*FLEN/8, x4, x1, x2) - -inst_8847: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:26541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26541*FLEN/8, x4, x1, x2) - -inst_8848: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:26544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26544*FLEN/8, x4, x1, x2) - -inst_8849: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:26547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26547*FLEN/8, x4, x1, x2) - -inst_8850: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:26550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26550*FLEN/8, x4, x1, x2) - -inst_8851: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:26553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26553*FLEN/8, x4, x1, x2) - -inst_8852: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4000000; valaddr_reg:x3; val_offset:26556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26556*FLEN/8, x4, x1, x2) - -inst_8853: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4000001; valaddr_reg:x3; val_offset:26559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26559*FLEN/8, x4, x1, x2) - -inst_8854: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4000003; valaddr_reg:x3; val_offset:26562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26562*FLEN/8, x4, x1, x2) - -inst_8855: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4000007; valaddr_reg:x3; val_offset:26565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26565*FLEN/8, x4, x1, x2) - -inst_8856: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x400000f; valaddr_reg:x3; val_offset:26568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26568*FLEN/8, x4, x1, x2) - -inst_8857: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x400001f; valaddr_reg:x3; val_offset:26571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26571*FLEN/8, x4, x1, x2) - -inst_8858: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x400003f; valaddr_reg:x3; val_offset:26574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26574*FLEN/8, x4, x1, x2) - -inst_8859: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x400007f; valaddr_reg:x3; val_offset:26577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26577*FLEN/8, x4, x1, x2) - -inst_8860: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x40000ff; valaddr_reg:x3; val_offset:26580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26580*FLEN/8, x4, x1, x2) - -inst_8861: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x40001ff; valaddr_reg:x3; val_offset:26583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26583*FLEN/8, x4, x1, x2) - -inst_8862: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x40003ff; valaddr_reg:x3; val_offset:26586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26586*FLEN/8, x4, x1, x2) - -inst_8863: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x40007ff; valaddr_reg:x3; val_offset:26589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26589*FLEN/8, x4, x1, x2) - -inst_8864: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4000fff; valaddr_reg:x3; val_offset:26592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26592*FLEN/8, x4, x1, x2) - -inst_8865: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4001fff; valaddr_reg:x3; val_offset:26595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26595*FLEN/8, x4, x1, x2) - -inst_8866: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4003fff; valaddr_reg:x3; val_offset:26598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26598*FLEN/8, x4, x1, x2) - -inst_8867: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4007fff; valaddr_reg:x3; val_offset:26601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26601*FLEN/8, x4, x1, x2) - -inst_8868: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x400ffff; valaddr_reg:x3; val_offset:26604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26604*FLEN/8, x4, x1, x2) - -inst_8869: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x401ffff; valaddr_reg:x3; val_offset:26607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26607*FLEN/8, x4, x1, x2) - -inst_8870: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x403ffff; valaddr_reg:x3; val_offset:26610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26610*FLEN/8, x4, x1, x2) - -inst_8871: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x407ffff; valaddr_reg:x3; val_offset:26613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26613*FLEN/8, x4, x1, x2) - -inst_8872: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x40fffff; valaddr_reg:x3; val_offset:26616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26616*FLEN/8, x4, x1, x2) - -inst_8873: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x41fffff; valaddr_reg:x3; val_offset:26619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26619*FLEN/8, x4, x1, x2) - -inst_8874: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x43fffff; valaddr_reg:x3; val_offset:26622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26622*FLEN/8, x4, x1, x2) - -inst_8875: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4400000; valaddr_reg:x3; val_offset:26625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26625*FLEN/8, x4, x1, x2) - -inst_8876: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4600000; valaddr_reg:x3; val_offset:26628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26628*FLEN/8, x4, x1, x2) - -inst_8877: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4700000; valaddr_reg:x3; val_offset:26631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26631*FLEN/8, x4, x1, x2) - -inst_8878: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x4780000; valaddr_reg:x3; val_offset:26634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26634*FLEN/8, x4, x1, x2) - -inst_8879: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47c0000; valaddr_reg:x3; val_offset:26637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26637*FLEN/8, x4, x1, x2) - -inst_8880: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47e0000; valaddr_reg:x3; val_offset:26640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26640*FLEN/8, x4, x1, x2) - -inst_8881: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47f0000; valaddr_reg:x3; val_offset:26643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26643*FLEN/8, x4, x1, x2) - -inst_8882: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47f8000; valaddr_reg:x3; val_offset:26646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26646*FLEN/8, x4, x1, x2) - -inst_8883: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47fc000; valaddr_reg:x3; val_offset:26649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26649*FLEN/8, x4, x1, x2) - -inst_8884: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47fe000; valaddr_reg:x3; val_offset:26652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26652*FLEN/8, x4, x1, x2) - -inst_8885: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47ff000; valaddr_reg:x3; val_offset:26655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26655*FLEN/8, x4, x1, x2) - -inst_8886: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47ff800; valaddr_reg:x3; val_offset:26658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26658*FLEN/8, x4, x1, x2) - -inst_8887: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47ffc00; valaddr_reg:x3; val_offset:26661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26661*FLEN/8, x4, x1, x2) - -inst_8888: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47ffe00; valaddr_reg:x3; val_offset:26664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26664*FLEN/8, x4, x1, x2) - -inst_8889: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47fff00; valaddr_reg:x3; val_offset:26667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26667*FLEN/8, x4, x1, x2) - -inst_8890: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47fff80; valaddr_reg:x3; val_offset:26670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26670*FLEN/8, x4, x1, x2) - -inst_8891: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47fffc0; valaddr_reg:x3; val_offset:26673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26673*FLEN/8, x4, x1, x2) - -inst_8892: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47fffe0; valaddr_reg:x3; val_offset:26676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26676*FLEN/8, x4, x1, x2) - -inst_8893: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47ffff0; valaddr_reg:x3; val_offset:26679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26679*FLEN/8, x4, x1, x2) - -inst_8894: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47ffff8; valaddr_reg:x3; val_offset:26682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26682*FLEN/8, x4, x1, x2) - -inst_8895: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47ffffc; valaddr_reg:x3; val_offset:26685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26685*FLEN/8, x4, x1, x2) - -inst_8896: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47ffffe; valaddr_reg:x3; val_offset:26688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26688*FLEN/8, x4, x1, x2) - -inst_8897: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; -op3val:0x47fffff; valaddr_reg:x3; val_offset:26691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26691*FLEN/8, x4, x1, x2) - -inst_8898: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31800000; valaddr_reg:x3; val_offset:26694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26694*FLEN/8, x4, x1, x2) - -inst_8899: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31800001; valaddr_reg:x3; val_offset:26697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26697*FLEN/8, x4, x1, x2) - -inst_8900: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31800003; valaddr_reg:x3; val_offset:26700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26700*FLEN/8, x4, x1, x2) - -inst_8901: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31800007; valaddr_reg:x3; val_offset:26703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26703*FLEN/8, x4, x1, x2) - -inst_8902: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3180000f; valaddr_reg:x3; val_offset:26706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26706*FLEN/8, x4, x1, x2) - -inst_8903: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3180001f; valaddr_reg:x3; val_offset:26709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26709*FLEN/8, x4, x1, x2) - -inst_8904: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3180003f; valaddr_reg:x3; val_offset:26712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26712*FLEN/8, x4, x1, x2) - -inst_8905: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3180007f; valaddr_reg:x3; val_offset:26715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26715*FLEN/8, x4, x1, x2) - -inst_8906: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x318000ff; valaddr_reg:x3; val_offset:26718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26718*FLEN/8, x4, x1, x2) - -inst_8907: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x318001ff; valaddr_reg:x3; val_offset:26721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26721*FLEN/8, x4, x1, x2) - -inst_8908: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x318003ff; valaddr_reg:x3; val_offset:26724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26724*FLEN/8, x4, x1, x2) - -inst_8909: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x318007ff; valaddr_reg:x3; val_offset:26727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26727*FLEN/8, x4, x1, x2) - -inst_8910: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31800fff; valaddr_reg:x3; val_offset:26730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26730*FLEN/8, x4, x1, x2) - -inst_8911: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31801fff; valaddr_reg:x3; val_offset:26733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26733*FLEN/8, x4, x1, x2) - -inst_8912: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31803fff; valaddr_reg:x3; val_offset:26736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26736*FLEN/8, x4, x1, x2) - -inst_8913: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31807fff; valaddr_reg:x3; val_offset:26739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26739*FLEN/8, x4, x1, x2) - -inst_8914: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3180ffff; valaddr_reg:x3; val_offset:26742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26742*FLEN/8, x4, x1, x2) - -inst_8915: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3181ffff; valaddr_reg:x3; val_offset:26745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26745*FLEN/8, x4, x1, x2) - -inst_8916: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3183ffff; valaddr_reg:x3; val_offset:26748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26748*FLEN/8, x4, x1, x2) - -inst_8917: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3187ffff; valaddr_reg:x3; val_offset:26751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26751*FLEN/8, x4, x1, x2) - -inst_8918: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x318fffff; valaddr_reg:x3; val_offset:26754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26754*FLEN/8, x4, x1, x2) - -inst_8919: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x319fffff; valaddr_reg:x3; val_offset:26757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26757*FLEN/8, x4, x1, x2) - -inst_8920: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31bfffff; valaddr_reg:x3; val_offset:26760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26760*FLEN/8, x4, x1, x2) - -inst_8921: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31c00000; valaddr_reg:x3; val_offset:26763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26763*FLEN/8, x4, x1, x2) - -inst_8922: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31e00000; valaddr_reg:x3; val_offset:26766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26766*FLEN/8, x4, x1, x2) - -inst_8923: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31f00000; valaddr_reg:x3; val_offset:26769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26769*FLEN/8, x4, x1, x2) - -inst_8924: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31f80000; valaddr_reg:x3; val_offset:26772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26772*FLEN/8, x4, x1, x2) - -inst_8925: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fc0000; valaddr_reg:x3; val_offset:26775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26775*FLEN/8, x4, x1, x2) - -inst_8926: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fe0000; valaddr_reg:x3; val_offset:26778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26778*FLEN/8, x4, x1, x2) - -inst_8927: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ff0000; valaddr_reg:x3; val_offset:26781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26781*FLEN/8, x4, x1, x2) - -inst_8928: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ff8000; valaddr_reg:x3; val_offset:26784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26784*FLEN/8, x4, x1, x2) - -inst_8929: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ffc000; valaddr_reg:x3; val_offset:26787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26787*FLEN/8, x4, x1, x2) - -inst_8930: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ffe000; valaddr_reg:x3; val_offset:26790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26790*FLEN/8, x4, x1, x2) - -inst_8931: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fff000; valaddr_reg:x3; val_offset:26793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26793*FLEN/8, x4, x1, x2) - -inst_8932: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fff800; valaddr_reg:x3; val_offset:26796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26796*FLEN/8, x4, x1, x2) - -inst_8933: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fffc00; valaddr_reg:x3; val_offset:26799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26799*FLEN/8, x4, x1, x2) - -inst_8934: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fffe00; valaddr_reg:x3; val_offset:26802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26802*FLEN/8, x4, x1, x2) - -inst_8935: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ffff00; valaddr_reg:x3; val_offset:26805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26805*FLEN/8, x4, x1, x2) - -inst_8936: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ffff80; valaddr_reg:x3; val_offset:26808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26808*FLEN/8, x4, x1, x2) - -inst_8937: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ffffc0; valaddr_reg:x3; val_offset:26811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26811*FLEN/8, x4, x1, x2) - -inst_8938: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ffffe0; valaddr_reg:x3; val_offset:26814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26814*FLEN/8, x4, x1, x2) - -inst_8939: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fffff0; valaddr_reg:x3; val_offset:26817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26817*FLEN/8, x4, x1, x2) - -inst_8940: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fffff8; valaddr_reg:x3; val_offset:26820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26820*FLEN/8, x4, x1, x2) - -inst_8941: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fffffc; valaddr_reg:x3; val_offset:26823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26823*FLEN/8, x4, x1, x2) - -inst_8942: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31fffffe; valaddr_reg:x3; val_offset:26826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26826*FLEN/8, x4, x1, x2) - -inst_8943: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x31ffffff; valaddr_reg:x3; val_offset:26829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26829*FLEN/8, x4, x1, x2) - -inst_8944: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3f800001; valaddr_reg:x3; val_offset:26832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26832*FLEN/8, x4, x1, x2) - -inst_8945: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3f800003; valaddr_reg:x3; val_offset:26835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26835*FLEN/8, x4, x1, x2) - -inst_8946: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3f800007; valaddr_reg:x3; val_offset:26838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26838*FLEN/8, x4, x1, x2) - -inst_8947: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3f999999; valaddr_reg:x3; val_offset:26841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26841*FLEN/8, x4, x1, x2) - -inst_8948: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:26844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26844*FLEN/8, x4, x1, x2) - -inst_8949: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:26847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26847*FLEN/8, x4, x1, x2) - -inst_8950: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:26850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26850*FLEN/8, x4, x1, x2) - -inst_8951: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:26853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26853*FLEN/8, x4, x1, x2) - -inst_8952: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:26856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26856*FLEN/8, x4, x1, x2) - -inst_8953: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:26859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26859*FLEN/8, x4, x1, x2) - -inst_8954: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:26862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26862*FLEN/8, x4, x1, x2) - -inst_8955: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:26865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26865*FLEN/8, x4, x1, x2) - -inst_8956: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:26868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26868*FLEN/8, x4, x1, x2) - -inst_8957: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:26871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26871*FLEN/8, x4, x1, x2) - -inst_8958: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:26874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26874*FLEN/8, x4, x1, x2) - -inst_8959: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:26877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26877*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_71) - -inst_8960: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:26880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26880*FLEN/8, x4, x1, x2) - -inst_8961: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:26883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26883*FLEN/8, x4, x1, x2) - -inst_8962: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:26886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26886*FLEN/8, x4, x1, x2) - -inst_8963: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:26889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26889*FLEN/8, x4, x1, x2) - -inst_8964: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:26892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26892*FLEN/8, x4, x1, x2) - -inst_8965: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:26895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26895*FLEN/8, x4, x1, x2) - -inst_8966: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:26898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26898*FLEN/8, x4, x1, x2) - -inst_8967: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:26901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26901*FLEN/8, x4, x1, x2) - -inst_8968: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:26904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26904*FLEN/8, x4, x1, x2) - -inst_8969: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:26907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26907*FLEN/8, x4, x1, x2) - -inst_8970: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:26910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26910*FLEN/8, x4, x1, x2) - -inst_8971: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:26913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26913*FLEN/8, x4, x1, x2) - -inst_8972: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:26916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26916*FLEN/8, x4, x1, x2) - -inst_8973: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:26919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26919*FLEN/8, x4, x1, x2) - -inst_8974: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:26922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26922*FLEN/8, x4, x1, x2) - -inst_8975: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:26925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26925*FLEN/8, x4, x1, x2) - -inst_8976: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83800000; valaddr_reg:x3; val_offset:26928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26928*FLEN/8, x4, x1, x2) - -inst_8977: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83800001; valaddr_reg:x3; val_offset:26931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26931*FLEN/8, x4, x1, x2) - -inst_8978: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83800003; valaddr_reg:x3; val_offset:26934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26934*FLEN/8, x4, x1, x2) - -inst_8979: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83800007; valaddr_reg:x3; val_offset:26937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26937*FLEN/8, x4, x1, x2) - -inst_8980: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8380000f; valaddr_reg:x3; val_offset:26940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26940*FLEN/8, x4, x1, x2) - -inst_8981: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8380001f; valaddr_reg:x3; val_offset:26943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26943*FLEN/8, x4, x1, x2) - -inst_8982: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8380003f; valaddr_reg:x3; val_offset:26946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26946*FLEN/8, x4, x1, x2) - -inst_8983: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8380007f; valaddr_reg:x3; val_offset:26949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26949*FLEN/8, x4, x1, x2) - -inst_8984: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x838000ff; valaddr_reg:x3; val_offset:26952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26952*FLEN/8, x4, x1, x2) - -inst_8985: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x838001ff; valaddr_reg:x3; val_offset:26955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26955*FLEN/8, x4, x1, x2) - -inst_8986: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x838003ff; valaddr_reg:x3; val_offset:26958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26958*FLEN/8, x4, x1, x2) - -inst_8987: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x838007ff; valaddr_reg:x3; val_offset:26961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26961*FLEN/8, x4, x1, x2) - -inst_8988: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83800fff; valaddr_reg:x3; val_offset:26964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26964*FLEN/8, x4, x1, x2) - -inst_8989: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83801fff; valaddr_reg:x3; val_offset:26967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26967*FLEN/8, x4, x1, x2) - -inst_8990: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83803fff; valaddr_reg:x3; val_offset:26970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26970*FLEN/8, x4, x1, x2) - -inst_8991: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83807fff; valaddr_reg:x3; val_offset:26973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26973*FLEN/8, x4, x1, x2) - -inst_8992: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8380ffff; valaddr_reg:x3; val_offset:26976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26976*FLEN/8, x4, x1, x2) - -inst_8993: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8381ffff; valaddr_reg:x3; val_offset:26979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26979*FLEN/8, x4, x1, x2) - -inst_8994: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8383ffff; valaddr_reg:x3; val_offset:26982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26982*FLEN/8, x4, x1, x2) - -inst_8995: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x8387ffff; valaddr_reg:x3; val_offset:26985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26985*FLEN/8, x4, x1, x2) - -inst_8996: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x838fffff; valaddr_reg:x3; val_offset:26988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26988*FLEN/8, x4, x1, x2) - -inst_8997: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x839fffff; valaddr_reg:x3; val_offset:26991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26991*FLEN/8, x4, x1, x2) - -inst_8998: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83bfffff; valaddr_reg:x3; val_offset:26994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26994*FLEN/8, x4, x1, x2) - -inst_8999: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83c00000; valaddr_reg:x3; val_offset:26997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26997*FLEN/8, x4, x1, x2) - -inst_9000: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83e00000; valaddr_reg:x3; val_offset:27000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27000*FLEN/8, x4, x1, x2) - -inst_9001: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83f00000; valaddr_reg:x3; val_offset:27003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27003*FLEN/8, x4, x1, x2) - -inst_9002: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83f80000; valaddr_reg:x3; val_offset:27006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27006*FLEN/8, x4, x1, x2) - -inst_9003: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fc0000; valaddr_reg:x3; val_offset:27009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27009*FLEN/8, x4, x1, x2) - -inst_9004: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fe0000; valaddr_reg:x3; val_offset:27012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27012*FLEN/8, x4, x1, x2) - -inst_9005: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ff0000; valaddr_reg:x3; val_offset:27015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27015*FLEN/8, x4, x1, x2) - -inst_9006: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ff8000; valaddr_reg:x3; val_offset:27018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27018*FLEN/8, x4, x1, x2) - -inst_9007: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ffc000; valaddr_reg:x3; val_offset:27021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27021*FLEN/8, x4, x1, x2) - -inst_9008: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ffe000; valaddr_reg:x3; val_offset:27024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27024*FLEN/8, x4, x1, x2) - -inst_9009: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fff000; valaddr_reg:x3; val_offset:27027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27027*FLEN/8, x4, x1, x2) - -inst_9010: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fff800; valaddr_reg:x3; val_offset:27030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27030*FLEN/8, x4, x1, x2) - -inst_9011: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fffc00; valaddr_reg:x3; val_offset:27033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27033*FLEN/8, x4, x1, x2) - -inst_9012: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fffe00; valaddr_reg:x3; val_offset:27036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27036*FLEN/8, x4, x1, x2) - -inst_9013: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ffff00; valaddr_reg:x3; val_offset:27039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27039*FLEN/8, x4, x1, x2) - -inst_9014: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ffff80; valaddr_reg:x3; val_offset:27042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27042*FLEN/8, x4, x1, x2) - -inst_9015: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ffffc0; valaddr_reg:x3; val_offset:27045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27045*FLEN/8, x4, x1, x2) - -inst_9016: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ffffe0; valaddr_reg:x3; val_offset:27048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27048*FLEN/8, x4, x1, x2) - -inst_9017: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fffff0; valaddr_reg:x3; val_offset:27051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27051*FLEN/8, x4, x1, x2) - -inst_9018: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fffff8; valaddr_reg:x3; val_offset:27054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27054*FLEN/8, x4, x1, x2) - -inst_9019: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fffffc; valaddr_reg:x3; val_offset:27057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27057*FLEN/8, x4, x1, x2) - -inst_9020: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83fffffe; valaddr_reg:x3; val_offset:27060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27060*FLEN/8, x4, x1, x2) - -inst_9021: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; -op3val:0x83ffffff; valaddr_reg:x3; val_offset:27063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27063*FLEN/8, x4, x1, x2) - -inst_9022: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75000000; valaddr_reg:x3; val_offset:27066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27066*FLEN/8, x4, x1, x2) - -inst_9023: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75000001; valaddr_reg:x3; val_offset:27069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27069*FLEN/8, x4, x1, x2) - -inst_9024: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75000003; valaddr_reg:x3; val_offset:27072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27072*FLEN/8, x4, x1, x2) - -inst_9025: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75000007; valaddr_reg:x3; val_offset:27075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27075*FLEN/8, x4, x1, x2) - -inst_9026: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7500000f; valaddr_reg:x3; val_offset:27078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27078*FLEN/8, x4, x1, x2) - -inst_9027: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7500001f; valaddr_reg:x3; val_offset:27081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27081*FLEN/8, x4, x1, x2) - -inst_9028: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7500003f; valaddr_reg:x3; val_offset:27084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27084*FLEN/8, x4, x1, x2) - -inst_9029: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7500007f; valaddr_reg:x3; val_offset:27087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27087*FLEN/8, x4, x1, x2) - -inst_9030: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x750000ff; valaddr_reg:x3; val_offset:27090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27090*FLEN/8, x4, x1, x2) - -inst_9031: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x750001ff; valaddr_reg:x3; val_offset:27093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27093*FLEN/8, x4, x1, x2) - -inst_9032: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x750003ff; valaddr_reg:x3; val_offset:27096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27096*FLEN/8, x4, x1, x2) - -inst_9033: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x750007ff; valaddr_reg:x3; val_offset:27099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27099*FLEN/8, x4, x1, x2) - -inst_9034: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75000fff; valaddr_reg:x3; val_offset:27102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27102*FLEN/8, x4, x1, x2) - -inst_9035: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75001fff; valaddr_reg:x3; val_offset:27105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27105*FLEN/8, x4, x1, x2) - -inst_9036: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75003fff; valaddr_reg:x3; val_offset:27108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27108*FLEN/8, x4, x1, x2) - -inst_9037: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75007fff; valaddr_reg:x3; val_offset:27111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27111*FLEN/8, x4, x1, x2) - -inst_9038: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7500ffff; valaddr_reg:x3; val_offset:27114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27114*FLEN/8, x4, x1, x2) - -inst_9039: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7501ffff; valaddr_reg:x3; val_offset:27117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27117*FLEN/8, x4, x1, x2) - -inst_9040: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7503ffff; valaddr_reg:x3; val_offset:27120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27120*FLEN/8, x4, x1, x2) - -inst_9041: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7507ffff; valaddr_reg:x3; val_offset:27123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27123*FLEN/8, x4, x1, x2) - -inst_9042: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x750fffff; valaddr_reg:x3; val_offset:27126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27126*FLEN/8, x4, x1, x2) - -inst_9043: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x751fffff; valaddr_reg:x3; val_offset:27129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27129*FLEN/8, x4, x1, x2) - -inst_9044: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x753fffff; valaddr_reg:x3; val_offset:27132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27132*FLEN/8, x4, x1, x2) - -inst_9045: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75400000; valaddr_reg:x3; val_offset:27135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27135*FLEN/8, x4, x1, x2) - -inst_9046: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75600000; valaddr_reg:x3; val_offset:27138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27138*FLEN/8, x4, x1, x2) - -inst_9047: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75700000; valaddr_reg:x3; val_offset:27141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27141*FLEN/8, x4, x1, x2) - -inst_9048: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x75780000; valaddr_reg:x3; val_offset:27144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27144*FLEN/8, x4, x1, x2) - -inst_9049: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757c0000; valaddr_reg:x3; val_offset:27147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27147*FLEN/8, x4, x1, x2) - -inst_9050: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757e0000; valaddr_reg:x3; val_offset:27150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27150*FLEN/8, x4, x1, x2) - -inst_9051: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757f0000; valaddr_reg:x3; val_offset:27153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27153*FLEN/8, x4, x1, x2) - -inst_9052: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757f8000; valaddr_reg:x3; val_offset:27156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27156*FLEN/8, x4, x1, x2) - -inst_9053: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757fc000; valaddr_reg:x3; val_offset:27159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27159*FLEN/8, x4, x1, x2) - -inst_9054: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757fe000; valaddr_reg:x3; val_offset:27162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27162*FLEN/8, x4, x1, x2) - -inst_9055: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757ff000; valaddr_reg:x3; val_offset:27165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27165*FLEN/8, x4, x1, x2) - -inst_9056: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757ff800; valaddr_reg:x3; val_offset:27168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27168*FLEN/8, x4, x1, x2) - -inst_9057: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757ffc00; valaddr_reg:x3; val_offset:27171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27171*FLEN/8, x4, x1, x2) - -inst_9058: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757ffe00; valaddr_reg:x3; val_offset:27174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27174*FLEN/8, x4, x1, x2) - -inst_9059: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757fff00; valaddr_reg:x3; val_offset:27177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27177*FLEN/8, x4, x1, x2) - -inst_9060: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757fff80; valaddr_reg:x3; val_offset:27180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27180*FLEN/8, x4, x1, x2) - -inst_9061: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757fffc0; valaddr_reg:x3; val_offset:27183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27183*FLEN/8, x4, x1, x2) - -inst_9062: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757fffe0; valaddr_reg:x3; val_offset:27186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27186*FLEN/8, x4, x1, x2) - -inst_9063: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757ffff0; valaddr_reg:x3; val_offset:27189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27189*FLEN/8, x4, x1, x2) - -inst_9064: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757ffff8; valaddr_reg:x3; val_offset:27192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27192*FLEN/8, x4, x1, x2) - -inst_9065: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757ffffc; valaddr_reg:x3; val_offset:27195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27195*FLEN/8, x4, x1, x2) - -inst_9066: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757ffffe; valaddr_reg:x3; val_offset:27198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27198*FLEN/8, x4, x1, x2) - -inst_9067: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x757fffff; valaddr_reg:x3; val_offset:27201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27201*FLEN/8, x4, x1, x2) - -inst_9068: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f000001; valaddr_reg:x3; val_offset:27204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27204*FLEN/8, x4, x1, x2) - -inst_9069: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f000003; valaddr_reg:x3; val_offset:27207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27207*FLEN/8, x4, x1, x2) - -inst_9070: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f000007; valaddr_reg:x3; val_offset:27210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27210*FLEN/8, x4, x1, x2) - -inst_9071: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f199999; valaddr_reg:x3; val_offset:27213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27213*FLEN/8, x4, x1, x2) - -inst_9072: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f249249; valaddr_reg:x3; val_offset:27216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27216*FLEN/8, x4, x1, x2) - -inst_9073: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f333333; valaddr_reg:x3; val_offset:27219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27219*FLEN/8, x4, x1, x2) - -inst_9074: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:27222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27222*FLEN/8, x4, x1, x2) - -inst_9075: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:27225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27225*FLEN/8, x4, x1, x2) - -inst_9076: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f444444; valaddr_reg:x3; val_offset:27228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27228*FLEN/8, x4, x1, x2) - -inst_9077: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:27231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27231*FLEN/8, x4, x1, x2) - -inst_9078: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:27234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27234*FLEN/8, x4, x1, x2) - -inst_9079: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f666666; valaddr_reg:x3; val_offset:27237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27237*FLEN/8, x4, x1, x2) - -inst_9080: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:27240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27240*FLEN/8, x4, x1, x2) - -inst_9081: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:27243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27243*FLEN/8, x4, x1, x2) - -inst_9082: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:27246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27246*FLEN/8, x4, x1, x2) - -inst_9083: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:27249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27249*FLEN/8, x4, x1, x2) - -inst_9084: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6000000; valaddr_reg:x3; val_offset:27252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27252*FLEN/8, x4, x1, x2) - -inst_9085: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6000001; valaddr_reg:x3; val_offset:27255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27255*FLEN/8, x4, x1, x2) - -inst_9086: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6000003; valaddr_reg:x3; val_offset:27258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27258*FLEN/8, x4, x1, x2) - -inst_9087: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6000007; valaddr_reg:x3; val_offset:27261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27261*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_72) - -inst_9088: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa600000f; valaddr_reg:x3; val_offset:27264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27264*FLEN/8, x4, x1, x2) - -inst_9089: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa600001f; valaddr_reg:x3; val_offset:27267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27267*FLEN/8, x4, x1, x2) - -inst_9090: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa600003f; valaddr_reg:x3; val_offset:27270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27270*FLEN/8, x4, x1, x2) - -inst_9091: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa600007f; valaddr_reg:x3; val_offset:27273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27273*FLEN/8, x4, x1, x2) - -inst_9092: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa60000ff; valaddr_reg:x3; val_offset:27276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27276*FLEN/8, x4, x1, x2) - -inst_9093: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa60001ff; valaddr_reg:x3; val_offset:27279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27279*FLEN/8, x4, x1, x2) - -inst_9094: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa60003ff; valaddr_reg:x3; val_offset:27282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27282*FLEN/8, x4, x1, x2) - -inst_9095: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa60007ff; valaddr_reg:x3; val_offset:27285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27285*FLEN/8, x4, x1, x2) - -inst_9096: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6000fff; valaddr_reg:x3; val_offset:27288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27288*FLEN/8, x4, x1, x2) - -inst_9097: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6001fff; valaddr_reg:x3; val_offset:27291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27291*FLEN/8, x4, x1, x2) - -inst_9098: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6003fff; valaddr_reg:x3; val_offset:27294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27294*FLEN/8, x4, x1, x2) - -inst_9099: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6007fff; valaddr_reg:x3; val_offset:27297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27297*FLEN/8, x4, x1, x2) - -inst_9100: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa600ffff; valaddr_reg:x3; val_offset:27300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27300*FLEN/8, x4, x1, x2) - -inst_9101: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa601ffff; valaddr_reg:x3; val_offset:27303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27303*FLEN/8, x4, x1, x2) - -inst_9102: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa603ffff; valaddr_reg:x3; val_offset:27306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27306*FLEN/8, x4, x1, x2) - -inst_9103: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa607ffff; valaddr_reg:x3; val_offset:27309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27309*FLEN/8, x4, x1, x2) - -inst_9104: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa60fffff; valaddr_reg:x3; val_offset:27312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27312*FLEN/8, x4, x1, x2) - -inst_9105: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa61fffff; valaddr_reg:x3; val_offset:27315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27315*FLEN/8, x4, x1, x2) - -inst_9106: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa63fffff; valaddr_reg:x3; val_offset:27318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27318*FLEN/8, x4, x1, x2) - -inst_9107: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6400000; valaddr_reg:x3; val_offset:27321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27321*FLEN/8, x4, x1, x2) - -inst_9108: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6600000; valaddr_reg:x3; val_offset:27324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27324*FLEN/8, x4, x1, x2) - -inst_9109: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6700000; valaddr_reg:x3; val_offset:27327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27327*FLEN/8, x4, x1, x2) - -inst_9110: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa6780000; valaddr_reg:x3; val_offset:27330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27330*FLEN/8, x4, x1, x2) - -inst_9111: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67c0000; valaddr_reg:x3; val_offset:27333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27333*FLEN/8, x4, x1, x2) - -inst_9112: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67e0000; valaddr_reg:x3; val_offset:27336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27336*FLEN/8, x4, x1, x2) - -inst_9113: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67f0000; valaddr_reg:x3; val_offset:27339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27339*FLEN/8, x4, x1, x2) - -inst_9114: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67f8000; valaddr_reg:x3; val_offset:27342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27342*FLEN/8, x4, x1, x2) - -inst_9115: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67fc000; valaddr_reg:x3; val_offset:27345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27345*FLEN/8, x4, x1, x2) - -inst_9116: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67fe000; valaddr_reg:x3; val_offset:27348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27348*FLEN/8, x4, x1, x2) - -inst_9117: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67ff000; valaddr_reg:x3; val_offset:27351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27351*FLEN/8, x4, x1, x2) - -inst_9118: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67ff800; valaddr_reg:x3; val_offset:27354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27354*FLEN/8, x4, x1, x2) - -inst_9119: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67ffc00; valaddr_reg:x3; val_offset:27357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27357*FLEN/8, x4, x1, x2) - -inst_9120: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67ffe00; valaddr_reg:x3; val_offset:27360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27360*FLEN/8, x4, x1, x2) - -inst_9121: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67fff00; valaddr_reg:x3; val_offset:27363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27363*FLEN/8, x4, x1, x2) - -inst_9122: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67fff80; valaddr_reg:x3; val_offset:27366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27366*FLEN/8, x4, x1, x2) - -inst_9123: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67fffc0; valaddr_reg:x3; val_offset:27369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27369*FLEN/8, x4, x1, x2) - -inst_9124: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67fffe0; valaddr_reg:x3; val_offset:27372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27372*FLEN/8, x4, x1, x2) - -inst_9125: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67ffff0; valaddr_reg:x3; val_offset:27375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27375*FLEN/8, x4, x1, x2) - -inst_9126: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67ffff8; valaddr_reg:x3; val_offset:27378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27378*FLEN/8, x4, x1, x2) - -inst_9127: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67ffffc; valaddr_reg:x3; val_offset:27381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27381*FLEN/8, x4, x1, x2) - -inst_9128: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67ffffe; valaddr_reg:x3; val_offset:27384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27384*FLEN/8, x4, x1, x2) - -inst_9129: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xa67fffff; valaddr_reg:x3; val_offset:27387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27387*FLEN/8, x4, x1, x2) - -inst_9130: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbf800001; valaddr_reg:x3; val_offset:27390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27390*FLEN/8, x4, x1, x2) - -inst_9131: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbf800003; valaddr_reg:x3; val_offset:27393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27393*FLEN/8, x4, x1, x2) - -inst_9132: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbf800007; valaddr_reg:x3; val_offset:27396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27396*FLEN/8, x4, x1, x2) - -inst_9133: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbf999999; valaddr_reg:x3; val_offset:27399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27399*FLEN/8, x4, x1, x2) - -inst_9134: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:27402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27402*FLEN/8, x4, x1, x2) - -inst_9135: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:27405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27405*FLEN/8, x4, x1, x2) - -inst_9136: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:27408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27408*FLEN/8, x4, x1, x2) - -inst_9137: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:27411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27411*FLEN/8, x4, x1, x2) - -inst_9138: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:27414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27414*FLEN/8, x4, x1, x2) - -inst_9139: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:27417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27417*FLEN/8, x4, x1, x2) - -inst_9140: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:27420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27420*FLEN/8, x4, x1, x2) - -inst_9141: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:27423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27423*FLEN/8, x4, x1, x2) - -inst_9142: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:27426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27426*FLEN/8, x4, x1, x2) - -inst_9143: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:27429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27429*FLEN/8, x4, x1, x2) - -inst_9144: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:27432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27432*FLEN/8, x4, x1, x2) - -inst_9145: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:27435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27435*FLEN/8, x4, x1, x2) - -inst_9146: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:27438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27438*FLEN/8, x4, x1, x2) - -inst_9147: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:27441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27441*FLEN/8, x4, x1, x2) - -inst_9148: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:27444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27444*FLEN/8, x4, x1, x2) - -inst_9149: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:27447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27447*FLEN/8, x4, x1, x2) - -inst_9150: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:27450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27450*FLEN/8, x4, x1, x2) - -inst_9151: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:27453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27453*FLEN/8, x4, x1, x2) - -inst_9152: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:27456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27456*FLEN/8, x4, x1, x2) - -inst_9153: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:27459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27459*FLEN/8, x4, x1, x2) - -inst_9154: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:27462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27462*FLEN/8, x4, x1, x2) - -inst_9155: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:27465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27465*FLEN/8, x4, x1, x2) - -inst_9156: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:27468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27468*FLEN/8, x4, x1, x2) - -inst_9157: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:27471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27471*FLEN/8, x4, x1, x2) - -inst_9158: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:27474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27474*FLEN/8, x4, x1, x2) - -inst_9159: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:27477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27477*FLEN/8, x4, x1, x2) - -inst_9160: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:27480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27480*FLEN/8, x4, x1, x2) - -inst_9161: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:27483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27483*FLEN/8, x4, x1, x2) - -inst_9162: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc800000; valaddr_reg:x3; val_offset:27486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27486*FLEN/8, x4, x1, x2) - -inst_9163: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc800001; valaddr_reg:x3; val_offset:27489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27489*FLEN/8, x4, x1, x2) - -inst_9164: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc800003; valaddr_reg:x3; val_offset:27492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27492*FLEN/8, x4, x1, x2) - -inst_9165: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc800007; valaddr_reg:x3; val_offset:27495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27495*FLEN/8, x4, x1, x2) - -inst_9166: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc80000f; valaddr_reg:x3; val_offset:27498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27498*FLEN/8, x4, x1, x2) - -inst_9167: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc80001f; valaddr_reg:x3; val_offset:27501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27501*FLEN/8, x4, x1, x2) - -inst_9168: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc80003f; valaddr_reg:x3; val_offset:27504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27504*FLEN/8, x4, x1, x2) - -inst_9169: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc80007f; valaddr_reg:x3; val_offset:27507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27507*FLEN/8, x4, x1, x2) - -inst_9170: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc8000ff; valaddr_reg:x3; val_offset:27510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27510*FLEN/8, x4, x1, x2) - -inst_9171: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc8001ff; valaddr_reg:x3; val_offset:27513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27513*FLEN/8, x4, x1, x2) - -inst_9172: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc8003ff; valaddr_reg:x3; val_offset:27516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27516*FLEN/8, x4, x1, x2) - -inst_9173: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc8007ff; valaddr_reg:x3; val_offset:27519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27519*FLEN/8, x4, x1, x2) - -inst_9174: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc800fff; valaddr_reg:x3; val_offset:27522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27522*FLEN/8, x4, x1, x2) - -inst_9175: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc801fff; valaddr_reg:x3; val_offset:27525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27525*FLEN/8, x4, x1, x2) - -inst_9176: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc803fff; valaddr_reg:x3; val_offset:27528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27528*FLEN/8, x4, x1, x2) - -inst_9177: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc807fff; valaddr_reg:x3; val_offset:27531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27531*FLEN/8, x4, x1, x2) - -inst_9178: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc80ffff; valaddr_reg:x3; val_offset:27534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27534*FLEN/8, x4, x1, x2) - -inst_9179: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc81ffff; valaddr_reg:x3; val_offset:27537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27537*FLEN/8, x4, x1, x2) - -inst_9180: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc83ffff; valaddr_reg:x3; val_offset:27540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27540*FLEN/8, x4, x1, x2) - -inst_9181: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc87ffff; valaddr_reg:x3; val_offset:27543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27543*FLEN/8, x4, x1, x2) - -inst_9182: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc8fffff; valaddr_reg:x3; val_offset:27546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27546*FLEN/8, x4, x1, x2) - -inst_9183: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xc9fffff; valaddr_reg:x3; val_offset:27549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27549*FLEN/8, x4, x1, x2) - -inst_9184: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcbfffff; valaddr_reg:x3; val_offset:27552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27552*FLEN/8, x4, x1, x2) - -inst_9185: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcc00000; valaddr_reg:x3; val_offset:27555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27555*FLEN/8, x4, x1, x2) - -inst_9186: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xce00000; valaddr_reg:x3; val_offset:27558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27558*FLEN/8, x4, x1, x2) - -inst_9187: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcf00000; valaddr_reg:x3; val_offset:27561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27561*FLEN/8, x4, x1, x2) - -inst_9188: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcf80000; valaddr_reg:x3; val_offset:27564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27564*FLEN/8, x4, x1, x2) - -inst_9189: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfc0000; valaddr_reg:x3; val_offset:27567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27567*FLEN/8, x4, x1, x2) - -inst_9190: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfe0000; valaddr_reg:x3; val_offset:27570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27570*FLEN/8, x4, x1, x2) - -inst_9191: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcff0000; valaddr_reg:x3; val_offset:27573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27573*FLEN/8, x4, x1, x2) - -inst_9192: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcff8000; valaddr_reg:x3; val_offset:27576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27576*FLEN/8, x4, x1, x2) - -inst_9193: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcffc000; valaddr_reg:x3; val_offset:27579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27579*FLEN/8, x4, x1, x2) - -inst_9194: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcffe000; valaddr_reg:x3; val_offset:27582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27582*FLEN/8, x4, x1, x2) - -inst_9195: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfff000; valaddr_reg:x3; val_offset:27585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27585*FLEN/8, x4, x1, x2) - -inst_9196: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfff800; valaddr_reg:x3; val_offset:27588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27588*FLEN/8, x4, x1, x2) - -inst_9197: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfffc00; valaddr_reg:x3; val_offset:27591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27591*FLEN/8, x4, x1, x2) - -inst_9198: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfffe00; valaddr_reg:x3; val_offset:27594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27594*FLEN/8, x4, x1, x2) - -inst_9199: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcffff00; valaddr_reg:x3; val_offset:27597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27597*FLEN/8, x4, x1, x2) - -inst_9200: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcffff80; valaddr_reg:x3; val_offset:27600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27600*FLEN/8, x4, x1, x2) - -inst_9201: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcffffc0; valaddr_reg:x3; val_offset:27603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27603*FLEN/8, x4, x1, x2) - -inst_9202: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcffffe0; valaddr_reg:x3; val_offset:27606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27606*FLEN/8, x4, x1, x2) - -inst_9203: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfffff0; valaddr_reg:x3; val_offset:27609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27609*FLEN/8, x4, x1, x2) - -inst_9204: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfffff8; valaddr_reg:x3; val_offset:27612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27612*FLEN/8, x4, x1, x2) - -inst_9205: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfffffc; valaddr_reg:x3; val_offset:27615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27615*FLEN/8, x4, x1, x2) - -inst_9206: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcfffffe; valaddr_reg:x3; val_offset:27618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27618*FLEN/8, x4, x1, x2) - -inst_9207: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; -op3val:0xcffffff; valaddr_reg:x3; val_offset:27621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27621*FLEN/8, x4, x1, x2) - -inst_9208: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64800000; valaddr_reg:x3; val_offset:27624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27624*FLEN/8, x4, x1, x2) - -inst_9209: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64800001; valaddr_reg:x3; val_offset:27627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27627*FLEN/8, x4, x1, x2) - -inst_9210: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64800003; valaddr_reg:x3; val_offset:27630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27630*FLEN/8, x4, x1, x2) - -inst_9211: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64800007; valaddr_reg:x3; val_offset:27633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27633*FLEN/8, x4, x1, x2) - -inst_9212: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x6480000f; valaddr_reg:x3; val_offset:27636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27636*FLEN/8, x4, x1, x2) - -inst_9213: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x6480001f; valaddr_reg:x3; val_offset:27639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27639*FLEN/8, x4, x1, x2) - -inst_9214: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x6480003f; valaddr_reg:x3; val_offset:27642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27642*FLEN/8, x4, x1, x2) - -inst_9215: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x6480007f; valaddr_reg:x3; val_offset:27645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27645*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_73) - -inst_9216: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x648000ff; valaddr_reg:x3; val_offset:27648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27648*FLEN/8, x4, x1, x2) - -inst_9217: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x648001ff; valaddr_reg:x3; val_offset:27651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27651*FLEN/8, x4, x1, x2) - -inst_9218: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x648003ff; valaddr_reg:x3; val_offset:27654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27654*FLEN/8, x4, x1, x2) - -inst_9219: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x648007ff; valaddr_reg:x3; val_offset:27657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27657*FLEN/8, x4, x1, x2) - -inst_9220: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64800fff; valaddr_reg:x3; val_offset:27660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27660*FLEN/8, x4, x1, x2) - -inst_9221: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64801fff; valaddr_reg:x3; val_offset:27663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27663*FLEN/8, x4, x1, x2) - -inst_9222: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64803fff; valaddr_reg:x3; val_offset:27666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27666*FLEN/8, x4, x1, x2) - -inst_9223: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64807fff; valaddr_reg:x3; val_offset:27669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27669*FLEN/8, x4, x1, x2) - -inst_9224: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x6480ffff; valaddr_reg:x3; val_offset:27672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27672*FLEN/8, x4, x1, x2) - -inst_9225: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x6481ffff; valaddr_reg:x3; val_offset:27675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27675*FLEN/8, x4, x1, x2) - -inst_9226: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x6483ffff; valaddr_reg:x3; val_offset:27678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27678*FLEN/8, x4, x1, x2) - -inst_9227: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x6487ffff; valaddr_reg:x3; val_offset:27681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27681*FLEN/8, x4, x1, x2) - -inst_9228: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x648fffff; valaddr_reg:x3; val_offset:27684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27684*FLEN/8, x4, x1, x2) - -inst_9229: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x649fffff; valaddr_reg:x3; val_offset:27687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27687*FLEN/8, x4, x1, x2) - -inst_9230: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64bfffff; valaddr_reg:x3; val_offset:27690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27690*FLEN/8, x4, x1, x2) - -inst_9231: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64c00000; valaddr_reg:x3; val_offset:27693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27693*FLEN/8, x4, x1, x2) - -inst_9232: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64e00000; valaddr_reg:x3; val_offset:27696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27696*FLEN/8, x4, x1, x2) - -inst_9233: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64f00000; valaddr_reg:x3; val_offset:27699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27699*FLEN/8, x4, x1, x2) - -inst_9234: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64f80000; valaddr_reg:x3; val_offset:27702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27702*FLEN/8, x4, x1, x2) - -inst_9235: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fc0000; valaddr_reg:x3; val_offset:27705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27705*FLEN/8, x4, x1, x2) - -inst_9236: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fe0000; valaddr_reg:x3; val_offset:27708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27708*FLEN/8, x4, x1, x2) - -inst_9237: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ff0000; valaddr_reg:x3; val_offset:27711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27711*FLEN/8, x4, x1, x2) - -inst_9238: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ff8000; valaddr_reg:x3; val_offset:27714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27714*FLEN/8, x4, x1, x2) - -inst_9239: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ffc000; valaddr_reg:x3; val_offset:27717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27717*FLEN/8, x4, x1, x2) - -inst_9240: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ffe000; valaddr_reg:x3; val_offset:27720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27720*FLEN/8, x4, x1, x2) - -inst_9241: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fff000; valaddr_reg:x3; val_offset:27723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27723*FLEN/8, x4, x1, x2) - -inst_9242: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fff800; valaddr_reg:x3; val_offset:27726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27726*FLEN/8, x4, x1, x2) - -inst_9243: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fffc00; valaddr_reg:x3; val_offset:27729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27729*FLEN/8, x4, x1, x2) - -inst_9244: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fffe00; valaddr_reg:x3; val_offset:27732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27732*FLEN/8, x4, x1, x2) - -inst_9245: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ffff00; valaddr_reg:x3; val_offset:27735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27735*FLEN/8, x4, x1, x2) - -inst_9246: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ffff80; valaddr_reg:x3; val_offset:27738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27738*FLEN/8, x4, x1, x2) - -inst_9247: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ffffc0; valaddr_reg:x3; val_offset:27741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27741*FLEN/8, x4, x1, x2) - -inst_9248: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ffffe0; valaddr_reg:x3; val_offset:27744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27744*FLEN/8, x4, x1, x2) - -inst_9249: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fffff0; valaddr_reg:x3; val_offset:27747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27747*FLEN/8, x4, x1, x2) - -inst_9250: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fffff8; valaddr_reg:x3; val_offset:27750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27750*FLEN/8, x4, x1, x2) - -inst_9251: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fffffc; valaddr_reg:x3; val_offset:27753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27753*FLEN/8, x4, x1, x2) - -inst_9252: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64fffffe; valaddr_reg:x3; val_offset:27756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27756*FLEN/8, x4, x1, x2) - -inst_9253: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x64ffffff; valaddr_reg:x3; val_offset:27759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27759*FLEN/8, x4, x1, x2) - -inst_9254: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f000001; valaddr_reg:x3; val_offset:27762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27762*FLEN/8, x4, x1, x2) - -inst_9255: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f000003; valaddr_reg:x3; val_offset:27765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27765*FLEN/8, x4, x1, x2) - -inst_9256: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f000007; valaddr_reg:x3; val_offset:27768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27768*FLEN/8, x4, x1, x2) - -inst_9257: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f199999; valaddr_reg:x3; val_offset:27771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27771*FLEN/8, x4, x1, x2) - -inst_9258: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f249249; valaddr_reg:x3; val_offset:27774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27774*FLEN/8, x4, x1, x2) - -inst_9259: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f333333; valaddr_reg:x3; val_offset:27777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27777*FLEN/8, x4, x1, x2) - -inst_9260: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:27780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27780*FLEN/8, x4, x1, x2) - -inst_9261: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:27783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27783*FLEN/8, x4, x1, x2) - -inst_9262: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f444444; valaddr_reg:x3; val_offset:27786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27786*FLEN/8, x4, x1, x2) - -inst_9263: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:27789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27789*FLEN/8, x4, x1, x2) - -inst_9264: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:27792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27792*FLEN/8, x4, x1, x2) - -inst_9265: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f666666; valaddr_reg:x3; val_offset:27795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27795*FLEN/8, x4, x1, x2) - -inst_9266: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:27798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27798*FLEN/8, x4, x1, x2) - -inst_9267: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:27801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27801*FLEN/8, x4, x1, x2) - -inst_9268: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:27804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27804*FLEN/8, x4, x1, x2) - -inst_9269: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:27807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27807*FLEN/8, x4, x1, x2) - -inst_9270: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0800000; valaddr_reg:x3; val_offset:27810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27810*FLEN/8, x4, x1, x2) - -inst_9271: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0800001; valaddr_reg:x3; val_offset:27813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27813*FLEN/8, x4, x1, x2) - -inst_9272: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0800003; valaddr_reg:x3; val_offset:27816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27816*FLEN/8, x4, x1, x2) - -inst_9273: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0800007; valaddr_reg:x3; val_offset:27819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27819*FLEN/8, x4, x1, x2) - -inst_9274: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf080000f; valaddr_reg:x3; val_offset:27822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27822*FLEN/8, x4, x1, x2) - -inst_9275: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf080001f; valaddr_reg:x3; val_offset:27825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27825*FLEN/8, x4, x1, x2) - -inst_9276: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf080003f; valaddr_reg:x3; val_offset:27828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27828*FLEN/8, x4, x1, x2) - -inst_9277: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf080007f; valaddr_reg:x3; val_offset:27831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27831*FLEN/8, x4, x1, x2) - -inst_9278: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf08000ff; valaddr_reg:x3; val_offset:27834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27834*FLEN/8, x4, x1, x2) - -inst_9279: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf08001ff; valaddr_reg:x3; val_offset:27837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27837*FLEN/8, x4, x1, x2) - -inst_9280: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf08003ff; valaddr_reg:x3; val_offset:27840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27840*FLEN/8, x4, x1, x2) - -inst_9281: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf08007ff; valaddr_reg:x3; val_offset:27843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27843*FLEN/8, x4, x1, x2) - -inst_9282: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0800fff; valaddr_reg:x3; val_offset:27846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27846*FLEN/8, x4, x1, x2) - -inst_9283: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0801fff; valaddr_reg:x3; val_offset:27849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27849*FLEN/8, x4, x1, x2) - -inst_9284: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0803fff; valaddr_reg:x3; val_offset:27852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27852*FLEN/8, x4, x1, x2) - -inst_9285: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0807fff; valaddr_reg:x3; val_offset:27855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27855*FLEN/8, x4, x1, x2) - -inst_9286: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf080ffff; valaddr_reg:x3; val_offset:27858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27858*FLEN/8, x4, x1, x2) - -inst_9287: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf081ffff; valaddr_reg:x3; val_offset:27861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27861*FLEN/8, x4, x1, x2) - -inst_9288: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf083ffff; valaddr_reg:x3; val_offset:27864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27864*FLEN/8, x4, x1, x2) - -inst_9289: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf087ffff; valaddr_reg:x3; val_offset:27867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27867*FLEN/8, x4, x1, x2) - -inst_9290: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf08fffff; valaddr_reg:x3; val_offset:27870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27870*FLEN/8, x4, x1, x2) - -inst_9291: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf09fffff; valaddr_reg:x3; val_offset:27873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27873*FLEN/8, x4, x1, x2) - -inst_9292: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0bfffff; valaddr_reg:x3; val_offset:27876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27876*FLEN/8, x4, x1, x2) - -inst_9293: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0c00000; valaddr_reg:x3; val_offset:27879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27879*FLEN/8, x4, x1, x2) - -inst_9294: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0e00000; valaddr_reg:x3; val_offset:27882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27882*FLEN/8, x4, x1, x2) - -inst_9295: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0f00000; valaddr_reg:x3; val_offset:27885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27885*FLEN/8, x4, x1, x2) - -inst_9296: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0f80000; valaddr_reg:x3; val_offset:27888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27888*FLEN/8, x4, x1, x2) - -inst_9297: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fc0000; valaddr_reg:x3; val_offset:27891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27891*FLEN/8, x4, x1, x2) - -inst_9298: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fe0000; valaddr_reg:x3; val_offset:27894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27894*FLEN/8, x4, x1, x2) - -inst_9299: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ff0000; valaddr_reg:x3; val_offset:27897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27897*FLEN/8, x4, x1, x2) - -inst_9300: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ff8000; valaddr_reg:x3; val_offset:27900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27900*FLEN/8, x4, x1, x2) - -inst_9301: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ffc000; valaddr_reg:x3; val_offset:27903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27903*FLEN/8, x4, x1, x2) - -inst_9302: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ffe000; valaddr_reg:x3; val_offset:27906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27906*FLEN/8, x4, x1, x2) - -inst_9303: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fff000; valaddr_reg:x3; val_offset:27909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27909*FLEN/8, x4, x1, x2) - -inst_9304: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fff800; valaddr_reg:x3; val_offset:27912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27912*FLEN/8, x4, x1, x2) - -inst_9305: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fffc00; valaddr_reg:x3; val_offset:27915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27915*FLEN/8, x4, x1, x2) - -inst_9306: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fffe00; valaddr_reg:x3; val_offset:27918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27918*FLEN/8, x4, x1, x2) - -inst_9307: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ffff00; valaddr_reg:x3; val_offset:27921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27921*FLEN/8, x4, x1, x2) - -inst_9308: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ffff80; valaddr_reg:x3; val_offset:27924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27924*FLEN/8, x4, x1, x2) - -inst_9309: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ffffc0; valaddr_reg:x3; val_offset:27927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27927*FLEN/8, x4, x1, x2) - -inst_9310: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ffffe0; valaddr_reg:x3; val_offset:27930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27930*FLEN/8, x4, x1, x2) - -inst_9311: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fffff0; valaddr_reg:x3; val_offset:27933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27933*FLEN/8, x4, x1, x2) - -inst_9312: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fffff8; valaddr_reg:x3; val_offset:27936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27936*FLEN/8, x4, x1, x2) - -inst_9313: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fffffc; valaddr_reg:x3; val_offset:27939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27939*FLEN/8, x4, x1, x2) - -inst_9314: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0fffffe; valaddr_reg:x3; val_offset:27942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27942*FLEN/8, x4, x1, x2) - -inst_9315: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xf0ffffff; valaddr_reg:x3; val_offset:27945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27945*FLEN/8, x4, x1, x2) - -inst_9316: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff000001; valaddr_reg:x3; val_offset:27948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27948*FLEN/8, x4, x1, x2) - -inst_9317: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff000003; valaddr_reg:x3; val_offset:27951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27951*FLEN/8, x4, x1, x2) - -inst_9318: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff000007; valaddr_reg:x3; val_offset:27954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27954*FLEN/8, x4, x1, x2) - -inst_9319: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff199999; valaddr_reg:x3; val_offset:27957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27957*FLEN/8, x4, x1, x2) - -inst_9320: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff249249; valaddr_reg:x3; val_offset:27960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27960*FLEN/8, x4, x1, x2) - -inst_9321: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff333333; valaddr_reg:x3; val_offset:27963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27963*FLEN/8, x4, x1, x2) - -inst_9322: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:27966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27966*FLEN/8, x4, x1, x2) - -inst_9323: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:27969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27969*FLEN/8, x4, x1, x2) - -inst_9324: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff444444; valaddr_reg:x3; val_offset:27972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27972*FLEN/8, x4, x1, x2) - -inst_9325: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:27975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27975*FLEN/8, x4, x1, x2) - -inst_9326: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:27978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27978*FLEN/8, x4, x1, x2) - -inst_9327: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff666666; valaddr_reg:x3; val_offset:27981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27981*FLEN/8, x4, x1, x2) - -inst_9328: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:27984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27984*FLEN/8, x4, x1, x2) - -inst_9329: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:27987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27987*FLEN/8, x4, x1, x2) - -inst_9330: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:27990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27990*FLEN/8, x4, x1, x2) - -inst_9331: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:27993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27993*FLEN/8, x4, x1, x2) - -inst_9332: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a800000; valaddr_reg:x3; val_offset:27996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27996*FLEN/8, x4, x1, x2) - -inst_9333: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a800001; valaddr_reg:x3; val_offset:27999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27999*FLEN/8, x4, x1, x2) - -inst_9334: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a800003; valaddr_reg:x3; val_offset:28002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28002*FLEN/8, x4, x1, x2) - -inst_9335: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a800007; valaddr_reg:x3; val_offset:28005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28005*FLEN/8, x4, x1, x2) - -inst_9336: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a80000f; valaddr_reg:x3; val_offset:28008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28008*FLEN/8, x4, x1, x2) - -inst_9337: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a80001f; valaddr_reg:x3; val_offset:28011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28011*FLEN/8, x4, x1, x2) - -inst_9338: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a80003f; valaddr_reg:x3; val_offset:28014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28014*FLEN/8, x4, x1, x2) - -inst_9339: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a80007f; valaddr_reg:x3; val_offset:28017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28017*FLEN/8, x4, x1, x2) - -inst_9340: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a8000ff; valaddr_reg:x3; val_offset:28020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28020*FLEN/8, x4, x1, x2) - -inst_9341: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a8001ff; valaddr_reg:x3; val_offset:28023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28023*FLEN/8, x4, x1, x2) - -inst_9342: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a8003ff; valaddr_reg:x3; val_offset:28026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28026*FLEN/8, x4, x1, x2) - -inst_9343: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a8007ff; valaddr_reg:x3; val_offset:28029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28029*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_74) - -inst_9344: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a800fff; valaddr_reg:x3; val_offset:28032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28032*FLEN/8, x4, x1, x2) - -inst_9345: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a801fff; valaddr_reg:x3; val_offset:28035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28035*FLEN/8, x4, x1, x2) - -inst_9346: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a803fff; valaddr_reg:x3; val_offset:28038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28038*FLEN/8, x4, x1, x2) - -inst_9347: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a807fff; valaddr_reg:x3; val_offset:28041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28041*FLEN/8, x4, x1, x2) - -inst_9348: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a80ffff; valaddr_reg:x3; val_offset:28044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28044*FLEN/8, x4, x1, x2) - -inst_9349: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a81ffff; valaddr_reg:x3; val_offset:28047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28047*FLEN/8, x4, x1, x2) - -inst_9350: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a83ffff; valaddr_reg:x3; val_offset:28050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28050*FLEN/8, x4, x1, x2) - -inst_9351: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a87ffff; valaddr_reg:x3; val_offset:28053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28053*FLEN/8, x4, x1, x2) - -inst_9352: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a8fffff; valaddr_reg:x3; val_offset:28056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28056*FLEN/8, x4, x1, x2) - -inst_9353: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6a9fffff; valaddr_reg:x3; val_offset:28059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28059*FLEN/8, x4, x1, x2) - -inst_9354: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6abfffff; valaddr_reg:x3; val_offset:28062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28062*FLEN/8, x4, x1, x2) - -inst_9355: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6ac00000; valaddr_reg:x3; val_offset:28065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28065*FLEN/8, x4, x1, x2) - -inst_9356: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6ae00000; valaddr_reg:x3; val_offset:28068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28068*FLEN/8, x4, x1, x2) - -inst_9357: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6af00000; valaddr_reg:x3; val_offset:28071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28071*FLEN/8, x4, x1, x2) - -inst_9358: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6af80000; valaddr_reg:x3; val_offset:28074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28074*FLEN/8, x4, x1, x2) - -inst_9359: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afc0000; valaddr_reg:x3; val_offset:28077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28077*FLEN/8, x4, x1, x2) - -inst_9360: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afe0000; valaddr_reg:x3; val_offset:28080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28080*FLEN/8, x4, x1, x2) - -inst_9361: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6aff0000; valaddr_reg:x3; val_offset:28083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28083*FLEN/8, x4, x1, x2) - -inst_9362: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6aff8000; valaddr_reg:x3; val_offset:28086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28086*FLEN/8, x4, x1, x2) - -inst_9363: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6affc000; valaddr_reg:x3; val_offset:28089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28089*FLEN/8, x4, x1, x2) - -inst_9364: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6affe000; valaddr_reg:x3; val_offset:28092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28092*FLEN/8, x4, x1, x2) - -inst_9365: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afff000; valaddr_reg:x3; val_offset:28095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28095*FLEN/8, x4, x1, x2) - -inst_9366: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afff800; valaddr_reg:x3; val_offset:28098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28098*FLEN/8, x4, x1, x2) - -inst_9367: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afffc00; valaddr_reg:x3; val_offset:28101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28101*FLEN/8, x4, x1, x2) - -inst_9368: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afffe00; valaddr_reg:x3; val_offset:28104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28104*FLEN/8, x4, x1, x2) - -inst_9369: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6affff00; valaddr_reg:x3; val_offset:28107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28107*FLEN/8, x4, x1, x2) - -inst_9370: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6affff80; valaddr_reg:x3; val_offset:28110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28110*FLEN/8, x4, x1, x2) - -inst_9371: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6affffc0; valaddr_reg:x3; val_offset:28113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28113*FLEN/8, x4, x1, x2) - -inst_9372: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6affffe0; valaddr_reg:x3; val_offset:28116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28116*FLEN/8, x4, x1, x2) - -inst_9373: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afffff0; valaddr_reg:x3; val_offset:28119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28119*FLEN/8, x4, x1, x2) - -inst_9374: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afffff8; valaddr_reg:x3; val_offset:28122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28122*FLEN/8, x4, x1, x2) - -inst_9375: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afffffc; valaddr_reg:x3; val_offset:28125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28125*FLEN/8, x4, x1, x2) - -inst_9376: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6afffffe; valaddr_reg:x3; val_offset:28128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28128*FLEN/8, x4, x1, x2) - -inst_9377: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x6affffff; valaddr_reg:x3; val_offset:28131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28131*FLEN/8, x4, x1, x2) - -inst_9378: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f000001; valaddr_reg:x3; val_offset:28134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28134*FLEN/8, x4, x1, x2) - -inst_9379: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f000003; valaddr_reg:x3; val_offset:28137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28137*FLEN/8, x4, x1, x2) - -inst_9380: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f000007; valaddr_reg:x3; val_offset:28140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28140*FLEN/8, x4, x1, x2) - -inst_9381: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f199999; valaddr_reg:x3; val_offset:28143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28143*FLEN/8, x4, x1, x2) - -inst_9382: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f249249; valaddr_reg:x3; val_offset:28146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28146*FLEN/8, x4, x1, x2) - -inst_9383: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f333333; valaddr_reg:x3; val_offset:28149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28149*FLEN/8, x4, x1, x2) - -inst_9384: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:28152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28152*FLEN/8, x4, x1, x2) - -inst_9385: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:28155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28155*FLEN/8, x4, x1, x2) - -inst_9386: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f444444; valaddr_reg:x3; val_offset:28158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28158*FLEN/8, x4, x1, x2) - -inst_9387: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:28161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28161*FLEN/8, x4, x1, x2) - -inst_9388: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:28164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28164*FLEN/8, x4, x1, x2) - -inst_9389: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f666666; valaddr_reg:x3; val_offset:28167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28167*FLEN/8, x4, x1, x2) - -inst_9390: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:28170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28170*FLEN/8, x4, x1, x2) - -inst_9391: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:28173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28173*FLEN/8, x4, x1, x2) - -inst_9392: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:28176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28176*FLEN/8, x4, x1, x2) - -inst_9393: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:28179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28179*FLEN/8, x4, x1, x2) - -inst_9394: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:28182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28182*FLEN/8, x4, x1, x2) - -inst_9395: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:28185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28185*FLEN/8, x4, x1, x2) - -inst_9396: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:28188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28188*FLEN/8, x4, x1, x2) - -inst_9397: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:28191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28191*FLEN/8, x4, x1, x2) - -inst_9398: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:28194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28194*FLEN/8, x4, x1, x2) - -inst_9399: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:28197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28197*FLEN/8, x4, x1, x2) - -inst_9400: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:28200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28200*FLEN/8, x4, x1, x2) - -inst_9401: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:28203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28203*FLEN/8, x4, x1, x2) - -inst_9402: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:28206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28206*FLEN/8, x4, x1, x2) - -inst_9403: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:28209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28209*FLEN/8, x4, x1, x2) - -inst_9404: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:28212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28212*FLEN/8, x4, x1, x2) - -inst_9405: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:28215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28215*FLEN/8, x4, x1, x2) - -inst_9406: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:28218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28218*FLEN/8, x4, x1, x2) - -inst_9407: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:28221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28221*FLEN/8, x4, x1, x2) - -inst_9408: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:28224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28224*FLEN/8, x4, x1, x2) - -inst_9409: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:28227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28227*FLEN/8, x4, x1, x2) - -inst_9410: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88000000; valaddr_reg:x3; val_offset:28230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28230*FLEN/8, x4, x1, x2) - -inst_9411: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88000001; valaddr_reg:x3; val_offset:28233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28233*FLEN/8, x4, x1, x2) - -inst_9412: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88000003; valaddr_reg:x3; val_offset:28236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28236*FLEN/8, x4, x1, x2) - -inst_9413: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88000007; valaddr_reg:x3; val_offset:28239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28239*FLEN/8, x4, x1, x2) - -inst_9414: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8800000f; valaddr_reg:x3; val_offset:28242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28242*FLEN/8, x4, x1, x2) - -inst_9415: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8800001f; valaddr_reg:x3; val_offset:28245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28245*FLEN/8, x4, x1, x2) - -inst_9416: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8800003f; valaddr_reg:x3; val_offset:28248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28248*FLEN/8, x4, x1, x2) - -inst_9417: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8800007f; valaddr_reg:x3; val_offset:28251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28251*FLEN/8, x4, x1, x2) - -inst_9418: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x880000ff; valaddr_reg:x3; val_offset:28254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28254*FLEN/8, x4, x1, x2) - -inst_9419: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x880001ff; valaddr_reg:x3; val_offset:28257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28257*FLEN/8, x4, x1, x2) - -inst_9420: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x880003ff; valaddr_reg:x3; val_offset:28260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28260*FLEN/8, x4, x1, x2) - -inst_9421: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x880007ff; valaddr_reg:x3; val_offset:28263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28263*FLEN/8, x4, x1, x2) - -inst_9422: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88000fff; valaddr_reg:x3; val_offset:28266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28266*FLEN/8, x4, x1, x2) - -inst_9423: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88001fff; valaddr_reg:x3; val_offset:28269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28269*FLEN/8, x4, x1, x2) - -inst_9424: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88003fff; valaddr_reg:x3; val_offset:28272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28272*FLEN/8, x4, x1, x2) - -inst_9425: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88007fff; valaddr_reg:x3; val_offset:28275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28275*FLEN/8, x4, x1, x2) - -inst_9426: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8800ffff; valaddr_reg:x3; val_offset:28278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28278*FLEN/8, x4, x1, x2) - -inst_9427: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8801ffff; valaddr_reg:x3; val_offset:28281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28281*FLEN/8, x4, x1, x2) - -inst_9428: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8803ffff; valaddr_reg:x3; val_offset:28284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28284*FLEN/8, x4, x1, x2) - -inst_9429: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x8807ffff; valaddr_reg:x3; val_offset:28287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28287*FLEN/8, x4, x1, x2) - -inst_9430: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x880fffff; valaddr_reg:x3; val_offset:28290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28290*FLEN/8, x4, x1, x2) - -inst_9431: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x881fffff; valaddr_reg:x3; val_offset:28293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28293*FLEN/8, x4, x1, x2) - -inst_9432: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x883fffff; valaddr_reg:x3; val_offset:28296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28296*FLEN/8, x4, x1, x2) - -inst_9433: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88400000; valaddr_reg:x3; val_offset:28299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28299*FLEN/8, x4, x1, x2) - -inst_9434: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88600000; valaddr_reg:x3; val_offset:28302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28302*FLEN/8, x4, x1, x2) - -inst_9435: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88700000; valaddr_reg:x3; val_offset:28305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28305*FLEN/8, x4, x1, x2) - -inst_9436: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x88780000; valaddr_reg:x3; val_offset:28308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28308*FLEN/8, x4, x1, x2) - -inst_9437: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887c0000; valaddr_reg:x3; val_offset:28311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28311*FLEN/8, x4, x1, x2) - -inst_9438: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887e0000; valaddr_reg:x3; val_offset:28314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28314*FLEN/8, x4, x1, x2) - -inst_9439: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887f0000; valaddr_reg:x3; val_offset:28317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28317*FLEN/8, x4, x1, x2) - -inst_9440: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887f8000; valaddr_reg:x3; val_offset:28320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28320*FLEN/8, x4, x1, x2) - -inst_9441: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887fc000; valaddr_reg:x3; val_offset:28323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28323*FLEN/8, x4, x1, x2) - -inst_9442: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887fe000; valaddr_reg:x3; val_offset:28326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28326*FLEN/8, x4, x1, x2) - -inst_9443: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887ff000; valaddr_reg:x3; val_offset:28329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28329*FLEN/8, x4, x1, x2) - -inst_9444: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887ff800; valaddr_reg:x3; val_offset:28332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28332*FLEN/8, x4, x1, x2) - -inst_9445: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887ffc00; valaddr_reg:x3; val_offset:28335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28335*FLEN/8, x4, x1, x2) - -inst_9446: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887ffe00; valaddr_reg:x3; val_offset:28338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28338*FLEN/8, x4, x1, x2) - -inst_9447: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887fff00; valaddr_reg:x3; val_offset:28341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28341*FLEN/8, x4, x1, x2) - -inst_9448: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887fff80; valaddr_reg:x3; val_offset:28344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28344*FLEN/8, x4, x1, x2) - -inst_9449: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887fffc0; valaddr_reg:x3; val_offset:28347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28347*FLEN/8, x4, x1, x2) - -inst_9450: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887fffe0; valaddr_reg:x3; val_offset:28350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28350*FLEN/8, x4, x1, x2) - -inst_9451: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887ffff0; valaddr_reg:x3; val_offset:28353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28353*FLEN/8, x4, x1, x2) - -inst_9452: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887ffff8; valaddr_reg:x3; val_offset:28356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28356*FLEN/8, x4, x1, x2) - -inst_9453: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887ffffc; valaddr_reg:x3; val_offset:28359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28359*FLEN/8, x4, x1, x2) - -inst_9454: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887ffffe; valaddr_reg:x3; val_offset:28362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28362*FLEN/8, x4, x1, x2) - -inst_9455: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; -op3val:0x887fffff; valaddr_reg:x3; val_offset:28365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28365*FLEN/8, x4, x1, x2) - -inst_9456: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25000000; valaddr_reg:x3; val_offset:28368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28368*FLEN/8, x4, x1, x2) - -inst_9457: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25000001; valaddr_reg:x3; val_offset:28371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28371*FLEN/8, x4, x1, x2) - -inst_9458: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25000003; valaddr_reg:x3; val_offset:28374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28374*FLEN/8, x4, x1, x2) - -inst_9459: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25000007; valaddr_reg:x3; val_offset:28377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28377*FLEN/8, x4, x1, x2) - -inst_9460: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x2500000f; valaddr_reg:x3; val_offset:28380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28380*FLEN/8, x4, x1, x2) - -inst_9461: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x2500001f; valaddr_reg:x3; val_offset:28383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28383*FLEN/8, x4, x1, x2) - -inst_9462: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x2500003f; valaddr_reg:x3; val_offset:28386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28386*FLEN/8, x4, x1, x2) - -inst_9463: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x2500007f; valaddr_reg:x3; val_offset:28389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28389*FLEN/8, x4, x1, x2) - -inst_9464: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x250000ff; valaddr_reg:x3; val_offset:28392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28392*FLEN/8, x4, x1, x2) - -inst_9465: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x250001ff; valaddr_reg:x3; val_offset:28395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28395*FLEN/8, x4, x1, x2) - -inst_9466: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x250003ff; valaddr_reg:x3; val_offset:28398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28398*FLEN/8, x4, x1, x2) - -inst_9467: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x250007ff; valaddr_reg:x3; val_offset:28401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28401*FLEN/8, x4, x1, x2) - -inst_9468: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25000fff; valaddr_reg:x3; val_offset:28404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28404*FLEN/8, x4, x1, x2) - -inst_9469: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25001fff; valaddr_reg:x3; val_offset:28407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28407*FLEN/8, x4, x1, x2) - -inst_9470: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25003fff; valaddr_reg:x3; val_offset:28410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28410*FLEN/8, x4, x1, x2) - -inst_9471: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25007fff; valaddr_reg:x3; val_offset:28413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28413*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_75) - -inst_9472: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x2500ffff; valaddr_reg:x3; val_offset:28416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28416*FLEN/8, x4, x1, x2) - -inst_9473: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x2501ffff; valaddr_reg:x3; val_offset:28419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28419*FLEN/8, x4, x1, x2) - -inst_9474: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x2503ffff; valaddr_reg:x3; val_offset:28422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28422*FLEN/8, x4, x1, x2) - -inst_9475: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x2507ffff; valaddr_reg:x3; val_offset:28425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28425*FLEN/8, x4, x1, x2) - -inst_9476: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x250fffff; valaddr_reg:x3; val_offset:28428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28428*FLEN/8, x4, x1, x2) - -inst_9477: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x251fffff; valaddr_reg:x3; val_offset:28431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28431*FLEN/8, x4, x1, x2) - -inst_9478: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x253fffff; valaddr_reg:x3; val_offset:28434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28434*FLEN/8, x4, x1, x2) - -inst_9479: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25400000; valaddr_reg:x3; val_offset:28437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28437*FLEN/8, x4, x1, x2) - -inst_9480: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25600000; valaddr_reg:x3; val_offset:28440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28440*FLEN/8, x4, x1, x2) - -inst_9481: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25700000; valaddr_reg:x3; val_offset:28443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28443*FLEN/8, x4, x1, x2) - -inst_9482: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x25780000; valaddr_reg:x3; val_offset:28446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28446*FLEN/8, x4, x1, x2) - -inst_9483: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257c0000; valaddr_reg:x3; val_offset:28449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28449*FLEN/8, x4, x1, x2) - -inst_9484: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257e0000; valaddr_reg:x3; val_offset:28452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28452*FLEN/8, x4, x1, x2) - -inst_9485: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257f0000; valaddr_reg:x3; val_offset:28455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28455*FLEN/8, x4, x1, x2) - -inst_9486: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257f8000; valaddr_reg:x3; val_offset:28458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28458*FLEN/8, x4, x1, x2) - -inst_9487: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257fc000; valaddr_reg:x3; val_offset:28461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28461*FLEN/8, x4, x1, x2) - -inst_9488: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257fe000; valaddr_reg:x3; val_offset:28464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28464*FLEN/8, x4, x1, x2) - -inst_9489: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257ff000; valaddr_reg:x3; val_offset:28467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28467*FLEN/8, x4, x1, x2) - -inst_9490: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257ff800; valaddr_reg:x3; val_offset:28470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28470*FLEN/8, x4, x1, x2) - -inst_9491: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257ffc00; valaddr_reg:x3; val_offset:28473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28473*FLEN/8, x4, x1, x2) - -inst_9492: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257ffe00; valaddr_reg:x3; val_offset:28476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28476*FLEN/8, x4, x1, x2) - -inst_9493: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257fff00; valaddr_reg:x3; val_offset:28479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28479*FLEN/8, x4, x1, x2) - -inst_9494: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257fff80; valaddr_reg:x3; val_offset:28482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28482*FLEN/8, x4, x1, x2) - -inst_9495: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257fffc0; valaddr_reg:x3; val_offset:28485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28485*FLEN/8, x4, x1, x2) - -inst_9496: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257fffe0; valaddr_reg:x3; val_offset:28488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28488*FLEN/8, x4, x1, x2) - -inst_9497: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257ffff0; valaddr_reg:x3; val_offset:28491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28491*FLEN/8, x4, x1, x2) - -inst_9498: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257ffff8; valaddr_reg:x3; val_offset:28494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28494*FLEN/8, x4, x1, x2) - -inst_9499: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257ffffc; valaddr_reg:x3; val_offset:28497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28497*FLEN/8, x4, x1, x2) - -inst_9500: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257ffffe; valaddr_reg:x3; val_offset:28500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28500*FLEN/8, x4, x1, x2) - -inst_9501: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x257fffff; valaddr_reg:x3; val_offset:28503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28503*FLEN/8, x4, x1, x2) - -inst_9502: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3f800001; valaddr_reg:x3; val_offset:28506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28506*FLEN/8, x4, x1, x2) - -inst_9503: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3f800003; valaddr_reg:x3; val_offset:28509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28509*FLEN/8, x4, x1, x2) - -inst_9504: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3f800007; valaddr_reg:x3; val_offset:28512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28512*FLEN/8, x4, x1, x2) - -inst_9505: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3f999999; valaddr_reg:x3; val_offset:28515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28515*FLEN/8, x4, x1, x2) - -inst_9506: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:28518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28518*FLEN/8, x4, x1, x2) - -inst_9507: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:28521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28521*FLEN/8, x4, x1, x2) - -inst_9508: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:28524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28524*FLEN/8, x4, x1, x2) - -inst_9509: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:28527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28527*FLEN/8, x4, x1, x2) - -inst_9510: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:28530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28530*FLEN/8, x4, x1, x2) - -inst_9511: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:28533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28533*FLEN/8, x4, x1, x2) - -inst_9512: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:28536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28536*FLEN/8, x4, x1, x2) - -inst_9513: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:28539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28539*FLEN/8, x4, x1, x2) - -inst_9514: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:28542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28542*FLEN/8, x4, x1, x2) - -inst_9515: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:28545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28545*FLEN/8, x4, x1, x2) - -inst_9516: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:28548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28548*FLEN/8, x4, x1, x2) - -inst_9517: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:28551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28551*FLEN/8, x4, x1, x2) - -inst_9518: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76000000; valaddr_reg:x3; val_offset:28554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28554*FLEN/8, x4, x1, x2) - -inst_9519: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76000001; valaddr_reg:x3; val_offset:28557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28557*FLEN/8, x4, x1, x2) - -inst_9520: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76000003; valaddr_reg:x3; val_offset:28560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28560*FLEN/8, x4, x1, x2) - -inst_9521: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76000007; valaddr_reg:x3; val_offset:28563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28563*FLEN/8, x4, x1, x2) - -inst_9522: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7600000f; valaddr_reg:x3; val_offset:28566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28566*FLEN/8, x4, x1, x2) - -inst_9523: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7600001f; valaddr_reg:x3; val_offset:28569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28569*FLEN/8, x4, x1, x2) - -inst_9524: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7600003f; valaddr_reg:x3; val_offset:28572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28572*FLEN/8, x4, x1, x2) - -inst_9525: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7600007f; valaddr_reg:x3; val_offset:28575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28575*FLEN/8, x4, x1, x2) - -inst_9526: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x760000ff; valaddr_reg:x3; val_offset:28578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28578*FLEN/8, x4, x1, x2) - -inst_9527: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x760001ff; valaddr_reg:x3; val_offset:28581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28581*FLEN/8, x4, x1, x2) - -inst_9528: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x760003ff; valaddr_reg:x3; val_offset:28584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28584*FLEN/8, x4, x1, x2) - -inst_9529: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x760007ff; valaddr_reg:x3; val_offset:28587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28587*FLEN/8, x4, x1, x2) - -inst_9530: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76000fff; valaddr_reg:x3; val_offset:28590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28590*FLEN/8, x4, x1, x2) - -inst_9531: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76001fff; valaddr_reg:x3; val_offset:28593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28593*FLEN/8, x4, x1, x2) - -inst_9532: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76003fff; valaddr_reg:x3; val_offset:28596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28596*FLEN/8, x4, x1, x2) - -inst_9533: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76007fff; valaddr_reg:x3; val_offset:28599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28599*FLEN/8, x4, x1, x2) - -inst_9534: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7600ffff; valaddr_reg:x3; val_offset:28602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28602*FLEN/8, x4, x1, x2) - -inst_9535: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7601ffff; valaddr_reg:x3; val_offset:28605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28605*FLEN/8, x4, x1, x2) - -inst_9536: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7603ffff; valaddr_reg:x3; val_offset:28608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28608*FLEN/8, x4, x1, x2) - -inst_9537: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7607ffff; valaddr_reg:x3; val_offset:28611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28611*FLEN/8, x4, x1, x2) - -inst_9538: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x760fffff; valaddr_reg:x3; val_offset:28614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28614*FLEN/8, x4, x1, x2) - -inst_9539: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x761fffff; valaddr_reg:x3; val_offset:28617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28617*FLEN/8, x4, x1, x2) - -inst_9540: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x763fffff; valaddr_reg:x3; val_offset:28620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28620*FLEN/8, x4, x1, x2) - -inst_9541: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76400000; valaddr_reg:x3; val_offset:28623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28623*FLEN/8, x4, x1, x2) - -inst_9542: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76600000; valaddr_reg:x3; val_offset:28626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28626*FLEN/8, x4, x1, x2) - -inst_9543: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76700000; valaddr_reg:x3; val_offset:28629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28629*FLEN/8, x4, x1, x2) - -inst_9544: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x76780000; valaddr_reg:x3; val_offset:28632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28632*FLEN/8, x4, x1, x2) - -inst_9545: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767c0000; valaddr_reg:x3; val_offset:28635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28635*FLEN/8, x4, x1, x2) - -inst_9546: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767e0000; valaddr_reg:x3; val_offset:28638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28638*FLEN/8, x4, x1, x2) - -inst_9547: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767f0000; valaddr_reg:x3; val_offset:28641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28641*FLEN/8, x4, x1, x2) - -inst_9548: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767f8000; valaddr_reg:x3; val_offset:28644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28644*FLEN/8, x4, x1, x2) - -inst_9549: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767fc000; valaddr_reg:x3; val_offset:28647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28647*FLEN/8, x4, x1, x2) - -inst_9550: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767fe000; valaddr_reg:x3; val_offset:28650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28650*FLEN/8, x4, x1, x2) - -inst_9551: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767ff000; valaddr_reg:x3; val_offset:28653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28653*FLEN/8, x4, x1, x2) - -inst_9552: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767ff800; valaddr_reg:x3; val_offset:28656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28656*FLEN/8, x4, x1, x2) - -inst_9553: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767ffc00; valaddr_reg:x3; val_offset:28659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28659*FLEN/8, x4, x1, x2) - -inst_9554: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767ffe00; valaddr_reg:x3; val_offset:28662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28662*FLEN/8, x4, x1, x2) - -inst_9555: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767fff00; valaddr_reg:x3; val_offset:28665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28665*FLEN/8, x4, x1, x2) - -inst_9556: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767fff80; valaddr_reg:x3; val_offset:28668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28668*FLEN/8, x4, x1, x2) - -inst_9557: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767fffc0; valaddr_reg:x3; val_offset:28671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28671*FLEN/8, x4, x1, x2) - -inst_9558: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767fffe0; valaddr_reg:x3; val_offset:28674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28674*FLEN/8, x4, x1, x2) - -inst_9559: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767ffff0; valaddr_reg:x3; val_offset:28677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28677*FLEN/8, x4, x1, x2) - -inst_9560: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767ffff8; valaddr_reg:x3; val_offset:28680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28680*FLEN/8, x4, x1, x2) - -inst_9561: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767ffffc; valaddr_reg:x3; val_offset:28683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28683*FLEN/8, x4, x1, x2) - -inst_9562: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767ffffe; valaddr_reg:x3; val_offset:28686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28686*FLEN/8, x4, x1, x2) - -inst_9563: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x767fffff; valaddr_reg:x3; val_offset:28689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28689*FLEN/8, x4, x1, x2) - -inst_9564: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f000001; valaddr_reg:x3; val_offset:28692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28692*FLEN/8, x4, x1, x2) - -inst_9565: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f000003; valaddr_reg:x3; val_offset:28695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28695*FLEN/8, x4, x1, x2) - -inst_9566: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f000007; valaddr_reg:x3; val_offset:28698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28698*FLEN/8, x4, x1, x2) - -inst_9567: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f199999; valaddr_reg:x3; val_offset:28701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28701*FLEN/8, x4, x1, x2) - -inst_9568: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f249249; valaddr_reg:x3; val_offset:28704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28704*FLEN/8, x4, x1, x2) - -inst_9569: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f333333; valaddr_reg:x3; val_offset:28707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28707*FLEN/8, x4, x1, x2) - -inst_9570: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:28710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28710*FLEN/8, x4, x1, x2) - -inst_9571: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:28713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28713*FLEN/8, x4, x1, x2) - -inst_9572: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f444444; valaddr_reg:x3; val_offset:28716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28716*FLEN/8, x4, x1, x2) - -inst_9573: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:28719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28719*FLEN/8, x4, x1, x2) - -inst_9574: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:28722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28722*FLEN/8, x4, x1, x2) - -inst_9575: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f666666; valaddr_reg:x3; val_offset:28725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28725*FLEN/8, x4, x1, x2) - -inst_9576: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:28728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28728*FLEN/8, x4, x1, x2) - -inst_9577: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:28731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28731*FLEN/8, x4, x1, x2) - -inst_9578: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:28734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28734*FLEN/8, x4, x1, x2) - -inst_9579: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:28737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28737*FLEN/8, x4, x1, x2) - -inst_9580: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:28740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28740*FLEN/8, x4, x1, x2) - -inst_9581: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:28743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28743*FLEN/8, x4, x1, x2) - -inst_9582: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:28746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28746*FLEN/8, x4, x1, x2) - -inst_9583: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:28749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28749*FLEN/8, x4, x1, x2) - -inst_9584: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:28752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28752*FLEN/8, x4, x1, x2) - -inst_9585: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:28755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28755*FLEN/8, x4, x1, x2) - -inst_9586: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:28758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28758*FLEN/8, x4, x1, x2) - -inst_9587: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:28761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28761*FLEN/8, x4, x1, x2) - -inst_9588: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:28764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28764*FLEN/8, x4, x1, x2) - -inst_9589: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:28767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28767*FLEN/8, x4, x1, x2) - -inst_9590: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:28770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28770*FLEN/8, x4, x1, x2) - -inst_9591: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:28773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28773*FLEN/8, x4, x1, x2) - -inst_9592: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:28776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28776*FLEN/8, x4, x1, x2) - -inst_9593: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:28779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28779*FLEN/8, x4, x1, x2) - -inst_9594: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:28782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28782*FLEN/8, x4, x1, x2) - -inst_9595: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:28785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28785*FLEN/8, x4, x1, x2) - -inst_9596: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85000000; valaddr_reg:x3; val_offset:28788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28788*FLEN/8, x4, x1, x2) - -inst_9597: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85000001; valaddr_reg:x3; val_offset:28791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28791*FLEN/8, x4, x1, x2) - -inst_9598: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85000003; valaddr_reg:x3; val_offset:28794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28794*FLEN/8, x4, x1, x2) - -inst_9599: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85000007; valaddr_reg:x3; val_offset:28797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28797*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_76) - -inst_9600: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8500000f; valaddr_reg:x3; val_offset:28800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28800*FLEN/8, x4, x1, x2) - -inst_9601: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8500001f; valaddr_reg:x3; val_offset:28803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28803*FLEN/8, x4, x1, x2) - -inst_9602: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8500003f; valaddr_reg:x3; val_offset:28806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28806*FLEN/8, x4, x1, x2) - -inst_9603: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8500007f; valaddr_reg:x3; val_offset:28809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28809*FLEN/8, x4, x1, x2) - -inst_9604: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x850000ff; valaddr_reg:x3; val_offset:28812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28812*FLEN/8, x4, x1, x2) - -inst_9605: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x850001ff; valaddr_reg:x3; val_offset:28815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28815*FLEN/8, x4, x1, x2) - -inst_9606: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x850003ff; valaddr_reg:x3; val_offset:28818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28818*FLEN/8, x4, x1, x2) - -inst_9607: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x850007ff; valaddr_reg:x3; val_offset:28821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28821*FLEN/8, x4, x1, x2) - -inst_9608: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85000fff; valaddr_reg:x3; val_offset:28824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28824*FLEN/8, x4, x1, x2) - -inst_9609: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85001fff; valaddr_reg:x3; val_offset:28827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28827*FLEN/8, x4, x1, x2) - -inst_9610: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85003fff; valaddr_reg:x3; val_offset:28830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28830*FLEN/8, x4, x1, x2) - -inst_9611: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85007fff; valaddr_reg:x3; val_offset:28833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28833*FLEN/8, x4, x1, x2) - -inst_9612: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8500ffff; valaddr_reg:x3; val_offset:28836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28836*FLEN/8, x4, x1, x2) - -inst_9613: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8501ffff; valaddr_reg:x3; val_offset:28839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28839*FLEN/8, x4, x1, x2) - -inst_9614: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8503ffff; valaddr_reg:x3; val_offset:28842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28842*FLEN/8, x4, x1, x2) - -inst_9615: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x8507ffff; valaddr_reg:x3; val_offset:28845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28845*FLEN/8, x4, x1, x2) - -inst_9616: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x850fffff; valaddr_reg:x3; val_offset:28848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28848*FLEN/8, x4, x1, x2) - -inst_9617: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x851fffff; valaddr_reg:x3; val_offset:28851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28851*FLEN/8, x4, x1, x2) - -inst_9618: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x853fffff; valaddr_reg:x3; val_offset:28854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28854*FLEN/8, x4, x1, x2) - -inst_9619: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85400000; valaddr_reg:x3; val_offset:28857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28857*FLEN/8, x4, x1, x2) - -inst_9620: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85600000; valaddr_reg:x3; val_offset:28860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28860*FLEN/8, x4, x1, x2) - -inst_9621: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85700000; valaddr_reg:x3; val_offset:28863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28863*FLEN/8, x4, x1, x2) - -inst_9622: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x85780000; valaddr_reg:x3; val_offset:28866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28866*FLEN/8, x4, x1, x2) - -inst_9623: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857c0000; valaddr_reg:x3; val_offset:28869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28869*FLEN/8, x4, x1, x2) - -inst_9624: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857e0000; valaddr_reg:x3; val_offset:28872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28872*FLEN/8, x4, x1, x2) - -inst_9625: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857f0000; valaddr_reg:x3; val_offset:28875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28875*FLEN/8, x4, x1, x2) - -inst_9626: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857f8000; valaddr_reg:x3; val_offset:28878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28878*FLEN/8, x4, x1, x2) - -inst_9627: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857fc000; valaddr_reg:x3; val_offset:28881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28881*FLEN/8, x4, x1, x2) - -inst_9628: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857fe000; valaddr_reg:x3; val_offset:28884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28884*FLEN/8, x4, x1, x2) - -inst_9629: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857ff000; valaddr_reg:x3; val_offset:28887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28887*FLEN/8, x4, x1, x2) - -inst_9630: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857ff800; valaddr_reg:x3; val_offset:28890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28890*FLEN/8, x4, x1, x2) - -inst_9631: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857ffc00; valaddr_reg:x3; val_offset:28893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28893*FLEN/8, x4, x1, x2) - -inst_9632: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857ffe00; valaddr_reg:x3; val_offset:28896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28896*FLEN/8, x4, x1, x2) - -inst_9633: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857fff00; valaddr_reg:x3; val_offset:28899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28899*FLEN/8, x4, x1, x2) - -inst_9634: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857fff80; valaddr_reg:x3; val_offset:28902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28902*FLEN/8, x4, x1, x2) - -inst_9635: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857fffc0; valaddr_reg:x3; val_offset:28905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28905*FLEN/8, x4, x1, x2) - -inst_9636: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857fffe0; valaddr_reg:x3; val_offset:28908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28908*FLEN/8, x4, x1, x2) - -inst_9637: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857ffff0; valaddr_reg:x3; val_offset:28911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28911*FLEN/8, x4, x1, x2) - -inst_9638: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857ffff8; valaddr_reg:x3; val_offset:28914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28914*FLEN/8, x4, x1, x2) - -inst_9639: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857ffffc; valaddr_reg:x3; val_offset:28917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28917*FLEN/8, x4, x1, x2) - -inst_9640: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857ffffe; valaddr_reg:x3; val_offset:28920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28920*FLEN/8, x4, x1, x2) - -inst_9641: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; -op3val:0x857fffff; valaddr_reg:x3; val_offset:28923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28923*FLEN/8, x4, x1, x2) - -inst_9642: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:28926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28926*FLEN/8, x4, x1, x2) - -inst_9643: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:28929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28929*FLEN/8, x4, x1, x2) - -inst_9644: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:28932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28932*FLEN/8, x4, x1, x2) - -inst_9645: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:28935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28935*FLEN/8, x4, x1, x2) - -inst_9646: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:28938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28938*FLEN/8, x4, x1, x2) - -inst_9647: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:28941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28941*FLEN/8, x4, x1, x2) - -inst_9648: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:28944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28944*FLEN/8, x4, x1, x2) - -inst_9649: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:28947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28947*FLEN/8, x4, x1, x2) - -inst_9650: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:28950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28950*FLEN/8, x4, x1, x2) - -inst_9651: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:28953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28953*FLEN/8, x4, x1, x2) - -inst_9652: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:28956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28956*FLEN/8, x4, x1, x2) - -inst_9653: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:28959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28959*FLEN/8, x4, x1, x2) - -inst_9654: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:28962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28962*FLEN/8, x4, x1, x2) - -inst_9655: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:28965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28965*FLEN/8, x4, x1, x2) - -inst_9656: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:28968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28968*FLEN/8, x4, x1, x2) - -inst_9657: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:28971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28971*FLEN/8, x4, x1, x2) - -inst_9658: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90000000; valaddr_reg:x3; val_offset:28974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28974*FLEN/8, x4, x1, x2) - -inst_9659: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90000001; valaddr_reg:x3; val_offset:28977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28977*FLEN/8, x4, x1, x2) - -inst_9660: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90000003; valaddr_reg:x3; val_offset:28980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28980*FLEN/8, x4, x1, x2) - -inst_9661: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90000007; valaddr_reg:x3; val_offset:28983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28983*FLEN/8, x4, x1, x2) - -inst_9662: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x9000000f; valaddr_reg:x3; val_offset:28986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28986*FLEN/8, x4, x1, x2) - -inst_9663: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x9000001f; valaddr_reg:x3; val_offset:28989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28989*FLEN/8, x4, x1, x2) - -inst_9664: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x9000003f; valaddr_reg:x3; val_offset:28992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28992*FLEN/8, x4, x1, x2) - -inst_9665: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x9000007f; valaddr_reg:x3; val_offset:28995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28995*FLEN/8, x4, x1, x2) - -inst_9666: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x900000ff; valaddr_reg:x3; val_offset:28998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28998*FLEN/8, x4, x1, x2) - -inst_9667: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x900001ff; valaddr_reg:x3; val_offset:29001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29001*FLEN/8, x4, x1, x2) - -inst_9668: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x900003ff; valaddr_reg:x3; val_offset:29004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29004*FLEN/8, x4, x1, x2) - -inst_9669: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x900007ff; valaddr_reg:x3; val_offset:29007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29007*FLEN/8, x4, x1, x2) - -inst_9670: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90000fff; valaddr_reg:x3; val_offset:29010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29010*FLEN/8, x4, x1, x2) - -inst_9671: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90001fff; valaddr_reg:x3; val_offset:29013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29013*FLEN/8, x4, x1, x2) - -inst_9672: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90003fff; valaddr_reg:x3; val_offset:29016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29016*FLEN/8, x4, x1, x2) - -inst_9673: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90007fff; valaddr_reg:x3; val_offset:29019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29019*FLEN/8, x4, x1, x2) - -inst_9674: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x9000ffff; valaddr_reg:x3; val_offset:29022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29022*FLEN/8, x4, x1, x2) - -inst_9675: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x9001ffff; valaddr_reg:x3; val_offset:29025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29025*FLEN/8, x4, x1, x2) - -inst_9676: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x9003ffff; valaddr_reg:x3; val_offset:29028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29028*FLEN/8, x4, x1, x2) - -inst_9677: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x9007ffff; valaddr_reg:x3; val_offset:29031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29031*FLEN/8, x4, x1, x2) - -inst_9678: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x900fffff; valaddr_reg:x3; val_offset:29034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29034*FLEN/8, x4, x1, x2) - -inst_9679: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x901fffff; valaddr_reg:x3; val_offset:29037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29037*FLEN/8, x4, x1, x2) - -inst_9680: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x903fffff; valaddr_reg:x3; val_offset:29040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29040*FLEN/8, x4, x1, x2) - -inst_9681: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90400000; valaddr_reg:x3; val_offset:29043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29043*FLEN/8, x4, x1, x2) - -inst_9682: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90600000; valaddr_reg:x3; val_offset:29046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29046*FLEN/8, x4, x1, x2) - -inst_9683: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90700000; valaddr_reg:x3; val_offset:29049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29049*FLEN/8, x4, x1, x2) - -inst_9684: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x90780000; valaddr_reg:x3; val_offset:29052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29052*FLEN/8, x4, x1, x2) - -inst_9685: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907c0000; valaddr_reg:x3; val_offset:29055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29055*FLEN/8, x4, x1, x2) - -inst_9686: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907e0000; valaddr_reg:x3; val_offset:29058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29058*FLEN/8, x4, x1, x2) - -inst_9687: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907f0000; valaddr_reg:x3; val_offset:29061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29061*FLEN/8, x4, x1, x2) - -inst_9688: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907f8000; valaddr_reg:x3; val_offset:29064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29064*FLEN/8, x4, x1, x2) - -inst_9689: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907fc000; valaddr_reg:x3; val_offset:29067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29067*FLEN/8, x4, x1, x2) - -inst_9690: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907fe000; valaddr_reg:x3; val_offset:29070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29070*FLEN/8, x4, x1, x2) - -inst_9691: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907ff000; valaddr_reg:x3; val_offset:29073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29073*FLEN/8, x4, x1, x2) - -inst_9692: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907ff800; valaddr_reg:x3; val_offset:29076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29076*FLEN/8, x4, x1, x2) - -inst_9693: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907ffc00; valaddr_reg:x3; val_offset:29079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29079*FLEN/8, x4, x1, x2) - -inst_9694: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907ffe00; valaddr_reg:x3; val_offset:29082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29082*FLEN/8, x4, x1, x2) - -inst_9695: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907fff00; valaddr_reg:x3; val_offset:29085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29085*FLEN/8, x4, x1, x2) - -inst_9696: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907fff80; valaddr_reg:x3; val_offset:29088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29088*FLEN/8, x4, x1, x2) - -inst_9697: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907fffc0; valaddr_reg:x3; val_offset:29091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29091*FLEN/8, x4, x1, x2) - -inst_9698: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907fffe0; valaddr_reg:x3; val_offset:29094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29094*FLEN/8, x4, x1, x2) - -inst_9699: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907ffff0; valaddr_reg:x3; val_offset:29097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29097*FLEN/8, x4, x1, x2) - -inst_9700: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907ffff8; valaddr_reg:x3; val_offset:29100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29100*FLEN/8, x4, x1, x2) - -inst_9701: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907ffffc; valaddr_reg:x3; val_offset:29103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29103*FLEN/8, x4, x1, x2) - -inst_9702: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907ffffe; valaddr_reg:x3; val_offset:29106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29106*FLEN/8, x4, x1, x2) - -inst_9703: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; -op3val:0x907fffff; valaddr_reg:x3; val_offset:29109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29109*FLEN/8, x4, x1, x2) - -inst_9704: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:29112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29112*FLEN/8, x4, x1, x2) - -inst_9705: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:29115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29115*FLEN/8, x4, x1, x2) - -inst_9706: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:29118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29118*FLEN/8, x4, x1, x2) - -inst_9707: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:29121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29121*FLEN/8, x4, x1, x2) - -inst_9708: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:29124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29124*FLEN/8, x4, x1, x2) - -inst_9709: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:29127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29127*FLEN/8, x4, x1, x2) - -inst_9710: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:29130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29130*FLEN/8, x4, x1, x2) - -inst_9711: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:29133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29133*FLEN/8, x4, x1, x2) - -inst_9712: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:29136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29136*FLEN/8, x4, x1, x2) - -inst_9713: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:29139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29139*FLEN/8, x4, x1, x2) - -inst_9714: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:29142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29142*FLEN/8, x4, x1, x2) - -inst_9715: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:29145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29145*FLEN/8, x4, x1, x2) - -inst_9716: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:29148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29148*FLEN/8, x4, x1, x2) - -inst_9717: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:29151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29151*FLEN/8, x4, x1, x2) - -inst_9718: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:29154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29154*FLEN/8, x4, x1, x2) - -inst_9719: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:29157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29157*FLEN/8, x4, x1, x2) - -inst_9720: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2800000; valaddr_reg:x3; val_offset:29160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29160*FLEN/8, x4, x1, x2) - -inst_9721: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2800001; valaddr_reg:x3; val_offset:29163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29163*FLEN/8, x4, x1, x2) - -inst_9722: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2800003; valaddr_reg:x3; val_offset:29166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29166*FLEN/8, x4, x1, x2) - -inst_9723: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2800007; valaddr_reg:x3; val_offset:29169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29169*FLEN/8, x4, x1, x2) - -inst_9724: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x280000f; valaddr_reg:x3; val_offset:29172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29172*FLEN/8, x4, x1, x2) - -inst_9725: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x280001f; valaddr_reg:x3; val_offset:29175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29175*FLEN/8, x4, x1, x2) - -inst_9726: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x280003f; valaddr_reg:x3; val_offset:29178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29178*FLEN/8, x4, x1, x2) - -inst_9727: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x280007f; valaddr_reg:x3; val_offset:29181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29181*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_77) - -inst_9728: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x28000ff; valaddr_reg:x3; val_offset:29184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29184*FLEN/8, x4, x1, x2) - -inst_9729: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x28001ff; valaddr_reg:x3; val_offset:29187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29187*FLEN/8, x4, x1, x2) - -inst_9730: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x28003ff; valaddr_reg:x3; val_offset:29190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29190*FLEN/8, x4, x1, x2) - -inst_9731: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x28007ff; valaddr_reg:x3; val_offset:29193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29193*FLEN/8, x4, x1, x2) - -inst_9732: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2800fff; valaddr_reg:x3; val_offset:29196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29196*FLEN/8, x4, x1, x2) - -inst_9733: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2801fff; valaddr_reg:x3; val_offset:29199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29199*FLEN/8, x4, x1, x2) - -inst_9734: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2803fff; valaddr_reg:x3; val_offset:29202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29202*FLEN/8, x4, x1, x2) - -inst_9735: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2807fff; valaddr_reg:x3; val_offset:29205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29205*FLEN/8, x4, x1, x2) - -inst_9736: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x280ffff; valaddr_reg:x3; val_offset:29208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29208*FLEN/8, x4, x1, x2) - -inst_9737: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x281ffff; valaddr_reg:x3; val_offset:29211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29211*FLEN/8, x4, x1, x2) - -inst_9738: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x283ffff; valaddr_reg:x3; val_offset:29214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29214*FLEN/8, x4, x1, x2) - -inst_9739: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x287ffff; valaddr_reg:x3; val_offset:29217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29217*FLEN/8, x4, x1, x2) - -inst_9740: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x28fffff; valaddr_reg:x3; val_offset:29220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29220*FLEN/8, x4, x1, x2) - -inst_9741: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x29fffff; valaddr_reg:x3; val_offset:29223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29223*FLEN/8, x4, x1, x2) - -inst_9742: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2bfffff; valaddr_reg:x3; val_offset:29226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29226*FLEN/8, x4, x1, x2) - -inst_9743: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2c00000; valaddr_reg:x3; val_offset:29229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29229*FLEN/8, x4, x1, x2) - -inst_9744: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2e00000; valaddr_reg:x3; val_offset:29232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29232*FLEN/8, x4, x1, x2) - -inst_9745: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2f00000; valaddr_reg:x3; val_offset:29235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29235*FLEN/8, x4, x1, x2) - -inst_9746: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2f80000; valaddr_reg:x3; val_offset:29238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29238*FLEN/8, x4, x1, x2) - -inst_9747: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fc0000; valaddr_reg:x3; val_offset:29241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29241*FLEN/8, x4, x1, x2) - -inst_9748: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fe0000; valaddr_reg:x3; val_offset:29244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29244*FLEN/8, x4, x1, x2) - -inst_9749: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ff0000; valaddr_reg:x3; val_offset:29247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29247*FLEN/8, x4, x1, x2) - -inst_9750: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ff8000; valaddr_reg:x3; val_offset:29250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29250*FLEN/8, x4, x1, x2) - -inst_9751: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ffc000; valaddr_reg:x3; val_offset:29253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29253*FLEN/8, x4, x1, x2) - -inst_9752: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ffe000; valaddr_reg:x3; val_offset:29256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29256*FLEN/8, x4, x1, x2) - -inst_9753: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fff000; valaddr_reg:x3; val_offset:29259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29259*FLEN/8, x4, x1, x2) - -inst_9754: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fff800; valaddr_reg:x3; val_offset:29262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29262*FLEN/8, x4, x1, x2) - -inst_9755: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fffc00; valaddr_reg:x3; val_offset:29265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29265*FLEN/8, x4, x1, x2) - -inst_9756: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fffe00; valaddr_reg:x3; val_offset:29268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29268*FLEN/8, x4, x1, x2) - -inst_9757: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ffff00; valaddr_reg:x3; val_offset:29271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29271*FLEN/8, x4, x1, x2) - -inst_9758: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ffff80; valaddr_reg:x3; val_offset:29274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29274*FLEN/8, x4, x1, x2) - -inst_9759: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ffffc0; valaddr_reg:x3; val_offset:29277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29277*FLEN/8, x4, x1, x2) - -inst_9760: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ffffe0; valaddr_reg:x3; val_offset:29280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29280*FLEN/8, x4, x1, x2) - -inst_9761: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fffff0; valaddr_reg:x3; val_offset:29283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29283*FLEN/8, x4, x1, x2) - -inst_9762: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fffff8; valaddr_reg:x3; val_offset:29286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29286*FLEN/8, x4, x1, x2) - -inst_9763: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fffffc; valaddr_reg:x3; val_offset:29289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29289*FLEN/8, x4, x1, x2) - -inst_9764: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2fffffe; valaddr_reg:x3; val_offset:29292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29292*FLEN/8, x4, x1, x2) - -inst_9765: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; -op3val:0x2ffffff; valaddr_reg:x3; val_offset:29295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29295*FLEN/8, x4, x1, x2) - -inst_9766: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:29298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29298*FLEN/8, x4, x1, x2) - -inst_9767: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:29301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29301*FLEN/8, x4, x1, x2) - -inst_9768: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:29304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29304*FLEN/8, x4, x1, x2) - -inst_9769: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:29307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29307*FLEN/8, x4, x1, x2) - -inst_9770: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:29310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29310*FLEN/8, x4, x1, x2) - -inst_9771: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:29313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29313*FLEN/8, x4, x1, x2) - -inst_9772: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:29316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29316*FLEN/8, x4, x1, x2) - -inst_9773: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:29319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29319*FLEN/8, x4, x1, x2) - -inst_9774: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:29322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29322*FLEN/8, x4, x1, x2) - -inst_9775: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:29325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29325*FLEN/8, x4, x1, x2) - -inst_9776: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:29328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29328*FLEN/8, x4, x1, x2) - -inst_9777: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:29331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29331*FLEN/8, x4, x1, x2) - -inst_9778: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:29334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29334*FLEN/8, x4, x1, x2) - -inst_9779: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:29337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29337*FLEN/8, x4, x1, x2) - -inst_9780: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:29340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29340*FLEN/8, x4, x1, x2) - -inst_9781: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:29343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29343*FLEN/8, x4, x1, x2) - -inst_9782: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82800000; valaddr_reg:x3; val_offset:29346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29346*FLEN/8, x4, x1, x2) - -inst_9783: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82800001; valaddr_reg:x3; val_offset:29349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29349*FLEN/8, x4, x1, x2) - -inst_9784: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82800003; valaddr_reg:x3; val_offset:29352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29352*FLEN/8, x4, x1, x2) - -inst_9785: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82800007; valaddr_reg:x3; val_offset:29355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29355*FLEN/8, x4, x1, x2) - -inst_9786: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8280000f; valaddr_reg:x3; val_offset:29358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29358*FLEN/8, x4, x1, x2) - -inst_9787: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8280001f; valaddr_reg:x3; val_offset:29361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29361*FLEN/8, x4, x1, x2) - -inst_9788: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8280003f; valaddr_reg:x3; val_offset:29364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29364*FLEN/8, x4, x1, x2) - -inst_9789: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8280007f; valaddr_reg:x3; val_offset:29367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29367*FLEN/8, x4, x1, x2) - -inst_9790: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x828000ff; valaddr_reg:x3; val_offset:29370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29370*FLEN/8, x4, x1, x2) - -inst_9791: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x828001ff; valaddr_reg:x3; val_offset:29373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29373*FLEN/8, x4, x1, x2) - -inst_9792: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x828003ff; valaddr_reg:x3; val_offset:29376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29376*FLEN/8, x4, x1, x2) - -inst_9793: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x828007ff; valaddr_reg:x3; val_offset:29379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29379*FLEN/8, x4, x1, x2) - -inst_9794: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82800fff; valaddr_reg:x3; val_offset:29382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29382*FLEN/8, x4, x1, x2) - -inst_9795: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82801fff; valaddr_reg:x3; val_offset:29385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29385*FLEN/8, x4, x1, x2) - -inst_9796: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82803fff; valaddr_reg:x3; val_offset:29388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29388*FLEN/8, x4, x1, x2) - -inst_9797: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82807fff; valaddr_reg:x3; val_offset:29391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29391*FLEN/8, x4, x1, x2) - -inst_9798: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8280ffff; valaddr_reg:x3; val_offset:29394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29394*FLEN/8, x4, x1, x2) - -inst_9799: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8281ffff; valaddr_reg:x3; val_offset:29397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29397*FLEN/8, x4, x1, x2) - -inst_9800: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8283ffff; valaddr_reg:x3; val_offset:29400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29400*FLEN/8, x4, x1, x2) - -inst_9801: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x8287ffff; valaddr_reg:x3; val_offset:29403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29403*FLEN/8, x4, x1, x2) - -inst_9802: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x828fffff; valaddr_reg:x3; val_offset:29406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29406*FLEN/8, x4, x1, x2) - -inst_9803: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x829fffff; valaddr_reg:x3; val_offset:29409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29409*FLEN/8, x4, x1, x2) - -inst_9804: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82bfffff; valaddr_reg:x3; val_offset:29412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29412*FLEN/8, x4, x1, x2) - -inst_9805: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82c00000; valaddr_reg:x3; val_offset:29415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29415*FLEN/8, x4, x1, x2) - -inst_9806: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82e00000; valaddr_reg:x3; val_offset:29418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29418*FLEN/8, x4, x1, x2) - -inst_9807: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82f00000; valaddr_reg:x3; val_offset:29421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29421*FLEN/8, x4, x1, x2) - -inst_9808: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82f80000; valaddr_reg:x3; val_offset:29424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29424*FLEN/8, x4, x1, x2) - -inst_9809: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fc0000; valaddr_reg:x3; val_offset:29427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29427*FLEN/8, x4, x1, x2) - -inst_9810: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fe0000; valaddr_reg:x3; val_offset:29430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29430*FLEN/8, x4, x1, x2) - -inst_9811: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ff0000; valaddr_reg:x3; val_offset:29433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29433*FLEN/8, x4, x1, x2) - -inst_9812: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ff8000; valaddr_reg:x3; val_offset:29436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29436*FLEN/8, x4, x1, x2) - -inst_9813: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ffc000; valaddr_reg:x3; val_offset:29439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29439*FLEN/8, x4, x1, x2) - -inst_9814: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ffe000; valaddr_reg:x3; val_offset:29442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29442*FLEN/8, x4, x1, x2) - -inst_9815: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fff000; valaddr_reg:x3; val_offset:29445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29445*FLEN/8, x4, x1, x2) - -inst_9816: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fff800; valaddr_reg:x3; val_offset:29448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29448*FLEN/8, x4, x1, x2) - -inst_9817: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fffc00; valaddr_reg:x3; val_offset:29451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29451*FLEN/8, x4, x1, x2) - -inst_9818: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fffe00; valaddr_reg:x3; val_offset:29454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29454*FLEN/8, x4, x1, x2) - -inst_9819: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ffff00; valaddr_reg:x3; val_offset:29457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29457*FLEN/8, x4, x1, x2) - -inst_9820: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ffff80; valaddr_reg:x3; val_offset:29460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29460*FLEN/8, x4, x1, x2) - -inst_9821: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ffffc0; valaddr_reg:x3; val_offset:29463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29463*FLEN/8, x4, x1, x2) - -inst_9822: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ffffe0; valaddr_reg:x3; val_offset:29466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29466*FLEN/8, x4, x1, x2) - -inst_9823: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fffff0; valaddr_reg:x3; val_offset:29469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29469*FLEN/8, x4, x1, x2) - -inst_9824: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fffff8; valaddr_reg:x3; val_offset:29472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29472*FLEN/8, x4, x1, x2) - -inst_9825: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fffffc; valaddr_reg:x3; val_offset:29475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29475*FLEN/8, x4, x1, x2) - -inst_9826: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82fffffe; valaddr_reg:x3; val_offset:29478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29478*FLEN/8, x4, x1, x2) - -inst_9827: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; -op3val:0x82ffffff; valaddr_reg:x3; val_offset:29481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29481*FLEN/8, x4, x1, x2) - -inst_9828: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6000000; valaddr_reg:x3; val_offset:29484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29484*FLEN/8, x4, x1, x2) - -inst_9829: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6000001; valaddr_reg:x3; val_offset:29487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29487*FLEN/8, x4, x1, x2) - -inst_9830: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6000003; valaddr_reg:x3; val_offset:29490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29490*FLEN/8, x4, x1, x2) - -inst_9831: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6000007; valaddr_reg:x3; val_offset:29493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29493*FLEN/8, x4, x1, x2) - -inst_9832: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe600000f; valaddr_reg:x3; val_offset:29496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29496*FLEN/8, x4, x1, x2) - -inst_9833: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe600001f; valaddr_reg:x3; val_offset:29499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29499*FLEN/8, x4, x1, x2) - -inst_9834: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe600003f; valaddr_reg:x3; val_offset:29502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29502*FLEN/8, x4, x1, x2) - -inst_9835: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe600007f; valaddr_reg:x3; val_offset:29505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29505*FLEN/8, x4, x1, x2) - -inst_9836: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe60000ff; valaddr_reg:x3; val_offset:29508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29508*FLEN/8, x4, x1, x2) - -inst_9837: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe60001ff; valaddr_reg:x3; val_offset:29511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29511*FLEN/8, x4, x1, x2) - -inst_9838: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe60003ff; valaddr_reg:x3; val_offset:29514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29514*FLEN/8, x4, x1, x2) - -inst_9839: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe60007ff; valaddr_reg:x3; val_offset:29517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29517*FLEN/8, x4, x1, x2) - -inst_9840: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6000fff; valaddr_reg:x3; val_offset:29520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29520*FLEN/8, x4, x1, x2) - -inst_9841: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6001fff; valaddr_reg:x3; val_offset:29523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29523*FLEN/8, x4, x1, x2) - -inst_9842: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6003fff; valaddr_reg:x3; val_offset:29526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29526*FLEN/8, x4, x1, x2) - -inst_9843: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6007fff; valaddr_reg:x3; val_offset:29529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29529*FLEN/8, x4, x1, x2) - -inst_9844: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe600ffff; valaddr_reg:x3; val_offset:29532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29532*FLEN/8, x4, x1, x2) - -inst_9845: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe601ffff; valaddr_reg:x3; val_offset:29535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29535*FLEN/8, x4, x1, x2) - -inst_9846: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe603ffff; valaddr_reg:x3; val_offset:29538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29538*FLEN/8, x4, x1, x2) - -inst_9847: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe607ffff; valaddr_reg:x3; val_offset:29541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29541*FLEN/8, x4, x1, x2) - -inst_9848: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe60fffff; valaddr_reg:x3; val_offset:29544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29544*FLEN/8, x4, x1, x2) - -inst_9849: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe61fffff; valaddr_reg:x3; val_offset:29547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29547*FLEN/8, x4, x1, x2) - -inst_9850: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe63fffff; valaddr_reg:x3; val_offset:29550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29550*FLEN/8, x4, x1, x2) - -inst_9851: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6400000; valaddr_reg:x3; val_offset:29553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29553*FLEN/8, x4, x1, x2) - -inst_9852: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6600000; valaddr_reg:x3; val_offset:29556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29556*FLEN/8, x4, x1, x2) - -inst_9853: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6700000; valaddr_reg:x3; val_offset:29559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29559*FLEN/8, x4, x1, x2) - -inst_9854: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe6780000; valaddr_reg:x3; val_offset:29562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29562*FLEN/8, x4, x1, x2) - -inst_9855: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67c0000; valaddr_reg:x3; val_offset:29565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29565*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_78) - -inst_9856: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67e0000; valaddr_reg:x3; val_offset:29568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29568*FLEN/8, x4, x1, x2) - -inst_9857: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67f0000; valaddr_reg:x3; val_offset:29571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29571*FLEN/8, x4, x1, x2) - -inst_9858: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67f8000; valaddr_reg:x3; val_offset:29574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29574*FLEN/8, x4, x1, x2) - -inst_9859: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67fc000; valaddr_reg:x3; val_offset:29577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29577*FLEN/8, x4, x1, x2) - -inst_9860: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67fe000; valaddr_reg:x3; val_offset:29580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29580*FLEN/8, x4, x1, x2) - -inst_9861: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67ff000; valaddr_reg:x3; val_offset:29583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29583*FLEN/8, x4, x1, x2) - -inst_9862: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67ff800; valaddr_reg:x3; val_offset:29586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29586*FLEN/8, x4, x1, x2) - -inst_9863: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67ffc00; valaddr_reg:x3; val_offset:29589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29589*FLEN/8, x4, x1, x2) - -inst_9864: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67ffe00; valaddr_reg:x3; val_offset:29592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29592*FLEN/8, x4, x1, x2) - -inst_9865: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67fff00; valaddr_reg:x3; val_offset:29595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29595*FLEN/8, x4, x1, x2) - -inst_9866: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67fff80; valaddr_reg:x3; val_offset:29598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29598*FLEN/8, x4, x1, x2) - -inst_9867: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67fffc0; valaddr_reg:x3; val_offset:29601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29601*FLEN/8, x4, x1, x2) - -inst_9868: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67fffe0; valaddr_reg:x3; val_offset:29604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29604*FLEN/8, x4, x1, x2) - -inst_9869: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67ffff0; valaddr_reg:x3; val_offset:29607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29607*FLEN/8, x4, x1, x2) - -inst_9870: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67ffff8; valaddr_reg:x3; val_offset:29610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29610*FLEN/8, x4, x1, x2) - -inst_9871: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67ffffc; valaddr_reg:x3; val_offset:29613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29613*FLEN/8, x4, x1, x2) - -inst_9872: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67ffffe; valaddr_reg:x3; val_offset:29616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29616*FLEN/8, x4, x1, x2) - -inst_9873: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xe67fffff; valaddr_reg:x3; val_offset:29619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29619*FLEN/8, x4, x1, x2) - -inst_9874: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff000001; valaddr_reg:x3; val_offset:29622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29622*FLEN/8, x4, x1, x2) - -inst_9875: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff000003; valaddr_reg:x3; val_offset:29625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29625*FLEN/8, x4, x1, x2) - -inst_9876: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff000007; valaddr_reg:x3; val_offset:29628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29628*FLEN/8, x4, x1, x2) - -inst_9877: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff199999; valaddr_reg:x3; val_offset:29631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29631*FLEN/8, x4, x1, x2) - -inst_9878: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff249249; valaddr_reg:x3; val_offset:29634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29634*FLEN/8, x4, x1, x2) - -inst_9879: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff333333; valaddr_reg:x3; val_offset:29637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29637*FLEN/8, x4, x1, x2) - -inst_9880: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:29640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29640*FLEN/8, x4, x1, x2) - -inst_9881: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:29643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29643*FLEN/8, x4, x1, x2) - -inst_9882: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff444444; valaddr_reg:x3; val_offset:29646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29646*FLEN/8, x4, x1, x2) - -inst_9883: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:29649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29649*FLEN/8, x4, x1, x2) - -inst_9884: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:29652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29652*FLEN/8, x4, x1, x2) - -inst_9885: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff666666; valaddr_reg:x3; val_offset:29655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29655*FLEN/8, x4, x1, x2) - -inst_9886: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:29658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29658*FLEN/8, x4, x1, x2) - -inst_9887: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:29661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29661*FLEN/8, x4, x1, x2) - -inst_9888: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:29664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29664*FLEN/8, x4, x1, x2) - -inst_9889: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:29667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29667*FLEN/8, x4, x1, x2) - -inst_9890: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d800000; valaddr_reg:x3; val_offset:29670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29670*FLEN/8, x4, x1, x2) - -inst_9891: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d800001; valaddr_reg:x3; val_offset:29673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29673*FLEN/8, x4, x1, x2) - -inst_9892: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d800003; valaddr_reg:x3; val_offset:29676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29676*FLEN/8, x4, x1, x2) - -inst_9893: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d800007; valaddr_reg:x3; val_offset:29679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29679*FLEN/8, x4, x1, x2) - -inst_9894: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d80000f; valaddr_reg:x3; val_offset:29682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29682*FLEN/8, x4, x1, x2) - -inst_9895: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d80001f; valaddr_reg:x3; val_offset:29685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29685*FLEN/8, x4, x1, x2) - -inst_9896: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d80003f; valaddr_reg:x3; val_offset:29688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29688*FLEN/8, x4, x1, x2) - -inst_9897: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d80007f; valaddr_reg:x3; val_offset:29691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29691*FLEN/8, x4, x1, x2) - -inst_9898: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d8000ff; valaddr_reg:x3; val_offset:29694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29694*FLEN/8, x4, x1, x2) - -inst_9899: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d8001ff; valaddr_reg:x3; val_offset:29697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29697*FLEN/8, x4, x1, x2) - -inst_9900: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d8003ff; valaddr_reg:x3; val_offset:29700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29700*FLEN/8, x4, x1, x2) - -inst_9901: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d8007ff; valaddr_reg:x3; val_offset:29703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29703*FLEN/8, x4, x1, x2) - -inst_9902: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d800fff; valaddr_reg:x3; val_offset:29706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29706*FLEN/8, x4, x1, x2) - -inst_9903: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d801fff; valaddr_reg:x3; val_offset:29709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29709*FLEN/8, x4, x1, x2) - -inst_9904: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d803fff; valaddr_reg:x3; val_offset:29712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29712*FLEN/8, x4, x1, x2) - -inst_9905: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d807fff; valaddr_reg:x3; val_offset:29715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29715*FLEN/8, x4, x1, x2) - -inst_9906: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d80ffff; valaddr_reg:x3; val_offset:29718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29718*FLEN/8, x4, x1, x2) - -inst_9907: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d81ffff; valaddr_reg:x3; val_offset:29721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29721*FLEN/8, x4, x1, x2) - -inst_9908: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d83ffff; valaddr_reg:x3; val_offset:29724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29724*FLEN/8, x4, x1, x2) - -inst_9909: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d87ffff; valaddr_reg:x3; val_offset:29727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29727*FLEN/8, x4, x1, x2) - -inst_9910: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d8fffff; valaddr_reg:x3; val_offset:29730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29730*FLEN/8, x4, x1, x2) - -inst_9911: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7d9fffff; valaddr_reg:x3; val_offset:29733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29733*FLEN/8, x4, x1, x2) - -inst_9912: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dbfffff; valaddr_reg:x3; val_offset:29736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29736*FLEN/8, x4, x1, x2) - -inst_9913: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dc00000; valaddr_reg:x3; val_offset:29739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29739*FLEN/8, x4, x1, x2) - -inst_9914: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7de00000; valaddr_reg:x3; val_offset:29742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29742*FLEN/8, x4, x1, x2) - -inst_9915: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7df00000; valaddr_reg:x3; val_offset:29745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29745*FLEN/8, x4, x1, x2) - -inst_9916: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7df80000; valaddr_reg:x3; val_offset:29748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29748*FLEN/8, x4, x1, x2) - -inst_9917: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfc0000; valaddr_reg:x3; val_offset:29751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29751*FLEN/8, x4, x1, x2) - -inst_9918: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfe0000; valaddr_reg:x3; val_offset:29754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29754*FLEN/8, x4, x1, x2) - -inst_9919: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dff0000; valaddr_reg:x3; val_offset:29757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29757*FLEN/8, x4, x1, x2) - -inst_9920: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dff8000; valaddr_reg:x3; val_offset:29760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29760*FLEN/8, x4, x1, x2) - -inst_9921: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dffc000; valaddr_reg:x3; val_offset:29763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29763*FLEN/8, x4, x1, x2) - -inst_9922: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dffe000; valaddr_reg:x3; val_offset:29766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29766*FLEN/8, x4, x1, x2) - -inst_9923: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfff000; valaddr_reg:x3; val_offset:29769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29769*FLEN/8, x4, x1, x2) - -inst_9924: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfff800; valaddr_reg:x3; val_offset:29772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29772*FLEN/8, x4, x1, x2) - -inst_9925: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfffc00; valaddr_reg:x3; val_offset:29775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29775*FLEN/8, x4, x1, x2) - -inst_9926: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfffe00; valaddr_reg:x3; val_offset:29778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29778*FLEN/8, x4, x1, x2) - -inst_9927: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dffff00; valaddr_reg:x3; val_offset:29781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29781*FLEN/8, x4, x1, x2) - -inst_9928: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dffff80; valaddr_reg:x3; val_offset:29784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29784*FLEN/8, x4, x1, x2) - -inst_9929: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dffffc0; valaddr_reg:x3; val_offset:29787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29787*FLEN/8, x4, x1, x2) - -inst_9930: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dffffe0; valaddr_reg:x3; val_offset:29790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29790*FLEN/8, x4, x1, x2) - -inst_9931: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfffff0; valaddr_reg:x3; val_offset:29793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29793*FLEN/8, x4, x1, x2) - -inst_9932: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfffff8; valaddr_reg:x3; val_offset:29796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29796*FLEN/8, x4, x1, x2) - -inst_9933: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfffffc; valaddr_reg:x3; val_offset:29799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29799*FLEN/8, x4, x1, x2) - -inst_9934: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dfffffe; valaddr_reg:x3; val_offset:29802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29802*FLEN/8, x4, x1, x2) - -inst_9935: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7dffffff; valaddr_reg:x3; val_offset:29805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29805*FLEN/8, x4, x1, x2) - -inst_9936: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f000001; valaddr_reg:x3; val_offset:29808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29808*FLEN/8, x4, x1, x2) - -inst_9937: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f000003; valaddr_reg:x3; val_offset:29811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29811*FLEN/8, x4, x1, x2) - -inst_9938: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f000007; valaddr_reg:x3; val_offset:29814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29814*FLEN/8, x4, x1, x2) - -inst_9939: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f199999; valaddr_reg:x3; val_offset:29817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29817*FLEN/8, x4, x1, x2) - -inst_9940: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f249249; valaddr_reg:x3; val_offset:29820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29820*FLEN/8, x4, x1, x2) - -inst_9941: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f333333; valaddr_reg:x3; val_offset:29823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29823*FLEN/8, x4, x1, x2) - -inst_9942: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:29826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29826*FLEN/8, x4, x1, x2) - -inst_9943: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:29829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29829*FLEN/8, x4, x1, x2) - -inst_9944: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f444444; valaddr_reg:x3; val_offset:29832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29832*FLEN/8, x4, x1, x2) - -inst_9945: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:29835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29835*FLEN/8, x4, x1, x2) - -inst_9946: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:29838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29838*FLEN/8, x4, x1, x2) - -inst_9947: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f666666; valaddr_reg:x3; val_offset:29841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29841*FLEN/8, x4, x1, x2) - -inst_9948: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:29844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29844*FLEN/8, x4, x1, x2) - -inst_9949: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:29847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29847*FLEN/8, x4, x1, x2) - -inst_9950: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:29850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29850*FLEN/8, x4, x1, x2) - -inst_9951: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:29853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29853*FLEN/8, x4, x1, x2) - -inst_9952: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb800000; valaddr_reg:x3; val_offset:29856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29856*FLEN/8, x4, x1, x2) - -inst_9953: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb800001; valaddr_reg:x3; val_offset:29859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29859*FLEN/8, x4, x1, x2) - -inst_9954: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb800003; valaddr_reg:x3; val_offset:29862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29862*FLEN/8, x4, x1, x2) - -inst_9955: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb800007; valaddr_reg:x3; val_offset:29865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29865*FLEN/8, x4, x1, x2) - -inst_9956: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb80000f; valaddr_reg:x3; val_offset:29868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29868*FLEN/8, x4, x1, x2) - -inst_9957: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb80001f; valaddr_reg:x3; val_offset:29871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29871*FLEN/8, x4, x1, x2) - -inst_9958: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb80003f; valaddr_reg:x3; val_offset:29874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29874*FLEN/8, x4, x1, x2) - -inst_9959: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb80007f; valaddr_reg:x3; val_offset:29877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29877*FLEN/8, x4, x1, x2) - -inst_9960: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb8000ff; valaddr_reg:x3; val_offset:29880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29880*FLEN/8, x4, x1, x2) - -inst_9961: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb8001ff; valaddr_reg:x3; val_offset:29883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29883*FLEN/8, x4, x1, x2) - -inst_9962: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb8003ff; valaddr_reg:x3; val_offset:29886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29886*FLEN/8, x4, x1, x2) - -inst_9963: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb8007ff; valaddr_reg:x3; val_offset:29889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29889*FLEN/8, x4, x1, x2) - -inst_9964: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb800fff; valaddr_reg:x3; val_offset:29892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29892*FLEN/8, x4, x1, x2) - -inst_9965: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb801fff; valaddr_reg:x3; val_offset:29895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29895*FLEN/8, x4, x1, x2) - -inst_9966: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb803fff; valaddr_reg:x3; val_offset:29898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29898*FLEN/8, x4, x1, x2) - -inst_9967: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb807fff; valaddr_reg:x3; val_offset:29901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29901*FLEN/8, x4, x1, x2) - -inst_9968: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb80ffff; valaddr_reg:x3; val_offset:29904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29904*FLEN/8, x4, x1, x2) - -inst_9969: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb81ffff; valaddr_reg:x3; val_offset:29907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29907*FLEN/8, x4, x1, x2) - -inst_9970: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb83ffff; valaddr_reg:x3; val_offset:29910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29910*FLEN/8, x4, x1, x2) - -inst_9971: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb87ffff; valaddr_reg:x3; val_offset:29913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29913*FLEN/8, x4, x1, x2) - -inst_9972: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb8fffff; valaddr_reg:x3; val_offset:29916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29916*FLEN/8, x4, x1, x2) - -inst_9973: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfb9fffff; valaddr_reg:x3; val_offset:29919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29919*FLEN/8, x4, x1, x2) - -inst_9974: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbbfffff; valaddr_reg:x3; val_offset:29922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29922*FLEN/8, x4, x1, x2) - -inst_9975: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbc00000; valaddr_reg:x3; val_offset:29925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29925*FLEN/8, x4, x1, x2) - -inst_9976: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbe00000; valaddr_reg:x3; val_offset:29928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29928*FLEN/8, x4, x1, x2) - -inst_9977: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbf00000; valaddr_reg:x3; val_offset:29931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29931*FLEN/8, x4, x1, x2) - -inst_9978: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbf80000; valaddr_reg:x3; val_offset:29934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29934*FLEN/8, x4, x1, x2) - -inst_9979: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfc0000; valaddr_reg:x3; val_offset:29937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29937*FLEN/8, x4, x1, x2) - -inst_9980: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfe0000; valaddr_reg:x3; val_offset:29940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29940*FLEN/8, x4, x1, x2) - -inst_9981: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbff0000; valaddr_reg:x3; val_offset:29943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29943*FLEN/8, x4, x1, x2) - -inst_9982: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbff8000; valaddr_reg:x3; val_offset:29946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29946*FLEN/8, x4, x1, x2) - -inst_9983: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbffc000; valaddr_reg:x3; val_offset:29949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29949*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_79) - -inst_9984: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbffe000; valaddr_reg:x3; val_offset:29952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29952*FLEN/8, x4, x1, x2) - -inst_9985: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfff000; valaddr_reg:x3; val_offset:29955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29955*FLEN/8, x4, x1, x2) - -inst_9986: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfff800; valaddr_reg:x3; val_offset:29958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29958*FLEN/8, x4, x1, x2) - -inst_9987: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfffc00; valaddr_reg:x3; val_offset:29961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29961*FLEN/8, x4, x1, x2) - -inst_9988: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfffe00; valaddr_reg:x3; val_offset:29964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29964*FLEN/8, x4, x1, x2) - -inst_9989: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbffff00; valaddr_reg:x3; val_offset:29967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29967*FLEN/8, x4, x1, x2) - -inst_9990: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbffff80; valaddr_reg:x3; val_offset:29970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29970*FLEN/8, x4, x1, x2) - -inst_9991: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbffffc0; valaddr_reg:x3; val_offset:29973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29973*FLEN/8, x4, x1, x2) - -inst_9992: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbffffe0; valaddr_reg:x3; val_offset:29976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29976*FLEN/8, x4, x1, x2) - -inst_9993: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfffff0; valaddr_reg:x3; val_offset:29979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29979*FLEN/8, x4, x1, x2) - -inst_9994: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfffff8; valaddr_reg:x3; val_offset:29982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29982*FLEN/8, x4, x1, x2) - -inst_9995: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfffffc; valaddr_reg:x3; val_offset:29985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29985*FLEN/8, x4, x1, x2) - -inst_9996: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbfffffe; valaddr_reg:x3; val_offset:29988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29988*FLEN/8, x4, x1, x2) - -inst_9997: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xfbffffff; valaddr_reg:x3; val_offset:29991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29991*FLEN/8, x4, x1, x2) - -inst_9998: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff000001; valaddr_reg:x3; val_offset:29994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29994*FLEN/8, x4, x1, x2) - -inst_9999: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff000003; valaddr_reg:x3; val_offset:29997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29997*FLEN/8, x4, x1, x2) - -inst_10000: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff000007; valaddr_reg:x3; val_offset:30000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30000*FLEN/8, x4, x1, x2) - -inst_10001: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff199999; valaddr_reg:x3; val_offset:30003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30003*FLEN/8, x4, x1, x2) - -inst_10002: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff249249; valaddr_reg:x3; val_offset:30006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30006*FLEN/8, x4, x1, x2) - -inst_10003: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff333333; valaddr_reg:x3; val_offset:30009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30009*FLEN/8, x4, x1, x2) - -inst_10004: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:30012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30012*FLEN/8, x4, x1, x2) - -inst_10005: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:30015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30015*FLEN/8, x4, x1, x2) - -inst_10006: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff444444; valaddr_reg:x3; val_offset:30018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30018*FLEN/8, x4, x1, x2) - -inst_10007: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:30021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30021*FLEN/8, x4, x1, x2) - -inst_10008: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:30024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30024*FLEN/8, x4, x1, x2) - -inst_10009: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff666666; valaddr_reg:x3; val_offset:30027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30027*FLEN/8, x4, x1, x2) - -inst_10010: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:30030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30030*FLEN/8, x4, x1, x2) - -inst_10011: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:30033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30033*FLEN/8, x4, x1, x2) - -inst_10012: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:30036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30036*FLEN/8, x4, x1, x2) - -inst_10013: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:30039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30039*FLEN/8, x4, x1, x2) - -inst_10014: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61000000; valaddr_reg:x3; val_offset:30042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30042*FLEN/8, x4, x1, x2) - -inst_10015: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61000001; valaddr_reg:x3; val_offset:30045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30045*FLEN/8, x4, x1, x2) - -inst_10016: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61000003; valaddr_reg:x3; val_offset:30048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30048*FLEN/8, x4, x1, x2) - -inst_10017: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61000007; valaddr_reg:x3; val_offset:30051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30051*FLEN/8, x4, x1, x2) - -inst_10018: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x6100000f; valaddr_reg:x3; val_offset:30054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30054*FLEN/8, x4, x1, x2) - -inst_10019: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x6100001f; valaddr_reg:x3; val_offset:30057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30057*FLEN/8, x4, x1, x2) - -inst_10020: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x6100003f; valaddr_reg:x3; val_offset:30060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30060*FLEN/8, x4, x1, x2) - -inst_10021: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x6100007f; valaddr_reg:x3; val_offset:30063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30063*FLEN/8, x4, x1, x2) - -inst_10022: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x610000ff; valaddr_reg:x3; val_offset:30066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30066*FLEN/8, x4, x1, x2) - -inst_10023: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x610001ff; valaddr_reg:x3; val_offset:30069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30069*FLEN/8, x4, x1, x2) - -inst_10024: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x610003ff; valaddr_reg:x3; val_offset:30072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30072*FLEN/8, x4, x1, x2) - -inst_10025: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x610007ff; valaddr_reg:x3; val_offset:30075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30075*FLEN/8, x4, x1, x2) - -inst_10026: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61000fff; valaddr_reg:x3; val_offset:30078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30078*FLEN/8, x4, x1, x2) - -inst_10027: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61001fff; valaddr_reg:x3; val_offset:30081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30081*FLEN/8, x4, x1, x2) - -inst_10028: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61003fff; valaddr_reg:x3; val_offset:30084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30084*FLEN/8, x4, x1, x2) - -inst_10029: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61007fff; valaddr_reg:x3; val_offset:30087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30087*FLEN/8, x4, x1, x2) - -inst_10030: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x6100ffff; valaddr_reg:x3; val_offset:30090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30090*FLEN/8, x4, x1, x2) - -inst_10031: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x6101ffff; valaddr_reg:x3; val_offset:30093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30093*FLEN/8, x4, x1, x2) - -inst_10032: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x6103ffff; valaddr_reg:x3; val_offset:30096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30096*FLEN/8, x4, x1, x2) - -inst_10033: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x6107ffff; valaddr_reg:x3; val_offset:30099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30099*FLEN/8, x4, x1, x2) - -inst_10034: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x610fffff; valaddr_reg:x3; val_offset:30102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30102*FLEN/8, x4, x1, x2) - -inst_10035: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x611fffff; valaddr_reg:x3; val_offset:30105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30105*FLEN/8, x4, x1, x2) - -inst_10036: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x613fffff; valaddr_reg:x3; val_offset:30108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30108*FLEN/8, x4, x1, x2) - -inst_10037: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61400000; valaddr_reg:x3; val_offset:30111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30111*FLEN/8, x4, x1, x2) - -inst_10038: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61600000; valaddr_reg:x3; val_offset:30114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30114*FLEN/8, x4, x1, x2) - -inst_10039: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61700000; valaddr_reg:x3; val_offset:30117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30117*FLEN/8, x4, x1, x2) - -inst_10040: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x61780000; valaddr_reg:x3; val_offset:30120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30120*FLEN/8, x4, x1, x2) - -inst_10041: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617c0000; valaddr_reg:x3; val_offset:30123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30123*FLEN/8, x4, x1, x2) - -inst_10042: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617e0000; valaddr_reg:x3; val_offset:30126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30126*FLEN/8, x4, x1, x2) - -inst_10043: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617f0000; valaddr_reg:x3; val_offset:30129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30129*FLEN/8, x4, x1, x2) - -inst_10044: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617f8000; valaddr_reg:x3; val_offset:30132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30132*FLEN/8, x4, x1, x2) - -inst_10045: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617fc000; valaddr_reg:x3; val_offset:30135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30135*FLEN/8, x4, x1, x2) - -inst_10046: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617fe000; valaddr_reg:x3; val_offset:30138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30138*FLEN/8, x4, x1, x2) - -inst_10047: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617ff000; valaddr_reg:x3; val_offset:30141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30141*FLEN/8, x4, x1, x2) - -inst_10048: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617ff800; valaddr_reg:x3; val_offset:30144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30144*FLEN/8, x4, x1, x2) - -inst_10049: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617ffc00; valaddr_reg:x3; val_offset:30147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30147*FLEN/8, x4, x1, x2) - -inst_10050: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617ffe00; valaddr_reg:x3; val_offset:30150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30150*FLEN/8, x4, x1, x2) - -inst_10051: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617fff00; valaddr_reg:x3; val_offset:30153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30153*FLEN/8, x4, x1, x2) - -inst_10052: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617fff80; valaddr_reg:x3; val_offset:30156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30156*FLEN/8, x4, x1, x2) - -inst_10053: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617fffc0; valaddr_reg:x3; val_offset:30159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30159*FLEN/8, x4, x1, x2) - -inst_10054: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617fffe0; valaddr_reg:x3; val_offset:30162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30162*FLEN/8, x4, x1, x2) - -inst_10055: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617ffff0; valaddr_reg:x3; val_offset:30165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30165*FLEN/8, x4, x1, x2) - -inst_10056: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617ffff8; valaddr_reg:x3; val_offset:30168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30168*FLEN/8, x4, x1, x2) - -inst_10057: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617ffffc; valaddr_reg:x3; val_offset:30171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30171*FLEN/8, x4, x1, x2) - -inst_10058: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617ffffe; valaddr_reg:x3; val_offset:30174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30174*FLEN/8, x4, x1, x2) - -inst_10059: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x617fffff; valaddr_reg:x3; val_offset:30177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30177*FLEN/8, x4, x1, x2) - -inst_10060: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f000001; valaddr_reg:x3; val_offset:30180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30180*FLEN/8, x4, x1, x2) - -inst_10061: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f000003; valaddr_reg:x3; val_offset:30183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30183*FLEN/8, x4, x1, x2) - -inst_10062: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f000007; valaddr_reg:x3; val_offset:30186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30186*FLEN/8, x4, x1, x2) - -inst_10063: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f199999; valaddr_reg:x3; val_offset:30189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30189*FLEN/8, x4, x1, x2) - -inst_10064: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f249249; valaddr_reg:x3; val_offset:30192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30192*FLEN/8, x4, x1, x2) - -inst_10065: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f333333; valaddr_reg:x3; val_offset:30195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30195*FLEN/8, x4, x1, x2) - -inst_10066: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:30198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30198*FLEN/8, x4, x1, x2) - -inst_10067: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:30201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30201*FLEN/8, x4, x1, x2) - -inst_10068: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f444444; valaddr_reg:x3; val_offset:30204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30204*FLEN/8, x4, x1, x2) - -inst_10069: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:30207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30207*FLEN/8, x4, x1, x2) - -inst_10070: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:30210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30210*FLEN/8, x4, x1, x2) - -inst_10071: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f666666; valaddr_reg:x3; val_offset:30213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30213*FLEN/8, x4, x1, x2) - -inst_10072: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:30216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30216*FLEN/8, x4, x1, x2) - -inst_10073: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:30219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30219*FLEN/8, x4, x1, x2) - -inst_10074: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:30222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30222*FLEN/8, x4, x1, x2) - -inst_10075: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:30225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30225*FLEN/8, x4, x1, x2) - -inst_10076: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6800000; valaddr_reg:x3; val_offset:30228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30228*FLEN/8, x4, x1, x2) - -inst_10077: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6800001; valaddr_reg:x3; val_offset:30231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30231*FLEN/8, x4, x1, x2) - -inst_10078: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6800003; valaddr_reg:x3; val_offset:30234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30234*FLEN/8, x4, x1, x2) - -inst_10079: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6800007; valaddr_reg:x3; val_offset:30237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30237*FLEN/8, x4, x1, x2) - -inst_10080: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf680000f; valaddr_reg:x3; val_offset:30240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30240*FLEN/8, x4, x1, x2) - -inst_10081: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf680001f; valaddr_reg:x3; val_offset:30243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30243*FLEN/8, x4, x1, x2) - -inst_10082: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf680003f; valaddr_reg:x3; val_offset:30246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30246*FLEN/8, x4, x1, x2) - -inst_10083: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf680007f; valaddr_reg:x3; val_offset:30249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30249*FLEN/8, x4, x1, x2) - -inst_10084: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf68000ff; valaddr_reg:x3; val_offset:30252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30252*FLEN/8, x4, x1, x2) - -inst_10085: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf68001ff; valaddr_reg:x3; val_offset:30255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30255*FLEN/8, x4, x1, x2) - -inst_10086: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf68003ff; valaddr_reg:x3; val_offset:30258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30258*FLEN/8, x4, x1, x2) - -inst_10087: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf68007ff; valaddr_reg:x3; val_offset:30261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30261*FLEN/8, x4, x1, x2) - -inst_10088: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6800fff; valaddr_reg:x3; val_offset:30264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30264*FLEN/8, x4, x1, x2) - -inst_10089: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6801fff; valaddr_reg:x3; val_offset:30267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30267*FLEN/8, x4, x1, x2) - -inst_10090: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6803fff; valaddr_reg:x3; val_offset:30270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30270*FLEN/8, x4, x1, x2) - -inst_10091: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6807fff; valaddr_reg:x3; val_offset:30273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30273*FLEN/8, x4, x1, x2) - -inst_10092: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf680ffff; valaddr_reg:x3; val_offset:30276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30276*FLEN/8, x4, x1, x2) - -inst_10093: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf681ffff; valaddr_reg:x3; val_offset:30279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30279*FLEN/8, x4, x1, x2) - -inst_10094: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf683ffff; valaddr_reg:x3; val_offset:30282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30282*FLEN/8, x4, x1, x2) - -inst_10095: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf687ffff; valaddr_reg:x3; val_offset:30285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30285*FLEN/8, x4, x1, x2) - -inst_10096: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf68fffff; valaddr_reg:x3; val_offset:30288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30288*FLEN/8, x4, x1, x2) - -inst_10097: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf69fffff; valaddr_reg:x3; val_offset:30291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30291*FLEN/8, x4, x1, x2) - -inst_10098: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6bfffff; valaddr_reg:x3; val_offset:30294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30294*FLEN/8, x4, x1, x2) - -inst_10099: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6c00000; valaddr_reg:x3; val_offset:30297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30297*FLEN/8, x4, x1, x2) - -inst_10100: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6e00000; valaddr_reg:x3; val_offset:30300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30300*FLEN/8, x4, x1, x2) - -inst_10101: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6f00000; valaddr_reg:x3; val_offset:30303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30303*FLEN/8, x4, x1, x2) - -inst_10102: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6f80000; valaddr_reg:x3; val_offset:30306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30306*FLEN/8, x4, x1, x2) - -inst_10103: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fc0000; valaddr_reg:x3; val_offset:30309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30309*FLEN/8, x4, x1, x2) - -inst_10104: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fe0000; valaddr_reg:x3; val_offset:30312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30312*FLEN/8, x4, x1, x2) - -inst_10105: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ff0000; valaddr_reg:x3; val_offset:30315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30315*FLEN/8, x4, x1, x2) - -inst_10106: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ff8000; valaddr_reg:x3; val_offset:30318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30318*FLEN/8, x4, x1, x2) - -inst_10107: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ffc000; valaddr_reg:x3; val_offset:30321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30321*FLEN/8, x4, x1, x2) - -inst_10108: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ffe000; valaddr_reg:x3; val_offset:30324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30324*FLEN/8, x4, x1, x2) - -inst_10109: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fff000; valaddr_reg:x3; val_offset:30327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30327*FLEN/8, x4, x1, x2) - -inst_10110: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fff800; valaddr_reg:x3; val_offset:30330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30330*FLEN/8, x4, x1, x2) - -inst_10111: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fffc00; valaddr_reg:x3; val_offset:30333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30333*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_80) - -inst_10112: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fffe00; valaddr_reg:x3; val_offset:30336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30336*FLEN/8, x4, x1, x2) - -inst_10113: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ffff00; valaddr_reg:x3; val_offset:30339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30339*FLEN/8, x4, x1, x2) - -inst_10114: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ffff80; valaddr_reg:x3; val_offset:30342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30342*FLEN/8, x4, x1, x2) - -inst_10115: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ffffc0; valaddr_reg:x3; val_offset:30345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30345*FLEN/8, x4, x1, x2) - -inst_10116: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ffffe0; valaddr_reg:x3; val_offset:30348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30348*FLEN/8, x4, x1, x2) - -inst_10117: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fffff0; valaddr_reg:x3; val_offset:30351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30351*FLEN/8, x4, x1, x2) - -inst_10118: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fffff8; valaddr_reg:x3; val_offset:30354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30354*FLEN/8, x4, x1, x2) - -inst_10119: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fffffc; valaddr_reg:x3; val_offset:30357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30357*FLEN/8, x4, x1, x2) - -inst_10120: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6fffffe; valaddr_reg:x3; val_offset:30360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30360*FLEN/8, x4, x1, x2) - -inst_10121: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xf6ffffff; valaddr_reg:x3; val_offset:30363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30363*FLEN/8, x4, x1, x2) - -inst_10122: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff000001; valaddr_reg:x3; val_offset:30366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30366*FLEN/8, x4, x1, x2) - -inst_10123: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff000003; valaddr_reg:x3; val_offset:30369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30369*FLEN/8, x4, x1, x2) - -inst_10124: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff000007; valaddr_reg:x3; val_offset:30372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30372*FLEN/8, x4, x1, x2) - -inst_10125: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff199999; valaddr_reg:x3; val_offset:30375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30375*FLEN/8, x4, x1, x2) - -inst_10126: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff249249; valaddr_reg:x3; val_offset:30378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30378*FLEN/8, x4, x1, x2) - -inst_10127: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff333333; valaddr_reg:x3; val_offset:30381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30381*FLEN/8, x4, x1, x2) - -inst_10128: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:30384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30384*FLEN/8, x4, x1, x2) - -inst_10129: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:30387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30387*FLEN/8, x4, x1, x2) - -inst_10130: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff444444; valaddr_reg:x3; val_offset:30390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30390*FLEN/8, x4, x1, x2) - -inst_10131: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:30393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30393*FLEN/8, x4, x1, x2) - -inst_10132: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:30396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30396*FLEN/8, x4, x1, x2) - -inst_10133: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff666666; valaddr_reg:x3; val_offset:30399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30399*FLEN/8, x4, x1, x2) - -inst_10134: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:30402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30402*FLEN/8, x4, x1, x2) - -inst_10135: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:30405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30405*FLEN/8, x4, x1, x2) - -inst_10136: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:30408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30408*FLEN/8, x4, x1, x2) - -inst_10137: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:30411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30411*FLEN/8, x4, x1, x2) - -inst_10138: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:30414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30414*FLEN/8, x4, x1, x2) - -inst_10139: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:30417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30417*FLEN/8, x4, x1, x2) - -inst_10140: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:30420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30420*FLEN/8, x4, x1, x2) - -inst_10141: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:30423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30423*FLEN/8, x4, x1, x2) - -inst_10142: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:30426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30426*FLEN/8, x4, x1, x2) - -inst_10143: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:30429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30429*FLEN/8, x4, x1, x2) - -inst_10144: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:30432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30432*FLEN/8, x4, x1, x2) - -inst_10145: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:30435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30435*FLEN/8, x4, x1, x2) - -inst_10146: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:30438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30438*FLEN/8, x4, x1, x2) - -inst_10147: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:30441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30441*FLEN/8, x4, x1, x2) - -inst_10148: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:30444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30444*FLEN/8, x4, x1, x2) - -inst_10149: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:30447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30447*FLEN/8, x4, x1, x2) - -inst_10150: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:30450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30450*FLEN/8, x4, x1, x2) - -inst_10151: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:30453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30453*FLEN/8, x4, x1, x2) - -inst_10152: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:30456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30456*FLEN/8, x4, x1, x2) - -inst_10153: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:30459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30459*FLEN/8, x4, x1, x2) - -inst_10154: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a000000; valaddr_reg:x3; val_offset:30462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30462*FLEN/8, x4, x1, x2) - -inst_10155: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a000001; valaddr_reg:x3; val_offset:30465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30465*FLEN/8, x4, x1, x2) - -inst_10156: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a000003; valaddr_reg:x3; val_offset:30468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30468*FLEN/8, x4, x1, x2) - -inst_10157: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a000007; valaddr_reg:x3; val_offset:30471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30471*FLEN/8, x4, x1, x2) - -inst_10158: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a00000f; valaddr_reg:x3; val_offset:30474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30474*FLEN/8, x4, x1, x2) - -inst_10159: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a00001f; valaddr_reg:x3; val_offset:30477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30477*FLEN/8, x4, x1, x2) - -inst_10160: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a00003f; valaddr_reg:x3; val_offset:30480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30480*FLEN/8, x4, x1, x2) - -inst_10161: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a00007f; valaddr_reg:x3; val_offset:30483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30483*FLEN/8, x4, x1, x2) - -inst_10162: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a0000ff; valaddr_reg:x3; val_offset:30486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30486*FLEN/8, x4, x1, x2) - -inst_10163: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a0001ff; valaddr_reg:x3; val_offset:30489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30489*FLEN/8, x4, x1, x2) - -inst_10164: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a0003ff; valaddr_reg:x3; val_offset:30492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30492*FLEN/8, x4, x1, x2) - -inst_10165: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a0007ff; valaddr_reg:x3; val_offset:30495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30495*FLEN/8, x4, x1, x2) - -inst_10166: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a000fff; valaddr_reg:x3; val_offset:30498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30498*FLEN/8, x4, x1, x2) - -inst_10167: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a001fff; valaddr_reg:x3; val_offset:30501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30501*FLEN/8, x4, x1, x2) - -inst_10168: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a003fff; valaddr_reg:x3; val_offset:30504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30504*FLEN/8, x4, x1, x2) - -inst_10169: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a007fff; valaddr_reg:x3; val_offset:30507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30507*FLEN/8, x4, x1, x2) - -inst_10170: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a00ffff; valaddr_reg:x3; val_offset:30510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30510*FLEN/8, x4, x1, x2) - -inst_10171: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a01ffff; valaddr_reg:x3; val_offset:30513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30513*FLEN/8, x4, x1, x2) - -inst_10172: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a03ffff; valaddr_reg:x3; val_offset:30516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30516*FLEN/8, x4, x1, x2) - -inst_10173: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a07ffff; valaddr_reg:x3; val_offset:30519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30519*FLEN/8, x4, x1, x2) - -inst_10174: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a0fffff; valaddr_reg:x3; val_offset:30522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30522*FLEN/8, x4, x1, x2) - -inst_10175: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a1fffff; valaddr_reg:x3; val_offset:30525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30525*FLEN/8, x4, x1, x2) - -inst_10176: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a3fffff; valaddr_reg:x3; val_offset:30528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30528*FLEN/8, x4, x1, x2) - -inst_10177: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a400000; valaddr_reg:x3; val_offset:30531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30531*FLEN/8, x4, x1, x2) - -inst_10178: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a600000; valaddr_reg:x3; val_offset:30534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30534*FLEN/8, x4, x1, x2) - -inst_10179: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a700000; valaddr_reg:x3; val_offset:30537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30537*FLEN/8, x4, x1, x2) - -inst_10180: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a780000; valaddr_reg:x3; val_offset:30540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30540*FLEN/8, x4, x1, x2) - -inst_10181: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7c0000; valaddr_reg:x3; val_offset:30543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30543*FLEN/8, x4, x1, x2) - -inst_10182: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7e0000; valaddr_reg:x3; val_offset:30546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30546*FLEN/8, x4, x1, x2) - -inst_10183: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7f0000; valaddr_reg:x3; val_offset:30549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30549*FLEN/8, x4, x1, x2) - -inst_10184: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7f8000; valaddr_reg:x3; val_offset:30552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30552*FLEN/8, x4, x1, x2) - -inst_10185: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7fc000; valaddr_reg:x3; val_offset:30555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30555*FLEN/8, x4, x1, x2) - -inst_10186: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7fe000; valaddr_reg:x3; val_offset:30558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30558*FLEN/8, x4, x1, x2) - -inst_10187: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7ff000; valaddr_reg:x3; val_offset:30561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30561*FLEN/8, x4, x1, x2) - -inst_10188: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7ff800; valaddr_reg:x3; val_offset:30564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30564*FLEN/8, x4, x1, x2) - -inst_10189: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:30567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30567*FLEN/8, x4, x1, x2) - -inst_10190: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:30570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30570*FLEN/8, x4, x1, x2) - -inst_10191: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7fff00; valaddr_reg:x3; val_offset:30573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30573*FLEN/8, x4, x1, x2) - -inst_10192: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7fff80; valaddr_reg:x3; val_offset:30576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30576*FLEN/8, x4, x1, x2) - -inst_10193: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:30579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30579*FLEN/8, x4, x1, x2) - -inst_10194: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:30582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30582*FLEN/8, x4, x1, x2) - -inst_10195: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:30585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30585*FLEN/8, x4, x1, x2) - -inst_10196: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:30588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30588*FLEN/8, x4, x1, x2) - -inst_10197: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:30591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30591*FLEN/8, x4, x1, x2) - -inst_10198: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:30594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30594*FLEN/8, x4, x1, x2) - -inst_10199: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; -op3val:0x8a7fffff; valaddr_reg:x3; val_offset:30597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30597*FLEN/8, x4, x1, x2) - -inst_10200: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbf800001; valaddr_reg:x3; val_offset:30600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30600*FLEN/8, x4, x1, x2) - -inst_10201: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbf800003; valaddr_reg:x3; val_offset:30603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30603*FLEN/8, x4, x1, x2) - -inst_10202: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbf800007; valaddr_reg:x3; val_offset:30606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30606*FLEN/8, x4, x1, x2) - -inst_10203: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbf999999; valaddr_reg:x3; val_offset:30609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30609*FLEN/8, x4, x1, x2) - -inst_10204: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:30612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30612*FLEN/8, x4, x1, x2) - -inst_10205: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:30615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30615*FLEN/8, x4, x1, x2) - -inst_10206: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:30618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30618*FLEN/8, x4, x1, x2) - -inst_10207: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:30621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30621*FLEN/8, x4, x1, x2) - -inst_10208: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:30624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30624*FLEN/8, x4, x1, x2) - -inst_10209: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:30627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30627*FLEN/8, x4, x1, x2) - -inst_10210: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:30630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30630*FLEN/8, x4, x1, x2) - -inst_10211: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:30633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30633*FLEN/8, x4, x1, x2) - -inst_10212: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:30636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30636*FLEN/8, x4, x1, x2) - -inst_10213: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:30639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30639*FLEN/8, x4, x1, x2) - -inst_10214: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:30642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30642*FLEN/8, x4, x1, x2) - -inst_10215: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:30645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30645*FLEN/8, x4, x1, x2) - -inst_10216: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0000000; valaddr_reg:x3; val_offset:30648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30648*FLEN/8, x4, x1, x2) - -inst_10217: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0000001; valaddr_reg:x3; val_offset:30651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30651*FLEN/8, x4, x1, x2) - -inst_10218: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0000003; valaddr_reg:x3; val_offset:30654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30654*FLEN/8, x4, x1, x2) - -inst_10219: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0000007; valaddr_reg:x3; val_offset:30657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30657*FLEN/8, x4, x1, x2) - -inst_10220: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc000000f; valaddr_reg:x3; val_offset:30660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30660*FLEN/8, x4, x1, x2) - -inst_10221: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc000001f; valaddr_reg:x3; val_offset:30663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30663*FLEN/8, x4, x1, x2) - -inst_10222: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc000003f; valaddr_reg:x3; val_offset:30666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30666*FLEN/8, x4, x1, x2) - -inst_10223: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc000007f; valaddr_reg:x3; val_offset:30669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30669*FLEN/8, x4, x1, x2) - -inst_10224: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc00000ff; valaddr_reg:x3; val_offset:30672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30672*FLEN/8, x4, x1, x2) - -inst_10225: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc00001ff; valaddr_reg:x3; val_offset:30675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30675*FLEN/8, x4, x1, x2) - -inst_10226: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc00003ff; valaddr_reg:x3; val_offset:30678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30678*FLEN/8, x4, x1, x2) - -inst_10227: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc00007ff; valaddr_reg:x3; val_offset:30681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30681*FLEN/8, x4, x1, x2) - -inst_10228: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0000fff; valaddr_reg:x3; val_offset:30684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30684*FLEN/8, x4, x1, x2) - -inst_10229: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0001fff; valaddr_reg:x3; val_offset:30687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30687*FLEN/8, x4, x1, x2) - -inst_10230: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0003fff; valaddr_reg:x3; val_offset:30690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30690*FLEN/8, x4, x1, x2) - -inst_10231: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0007fff; valaddr_reg:x3; val_offset:30693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30693*FLEN/8, x4, x1, x2) - -inst_10232: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc000ffff; valaddr_reg:x3; val_offset:30696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30696*FLEN/8, x4, x1, x2) - -inst_10233: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc001ffff; valaddr_reg:x3; val_offset:30699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30699*FLEN/8, x4, x1, x2) - -inst_10234: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc003ffff; valaddr_reg:x3; val_offset:30702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30702*FLEN/8, x4, x1, x2) - -inst_10235: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc007ffff; valaddr_reg:x3; val_offset:30705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30705*FLEN/8, x4, x1, x2) - -inst_10236: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc00fffff; valaddr_reg:x3; val_offset:30708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30708*FLEN/8, x4, x1, x2) - -inst_10237: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc01fffff; valaddr_reg:x3; val_offset:30711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30711*FLEN/8, x4, x1, x2) - -inst_10238: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc03fffff; valaddr_reg:x3; val_offset:30714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30714*FLEN/8, x4, x1, x2) - -inst_10239: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0400000; valaddr_reg:x3; val_offset:30717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30717*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_81) - -inst_10240: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0600000; valaddr_reg:x3; val_offset:30720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30720*FLEN/8, x4, x1, x2) - -inst_10241: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0700000; valaddr_reg:x3; val_offset:30723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30723*FLEN/8, x4, x1, x2) - -inst_10242: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc0780000; valaddr_reg:x3; val_offset:30726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30726*FLEN/8, x4, x1, x2) - -inst_10243: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07c0000; valaddr_reg:x3; val_offset:30729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30729*FLEN/8, x4, x1, x2) - -inst_10244: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07e0000; valaddr_reg:x3; val_offset:30732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30732*FLEN/8, x4, x1, x2) - -inst_10245: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07f0000; valaddr_reg:x3; val_offset:30735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30735*FLEN/8, x4, x1, x2) - -inst_10246: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07f8000; valaddr_reg:x3; val_offset:30738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30738*FLEN/8, x4, x1, x2) - -inst_10247: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07fc000; valaddr_reg:x3; val_offset:30741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30741*FLEN/8, x4, x1, x2) - -inst_10248: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07fe000; valaddr_reg:x3; val_offset:30744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30744*FLEN/8, x4, x1, x2) - -inst_10249: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07ff000; valaddr_reg:x3; val_offset:30747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30747*FLEN/8, x4, x1, x2) - -inst_10250: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07ff800; valaddr_reg:x3; val_offset:30750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30750*FLEN/8, x4, x1, x2) - -inst_10251: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07ffc00; valaddr_reg:x3; val_offset:30753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30753*FLEN/8, x4, x1, x2) - -inst_10252: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07ffe00; valaddr_reg:x3; val_offset:30756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30756*FLEN/8, x4, x1, x2) - -inst_10253: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07fff00; valaddr_reg:x3; val_offset:30759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30759*FLEN/8, x4, x1, x2) - -inst_10254: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07fff80; valaddr_reg:x3; val_offset:30762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30762*FLEN/8, x4, x1, x2) - -inst_10255: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07fffc0; valaddr_reg:x3; val_offset:30765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30765*FLEN/8, x4, x1, x2) - -inst_10256: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07fffe0; valaddr_reg:x3; val_offset:30768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30768*FLEN/8, x4, x1, x2) - -inst_10257: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07ffff0; valaddr_reg:x3; val_offset:30771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30771*FLEN/8, x4, x1, x2) - -inst_10258: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07ffff8; valaddr_reg:x3; val_offset:30774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30774*FLEN/8, x4, x1, x2) - -inst_10259: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07ffffc; valaddr_reg:x3; val_offset:30777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30777*FLEN/8, x4, x1, x2) - -inst_10260: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07ffffe; valaddr_reg:x3; val_offset:30780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30780*FLEN/8, x4, x1, x2) - -inst_10261: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; -op3val:0xc07fffff; valaddr_reg:x3; val_offset:30783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30783*FLEN/8, x4, x1, x2) - -inst_10262: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4000000; valaddr_reg:x3; val_offset:30786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30786*FLEN/8, x4, x1, x2) - -inst_10263: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4000001; valaddr_reg:x3; val_offset:30789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30789*FLEN/8, x4, x1, x2) - -inst_10264: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4000003; valaddr_reg:x3; val_offset:30792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30792*FLEN/8, x4, x1, x2) - -inst_10265: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4000007; valaddr_reg:x3; val_offset:30795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30795*FLEN/8, x4, x1, x2) - -inst_10266: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf400000f; valaddr_reg:x3; val_offset:30798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30798*FLEN/8, x4, x1, x2) - -inst_10267: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf400001f; valaddr_reg:x3; val_offset:30801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30801*FLEN/8, x4, x1, x2) - -inst_10268: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf400003f; valaddr_reg:x3; val_offset:30804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30804*FLEN/8, x4, x1, x2) - -inst_10269: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf400007f; valaddr_reg:x3; val_offset:30807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30807*FLEN/8, x4, x1, x2) - -inst_10270: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf40000ff; valaddr_reg:x3; val_offset:30810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30810*FLEN/8, x4, x1, x2) - -inst_10271: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf40001ff; valaddr_reg:x3; val_offset:30813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30813*FLEN/8, x4, x1, x2) - -inst_10272: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf40003ff; valaddr_reg:x3; val_offset:30816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30816*FLEN/8, x4, x1, x2) - -inst_10273: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf40007ff; valaddr_reg:x3; val_offset:30819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30819*FLEN/8, x4, x1, x2) - -inst_10274: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4000fff; valaddr_reg:x3; val_offset:30822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30822*FLEN/8, x4, x1, x2) - -inst_10275: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4001fff; valaddr_reg:x3; val_offset:30825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30825*FLEN/8, x4, x1, x2) - -inst_10276: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4003fff; valaddr_reg:x3; val_offset:30828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30828*FLEN/8, x4, x1, x2) - -inst_10277: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4007fff; valaddr_reg:x3; val_offset:30831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30831*FLEN/8, x4, x1, x2) - -inst_10278: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf400ffff; valaddr_reg:x3; val_offset:30834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30834*FLEN/8, x4, x1, x2) - -inst_10279: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf401ffff; valaddr_reg:x3; val_offset:30837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30837*FLEN/8, x4, x1, x2) - -inst_10280: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf403ffff; valaddr_reg:x3; val_offset:30840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30840*FLEN/8, x4, x1, x2) - -inst_10281: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf407ffff; valaddr_reg:x3; val_offset:30843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30843*FLEN/8, x4, x1, x2) - -inst_10282: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf40fffff; valaddr_reg:x3; val_offset:30846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30846*FLEN/8, x4, x1, x2) - -inst_10283: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf41fffff; valaddr_reg:x3; val_offset:30849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30849*FLEN/8, x4, x1, x2) - -inst_10284: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf43fffff; valaddr_reg:x3; val_offset:30852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30852*FLEN/8, x4, x1, x2) - -inst_10285: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4400000; valaddr_reg:x3; val_offset:30855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30855*FLEN/8, x4, x1, x2) - -inst_10286: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4600000; valaddr_reg:x3; val_offset:30858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30858*FLEN/8, x4, x1, x2) - -inst_10287: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4700000; valaddr_reg:x3; val_offset:30861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30861*FLEN/8, x4, x1, x2) - -inst_10288: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf4780000; valaddr_reg:x3; val_offset:30864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30864*FLEN/8, x4, x1, x2) - -inst_10289: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47c0000; valaddr_reg:x3; val_offset:30867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30867*FLEN/8, x4, x1, x2) - -inst_10290: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47e0000; valaddr_reg:x3; val_offset:30870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30870*FLEN/8, x4, x1, x2) - -inst_10291: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47f0000; valaddr_reg:x3; val_offset:30873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30873*FLEN/8, x4, x1, x2) - -inst_10292: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47f8000; valaddr_reg:x3; val_offset:30876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30876*FLEN/8, x4, x1, x2) - -inst_10293: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47fc000; valaddr_reg:x3; val_offset:30879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30879*FLEN/8, x4, x1, x2) - -inst_10294: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47fe000; valaddr_reg:x3; val_offset:30882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30882*FLEN/8, x4, x1, x2) - -inst_10295: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47ff000; valaddr_reg:x3; val_offset:30885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30885*FLEN/8, x4, x1, x2) - -inst_10296: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47ff800; valaddr_reg:x3; val_offset:30888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30888*FLEN/8, x4, x1, x2) - -inst_10297: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47ffc00; valaddr_reg:x3; val_offset:30891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30891*FLEN/8, x4, x1, x2) - -inst_10298: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47ffe00; valaddr_reg:x3; val_offset:30894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30894*FLEN/8, x4, x1, x2) - -inst_10299: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47fff00; valaddr_reg:x3; val_offset:30897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30897*FLEN/8, x4, x1, x2) - -inst_10300: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47fff80; valaddr_reg:x3; val_offset:30900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30900*FLEN/8, x4, x1, x2) - -inst_10301: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47fffc0; valaddr_reg:x3; val_offset:30903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30903*FLEN/8, x4, x1, x2) - -inst_10302: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47fffe0; valaddr_reg:x3; val_offset:30906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30906*FLEN/8, x4, x1, x2) - -inst_10303: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47ffff0; valaddr_reg:x3; val_offset:30909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30909*FLEN/8, x4, x1, x2) - -inst_10304: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47ffff8; valaddr_reg:x3; val_offset:30912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30912*FLEN/8, x4, x1, x2) - -inst_10305: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47ffffc; valaddr_reg:x3; val_offset:30915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30915*FLEN/8, x4, x1, x2) - -inst_10306: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47ffffe; valaddr_reg:x3; val_offset:30918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30918*FLEN/8, x4, x1, x2) - -inst_10307: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xf47fffff; valaddr_reg:x3; val_offset:30921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30921*FLEN/8, x4, x1, x2) - -inst_10308: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff000001; valaddr_reg:x3; val_offset:30924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30924*FLEN/8, x4, x1, x2) - -inst_10309: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff000003; valaddr_reg:x3; val_offset:30927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30927*FLEN/8, x4, x1, x2) - -inst_10310: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff000007; valaddr_reg:x3; val_offset:30930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30930*FLEN/8, x4, x1, x2) - -inst_10311: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff199999; valaddr_reg:x3; val_offset:30933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30933*FLEN/8, x4, x1, x2) - -inst_10312: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff249249; valaddr_reg:x3; val_offset:30936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30936*FLEN/8, x4, x1, x2) - -inst_10313: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff333333; valaddr_reg:x3; val_offset:30939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30939*FLEN/8, x4, x1, x2) - -inst_10314: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:30942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30942*FLEN/8, x4, x1, x2) - -inst_10315: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:30945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30945*FLEN/8, x4, x1, x2) - -inst_10316: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff444444; valaddr_reg:x3; val_offset:30948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30948*FLEN/8, x4, x1, x2) - -inst_10317: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:30951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30951*FLEN/8, x4, x1, x2) - -inst_10318: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:30954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30954*FLEN/8, x4, x1, x2) - -inst_10319: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff666666; valaddr_reg:x3; val_offset:30957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30957*FLEN/8, x4, x1, x2) - -inst_10320: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:30960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30960*FLEN/8, x4, x1, x2) - -inst_10321: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:30963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30963*FLEN/8, x4, x1, x2) - -inst_10322: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:30966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30966*FLEN/8, x4, x1, x2) - -inst_10323: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:30969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30969*FLEN/8, x4, x1, x2) - -inst_10324: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:30972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30972*FLEN/8, x4, x1, x2) - -inst_10325: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:30975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30975*FLEN/8, x4, x1, x2) - -inst_10326: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:30978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30978*FLEN/8, x4, x1, x2) - -inst_10327: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:30981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30981*FLEN/8, x4, x1, x2) - -inst_10328: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:30984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30984*FLEN/8, x4, x1, x2) - -inst_10329: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:30987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30987*FLEN/8, x4, x1, x2) - -inst_10330: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:30990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30990*FLEN/8, x4, x1, x2) - -inst_10331: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:30993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30993*FLEN/8, x4, x1, x2) - -inst_10332: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:30996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30996*FLEN/8, x4, x1, x2) - -inst_10333: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:30999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30999*FLEN/8, x4, x1, x2) - -inst_10334: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:31002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31002*FLEN/8, x4, x1, x2) - -inst_10335: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:31005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31005*FLEN/8, x4, x1, x2) - -inst_10336: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:31008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31008*FLEN/8, x4, x1, x2) - -inst_10337: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:31011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31011*FLEN/8, x4, x1, x2) - -inst_10338: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:31014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31014*FLEN/8, x4, x1, x2) - -inst_10339: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:31017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31017*FLEN/8, x4, x1, x2) - -inst_10340: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7800000; valaddr_reg:x3; val_offset:31020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31020*FLEN/8, x4, x1, x2) - -inst_10341: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7800001; valaddr_reg:x3; val_offset:31023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31023*FLEN/8, x4, x1, x2) - -inst_10342: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7800003; valaddr_reg:x3; val_offset:31026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31026*FLEN/8, x4, x1, x2) - -inst_10343: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7800007; valaddr_reg:x3; val_offset:31029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31029*FLEN/8, x4, x1, x2) - -inst_10344: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x780000f; valaddr_reg:x3; val_offset:31032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31032*FLEN/8, x4, x1, x2) - -inst_10345: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x780001f; valaddr_reg:x3; val_offset:31035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31035*FLEN/8, x4, x1, x2) - -inst_10346: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x780003f; valaddr_reg:x3; val_offset:31038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31038*FLEN/8, x4, x1, x2) - -inst_10347: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x780007f; valaddr_reg:x3; val_offset:31041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31041*FLEN/8, x4, x1, x2) - -inst_10348: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x78000ff; valaddr_reg:x3; val_offset:31044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31044*FLEN/8, x4, x1, x2) - -inst_10349: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x78001ff; valaddr_reg:x3; val_offset:31047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31047*FLEN/8, x4, x1, x2) - -inst_10350: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x78003ff; valaddr_reg:x3; val_offset:31050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31050*FLEN/8, x4, x1, x2) - -inst_10351: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x78007ff; valaddr_reg:x3; val_offset:31053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31053*FLEN/8, x4, x1, x2) - -inst_10352: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7800fff; valaddr_reg:x3; val_offset:31056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31056*FLEN/8, x4, x1, x2) - -inst_10353: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7801fff; valaddr_reg:x3; val_offset:31059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31059*FLEN/8, x4, x1, x2) - -inst_10354: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7803fff; valaddr_reg:x3; val_offset:31062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31062*FLEN/8, x4, x1, x2) - -inst_10355: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7807fff; valaddr_reg:x3; val_offset:31065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31065*FLEN/8, x4, x1, x2) - -inst_10356: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x780ffff; valaddr_reg:x3; val_offset:31068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31068*FLEN/8, x4, x1, x2) - -inst_10357: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x781ffff; valaddr_reg:x3; val_offset:31071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31071*FLEN/8, x4, x1, x2) - -inst_10358: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x783ffff; valaddr_reg:x3; val_offset:31074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31074*FLEN/8, x4, x1, x2) - -inst_10359: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x787ffff; valaddr_reg:x3; val_offset:31077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31077*FLEN/8, x4, x1, x2) - -inst_10360: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x78fffff; valaddr_reg:x3; val_offset:31080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31080*FLEN/8, x4, x1, x2) - -inst_10361: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x79fffff; valaddr_reg:x3; val_offset:31083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31083*FLEN/8, x4, x1, x2) - -inst_10362: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7bfffff; valaddr_reg:x3; val_offset:31086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31086*FLEN/8, x4, x1, x2) - -inst_10363: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7c00000; valaddr_reg:x3; val_offset:31089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31089*FLEN/8, x4, x1, x2) - -inst_10364: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7e00000; valaddr_reg:x3; val_offset:31092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31092*FLEN/8, x4, x1, x2) - -inst_10365: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7f00000; valaddr_reg:x3; val_offset:31095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31095*FLEN/8, x4, x1, x2) - -inst_10366: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7f80000; valaddr_reg:x3; val_offset:31098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31098*FLEN/8, x4, x1, x2) - -inst_10367: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fc0000; valaddr_reg:x3; val_offset:31101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31101*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_82) - -inst_10368: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fe0000; valaddr_reg:x3; val_offset:31104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31104*FLEN/8, x4, x1, x2) - -inst_10369: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ff0000; valaddr_reg:x3; val_offset:31107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31107*FLEN/8, x4, x1, x2) - -inst_10370: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ff8000; valaddr_reg:x3; val_offset:31110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31110*FLEN/8, x4, x1, x2) - -inst_10371: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffc000; valaddr_reg:x3; val_offset:31113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31113*FLEN/8, x4, x1, x2) - -inst_10372: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffe000; valaddr_reg:x3; val_offset:31116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31116*FLEN/8, x4, x1, x2) - -inst_10373: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fff000; valaddr_reg:x3; val_offset:31119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31119*FLEN/8, x4, x1, x2) - -inst_10374: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fff800; valaddr_reg:x3; val_offset:31122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31122*FLEN/8, x4, x1, x2) - -inst_10375: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fffc00; valaddr_reg:x3; val_offset:31125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31125*FLEN/8, x4, x1, x2) - -inst_10376: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fffe00; valaddr_reg:x3; val_offset:31128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31128*FLEN/8, x4, x1, x2) - -inst_10377: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffff00; valaddr_reg:x3; val_offset:31131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31131*FLEN/8, x4, x1, x2) - -inst_10378: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffff80; valaddr_reg:x3; val_offset:31134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31134*FLEN/8, x4, x1, x2) - -inst_10379: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffffc0; valaddr_reg:x3; val_offset:31137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31137*FLEN/8, x4, x1, x2) - -inst_10380: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffffe0; valaddr_reg:x3; val_offset:31140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31140*FLEN/8, x4, x1, x2) - -inst_10381: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fffff0; valaddr_reg:x3; val_offset:31143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31143*FLEN/8, x4, x1, x2) - -inst_10382: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fffff8; valaddr_reg:x3; val_offset:31146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31146*FLEN/8, x4, x1, x2) - -inst_10383: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fffffc; valaddr_reg:x3; val_offset:31149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31149*FLEN/8, x4, x1, x2) - -inst_10384: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7fffffe; valaddr_reg:x3; val_offset:31152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31152*FLEN/8, x4, x1, x2) - -inst_10385: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; -op3val:0x7ffffff; valaddr_reg:x3; val_offset:31155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31155*FLEN/8, x4, x1, x2) - -inst_10386: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d000000; valaddr_reg:x3; val_offset:31158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31158*FLEN/8, x4, x1, x2) - -inst_10387: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d000001; valaddr_reg:x3; val_offset:31161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31161*FLEN/8, x4, x1, x2) - -inst_10388: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d000003; valaddr_reg:x3; val_offset:31164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31164*FLEN/8, x4, x1, x2) - -inst_10389: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d000007; valaddr_reg:x3; val_offset:31167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31167*FLEN/8, x4, x1, x2) - -inst_10390: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d00000f; valaddr_reg:x3; val_offset:31170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31170*FLEN/8, x4, x1, x2) - -inst_10391: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d00001f; valaddr_reg:x3; val_offset:31173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31173*FLEN/8, x4, x1, x2) - -inst_10392: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d00003f; valaddr_reg:x3; val_offset:31176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31176*FLEN/8, x4, x1, x2) - -inst_10393: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d00007f; valaddr_reg:x3; val_offset:31179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31179*FLEN/8, x4, x1, x2) - -inst_10394: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d0000ff; valaddr_reg:x3; val_offset:31182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31182*FLEN/8, x4, x1, x2) - -inst_10395: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d0001ff; valaddr_reg:x3; val_offset:31185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31185*FLEN/8, x4, x1, x2) - -inst_10396: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d0003ff; valaddr_reg:x3; val_offset:31188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31188*FLEN/8, x4, x1, x2) - -inst_10397: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d0007ff; valaddr_reg:x3; val_offset:31191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31191*FLEN/8, x4, x1, x2) - -inst_10398: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d000fff; valaddr_reg:x3; val_offset:31194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31194*FLEN/8, x4, x1, x2) - -inst_10399: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d001fff; valaddr_reg:x3; val_offset:31197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31197*FLEN/8, x4, x1, x2) - -inst_10400: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d003fff; valaddr_reg:x3; val_offset:31200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31200*FLEN/8, x4, x1, x2) - -inst_10401: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d007fff; valaddr_reg:x3; val_offset:31203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31203*FLEN/8, x4, x1, x2) - -inst_10402: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d00ffff; valaddr_reg:x3; val_offset:31206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31206*FLEN/8, x4, x1, x2) - -inst_10403: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d01ffff; valaddr_reg:x3; val_offset:31209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31209*FLEN/8, x4, x1, x2) - -inst_10404: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d03ffff; valaddr_reg:x3; val_offset:31212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31212*FLEN/8, x4, x1, x2) - -inst_10405: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d07ffff; valaddr_reg:x3; val_offset:31215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31215*FLEN/8, x4, x1, x2) - -inst_10406: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d0fffff; valaddr_reg:x3; val_offset:31218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31218*FLEN/8, x4, x1, x2) - -inst_10407: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d1fffff; valaddr_reg:x3; val_offset:31221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31221*FLEN/8, x4, x1, x2) - -inst_10408: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d3fffff; valaddr_reg:x3; val_offset:31224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31224*FLEN/8, x4, x1, x2) - -inst_10409: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d400000; valaddr_reg:x3; val_offset:31227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31227*FLEN/8, x4, x1, x2) - -inst_10410: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d600000; valaddr_reg:x3; val_offset:31230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31230*FLEN/8, x4, x1, x2) - -inst_10411: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d700000; valaddr_reg:x3; val_offset:31233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31233*FLEN/8, x4, x1, x2) - -inst_10412: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d780000; valaddr_reg:x3; val_offset:31236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31236*FLEN/8, x4, x1, x2) - -inst_10413: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7c0000; valaddr_reg:x3; val_offset:31239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31239*FLEN/8, x4, x1, x2) - -inst_10414: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7e0000; valaddr_reg:x3; val_offset:31242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31242*FLEN/8, x4, x1, x2) - -inst_10415: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7f0000; valaddr_reg:x3; val_offset:31245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31245*FLEN/8, x4, x1, x2) - -inst_10416: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7f8000; valaddr_reg:x3; val_offset:31248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31248*FLEN/8, x4, x1, x2) - -inst_10417: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7fc000; valaddr_reg:x3; val_offset:31251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31251*FLEN/8, x4, x1, x2) - -inst_10418: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7fe000; valaddr_reg:x3; val_offset:31254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31254*FLEN/8, x4, x1, x2) - -inst_10419: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7ff000; valaddr_reg:x3; val_offset:31257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31257*FLEN/8, x4, x1, x2) - -inst_10420: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7ff800; valaddr_reg:x3; val_offset:31260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31260*FLEN/8, x4, x1, x2) - -inst_10421: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7ffc00; valaddr_reg:x3; val_offset:31263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31263*FLEN/8, x4, x1, x2) - -inst_10422: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7ffe00; valaddr_reg:x3; val_offset:31266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31266*FLEN/8, x4, x1, x2) - -inst_10423: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7fff00; valaddr_reg:x3; val_offset:31269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31269*FLEN/8, x4, x1, x2) - -inst_10424: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7fff80; valaddr_reg:x3; val_offset:31272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31272*FLEN/8, x4, x1, x2) - -inst_10425: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7fffc0; valaddr_reg:x3; val_offset:31275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31275*FLEN/8, x4, x1, x2) - -inst_10426: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7fffe0; valaddr_reg:x3; val_offset:31278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31278*FLEN/8, x4, x1, x2) - -inst_10427: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7ffff0; valaddr_reg:x3; val_offset:31281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31281*FLEN/8, x4, x1, x2) - -inst_10428: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7ffff8; valaddr_reg:x3; val_offset:31284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31284*FLEN/8, x4, x1, x2) - -inst_10429: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7ffffc; valaddr_reg:x3; val_offset:31287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31287*FLEN/8, x4, x1, x2) - -inst_10430: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7ffffe; valaddr_reg:x3; val_offset:31290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31290*FLEN/8, x4, x1, x2) - -inst_10431: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x6d7fffff; valaddr_reg:x3; val_offset:31293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31293*FLEN/8, x4, x1, x2) - -inst_10432: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f000001; valaddr_reg:x3; val_offset:31296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31296*FLEN/8, x4, x1, x2) - -inst_10433: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f000003; valaddr_reg:x3; val_offset:31299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31299*FLEN/8, x4, x1, x2) - -inst_10434: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f000007; valaddr_reg:x3; val_offset:31302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31302*FLEN/8, x4, x1, x2) - -inst_10435: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f199999; valaddr_reg:x3; val_offset:31305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31305*FLEN/8, x4, x1, x2) - -inst_10436: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f249249; valaddr_reg:x3; val_offset:31308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31308*FLEN/8, x4, x1, x2) - -inst_10437: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f333333; valaddr_reg:x3; val_offset:31311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31311*FLEN/8, x4, x1, x2) - -inst_10438: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:31314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31314*FLEN/8, x4, x1, x2) - -inst_10439: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:31317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31317*FLEN/8, x4, x1, x2) - -inst_10440: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f444444; valaddr_reg:x3; val_offset:31320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31320*FLEN/8, x4, x1, x2) - -inst_10441: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:31323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31323*FLEN/8, x4, x1, x2) - -inst_10442: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:31326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31326*FLEN/8, x4, x1, x2) - -inst_10443: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f666666; valaddr_reg:x3; val_offset:31329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31329*FLEN/8, x4, x1, x2) - -inst_10444: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:31332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31332*FLEN/8, x4, x1, x2) - -inst_10445: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:31335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31335*FLEN/8, x4, x1, x2) - -inst_10446: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:31338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31338*FLEN/8, x4, x1, x2) - -inst_10447: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:31341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31341*FLEN/8, x4, x1, x2) - -inst_10448: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbf800001; valaddr_reg:x3; val_offset:31344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31344*FLEN/8, x4, x1, x2) - -inst_10449: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbf800003; valaddr_reg:x3; val_offset:31347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31347*FLEN/8, x4, x1, x2) - -inst_10450: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbf800007; valaddr_reg:x3; val_offset:31350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31350*FLEN/8, x4, x1, x2) - -inst_10451: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbf999999; valaddr_reg:x3; val_offset:31353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31353*FLEN/8, x4, x1, x2) - -inst_10452: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:31356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31356*FLEN/8, x4, x1, x2) - -inst_10453: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:31359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31359*FLEN/8, x4, x1, x2) - -inst_10454: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:31362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31362*FLEN/8, x4, x1, x2) - -inst_10455: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:31365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31365*FLEN/8, x4, x1, x2) - -inst_10456: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:31368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31368*FLEN/8, x4, x1, x2) - -inst_10457: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:31371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31371*FLEN/8, x4, x1, x2) - -inst_10458: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:31374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31374*FLEN/8, x4, x1, x2) - -inst_10459: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:31377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31377*FLEN/8, x4, x1, x2) - -inst_10460: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:31380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31380*FLEN/8, x4, x1, x2) - -inst_10461: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:31383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31383*FLEN/8, x4, x1, x2) - -inst_10462: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:31386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31386*FLEN/8, x4, x1, x2) - -inst_10463: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:31389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31389*FLEN/8, x4, x1, x2) - -inst_10464: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4800000; valaddr_reg:x3; val_offset:31392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31392*FLEN/8, x4, x1, x2) - -inst_10465: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4800001; valaddr_reg:x3; val_offset:31395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31395*FLEN/8, x4, x1, x2) - -inst_10466: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4800003; valaddr_reg:x3; val_offset:31398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31398*FLEN/8, x4, x1, x2) - -inst_10467: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4800007; valaddr_reg:x3; val_offset:31401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31401*FLEN/8, x4, x1, x2) - -inst_10468: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc480000f; valaddr_reg:x3; val_offset:31404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31404*FLEN/8, x4, x1, x2) - -inst_10469: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc480001f; valaddr_reg:x3; val_offset:31407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31407*FLEN/8, x4, x1, x2) - -inst_10470: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc480003f; valaddr_reg:x3; val_offset:31410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31410*FLEN/8, x4, x1, x2) - -inst_10471: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc480007f; valaddr_reg:x3; val_offset:31413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31413*FLEN/8, x4, x1, x2) - -inst_10472: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc48000ff; valaddr_reg:x3; val_offset:31416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31416*FLEN/8, x4, x1, x2) - -inst_10473: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc48001ff; valaddr_reg:x3; val_offset:31419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31419*FLEN/8, x4, x1, x2) - -inst_10474: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc48003ff; valaddr_reg:x3; val_offset:31422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31422*FLEN/8, x4, x1, x2) - -inst_10475: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc48007ff; valaddr_reg:x3; val_offset:31425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31425*FLEN/8, x4, x1, x2) - -inst_10476: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4800fff; valaddr_reg:x3; val_offset:31428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31428*FLEN/8, x4, x1, x2) - -inst_10477: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4801fff; valaddr_reg:x3; val_offset:31431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31431*FLEN/8, x4, x1, x2) - -inst_10478: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4803fff; valaddr_reg:x3; val_offset:31434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31434*FLEN/8, x4, x1, x2) - -inst_10479: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4807fff; valaddr_reg:x3; val_offset:31437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31437*FLEN/8, x4, x1, x2) - -inst_10480: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc480ffff; valaddr_reg:x3; val_offset:31440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31440*FLEN/8, x4, x1, x2) - -inst_10481: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc481ffff; valaddr_reg:x3; val_offset:31443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31443*FLEN/8, x4, x1, x2) - -inst_10482: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc483ffff; valaddr_reg:x3; val_offset:31446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31446*FLEN/8, x4, x1, x2) - -inst_10483: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc487ffff; valaddr_reg:x3; val_offset:31449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31449*FLEN/8, x4, x1, x2) - -inst_10484: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc48fffff; valaddr_reg:x3; val_offset:31452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31452*FLEN/8, x4, x1, x2) - -inst_10485: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc49fffff; valaddr_reg:x3; val_offset:31455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31455*FLEN/8, x4, x1, x2) - -inst_10486: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4bfffff; valaddr_reg:x3; val_offset:31458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31458*FLEN/8, x4, x1, x2) - -inst_10487: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4c00000; valaddr_reg:x3; val_offset:31461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31461*FLEN/8, x4, x1, x2) - -inst_10488: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4e00000; valaddr_reg:x3; val_offset:31464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31464*FLEN/8, x4, x1, x2) - -inst_10489: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4f00000; valaddr_reg:x3; val_offset:31467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31467*FLEN/8, x4, x1, x2) - -inst_10490: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4f80000; valaddr_reg:x3; val_offset:31470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31470*FLEN/8, x4, x1, x2) - -inst_10491: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fc0000; valaddr_reg:x3; val_offset:31473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31473*FLEN/8, x4, x1, x2) - -inst_10492: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fe0000; valaddr_reg:x3; val_offset:31476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31476*FLEN/8, x4, x1, x2) - -inst_10493: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ff0000; valaddr_reg:x3; val_offset:31479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31479*FLEN/8, x4, x1, x2) - -inst_10494: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ff8000; valaddr_reg:x3; val_offset:31482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31482*FLEN/8, x4, x1, x2) - -inst_10495: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ffc000; valaddr_reg:x3; val_offset:31485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31485*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_83) - -inst_10496: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ffe000; valaddr_reg:x3; val_offset:31488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31488*FLEN/8, x4, x1, x2) - -inst_10497: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fff000; valaddr_reg:x3; val_offset:31491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31491*FLEN/8, x4, x1, x2) - -inst_10498: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fff800; valaddr_reg:x3; val_offset:31494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31494*FLEN/8, x4, x1, x2) - -inst_10499: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fffc00; valaddr_reg:x3; val_offset:31497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31497*FLEN/8, x4, x1, x2) - -inst_10500: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fffe00; valaddr_reg:x3; val_offset:31500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31500*FLEN/8, x4, x1, x2) - -inst_10501: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ffff00; valaddr_reg:x3; val_offset:31503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31503*FLEN/8, x4, x1, x2) - -inst_10502: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ffff80; valaddr_reg:x3; val_offset:31506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31506*FLEN/8, x4, x1, x2) - -inst_10503: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ffffc0; valaddr_reg:x3; val_offset:31509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31509*FLEN/8, x4, x1, x2) - -inst_10504: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ffffe0; valaddr_reg:x3; val_offset:31512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31512*FLEN/8, x4, x1, x2) - -inst_10505: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fffff0; valaddr_reg:x3; val_offset:31515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31515*FLEN/8, x4, x1, x2) - -inst_10506: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fffff8; valaddr_reg:x3; val_offset:31518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31518*FLEN/8, x4, x1, x2) - -inst_10507: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fffffc; valaddr_reg:x3; val_offset:31521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31521*FLEN/8, x4, x1, x2) - -inst_10508: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4fffffe; valaddr_reg:x3; val_offset:31524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31524*FLEN/8, x4, x1, x2) - -inst_10509: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; -op3val:0xc4ffffff; valaddr_reg:x3; val_offset:31527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31527*FLEN/8, x4, x1, x2) - -inst_10510: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:31530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31530*FLEN/8, x4, x1, x2) - -inst_10511: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:31533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31533*FLEN/8, x4, x1, x2) - -inst_10512: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:31536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31536*FLEN/8, x4, x1, x2) - -inst_10513: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:31539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31539*FLEN/8, x4, x1, x2) - -inst_10514: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:31542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31542*FLEN/8, x4, x1, x2) - -inst_10515: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:31545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31545*FLEN/8, x4, x1, x2) - -inst_10516: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:31548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31548*FLEN/8, x4, x1, x2) - -inst_10517: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:31551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31551*FLEN/8, x4, x1, x2) - -inst_10518: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:31554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31554*FLEN/8, x4, x1, x2) - -inst_10519: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:31557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31557*FLEN/8, x4, x1, x2) - -inst_10520: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:31560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31560*FLEN/8, x4, x1, x2) - -inst_10521: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:31563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31563*FLEN/8, x4, x1, x2) - -inst_10522: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:31566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31566*FLEN/8, x4, x1, x2) - -inst_10523: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:31569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31569*FLEN/8, x4, x1, x2) - -inst_10524: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:31572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31572*FLEN/8, x4, x1, x2) - -inst_10525: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:31575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31575*FLEN/8, x4, x1, x2) - -inst_10526: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a000000; valaddr_reg:x3; val_offset:31578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31578*FLEN/8, x4, x1, x2) - -inst_10527: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a000001; valaddr_reg:x3; val_offset:31581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31581*FLEN/8, x4, x1, x2) - -inst_10528: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a000003; valaddr_reg:x3; val_offset:31584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31584*FLEN/8, x4, x1, x2) - -inst_10529: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a000007; valaddr_reg:x3; val_offset:31587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31587*FLEN/8, x4, x1, x2) - -inst_10530: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a00000f; valaddr_reg:x3; val_offset:31590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31590*FLEN/8, x4, x1, x2) - -inst_10531: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a00001f; valaddr_reg:x3; val_offset:31593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31593*FLEN/8, x4, x1, x2) - -inst_10532: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a00003f; valaddr_reg:x3; val_offset:31596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31596*FLEN/8, x4, x1, x2) - -inst_10533: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a00007f; valaddr_reg:x3; val_offset:31599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31599*FLEN/8, x4, x1, x2) - -inst_10534: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a0000ff; valaddr_reg:x3; val_offset:31602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31602*FLEN/8, x4, x1, x2) - -inst_10535: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a0001ff; valaddr_reg:x3; val_offset:31605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31605*FLEN/8, x4, x1, x2) - -inst_10536: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a0003ff; valaddr_reg:x3; val_offset:31608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31608*FLEN/8, x4, x1, x2) - -inst_10537: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a0007ff; valaddr_reg:x3; val_offset:31611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31611*FLEN/8, x4, x1, x2) - -inst_10538: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a000fff; valaddr_reg:x3; val_offset:31614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31614*FLEN/8, x4, x1, x2) - -inst_10539: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a001fff; valaddr_reg:x3; val_offset:31617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31617*FLEN/8, x4, x1, x2) - -inst_10540: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a003fff; valaddr_reg:x3; val_offset:31620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31620*FLEN/8, x4, x1, x2) - -inst_10541: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a007fff; valaddr_reg:x3; val_offset:31623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31623*FLEN/8, x4, x1, x2) - -inst_10542: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a00ffff; valaddr_reg:x3; val_offset:31626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31626*FLEN/8, x4, x1, x2) - -inst_10543: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a01ffff; valaddr_reg:x3; val_offset:31629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31629*FLEN/8, x4, x1, x2) - -inst_10544: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a03ffff; valaddr_reg:x3; val_offset:31632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31632*FLEN/8, x4, x1, x2) - -inst_10545: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a07ffff; valaddr_reg:x3; val_offset:31635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31635*FLEN/8, x4, x1, x2) - -inst_10546: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a0fffff; valaddr_reg:x3; val_offset:31638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31638*FLEN/8, x4, x1, x2) - -inst_10547: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a1fffff; valaddr_reg:x3; val_offset:31641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31641*FLEN/8, x4, x1, x2) - -inst_10548: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a3fffff; valaddr_reg:x3; val_offset:31644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31644*FLEN/8, x4, x1, x2) - -inst_10549: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a400000; valaddr_reg:x3; val_offset:31647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31647*FLEN/8, x4, x1, x2) - -inst_10550: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a600000; valaddr_reg:x3; val_offset:31650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31650*FLEN/8, x4, x1, x2) - -inst_10551: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a700000; valaddr_reg:x3; val_offset:31653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31653*FLEN/8, x4, x1, x2) - -inst_10552: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a780000; valaddr_reg:x3; val_offset:31656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31656*FLEN/8, x4, x1, x2) - -inst_10553: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7c0000; valaddr_reg:x3; val_offset:31659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31659*FLEN/8, x4, x1, x2) - -inst_10554: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7e0000; valaddr_reg:x3; val_offset:31662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31662*FLEN/8, x4, x1, x2) - -inst_10555: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7f0000; valaddr_reg:x3; val_offset:31665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31665*FLEN/8, x4, x1, x2) - -inst_10556: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7f8000; valaddr_reg:x3; val_offset:31668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31668*FLEN/8, x4, x1, x2) - -inst_10557: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7fc000; valaddr_reg:x3; val_offset:31671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31671*FLEN/8, x4, x1, x2) - -inst_10558: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7fe000; valaddr_reg:x3; val_offset:31674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31674*FLEN/8, x4, x1, x2) - -inst_10559: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7ff000; valaddr_reg:x3; val_offset:31677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31677*FLEN/8, x4, x1, x2) - -inst_10560: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7ff800; valaddr_reg:x3; val_offset:31680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31680*FLEN/8, x4, x1, x2) - -inst_10561: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7ffc00; valaddr_reg:x3; val_offset:31683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31683*FLEN/8, x4, x1, x2) - -inst_10562: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7ffe00; valaddr_reg:x3; val_offset:31686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31686*FLEN/8, x4, x1, x2) - -inst_10563: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7fff00; valaddr_reg:x3; val_offset:31689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31689*FLEN/8, x4, x1, x2) - -inst_10564: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7fff80; valaddr_reg:x3; val_offset:31692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31692*FLEN/8, x4, x1, x2) - -inst_10565: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7fffc0; valaddr_reg:x3; val_offset:31695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31695*FLEN/8, x4, x1, x2) - -inst_10566: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7fffe0; valaddr_reg:x3; val_offset:31698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31698*FLEN/8, x4, x1, x2) - -inst_10567: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7ffff0; valaddr_reg:x3; val_offset:31701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31701*FLEN/8, x4, x1, x2) - -inst_10568: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7ffff8; valaddr_reg:x3; val_offset:31704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31704*FLEN/8, x4, x1, x2) - -inst_10569: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7ffffc; valaddr_reg:x3; val_offset:31707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31707*FLEN/8, x4, x1, x2) - -inst_10570: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7ffffe; valaddr_reg:x3; val_offset:31710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31710*FLEN/8, x4, x1, x2) - -inst_10571: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; -op3val:0x7a7fffff; valaddr_reg:x3; val_offset:31713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31713*FLEN/8, x4, x1, x2) - -inst_10572: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3f800001; valaddr_reg:x3; val_offset:31716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31716*FLEN/8, x4, x1, x2) - -inst_10573: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3f800003; valaddr_reg:x3; val_offset:31719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31719*FLEN/8, x4, x1, x2) - -inst_10574: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3f800007; valaddr_reg:x3; val_offset:31722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31722*FLEN/8, x4, x1, x2) - -inst_10575: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3f999999; valaddr_reg:x3; val_offset:31725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31725*FLEN/8, x4, x1, x2) - -inst_10576: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:31728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31728*FLEN/8, x4, x1, x2) - -inst_10577: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:31731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31731*FLEN/8, x4, x1, x2) - -inst_10578: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:31734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31734*FLEN/8, x4, x1, x2) - -inst_10579: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:31737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31737*FLEN/8, x4, x1, x2) - -inst_10580: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:31740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31740*FLEN/8, x4, x1, x2) - -inst_10581: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:31743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31743*FLEN/8, x4, x1, x2) - -inst_10582: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:31746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31746*FLEN/8, x4, x1, x2) - -inst_10583: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:31749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31749*FLEN/8, x4, x1, x2) - -inst_10584: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:31752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31752*FLEN/8, x4, x1, x2) - -inst_10585: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:31755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31755*FLEN/8, x4, x1, x2) - -inst_10586: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:31758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31758*FLEN/8, x4, x1, x2) - -inst_10587: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:31761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31761*FLEN/8, x4, x1, x2) - -inst_10588: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42000000; valaddr_reg:x3; val_offset:31764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31764*FLEN/8, x4, x1, x2) - -inst_10589: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42000001; valaddr_reg:x3; val_offset:31767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31767*FLEN/8, x4, x1, x2) - -inst_10590: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42000003; valaddr_reg:x3; val_offset:31770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31770*FLEN/8, x4, x1, x2) - -inst_10591: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42000007; valaddr_reg:x3; val_offset:31773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31773*FLEN/8, x4, x1, x2) - -inst_10592: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x4200000f; valaddr_reg:x3; val_offset:31776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31776*FLEN/8, x4, x1, x2) - -inst_10593: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x4200001f; valaddr_reg:x3; val_offset:31779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31779*FLEN/8, x4, x1, x2) - -inst_10594: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x4200003f; valaddr_reg:x3; val_offset:31782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31782*FLEN/8, x4, x1, x2) - -inst_10595: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x4200007f; valaddr_reg:x3; val_offset:31785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31785*FLEN/8, x4, x1, x2) - -inst_10596: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x420000ff; valaddr_reg:x3; val_offset:31788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31788*FLEN/8, x4, x1, x2) - -inst_10597: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x420001ff; valaddr_reg:x3; val_offset:31791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31791*FLEN/8, x4, x1, x2) - -inst_10598: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x420003ff; valaddr_reg:x3; val_offset:31794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31794*FLEN/8, x4, x1, x2) - -inst_10599: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x420007ff; valaddr_reg:x3; val_offset:31797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31797*FLEN/8, x4, x1, x2) - -inst_10600: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42000fff; valaddr_reg:x3; val_offset:31800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31800*FLEN/8, x4, x1, x2) - -inst_10601: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42001fff; valaddr_reg:x3; val_offset:31803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31803*FLEN/8, x4, x1, x2) - -inst_10602: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42003fff; valaddr_reg:x3; val_offset:31806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31806*FLEN/8, x4, x1, x2) - -inst_10603: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42007fff; valaddr_reg:x3; val_offset:31809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31809*FLEN/8, x4, x1, x2) - -inst_10604: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x4200ffff; valaddr_reg:x3; val_offset:31812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31812*FLEN/8, x4, x1, x2) - -inst_10605: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x4201ffff; valaddr_reg:x3; val_offset:31815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31815*FLEN/8, x4, x1, x2) - -inst_10606: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x4203ffff; valaddr_reg:x3; val_offset:31818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31818*FLEN/8, x4, x1, x2) - -inst_10607: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x4207ffff; valaddr_reg:x3; val_offset:31821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31821*FLEN/8, x4, x1, x2) - -inst_10608: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x420fffff; valaddr_reg:x3; val_offset:31824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31824*FLEN/8, x4, x1, x2) - -inst_10609: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x421fffff; valaddr_reg:x3; val_offset:31827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31827*FLEN/8, x4, x1, x2) - -inst_10610: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x423fffff; valaddr_reg:x3; val_offset:31830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31830*FLEN/8, x4, x1, x2) - -inst_10611: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42400000; valaddr_reg:x3; val_offset:31833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31833*FLEN/8, x4, x1, x2) - -inst_10612: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42600000; valaddr_reg:x3; val_offset:31836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31836*FLEN/8, x4, x1, x2) - -inst_10613: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42700000; valaddr_reg:x3; val_offset:31839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31839*FLEN/8, x4, x1, x2) - -inst_10614: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x42780000; valaddr_reg:x3; val_offset:31842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31842*FLEN/8, x4, x1, x2) - -inst_10615: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427c0000; valaddr_reg:x3; val_offset:31845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31845*FLEN/8, x4, x1, x2) - -inst_10616: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427e0000; valaddr_reg:x3; val_offset:31848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31848*FLEN/8, x4, x1, x2) - -inst_10617: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427f0000; valaddr_reg:x3; val_offset:31851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31851*FLEN/8, x4, x1, x2) - -inst_10618: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427f8000; valaddr_reg:x3; val_offset:31854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31854*FLEN/8, x4, x1, x2) - -inst_10619: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427fc000; valaddr_reg:x3; val_offset:31857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31857*FLEN/8, x4, x1, x2) - -inst_10620: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427fe000; valaddr_reg:x3; val_offset:31860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31860*FLEN/8, x4, x1, x2) - -inst_10621: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427ff000; valaddr_reg:x3; val_offset:31863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31863*FLEN/8, x4, x1, x2) - -inst_10622: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427ff800; valaddr_reg:x3; val_offset:31866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31866*FLEN/8, x4, x1, x2) - -inst_10623: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427ffc00; valaddr_reg:x3; val_offset:31869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31869*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_84) - -inst_10624: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427ffe00; valaddr_reg:x3; val_offset:31872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31872*FLEN/8, x4, x1, x2) - -inst_10625: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427fff00; valaddr_reg:x3; val_offset:31875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31875*FLEN/8, x4, x1, x2) - -inst_10626: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427fff80; valaddr_reg:x3; val_offset:31878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31878*FLEN/8, x4, x1, x2) - -inst_10627: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427fffc0; valaddr_reg:x3; val_offset:31881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31881*FLEN/8, x4, x1, x2) - -inst_10628: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427fffe0; valaddr_reg:x3; val_offset:31884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31884*FLEN/8, x4, x1, x2) - -inst_10629: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427ffff0; valaddr_reg:x3; val_offset:31887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31887*FLEN/8, x4, x1, x2) - -inst_10630: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427ffff8; valaddr_reg:x3; val_offset:31890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31890*FLEN/8, x4, x1, x2) - -inst_10631: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427ffffc; valaddr_reg:x3; val_offset:31893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31893*FLEN/8, x4, x1, x2) - -inst_10632: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427ffffe; valaddr_reg:x3; val_offset:31896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31896*FLEN/8, x4, x1, x2) - -inst_10633: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; -op3val:0x427fffff; valaddr_reg:x3; val_offset:31899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31899*FLEN/8, x4, x1, x2) - -inst_10634: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:31902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31902*FLEN/8, x4, x1, x2) - -inst_10635: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:31905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31905*FLEN/8, x4, x1, x2) - -inst_10636: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:31908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31908*FLEN/8, x4, x1, x2) - -inst_10637: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:31911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31911*FLEN/8, x4, x1, x2) - -inst_10638: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:31914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31914*FLEN/8, x4, x1, x2) - -inst_10639: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:31917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31917*FLEN/8, x4, x1, x2) - -inst_10640: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:31920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31920*FLEN/8, x4, x1, x2) - -inst_10641: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:31923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31923*FLEN/8, x4, x1, x2) - -inst_10642: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:31926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31926*FLEN/8, x4, x1, x2) - -inst_10643: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:31929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31929*FLEN/8, x4, x1, x2) - -inst_10644: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:31932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31932*FLEN/8, x4, x1, x2) - -inst_10645: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:31935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31935*FLEN/8, x4, x1, x2) - -inst_10646: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:31938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31938*FLEN/8, x4, x1, x2) - -inst_10647: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:31941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31941*FLEN/8, x4, x1, x2) - -inst_10648: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:31944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31944*FLEN/8, x4, x1, x2) - -inst_10649: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:31947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31947*FLEN/8, x4, x1, x2) - -inst_10650: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c800000; valaddr_reg:x3; val_offset:31950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31950*FLEN/8, x4, x1, x2) - -inst_10651: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c800001; valaddr_reg:x3; val_offset:31953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31953*FLEN/8, x4, x1, x2) - -inst_10652: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c800003; valaddr_reg:x3; val_offset:31956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31956*FLEN/8, x4, x1, x2) - -inst_10653: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c800007; valaddr_reg:x3; val_offset:31959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31959*FLEN/8, x4, x1, x2) - -inst_10654: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c80000f; valaddr_reg:x3; val_offset:31962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31962*FLEN/8, x4, x1, x2) - -inst_10655: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c80001f; valaddr_reg:x3; val_offset:31965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31965*FLEN/8, x4, x1, x2) - -inst_10656: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c80003f; valaddr_reg:x3; val_offset:31968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31968*FLEN/8, x4, x1, x2) - -inst_10657: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c80007f; valaddr_reg:x3; val_offset:31971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31971*FLEN/8, x4, x1, x2) - -inst_10658: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c8000ff; valaddr_reg:x3; val_offset:31974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31974*FLEN/8, x4, x1, x2) - -inst_10659: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c8001ff; valaddr_reg:x3; val_offset:31977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31977*FLEN/8, x4, x1, x2) - -inst_10660: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c8003ff; valaddr_reg:x3; val_offset:31980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31980*FLEN/8, x4, x1, x2) - -inst_10661: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c8007ff; valaddr_reg:x3; val_offset:31983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31983*FLEN/8, x4, x1, x2) - -inst_10662: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c800fff; valaddr_reg:x3; val_offset:31986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31986*FLEN/8, x4, x1, x2) - -inst_10663: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c801fff; valaddr_reg:x3; val_offset:31989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31989*FLEN/8, x4, x1, x2) - -inst_10664: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c803fff; valaddr_reg:x3; val_offset:31992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31992*FLEN/8, x4, x1, x2) - -inst_10665: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c807fff; valaddr_reg:x3; val_offset:31995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31995*FLEN/8, x4, x1, x2) - -inst_10666: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c80ffff; valaddr_reg:x3; val_offset:31998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31998*FLEN/8, x4, x1, x2) - -inst_10667: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c81ffff; valaddr_reg:x3; val_offset:32001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32001*FLEN/8, x4, x1, x2) - -inst_10668: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c83ffff; valaddr_reg:x3; val_offset:32004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32004*FLEN/8, x4, x1, x2) - -inst_10669: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c87ffff; valaddr_reg:x3; val_offset:32007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32007*FLEN/8, x4, x1, x2) - -inst_10670: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c8fffff; valaddr_reg:x3; val_offset:32010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32010*FLEN/8, x4, x1, x2) - -inst_10671: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8c9fffff; valaddr_reg:x3; val_offset:32013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32013*FLEN/8, x4, x1, x2) - -inst_10672: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cbfffff; valaddr_reg:x3; val_offset:32016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32016*FLEN/8, x4, x1, x2) - -inst_10673: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cc00000; valaddr_reg:x3; val_offset:32019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32019*FLEN/8, x4, x1, x2) - -inst_10674: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8ce00000; valaddr_reg:x3; val_offset:32022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32022*FLEN/8, x4, x1, x2) - -inst_10675: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cf00000; valaddr_reg:x3; val_offset:32025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32025*FLEN/8, x4, x1, x2) - -inst_10676: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cf80000; valaddr_reg:x3; val_offset:32028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32028*FLEN/8, x4, x1, x2) - -inst_10677: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfc0000; valaddr_reg:x3; val_offset:32031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32031*FLEN/8, x4, x1, x2) - -inst_10678: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfe0000; valaddr_reg:x3; val_offset:32034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32034*FLEN/8, x4, x1, x2) - -inst_10679: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cff0000; valaddr_reg:x3; val_offset:32037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32037*FLEN/8, x4, x1, x2) - -inst_10680: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cff8000; valaddr_reg:x3; val_offset:32040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32040*FLEN/8, x4, x1, x2) - -inst_10681: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cffc000; valaddr_reg:x3; val_offset:32043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32043*FLEN/8, x4, x1, x2) - -inst_10682: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cffe000; valaddr_reg:x3; val_offset:32046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32046*FLEN/8, x4, x1, x2) - -inst_10683: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfff000; valaddr_reg:x3; val_offset:32049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32049*FLEN/8, x4, x1, x2) - -inst_10684: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfff800; valaddr_reg:x3; val_offset:32052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32052*FLEN/8, x4, x1, x2) - -inst_10685: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfffc00; valaddr_reg:x3; val_offset:32055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32055*FLEN/8, x4, x1, x2) - -inst_10686: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfffe00; valaddr_reg:x3; val_offset:32058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32058*FLEN/8, x4, x1, x2) - -inst_10687: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cffff00; valaddr_reg:x3; val_offset:32061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32061*FLEN/8, x4, x1, x2) - -inst_10688: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cffff80; valaddr_reg:x3; val_offset:32064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32064*FLEN/8, x4, x1, x2) - -inst_10689: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cffffc0; valaddr_reg:x3; val_offset:32067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32067*FLEN/8, x4, x1, x2) - -inst_10690: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cffffe0; valaddr_reg:x3; val_offset:32070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32070*FLEN/8, x4, x1, x2) - -inst_10691: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfffff0; valaddr_reg:x3; val_offset:32073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32073*FLEN/8, x4, x1, x2) - -inst_10692: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfffff8; valaddr_reg:x3; val_offset:32076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32076*FLEN/8, x4, x1, x2) - -inst_10693: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfffffc; valaddr_reg:x3; val_offset:32079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32079*FLEN/8, x4, x1, x2) - -inst_10694: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cfffffe; valaddr_reg:x3; val_offset:32082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32082*FLEN/8, x4, x1, x2) - -inst_10695: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; -op3val:0x8cffffff; valaddr_reg:x3; val_offset:32085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32085*FLEN/8, x4, x1, x2) - -inst_10696: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x0; valaddr_reg:x3; val_offset:32088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32088*FLEN/8, x4, x1, x2) - -inst_10697: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:32091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32091*FLEN/8, x4, x1, x2) - -inst_10698: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:32094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32094*FLEN/8, x4, x1, x2) - -inst_10699: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:32097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32097*FLEN/8, x4, x1, x2) - -inst_10700: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0xf; valaddr_reg:x3; val_offset:32100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32100*FLEN/8, x4, x1, x2) - -inst_10701: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x1f; valaddr_reg:x3; val_offset:32103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32103*FLEN/8, x4, x1, x2) - -inst_10702: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x3f; valaddr_reg:x3; val_offset:32106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32106*FLEN/8, x4, x1, x2) - -inst_10703: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7f; valaddr_reg:x3; val_offset:32109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32109*FLEN/8, x4, x1, x2) - -inst_10704: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0xff; valaddr_reg:x3; val_offset:32112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32112*FLEN/8, x4, x1, x2) - -inst_10705: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x1ff; valaddr_reg:x3; val_offset:32115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32115*FLEN/8, x4, x1, x2) - -inst_10706: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x3ff; valaddr_reg:x3; val_offset:32118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32118*FLEN/8, x4, x1, x2) - -inst_10707: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ff; valaddr_reg:x3; val_offset:32121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32121*FLEN/8, x4, x1, x2) - -inst_10708: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0xfff; valaddr_reg:x3; val_offset:32124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32124*FLEN/8, x4, x1, x2) - -inst_10709: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x1fff; valaddr_reg:x3; val_offset:32127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32127*FLEN/8, x4, x1, x2) - -inst_10710: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x3fff; valaddr_reg:x3; val_offset:32130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32130*FLEN/8, x4, x1, x2) - -inst_10711: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7fff; valaddr_reg:x3; val_offset:32133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32133*FLEN/8, x4, x1, x2) - -inst_10712: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0xffff; valaddr_reg:x3; val_offset:32136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32136*FLEN/8, x4, x1, x2) - -inst_10713: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x1ffff; valaddr_reg:x3; val_offset:32139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32139*FLEN/8, x4, x1, x2) - -inst_10714: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x3ffff; valaddr_reg:x3; val_offset:32142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32142*FLEN/8, x4, x1, x2) - -inst_10715: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ffff; valaddr_reg:x3; val_offset:32145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32145*FLEN/8, x4, x1, x2) - -inst_10716: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0xfffff; valaddr_reg:x3; val_offset:32148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32148*FLEN/8, x4, x1, x2) - -inst_10717: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:32151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32151*FLEN/8, x4, x1, x2) - -inst_10718: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x1fffff; valaddr_reg:x3; val_offset:32154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32154*FLEN/8, x4, x1, x2) - -inst_10719: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:32157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32157*FLEN/8, x4, x1, x2) - -inst_10720: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:32160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32160*FLEN/8, x4, x1, x2) - -inst_10721: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:32163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32163*FLEN/8, x4, x1, x2) - -inst_10722: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:32166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32166*FLEN/8, x4, x1, x2) - -inst_10723: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x3fffff; valaddr_reg:x3; val_offset:32169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32169*FLEN/8, x4, x1, x2) - -inst_10724: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x400000; valaddr_reg:x3; val_offset:32172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32172*FLEN/8, x4, x1, x2) - -inst_10725: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:32175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32175*FLEN/8, x4, x1, x2) - -inst_10726: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:32178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32178*FLEN/8, x4, x1, x2) - -inst_10727: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:32181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32181*FLEN/8, x4, x1, x2) - -inst_10728: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x600000; valaddr_reg:x3; val_offset:32184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32184*FLEN/8, x4, x1, x2) - -inst_10729: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:32187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32187*FLEN/8, x4, x1, x2) - -inst_10730: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:32190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32190*FLEN/8, x4, x1, x2) - -inst_10731: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x700000; valaddr_reg:x3; val_offset:32193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32193*FLEN/8, x4, x1, x2) - -inst_10732: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x780000; valaddr_reg:x3; val_offset:32196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32196*FLEN/8, x4, x1, x2) - -inst_10733: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7c0000; valaddr_reg:x3; val_offset:32199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32199*FLEN/8, x4, x1, x2) - -inst_10734: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7e0000; valaddr_reg:x3; val_offset:32202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32202*FLEN/8, x4, x1, x2) - -inst_10735: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7f0000; valaddr_reg:x3; val_offset:32205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32205*FLEN/8, x4, x1, x2) - -inst_10736: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7f8000; valaddr_reg:x3; val_offset:32208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32208*FLEN/8, x4, x1, x2) - -inst_10737: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7fc000; valaddr_reg:x3; val_offset:32211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32211*FLEN/8, x4, x1, x2) - -inst_10738: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7fe000; valaddr_reg:x3; val_offset:32214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32214*FLEN/8, x4, x1, x2) - -inst_10739: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ff000; valaddr_reg:x3; val_offset:32217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32217*FLEN/8, x4, x1, x2) - -inst_10740: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ff800; valaddr_reg:x3; val_offset:32220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32220*FLEN/8, x4, x1, x2) - -inst_10741: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ffc00; valaddr_reg:x3; val_offset:32223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32223*FLEN/8, x4, x1, x2) - -inst_10742: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ffe00; valaddr_reg:x3; val_offset:32226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32226*FLEN/8, x4, x1, x2) - -inst_10743: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7fff00; valaddr_reg:x3; val_offset:32229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32229*FLEN/8, x4, x1, x2) - -inst_10744: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7fff80; valaddr_reg:x3; val_offset:32232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32232*FLEN/8, x4, x1, x2) - -inst_10745: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7fffc0; valaddr_reg:x3; val_offset:32235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32235*FLEN/8, x4, x1, x2) - -inst_10746: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7fffe0; valaddr_reg:x3; val_offset:32238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32238*FLEN/8, x4, x1, x2) - -inst_10747: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ffff0; valaddr_reg:x3; val_offset:32241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32241*FLEN/8, x4, x1, x2) - -inst_10748: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:32244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32244*FLEN/8, x4, x1, x2) - -inst_10749: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:32247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32247*FLEN/8, x4, x1, x2) - -inst_10750: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:32250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32250*FLEN/8, x4, x1, x2) - -inst_10751: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; -op3val:0x7fffff; valaddr_reg:x3; val_offset:32253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32253*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_85) - -inst_10752: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d800000; valaddr_reg:x3; val_offset:32256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32256*FLEN/8, x4, x1, x2) - -inst_10753: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d800001; valaddr_reg:x3; val_offset:32259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32259*FLEN/8, x4, x1, x2) - -inst_10754: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d800003; valaddr_reg:x3; val_offset:32262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32262*FLEN/8, x4, x1, x2) - -inst_10755: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d800007; valaddr_reg:x3; val_offset:32265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32265*FLEN/8, x4, x1, x2) - -inst_10756: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d80000f; valaddr_reg:x3; val_offset:32268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32268*FLEN/8, x4, x1, x2) - -inst_10757: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d80001f; valaddr_reg:x3; val_offset:32271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32271*FLEN/8, x4, x1, x2) - -inst_10758: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d80003f; valaddr_reg:x3; val_offset:32274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32274*FLEN/8, x4, x1, x2) - -inst_10759: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d80007f; valaddr_reg:x3; val_offset:32277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32277*FLEN/8, x4, x1, x2) - -inst_10760: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d8000ff; valaddr_reg:x3; val_offset:32280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32280*FLEN/8, x4, x1, x2) - -inst_10761: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d8001ff; valaddr_reg:x3; val_offset:32283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32283*FLEN/8, x4, x1, x2) - -inst_10762: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d8003ff; valaddr_reg:x3; val_offset:32286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32286*FLEN/8, x4, x1, x2) - -inst_10763: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d8007ff; valaddr_reg:x3; val_offset:32289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32289*FLEN/8, x4, x1, x2) - -inst_10764: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d800fff; valaddr_reg:x3; val_offset:32292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32292*FLEN/8, x4, x1, x2) - -inst_10765: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d801fff; valaddr_reg:x3; val_offset:32295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32295*FLEN/8, x4, x1, x2) - -inst_10766: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d803fff; valaddr_reg:x3; val_offset:32298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32298*FLEN/8, x4, x1, x2) - -inst_10767: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d807fff; valaddr_reg:x3; val_offset:32301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32301*FLEN/8, x4, x1, x2) - -inst_10768: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d80ffff; valaddr_reg:x3; val_offset:32304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32304*FLEN/8, x4, x1, x2) - -inst_10769: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d81ffff; valaddr_reg:x3; val_offset:32307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32307*FLEN/8, x4, x1, x2) - -inst_10770: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d83ffff; valaddr_reg:x3; val_offset:32310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32310*FLEN/8, x4, x1, x2) - -inst_10771: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d87ffff; valaddr_reg:x3; val_offset:32313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32313*FLEN/8, x4, x1, x2) - -inst_10772: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d8fffff; valaddr_reg:x3; val_offset:32316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32316*FLEN/8, x4, x1, x2) - -inst_10773: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2d9fffff; valaddr_reg:x3; val_offset:32319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32319*FLEN/8, x4, x1, x2) - -inst_10774: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dbfffff; valaddr_reg:x3; val_offset:32322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32322*FLEN/8, x4, x1, x2) - -inst_10775: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dc00000; valaddr_reg:x3; val_offset:32325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32325*FLEN/8, x4, x1, x2) - -inst_10776: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2de00000; valaddr_reg:x3; val_offset:32328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32328*FLEN/8, x4, x1, x2) - -inst_10777: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2df00000; valaddr_reg:x3; val_offset:32331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32331*FLEN/8, x4, x1, x2) - -inst_10778: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2df80000; valaddr_reg:x3; val_offset:32334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32334*FLEN/8, x4, x1, x2) - -inst_10779: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfc0000; valaddr_reg:x3; val_offset:32337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32337*FLEN/8, x4, x1, x2) - -inst_10780: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfe0000; valaddr_reg:x3; val_offset:32340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32340*FLEN/8, x4, x1, x2) - -inst_10781: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dff0000; valaddr_reg:x3; val_offset:32343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32343*FLEN/8, x4, x1, x2) - -inst_10782: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dff8000; valaddr_reg:x3; val_offset:32346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32346*FLEN/8, x4, x1, x2) - -inst_10783: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dffc000; valaddr_reg:x3; val_offset:32349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32349*FLEN/8, x4, x1, x2) - -inst_10784: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dffe000; valaddr_reg:x3; val_offset:32352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32352*FLEN/8, x4, x1, x2) - -inst_10785: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfff000; valaddr_reg:x3; val_offset:32355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32355*FLEN/8, x4, x1, x2) - -inst_10786: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfff800; valaddr_reg:x3; val_offset:32358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32358*FLEN/8, x4, x1, x2) - -inst_10787: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfffc00; valaddr_reg:x3; val_offset:32361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32361*FLEN/8, x4, x1, x2) - -inst_10788: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfffe00; valaddr_reg:x3; val_offset:32364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32364*FLEN/8, x4, x1, x2) - -inst_10789: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dffff00; valaddr_reg:x3; val_offset:32367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32367*FLEN/8, x4, x1, x2) - -inst_10790: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dffff80; valaddr_reg:x3; val_offset:32370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32370*FLEN/8, x4, x1, x2) - -inst_10791: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dffffc0; valaddr_reg:x3; val_offset:32373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32373*FLEN/8, x4, x1, x2) - -inst_10792: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dffffe0; valaddr_reg:x3; val_offset:32376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32376*FLEN/8, x4, x1, x2) - -inst_10793: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfffff0; valaddr_reg:x3; val_offset:32379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32379*FLEN/8, x4, x1, x2) - -inst_10794: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfffff8; valaddr_reg:x3; val_offset:32382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32382*FLEN/8, x4, x1, x2) - -inst_10795: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfffffc; valaddr_reg:x3; val_offset:32385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32385*FLEN/8, x4, x1, x2) - -inst_10796: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dfffffe; valaddr_reg:x3; val_offset:32388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32388*FLEN/8, x4, x1, x2) - -inst_10797: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x2dffffff; valaddr_reg:x3; val_offset:32391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32391*FLEN/8, x4, x1, x2) - -inst_10798: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3f800001; valaddr_reg:x3; val_offset:32394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32394*FLEN/8, x4, x1, x2) - -inst_10799: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3f800003; valaddr_reg:x3; val_offset:32397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32397*FLEN/8, x4, x1, x2) - -inst_10800: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3f800007; valaddr_reg:x3; val_offset:32400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32400*FLEN/8, x4, x1, x2) - -inst_10801: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3f999999; valaddr_reg:x3; val_offset:32403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32403*FLEN/8, x4, x1, x2) - -inst_10802: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:32406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32406*FLEN/8, x4, x1, x2) - -inst_10803: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:32409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32409*FLEN/8, x4, x1, x2) - -inst_10804: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:32412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32412*FLEN/8, x4, x1, x2) - -inst_10805: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:32415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32415*FLEN/8, x4, x1, x2) - -inst_10806: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:32418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32418*FLEN/8, x4, x1, x2) - -inst_10807: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:32421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32421*FLEN/8, x4, x1, x2) - -inst_10808: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:32424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32424*FLEN/8, x4, x1, x2) - -inst_10809: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:32427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32427*FLEN/8, x4, x1, x2) - -inst_10810: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:32430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32430*FLEN/8, x4, x1, x2) - -inst_10811: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:32433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32433*FLEN/8, x4, x1, x2) - -inst_10812: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:32436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32436*FLEN/8, x4, x1, x2) - -inst_10813: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:32439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32439*FLEN/8, x4, x1, x2) - -inst_10814: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbf800001; valaddr_reg:x3; val_offset:32442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32442*FLEN/8, x4, x1, x2) - -inst_10815: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbf800003; valaddr_reg:x3; val_offset:32445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32445*FLEN/8, x4, x1, x2) - -inst_10816: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbf800007; valaddr_reg:x3; val_offset:32448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32448*FLEN/8, x4, x1, x2) - -inst_10817: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbf999999; valaddr_reg:x3; val_offset:32451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32451*FLEN/8, x4, x1, x2) - -inst_10818: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:32454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32454*FLEN/8, x4, x1, x2) - -inst_10819: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:32457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32457*FLEN/8, x4, x1, x2) - -inst_10820: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:32460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32460*FLEN/8, x4, x1, x2) - -inst_10821: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:32463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32463*FLEN/8, x4, x1, x2) - -inst_10822: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:32466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32466*FLEN/8, x4, x1, x2) - -inst_10823: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:32469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32469*FLEN/8, x4, x1, x2) - -inst_10824: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:32472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32472*FLEN/8, x4, x1, x2) - -inst_10825: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:32475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32475*FLEN/8, x4, x1, x2) - -inst_10826: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:32478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32478*FLEN/8, x4, x1, x2) - -inst_10827: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:32481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32481*FLEN/8, x4, x1, x2) - -inst_10828: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:32484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32484*FLEN/8, x4, x1, x2) - -inst_10829: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:32487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32487*FLEN/8, x4, x1, x2) - -inst_10830: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd000000; valaddr_reg:x3; val_offset:32490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32490*FLEN/8, x4, x1, x2) - -inst_10831: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd000001; valaddr_reg:x3; val_offset:32493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32493*FLEN/8, x4, x1, x2) - -inst_10832: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd000003; valaddr_reg:x3; val_offset:32496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32496*FLEN/8, x4, x1, x2) - -inst_10833: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd000007; valaddr_reg:x3; val_offset:32499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32499*FLEN/8, x4, x1, x2) - -inst_10834: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd00000f; valaddr_reg:x3; val_offset:32502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32502*FLEN/8, x4, x1, x2) - -inst_10835: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd00001f; valaddr_reg:x3; val_offset:32505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32505*FLEN/8, x4, x1, x2) - -inst_10836: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd00003f; valaddr_reg:x3; val_offset:32508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32508*FLEN/8, x4, x1, x2) - -inst_10837: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd00007f; valaddr_reg:x3; val_offset:32511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32511*FLEN/8, x4, x1, x2) - -inst_10838: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd0000ff; valaddr_reg:x3; val_offset:32514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32514*FLEN/8, x4, x1, x2) - -inst_10839: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd0001ff; valaddr_reg:x3; val_offset:32517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32517*FLEN/8, x4, x1, x2) - -inst_10840: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd0003ff; valaddr_reg:x3; val_offset:32520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32520*FLEN/8, x4, x1, x2) - -inst_10841: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd0007ff; valaddr_reg:x3; val_offset:32523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32523*FLEN/8, x4, x1, x2) - -inst_10842: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd000fff; valaddr_reg:x3; val_offset:32526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32526*FLEN/8, x4, x1, x2) - -inst_10843: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd001fff; valaddr_reg:x3; val_offset:32529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32529*FLEN/8, x4, x1, x2) - -inst_10844: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd003fff; valaddr_reg:x3; val_offset:32532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32532*FLEN/8, x4, x1, x2) - -inst_10845: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd007fff; valaddr_reg:x3; val_offset:32535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32535*FLEN/8, x4, x1, x2) - -inst_10846: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd00ffff; valaddr_reg:x3; val_offset:32538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32538*FLEN/8, x4, x1, x2) - -inst_10847: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd01ffff; valaddr_reg:x3; val_offset:32541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32541*FLEN/8, x4, x1, x2) - -inst_10848: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd03ffff; valaddr_reg:x3; val_offset:32544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32544*FLEN/8, x4, x1, x2) - -inst_10849: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd07ffff; valaddr_reg:x3; val_offset:32547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32547*FLEN/8, x4, x1, x2) - -inst_10850: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd0fffff; valaddr_reg:x3; val_offset:32550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32550*FLEN/8, x4, x1, x2) - -inst_10851: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd1fffff; valaddr_reg:x3; val_offset:32553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32553*FLEN/8, x4, x1, x2) - -inst_10852: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd3fffff; valaddr_reg:x3; val_offset:32556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32556*FLEN/8, x4, x1, x2) - -inst_10853: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd400000; valaddr_reg:x3; val_offset:32559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32559*FLEN/8, x4, x1, x2) - -inst_10854: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd600000; valaddr_reg:x3; val_offset:32562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32562*FLEN/8, x4, x1, x2) - -inst_10855: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd700000; valaddr_reg:x3; val_offset:32565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32565*FLEN/8, x4, x1, x2) - -inst_10856: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd780000; valaddr_reg:x3; val_offset:32568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32568*FLEN/8, x4, x1, x2) - -inst_10857: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7c0000; valaddr_reg:x3; val_offset:32571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32571*FLEN/8, x4, x1, x2) - -inst_10858: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7e0000; valaddr_reg:x3; val_offset:32574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32574*FLEN/8, x4, x1, x2) - -inst_10859: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7f0000; valaddr_reg:x3; val_offset:32577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32577*FLEN/8, x4, x1, x2) - -inst_10860: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7f8000; valaddr_reg:x3; val_offset:32580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32580*FLEN/8, x4, x1, x2) - -inst_10861: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7fc000; valaddr_reg:x3; val_offset:32583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32583*FLEN/8, x4, x1, x2) - -inst_10862: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7fe000; valaddr_reg:x3; val_offset:32586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32586*FLEN/8, x4, x1, x2) - -inst_10863: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7ff000; valaddr_reg:x3; val_offset:32589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32589*FLEN/8, x4, x1, x2) - -inst_10864: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7ff800; valaddr_reg:x3; val_offset:32592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32592*FLEN/8, x4, x1, x2) - -inst_10865: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7ffc00; valaddr_reg:x3; val_offset:32595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32595*FLEN/8, x4, x1, x2) - -inst_10866: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7ffe00; valaddr_reg:x3; val_offset:32598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32598*FLEN/8, x4, x1, x2) - -inst_10867: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7fff00; valaddr_reg:x3; val_offset:32601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32601*FLEN/8, x4, x1, x2) - -inst_10868: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7fff80; valaddr_reg:x3; val_offset:32604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32604*FLEN/8, x4, x1, x2) - -inst_10869: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7fffc0; valaddr_reg:x3; val_offset:32607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32607*FLEN/8, x4, x1, x2) - -inst_10870: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7fffe0; valaddr_reg:x3; val_offset:32610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32610*FLEN/8, x4, x1, x2) - -inst_10871: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7ffff0; valaddr_reg:x3; val_offset:32613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32613*FLEN/8, x4, x1, x2) - -inst_10872: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7ffff8; valaddr_reg:x3; val_offset:32616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32616*FLEN/8, x4, x1, x2) - -inst_10873: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7ffffc; valaddr_reg:x3; val_offset:32619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32619*FLEN/8, x4, x1, x2) - -inst_10874: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7ffffe; valaddr_reg:x3; val_offset:32622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32622*FLEN/8, x4, x1, x2) - -inst_10875: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; -op3val:0xcd7fffff; valaddr_reg:x3; val_offset:32625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32625*FLEN/8, x4, x1, x2) - -inst_10876: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27800000; valaddr_reg:x3; val_offset:32628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32628*FLEN/8, x4, x1, x2) - -inst_10877: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27800001; valaddr_reg:x3; val_offset:32631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32631*FLEN/8, x4, x1, x2) - -inst_10878: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27800003; valaddr_reg:x3; val_offset:32634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32634*FLEN/8, x4, x1, x2) - -inst_10879: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27800007; valaddr_reg:x3; val_offset:32637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32637*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_86) - -inst_10880: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x2780000f; valaddr_reg:x3; val_offset:32640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32640*FLEN/8, x4, x1, x2) - -inst_10881: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x2780001f; valaddr_reg:x3; val_offset:32643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32643*FLEN/8, x4, x1, x2) - -inst_10882: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x2780003f; valaddr_reg:x3; val_offset:32646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32646*FLEN/8, x4, x1, x2) - -inst_10883: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x2780007f; valaddr_reg:x3; val_offset:32649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32649*FLEN/8, x4, x1, x2) - -inst_10884: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x278000ff; valaddr_reg:x3; val_offset:32652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32652*FLEN/8, x4, x1, x2) - -inst_10885: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x278001ff; valaddr_reg:x3; val_offset:32655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32655*FLEN/8, x4, x1, x2) - -inst_10886: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x278003ff; valaddr_reg:x3; val_offset:32658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32658*FLEN/8, x4, x1, x2) - -inst_10887: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x278007ff; valaddr_reg:x3; val_offset:32661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32661*FLEN/8, x4, x1, x2) - -inst_10888: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27800fff; valaddr_reg:x3; val_offset:32664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32664*FLEN/8, x4, x1, x2) - -inst_10889: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27801fff; valaddr_reg:x3; val_offset:32667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32667*FLEN/8, x4, x1, x2) - -inst_10890: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27803fff; valaddr_reg:x3; val_offset:32670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32670*FLEN/8, x4, x1, x2) - -inst_10891: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27807fff; valaddr_reg:x3; val_offset:32673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32673*FLEN/8, x4, x1, x2) - -inst_10892: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x2780ffff; valaddr_reg:x3; val_offset:32676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32676*FLEN/8, x4, x1, x2) - -inst_10893: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x2781ffff; valaddr_reg:x3; val_offset:32679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32679*FLEN/8, x4, x1, x2) - -inst_10894: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x2783ffff; valaddr_reg:x3; val_offset:32682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32682*FLEN/8, x4, x1, x2) - -inst_10895: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x2787ffff; valaddr_reg:x3; val_offset:32685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32685*FLEN/8, x4, x1, x2) - -inst_10896: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x278fffff; valaddr_reg:x3; val_offset:32688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32688*FLEN/8, x4, x1, x2) - -inst_10897: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x279fffff; valaddr_reg:x3; val_offset:32691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32691*FLEN/8, x4, x1, x2) - -inst_10898: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27bfffff; valaddr_reg:x3; val_offset:32694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32694*FLEN/8, x4, x1, x2) - -inst_10899: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27c00000; valaddr_reg:x3; val_offset:32697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32697*FLEN/8, x4, x1, x2) - -inst_10900: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27e00000; valaddr_reg:x3; val_offset:32700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32700*FLEN/8, x4, x1, x2) - -inst_10901: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27f00000; valaddr_reg:x3; val_offset:32703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32703*FLEN/8, x4, x1, x2) - -inst_10902: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27f80000; valaddr_reg:x3; val_offset:32706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32706*FLEN/8, x4, x1, x2) - -inst_10903: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fc0000; valaddr_reg:x3; val_offset:32709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32709*FLEN/8, x4, x1, x2) - -inst_10904: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fe0000; valaddr_reg:x3; val_offset:32712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32712*FLEN/8, x4, x1, x2) - -inst_10905: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ff0000; valaddr_reg:x3; val_offset:32715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32715*FLEN/8, x4, x1, x2) - -inst_10906: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ff8000; valaddr_reg:x3; val_offset:32718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32718*FLEN/8, x4, x1, x2) - -inst_10907: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ffc000; valaddr_reg:x3; val_offset:32721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32721*FLEN/8, x4, x1, x2) - -inst_10908: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ffe000; valaddr_reg:x3; val_offset:32724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32724*FLEN/8, x4, x1, x2) - -inst_10909: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fff000; valaddr_reg:x3; val_offset:32727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32727*FLEN/8, x4, x1, x2) - -inst_10910: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fff800; valaddr_reg:x3; val_offset:32730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32730*FLEN/8, x4, x1, x2) - -inst_10911: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fffc00; valaddr_reg:x3; val_offset:32733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32733*FLEN/8, x4, x1, x2) - -inst_10912: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fffe00; valaddr_reg:x3; val_offset:32736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32736*FLEN/8, x4, x1, x2) - -inst_10913: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ffff00; valaddr_reg:x3; val_offset:32739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32739*FLEN/8, x4, x1, x2) - -inst_10914: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ffff80; valaddr_reg:x3; val_offset:32742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32742*FLEN/8, x4, x1, x2) - -inst_10915: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ffffc0; valaddr_reg:x3; val_offset:32745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32745*FLEN/8, x4, x1, x2) - -inst_10916: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ffffe0; valaddr_reg:x3; val_offset:32748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32748*FLEN/8, x4, x1, x2) - -inst_10917: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fffff0; valaddr_reg:x3; val_offset:32751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32751*FLEN/8, x4, x1, x2) - -inst_10918: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fffff8; valaddr_reg:x3; val_offset:32754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32754*FLEN/8, x4, x1, x2) - -inst_10919: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fffffc; valaddr_reg:x3; val_offset:32757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32757*FLEN/8, x4, x1, x2) - -inst_10920: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27fffffe; valaddr_reg:x3; val_offset:32760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32760*FLEN/8, x4, x1, x2) - -inst_10921: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x27ffffff; valaddr_reg:x3; val_offset:32763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32763*FLEN/8, x4, x1, x2) - -inst_10922: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:32766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32766*FLEN/8, x4, x1, x2) - -inst_10923: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:32769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32769*FLEN/8, x4, x1, x2) - -inst_10924: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:32772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32772*FLEN/8, x4, x1, x2) - -inst_10925: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:32775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32775*FLEN/8, x4, x1, x2) - -inst_10926: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:32778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32778*FLEN/8, x4, x1, x2) - -inst_10927: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:32781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32781*FLEN/8, x4, x1, x2) - -inst_10928: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:32784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32784*FLEN/8, x4, x1, x2) - -inst_10929: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:32787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32787*FLEN/8, x4, x1, x2) - -inst_10930: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:32790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32790*FLEN/8, x4, x1, x2) - -inst_10931: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:32793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32793*FLEN/8, x4, x1, x2) - -inst_10932: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:32796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32796*FLEN/8, x4, x1, x2) - -inst_10933: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:32799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32799*FLEN/8, x4, x1, x2) - -inst_10934: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:32802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32802*FLEN/8, x4, x1, x2) - -inst_10935: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:32805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32805*FLEN/8, x4, x1, x2) - -inst_10936: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:32808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32808*FLEN/8, x4, x1, x2) - -inst_10937: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:32811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32811*FLEN/8, x4, x1, x2) - -inst_10938: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2000000; valaddr_reg:x3; val_offset:32814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32814*FLEN/8, x4, x1, x2) - -inst_10939: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2000001; valaddr_reg:x3; val_offset:32817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32817*FLEN/8, x4, x1, x2) - -inst_10940: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2000003; valaddr_reg:x3; val_offset:32820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32820*FLEN/8, x4, x1, x2) - -inst_10941: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2000007; valaddr_reg:x3; val_offset:32823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32823*FLEN/8, x4, x1, x2) - -inst_10942: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe200000f; valaddr_reg:x3; val_offset:32826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32826*FLEN/8, x4, x1, x2) - -inst_10943: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe200001f; valaddr_reg:x3; val_offset:32829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32829*FLEN/8, x4, x1, x2) - -inst_10944: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe200003f; valaddr_reg:x3; val_offset:32832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32832*FLEN/8, x4, x1, x2) - -inst_10945: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe200007f; valaddr_reg:x3; val_offset:32835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32835*FLEN/8, x4, x1, x2) - -inst_10946: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe20000ff; valaddr_reg:x3; val_offset:32838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32838*FLEN/8, x4, x1, x2) - -inst_10947: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe20001ff; valaddr_reg:x3; val_offset:32841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32841*FLEN/8, x4, x1, x2) - -inst_10948: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe20003ff; valaddr_reg:x3; val_offset:32844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32844*FLEN/8, x4, x1, x2) - -inst_10949: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe20007ff; valaddr_reg:x3; val_offset:32847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32847*FLEN/8, x4, x1, x2) - -inst_10950: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2000fff; valaddr_reg:x3; val_offset:32850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32850*FLEN/8, x4, x1, x2) - -inst_10951: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2001fff; valaddr_reg:x3; val_offset:32853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32853*FLEN/8, x4, x1, x2) - -inst_10952: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2003fff; valaddr_reg:x3; val_offset:32856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32856*FLEN/8, x4, x1, x2) - -inst_10953: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2007fff; valaddr_reg:x3; val_offset:32859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32859*FLEN/8, x4, x1, x2) - -inst_10954: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe200ffff; valaddr_reg:x3; val_offset:32862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32862*FLEN/8, x4, x1, x2) - -inst_10955: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe201ffff; valaddr_reg:x3; val_offset:32865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32865*FLEN/8, x4, x1, x2) - -inst_10956: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe203ffff; valaddr_reg:x3; val_offset:32868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32868*FLEN/8, x4, x1, x2) - -inst_10957: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe207ffff; valaddr_reg:x3; val_offset:32871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32871*FLEN/8, x4, x1, x2) - -inst_10958: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe20fffff; valaddr_reg:x3; val_offset:32874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32874*FLEN/8, x4, x1, x2) - -inst_10959: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe21fffff; valaddr_reg:x3; val_offset:32877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32877*FLEN/8, x4, x1, x2) - -inst_10960: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe23fffff; valaddr_reg:x3; val_offset:32880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32880*FLEN/8, x4, x1, x2) - -inst_10961: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2400000; valaddr_reg:x3; val_offset:32883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32883*FLEN/8, x4, x1, x2) - -inst_10962: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2600000; valaddr_reg:x3; val_offset:32886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32886*FLEN/8, x4, x1, x2) - -inst_10963: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2700000; valaddr_reg:x3; val_offset:32889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32889*FLEN/8, x4, x1, x2) - -inst_10964: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe2780000; valaddr_reg:x3; val_offset:32892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32892*FLEN/8, x4, x1, x2) - -inst_10965: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27c0000; valaddr_reg:x3; val_offset:32895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32895*FLEN/8, x4, x1, x2) - -inst_10966: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27e0000; valaddr_reg:x3; val_offset:32898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32898*FLEN/8, x4, x1, x2) - -inst_10967: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27f0000; valaddr_reg:x3; val_offset:32901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32901*FLEN/8, x4, x1, x2) - -inst_10968: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27f8000; valaddr_reg:x3; val_offset:32904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32904*FLEN/8, x4, x1, x2) - -inst_10969: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27fc000; valaddr_reg:x3; val_offset:32907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32907*FLEN/8, x4, x1, x2) - -inst_10970: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27fe000; valaddr_reg:x3; val_offset:32910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32910*FLEN/8, x4, x1, x2) - -inst_10971: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27ff000; valaddr_reg:x3; val_offset:32913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32913*FLEN/8, x4, x1, x2) - -inst_10972: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27ff800; valaddr_reg:x3; val_offset:32916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32916*FLEN/8, x4, x1, x2) - -inst_10973: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27ffc00; valaddr_reg:x3; val_offset:32919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32919*FLEN/8, x4, x1, x2) - -inst_10974: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27ffe00; valaddr_reg:x3; val_offset:32922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32922*FLEN/8, x4, x1, x2) - -inst_10975: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27fff00; valaddr_reg:x3; val_offset:32925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32925*FLEN/8, x4, x1, x2) - -inst_10976: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27fff80; valaddr_reg:x3; val_offset:32928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32928*FLEN/8, x4, x1, x2) - -inst_10977: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27fffc0; valaddr_reg:x3; val_offset:32931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32931*FLEN/8, x4, x1, x2) - -inst_10978: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27fffe0; valaddr_reg:x3; val_offset:32934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32934*FLEN/8, x4, x1, x2) - -inst_10979: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27ffff0; valaddr_reg:x3; val_offset:32937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32937*FLEN/8, x4, x1, x2) - -inst_10980: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27ffff8; valaddr_reg:x3; val_offset:32940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32940*FLEN/8, x4, x1, x2) - -inst_10981: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27ffffc; valaddr_reg:x3; val_offset:32943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32943*FLEN/8, x4, x1, x2) - -inst_10982: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27ffffe; valaddr_reg:x3; val_offset:32946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32946*FLEN/8, x4, x1, x2) - -inst_10983: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xe27fffff; valaddr_reg:x3; val_offset:32949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32949*FLEN/8, x4, x1, x2) - -inst_10984: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff000001; valaddr_reg:x3; val_offset:32952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32952*FLEN/8, x4, x1, x2) - -inst_10985: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff000003; valaddr_reg:x3; val_offset:32955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32955*FLEN/8, x4, x1, x2) - -inst_10986: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff000007; valaddr_reg:x3; val_offset:32958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32958*FLEN/8, x4, x1, x2) - -inst_10987: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff199999; valaddr_reg:x3; val_offset:32961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32961*FLEN/8, x4, x1, x2) - -inst_10988: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff249249; valaddr_reg:x3; val_offset:32964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32964*FLEN/8, x4, x1, x2) - -inst_10989: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff333333; valaddr_reg:x3; val_offset:32967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32967*FLEN/8, x4, x1, x2) - -inst_10990: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:32970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32970*FLEN/8, x4, x1, x2) - -inst_10991: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:32973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32973*FLEN/8, x4, x1, x2) - -inst_10992: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff444444; valaddr_reg:x3; val_offset:32976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32976*FLEN/8, x4, x1, x2) - -inst_10993: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:32979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32979*FLEN/8, x4, x1, x2) - -inst_10994: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:32982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32982*FLEN/8, x4, x1, x2) - -inst_10995: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff666666; valaddr_reg:x3; val_offset:32985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32985*FLEN/8, x4, x1, x2) - -inst_10996: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:32988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32988*FLEN/8, x4, x1, x2) - -inst_10997: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:32991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32991*FLEN/8, x4, x1, x2) - -inst_10998: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:32994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32994*FLEN/8, x4, x1, x2) - -inst_10999: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:32997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32997*FLEN/8, x4, x1, x2) - -inst_11000: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1800000; valaddr_reg:x3; val_offset:33000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33000*FLEN/8, x4, x1, x2) - -inst_11001: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1800001; valaddr_reg:x3; val_offset:33003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33003*FLEN/8, x4, x1, x2) - -inst_11002: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1800003; valaddr_reg:x3; val_offset:33006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33006*FLEN/8, x4, x1, x2) - -inst_11003: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1800007; valaddr_reg:x3; val_offset:33009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33009*FLEN/8, x4, x1, x2) - -inst_11004: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf180000f; valaddr_reg:x3; val_offset:33012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33012*FLEN/8, x4, x1, x2) - -inst_11005: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf180001f; valaddr_reg:x3; val_offset:33015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33015*FLEN/8, x4, x1, x2) - -inst_11006: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf180003f; valaddr_reg:x3; val_offset:33018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33018*FLEN/8, x4, x1, x2) - -inst_11007: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf180007f; valaddr_reg:x3; val_offset:33021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33021*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_87) - -inst_11008: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf18000ff; valaddr_reg:x3; val_offset:33024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33024*FLEN/8, x4, x1, x2) - -inst_11009: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf18001ff; valaddr_reg:x3; val_offset:33027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33027*FLEN/8, x4, x1, x2) - -inst_11010: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf18003ff; valaddr_reg:x3; val_offset:33030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33030*FLEN/8, x4, x1, x2) - -inst_11011: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf18007ff; valaddr_reg:x3; val_offset:33033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33033*FLEN/8, x4, x1, x2) - -inst_11012: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1800fff; valaddr_reg:x3; val_offset:33036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33036*FLEN/8, x4, x1, x2) - -inst_11013: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1801fff; valaddr_reg:x3; val_offset:33039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33039*FLEN/8, x4, x1, x2) - -inst_11014: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1803fff; valaddr_reg:x3; val_offset:33042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33042*FLEN/8, x4, x1, x2) - -inst_11015: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1807fff; valaddr_reg:x3; val_offset:33045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33045*FLEN/8, x4, x1, x2) - -inst_11016: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf180ffff; valaddr_reg:x3; val_offset:33048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33048*FLEN/8, x4, x1, x2) - -inst_11017: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf181ffff; valaddr_reg:x3; val_offset:33051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33051*FLEN/8, x4, x1, x2) - -inst_11018: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf183ffff; valaddr_reg:x3; val_offset:33054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33054*FLEN/8, x4, x1, x2) - -inst_11019: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf187ffff; valaddr_reg:x3; val_offset:33057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33057*FLEN/8, x4, x1, x2) - -inst_11020: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf18fffff; valaddr_reg:x3; val_offset:33060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33060*FLEN/8, x4, x1, x2) - -inst_11021: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf19fffff; valaddr_reg:x3; val_offset:33063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33063*FLEN/8, x4, x1, x2) - -inst_11022: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1bfffff; valaddr_reg:x3; val_offset:33066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33066*FLEN/8, x4, x1, x2) - -inst_11023: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1c00000; valaddr_reg:x3; val_offset:33069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33069*FLEN/8, x4, x1, x2) - -inst_11024: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1e00000; valaddr_reg:x3; val_offset:33072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33072*FLEN/8, x4, x1, x2) - -inst_11025: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1f00000; valaddr_reg:x3; val_offset:33075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33075*FLEN/8, x4, x1, x2) - -inst_11026: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1f80000; valaddr_reg:x3; val_offset:33078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33078*FLEN/8, x4, x1, x2) - -inst_11027: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fc0000; valaddr_reg:x3; val_offset:33081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33081*FLEN/8, x4, x1, x2) - -inst_11028: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fe0000; valaddr_reg:x3; val_offset:33084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33084*FLEN/8, x4, x1, x2) - -inst_11029: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ff0000; valaddr_reg:x3; val_offset:33087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33087*FLEN/8, x4, x1, x2) - -inst_11030: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ff8000; valaddr_reg:x3; val_offset:33090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33090*FLEN/8, x4, x1, x2) - -inst_11031: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ffc000; valaddr_reg:x3; val_offset:33093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33093*FLEN/8, x4, x1, x2) - -inst_11032: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ffe000; valaddr_reg:x3; val_offset:33096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33096*FLEN/8, x4, x1, x2) - -inst_11033: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fff000; valaddr_reg:x3; val_offset:33099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33099*FLEN/8, x4, x1, x2) - -inst_11034: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fff800; valaddr_reg:x3; val_offset:33102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33102*FLEN/8, x4, x1, x2) - -inst_11035: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fffc00; valaddr_reg:x3; val_offset:33105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33105*FLEN/8, x4, x1, x2) - -inst_11036: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fffe00; valaddr_reg:x3; val_offset:33108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33108*FLEN/8, x4, x1, x2) - -inst_11037: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ffff00; valaddr_reg:x3; val_offset:33111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33111*FLEN/8, x4, x1, x2) - -inst_11038: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ffff80; valaddr_reg:x3; val_offset:33114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33114*FLEN/8, x4, x1, x2) - -inst_11039: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ffffc0; valaddr_reg:x3; val_offset:33117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33117*FLEN/8, x4, x1, x2) - -inst_11040: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ffffe0; valaddr_reg:x3; val_offset:33120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33120*FLEN/8, x4, x1, x2) - -inst_11041: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fffff0; valaddr_reg:x3; val_offset:33123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33123*FLEN/8, x4, x1, x2) - -inst_11042: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fffff8; valaddr_reg:x3; val_offset:33126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33126*FLEN/8, x4, x1, x2) - -inst_11043: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fffffc; valaddr_reg:x3; val_offset:33129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33129*FLEN/8, x4, x1, x2) - -inst_11044: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1fffffe; valaddr_reg:x3; val_offset:33132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33132*FLEN/8, x4, x1, x2) - -inst_11045: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xf1ffffff; valaddr_reg:x3; val_offset:33135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33135*FLEN/8, x4, x1, x2) - -inst_11046: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff000001; valaddr_reg:x3; val_offset:33138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33138*FLEN/8, x4, x1, x2) - -inst_11047: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff000003; valaddr_reg:x3; val_offset:33141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33141*FLEN/8, x4, x1, x2) - -inst_11048: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff000007; valaddr_reg:x3; val_offset:33144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33144*FLEN/8, x4, x1, x2) - -inst_11049: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff199999; valaddr_reg:x3; val_offset:33147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33147*FLEN/8, x4, x1, x2) - -inst_11050: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff249249; valaddr_reg:x3; val_offset:33150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33150*FLEN/8, x4, x1, x2) - -inst_11051: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff333333; valaddr_reg:x3; val_offset:33153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33153*FLEN/8, x4, x1, x2) - -inst_11052: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:33156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33156*FLEN/8, x4, x1, x2) - -inst_11053: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:33159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33159*FLEN/8, x4, x1, x2) - -inst_11054: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff444444; valaddr_reg:x3; val_offset:33162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33162*FLEN/8, x4, x1, x2) - -inst_11055: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:33165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33165*FLEN/8, x4, x1, x2) - -inst_11056: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:33168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33168*FLEN/8, x4, x1, x2) - -inst_11057: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff666666; valaddr_reg:x3; val_offset:33171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33171*FLEN/8, x4, x1, x2) - -inst_11058: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:33174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33174*FLEN/8, x4, x1, x2) - -inst_11059: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:33177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33177*FLEN/8, x4, x1, x2) - -inst_11060: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:33180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33180*FLEN/8, x4, x1, x2) - -inst_11061: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:33183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33183*FLEN/8, x4, x1, x2) - -inst_11062: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91000000; valaddr_reg:x3; val_offset:33186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33186*FLEN/8, x4, x1, x2) - -inst_11063: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91000001; valaddr_reg:x3; val_offset:33189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33189*FLEN/8, x4, x1, x2) - -inst_11064: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91000003; valaddr_reg:x3; val_offset:33192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33192*FLEN/8, x4, x1, x2) - -inst_11065: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91000007; valaddr_reg:x3; val_offset:33195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33195*FLEN/8, x4, x1, x2) - -inst_11066: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x9100000f; valaddr_reg:x3; val_offset:33198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33198*FLEN/8, x4, x1, x2) - -inst_11067: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x9100001f; valaddr_reg:x3; val_offset:33201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33201*FLEN/8, x4, x1, x2) - -inst_11068: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x9100003f; valaddr_reg:x3; val_offset:33204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33204*FLEN/8, x4, x1, x2) - -inst_11069: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x9100007f; valaddr_reg:x3; val_offset:33207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33207*FLEN/8, x4, x1, x2) - -inst_11070: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x910000ff; valaddr_reg:x3; val_offset:33210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33210*FLEN/8, x4, x1, x2) - -inst_11071: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x910001ff; valaddr_reg:x3; val_offset:33213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33213*FLEN/8, x4, x1, x2) - -inst_11072: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x910003ff; valaddr_reg:x3; val_offset:33216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33216*FLEN/8, x4, x1, x2) - -inst_11073: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x910007ff; valaddr_reg:x3; val_offset:33219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33219*FLEN/8, x4, x1, x2) - -inst_11074: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91000fff; valaddr_reg:x3; val_offset:33222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33222*FLEN/8, x4, x1, x2) - -inst_11075: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91001fff; valaddr_reg:x3; val_offset:33225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33225*FLEN/8, x4, x1, x2) - -inst_11076: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91003fff; valaddr_reg:x3; val_offset:33228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33228*FLEN/8, x4, x1, x2) - -inst_11077: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91007fff; valaddr_reg:x3; val_offset:33231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33231*FLEN/8, x4, x1, x2) - -inst_11078: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x9100ffff; valaddr_reg:x3; val_offset:33234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33234*FLEN/8, x4, x1, x2) - -inst_11079: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x9101ffff; valaddr_reg:x3; val_offset:33237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33237*FLEN/8, x4, x1, x2) - -inst_11080: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x9103ffff; valaddr_reg:x3; val_offset:33240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33240*FLEN/8, x4, x1, x2) - -inst_11081: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x9107ffff; valaddr_reg:x3; val_offset:33243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33243*FLEN/8, x4, x1, x2) - -inst_11082: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x910fffff; valaddr_reg:x3; val_offset:33246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33246*FLEN/8, x4, x1, x2) - -inst_11083: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x911fffff; valaddr_reg:x3; val_offset:33249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33249*FLEN/8, x4, x1, x2) - -inst_11084: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x913fffff; valaddr_reg:x3; val_offset:33252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33252*FLEN/8, x4, x1, x2) - -inst_11085: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91400000; valaddr_reg:x3; val_offset:33255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33255*FLEN/8, x4, x1, x2) - -inst_11086: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91600000; valaddr_reg:x3; val_offset:33258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33258*FLEN/8, x4, x1, x2) - -inst_11087: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91700000; valaddr_reg:x3; val_offset:33261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33261*FLEN/8, x4, x1, x2) - -inst_11088: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x91780000; valaddr_reg:x3; val_offset:33264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33264*FLEN/8, x4, x1, x2) - -inst_11089: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917c0000; valaddr_reg:x3; val_offset:33267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33267*FLEN/8, x4, x1, x2) - -inst_11090: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917e0000; valaddr_reg:x3; val_offset:33270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33270*FLEN/8, x4, x1, x2) - -inst_11091: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917f0000; valaddr_reg:x3; val_offset:33273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33273*FLEN/8, x4, x1, x2) - -inst_11092: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917f8000; valaddr_reg:x3; val_offset:33276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33276*FLEN/8, x4, x1, x2) - -inst_11093: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917fc000; valaddr_reg:x3; val_offset:33279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33279*FLEN/8, x4, x1, x2) - -inst_11094: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917fe000; valaddr_reg:x3; val_offset:33282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33282*FLEN/8, x4, x1, x2) - -inst_11095: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917ff000; valaddr_reg:x3; val_offset:33285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33285*FLEN/8, x4, x1, x2) - -inst_11096: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917ff800; valaddr_reg:x3; val_offset:33288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33288*FLEN/8, x4, x1, x2) - -inst_11097: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917ffc00; valaddr_reg:x3; val_offset:33291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33291*FLEN/8, x4, x1, x2) - -inst_11098: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917ffe00; valaddr_reg:x3; val_offset:33294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33294*FLEN/8, x4, x1, x2) - -inst_11099: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917fff00; valaddr_reg:x3; val_offset:33297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33297*FLEN/8, x4, x1, x2) - -inst_11100: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917fff80; valaddr_reg:x3; val_offset:33300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33300*FLEN/8, x4, x1, x2) - -inst_11101: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917fffc0; valaddr_reg:x3; val_offset:33303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33303*FLEN/8, x4, x1, x2) - -inst_11102: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917fffe0; valaddr_reg:x3; val_offset:33306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33306*FLEN/8, x4, x1, x2) - -inst_11103: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917ffff0; valaddr_reg:x3; val_offset:33309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33309*FLEN/8, x4, x1, x2) - -inst_11104: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917ffff8; valaddr_reg:x3; val_offset:33312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33312*FLEN/8, x4, x1, x2) - -inst_11105: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917ffffc; valaddr_reg:x3; val_offset:33315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33315*FLEN/8, x4, x1, x2) - -inst_11106: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917ffffe; valaddr_reg:x3; val_offset:33318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33318*FLEN/8, x4, x1, x2) - -inst_11107: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0x917fffff; valaddr_reg:x3; val_offset:33321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33321*FLEN/8, x4, x1, x2) - -inst_11108: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbf800001; valaddr_reg:x3; val_offset:33324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33324*FLEN/8, x4, x1, x2) - -inst_11109: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbf800003; valaddr_reg:x3; val_offset:33327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33327*FLEN/8, x4, x1, x2) - -inst_11110: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbf800007; valaddr_reg:x3; val_offset:33330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33330*FLEN/8, x4, x1, x2) - -inst_11111: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbf999999; valaddr_reg:x3; val_offset:33333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33333*FLEN/8, x4, x1, x2) - -inst_11112: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:33336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33336*FLEN/8, x4, x1, x2) - -inst_11113: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:33339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33339*FLEN/8, x4, x1, x2) - -inst_11114: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:33342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33342*FLEN/8, x4, x1, x2) - -inst_11115: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:33345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33345*FLEN/8, x4, x1, x2) - -inst_11116: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:33348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33348*FLEN/8, x4, x1, x2) - -inst_11117: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:33351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33351*FLEN/8, x4, x1, x2) - -inst_11118: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:33354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33354*FLEN/8, x4, x1, x2) - -inst_11119: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:33357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33357*FLEN/8, x4, x1, x2) - -inst_11120: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:33360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33360*FLEN/8, x4, x1, x2) - -inst_11121: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:33363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33363*FLEN/8, x4, x1, x2) - -inst_11122: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:33366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33366*FLEN/8, x4, x1, x2) - -inst_11123: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:33369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33369*FLEN/8, x4, x1, x2) - -inst_11124: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7000000; valaddr_reg:x3; val_offset:33372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33372*FLEN/8, x4, x1, x2) - -inst_11125: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7000001; valaddr_reg:x3; val_offset:33375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33375*FLEN/8, x4, x1, x2) - -inst_11126: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7000003; valaddr_reg:x3; val_offset:33378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33378*FLEN/8, x4, x1, x2) - -inst_11127: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7000007; valaddr_reg:x3; val_offset:33381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33381*FLEN/8, x4, x1, x2) - -inst_11128: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf700000f; valaddr_reg:x3; val_offset:33384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33384*FLEN/8, x4, x1, x2) - -inst_11129: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf700001f; valaddr_reg:x3; val_offset:33387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33387*FLEN/8, x4, x1, x2) - -inst_11130: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf700003f; valaddr_reg:x3; val_offset:33390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33390*FLEN/8, x4, x1, x2) - -inst_11131: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf700007f; valaddr_reg:x3; val_offset:33393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33393*FLEN/8, x4, x1, x2) - -inst_11132: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf70000ff; valaddr_reg:x3; val_offset:33396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33396*FLEN/8, x4, x1, x2) - -inst_11133: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf70001ff; valaddr_reg:x3; val_offset:33399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33399*FLEN/8, x4, x1, x2) - -inst_11134: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf70003ff; valaddr_reg:x3; val_offset:33402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33402*FLEN/8, x4, x1, x2) - -inst_11135: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf70007ff; valaddr_reg:x3; val_offset:33405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33405*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_88) - -inst_11136: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7000fff; valaddr_reg:x3; val_offset:33408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33408*FLEN/8, x4, x1, x2) - -inst_11137: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7001fff; valaddr_reg:x3; val_offset:33411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33411*FLEN/8, x4, x1, x2) - -inst_11138: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7003fff; valaddr_reg:x3; val_offset:33414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33414*FLEN/8, x4, x1, x2) - -inst_11139: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7007fff; valaddr_reg:x3; val_offset:33417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33417*FLEN/8, x4, x1, x2) - -inst_11140: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf700ffff; valaddr_reg:x3; val_offset:33420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33420*FLEN/8, x4, x1, x2) - -inst_11141: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf701ffff; valaddr_reg:x3; val_offset:33423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33423*FLEN/8, x4, x1, x2) - -inst_11142: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf703ffff; valaddr_reg:x3; val_offset:33426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33426*FLEN/8, x4, x1, x2) - -inst_11143: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf707ffff; valaddr_reg:x3; val_offset:33429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33429*FLEN/8, x4, x1, x2) - -inst_11144: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf70fffff; valaddr_reg:x3; val_offset:33432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33432*FLEN/8, x4, x1, x2) - -inst_11145: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf71fffff; valaddr_reg:x3; val_offset:33435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33435*FLEN/8, x4, x1, x2) - -inst_11146: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf73fffff; valaddr_reg:x3; val_offset:33438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33438*FLEN/8, x4, x1, x2) - -inst_11147: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7400000; valaddr_reg:x3; val_offset:33441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33441*FLEN/8, x4, x1, x2) - -inst_11148: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7600000; valaddr_reg:x3; val_offset:33444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33444*FLEN/8, x4, x1, x2) - -inst_11149: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7700000; valaddr_reg:x3; val_offset:33447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33447*FLEN/8, x4, x1, x2) - -inst_11150: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf7780000; valaddr_reg:x3; val_offset:33450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33450*FLEN/8, x4, x1, x2) - -inst_11151: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77c0000; valaddr_reg:x3; val_offset:33453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33453*FLEN/8, x4, x1, x2) - -inst_11152: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77e0000; valaddr_reg:x3; val_offset:33456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33456*FLEN/8, x4, x1, x2) - -inst_11153: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77f0000; valaddr_reg:x3; val_offset:33459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33459*FLEN/8, x4, x1, x2) - -inst_11154: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77f8000; valaddr_reg:x3; val_offset:33462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33462*FLEN/8, x4, x1, x2) - -inst_11155: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77fc000; valaddr_reg:x3; val_offset:33465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33465*FLEN/8, x4, x1, x2) - -inst_11156: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77fe000; valaddr_reg:x3; val_offset:33468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33468*FLEN/8, x4, x1, x2) - -inst_11157: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77ff000; valaddr_reg:x3; val_offset:33471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33471*FLEN/8, x4, x1, x2) - -inst_11158: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77ff800; valaddr_reg:x3; val_offset:33474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33474*FLEN/8, x4, x1, x2) - -inst_11159: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77ffc00; valaddr_reg:x3; val_offset:33477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33477*FLEN/8, x4, x1, x2) - -inst_11160: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77ffe00; valaddr_reg:x3; val_offset:33480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33480*FLEN/8, x4, x1, x2) - -inst_11161: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77fff00; valaddr_reg:x3; val_offset:33483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33483*FLEN/8, x4, x1, x2) - -inst_11162: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77fff80; valaddr_reg:x3; val_offset:33486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33486*FLEN/8, x4, x1, x2) - -inst_11163: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77fffc0; valaddr_reg:x3; val_offset:33489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33489*FLEN/8, x4, x1, x2) - -inst_11164: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77fffe0; valaddr_reg:x3; val_offset:33492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33492*FLEN/8, x4, x1, x2) - -inst_11165: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77ffff0; valaddr_reg:x3; val_offset:33495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33495*FLEN/8, x4, x1, x2) - -inst_11166: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77ffff8; valaddr_reg:x3; val_offset:33498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33498*FLEN/8, x4, x1, x2) - -inst_11167: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77ffffc; valaddr_reg:x3; val_offset:33501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33501*FLEN/8, x4, x1, x2) - -inst_11168: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77ffffe; valaddr_reg:x3; val_offset:33504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33504*FLEN/8, x4, x1, x2) - -inst_11169: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xf77fffff; valaddr_reg:x3; val_offset:33507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33507*FLEN/8, x4, x1, x2) - -inst_11170: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff000001; valaddr_reg:x3; val_offset:33510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33510*FLEN/8, x4, x1, x2) - -inst_11171: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff000003; valaddr_reg:x3; val_offset:33513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33513*FLEN/8, x4, x1, x2) - -inst_11172: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff000007; valaddr_reg:x3; val_offset:33516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33516*FLEN/8, x4, x1, x2) - -inst_11173: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff199999; valaddr_reg:x3; val_offset:33519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33519*FLEN/8, x4, x1, x2) - -inst_11174: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff249249; valaddr_reg:x3; val_offset:33522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33522*FLEN/8, x4, x1, x2) - -inst_11175: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff333333; valaddr_reg:x3; val_offset:33525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33525*FLEN/8, x4, x1, x2) - -inst_11176: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:33528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33528*FLEN/8, x4, x1, x2) - -inst_11177: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:33531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33531*FLEN/8, x4, x1, x2) - -inst_11178: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff444444; valaddr_reg:x3; val_offset:33534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33534*FLEN/8, x4, x1, x2) - -inst_11179: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:33537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33537*FLEN/8, x4, x1, x2) - -inst_11180: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:33540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33540*FLEN/8, x4, x1, x2) - -inst_11181: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff666666; valaddr_reg:x3; val_offset:33543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33543*FLEN/8, x4, x1, x2) - -inst_11182: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:33546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33546*FLEN/8, x4, x1, x2) - -inst_11183: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:33549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33549*FLEN/8, x4, x1, x2) - -inst_11184: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:33552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33552*FLEN/8, x4, x1, x2) - -inst_11185: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:33555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33555*FLEN/8, x4, x1, x2) - -inst_11186: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x0; valaddr_reg:x3; val_offset:33558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33558*FLEN/8, x4, x1, x2) - -inst_11187: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:33561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33561*FLEN/8, x4, x1, x2) - -inst_11188: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:33564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33564*FLEN/8, x4, x1, x2) - -inst_11189: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:33567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33567*FLEN/8, x4, x1, x2) - -inst_11190: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0xf; valaddr_reg:x3; val_offset:33570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33570*FLEN/8, x4, x1, x2) - -inst_11191: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x1f; valaddr_reg:x3; val_offset:33573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33573*FLEN/8, x4, x1, x2) - -inst_11192: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x3f; valaddr_reg:x3; val_offset:33576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33576*FLEN/8, x4, x1, x2) - -inst_11193: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7f; valaddr_reg:x3; val_offset:33579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33579*FLEN/8, x4, x1, x2) - -inst_11194: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0xff; valaddr_reg:x3; val_offset:33582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33582*FLEN/8, x4, x1, x2) - -inst_11195: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x1ff; valaddr_reg:x3; val_offset:33585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33585*FLEN/8, x4, x1, x2) - -inst_11196: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x3ff; valaddr_reg:x3; val_offset:33588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33588*FLEN/8, x4, x1, x2) - -inst_11197: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ff; valaddr_reg:x3; val_offset:33591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33591*FLEN/8, x4, x1, x2) - -inst_11198: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0xfff; valaddr_reg:x3; val_offset:33594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33594*FLEN/8, x4, x1, x2) - -inst_11199: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x1fff; valaddr_reg:x3; val_offset:33597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33597*FLEN/8, x4, x1, x2) - -inst_11200: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x3fff; valaddr_reg:x3; val_offset:33600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33600*FLEN/8, x4, x1, x2) - -inst_11201: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7fff; valaddr_reg:x3; val_offset:33603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33603*FLEN/8, x4, x1, x2) - -inst_11202: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0xffff; valaddr_reg:x3; val_offset:33606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33606*FLEN/8, x4, x1, x2) - -inst_11203: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x1ffff; valaddr_reg:x3; val_offset:33609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33609*FLEN/8, x4, x1, x2) - -inst_11204: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x3ffff; valaddr_reg:x3; val_offset:33612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33612*FLEN/8, x4, x1, x2) - -inst_11205: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ffff; valaddr_reg:x3; val_offset:33615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33615*FLEN/8, x4, x1, x2) - -inst_11206: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0xfffff; valaddr_reg:x3; val_offset:33618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33618*FLEN/8, x4, x1, x2) - -inst_11207: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:33621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33621*FLEN/8, x4, x1, x2) - -inst_11208: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x1fffff; valaddr_reg:x3; val_offset:33624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33624*FLEN/8, x4, x1, x2) - -inst_11209: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:33627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33627*FLEN/8, x4, x1, x2) - -inst_11210: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:33630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33630*FLEN/8, x4, x1, x2) - -inst_11211: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:33633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33633*FLEN/8, x4, x1, x2) - -inst_11212: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:33636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33636*FLEN/8, x4, x1, x2) - -inst_11213: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x3fffff; valaddr_reg:x3; val_offset:33639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33639*FLEN/8, x4, x1, x2) - -inst_11214: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x400000; valaddr_reg:x3; val_offset:33642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33642*FLEN/8, x4, x1, x2) - -inst_11215: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:33645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33645*FLEN/8, x4, x1, x2) - -inst_11216: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:33648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33648*FLEN/8, x4, x1, x2) - -inst_11217: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:33651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33651*FLEN/8, x4, x1, x2) - -inst_11218: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x600000; valaddr_reg:x3; val_offset:33654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33654*FLEN/8, x4, x1, x2) - -inst_11219: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:33657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33657*FLEN/8, x4, x1, x2) - -inst_11220: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:33660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33660*FLEN/8, x4, x1, x2) - -inst_11221: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x700000; valaddr_reg:x3; val_offset:33663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33663*FLEN/8, x4, x1, x2) - -inst_11222: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x780000; valaddr_reg:x3; val_offset:33666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33666*FLEN/8, x4, x1, x2) - -inst_11223: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7c0000; valaddr_reg:x3; val_offset:33669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33669*FLEN/8, x4, x1, x2) - -inst_11224: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7e0000; valaddr_reg:x3; val_offset:33672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33672*FLEN/8, x4, x1, x2) - -inst_11225: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7f0000; valaddr_reg:x3; val_offset:33675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33675*FLEN/8, x4, x1, x2) - -inst_11226: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7f8000; valaddr_reg:x3; val_offset:33678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33678*FLEN/8, x4, x1, x2) - -inst_11227: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7fc000; valaddr_reg:x3; val_offset:33681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33681*FLEN/8, x4, x1, x2) - -inst_11228: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7fe000; valaddr_reg:x3; val_offset:33684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33684*FLEN/8, x4, x1, x2) - -inst_11229: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ff000; valaddr_reg:x3; val_offset:33687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33687*FLEN/8, x4, x1, x2) - -inst_11230: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ff800; valaddr_reg:x3; val_offset:33690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33690*FLEN/8, x4, x1, x2) - -inst_11231: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ffc00; valaddr_reg:x3; val_offset:33693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33693*FLEN/8, x4, x1, x2) - -inst_11232: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ffe00; valaddr_reg:x3; val_offset:33696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33696*FLEN/8, x4, x1, x2) - -inst_11233: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7fff00; valaddr_reg:x3; val_offset:33699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33699*FLEN/8, x4, x1, x2) - -inst_11234: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7fff80; valaddr_reg:x3; val_offset:33702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33702*FLEN/8, x4, x1, x2) - -inst_11235: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7fffc0; valaddr_reg:x3; val_offset:33705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33705*FLEN/8, x4, x1, x2) - -inst_11236: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7fffe0; valaddr_reg:x3; val_offset:33708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33708*FLEN/8, x4, x1, x2) - -inst_11237: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ffff0; valaddr_reg:x3; val_offset:33711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33711*FLEN/8, x4, x1, x2) - -inst_11238: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:33714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33714*FLEN/8, x4, x1, x2) - -inst_11239: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:33717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33717*FLEN/8, x4, x1, x2) - -inst_11240: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:33720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33720*FLEN/8, x4, x1, x2) - -inst_11241: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; -op3val:0x7fffff; valaddr_reg:x3; val_offset:33723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33723*FLEN/8, x4, x1, x2) - -inst_11242: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:33726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33726*FLEN/8, x4, x1, x2) - -inst_11243: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:33729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33729*FLEN/8, x4, x1, x2) - -inst_11244: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:33732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33732*FLEN/8, x4, x1, x2) - -inst_11245: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:33735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33735*FLEN/8, x4, x1, x2) - -inst_11246: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:33738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33738*FLEN/8, x4, x1, x2) - -inst_11247: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:33741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33741*FLEN/8, x4, x1, x2) - -inst_11248: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:33744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33744*FLEN/8, x4, x1, x2) - -inst_11249: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:33747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33747*FLEN/8, x4, x1, x2) - -inst_11250: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:33750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33750*FLEN/8, x4, x1, x2) - -inst_11251: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:33753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33753*FLEN/8, x4, x1, x2) - -inst_11252: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:33756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33756*FLEN/8, x4, x1, x2) - -inst_11253: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:33759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33759*FLEN/8, x4, x1, x2) - -inst_11254: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:33762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33762*FLEN/8, x4, x1, x2) - -inst_11255: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:33765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33765*FLEN/8, x4, x1, x2) - -inst_11256: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:33768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33768*FLEN/8, x4, x1, x2) - -inst_11257: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:33771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33771*FLEN/8, x4, x1, x2) - -inst_11258: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84800000; valaddr_reg:x3; val_offset:33774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33774*FLEN/8, x4, x1, x2) - -inst_11259: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84800001; valaddr_reg:x3; val_offset:33777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33777*FLEN/8, x4, x1, x2) - -inst_11260: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84800003; valaddr_reg:x3; val_offset:33780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33780*FLEN/8, x4, x1, x2) - -inst_11261: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84800007; valaddr_reg:x3; val_offset:33783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33783*FLEN/8, x4, x1, x2) - -inst_11262: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8480000f; valaddr_reg:x3; val_offset:33786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33786*FLEN/8, x4, x1, x2) - -inst_11263: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8480001f; valaddr_reg:x3; val_offset:33789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33789*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_89) - -inst_11264: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8480003f; valaddr_reg:x3; val_offset:33792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33792*FLEN/8, x4, x1, x2) - -inst_11265: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8480007f; valaddr_reg:x3; val_offset:33795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33795*FLEN/8, x4, x1, x2) - -inst_11266: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x848000ff; valaddr_reg:x3; val_offset:33798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33798*FLEN/8, x4, x1, x2) - -inst_11267: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x848001ff; valaddr_reg:x3; val_offset:33801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33801*FLEN/8, x4, x1, x2) - -inst_11268: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x848003ff; valaddr_reg:x3; val_offset:33804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33804*FLEN/8, x4, x1, x2) - -inst_11269: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x848007ff; valaddr_reg:x3; val_offset:33807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33807*FLEN/8, x4, x1, x2) - -inst_11270: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84800fff; valaddr_reg:x3; val_offset:33810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33810*FLEN/8, x4, x1, x2) - -inst_11271: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84801fff; valaddr_reg:x3; val_offset:33813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33813*FLEN/8, x4, x1, x2) - -inst_11272: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84803fff; valaddr_reg:x3; val_offset:33816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33816*FLEN/8, x4, x1, x2) - -inst_11273: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84807fff; valaddr_reg:x3; val_offset:33819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33819*FLEN/8, x4, x1, x2) - -inst_11274: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8480ffff; valaddr_reg:x3; val_offset:33822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33822*FLEN/8, x4, x1, x2) - -inst_11275: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8481ffff; valaddr_reg:x3; val_offset:33825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33825*FLEN/8, x4, x1, x2) - -inst_11276: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8483ffff; valaddr_reg:x3; val_offset:33828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33828*FLEN/8, x4, x1, x2) - -inst_11277: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x8487ffff; valaddr_reg:x3; val_offset:33831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33831*FLEN/8, x4, x1, x2) - -inst_11278: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x848fffff; valaddr_reg:x3; val_offset:33834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33834*FLEN/8, x4, x1, x2) - -inst_11279: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x849fffff; valaddr_reg:x3; val_offset:33837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33837*FLEN/8, x4, x1, x2) - -inst_11280: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84bfffff; valaddr_reg:x3; val_offset:33840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33840*FLEN/8, x4, x1, x2) - -inst_11281: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84c00000; valaddr_reg:x3; val_offset:33843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33843*FLEN/8, x4, x1, x2) - -inst_11282: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84e00000; valaddr_reg:x3; val_offset:33846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33846*FLEN/8, x4, x1, x2) - -inst_11283: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84f00000; valaddr_reg:x3; val_offset:33849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33849*FLEN/8, x4, x1, x2) - -inst_11284: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84f80000; valaddr_reg:x3; val_offset:33852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33852*FLEN/8, x4, x1, x2) - -inst_11285: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fc0000; valaddr_reg:x3; val_offset:33855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33855*FLEN/8, x4, x1, x2) - -inst_11286: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fe0000; valaddr_reg:x3; val_offset:33858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33858*FLEN/8, x4, x1, x2) - -inst_11287: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ff0000; valaddr_reg:x3; val_offset:33861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33861*FLEN/8, x4, x1, x2) - -inst_11288: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ff8000; valaddr_reg:x3; val_offset:33864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33864*FLEN/8, x4, x1, x2) - -inst_11289: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ffc000; valaddr_reg:x3; val_offset:33867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33867*FLEN/8, x4, x1, x2) - -inst_11290: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ffe000; valaddr_reg:x3; val_offset:33870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33870*FLEN/8, x4, x1, x2) - -inst_11291: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fff000; valaddr_reg:x3; val_offset:33873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33873*FLEN/8, x4, x1, x2) - -inst_11292: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fff800; valaddr_reg:x3; val_offset:33876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33876*FLEN/8, x4, x1, x2) - -inst_11293: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fffc00; valaddr_reg:x3; val_offset:33879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33879*FLEN/8, x4, x1, x2) - -inst_11294: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fffe00; valaddr_reg:x3; val_offset:33882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33882*FLEN/8, x4, x1, x2) - -inst_11295: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ffff00; valaddr_reg:x3; val_offset:33885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33885*FLEN/8, x4, x1, x2) - -inst_11296: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ffff80; valaddr_reg:x3; val_offset:33888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33888*FLEN/8, x4, x1, x2) - -inst_11297: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ffffc0; valaddr_reg:x3; val_offset:33891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33891*FLEN/8, x4, x1, x2) - -inst_11298: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ffffe0; valaddr_reg:x3; val_offset:33894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33894*FLEN/8, x4, x1, x2) - -inst_11299: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fffff0; valaddr_reg:x3; val_offset:33897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33897*FLEN/8, x4, x1, x2) - -inst_11300: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fffff8; valaddr_reg:x3; val_offset:33900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33900*FLEN/8, x4, x1, x2) - -inst_11301: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fffffc; valaddr_reg:x3; val_offset:33903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33903*FLEN/8, x4, x1, x2) - -inst_11302: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84fffffe; valaddr_reg:x3; val_offset:33906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33906*FLEN/8, x4, x1, x2) - -inst_11303: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; -op3val:0x84ffffff; valaddr_reg:x3; val_offset:33909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33909*FLEN/8, x4, x1, x2) - -inst_11304: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd800000; valaddr_reg:x3; val_offset:33912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33912*FLEN/8, x4, x1, x2) - -inst_11305: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd800001; valaddr_reg:x3; val_offset:33915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33915*FLEN/8, x4, x1, x2) - -inst_11306: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd800003; valaddr_reg:x3; val_offset:33918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33918*FLEN/8, x4, x1, x2) - -inst_11307: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd800007; valaddr_reg:x3; val_offset:33921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33921*FLEN/8, x4, x1, x2) - -inst_11308: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd80000f; valaddr_reg:x3; val_offset:33924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33924*FLEN/8, x4, x1, x2) - -inst_11309: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd80001f; valaddr_reg:x3; val_offset:33927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33927*FLEN/8, x4, x1, x2) - -inst_11310: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd80003f; valaddr_reg:x3; val_offset:33930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33930*FLEN/8, x4, x1, x2) - -inst_11311: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd80007f; valaddr_reg:x3; val_offset:33933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33933*FLEN/8, x4, x1, x2) - -inst_11312: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd8000ff; valaddr_reg:x3; val_offset:33936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33936*FLEN/8, x4, x1, x2) - -inst_11313: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd8001ff; valaddr_reg:x3; val_offset:33939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33939*FLEN/8, x4, x1, x2) - -inst_11314: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd8003ff; valaddr_reg:x3; val_offset:33942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33942*FLEN/8, x4, x1, x2) - -inst_11315: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd8007ff; valaddr_reg:x3; val_offset:33945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33945*FLEN/8, x4, x1, x2) - -inst_11316: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd800fff; valaddr_reg:x3; val_offset:33948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33948*FLEN/8, x4, x1, x2) - -inst_11317: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd801fff; valaddr_reg:x3; val_offset:33951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33951*FLEN/8, x4, x1, x2) - -inst_11318: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd803fff; valaddr_reg:x3; val_offset:33954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33954*FLEN/8, x4, x1, x2) - -inst_11319: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd807fff; valaddr_reg:x3; val_offset:33957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33957*FLEN/8, x4, x1, x2) - -inst_11320: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd80ffff; valaddr_reg:x3; val_offset:33960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33960*FLEN/8, x4, x1, x2) - -inst_11321: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd81ffff; valaddr_reg:x3; val_offset:33963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33963*FLEN/8, x4, x1, x2) - -inst_11322: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd83ffff; valaddr_reg:x3; val_offset:33966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33966*FLEN/8, x4, x1, x2) - -inst_11323: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd87ffff; valaddr_reg:x3; val_offset:33969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33969*FLEN/8, x4, x1, x2) - -inst_11324: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd8fffff; valaddr_reg:x3; val_offset:33972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33972*FLEN/8, x4, x1, x2) - -inst_11325: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfd9fffff; valaddr_reg:x3; val_offset:33975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33975*FLEN/8, x4, x1, x2) - -inst_11326: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdbfffff; valaddr_reg:x3; val_offset:33978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33978*FLEN/8, x4, x1, x2) - -inst_11327: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdc00000; valaddr_reg:x3; val_offset:33981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33981*FLEN/8, x4, x1, x2) - -inst_11328: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfde00000; valaddr_reg:x3; val_offset:33984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33984*FLEN/8, x4, x1, x2) - -inst_11329: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdf00000; valaddr_reg:x3; val_offset:33987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33987*FLEN/8, x4, x1, x2) - -inst_11330: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdf80000; valaddr_reg:x3; val_offset:33990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33990*FLEN/8, x4, x1, x2) - -inst_11331: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfc0000; valaddr_reg:x3; val_offset:33993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33993*FLEN/8, x4, x1, x2) - -inst_11332: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfe0000; valaddr_reg:x3; val_offset:33996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33996*FLEN/8, x4, x1, x2) - -inst_11333: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdff0000; valaddr_reg:x3; val_offset:33999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33999*FLEN/8, x4, x1, x2) - -inst_11334: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdff8000; valaddr_reg:x3; val_offset:34002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34002*FLEN/8, x4, x1, x2) - -inst_11335: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdffc000; valaddr_reg:x3; val_offset:34005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34005*FLEN/8, x4, x1, x2) - -inst_11336: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdffe000; valaddr_reg:x3; val_offset:34008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34008*FLEN/8, x4, x1, x2) - -inst_11337: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfff000; valaddr_reg:x3; val_offset:34011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34011*FLEN/8, x4, x1, x2) - -inst_11338: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfff800; valaddr_reg:x3; val_offset:34014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34014*FLEN/8, x4, x1, x2) - -inst_11339: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfffc00; valaddr_reg:x3; val_offset:34017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34017*FLEN/8, x4, x1, x2) - -inst_11340: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfffe00; valaddr_reg:x3; val_offset:34020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34020*FLEN/8, x4, x1, x2) - -inst_11341: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdffff00; valaddr_reg:x3; val_offset:34023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34023*FLEN/8, x4, x1, x2) - -inst_11342: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdffff80; valaddr_reg:x3; val_offset:34026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34026*FLEN/8, x4, x1, x2) - -inst_11343: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdffffc0; valaddr_reg:x3; val_offset:34029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34029*FLEN/8, x4, x1, x2) - -inst_11344: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdffffe0; valaddr_reg:x3; val_offset:34032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34032*FLEN/8, x4, x1, x2) - -inst_11345: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfffff0; valaddr_reg:x3; val_offset:34035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34035*FLEN/8, x4, x1, x2) - -inst_11346: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfffff8; valaddr_reg:x3; val_offset:34038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34038*FLEN/8, x4, x1, x2) - -inst_11347: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfffffc; valaddr_reg:x3; val_offset:34041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34041*FLEN/8, x4, x1, x2) - -inst_11348: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdfffffe; valaddr_reg:x3; val_offset:34044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34044*FLEN/8, x4, x1, x2) - -inst_11349: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xfdffffff; valaddr_reg:x3; val_offset:34047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34047*FLEN/8, x4, x1, x2) - -inst_11350: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff000001; valaddr_reg:x3; val_offset:34050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34050*FLEN/8, x4, x1, x2) - -inst_11351: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff000003; valaddr_reg:x3; val_offset:34053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34053*FLEN/8, x4, x1, x2) - -inst_11352: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff000007; valaddr_reg:x3; val_offset:34056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34056*FLEN/8, x4, x1, x2) - -inst_11353: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff199999; valaddr_reg:x3; val_offset:34059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34059*FLEN/8, x4, x1, x2) - -inst_11354: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff249249; valaddr_reg:x3; val_offset:34062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34062*FLEN/8, x4, x1, x2) - -inst_11355: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff333333; valaddr_reg:x3; val_offset:34065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34065*FLEN/8, x4, x1, x2) - -inst_11356: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:34068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34068*FLEN/8, x4, x1, x2) - -inst_11357: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:34071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34071*FLEN/8, x4, x1, x2) - -inst_11358: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff444444; valaddr_reg:x3; val_offset:34074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34074*FLEN/8, x4, x1, x2) - -inst_11359: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:34077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34077*FLEN/8, x4, x1, x2) - -inst_11360: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:34080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34080*FLEN/8, x4, x1, x2) - -inst_11361: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff666666; valaddr_reg:x3; val_offset:34083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34083*FLEN/8, x4, x1, x2) - -inst_11362: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:34086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34086*FLEN/8, x4, x1, x2) - -inst_11363: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:34089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34089*FLEN/8, x4, x1, x2) - -inst_11364: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:34092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34092*FLEN/8, x4, x1, x2) - -inst_11365: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:34095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34095*FLEN/8, x4, x1, x2) - -inst_11366: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:34098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34098*FLEN/8, x4, x1, x2) - -inst_11367: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:34101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34101*FLEN/8, x4, x1, x2) - -inst_11368: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:34104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34104*FLEN/8, x4, x1, x2) - -inst_11369: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:34107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34107*FLEN/8, x4, x1, x2) - -inst_11370: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:34110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34110*FLEN/8, x4, x1, x2) - -inst_11371: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:34113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34113*FLEN/8, x4, x1, x2) - -inst_11372: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:34116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34116*FLEN/8, x4, x1, x2) - -inst_11373: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:34119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34119*FLEN/8, x4, x1, x2) - -inst_11374: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:34122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34122*FLEN/8, x4, x1, x2) - -inst_11375: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:34125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34125*FLEN/8, x4, x1, x2) - -inst_11376: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:34128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34128*FLEN/8, x4, x1, x2) - -inst_11377: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:34131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34131*FLEN/8, x4, x1, x2) - -inst_11378: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:34134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34134*FLEN/8, x4, x1, x2) - -inst_11379: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:34137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34137*FLEN/8, x4, x1, x2) - -inst_11380: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:34140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34140*FLEN/8, x4, x1, x2) - -inst_11381: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:34143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34143*FLEN/8, x4, x1, x2) - -inst_11382: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80800000; valaddr_reg:x3; val_offset:34146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34146*FLEN/8, x4, x1, x2) - -inst_11383: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:34149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34149*FLEN/8, x4, x1, x2) - -inst_11384: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:34152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34152*FLEN/8, x4, x1, x2) - -inst_11385: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:34155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34155*FLEN/8, x4, x1, x2) - -inst_11386: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8080000f; valaddr_reg:x3; val_offset:34158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34158*FLEN/8, x4, x1, x2) - -inst_11387: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8080001f; valaddr_reg:x3; val_offset:34161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34161*FLEN/8, x4, x1, x2) - -inst_11388: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8080003f; valaddr_reg:x3; val_offset:34164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34164*FLEN/8, x4, x1, x2) - -inst_11389: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8080007f; valaddr_reg:x3; val_offset:34167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34167*FLEN/8, x4, x1, x2) - -inst_11390: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x808000ff; valaddr_reg:x3; val_offset:34170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34170*FLEN/8, x4, x1, x2) - -inst_11391: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x808001ff; valaddr_reg:x3; val_offset:34173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34173*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_90) - -inst_11392: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x808003ff; valaddr_reg:x3; val_offset:34176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34176*FLEN/8, x4, x1, x2) - -inst_11393: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x808007ff; valaddr_reg:x3; val_offset:34179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34179*FLEN/8, x4, x1, x2) - -inst_11394: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80800fff; valaddr_reg:x3; val_offset:34182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34182*FLEN/8, x4, x1, x2) - -inst_11395: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80801fff; valaddr_reg:x3; val_offset:34185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34185*FLEN/8, x4, x1, x2) - -inst_11396: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80803fff; valaddr_reg:x3; val_offset:34188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34188*FLEN/8, x4, x1, x2) - -inst_11397: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80807fff; valaddr_reg:x3; val_offset:34191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34191*FLEN/8, x4, x1, x2) - -inst_11398: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8080ffff; valaddr_reg:x3; val_offset:34194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34194*FLEN/8, x4, x1, x2) - -inst_11399: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8081ffff; valaddr_reg:x3; val_offset:34197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34197*FLEN/8, x4, x1, x2) - -inst_11400: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8083ffff; valaddr_reg:x3; val_offset:34200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34200*FLEN/8, x4, x1, x2) - -inst_11401: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x8087ffff; valaddr_reg:x3; val_offset:34203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34203*FLEN/8, x4, x1, x2) - -inst_11402: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x808fffff; valaddr_reg:x3; val_offset:34206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34206*FLEN/8, x4, x1, x2) - -inst_11403: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x809fffff; valaddr_reg:x3; val_offset:34209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34209*FLEN/8, x4, x1, x2) - -inst_11404: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80bfffff; valaddr_reg:x3; val_offset:34212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34212*FLEN/8, x4, x1, x2) - -inst_11405: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80c00000; valaddr_reg:x3; val_offset:34215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34215*FLEN/8, x4, x1, x2) - -inst_11406: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80e00000; valaddr_reg:x3; val_offset:34218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34218*FLEN/8, x4, x1, x2) - -inst_11407: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80f00000; valaddr_reg:x3; val_offset:34221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34221*FLEN/8, x4, x1, x2) - -inst_11408: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80f80000; valaddr_reg:x3; val_offset:34224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34224*FLEN/8, x4, x1, x2) - -inst_11409: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fc0000; valaddr_reg:x3; val_offset:34227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34227*FLEN/8, x4, x1, x2) - -inst_11410: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fe0000; valaddr_reg:x3; val_offset:34230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34230*FLEN/8, x4, x1, x2) - -inst_11411: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ff0000; valaddr_reg:x3; val_offset:34233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34233*FLEN/8, x4, x1, x2) - -inst_11412: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ff8000; valaddr_reg:x3; val_offset:34236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34236*FLEN/8, x4, x1, x2) - -inst_11413: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ffc000; valaddr_reg:x3; val_offset:34239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34239*FLEN/8, x4, x1, x2) - -inst_11414: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ffe000; valaddr_reg:x3; val_offset:34242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34242*FLEN/8, x4, x1, x2) - -inst_11415: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fff000; valaddr_reg:x3; val_offset:34245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34245*FLEN/8, x4, x1, x2) - -inst_11416: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fff800; valaddr_reg:x3; val_offset:34248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34248*FLEN/8, x4, x1, x2) - -inst_11417: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fffc00; valaddr_reg:x3; val_offset:34251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34251*FLEN/8, x4, x1, x2) - -inst_11418: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fffe00; valaddr_reg:x3; val_offset:34254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34254*FLEN/8, x4, x1, x2) - -inst_11419: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ffff00; valaddr_reg:x3; val_offset:34257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34257*FLEN/8, x4, x1, x2) - -inst_11420: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ffff80; valaddr_reg:x3; val_offset:34260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34260*FLEN/8, x4, x1, x2) - -inst_11421: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ffffc0; valaddr_reg:x3; val_offset:34263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34263*FLEN/8, x4, x1, x2) - -inst_11422: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ffffe0; valaddr_reg:x3; val_offset:34266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34266*FLEN/8, x4, x1, x2) - -inst_11423: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fffff0; valaddr_reg:x3; val_offset:34269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34269*FLEN/8, x4, x1, x2) - -inst_11424: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:34272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34272*FLEN/8, x4, x1, x2) - -inst_11425: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:34275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34275*FLEN/8, x4, x1, x2) - -inst_11426: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:34278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34278*FLEN/8, x4, x1, x2) - -inst_11427: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; -op3val:0x80ffffff; valaddr_reg:x3; val_offset:34281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34281*FLEN/8, x4, x1, x2) - -inst_11428: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:34284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34284*FLEN/8, x4, x1, x2) - -inst_11429: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:34287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34287*FLEN/8, x4, x1, x2) - -inst_11430: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:34290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34290*FLEN/8, x4, x1, x2) - -inst_11431: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:34293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34293*FLEN/8, x4, x1, x2) - -inst_11432: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:34296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34296*FLEN/8, x4, x1, x2) - -inst_11433: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:34299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34299*FLEN/8, x4, x1, x2) - -inst_11434: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:34302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34302*FLEN/8, x4, x1, x2) - -inst_11435: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:34305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34305*FLEN/8, x4, x1, x2) - -inst_11436: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:34308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34308*FLEN/8, x4, x1, x2) - -inst_11437: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:34311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34311*FLEN/8, x4, x1, x2) - -inst_11438: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:34314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34314*FLEN/8, x4, x1, x2) - -inst_11439: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:34317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34317*FLEN/8, x4, x1, x2) - -inst_11440: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:34320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34320*FLEN/8, x4, x1, x2) - -inst_11441: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:34323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34323*FLEN/8, x4, x1, x2) - -inst_11442: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:34326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34326*FLEN/8, x4, x1, x2) - -inst_11443: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:34329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34329*FLEN/8, x4, x1, x2) - -inst_11444: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f800000; valaddr_reg:x3; val_offset:34332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34332*FLEN/8, x4, x1, x2) - -inst_11445: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f800001; valaddr_reg:x3; val_offset:34335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34335*FLEN/8, x4, x1, x2) - -inst_11446: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f800003; valaddr_reg:x3; val_offset:34338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34338*FLEN/8, x4, x1, x2) - -inst_11447: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f800007; valaddr_reg:x3; val_offset:34341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34341*FLEN/8, x4, x1, x2) - -inst_11448: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f80000f; valaddr_reg:x3; val_offset:34344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34344*FLEN/8, x4, x1, x2) - -inst_11449: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f80001f; valaddr_reg:x3; val_offset:34347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34347*FLEN/8, x4, x1, x2) - -inst_11450: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f80003f; valaddr_reg:x3; val_offset:34350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34350*FLEN/8, x4, x1, x2) - -inst_11451: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f80007f; valaddr_reg:x3; val_offset:34353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34353*FLEN/8, x4, x1, x2) - -inst_11452: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f8000ff; valaddr_reg:x3; val_offset:34356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34356*FLEN/8, x4, x1, x2) - -inst_11453: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f8001ff; valaddr_reg:x3; val_offset:34359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34359*FLEN/8, x4, x1, x2) - -inst_11454: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f8003ff; valaddr_reg:x3; val_offset:34362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34362*FLEN/8, x4, x1, x2) - -inst_11455: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f8007ff; valaddr_reg:x3; val_offset:34365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34365*FLEN/8, x4, x1, x2) - -inst_11456: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f800fff; valaddr_reg:x3; val_offset:34368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34368*FLEN/8, x4, x1, x2) - -inst_11457: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f801fff; valaddr_reg:x3; val_offset:34371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34371*FLEN/8, x4, x1, x2) - -inst_11458: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f803fff; valaddr_reg:x3; val_offset:34374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34374*FLEN/8, x4, x1, x2) - -inst_11459: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f807fff; valaddr_reg:x3; val_offset:34377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34377*FLEN/8, x4, x1, x2) - -inst_11460: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f80ffff; valaddr_reg:x3; val_offset:34380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34380*FLEN/8, x4, x1, x2) - -inst_11461: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f81ffff; valaddr_reg:x3; val_offset:34383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34383*FLEN/8, x4, x1, x2) - -inst_11462: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f83ffff; valaddr_reg:x3; val_offset:34386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34386*FLEN/8, x4, x1, x2) - -inst_11463: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f87ffff; valaddr_reg:x3; val_offset:34389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34389*FLEN/8, x4, x1, x2) - -inst_11464: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f8fffff; valaddr_reg:x3; val_offset:34392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34392*FLEN/8, x4, x1, x2) - -inst_11465: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8f9fffff; valaddr_reg:x3; val_offset:34395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34395*FLEN/8, x4, x1, x2) - -inst_11466: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fbfffff; valaddr_reg:x3; val_offset:34398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34398*FLEN/8, x4, x1, x2) - -inst_11467: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fc00000; valaddr_reg:x3; val_offset:34401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34401*FLEN/8, x4, x1, x2) - -inst_11468: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fe00000; valaddr_reg:x3; val_offset:34404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34404*FLEN/8, x4, x1, x2) - -inst_11469: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ff00000; valaddr_reg:x3; val_offset:34407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34407*FLEN/8, x4, x1, x2) - -inst_11470: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ff80000; valaddr_reg:x3; val_offset:34410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34410*FLEN/8, x4, x1, x2) - -inst_11471: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffc0000; valaddr_reg:x3; val_offset:34413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34413*FLEN/8, x4, x1, x2) - -inst_11472: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffe0000; valaddr_reg:x3; val_offset:34416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34416*FLEN/8, x4, x1, x2) - -inst_11473: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fff0000; valaddr_reg:x3; val_offset:34419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34419*FLEN/8, x4, x1, x2) - -inst_11474: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fff8000; valaddr_reg:x3; val_offset:34422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34422*FLEN/8, x4, x1, x2) - -inst_11475: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fffc000; valaddr_reg:x3; val_offset:34425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34425*FLEN/8, x4, x1, x2) - -inst_11476: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fffe000; valaddr_reg:x3; val_offset:34428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34428*FLEN/8, x4, x1, x2) - -inst_11477: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffff000; valaddr_reg:x3; val_offset:34431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34431*FLEN/8, x4, x1, x2) - -inst_11478: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffff800; valaddr_reg:x3; val_offset:34434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34434*FLEN/8, x4, x1, x2) - -inst_11479: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffffc00; valaddr_reg:x3; val_offset:34437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34437*FLEN/8, x4, x1, x2) - -inst_11480: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffffe00; valaddr_reg:x3; val_offset:34440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34440*FLEN/8, x4, x1, x2) - -inst_11481: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fffff00; valaddr_reg:x3; val_offset:34443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34443*FLEN/8, x4, x1, x2) - -inst_11482: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fffff80; valaddr_reg:x3; val_offset:34446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34446*FLEN/8, x4, x1, x2) - -inst_11483: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fffffc0; valaddr_reg:x3; val_offset:34449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34449*FLEN/8, x4, x1, x2) - -inst_11484: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fffffe0; valaddr_reg:x3; val_offset:34452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34452*FLEN/8, x4, x1, x2) - -inst_11485: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffffff0; valaddr_reg:x3; val_offset:34455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34455*FLEN/8, x4, x1, x2) - -inst_11486: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffffff8; valaddr_reg:x3; val_offset:34458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34458*FLEN/8, x4, x1, x2) - -inst_11487: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffffffc; valaddr_reg:x3; val_offset:34461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34461*FLEN/8, x4, x1, x2) - -inst_11488: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8ffffffe; valaddr_reg:x3; val_offset:34464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34464*FLEN/8, x4, x1, x2) - -inst_11489: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; -op3val:0x8fffffff; valaddr_reg:x3; val_offset:34467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34467*FLEN/8, x4, x1, x2) - -inst_11490: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbf800001; valaddr_reg:x3; val_offset:34470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34470*FLEN/8, x4, x1, x2) - -inst_11491: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbf800003; valaddr_reg:x3; val_offset:34473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34473*FLEN/8, x4, x1, x2) - -inst_11492: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbf800007; valaddr_reg:x3; val_offset:34476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34476*FLEN/8, x4, x1, x2) - -inst_11493: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbf999999; valaddr_reg:x3; val_offset:34479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34479*FLEN/8, x4, x1, x2) - -inst_11494: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:34482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34482*FLEN/8, x4, x1, x2) - -inst_11495: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:34485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34485*FLEN/8, x4, x1, x2) - -inst_11496: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:34488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34488*FLEN/8, x4, x1, x2) - -inst_11497: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:34491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34491*FLEN/8, x4, x1, x2) - -inst_11498: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:34494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34494*FLEN/8, x4, x1, x2) - -inst_11499: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:34497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34497*FLEN/8, x4, x1, x2) - -inst_11500: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:34500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34500*FLEN/8, x4, x1, x2) - -inst_11501: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:34503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34503*FLEN/8, x4, x1, x2) - -inst_11502: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:34506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34506*FLEN/8, x4, x1, x2) - -inst_11503: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:34509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34509*FLEN/8, x4, x1, x2) - -inst_11504: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:34512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34512*FLEN/8, x4, x1, x2) - -inst_11505: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:34515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34515*FLEN/8, x4, x1, x2) - -inst_11506: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc000000; valaddr_reg:x3; val_offset:34518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34518*FLEN/8, x4, x1, x2) - -inst_11507: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc000001; valaddr_reg:x3; val_offset:34521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34521*FLEN/8, x4, x1, x2) - -inst_11508: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc000003; valaddr_reg:x3; val_offset:34524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34524*FLEN/8, x4, x1, x2) - -inst_11509: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc000007; valaddr_reg:x3; val_offset:34527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34527*FLEN/8, x4, x1, x2) - -inst_11510: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc00000f; valaddr_reg:x3; val_offset:34530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34530*FLEN/8, x4, x1, x2) - -inst_11511: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc00001f; valaddr_reg:x3; val_offset:34533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34533*FLEN/8, x4, x1, x2) - -inst_11512: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc00003f; valaddr_reg:x3; val_offset:34536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34536*FLEN/8, x4, x1, x2) - -inst_11513: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc00007f; valaddr_reg:x3; val_offset:34539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34539*FLEN/8, x4, x1, x2) - -inst_11514: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc0000ff; valaddr_reg:x3; val_offset:34542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34542*FLEN/8, x4, x1, x2) - -inst_11515: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc0001ff; valaddr_reg:x3; val_offset:34545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34545*FLEN/8, x4, x1, x2) - -inst_11516: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc0003ff; valaddr_reg:x3; val_offset:34548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34548*FLEN/8, x4, x1, x2) - -inst_11517: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc0007ff; valaddr_reg:x3; val_offset:34551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34551*FLEN/8, x4, x1, x2) - -inst_11518: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc000fff; valaddr_reg:x3; val_offset:34554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34554*FLEN/8, x4, x1, x2) - -inst_11519: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc001fff; valaddr_reg:x3; val_offset:34557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34557*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_91) - -inst_11520: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc003fff; valaddr_reg:x3; val_offset:34560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34560*FLEN/8, x4, x1, x2) - -inst_11521: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc007fff; valaddr_reg:x3; val_offset:34563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34563*FLEN/8, x4, x1, x2) - -inst_11522: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc00ffff; valaddr_reg:x3; val_offset:34566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34566*FLEN/8, x4, x1, x2) - -inst_11523: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc01ffff; valaddr_reg:x3; val_offset:34569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34569*FLEN/8, x4, x1, x2) - -inst_11524: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc03ffff; valaddr_reg:x3; val_offset:34572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34572*FLEN/8, x4, x1, x2) - -inst_11525: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc07ffff; valaddr_reg:x3; val_offset:34575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34575*FLEN/8, x4, x1, x2) - -inst_11526: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc0fffff; valaddr_reg:x3; val_offset:34578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34578*FLEN/8, x4, x1, x2) - -inst_11527: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc1fffff; valaddr_reg:x3; val_offset:34581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34581*FLEN/8, x4, x1, x2) - -inst_11528: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc3fffff; valaddr_reg:x3; val_offset:34584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34584*FLEN/8, x4, x1, x2) - -inst_11529: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc400000; valaddr_reg:x3; val_offset:34587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34587*FLEN/8, x4, x1, x2) - -inst_11530: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc600000; valaddr_reg:x3; val_offset:34590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34590*FLEN/8, x4, x1, x2) - -inst_11531: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc700000; valaddr_reg:x3; val_offset:34593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34593*FLEN/8, x4, x1, x2) - -inst_11532: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc780000; valaddr_reg:x3; val_offset:34596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34596*FLEN/8, x4, x1, x2) - -inst_11533: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7c0000; valaddr_reg:x3; val_offset:34599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34599*FLEN/8, x4, x1, x2) - -inst_11534: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7e0000; valaddr_reg:x3; val_offset:34602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34602*FLEN/8, x4, x1, x2) - -inst_11535: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7f0000; valaddr_reg:x3; val_offset:34605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34605*FLEN/8, x4, x1, x2) - -inst_11536: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7f8000; valaddr_reg:x3; val_offset:34608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34608*FLEN/8, x4, x1, x2) - -inst_11537: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7fc000; valaddr_reg:x3; val_offset:34611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34611*FLEN/8, x4, x1, x2) - -inst_11538: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7fe000; valaddr_reg:x3; val_offset:34614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34614*FLEN/8, x4, x1, x2) - -inst_11539: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7ff000; valaddr_reg:x3; val_offset:34617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34617*FLEN/8, x4, x1, x2) - -inst_11540: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7ff800; valaddr_reg:x3; val_offset:34620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34620*FLEN/8, x4, x1, x2) - -inst_11541: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7ffc00; valaddr_reg:x3; val_offset:34623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34623*FLEN/8, x4, x1, x2) - -inst_11542: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7ffe00; valaddr_reg:x3; val_offset:34626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34626*FLEN/8, x4, x1, x2) - -inst_11543: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7fff00; valaddr_reg:x3; val_offset:34629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34629*FLEN/8, x4, x1, x2) - -inst_11544: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7fff80; valaddr_reg:x3; val_offset:34632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34632*FLEN/8, x4, x1, x2) - -inst_11545: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7fffc0; valaddr_reg:x3; val_offset:34635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34635*FLEN/8, x4, x1, x2) - -inst_11546: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7fffe0; valaddr_reg:x3; val_offset:34638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34638*FLEN/8, x4, x1, x2) - -inst_11547: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7ffff0; valaddr_reg:x3; val_offset:34641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34641*FLEN/8, x4, x1, x2) - -inst_11548: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7ffff8; valaddr_reg:x3; val_offset:34644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34644*FLEN/8, x4, x1, x2) - -inst_11549: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7ffffc; valaddr_reg:x3; val_offset:34647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34647*FLEN/8, x4, x1, x2) - -inst_11550: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7ffffe; valaddr_reg:x3; val_offset:34650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34650*FLEN/8, x4, x1, x2) - -inst_11551: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; -op3val:0xcc7fffff; valaddr_reg:x3; val_offset:34653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34653*FLEN/8, x4, x1, x2) - -inst_11552: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69000000; valaddr_reg:x3; val_offset:34656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34656*FLEN/8, x4, x1, x2) - -inst_11553: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69000001; valaddr_reg:x3; val_offset:34659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34659*FLEN/8, x4, x1, x2) - -inst_11554: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69000003; valaddr_reg:x3; val_offset:34662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34662*FLEN/8, x4, x1, x2) - -inst_11555: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69000007; valaddr_reg:x3; val_offset:34665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34665*FLEN/8, x4, x1, x2) - -inst_11556: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x6900000f; valaddr_reg:x3; val_offset:34668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34668*FLEN/8, x4, x1, x2) - -inst_11557: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x6900001f; valaddr_reg:x3; val_offset:34671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34671*FLEN/8, x4, x1, x2) - -inst_11558: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x6900003f; valaddr_reg:x3; val_offset:34674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34674*FLEN/8, x4, x1, x2) - -inst_11559: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x6900007f; valaddr_reg:x3; val_offset:34677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34677*FLEN/8, x4, x1, x2) - -inst_11560: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x690000ff; valaddr_reg:x3; val_offset:34680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34680*FLEN/8, x4, x1, x2) - -inst_11561: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x690001ff; valaddr_reg:x3; val_offset:34683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34683*FLEN/8, x4, x1, x2) - -inst_11562: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x690003ff; valaddr_reg:x3; val_offset:34686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34686*FLEN/8, x4, x1, x2) - -inst_11563: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x690007ff; valaddr_reg:x3; val_offset:34689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34689*FLEN/8, x4, x1, x2) - -inst_11564: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69000fff; valaddr_reg:x3; val_offset:34692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34692*FLEN/8, x4, x1, x2) - -inst_11565: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69001fff; valaddr_reg:x3; val_offset:34695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34695*FLEN/8, x4, x1, x2) - -inst_11566: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69003fff; valaddr_reg:x3; val_offset:34698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34698*FLEN/8, x4, x1, x2) - -inst_11567: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69007fff; valaddr_reg:x3; val_offset:34701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34701*FLEN/8, x4, x1, x2) - -inst_11568: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x6900ffff; valaddr_reg:x3; val_offset:34704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34704*FLEN/8, x4, x1, x2) - -inst_11569: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x6901ffff; valaddr_reg:x3; val_offset:34707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34707*FLEN/8, x4, x1, x2) - -inst_11570: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x6903ffff; valaddr_reg:x3; val_offset:34710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34710*FLEN/8, x4, x1, x2) - -inst_11571: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x6907ffff; valaddr_reg:x3; val_offset:34713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34713*FLEN/8, x4, x1, x2) - -inst_11572: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x690fffff; valaddr_reg:x3; val_offset:34716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34716*FLEN/8, x4, x1, x2) - -inst_11573: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x691fffff; valaddr_reg:x3; val_offset:34719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34719*FLEN/8, x4, x1, x2) - -inst_11574: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x693fffff; valaddr_reg:x3; val_offset:34722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34722*FLEN/8, x4, x1, x2) - -inst_11575: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69400000; valaddr_reg:x3; val_offset:34725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34725*FLEN/8, x4, x1, x2) - -inst_11576: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69600000; valaddr_reg:x3; val_offset:34728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34728*FLEN/8, x4, x1, x2) - -inst_11577: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69700000; valaddr_reg:x3; val_offset:34731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34731*FLEN/8, x4, x1, x2) - -inst_11578: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x69780000; valaddr_reg:x3; val_offset:34734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34734*FLEN/8, x4, x1, x2) - -inst_11579: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697c0000; valaddr_reg:x3; val_offset:34737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34737*FLEN/8, x4, x1, x2) - -inst_11580: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697e0000; valaddr_reg:x3; val_offset:34740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34740*FLEN/8, x4, x1, x2) - -inst_11581: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697f0000; valaddr_reg:x3; val_offset:34743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34743*FLEN/8, x4, x1, x2) - -inst_11582: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697f8000; valaddr_reg:x3; val_offset:34746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34746*FLEN/8, x4, x1, x2) - -inst_11583: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697fc000; valaddr_reg:x3; val_offset:34749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34749*FLEN/8, x4, x1, x2) - -inst_11584: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697fe000; valaddr_reg:x3; val_offset:34752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34752*FLEN/8, x4, x1, x2) - -inst_11585: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697ff000; valaddr_reg:x3; val_offset:34755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34755*FLEN/8, x4, x1, x2) - -inst_11586: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697ff800; valaddr_reg:x3; val_offset:34758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34758*FLEN/8, x4, x1, x2) - -inst_11587: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697ffc00; valaddr_reg:x3; val_offset:34761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34761*FLEN/8, x4, x1, x2) - -inst_11588: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697ffe00; valaddr_reg:x3; val_offset:34764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34764*FLEN/8, x4, x1, x2) - -inst_11589: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697fff00; valaddr_reg:x3; val_offset:34767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34767*FLEN/8, x4, x1, x2) - -inst_11590: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697fff80; valaddr_reg:x3; val_offset:34770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34770*FLEN/8, x4, x1, x2) - -inst_11591: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697fffc0; valaddr_reg:x3; val_offset:34773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34773*FLEN/8, x4, x1, x2) - -inst_11592: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697fffe0; valaddr_reg:x3; val_offset:34776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34776*FLEN/8, x4, x1, x2) - -inst_11593: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697ffff0; valaddr_reg:x3; val_offset:34779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34779*FLEN/8, x4, x1, x2) - -inst_11594: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697ffff8; valaddr_reg:x3; val_offset:34782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34782*FLEN/8, x4, x1, x2) - -inst_11595: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697ffffc; valaddr_reg:x3; val_offset:34785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34785*FLEN/8, x4, x1, x2) - -inst_11596: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697ffffe; valaddr_reg:x3; val_offset:34788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34788*FLEN/8, x4, x1, x2) - -inst_11597: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x697fffff; valaddr_reg:x3; val_offset:34791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34791*FLEN/8, x4, x1, x2) - -inst_11598: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f000001; valaddr_reg:x3; val_offset:34794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34794*FLEN/8, x4, x1, x2) - -inst_11599: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f000003; valaddr_reg:x3; val_offset:34797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34797*FLEN/8, x4, x1, x2) - -inst_11600: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f000007; valaddr_reg:x3; val_offset:34800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34800*FLEN/8, x4, x1, x2) - -inst_11601: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f199999; valaddr_reg:x3; val_offset:34803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34803*FLEN/8, x4, x1, x2) - -inst_11602: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f249249; valaddr_reg:x3; val_offset:34806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34806*FLEN/8, x4, x1, x2) - -inst_11603: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f333333; valaddr_reg:x3; val_offset:34809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34809*FLEN/8, x4, x1, x2) - -inst_11604: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:34812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34812*FLEN/8, x4, x1, x2) - -inst_11605: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:34815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34815*FLEN/8, x4, x1, x2) - -inst_11606: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f444444; valaddr_reg:x3; val_offset:34818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34818*FLEN/8, x4, x1, x2) - -inst_11607: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:34821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34821*FLEN/8, x4, x1, x2) - -inst_11608: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:34824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34824*FLEN/8, x4, x1, x2) - -inst_11609: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f666666; valaddr_reg:x3; val_offset:34827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34827*FLEN/8, x4, x1, x2) - -inst_11610: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:34830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34830*FLEN/8, x4, x1, x2) - -inst_11611: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:34833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34833*FLEN/8, x4, x1, x2) - -inst_11612: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:34836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34836*FLEN/8, x4, x1, x2) - -inst_11613: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:34839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34839*FLEN/8, x4, x1, x2) - -inst_11614: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0000000; valaddr_reg:x3; val_offset:34842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34842*FLEN/8, x4, x1, x2) - -inst_11615: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0000001; valaddr_reg:x3; val_offset:34845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34845*FLEN/8, x4, x1, x2) - -inst_11616: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0000003; valaddr_reg:x3; val_offset:34848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34848*FLEN/8, x4, x1, x2) - -inst_11617: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0000007; valaddr_reg:x3; val_offset:34851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34851*FLEN/8, x4, x1, x2) - -inst_11618: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe000000f; valaddr_reg:x3; val_offset:34854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34854*FLEN/8, x4, x1, x2) - -inst_11619: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe000001f; valaddr_reg:x3; val_offset:34857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34857*FLEN/8, x4, x1, x2) - -inst_11620: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe000003f; valaddr_reg:x3; val_offset:34860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34860*FLEN/8, x4, x1, x2) - -inst_11621: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe000007f; valaddr_reg:x3; val_offset:34863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34863*FLEN/8, x4, x1, x2) - -inst_11622: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe00000ff; valaddr_reg:x3; val_offset:34866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34866*FLEN/8, x4, x1, x2) - -inst_11623: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe00001ff; valaddr_reg:x3; val_offset:34869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34869*FLEN/8, x4, x1, x2) - -inst_11624: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe00003ff; valaddr_reg:x3; val_offset:34872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34872*FLEN/8, x4, x1, x2) - -inst_11625: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe00007ff; valaddr_reg:x3; val_offset:34875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34875*FLEN/8, x4, x1, x2) - -inst_11626: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0000fff; valaddr_reg:x3; val_offset:34878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34878*FLEN/8, x4, x1, x2) - -inst_11627: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0001fff; valaddr_reg:x3; val_offset:34881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34881*FLEN/8, x4, x1, x2) - -inst_11628: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0003fff; valaddr_reg:x3; val_offset:34884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34884*FLEN/8, x4, x1, x2) - -inst_11629: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0007fff; valaddr_reg:x3; val_offset:34887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34887*FLEN/8, x4, x1, x2) - -inst_11630: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe000ffff; valaddr_reg:x3; val_offset:34890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34890*FLEN/8, x4, x1, x2) - -inst_11631: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe001ffff; valaddr_reg:x3; val_offset:34893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34893*FLEN/8, x4, x1, x2) - -inst_11632: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe003ffff; valaddr_reg:x3; val_offset:34896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34896*FLEN/8, x4, x1, x2) - -inst_11633: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe007ffff; valaddr_reg:x3; val_offset:34899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34899*FLEN/8, x4, x1, x2) - -inst_11634: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe00fffff; valaddr_reg:x3; val_offset:34902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34902*FLEN/8, x4, x1, x2) - -inst_11635: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe01fffff; valaddr_reg:x3; val_offset:34905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34905*FLEN/8, x4, x1, x2) - -inst_11636: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe03fffff; valaddr_reg:x3; val_offset:34908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34908*FLEN/8, x4, x1, x2) - -inst_11637: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0400000; valaddr_reg:x3; val_offset:34911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34911*FLEN/8, x4, x1, x2) - -inst_11638: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0600000; valaddr_reg:x3; val_offset:34914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34914*FLEN/8, x4, x1, x2) - -inst_11639: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0700000; valaddr_reg:x3; val_offset:34917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34917*FLEN/8, x4, x1, x2) - -inst_11640: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe0780000; valaddr_reg:x3; val_offset:34920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34920*FLEN/8, x4, x1, x2) - -inst_11641: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07c0000; valaddr_reg:x3; val_offset:34923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34923*FLEN/8, x4, x1, x2) - -inst_11642: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07e0000; valaddr_reg:x3; val_offset:34926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34926*FLEN/8, x4, x1, x2) - -inst_11643: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07f0000; valaddr_reg:x3; val_offset:34929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34929*FLEN/8, x4, x1, x2) - -inst_11644: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07f8000; valaddr_reg:x3; val_offset:34932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34932*FLEN/8, x4, x1, x2) - -inst_11645: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07fc000; valaddr_reg:x3; val_offset:34935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34935*FLEN/8, x4, x1, x2) - -inst_11646: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07fe000; valaddr_reg:x3; val_offset:34938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34938*FLEN/8, x4, x1, x2) - -inst_11647: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07ff000; valaddr_reg:x3; val_offset:34941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34941*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_92) - -inst_11648: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07ff800; valaddr_reg:x3; val_offset:34944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34944*FLEN/8, x4, x1, x2) - -inst_11649: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07ffc00; valaddr_reg:x3; val_offset:34947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34947*FLEN/8, x4, x1, x2) - -inst_11650: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07ffe00; valaddr_reg:x3; val_offset:34950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34950*FLEN/8, x4, x1, x2) - -inst_11651: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07fff00; valaddr_reg:x3; val_offset:34953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34953*FLEN/8, x4, x1, x2) - -inst_11652: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07fff80; valaddr_reg:x3; val_offset:34956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34956*FLEN/8, x4, x1, x2) - -inst_11653: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07fffc0; valaddr_reg:x3; val_offset:34959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34959*FLEN/8, x4, x1, x2) - -inst_11654: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07fffe0; valaddr_reg:x3; val_offset:34962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34962*FLEN/8, x4, x1, x2) - -inst_11655: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07ffff0; valaddr_reg:x3; val_offset:34965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34965*FLEN/8, x4, x1, x2) - -inst_11656: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07ffff8; valaddr_reg:x3; val_offset:34968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34968*FLEN/8, x4, x1, x2) - -inst_11657: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07ffffc; valaddr_reg:x3; val_offset:34971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34971*FLEN/8, x4, x1, x2) - -inst_11658: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07ffffe; valaddr_reg:x3; val_offset:34974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34974*FLEN/8, x4, x1, x2) - -inst_11659: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xe07fffff; valaddr_reg:x3; val_offset:34977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34977*FLEN/8, x4, x1, x2) - -inst_11660: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff000001; valaddr_reg:x3; val_offset:34980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34980*FLEN/8, x4, x1, x2) - -inst_11661: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff000003; valaddr_reg:x3; val_offset:34983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34983*FLEN/8, x4, x1, x2) - -inst_11662: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff000007; valaddr_reg:x3; val_offset:34986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34986*FLEN/8, x4, x1, x2) - -inst_11663: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff199999; valaddr_reg:x3; val_offset:34989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34989*FLEN/8, x4, x1, x2) - -inst_11664: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff249249; valaddr_reg:x3; val_offset:34992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34992*FLEN/8, x4, x1, x2) - -inst_11665: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff333333; valaddr_reg:x3; val_offset:34995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34995*FLEN/8, x4, x1, x2) - -inst_11666: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:34998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34998*FLEN/8, x4, x1, x2) - -inst_11667: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:35001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35001*FLEN/8, x4, x1, x2) - -inst_11668: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff444444; valaddr_reg:x3; val_offset:35004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35004*FLEN/8, x4, x1, x2) - -inst_11669: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:35007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35007*FLEN/8, x4, x1, x2) - -inst_11670: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:35010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35010*FLEN/8, x4, x1, x2) - -inst_11671: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff666666; valaddr_reg:x3; val_offset:35013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35013*FLEN/8, x4, x1, x2) - -inst_11672: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:35016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35016*FLEN/8, x4, x1, x2) - -inst_11673: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:35019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35019*FLEN/8, x4, x1, x2) - -inst_11674: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:35022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35022*FLEN/8, x4, x1, x2) - -inst_11675: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:35025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35025*FLEN/8, x4, x1, x2) - -inst_11676: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:35028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35028*FLEN/8, x4, x1, x2) - -inst_11677: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:35031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35031*FLEN/8, x4, x1, x2) - -inst_11678: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:35034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35034*FLEN/8, x4, x1, x2) - -inst_11679: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:35037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35037*FLEN/8, x4, x1, x2) - -inst_11680: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:35040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35040*FLEN/8, x4, x1, x2) - -inst_11681: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:35043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35043*FLEN/8, x4, x1, x2) - -inst_11682: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:35046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35046*FLEN/8, x4, x1, x2) - -inst_11683: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:35049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35049*FLEN/8, x4, x1, x2) - -inst_11684: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:35052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35052*FLEN/8, x4, x1, x2) - -inst_11685: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:35055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35055*FLEN/8, x4, x1, x2) - -inst_11686: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:35058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35058*FLEN/8, x4, x1, x2) - -inst_11687: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:35061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35061*FLEN/8, x4, x1, x2) - -inst_11688: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:35064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35064*FLEN/8, x4, x1, x2) - -inst_11689: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:35067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35067*FLEN/8, x4, x1, x2) - -inst_11690: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:35070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35070*FLEN/8, x4, x1, x2) - -inst_11691: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:35073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35073*FLEN/8, x4, x1, x2) - -inst_11692: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1800000; valaddr_reg:x3; val_offset:35076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35076*FLEN/8, x4, x1, x2) - -inst_11693: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1800001; valaddr_reg:x3; val_offset:35079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35079*FLEN/8, x4, x1, x2) - -inst_11694: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1800003; valaddr_reg:x3; val_offset:35082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35082*FLEN/8, x4, x1, x2) - -inst_11695: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1800007; valaddr_reg:x3; val_offset:35085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35085*FLEN/8, x4, x1, x2) - -inst_11696: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x180000f; valaddr_reg:x3; val_offset:35088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35088*FLEN/8, x4, x1, x2) - -inst_11697: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x180001f; valaddr_reg:x3; val_offset:35091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35091*FLEN/8, x4, x1, x2) - -inst_11698: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x180003f; valaddr_reg:x3; val_offset:35094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35094*FLEN/8, x4, x1, x2) - -inst_11699: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x180007f; valaddr_reg:x3; val_offset:35097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35097*FLEN/8, x4, x1, x2) - -inst_11700: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x18000ff; valaddr_reg:x3; val_offset:35100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35100*FLEN/8, x4, x1, x2) - -inst_11701: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x18001ff; valaddr_reg:x3; val_offset:35103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35103*FLEN/8, x4, x1, x2) - -inst_11702: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x18003ff; valaddr_reg:x3; val_offset:35106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35106*FLEN/8, x4, x1, x2) - -inst_11703: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x18007ff; valaddr_reg:x3; val_offset:35109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35109*FLEN/8, x4, x1, x2) - -inst_11704: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1800fff; valaddr_reg:x3; val_offset:35112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35112*FLEN/8, x4, x1, x2) - -inst_11705: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1801fff; valaddr_reg:x3; val_offset:35115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35115*FLEN/8, x4, x1, x2) - -inst_11706: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1803fff; valaddr_reg:x3; val_offset:35118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35118*FLEN/8, x4, x1, x2) - -inst_11707: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1807fff; valaddr_reg:x3; val_offset:35121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35121*FLEN/8, x4, x1, x2) - -inst_11708: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x180ffff; valaddr_reg:x3; val_offset:35124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35124*FLEN/8, x4, x1, x2) - -inst_11709: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x181ffff; valaddr_reg:x3; val_offset:35127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35127*FLEN/8, x4, x1, x2) - -inst_11710: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x183ffff; valaddr_reg:x3; val_offset:35130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35130*FLEN/8, x4, x1, x2) - -inst_11711: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x187ffff; valaddr_reg:x3; val_offset:35133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35133*FLEN/8, x4, x1, x2) - -inst_11712: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x18fffff; valaddr_reg:x3; val_offset:35136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35136*FLEN/8, x4, x1, x2) - -inst_11713: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x19fffff; valaddr_reg:x3; val_offset:35139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35139*FLEN/8, x4, x1, x2) - -inst_11714: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1bfffff; valaddr_reg:x3; val_offset:35142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35142*FLEN/8, x4, x1, x2) - -inst_11715: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1c00000; valaddr_reg:x3; val_offset:35145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35145*FLEN/8, x4, x1, x2) - -inst_11716: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1e00000; valaddr_reg:x3; val_offset:35148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35148*FLEN/8, x4, x1, x2) - -inst_11717: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1f00000; valaddr_reg:x3; val_offset:35151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35151*FLEN/8, x4, x1, x2) - -inst_11718: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1f80000; valaddr_reg:x3; val_offset:35154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35154*FLEN/8, x4, x1, x2) - -inst_11719: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fc0000; valaddr_reg:x3; val_offset:35157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35157*FLEN/8, x4, x1, x2) - -inst_11720: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fe0000; valaddr_reg:x3; val_offset:35160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35160*FLEN/8, x4, x1, x2) - -inst_11721: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ff0000; valaddr_reg:x3; val_offset:35163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35163*FLEN/8, x4, x1, x2) - -inst_11722: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ff8000; valaddr_reg:x3; val_offset:35166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35166*FLEN/8, x4, x1, x2) - -inst_11723: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ffc000; valaddr_reg:x3; val_offset:35169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35169*FLEN/8, x4, x1, x2) - -inst_11724: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ffe000; valaddr_reg:x3; val_offset:35172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35172*FLEN/8, x4, x1, x2) - -inst_11725: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fff000; valaddr_reg:x3; val_offset:35175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35175*FLEN/8, x4, x1, x2) - -inst_11726: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fff800; valaddr_reg:x3; val_offset:35178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35178*FLEN/8, x4, x1, x2) - -inst_11727: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fffc00; valaddr_reg:x3; val_offset:35181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35181*FLEN/8, x4, x1, x2) - -inst_11728: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fffe00; valaddr_reg:x3; val_offset:35184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35184*FLEN/8, x4, x1, x2) - -inst_11729: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ffff00; valaddr_reg:x3; val_offset:35187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35187*FLEN/8, x4, x1, x2) - -inst_11730: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ffff80; valaddr_reg:x3; val_offset:35190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35190*FLEN/8, x4, x1, x2) - -inst_11731: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ffffc0; valaddr_reg:x3; val_offset:35193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35193*FLEN/8, x4, x1, x2) - -inst_11732: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ffffe0; valaddr_reg:x3; val_offset:35196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35196*FLEN/8, x4, x1, x2) - -inst_11733: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fffff0; valaddr_reg:x3; val_offset:35199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35199*FLEN/8, x4, x1, x2) - -inst_11734: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fffff8; valaddr_reg:x3; val_offset:35202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35202*FLEN/8, x4, x1, x2) - -inst_11735: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fffffc; valaddr_reg:x3; val_offset:35205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35205*FLEN/8, x4, x1, x2) - -inst_11736: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1fffffe; valaddr_reg:x3; val_offset:35208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35208*FLEN/8, x4, x1, x2) - -inst_11737: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; -op3val:0x1ffffff; valaddr_reg:x3; val_offset:35211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35211*FLEN/8, x4, x1, x2) - -inst_11738: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f800000; valaddr_reg:x3; val_offset:35214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35214*FLEN/8, x4, x1, x2) - -inst_11739: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f800001; valaddr_reg:x3; val_offset:35217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35217*FLEN/8, x4, x1, x2) - -inst_11740: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f800003; valaddr_reg:x3; val_offset:35220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35220*FLEN/8, x4, x1, x2) - -inst_11741: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f800007; valaddr_reg:x3; val_offset:35223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35223*FLEN/8, x4, x1, x2) - -inst_11742: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f80000f; valaddr_reg:x3; val_offset:35226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35226*FLEN/8, x4, x1, x2) - -inst_11743: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f80001f; valaddr_reg:x3; val_offset:35229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35229*FLEN/8, x4, x1, x2) - -inst_11744: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f80003f; valaddr_reg:x3; val_offset:35232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35232*FLEN/8, x4, x1, x2) - -inst_11745: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f80007f; valaddr_reg:x3; val_offset:35235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35235*FLEN/8, x4, x1, x2) - -inst_11746: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f8000ff; valaddr_reg:x3; val_offset:35238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35238*FLEN/8, x4, x1, x2) - -inst_11747: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f8001ff; valaddr_reg:x3; val_offset:35241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35241*FLEN/8, x4, x1, x2) - -inst_11748: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f8003ff; valaddr_reg:x3; val_offset:35244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35244*FLEN/8, x4, x1, x2) - -inst_11749: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f8007ff; valaddr_reg:x3; val_offset:35247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35247*FLEN/8, x4, x1, x2) - -inst_11750: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f800fff; valaddr_reg:x3; val_offset:35250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35250*FLEN/8, x4, x1, x2) - -inst_11751: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f801fff; valaddr_reg:x3; val_offset:35253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35253*FLEN/8, x4, x1, x2) - -inst_11752: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f803fff; valaddr_reg:x3; val_offset:35256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35256*FLEN/8, x4, x1, x2) - -inst_11753: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f807fff; valaddr_reg:x3; val_offset:35259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35259*FLEN/8, x4, x1, x2) - -inst_11754: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f80ffff; valaddr_reg:x3; val_offset:35262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35262*FLEN/8, x4, x1, x2) - -inst_11755: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f81ffff; valaddr_reg:x3; val_offset:35265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35265*FLEN/8, x4, x1, x2) - -inst_11756: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f83ffff; valaddr_reg:x3; val_offset:35268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35268*FLEN/8, x4, x1, x2) - -inst_11757: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f87ffff; valaddr_reg:x3; val_offset:35271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35271*FLEN/8, x4, x1, x2) - -inst_11758: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f8fffff; valaddr_reg:x3; val_offset:35274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35274*FLEN/8, x4, x1, x2) - -inst_11759: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6f9fffff; valaddr_reg:x3; val_offset:35277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35277*FLEN/8, x4, x1, x2) - -inst_11760: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fbfffff; valaddr_reg:x3; val_offset:35280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35280*FLEN/8, x4, x1, x2) - -inst_11761: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fc00000; valaddr_reg:x3; val_offset:35283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35283*FLEN/8, x4, x1, x2) - -inst_11762: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fe00000; valaddr_reg:x3; val_offset:35286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35286*FLEN/8, x4, x1, x2) - -inst_11763: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ff00000; valaddr_reg:x3; val_offset:35289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35289*FLEN/8, x4, x1, x2) - -inst_11764: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ff80000; valaddr_reg:x3; val_offset:35292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35292*FLEN/8, x4, x1, x2) - -inst_11765: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffc0000; valaddr_reg:x3; val_offset:35295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35295*FLEN/8, x4, x1, x2) - -inst_11766: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffe0000; valaddr_reg:x3; val_offset:35298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35298*FLEN/8, x4, x1, x2) - -inst_11767: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fff0000; valaddr_reg:x3; val_offset:35301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35301*FLEN/8, x4, x1, x2) - -inst_11768: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fff8000; valaddr_reg:x3; val_offset:35304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35304*FLEN/8, x4, x1, x2) - -inst_11769: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fffc000; valaddr_reg:x3; val_offset:35307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35307*FLEN/8, x4, x1, x2) - -inst_11770: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fffe000; valaddr_reg:x3; val_offset:35310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35310*FLEN/8, x4, x1, x2) - -inst_11771: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffff000; valaddr_reg:x3; val_offset:35313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35313*FLEN/8, x4, x1, x2) - -inst_11772: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffff800; valaddr_reg:x3; val_offset:35316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35316*FLEN/8, x4, x1, x2) - -inst_11773: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffffc00; valaddr_reg:x3; val_offset:35319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35319*FLEN/8, x4, x1, x2) - -inst_11774: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffffe00; valaddr_reg:x3; val_offset:35322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35322*FLEN/8, x4, x1, x2) - -inst_11775: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fffff00; valaddr_reg:x3; val_offset:35325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35325*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_93) - -inst_11776: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fffff80; valaddr_reg:x3; val_offset:35328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35328*FLEN/8, x4, x1, x2) - -inst_11777: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fffffc0; valaddr_reg:x3; val_offset:35331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35331*FLEN/8, x4, x1, x2) - -inst_11778: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fffffe0; valaddr_reg:x3; val_offset:35334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35334*FLEN/8, x4, x1, x2) - -inst_11779: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffffff0; valaddr_reg:x3; val_offset:35337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35337*FLEN/8, x4, x1, x2) - -inst_11780: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffffff8; valaddr_reg:x3; val_offset:35340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35340*FLEN/8, x4, x1, x2) - -inst_11781: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffffffc; valaddr_reg:x3; val_offset:35343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35343*FLEN/8, x4, x1, x2) - -inst_11782: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6ffffffe; valaddr_reg:x3; val_offset:35346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35346*FLEN/8, x4, x1, x2) - -inst_11783: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x6fffffff; valaddr_reg:x3; val_offset:35349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35349*FLEN/8, x4, x1, x2) - -inst_11784: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f000001; valaddr_reg:x3; val_offset:35352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35352*FLEN/8, x4, x1, x2) - -inst_11785: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f000003; valaddr_reg:x3; val_offset:35355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35355*FLEN/8, x4, x1, x2) - -inst_11786: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f000007; valaddr_reg:x3; val_offset:35358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35358*FLEN/8, x4, x1, x2) - -inst_11787: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f199999; valaddr_reg:x3; val_offset:35361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35361*FLEN/8, x4, x1, x2) - -inst_11788: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f249249; valaddr_reg:x3; val_offset:35364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35364*FLEN/8, x4, x1, x2) - -inst_11789: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f333333; valaddr_reg:x3; val_offset:35367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35367*FLEN/8, x4, x1, x2) - -inst_11790: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:35370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35370*FLEN/8, x4, x1, x2) - -inst_11791: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:35373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35373*FLEN/8, x4, x1, x2) - -inst_11792: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f444444; valaddr_reg:x3; val_offset:35376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35376*FLEN/8, x4, x1, x2) - -inst_11793: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:35379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35379*FLEN/8, x4, x1, x2) - -inst_11794: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:35382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35382*FLEN/8, x4, x1, x2) - -inst_11795: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f666666; valaddr_reg:x3; val_offset:35385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35385*FLEN/8, x4, x1, x2) - -inst_11796: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:35388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35388*FLEN/8, x4, x1, x2) - -inst_11797: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:35391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35391*FLEN/8, x4, x1, x2) - -inst_11798: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:35394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35394*FLEN/8, x4, x1, x2) - -inst_11799: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:35397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35397*FLEN/8, x4, x1, x2) - -inst_11800: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c800000; valaddr_reg:x3; val_offset:35400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35400*FLEN/8, x4, x1, x2) - -inst_11801: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c800001; valaddr_reg:x3; val_offset:35403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35403*FLEN/8, x4, x1, x2) - -inst_11802: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c800003; valaddr_reg:x3; val_offset:35406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35406*FLEN/8, x4, x1, x2) - -inst_11803: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c800007; valaddr_reg:x3; val_offset:35409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35409*FLEN/8, x4, x1, x2) - -inst_11804: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c80000f; valaddr_reg:x3; val_offset:35412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35412*FLEN/8, x4, x1, x2) - -inst_11805: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c80001f; valaddr_reg:x3; val_offset:35415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35415*FLEN/8, x4, x1, x2) - -inst_11806: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c80003f; valaddr_reg:x3; val_offset:35418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35418*FLEN/8, x4, x1, x2) - -inst_11807: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c80007f; valaddr_reg:x3; val_offset:35421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35421*FLEN/8, x4, x1, x2) - -inst_11808: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c8000ff; valaddr_reg:x3; val_offset:35424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35424*FLEN/8, x4, x1, x2) - -inst_11809: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c8001ff; valaddr_reg:x3; val_offset:35427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35427*FLEN/8, x4, x1, x2) - -inst_11810: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c8003ff; valaddr_reg:x3; val_offset:35430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35430*FLEN/8, x4, x1, x2) - -inst_11811: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c8007ff; valaddr_reg:x3; val_offset:35433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35433*FLEN/8, x4, x1, x2) - -inst_11812: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c800fff; valaddr_reg:x3; val_offset:35436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35436*FLEN/8, x4, x1, x2) - -inst_11813: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c801fff; valaddr_reg:x3; val_offset:35439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35439*FLEN/8, x4, x1, x2) - -inst_11814: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c803fff; valaddr_reg:x3; val_offset:35442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35442*FLEN/8, x4, x1, x2) - -inst_11815: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c807fff; valaddr_reg:x3; val_offset:35445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35445*FLEN/8, x4, x1, x2) - -inst_11816: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c80ffff; valaddr_reg:x3; val_offset:35448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35448*FLEN/8, x4, x1, x2) - -inst_11817: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c81ffff; valaddr_reg:x3; val_offset:35451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35451*FLEN/8, x4, x1, x2) - -inst_11818: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c83ffff; valaddr_reg:x3; val_offset:35454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35454*FLEN/8, x4, x1, x2) - -inst_11819: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c87ffff; valaddr_reg:x3; val_offset:35457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35457*FLEN/8, x4, x1, x2) - -inst_11820: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c8fffff; valaddr_reg:x3; val_offset:35460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35460*FLEN/8, x4, x1, x2) - -inst_11821: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7c9fffff; valaddr_reg:x3; val_offset:35463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35463*FLEN/8, x4, x1, x2) - -inst_11822: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cbfffff; valaddr_reg:x3; val_offset:35466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35466*FLEN/8, x4, x1, x2) - -inst_11823: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cc00000; valaddr_reg:x3; val_offset:35469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35469*FLEN/8, x4, x1, x2) - -inst_11824: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7ce00000; valaddr_reg:x3; val_offset:35472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35472*FLEN/8, x4, x1, x2) - -inst_11825: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cf00000; valaddr_reg:x3; val_offset:35475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35475*FLEN/8, x4, x1, x2) - -inst_11826: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cf80000; valaddr_reg:x3; val_offset:35478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35478*FLEN/8, x4, x1, x2) - -inst_11827: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfc0000; valaddr_reg:x3; val_offset:35481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35481*FLEN/8, x4, x1, x2) - -inst_11828: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfe0000; valaddr_reg:x3; val_offset:35484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35484*FLEN/8, x4, x1, x2) - -inst_11829: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cff0000; valaddr_reg:x3; val_offset:35487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35487*FLEN/8, x4, x1, x2) - -inst_11830: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cff8000; valaddr_reg:x3; val_offset:35490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35490*FLEN/8, x4, x1, x2) - -inst_11831: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cffc000; valaddr_reg:x3; val_offset:35493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35493*FLEN/8, x4, x1, x2) - -inst_11832: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cffe000; valaddr_reg:x3; val_offset:35496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35496*FLEN/8, x4, x1, x2) - -inst_11833: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfff000; valaddr_reg:x3; val_offset:35499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35499*FLEN/8, x4, x1, x2) - -inst_11834: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfff800; valaddr_reg:x3; val_offset:35502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35502*FLEN/8, x4, x1, x2) - -inst_11835: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfffc00; valaddr_reg:x3; val_offset:35505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35505*FLEN/8, x4, x1, x2) - -inst_11836: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfffe00; valaddr_reg:x3; val_offset:35508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35508*FLEN/8, x4, x1, x2) - -inst_11837: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cffff00; valaddr_reg:x3; val_offset:35511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35511*FLEN/8, x4, x1, x2) - -inst_11838: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cffff80; valaddr_reg:x3; val_offset:35514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35514*FLEN/8, x4, x1, x2) - -inst_11839: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cffffc0; valaddr_reg:x3; val_offset:35517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35517*FLEN/8, x4, x1, x2) - -inst_11840: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cffffe0; valaddr_reg:x3; val_offset:35520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35520*FLEN/8, x4, x1, x2) - -inst_11841: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfffff0; valaddr_reg:x3; val_offset:35523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35523*FLEN/8, x4, x1, x2) - -inst_11842: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfffff8; valaddr_reg:x3; val_offset:35526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35526*FLEN/8, x4, x1, x2) - -inst_11843: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfffffc; valaddr_reg:x3; val_offset:35529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35529*FLEN/8, x4, x1, x2) - -inst_11844: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cfffffe; valaddr_reg:x3; val_offset:35532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35532*FLEN/8, x4, x1, x2) - -inst_11845: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7cffffff; valaddr_reg:x3; val_offset:35535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35535*FLEN/8, x4, x1, x2) - -inst_11846: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f000001; valaddr_reg:x3; val_offset:35538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35538*FLEN/8, x4, x1, x2) - -inst_11847: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f000003; valaddr_reg:x3; val_offset:35541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35541*FLEN/8, x4, x1, x2) - -inst_11848: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f000007; valaddr_reg:x3; val_offset:35544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35544*FLEN/8, x4, x1, x2) - -inst_11849: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f199999; valaddr_reg:x3; val_offset:35547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35547*FLEN/8, x4, x1, x2) - -inst_11850: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f249249; valaddr_reg:x3; val_offset:35550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35550*FLEN/8, x4, x1, x2) - -inst_11851: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f333333; valaddr_reg:x3; val_offset:35553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35553*FLEN/8, x4, x1, x2) - -inst_11852: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:35556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35556*FLEN/8, x4, x1, x2) - -inst_11853: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:35559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35559*FLEN/8, x4, x1, x2) - -inst_11854: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f444444; valaddr_reg:x3; val_offset:35562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35562*FLEN/8, x4, x1, x2) - -inst_11855: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:35565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35565*FLEN/8, x4, x1, x2) - -inst_11856: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:35568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35568*FLEN/8, x4, x1, x2) - -inst_11857: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f666666; valaddr_reg:x3; val_offset:35571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35571*FLEN/8, x4, x1, x2) - -inst_11858: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:35574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35574*FLEN/8, x4, x1, x2) - -inst_11859: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:35577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35577*FLEN/8, x4, x1, x2) - -inst_11860: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:35580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35580*FLEN/8, x4, x1, x2) - -inst_11861: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:35583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35583*FLEN/8, x4, x1, x2) - -inst_11862: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec000000; valaddr_reg:x3; val_offset:35586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35586*FLEN/8, x4, x1, x2) - -inst_11863: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec000001; valaddr_reg:x3; val_offset:35589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35589*FLEN/8, x4, x1, x2) - -inst_11864: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec000003; valaddr_reg:x3; val_offset:35592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35592*FLEN/8, x4, x1, x2) - -inst_11865: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec000007; valaddr_reg:x3; val_offset:35595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35595*FLEN/8, x4, x1, x2) - -inst_11866: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec00000f; valaddr_reg:x3; val_offset:35598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35598*FLEN/8, x4, x1, x2) - -inst_11867: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec00001f; valaddr_reg:x3; val_offset:35601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35601*FLEN/8, x4, x1, x2) - -inst_11868: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec00003f; valaddr_reg:x3; val_offset:35604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35604*FLEN/8, x4, x1, x2) - -inst_11869: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec00007f; valaddr_reg:x3; val_offset:35607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35607*FLEN/8, x4, x1, x2) - -inst_11870: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec0000ff; valaddr_reg:x3; val_offset:35610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35610*FLEN/8, x4, x1, x2) - -inst_11871: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec0001ff; valaddr_reg:x3; val_offset:35613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35613*FLEN/8, x4, x1, x2) - -inst_11872: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec0003ff; valaddr_reg:x3; val_offset:35616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35616*FLEN/8, x4, x1, x2) - -inst_11873: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec0007ff; valaddr_reg:x3; val_offset:35619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35619*FLEN/8, x4, x1, x2) - -inst_11874: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec000fff; valaddr_reg:x3; val_offset:35622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35622*FLEN/8, x4, x1, x2) - -inst_11875: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec001fff; valaddr_reg:x3; val_offset:35625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35625*FLEN/8, x4, x1, x2) - -inst_11876: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec003fff; valaddr_reg:x3; val_offset:35628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35628*FLEN/8, x4, x1, x2) - -inst_11877: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec007fff; valaddr_reg:x3; val_offset:35631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35631*FLEN/8, x4, x1, x2) - -inst_11878: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec00ffff; valaddr_reg:x3; val_offset:35634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35634*FLEN/8, x4, x1, x2) - -inst_11879: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec01ffff; valaddr_reg:x3; val_offset:35637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35637*FLEN/8, x4, x1, x2) - -inst_11880: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec03ffff; valaddr_reg:x3; val_offset:35640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35640*FLEN/8, x4, x1, x2) - -inst_11881: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec07ffff; valaddr_reg:x3; val_offset:35643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35643*FLEN/8, x4, x1, x2) - -inst_11882: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec0fffff; valaddr_reg:x3; val_offset:35646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35646*FLEN/8, x4, x1, x2) - -inst_11883: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec1fffff; valaddr_reg:x3; val_offset:35649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35649*FLEN/8, x4, x1, x2) - -inst_11884: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec3fffff; valaddr_reg:x3; val_offset:35652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35652*FLEN/8, x4, x1, x2) - -inst_11885: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec400000; valaddr_reg:x3; val_offset:35655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35655*FLEN/8, x4, x1, x2) - -inst_11886: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec600000; valaddr_reg:x3; val_offset:35658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35658*FLEN/8, x4, x1, x2) - -inst_11887: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec700000; valaddr_reg:x3; val_offset:35661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35661*FLEN/8, x4, x1, x2) - -inst_11888: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec780000; valaddr_reg:x3; val_offset:35664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35664*FLEN/8, x4, x1, x2) - -inst_11889: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7c0000; valaddr_reg:x3; val_offset:35667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35667*FLEN/8, x4, x1, x2) - -inst_11890: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7e0000; valaddr_reg:x3; val_offset:35670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35670*FLEN/8, x4, x1, x2) - -inst_11891: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7f0000; valaddr_reg:x3; val_offset:35673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35673*FLEN/8, x4, x1, x2) - -inst_11892: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7f8000; valaddr_reg:x3; val_offset:35676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35676*FLEN/8, x4, x1, x2) - -inst_11893: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7fc000; valaddr_reg:x3; val_offset:35679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35679*FLEN/8, x4, x1, x2) - -inst_11894: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7fe000; valaddr_reg:x3; val_offset:35682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35682*FLEN/8, x4, x1, x2) - -inst_11895: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7ff000; valaddr_reg:x3; val_offset:35685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35685*FLEN/8, x4, x1, x2) - -inst_11896: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7ff800; valaddr_reg:x3; val_offset:35688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35688*FLEN/8, x4, x1, x2) - -inst_11897: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7ffc00; valaddr_reg:x3; val_offset:35691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35691*FLEN/8, x4, x1, x2) - -inst_11898: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7ffe00; valaddr_reg:x3; val_offset:35694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35694*FLEN/8, x4, x1, x2) - -inst_11899: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7fff00; valaddr_reg:x3; val_offset:35697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35697*FLEN/8, x4, x1, x2) - -inst_11900: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7fff80; valaddr_reg:x3; val_offset:35700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35700*FLEN/8, x4, x1, x2) - -inst_11901: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7fffc0; valaddr_reg:x3; val_offset:35703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35703*FLEN/8, x4, x1, x2) - -inst_11902: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7fffe0; valaddr_reg:x3; val_offset:35706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35706*FLEN/8, x4, x1, x2) - -inst_11903: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7ffff0; valaddr_reg:x3; val_offset:35709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35709*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_94) - -inst_11904: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7ffff8; valaddr_reg:x3; val_offset:35712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35712*FLEN/8, x4, x1, x2) - -inst_11905: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7ffffc; valaddr_reg:x3; val_offset:35715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35715*FLEN/8, x4, x1, x2) - -inst_11906: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7ffffe; valaddr_reg:x3; val_offset:35718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35718*FLEN/8, x4, x1, x2) - -inst_11907: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xec7fffff; valaddr_reg:x3; val_offset:35721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35721*FLEN/8, x4, x1, x2) - -inst_11908: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff000001; valaddr_reg:x3; val_offset:35724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35724*FLEN/8, x4, x1, x2) - -inst_11909: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff000003; valaddr_reg:x3; val_offset:35727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35727*FLEN/8, x4, x1, x2) - -inst_11910: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff000007; valaddr_reg:x3; val_offset:35730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35730*FLEN/8, x4, x1, x2) - -inst_11911: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff199999; valaddr_reg:x3; val_offset:35733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35733*FLEN/8, x4, x1, x2) - -inst_11912: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff249249; valaddr_reg:x3; val_offset:35736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35736*FLEN/8, x4, x1, x2) - -inst_11913: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff333333; valaddr_reg:x3; val_offset:35739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35739*FLEN/8, x4, x1, x2) - -inst_11914: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:35742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35742*FLEN/8, x4, x1, x2) - -inst_11915: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:35745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35745*FLEN/8, x4, x1, x2) - -inst_11916: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff444444; valaddr_reg:x3; val_offset:35748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35748*FLEN/8, x4, x1, x2) - -inst_11917: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:35751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35751*FLEN/8, x4, x1, x2) - -inst_11918: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:35754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35754*FLEN/8, x4, x1, x2) - -inst_11919: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff666666; valaddr_reg:x3; val_offset:35757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35757*FLEN/8, x4, x1, x2) - -inst_11920: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:35760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35760*FLEN/8, x4, x1, x2) - -inst_11921: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:35763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35763*FLEN/8, x4, x1, x2) - -inst_11922: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:35766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35766*FLEN/8, x4, x1, x2) - -inst_11923: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:35769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35769*FLEN/8, x4, x1, x2) - -inst_11924: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a800000; valaddr_reg:x3; val_offset:35772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35772*FLEN/8, x4, x1, x2) - -inst_11925: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a800001; valaddr_reg:x3; val_offset:35775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35775*FLEN/8, x4, x1, x2) - -inst_11926: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a800003; valaddr_reg:x3; val_offset:35778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35778*FLEN/8, x4, x1, x2) - -inst_11927: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a800007; valaddr_reg:x3; val_offset:35781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35781*FLEN/8, x4, x1, x2) - -inst_11928: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a80000f; valaddr_reg:x3; val_offset:35784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35784*FLEN/8, x4, x1, x2) - -inst_11929: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a80001f; valaddr_reg:x3; val_offset:35787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35787*FLEN/8, x4, x1, x2) - -inst_11930: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a80003f; valaddr_reg:x3; val_offset:35790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35790*FLEN/8, x4, x1, x2) - -inst_11931: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a80007f; valaddr_reg:x3; val_offset:35793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35793*FLEN/8, x4, x1, x2) - -inst_11932: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a8000ff; valaddr_reg:x3; val_offset:35796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35796*FLEN/8, x4, x1, x2) - -inst_11933: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a8001ff; valaddr_reg:x3; val_offset:35799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35799*FLEN/8, x4, x1, x2) - -inst_11934: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a8003ff; valaddr_reg:x3; val_offset:35802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35802*FLEN/8, x4, x1, x2) - -inst_11935: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a8007ff; valaddr_reg:x3; val_offset:35805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35805*FLEN/8, x4, x1, x2) - -inst_11936: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a800fff; valaddr_reg:x3; val_offset:35808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35808*FLEN/8, x4, x1, x2) - -inst_11937: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a801fff; valaddr_reg:x3; val_offset:35811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35811*FLEN/8, x4, x1, x2) - -inst_11938: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a803fff; valaddr_reg:x3; val_offset:35814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35814*FLEN/8, x4, x1, x2) - -inst_11939: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a807fff; valaddr_reg:x3; val_offset:35817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35817*FLEN/8, x4, x1, x2) - -inst_11940: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a80ffff; valaddr_reg:x3; val_offset:35820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35820*FLEN/8, x4, x1, x2) - -inst_11941: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a81ffff; valaddr_reg:x3; val_offset:35823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35823*FLEN/8, x4, x1, x2) - -inst_11942: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a83ffff; valaddr_reg:x3; val_offset:35826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35826*FLEN/8, x4, x1, x2) - -inst_11943: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a87ffff; valaddr_reg:x3; val_offset:35829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35829*FLEN/8, x4, x1, x2) - -inst_11944: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a8fffff; valaddr_reg:x3; val_offset:35832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35832*FLEN/8, x4, x1, x2) - -inst_11945: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7a9fffff; valaddr_reg:x3; val_offset:35835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35835*FLEN/8, x4, x1, x2) - -inst_11946: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7abfffff; valaddr_reg:x3; val_offset:35838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35838*FLEN/8, x4, x1, x2) - -inst_11947: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7ac00000; valaddr_reg:x3; val_offset:35841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35841*FLEN/8, x4, x1, x2) - -inst_11948: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7ae00000; valaddr_reg:x3; val_offset:35844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35844*FLEN/8, x4, x1, x2) - -inst_11949: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7af00000; valaddr_reg:x3; val_offset:35847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35847*FLEN/8, x4, x1, x2) - -inst_11950: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7af80000; valaddr_reg:x3; val_offset:35850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35850*FLEN/8, x4, x1, x2) - -inst_11951: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afc0000; valaddr_reg:x3; val_offset:35853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35853*FLEN/8, x4, x1, x2) - -inst_11952: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afe0000; valaddr_reg:x3; val_offset:35856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35856*FLEN/8, x4, x1, x2) - -inst_11953: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7aff0000; valaddr_reg:x3; val_offset:35859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35859*FLEN/8, x4, x1, x2) - -inst_11954: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7aff8000; valaddr_reg:x3; val_offset:35862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35862*FLEN/8, x4, x1, x2) - -inst_11955: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7affc000; valaddr_reg:x3; val_offset:35865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35865*FLEN/8, x4, x1, x2) - -inst_11956: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7affe000; valaddr_reg:x3; val_offset:35868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35868*FLEN/8, x4, x1, x2) - -inst_11957: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afff000; valaddr_reg:x3; val_offset:35871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35871*FLEN/8, x4, x1, x2) - -inst_11958: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afff800; valaddr_reg:x3; val_offset:35874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35874*FLEN/8, x4, x1, x2) - -inst_11959: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afffc00; valaddr_reg:x3; val_offset:35877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35877*FLEN/8, x4, x1, x2) - -inst_11960: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afffe00; valaddr_reg:x3; val_offset:35880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35880*FLEN/8, x4, x1, x2) - -inst_11961: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7affff00; valaddr_reg:x3; val_offset:35883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35883*FLEN/8, x4, x1, x2) - -inst_11962: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7affff80; valaddr_reg:x3; val_offset:35886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35886*FLEN/8, x4, x1, x2) - -inst_11963: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7affffc0; valaddr_reg:x3; val_offset:35889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35889*FLEN/8, x4, x1, x2) - -inst_11964: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7affffe0; valaddr_reg:x3; val_offset:35892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35892*FLEN/8, x4, x1, x2) - -inst_11965: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afffff0; valaddr_reg:x3; val_offset:35895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35895*FLEN/8, x4, x1, x2) - -inst_11966: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afffff8; valaddr_reg:x3; val_offset:35898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35898*FLEN/8, x4, x1, x2) - -inst_11967: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afffffc; valaddr_reg:x3; val_offset:35901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35901*FLEN/8, x4, x1, x2) - -inst_11968: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7afffffe; valaddr_reg:x3; val_offset:35904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35904*FLEN/8, x4, x1, x2) - -inst_11969: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7affffff; valaddr_reg:x3; val_offset:35907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35907*FLEN/8, x4, x1, x2) - -inst_11970: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f000001; valaddr_reg:x3; val_offset:35910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35910*FLEN/8, x4, x1, x2) - -inst_11971: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f000003; valaddr_reg:x3; val_offset:35913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35913*FLEN/8, x4, x1, x2) - -inst_11972: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f000007; valaddr_reg:x3; val_offset:35916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35916*FLEN/8, x4, x1, x2) - -inst_11973: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f199999; valaddr_reg:x3; val_offset:35919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35919*FLEN/8, x4, x1, x2) - -inst_11974: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f249249; valaddr_reg:x3; val_offset:35922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35922*FLEN/8, x4, x1, x2) - -inst_11975: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f333333; valaddr_reg:x3; val_offset:35925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35925*FLEN/8, x4, x1, x2) - -inst_11976: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:35928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35928*FLEN/8, x4, x1, x2) - -inst_11977: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:35931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35931*FLEN/8, x4, x1, x2) - -inst_11978: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f444444; valaddr_reg:x3; val_offset:35934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35934*FLEN/8, x4, x1, x2) - -inst_11979: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:35937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35937*FLEN/8, x4, x1, x2) - -inst_11980: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:35940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35940*FLEN/8, x4, x1, x2) - -inst_11981: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f666666; valaddr_reg:x3; val_offset:35943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35943*FLEN/8, x4, x1, x2) - -inst_11982: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:35946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35946*FLEN/8, x4, x1, x2) - -inst_11983: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:35949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35949*FLEN/8, x4, x1, x2) - -inst_11984: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:35952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35952*FLEN/8, x4, x1, x2) - -inst_11985: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:35955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35955*FLEN/8, x4, x1, x2) - -inst_11986: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e800000; valaddr_reg:x3; val_offset:35958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35958*FLEN/8, x4, x1, x2) - -inst_11987: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e800001; valaddr_reg:x3; val_offset:35961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35961*FLEN/8, x4, x1, x2) - -inst_11988: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e800003; valaddr_reg:x3; val_offset:35964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35964*FLEN/8, x4, x1, x2) - -inst_11989: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e800007; valaddr_reg:x3; val_offset:35967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35967*FLEN/8, x4, x1, x2) - -inst_11990: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e80000f; valaddr_reg:x3; val_offset:35970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35970*FLEN/8, x4, x1, x2) - -inst_11991: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e80001f; valaddr_reg:x3; val_offset:35973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35973*FLEN/8, x4, x1, x2) - -inst_11992: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e80003f; valaddr_reg:x3; val_offset:35976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35976*FLEN/8, x4, x1, x2) - -inst_11993: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e80007f; valaddr_reg:x3; val_offset:35979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35979*FLEN/8, x4, x1, x2) - -inst_11994: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e8000ff; valaddr_reg:x3; val_offset:35982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35982*FLEN/8, x4, x1, x2) - -inst_11995: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e8001ff; valaddr_reg:x3; val_offset:35985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35985*FLEN/8, x4, x1, x2) - -inst_11996: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e8003ff; valaddr_reg:x3; val_offset:35988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35988*FLEN/8, x4, x1, x2) - -inst_11997: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e8007ff; valaddr_reg:x3; val_offset:35991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35991*FLEN/8, x4, x1, x2) - -inst_11998: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e800fff; valaddr_reg:x3; val_offset:35994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35994*FLEN/8, x4, x1, x2) - -inst_11999: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e801fff; valaddr_reg:x3; val_offset:35997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35997*FLEN/8, x4, x1, x2) - -inst_12000: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e803fff; valaddr_reg:x3; val_offset:36000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36000*FLEN/8, x4, x1, x2) - -inst_12001: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e807fff; valaddr_reg:x3; val_offset:36003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36003*FLEN/8, x4, x1, x2) - -inst_12002: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e80ffff; valaddr_reg:x3; val_offset:36006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36006*FLEN/8, x4, x1, x2) - -inst_12003: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e81ffff; valaddr_reg:x3; val_offset:36009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36009*FLEN/8, x4, x1, x2) - -inst_12004: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e83ffff; valaddr_reg:x3; val_offset:36012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36012*FLEN/8, x4, x1, x2) - -inst_12005: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e87ffff; valaddr_reg:x3; val_offset:36015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36015*FLEN/8, x4, x1, x2) - -inst_12006: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e8fffff; valaddr_reg:x3; val_offset:36018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36018*FLEN/8, x4, x1, x2) - -inst_12007: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3e9fffff; valaddr_reg:x3; val_offset:36021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36021*FLEN/8, x4, x1, x2) - -inst_12008: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3ebfffff; valaddr_reg:x3; val_offset:36024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36024*FLEN/8, x4, x1, x2) - -inst_12009: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3ec00000; valaddr_reg:x3; val_offset:36027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36027*FLEN/8, x4, x1, x2) - -inst_12010: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3ee00000; valaddr_reg:x3; val_offset:36030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36030*FLEN/8, x4, x1, x2) - -inst_12011: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3ef00000; valaddr_reg:x3; val_offset:36033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36033*FLEN/8, x4, x1, x2) - -inst_12012: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3ef80000; valaddr_reg:x3; val_offset:36036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36036*FLEN/8, x4, x1, x2) - -inst_12013: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efc0000; valaddr_reg:x3; val_offset:36039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36039*FLEN/8, x4, x1, x2) - -inst_12014: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efe0000; valaddr_reg:x3; val_offset:36042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36042*FLEN/8, x4, x1, x2) - -inst_12015: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3eff0000; valaddr_reg:x3; val_offset:36045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36045*FLEN/8, x4, x1, x2) - -inst_12016: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3eff8000; valaddr_reg:x3; val_offset:36048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36048*FLEN/8, x4, x1, x2) - -inst_12017: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3effc000; valaddr_reg:x3; val_offset:36051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36051*FLEN/8, x4, x1, x2) - -inst_12018: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3effe000; valaddr_reg:x3; val_offset:36054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36054*FLEN/8, x4, x1, x2) - -inst_12019: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efff000; valaddr_reg:x3; val_offset:36057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36057*FLEN/8, x4, x1, x2) - -inst_12020: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efff800; valaddr_reg:x3; val_offset:36060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36060*FLEN/8, x4, x1, x2) - -inst_12021: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efffc00; valaddr_reg:x3; val_offset:36063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36063*FLEN/8, x4, x1, x2) - -inst_12022: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efffe00; valaddr_reg:x3; val_offset:36066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36066*FLEN/8, x4, x1, x2) - -inst_12023: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3effff00; valaddr_reg:x3; val_offset:36069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36069*FLEN/8, x4, x1, x2) - -inst_12024: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3effff80; valaddr_reg:x3; val_offset:36072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36072*FLEN/8, x4, x1, x2) - -inst_12025: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3effffc0; valaddr_reg:x3; val_offset:36075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36075*FLEN/8, x4, x1, x2) - -inst_12026: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3effffe0; valaddr_reg:x3; val_offset:36078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36078*FLEN/8, x4, x1, x2) - -inst_12027: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efffff0; valaddr_reg:x3; val_offset:36081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36081*FLEN/8, x4, x1, x2) - -inst_12028: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efffff8; valaddr_reg:x3; val_offset:36084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36084*FLEN/8, x4, x1, x2) - -inst_12029: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efffffc; valaddr_reg:x3; val_offset:36087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36087*FLEN/8, x4, x1, x2) - -inst_12030: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3efffffe; valaddr_reg:x3; val_offset:36090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36090*FLEN/8, x4, x1, x2) - -inst_12031: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3effffff; valaddr_reg:x3; val_offset:36093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36093*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_95) - -inst_12032: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3f800001; valaddr_reg:x3; val_offset:36096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36096*FLEN/8, x4, x1, x2) - -inst_12033: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3f800003; valaddr_reg:x3; val_offset:36099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36099*FLEN/8, x4, x1, x2) - -inst_12034: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3f800007; valaddr_reg:x3; val_offset:36102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36102*FLEN/8, x4, x1, x2) - -inst_12035: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3f999999; valaddr_reg:x3; val_offset:36105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36105*FLEN/8, x4, x1, x2) - -inst_12036: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:36108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36108*FLEN/8, x4, x1, x2) - -inst_12037: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:36111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36111*FLEN/8, x4, x1, x2) - -inst_12038: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:36114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36114*FLEN/8, x4, x1, x2) - -inst_12039: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:36117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36117*FLEN/8, x4, x1, x2) - -inst_12040: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:36120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36120*FLEN/8, x4, x1, x2) - -inst_12041: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:36123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36123*FLEN/8, x4, x1, x2) - -inst_12042: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:36126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36126*FLEN/8, x4, x1, x2) - -inst_12043: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:36129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36129*FLEN/8, x4, x1, x2) - -inst_12044: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:36132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36132*FLEN/8, x4, x1, x2) - -inst_12045: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:36135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36135*FLEN/8, x4, x1, x2) - -inst_12046: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:36138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36138*FLEN/8, x4, x1, x2) - -inst_12047: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:36141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36141*FLEN/8, x4, x1, x2) - -inst_12048: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:36144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36144*FLEN/8, x4, x1, x2) - -inst_12049: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:36147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36147*FLEN/8, x4, x1, x2) - -inst_12050: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:36150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36150*FLEN/8, x4, x1, x2) - -inst_12051: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:36153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36153*FLEN/8, x4, x1, x2) - -inst_12052: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:36156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36156*FLEN/8, x4, x1, x2) - -inst_12053: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:36159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36159*FLEN/8, x4, x1, x2) - -inst_12054: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:36162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36162*FLEN/8, x4, x1, x2) - -inst_12055: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:36165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36165*FLEN/8, x4, x1, x2) - -inst_12056: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:36168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36168*FLEN/8, x4, x1, x2) - -inst_12057: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:36171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36171*FLEN/8, x4, x1, x2) - -inst_12058: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:36174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36174*FLEN/8, x4, x1, x2) - -inst_12059: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:36177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36177*FLEN/8, x4, x1, x2) - -inst_12060: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:36180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36180*FLEN/8, x4, x1, x2) - -inst_12061: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:36183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36183*FLEN/8, x4, x1, x2) - -inst_12062: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:36186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36186*FLEN/8, x4, x1, x2) - -inst_12063: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:36189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36189*FLEN/8, x4, x1, x2) - -inst_12064: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb000000; valaddr_reg:x3; val_offset:36192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36192*FLEN/8, x4, x1, x2) - -inst_12065: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb000001; valaddr_reg:x3; val_offset:36195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36195*FLEN/8, x4, x1, x2) - -inst_12066: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb000003; valaddr_reg:x3; val_offset:36198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36198*FLEN/8, x4, x1, x2) - -inst_12067: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb000007; valaddr_reg:x3; val_offset:36201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36201*FLEN/8, x4, x1, x2) - -inst_12068: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb00000f; valaddr_reg:x3; val_offset:36204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36204*FLEN/8, x4, x1, x2) - -inst_12069: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb00001f; valaddr_reg:x3; val_offset:36207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36207*FLEN/8, x4, x1, x2) - -inst_12070: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb00003f; valaddr_reg:x3; val_offset:36210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36210*FLEN/8, x4, x1, x2) - -inst_12071: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb00007f; valaddr_reg:x3; val_offset:36213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36213*FLEN/8, x4, x1, x2) - -inst_12072: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb0000ff; valaddr_reg:x3; val_offset:36216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36216*FLEN/8, x4, x1, x2) - -inst_12073: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb0001ff; valaddr_reg:x3; val_offset:36219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36219*FLEN/8, x4, x1, x2) - -inst_12074: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb0003ff; valaddr_reg:x3; val_offset:36222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36222*FLEN/8, x4, x1, x2) - -inst_12075: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb0007ff; valaddr_reg:x3; val_offset:36225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36225*FLEN/8, x4, x1, x2) - -inst_12076: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb000fff; valaddr_reg:x3; val_offset:36228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36228*FLEN/8, x4, x1, x2) - -inst_12077: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb001fff; valaddr_reg:x3; val_offset:36231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36231*FLEN/8, x4, x1, x2) - -inst_12078: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb003fff; valaddr_reg:x3; val_offset:36234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36234*FLEN/8, x4, x1, x2) - -inst_12079: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb007fff; valaddr_reg:x3; val_offset:36237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36237*FLEN/8, x4, x1, x2) - -inst_12080: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb00ffff; valaddr_reg:x3; val_offset:36240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36240*FLEN/8, x4, x1, x2) - -inst_12081: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb01ffff; valaddr_reg:x3; val_offset:36243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36243*FLEN/8, x4, x1, x2) - -inst_12082: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb03ffff; valaddr_reg:x3; val_offset:36246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36246*FLEN/8, x4, x1, x2) - -inst_12083: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb07ffff; valaddr_reg:x3; val_offset:36249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36249*FLEN/8, x4, x1, x2) - -inst_12084: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb0fffff; valaddr_reg:x3; val_offset:36252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36252*FLEN/8, x4, x1, x2) - -inst_12085: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb1fffff; valaddr_reg:x3; val_offset:36255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36255*FLEN/8, x4, x1, x2) - -inst_12086: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb3fffff; valaddr_reg:x3; val_offset:36258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36258*FLEN/8, x4, x1, x2) - -inst_12087: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb400000; valaddr_reg:x3; val_offset:36261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36261*FLEN/8, x4, x1, x2) - -inst_12088: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb600000; valaddr_reg:x3; val_offset:36264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36264*FLEN/8, x4, x1, x2) - -inst_12089: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb700000; valaddr_reg:x3; val_offset:36267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36267*FLEN/8, x4, x1, x2) - -inst_12090: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb780000; valaddr_reg:x3; val_offset:36270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36270*FLEN/8, x4, x1, x2) - -inst_12091: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7c0000; valaddr_reg:x3; val_offset:36273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36273*FLEN/8, x4, x1, x2) - -inst_12092: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7e0000; valaddr_reg:x3; val_offset:36276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36276*FLEN/8, x4, x1, x2) - -inst_12093: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7f0000; valaddr_reg:x3; val_offset:36279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36279*FLEN/8, x4, x1, x2) - -inst_12094: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7f8000; valaddr_reg:x3; val_offset:36282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36282*FLEN/8, x4, x1, x2) - -inst_12095: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7fc000; valaddr_reg:x3; val_offset:36285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36285*FLEN/8, x4, x1, x2) - -inst_12096: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7fe000; valaddr_reg:x3; val_offset:36288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36288*FLEN/8, x4, x1, x2) - -inst_12097: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7ff000; valaddr_reg:x3; val_offset:36291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36291*FLEN/8, x4, x1, x2) - -inst_12098: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7ff800; valaddr_reg:x3; val_offset:36294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36294*FLEN/8, x4, x1, x2) - -inst_12099: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7ffc00; valaddr_reg:x3; val_offset:36297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36297*FLEN/8, x4, x1, x2) - -inst_12100: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7ffe00; valaddr_reg:x3; val_offset:36300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36300*FLEN/8, x4, x1, x2) - -inst_12101: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7fff00; valaddr_reg:x3; val_offset:36303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36303*FLEN/8, x4, x1, x2) - -inst_12102: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7fff80; valaddr_reg:x3; val_offset:36306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36306*FLEN/8, x4, x1, x2) - -inst_12103: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7fffc0; valaddr_reg:x3; val_offset:36309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36309*FLEN/8, x4, x1, x2) - -inst_12104: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7fffe0; valaddr_reg:x3; val_offset:36312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36312*FLEN/8, x4, x1, x2) - -inst_12105: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7ffff0; valaddr_reg:x3; val_offset:36315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36315*FLEN/8, x4, x1, x2) - -inst_12106: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7ffff8; valaddr_reg:x3; val_offset:36318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36318*FLEN/8, x4, x1, x2) - -inst_12107: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7ffffc; valaddr_reg:x3; val_offset:36321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36321*FLEN/8, x4, x1, x2) - -inst_12108: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7ffffe; valaddr_reg:x3; val_offset:36324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36324*FLEN/8, x4, x1, x2) - -inst_12109: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; -op3val:0xb7fffff; valaddr_reg:x3; val_offset:36327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36327*FLEN/8, x4, x1, x2) - -inst_12110: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb000000; valaddr_reg:x3; val_offset:36330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36330*FLEN/8, x4, x1, x2) - -inst_12111: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb000001; valaddr_reg:x3; val_offset:36333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36333*FLEN/8, x4, x1, x2) - -inst_12112: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb000003; valaddr_reg:x3; val_offset:36336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36336*FLEN/8, x4, x1, x2) - -inst_12113: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb000007; valaddr_reg:x3; val_offset:36339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36339*FLEN/8, x4, x1, x2) - -inst_12114: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb00000f; valaddr_reg:x3; val_offset:36342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36342*FLEN/8, x4, x1, x2) - -inst_12115: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb00001f; valaddr_reg:x3; val_offset:36345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36345*FLEN/8, x4, x1, x2) - -inst_12116: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb00003f; valaddr_reg:x3; val_offset:36348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36348*FLEN/8, x4, x1, x2) - -inst_12117: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb00007f; valaddr_reg:x3; val_offset:36351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36351*FLEN/8, x4, x1, x2) - -inst_12118: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb0000ff; valaddr_reg:x3; val_offset:36354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36354*FLEN/8, x4, x1, x2) - -inst_12119: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb0001ff; valaddr_reg:x3; val_offset:36357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36357*FLEN/8, x4, x1, x2) - -inst_12120: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb0003ff; valaddr_reg:x3; val_offset:36360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36360*FLEN/8, x4, x1, x2) - -inst_12121: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb0007ff; valaddr_reg:x3; val_offset:36363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36363*FLEN/8, x4, x1, x2) - -inst_12122: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb000fff; valaddr_reg:x3; val_offset:36366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36366*FLEN/8, x4, x1, x2) - -inst_12123: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb001fff; valaddr_reg:x3; val_offset:36369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36369*FLEN/8, x4, x1, x2) - -inst_12124: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb003fff; valaddr_reg:x3; val_offset:36372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36372*FLEN/8, x4, x1, x2) - -inst_12125: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb007fff; valaddr_reg:x3; val_offset:36375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36375*FLEN/8, x4, x1, x2) - -inst_12126: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb00ffff; valaddr_reg:x3; val_offset:36378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36378*FLEN/8, x4, x1, x2) - -inst_12127: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb01ffff; valaddr_reg:x3; val_offset:36381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36381*FLEN/8, x4, x1, x2) - -inst_12128: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb03ffff; valaddr_reg:x3; val_offset:36384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36384*FLEN/8, x4, x1, x2) - -inst_12129: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb07ffff; valaddr_reg:x3; val_offset:36387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36387*FLEN/8, x4, x1, x2) - -inst_12130: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb0fffff; valaddr_reg:x3; val_offset:36390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36390*FLEN/8, x4, x1, x2) - -inst_12131: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb1fffff; valaddr_reg:x3; val_offset:36393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36393*FLEN/8, x4, x1, x2) - -inst_12132: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb3fffff; valaddr_reg:x3; val_offset:36396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36396*FLEN/8, x4, x1, x2) - -inst_12133: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb400000; valaddr_reg:x3; val_offset:36399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36399*FLEN/8, x4, x1, x2) - -inst_12134: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb600000; valaddr_reg:x3; val_offset:36402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36402*FLEN/8, x4, x1, x2) - -inst_12135: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb700000; valaddr_reg:x3; val_offset:36405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36405*FLEN/8, x4, x1, x2) - -inst_12136: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb780000; valaddr_reg:x3; val_offset:36408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36408*FLEN/8, x4, x1, x2) - -inst_12137: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7c0000; valaddr_reg:x3; val_offset:36411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36411*FLEN/8, x4, x1, x2) - -inst_12138: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7e0000; valaddr_reg:x3; val_offset:36414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36414*FLEN/8, x4, x1, x2) - -inst_12139: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7f0000; valaddr_reg:x3; val_offset:36417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36417*FLEN/8, x4, x1, x2) - -inst_12140: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7f8000; valaddr_reg:x3; val_offset:36420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36420*FLEN/8, x4, x1, x2) - -inst_12141: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7fc000; valaddr_reg:x3; val_offset:36423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36423*FLEN/8, x4, x1, x2) - -inst_12142: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7fe000; valaddr_reg:x3; val_offset:36426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36426*FLEN/8, x4, x1, x2) - -inst_12143: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7ff000; valaddr_reg:x3; val_offset:36429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36429*FLEN/8, x4, x1, x2) - -inst_12144: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7ff800; valaddr_reg:x3; val_offset:36432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36432*FLEN/8, x4, x1, x2) - -inst_12145: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7ffc00; valaddr_reg:x3; val_offset:36435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36435*FLEN/8, x4, x1, x2) - -inst_12146: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7ffe00; valaddr_reg:x3; val_offset:36438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36438*FLEN/8, x4, x1, x2) - -inst_12147: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7fff00; valaddr_reg:x3; val_offset:36441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36441*FLEN/8, x4, x1, x2) - -inst_12148: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7fff80; valaddr_reg:x3; val_offset:36444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36444*FLEN/8, x4, x1, x2) - -inst_12149: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7fffc0; valaddr_reg:x3; val_offset:36447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36447*FLEN/8, x4, x1, x2) - -inst_12150: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7fffe0; valaddr_reg:x3; val_offset:36450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36450*FLEN/8, x4, x1, x2) - -inst_12151: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7ffff0; valaddr_reg:x3; val_offset:36453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36453*FLEN/8, x4, x1, x2) - -inst_12152: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7ffff8; valaddr_reg:x3; val_offset:36456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36456*FLEN/8, x4, x1, x2) - -inst_12153: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7ffffc; valaddr_reg:x3; val_offset:36459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36459*FLEN/8, x4, x1, x2) - -inst_12154: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7ffffe; valaddr_reg:x3; val_offset:36462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36462*FLEN/8, x4, x1, x2) - -inst_12155: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbb7fffff; valaddr_reg:x3; val_offset:36465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36465*FLEN/8, x4, x1, x2) - -inst_12156: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbf800001; valaddr_reg:x3; val_offset:36468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36468*FLEN/8, x4, x1, x2) - -inst_12157: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbf800003; valaddr_reg:x3; val_offset:36471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36471*FLEN/8, x4, x1, x2) - -inst_12158: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbf800007; valaddr_reg:x3; val_offset:36474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36474*FLEN/8, x4, x1, x2) - -inst_12159: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbf999999; valaddr_reg:x3; val_offset:36477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36477*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_96) - -inst_12160: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:36480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36480*FLEN/8, x4, x1, x2) - -inst_12161: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:36483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36483*FLEN/8, x4, x1, x2) - -inst_12162: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:36486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36486*FLEN/8, x4, x1, x2) - -inst_12163: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:36489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36489*FLEN/8, x4, x1, x2) - -inst_12164: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:36492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36492*FLEN/8, x4, x1, x2) - -inst_12165: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:36495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36495*FLEN/8, x4, x1, x2) - -inst_12166: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:36498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36498*FLEN/8, x4, x1, x2) - -inst_12167: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:36501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36501*FLEN/8, x4, x1, x2) - -inst_12168: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:36504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36504*FLEN/8, x4, x1, x2) - -inst_12169: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:36507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36507*FLEN/8, x4, x1, x2) - -inst_12170: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:36510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36510*FLEN/8, x4, x1, x2) - -inst_12171: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:36513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36513*FLEN/8, x4, x1, x2) - -inst_12172: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:36516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36516*FLEN/8, x4, x1, x2) - -inst_12173: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:36519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36519*FLEN/8, x4, x1, x2) - -inst_12174: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:36522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36522*FLEN/8, x4, x1, x2) - -inst_12175: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:36525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36525*FLEN/8, x4, x1, x2) - -inst_12176: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:36528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36528*FLEN/8, x4, x1, x2) - -inst_12177: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:36531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36531*FLEN/8, x4, x1, x2) - -inst_12178: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:36534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36534*FLEN/8, x4, x1, x2) - -inst_12179: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:36537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36537*FLEN/8, x4, x1, x2) - -inst_12180: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:36540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36540*FLEN/8, x4, x1, x2) - -inst_12181: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:36543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36543*FLEN/8, x4, x1, x2) - -inst_12182: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:36546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36546*FLEN/8, x4, x1, x2) - -inst_12183: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:36549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36549*FLEN/8, x4, x1, x2) - -inst_12184: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:36552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36552*FLEN/8, x4, x1, x2) - -inst_12185: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:36555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36555*FLEN/8, x4, x1, x2) - -inst_12186: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:36558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36558*FLEN/8, x4, x1, x2) - -inst_12187: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:36561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36561*FLEN/8, x4, x1, x2) - -inst_12188: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a800000; valaddr_reg:x3; val_offset:36564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36564*FLEN/8, x4, x1, x2) - -inst_12189: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a800001; valaddr_reg:x3; val_offset:36567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36567*FLEN/8, x4, x1, x2) - -inst_12190: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a800003; valaddr_reg:x3; val_offset:36570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36570*FLEN/8, x4, x1, x2) - -inst_12191: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a800007; valaddr_reg:x3; val_offset:36573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36573*FLEN/8, x4, x1, x2) - -inst_12192: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a80000f; valaddr_reg:x3; val_offset:36576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36576*FLEN/8, x4, x1, x2) - -inst_12193: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a80001f; valaddr_reg:x3; val_offset:36579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36579*FLEN/8, x4, x1, x2) - -inst_12194: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a80003f; valaddr_reg:x3; val_offset:36582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36582*FLEN/8, x4, x1, x2) - -inst_12195: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a80007f; valaddr_reg:x3; val_offset:36585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36585*FLEN/8, x4, x1, x2) - -inst_12196: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a8000ff; valaddr_reg:x3; val_offset:36588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36588*FLEN/8, x4, x1, x2) - -inst_12197: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a8001ff; valaddr_reg:x3; val_offset:36591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36591*FLEN/8, x4, x1, x2) - -inst_12198: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a8003ff; valaddr_reg:x3; val_offset:36594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36594*FLEN/8, x4, x1, x2) - -inst_12199: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a8007ff; valaddr_reg:x3; val_offset:36597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36597*FLEN/8, x4, x1, x2) - -inst_12200: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a800fff; valaddr_reg:x3; val_offset:36600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36600*FLEN/8, x4, x1, x2) - -inst_12201: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a801fff; valaddr_reg:x3; val_offset:36603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36603*FLEN/8, x4, x1, x2) - -inst_12202: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a803fff; valaddr_reg:x3; val_offset:36606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36606*FLEN/8, x4, x1, x2) - -inst_12203: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a807fff; valaddr_reg:x3; val_offset:36609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36609*FLEN/8, x4, x1, x2) - -inst_12204: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a80ffff; valaddr_reg:x3; val_offset:36612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36612*FLEN/8, x4, x1, x2) - -inst_12205: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a81ffff; valaddr_reg:x3; val_offset:36615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36615*FLEN/8, x4, x1, x2) - -inst_12206: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a83ffff; valaddr_reg:x3; val_offset:36618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36618*FLEN/8, x4, x1, x2) - -inst_12207: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a87ffff; valaddr_reg:x3; val_offset:36621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36621*FLEN/8, x4, x1, x2) - -inst_12208: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a8fffff; valaddr_reg:x3; val_offset:36624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36624*FLEN/8, x4, x1, x2) - -inst_12209: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8a9fffff; valaddr_reg:x3; val_offset:36627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36627*FLEN/8, x4, x1, x2) - -inst_12210: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8abfffff; valaddr_reg:x3; val_offset:36630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36630*FLEN/8, x4, x1, x2) - -inst_12211: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8ac00000; valaddr_reg:x3; val_offset:36633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36633*FLEN/8, x4, x1, x2) - -inst_12212: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8ae00000; valaddr_reg:x3; val_offset:36636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36636*FLEN/8, x4, x1, x2) - -inst_12213: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8af00000; valaddr_reg:x3; val_offset:36639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36639*FLEN/8, x4, x1, x2) - -inst_12214: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8af80000; valaddr_reg:x3; val_offset:36642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36642*FLEN/8, x4, x1, x2) - -inst_12215: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afc0000; valaddr_reg:x3; val_offset:36645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36645*FLEN/8, x4, x1, x2) - -inst_12216: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afe0000; valaddr_reg:x3; val_offset:36648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36648*FLEN/8, x4, x1, x2) - -inst_12217: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8aff0000; valaddr_reg:x3; val_offset:36651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36651*FLEN/8, x4, x1, x2) - -inst_12218: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8aff8000; valaddr_reg:x3; val_offset:36654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36654*FLEN/8, x4, x1, x2) - -inst_12219: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8affc000; valaddr_reg:x3; val_offset:36657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36657*FLEN/8, x4, x1, x2) - -inst_12220: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8affe000; valaddr_reg:x3; val_offset:36660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36660*FLEN/8, x4, x1, x2) - -inst_12221: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afff000; valaddr_reg:x3; val_offset:36663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36663*FLEN/8, x4, x1, x2) - -inst_12222: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afff800; valaddr_reg:x3; val_offset:36666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36666*FLEN/8, x4, x1, x2) - -inst_12223: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afffc00; valaddr_reg:x3; val_offset:36669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36669*FLEN/8, x4, x1, x2) - -inst_12224: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afffe00; valaddr_reg:x3; val_offset:36672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36672*FLEN/8, x4, x1, x2) - -inst_12225: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8affff00; valaddr_reg:x3; val_offset:36675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36675*FLEN/8, x4, x1, x2) - -inst_12226: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8affff80; valaddr_reg:x3; val_offset:36678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36678*FLEN/8, x4, x1, x2) - -inst_12227: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8affffc0; valaddr_reg:x3; val_offset:36681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36681*FLEN/8, x4, x1, x2) - -inst_12228: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8affffe0; valaddr_reg:x3; val_offset:36684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36684*FLEN/8, x4, x1, x2) - -inst_12229: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afffff0; valaddr_reg:x3; val_offset:36687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36687*FLEN/8, x4, x1, x2) - -inst_12230: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afffff8; valaddr_reg:x3; val_offset:36690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36690*FLEN/8, x4, x1, x2) - -inst_12231: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afffffc; valaddr_reg:x3; val_offset:36693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36693*FLEN/8, x4, x1, x2) - -inst_12232: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8afffffe; valaddr_reg:x3; val_offset:36696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36696*FLEN/8, x4, x1, x2) - -inst_12233: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; -op3val:0x8affffff; valaddr_reg:x3; val_offset:36699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36699*FLEN/8, x4, x1, x2) - -inst_12234: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:36702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36702*FLEN/8, x4, x1, x2) - -inst_12235: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:36705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36705*FLEN/8, x4, x1, x2) - -inst_12236: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:36708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36708*FLEN/8, x4, x1, x2) - -inst_12237: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:36711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36711*FLEN/8, x4, x1, x2) - -inst_12238: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:36714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36714*FLEN/8, x4, x1, x2) - -inst_12239: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:36717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36717*FLEN/8, x4, x1, x2) - -inst_12240: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:36720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36720*FLEN/8, x4, x1, x2) - -inst_12241: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:36723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36723*FLEN/8, x4, x1, x2) - -inst_12242: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:36726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36726*FLEN/8, x4, x1, x2) - -inst_12243: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:36729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36729*FLEN/8, x4, x1, x2) - -inst_12244: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:36732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36732*FLEN/8, x4, x1, x2) - -inst_12245: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:36735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36735*FLEN/8, x4, x1, x2) - -inst_12246: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:36738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36738*FLEN/8, x4, x1, x2) - -inst_12247: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:36741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36741*FLEN/8, x4, x1, x2) - -inst_12248: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:36744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36744*FLEN/8, x4, x1, x2) - -inst_12249: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:36747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36747*FLEN/8, x4, x1, x2) - -inst_12250: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c800000; valaddr_reg:x3; val_offset:36750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36750*FLEN/8, x4, x1, x2) - -inst_12251: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c800001; valaddr_reg:x3; val_offset:36753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36753*FLEN/8, x4, x1, x2) - -inst_12252: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c800003; valaddr_reg:x3; val_offset:36756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36756*FLEN/8, x4, x1, x2) - -inst_12253: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c800007; valaddr_reg:x3; val_offset:36759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36759*FLEN/8, x4, x1, x2) - -inst_12254: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c80000f; valaddr_reg:x3; val_offset:36762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36762*FLEN/8, x4, x1, x2) - -inst_12255: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c80001f; valaddr_reg:x3; val_offset:36765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36765*FLEN/8, x4, x1, x2) - -inst_12256: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c80003f; valaddr_reg:x3; val_offset:36768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36768*FLEN/8, x4, x1, x2) - -inst_12257: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c80007f; valaddr_reg:x3; val_offset:36771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36771*FLEN/8, x4, x1, x2) - -inst_12258: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c8000ff; valaddr_reg:x3; val_offset:36774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36774*FLEN/8, x4, x1, x2) - -inst_12259: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c8001ff; valaddr_reg:x3; val_offset:36777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36777*FLEN/8, x4, x1, x2) - -inst_12260: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c8003ff; valaddr_reg:x3; val_offset:36780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36780*FLEN/8, x4, x1, x2) - -inst_12261: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c8007ff; valaddr_reg:x3; val_offset:36783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36783*FLEN/8, x4, x1, x2) - -inst_12262: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c800fff; valaddr_reg:x3; val_offset:36786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36786*FLEN/8, x4, x1, x2) - -inst_12263: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c801fff; valaddr_reg:x3; val_offset:36789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36789*FLEN/8, x4, x1, x2) - -inst_12264: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c803fff; valaddr_reg:x3; val_offset:36792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36792*FLEN/8, x4, x1, x2) - -inst_12265: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c807fff; valaddr_reg:x3; val_offset:36795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36795*FLEN/8, x4, x1, x2) - -inst_12266: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c80ffff; valaddr_reg:x3; val_offset:36798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36798*FLEN/8, x4, x1, x2) - -inst_12267: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c81ffff; valaddr_reg:x3; val_offset:36801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36801*FLEN/8, x4, x1, x2) - -inst_12268: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c83ffff; valaddr_reg:x3; val_offset:36804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36804*FLEN/8, x4, x1, x2) - -inst_12269: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c87ffff; valaddr_reg:x3; val_offset:36807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36807*FLEN/8, x4, x1, x2) - -inst_12270: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c8fffff; valaddr_reg:x3; val_offset:36810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36810*FLEN/8, x4, x1, x2) - -inst_12271: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8c9fffff; valaddr_reg:x3; val_offset:36813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36813*FLEN/8, x4, x1, x2) - -inst_12272: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cbfffff; valaddr_reg:x3; val_offset:36816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36816*FLEN/8, x4, x1, x2) - -inst_12273: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cc00000; valaddr_reg:x3; val_offset:36819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36819*FLEN/8, x4, x1, x2) - -inst_12274: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8ce00000; valaddr_reg:x3; val_offset:36822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36822*FLEN/8, x4, x1, x2) - -inst_12275: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cf00000; valaddr_reg:x3; val_offset:36825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36825*FLEN/8, x4, x1, x2) - -inst_12276: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cf80000; valaddr_reg:x3; val_offset:36828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36828*FLEN/8, x4, x1, x2) - -inst_12277: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfc0000; valaddr_reg:x3; val_offset:36831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36831*FLEN/8, x4, x1, x2) - -inst_12278: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfe0000; valaddr_reg:x3; val_offset:36834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36834*FLEN/8, x4, x1, x2) - -inst_12279: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cff0000; valaddr_reg:x3; val_offset:36837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36837*FLEN/8, x4, x1, x2) - -inst_12280: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cff8000; valaddr_reg:x3; val_offset:36840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36840*FLEN/8, x4, x1, x2) - -inst_12281: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cffc000; valaddr_reg:x3; val_offset:36843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36843*FLEN/8, x4, x1, x2) - -inst_12282: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cffe000; valaddr_reg:x3; val_offset:36846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36846*FLEN/8, x4, x1, x2) - -inst_12283: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfff000; valaddr_reg:x3; val_offset:36849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36849*FLEN/8, x4, x1, x2) - -inst_12284: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfff800; valaddr_reg:x3; val_offset:36852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36852*FLEN/8, x4, x1, x2) - -inst_12285: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfffc00; valaddr_reg:x3; val_offset:36855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36855*FLEN/8, x4, x1, x2) - -inst_12286: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfffe00; valaddr_reg:x3; val_offset:36858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36858*FLEN/8, x4, x1, x2) - -inst_12287: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cffff00; valaddr_reg:x3; val_offset:36861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36861*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_97) - -inst_12288: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cffff80; valaddr_reg:x3; val_offset:36864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36864*FLEN/8, x4, x1, x2) - -inst_12289: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cffffc0; valaddr_reg:x3; val_offset:36867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36867*FLEN/8, x4, x1, x2) - -inst_12290: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cffffe0; valaddr_reg:x3; val_offset:36870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36870*FLEN/8, x4, x1, x2) - -inst_12291: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfffff0; valaddr_reg:x3; val_offset:36873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36873*FLEN/8, x4, x1, x2) - -inst_12292: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfffff8; valaddr_reg:x3; val_offset:36876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36876*FLEN/8, x4, x1, x2) - -inst_12293: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfffffc; valaddr_reg:x3; val_offset:36879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36879*FLEN/8, x4, x1, x2) - -inst_12294: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cfffffe; valaddr_reg:x3; val_offset:36882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36882*FLEN/8, x4, x1, x2) - -inst_12295: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; -op3val:0x8cffffff; valaddr_reg:x3; val_offset:36885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36885*FLEN/8, x4, x1, x2) - -inst_12296: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa000000; valaddr_reg:x3; val_offset:36888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36888*FLEN/8, x4, x1, x2) - -inst_12297: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa000001; valaddr_reg:x3; val_offset:36891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36891*FLEN/8, x4, x1, x2) - -inst_12298: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa000003; valaddr_reg:x3; val_offset:36894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36894*FLEN/8, x4, x1, x2) - -inst_12299: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa000007; valaddr_reg:x3; val_offset:36897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36897*FLEN/8, x4, x1, x2) - -inst_12300: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa00000f; valaddr_reg:x3; val_offset:36900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36900*FLEN/8, x4, x1, x2) - -inst_12301: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa00001f; valaddr_reg:x3; val_offset:36903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36903*FLEN/8, x4, x1, x2) - -inst_12302: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa00003f; valaddr_reg:x3; val_offset:36906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36906*FLEN/8, x4, x1, x2) - -inst_12303: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa00007f; valaddr_reg:x3; val_offset:36909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36909*FLEN/8, x4, x1, x2) - -inst_12304: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa0000ff; valaddr_reg:x3; val_offset:36912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36912*FLEN/8, x4, x1, x2) - -inst_12305: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa0001ff; valaddr_reg:x3; val_offset:36915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36915*FLEN/8, x4, x1, x2) - -inst_12306: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa0003ff; valaddr_reg:x3; val_offset:36918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36918*FLEN/8, x4, x1, x2) - -inst_12307: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa0007ff; valaddr_reg:x3; val_offset:36921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36921*FLEN/8, x4, x1, x2) - -inst_12308: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa000fff; valaddr_reg:x3; val_offset:36924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36924*FLEN/8, x4, x1, x2) - -inst_12309: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa001fff; valaddr_reg:x3; val_offset:36927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36927*FLEN/8, x4, x1, x2) - -inst_12310: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa003fff; valaddr_reg:x3; val_offset:36930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36930*FLEN/8, x4, x1, x2) - -inst_12311: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa007fff; valaddr_reg:x3; val_offset:36933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36933*FLEN/8, x4, x1, x2) - -inst_12312: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa00ffff; valaddr_reg:x3; val_offset:36936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36936*FLEN/8, x4, x1, x2) - -inst_12313: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa01ffff; valaddr_reg:x3; val_offset:36939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36939*FLEN/8, x4, x1, x2) - -inst_12314: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa03ffff; valaddr_reg:x3; val_offset:36942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36942*FLEN/8, x4, x1, x2) - -inst_12315: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa07ffff; valaddr_reg:x3; val_offset:36945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36945*FLEN/8, x4, x1, x2) - -inst_12316: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa0fffff; valaddr_reg:x3; val_offset:36948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36948*FLEN/8, x4, x1, x2) - -inst_12317: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa1fffff; valaddr_reg:x3; val_offset:36951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36951*FLEN/8, x4, x1, x2) - -inst_12318: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa3fffff; valaddr_reg:x3; val_offset:36954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36954*FLEN/8, x4, x1, x2) - -inst_12319: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa400000; valaddr_reg:x3; val_offset:36957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36957*FLEN/8, x4, x1, x2) - -inst_12320: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa600000; valaddr_reg:x3; val_offset:36960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36960*FLEN/8, x4, x1, x2) - -inst_12321: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa700000; valaddr_reg:x3; val_offset:36963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36963*FLEN/8, x4, x1, x2) - -inst_12322: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa780000; valaddr_reg:x3; val_offset:36966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36966*FLEN/8, x4, x1, x2) - -inst_12323: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7c0000; valaddr_reg:x3; val_offset:36969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36969*FLEN/8, x4, x1, x2) - -inst_12324: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7e0000; valaddr_reg:x3; val_offset:36972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36972*FLEN/8, x4, x1, x2) - -inst_12325: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7f0000; valaddr_reg:x3; val_offset:36975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36975*FLEN/8, x4, x1, x2) - -inst_12326: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7f8000; valaddr_reg:x3; val_offset:36978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36978*FLEN/8, x4, x1, x2) - -inst_12327: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7fc000; valaddr_reg:x3; val_offset:36981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36981*FLEN/8, x4, x1, x2) - -inst_12328: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7fe000; valaddr_reg:x3; val_offset:36984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36984*FLEN/8, x4, x1, x2) - -inst_12329: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7ff000; valaddr_reg:x3; val_offset:36987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36987*FLEN/8, x4, x1, x2) - -inst_12330: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7ff800; valaddr_reg:x3; val_offset:36990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36990*FLEN/8, x4, x1, x2) - -inst_12331: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7ffc00; valaddr_reg:x3; val_offset:36993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36993*FLEN/8, x4, x1, x2) - -inst_12332: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7ffe00; valaddr_reg:x3; val_offset:36996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36996*FLEN/8, x4, x1, x2) - -inst_12333: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7fff00; valaddr_reg:x3; val_offset:36999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36999*FLEN/8, x4, x1, x2) - -inst_12334: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7fff80; valaddr_reg:x3; val_offset:37002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37002*FLEN/8, x4, x1, x2) - -inst_12335: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7fffc0; valaddr_reg:x3; val_offset:37005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37005*FLEN/8, x4, x1, x2) - -inst_12336: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7fffe0; valaddr_reg:x3; val_offset:37008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37008*FLEN/8, x4, x1, x2) - -inst_12337: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7ffff0; valaddr_reg:x3; val_offset:37011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37011*FLEN/8, x4, x1, x2) - -inst_12338: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7ffff8; valaddr_reg:x3; val_offset:37014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37014*FLEN/8, x4, x1, x2) - -inst_12339: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7ffffc; valaddr_reg:x3; val_offset:37017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37017*FLEN/8, x4, x1, x2) - -inst_12340: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7ffffe; valaddr_reg:x3; val_offset:37020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37020*FLEN/8, x4, x1, x2) - -inst_12341: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xfa7fffff; valaddr_reg:x3; val_offset:37023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37023*FLEN/8, x4, x1, x2) - -inst_12342: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff000001; valaddr_reg:x3; val_offset:37026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37026*FLEN/8, x4, x1, x2) - -inst_12343: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff000003; valaddr_reg:x3; val_offset:37029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37029*FLEN/8, x4, x1, x2) - -inst_12344: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff000007; valaddr_reg:x3; val_offset:37032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37032*FLEN/8, x4, x1, x2) - -inst_12345: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff199999; valaddr_reg:x3; val_offset:37035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37035*FLEN/8, x4, x1, x2) - -inst_12346: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff249249; valaddr_reg:x3; val_offset:37038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37038*FLEN/8, x4, x1, x2) - -inst_12347: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff333333; valaddr_reg:x3; val_offset:37041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37041*FLEN/8, x4, x1, x2) - -inst_12348: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:37044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37044*FLEN/8, x4, x1, x2) - -inst_12349: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:37047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37047*FLEN/8, x4, x1, x2) - -inst_12350: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff444444; valaddr_reg:x3; val_offset:37050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37050*FLEN/8, x4, x1, x2) - -inst_12351: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:37053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37053*FLEN/8, x4, x1, x2) - -inst_12352: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:37056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37056*FLEN/8, x4, x1, x2) - -inst_12353: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff666666; valaddr_reg:x3; val_offset:37059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37059*FLEN/8, x4, x1, x2) - -inst_12354: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:37062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37062*FLEN/8, x4, x1, x2) - -inst_12355: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:37065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37065*FLEN/8, x4, x1, x2) - -inst_12356: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:37068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37068*FLEN/8, x4, x1, x2) - -inst_12357: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:37071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37071*FLEN/8, x4, x1, x2) - -inst_12358: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73000000; valaddr_reg:x3; val_offset:37074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37074*FLEN/8, x4, x1, x2) - -inst_12359: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73000001; valaddr_reg:x3; val_offset:37077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37077*FLEN/8, x4, x1, x2) - -inst_12360: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73000003; valaddr_reg:x3; val_offset:37080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37080*FLEN/8, x4, x1, x2) - -inst_12361: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73000007; valaddr_reg:x3; val_offset:37083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37083*FLEN/8, x4, x1, x2) - -inst_12362: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7300000f; valaddr_reg:x3; val_offset:37086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37086*FLEN/8, x4, x1, x2) - -inst_12363: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7300001f; valaddr_reg:x3; val_offset:37089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37089*FLEN/8, x4, x1, x2) - -inst_12364: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7300003f; valaddr_reg:x3; val_offset:37092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37092*FLEN/8, x4, x1, x2) - -inst_12365: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7300007f; valaddr_reg:x3; val_offset:37095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37095*FLEN/8, x4, x1, x2) - -inst_12366: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x730000ff; valaddr_reg:x3; val_offset:37098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37098*FLEN/8, x4, x1, x2) - -inst_12367: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x730001ff; valaddr_reg:x3; val_offset:37101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37101*FLEN/8, x4, x1, x2) - -inst_12368: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x730003ff; valaddr_reg:x3; val_offset:37104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37104*FLEN/8, x4, x1, x2) - -inst_12369: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x730007ff; valaddr_reg:x3; val_offset:37107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37107*FLEN/8, x4, x1, x2) - -inst_12370: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73000fff; valaddr_reg:x3; val_offset:37110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37110*FLEN/8, x4, x1, x2) - -inst_12371: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73001fff; valaddr_reg:x3; val_offset:37113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37113*FLEN/8, x4, x1, x2) - -inst_12372: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73003fff; valaddr_reg:x3; val_offset:37116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37116*FLEN/8, x4, x1, x2) - -inst_12373: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73007fff; valaddr_reg:x3; val_offset:37119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37119*FLEN/8, x4, x1, x2) - -inst_12374: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7300ffff; valaddr_reg:x3; val_offset:37122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37122*FLEN/8, x4, x1, x2) - -inst_12375: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7301ffff; valaddr_reg:x3; val_offset:37125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37125*FLEN/8, x4, x1, x2) - -inst_12376: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7303ffff; valaddr_reg:x3; val_offset:37128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37128*FLEN/8, x4, x1, x2) - -inst_12377: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7307ffff; valaddr_reg:x3; val_offset:37131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37131*FLEN/8, x4, x1, x2) - -inst_12378: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x730fffff; valaddr_reg:x3; val_offset:37134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37134*FLEN/8, x4, x1, x2) - -inst_12379: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x731fffff; valaddr_reg:x3; val_offset:37137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37137*FLEN/8, x4, x1, x2) - -inst_12380: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x733fffff; valaddr_reg:x3; val_offset:37140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37140*FLEN/8, x4, x1, x2) - -inst_12381: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73400000; valaddr_reg:x3; val_offset:37143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37143*FLEN/8, x4, x1, x2) - -inst_12382: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73600000; valaddr_reg:x3; val_offset:37146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37146*FLEN/8, x4, x1, x2) - -inst_12383: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73700000; valaddr_reg:x3; val_offset:37149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37149*FLEN/8, x4, x1, x2) - -inst_12384: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x73780000; valaddr_reg:x3; val_offset:37152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37152*FLEN/8, x4, x1, x2) - -inst_12385: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737c0000; valaddr_reg:x3; val_offset:37155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37155*FLEN/8, x4, x1, x2) - -inst_12386: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737e0000; valaddr_reg:x3; val_offset:37158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37158*FLEN/8, x4, x1, x2) - -inst_12387: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737f0000; valaddr_reg:x3; val_offset:37161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37161*FLEN/8, x4, x1, x2) - -inst_12388: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737f8000; valaddr_reg:x3; val_offset:37164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37164*FLEN/8, x4, x1, x2) - -inst_12389: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737fc000; valaddr_reg:x3; val_offset:37167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37167*FLEN/8, x4, x1, x2) - -inst_12390: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737fe000; valaddr_reg:x3; val_offset:37170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37170*FLEN/8, x4, x1, x2) - -inst_12391: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737ff000; valaddr_reg:x3; val_offset:37173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37173*FLEN/8, x4, x1, x2) - -inst_12392: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737ff800; valaddr_reg:x3; val_offset:37176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37176*FLEN/8, x4, x1, x2) - -inst_12393: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737ffc00; valaddr_reg:x3; val_offset:37179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37179*FLEN/8, x4, x1, x2) - -inst_12394: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737ffe00; valaddr_reg:x3; val_offset:37182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37182*FLEN/8, x4, x1, x2) - -inst_12395: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737fff00; valaddr_reg:x3; val_offset:37185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37185*FLEN/8, x4, x1, x2) - -inst_12396: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737fff80; valaddr_reg:x3; val_offset:37188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37188*FLEN/8, x4, x1, x2) - -inst_12397: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737fffc0; valaddr_reg:x3; val_offset:37191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37191*FLEN/8, x4, x1, x2) - -inst_12398: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737fffe0; valaddr_reg:x3; val_offset:37194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37194*FLEN/8, x4, x1, x2) - -inst_12399: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737ffff0; valaddr_reg:x3; val_offset:37197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37197*FLEN/8, x4, x1, x2) - -inst_12400: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737ffff8; valaddr_reg:x3; val_offset:37200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37200*FLEN/8, x4, x1, x2) - -inst_12401: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737ffffc; valaddr_reg:x3; val_offset:37203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37203*FLEN/8, x4, x1, x2) - -inst_12402: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737ffffe; valaddr_reg:x3; val_offset:37206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37206*FLEN/8, x4, x1, x2) - -inst_12403: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x737fffff; valaddr_reg:x3; val_offset:37209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37209*FLEN/8, x4, x1, x2) - -inst_12404: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f000001; valaddr_reg:x3; val_offset:37212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37212*FLEN/8, x4, x1, x2) - -inst_12405: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f000003; valaddr_reg:x3; val_offset:37215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37215*FLEN/8, x4, x1, x2) - -inst_12406: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f000007; valaddr_reg:x3; val_offset:37218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37218*FLEN/8, x4, x1, x2) - -inst_12407: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f199999; valaddr_reg:x3; val_offset:37221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37221*FLEN/8, x4, x1, x2) - -inst_12408: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f249249; valaddr_reg:x3; val_offset:37224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37224*FLEN/8, x4, x1, x2) - -inst_12409: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f333333; valaddr_reg:x3; val_offset:37227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37227*FLEN/8, x4, x1, x2) - -inst_12410: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:37230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37230*FLEN/8, x4, x1, x2) - -inst_12411: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:37233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37233*FLEN/8, x4, x1, x2) - -inst_12412: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f444444; valaddr_reg:x3; val_offset:37236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37236*FLEN/8, x4, x1, x2) - -inst_12413: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:37239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37239*FLEN/8, x4, x1, x2) - -inst_12414: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:37242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37242*FLEN/8, x4, x1, x2) - -inst_12415: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f666666; valaddr_reg:x3; val_offset:37245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37245*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_98) - -inst_12416: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:37248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37248*FLEN/8, x4, x1, x2) - -inst_12417: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:37251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37251*FLEN/8, x4, x1, x2) - -inst_12418: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:37254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37254*FLEN/8, x4, x1, x2) - -inst_12419: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:37257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37257*FLEN/8, x4, x1, x2) - -inst_12420: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2800000; valaddr_reg:x3; val_offset:37260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37260*FLEN/8, x4, x1, x2) - -inst_12421: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2800001; valaddr_reg:x3; val_offset:37263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37263*FLEN/8, x4, x1, x2) - -inst_12422: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2800003; valaddr_reg:x3; val_offset:37266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37266*FLEN/8, x4, x1, x2) - -inst_12423: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2800007; valaddr_reg:x3; val_offset:37269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37269*FLEN/8, x4, x1, x2) - -inst_12424: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa280000f; valaddr_reg:x3; val_offset:37272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37272*FLEN/8, x4, x1, x2) - -inst_12425: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa280001f; valaddr_reg:x3; val_offset:37275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37275*FLEN/8, x4, x1, x2) - -inst_12426: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa280003f; valaddr_reg:x3; val_offset:37278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37278*FLEN/8, x4, x1, x2) - -inst_12427: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa280007f; valaddr_reg:x3; val_offset:37281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37281*FLEN/8, x4, x1, x2) - -inst_12428: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa28000ff; valaddr_reg:x3; val_offset:37284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37284*FLEN/8, x4, x1, x2) - -inst_12429: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa28001ff; valaddr_reg:x3; val_offset:37287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37287*FLEN/8, x4, x1, x2) - -inst_12430: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa28003ff; valaddr_reg:x3; val_offset:37290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37290*FLEN/8, x4, x1, x2) - -inst_12431: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa28007ff; valaddr_reg:x3; val_offset:37293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37293*FLEN/8, x4, x1, x2) - -inst_12432: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2800fff; valaddr_reg:x3; val_offset:37296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37296*FLEN/8, x4, x1, x2) - -inst_12433: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2801fff; valaddr_reg:x3; val_offset:37299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37299*FLEN/8, x4, x1, x2) - -inst_12434: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2803fff; valaddr_reg:x3; val_offset:37302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37302*FLEN/8, x4, x1, x2) - -inst_12435: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2807fff; valaddr_reg:x3; val_offset:37305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37305*FLEN/8, x4, x1, x2) - -inst_12436: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa280ffff; valaddr_reg:x3; val_offset:37308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37308*FLEN/8, x4, x1, x2) - -inst_12437: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa281ffff; valaddr_reg:x3; val_offset:37311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37311*FLEN/8, x4, x1, x2) - -inst_12438: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa283ffff; valaddr_reg:x3; val_offset:37314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37314*FLEN/8, x4, x1, x2) - -inst_12439: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa287ffff; valaddr_reg:x3; val_offset:37317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37317*FLEN/8, x4, x1, x2) - -inst_12440: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa28fffff; valaddr_reg:x3; val_offset:37320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37320*FLEN/8, x4, x1, x2) - -inst_12441: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa29fffff; valaddr_reg:x3; val_offset:37323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37323*FLEN/8, x4, x1, x2) - -inst_12442: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2bfffff; valaddr_reg:x3; val_offset:37326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37326*FLEN/8, x4, x1, x2) - -inst_12443: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2c00000; valaddr_reg:x3; val_offset:37329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37329*FLEN/8, x4, x1, x2) - -inst_12444: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2e00000; valaddr_reg:x3; val_offset:37332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37332*FLEN/8, x4, x1, x2) - -inst_12445: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2f00000; valaddr_reg:x3; val_offset:37335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37335*FLEN/8, x4, x1, x2) - -inst_12446: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2f80000; valaddr_reg:x3; val_offset:37338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37338*FLEN/8, x4, x1, x2) - -inst_12447: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fc0000; valaddr_reg:x3; val_offset:37341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37341*FLEN/8, x4, x1, x2) - -inst_12448: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fe0000; valaddr_reg:x3; val_offset:37344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37344*FLEN/8, x4, x1, x2) - -inst_12449: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ff0000; valaddr_reg:x3; val_offset:37347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37347*FLEN/8, x4, x1, x2) - -inst_12450: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ff8000; valaddr_reg:x3; val_offset:37350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37350*FLEN/8, x4, x1, x2) - -inst_12451: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ffc000; valaddr_reg:x3; val_offset:37353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37353*FLEN/8, x4, x1, x2) - -inst_12452: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ffe000; valaddr_reg:x3; val_offset:37356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37356*FLEN/8, x4, x1, x2) - -inst_12453: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fff000; valaddr_reg:x3; val_offset:37359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37359*FLEN/8, x4, x1, x2) - -inst_12454: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fff800; valaddr_reg:x3; val_offset:37362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37362*FLEN/8, x4, x1, x2) - -inst_12455: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fffc00; valaddr_reg:x3; val_offset:37365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37365*FLEN/8, x4, x1, x2) - -inst_12456: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fffe00; valaddr_reg:x3; val_offset:37368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37368*FLEN/8, x4, x1, x2) - -inst_12457: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ffff00; valaddr_reg:x3; val_offset:37371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37371*FLEN/8, x4, x1, x2) - -inst_12458: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ffff80; valaddr_reg:x3; val_offset:37374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37374*FLEN/8, x4, x1, x2) - -inst_12459: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ffffc0; valaddr_reg:x3; val_offset:37377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37377*FLEN/8, x4, x1, x2) - -inst_12460: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ffffe0; valaddr_reg:x3; val_offset:37380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37380*FLEN/8, x4, x1, x2) - -inst_12461: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fffff0; valaddr_reg:x3; val_offset:37383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37383*FLEN/8, x4, x1, x2) - -inst_12462: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fffff8; valaddr_reg:x3; val_offset:37386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37386*FLEN/8, x4, x1, x2) - -inst_12463: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fffffc; valaddr_reg:x3; val_offset:37389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37389*FLEN/8, x4, x1, x2) - -inst_12464: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2fffffe; valaddr_reg:x3; val_offset:37392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37392*FLEN/8, x4, x1, x2) - -inst_12465: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xa2ffffff; valaddr_reg:x3; val_offset:37395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37395*FLEN/8, x4, x1, x2) - -inst_12466: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbf800001; valaddr_reg:x3; val_offset:37398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37398*FLEN/8, x4, x1, x2) - -inst_12467: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbf800003; valaddr_reg:x3; val_offset:37401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37401*FLEN/8, x4, x1, x2) - -inst_12468: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbf800007; valaddr_reg:x3; val_offset:37404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37404*FLEN/8, x4, x1, x2) - -inst_12469: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbf999999; valaddr_reg:x3; val_offset:37407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37407*FLEN/8, x4, x1, x2) - -inst_12470: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:37410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37410*FLEN/8, x4, x1, x2) - -inst_12471: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:37413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37413*FLEN/8, x4, x1, x2) - -inst_12472: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:37416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37416*FLEN/8, x4, x1, x2) - -inst_12473: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:37419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37419*FLEN/8, x4, x1, x2) - -inst_12474: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:37422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37422*FLEN/8, x4, x1, x2) - -inst_12475: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:37425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37425*FLEN/8, x4, x1, x2) - -inst_12476: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:37428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37428*FLEN/8, x4, x1, x2) - -inst_12477: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:37431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37431*FLEN/8, x4, x1, x2) - -inst_12478: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:37434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37434*FLEN/8, x4, x1, x2) - -inst_12479: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:37437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37437*FLEN/8, x4, x1, x2) - -inst_12480: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:37440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37440*FLEN/8, x4, x1, x2) - -inst_12481: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:37443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37443*FLEN/8, x4, x1, x2) - -inst_12482: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbf800001; valaddr_reg:x3; val_offset:37446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37446*FLEN/8, x4, x1, x2) - -inst_12483: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbf800003; valaddr_reg:x3; val_offset:37449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37449*FLEN/8, x4, x1, x2) - -inst_12484: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbf800007; valaddr_reg:x3; val_offset:37452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37452*FLEN/8, x4, x1, x2) - -inst_12485: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbf999999; valaddr_reg:x3; val_offset:37455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37455*FLEN/8, x4, x1, x2) - -inst_12486: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:37458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37458*FLEN/8, x4, x1, x2) - -inst_12487: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:37461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37461*FLEN/8, x4, x1, x2) - -inst_12488: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:37464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37464*FLEN/8, x4, x1, x2) - -inst_12489: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:37467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37467*FLEN/8, x4, x1, x2) - -inst_12490: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:37470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37470*FLEN/8, x4, x1, x2) - -inst_12491: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:37473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37473*FLEN/8, x4, x1, x2) - -inst_12492: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:37476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37476*FLEN/8, x4, x1, x2) - -inst_12493: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:37479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37479*FLEN/8, x4, x1, x2) - -inst_12494: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:37482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37482*FLEN/8, x4, x1, x2) - -inst_12495: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:37485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37485*FLEN/8, x4, x1, x2) - -inst_12496: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:37488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37488*FLEN/8, x4, x1, x2) - -inst_12497: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:37491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37491*FLEN/8, x4, x1, x2) - -inst_12498: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5000000; valaddr_reg:x3; val_offset:37494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37494*FLEN/8, x4, x1, x2) - -inst_12499: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5000001; valaddr_reg:x3; val_offset:37497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37497*FLEN/8, x4, x1, x2) - -inst_12500: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5000003; valaddr_reg:x3; val_offset:37500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37500*FLEN/8, x4, x1, x2) - -inst_12501: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5000007; valaddr_reg:x3; val_offset:37503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37503*FLEN/8, x4, x1, x2) - -inst_12502: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc500000f; valaddr_reg:x3; val_offset:37506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37506*FLEN/8, x4, x1, x2) - -inst_12503: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc500001f; valaddr_reg:x3; val_offset:37509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37509*FLEN/8, x4, x1, x2) - -inst_12504: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc500003f; valaddr_reg:x3; val_offset:37512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37512*FLEN/8, x4, x1, x2) - -inst_12505: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc500007f; valaddr_reg:x3; val_offset:37515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37515*FLEN/8, x4, x1, x2) - -inst_12506: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc50000ff; valaddr_reg:x3; val_offset:37518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37518*FLEN/8, x4, x1, x2) - -inst_12507: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc50001ff; valaddr_reg:x3; val_offset:37521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37521*FLEN/8, x4, x1, x2) - -inst_12508: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc50003ff; valaddr_reg:x3; val_offset:37524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37524*FLEN/8, x4, x1, x2) - -inst_12509: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc50007ff; valaddr_reg:x3; val_offset:37527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37527*FLEN/8, x4, x1, x2) - -inst_12510: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5000fff; valaddr_reg:x3; val_offset:37530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37530*FLEN/8, x4, x1, x2) - -inst_12511: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5001fff; valaddr_reg:x3; val_offset:37533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37533*FLEN/8, x4, x1, x2) - -inst_12512: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5003fff; valaddr_reg:x3; val_offset:37536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37536*FLEN/8, x4, x1, x2) - -inst_12513: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5007fff; valaddr_reg:x3; val_offset:37539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37539*FLEN/8, x4, x1, x2) - -inst_12514: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc500ffff; valaddr_reg:x3; val_offset:37542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37542*FLEN/8, x4, x1, x2) - -inst_12515: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc501ffff; valaddr_reg:x3; val_offset:37545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37545*FLEN/8, x4, x1, x2) - -inst_12516: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc503ffff; valaddr_reg:x3; val_offset:37548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37548*FLEN/8, x4, x1, x2) - -inst_12517: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc507ffff; valaddr_reg:x3; val_offset:37551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37551*FLEN/8, x4, x1, x2) - -inst_12518: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc50fffff; valaddr_reg:x3; val_offset:37554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37554*FLEN/8, x4, x1, x2) - -inst_12519: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc51fffff; valaddr_reg:x3; val_offset:37557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37557*FLEN/8, x4, x1, x2) - -inst_12520: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc53fffff; valaddr_reg:x3; val_offset:37560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37560*FLEN/8, x4, x1, x2) - -inst_12521: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5400000; valaddr_reg:x3; val_offset:37563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37563*FLEN/8, x4, x1, x2) - -inst_12522: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5600000; valaddr_reg:x3; val_offset:37566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37566*FLEN/8, x4, x1, x2) - -inst_12523: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5700000; valaddr_reg:x3; val_offset:37569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37569*FLEN/8, x4, x1, x2) - -inst_12524: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc5780000; valaddr_reg:x3; val_offset:37572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37572*FLEN/8, x4, x1, x2) - -inst_12525: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57c0000; valaddr_reg:x3; val_offset:37575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37575*FLEN/8, x4, x1, x2) - -inst_12526: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57e0000; valaddr_reg:x3; val_offset:37578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37578*FLEN/8, x4, x1, x2) - -inst_12527: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57f0000; valaddr_reg:x3; val_offset:37581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37581*FLEN/8, x4, x1, x2) - -inst_12528: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57f8000; valaddr_reg:x3; val_offset:37584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37584*FLEN/8, x4, x1, x2) - -inst_12529: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57fc000; valaddr_reg:x3; val_offset:37587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37587*FLEN/8, x4, x1, x2) - -inst_12530: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57fe000; valaddr_reg:x3; val_offset:37590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37590*FLEN/8, x4, x1, x2) - -inst_12531: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57ff000; valaddr_reg:x3; val_offset:37593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37593*FLEN/8, x4, x1, x2) - -inst_12532: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57ff800; valaddr_reg:x3; val_offset:37596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37596*FLEN/8, x4, x1, x2) - -inst_12533: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57ffc00; valaddr_reg:x3; val_offset:37599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37599*FLEN/8, x4, x1, x2) - -inst_12534: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57ffe00; valaddr_reg:x3; val_offset:37602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37602*FLEN/8, x4, x1, x2) - -inst_12535: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57fff00; valaddr_reg:x3; val_offset:37605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37605*FLEN/8, x4, x1, x2) - -inst_12536: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57fff80; valaddr_reg:x3; val_offset:37608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37608*FLEN/8, x4, x1, x2) - -inst_12537: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57fffc0; valaddr_reg:x3; val_offset:37611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37611*FLEN/8, x4, x1, x2) - -inst_12538: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57fffe0; valaddr_reg:x3; val_offset:37614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37614*FLEN/8, x4, x1, x2) - -inst_12539: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57ffff0; valaddr_reg:x3; val_offset:37617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37617*FLEN/8, x4, x1, x2) - -inst_12540: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57ffff8; valaddr_reg:x3; val_offset:37620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37620*FLEN/8, x4, x1, x2) - -inst_12541: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57ffffc; valaddr_reg:x3; val_offset:37623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37623*FLEN/8, x4, x1, x2) - -inst_12542: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57ffffe; valaddr_reg:x3; val_offset:37626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37626*FLEN/8, x4, x1, x2) - -inst_12543: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; -op3val:0xc57fffff; valaddr_reg:x3; val_offset:37629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37629*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_99) - -inst_12544: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:37632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37632*FLEN/8, x4, x1, x2) - -inst_12545: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:37635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37635*FLEN/8, x4, x1, x2) - -inst_12546: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:37638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37638*FLEN/8, x4, x1, x2) - -inst_12547: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:37641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37641*FLEN/8, x4, x1, x2) - -inst_12548: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:37644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37644*FLEN/8, x4, x1, x2) - -inst_12549: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:37647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37647*FLEN/8, x4, x1, x2) - -inst_12550: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:37650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37650*FLEN/8, x4, x1, x2) - -inst_12551: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:37653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37653*FLEN/8, x4, x1, x2) - -inst_12552: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:37656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37656*FLEN/8, x4, x1, x2) - -inst_12553: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:37659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37659*FLEN/8, x4, x1, x2) - -inst_12554: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:37662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37662*FLEN/8, x4, x1, x2) - -inst_12555: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:37665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37665*FLEN/8, x4, x1, x2) - -inst_12556: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:37668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37668*FLEN/8, x4, x1, x2) - -inst_12557: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:37671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37671*FLEN/8, x4, x1, x2) - -inst_12558: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:37674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37674*FLEN/8, x4, x1, x2) - -inst_12559: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:37677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37677*FLEN/8, x4, x1, x2) - -inst_12560: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc000000; valaddr_reg:x3; val_offset:37680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37680*FLEN/8, x4, x1, x2) - -inst_12561: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc000001; valaddr_reg:x3; val_offset:37683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37683*FLEN/8, x4, x1, x2) - -inst_12562: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc000003; valaddr_reg:x3; val_offset:37686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37686*FLEN/8, x4, x1, x2) - -inst_12563: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc000007; valaddr_reg:x3; val_offset:37689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37689*FLEN/8, x4, x1, x2) - -inst_12564: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc00000f; valaddr_reg:x3; val_offset:37692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37692*FLEN/8, x4, x1, x2) - -inst_12565: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc00001f; valaddr_reg:x3; val_offset:37695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37695*FLEN/8, x4, x1, x2) - -inst_12566: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc00003f; valaddr_reg:x3; val_offset:37698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37698*FLEN/8, x4, x1, x2) - -inst_12567: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc00007f; valaddr_reg:x3; val_offset:37701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37701*FLEN/8, x4, x1, x2) - -inst_12568: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc0000ff; valaddr_reg:x3; val_offset:37704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37704*FLEN/8, x4, x1, x2) - -inst_12569: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc0001ff; valaddr_reg:x3; val_offset:37707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37707*FLEN/8, x4, x1, x2) - -inst_12570: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc0003ff; valaddr_reg:x3; val_offset:37710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37710*FLEN/8, x4, x1, x2) - -inst_12571: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc0007ff; valaddr_reg:x3; val_offset:37713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37713*FLEN/8, x4, x1, x2) - -inst_12572: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc000fff; valaddr_reg:x3; val_offset:37716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37716*FLEN/8, x4, x1, x2) - -inst_12573: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc001fff; valaddr_reg:x3; val_offset:37719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37719*FLEN/8, x4, x1, x2) - -inst_12574: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc003fff; valaddr_reg:x3; val_offset:37722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37722*FLEN/8, x4, x1, x2) - -inst_12575: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc007fff; valaddr_reg:x3; val_offset:37725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37725*FLEN/8, x4, x1, x2) - -inst_12576: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc00ffff; valaddr_reg:x3; val_offset:37728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37728*FLEN/8, x4, x1, x2) - -inst_12577: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc01ffff; valaddr_reg:x3; val_offset:37731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37731*FLEN/8, x4, x1, x2) - -inst_12578: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc03ffff; valaddr_reg:x3; val_offset:37734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37734*FLEN/8, x4, x1, x2) - -inst_12579: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc07ffff; valaddr_reg:x3; val_offset:37737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37737*FLEN/8, x4, x1, x2) - -inst_12580: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc0fffff; valaddr_reg:x3; val_offset:37740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37740*FLEN/8, x4, x1, x2) - -inst_12581: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc1fffff; valaddr_reg:x3; val_offset:37743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37743*FLEN/8, x4, x1, x2) - -inst_12582: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc3fffff; valaddr_reg:x3; val_offset:37746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37746*FLEN/8, x4, x1, x2) - -inst_12583: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc400000; valaddr_reg:x3; val_offset:37749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37749*FLEN/8, x4, x1, x2) - -inst_12584: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc600000; valaddr_reg:x3; val_offset:37752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37752*FLEN/8, x4, x1, x2) - -inst_12585: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc700000; valaddr_reg:x3; val_offset:37755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37755*FLEN/8, x4, x1, x2) - -inst_12586: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc780000; valaddr_reg:x3; val_offset:37758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37758*FLEN/8, x4, x1, x2) - -inst_12587: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7c0000; valaddr_reg:x3; val_offset:37761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37761*FLEN/8, x4, x1, x2) - -inst_12588: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7e0000; valaddr_reg:x3; val_offset:37764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37764*FLEN/8, x4, x1, x2) - -inst_12589: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7f0000; valaddr_reg:x3; val_offset:37767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37767*FLEN/8, x4, x1, x2) - -inst_12590: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7f8000; valaddr_reg:x3; val_offset:37770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37770*FLEN/8, x4, x1, x2) - -inst_12591: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7fc000; valaddr_reg:x3; val_offset:37773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37773*FLEN/8, x4, x1, x2) - -inst_12592: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7fe000; valaddr_reg:x3; val_offset:37776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37776*FLEN/8, x4, x1, x2) - -inst_12593: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7ff000; valaddr_reg:x3; val_offset:37779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37779*FLEN/8, x4, x1, x2) - -inst_12594: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7ff800; valaddr_reg:x3; val_offset:37782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37782*FLEN/8, x4, x1, x2) - -inst_12595: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7ffc00; valaddr_reg:x3; val_offset:37785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37785*FLEN/8, x4, x1, x2) - -inst_12596: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7ffe00; valaddr_reg:x3; val_offset:37788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37788*FLEN/8, x4, x1, x2) - -inst_12597: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7fff00; valaddr_reg:x3; val_offset:37791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37791*FLEN/8, x4, x1, x2) - -inst_12598: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7fff80; valaddr_reg:x3; val_offset:37794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37794*FLEN/8, x4, x1, x2) - -inst_12599: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7fffc0; valaddr_reg:x3; val_offset:37797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37797*FLEN/8, x4, x1, x2) - -inst_12600: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7fffe0; valaddr_reg:x3; val_offset:37800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37800*FLEN/8, x4, x1, x2) - -inst_12601: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7ffff0; valaddr_reg:x3; val_offset:37803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37803*FLEN/8, x4, x1, x2) - -inst_12602: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7ffff8; valaddr_reg:x3; val_offset:37806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37806*FLEN/8, x4, x1, x2) - -inst_12603: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7ffffc; valaddr_reg:x3; val_offset:37809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37809*FLEN/8, x4, x1, x2) - -inst_12604: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7ffffe; valaddr_reg:x3; val_offset:37812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37812*FLEN/8, x4, x1, x2) - -inst_12605: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; -op3val:0xc7fffff; valaddr_reg:x3; val_offset:37815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37815*FLEN/8, x4, x1, x2) - -inst_12606: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:37818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37818*FLEN/8, x4, x1, x2) - -inst_12607: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:37821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37821*FLEN/8, x4, x1, x2) - -inst_12608: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:37824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37824*FLEN/8, x4, x1, x2) - -inst_12609: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:37827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37827*FLEN/8, x4, x1, x2) - -inst_12610: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:37830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37830*FLEN/8, x4, x1, x2) - -inst_12611: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:37833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37833*FLEN/8, x4, x1, x2) - -inst_12612: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:37836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37836*FLEN/8, x4, x1, x2) - -inst_12613: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:37839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37839*FLEN/8, x4, x1, x2) - -inst_12614: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:37842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37842*FLEN/8, x4, x1, x2) - -inst_12615: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:37845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37845*FLEN/8, x4, x1, x2) - -inst_12616: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:37848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37848*FLEN/8, x4, x1, x2) - -inst_12617: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:37851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37851*FLEN/8, x4, x1, x2) - -inst_12618: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:37854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37854*FLEN/8, x4, x1, x2) - -inst_12619: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:37857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37857*FLEN/8, x4, x1, x2) - -inst_12620: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:37860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37860*FLEN/8, x4, x1, x2) - -inst_12621: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:37863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37863*FLEN/8, x4, x1, x2) - -inst_12622: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87800000; valaddr_reg:x3; val_offset:37866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37866*FLEN/8, x4, x1, x2) - -inst_12623: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87800001; valaddr_reg:x3; val_offset:37869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37869*FLEN/8, x4, x1, x2) - -inst_12624: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87800003; valaddr_reg:x3; val_offset:37872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37872*FLEN/8, x4, x1, x2) - -inst_12625: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87800007; valaddr_reg:x3; val_offset:37875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37875*FLEN/8, x4, x1, x2) - -inst_12626: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8780000f; valaddr_reg:x3; val_offset:37878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37878*FLEN/8, x4, x1, x2) - -inst_12627: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8780001f; valaddr_reg:x3; val_offset:37881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37881*FLEN/8, x4, x1, x2) - -inst_12628: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8780003f; valaddr_reg:x3; val_offset:37884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37884*FLEN/8, x4, x1, x2) - -inst_12629: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8780007f; valaddr_reg:x3; val_offset:37887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37887*FLEN/8, x4, x1, x2) - -inst_12630: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x878000ff; valaddr_reg:x3; val_offset:37890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37890*FLEN/8, x4, x1, x2) - -inst_12631: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x878001ff; valaddr_reg:x3; val_offset:37893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37893*FLEN/8, x4, x1, x2) - -inst_12632: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x878003ff; valaddr_reg:x3; val_offset:37896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37896*FLEN/8, x4, x1, x2) - -inst_12633: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x878007ff; valaddr_reg:x3; val_offset:37899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37899*FLEN/8, x4, x1, x2) - -inst_12634: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87800fff; valaddr_reg:x3; val_offset:37902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37902*FLEN/8, x4, x1, x2) - -inst_12635: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87801fff; valaddr_reg:x3; val_offset:37905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37905*FLEN/8, x4, x1, x2) - -inst_12636: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87803fff; valaddr_reg:x3; val_offset:37908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37908*FLEN/8, x4, x1, x2) - -inst_12637: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87807fff; valaddr_reg:x3; val_offset:37911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37911*FLEN/8, x4, x1, x2) - -inst_12638: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8780ffff; valaddr_reg:x3; val_offset:37914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37914*FLEN/8, x4, x1, x2) - -inst_12639: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8781ffff; valaddr_reg:x3; val_offset:37917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37917*FLEN/8, x4, x1, x2) - -inst_12640: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8783ffff; valaddr_reg:x3; val_offset:37920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37920*FLEN/8, x4, x1, x2) - -inst_12641: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x8787ffff; valaddr_reg:x3; val_offset:37923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37923*FLEN/8, x4, x1, x2) - -inst_12642: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x878fffff; valaddr_reg:x3; val_offset:37926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37926*FLEN/8, x4, x1, x2) - -inst_12643: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x879fffff; valaddr_reg:x3; val_offset:37929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37929*FLEN/8, x4, x1, x2) - -inst_12644: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87bfffff; valaddr_reg:x3; val_offset:37932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37932*FLEN/8, x4, x1, x2) - -inst_12645: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87c00000; valaddr_reg:x3; val_offset:37935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37935*FLEN/8, x4, x1, x2) - -inst_12646: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87e00000; valaddr_reg:x3; val_offset:37938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37938*FLEN/8, x4, x1, x2) - -inst_12647: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87f00000; valaddr_reg:x3; val_offset:37941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37941*FLEN/8, x4, x1, x2) - -inst_12648: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87f80000; valaddr_reg:x3; val_offset:37944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37944*FLEN/8, x4, x1, x2) - -inst_12649: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fc0000; valaddr_reg:x3; val_offset:37947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37947*FLEN/8, x4, x1, x2) - -inst_12650: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fe0000; valaddr_reg:x3; val_offset:37950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37950*FLEN/8, x4, x1, x2) - -inst_12651: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ff0000; valaddr_reg:x3; val_offset:37953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37953*FLEN/8, x4, x1, x2) - -inst_12652: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ff8000; valaddr_reg:x3; val_offset:37956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37956*FLEN/8, x4, x1, x2) - -inst_12653: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ffc000; valaddr_reg:x3; val_offset:37959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37959*FLEN/8, x4, x1, x2) - -inst_12654: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ffe000; valaddr_reg:x3; val_offset:37962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37962*FLEN/8, x4, x1, x2) - -inst_12655: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fff000; valaddr_reg:x3; val_offset:37965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37965*FLEN/8, x4, x1, x2) - -inst_12656: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fff800; valaddr_reg:x3; val_offset:37968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37968*FLEN/8, x4, x1, x2) - -inst_12657: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fffc00; valaddr_reg:x3; val_offset:37971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37971*FLEN/8, x4, x1, x2) - -inst_12658: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fffe00; valaddr_reg:x3; val_offset:37974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37974*FLEN/8, x4, x1, x2) - -inst_12659: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ffff00; valaddr_reg:x3; val_offset:37977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37977*FLEN/8, x4, x1, x2) - -inst_12660: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ffff80; valaddr_reg:x3; val_offset:37980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37980*FLEN/8, x4, x1, x2) - -inst_12661: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ffffc0; valaddr_reg:x3; val_offset:37983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37983*FLEN/8, x4, x1, x2) - -inst_12662: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ffffe0; valaddr_reg:x3; val_offset:37986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37986*FLEN/8, x4, x1, x2) - -inst_12663: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fffff0; valaddr_reg:x3; val_offset:37989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37989*FLEN/8, x4, x1, x2) - -inst_12664: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fffff8; valaddr_reg:x3; val_offset:37992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37992*FLEN/8, x4, x1, x2) - -inst_12665: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fffffc; valaddr_reg:x3; val_offset:37995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37995*FLEN/8, x4, x1, x2) - -inst_12666: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87fffffe; valaddr_reg:x3; val_offset:37998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37998*FLEN/8, x4, x1, x2) - -inst_12667: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; -op3val:0x87ffffff; valaddr_reg:x3; val_offset:38001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38001*FLEN/8, x4, x1, x2) - -inst_12668: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf000000; valaddr_reg:x3; val_offset:38004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38004*FLEN/8, x4, x1, x2) - -inst_12669: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf000001; valaddr_reg:x3; val_offset:38007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38007*FLEN/8, x4, x1, x2) - -inst_12670: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf000003; valaddr_reg:x3; val_offset:38010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38010*FLEN/8, x4, x1, x2) - -inst_12671: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf000007; valaddr_reg:x3; val_offset:38013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38013*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_100) - -inst_12672: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf00000f; valaddr_reg:x3; val_offset:38016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38016*FLEN/8, x4, x1, x2) - -inst_12673: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf00001f; valaddr_reg:x3; val_offset:38019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38019*FLEN/8, x4, x1, x2) - -inst_12674: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf00003f; valaddr_reg:x3; val_offset:38022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38022*FLEN/8, x4, x1, x2) - -inst_12675: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf00007f; valaddr_reg:x3; val_offset:38025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38025*FLEN/8, x4, x1, x2) - -inst_12676: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf0000ff; valaddr_reg:x3; val_offset:38028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38028*FLEN/8, x4, x1, x2) - -inst_12677: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf0001ff; valaddr_reg:x3; val_offset:38031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38031*FLEN/8, x4, x1, x2) - -inst_12678: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf0003ff; valaddr_reg:x3; val_offset:38034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38034*FLEN/8, x4, x1, x2) - -inst_12679: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf0007ff; valaddr_reg:x3; val_offset:38037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38037*FLEN/8, x4, x1, x2) - -inst_12680: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf000fff; valaddr_reg:x3; val_offset:38040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38040*FLEN/8, x4, x1, x2) - -inst_12681: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf001fff; valaddr_reg:x3; val_offset:38043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38043*FLEN/8, x4, x1, x2) - -inst_12682: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf003fff; valaddr_reg:x3; val_offset:38046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38046*FLEN/8, x4, x1, x2) - -inst_12683: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf007fff; valaddr_reg:x3; val_offset:38049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38049*FLEN/8, x4, x1, x2) - -inst_12684: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf00ffff; valaddr_reg:x3; val_offset:38052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38052*FLEN/8, x4, x1, x2) - -inst_12685: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf01ffff; valaddr_reg:x3; val_offset:38055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38055*FLEN/8, x4, x1, x2) - -inst_12686: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf03ffff; valaddr_reg:x3; val_offset:38058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38058*FLEN/8, x4, x1, x2) - -inst_12687: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf07ffff; valaddr_reg:x3; val_offset:38061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38061*FLEN/8, x4, x1, x2) - -inst_12688: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf0fffff; valaddr_reg:x3; val_offset:38064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38064*FLEN/8, x4, x1, x2) - -inst_12689: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf1fffff; valaddr_reg:x3; val_offset:38067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38067*FLEN/8, x4, x1, x2) - -inst_12690: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf3fffff; valaddr_reg:x3; val_offset:38070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38070*FLEN/8, x4, x1, x2) - -inst_12691: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf400000; valaddr_reg:x3; val_offset:38073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38073*FLEN/8, x4, x1, x2) - -inst_12692: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf600000; valaddr_reg:x3; val_offset:38076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38076*FLEN/8, x4, x1, x2) - -inst_12693: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf700000; valaddr_reg:x3; val_offset:38079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38079*FLEN/8, x4, x1, x2) - -inst_12694: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf780000; valaddr_reg:x3; val_offset:38082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38082*FLEN/8, x4, x1, x2) - -inst_12695: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7c0000; valaddr_reg:x3; val_offset:38085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38085*FLEN/8, x4, x1, x2) - -inst_12696: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7e0000; valaddr_reg:x3; val_offset:38088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38088*FLEN/8, x4, x1, x2) - -inst_12697: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7f0000; valaddr_reg:x3; val_offset:38091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38091*FLEN/8, x4, x1, x2) - -inst_12698: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7f8000; valaddr_reg:x3; val_offset:38094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38094*FLEN/8, x4, x1, x2) - -inst_12699: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7fc000; valaddr_reg:x3; val_offset:38097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38097*FLEN/8, x4, x1, x2) - -inst_12700: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7fe000; valaddr_reg:x3; val_offset:38100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38100*FLEN/8, x4, x1, x2) - -inst_12701: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7ff000; valaddr_reg:x3; val_offset:38103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38103*FLEN/8, x4, x1, x2) - -inst_12702: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7ff800; valaddr_reg:x3; val_offset:38106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38106*FLEN/8, x4, x1, x2) - -inst_12703: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7ffc00; valaddr_reg:x3; val_offset:38109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38109*FLEN/8, x4, x1, x2) - -inst_12704: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7ffe00; valaddr_reg:x3; val_offset:38112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38112*FLEN/8, x4, x1, x2) - -inst_12705: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7fff00; valaddr_reg:x3; val_offset:38115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38115*FLEN/8, x4, x1, x2) - -inst_12706: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7fff80; valaddr_reg:x3; val_offset:38118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38118*FLEN/8, x4, x1, x2) - -inst_12707: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7fffc0; valaddr_reg:x3; val_offset:38121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38121*FLEN/8, x4, x1, x2) - -inst_12708: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7fffe0; valaddr_reg:x3; val_offset:38124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38124*FLEN/8, x4, x1, x2) - -inst_12709: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7ffff0; valaddr_reg:x3; val_offset:38127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38127*FLEN/8, x4, x1, x2) - -inst_12710: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7ffff8; valaddr_reg:x3; val_offset:38130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38130*FLEN/8, x4, x1, x2) - -inst_12711: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7ffffc; valaddr_reg:x3; val_offset:38133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38133*FLEN/8, x4, x1, x2) - -inst_12712: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7ffffe; valaddr_reg:x3; val_offset:38136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38136*FLEN/8, x4, x1, x2) - -inst_12713: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xdf7fffff; valaddr_reg:x3; val_offset:38139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38139*FLEN/8, x4, x1, x2) - -inst_12714: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff000001; valaddr_reg:x3; val_offset:38142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38142*FLEN/8, x4, x1, x2) - -inst_12715: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff000003; valaddr_reg:x3; val_offset:38145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38145*FLEN/8, x4, x1, x2) - -inst_12716: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff000007; valaddr_reg:x3; val_offset:38148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38148*FLEN/8, x4, x1, x2) - -inst_12717: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff199999; valaddr_reg:x3; val_offset:38151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38151*FLEN/8, x4, x1, x2) - -inst_12718: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff249249; valaddr_reg:x3; val_offset:38154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38154*FLEN/8, x4, x1, x2) - -inst_12719: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff333333; valaddr_reg:x3; val_offset:38157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38157*FLEN/8, x4, x1, x2) - -inst_12720: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:38160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38160*FLEN/8, x4, x1, x2) - -inst_12721: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:38163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38163*FLEN/8, x4, x1, x2) - -inst_12722: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff444444; valaddr_reg:x3; val_offset:38166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38166*FLEN/8, x4, x1, x2) - -inst_12723: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:38169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38169*FLEN/8, x4, x1, x2) - -inst_12724: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:38172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38172*FLEN/8, x4, x1, x2) - -inst_12725: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff666666; valaddr_reg:x3; val_offset:38175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38175*FLEN/8, x4, x1, x2) - -inst_12726: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:38178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38178*FLEN/8, x4, x1, x2) - -inst_12727: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:38181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38181*FLEN/8, x4, x1, x2) - -inst_12728: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:38184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38184*FLEN/8, x4, x1, x2) - -inst_12729: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:38187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38187*FLEN/8, x4, x1, x2) - -inst_12730: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:38190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38190*FLEN/8, x4, x1, x2) - -inst_12731: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:38193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38193*FLEN/8, x4, x1, x2) - -inst_12732: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:38196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38196*FLEN/8, x4, x1, x2) - -inst_12733: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:38199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38199*FLEN/8, x4, x1, x2) - -inst_12734: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:38202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38202*FLEN/8, x4, x1, x2) - -inst_12735: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:38205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38205*FLEN/8, x4, x1, x2) - -inst_12736: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:38208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38208*FLEN/8, x4, x1, x2) - -inst_12737: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:38211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38211*FLEN/8, x4, x1, x2) - -inst_12738: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:38214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38214*FLEN/8, x4, x1, x2) - -inst_12739: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:38217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38217*FLEN/8, x4, x1, x2) - -inst_12740: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:38220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38220*FLEN/8, x4, x1, x2) - -inst_12741: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:38223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38223*FLEN/8, x4, x1, x2) - -inst_12742: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:38226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38226*FLEN/8, x4, x1, x2) - -inst_12743: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:38229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38229*FLEN/8, x4, x1, x2) - -inst_12744: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:38232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38232*FLEN/8, x4, x1, x2) - -inst_12745: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:38235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38235*FLEN/8, x4, x1, x2) - -inst_12746: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1000000; valaddr_reg:x3; val_offset:38238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38238*FLEN/8, x4, x1, x2) - -inst_12747: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1000001; valaddr_reg:x3; val_offset:38241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38241*FLEN/8, x4, x1, x2) - -inst_12748: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1000003; valaddr_reg:x3; val_offset:38244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38244*FLEN/8, x4, x1, x2) - -inst_12749: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1000007; valaddr_reg:x3; val_offset:38247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38247*FLEN/8, x4, x1, x2) - -inst_12750: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x100000f; valaddr_reg:x3; val_offset:38250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38250*FLEN/8, x4, x1, x2) - -inst_12751: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x100001f; valaddr_reg:x3; val_offset:38253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38253*FLEN/8, x4, x1, x2) - -inst_12752: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x100003f; valaddr_reg:x3; val_offset:38256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38256*FLEN/8, x4, x1, x2) - -inst_12753: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x100007f; valaddr_reg:x3; val_offset:38259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38259*FLEN/8, x4, x1, x2) - -inst_12754: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x10000ff; valaddr_reg:x3; val_offset:38262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38262*FLEN/8, x4, x1, x2) - -inst_12755: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x10001ff; valaddr_reg:x3; val_offset:38265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38265*FLEN/8, x4, x1, x2) - -inst_12756: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x10003ff; valaddr_reg:x3; val_offset:38268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38268*FLEN/8, x4, x1, x2) - -inst_12757: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x10007ff; valaddr_reg:x3; val_offset:38271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38271*FLEN/8, x4, x1, x2) - -inst_12758: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1000fff; valaddr_reg:x3; val_offset:38274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38274*FLEN/8, x4, x1, x2) - -inst_12759: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1001fff; valaddr_reg:x3; val_offset:38277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38277*FLEN/8, x4, x1, x2) - -inst_12760: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1003fff; valaddr_reg:x3; val_offset:38280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38280*FLEN/8, x4, x1, x2) - -inst_12761: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1007fff; valaddr_reg:x3; val_offset:38283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38283*FLEN/8, x4, x1, x2) - -inst_12762: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x100ffff; valaddr_reg:x3; val_offset:38286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38286*FLEN/8, x4, x1, x2) - -inst_12763: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x101ffff; valaddr_reg:x3; val_offset:38289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38289*FLEN/8, x4, x1, x2) - -inst_12764: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x103ffff; valaddr_reg:x3; val_offset:38292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38292*FLEN/8, x4, x1, x2) - -inst_12765: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x107ffff; valaddr_reg:x3; val_offset:38295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38295*FLEN/8, x4, x1, x2) - -inst_12766: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x10fffff; valaddr_reg:x3; val_offset:38298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38298*FLEN/8, x4, x1, x2) - -inst_12767: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x11fffff; valaddr_reg:x3; val_offset:38301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38301*FLEN/8, x4, x1, x2) - -inst_12768: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x13fffff; valaddr_reg:x3; val_offset:38304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38304*FLEN/8, x4, x1, x2) - -inst_12769: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1400000; valaddr_reg:x3; val_offset:38307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38307*FLEN/8, x4, x1, x2) - -inst_12770: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1600000; valaddr_reg:x3; val_offset:38310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38310*FLEN/8, x4, x1, x2) - -inst_12771: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1700000; valaddr_reg:x3; val_offset:38313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38313*FLEN/8, x4, x1, x2) - -inst_12772: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x1780000; valaddr_reg:x3; val_offset:38316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38316*FLEN/8, x4, x1, x2) - -inst_12773: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17c0000; valaddr_reg:x3; val_offset:38319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38319*FLEN/8, x4, x1, x2) - -inst_12774: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17e0000; valaddr_reg:x3; val_offset:38322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38322*FLEN/8, x4, x1, x2) - -inst_12775: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17f0000; valaddr_reg:x3; val_offset:38325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38325*FLEN/8, x4, x1, x2) - -inst_12776: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17f8000; valaddr_reg:x3; val_offset:38328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38328*FLEN/8, x4, x1, x2) - -inst_12777: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17fc000; valaddr_reg:x3; val_offset:38331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38331*FLEN/8, x4, x1, x2) - -inst_12778: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17fe000; valaddr_reg:x3; val_offset:38334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38334*FLEN/8, x4, x1, x2) - -inst_12779: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17ff000; valaddr_reg:x3; val_offset:38337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38337*FLEN/8, x4, x1, x2) - -inst_12780: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17ff800; valaddr_reg:x3; val_offset:38340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38340*FLEN/8, x4, x1, x2) - -inst_12781: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17ffc00; valaddr_reg:x3; val_offset:38343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38343*FLEN/8, x4, x1, x2) - -inst_12782: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17ffe00; valaddr_reg:x3; val_offset:38346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38346*FLEN/8, x4, x1, x2) - -inst_12783: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17fff00; valaddr_reg:x3; val_offset:38349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38349*FLEN/8, x4, x1, x2) - -inst_12784: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17fff80; valaddr_reg:x3; val_offset:38352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38352*FLEN/8, x4, x1, x2) - -inst_12785: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17fffc0; valaddr_reg:x3; val_offset:38355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38355*FLEN/8, x4, x1, x2) - -inst_12786: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17fffe0; valaddr_reg:x3; val_offset:38358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38358*FLEN/8, x4, x1, x2) - -inst_12787: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17ffff0; valaddr_reg:x3; val_offset:38361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38361*FLEN/8, x4, x1, x2) - -inst_12788: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17ffff8; valaddr_reg:x3; val_offset:38364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38364*FLEN/8, x4, x1, x2) - -inst_12789: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17ffffc; valaddr_reg:x3; val_offset:38367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38367*FLEN/8, x4, x1, x2) - -inst_12790: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17ffffe; valaddr_reg:x3; val_offset:38370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38370*FLEN/8, x4, x1, x2) - -inst_12791: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; -op3val:0x17fffff; valaddr_reg:x3; val_offset:38373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38373*FLEN/8, x4, x1, x2) - -inst_12792: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a800000; valaddr_reg:x3; val_offset:38376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38376*FLEN/8, x4, x1, x2) - -inst_12793: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a800001; valaddr_reg:x3; val_offset:38379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38379*FLEN/8, x4, x1, x2) - -inst_12794: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a800003; valaddr_reg:x3; val_offset:38382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38382*FLEN/8, x4, x1, x2) - -inst_12795: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a800007; valaddr_reg:x3; val_offset:38385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38385*FLEN/8, x4, x1, x2) - -inst_12796: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a80000f; valaddr_reg:x3; val_offset:38388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38388*FLEN/8, x4, x1, x2) - -inst_12797: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a80001f; valaddr_reg:x3; val_offset:38391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38391*FLEN/8, x4, x1, x2) - -inst_12798: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a80003f; valaddr_reg:x3; val_offset:38394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38394*FLEN/8, x4, x1, x2) - -inst_12799: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a80007f; valaddr_reg:x3; val_offset:38397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38397*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_101) - -inst_12800: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a8000ff; valaddr_reg:x3; val_offset:38400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38400*FLEN/8, x4, x1, x2) - -inst_12801: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a8001ff; valaddr_reg:x3; val_offset:38403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38403*FLEN/8, x4, x1, x2) - -inst_12802: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a8003ff; valaddr_reg:x3; val_offset:38406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38406*FLEN/8, x4, x1, x2) - -inst_12803: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a8007ff; valaddr_reg:x3; val_offset:38409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38409*FLEN/8, x4, x1, x2) - -inst_12804: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a800fff; valaddr_reg:x3; val_offset:38412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38412*FLEN/8, x4, x1, x2) - -inst_12805: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a801fff; valaddr_reg:x3; val_offset:38415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38415*FLEN/8, x4, x1, x2) - -inst_12806: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a803fff; valaddr_reg:x3; val_offset:38418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38418*FLEN/8, x4, x1, x2) - -inst_12807: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a807fff; valaddr_reg:x3; val_offset:38421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38421*FLEN/8, x4, x1, x2) - -inst_12808: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a80ffff; valaddr_reg:x3; val_offset:38424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38424*FLEN/8, x4, x1, x2) - -inst_12809: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a81ffff; valaddr_reg:x3; val_offset:38427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38427*FLEN/8, x4, x1, x2) - -inst_12810: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a83ffff; valaddr_reg:x3; val_offset:38430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38430*FLEN/8, x4, x1, x2) - -inst_12811: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a87ffff; valaddr_reg:x3; val_offset:38433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38433*FLEN/8, x4, x1, x2) - -inst_12812: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a8fffff; valaddr_reg:x3; val_offset:38436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38436*FLEN/8, x4, x1, x2) - -inst_12813: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2a9fffff; valaddr_reg:x3; val_offset:38439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38439*FLEN/8, x4, x1, x2) - -inst_12814: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2abfffff; valaddr_reg:x3; val_offset:38442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38442*FLEN/8, x4, x1, x2) - -inst_12815: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2ac00000; valaddr_reg:x3; val_offset:38445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38445*FLEN/8, x4, x1, x2) - -inst_12816: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2ae00000; valaddr_reg:x3; val_offset:38448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38448*FLEN/8, x4, x1, x2) - -inst_12817: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2af00000; valaddr_reg:x3; val_offset:38451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38451*FLEN/8, x4, x1, x2) - -inst_12818: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2af80000; valaddr_reg:x3; val_offset:38454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38454*FLEN/8, x4, x1, x2) - -inst_12819: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afc0000; valaddr_reg:x3; val_offset:38457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38457*FLEN/8, x4, x1, x2) - -inst_12820: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afe0000; valaddr_reg:x3; val_offset:38460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38460*FLEN/8, x4, x1, x2) - -inst_12821: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2aff0000; valaddr_reg:x3; val_offset:38463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38463*FLEN/8, x4, x1, x2) - -inst_12822: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2aff8000; valaddr_reg:x3; val_offset:38466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38466*FLEN/8, x4, x1, x2) - -inst_12823: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2affc000; valaddr_reg:x3; val_offset:38469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38469*FLEN/8, x4, x1, x2) - -inst_12824: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2affe000; valaddr_reg:x3; val_offset:38472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38472*FLEN/8, x4, x1, x2) - -inst_12825: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afff000; valaddr_reg:x3; val_offset:38475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38475*FLEN/8, x4, x1, x2) - -inst_12826: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afff800; valaddr_reg:x3; val_offset:38478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38478*FLEN/8, x4, x1, x2) - -inst_12827: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afffc00; valaddr_reg:x3; val_offset:38481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38481*FLEN/8, x4, x1, x2) - -inst_12828: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afffe00; valaddr_reg:x3; val_offset:38484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38484*FLEN/8, x4, x1, x2) - -inst_12829: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2affff00; valaddr_reg:x3; val_offset:38487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38487*FLEN/8, x4, x1, x2) - -inst_12830: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2affff80; valaddr_reg:x3; val_offset:38490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38490*FLEN/8, x4, x1, x2) - -inst_12831: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2affffc0; valaddr_reg:x3; val_offset:38493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38493*FLEN/8, x4, x1, x2) - -inst_12832: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2affffe0; valaddr_reg:x3; val_offset:38496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38496*FLEN/8, x4, x1, x2) - -inst_12833: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afffff0; valaddr_reg:x3; val_offset:38499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38499*FLEN/8, x4, x1, x2) - -inst_12834: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afffff8; valaddr_reg:x3; val_offset:38502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38502*FLEN/8, x4, x1, x2) - -inst_12835: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afffffc; valaddr_reg:x3; val_offset:38505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38505*FLEN/8, x4, x1, x2) - -inst_12836: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2afffffe; valaddr_reg:x3; val_offset:38508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38508*FLEN/8, x4, x1, x2) - -inst_12837: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x2affffff; valaddr_reg:x3; val_offset:38511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38511*FLEN/8, x4, x1, x2) - -inst_12838: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3f800001; valaddr_reg:x3; val_offset:38514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38514*FLEN/8, x4, x1, x2) - -inst_12839: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3f800003; valaddr_reg:x3; val_offset:38517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38517*FLEN/8, x4, x1, x2) - -inst_12840: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3f800007; valaddr_reg:x3; val_offset:38520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38520*FLEN/8, x4, x1, x2) - -inst_12841: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3f999999; valaddr_reg:x3; val_offset:38523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38523*FLEN/8, x4, x1, x2) - -inst_12842: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:38526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38526*FLEN/8, x4, x1, x2) - -inst_12843: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:38529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38529*FLEN/8, x4, x1, x2) - -inst_12844: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:38532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38532*FLEN/8, x4, x1, x2) - -inst_12845: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:38535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38535*FLEN/8, x4, x1, x2) - -inst_12846: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:38538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38538*FLEN/8, x4, x1, x2) - -inst_12847: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:38541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38541*FLEN/8, x4, x1, x2) - -inst_12848: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:38544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38544*FLEN/8, x4, x1, x2) - -inst_12849: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:38547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38547*FLEN/8, x4, x1, x2) - -inst_12850: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:38550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38550*FLEN/8, x4, x1, x2) - -inst_12851: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:38553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38553*FLEN/8, x4, x1, x2) - -inst_12852: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:38556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38556*FLEN/8, x4, x1, x2) - -inst_12853: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:38559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38559*FLEN/8, x4, x1, x2) - -inst_12854: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60800000; valaddr_reg:x3; val_offset:38562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38562*FLEN/8, x4, x1, x2) - -inst_12855: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60800001; valaddr_reg:x3; val_offset:38565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38565*FLEN/8, x4, x1, x2) - -inst_12856: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60800003; valaddr_reg:x3; val_offset:38568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38568*FLEN/8, x4, x1, x2) - -inst_12857: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60800007; valaddr_reg:x3; val_offset:38571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38571*FLEN/8, x4, x1, x2) - -inst_12858: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x6080000f; valaddr_reg:x3; val_offset:38574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38574*FLEN/8, x4, x1, x2) - -inst_12859: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x6080001f; valaddr_reg:x3; val_offset:38577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38577*FLEN/8, x4, x1, x2) - -inst_12860: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x6080003f; valaddr_reg:x3; val_offset:38580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38580*FLEN/8, x4, x1, x2) - -inst_12861: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x6080007f; valaddr_reg:x3; val_offset:38583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38583*FLEN/8, x4, x1, x2) - -inst_12862: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x608000ff; valaddr_reg:x3; val_offset:38586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38586*FLEN/8, x4, x1, x2) - -inst_12863: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x608001ff; valaddr_reg:x3; val_offset:38589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38589*FLEN/8, x4, x1, x2) - -inst_12864: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x608003ff; valaddr_reg:x3; val_offset:38592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38592*FLEN/8, x4, x1, x2) - -inst_12865: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x608007ff; valaddr_reg:x3; val_offset:38595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38595*FLEN/8, x4, x1, x2) - -inst_12866: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60800fff; valaddr_reg:x3; val_offset:38598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38598*FLEN/8, x4, x1, x2) - -inst_12867: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60801fff; valaddr_reg:x3; val_offset:38601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38601*FLEN/8, x4, x1, x2) - -inst_12868: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60803fff; valaddr_reg:x3; val_offset:38604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38604*FLEN/8, x4, x1, x2) - -inst_12869: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60807fff; valaddr_reg:x3; val_offset:38607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38607*FLEN/8, x4, x1, x2) - -inst_12870: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x6080ffff; valaddr_reg:x3; val_offset:38610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38610*FLEN/8, x4, x1, x2) - -inst_12871: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x6081ffff; valaddr_reg:x3; val_offset:38613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38613*FLEN/8, x4, x1, x2) - -inst_12872: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x6083ffff; valaddr_reg:x3; val_offset:38616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38616*FLEN/8, x4, x1, x2) - -inst_12873: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x6087ffff; valaddr_reg:x3; val_offset:38619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38619*FLEN/8, x4, x1, x2) - -inst_12874: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x608fffff; valaddr_reg:x3; val_offset:38622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38622*FLEN/8, x4, x1, x2) - -inst_12875: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x609fffff; valaddr_reg:x3; val_offset:38625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38625*FLEN/8, x4, x1, x2) - -inst_12876: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60bfffff; valaddr_reg:x3; val_offset:38628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38628*FLEN/8, x4, x1, x2) - -inst_12877: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60c00000; valaddr_reg:x3; val_offset:38631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38631*FLEN/8, x4, x1, x2) - -inst_12878: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60e00000; valaddr_reg:x3; val_offset:38634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38634*FLEN/8, x4, x1, x2) - -inst_12879: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60f00000; valaddr_reg:x3; val_offset:38637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38637*FLEN/8, x4, x1, x2) - -inst_12880: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60f80000; valaddr_reg:x3; val_offset:38640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38640*FLEN/8, x4, x1, x2) - -inst_12881: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fc0000; valaddr_reg:x3; val_offset:38643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38643*FLEN/8, x4, x1, x2) - -inst_12882: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fe0000; valaddr_reg:x3; val_offset:38646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38646*FLEN/8, x4, x1, x2) - -inst_12883: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ff0000; valaddr_reg:x3; val_offset:38649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38649*FLEN/8, x4, x1, x2) - -inst_12884: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ff8000; valaddr_reg:x3; val_offset:38652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38652*FLEN/8, x4, x1, x2) - -inst_12885: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ffc000; valaddr_reg:x3; val_offset:38655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38655*FLEN/8, x4, x1, x2) - -inst_12886: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ffe000; valaddr_reg:x3; val_offset:38658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38658*FLEN/8, x4, x1, x2) - -inst_12887: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fff000; valaddr_reg:x3; val_offset:38661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38661*FLEN/8, x4, x1, x2) - -inst_12888: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fff800; valaddr_reg:x3; val_offset:38664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38664*FLEN/8, x4, x1, x2) - -inst_12889: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fffc00; valaddr_reg:x3; val_offset:38667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38667*FLEN/8, x4, x1, x2) - -inst_12890: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fffe00; valaddr_reg:x3; val_offset:38670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38670*FLEN/8, x4, x1, x2) - -inst_12891: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ffff00; valaddr_reg:x3; val_offset:38673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38673*FLEN/8, x4, x1, x2) - -inst_12892: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ffff80; valaddr_reg:x3; val_offset:38676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38676*FLEN/8, x4, x1, x2) - -inst_12893: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ffffc0; valaddr_reg:x3; val_offset:38679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38679*FLEN/8, x4, x1, x2) - -inst_12894: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ffffe0; valaddr_reg:x3; val_offset:38682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38682*FLEN/8, x4, x1, x2) - -inst_12895: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fffff0; valaddr_reg:x3; val_offset:38685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38685*FLEN/8, x4, x1, x2) - -inst_12896: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fffff8; valaddr_reg:x3; val_offset:38688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38688*FLEN/8, x4, x1, x2) - -inst_12897: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fffffc; valaddr_reg:x3; val_offset:38691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38691*FLEN/8, x4, x1, x2) - -inst_12898: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60fffffe; valaddr_reg:x3; val_offset:38694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38694*FLEN/8, x4, x1, x2) - -inst_12899: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x60ffffff; valaddr_reg:x3; val_offset:38697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38697*FLEN/8, x4, x1, x2) - -inst_12900: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f000001; valaddr_reg:x3; val_offset:38700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38700*FLEN/8, x4, x1, x2) - -inst_12901: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f000003; valaddr_reg:x3; val_offset:38703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38703*FLEN/8, x4, x1, x2) - -inst_12902: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f000007; valaddr_reg:x3; val_offset:38706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38706*FLEN/8, x4, x1, x2) - -inst_12903: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f199999; valaddr_reg:x3; val_offset:38709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38709*FLEN/8, x4, x1, x2) - -inst_12904: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f249249; valaddr_reg:x3; val_offset:38712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38712*FLEN/8, x4, x1, x2) - -inst_12905: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f333333; valaddr_reg:x3; val_offset:38715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38715*FLEN/8, x4, x1, x2) - -inst_12906: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:38718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38718*FLEN/8, x4, x1, x2) - -inst_12907: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:38721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38721*FLEN/8, x4, x1, x2) - -inst_12908: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f444444; valaddr_reg:x3; val_offset:38724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38724*FLEN/8, x4, x1, x2) - -inst_12909: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:38727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38727*FLEN/8, x4, x1, x2) - -inst_12910: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:38730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38730*FLEN/8, x4, x1, x2) - -inst_12911: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f666666; valaddr_reg:x3; val_offset:38733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38733*FLEN/8, x4, x1, x2) - -inst_12912: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:38736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38736*FLEN/8, x4, x1, x2) - -inst_12913: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:38739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38739*FLEN/8, x4, x1, x2) - -inst_12914: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:38742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38742*FLEN/8, x4, x1, x2) - -inst_12915: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:38745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38745*FLEN/8, x4, x1, x2) - -inst_12916: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:38748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38748*FLEN/8, x4, x1, x2) - -inst_12917: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:38751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38751*FLEN/8, x4, x1, x2) - -inst_12918: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:38754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38754*FLEN/8, x4, x1, x2) - -inst_12919: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:38757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38757*FLEN/8, x4, x1, x2) - -inst_12920: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:38760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38760*FLEN/8, x4, x1, x2) - -inst_12921: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:38763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38763*FLEN/8, x4, x1, x2) - -inst_12922: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:38766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38766*FLEN/8, x4, x1, x2) - -inst_12923: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:38769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38769*FLEN/8, x4, x1, x2) - -inst_12924: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:38772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38772*FLEN/8, x4, x1, x2) - -inst_12925: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:38775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38775*FLEN/8, x4, x1, x2) - -inst_12926: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:38778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38778*FLEN/8, x4, x1, x2) - -inst_12927: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:38781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38781*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_102) - -inst_12928: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:38784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38784*FLEN/8, x4, x1, x2) - -inst_12929: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:38787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38787*FLEN/8, x4, x1, x2) - -inst_12930: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:38790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38790*FLEN/8, x4, x1, x2) - -inst_12931: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:38793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38793*FLEN/8, x4, x1, x2) - -inst_12932: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83000000; valaddr_reg:x3; val_offset:38796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38796*FLEN/8, x4, x1, x2) - -inst_12933: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83000001; valaddr_reg:x3; val_offset:38799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38799*FLEN/8, x4, x1, x2) - -inst_12934: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83000003; valaddr_reg:x3; val_offset:38802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38802*FLEN/8, x4, x1, x2) - -inst_12935: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83000007; valaddr_reg:x3; val_offset:38805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38805*FLEN/8, x4, x1, x2) - -inst_12936: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8300000f; valaddr_reg:x3; val_offset:38808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38808*FLEN/8, x4, x1, x2) - -inst_12937: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8300001f; valaddr_reg:x3; val_offset:38811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38811*FLEN/8, x4, x1, x2) - -inst_12938: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8300003f; valaddr_reg:x3; val_offset:38814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38814*FLEN/8, x4, x1, x2) - -inst_12939: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8300007f; valaddr_reg:x3; val_offset:38817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38817*FLEN/8, x4, x1, x2) - -inst_12940: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x830000ff; valaddr_reg:x3; val_offset:38820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38820*FLEN/8, x4, x1, x2) - -inst_12941: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x830001ff; valaddr_reg:x3; val_offset:38823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38823*FLEN/8, x4, x1, x2) - -inst_12942: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x830003ff; valaddr_reg:x3; val_offset:38826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38826*FLEN/8, x4, x1, x2) - -inst_12943: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x830007ff; valaddr_reg:x3; val_offset:38829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38829*FLEN/8, x4, x1, x2) - -inst_12944: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83000fff; valaddr_reg:x3; val_offset:38832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38832*FLEN/8, x4, x1, x2) - -inst_12945: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83001fff; valaddr_reg:x3; val_offset:38835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38835*FLEN/8, x4, x1, x2) - -inst_12946: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83003fff; valaddr_reg:x3; val_offset:38838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38838*FLEN/8, x4, x1, x2) - -inst_12947: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83007fff; valaddr_reg:x3; val_offset:38841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38841*FLEN/8, x4, x1, x2) - -inst_12948: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8300ffff; valaddr_reg:x3; val_offset:38844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38844*FLEN/8, x4, x1, x2) - -inst_12949: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8301ffff; valaddr_reg:x3; val_offset:38847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38847*FLEN/8, x4, x1, x2) - -inst_12950: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8303ffff; valaddr_reg:x3; val_offset:38850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38850*FLEN/8, x4, x1, x2) - -inst_12951: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x8307ffff; valaddr_reg:x3; val_offset:38853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38853*FLEN/8, x4, x1, x2) - -inst_12952: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x830fffff; valaddr_reg:x3; val_offset:38856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38856*FLEN/8, x4, x1, x2) - -inst_12953: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x831fffff; valaddr_reg:x3; val_offset:38859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38859*FLEN/8, x4, x1, x2) - -inst_12954: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x833fffff; valaddr_reg:x3; val_offset:38862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38862*FLEN/8, x4, x1, x2) - -inst_12955: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83400000; valaddr_reg:x3; val_offset:38865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38865*FLEN/8, x4, x1, x2) - -inst_12956: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83600000; valaddr_reg:x3; val_offset:38868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38868*FLEN/8, x4, x1, x2) - -inst_12957: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83700000; valaddr_reg:x3; val_offset:38871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38871*FLEN/8, x4, x1, x2) - -inst_12958: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x83780000; valaddr_reg:x3; val_offset:38874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38874*FLEN/8, x4, x1, x2) - -inst_12959: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837c0000; valaddr_reg:x3; val_offset:38877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38877*FLEN/8, x4, x1, x2) - -inst_12960: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837e0000; valaddr_reg:x3; val_offset:38880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38880*FLEN/8, x4, x1, x2) - -inst_12961: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837f0000; valaddr_reg:x3; val_offset:38883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38883*FLEN/8, x4, x1, x2) - -inst_12962: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837f8000; valaddr_reg:x3; val_offset:38886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38886*FLEN/8, x4, x1, x2) - -inst_12963: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837fc000; valaddr_reg:x3; val_offset:38889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38889*FLEN/8, x4, x1, x2) - -inst_12964: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837fe000; valaddr_reg:x3; val_offset:38892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38892*FLEN/8, x4, x1, x2) - -inst_12965: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837ff000; valaddr_reg:x3; val_offset:38895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38895*FLEN/8, x4, x1, x2) - -inst_12966: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837ff800; valaddr_reg:x3; val_offset:38898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38898*FLEN/8, x4, x1, x2) - -inst_12967: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837ffc00; valaddr_reg:x3; val_offset:38901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38901*FLEN/8, x4, x1, x2) - -inst_12968: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837ffe00; valaddr_reg:x3; val_offset:38904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38904*FLEN/8, x4, x1, x2) - -inst_12969: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837fff00; valaddr_reg:x3; val_offset:38907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38907*FLEN/8, x4, x1, x2) - -inst_12970: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837fff80; valaddr_reg:x3; val_offset:38910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38910*FLEN/8, x4, x1, x2) - -inst_12971: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837fffc0; valaddr_reg:x3; val_offset:38913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38913*FLEN/8, x4, x1, x2) - -inst_12972: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837fffe0; valaddr_reg:x3; val_offset:38916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38916*FLEN/8, x4, x1, x2) - -inst_12973: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837ffff0; valaddr_reg:x3; val_offset:38919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38919*FLEN/8, x4, x1, x2) - -inst_12974: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837ffff8; valaddr_reg:x3; val_offset:38922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38922*FLEN/8, x4, x1, x2) - -inst_12975: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837ffffc; valaddr_reg:x3; val_offset:38925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38925*FLEN/8, x4, x1, x2) - -inst_12976: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837ffffe; valaddr_reg:x3; val_offset:38928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38928*FLEN/8, x4, x1, x2) - -inst_12977: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; -op3val:0x837fffff; valaddr_reg:x3; val_offset:38931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38931*FLEN/8, x4, x1, x2) - -inst_12978: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf800000; valaddr_reg:x3; val_offset:38934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38934*FLEN/8, x4, x1, x2) - -inst_12979: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf800001; valaddr_reg:x3; val_offset:38937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38937*FLEN/8, x4, x1, x2) - -inst_12980: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf800003; valaddr_reg:x3; val_offset:38940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38940*FLEN/8, x4, x1, x2) - -inst_12981: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf800007; valaddr_reg:x3; val_offset:38943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38943*FLEN/8, x4, x1, x2) - -inst_12982: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf80000f; valaddr_reg:x3; val_offset:38946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38946*FLEN/8, x4, x1, x2) - -inst_12983: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf80001f; valaddr_reg:x3; val_offset:38949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38949*FLEN/8, x4, x1, x2) - -inst_12984: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf80003f; valaddr_reg:x3; val_offset:38952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38952*FLEN/8, x4, x1, x2) - -inst_12985: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf80007f; valaddr_reg:x3; val_offset:38955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38955*FLEN/8, x4, x1, x2) - -inst_12986: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf8000ff; valaddr_reg:x3; val_offset:38958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38958*FLEN/8, x4, x1, x2) - -inst_12987: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf8001ff; valaddr_reg:x3; val_offset:38961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38961*FLEN/8, x4, x1, x2) - -inst_12988: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf8003ff; valaddr_reg:x3; val_offset:38964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38964*FLEN/8, x4, x1, x2) - -inst_12989: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf8007ff; valaddr_reg:x3; val_offset:38967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38967*FLEN/8, x4, x1, x2) - -inst_12990: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf800fff; valaddr_reg:x3; val_offset:38970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38970*FLEN/8, x4, x1, x2) - -inst_12991: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf801fff; valaddr_reg:x3; val_offset:38973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38973*FLEN/8, x4, x1, x2) - -inst_12992: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf803fff; valaddr_reg:x3; val_offset:38976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38976*FLEN/8, x4, x1, x2) - -inst_12993: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf807fff; valaddr_reg:x3; val_offset:38979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38979*FLEN/8, x4, x1, x2) - -inst_12994: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf80ffff; valaddr_reg:x3; val_offset:38982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38982*FLEN/8, x4, x1, x2) - -inst_12995: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf81ffff; valaddr_reg:x3; val_offset:38985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38985*FLEN/8, x4, x1, x2) - -inst_12996: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf83ffff; valaddr_reg:x3; val_offset:38988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38988*FLEN/8, x4, x1, x2) - -inst_12997: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf87ffff; valaddr_reg:x3; val_offset:38991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38991*FLEN/8, x4, x1, x2) - -inst_12998: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf8fffff; valaddr_reg:x3; val_offset:38994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38994*FLEN/8, x4, x1, x2) - -inst_12999: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaf9fffff; valaddr_reg:x3; val_offset:38997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38997*FLEN/8, x4, x1, x2) - -inst_13000: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafbfffff; valaddr_reg:x3; val_offset:39000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39000*FLEN/8, x4, x1, x2) - -inst_13001: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafc00000; valaddr_reg:x3; val_offset:39003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39003*FLEN/8, x4, x1, x2) - -inst_13002: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafe00000; valaddr_reg:x3; val_offset:39006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39006*FLEN/8, x4, x1, x2) - -inst_13003: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaff00000; valaddr_reg:x3; val_offset:39009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39009*FLEN/8, x4, x1, x2) - -inst_13004: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaff80000; valaddr_reg:x3; val_offset:39012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39012*FLEN/8, x4, x1, x2) - -inst_13005: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffc0000; valaddr_reg:x3; val_offset:39015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39015*FLEN/8, x4, x1, x2) - -inst_13006: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffe0000; valaddr_reg:x3; val_offset:39018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39018*FLEN/8, x4, x1, x2) - -inst_13007: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafff0000; valaddr_reg:x3; val_offset:39021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39021*FLEN/8, x4, x1, x2) - -inst_13008: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafff8000; valaddr_reg:x3; val_offset:39024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39024*FLEN/8, x4, x1, x2) - -inst_13009: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafffc000; valaddr_reg:x3; val_offset:39027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39027*FLEN/8, x4, x1, x2) - -inst_13010: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafffe000; valaddr_reg:x3; val_offset:39030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39030*FLEN/8, x4, x1, x2) - -inst_13011: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffff000; valaddr_reg:x3; val_offset:39033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39033*FLEN/8, x4, x1, x2) - -inst_13012: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffff800; valaddr_reg:x3; val_offset:39036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39036*FLEN/8, x4, x1, x2) - -inst_13013: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffffc00; valaddr_reg:x3; val_offset:39039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39039*FLEN/8, x4, x1, x2) - -inst_13014: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffffe00; valaddr_reg:x3; val_offset:39042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39042*FLEN/8, x4, x1, x2) - -inst_13015: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafffff00; valaddr_reg:x3; val_offset:39045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39045*FLEN/8, x4, x1, x2) - -inst_13016: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafffff80; valaddr_reg:x3; val_offset:39048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39048*FLEN/8, x4, x1, x2) - -inst_13017: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafffffc0; valaddr_reg:x3; val_offset:39051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39051*FLEN/8, x4, x1, x2) - -inst_13018: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafffffe0; valaddr_reg:x3; val_offset:39054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39054*FLEN/8, x4, x1, x2) - -inst_13019: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffffff0; valaddr_reg:x3; val_offset:39057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39057*FLEN/8, x4, x1, x2) - -inst_13020: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffffff8; valaddr_reg:x3; val_offset:39060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39060*FLEN/8, x4, x1, x2) - -inst_13021: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffffffc; valaddr_reg:x3; val_offset:39063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39063*FLEN/8, x4, x1, x2) - -inst_13022: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xaffffffe; valaddr_reg:x3; val_offset:39066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39066*FLEN/8, x4, x1, x2) - -inst_13023: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xafffffff; valaddr_reg:x3; val_offset:39069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39069*FLEN/8, x4, x1, x2) - -inst_13024: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbf800001; valaddr_reg:x3; val_offset:39072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39072*FLEN/8, x4, x1, x2) - -inst_13025: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbf800003; valaddr_reg:x3; val_offset:39075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39075*FLEN/8, x4, x1, x2) - -inst_13026: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbf800007; valaddr_reg:x3; val_offset:39078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39078*FLEN/8, x4, x1, x2) - -inst_13027: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbf999999; valaddr_reg:x3; val_offset:39081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39081*FLEN/8, x4, x1, x2) - -inst_13028: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:39084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39084*FLEN/8, x4, x1, x2) - -inst_13029: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:39087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39087*FLEN/8, x4, x1, x2) - -inst_13030: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:39090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39090*FLEN/8, x4, x1, x2) - -inst_13031: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:39093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39093*FLEN/8, x4, x1, x2) - -inst_13032: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:39096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39096*FLEN/8, x4, x1, x2) - -inst_13033: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:39099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39099*FLEN/8, x4, x1, x2) - -inst_13034: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:39102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39102*FLEN/8, x4, x1, x2) - -inst_13035: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:39105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39105*FLEN/8, x4, x1, x2) - -inst_13036: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:39108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39108*FLEN/8, x4, x1, x2) - -inst_13037: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:39111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39111*FLEN/8, x4, x1, x2) - -inst_13038: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:39114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39114*FLEN/8, x4, x1, x2) - -inst_13039: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:39117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39117*FLEN/8, x4, x1, x2) - -inst_13040: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71000000; valaddr_reg:x3; val_offset:39120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39120*FLEN/8, x4, x1, x2) - -inst_13041: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71000001; valaddr_reg:x3; val_offset:39123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39123*FLEN/8, x4, x1, x2) - -inst_13042: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71000003; valaddr_reg:x3; val_offset:39126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39126*FLEN/8, x4, x1, x2) - -inst_13043: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71000007; valaddr_reg:x3; val_offset:39129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39129*FLEN/8, x4, x1, x2) - -inst_13044: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7100000f; valaddr_reg:x3; val_offset:39132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39132*FLEN/8, x4, x1, x2) - -inst_13045: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7100001f; valaddr_reg:x3; val_offset:39135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39135*FLEN/8, x4, x1, x2) - -inst_13046: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7100003f; valaddr_reg:x3; val_offset:39138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39138*FLEN/8, x4, x1, x2) - -inst_13047: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7100007f; valaddr_reg:x3; val_offset:39141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39141*FLEN/8, x4, x1, x2) - -inst_13048: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x710000ff; valaddr_reg:x3; val_offset:39144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39144*FLEN/8, x4, x1, x2) - -inst_13049: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x710001ff; valaddr_reg:x3; val_offset:39147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39147*FLEN/8, x4, x1, x2) - -inst_13050: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x710003ff; valaddr_reg:x3; val_offset:39150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39150*FLEN/8, x4, x1, x2) - -inst_13051: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x710007ff; valaddr_reg:x3; val_offset:39153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39153*FLEN/8, x4, x1, x2) - -inst_13052: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71000fff; valaddr_reg:x3; val_offset:39156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39156*FLEN/8, x4, x1, x2) - -inst_13053: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71001fff; valaddr_reg:x3; val_offset:39159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39159*FLEN/8, x4, x1, x2) - -inst_13054: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71003fff; valaddr_reg:x3; val_offset:39162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39162*FLEN/8, x4, x1, x2) - -inst_13055: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71007fff; valaddr_reg:x3; val_offset:39165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39165*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_103) - -inst_13056: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7100ffff; valaddr_reg:x3; val_offset:39168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39168*FLEN/8, x4, x1, x2) - -inst_13057: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7101ffff; valaddr_reg:x3; val_offset:39171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39171*FLEN/8, x4, x1, x2) - -inst_13058: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7103ffff; valaddr_reg:x3; val_offset:39174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39174*FLEN/8, x4, x1, x2) - -inst_13059: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7107ffff; valaddr_reg:x3; val_offset:39177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39177*FLEN/8, x4, x1, x2) - -inst_13060: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x710fffff; valaddr_reg:x3; val_offset:39180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39180*FLEN/8, x4, x1, x2) - -inst_13061: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x711fffff; valaddr_reg:x3; val_offset:39183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39183*FLEN/8, x4, x1, x2) - -inst_13062: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x713fffff; valaddr_reg:x3; val_offset:39186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39186*FLEN/8, x4, x1, x2) - -inst_13063: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71400000; valaddr_reg:x3; val_offset:39189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39189*FLEN/8, x4, x1, x2) - -inst_13064: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71600000; valaddr_reg:x3; val_offset:39192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39192*FLEN/8, x4, x1, x2) - -inst_13065: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71700000; valaddr_reg:x3; val_offset:39195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39195*FLEN/8, x4, x1, x2) - -inst_13066: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x71780000; valaddr_reg:x3; val_offset:39198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39198*FLEN/8, x4, x1, x2) - -inst_13067: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717c0000; valaddr_reg:x3; val_offset:39201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39201*FLEN/8, x4, x1, x2) - -inst_13068: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717e0000; valaddr_reg:x3; val_offset:39204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39204*FLEN/8, x4, x1, x2) - -inst_13069: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717f0000; valaddr_reg:x3; val_offset:39207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39207*FLEN/8, x4, x1, x2) - -inst_13070: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717f8000; valaddr_reg:x3; val_offset:39210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39210*FLEN/8, x4, x1, x2) - -inst_13071: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717fc000; valaddr_reg:x3; val_offset:39213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39213*FLEN/8, x4, x1, x2) - -inst_13072: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717fe000; valaddr_reg:x3; val_offset:39216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39216*FLEN/8, x4, x1, x2) - -inst_13073: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717ff000; valaddr_reg:x3; val_offset:39219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39219*FLEN/8, x4, x1, x2) - -inst_13074: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717ff800; valaddr_reg:x3; val_offset:39222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39222*FLEN/8, x4, x1, x2) - -inst_13075: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717ffc00; valaddr_reg:x3; val_offset:39225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39225*FLEN/8, x4, x1, x2) - -inst_13076: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717ffe00; valaddr_reg:x3; val_offset:39228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39228*FLEN/8, x4, x1, x2) - -inst_13077: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717fff00; valaddr_reg:x3; val_offset:39231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39231*FLEN/8, x4, x1, x2) - -inst_13078: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717fff80; valaddr_reg:x3; val_offset:39234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39234*FLEN/8, x4, x1, x2) - -inst_13079: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717fffc0; valaddr_reg:x3; val_offset:39237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39237*FLEN/8, x4, x1, x2) - -inst_13080: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717fffe0; valaddr_reg:x3; val_offset:39240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39240*FLEN/8, x4, x1, x2) - -inst_13081: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717ffff0; valaddr_reg:x3; val_offset:39243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39243*FLEN/8, x4, x1, x2) - -inst_13082: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717ffff8; valaddr_reg:x3; val_offset:39246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39246*FLEN/8, x4, x1, x2) - -inst_13083: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717ffffc; valaddr_reg:x3; val_offset:39249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39249*FLEN/8, x4, x1, x2) - -inst_13084: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717ffffe; valaddr_reg:x3; val_offset:39252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39252*FLEN/8, x4, x1, x2) - -inst_13085: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x717fffff; valaddr_reg:x3; val_offset:39255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39255*FLEN/8, x4, x1, x2) - -inst_13086: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f000001; valaddr_reg:x3; val_offset:39258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39258*FLEN/8, x4, x1, x2) - -inst_13087: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f000003; valaddr_reg:x3; val_offset:39261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39261*FLEN/8, x4, x1, x2) - -inst_13088: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f000007; valaddr_reg:x3; val_offset:39264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39264*FLEN/8, x4, x1, x2) - -inst_13089: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f199999; valaddr_reg:x3; val_offset:39267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39267*FLEN/8, x4, x1, x2) - -inst_13090: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f249249; valaddr_reg:x3; val_offset:39270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39270*FLEN/8, x4, x1, x2) - -inst_13091: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f333333; valaddr_reg:x3; val_offset:39273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39273*FLEN/8, x4, x1, x2) - -inst_13092: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:39276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39276*FLEN/8, x4, x1, x2) - -inst_13093: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:39279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39279*FLEN/8, x4, x1, x2) - -inst_13094: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f444444; valaddr_reg:x3; val_offset:39282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39282*FLEN/8, x4, x1, x2) - -inst_13095: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:39285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39285*FLEN/8, x4, x1, x2) - -inst_13096: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:39288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39288*FLEN/8, x4, x1, x2) - -inst_13097: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f666666; valaddr_reg:x3; val_offset:39291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39291*FLEN/8, x4, x1, x2) - -inst_13098: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:39294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39294*FLEN/8, x4, x1, x2) - -inst_13099: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:39297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39297*FLEN/8, x4, x1, x2) - -inst_13100: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:39300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39300*FLEN/8, x4, x1, x2) - -inst_13101: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:39303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39303*FLEN/8, x4, x1, x2) - -inst_13102: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:39306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39306*FLEN/8, x4, x1, x2) - -inst_13103: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:39309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39309*FLEN/8, x4, x1, x2) - -inst_13104: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:39312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39312*FLEN/8, x4, x1, x2) - -inst_13105: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:39315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39315*FLEN/8, x4, x1, x2) - -inst_13106: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:39318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39318*FLEN/8, x4, x1, x2) - -inst_13107: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:39321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39321*FLEN/8, x4, x1, x2) - -inst_13108: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:39324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39324*FLEN/8, x4, x1, x2) - -inst_13109: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:39327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39327*FLEN/8, x4, x1, x2) - -inst_13110: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:39330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39330*FLEN/8, x4, x1, x2) - -inst_13111: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:39333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39333*FLEN/8, x4, x1, x2) - -inst_13112: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:39336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39336*FLEN/8, x4, x1, x2) - -inst_13113: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:39339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39339*FLEN/8, x4, x1, x2) - -inst_13114: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:39342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39342*FLEN/8, x4, x1, x2) - -inst_13115: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:39345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39345*FLEN/8, x4, x1, x2) - -inst_13116: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:39348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39348*FLEN/8, x4, x1, x2) - -inst_13117: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:39351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39351*FLEN/8, x4, x1, x2) - -inst_13118: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5800000; valaddr_reg:x3; val_offset:39354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39354*FLEN/8, x4, x1, x2) - -inst_13119: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5800001; valaddr_reg:x3; val_offset:39357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39357*FLEN/8, x4, x1, x2) - -inst_13120: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5800003; valaddr_reg:x3; val_offset:39360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39360*FLEN/8, x4, x1, x2) - -inst_13121: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5800007; valaddr_reg:x3; val_offset:39363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39363*FLEN/8, x4, x1, x2) - -inst_13122: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x580000f; valaddr_reg:x3; val_offset:39366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39366*FLEN/8, x4, x1, x2) - -inst_13123: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x580001f; valaddr_reg:x3; val_offset:39369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39369*FLEN/8, x4, x1, x2) - -inst_13124: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x580003f; valaddr_reg:x3; val_offset:39372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39372*FLEN/8, x4, x1, x2) - -inst_13125: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x580007f; valaddr_reg:x3; val_offset:39375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39375*FLEN/8, x4, x1, x2) - -inst_13126: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x58000ff; valaddr_reg:x3; val_offset:39378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39378*FLEN/8, x4, x1, x2) - -inst_13127: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x58001ff; valaddr_reg:x3; val_offset:39381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39381*FLEN/8, x4, x1, x2) - -inst_13128: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x58003ff; valaddr_reg:x3; val_offset:39384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39384*FLEN/8, x4, x1, x2) - -inst_13129: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x58007ff; valaddr_reg:x3; val_offset:39387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39387*FLEN/8, x4, x1, x2) - -inst_13130: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5800fff; valaddr_reg:x3; val_offset:39390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39390*FLEN/8, x4, x1, x2) - -inst_13131: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5801fff; valaddr_reg:x3; val_offset:39393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39393*FLEN/8, x4, x1, x2) - -inst_13132: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5803fff; valaddr_reg:x3; val_offset:39396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39396*FLEN/8, x4, x1, x2) - -inst_13133: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5807fff; valaddr_reg:x3; val_offset:39399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39399*FLEN/8, x4, x1, x2) - -inst_13134: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x580ffff; valaddr_reg:x3; val_offset:39402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39402*FLEN/8, x4, x1, x2) - -inst_13135: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x581ffff; valaddr_reg:x3; val_offset:39405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39405*FLEN/8, x4, x1, x2) - -inst_13136: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x583ffff; valaddr_reg:x3; val_offset:39408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39408*FLEN/8, x4, x1, x2) - -inst_13137: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x587ffff; valaddr_reg:x3; val_offset:39411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39411*FLEN/8, x4, x1, x2) - -inst_13138: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x58fffff; valaddr_reg:x3; val_offset:39414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39414*FLEN/8, x4, x1, x2) - -inst_13139: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x59fffff; valaddr_reg:x3; val_offset:39417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39417*FLEN/8, x4, x1, x2) - -inst_13140: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5bfffff; valaddr_reg:x3; val_offset:39420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39420*FLEN/8, x4, x1, x2) - -inst_13141: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5c00000; valaddr_reg:x3; val_offset:39423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39423*FLEN/8, x4, x1, x2) - -inst_13142: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5e00000; valaddr_reg:x3; val_offset:39426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39426*FLEN/8, x4, x1, x2) - -inst_13143: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5f00000; valaddr_reg:x3; val_offset:39429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39429*FLEN/8, x4, x1, x2) - -inst_13144: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5f80000; valaddr_reg:x3; val_offset:39432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39432*FLEN/8, x4, x1, x2) - -inst_13145: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fc0000; valaddr_reg:x3; val_offset:39435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39435*FLEN/8, x4, x1, x2) - -inst_13146: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fe0000; valaddr_reg:x3; val_offset:39438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39438*FLEN/8, x4, x1, x2) - -inst_13147: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ff0000; valaddr_reg:x3; val_offset:39441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39441*FLEN/8, x4, x1, x2) - -inst_13148: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ff8000; valaddr_reg:x3; val_offset:39444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39444*FLEN/8, x4, x1, x2) - -inst_13149: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ffc000; valaddr_reg:x3; val_offset:39447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39447*FLEN/8, x4, x1, x2) - -inst_13150: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ffe000; valaddr_reg:x3; val_offset:39450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39450*FLEN/8, x4, x1, x2) - -inst_13151: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fff000; valaddr_reg:x3; val_offset:39453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39453*FLEN/8, x4, x1, x2) - -inst_13152: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fff800; valaddr_reg:x3; val_offset:39456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39456*FLEN/8, x4, x1, x2) - -inst_13153: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fffc00; valaddr_reg:x3; val_offset:39459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39459*FLEN/8, x4, x1, x2) - -inst_13154: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fffe00; valaddr_reg:x3; val_offset:39462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39462*FLEN/8, x4, x1, x2) - -inst_13155: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ffff00; valaddr_reg:x3; val_offset:39465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39465*FLEN/8, x4, x1, x2) - -inst_13156: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ffff80; valaddr_reg:x3; val_offset:39468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39468*FLEN/8, x4, x1, x2) - -inst_13157: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ffffc0; valaddr_reg:x3; val_offset:39471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39471*FLEN/8, x4, x1, x2) - -inst_13158: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ffffe0; valaddr_reg:x3; val_offset:39474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39474*FLEN/8, x4, x1, x2) - -inst_13159: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fffff0; valaddr_reg:x3; val_offset:39477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39477*FLEN/8, x4, x1, x2) - -inst_13160: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fffff8; valaddr_reg:x3; val_offset:39480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39480*FLEN/8, x4, x1, x2) - -inst_13161: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fffffc; valaddr_reg:x3; val_offset:39483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39483*FLEN/8, x4, x1, x2) - -inst_13162: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5fffffe; valaddr_reg:x3; val_offset:39486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39486*FLEN/8, x4, x1, x2) - -inst_13163: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; -op3val:0x5ffffff; valaddr_reg:x3; val_offset:39489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39489*FLEN/8, x4, x1, x2) - -inst_13164: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:39492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39492*FLEN/8, x4, x1, x2) - -inst_13165: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:39495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39495*FLEN/8, x4, x1, x2) - -inst_13166: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:39498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39498*FLEN/8, x4, x1, x2) - -inst_13167: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:39501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39501*FLEN/8, x4, x1, x2) - -inst_13168: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:39504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39504*FLEN/8, x4, x1, x2) - -inst_13169: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:39507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39507*FLEN/8, x4, x1, x2) - -inst_13170: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:39510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39510*FLEN/8, x4, x1, x2) - -inst_13171: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:39513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39513*FLEN/8, x4, x1, x2) - -inst_13172: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:39516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39516*FLEN/8, x4, x1, x2) - -inst_13173: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:39519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39519*FLEN/8, x4, x1, x2) - -inst_13174: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:39522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39522*FLEN/8, x4, x1, x2) - -inst_13175: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:39525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39525*FLEN/8, x4, x1, x2) - -inst_13176: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:39528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39528*FLEN/8, x4, x1, x2) - -inst_13177: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:39531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39531*FLEN/8, x4, x1, x2) - -inst_13178: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:39534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39534*FLEN/8, x4, x1, x2) - -inst_13179: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:39537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39537*FLEN/8, x4, x1, x2) - -inst_13180: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa800000; valaddr_reg:x3; val_offset:39540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39540*FLEN/8, x4, x1, x2) - -inst_13181: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa800001; valaddr_reg:x3; val_offset:39543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39543*FLEN/8, x4, x1, x2) - -inst_13182: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa800003; valaddr_reg:x3; val_offset:39546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39546*FLEN/8, x4, x1, x2) - -inst_13183: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa800007; valaddr_reg:x3; val_offset:39549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39549*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_104) - -inst_13184: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa80000f; valaddr_reg:x3; val_offset:39552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39552*FLEN/8, x4, x1, x2) - -inst_13185: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa80001f; valaddr_reg:x3; val_offset:39555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39555*FLEN/8, x4, x1, x2) - -inst_13186: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa80003f; valaddr_reg:x3; val_offset:39558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39558*FLEN/8, x4, x1, x2) - -inst_13187: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa80007f; valaddr_reg:x3; val_offset:39561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39561*FLEN/8, x4, x1, x2) - -inst_13188: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa8000ff; valaddr_reg:x3; val_offset:39564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39564*FLEN/8, x4, x1, x2) - -inst_13189: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa8001ff; valaddr_reg:x3; val_offset:39567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39567*FLEN/8, x4, x1, x2) - -inst_13190: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa8003ff; valaddr_reg:x3; val_offset:39570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39570*FLEN/8, x4, x1, x2) - -inst_13191: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa8007ff; valaddr_reg:x3; val_offset:39573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39573*FLEN/8, x4, x1, x2) - -inst_13192: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa800fff; valaddr_reg:x3; val_offset:39576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39576*FLEN/8, x4, x1, x2) - -inst_13193: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa801fff; valaddr_reg:x3; val_offset:39579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39579*FLEN/8, x4, x1, x2) - -inst_13194: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa803fff; valaddr_reg:x3; val_offset:39582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39582*FLEN/8, x4, x1, x2) - -inst_13195: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa807fff; valaddr_reg:x3; val_offset:39585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39585*FLEN/8, x4, x1, x2) - -inst_13196: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa80ffff; valaddr_reg:x3; val_offset:39588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39588*FLEN/8, x4, x1, x2) - -inst_13197: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa81ffff; valaddr_reg:x3; val_offset:39591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39591*FLEN/8, x4, x1, x2) - -inst_13198: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa83ffff; valaddr_reg:x3; val_offset:39594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39594*FLEN/8, x4, x1, x2) - -inst_13199: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa87ffff; valaddr_reg:x3; val_offset:39597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39597*FLEN/8, x4, x1, x2) - -inst_13200: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa8fffff; valaddr_reg:x3; val_offset:39600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39600*FLEN/8, x4, x1, x2) - -inst_13201: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xa9fffff; valaddr_reg:x3; val_offset:39603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39603*FLEN/8, x4, x1, x2) - -inst_13202: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xabfffff; valaddr_reg:x3; val_offset:39606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39606*FLEN/8, x4, x1, x2) - -inst_13203: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xac00000; valaddr_reg:x3; val_offset:39609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39609*FLEN/8, x4, x1, x2) - -inst_13204: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xae00000; valaddr_reg:x3; val_offset:39612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39612*FLEN/8, x4, x1, x2) - -inst_13205: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaf00000; valaddr_reg:x3; val_offset:39615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39615*FLEN/8, x4, x1, x2) - -inst_13206: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaf80000; valaddr_reg:x3; val_offset:39618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39618*FLEN/8, x4, x1, x2) - -inst_13207: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafc0000; valaddr_reg:x3; val_offset:39621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39621*FLEN/8, x4, x1, x2) - -inst_13208: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafe0000; valaddr_reg:x3; val_offset:39624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39624*FLEN/8, x4, x1, x2) - -inst_13209: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaff0000; valaddr_reg:x3; val_offset:39627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39627*FLEN/8, x4, x1, x2) - -inst_13210: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaff8000; valaddr_reg:x3; val_offset:39630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39630*FLEN/8, x4, x1, x2) - -inst_13211: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaffc000; valaddr_reg:x3; val_offset:39633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39633*FLEN/8, x4, x1, x2) - -inst_13212: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaffe000; valaddr_reg:x3; val_offset:39636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39636*FLEN/8, x4, x1, x2) - -inst_13213: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafff000; valaddr_reg:x3; val_offset:39639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39639*FLEN/8, x4, x1, x2) - -inst_13214: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafff800; valaddr_reg:x3; val_offset:39642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39642*FLEN/8, x4, x1, x2) - -inst_13215: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafffc00; valaddr_reg:x3; val_offset:39645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39645*FLEN/8, x4, x1, x2) - -inst_13216: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafffe00; valaddr_reg:x3; val_offset:39648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39648*FLEN/8, x4, x1, x2) - -inst_13217: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaffff00; valaddr_reg:x3; val_offset:39651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39651*FLEN/8, x4, x1, x2) - -inst_13218: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaffff80; valaddr_reg:x3; val_offset:39654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39654*FLEN/8, x4, x1, x2) - -inst_13219: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaffffc0; valaddr_reg:x3; val_offset:39657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39657*FLEN/8, x4, x1, x2) - -inst_13220: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaffffe0; valaddr_reg:x3; val_offset:39660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39660*FLEN/8, x4, x1, x2) - -inst_13221: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafffff0; valaddr_reg:x3; val_offset:39663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39663*FLEN/8, x4, x1, x2) - -inst_13222: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafffff8; valaddr_reg:x3; val_offset:39666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39666*FLEN/8, x4, x1, x2) - -inst_13223: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafffffc; valaddr_reg:x3; val_offset:39669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39669*FLEN/8, x4, x1, x2) - -inst_13224: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xafffffe; valaddr_reg:x3; val_offset:39672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39672*FLEN/8, x4, x1, x2) - -inst_13225: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; -op3val:0xaffffff; valaddr_reg:x3; val_offset:39675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39675*FLEN/8, x4, x1, x2) - -inst_13226: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:39678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39678*FLEN/8, x4, x1, x2) - -inst_13227: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:39681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39681*FLEN/8, x4, x1, x2) - -inst_13228: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:39684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39684*FLEN/8, x4, x1, x2) - -inst_13229: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:39687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39687*FLEN/8, x4, x1, x2) - -inst_13230: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:39690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39690*FLEN/8, x4, x1, x2) - -inst_13231: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:39693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39693*FLEN/8, x4, x1, x2) - -inst_13232: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:39696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39696*FLEN/8, x4, x1, x2) - -inst_13233: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:39699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39699*FLEN/8, x4, x1, x2) - -inst_13234: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:39702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39702*FLEN/8, x4, x1, x2) - -inst_13235: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:39705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39705*FLEN/8, x4, x1, x2) - -inst_13236: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:39708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39708*FLEN/8, x4, x1, x2) - -inst_13237: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:39711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39711*FLEN/8, x4, x1, x2) - -inst_13238: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:39714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39714*FLEN/8, x4, x1, x2) - -inst_13239: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:39717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39717*FLEN/8, x4, x1, x2) - -inst_13240: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:39720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39720*FLEN/8, x4, x1, x2) - -inst_13241: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:39723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39723*FLEN/8, x4, x1, x2) - -inst_13242: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe800000; valaddr_reg:x3; val_offset:39726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39726*FLEN/8, x4, x1, x2) - -inst_13243: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe800001; valaddr_reg:x3; val_offset:39729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39729*FLEN/8, x4, x1, x2) - -inst_13244: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe800003; valaddr_reg:x3; val_offset:39732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39732*FLEN/8, x4, x1, x2) - -inst_13245: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe800007; valaddr_reg:x3; val_offset:39735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39735*FLEN/8, x4, x1, x2) - -inst_13246: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe80000f; valaddr_reg:x3; val_offset:39738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39738*FLEN/8, x4, x1, x2) - -inst_13247: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe80001f; valaddr_reg:x3; val_offset:39741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39741*FLEN/8, x4, x1, x2) - -inst_13248: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe80003f; valaddr_reg:x3; val_offset:39744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39744*FLEN/8, x4, x1, x2) - -inst_13249: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe80007f; valaddr_reg:x3; val_offset:39747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39747*FLEN/8, x4, x1, x2) - -inst_13250: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe8000ff; valaddr_reg:x3; val_offset:39750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39750*FLEN/8, x4, x1, x2) - -inst_13251: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe8001ff; valaddr_reg:x3; val_offset:39753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39753*FLEN/8, x4, x1, x2) - -inst_13252: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe8003ff; valaddr_reg:x3; val_offset:39756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39756*FLEN/8, x4, x1, x2) - -inst_13253: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe8007ff; valaddr_reg:x3; val_offset:39759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39759*FLEN/8, x4, x1, x2) - -inst_13254: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe800fff; valaddr_reg:x3; val_offset:39762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39762*FLEN/8, x4, x1, x2) - -inst_13255: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe801fff; valaddr_reg:x3; val_offset:39765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39765*FLEN/8, x4, x1, x2) - -inst_13256: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe803fff; valaddr_reg:x3; val_offset:39768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39768*FLEN/8, x4, x1, x2) - -inst_13257: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe807fff; valaddr_reg:x3; val_offset:39771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39771*FLEN/8, x4, x1, x2) - -inst_13258: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe80ffff; valaddr_reg:x3; val_offset:39774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39774*FLEN/8, x4, x1, x2) - -inst_13259: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe81ffff; valaddr_reg:x3; val_offset:39777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39777*FLEN/8, x4, x1, x2) - -inst_13260: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe83ffff; valaddr_reg:x3; val_offset:39780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39780*FLEN/8, x4, x1, x2) - -inst_13261: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe87ffff; valaddr_reg:x3; val_offset:39783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39783*FLEN/8, x4, x1, x2) - -inst_13262: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe8fffff; valaddr_reg:x3; val_offset:39786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39786*FLEN/8, x4, x1, x2) - -inst_13263: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xe9fffff; valaddr_reg:x3; val_offset:39789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39789*FLEN/8, x4, x1, x2) - -inst_13264: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xebfffff; valaddr_reg:x3; val_offset:39792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39792*FLEN/8, x4, x1, x2) - -inst_13265: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xec00000; valaddr_reg:x3; val_offset:39795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39795*FLEN/8, x4, x1, x2) - -inst_13266: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xee00000; valaddr_reg:x3; val_offset:39798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39798*FLEN/8, x4, x1, x2) - -inst_13267: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xef00000; valaddr_reg:x3; val_offset:39801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39801*FLEN/8, x4, x1, x2) - -inst_13268: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xef80000; valaddr_reg:x3; val_offset:39804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39804*FLEN/8, x4, x1, x2) - -inst_13269: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefc0000; valaddr_reg:x3; val_offset:39807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39807*FLEN/8, x4, x1, x2) - -inst_13270: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefe0000; valaddr_reg:x3; val_offset:39810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39810*FLEN/8, x4, x1, x2) - -inst_13271: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeff0000; valaddr_reg:x3; val_offset:39813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39813*FLEN/8, x4, x1, x2) - -inst_13272: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeff8000; valaddr_reg:x3; val_offset:39816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39816*FLEN/8, x4, x1, x2) - -inst_13273: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeffc000; valaddr_reg:x3; val_offset:39819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39819*FLEN/8, x4, x1, x2) - -inst_13274: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeffe000; valaddr_reg:x3; val_offset:39822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39822*FLEN/8, x4, x1, x2) - -inst_13275: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefff000; valaddr_reg:x3; val_offset:39825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39825*FLEN/8, x4, x1, x2) - -inst_13276: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefff800; valaddr_reg:x3; val_offset:39828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39828*FLEN/8, x4, x1, x2) - -inst_13277: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefffc00; valaddr_reg:x3; val_offset:39831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39831*FLEN/8, x4, x1, x2) - -inst_13278: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefffe00; valaddr_reg:x3; val_offset:39834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39834*FLEN/8, x4, x1, x2) - -inst_13279: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeffff00; valaddr_reg:x3; val_offset:39837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39837*FLEN/8, x4, x1, x2) - -inst_13280: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeffff80; valaddr_reg:x3; val_offset:39840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39840*FLEN/8, x4, x1, x2) - -inst_13281: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeffffc0; valaddr_reg:x3; val_offset:39843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39843*FLEN/8, x4, x1, x2) - -inst_13282: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeffffe0; valaddr_reg:x3; val_offset:39846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39846*FLEN/8, x4, x1, x2) - -inst_13283: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefffff0; valaddr_reg:x3; val_offset:39849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39849*FLEN/8, x4, x1, x2) - -inst_13284: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefffff8; valaddr_reg:x3; val_offset:39852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39852*FLEN/8, x4, x1, x2) - -inst_13285: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefffffc; valaddr_reg:x3; val_offset:39855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39855*FLEN/8, x4, x1, x2) - -inst_13286: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xefffffe; valaddr_reg:x3; val_offset:39858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39858*FLEN/8, x4, x1, x2) - -inst_13287: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; -op3val:0xeffffff; valaddr_reg:x3; val_offset:39861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39861*FLEN/8, x4, x1, x2) - -inst_13288: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:39864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39864*FLEN/8, x4, x1, x2) - -inst_13289: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:39867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39867*FLEN/8, x4, x1, x2) - -inst_13290: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:39870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39870*FLEN/8, x4, x1, x2) - -inst_13291: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:39873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39873*FLEN/8, x4, x1, x2) - -inst_13292: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:39876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39876*FLEN/8, x4, x1, x2) - -inst_13293: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:39879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39879*FLEN/8, x4, x1, x2) - -inst_13294: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:39882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39882*FLEN/8, x4, x1, x2) - -inst_13295: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:39885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39885*FLEN/8, x4, x1, x2) - -inst_13296: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:39888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39888*FLEN/8, x4, x1, x2) - -inst_13297: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:39891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39891*FLEN/8, x4, x1, x2) - -inst_13298: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:39894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39894*FLEN/8, x4, x1, x2) - -inst_13299: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:39897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39897*FLEN/8, x4, x1, x2) - -inst_13300: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:39900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39900*FLEN/8, x4, x1, x2) - -inst_13301: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:39903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39903*FLEN/8, x4, x1, x2) - -inst_13302: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:39906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39906*FLEN/8, x4, x1, x2) - -inst_13303: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:39909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39909*FLEN/8, x4, x1, x2) - -inst_13304: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b800000; valaddr_reg:x3; val_offset:39912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39912*FLEN/8, x4, x1, x2) - -inst_13305: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b800001; valaddr_reg:x3; val_offset:39915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39915*FLEN/8, x4, x1, x2) - -inst_13306: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b800003; valaddr_reg:x3; val_offset:39918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39918*FLEN/8, x4, x1, x2) - -inst_13307: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b800007; valaddr_reg:x3; val_offset:39921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39921*FLEN/8, x4, x1, x2) - -inst_13308: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b80000f; valaddr_reg:x3; val_offset:39924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39924*FLEN/8, x4, x1, x2) - -inst_13309: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b80001f; valaddr_reg:x3; val_offset:39927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39927*FLEN/8, x4, x1, x2) - -inst_13310: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b80003f; valaddr_reg:x3; val_offset:39930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39930*FLEN/8, x4, x1, x2) - -inst_13311: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b80007f; valaddr_reg:x3; val_offset:39933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39933*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_105) - -inst_13312: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b8000ff; valaddr_reg:x3; val_offset:39936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39936*FLEN/8, x4, x1, x2) - -inst_13313: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b8001ff; valaddr_reg:x3; val_offset:39939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39939*FLEN/8, x4, x1, x2) - -inst_13314: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b8003ff; valaddr_reg:x3; val_offset:39942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39942*FLEN/8, x4, x1, x2) - -inst_13315: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b8007ff; valaddr_reg:x3; val_offset:39945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39945*FLEN/8, x4, x1, x2) - -inst_13316: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b800fff; valaddr_reg:x3; val_offset:39948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39948*FLEN/8, x4, x1, x2) - -inst_13317: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b801fff; valaddr_reg:x3; val_offset:39951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39951*FLEN/8, x4, x1, x2) - -inst_13318: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b803fff; valaddr_reg:x3; val_offset:39954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39954*FLEN/8, x4, x1, x2) - -inst_13319: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b807fff; valaddr_reg:x3; val_offset:39957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39957*FLEN/8, x4, x1, x2) - -inst_13320: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b80ffff; valaddr_reg:x3; val_offset:39960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39960*FLEN/8, x4, x1, x2) - -inst_13321: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b81ffff; valaddr_reg:x3; val_offset:39963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39963*FLEN/8, x4, x1, x2) - -inst_13322: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b83ffff; valaddr_reg:x3; val_offset:39966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39966*FLEN/8, x4, x1, x2) - -inst_13323: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b87ffff; valaddr_reg:x3; val_offset:39969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39969*FLEN/8, x4, x1, x2) - -inst_13324: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b8fffff; valaddr_reg:x3; val_offset:39972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39972*FLEN/8, x4, x1, x2) - -inst_13325: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8b9fffff; valaddr_reg:x3; val_offset:39975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39975*FLEN/8, x4, x1, x2) - -inst_13326: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bbfffff; valaddr_reg:x3; val_offset:39978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39978*FLEN/8, x4, x1, x2) - -inst_13327: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bc00000; valaddr_reg:x3; val_offset:39981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39981*FLEN/8, x4, x1, x2) - -inst_13328: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8be00000; valaddr_reg:x3; val_offset:39984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39984*FLEN/8, x4, x1, x2) - -inst_13329: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bf00000; valaddr_reg:x3; val_offset:39987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39987*FLEN/8, x4, x1, x2) - -inst_13330: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bf80000; valaddr_reg:x3; val_offset:39990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39990*FLEN/8, x4, x1, x2) - -inst_13331: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfc0000; valaddr_reg:x3; val_offset:39993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39993*FLEN/8, x4, x1, x2) - -inst_13332: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfe0000; valaddr_reg:x3; val_offset:39996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39996*FLEN/8, x4, x1, x2) - -inst_13333: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bff0000; valaddr_reg:x3; val_offset:39999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39999*FLEN/8, x4, x1, x2) - -inst_13334: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bff8000; valaddr_reg:x3; val_offset:40002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40002*FLEN/8, x4, x1, x2) - -inst_13335: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bffc000; valaddr_reg:x3; val_offset:40005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40005*FLEN/8, x4, x1, x2) - -inst_13336: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bffe000; valaddr_reg:x3; val_offset:40008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40008*FLEN/8, x4, x1, x2) - -inst_13337: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfff000; valaddr_reg:x3; val_offset:40011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40011*FLEN/8, x4, x1, x2) - -inst_13338: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfff800; valaddr_reg:x3; val_offset:40014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40014*FLEN/8, x4, x1, x2) - -inst_13339: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfffc00; valaddr_reg:x3; val_offset:40017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40017*FLEN/8, x4, x1, x2) - -inst_13340: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfffe00; valaddr_reg:x3; val_offset:40020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40020*FLEN/8, x4, x1, x2) - -inst_13341: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bffff00; valaddr_reg:x3; val_offset:40023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40023*FLEN/8, x4, x1, x2) - -inst_13342: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bffff80; valaddr_reg:x3; val_offset:40026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40026*FLEN/8, x4, x1, x2) - -inst_13343: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bffffc0; valaddr_reg:x3; val_offset:40029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40029*FLEN/8, x4, x1, x2) - -inst_13344: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bffffe0; valaddr_reg:x3; val_offset:40032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40032*FLEN/8, x4, x1, x2) - -inst_13345: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfffff0; valaddr_reg:x3; val_offset:40035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40035*FLEN/8, x4, x1, x2) - -inst_13346: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfffff8; valaddr_reg:x3; val_offset:40038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40038*FLEN/8, x4, x1, x2) - -inst_13347: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfffffc; valaddr_reg:x3; val_offset:40041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40041*FLEN/8, x4, x1, x2) - -inst_13348: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bfffffe; valaddr_reg:x3; val_offset:40044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40044*FLEN/8, x4, x1, x2) - -inst_13349: -// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; -op3val:0x8bffffff; valaddr_reg:x3; val_offset:40047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40047*FLEN/8, x4, x1, x2) - -inst_13350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e800000; valaddr_reg:x3; val_offset:40050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40050*FLEN/8, x4, x1, x2) - -inst_13351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e800001; valaddr_reg:x3; val_offset:40053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40053*FLEN/8, x4, x1, x2) - -inst_13352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e800003; valaddr_reg:x3; val_offset:40056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40056*FLEN/8, x4, x1, x2) - -inst_13353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e800007; valaddr_reg:x3; val_offset:40059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40059*FLEN/8, x4, x1, x2) - -inst_13354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e80000f; valaddr_reg:x3; val_offset:40062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40062*FLEN/8, x4, x1, x2) - -inst_13355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e80001f; valaddr_reg:x3; val_offset:40065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40065*FLEN/8, x4, x1, x2) - -inst_13356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e80003f; valaddr_reg:x3; val_offset:40068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40068*FLEN/8, x4, x1, x2) - -inst_13357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e80007f; valaddr_reg:x3; val_offset:40071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40071*FLEN/8, x4, x1, x2) - -inst_13358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e8000ff; valaddr_reg:x3; val_offset:40074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40074*FLEN/8, x4, x1, x2) - -inst_13359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e8001ff; valaddr_reg:x3; val_offset:40077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40077*FLEN/8, x4, x1, x2) - -inst_13360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e8003ff; valaddr_reg:x3; val_offset:40080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40080*FLEN/8, x4, x1, x2) - -inst_13361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e8007ff; valaddr_reg:x3; val_offset:40083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40083*FLEN/8, x4, x1, x2) - -inst_13362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e800fff; valaddr_reg:x3; val_offset:40086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40086*FLEN/8, x4, x1, x2) - -inst_13363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e801fff; valaddr_reg:x3; val_offset:40089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40089*FLEN/8, x4, x1, x2) - -inst_13364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e803fff; valaddr_reg:x3; val_offset:40092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40092*FLEN/8, x4, x1, x2) - -inst_13365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e807fff; valaddr_reg:x3; val_offset:40095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40095*FLEN/8, x4, x1, x2) - -inst_13366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e80ffff; valaddr_reg:x3; val_offset:40098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40098*FLEN/8, x4, x1, x2) - -inst_13367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e81ffff; valaddr_reg:x3; val_offset:40101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40101*FLEN/8, x4, x1, x2) - -inst_13368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e83ffff; valaddr_reg:x3; val_offset:40104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40104*FLEN/8, x4, x1, x2) - -inst_13369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e87ffff; valaddr_reg:x3; val_offset:40107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40107*FLEN/8, x4, x1, x2) - -inst_13370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e8fffff; valaddr_reg:x3; val_offset:40110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40110*FLEN/8, x4, x1, x2) - -inst_13371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6e9fffff; valaddr_reg:x3; val_offset:40113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40113*FLEN/8, x4, x1, x2) - -inst_13372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6ebfffff; valaddr_reg:x3; val_offset:40116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40116*FLEN/8, x4, x1, x2) - -inst_13373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6ec00000; valaddr_reg:x3; val_offset:40119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40119*FLEN/8, x4, x1, x2) - -inst_13374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6ee00000; valaddr_reg:x3; val_offset:40122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40122*FLEN/8, x4, x1, x2) - -inst_13375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6ef00000; valaddr_reg:x3; val_offset:40125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40125*FLEN/8, x4, x1, x2) - -inst_13376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6ef80000; valaddr_reg:x3; val_offset:40128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40128*FLEN/8, x4, x1, x2) - -inst_13377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efc0000; valaddr_reg:x3; val_offset:40131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40131*FLEN/8, x4, x1, x2) - -inst_13378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efe0000; valaddr_reg:x3; val_offset:40134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40134*FLEN/8, x4, x1, x2) - -inst_13379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6eff0000; valaddr_reg:x3; val_offset:40137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40137*FLEN/8, x4, x1, x2) - -inst_13380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6eff8000; valaddr_reg:x3; val_offset:40140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40140*FLEN/8, x4, x1, x2) - -inst_13381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6effc000; valaddr_reg:x3; val_offset:40143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40143*FLEN/8, x4, x1, x2) - -inst_13382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6effe000; valaddr_reg:x3; val_offset:40146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40146*FLEN/8, x4, x1, x2) - -inst_13383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efff000; valaddr_reg:x3; val_offset:40149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40149*FLEN/8, x4, x1, x2) - -inst_13384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efff800; valaddr_reg:x3; val_offset:40152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40152*FLEN/8, x4, x1, x2) - -inst_13385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efffc00; valaddr_reg:x3; val_offset:40155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40155*FLEN/8, x4, x1, x2) - -inst_13386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efffe00; valaddr_reg:x3; val_offset:40158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40158*FLEN/8, x4, x1, x2) - -inst_13387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6effff00; valaddr_reg:x3; val_offset:40161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40161*FLEN/8, x4, x1, x2) - -inst_13388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6effff80; valaddr_reg:x3; val_offset:40164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40164*FLEN/8, x4, x1, x2) - -inst_13389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6effffc0; valaddr_reg:x3; val_offset:40167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40167*FLEN/8, x4, x1, x2) - -inst_13390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6effffe0; valaddr_reg:x3; val_offset:40170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40170*FLEN/8, x4, x1, x2) - -inst_13391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efffff0; valaddr_reg:x3; val_offset:40173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40173*FLEN/8, x4, x1, x2) - -inst_13392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efffff8; valaddr_reg:x3; val_offset:40176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40176*FLEN/8, x4, x1, x2) - -inst_13393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efffffc; valaddr_reg:x3; val_offset:40179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40179*FLEN/8, x4, x1, x2) - -inst_13394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6efffffe; valaddr_reg:x3; val_offset:40182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40182*FLEN/8, x4, x1, x2) - -inst_13395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x6effffff; valaddr_reg:x3; val_offset:40185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40185*FLEN/8, x4, x1, x2) - -inst_13396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f000001; valaddr_reg:x3; val_offset:40188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40188*FLEN/8, x4, x1, x2) - -inst_13397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f000003; valaddr_reg:x3; val_offset:40191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40191*FLEN/8, x4, x1, x2) - -inst_13398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f000007; valaddr_reg:x3; val_offset:40194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40194*FLEN/8, x4, x1, x2) - -inst_13399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f199999; valaddr_reg:x3; val_offset:40197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40197*FLEN/8, x4, x1, x2) - -inst_13400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f249249; valaddr_reg:x3; val_offset:40200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40200*FLEN/8, x4, x1, x2) - -inst_13401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f333333; valaddr_reg:x3; val_offset:40203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40203*FLEN/8, x4, x1, x2) - -inst_13402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:40206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40206*FLEN/8, x4, x1, x2) - -inst_13403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:40209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40209*FLEN/8, x4, x1, x2) - -inst_13404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f444444; valaddr_reg:x3; val_offset:40212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40212*FLEN/8, x4, x1, x2) - -inst_13405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:40215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40215*FLEN/8, x4, x1, x2) - -inst_13406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:40218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40218*FLEN/8, x4, x1, x2) - -inst_13407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f666666; valaddr_reg:x3; val_offset:40221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40221*FLEN/8, x4, x1, x2) - -inst_13408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:40224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40224*FLEN/8, x4, x1, x2) - -inst_13409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:40227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40227*FLEN/8, x4, x1, x2) - -inst_13410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:40230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40230*FLEN/8, x4, x1, x2) - -inst_13411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:40233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40233*FLEN/8, x4, x1, x2) - -inst_13412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c000000; valaddr_reg:x3; val_offset:40236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40236*FLEN/8, x4, x1, x2) - -inst_13413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c000001; valaddr_reg:x3; val_offset:40239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40239*FLEN/8, x4, x1, x2) - -inst_13414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c000003; valaddr_reg:x3; val_offset:40242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40242*FLEN/8, x4, x1, x2) - -inst_13415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c000007; valaddr_reg:x3; val_offset:40245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40245*FLEN/8, x4, x1, x2) - -inst_13416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c00000f; valaddr_reg:x3; val_offset:40248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40248*FLEN/8, x4, x1, x2) - -inst_13417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c00001f; valaddr_reg:x3; val_offset:40251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40251*FLEN/8, x4, x1, x2) - -inst_13418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c00003f; valaddr_reg:x3; val_offset:40254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40254*FLEN/8, x4, x1, x2) - -inst_13419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c00007f; valaddr_reg:x3; val_offset:40257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40257*FLEN/8, x4, x1, x2) - -inst_13420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c0000ff; valaddr_reg:x3; val_offset:40260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40260*FLEN/8, x4, x1, x2) - -inst_13421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c0001ff; valaddr_reg:x3; val_offset:40263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40263*FLEN/8, x4, x1, x2) - -inst_13422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c0003ff; valaddr_reg:x3; val_offset:40266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40266*FLEN/8, x4, x1, x2) - -inst_13423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c0007ff; valaddr_reg:x3; val_offset:40269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40269*FLEN/8, x4, x1, x2) - -inst_13424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c000fff; valaddr_reg:x3; val_offset:40272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40272*FLEN/8, x4, x1, x2) - -inst_13425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c001fff; valaddr_reg:x3; val_offset:40275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40275*FLEN/8, x4, x1, x2) - -inst_13426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c003fff; valaddr_reg:x3; val_offset:40278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40278*FLEN/8, x4, x1, x2) - -inst_13427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c007fff; valaddr_reg:x3; val_offset:40281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40281*FLEN/8, x4, x1, x2) - -inst_13428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c00ffff; valaddr_reg:x3; val_offset:40284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40284*FLEN/8, x4, x1, x2) - -inst_13429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c01ffff; valaddr_reg:x3; val_offset:40287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40287*FLEN/8, x4, x1, x2) - -inst_13430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c03ffff; valaddr_reg:x3; val_offset:40290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40290*FLEN/8, x4, x1, x2) - -inst_13431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c07ffff; valaddr_reg:x3; val_offset:40293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40293*FLEN/8, x4, x1, x2) - -inst_13432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c0fffff; valaddr_reg:x3; val_offset:40296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40296*FLEN/8, x4, x1, x2) - -inst_13433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c1fffff; valaddr_reg:x3; val_offset:40299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40299*FLEN/8, x4, x1, x2) - -inst_13434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c3fffff; valaddr_reg:x3; val_offset:40302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40302*FLEN/8, x4, x1, x2) - -inst_13435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c400000; valaddr_reg:x3; val_offset:40305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40305*FLEN/8, x4, x1, x2) - -inst_13436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c600000; valaddr_reg:x3; val_offset:40308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40308*FLEN/8, x4, x1, x2) - -inst_13437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c700000; valaddr_reg:x3; val_offset:40311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40311*FLEN/8, x4, x1, x2) - -inst_13438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c780000; valaddr_reg:x3; val_offset:40314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40314*FLEN/8, x4, x1, x2) - -inst_13439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7c0000; valaddr_reg:x3; val_offset:40317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40317*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_106) - -inst_13440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7e0000; valaddr_reg:x3; val_offset:40320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40320*FLEN/8, x4, x1, x2) - -inst_13441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7f0000; valaddr_reg:x3; val_offset:40323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40323*FLEN/8, x4, x1, x2) - -inst_13442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7f8000; valaddr_reg:x3; val_offset:40326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40326*FLEN/8, x4, x1, x2) - -inst_13443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7fc000; valaddr_reg:x3; val_offset:40329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40329*FLEN/8, x4, x1, x2) - -inst_13444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7fe000; valaddr_reg:x3; val_offset:40332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40332*FLEN/8, x4, x1, x2) - -inst_13445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7ff000; valaddr_reg:x3; val_offset:40335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40335*FLEN/8, x4, x1, x2) - -inst_13446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7ff800; valaddr_reg:x3; val_offset:40338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40338*FLEN/8, x4, x1, x2) - -inst_13447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7ffc00; valaddr_reg:x3; val_offset:40341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40341*FLEN/8, x4, x1, x2) - -inst_13448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7ffe00; valaddr_reg:x3; val_offset:40344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40344*FLEN/8, x4, x1, x2) - -inst_13449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7fff00; valaddr_reg:x3; val_offset:40347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40347*FLEN/8, x4, x1, x2) - -inst_13450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7fff80; valaddr_reg:x3; val_offset:40350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40350*FLEN/8, x4, x1, x2) - -inst_13451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7fffc0; valaddr_reg:x3; val_offset:40353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40353*FLEN/8, x4, x1, x2) - -inst_13452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7fffe0; valaddr_reg:x3; val_offset:40356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40356*FLEN/8, x4, x1, x2) - -inst_13453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7ffff0; valaddr_reg:x3; val_offset:40359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40359*FLEN/8, x4, x1, x2) - -inst_13454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7ffff8; valaddr_reg:x3; val_offset:40362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40362*FLEN/8, x4, x1, x2) - -inst_13455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7ffffc; valaddr_reg:x3; val_offset:40365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40365*FLEN/8, x4, x1, x2) - -inst_13456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7ffffe; valaddr_reg:x3; val_offset:40368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40368*FLEN/8, x4, x1, x2) - -inst_13457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x2c7fffff; valaddr_reg:x3; val_offset:40371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40371*FLEN/8, x4, x1, x2) - -inst_13458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3f800001; valaddr_reg:x3; val_offset:40374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40374*FLEN/8, x4, x1, x2) - -inst_13459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3f800003; valaddr_reg:x3; val_offset:40377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40377*FLEN/8, x4, x1, x2) - -inst_13460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3f800007; valaddr_reg:x3; val_offset:40380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40380*FLEN/8, x4, x1, x2) - -inst_13461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3f999999; valaddr_reg:x3; val_offset:40383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40383*FLEN/8, x4, x1, x2) - -inst_13462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:40386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40386*FLEN/8, x4, x1, x2) - -inst_13463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:40389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40389*FLEN/8, x4, x1, x2) - -inst_13464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:40392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40392*FLEN/8, x4, x1, x2) - -inst_13465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:40395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40395*FLEN/8, x4, x1, x2) - -inst_13466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:40398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40398*FLEN/8, x4, x1, x2) - -inst_13467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:40401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40401*FLEN/8, x4, x1, x2) - -inst_13468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:40404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40404*FLEN/8, x4, x1, x2) - -inst_13469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:40407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40407*FLEN/8, x4, x1, x2) - -inst_13470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:40410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40410*FLEN/8, x4, x1, x2) - -inst_13471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:40413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40413*FLEN/8, x4, x1, x2) - -inst_13472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:40416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40416*FLEN/8, x4, x1, x2) - -inst_13473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:40419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40419*FLEN/8, x4, x1, x2) - -inst_13474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbf800001; valaddr_reg:x3; val_offset:40422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40422*FLEN/8, x4, x1, x2) - -inst_13475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbf800003; valaddr_reg:x3; val_offset:40425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40425*FLEN/8, x4, x1, x2) - -inst_13476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbf800007; valaddr_reg:x3; val_offset:40428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40428*FLEN/8, x4, x1, x2) - -inst_13477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbf999999; valaddr_reg:x3; val_offset:40431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40431*FLEN/8, x4, x1, x2) - -inst_13478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:40434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40434*FLEN/8, x4, x1, x2) - -inst_13479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:40437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40437*FLEN/8, x4, x1, x2) - -inst_13480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:40440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40440*FLEN/8, x4, x1, x2) - -inst_13481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:40443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40443*FLEN/8, x4, x1, x2) - -inst_13482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:40446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40446*FLEN/8, x4, x1, x2) - -inst_13483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:40449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40449*FLEN/8, x4, x1, x2) - -inst_13484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:40452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40452*FLEN/8, x4, x1, x2) - -inst_13485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:40455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40455*FLEN/8, x4, x1, x2) - -inst_13486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:40458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40458*FLEN/8, x4, x1, x2) - -inst_13487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:40461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40461*FLEN/8, x4, x1, x2) - -inst_13488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:40464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40464*FLEN/8, x4, x1, x2) - -inst_13489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:40467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40467*FLEN/8, x4, x1, x2) - -inst_13490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd800000; valaddr_reg:x3; val_offset:40470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40470*FLEN/8, x4, x1, x2) - -inst_13491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd800001; valaddr_reg:x3; val_offset:40473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40473*FLEN/8, x4, x1, x2) - -inst_13492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd800003; valaddr_reg:x3; val_offset:40476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40476*FLEN/8, x4, x1, x2) - -inst_13493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd800007; valaddr_reg:x3; val_offset:40479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40479*FLEN/8, x4, x1, x2) - -inst_13494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd80000f; valaddr_reg:x3; val_offset:40482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40482*FLEN/8, x4, x1, x2) - -inst_13495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd80001f; valaddr_reg:x3; val_offset:40485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40485*FLEN/8, x4, x1, x2) - -inst_13496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd80003f; valaddr_reg:x3; val_offset:40488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40488*FLEN/8, x4, x1, x2) - -inst_13497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd80007f; valaddr_reg:x3; val_offset:40491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40491*FLEN/8, x4, x1, x2) - -inst_13498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd8000ff; valaddr_reg:x3; val_offset:40494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40494*FLEN/8, x4, x1, x2) - -inst_13499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd8001ff; valaddr_reg:x3; val_offset:40497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40497*FLEN/8, x4, x1, x2) - -inst_13500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd8003ff; valaddr_reg:x3; val_offset:40500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40500*FLEN/8, x4, x1, x2) - -inst_13501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd8007ff; valaddr_reg:x3; val_offset:40503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40503*FLEN/8, x4, x1, x2) - -inst_13502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd800fff; valaddr_reg:x3; val_offset:40506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40506*FLEN/8, x4, x1, x2) - -inst_13503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd801fff; valaddr_reg:x3; val_offset:40509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40509*FLEN/8, x4, x1, x2) - -inst_13504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd803fff; valaddr_reg:x3; val_offset:40512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40512*FLEN/8, x4, x1, x2) - -inst_13505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd807fff; valaddr_reg:x3; val_offset:40515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40515*FLEN/8, x4, x1, x2) - -inst_13506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd80ffff; valaddr_reg:x3; val_offset:40518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40518*FLEN/8, x4, x1, x2) - -inst_13507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd81ffff; valaddr_reg:x3; val_offset:40521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40521*FLEN/8, x4, x1, x2) - -inst_13508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd83ffff; valaddr_reg:x3; val_offset:40524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40524*FLEN/8, x4, x1, x2) - -inst_13509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd87ffff; valaddr_reg:x3; val_offset:40527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40527*FLEN/8, x4, x1, x2) - -inst_13510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd8fffff; valaddr_reg:x3; val_offset:40530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40530*FLEN/8, x4, x1, x2) - -inst_13511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcd9fffff; valaddr_reg:x3; val_offset:40533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40533*FLEN/8, x4, x1, x2) - -inst_13512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdbfffff; valaddr_reg:x3; val_offset:40536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40536*FLEN/8, x4, x1, x2) - -inst_13513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdc00000; valaddr_reg:x3; val_offset:40539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40539*FLEN/8, x4, x1, x2) - -inst_13514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcde00000; valaddr_reg:x3; val_offset:40542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40542*FLEN/8, x4, x1, x2) - -inst_13515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdf00000; valaddr_reg:x3; val_offset:40545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40545*FLEN/8, x4, x1, x2) - -inst_13516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdf80000; valaddr_reg:x3; val_offset:40548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40548*FLEN/8, x4, x1, x2) - -inst_13517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfc0000; valaddr_reg:x3; val_offset:40551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40551*FLEN/8, x4, x1, x2) - -inst_13518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfe0000; valaddr_reg:x3; val_offset:40554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40554*FLEN/8, x4, x1, x2) - -inst_13519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdff0000; valaddr_reg:x3; val_offset:40557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40557*FLEN/8, x4, x1, x2) - -inst_13520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdff8000; valaddr_reg:x3; val_offset:40560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40560*FLEN/8, x4, x1, x2) - -inst_13521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdffc000; valaddr_reg:x3; val_offset:40563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40563*FLEN/8, x4, x1, x2) - -inst_13522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdffe000; valaddr_reg:x3; val_offset:40566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40566*FLEN/8, x4, x1, x2) - -inst_13523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfff000; valaddr_reg:x3; val_offset:40569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40569*FLEN/8, x4, x1, x2) - -inst_13524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfff800; valaddr_reg:x3; val_offset:40572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40572*FLEN/8, x4, x1, x2) - -inst_13525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfffc00; valaddr_reg:x3; val_offset:40575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40575*FLEN/8, x4, x1, x2) - -inst_13526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfffe00; valaddr_reg:x3; val_offset:40578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40578*FLEN/8, x4, x1, x2) - -inst_13527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdffff00; valaddr_reg:x3; val_offset:40581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40581*FLEN/8, x4, x1, x2) - -inst_13528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdffff80; valaddr_reg:x3; val_offset:40584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40584*FLEN/8, x4, x1, x2) - -inst_13529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdffffc0; valaddr_reg:x3; val_offset:40587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40587*FLEN/8, x4, x1, x2) - -inst_13530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdffffe0; valaddr_reg:x3; val_offset:40590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40590*FLEN/8, x4, x1, x2) - -inst_13531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfffff0; valaddr_reg:x3; val_offset:40593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40593*FLEN/8, x4, x1, x2) - -inst_13532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfffff8; valaddr_reg:x3; val_offset:40596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40596*FLEN/8, x4, x1, x2) - -inst_13533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfffffc; valaddr_reg:x3; val_offset:40599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40599*FLEN/8, x4, x1, x2) - -inst_13534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdfffffe; valaddr_reg:x3; val_offset:40602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40602*FLEN/8, x4, x1, x2) - -inst_13535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; -op3val:0xcdffffff; valaddr_reg:x3; val_offset:40605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40605*FLEN/8, x4, x1, x2) - -inst_13536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:40608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40608*FLEN/8, x4, x1, x2) - -inst_13537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:40611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40611*FLEN/8, x4, x1, x2) - -inst_13538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:40614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40614*FLEN/8, x4, x1, x2) - -inst_13539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:40617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40617*FLEN/8, x4, x1, x2) - -inst_13540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:40620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40620*FLEN/8, x4, x1, x2) - -inst_13541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:40623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40623*FLEN/8, x4, x1, x2) - -inst_13542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:40626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40626*FLEN/8, x4, x1, x2) - -inst_13543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:40629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40629*FLEN/8, x4, x1, x2) - -inst_13544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:40632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40632*FLEN/8, x4, x1, x2) - -inst_13545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:40635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40635*FLEN/8, x4, x1, x2) - -inst_13546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:40638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40638*FLEN/8, x4, x1, x2) - -inst_13547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:40641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40641*FLEN/8, x4, x1, x2) - -inst_13548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:40644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40644*FLEN/8, x4, x1, x2) - -inst_13549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:40647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40647*FLEN/8, x4, x1, x2) - -inst_13550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:40650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40650*FLEN/8, x4, x1, x2) - -inst_13551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:40653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40653*FLEN/8, x4, x1, x2) - -inst_13552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd800000; valaddr_reg:x3; val_offset:40656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40656*FLEN/8, x4, x1, x2) - -inst_13553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd800001; valaddr_reg:x3; val_offset:40659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40659*FLEN/8, x4, x1, x2) - -inst_13554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd800003; valaddr_reg:x3; val_offset:40662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40662*FLEN/8, x4, x1, x2) - -inst_13555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd800007; valaddr_reg:x3; val_offset:40665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40665*FLEN/8, x4, x1, x2) - -inst_13556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd80000f; valaddr_reg:x3; val_offset:40668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40668*FLEN/8, x4, x1, x2) - -inst_13557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd80001f; valaddr_reg:x3; val_offset:40671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40671*FLEN/8, x4, x1, x2) - -inst_13558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd80003f; valaddr_reg:x3; val_offset:40674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40674*FLEN/8, x4, x1, x2) - -inst_13559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd80007f; valaddr_reg:x3; val_offset:40677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40677*FLEN/8, x4, x1, x2) - -inst_13560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd8000ff; valaddr_reg:x3; val_offset:40680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40680*FLEN/8, x4, x1, x2) - -inst_13561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd8001ff; valaddr_reg:x3; val_offset:40683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40683*FLEN/8, x4, x1, x2) - -inst_13562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd8003ff; valaddr_reg:x3; val_offset:40686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40686*FLEN/8, x4, x1, x2) - -inst_13563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd8007ff; valaddr_reg:x3; val_offset:40689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40689*FLEN/8, x4, x1, x2) - -inst_13564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd800fff; valaddr_reg:x3; val_offset:40692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40692*FLEN/8, x4, x1, x2) - -inst_13565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd801fff; valaddr_reg:x3; val_offset:40695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40695*FLEN/8, x4, x1, x2) - -inst_13566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd803fff; valaddr_reg:x3; val_offset:40698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40698*FLEN/8, x4, x1, x2) - -inst_13567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd807fff; valaddr_reg:x3; val_offset:40701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40701*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_107) - -inst_13568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd80ffff; valaddr_reg:x3; val_offset:40704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40704*FLEN/8, x4, x1, x2) - -inst_13569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd81ffff; valaddr_reg:x3; val_offset:40707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40707*FLEN/8, x4, x1, x2) - -inst_13570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd83ffff; valaddr_reg:x3; val_offset:40710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40710*FLEN/8, x4, x1, x2) - -inst_13571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd87ffff; valaddr_reg:x3; val_offset:40713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40713*FLEN/8, x4, x1, x2) - -inst_13572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd8fffff; valaddr_reg:x3; val_offset:40716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40716*FLEN/8, x4, x1, x2) - -inst_13573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xd9fffff; valaddr_reg:x3; val_offset:40719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40719*FLEN/8, x4, x1, x2) - -inst_13574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdbfffff; valaddr_reg:x3; val_offset:40722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40722*FLEN/8, x4, x1, x2) - -inst_13575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdc00000; valaddr_reg:x3; val_offset:40725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40725*FLEN/8, x4, x1, x2) - -inst_13576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xde00000; valaddr_reg:x3; val_offset:40728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40728*FLEN/8, x4, x1, x2) - -inst_13577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdf00000; valaddr_reg:x3; val_offset:40731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40731*FLEN/8, x4, x1, x2) - -inst_13578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdf80000; valaddr_reg:x3; val_offset:40734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40734*FLEN/8, x4, x1, x2) - -inst_13579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfc0000; valaddr_reg:x3; val_offset:40737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40737*FLEN/8, x4, x1, x2) - -inst_13580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfe0000; valaddr_reg:x3; val_offset:40740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40740*FLEN/8, x4, x1, x2) - -inst_13581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdff0000; valaddr_reg:x3; val_offset:40743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40743*FLEN/8, x4, x1, x2) - -inst_13582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdff8000; valaddr_reg:x3; val_offset:40746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40746*FLEN/8, x4, x1, x2) - -inst_13583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdffc000; valaddr_reg:x3; val_offset:40749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40749*FLEN/8, x4, x1, x2) - -inst_13584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdffe000; valaddr_reg:x3; val_offset:40752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40752*FLEN/8, x4, x1, x2) - -inst_13585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfff000; valaddr_reg:x3; val_offset:40755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40755*FLEN/8, x4, x1, x2) - -inst_13586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfff800; valaddr_reg:x3; val_offset:40758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40758*FLEN/8, x4, x1, x2) - -inst_13587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfffc00; valaddr_reg:x3; val_offset:40761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40761*FLEN/8, x4, x1, x2) - -inst_13588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfffe00; valaddr_reg:x3; val_offset:40764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40764*FLEN/8, x4, x1, x2) - -inst_13589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdffff00; valaddr_reg:x3; val_offset:40767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40767*FLEN/8, x4, x1, x2) - -inst_13590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdffff80; valaddr_reg:x3; val_offset:40770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40770*FLEN/8, x4, x1, x2) - -inst_13591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdffffc0; valaddr_reg:x3; val_offset:40773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40773*FLEN/8, x4, x1, x2) - -inst_13592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdffffe0; valaddr_reg:x3; val_offset:40776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40776*FLEN/8, x4, x1, x2) - -inst_13593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfffff0; valaddr_reg:x3; val_offset:40779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40779*FLEN/8, x4, x1, x2) - -inst_13594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfffff8; valaddr_reg:x3; val_offset:40782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40782*FLEN/8, x4, x1, x2) - -inst_13595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfffffc; valaddr_reg:x3; val_offset:40785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40785*FLEN/8, x4, x1, x2) - -inst_13596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdfffffe; valaddr_reg:x3; val_offset:40788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40788*FLEN/8, x4, x1, x2) - -inst_13597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; -op3val:0xdffffff; valaddr_reg:x3; val_offset:40791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40791*FLEN/8, x4, x1, x2) - -inst_13598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa800000; valaddr_reg:x3; val_offset:40794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40794*FLEN/8, x4, x1, x2) - -inst_13599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa800001; valaddr_reg:x3; val_offset:40797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40797*FLEN/8, x4, x1, x2) - -inst_13600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa800003; valaddr_reg:x3; val_offset:40800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40800*FLEN/8, x4, x1, x2) - -inst_13601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa800007; valaddr_reg:x3; val_offset:40803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40803*FLEN/8, x4, x1, x2) - -inst_13602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa80000f; valaddr_reg:x3; val_offset:40806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40806*FLEN/8, x4, x1, x2) - -inst_13603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa80001f; valaddr_reg:x3; val_offset:40809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40809*FLEN/8, x4, x1, x2) - -inst_13604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa80003f; valaddr_reg:x3; val_offset:40812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40812*FLEN/8, x4, x1, x2) - -inst_13605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa80007f; valaddr_reg:x3; val_offset:40815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40815*FLEN/8, x4, x1, x2) - -inst_13606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa8000ff; valaddr_reg:x3; val_offset:40818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40818*FLEN/8, x4, x1, x2) - -inst_13607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa8001ff; valaddr_reg:x3; val_offset:40821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40821*FLEN/8, x4, x1, x2) - -inst_13608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa8003ff; valaddr_reg:x3; val_offset:40824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40824*FLEN/8, x4, x1, x2) - -inst_13609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa8007ff; valaddr_reg:x3; val_offset:40827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40827*FLEN/8, x4, x1, x2) - -inst_13610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa800fff; valaddr_reg:x3; val_offset:40830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40830*FLEN/8, x4, x1, x2) - -inst_13611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa801fff; valaddr_reg:x3; val_offset:40833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40833*FLEN/8, x4, x1, x2) - -inst_13612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa803fff; valaddr_reg:x3; val_offset:40836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40836*FLEN/8, x4, x1, x2) - -inst_13613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa807fff; valaddr_reg:x3; val_offset:40839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40839*FLEN/8, x4, x1, x2) - -inst_13614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa80ffff; valaddr_reg:x3; val_offset:40842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40842*FLEN/8, x4, x1, x2) - -inst_13615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa81ffff; valaddr_reg:x3; val_offset:40845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40845*FLEN/8, x4, x1, x2) - -inst_13616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa83ffff; valaddr_reg:x3; val_offset:40848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40848*FLEN/8, x4, x1, x2) - -inst_13617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa87ffff; valaddr_reg:x3; val_offset:40851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40851*FLEN/8, x4, x1, x2) - -inst_13618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa8fffff; valaddr_reg:x3; val_offset:40854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40854*FLEN/8, x4, x1, x2) - -inst_13619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfa9fffff; valaddr_reg:x3; val_offset:40857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40857*FLEN/8, x4, x1, x2) - -inst_13620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfabfffff; valaddr_reg:x3; val_offset:40860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40860*FLEN/8, x4, x1, x2) - -inst_13621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfac00000; valaddr_reg:x3; val_offset:40863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40863*FLEN/8, x4, x1, x2) - -inst_13622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfae00000; valaddr_reg:x3; val_offset:40866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40866*FLEN/8, x4, x1, x2) - -inst_13623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaf00000; valaddr_reg:x3; val_offset:40869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40869*FLEN/8, x4, x1, x2) - -inst_13624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaf80000; valaddr_reg:x3; val_offset:40872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40872*FLEN/8, x4, x1, x2) - -inst_13625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafc0000; valaddr_reg:x3; val_offset:40875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40875*FLEN/8, x4, x1, x2) - -inst_13626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafe0000; valaddr_reg:x3; val_offset:40878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40878*FLEN/8, x4, x1, x2) - -inst_13627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaff0000; valaddr_reg:x3; val_offset:40881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40881*FLEN/8, x4, x1, x2) - -inst_13628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaff8000; valaddr_reg:x3; val_offset:40884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40884*FLEN/8, x4, x1, x2) - -inst_13629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaffc000; valaddr_reg:x3; val_offset:40887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40887*FLEN/8, x4, x1, x2) - -inst_13630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaffe000; valaddr_reg:x3; val_offset:40890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40890*FLEN/8, x4, x1, x2) - -inst_13631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafff000; valaddr_reg:x3; val_offset:40893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40893*FLEN/8, x4, x1, x2) - -inst_13632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafff800; valaddr_reg:x3; val_offset:40896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40896*FLEN/8, x4, x1, x2) - -inst_13633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafffc00; valaddr_reg:x3; val_offset:40899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40899*FLEN/8, x4, x1, x2) - -inst_13634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafffe00; valaddr_reg:x3; val_offset:40902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40902*FLEN/8, x4, x1, x2) - -inst_13635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaffff00; valaddr_reg:x3; val_offset:40905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40905*FLEN/8, x4, x1, x2) - -inst_13636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaffff80; valaddr_reg:x3; val_offset:40908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40908*FLEN/8, x4, x1, x2) - -inst_13637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaffffc0; valaddr_reg:x3; val_offset:40911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40911*FLEN/8, x4, x1, x2) - -inst_13638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaffffe0; valaddr_reg:x3; val_offset:40914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40914*FLEN/8, x4, x1, x2) - -inst_13639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafffff0; valaddr_reg:x3; val_offset:40917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40917*FLEN/8, x4, x1, x2) - -inst_13640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafffff8; valaddr_reg:x3; val_offset:40920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40920*FLEN/8, x4, x1, x2) - -inst_13641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafffffc; valaddr_reg:x3; val_offset:40923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40923*FLEN/8, x4, x1, x2) - -inst_13642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfafffffe; valaddr_reg:x3; val_offset:40926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40926*FLEN/8, x4, x1, x2) - -inst_13643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xfaffffff; valaddr_reg:x3; val_offset:40929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40929*FLEN/8, x4, x1, x2) - -inst_13644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff000001; valaddr_reg:x3; val_offset:40932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40932*FLEN/8, x4, x1, x2) - -inst_13645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff000003; valaddr_reg:x3; val_offset:40935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40935*FLEN/8, x4, x1, x2) - -inst_13646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff000007; valaddr_reg:x3; val_offset:40938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40938*FLEN/8, x4, x1, x2) - -inst_13647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff199999; valaddr_reg:x3; val_offset:40941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40941*FLEN/8, x4, x1, x2) - -inst_13648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff249249; valaddr_reg:x3; val_offset:40944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40944*FLEN/8, x4, x1, x2) - -inst_13649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff333333; valaddr_reg:x3; val_offset:40947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40947*FLEN/8, x4, x1, x2) - -inst_13650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:40950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40950*FLEN/8, x4, x1, x2) - -inst_13651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:40953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40953*FLEN/8, x4, x1, x2) - -inst_13652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff444444; valaddr_reg:x3; val_offset:40956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40956*FLEN/8, x4, x1, x2) - -inst_13653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:40959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40959*FLEN/8, x4, x1, x2) - -inst_13654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:40962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40962*FLEN/8, x4, x1, x2) - -inst_13655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff666666; valaddr_reg:x3; val_offset:40965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40965*FLEN/8, x4, x1, x2) - -inst_13656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:40968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40968*FLEN/8, x4, x1, x2) - -inst_13657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:40971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40971*FLEN/8, x4, x1, x2) - -inst_13658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:40974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40974*FLEN/8, x4, x1, x2) - -inst_13659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:40977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40977*FLEN/8, x4, x1, x2) - -inst_13660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:40980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40980*FLEN/8, x4, x1, x2) - -inst_13661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:40983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40983*FLEN/8, x4, x1, x2) - -inst_13662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:40986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40986*FLEN/8, x4, x1, x2) - -inst_13663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:40989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40989*FLEN/8, x4, x1, x2) - -inst_13664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:40992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40992*FLEN/8, x4, x1, x2) - -inst_13665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:40995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40995*FLEN/8, x4, x1, x2) - -inst_13666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:40998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40998*FLEN/8, x4, x1, x2) - -inst_13667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:41001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41001*FLEN/8, x4, x1, x2) - -inst_13668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:41004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41004*FLEN/8, x4, x1, x2) - -inst_13669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:41007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41007*FLEN/8, x4, x1, x2) - -inst_13670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:41010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41010*FLEN/8, x4, x1, x2) - -inst_13671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:41013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41013*FLEN/8, x4, x1, x2) - -inst_13672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:41016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41016*FLEN/8, x4, x1, x2) - -inst_13673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:41019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41019*FLEN/8, x4, x1, x2) - -inst_13674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:41022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41022*FLEN/8, x4, x1, x2) - -inst_13675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:41025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41025*FLEN/8, x4, x1, x2) - -inst_13676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4800000; valaddr_reg:x3; val_offset:41028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41028*FLEN/8, x4, x1, x2) - -inst_13677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4800001; valaddr_reg:x3; val_offset:41031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41031*FLEN/8, x4, x1, x2) - -inst_13678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4800003; valaddr_reg:x3; val_offset:41034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41034*FLEN/8, x4, x1, x2) - -inst_13679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4800007; valaddr_reg:x3; val_offset:41037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41037*FLEN/8, x4, x1, x2) - -inst_13680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x480000f; valaddr_reg:x3; val_offset:41040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41040*FLEN/8, x4, x1, x2) - -inst_13681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x480001f; valaddr_reg:x3; val_offset:41043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41043*FLEN/8, x4, x1, x2) - -inst_13682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x480003f; valaddr_reg:x3; val_offset:41046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41046*FLEN/8, x4, x1, x2) - -inst_13683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x480007f; valaddr_reg:x3; val_offset:41049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41049*FLEN/8, x4, x1, x2) - -inst_13684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x48000ff; valaddr_reg:x3; val_offset:41052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41052*FLEN/8, x4, x1, x2) - -inst_13685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x48001ff; valaddr_reg:x3; val_offset:41055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41055*FLEN/8, x4, x1, x2) - -inst_13686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x48003ff; valaddr_reg:x3; val_offset:41058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41058*FLEN/8, x4, x1, x2) - -inst_13687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x48007ff; valaddr_reg:x3; val_offset:41061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41061*FLEN/8, x4, x1, x2) - -inst_13688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4800fff; valaddr_reg:x3; val_offset:41064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41064*FLEN/8, x4, x1, x2) - -inst_13689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4801fff; valaddr_reg:x3; val_offset:41067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41067*FLEN/8, x4, x1, x2) - -inst_13690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4803fff; valaddr_reg:x3; val_offset:41070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41070*FLEN/8, x4, x1, x2) - -inst_13691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4807fff; valaddr_reg:x3; val_offset:41073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41073*FLEN/8, x4, x1, x2) - -inst_13692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x480ffff; valaddr_reg:x3; val_offset:41076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41076*FLEN/8, x4, x1, x2) - -inst_13693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x481ffff; valaddr_reg:x3; val_offset:41079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41079*FLEN/8, x4, x1, x2) - -inst_13694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x483ffff; valaddr_reg:x3; val_offset:41082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41082*FLEN/8, x4, x1, x2) - -inst_13695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x487ffff; valaddr_reg:x3; val_offset:41085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41085*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_108) - -inst_13696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x48fffff; valaddr_reg:x3; val_offset:41088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41088*FLEN/8, x4, x1, x2) - -inst_13697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x49fffff; valaddr_reg:x3; val_offset:41091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41091*FLEN/8, x4, x1, x2) - -inst_13698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4bfffff; valaddr_reg:x3; val_offset:41094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41094*FLEN/8, x4, x1, x2) - -inst_13699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4c00000; valaddr_reg:x3; val_offset:41097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41097*FLEN/8, x4, x1, x2) - -inst_13700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4e00000; valaddr_reg:x3; val_offset:41100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41100*FLEN/8, x4, x1, x2) - -inst_13701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4f00000; valaddr_reg:x3; val_offset:41103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41103*FLEN/8, x4, x1, x2) - -inst_13702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4f80000; valaddr_reg:x3; val_offset:41106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41106*FLEN/8, x4, x1, x2) - -inst_13703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fc0000; valaddr_reg:x3; val_offset:41109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41109*FLEN/8, x4, x1, x2) - -inst_13704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fe0000; valaddr_reg:x3; val_offset:41112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41112*FLEN/8, x4, x1, x2) - -inst_13705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ff0000; valaddr_reg:x3; val_offset:41115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41115*FLEN/8, x4, x1, x2) - -inst_13706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ff8000; valaddr_reg:x3; val_offset:41118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41118*FLEN/8, x4, x1, x2) - -inst_13707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ffc000; valaddr_reg:x3; val_offset:41121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41121*FLEN/8, x4, x1, x2) - -inst_13708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ffe000; valaddr_reg:x3; val_offset:41124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41124*FLEN/8, x4, x1, x2) - -inst_13709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fff000; valaddr_reg:x3; val_offset:41127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41127*FLEN/8, x4, x1, x2) - -inst_13710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fff800; valaddr_reg:x3; val_offset:41130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41130*FLEN/8, x4, x1, x2) - -inst_13711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fffc00; valaddr_reg:x3; val_offset:41133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41133*FLEN/8, x4, x1, x2) - -inst_13712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fffe00; valaddr_reg:x3; val_offset:41136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41136*FLEN/8, x4, x1, x2) - -inst_13713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ffff00; valaddr_reg:x3; val_offset:41139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41139*FLEN/8, x4, x1, x2) - -inst_13714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ffff80; valaddr_reg:x3; val_offset:41142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41142*FLEN/8, x4, x1, x2) - -inst_13715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ffffc0; valaddr_reg:x3; val_offset:41145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41145*FLEN/8, x4, x1, x2) - -inst_13716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ffffe0; valaddr_reg:x3; val_offset:41148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41148*FLEN/8, x4, x1, x2) - -inst_13717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fffff0; valaddr_reg:x3; val_offset:41151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41151*FLEN/8, x4, x1, x2) - -inst_13718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fffff8; valaddr_reg:x3; val_offset:41154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41154*FLEN/8, x4, x1, x2) - -inst_13719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fffffc; valaddr_reg:x3; val_offset:41157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41157*FLEN/8, x4, x1, x2) - -inst_13720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4fffffe; valaddr_reg:x3; val_offset:41160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41160*FLEN/8, x4, x1, x2) - -inst_13721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; -op3val:0x4ffffff; valaddr_reg:x3; val_offset:41163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41163*FLEN/8, x4, x1, x2) - -inst_13722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:41166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41166*FLEN/8, x4, x1, x2) - -inst_13723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:41169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41169*FLEN/8, x4, x1, x2) - -inst_13724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:41172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41172*FLEN/8, x4, x1, x2) - -inst_13725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:41175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41175*FLEN/8, x4, x1, x2) - -inst_13726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:41178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41178*FLEN/8, x4, x1, x2) - -inst_13727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:41181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41181*FLEN/8, x4, x1, x2) - -inst_13728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:41184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41184*FLEN/8, x4, x1, x2) - -inst_13729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:41187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41187*FLEN/8, x4, x1, x2) - -inst_13730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:41190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41190*FLEN/8, x4, x1, x2) - -inst_13731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:41193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41193*FLEN/8, x4, x1, x2) - -inst_13732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:41196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41196*FLEN/8, x4, x1, x2) - -inst_13733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:41199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41199*FLEN/8, x4, x1, x2) - -inst_13734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:41202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41202*FLEN/8, x4, x1, x2) - -inst_13735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:41205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41205*FLEN/8, x4, x1, x2) - -inst_13736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:41208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41208*FLEN/8, x4, x1, x2) - -inst_13737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:41211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41211*FLEN/8, x4, x1, x2) - -inst_13738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9000000; valaddr_reg:x3; val_offset:41214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41214*FLEN/8, x4, x1, x2) - -inst_13739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9000001; valaddr_reg:x3; val_offset:41217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41217*FLEN/8, x4, x1, x2) - -inst_13740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9000003; valaddr_reg:x3; val_offset:41220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41220*FLEN/8, x4, x1, x2) - -inst_13741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9000007; valaddr_reg:x3; val_offset:41223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41223*FLEN/8, x4, x1, x2) - -inst_13742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x900000f; valaddr_reg:x3; val_offset:41226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41226*FLEN/8, x4, x1, x2) - -inst_13743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x900001f; valaddr_reg:x3; val_offset:41229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41229*FLEN/8, x4, x1, x2) - -inst_13744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x900003f; valaddr_reg:x3; val_offset:41232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41232*FLEN/8, x4, x1, x2) - -inst_13745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x900007f; valaddr_reg:x3; val_offset:41235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41235*FLEN/8, x4, x1, x2) - -inst_13746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x90000ff; valaddr_reg:x3; val_offset:41238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41238*FLEN/8, x4, x1, x2) - -inst_13747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x90001ff; valaddr_reg:x3; val_offset:41241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41241*FLEN/8, x4, x1, x2) - -inst_13748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x90003ff; valaddr_reg:x3; val_offset:41244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41244*FLEN/8, x4, x1, x2) - -inst_13749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x90007ff; valaddr_reg:x3; val_offset:41247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41247*FLEN/8, x4, x1, x2) - -inst_13750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9000fff; valaddr_reg:x3; val_offset:41250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41250*FLEN/8, x4, x1, x2) - -inst_13751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9001fff; valaddr_reg:x3; val_offset:41253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41253*FLEN/8, x4, x1, x2) - -inst_13752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9003fff; valaddr_reg:x3; val_offset:41256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41256*FLEN/8, x4, x1, x2) - -inst_13753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9007fff; valaddr_reg:x3; val_offset:41259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41259*FLEN/8, x4, x1, x2) - -inst_13754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x900ffff; valaddr_reg:x3; val_offset:41262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41262*FLEN/8, x4, x1, x2) - -inst_13755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x901ffff; valaddr_reg:x3; val_offset:41265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41265*FLEN/8, x4, x1, x2) - -inst_13756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x903ffff; valaddr_reg:x3; val_offset:41268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41268*FLEN/8, x4, x1, x2) - -inst_13757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x907ffff; valaddr_reg:x3; val_offset:41271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41271*FLEN/8, x4, x1, x2) - -inst_13758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x90fffff; valaddr_reg:x3; val_offset:41274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41274*FLEN/8, x4, x1, x2) - -inst_13759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x91fffff; valaddr_reg:x3; val_offset:41277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41277*FLEN/8, x4, x1, x2) - -inst_13760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x93fffff; valaddr_reg:x3; val_offset:41280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41280*FLEN/8, x4, x1, x2) - -inst_13761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9400000; valaddr_reg:x3; val_offset:41283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41283*FLEN/8, x4, x1, x2) - -inst_13762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9600000; valaddr_reg:x3; val_offset:41286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41286*FLEN/8, x4, x1, x2) - -inst_13763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9700000; valaddr_reg:x3; val_offset:41289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41289*FLEN/8, x4, x1, x2) - -inst_13764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x9780000; valaddr_reg:x3; val_offset:41292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41292*FLEN/8, x4, x1, x2) - -inst_13765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97c0000; valaddr_reg:x3; val_offset:41295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41295*FLEN/8, x4, x1, x2) - -inst_13766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97e0000; valaddr_reg:x3; val_offset:41298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41298*FLEN/8, x4, x1, x2) - -inst_13767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97f0000; valaddr_reg:x3; val_offset:41301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41301*FLEN/8, x4, x1, x2) - -inst_13768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97f8000; valaddr_reg:x3; val_offset:41304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41304*FLEN/8, x4, x1, x2) - -inst_13769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97fc000; valaddr_reg:x3; val_offset:41307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41307*FLEN/8, x4, x1, x2) - -inst_13770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97fe000; valaddr_reg:x3; val_offset:41310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41310*FLEN/8, x4, x1, x2) - -inst_13771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97ff000; valaddr_reg:x3; val_offset:41313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41313*FLEN/8, x4, x1, x2) - -inst_13772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97ff800; valaddr_reg:x3; val_offset:41316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41316*FLEN/8, x4, x1, x2) - -inst_13773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97ffc00; valaddr_reg:x3; val_offset:41319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41319*FLEN/8, x4, x1, x2) - -inst_13774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97ffe00; valaddr_reg:x3; val_offset:41322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41322*FLEN/8, x4, x1, x2) - -inst_13775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97fff00; valaddr_reg:x3; val_offset:41325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41325*FLEN/8, x4, x1, x2) - -inst_13776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97fff80; valaddr_reg:x3; val_offset:41328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41328*FLEN/8, x4, x1, x2) - -inst_13777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97fffc0; valaddr_reg:x3; val_offset:41331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41331*FLEN/8, x4, x1, x2) - -inst_13778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97fffe0; valaddr_reg:x3; val_offset:41334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41334*FLEN/8, x4, x1, x2) - -inst_13779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97ffff0; valaddr_reg:x3; val_offset:41337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41337*FLEN/8, x4, x1, x2) - -inst_13780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97ffff8; valaddr_reg:x3; val_offset:41340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41340*FLEN/8, x4, x1, x2) - -inst_13781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97ffffc; valaddr_reg:x3; val_offset:41343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41343*FLEN/8, x4, x1, x2) - -inst_13782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97ffffe; valaddr_reg:x3; val_offset:41346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41346*FLEN/8, x4, x1, x2) - -inst_13783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; -op3val:0x97fffff; valaddr_reg:x3; val_offset:41349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41349*FLEN/8, x4, x1, x2) - -inst_13784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63000000; valaddr_reg:x3; val_offset:41352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41352*FLEN/8, x4, x1, x2) - -inst_13785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63000001; valaddr_reg:x3; val_offset:41355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41355*FLEN/8, x4, x1, x2) - -inst_13786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63000003; valaddr_reg:x3; val_offset:41358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41358*FLEN/8, x4, x1, x2) - -inst_13787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63000007; valaddr_reg:x3; val_offset:41361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41361*FLEN/8, x4, x1, x2) - -inst_13788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x6300000f; valaddr_reg:x3; val_offset:41364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41364*FLEN/8, x4, x1, x2) - -inst_13789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x6300001f; valaddr_reg:x3; val_offset:41367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41367*FLEN/8, x4, x1, x2) - -inst_13790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x6300003f; valaddr_reg:x3; val_offset:41370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41370*FLEN/8, x4, x1, x2) - -inst_13791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x6300007f; valaddr_reg:x3; val_offset:41373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41373*FLEN/8, x4, x1, x2) - -inst_13792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x630000ff; valaddr_reg:x3; val_offset:41376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41376*FLEN/8, x4, x1, x2) - -inst_13793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x630001ff; valaddr_reg:x3; val_offset:41379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41379*FLEN/8, x4, x1, x2) - -inst_13794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x630003ff; valaddr_reg:x3; val_offset:41382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41382*FLEN/8, x4, x1, x2) - -inst_13795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x630007ff; valaddr_reg:x3; val_offset:41385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41385*FLEN/8, x4, x1, x2) - -inst_13796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63000fff; valaddr_reg:x3; val_offset:41388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41388*FLEN/8, x4, x1, x2) - -inst_13797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63001fff; valaddr_reg:x3; val_offset:41391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41391*FLEN/8, x4, x1, x2) - -inst_13798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63003fff; valaddr_reg:x3; val_offset:41394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41394*FLEN/8, x4, x1, x2) - -inst_13799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63007fff; valaddr_reg:x3; val_offset:41397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41397*FLEN/8, x4, x1, x2) - -inst_13800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x6300ffff; valaddr_reg:x3; val_offset:41400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41400*FLEN/8, x4, x1, x2) - -inst_13801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x6301ffff; valaddr_reg:x3; val_offset:41403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41403*FLEN/8, x4, x1, x2) - -inst_13802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x6303ffff; valaddr_reg:x3; val_offset:41406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41406*FLEN/8, x4, x1, x2) - -inst_13803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x6307ffff; valaddr_reg:x3; val_offset:41409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41409*FLEN/8, x4, x1, x2) - -inst_13804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x630fffff; valaddr_reg:x3; val_offset:41412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41412*FLEN/8, x4, x1, x2) - -inst_13805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x631fffff; valaddr_reg:x3; val_offset:41415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41415*FLEN/8, x4, x1, x2) - -inst_13806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x633fffff; valaddr_reg:x3; val_offset:41418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41418*FLEN/8, x4, x1, x2) - -inst_13807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63400000; valaddr_reg:x3; val_offset:41421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41421*FLEN/8, x4, x1, x2) - -inst_13808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63600000; valaddr_reg:x3; val_offset:41424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41424*FLEN/8, x4, x1, x2) - -inst_13809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63700000; valaddr_reg:x3; val_offset:41427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41427*FLEN/8, x4, x1, x2) - -inst_13810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x63780000; valaddr_reg:x3; val_offset:41430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41430*FLEN/8, x4, x1, x2) - -inst_13811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637c0000; valaddr_reg:x3; val_offset:41433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41433*FLEN/8, x4, x1, x2) - -inst_13812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637e0000; valaddr_reg:x3; val_offset:41436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41436*FLEN/8, x4, x1, x2) - -inst_13813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637f0000; valaddr_reg:x3; val_offset:41439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41439*FLEN/8, x4, x1, x2) - -inst_13814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637f8000; valaddr_reg:x3; val_offset:41442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41442*FLEN/8, x4, x1, x2) - -inst_13815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637fc000; valaddr_reg:x3; val_offset:41445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41445*FLEN/8, x4, x1, x2) - -inst_13816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637fe000; valaddr_reg:x3; val_offset:41448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41448*FLEN/8, x4, x1, x2) - -inst_13817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637ff000; valaddr_reg:x3; val_offset:41451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41451*FLEN/8, x4, x1, x2) - -inst_13818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637ff800; valaddr_reg:x3; val_offset:41454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41454*FLEN/8, x4, x1, x2) - -inst_13819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637ffc00; valaddr_reg:x3; val_offset:41457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41457*FLEN/8, x4, x1, x2) - -inst_13820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637ffe00; valaddr_reg:x3; val_offset:41460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41460*FLEN/8, x4, x1, x2) - -inst_13821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637fff00; valaddr_reg:x3; val_offset:41463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41463*FLEN/8, x4, x1, x2) - -inst_13822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637fff80; valaddr_reg:x3; val_offset:41466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41466*FLEN/8, x4, x1, x2) - -inst_13823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637fffc0; valaddr_reg:x3; val_offset:41469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41469*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_109) - -inst_13824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637fffe0; valaddr_reg:x3; val_offset:41472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41472*FLEN/8, x4, x1, x2) - -inst_13825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637ffff0; valaddr_reg:x3; val_offset:41475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41475*FLEN/8, x4, x1, x2) - -inst_13826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637ffff8; valaddr_reg:x3; val_offset:41478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41478*FLEN/8, x4, x1, x2) - -inst_13827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637ffffc; valaddr_reg:x3; val_offset:41481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41481*FLEN/8, x4, x1, x2) - -inst_13828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637ffffe; valaddr_reg:x3; val_offset:41484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41484*FLEN/8, x4, x1, x2) - -inst_13829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x637fffff; valaddr_reg:x3; val_offset:41487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41487*FLEN/8, x4, x1, x2) - -inst_13830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f000001; valaddr_reg:x3; val_offset:41490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41490*FLEN/8, x4, x1, x2) - -inst_13831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f000003; valaddr_reg:x3; val_offset:41493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41493*FLEN/8, x4, x1, x2) - -inst_13832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f000007; valaddr_reg:x3; val_offset:41496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41496*FLEN/8, x4, x1, x2) - -inst_13833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f199999; valaddr_reg:x3; val_offset:41499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41499*FLEN/8, x4, x1, x2) - -inst_13834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f249249; valaddr_reg:x3; val_offset:41502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41502*FLEN/8, x4, x1, x2) - -inst_13835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f333333; valaddr_reg:x3; val_offset:41505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41505*FLEN/8, x4, x1, x2) - -inst_13836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:41508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41508*FLEN/8, x4, x1, x2) - -inst_13837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:41511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41511*FLEN/8, x4, x1, x2) - -inst_13838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f444444; valaddr_reg:x3; val_offset:41514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41514*FLEN/8, x4, x1, x2) - -inst_13839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:41517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41517*FLEN/8, x4, x1, x2) - -inst_13840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:41520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41520*FLEN/8, x4, x1, x2) - -inst_13841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f666666; valaddr_reg:x3; val_offset:41523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41523*FLEN/8, x4, x1, x2) - -inst_13842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:41526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41526*FLEN/8, x4, x1, x2) - -inst_13843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:41529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41529*FLEN/8, x4, x1, x2) - -inst_13844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:41532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41532*FLEN/8, x4, x1, x2) - -inst_13845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:41535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41535*FLEN/8, x4, x1, x2) - -inst_13846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:41538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41538*FLEN/8, x4, x1, x2) - -inst_13847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:41541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41541*FLEN/8, x4, x1, x2) - -inst_13848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:41544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41544*FLEN/8, x4, x1, x2) - -inst_13849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:41547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41547*FLEN/8, x4, x1, x2) - -inst_13850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:41550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41550*FLEN/8, x4, x1, x2) - -inst_13851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:41553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41553*FLEN/8, x4, x1, x2) - -inst_13852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:41556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41556*FLEN/8, x4, x1, x2) - -inst_13853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:41559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41559*FLEN/8, x4, x1, x2) - -inst_13854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:41562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41562*FLEN/8, x4, x1, x2) - -inst_13855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:41565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41565*FLEN/8, x4, x1, x2) - -inst_13856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:41568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41568*FLEN/8, x4, x1, x2) - -inst_13857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:41571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41571*FLEN/8, x4, x1, x2) - -inst_13858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:41574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41574*FLEN/8, x4, x1, x2) - -inst_13859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:41577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41577*FLEN/8, x4, x1, x2) - -inst_13860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:41580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41580*FLEN/8, x4, x1, x2) - -inst_13861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:41583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41583*FLEN/8, x4, x1, x2) - -inst_13862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9800000; valaddr_reg:x3; val_offset:41586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41586*FLEN/8, x4, x1, x2) - -inst_13863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9800001; valaddr_reg:x3; val_offset:41589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41589*FLEN/8, x4, x1, x2) - -inst_13864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9800003; valaddr_reg:x3; val_offset:41592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41592*FLEN/8, x4, x1, x2) - -inst_13865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9800007; valaddr_reg:x3; val_offset:41595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41595*FLEN/8, x4, x1, x2) - -inst_13866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x980000f; valaddr_reg:x3; val_offset:41598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41598*FLEN/8, x4, x1, x2) - -inst_13867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x980001f; valaddr_reg:x3; val_offset:41601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41601*FLEN/8, x4, x1, x2) - -inst_13868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x980003f; valaddr_reg:x3; val_offset:41604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41604*FLEN/8, x4, x1, x2) - -inst_13869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x980007f; valaddr_reg:x3; val_offset:41607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41607*FLEN/8, x4, x1, x2) - -inst_13870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x98000ff; valaddr_reg:x3; val_offset:41610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41610*FLEN/8, x4, x1, x2) - -inst_13871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x98001ff; valaddr_reg:x3; val_offset:41613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41613*FLEN/8, x4, x1, x2) - -inst_13872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x98003ff; valaddr_reg:x3; val_offset:41616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41616*FLEN/8, x4, x1, x2) - -inst_13873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x98007ff; valaddr_reg:x3; val_offset:41619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41619*FLEN/8, x4, x1, x2) - -inst_13874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9800fff; valaddr_reg:x3; val_offset:41622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41622*FLEN/8, x4, x1, x2) - -inst_13875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9801fff; valaddr_reg:x3; val_offset:41625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41625*FLEN/8, x4, x1, x2) - -inst_13876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9803fff; valaddr_reg:x3; val_offset:41628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41628*FLEN/8, x4, x1, x2) - -inst_13877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9807fff; valaddr_reg:x3; val_offset:41631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41631*FLEN/8, x4, x1, x2) - -inst_13878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x980ffff; valaddr_reg:x3; val_offset:41634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41634*FLEN/8, x4, x1, x2) - -inst_13879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x981ffff; valaddr_reg:x3; val_offset:41637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41637*FLEN/8, x4, x1, x2) - -inst_13880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x983ffff; valaddr_reg:x3; val_offset:41640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41640*FLEN/8, x4, x1, x2) - -inst_13881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x987ffff; valaddr_reg:x3; val_offset:41643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41643*FLEN/8, x4, x1, x2) - -inst_13882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x98fffff; valaddr_reg:x3; val_offset:41646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41646*FLEN/8, x4, x1, x2) - -inst_13883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x99fffff; valaddr_reg:x3; val_offset:41649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41649*FLEN/8, x4, x1, x2) - -inst_13884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9bfffff; valaddr_reg:x3; val_offset:41652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41652*FLEN/8, x4, x1, x2) - -inst_13885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9c00000; valaddr_reg:x3; val_offset:41655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41655*FLEN/8, x4, x1, x2) - -inst_13886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9e00000; valaddr_reg:x3; val_offset:41658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41658*FLEN/8, x4, x1, x2) - -inst_13887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9f00000; valaddr_reg:x3; val_offset:41661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41661*FLEN/8, x4, x1, x2) - -inst_13888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9f80000; valaddr_reg:x3; val_offset:41664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41664*FLEN/8, x4, x1, x2) - -inst_13889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fc0000; valaddr_reg:x3; val_offset:41667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41667*FLEN/8, x4, x1, x2) - -inst_13890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fe0000; valaddr_reg:x3; val_offset:41670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41670*FLEN/8, x4, x1, x2) - -inst_13891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ff0000; valaddr_reg:x3; val_offset:41673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41673*FLEN/8, x4, x1, x2) - -inst_13892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ff8000; valaddr_reg:x3; val_offset:41676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41676*FLEN/8, x4, x1, x2) - -inst_13893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ffc000; valaddr_reg:x3; val_offset:41679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41679*FLEN/8, x4, x1, x2) - -inst_13894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ffe000; valaddr_reg:x3; val_offset:41682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41682*FLEN/8, x4, x1, x2) - -inst_13895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fff000; valaddr_reg:x3; val_offset:41685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41685*FLEN/8, x4, x1, x2) - -inst_13896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fff800; valaddr_reg:x3; val_offset:41688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41688*FLEN/8, x4, x1, x2) - -inst_13897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fffc00; valaddr_reg:x3; val_offset:41691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41691*FLEN/8, x4, x1, x2) - -inst_13898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fffe00; valaddr_reg:x3; val_offset:41694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41694*FLEN/8, x4, x1, x2) - -inst_13899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ffff00; valaddr_reg:x3; val_offset:41697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41697*FLEN/8, x4, x1, x2) - -inst_13900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ffff80; valaddr_reg:x3; val_offset:41700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41700*FLEN/8, x4, x1, x2) - -inst_13901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ffffc0; valaddr_reg:x3; val_offset:41703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41703*FLEN/8, x4, x1, x2) - -inst_13902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ffffe0; valaddr_reg:x3; val_offset:41706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41706*FLEN/8, x4, x1, x2) - -inst_13903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fffff0; valaddr_reg:x3; val_offset:41709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41709*FLEN/8, x4, x1, x2) - -inst_13904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fffff8; valaddr_reg:x3; val_offset:41712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41712*FLEN/8, x4, x1, x2) - -inst_13905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fffffc; valaddr_reg:x3; val_offset:41715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41715*FLEN/8, x4, x1, x2) - -inst_13906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9fffffe; valaddr_reg:x3; val_offset:41718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41718*FLEN/8, x4, x1, x2) - -inst_13907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; -op3val:0x9ffffff; valaddr_reg:x3; val_offset:41721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41721*FLEN/8, x4, x1, x2) - -inst_13908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61800000; valaddr_reg:x3; val_offset:41724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41724*FLEN/8, x4, x1, x2) - -inst_13909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61800001; valaddr_reg:x3; val_offset:41727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41727*FLEN/8, x4, x1, x2) - -inst_13910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61800003; valaddr_reg:x3; val_offset:41730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41730*FLEN/8, x4, x1, x2) - -inst_13911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61800007; valaddr_reg:x3; val_offset:41733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41733*FLEN/8, x4, x1, x2) - -inst_13912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x6180000f; valaddr_reg:x3; val_offset:41736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41736*FLEN/8, x4, x1, x2) - -inst_13913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x6180001f; valaddr_reg:x3; val_offset:41739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41739*FLEN/8, x4, x1, x2) - -inst_13914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x6180003f; valaddr_reg:x3; val_offset:41742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41742*FLEN/8, x4, x1, x2) - -inst_13915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x6180007f; valaddr_reg:x3; val_offset:41745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41745*FLEN/8, x4, x1, x2) - -inst_13916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x618000ff; valaddr_reg:x3; val_offset:41748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41748*FLEN/8, x4, x1, x2) - -inst_13917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x618001ff; valaddr_reg:x3; val_offset:41751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41751*FLEN/8, x4, x1, x2) - -inst_13918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x618003ff; valaddr_reg:x3; val_offset:41754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41754*FLEN/8, x4, x1, x2) - -inst_13919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x618007ff; valaddr_reg:x3; val_offset:41757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41757*FLEN/8, x4, x1, x2) - -inst_13920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61800fff; valaddr_reg:x3; val_offset:41760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41760*FLEN/8, x4, x1, x2) - -inst_13921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61801fff; valaddr_reg:x3; val_offset:41763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41763*FLEN/8, x4, x1, x2) - -inst_13922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61803fff; valaddr_reg:x3; val_offset:41766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41766*FLEN/8, x4, x1, x2) - -inst_13923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61807fff; valaddr_reg:x3; val_offset:41769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41769*FLEN/8, x4, x1, x2) - -inst_13924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x6180ffff; valaddr_reg:x3; val_offset:41772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41772*FLEN/8, x4, x1, x2) - -inst_13925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x6181ffff; valaddr_reg:x3; val_offset:41775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41775*FLEN/8, x4, x1, x2) - -inst_13926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x6183ffff; valaddr_reg:x3; val_offset:41778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41778*FLEN/8, x4, x1, x2) - -inst_13927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x6187ffff; valaddr_reg:x3; val_offset:41781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41781*FLEN/8, x4, x1, x2) - -inst_13928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x618fffff; valaddr_reg:x3; val_offset:41784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41784*FLEN/8, x4, x1, x2) - -inst_13929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x619fffff; valaddr_reg:x3; val_offset:41787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41787*FLEN/8, x4, x1, x2) - -inst_13930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61bfffff; valaddr_reg:x3; val_offset:41790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41790*FLEN/8, x4, x1, x2) - -inst_13931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61c00000; valaddr_reg:x3; val_offset:41793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41793*FLEN/8, x4, x1, x2) - -inst_13932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61e00000; valaddr_reg:x3; val_offset:41796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41796*FLEN/8, x4, x1, x2) - -inst_13933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61f00000; valaddr_reg:x3; val_offset:41799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41799*FLEN/8, x4, x1, x2) - -inst_13934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61f80000; valaddr_reg:x3; val_offset:41802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41802*FLEN/8, x4, x1, x2) - -inst_13935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fc0000; valaddr_reg:x3; val_offset:41805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41805*FLEN/8, x4, x1, x2) - -inst_13936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fe0000; valaddr_reg:x3; val_offset:41808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41808*FLEN/8, x4, x1, x2) - -inst_13937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ff0000; valaddr_reg:x3; val_offset:41811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41811*FLEN/8, x4, x1, x2) - -inst_13938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ff8000; valaddr_reg:x3; val_offset:41814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41814*FLEN/8, x4, x1, x2) - -inst_13939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ffc000; valaddr_reg:x3; val_offset:41817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41817*FLEN/8, x4, x1, x2) - -inst_13940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ffe000; valaddr_reg:x3; val_offset:41820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41820*FLEN/8, x4, x1, x2) - -inst_13941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fff000; valaddr_reg:x3; val_offset:41823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41823*FLEN/8, x4, x1, x2) - -inst_13942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fff800; valaddr_reg:x3; val_offset:41826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41826*FLEN/8, x4, x1, x2) - -inst_13943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fffc00; valaddr_reg:x3; val_offset:41829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41829*FLEN/8, x4, x1, x2) - -inst_13944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fffe00; valaddr_reg:x3; val_offset:41832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41832*FLEN/8, x4, x1, x2) - -inst_13945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ffff00; valaddr_reg:x3; val_offset:41835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41835*FLEN/8, x4, x1, x2) - -inst_13946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ffff80; valaddr_reg:x3; val_offset:41838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41838*FLEN/8, x4, x1, x2) - -inst_13947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ffffc0; valaddr_reg:x3; val_offset:41841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41841*FLEN/8, x4, x1, x2) - -inst_13948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ffffe0; valaddr_reg:x3; val_offset:41844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41844*FLEN/8, x4, x1, x2) - -inst_13949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fffff0; valaddr_reg:x3; val_offset:41847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41847*FLEN/8, x4, x1, x2) - -inst_13950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fffff8; valaddr_reg:x3; val_offset:41850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41850*FLEN/8, x4, x1, x2) - -inst_13951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fffffc; valaddr_reg:x3; val_offset:41853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41853*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_110) - -inst_13952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61fffffe; valaddr_reg:x3; val_offset:41856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41856*FLEN/8, x4, x1, x2) - -inst_13953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x61ffffff; valaddr_reg:x3; val_offset:41859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41859*FLEN/8, x4, x1, x2) - -inst_13954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f000001; valaddr_reg:x3; val_offset:41862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41862*FLEN/8, x4, x1, x2) - -inst_13955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f000003; valaddr_reg:x3; val_offset:41865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41865*FLEN/8, x4, x1, x2) - -inst_13956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f000007; valaddr_reg:x3; val_offset:41868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41868*FLEN/8, x4, x1, x2) - -inst_13957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f199999; valaddr_reg:x3; val_offset:41871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41871*FLEN/8, x4, x1, x2) - -inst_13958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f249249; valaddr_reg:x3; val_offset:41874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41874*FLEN/8, x4, x1, x2) - -inst_13959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f333333; valaddr_reg:x3; val_offset:41877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41877*FLEN/8, x4, x1, x2) - -inst_13960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:41880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41880*FLEN/8, x4, x1, x2) - -inst_13961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:41883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41883*FLEN/8, x4, x1, x2) - -inst_13962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f444444; valaddr_reg:x3; val_offset:41886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41886*FLEN/8, x4, x1, x2) - -inst_13963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:41889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41889*FLEN/8, x4, x1, x2) - -inst_13964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:41892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41892*FLEN/8, x4, x1, x2) - -inst_13965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f666666; valaddr_reg:x3; val_offset:41895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41895*FLEN/8, x4, x1, x2) - -inst_13966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:41898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41898*FLEN/8, x4, x1, x2) - -inst_13967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:41901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41901*FLEN/8, x4, x1, x2) - -inst_13968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:41904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41904*FLEN/8, x4, x1, x2) - -inst_13969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:41907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41907*FLEN/8, x4, x1, x2) - -inst_13970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:41910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41910*FLEN/8, x4, x1, x2) - -inst_13971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:41913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41913*FLEN/8, x4, x1, x2) - -inst_13972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:41916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41916*FLEN/8, x4, x1, x2) - -inst_13973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:41919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41919*FLEN/8, x4, x1, x2) - -inst_13974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:41922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41922*FLEN/8, x4, x1, x2) - -inst_13975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:41925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41925*FLEN/8, x4, x1, x2) - -inst_13976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:41928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41928*FLEN/8, x4, x1, x2) - -inst_13977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:41931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41931*FLEN/8, x4, x1, x2) - -inst_13978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:41934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41934*FLEN/8, x4, x1, x2) - -inst_13979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:41937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41937*FLEN/8, x4, x1, x2) - -inst_13980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:41940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41940*FLEN/8, x4, x1, x2) - -inst_13981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:41943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41943*FLEN/8, x4, x1, x2) - -inst_13982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:41946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41946*FLEN/8, x4, x1, x2) - -inst_13983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:41949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41949*FLEN/8, x4, x1, x2) - -inst_13984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:41952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41952*FLEN/8, x4, x1, x2) - -inst_13985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:41955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41955*FLEN/8, x4, x1, x2) - -inst_13986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb800000; valaddr_reg:x3; val_offset:41958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41958*FLEN/8, x4, x1, x2) - -inst_13987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb800001; valaddr_reg:x3; val_offset:41961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41961*FLEN/8, x4, x1, x2) - -inst_13988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb800003; valaddr_reg:x3; val_offset:41964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41964*FLEN/8, x4, x1, x2) - -inst_13989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb800007; valaddr_reg:x3; val_offset:41967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41967*FLEN/8, x4, x1, x2) - -inst_13990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb80000f; valaddr_reg:x3; val_offset:41970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41970*FLEN/8, x4, x1, x2) - -inst_13991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb80001f; valaddr_reg:x3; val_offset:41973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41973*FLEN/8, x4, x1, x2) - -inst_13992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb80003f; valaddr_reg:x3; val_offset:41976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41976*FLEN/8, x4, x1, x2) - -inst_13993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb80007f; valaddr_reg:x3; val_offset:41979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41979*FLEN/8, x4, x1, x2) - -inst_13994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb8000ff; valaddr_reg:x3; val_offset:41982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41982*FLEN/8, x4, x1, x2) - -inst_13995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb8001ff; valaddr_reg:x3; val_offset:41985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41985*FLEN/8, x4, x1, x2) - -inst_13996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb8003ff; valaddr_reg:x3; val_offset:41988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41988*FLEN/8, x4, x1, x2) - -inst_13997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb8007ff; valaddr_reg:x3; val_offset:41991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41991*FLEN/8, x4, x1, x2) - -inst_13998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb800fff; valaddr_reg:x3; val_offset:41994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41994*FLEN/8, x4, x1, x2) - -inst_13999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb801fff; valaddr_reg:x3; val_offset:41997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41997*FLEN/8, x4, x1, x2) - -inst_14000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb803fff; valaddr_reg:x3; val_offset:42000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42000*FLEN/8, x4, x1, x2) - -inst_14001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb807fff; valaddr_reg:x3; val_offset:42003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42003*FLEN/8, x4, x1, x2) - -inst_14002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb80ffff; valaddr_reg:x3; val_offset:42006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42006*FLEN/8, x4, x1, x2) - -inst_14003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb81ffff; valaddr_reg:x3; val_offset:42009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42009*FLEN/8, x4, x1, x2) - -inst_14004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb83ffff; valaddr_reg:x3; val_offset:42012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42012*FLEN/8, x4, x1, x2) - -inst_14005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb87ffff; valaddr_reg:x3; val_offset:42015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42015*FLEN/8, x4, x1, x2) - -inst_14006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb8fffff; valaddr_reg:x3; val_offset:42018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42018*FLEN/8, x4, x1, x2) - -inst_14007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xb9fffff; valaddr_reg:x3; val_offset:42021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42021*FLEN/8, x4, x1, x2) - -inst_14008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbbfffff; valaddr_reg:x3; val_offset:42024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42024*FLEN/8, x4, x1, x2) - -inst_14009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbc00000; valaddr_reg:x3; val_offset:42027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42027*FLEN/8, x4, x1, x2) - -inst_14010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbe00000; valaddr_reg:x3; val_offset:42030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42030*FLEN/8, x4, x1, x2) - -inst_14011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbf00000; valaddr_reg:x3; val_offset:42033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42033*FLEN/8, x4, x1, x2) - -inst_14012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbf80000; valaddr_reg:x3; val_offset:42036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42036*FLEN/8, x4, x1, x2) - -inst_14013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfc0000; valaddr_reg:x3; val_offset:42039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42039*FLEN/8, x4, x1, x2) - -inst_14014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfe0000; valaddr_reg:x3; val_offset:42042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42042*FLEN/8, x4, x1, x2) - -inst_14015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbff0000; valaddr_reg:x3; val_offset:42045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42045*FLEN/8, x4, x1, x2) - -inst_14016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbff8000; valaddr_reg:x3; val_offset:42048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42048*FLEN/8, x4, x1, x2) - -inst_14017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbffc000; valaddr_reg:x3; val_offset:42051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42051*FLEN/8, x4, x1, x2) - -inst_14018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbffe000; valaddr_reg:x3; val_offset:42054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42054*FLEN/8, x4, x1, x2) - -inst_14019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfff000; valaddr_reg:x3; val_offset:42057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42057*FLEN/8, x4, x1, x2) - -inst_14020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfff800; valaddr_reg:x3; val_offset:42060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42060*FLEN/8, x4, x1, x2) - -inst_14021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfffc00; valaddr_reg:x3; val_offset:42063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42063*FLEN/8, x4, x1, x2) - -inst_14022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfffe00; valaddr_reg:x3; val_offset:42066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42066*FLEN/8, x4, x1, x2) - -inst_14023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbffff00; valaddr_reg:x3; val_offset:42069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42069*FLEN/8, x4, x1, x2) - -inst_14024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbffff80; valaddr_reg:x3; val_offset:42072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42072*FLEN/8, x4, x1, x2) - -inst_14025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbffffc0; valaddr_reg:x3; val_offset:42075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42075*FLEN/8, x4, x1, x2) - -inst_14026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbffffe0; valaddr_reg:x3; val_offset:42078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42078*FLEN/8, x4, x1, x2) - -inst_14027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfffff0; valaddr_reg:x3; val_offset:42081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42081*FLEN/8, x4, x1, x2) - -inst_14028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfffff8; valaddr_reg:x3; val_offset:42084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42084*FLEN/8, x4, x1, x2) - -inst_14029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfffffc; valaddr_reg:x3; val_offset:42087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42087*FLEN/8, x4, x1, x2) - -inst_14030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbfffffe; valaddr_reg:x3; val_offset:42090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42090*FLEN/8, x4, x1, x2) - -inst_14031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; -op3val:0xbffffff; valaddr_reg:x3; val_offset:42093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42093*FLEN/8, x4, x1, x2) - -inst_14032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d000000; valaddr_reg:x3; val_offset:42096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42096*FLEN/8, x4, x1, x2) - -inst_14033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d000001; valaddr_reg:x3; val_offset:42099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42099*FLEN/8, x4, x1, x2) - -inst_14034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d000003; valaddr_reg:x3; val_offset:42102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42102*FLEN/8, x4, x1, x2) - -inst_14035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d000007; valaddr_reg:x3; val_offset:42105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42105*FLEN/8, x4, x1, x2) - -inst_14036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d00000f; valaddr_reg:x3; val_offset:42108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42108*FLEN/8, x4, x1, x2) - -inst_14037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d00001f; valaddr_reg:x3; val_offset:42111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42111*FLEN/8, x4, x1, x2) - -inst_14038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d00003f; valaddr_reg:x3; val_offset:42114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42114*FLEN/8, x4, x1, x2) - -inst_14039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d00007f; valaddr_reg:x3; val_offset:42117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42117*FLEN/8, x4, x1, x2) - -inst_14040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d0000ff; valaddr_reg:x3; val_offset:42120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42120*FLEN/8, x4, x1, x2) - -inst_14041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d0001ff; valaddr_reg:x3; val_offset:42123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42123*FLEN/8, x4, x1, x2) - -inst_14042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d0003ff; valaddr_reg:x3; val_offset:42126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42126*FLEN/8, x4, x1, x2) - -inst_14043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d0007ff; valaddr_reg:x3; val_offset:42129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42129*FLEN/8, x4, x1, x2) - -inst_14044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d000fff; valaddr_reg:x3; val_offset:42132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42132*FLEN/8, x4, x1, x2) - -inst_14045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d001fff; valaddr_reg:x3; val_offset:42135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42135*FLEN/8, x4, x1, x2) - -inst_14046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d003fff; valaddr_reg:x3; val_offset:42138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42138*FLEN/8, x4, x1, x2) - -inst_14047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d007fff; valaddr_reg:x3; val_offset:42141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42141*FLEN/8, x4, x1, x2) - -inst_14048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d00ffff; valaddr_reg:x3; val_offset:42144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42144*FLEN/8, x4, x1, x2) - -inst_14049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d01ffff; valaddr_reg:x3; val_offset:42147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42147*FLEN/8, x4, x1, x2) - -inst_14050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d03ffff; valaddr_reg:x3; val_offset:42150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42150*FLEN/8, x4, x1, x2) - -inst_14051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d07ffff; valaddr_reg:x3; val_offset:42153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42153*FLEN/8, x4, x1, x2) - -inst_14052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d0fffff; valaddr_reg:x3; val_offset:42156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42156*FLEN/8, x4, x1, x2) - -inst_14053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d1fffff; valaddr_reg:x3; val_offset:42159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42159*FLEN/8, x4, x1, x2) - -inst_14054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d3fffff; valaddr_reg:x3; val_offset:42162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42162*FLEN/8, x4, x1, x2) - -inst_14055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d400000; valaddr_reg:x3; val_offset:42165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42165*FLEN/8, x4, x1, x2) - -inst_14056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d600000; valaddr_reg:x3; val_offset:42168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42168*FLEN/8, x4, x1, x2) - -inst_14057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d700000; valaddr_reg:x3; val_offset:42171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42171*FLEN/8, x4, x1, x2) - -inst_14058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d780000; valaddr_reg:x3; val_offset:42174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42174*FLEN/8, x4, x1, x2) - -inst_14059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7c0000; valaddr_reg:x3; val_offset:42177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42177*FLEN/8, x4, x1, x2) - -inst_14060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7e0000; valaddr_reg:x3; val_offset:42180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42180*FLEN/8, x4, x1, x2) - -inst_14061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7f0000; valaddr_reg:x3; val_offset:42183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42183*FLEN/8, x4, x1, x2) - -inst_14062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7f8000; valaddr_reg:x3; val_offset:42186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42186*FLEN/8, x4, x1, x2) - -inst_14063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7fc000; valaddr_reg:x3; val_offset:42189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42189*FLEN/8, x4, x1, x2) - -inst_14064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7fe000; valaddr_reg:x3; val_offset:42192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42192*FLEN/8, x4, x1, x2) - -inst_14065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7ff000; valaddr_reg:x3; val_offset:42195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42195*FLEN/8, x4, x1, x2) - -inst_14066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7ff800; valaddr_reg:x3; val_offset:42198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42198*FLEN/8, x4, x1, x2) - -inst_14067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7ffc00; valaddr_reg:x3; val_offset:42201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42201*FLEN/8, x4, x1, x2) - -inst_14068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7ffe00; valaddr_reg:x3; val_offset:42204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42204*FLEN/8, x4, x1, x2) - -inst_14069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7fff00; valaddr_reg:x3; val_offset:42207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42207*FLEN/8, x4, x1, x2) - -inst_14070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7fff80; valaddr_reg:x3; val_offset:42210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42210*FLEN/8, x4, x1, x2) - -inst_14071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7fffc0; valaddr_reg:x3; val_offset:42213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42213*FLEN/8, x4, x1, x2) - -inst_14072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7fffe0; valaddr_reg:x3; val_offset:42216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42216*FLEN/8, x4, x1, x2) - -inst_14073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7ffff0; valaddr_reg:x3; val_offset:42219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42219*FLEN/8, x4, x1, x2) - -inst_14074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7ffff8; valaddr_reg:x3; val_offset:42222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42222*FLEN/8, x4, x1, x2) - -inst_14075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7ffffc; valaddr_reg:x3; val_offset:42225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42225*FLEN/8, x4, x1, x2) - -inst_14076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7ffffe; valaddr_reg:x3; val_offset:42228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42228*FLEN/8, x4, x1, x2) - -inst_14077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7d7fffff; valaddr_reg:x3; val_offset:42231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42231*FLEN/8, x4, x1, x2) - -inst_14078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f000001; valaddr_reg:x3; val_offset:42234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42234*FLEN/8, x4, x1, x2) - -inst_14079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f000003; valaddr_reg:x3; val_offset:42237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42237*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_111) - -inst_14080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f000007; valaddr_reg:x3; val_offset:42240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42240*FLEN/8, x4, x1, x2) - -inst_14081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f199999; valaddr_reg:x3; val_offset:42243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42243*FLEN/8, x4, x1, x2) - -inst_14082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f249249; valaddr_reg:x3; val_offset:42246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42246*FLEN/8, x4, x1, x2) - -inst_14083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f333333; valaddr_reg:x3; val_offset:42249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42249*FLEN/8, x4, x1, x2) - -inst_14084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:42252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42252*FLEN/8, x4, x1, x2) - -inst_14085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:42255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42255*FLEN/8, x4, x1, x2) - -inst_14086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f444444; valaddr_reg:x3; val_offset:42258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42258*FLEN/8, x4, x1, x2) - -inst_14087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:42261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42261*FLEN/8, x4, x1, x2) - -inst_14088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:42264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42264*FLEN/8, x4, x1, x2) - -inst_14089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f666666; valaddr_reg:x3; val_offset:42267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42267*FLEN/8, x4, x1, x2) - -inst_14090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:42270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42270*FLEN/8, x4, x1, x2) - -inst_14091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:42273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42273*FLEN/8, x4, x1, x2) - -inst_14092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:42276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42276*FLEN/8, x4, x1, x2) - -inst_14093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:42279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42279*FLEN/8, x4, x1, x2) - -inst_14094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a000000; valaddr_reg:x3; val_offset:42282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42282*FLEN/8, x4, x1, x2) - -inst_14095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a000001; valaddr_reg:x3; val_offset:42285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42285*FLEN/8, x4, x1, x2) - -inst_14096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a000003; valaddr_reg:x3; val_offset:42288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42288*FLEN/8, x4, x1, x2) - -inst_14097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a000007; valaddr_reg:x3; val_offset:42291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42291*FLEN/8, x4, x1, x2) - -inst_14098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a00000f; valaddr_reg:x3; val_offset:42294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42294*FLEN/8, x4, x1, x2) - -inst_14099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a00001f; valaddr_reg:x3; val_offset:42297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42297*FLEN/8, x4, x1, x2) - -inst_14100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a00003f; valaddr_reg:x3; val_offset:42300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42300*FLEN/8, x4, x1, x2) - -inst_14101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a00007f; valaddr_reg:x3; val_offset:42303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42303*FLEN/8, x4, x1, x2) - -inst_14102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a0000ff; valaddr_reg:x3; val_offset:42306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42306*FLEN/8, x4, x1, x2) - -inst_14103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a0001ff; valaddr_reg:x3; val_offset:42309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42309*FLEN/8, x4, x1, x2) - -inst_14104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a0003ff; valaddr_reg:x3; val_offset:42312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42312*FLEN/8, x4, x1, x2) - -inst_14105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a0007ff; valaddr_reg:x3; val_offset:42315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42315*FLEN/8, x4, x1, x2) - -inst_14106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a000fff; valaddr_reg:x3; val_offset:42318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42318*FLEN/8, x4, x1, x2) - -inst_14107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a001fff; valaddr_reg:x3; val_offset:42321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42321*FLEN/8, x4, x1, x2) - -inst_14108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a003fff; valaddr_reg:x3; val_offset:42324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42324*FLEN/8, x4, x1, x2) - -inst_14109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a007fff; valaddr_reg:x3; val_offset:42327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42327*FLEN/8, x4, x1, x2) - -inst_14110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a00ffff; valaddr_reg:x3; val_offset:42330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42330*FLEN/8, x4, x1, x2) - -inst_14111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a01ffff; valaddr_reg:x3; val_offset:42333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42333*FLEN/8, x4, x1, x2) - -inst_14112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a03ffff; valaddr_reg:x3; val_offset:42336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42336*FLEN/8, x4, x1, x2) - -inst_14113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a07ffff; valaddr_reg:x3; val_offset:42339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42339*FLEN/8, x4, x1, x2) - -inst_14114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a0fffff; valaddr_reg:x3; val_offset:42342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42342*FLEN/8, x4, x1, x2) - -inst_14115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a1fffff; valaddr_reg:x3; val_offset:42345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42345*FLEN/8, x4, x1, x2) - -inst_14116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a3fffff; valaddr_reg:x3; val_offset:42348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42348*FLEN/8, x4, x1, x2) - -inst_14117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a400000; valaddr_reg:x3; val_offset:42351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42351*FLEN/8, x4, x1, x2) - -inst_14118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a600000; valaddr_reg:x3; val_offset:42354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42354*FLEN/8, x4, x1, x2) - -inst_14119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a700000; valaddr_reg:x3; val_offset:42357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42357*FLEN/8, x4, x1, x2) - -inst_14120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a780000; valaddr_reg:x3; val_offset:42360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42360*FLEN/8, x4, x1, x2) - -inst_14121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7c0000; valaddr_reg:x3; val_offset:42363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42363*FLEN/8, x4, x1, x2) - -inst_14122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7e0000; valaddr_reg:x3; val_offset:42366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42366*FLEN/8, x4, x1, x2) - -inst_14123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7f0000; valaddr_reg:x3; val_offset:42369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42369*FLEN/8, x4, x1, x2) - -inst_14124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7f8000; valaddr_reg:x3; val_offset:42372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42372*FLEN/8, x4, x1, x2) - -inst_14125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7fc000; valaddr_reg:x3; val_offset:42375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42375*FLEN/8, x4, x1, x2) - -inst_14126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7fe000; valaddr_reg:x3; val_offset:42378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42378*FLEN/8, x4, x1, x2) - -inst_14127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7ff000; valaddr_reg:x3; val_offset:42381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42381*FLEN/8, x4, x1, x2) - -inst_14128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7ff800; valaddr_reg:x3; val_offset:42384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42384*FLEN/8, x4, x1, x2) - -inst_14129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7ffc00; valaddr_reg:x3; val_offset:42387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42387*FLEN/8, x4, x1, x2) - -inst_14130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7ffe00; valaddr_reg:x3; val_offset:42390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42390*FLEN/8, x4, x1, x2) - -inst_14131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7fff00; valaddr_reg:x3; val_offset:42393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42393*FLEN/8, x4, x1, x2) - -inst_14132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7fff80; valaddr_reg:x3; val_offset:42396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42396*FLEN/8, x4, x1, x2) - -inst_14133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7fffc0; valaddr_reg:x3; val_offset:42399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42399*FLEN/8, x4, x1, x2) - -inst_14134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7fffe0; valaddr_reg:x3; val_offset:42402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42402*FLEN/8, x4, x1, x2) - -inst_14135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7ffff0; valaddr_reg:x3; val_offset:42405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42405*FLEN/8, x4, x1, x2) - -inst_14136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7ffff8; valaddr_reg:x3; val_offset:42408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42408*FLEN/8, x4, x1, x2) - -inst_14137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7ffffc; valaddr_reg:x3; val_offset:42411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42411*FLEN/8, x4, x1, x2) - -inst_14138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7ffffe; valaddr_reg:x3; val_offset:42414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42414*FLEN/8, x4, x1, x2) - -inst_14139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x2a7fffff; valaddr_reg:x3; val_offset:42417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42417*FLEN/8, x4, x1, x2) - -inst_14140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:42420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42420*FLEN/8, x4, x1, x2) - -inst_14141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:42423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42423*FLEN/8, x4, x1, x2) - -inst_14142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:42426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42426*FLEN/8, x4, x1, x2) - -inst_14143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:42429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42429*FLEN/8, x4, x1, x2) - -inst_14144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:42432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42432*FLEN/8, x4, x1, x2) - -inst_14145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:42435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42435*FLEN/8, x4, x1, x2) - -inst_14146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:42438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42438*FLEN/8, x4, x1, x2) - -inst_14147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:42441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42441*FLEN/8, x4, x1, x2) - -inst_14148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:42444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42444*FLEN/8, x4, x1, x2) - -inst_14149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:42447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42447*FLEN/8, x4, x1, x2) - -inst_14150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:42450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42450*FLEN/8, x4, x1, x2) - -inst_14151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:42453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42453*FLEN/8, x4, x1, x2) - -inst_14152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:42456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42456*FLEN/8, x4, x1, x2) - -inst_14153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:42459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42459*FLEN/8, x4, x1, x2) - -inst_14154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:42462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42462*FLEN/8, x4, x1, x2) - -inst_14155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:42465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42465*FLEN/8, x4, x1, x2) - -inst_14156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:42468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42468*FLEN/8, x4, x1, x2) - -inst_14157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:42471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42471*FLEN/8, x4, x1, x2) - -inst_14158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:42474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42474*FLEN/8, x4, x1, x2) - -inst_14159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:42477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42477*FLEN/8, x4, x1, x2) - -inst_14160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:42480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42480*FLEN/8, x4, x1, x2) - -inst_14161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:42483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42483*FLEN/8, x4, x1, x2) - -inst_14162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:42486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42486*FLEN/8, x4, x1, x2) - -inst_14163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:42489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42489*FLEN/8, x4, x1, x2) - -inst_14164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:42492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42492*FLEN/8, x4, x1, x2) - -inst_14165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:42495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42495*FLEN/8, x4, x1, x2) - -inst_14166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:42498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42498*FLEN/8, x4, x1, x2) - -inst_14167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:42501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42501*FLEN/8, x4, x1, x2) - -inst_14168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:42504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42504*FLEN/8, x4, x1, x2) - -inst_14169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:42507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42507*FLEN/8, x4, x1, x2) - -inst_14170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:42510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42510*FLEN/8, x4, x1, x2) - -inst_14171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:42513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42513*FLEN/8, x4, x1, x2) - -inst_14172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3000000; valaddr_reg:x3; val_offset:42516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42516*FLEN/8, x4, x1, x2) - -inst_14173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3000001; valaddr_reg:x3; val_offset:42519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42519*FLEN/8, x4, x1, x2) - -inst_14174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3000003; valaddr_reg:x3; val_offset:42522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42522*FLEN/8, x4, x1, x2) - -inst_14175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3000007; valaddr_reg:x3; val_offset:42525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42525*FLEN/8, x4, x1, x2) - -inst_14176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x300000f; valaddr_reg:x3; val_offset:42528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42528*FLEN/8, x4, x1, x2) - -inst_14177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x300001f; valaddr_reg:x3; val_offset:42531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42531*FLEN/8, x4, x1, x2) - -inst_14178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x300003f; valaddr_reg:x3; val_offset:42534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42534*FLEN/8, x4, x1, x2) - -inst_14179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x300007f; valaddr_reg:x3; val_offset:42537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42537*FLEN/8, x4, x1, x2) - -inst_14180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x30000ff; valaddr_reg:x3; val_offset:42540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42540*FLEN/8, x4, x1, x2) - -inst_14181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x30001ff; valaddr_reg:x3; val_offset:42543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42543*FLEN/8, x4, x1, x2) - -inst_14182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x30003ff; valaddr_reg:x3; val_offset:42546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42546*FLEN/8, x4, x1, x2) - -inst_14183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x30007ff; valaddr_reg:x3; val_offset:42549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42549*FLEN/8, x4, x1, x2) - -inst_14184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3000fff; valaddr_reg:x3; val_offset:42552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42552*FLEN/8, x4, x1, x2) - -inst_14185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3001fff; valaddr_reg:x3; val_offset:42555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42555*FLEN/8, x4, x1, x2) - -inst_14186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3003fff; valaddr_reg:x3; val_offset:42558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42558*FLEN/8, x4, x1, x2) - -inst_14187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3007fff; valaddr_reg:x3; val_offset:42561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42561*FLEN/8, x4, x1, x2) - -inst_14188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x300ffff; valaddr_reg:x3; val_offset:42564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42564*FLEN/8, x4, x1, x2) - -inst_14189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x301ffff; valaddr_reg:x3; val_offset:42567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42567*FLEN/8, x4, x1, x2) - -inst_14190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x303ffff; valaddr_reg:x3; val_offset:42570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42570*FLEN/8, x4, x1, x2) - -inst_14191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x307ffff; valaddr_reg:x3; val_offset:42573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42573*FLEN/8, x4, x1, x2) - -inst_14192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x30fffff; valaddr_reg:x3; val_offset:42576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42576*FLEN/8, x4, x1, x2) - -inst_14193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x31fffff; valaddr_reg:x3; val_offset:42579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42579*FLEN/8, x4, x1, x2) - -inst_14194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x33fffff; valaddr_reg:x3; val_offset:42582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42582*FLEN/8, x4, x1, x2) - -inst_14195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3400000; valaddr_reg:x3; val_offset:42585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42585*FLEN/8, x4, x1, x2) - -inst_14196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3600000; valaddr_reg:x3; val_offset:42588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42588*FLEN/8, x4, x1, x2) - -inst_14197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3700000; valaddr_reg:x3; val_offset:42591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42591*FLEN/8, x4, x1, x2) - -inst_14198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x3780000; valaddr_reg:x3; val_offset:42594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42594*FLEN/8, x4, x1, x2) - -inst_14199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37c0000; valaddr_reg:x3; val_offset:42597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42597*FLEN/8, x4, x1, x2) - -inst_14200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37e0000; valaddr_reg:x3; val_offset:42600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42600*FLEN/8, x4, x1, x2) - -inst_14201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37f0000; valaddr_reg:x3; val_offset:42603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42603*FLEN/8, x4, x1, x2) - -inst_14202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37f8000; valaddr_reg:x3; val_offset:42606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42606*FLEN/8, x4, x1, x2) - -inst_14203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37fc000; valaddr_reg:x3; val_offset:42609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42609*FLEN/8, x4, x1, x2) - -inst_14204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37fe000; valaddr_reg:x3; val_offset:42612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42612*FLEN/8, x4, x1, x2) - -inst_14205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37ff000; valaddr_reg:x3; val_offset:42615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42615*FLEN/8, x4, x1, x2) - -inst_14206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37ff800; valaddr_reg:x3; val_offset:42618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42618*FLEN/8, x4, x1, x2) - -inst_14207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37ffc00; valaddr_reg:x3; val_offset:42621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42621*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_112) - -inst_14208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37ffe00; valaddr_reg:x3; val_offset:42624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42624*FLEN/8, x4, x1, x2) - -inst_14209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37fff00; valaddr_reg:x3; val_offset:42627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42627*FLEN/8, x4, x1, x2) - -inst_14210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37fff80; valaddr_reg:x3; val_offset:42630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42630*FLEN/8, x4, x1, x2) - -inst_14211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37fffc0; valaddr_reg:x3; val_offset:42633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42633*FLEN/8, x4, x1, x2) - -inst_14212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37fffe0; valaddr_reg:x3; val_offset:42636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42636*FLEN/8, x4, x1, x2) - -inst_14213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37ffff0; valaddr_reg:x3; val_offset:42639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42639*FLEN/8, x4, x1, x2) - -inst_14214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37ffff8; valaddr_reg:x3; val_offset:42642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42642*FLEN/8, x4, x1, x2) - -inst_14215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37ffffc; valaddr_reg:x3; val_offset:42645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42645*FLEN/8, x4, x1, x2) - -inst_14216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37ffffe; valaddr_reg:x3; val_offset:42648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42648*FLEN/8, x4, x1, x2) - -inst_14217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; -op3val:0x37fffff; valaddr_reg:x3; val_offset:42651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42651*FLEN/8, x4, x1, x2) - -inst_14218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:42654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42654*FLEN/8, x4, x1, x2) - -inst_14219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:42657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42657*FLEN/8, x4, x1, x2) - -inst_14220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:42660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42660*FLEN/8, x4, x1, x2) - -inst_14221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:42663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42663*FLEN/8, x4, x1, x2) - -inst_14222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:42666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42666*FLEN/8, x4, x1, x2) - -inst_14223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:42669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42669*FLEN/8, x4, x1, x2) - -inst_14224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:42672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42672*FLEN/8, x4, x1, x2) - -inst_14225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:42675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42675*FLEN/8, x4, x1, x2) - -inst_14226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:42678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42678*FLEN/8, x4, x1, x2) - -inst_14227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:42681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42681*FLEN/8, x4, x1, x2) - -inst_14228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:42684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42684*FLEN/8, x4, x1, x2) - -inst_14229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:42687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42687*FLEN/8, x4, x1, x2) - -inst_14230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:42690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42690*FLEN/8, x4, x1, x2) - -inst_14231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:42693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42693*FLEN/8, x4, x1, x2) - -inst_14232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:42696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42696*FLEN/8, x4, x1, x2) - -inst_14233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:42699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42699*FLEN/8, x4, x1, x2) - -inst_14234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d800000; valaddr_reg:x3; val_offset:42702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42702*FLEN/8, x4, x1, x2) - -inst_14235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d800001; valaddr_reg:x3; val_offset:42705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42705*FLEN/8, x4, x1, x2) - -inst_14236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d800003; valaddr_reg:x3; val_offset:42708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42708*FLEN/8, x4, x1, x2) - -inst_14237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d800007; valaddr_reg:x3; val_offset:42711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42711*FLEN/8, x4, x1, x2) - -inst_14238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d80000f; valaddr_reg:x3; val_offset:42714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42714*FLEN/8, x4, x1, x2) - -inst_14239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d80001f; valaddr_reg:x3; val_offset:42717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42717*FLEN/8, x4, x1, x2) - -inst_14240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d80003f; valaddr_reg:x3; val_offset:42720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42720*FLEN/8, x4, x1, x2) - -inst_14241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d80007f; valaddr_reg:x3; val_offset:42723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42723*FLEN/8, x4, x1, x2) - -inst_14242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d8000ff; valaddr_reg:x3; val_offset:42726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42726*FLEN/8, x4, x1, x2) - -inst_14243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d8001ff; valaddr_reg:x3; val_offset:42729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42729*FLEN/8, x4, x1, x2) - -inst_14244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d8003ff; valaddr_reg:x3; val_offset:42732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42732*FLEN/8, x4, x1, x2) - -inst_14245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d8007ff; valaddr_reg:x3; val_offset:42735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42735*FLEN/8, x4, x1, x2) - -inst_14246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d800fff; valaddr_reg:x3; val_offset:42738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42738*FLEN/8, x4, x1, x2) - -inst_14247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d801fff; valaddr_reg:x3; val_offset:42741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42741*FLEN/8, x4, x1, x2) - -inst_14248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d803fff; valaddr_reg:x3; val_offset:42744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42744*FLEN/8, x4, x1, x2) - -inst_14249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d807fff; valaddr_reg:x3; val_offset:42747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42747*FLEN/8, x4, x1, x2) - -inst_14250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d80ffff; valaddr_reg:x3; val_offset:42750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42750*FLEN/8, x4, x1, x2) - -inst_14251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d81ffff; valaddr_reg:x3; val_offset:42753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42753*FLEN/8, x4, x1, x2) - -inst_14252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d83ffff; valaddr_reg:x3; val_offset:42756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42756*FLEN/8, x4, x1, x2) - -inst_14253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d87ffff; valaddr_reg:x3; val_offset:42759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42759*FLEN/8, x4, x1, x2) - -inst_14254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d8fffff; valaddr_reg:x3; val_offset:42762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42762*FLEN/8, x4, x1, x2) - -inst_14255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8d9fffff; valaddr_reg:x3; val_offset:42765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42765*FLEN/8, x4, x1, x2) - -inst_14256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dbfffff; valaddr_reg:x3; val_offset:42768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42768*FLEN/8, x4, x1, x2) - -inst_14257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dc00000; valaddr_reg:x3; val_offset:42771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42771*FLEN/8, x4, x1, x2) - -inst_14258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8de00000; valaddr_reg:x3; val_offset:42774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42774*FLEN/8, x4, x1, x2) - -inst_14259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8df00000; valaddr_reg:x3; val_offset:42777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42777*FLEN/8, x4, x1, x2) - -inst_14260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8df80000; valaddr_reg:x3; val_offset:42780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42780*FLEN/8, x4, x1, x2) - -inst_14261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfc0000; valaddr_reg:x3; val_offset:42783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42783*FLEN/8, x4, x1, x2) - -inst_14262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfe0000; valaddr_reg:x3; val_offset:42786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42786*FLEN/8, x4, x1, x2) - -inst_14263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dff0000; valaddr_reg:x3; val_offset:42789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42789*FLEN/8, x4, x1, x2) - -inst_14264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dff8000; valaddr_reg:x3; val_offset:42792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42792*FLEN/8, x4, x1, x2) - -inst_14265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dffc000; valaddr_reg:x3; val_offset:42795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42795*FLEN/8, x4, x1, x2) - -inst_14266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dffe000; valaddr_reg:x3; val_offset:42798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42798*FLEN/8, x4, x1, x2) - -inst_14267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfff000; valaddr_reg:x3; val_offset:42801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42801*FLEN/8, x4, x1, x2) - -inst_14268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfff800; valaddr_reg:x3; val_offset:42804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42804*FLEN/8, x4, x1, x2) - -inst_14269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfffc00; valaddr_reg:x3; val_offset:42807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42807*FLEN/8, x4, x1, x2) - -inst_14270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfffe00; valaddr_reg:x3; val_offset:42810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42810*FLEN/8, x4, x1, x2) - -inst_14271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dffff00; valaddr_reg:x3; val_offset:42813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42813*FLEN/8, x4, x1, x2) - -inst_14272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dffff80; valaddr_reg:x3; val_offset:42816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42816*FLEN/8, x4, x1, x2) - -inst_14273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dffffc0; valaddr_reg:x3; val_offset:42819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42819*FLEN/8, x4, x1, x2) - -inst_14274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dffffe0; valaddr_reg:x3; val_offset:42822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42822*FLEN/8, x4, x1, x2) - -inst_14275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfffff0; valaddr_reg:x3; val_offset:42825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42825*FLEN/8, x4, x1, x2) - -inst_14276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfffff8; valaddr_reg:x3; val_offset:42828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42828*FLEN/8, x4, x1, x2) - -inst_14277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfffffc; valaddr_reg:x3; val_offset:42831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42831*FLEN/8, x4, x1, x2) - -inst_14278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dfffffe; valaddr_reg:x3; val_offset:42834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42834*FLEN/8, x4, x1, x2) - -inst_14279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; -op3val:0x8dffffff; valaddr_reg:x3; val_offset:42837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42837*FLEN/8, x4, x1, x2) - -inst_14280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65000000; valaddr_reg:x3; val_offset:42840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42840*FLEN/8, x4, x1, x2) - -inst_14281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65000001; valaddr_reg:x3; val_offset:42843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42843*FLEN/8, x4, x1, x2) - -inst_14282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65000003; valaddr_reg:x3; val_offset:42846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42846*FLEN/8, x4, x1, x2) - -inst_14283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65000007; valaddr_reg:x3; val_offset:42849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42849*FLEN/8, x4, x1, x2) - -inst_14284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x6500000f; valaddr_reg:x3; val_offset:42852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42852*FLEN/8, x4, x1, x2) - -inst_14285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x6500001f; valaddr_reg:x3; val_offset:42855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42855*FLEN/8, x4, x1, x2) - -inst_14286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x6500003f; valaddr_reg:x3; val_offset:42858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42858*FLEN/8, x4, x1, x2) - -inst_14287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x6500007f; valaddr_reg:x3; val_offset:42861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42861*FLEN/8, x4, x1, x2) - -inst_14288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x650000ff; valaddr_reg:x3; val_offset:42864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42864*FLEN/8, x4, x1, x2) - -inst_14289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x650001ff; valaddr_reg:x3; val_offset:42867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42867*FLEN/8, x4, x1, x2) - -inst_14290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x650003ff; valaddr_reg:x3; val_offset:42870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42870*FLEN/8, x4, x1, x2) - -inst_14291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x650007ff; valaddr_reg:x3; val_offset:42873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42873*FLEN/8, x4, x1, x2) - -inst_14292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65000fff; valaddr_reg:x3; val_offset:42876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42876*FLEN/8, x4, x1, x2) - -inst_14293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65001fff; valaddr_reg:x3; val_offset:42879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42879*FLEN/8, x4, x1, x2) - -inst_14294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65003fff; valaddr_reg:x3; val_offset:42882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42882*FLEN/8, x4, x1, x2) - -inst_14295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65007fff; valaddr_reg:x3; val_offset:42885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42885*FLEN/8, x4, x1, x2) - -inst_14296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x6500ffff; valaddr_reg:x3; val_offset:42888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42888*FLEN/8, x4, x1, x2) - -inst_14297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x6501ffff; valaddr_reg:x3; val_offset:42891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42891*FLEN/8, x4, x1, x2) - -inst_14298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x6503ffff; valaddr_reg:x3; val_offset:42894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42894*FLEN/8, x4, x1, x2) - -inst_14299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x6507ffff; valaddr_reg:x3; val_offset:42897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42897*FLEN/8, x4, x1, x2) - -inst_14300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x650fffff; valaddr_reg:x3; val_offset:42900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42900*FLEN/8, x4, x1, x2) - -inst_14301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x651fffff; valaddr_reg:x3; val_offset:42903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42903*FLEN/8, x4, x1, x2) - -inst_14302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x653fffff; valaddr_reg:x3; val_offset:42906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42906*FLEN/8, x4, x1, x2) - -inst_14303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65400000; valaddr_reg:x3; val_offset:42909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42909*FLEN/8, x4, x1, x2) - -inst_14304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65600000; valaddr_reg:x3; val_offset:42912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42912*FLEN/8, x4, x1, x2) - -inst_14305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65700000; valaddr_reg:x3; val_offset:42915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42915*FLEN/8, x4, x1, x2) - -inst_14306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x65780000; valaddr_reg:x3; val_offset:42918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42918*FLEN/8, x4, x1, x2) - -inst_14307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657c0000; valaddr_reg:x3; val_offset:42921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42921*FLEN/8, x4, x1, x2) - -inst_14308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657e0000; valaddr_reg:x3; val_offset:42924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42924*FLEN/8, x4, x1, x2) - -inst_14309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657f0000; valaddr_reg:x3; val_offset:42927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42927*FLEN/8, x4, x1, x2) - -inst_14310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657f8000; valaddr_reg:x3; val_offset:42930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42930*FLEN/8, x4, x1, x2) - -inst_14311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657fc000; valaddr_reg:x3; val_offset:42933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42933*FLEN/8, x4, x1, x2) - -inst_14312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657fe000; valaddr_reg:x3; val_offset:42936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42936*FLEN/8, x4, x1, x2) - -inst_14313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657ff000; valaddr_reg:x3; val_offset:42939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42939*FLEN/8, x4, x1, x2) - -inst_14314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657ff800; valaddr_reg:x3; val_offset:42942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42942*FLEN/8, x4, x1, x2) - -inst_14315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657ffc00; valaddr_reg:x3; val_offset:42945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42945*FLEN/8, x4, x1, x2) - -inst_14316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657ffe00; valaddr_reg:x3; val_offset:42948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42948*FLEN/8, x4, x1, x2) - -inst_14317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657fff00; valaddr_reg:x3; val_offset:42951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42951*FLEN/8, x4, x1, x2) - -inst_14318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657fff80; valaddr_reg:x3; val_offset:42954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42954*FLEN/8, x4, x1, x2) - -inst_14319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657fffc0; valaddr_reg:x3; val_offset:42957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42957*FLEN/8, x4, x1, x2) - -inst_14320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657fffe0; valaddr_reg:x3; val_offset:42960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42960*FLEN/8, x4, x1, x2) - -inst_14321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657ffff0; valaddr_reg:x3; val_offset:42963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42963*FLEN/8, x4, x1, x2) - -inst_14322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657ffff8; valaddr_reg:x3; val_offset:42966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42966*FLEN/8, x4, x1, x2) - -inst_14323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657ffffc; valaddr_reg:x3; val_offset:42969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42969*FLEN/8, x4, x1, x2) - -inst_14324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657ffffe; valaddr_reg:x3; val_offset:42972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42972*FLEN/8, x4, x1, x2) - -inst_14325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x657fffff; valaddr_reg:x3; val_offset:42975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42975*FLEN/8, x4, x1, x2) - -inst_14326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f000001; valaddr_reg:x3; val_offset:42978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42978*FLEN/8, x4, x1, x2) - -inst_14327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f000003; valaddr_reg:x3; val_offset:42981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42981*FLEN/8, x4, x1, x2) - -inst_14328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f000007; valaddr_reg:x3; val_offset:42984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42984*FLEN/8, x4, x1, x2) - -inst_14329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f199999; valaddr_reg:x3; val_offset:42987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42987*FLEN/8, x4, x1, x2) - -inst_14330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f249249; valaddr_reg:x3; val_offset:42990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42990*FLEN/8, x4, x1, x2) - -inst_14331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f333333; valaddr_reg:x3; val_offset:42993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42993*FLEN/8, x4, x1, x2) - -inst_14332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:42996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42996*FLEN/8, x4, x1, x2) - -inst_14333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:42999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42999*FLEN/8, x4, x1, x2) - -inst_14334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f444444; valaddr_reg:x3; val_offset:43002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43002*FLEN/8, x4, x1, x2) - -inst_14335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:43005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43005*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_113) - -inst_14336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:43008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43008*FLEN/8, x4, x1, x2) - -inst_14337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f666666; valaddr_reg:x3; val_offset:43011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43011*FLEN/8, x4, x1, x2) - -inst_14338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:43014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43014*FLEN/8, x4, x1, x2) - -inst_14339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:43017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43017*FLEN/8, x4, x1, x2) - -inst_14340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:43020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43020*FLEN/8, x4, x1, x2) - -inst_14341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:43023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43023*FLEN/8, x4, x1, x2) - -inst_14342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbf800001; valaddr_reg:x3; val_offset:43026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43026*FLEN/8, x4, x1, x2) - -inst_14343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbf800003; valaddr_reg:x3; val_offset:43029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43029*FLEN/8, x4, x1, x2) - -inst_14344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbf800007; valaddr_reg:x3; val_offset:43032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43032*FLEN/8, x4, x1, x2) - -inst_14345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbf999999; valaddr_reg:x3; val_offset:43035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43035*FLEN/8, x4, x1, x2) - -inst_14346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:43038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43038*FLEN/8, x4, x1, x2) - -inst_14347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:43041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43041*FLEN/8, x4, x1, x2) - -inst_14348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:43044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43044*FLEN/8, x4, x1, x2) - -inst_14349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:43047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43047*FLEN/8, x4, x1, x2) - -inst_14350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:43050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43050*FLEN/8, x4, x1, x2) - -inst_14351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:43053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43053*FLEN/8, x4, x1, x2) - -inst_14352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:43056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43056*FLEN/8, x4, x1, x2) - -inst_14353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:43059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43059*FLEN/8, x4, x1, x2) - -inst_14354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:43062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43062*FLEN/8, x4, x1, x2) - -inst_14355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:43065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43065*FLEN/8, x4, x1, x2) - -inst_14356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:43068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43068*FLEN/8, x4, x1, x2) - -inst_14357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:43071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43071*FLEN/8, x4, x1, x2) - -inst_14358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5800000; valaddr_reg:x3; val_offset:43074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43074*FLEN/8, x4, x1, x2) - -inst_14359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5800001; valaddr_reg:x3; val_offset:43077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43077*FLEN/8, x4, x1, x2) - -inst_14360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5800003; valaddr_reg:x3; val_offset:43080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43080*FLEN/8, x4, x1, x2) - -inst_14361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5800007; valaddr_reg:x3; val_offset:43083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43083*FLEN/8, x4, x1, x2) - -inst_14362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc580000f; valaddr_reg:x3; val_offset:43086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43086*FLEN/8, x4, x1, x2) - -inst_14363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc580001f; valaddr_reg:x3; val_offset:43089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43089*FLEN/8, x4, x1, x2) - -inst_14364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc580003f; valaddr_reg:x3; val_offset:43092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43092*FLEN/8, x4, x1, x2) - -inst_14365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc580007f; valaddr_reg:x3; val_offset:43095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43095*FLEN/8, x4, x1, x2) - -inst_14366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc58000ff; valaddr_reg:x3; val_offset:43098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43098*FLEN/8, x4, x1, x2) - -inst_14367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc58001ff; valaddr_reg:x3; val_offset:43101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43101*FLEN/8, x4, x1, x2) - -inst_14368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc58003ff; valaddr_reg:x3; val_offset:43104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43104*FLEN/8, x4, x1, x2) - -inst_14369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc58007ff; valaddr_reg:x3; val_offset:43107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43107*FLEN/8, x4, x1, x2) - -inst_14370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5800fff; valaddr_reg:x3; val_offset:43110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43110*FLEN/8, x4, x1, x2) - -inst_14371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5801fff; valaddr_reg:x3; val_offset:43113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43113*FLEN/8, x4, x1, x2) - -inst_14372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5803fff; valaddr_reg:x3; val_offset:43116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43116*FLEN/8, x4, x1, x2) - -inst_14373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5807fff; valaddr_reg:x3; val_offset:43119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43119*FLEN/8, x4, x1, x2) - -inst_14374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc580ffff; valaddr_reg:x3; val_offset:43122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43122*FLEN/8, x4, x1, x2) - -inst_14375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc581ffff; valaddr_reg:x3; val_offset:43125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43125*FLEN/8, x4, x1, x2) - -inst_14376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc583ffff; valaddr_reg:x3; val_offset:43128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43128*FLEN/8, x4, x1, x2) - -inst_14377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc587ffff; valaddr_reg:x3; val_offset:43131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43131*FLEN/8, x4, x1, x2) - -inst_14378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc58fffff; valaddr_reg:x3; val_offset:43134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43134*FLEN/8, x4, x1, x2) - -inst_14379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc59fffff; valaddr_reg:x3; val_offset:43137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43137*FLEN/8, x4, x1, x2) - -inst_14380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5bfffff; valaddr_reg:x3; val_offset:43140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43140*FLEN/8, x4, x1, x2) - -inst_14381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5c00000; valaddr_reg:x3; val_offset:43143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43143*FLEN/8, x4, x1, x2) - -inst_14382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5e00000; valaddr_reg:x3; val_offset:43146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43146*FLEN/8, x4, x1, x2) - -inst_14383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5f00000; valaddr_reg:x3; val_offset:43149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43149*FLEN/8, x4, x1, x2) - -inst_14384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5f80000; valaddr_reg:x3; val_offset:43152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43152*FLEN/8, x4, x1, x2) - -inst_14385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fc0000; valaddr_reg:x3; val_offset:43155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43155*FLEN/8, x4, x1, x2) - -inst_14386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fe0000; valaddr_reg:x3; val_offset:43158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43158*FLEN/8, x4, x1, x2) - -inst_14387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ff0000; valaddr_reg:x3; val_offset:43161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43161*FLEN/8, x4, x1, x2) - -inst_14388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ff8000; valaddr_reg:x3; val_offset:43164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43164*FLEN/8, x4, x1, x2) - -inst_14389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ffc000; valaddr_reg:x3; val_offset:43167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43167*FLEN/8, x4, x1, x2) - -inst_14390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ffe000; valaddr_reg:x3; val_offset:43170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43170*FLEN/8, x4, x1, x2) - -inst_14391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fff000; valaddr_reg:x3; val_offset:43173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43173*FLEN/8, x4, x1, x2) - -inst_14392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fff800; valaddr_reg:x3; val_offset:43176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43176*FLEN/8, x4, x1, x2) - -inst_14393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fffc00; valaddr_reg:x3; val_offset:43179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43179*FLEN/8, x4, x1, x2) - -inst_14394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fffe00; valaddr_reg:x3; val_offset:43182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43182*FLEN/8, x4, x1, x2) - -inst_14395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ffff00; valaddr_reg:x3; val_offset:43185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43185*FLEN/8, x4, x1, x2) - -inst_14396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ffff80; valaddr_reg:x3; val_offset:43188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43188*FLEN/8, x4, x1, x2) - -inst_14397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ffffc0; valaddr_reg:x3; val_offset:43191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43191*FLEN/8, x4, x1, x2) - -inst_14398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ffffe0; valaddr_reg:x3; val_offset:43194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43194*FLEN/8, x4, x1, x2) - -inst_14399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fffff0; valaddr_reg:x3; val_offset:43197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43197*FLEN/8, x4, x1, x2) - -inst_14400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fffff8; valaddr_reg:x3; val_offset:43200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43200*FLEN/8, x4, x1, x2) - -inst_14401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fffffc; valaddr_reg:x3; val_offset:43203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43203*FLEN/8, x4, x1, x2) - -inst_14402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5fffffe; valaddr_reg:x3; val_offset:43206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43206*FLEN/8, x4, x1, x2) - -inst_14403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; -op3val:0xc5ffffff; valaddr_reg:x3; val_offset:43209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43209*FLEN/8, x4, x1, x2) - -inst_14404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbf800001; valaddr_reg:x3; val_offset:43212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43212*FLEN/8, x4, x1, x2) - -inst_14405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbf800003; valaddr_reg:x3; val_offset:43215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43215*FLEN/8, x4, x1, x2) - -inst_14406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbf800007; valaddr_reg:x3; val_offset:43218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43218*FLEN/8, x4, x1, x2) - -inst_14407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbf999999; valaddr_reg:x3; val_offset:43221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43221*FLEN/8, x4, x1, x2) - -inst_14408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:43224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43224*FLEN/8, x4, x1, x2) - -inst_14409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:43227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43227*FLEN/8, x4, x1, x2) - -inst_14410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:43230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43230*FLEN/8, x4, x1, x2) - -inst_14411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:43233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43233*FLEN/8, x4, x1, x2) - -inst_14412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:43236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43236*FLEN/8, x4, x1, x2) - -inst_14413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:43239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43239*FLEN/8, x4, x1, x2) - -inst_14414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:43242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43242*FLEN/8, x4, x1, x2) - -inst_14415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:43245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43245*FLEN/8, x4, x1, x2) - -inst_14416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:43248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43248*FLEN/8, x4, x1, x2) - -inst_14417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:43251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43251*FLEN/8, x4, x1, x2) - -inst_14418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:43254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43254*FLEN/8, x4, x1, x2) - -inst_14419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:43257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43257*FLEN/8, x4, x1, x2) - -inst_14420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce000000; valaddr_reg:x3; val_offset:43260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43260*FLEN/8, x4, x1, x2) - -inst_14421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce000001; valaddr_reg:x3; val_offset:43263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43263*FLEN/8, x4, x1, x2) - -inst_14422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce000003; valaddr_reg:x3; val_offset:43266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43266*FLEN/8, x4, x1, x2) - -inst_14423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce000007; valaddr_reg:x3; val_offset:43269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43269*FLEN/8, x4, x1, x2) - -inst_14424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce00000f; valaddr_reg:x3; val_offset:43272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43272*FLEN/8, x4, x1, x2) - -inst_14425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce00001f; valaddr_reg:x3; val_offset:43275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43275*FLEN/8, x4, x1, x2) - -inst_14426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce00003f; valaddr_reg:x3; val_offset:43278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43278*FLEN/8, x4, x1, x2) - -inst_14427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce00007f; valaddr_reg:x3; val_offset:43281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43281*FLEN/8, x4, x1, x2) - -inst_14428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce0000ff; valaddr_reg:x3; val_offset:43284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43284*FLEN/8, x4, x1, x2) - -inst_14429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce0001ff; valaddr_reg:x3; val_offset:43287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43287*FLEN/8, x4, x1, x2) - -inst_14430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce0003ff; valaddr_reg:x3; val_offset:43290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43290*FLEN/8, x4, x1, x2) - -inst_14431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce0007ff; valaddr_reg:x3; val_offset:43293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43293*FLEN/8, x4, x1, x2) - -inst_14432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce000fff; valaddr_reg:x3; val_offset:43296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43296*FLEN/8, x4, x1, x2) - -inst_14433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce001fff; valaddr_reg:x3; val_offset:43299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43299*FLEN/8, x4, x1, x2) - -inst_14434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce003fff; valaddr_reg:x3; val_offset:43302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43302*FLEN/8, x4, x1, x2) - -inst_14435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce007fff; valaddr_reg:x3; val_offset:43305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43305*FLEN/8, x4, x1, x2) - -inst_14436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce00ffff; valaddr_reg:x3; val_offset:43308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43308*FLEN/8, x4, x1, x2) - -inst_14437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce01ffff; valaddr_reg:x3; val_offset:43311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43311*FLEN/8, x4, x1, x2) - -inst_14438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce03ffff; valaddr_reg:x3; val_offset:43314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43314*FLEN/8, x4, x1, x2) - -inst_14439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce07ffff; valaddr_reg:x3; val_offset:43317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43317*FLEN/8, x4, x1, x2) - -inst_14440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce0fffff; valaddr_reg:x3; val_offset:43320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43320*FLEN/8, x4, x1, x2) - -inst_14441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce1fffff; valaddr_reg:x3; val_offset:43323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43323*FLEN/8, x4, x1, x2) - -inst_14442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce3fffff; valaddr_reg:x3; val_offset:43326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43326*FLEN/8, x4, x1, x2) - -inst_14443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce400000; valaddr_reg:x3; val_offset:43329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43329*FLEN/8, x4, x1, x2) - -inst_14444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce600000; valaddr_reg:x3; val_offset:43332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43332*FLEN/8, x4, x1, x2) - -inst_14445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce700000; valaddr_reg:x3; val_offset:43335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43335*FLEN/8, x4, x1, x2) - -inst_14446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce780000; valaddr_reg:x3; val_offset:43338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43338*FLEN/8, x4, x1, x2) - -inst_14447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7c0000; valaddr_reg:x3; val_offset:43341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43341*FLEN/8, x4, x1, x2) - -inst_14448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7e0000; valaddr_reg:x3; val_offset:43344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43344*FLEN/8, x4, x1, x2) - -inst_14449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7f0000; valaddr_reg:x3; val_offset:43347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43347*FLEN/8, x4, x1, x2) - -inst_14450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7f8000; valaddr_reg:x3; val_offset:43350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43350*FLEN/8, x4, x1, x2) - -inst_14451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7fc000; valaddr_reg:x3; val_offset:43353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43353*FLEN/8, x4, x1, x2) - -inst_14452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7fe000; valaddr_reg:x3; val_offset:43356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43356*FLEN/8, x4, x1, x2) - -inst_14453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7ff000; valaddr_reg:x3; val_offset:43359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43359*FLEN/8, x4, x1, x2) - -inst_14454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7ff800; valaddr_reg:x3; val_offset:43362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43362*FLEN/8, x4, x1, x2) - -inst_14455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7ffc00; valaddr_reg:x3; val_offset:43365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43365*FLEN/8, x4, x1, x2) - -inst_14456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7ffe00; valaddr_reg:x3; val_offset:43368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43368*FLEN/8, x4, x1, x2) - -inst_14457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7fff00; valaddr_reg:x3; val_offset:43371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43371*FLEN/8, x4, x1, x2) - -inst_14458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7fff80; valaddr_reg:x3; val_offset:43374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43374*FLEN/8, x4, x1, x2) - -inst_14459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7fffc0; valaddr_reg:x3; val_offset:43377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43377*FLEN/8, x4, x1, x2) - -inst_14460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7fffe0; valaddr_reg:x3; val_offset:43380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43380*FLEN/8, x4, x1, x2) - -inst_14461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7ffff0; valaddr_reg:x3; val_offset:43383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43383*FLEN/8, x4, x1, x2) - -inst_14462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7ffff8; valaddr_reg:x3; val_offset:43386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43386*FLEN/8, x4, x1, x2) - -inst_14463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7ffffc; valaddr_reg:x3; val_offset:43389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43389*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_114) - -inst_14464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7ffffe; valaddr_reg:x3; val_offset:43392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43392*FLEN/8, x4, x1, x2) - -inst_14465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; -op3val:0xce7fffff; valaddr_reg:x3; val_offset:43395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43395*FLEN/8, x4, x1, x2) - -inst_14466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e800000; valaddr_reg:x3; val_offset:43398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43398*FLEN/8, x4, x1, x2) - -inst_14467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e800001; valaddr_reg:x3; val_offset:43401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43401*FLEN/8, x4, x1, x2) - -inst_14468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e800003; valaddr_reg:x3; val_offset:43404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43404*FLEN/8, x4, x1, x2) - -inst_14469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e800007; valaddr_reg:x3; val_offset:43407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43407*FLEN/8, x4, x1, x2) - -inst_14470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e80000f; valaddr_reg:x3; val_offset:43410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43410*FLEN/8, x4, x1, x2) - -inst_14471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e80001f; valaddr_reg:x3; val_offset:43413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43413*FLEN/8, x4, x1, x2) - -inst_14472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e80003f; valaddr_reg:x3; val_offset:43416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43416*FLEN/8, x4, x1, x2) - -inst_14473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e80007f; valaddr_reg:x3; val_offset:43419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43419*FLEN/8, x4, x1, x2) - -inst_14474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e8000ff; valaddr_reg:x3; val_offset:43422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43422*FLEN/8, x4, x1, x2) - -inst_14475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e8001ff; valaddr_reg:x3; val_offset:43425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43425*FLEN/8, x4, x1, x2) - -inst_14476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e8003ff; valaddr_reg:x3; val_offset:43428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43428*FLEN/8, x4, x1, x2) - -inst_14477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e8007ff; valaddr_reg:x3; val_offset:43431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43431*FLEN/8, x4, x1, x2) - -inst_14478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e800fff; valaddr_reg:x3; val_offset:43434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43434*FLEN/8, x4, x1, x2) - -inst_14479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e801fff; valaddr_reg:x3; val_offset:43437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43437*FLEN/8, x4, x1, x2) - -inst_14480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e803fff; valaddr_reg:x3; val_offset:43440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43440*FLEN/8, x4, x1, x2) - -inst_14481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e807fff; valaddr_reg:x3; val_offset:43443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43443*FLEN/8, x4, x1, x2) - -inst_14482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e80ffff; valaddr_reg:x3; val_offset:43446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43446*FLEN/8, x4, x1, x2) - -inst_14483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e81ffff; valaddr_reg:x3; val_offset:43449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43449*FLEN/8, x4, x1, x2) - -inst_14484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e83ffff; valaddr_reg:x3; val_offset:43452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43452*FLEN/8, x4, x1, x2) - -inst_14485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e87ffff; valaddr_reg:x3; val_offset:43455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43455*FLEN/8, x4, x1, x2) - -inst_14486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e8fffff; valaddr_reg:x3; val_offset:43458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43458*FLEN/8, x4, x1, x2) - -inst_14487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2e9fffff; valaddr_reg:x3; val_offset:43461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43461*FLEN/8, x4, x1, x2) - -inst_14488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2ebfffff; valaddr_reg:x3; val_offset:43464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43464*FLEN/8, x4, x1, x2) - -inst_14489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2ec00000; valaddr_reg:x3; val_offset:43467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43467*FLEN/8, x4, x1, x2) - -inst_14490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2ee00000; valaddr_reg:x3; val_offset:43470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43470*FLEN/8, x4, x1, x2) - -inst_14491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2ef00000; valaddr_reg:x3; val_offset:43473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43473*FLEN/8, x4, x1, x2) - -inst_14492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2ef80000; valaddr_reg:x3; val_offset:43476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43476*FLEN/8, x4, x1, x2) - -inst_14493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efc0000; valaddr_reg:x3; val_offset:43479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43479*FLEN/8, x4, x1, x2) - -inst_14494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efe0000; valaddr_reg:x3; val_offset:43482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43482*FLEN/8, x4, x1, x2) - -inst_14495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2eff0000; valaddr_reg:x3; val_offset:43485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43485*FLEN/8, x4, x1, x2) - -inst_14496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2eff8000; valaddr_reg:x3; val_offset:43488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43488*FLEN/8, x4, x1, x2) - -inst_14497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2effc000; valaddr_reg:x3; val_offset:43491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43491*FLEN/8, x4, x1, x2) - -inst_14498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2effe000; valaddr_reg:x3; val_offset:43494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43494*FLEN/8, x4, x1, x2) - -inst_14499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efff000; valaddr_reg:x3; val_offset:43497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43497*FLEN/8, x4, x1, x2) - -inst_14500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efff800; valaddr_reg:x3; val_offset:43500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43500*FLEN/8, x4, x1, x2) - -inst_14501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efffc00; valaddr_reg:x3; val_offset:43503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43503*FLEN/8, x4, x1, x2) - -inst_14502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efffe00; valaddr_reg:x3; val_offset:43506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43506*FLEN/8, x4, x1, x2) - -inst_14503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2effff00; valaddr_reg:x3; val_offset:43509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43509*FLEN/8, x4, x1, x2) - -inst_14504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2effff80; valaddr_reg:x3; val_offset:43512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43512*FLEN/8, x4, x1, x2) - -inst_14505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2effffc0; valaddr_reg:x3; val_offset:43515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43515*FLEN/8, x4, x1, x2) - -inst_14506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2effffe0; valaddr_reg:x3; val_offset:43518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43518*FLEN/8, x4, x1, x2) - -inst_14507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efffff0; valaddr_reg:x3; val_offset:43521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43521*FLEN/8, x4, x1, x2) - -inst_14508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efffff8; valaddr_reg:x3; val_offset:43524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43524*FLEN/8, x4, x1, x2) - -inst_14509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efffffc; valaddr_reg:x3; val_offset:43527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43527*FLEN/8, x4, x1, x2) - -inst_14510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2efffffe; valaddr_reg:x3; val_offset:43530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43530*FLEN/8, x4, x1, x2) - -inst_14511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x2effffff; valaddr_reg:x3; val_offset:43533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43533*FLEN/8, x4, x1, x2) - -inst_14512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3f800001; valaddr_reg:x3; val_offset:43536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43536*FLEN/8, x4, x1, x2) - -inst_14513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3f800003; valaddr_reg:x3; val_offset:43539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43539*FLEN/8, x4, x1, x2) - -inst_14514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3f800007; valaddr_reg:x3; val_offset:43542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43542*FLEN/8, x4, x1, x2) - -inst_14515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3f999999; valaddr_reg:x3; val_offset:43545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43545*FLEN/8, x4, x1, x2) - -inst_14516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:43548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43548*FLEN/8, x4, x1, x2) - -inst_14517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:43551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43551*FLEN/8, x4, x1, x2) - -inst_14518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:43554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43554*FLEN/8, x4, x1, x2) - -inst_14519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:43557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43557*FLEN/8, x4, x1, x2) - -inst_14520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:43560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43560*FLEN/8, x4, x1, x2) - -inst_14521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:43563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43563*FLEN/8, x4, x1, x2) - -inst_14522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:43566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43566*FLEN/8, x4, x1, x2) - -inst_14523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:43569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43569*FLEN/8, x4, x1, x2) - -inst_14524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:43572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43572*FLEN/8, x4, x1, x2) - -inst_14525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:43575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43575*FLEN/8, x4, x1, x2) - -inst_14526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:43578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43578*FLEN/8, x4, x1, x2) - -inst_14527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:43581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43581*FLEN/8, x4, x1, x2) - -inst_14528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77000000; valaddr_reg:x3; val_offset:43584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43584*FLEN/8, x4, x1, x2) - -inst_14529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77000001; valaddr_reg:x3; val_offset:43587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43587*FLEN/8, x4, x1, x2) - -inst_14530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77000003; valaddr_reg:x3; val_offset:43590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43590*FLEN/8, x4, x1, x2) - -inst_14531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77000007; valaddr_reg:x3; val_offset:43593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43593*FLEN/8, x4, x1, x2) - -inst_14532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7700000f; valaddr_reg:x3; val_offset:43596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43596*FLEN/8, x4, x1, x2) - -inst_14533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7700001f; valaddr_reg:x3; val_offset:43599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43599*FLEN/8, x4, x1, x2) - -inst_14534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7700003f; valaddr_reg:x3; val_offset:43602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43602*FLEN/8, x4, x1, x2) - -inst_14535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7700007f; valaddr_reg:x3; val_offset:43605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43605*FLEN/8, x4, x1, x2) - -inst_14536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x770000ff; valaddr_reg:x3; val_offset:43608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43608*FLEN/8, x4, x1, x2) - -inst_14537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x770001ff; valaddr_reg:x3; val_offset:43611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43611*FLEN/8, x4, x1, x2) - -inst_14538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x770003ff; valaddr_reg:x3; val_offset:43614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43614*FLEN/8, x4, x1, x2) - -inst_14539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x770007ff; valaddr_reg:x3; val_offset:43617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43617*FLEN/8, x4, x1, x2) - -inst_14540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77000fff; valaddr_reg:x3; val_offset:43620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43620*FLEN/8, x4, x1, x2) - -inst_14541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77001fff; valaddr_reg:x3; val_offset:43623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43623*FLEN/8, x4, x1, x2) - -inst_14542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77003fff; valaddr_reg:x3; val_offset:43626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43626*FLEN/8, x4, x1, x2) - -inst_14543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77007fff; valaddr_reg:x3; val_offset:43629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43629*FLEN/8, x4, x1, x2) - -inst_14544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7700ffff; valaddr_reg:x3; val_offset:43632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43632*FLEN/8, x4, x1, x2) - -inst_14545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7701ffff; valaddr_reg:x3; val_offset:43635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43635*FLEN/8, x4, x1, x2) - -inst_14546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7703ffff; valaddr_reg:x3; val_offset:43638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43638*FLEN/8, x4, x1, x2) - -inst_14547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7707ffff; valaddr_reg:x3; val_offset:43641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43641*FLEN/8, x4, x1, x2) - -inst_14548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x770fffff; valaddr_reg:x3; val_offset:43644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43644*FLEN/8, x4, x1, x2) - -inst_14549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x771fffff; valaddr_reg:x3; val_offset:43647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43647*FLEN/8, x4, x1, x2) - -inst_14550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x773fffff; valaddr_reg:x3; val_offset:43650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43650*FLEN/8, x4, x1, x2) - -inst_14551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77400000; valaddr_reg:x3; val_offset:43653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43653*FLEN/8, x4, x1, x2) - -inst_14552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77600000; valaddr_reg:x3; val_offset:43656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43656*FLEN/8, x4, x1, x2) - -inst_14553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77700000; valaddr_reg:x3; val_offset:43659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43659*FLEN/8, x4, x1, x2) - -inst_14554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x77780000; valaddr_reg:x3; val_offset:43662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43662*FLEN/8, x4, x1, x2) - -inst_14555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777c0000; valaddr_reg:x3; val_offset:43665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43665*FLEN/8, x4, x1, x2) - -inst_14556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777e0000; valaddr_reg:x3; val_offset:43668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43668*FLEN/8, x4, x1, x2) - -inst_14557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777f0000; valaddr_reg:x3; val_offset:43671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43671*FLEN/8, x4, x1, x2) - -inst_14558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777f8000; valaddr_reg:x3; val_offset:43674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43674*FLEN/8, x4, x1, x2) - -inst_14559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777fc000; valaddr_reg:x3; val_offset:43677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43677*FLEN/8, x4, x1, x2) - -inst_14560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777fe000; valaddr_reg:x3; val_offset:43680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43680*FLEN/8, x4, x1, x2) - -inst_14561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777ff000; valaddr_reg:x3; val_offset:43683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43683*FLEN/8, x4, x1, x2) - -inst_14562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777ff800; valaddr_reg:x3; val_offset:43686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43686*FLEN/8, x4, x1, x2) - -inst_14563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777ffc00; valaddr_reg:x3; val_offset:43689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43689*FLEN/8, x4, x1, x2) - -inst_14564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777ffe00; valaddr_reg:x3; val_offset:43692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43692*FLEN/8, x4, x1, x2) - -inst_14565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777fff00; valaddr_reg:x3; val_offset:43695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43695*FLEN/8, x4, x1, x2) - -inst_14566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777fff80; valaddr_reg:x3; val_offset:43698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43698*FLEN/8, x4, x1, x2) - -inst_14567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777fffc0; valaddr_reg:x3; val_offset:43701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43701*FLEN/8, x4, x1, x2) - -inst_14568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777fffe0; valaddr_reg:x3; val_offset:43704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43704*FLEN/8, x4, x1, x2) - -inst_14569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777ffff0; valaddr_reg:x3; val_offset:43707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43707*FLEN/8, x4, x1, x2) - -inst_14570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777ffff8; valaddr_reg:x3; val_offset:43710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43710*FLEN/8, x4, x1, x2) - -inst_14571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777ffffc; valaddr_reg:x3; val_offset:43713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43713*FLEN/8, x4, x1, x2) - -inst_14572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777ffffe; valaddr_reg:x3; val_offset:43716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43716*FLEN/8, x4, x1, x2) - -inst_14573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x777fffff; valaddr_reg:x3; val_offset:43719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43719*FLEN/8, x4, x1, x2) - -inst_14574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f000001; valaddr_reg:x3; val_offset:43722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43722*FLEN/8, x4, x1, x2) - -inst_14575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f000003; valaddr_reg:x3; val_offset:43725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43725*FLEN/8, x4, x1, x2) - -inst_14576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f000007; valaddr_reg:x3; val_offset:43728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43728*FLEN/8, x4, x1, x2) - -inst_14577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f199999; valaddr_reg:x3; val_offset:43731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43731*FLEN/8, x4, x1, x2) - -inst_14578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f249249; valaddr_reg:x3; val_offset:43734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43734*FLEN/8, x4, x1, x2) - -inst_14579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f333333; valaddr_reg:x3; val_offset:43737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43737*FLEN/8, x4, x1, x2) - -inst_14580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:43740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43740*FLEN/8, x4, x1, x2) - -inst_14581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:43743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43743*FLEN/8, x4, x1, x2) - -inst_14582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f444444; valaddr_reg:x3; val_offset:43746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43746*FLEN/8, x4, x1, x2) - -inst_14583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:43749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43749*FLEN/8, x4, x1, x2) - -inst_14584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:43752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43752*FLEN/8, x4, x1, x2) - -inst_14585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f666666; valaddr_reg:x3; val_offset:43755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43755*FLEN/8, x4, x1, x2) - -inst_14586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:43758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43758*FLEN/8, x4, x1, x2) - -inst_14587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:43761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43761*FLEN/8, x4, x1, x2) - -inst_14588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:43764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43764*FLEN/8, x4, x1, x2) - -inst_14589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:43767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43767*FLEN/8, x4, x1, x2) - -inst_14590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:43770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43770*FLEN/8, x4, x1, x2) - -inst_14591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:43773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43773*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_115) - -inst_14592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:43776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43776*FLEN/8, x4, x1, x2) - -inst_14593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:43779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43779*FLEN/8, x4, x1, x2) - -inst_14594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:43782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43782*FLEN/8, x4, x1, x2) - -inst_14595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:43785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43785*FLEN/8, x4, x1, x2) - -inst_14596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:43788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43788*FLEN/8, x4, x1, x2) - -inst_14597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:43791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43791*FLEN/8, x4, x1, x2) - -inst_14598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:43794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43794*FLEN/8, x4, x1, x2) - -inst_14599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:43797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43797*FLEN/8, x4, x1, x2) - -inst_14600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:43800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43800*FLEN/8, x4, x1, x2) - -inst_14601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:43803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43803*FLEN/8, x4, x1, x2) - -inst_14602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:43806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43806*FLEN/8, x4, x1, x2) - -inst_14603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:43809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43809*FLEN/8, x4, x1, x2) - -inst_14604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:43812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43812*FLEN/8, x4, x1, x2) - -inst_14605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:43815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43815*FLEN/8, x4, x1, x2) - -inst_14606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd800000; valaddr_reg:x3; val_offset:43818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43818*FLEN/8, x4, x1, x2) - -inst_14607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd800001; valaddr_reg:x3; val_offset:43821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43821*FLEN/8, x4, x1, x2) - -inst_14608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd800003; valaddr_reg:x3; val_offset:43824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43824*FLEN/8, x4, x1, x2) - -inst_14609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd800007; valaddr_reg:x3; val_offset:43827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43827*FLEN/8, x4, x1, x2) - -inst_14610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd80000f; valaddr_reg:x3; val_offset:43830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43830*FLEN/8, x4, x1, x2) - -inst_14611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd80001f; valaddr_reg:x3; val_offset:43833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43833*FLEN/8, x4, x1, x2) - -inst_14612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd80003f; valaddr_reg:x3; val_offset:43836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43836*FLEN/8, x4, x1, x2) - -inst_14613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd80007f; valaddr_reg:x3; val_offset:43839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43839*FLEN/8, x4, x1, x2) - -inst_14614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd8000ff; valaddr_reg:x3; val_offset:43842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43842*FLEN/8, x4, x1, x2) - -inst_14615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd8001ff; valaddr_reg:x3; val_offset:43845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43845*FLEN/8, x4, x1, x2) - -inst_14616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd8003ff; valaddr_reg:x3; val_offset:43848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43848*FLEN/8, x4, x1, x2) - -inst_14617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd8007ff; valaddr_reg:x3; val_offset:43851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43851*FLEN/8, x4, x1, x2) - -inst_14618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd800fff; valaddr_reg:x3; val_offset:43854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43854*FLEN/8, x4, x1, x2) - -inst_14619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd801fff; valaddr_reg:x3; val_offset:43857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43857*FLEN/8, x4, x1, x2) - -inst_14620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd803fff; valaddr_reg:x3; val_offset:43860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43860*FLEN/8, x4, x1, x2) - -inst_14621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd807fff; valaddr_reg:x3; val_offset:43863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43863*FLEN/8, x4, x1, x2) - -inst_14622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd80ffff; valaddr_reg:x3; val_offset:43866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43866*FLEN/8, x4, x1, x2) - -inst_14623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd81ffff; valaddr_reg:x3; val_offset:43869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43869*FLEN/8, x4, x1, x2) - -inst_14624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd83ffff; valaddr_reg:x3; val_offset:43872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43872*FLEN/8, x4, x1, x2) - -inst_14625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd87ffff; valaddr_reg:x3; val_offset:43875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43875*FLEN/8, x4, x1, x2) - -inst_14626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd8fffff; valaddr_reg:x3; val_offset:43878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43878*FLEN/8, x4, x1, x2) - -inst_14627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xd9fffff; valaddr_reg:x3; val_offset:43881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43881*FLEN/8, x4, x1, x2) - -inst_14628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdbfffff; valaddr_reg:x3; val_offset:43884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43884*FLEN/8, x4, x1, x2) - -inst_14629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdc00000; valaddr_reg:x3; val_offset:43887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43887*FLEN/8, x4, x1, x2) - -inst_14630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xde00000; valaddr_reg:x3; val_offset:43890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43890*FLEN/8, x4, x1, x2) - -inst_14631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdf00000; valaddr_reg:x3; val_offset:43893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43893*FLEN/8, x4, x1, x2) - -inst_14632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdf80000; valaddr_reg:x3; val_offset:43896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43896*FLEN/8, x4, x1, x2) - -inst_14633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfc0000; valaddr_reg:x3; val_offset:43899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43899*FLEN/8, x4, x1, x2) - -inst_14634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfe0000; valaddr_reg:x3; val_offset:43902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43902*FLEN/8, x4, x1, x2) - -inst_14635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdff0000; valaddr_reg:x3; val_offset:43905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43905*FLEN/8, x4, x1, x2) - -inst_14636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdff8000; valaddr_reg:x3; val_offset:43908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43908*FLEN/8, x4, x1, x2) - -inst_14637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdffc000; valaddr_reg:x3; val_offset:43911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43911*FLEN/8, x4, x1, x2) - -inst_14638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdffe000; valaddr_reg:x3; val_offset:43914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43914*FLEN/8, x4, x1, x2) - -inst_14639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfff000; valaddr_reg:x3; val_offset:43917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43917*FLEN/8, x4, x1, x2) - -inst_14640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfff800; valaddr_reg:x3; val_offset:43920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43920*FLEN/8, x4, x1, x2) - -inst_14641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfffc00; valaddr_reg:x3; val_offset:43923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43923*FLEN/8, x4, x1, x2) - -inst_14642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfffe00; valaddr_reg:x3; val_offset:43926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43926*FLEN/8, x4, x1, x2) - -inst_14643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdffff00; valaddr_reg:x3; val_offset:43929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43929*FLEN/8, x4, x1, x2) - -inst_14644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdffff80; valaddr_reg:x3; val_offset:43932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43932*FLEN/8, x4, x1, x2) - -inst_14645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdffffc0; valaddr_reg:x3; val_offset:43935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43935*FLEN/8, x4, x1, x2) - -inst_14646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdffffe0; valaddr_reg:x3; val_offset:43938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43938*FLEN/8, x4, x1, x2) - -inst_14647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfffff0; valaddr_reg:x3; val_offset:43941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43941*FLEN/8, x4, x1, x2) - -inst_14648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfffff8; valaddr_reg:x3; val_offset:43944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43944*FLEN/8, x4, x1, x2) - -inst_14649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfffffc; valaddr_reg:x3; val_offset:43947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43947*FLEN/8, x4, x1, x2) - -inst_14650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdfffffe; valaddr_reg:x3; val_offset:43950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43950*FLEN/8, x4, x1, x2) - -inst_14651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; -op3val:0xdffffff; valaddr_reg:x3; val_offset:43953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43953*FLEN/8, x4, x1, x2) - -inst_14652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbf800001; valaddr_reg:x3; val_offset:43956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43956*FLEN/8, x4, x1, x2) - -inst_14653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbf800003; valaddr_reg:x3; val_offset:43959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43959*FLEN/8, x4, x1, x2) - -inst_14654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbf800007; valaddr_reg:x3; val_offset:43962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43962*FLEN/8, x4, x1, x2) - -inst_14655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbf999999; valaddr_reg:x3; val_offset:43965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43965*FLEN/8, x4, x1, x2) - -inst_14656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:43968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43968*FLEN/8, x4, x1, x2) - -inst_14657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:43971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43971*FLEN/8, x4, x1, x2) - -inst_14658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:43974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43974*FLEN/8, x4, x1, x2) - -inst_14659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:43977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43977*FLEN/8, x4, x1, x2) - -inst_14660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:43980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43980*FLEN/8, x4, x1, x2) - -inst_14661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:43983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43983*FLEN/8, x4, x1, x2) - -inst_14662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:43986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43986*FLEN/8, x4, x1, x2) - -inst_14663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:43989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43989*FLEN/8, x4, x1, x2) - -inst_14664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:43992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43992*FLEN/8, x4, x1, x2) - -inst_14665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:43995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43995*FLEN/8, x4, x1, x2) - -inst_14666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:43998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43998*FLEN/8, x4, x1, x2) - -inst_14667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:44001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44001*FLEN/8, x4, x1, x2) - -inst_14668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb800000; valaddr_reg:x3; val_offset:44004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44004*FLEN/8, x4, x1, x2) - -inst_14669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb800001; valaddr_reg:x3; val_offset:44007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44007*FLEN/8, x4, x1, x2) - -inst_14670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb800003; valaddr_reg:x3; val_offset:44010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44010*FLEN/8, x4, x1, x2) - -inst_14671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb800007; valaddr_reg:x3; val_offset:44013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44013*FLEN/8, x4, x1, x2) - -inst_14672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb80000f; valaddr_reg:x3; val_offset:44016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44016*FLEN/8, x4, x1, x2) - -inst_14673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb80001f; valaddr_reg:x3; val_offset:44019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44019*FLEN/8, x4, x1, x2) - -inst_14674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb80003f; valaddr_reg:x3; val_offset:44022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44022*FLEN/8, x4, x1, x2) - -inst_14675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb80007f; valaddr_reg:x3; val_offset:44025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44025*FLEN/8, x4, x1, x2) - -inst_14676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb8000ff; valaddr_reg:x3; val_offset:44028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44028*FLEN/8, x4, x1, x2) - -inst_14677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb8001ff; valaddr_reg:x3; val_offset:44031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44031*FLEN/8, x4, x1, x2) - -inst_14678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb8003ff; valaddr_reg:x3; val_offset:44034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44034*FLEN/8, x4, x1, x2) - -inst_14679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb8007ff; valaddr_reg:x3; val_offset:44037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44037*FLEN/8, x4, x1, x2) - -inst_14680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb800fff; valaddr_reg:x3; val_offset:44040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44040*FLEN/8, x4, x1, x2) - -inst_14681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb801fff; valaddr_reg:x3; val_offset:44043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44043*FLEN/8, x4, x1, x2) - -inst_14682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb803fff; valaddr_reg:x3; val_offset:44046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44046*FLEN/8, x4, x1, x2) - -inst_14683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb807fff; valaddr_reg:x3; val_offset:44049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44049*FLEN/8, x4, x1, x2) - -inst_14684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb80ffff; valaddr_reg:x3; val_offset:44052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44052*FLEN/8, x4, x1, x2) - -inst_14685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb81ffff; valaddr_reg:x3; val_offset:44055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44055*FLEN/8, x4, x1, x2) - -inst_14686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb83ffff; valaddr_reg:x3; val_offset:44058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44058*FLEN/8, x4, x1, x2) - -inst_14687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb87ffff; valaddr_reg:x3; val_offset:44061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44061*FLEN/8, x4, x1, x2) - -inst_14688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb8fffff; valaddr_reg:x3; val_offset:44064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44064*FLEN/8, x4, x1, x2) - -inst_14689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcb9fffff; valaddr_reg:x3; val_offset:44067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44067*FLEN/8, x4, x1, x2) - -inst_14690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbbfffff; valaddr_reg:x3; val_offset:44070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44070*FLEN/8, x4, x1, x2) - -inst_14691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbc00000; valaddr_reg:x3; val_offset:44073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44073*FLEN/8, x4, x1, x2) - -inst_14692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbe00000; valaddr_reg:x3; val_offset:44076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44076*FLEN/8, x4, x1, x2) - -inst_14693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbf00000; valaddr_reg:x3; val_offset:44079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44079*FLEN/8, x4, x1, x2) - -inst_14694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbf80000; valaddr_reg:x3; val_offset:44082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44082*FLEN/8, x4, x1, x2) - -inst_14695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfc0000; valaddr_reg:x3; val_offset:44085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44085*FLEN/8, x4, x1, x2) - -inst_14696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfe0000; valaddr_reg:x3; val_offset:44088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44088*FLEN/8, x4, x1, x2) - -inst_14697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbff0000; valaddr_reg:x3; val_offset:44091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44091*FLEN/8, x4, x1, x2) - -inst_14698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbff8000; valaddr_reg:x3; val_offset:44094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44094*FLEN/8, x4, x1, x2) - -inst_14699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbffc000; valaddr_reg:x3; val_offset:44097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44097*FLEN/8, x4, x1, x2) - -inst_14700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbffe000; valaddr_reg:x3; val_offset:44100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44100*FLEN/8, x4, x1, x2) - -inst_14701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfff000; valaddr_reg:x3; val_offset:44103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44103*FLEN/8, x4, x1, x2) - -inst_14702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfff800; valaddr_reg:x3; val_offset:44106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44106*FLEN/8, x4, x1, x2) - -inst_14703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfffc00; valaddr_reg:x3; val_offset:44109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44109*FLEN/8, x4, x1, x2) - -inst_14704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfffe00; valaddr_reg:x3; val_offset:44112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44112*FLEN/8, x4, x1, x2) - -inst_14705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbffff00; valaddr_reg:x3; val_offset:44115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44115*FLEN/8, x4, x1, x2) - -inst_14706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbffff80; valaddr_reg:x3; val_offset:44118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44118*FLEN/8, x4, x1, x2) - -inst_14707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbffffc0; valaddr_reg:x3; val_offset:44121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44121*FLEN/8, x4, x1, x2) - -inst_14708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbffffe0; valaddr_reg:x3; val_offset:44124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44124*FLEN/8, x4, x1, x2) - -inst_14709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfffff0; valaddr_reg:x3; val_offset:44127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44127*FLEN/8, x4, x1, x2) - -inst_14710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfffff8; valaddr_reg:x3; val_offset:44130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44130*FLEN/8, x4, x1, x2) - -inst_14711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfffffc; valaddr_reg:x3; val_offset:44133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44133*FLEN/8, x4, x1, x2) - -inst_14712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbfffffe; valaddr_reg:x3; val_offset:44136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44136*FLEN/8, x4, x1, x2) - -inst_14713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; -op3val:0xcbffffff; valaddr_reg:x3; val_offset:44139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44139*FLEN/8, x4, x1, x2) - -inst_14714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73800000; valaddr_reg:x3; val_offset:44142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44142*FLEN/8, x4, x1, x2) - -inst_14715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73800001; valaddr_reg:x3; val_offset:44145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44145*FLEN/8, x4, x1, x2) - -inst_14716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73800003; valaddr_reg:x3; val_offset:44148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44148*FLEN/8, x4, x1, x2) - -inst_14717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73800007; valaddr_reg:x3; val_offset:44151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44151*FLEN/8, x4, x1, x2) - -inst_14718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7380000f; valaddr_reg:x3; val_offset:44154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44154*FLEN/8, x4, x1, x2) - -inst_14719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7380001f; valaddr_reg:x3; val_offset:44157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44157*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_116) - -inst_14720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7380003f; valaddr_reg:x3; val_offset:44160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44160*FLEN/8, x4, x1, x2) - -inst_14721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7380007f; valaddr_reg:x3; val_offset:44163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44163*FLEN/8, x4, x1, x2) - -inst_14722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x738000ff; valaddr_reg:x3; val_offset:44166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44166*FLEN/8, x4, x1, x2) - -inst_14723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x738001ff; valaddr_reg:x3; val_offset:44169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44169*FLEN/8, x4, x1, x2) - -inst_14724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x738003ff; valaddr_reg:x3; val_offset:44172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44172*FLEN/8, x4, x1, x2) - -inst_14725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x738007ff; valaddr_reg:x3; val_offset:44175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44175*FLEN/8, x4, x1, x2) - -inst_14726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73800fff; valaddr_reg:x3; val_offset:44178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44178*FLEN/8, x4, x1, x2) - -inst_14727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73801fff; valaddr_reg:x3; val_offset:44181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44181*FLEN/8, x4, x1, x2) - -inst_14728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73803fff; valaddr_reg:x3; val_offset:44184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44184*FLEN/8, x4, x1, x2) - -inst_14729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73807fff; valaddr_reg:x3; val_offset:44187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44187*FLEN/8, x4, x1, x2) - -inst_14730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7380ffff; valaddr_reg:x3; val_offset:44190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44190*FLEN/8, x4, x1, x2) - -inst_14731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7381ffff; valaddr_reg:x3; val_offset:44193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44193*FLEN/8, x4, x1, x2) - -inst_14732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7383ffff; valaddr_reg:x3; val_offset:44196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44196*FLEN/8, x4, x1, x2) - -inst_14733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7387ffff; valaddr_reg:x3; val_offset:44199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44199*FLEN/8, x4, x1, x2) - -inst_14734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x738fffff; valaddr_reg:x3; val_offset:44202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44202*FLEN/8, x4, x1, x2) - -inst_14735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x739fffff; valaddr_reg:x3; val_offset:44205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44205*FLEN/8, x4, x1, x2) - -inst_14736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73bfffff; valaddr_reg:x3; val_offset:44208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44208*FLEN/8, x4, x1, x2) - -inst_14737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73c00000; valaddr_reg:x3; val_offset:44211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44211*FLEN/8, x4, x1, x2) - -inst_14738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73e00000; valaddr_reg:x3; val_offset:44214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44214*FLEN/8, x4, x1, x2) - -inst_14739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73f00000; valaddr_reg:x3; val_offset:44217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44217*FLEN/8, x4, x1, x2) - -inst_14740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73f80000; valaddr_reg:x3; val_offset:44220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44220*FLEN/8, x4, x1, x2) - -inst_14741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fc0000; valaddr_reg:x3; val_offset:44223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44223*FLEN/8, x4, x1, x2) - -inst_14742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fe0000; valaddr_reg:x3; val_offset:44226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44226*FLEN/8, x4, x1, x2) - -inst_14743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ff0000; valaddr_reg:x3; val_offset:44229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44229*FLEN/8, x4, x1, x2) - -inst_14744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ff8000; valaddr_reg:x3; val_offset:44232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44232*FLEN/8, x4, x1, x2) - -inst_14745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ffc000; valaddr_reg:x3; val_offset:44235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44235*FLEN/8, x4, x1, x2) - -inst_14746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ffe000; valaddr_reg:x3; val_offset:44238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44238*FLEN/8, x4, x1, x2) - -inst_14747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fff000; valaddr_reg:x3; val_offset:44241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44241*FLEN/8, x4, x1, x2) - -inst_14748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fff800; valaddr_reg:x3; val_offset:44244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44244*FLEN/8, x4, x1, x2) - -inst_14749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fffc00; valaddr_reg:x3; val_offset:44247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44247*FLEN/8, x4, x1, x2) - -inst_14750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fffe00; valaddr_reg:x3; val_offset:44250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44250*FLEN/8, x4, x1, x2) - -inst_14751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ffff00; valaddr_reg:x3; val_offset:44253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44253*FLEN/8, x4, x1, x2) - -inst_14752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ffff80; valaddr_reg:x3; val_offset:44256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44256*FLEN/8, x4, x1, x2) - -inst_14753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ffffc0; valaddr_reg:x3; val_offset:44259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44259*FLEN/8, x4, x1, x2) - -inst_14754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ffffe0; valaddr_reg:x3; val_offset:44262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44262*FLEN/8, x4, x1, x2) - -inst_14755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fffff0; valaddr_reg:x3; val_offset:44265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44265*FLEN/8, x4, x1, x2) - -inst_14756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fffff8; valaddr_reg:x3; val_offset:44268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44268*FLEN/8, x4, x1, x2) - -inst_14757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fffffc; valaddr_reg:x3; val_offset:44271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44271*FLEN/8, x4, x1, x2) - -inst_14758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73fffffe; valaddr_reg:x3; val_offset:44274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44274*FLEN/8, x4, x1, x2) - -inst_14759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x73ffffff; valaddr_reg:x3; val_offset:44277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44277*FLEN/8, x4, x1, x2) - -inst_14760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f000001; valaddr_reg:x3; val_offset:44280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44280*FLEN/8, x4, x1, x2) - -inst_14761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f000003; valaddr_reg:x3; val_offset:44283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44283*FLEN/8, x4, x1, x2) - -inst_14762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f000007; valaddr_reg:x3; val_offset:44286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44286*FLEN/8, x4, x1, x2) - -inst_14763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f199999; valaddr_reg:x3; val_offset:44289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44289*FLEN/8, x4, x1, x2) - -inst_14764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f249249; valaddr_reg:x3; val_offset:44292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44292*FLEN/8, x4, x1, x2) - -inst_14765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f333333; valaddr_reg:x3; val_offset:44295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44295*FLEN/8, x4, x1, x2) - -inst_14766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:44298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44298*FLEN/8, x4, x1, x2) - -inst_14767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:44301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44301*FLEN/8, x4, x1, x2) - -inst_14768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f444444; valaddr_reg:x3; val_offset:44304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44304*FLEN/8, x4, x1, x2) - -inst_14769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:44307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44307*FLEN/8, x4, x1, x2) - -inst_14770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:44310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44310*FLEN/8, x4, x1, x2) - -inst_14771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f666666; valaddr_reg:x3; val_offset:44313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44313*FLEN/8, x4, x1, x2) - -inst_14772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:44316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44316*FLEN/8, x4, x1, x2) - -inst_14773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:44319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44319*FLEN/8, x4, x1, x2) - -inst_14774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:44322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44322*FLEN/8, x4, x1, x2) - -inst_14775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:44325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44325*FLEN/8, x4, x1, x2) - -inst_14776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:44328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44328*FLEN/8, x4, x1, x2) - -inst_14777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:44331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44331*FLEN/8, x4, x1, x2) - -inst_14778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:44334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44334*FLEN/8, x4, x1, x2) - -inst_14779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:44337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44337*FLEN/8, x4, x1, x2) - -inst_14780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:44340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44340*FLEN/8, x4, x1, x2) - -inst_14781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:44343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44343*FLEN/8, x4, x1, x2) - -inst_14782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:44346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44346*FLEN/8, x4, x1, x2) - -inst_14783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:44349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44349*FLEN/8, x4, x1, x2) - -inst_14784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:44352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44352*FLEN/8, x4, x1, x2) - -inst_14785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:44355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44355*FLEN/8, x4, x1, x2) - -inst_14786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:44358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44358*FLEN/8, x4, x1, x2) - -inst_14787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:44361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44361*FLEN/8, x4, x1, x2) - -inst_14788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:44364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44364*FLEN/8, x4, x1, x2) - -inst_14789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:44367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44367*FLEN/8, x4, x1, x2) - -inst_14790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:44370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44370*FLEN/8, x4, x1, x2) - -inst_14791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:44373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44373*FLEN/8, x4, x1, x2) - -inst_14792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1000000; valaddr_reg:x3; val_offset:44376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44376*FLEN/8, x4, x1, x2) - -inst_14793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1000001; valaddr_reg:x3; val_offset:44379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44379*FLEN/8, x4, x1, x2) - -inst_14794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1000003; valaddr_reg:x3; val_offset:44382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44382*FLEN/8, x4, x1, x2) - -inst_14795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1000007; valaddr_reg:x3; val_offset:44385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44385*FLEN/8, x4, x1, x2) - -inst_14796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd100000f; valaddr_reg:x3; val_offset:44388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44388*FLEN/8, x4, x1, x2) - -inst_14797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd100001f; valaddr_reg:x3; val_offset:44391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44391*FLEN/8, x4, x1, x2) - -inst_14798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd100003f; valaddr_reg:x3; val_offset:44394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44394*FLEN/8, x4, x1, x2) - -inst_14799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd100007f; valaddr_reg:x3; val_offset:44397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44397*FLEN/8, x4, x1, x2) - -inst_14800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd10000ff; valaddr_reg:x3; val_offset:44400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44400*FLEN/8, x4, x1, x2) - -inst_14801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd10001ff; valaddr_reg:x3; val_offset:44403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44403*FLEN/8, x4, x1, x2) - -inst_14802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd10003ff; valaddr_reg:x3; val_offset:44406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44406*FLEN/8, x4, x1, x2) - -inst_14803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd10007ff; valaddr_reg:x3; val_offset:44409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44409*FLEN/8, x4, x1, x2) - -inst_14804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1000fff; valaddr_reg:x3; val_offset:44412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44412*FLEN/8, x4, x1, x2) - -inst_14805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1001fff; valaddr_reg:x3; val_offset:44415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44415*FLEN/8, x4, x1, x2) - -inst_14806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1003fff; valaddr_reg:x3; val_offset:44418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44418*FLEN/8, x4, x1, x2) - -inst_14807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1007fff; valaddr_reg:x3; val_offset:44421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44421*FLEN/8, x4, x1, x2) - -inst_14808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd100ffff; valaddr_reg:x3; val_offset:44424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44424*FLEN/8, x4, x1, x2) - -inst_14809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd101ffff; valaddr_reg:x3; val_offset:44427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44427*FLEN/8, x4, x1, x2) - -inst_14810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd103ffff; valaddr_reg:x3; val_offset:44430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44430*FLEN/8, x4, x1, x2) - -inst_14811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd107ffff; valaddr_reg:x3; val_offset:44433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44433*FLEN/8, x4, x1, x2) - -inst_14812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd10fffff; valaddr_reg:x3; val_offset:44436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44436*FLEN/8, x4, x1, x2) - -inst_14813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd11fffff; valaddr_reg:x3; val_offset:44439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44439*FLEN/8, x4, x1, x2) - -inst_14814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd13fffff; valaddr_reg:x3; val_offset:44442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44442*FLEN/8, x4, x1, x2) - -inst_14815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1400000; valaddr_reg:x3; val_offset:44445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44445*FLEN/8, x4, x1, x2) - -inst_14816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1600000; valaddr_reg:x3; val_offset:44448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44448*FLEN/8, x4, x1, x2) - -inst_14817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1700000; valaddr_reg:x3; val_offset:44451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44451*FLEN/8, x4, x1, x2) - -inst_14818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd1780000; valaddr_reg:x3; val_offset:44454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44454*FLEN/8, x4, x1, x2) - -inst_14819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17c0000; valaddr_reg:x3; val_offset:44457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44457*FLEN/8, x4, x1, x2) - -inst_14820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17e0000; valaddr_reg:x3; val_offset:44460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44460*FLEN/8, x4, x1, x2) - -inst_14821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17f0000; valaddr_reg:x3; val_offset:44463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44463*FLEN/8, x4, x1, x2) - -inst_14822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17f8000; valaddr_reg:x3; val_offset:44466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44466*FLEN/8, x4, x1, x2) - -inst_14823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17fc000; valaddr_reg:x3; val_offset:44469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44469*FLEN/8, x4, x1, x2) - -inst_14824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17fe000; valaddr_reg:x3; val_offset:44472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44472*FLEN/8, x4, x1, x2) - -inst_14825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17ff000; valaddr_reg:x3; val_offset:44475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44475*FLEN/8, x4, x1, x2) - -inst_14826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17ff800; valaddr_reg:x3; val_offset:44478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44478*FLEN/8, x4, x1, x2) - -inst_14827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17ffc00; valaddr_reg:x3; val_offset:44481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44481*FLEN/8, x4, x1, x2) - -inst_14828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17ffe00; valaddr_reg:x3; val_offset:44484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44484*FLEN/8, x4, x1, x2) - -inst_14829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17fff00; valaddr_reg:x3; val_offset:44487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44487*FLEN/8, x4, x1, x2) - -inst_14830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17fff80; valaddr_reg:x3; val_offset:44490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44490*FLEN/8, x4, x1, x2) - -inst_14831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17fffc0; valaddr_reg:x3; val_offset:44493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44493*FLEN/8, x4, x1, x2) - -inst_14832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17fffe0; valaddr_reg:x3; val_offset:44496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44496*FLEN/8, x4, x1, x2) - -inst_14833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17ffff0; valaddr_reg:x3; val_offset:44499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44499*FLEN/8, x4, x1, x2) - -inst_14834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17ffff8; valaddr_reg:x3; val_offset:44502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44502*FLEN/8, x4, x1, x2) - -inst_14835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17ffffc; valaddr_reg:x3; val_offset:44505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44505*FLEN/8, x4, x1, x2) - -inst_14836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17ffffe; valaddr_reg:x3; val_offset:44508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44508*FLEN/8, x4, x1, x2) - -inst_14837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; -op3val:0xd17fffff; valaddr_reg:x3; val_offset:44511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44511*FLEN/8, x4, x1, x2) - -inst_14838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:44514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44514*FLEN/8, x4, x1, x2) - -inst_14839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:44517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44517*FLEN/8, x4, x1, x2) - -inst_14840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:44520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44520*FLEN/8, x4, x1, x2) - -inst_14841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:44523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44523*FLEN/8, x4, x1, x2) - -inst_14842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:44526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44526*FLEN/8, x4, x1, x2) - -inst_14843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:44529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44529*FLEN/8, x4, x1, x2) - -inst_14844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:44532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44532*FLEN/8, x4, x1, x2) - -inst_14845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:44535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44535*FLEN/8, x4, x1, x2) - -inst_14846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:44538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44538*FLEN/8, x4, x1, x2) - -inst_14847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:44541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44541*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_117) - -inst_14848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:44544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44544*FLEN/8, x4, x1, x2) - -inst_14849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:44547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44547*FLEN/8, x4, x1, x2) - -inst_14850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:44550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44550*FLEN/8, x4, x1, x2) - -inst_14851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:44553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44553*FLEN/8, x4, x1, x2) - -inst_14852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:44556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44556*FLEN/8, x4, x1, x2) - -inst_14853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:44559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44559*FLEN/8, x4, x1, x2) - -inst_14854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa000000; valaddr_reg:x3; val_offset:44562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44562*FLEN/8, x4, x1, x2) - -inst_14855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa000001; valaddr_reg:x3; val_offset:44565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44565*FLEN/8, x4, x1, x2) - -inst_14856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa000003; valaddr_reg:x3; val_offset:44568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44568*FLEN/8, x4, x1, x2) - -inst_14857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa000007; valaddr_reg:x3; val_offset:44571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44571*FLEN/8, x4, x1, x2) - -inst_14858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa00000f; valaddr_reg:x3; val_offset:44574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44574*FLEN/8, x4, x1, x2) - -inst_14859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa00001f; valaddr_reg:x3; val_offset:44577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44577*FLEN/8, x4, x1, x2) - -inst_14860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa00003f; valaddr_reg:x3; val_offset:44580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44580*FLEN/8, x4, x1, x2) - -inst_14861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa00007f; valaddr_reg:x3; val_offset:44583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44583*FLEN/8, x4, x1, x2) - -inst_14862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa0000ff; valaddr_reg:x3; val_offset:44586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44586*FLEN/8, x4, x1, x2) - -inst_14863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa0001ff; valaddr_reg:x3; val_offset:44589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44589*FLEN/8, x4, x1, x2) - -inst_14864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa0003ff; valaddr_reg:x3; val_offset:44592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44592*FLEN/8, x4, x1, x2) - -inst_14865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa0007ff; valaddr_reg:x3; val_offset:44595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44595*FLEN/8, x4, x1, x2) - -inst_14866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa000fff; valaddr_reg:x3; val_offset:44598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44598*FLEN/8, x4, x1, x2) - -inst_14867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa001fff; valaddr_reg:x3; val_offset:44601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44601*FLEN/8, x4, x1, x2) - -inst_14868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa003fff; valaddr_reg:x3; val_offset:44604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44604*FLEN/8, x4, x1, x2) - -inst_14869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa007fff; valaddr_reg:x3; val_offset:44607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44607*FLEN/8, x4, x1, x2) - -inst_14870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa00ffff; valaddr_reg:x3; val_offset:44610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44610*FLEN/8, x4, x1, x2) - -inst_14871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa01ffff; valaddr_reg:x3; val_offset:44613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44613*FLEN/8, x4, x1, x2) - -inst_14872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa03ffff; valaddr_reg:x3; val_offset:44616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44616*FLEN/8, x4, x1, x2) - -inst_14873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa07ffff; valaddr_reg:x3; val_offset:44619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44619*FLEN/8, x4, x1, x2) - -inst_14874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa0fffff; valaddr_reg:x3; val_offset:44622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44622*FLEN/8, x4, x1, x2) - -inst_14875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa1fffff; valaddr_reg:x3; val_offset:44625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44625*FLEN/8, x4, x1, x2) - -inst_14876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa3fffff; valaddr_reg:x3; val_offset:44628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44628*FLEN/8, x4, x1, x2) - -inst_14877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa400000; valaddr_reg:x3; val_offset:44631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44631*FLEN/8, x4, x1, x2) - -inst_14878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa600000; valaddr_reg:x3; val_offset:44634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44634*FLEN/8, x4, x1, x2) - -inst_14879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa700000; valaddr_reg:x3; val_offset:44637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44637*FLEN/8, x4, x1, x2) - -inst_14880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa780000; valaddr_reg:x3; val_offset:44640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44640*FLEN/8, x4, x1, x2) - -inst_14881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7c0000; valaddr_reg:x3; val_offset:44643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44643*FLEN/8, x4, x1, x2) - -inst_14882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7e0000; valaddr_reg:x3; val_offset:44646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44646*FLEN/8, x4, x1, x2) - -inst_14883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7f0000; valaddr_reg:x3; val_offset:44649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44649*FLEN/8, x4, x1, x2) - -inst_14884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7f8000; valaddr_reg:x3; val_offset:44652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44652*FLEN/8, x4, x1, x2) - -inst_14885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7fc000; valaddr_reg:x3; val_offset:44655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44655*FLEN/8, x4, x1, x2) - -inst_14886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7fe000; valaddr_reg:x3; val_offset:44658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44658*FLEN/8, x4, x1, x2) - -inst_14887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7ff000; valaddr_reg:x3; val_offset:44661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44661*FLEN/8, x4, x1, x2) - -inst_14888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7ff800; valaddr_reg:x3; val_offset:44664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44664*FLEN/8, x4, x1, x2) - -inst_14889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7ffc00; valaddr_reg:x3; val_offset:44667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44667*FLEN/8, x4, x1, x2) - -inst_14890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7ffe00; valaddr_reg:x3; val_offset:44670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44670*FLEN/8, x4, x1, x2) - -inst_14891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7fff00; valaddr_reg:x3; val_offset:44673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44673*FLEN/8, x4, x1, x2) - -inst_14892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7fff80; valaddr_reg:x3; val_offset:44676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44676*FLEN/8, x4, x1, x2) - -inst_14893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7fffc0; valaddr_reg:x3; val_offset:44679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44679*FLEN/8, x4, x1, x2) - -inst_14894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7fffe0; valaddr_reg:x3; val_offset:44682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44682*FLEN/8, x4, x1, x2) - -inst_14895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7ffff0; valaddr_reg:x3; val_offset:44685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44685*FLEN/8, x4, x1, x2) - -inst_14896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7ffff8; valaddr_reg:x3; val_offset:44688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44688*FLEN/8, x4, x1, x2) - -inst_14897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7ffffc; valaddr_reg:x3; val_offset:44691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44691*FLEN/8, x4, x1, x2) - -inst_14898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7ffffe; valaddr_reg:x3; val_offset:44694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44694*FLEN/8, x4, x1, x2) - -inst_14899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; -op3val:0xa7fffff; valaddr_reg:x3; val_offset:44697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44697*FLEN/8, x4, x1, x2) - -inst_14900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:44700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44700*FLEN/8, x4, x1, x2) - -inst_14901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:44703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44703*FLEN/8, x4, x1, x2) - -inst_14902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:44706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44706*FLEN/8, x4, x1, x2) - -inst_14903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:44709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44709*FLEN/8, x4, x1, x2) - -inst_14904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:44712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44712*FLEN/8, x4, x1, x2) - -inst_14905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:44715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44715*FLEN/8, x4, x1, x2) - -inst_14906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:44718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44718*FLEN/8, x4, x1, x2) - -inst_14907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:44721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44721*FLEN/8, x4, x1, x2) - -inst_14908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:44724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44724*FLEN/8, x4, x1, x2) - -inst_14909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:44727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44727*FLEN/8, x4, x1, x2) - -inst_14910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:44730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44730*FLEN/8, x4, x1, x2) - -inst_14911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:44733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44733*FLEN/8, x4, x1, x2) - -inst_14912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:44736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44736*FLEN/8, x4, x1, x2) - -inst_14913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:44739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44739*FLEN/8, x4, x1, x2) - -inst_14914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:44742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44742*FLEN/8, x4, x1, x2) - -inst_14915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:44745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44745*FLEN/8, x4, x1, x2) - -inst_14916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e800000; valaddr_reg:x3; val_offset:44748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44748*FLEN/8, x4, x1, x2) - -inst_14917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e800001; valaddr_reg:x3; val_offset:44751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44751*FLEN/8, x4, x1, x2) - -inst_14918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e800003; valaddr_reg:x3; val_offset:44754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44754*FLEN/8, x4, x1, x2) - -inst_14919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e800007; valaddr_reg:x3; val_offset:44757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44757*FLEN/8, x4, x1, x2) - -inst_14920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e80000f; valaddr_reg:x3; val_offset:44760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44760*FLEN/8, x4, x1, x2) - -inst_14921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e80001f; valaddr_reg:x3; val_offset:44763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44763*FLEN/8, x4, x1, x2) - -inst_14922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e80003f; valaddr_reg:x3; val_offset:44766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44766*FLEN/8, x4, x1, x2) - -inst_14923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e80007f; valaddr_reg:x3; val_offset:44769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44769*FLEN/8, x4, x1, x2) - -inst_14924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e8000ff; valaddr_reg:x3; val_offset:44772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44772*FLEN/8, x4, x1, x2) - -inst_14925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e8001ff; valaddr_reg:x3; val_offset:44775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44775*FLEN/8, x4, x1, x2) - -inst_14926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e8003ff; valaddr_reg:x3; val_offset:44778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44778*FLEN/8, x4, x1, x2) - -inst_14927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e8007ff; valaddr_reg:x3; val_offset:44781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44781*FLEN/8, x4, x1, x2) - -inst_14928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e800fff; valaddr_reg:x3; val_offset:44784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44784*FLEN/8, x4, x1, x2) - -inst_14929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e801fff; valaddr_reg:x3; val_offset:44787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44787*FLEN/8, x4, x1, x2) - -inst_14930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e803fff; valaddr_reg:x3; val_offset:44790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44790*FLEN/8, x4, x1, x2) - -inst_14931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e807fff; valaddr_reg:x3; val_offset:44793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44793*FLEN/8, x4, x1, x2) - -inst_14932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e80ffff; valaddr_reg:x3; val_offset:44796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44796*FLEN/8, x4, x1, x2) - -inst_14933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e81ffff; valaddr_reg:x3; val_offset:44799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44799*FLEN/8, x4, x1, x2) - -inst_14934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e83ffff; valaddr_reg:x3; val_offset:44802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44802*FLEN/8, x4, x1, x2) - -inst_14935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e87ffff; valaddr_reg:x3; val_offset:44805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44805*FLEN/8, x4, x1, x2) - -inst_14936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e8fffff; valaddr_reg:x3; val_offset:44808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44808*FLEN/8, x4, x1, x2) - -inst_14937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8e9fffff; valaddr_reg:x3; val_offset:44811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44811*FLEN/8, x4, x1, x2) - -inst_14938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8ebfffff; valaddr_reg:x3; val_offset:44814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44814*FLEN/8, x4, x1, x2) - -inst_14939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8ec00000; valaddr_reg:x3; val_offset:44817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44817*FLEN/8, x4, x1, x2) - -inst_14940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8ee00000; valaddr_reg:x3; val_offset:44820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44820*FLEN/8, x4, x1, x2) - -inst_14941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8ef00000; valaddr_reg:x3; val_offset:44823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44823*FLEN/8, x4, x1, x2) - -inst_14942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8ef80000; valaddr_reg:x3; val_offset:44826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44826*FLEN/8, x4, x1, x2) - -inst_14943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efc0000; valaddr_reg:x3; val_offset:44829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44829*FLEN/8, x4, x1, x2) - -inst_14944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efe0000; valaddr_reg:x3; val_offset:44832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44832*FLEN/8, x4, x1, x2) - -inst_14945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8eff0000; valaddr_reg:x3; val_offset:44835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44835*FLEN/8, x4, x1, x2) - -inst_14946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8eff8000; valaddr_reg:x3; val_offset:44838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44838*FLEN/8, x4, x1, x2) - -inst_14947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8effc000; valaddr_reg:x3; val_offset:44841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44841*FLEN/8, x4, x1, x2) - -inst_14948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8effe000; valaddr_reg:x3; val_offset:44844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44844*FLEN/8, x4, x1, x2) - -inst_14949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efff000; valaddr_reg:x3; val_offset:44847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44847*FLEN/8, x4, x1, x2) - -inst_14950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efff800; valaddr_reg:x3; val_offset:44850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44850*FLEN/8, x4, x1, x2) - -inst_14951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efffc00; valaddr_reg:x3; val_offset:44853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44853*FLEN/8, x4, x1, x2) - -inst_14952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efffe00; valaddr_reg:x3; val_offset:44856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44856*FLEN/8, x4, x1, x2) - -inst_14953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8effff00; valaddr_reg:x3; val_offset:44859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44859*FLEN/8, x4, x1, x2) - -inst_14954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8effff80; valaddr_reg:x3; val_offset:44862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44862*FLEN/8, x4, x1, x2) - -inst_14955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8effffc0; valaddr_reg:x3; val_offset:44865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44865*FLEN/8, x4, x1, x2) - -inst_14956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8effffe0; valaddr_reg:x3; val_offset:44868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44868*FLEN/8, x4, x1, x2) - -inst_14957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efffff0; valaddr_reg:x3; val_offset:44871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44871*FLEN/8, x4, x1, x2) - -inst_14958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efffff8; valaddr_reg:x3; val_offset:44874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44874*FLEN/8, x4, x1, x2) - -inst_14959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efffffc; valaddr_reg:x3; val_offset:44877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44877*FLEN/8, x4, x1, x2) - -inst_14960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8efffffe; valaddr_reg:x3; val_offset:44880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44880*FLEN/8, x4, x1, x2) - -inst_14961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; -op3val:0x8effffff; valaddr_reg:x3; val_offset:44883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44883*FLEN/8, x4, x1, x2) - -inst_14962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:44886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44886*FLEN/8, x4, x1, x2) - -inst_14963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:44889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44889*FLEN/8, x4, x1, x2) - -inst_14964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:44892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44892*FLEN/8, x4, x1, x2) - -inst_14965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:44895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44895*FLEN/8, x4, x1, x2) - -inst_14966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:44898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44898*FLEN/8, x4, x1, x2) - -inst_14967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:44901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44901*FLEN/8, x4, x1, x2) - -inst_14968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:44904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44904*FLEN/8, x4, x1, x2) - -inst_14969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:44907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44907*FLEN/8, x4, x1, x2) - -inst_14970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:44910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44910*FLEN/8, x4, x1, x2) - -inst_14971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:44913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44913*FLEN/8, x4, x1, x2) - -inst_14972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:44916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44916*FLEN/8, x4, x1, x2) - -inst_14973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:44919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44919*FLEN/8, x4, x1, x2) - -inst_14974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:44922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44922*FLEN/8, x4, x1, x2) - -inst_14975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:44925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44925*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_118) - -inst_14976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:44928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44928*FLEN/8, x4, x1, x2) - -inst_14977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:44931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44931*FLEN/8, x4, x1, x2) - -inst_14978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e000000; valaddr_reg:x3; val_offset:44934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44934*FLEN/8, x4, x1, x2) - -inst_14979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e000001; valaddr_reg:x3; val_offset:44937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44937*FLEN/8, x4, x1, x2) - -inst_14980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e000003; valaddr_reg:x3; val_offset:44940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44940*FLEN/8, x4, x1, x2) - -inst_14981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e000007; valaddr_reg:x3; val_offset:44943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44943*FLEN/8, x4, x1, x2) - -inst_14982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e00000f; valaddr_reg:x3; val_offset:44946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44946*FLEN/8, x4, x1, x2) - -inst_14983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e00001f; valaddr_reg:x3; val_offset:44949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44949*FLEN/8, x4, x1, x2) - -inst_14984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e00003f; valaddr_reg:x3; val_offset:44952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44952*FLEN/8, x4, x1, x2) - -inst_14985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e00007f; valaddr_reg:x3; val_offset:44955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44955*FLEN/8, x4, x1, x2) - -inst_14986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e0000ff; valaddr_reg:x3; val_offset:44958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44958*FLEN/8, x4, x1, x2) - -inst_14987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e0001ff; valaddr_reg:x3; val_offset:44961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44961*FLEN/8, x4, x1, x2) - -inst_14988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e0003ff; valaddr_reg:x3; val_offset:44964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44964*FLEN/8, x4, x1, x2) - -inst_14989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e0007ff; valaddr_reg:x3; val_offset:44967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44967*FLEN/8, x4, x1, x2) - -inst_14990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e000fff; valaddr_reg:x3; val_offset:44970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44970*FLEN/8, x4, x1, x2) - -inst_14991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e001fff; valaddr_reg:x3; val_offset:44973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44973*FLEN/8, x4, x1, x2) - -inst_14992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e003fff; valaddr_reg:x3; val_offset:44976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44976*FLEN/8, x4, x1, x2) - -inst_14993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e007fff; valaddr_reg:x3; val_offset:44979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44979*FLEN/8, x4, x1, x2) - -inst_14994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e00ffff; valaddr_reg:x3; val_offset:44982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44982*FLEN/8, x4, x1, x2) - -inst_14995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e01ffff; valaddr_reg:x3; val_offset:44985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44985*FLEN/8, x4, x1, x2) - -inst_14996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e03ffff; valaddr_reg:x3; val_offset:44988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44988*FLEN/8, x4, x1, x2) - -inst_14997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e07ffff; valaddr_reg:x3; val_offset:44991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44991*FLEN/8, x4, x1, x2) - -inst_14998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e0fffff; valaddr_reg:x3; val_offset:44994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44994*FLEN/8, x4, x1, x2) - -inst_14999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e1fffff; valaddr_reg:x3; val_offset:44997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44997*FLEN/8, x4, x1, x2) - -inst_15000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e3fffff; valaddr_reg:x3; val_offset:45000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45000*FLEN/8, x4, x1, x2) - -inst_15001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e400000; valaddr_reg:x3; val_offset:45003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45003*FLEN/8, x4, x1, x2) - -inst_15002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e600000; valaddr_reg:x3; val_offset:45006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45006*FLEN/8, x4, x1, x2) - -inst_15003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e700000; valaddr_reg:x3; val_offset:45009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45009*FLEN/8, x4, x1, x2) - -inst_15004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e780000; valaddr_reg:x3; val_offset:45012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45012*FLEN/8, x4, x1, x2) - -inst_15005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7c0000; valaddr_reg:x3; val_offset:45015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45015*FLEN/8, x4, x1, x2) - -inst_15006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7e0000; valaddr_reg:x3; val_offset:45018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45018*FLEN/8, x4, x1, x2) - -inst_15007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7f0000; valaddr_reg:x3; val_offset:45021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45021*FLEN/8, x4, x1, x2) - -inst_15008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7f8000; valaddr_reg:x3; val_offset:45024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45024*FLEN/8, x4, x1, x2) - -inst_15009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7fc000; valaddr_reg:x3; val_offset:45027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45027*FLEN/8, x4, x1, x2) - -inst_15010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7fe000; valaddr_reg:x3; val_offset:45030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45030*FLEN/8, x4, x1, x2) - -inst_15011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7ff000; valaddr_reg:x3; val_offset:45033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45033*FLEN/8, x4, x1, x2) - -inst_15012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7ff800; valaddr_reg:x3; val_offset:45036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45036*FLEN/8, x4, x1, x2) - -inst_15013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:45039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45039*FLEN/8, x4, x1, x2) - -inst_15014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:45042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45042*FLEN/8, x4, x1, x2) - -inst_15015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7fff00; valaddr_reg:x3; val_offset:45045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45045*FLEN/8, x4, x1, x2) - -inst_15016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7fff80; valaddr_reg:x3; val_offset:45048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45048*FLEN/8, x4, x1, x2) - -inst_15017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:45051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45051*FLEN/8, x4, x1, x2) - -inst_15018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:45054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45054*FLEN/8, x4, x1, x2) - -inst_15019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:45057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45057*FLEN/8, x4, x1, x2) - -inst_15020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:45060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45060*FLEN/8, x4, x1, x2) - -inst_15021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:45063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45063*FLEN/8, x4, x1, x2) - -inst_15022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:45066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45066*FLEN/8, x4, x1, x2) - -inst_15023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; -op3val:0x8e7fffff; valaddr_reg:x3; val_offset:45069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45069*FLEN/8, x4, x1, x2) - -inst_15024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:45072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45072*FLEN/8, x4, x1, x2) - -inst_15025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:45075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45075*FLEN/8, x4, x1, x2) - -inst_15026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:45078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45078*FLEN/8, x4, x1, x2) - -inst_15027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:45081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45081*FLEN/8, x4, x1, x2) - -inst_15028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:45084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45084*FLEN/8, x4, x1, x2) - -inst_15029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:45087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45087*FLEN/8, x4, x1, x2) - -inst_15030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:45090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45090*FLEN/8, x4, x1, x2) - -inst_15031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:45093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45093*FLEN/8, x4, x1, x2) - -inst_15032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:45096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45096*FLEN/8, x4, x1, x2) - -inst_15033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:45099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45099*FLEN/8, x4, x1, x2) - -inst_15034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:45102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45102*FLEN/8, x4, x1, x2) - -inst_15035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:45105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45105*FLEN/8, x4, x1, x2) - -inst_15036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:45108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45108*FLEN/8, x4, x1, x2) - -inst_15037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:45111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45111*FLEN/8, x4, x1, x2) - -inst_15038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:45114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45114*FLEN/8, x4, x1, x2) - -inst_15039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:45117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45117*FLEN/8, x4, x1, x2) - -inst_15040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e800000; valaddr_reg:x3; val_offset:45120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45120*FLEN/8, x4, x1, x2) - -inst_15041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e800001; valaddr_reg:x3; val_offset:45123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45123*FLEN/8, x4, x1, x2) - -inst_15042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e800003; valaddr_reg:x3; val_offset:45126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45126*FLEN/8, x4, x1, x2) - -inst_15043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e800007; valaddr_reg:x3; val_offset:45129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45129*FLEN/8, x4, x1, x2) - -inst_15044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e80000f; valaddr_reg:x3; val_offset:45132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45132*FLEN/8, x4, x1, x2) - -inst_15045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e80001f; valaddr_reg:x3; val_offset:45135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45135*FLEN/8, x4, x1, x2) - -inst_15046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e80003f; valaddr_reg:x3; val_offset:45138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45138*FLEN/8, x4, x1, x2) - -inst_15047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e80007f; valaddr_reg:x3; val_offset:45141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45141*FLEN/8, x4, x1, x2) - -inst_15048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e8000ff; valaddr_reg:x3; val_offset:45144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45144*FLEN/8, x4, x1, x2) - -inst_15049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e8001ff; valaddr_reg:x3; val_offset:45147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45147*FLEN/8, x4, x1, x2) - -inst_15050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e8003ff; valaddr_reg:x3; val_offset:45150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45150*FLEN/8, x4, x1, x2) - -inst_15051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e8007ff; valaddr_reg:x3; val_offset:45153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45153*FLEN/8, x4, x1, x2) - -inst_15052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e800fff; valaddr_reg:x3; val_offset:45156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45156*FLEN/8, x4, x1, x2) - -inst_15053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e801fff; valaddr_reg:x3; val_offset:45159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45159*FLEN/8, x4, x1, x2) - -inst_15054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e803fff; valaddr_reg:x3; val_offset:45162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45162*FLEN/8, x4, x1, x2) - -inst_15055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e807fff; valaddr_reg:x3; val_offset:45165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45165*FLEN/8, x4, x1, x2) - -inst_15056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e80ffff; valaddr_reg:x3; val_offset:45168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45168*FLEN/8, x4, x1, x2) - -inst_15057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e81ffff; valaddr_reg:x3; val_offset:45171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45171*FLEN/8, x4, x1, x2) - -inst_15058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e83ffff; valaddr_reg:x3; val_offset:45174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45174*FLEN/8, x4, x1, x2) - -inst_15059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e87ffff; valaddr_reg:x3; val_offset:45177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45177*FLEN/8, x4, x1, x2) - -inst_15060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e8fffff; valaddr_reg:x3; val_offset:45180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45180*FLEN/8, x4, x1, x2) - -inst_15061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8e9fffff; valaddr_reg:x3; val_offset:45183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45183*FLEN/8, x4, x1, x2) - -inst_15062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8ebfffff; valaddr_reg:x3; val_offset:45186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45186*FLEN/8, x4, x1, x2) - -inst_15063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8ec00000; valaddr_reg:x3; val_offset:45189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45189*FLEN/8, x4, x1, x2) - -inst_15064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8ee00000; valaddr_reg:x3; val_offset:45192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45192*FLEN/8, x4, x1, x2) - -inst_15065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8ef00000; valaddr_reg:x3; val_offset:45195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45195*FLEN/8, x4, x1, x2) - -inst_15066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8ef80000; valaddr_reg:x3; val_offset:45198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45198*FLEN/8, x4, x1, x2) - -inst_15067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efc0000; valaddr_reg:x3; val_offset:45201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45201*FLEN/8, x4, x1, x2) - -inst_15068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efe0000; valaddr_reg:x3; val_offset:45204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45204*FLEN/8, x4, x1, x2) - -inst_15069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8eff0000; valaddr_reg:x3; val_offset:45207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45207*FLEN/8, x4, x1, x2) - -inst_15070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8eff8000; valaddr_reg:x3; val_offset:45210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45210*FLEN/8, x4, x1, x2) - -inst_15071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8effc000; valaddr_reg:x3; val_offset:45213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45213*FLEN/8, x4, x1, x2) - -inst_15072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8effe000; valaddr_reg:x3; val_offset:45216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45216*FLEN/8, x4, x1, x2) - -inst_15073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efff000; valaddr_reg:x3; val_offset:45219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45219*FLEN/8, x4, x1, x2) - -inst_15074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efff800; valaddr_reg:x3; val_offset:45222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45222*FLEN/8, x4, x1, x2) - -inst_15075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efffc00; valaddr_reg:x3; val_offset:45225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45225*FLEN/8, x4, x1, x2) - -inst_15076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efffe00; valaddr_reg:x3; val_offset:45228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45228*FLEN/8, x4, x1, x2) - -inst_15077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8effff00; valaddr_reg:x3; val_offset:45231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45231*FLEN/8, x4, x1, x2) - -inst_15078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8effff80; valaddr_reg:x3; val_offset:45234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45234*FLEN/8, x4, x1, x2) - -inst_15079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8effffc0; valaddr_reg:x3; val_offset:45237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45237*FLEN/8, x4, x1, x2) - -inst_15080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8effffe0; valaddr_reg:x3; val_offset:45240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45240*FLEN/8, x4, x1, x2) - -inst_15081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efffff0; valaddr_reg:x3; val_offset:45243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45243*FLEN/8, x4, x1, x2) - -inst_15082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efffff8; valaddr_reg:x3; val_offset:45246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45246*FLEN/8, x4, x1, x2) - -inst_15083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efffffc; valaddr_reg:x3; val_offset:45249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45249*FLEN/8, x4, x1, x2) - -inst_15084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8efffffe; valaddr_reg:x3; val_offset:45252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45252*FLEN/8, x4, x1, x2) - -inst_15085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; -op3val:0x8effffff; valaddr_reg:x3; val_offset:45255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45255*FLEN/8, x4, x1, x2) - -inst_15086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:45258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45258*FLEN/8, x4, x1, x2) - -inst_15087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:45261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45261*FLEN/8, x4, x1, x2) - -inst_15088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:45264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45264*FLEN/8, x4, x1, x2) - -inst_15089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:45267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45267*FLEN/8, x4, x1, x2) - -inst_15090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:45270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45270*FLEN/8, x4, x1, x2) - -inst_15091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:45273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45273*FLEN/8, x4, x1, x2) - -inst_15092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:45276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45276*FLEN/8, x4, x1, x2) - -inst_15093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:45279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45279*FLEN/8, x4, x1, x2) - -inst_15094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:45282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45282*FLEN/8, x4, x1, x2) - -inst_15095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:45285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45285*FLEN/8, x4, x1, x2) - -inst_15096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:45288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45288*FLEN/8, x4, x1, x2) - -inst_15097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:45291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45291*FLEN/8, x4, x1, x2) - -inst_15098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:45294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45294*FLEN/8, x4, x1, x2) - -inst_15099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:45297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45297*FLEN/8, x4, x1, x2) - -inst_15100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:45300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45300*FLEN/8, x4, x1, x2) - -inst_15101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:45303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45303*FLEN/8, x4, x1, x2) - -inst_15102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5000000; valaddr_reg:x3; val_offset:45306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45306*FLEN/8, x4, x1, x2) - -inst_15103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5000001; valaddr_reg:x3; val_offset:45309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45309*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_119) - -inst_15104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5000003; valaddr_reg:x3; val_offset:45312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45312*FLEN/8, x4, x1, x2) - -inst_15105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5000007; valaddr_reg:x3; val_offset:45315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45315*FLEN/8, x4, x1, x2) - -inst_15106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x500000f; valaddr_reg:x3; val_offset:45318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45318*FLEN/8, x4, x1, x2) - -inst_15107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x500001f; valaddr_reg:x3; val_offset:45321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45321*FLEN/8, x4, x1, x2) - -inst_15108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x500003f; valaddr_reg:x3; val_offset:45324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45324*FLEN/8, x4, x1, x2) - -inst_15109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x500007f; valaddr_reg:x3; val_offset:45327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45327*FLEN/8, x4, x1, x2) - -inst_15110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x50000ff; valaddr_reg:x3; val_offset:45330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45330*FLEN/8, x4, x1, x2) - -inst_15111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x50001ff; valaddr_reg:x3; val_offset:45333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45333*FLEN/8, x4, x1, x2) - -inst_15112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x50003ff; valaddr_reg:x3; val_offset:45336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45336*FLEN/8, x4, x1, x2) - -inst_15113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x50007ff; valaddr_reg:x3; val_offset:45339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45339*FLEN/8, x4, x1, x2) - -inst_15114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5000fff; valaddr_reg:x3; val_offset:45342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45342*FLEN/8, x4, x1, x2) - -inst_15115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5001fff; valaddr_reg:x3; val_offset:45345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45345*FLEN/8, x4, x1, x2) - -inst_15116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5003fff; valaddr_reg:x3; val_offset:45348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45348*FLEN/8, x4, x1, x2) - -inst_15117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5007fff; valaddr_reg:x3; val_offset:45351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45351*FLEN/8, x4, x1, x2) - -inst_15118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x500ffff; valaddr_reg:x3; val_offset:45354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45354*FLEN/8, x4, x1, x2) - -inst_15119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x501ffff; valaddr_reg:x3; val_offset:45357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45357*FLEN/8, x4, x1, x2) - -inst_15120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x503ffff; valaddr_reg:x3; val_offset:45360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45360*FLEN/8, x4, x1, x2) - -inst_15121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x507ffff; valaddr_reg:x3; val_offset:45363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45363*FLEN/8, x4, x1, x2) - -inst_15122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x50fffff; valaddr_reg:x3; val_offset:45366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45366*FLEN/8, x4, x1, x2) - -inst_15123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x51fffff; valaddr_reg:x3; val_offset:45369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45369*FLEN/8, x4, x1, x2) - -inst_15124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x53fffff; valaddr_reg:x3; val_offset:45372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45372*FLEN/8, x4, x1, x2) - -inst_15125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5400000; valaddr_reg:x3; val_offset:45375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45375*FLEN/8, x4, x1, x2) - -inst_15126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5600000; valaddr_reg:x3; val_offset:45378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45378*FLEN/8, x4, x1, x2) - -inst_15127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5700000; valaddr_reg:x3; val_offset:45381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45381*FLEN/8, x4, x1, x2) - -inst_15128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x5780000; valaddr_reg:x3; val_offset:45384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45384*FLEN/8, x4, x1, x2) - -inst_15129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57c0000; valaddr_reg:x3; val_offset:45387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45387*FLEN/8, x4, x1, x2) - -inst_15130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57e0000; valaddr_reg:x3; val_offset:45390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45390*FLEN/8, x4, x1, x2) - -inst_15131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57f0000; valaddr_reg:x3; val_offset:45393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45393*FLEN/8, x4, x1, x2) - -inst_15132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57f8000; valaddr_reg:x3; val_offset:45396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45396*FLEN/8, x4, x1, x2) - -inst_15133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57fc000; valaddr_reg:x3; val_offset:45399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45399*FLEN/8, x4, x1, x2) - -inst_15134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57fe000; valaddr_reg:x3; val_offset:45402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45402*FLEN/8, x4, x1, x2) - -inst_15135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57ff000; valaddr_reg:x3; val_offset:45405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45405*FLEN/8, x4, x1, x2) - -inst_15136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57ff800; valaddr_reg:x3; val_offset:45408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45408*FLEN/8, x4, x1, x2) - -inst_15137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57ffc00; valaddr_reg:x3; val_offset:45411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45411*FLEN/8, x4, x1, x2) - -inst_15138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57ffe00; valaddr_reg:x3; val_offset:45414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45414*FLEN/8, x4, x1, x2) - -inst_15139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57fff00; valaddr_reg:x3; val_offset:45417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45417*FLEN/8, x4, x1, x2) - -inst_15140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57fff80; valaddr_reg:x3; val_offset:45420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45420*FLEN/8, x4, x1, x2) - -inst_15141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57fffc0; valaddr_reg:x3; val_offset:45423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45423*FLEN/8, x4, x1, x2) - -inst_15142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57fffe0; valaddr_reg:x3; val_offset:45426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45426*FLEN/8, x4, x1, x2) - -inst_15143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57ffff0; valaddr_reg:x3; val_offset:45429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45429*FLEN/8, x4, x1, x2) - -inst_15144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57ffff8; valaddr_reg:x3; val_offset:45432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45432*FLEN/8, x4, x1, x2) - -inst_15145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57ffffc; valaddr_reg:x3; val_offset:45435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45435*FLEN/8, x4, x1, x2) - -inst_15146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57ffffe; valaddr_reg:x3; val_offset:45438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45438*FLEN/8, x4, x1, x2) - -inst_15147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; -op3val:0x57fffff; valaddr_reg:x3; val_offset:45441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45441*FLEN/8, x4, x1, x2) - -inst_15148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3f800001; valaddr_reg:x3; val_offset:45444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45444*FLEN/8, x4, x1, x2) - -inst_15149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3f800003; valaddr_reg:x3; val_offset:45447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45447*FLEN/8, x4, x1, x2) - -inst_15150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3f800007; valaddr_reg:x3; val_offset:45450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45450*FLEN/8, x4, x1, x2) - -inst_15151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3f999999; valaddr_reg:x3; val_offset:45453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45453*FLEN/8, x4, x1, x2) - -inst_15152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:45456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45456*FLEN/8, x4, x1, x2) - -inst_15153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:45459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45459*FLEN/8, x4, x1, x2) - -inst_15154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:45462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45462*FLEN/8, x4, x1, x2) - -inst_15155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:45465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45465*FLEN/8, x4, x1, x2) - -inst_15156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:45468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45468*FLEN/8, x4, x1, x2) - -inst_15157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:45471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45471*FLEN/8, x4, x1, x2) - -inst_15158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:45474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45474*FLEN/8, x4, x1, x2) - -inst_15159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:45477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45477*FLEN/8, x4, x1, x2) - -inst_15160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:45480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45480*FLEN/8, x4, x1, x2) - -inst_15161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:45483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45483*FLEN/8, x4, x1, x2) - -inst_15162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:45486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45486*FLEN/8, x4, x1, x2) - -inst_15163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:45489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45489*FLEN/8, x4, x1, x2) - -inst_15164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c800000; valaddr_reg:x3; val_offset:45492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45492*FLEN/8, x4, x1, x2) - -inst_15165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c800001; valaddr_reg:x3; val_offset:45495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45495*FLEN/8, x4, x1, x2) - -inst_15166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c800003; valaddr_reg:x3; val_offset:45498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45498*FLEN/8, x4, x1, x2) - -inst_15167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c800007; valaddr_reg:x3; val_offset:45501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45501*FLEN/8, x4, x1, x2) - -inst_15168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c80000f; valaddr_reg:x3; val_offset:45504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45504*FLEN/8, x4, x1, x2) - -inst_15169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c80001f; valaddr_reg:x3; val_offset:45507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45507*FLEN/8, x4, x1, x2) - -inst_15170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c80003f; valaddr_reg:x3; val_offset:45510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45510*FLEN/8, x4, x1, x2) - -inst_15171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c80007f; valaddr_reg:x3; val_offset:45513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45513*FLEN/8, x4, x1, x2) - -inst_15172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c8000ff; valaddr_reg:x3; val_offset:45516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45516*FLEN/8, x4, x1, x2) - -inst_15173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c8001ff; valaddr_reg:x3; val_offset:45519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45519*FLEN/8, x4, x1, x2) - -inst_15174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c8003ff; valaddr_reg:x3; val_offset:45522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45522*FLEN/8, x4, x1, x2) - -inst_15175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c8007ff; valaddr_reg:x3; val_offset:45525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45525*FLEN/8, x4, x1, x2) - -inst_15176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c800fff; valaddr_reg:x3; val_offset:45528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45528*FLEN/8, x4, x1, x2) - -inst_15177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c801fff; valaddr_reg:x3; val_offset:45531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45531*FLEN/8, x4, x1, x2) - -inst_15178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c803fff; valaddr_reg:x3; val_offset:45534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45534*FLEN/8, x4, x1, x2) - -inst_15179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c807fff; valaddr_reg:x3; val_offset:45537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45537*FLEN/8, x4, x1, x2) - -inst_15180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c80ffff; valaddr_reg:x3; val_offset:45540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45540*FLEN/8, x4, x1, x2) - -inst_15181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c81ffff; valaddr_reg:x3; val_offset:45543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45543*FLEN/8, x4, x1, x2) - -inst_15182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c83ffff; valaddr_reg:x3; val_offset:45546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45546*FLEN/8, x4, x1, x2) - -inst_15183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c87ffff; valaddr_reg:x3; val_offset:45549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45549*FLEN/8, x4, x1, x2) - -inst_15184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c8fffff; valaddr_reg:x3; val_offset:45552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45552*FLEN/8, x4, x1, x2) - -inst_15185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4c9fffff; valaddr_reg:x3; val_offset:45555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45555*FLEN/8, x4, x1, x2) - -inst_15186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cbfffff; valaddr_reg:x3; val_offset:45558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45558*FLEN/8, x4, x1, x2) - -inst_15187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cc00000; valaddr_reg:x3; val_offset:45561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45561*FLEN/8, x4, x1, x2) - -inst_15188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4ce00000; valaddr_reg:x3; val_offset:45564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45564*FLEN/8, x4, x1, x2) - -inst_15189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cf00000; valaddr_reg:x3; val_offset:45567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45567*FLEN/8, x4, x1, x2) - -inst_15190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cf80000; valaddr_reg:x3; val_offset:45570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45570*FLEN/8, x4, x1, x2) - -inst_15191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfc0000; valaddr_reg:x3; val_offset:45573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45573*FLEN/8, x4, x1, x2) - -inst_15192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfe0000; valaddr_reg:x3; val_offset:45576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45576*FLEN/8, x4, x1, x2) - -inst_15193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cff0000; valaddr_reg:x3; val_offset:45579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45579*FLEN/8, x4, x1, x2) - -inst_15194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cff8000; valaddr_reg:x3; val_offset:45582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45582*FLEN/8, x4, x1, x2) - -inst_15195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cffc000; valaddr_reg:x3; val_offset:45585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45585*FLEN/8, x4, x1, x2) - -inst_15196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cffe000; valaddr_reg:x3; val_offset:45588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45588*FLEN/8, x4, x1, x2) - -inst_15197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfff000; valaddr_reg:x3; val_offset:45591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45591*FLEN/8, x4, x1, x2) - -inst_15198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfff800; valaddr_reg:x3; val_offset:45594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45594*FLEN/8, x4, x1, x2) - -inst_15199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfffc00; valaddr_reg:x3; val_offset:45597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45597*FLEN/8, x4, x1, x2) - -inst_15200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfffe00; valaddr_reg:x3; val_offset:45600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45600*FLEN/8, x4, x1, x2) - -inst_15201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cffff00; valaddr_reg:x3; val_offset:45603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45603*FLEN/8, x4, x1, x2) - -inst_15202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cffff80; valaddr_reg:x3; val_offset:45606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45606*FLEN/8, x4, x1, x2) - -inst_15203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cffffc0; valaddr_reg:x3; val_offset:45609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45609*FLEN/8, x4, x1, x2) - -inst_15204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cffffe0; valaddr_reg:x3; val_offset:45612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45612*FLEN/8, x4, x1, x2) - -inst_15205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfffff0; valaddr_reg:x3; val_offset:45615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45615*FLEN/8, x4, x1, x2) - -inst_15206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfffff8; valaddr_reg:x3; val_offset:45618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45618*FLEN/8, x4, x1, x2) - -inst_15207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfffffc; valaddr_reg:x3; val_offset:45621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45621*FLEN/8, x4, x1, x2) - -inst_15208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cfffffe; valaddr_reg:x3; val_offset:45624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45624*FLEN/8, x4, x1, x2) - -inst_15209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; -op3val:0x4cffffff; valaddr_reg:x3; val_offset:45627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45627*FLEN/8, x4, x1, x2) - -inst_15210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:45630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45630*FLEN/8, x4, x1, x2) - -inst_15211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:45633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45633*FLEN/8, x4, x1, x2) - -inst_15212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:45636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45636*FLEN/8, x4, x1, x2) - -inst_15213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:45639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45639*FLEN/8, x4, x1, x2) - -inst_15214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:45642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45642*FLEN/8, x4, x1, x2) - -inst_15215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:45645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45645*FLEN/8, x4, x1, x2) - -inst_15216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:45648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45648*FLEN/8, x4, x1, x2) - -inst_15217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:45651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45651*FLEN/8, x4, x1, x2) - -inst_15218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:45654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45654*FLEN/8, x4, x1, x2) - -inst_15219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:45657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45657*FLEN/8, x4, x1, x2) - -inst_15220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:45660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45660*FLEN/8, x4, x1, x2) - -inst_15221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:45663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45663*FLEN/8, x4, x1, x2) - -inst_15222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:45666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45666*FLEN/8, x4, x1, x2) - -inst_15223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:45669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45669*FLEN/8, x4, x1, x2) - -inst_15224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:45672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45672*FLEN/8, x4, x1, x2) - -inst_15225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:45675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45675*FLEN/8, x4, x1, x2) - -inst_15226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41800000; valaddr_reg:x3; val_offset:45678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45678*FLEN/8, x4, x1, x2) - -inst_15227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41800001; valaddr_reg:x3; val_offset:45681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45681*FLEN/8, x4, x1, x2) - -inst_15228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41800003; valaddr_reg:x3; val_offset:45684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45684*FLEN/8, x4, x1, x2) - -inst_15229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41800007; valaddr_reg:x3; val_offset:45687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45687*FLEN/8, x4, x1, x2) - -inst_15230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x4180000f; valaddr_reg:x3; val_offset:45690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45690*FLEN/8, x4, x1, x2) - -inst_15231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x4180001f; valaddr_reg:x3; val_offset:45693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45693*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_120) - -inst_15232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x4180003f; valaddr_reg:x3; val_offset:45696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45696*FLEN/8, x4, x1, x2) - -inst_15233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x4180007f; valaddr_reg:x3; val_offset:45699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45699*FLEN/8, x4, x1, x2) - -inst_15234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x418000ff; valaddr_reg:x3; val_offset:45702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45702*FLEN/8, x4, x1, x2) - -inst_15235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x418001ff; valaddr_reg:x3; val_offset:45705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45705*FLEN/8, x4, x1, x2) - -inst_15236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x418003ff; valaddr_reg:x3; val_offset:45708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45708*FLEN/8, x4, x1, x2) - -inst_15237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x418007ff; valaddr_reg:x3; val_offset:45711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45711*FLEN/8, x4, x1, x2) - -inst_15238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41800fff; valaddr_reg:x3; val_offset:45714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45714*FLEN/8, x4, x1, x2) - -inst_15239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41801fff; valaddr_reg:x3; val_offset:45717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45717*FLEN/8, x4, x1, x2) - -inst_15240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41803fff; valaddr_reg:x3; val_offset:45720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45720*FLEN/8, x4, x1, x2) - -inst_15241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41807fff; valaddr_reg:x3; val_offset:45723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45723*FLEN/8, x4, x1, x2) - -inst_15242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x4180ffff; valaddr_reg:x3; val_offset:45726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45726*FLEN/8, x4, x1, x2) - -inst_15243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x4181ffff; valaddr_reg:x3; val_offset:45729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45729*FLEN/8, x4, x1, x2) - -inst_15244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x4183ffff; valaddr_reg:x3; val_offset:45732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45732*FLEN/8, x4, x1, x2) - -inst_15245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x4187ffff; valaddr_reg:x3; val_offset:45735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45735*FLEN/8, x4, x1, x2) - -inst_15246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x418fffff; valaddr_reg:x3; val_offset:45738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45738*FLEN/8, x4, x1, x2) - -inst_15247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x419fffff; valaddr_reg:x3; val_offset:45741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45741*FLEN/8, x4, x1, x2) - -inst_15248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41bfffff; valaddr_reg:x3; val_offset:45744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45744*FLEN/8, x4, x1, x2) - -inst_15249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41c00000; valaddr_reg:x3; val_offset:45747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45747*FLEN/8, x4, x1, x2) - -inst_15250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41e00000; valaddr_reg:x3; val_offset:45750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45750*FLEN/8, x4, x1, x2) - -inst_15251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41f00000; valaddr_reg:x3; val_offset:45753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45753*FLEN/8, x4, x1, x2) - -inst_15252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41f80000; valaddr_reg:x3; val_offset:45756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45756*FLEN/8, x4, x1, x2) - -inst_15253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fc0000; valaddr_reg:x3; val_offset:45759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45759*FLEN/8, x4, x1, x2) - -inst_15254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fe0000; valaddr_reg:x3; val_offset:45762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45762*FLEN/8, x4, x1, x2) - -inst_15255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ff0000; valaddr_reg:x3; val_offset:45765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45765*FLEN/8, x4, x1, x2) - -inst_15256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ff8000; valaddr_reg:x3; val_offset:45768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45768*FLEN/8, x4, x1, x2) - -inst_15257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ffc000; valaddr_reg:x3; val_offset:45771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45771*FLEN/8, x4, x1, x2) - -inst_15258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ffe000; valaddr_reg:x3; val_offset:45774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45774*FLEN/8, x4, x1, x2) - -inst_15259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fff000; valaddr_reg:x3; val_offset:45777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45777*FLEN/8, x4, x1, x2) - -inst_15260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fff800; valaddr_reg:x3; val_offset:45780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45780*FLEN/8, x4, x1, x2) - -inst_15261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fffc00; valaddr_reg:x3; val_offset:45783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45783*FLEN/8, x4, x1, x2) - -inst_15262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fffe00; valaddr_reg:x3; val_offset:45786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45786*FLEN/8, x4, x1, x2) - -inst_15263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ffff00; valaddr_reg:x3; val_offset:45789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45789*FLEN/8, x4, x1, x2) - -inst_15264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ffff80; valaddr_reg:x3; val_offset:45792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45792*FLEN/8, x4, x1, x2) - -inst_15265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ffffc0; valaddr_reg:x3; val_offset:45795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45795*FLEN/8, x4, x1, x2) - -inst_15266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ffffe0; valaddr_reg:x3; val_offset:45798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45798*FLEN/8, x4, x1, x2) - -inst_15267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fffff0; valaddr_reg:x3; val_offset:45801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45801*FLEN/8, x4, x1, x2) - -inst_15268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fffff8; valaddr_reg:x3; val_offset:45804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45804*FLEN/8, x4, x1, x2) - -inst_15269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fffffc; valaddr_reg:x3; val_offset:45807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45807*FLEN/8, x4, x1, x2) - -inst_15270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41fffffe; valaddr_reg:x3; val_offset:45810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45810*FLEN/8, x4, x1, x2) - -inst_15271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; -op3val:0x41ffffff; valaddr_reg:x3; val_offset:45813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45813*FLEN/8, x4, x1, x2) - -inst_15272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79000000; valaddr_reg:x3; val_offset:45816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45816*FLEN/8, x4, x1, x2) - -inst_15273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79000001; valaddr_reg:x3; val_offset:45819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45819*FLEN/8, x4, x1, x2) - -inst_15274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79000003; valaddr_reg:x3; val_offset:45822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45822*FLEN/8, x4, x1, x2) - -inst_15275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79000007; valaddr_reg:x3; val_offset:45825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45825*FLEN/8, x4, x1, x2) - -inst_15276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7900000f; valaddr_reg:x3; val_offset:45828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45828*FLEN/8, x4, x1, x2) - -inst_15277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7900001f; valaddr_reg:x3; val_offset:45831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45831*FLEN/8, x4, x1, x2) - -inst_15278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7900003f; valaddr_reg:x3; val_offset:45834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45834*FLEN/8, x4, x1, x2) - -inst_15279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7900007f; valaddr_reg:x3; val_offset:45837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45837*FLEN/8, x4, x1, x2) - -inst_15280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x790000ff; valaddr_reg:x3; val_offset:45840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45840*FLEN/8, x4, x1, x2) - -inst_15281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x790001ff; valaddr_reg:x3; val_offset:45843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45843*FLEN/8, x4, x1, x2) - -inst_15282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x790003ff; valaddr_reg:x3; val_offset:45846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45846*FLEN/8, x4, x1, x2) - -inst_15283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x790007ff; valaddr_reg:x3; val_offset:45849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45849*FLEN/8, x4, x1, x2) - -inst_15284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79000fff; valaddr_reg:x3; val_offset:45852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45852*FLEN/8, x4, x1, x2) - -inst_15285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79001fff; valaddr_reg:x3; val_offset:45855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45855*FLEN/8, x4, x1, x2) - -inst_15286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79003fff; valaddr_reg:x3; val_offset:45858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45858*FLEN/8, x4, x1, x2) - -inst_15287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79007fff; valaddr_reg:x3; val_offset:45861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45861*FLEN/8, x4, x1, x2) - -inst_15288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7900ffff; valaddr_reg:x3; val_offset:45864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45864*FLEN/8, x4, x1, x2) - -inst_15289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7901ffff; valaddr_reg:x3; val_offset:45867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45867*FLEN/8, x4, x1, x2) - -inst_15290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7903ffff; valaddr_reg:x3; val_offset:45870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45870*FLEN/8, x4, x1, x2) - -inst_15291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7907ffff; valaddr_reg:x3; val_offset:45873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45873*FLEN/8, x4, x1, x2) - -inst_15292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x790fffff; valaddr_reg:x3; val_offset:45876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45876*FLEN/8, x4, x1, x2) - -inst_15293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x791fffff; valaddr_reg:x3; val_offset:45879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45879*FLEN/8, x4, x1, x2) - -inst_15294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x793fffff; valaddr_reg:x3; val_offset:45882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45882*FLEN/8, x4, x1, x2) - -inst_15295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79400000; valaddr_reg:x3; val_offset:45885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45885*FLEN/8, x4, x1, x2) - -inst_15296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79600000; valaddr_reg:x3; val_offset:45888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45888*FLEN/8, x4, x1, x2) - -inst_15297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79700000; valaddr_reg:x3; val_offset:45891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45891*FLEN/8, x4, x1, x2) - -inst_15298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x79780000; valaddr_reg:x3; val_offset:45894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45894*FLEN/8, x4, x1, x2) - -inst_15299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797c0000; valaddr_reg:x3; val_offset:45897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45897*FLEN/8, x4, x1, x2) - -inst_15300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797e0000; valaddr_reg:x3; val_offset:45900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45900*FLEN/8, x4, x1, x2) - -inst_15301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797f0000; valaddr_reg:x3; val_offset:45903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45903*FLEN/8, x4, x1, x2) - -inst_15302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797f8000; valaddr_reg:x3; val_offset:45906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45906*FLEN/8, x4, x1, x2) - -inst_15303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797fc000; valaddr_reg:x3; val_offset:45909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45909*FLEN/8, x4, x1, x2) - -inst_15304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797fe000; valaddr_reg:x3; val_offset:45912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45912*FLEN/8, x4, x1, x2) - -inst_15305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797ff000; valaddr_reg:x3; val_offset:45915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45915*FLEN/8, x4, x1, x2) - -inst_15306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797ff800; valaddr_reg:x3; val_offset:45918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45918*FLEN/8, x4, x1, x2) - -inst_15307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797ffc00; valaddr_reg:x3; val_offset:45921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45921*FLEN/8, x4, x1, x2) - -inst_15308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797ffe00; valaddr_reg:x3; val_offset:45924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45924*FLEN/8, x4, x1, x2) - -inst_15309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797fff00; valaddr_reg:x3; val_offset:45927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45927*FLEN/8, x4, x1, x2) - -inst_15310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797fff80; valaddr_reg:x3; val_offset:45930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45930*FLEN/8, x4, x1, x2) - -inst_15311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797fffc0; valaddr_reg:x3; val_offset:45933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45933*FLEN/8, x4, x1, x2) - -inst_15312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797fffe0; valaddr_reg:x3; val_offset:45936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45936*FLEN/8, x4, x1, x2) - -inst_15313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797ffff0; valaddr_reg:x3; val_offset:45939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45939*FLEN/8, x4, x1, x2) - -inst_15314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797ffff8; valaddr_reg:x3; val_offset:45942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45942*FLEN/8, x4, x1, x2) - -inst_15315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797ffffc; valaddr_reg:x3; val_offset:45945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45945*FLEN/8, x4, x1, x2) - -inst_15316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797ffffe; valaddr_reg:x3; val_offset:45948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45948*FLEN/8, x4, x1, x2) - -inst_15317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x797fffff; valaddr_reg:x3; val_offset:45951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45951*FLEN/8, x4, x1, x2) - -inst_15318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f000001; valaddr_reg:x3; val_offset:45954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45954*FLEN/8, x4, x1, x2) - -inst_15319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f000003; valaddr_reg:x3; val_offset:45957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45957*FLEN/8, x4, x1, x2) - -inst_15320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f000007; valaddr_reg:x3; val_offset:45960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45960*FLEN/8, x4, x1, x2) - -inst_15321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f199999; valaddr_reg:x3; val_offset:45963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45963*FLEN/8, x4, x1, x2) - -inst_15322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f249249; valaddr_reg:x3; val_offset:45966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45966*FLEN/8, x4, x1, x2) - -inst_15323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f333333; valaddr_reg:x3; val_offset:45969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45969*FLEN/8, x4, x1, x2) - -inst_15324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:45972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45972*FLEN/8, x4, x1, x2) - -inst_15325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:45975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45975*FLEN/8, x4, x1, x2) - -inst_15326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f444444; valaddr_reg:x3; val_offset:45978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45978*FLEN/8, x4, x1, x2) - -inst_15327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:45981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45981*FLEN/8, x4, x1, x2) - -inst_15328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:45984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45984*FLEN/8, x4, x1, x2) - -inst_15329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f666666; valaddr_reg:x3; val_offset:45987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45987*FLEN/8, x4, x1, x2) - -inst_15330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:45990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45990*FLEN/8, x4, x1, x2) - -inst_15331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:45993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45993*FLEN/8, x4, x1, x2) - -inst_15332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:45996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45996*FLEN/8, x4, x1, x2) - -inst_15333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:45999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45999*FLEN/8, x4, x1, x2) - -inst_15334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:46002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46002*FLEN/8, x4, x1, x2) - -inst_15335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:46005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46005*FLEN/8, x4, x1, x2) - -inst_15336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:46008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46008*FLEN/8, x4, x1, x2) - -inst_15337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:46011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46011*FLEN/8, x4, x1, x2) - -inst_15338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:46014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46014*FLEN/8, x4, x1, x2) - -inst_15339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:46017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46017*FLEN/8, x4, x1, x2) - -inst_15340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:46020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46020*FLEN/8, x4, x1, x2) - -inst_15341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:46023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46023*FLEN/8, x4, x1, x2) - -inst_15342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:46026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46026*FLEN/8, x4, x1, x2) - -inst_15343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:46029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46029*FLEN/8, x4, x1, x2) - -inst_15344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:46032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46032*FLEN/8, x4, x1, x2) - -inst_15345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:46035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46035*FLEN/8, x4, x1, x2) - -inst_15346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:46038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46038*FLEN/8, x4, x1, x2) - -inst_15347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:46041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46041*FLEN/8, x4, x1, x2) - -inst_15348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:46044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46044*FLEN/8, x4, x1, x2) - -inst_15349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:46047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46047*FLEN/8, x4, x1, x2) - -inst_15350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x800000; valaddr_reg:x3; val_offset:46050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46050*FLEN/8, x4, x1, x2) - -inst_15351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:46053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46053*FLEN/8, x4, x1, x2) - -inst_15352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:46056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46056*FLEN/8, x4, x1, x2) - -inst_15353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:46059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46059*FLEN/8, x4, x1, x2) - -inst_15354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x80000f; valaddr_reg:x3; val_offset:46062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46062*FLEN/8, x4, x1, x2) - -inst_15355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x80001f; valaddr_reg:x3; val_offset:46065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46065*FLEN/8, x4, x1, x2) - -inst_15356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x80003f; valaddr_reg:x3; val_offset:46068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46068*FLEN/8, x4, x1, x2) - -inst_15357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x80007f; valaddr_reg:x3; val_offset:46071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46071*FLEN/8, x4, x1, x2) - -inst_15358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x8000ff; valaddr_reg:x3; val_offset:46074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46074*FLEN/8, x4, x1, x2) - -inst_15359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x8001ff; valaddr_reg:x3; val_offset:46077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46077*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_121) - -inst_15360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x8003ff; valaddr_reg:x3; val_offset:46080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46080*FLEN/8, x4, x1, x2) - -inst_15361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x8007ff; valaddr_reg:x3; val_offset:46083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46083*FLEN/8, x4, x1, x2) - -inst_15362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x800fff; valaddr_reg:x3; val_offset:46086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46086*FLEN/8, x4, x1, x2) - -inst_15363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x801fff; valaddr_reg:x3; val_offset:46089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46089*FLEN/8, x4, x1, x2) - -inst_15364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x803fff; valaddr_reg:x3; val_offset:46092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46092*FLEN/8, x4, x1, x2) - -inst_15365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x807fff; valaddr_reg:x3; val_offset:46095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46095*FLEN/8, x4, x1, x2) - -inst_15366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x80ffff; valaddr_reg:x3; val_offset:46098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46098*FLEN/8, x4, x1, x2) - -inst_15367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x81ffff; valaddr_reg:x3; val_offset:46101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46101*FLEN/8, x4, x1, x2) - -inst_15368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x83ffff; valaddr_reg:x3; val_offset:46104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46104*FLEN/8, x4, x1, x2) - -inst_15369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x87ffff; valaddr_reg:x3; val_offset:46107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46107*FLEN/8, x4, x1, x2) - -inst_15370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x8fffff; valaddr_reg:x3; val_offset:46110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46110*FLEN/8, x4, x1, x2) - -inst_15371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0x9fffff; valaddr_reg:x3; val_offset:46113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46113*FLEN/8, x4, x1, x2) - -inst_15372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xbfffff; valaddr_reg:x3; val_offset:46116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46116*FLEN/8, x4, x1, x2) - -inst_15373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xc00000; valaddr_reg:x3; val_offset:46119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46119*FLEN/8, x4, x1, x2) - -inst_15374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xe00000; valaddr_reg:x3; val_offset:46122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46122*FLEN/8, x4, x1, x2) - -inst_15375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xf00000; valaddr_reg:x3; val_offset:46125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46125*FLEN/8, x4, x1, x2) - -inst_15376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xf80000; valaddr_reg:x3; val_offset:46128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46128*FLEN/8, x4, x1, x2) - -inst_15377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfc0000; valaddr_reg:x3; val_offset:46131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46131*FLEN/8, x4, x1, x2) - -inst_15378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfe0000; valaddr_reg:x3; val_offset:46134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46134*FLEN/8, x4, x1, x2) - -inst_15379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xff0000; valaddr_reg:x3; val_offset:46137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46137*FLEN/8, x4, x1, x2) - -inst_15380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xff8000; valaddr_reg:x3; val_offset:46140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46140*FLEN/8, x4, x1, x2) - -inst_15381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xffc000; valaddr_reg:x3; val_offset:46143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46143*FLEN/8, x4, x1, x2) - -inst_15382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xffe000; valaddr_reg:x3; val_offset:46146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46146*FLEN/8, x4, x1, x2) - -inst_15383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfff000; valaddr_reg:x3; val_offset:46149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46149*FLEN/8, x4, x1, x2) - -inst_15384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfff800; valaddr_reg:x3; val_offset:46152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46152*FLEN/8, x4, x1, x2) - -inst_15385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfffc00; valaddr_reg:x3; val_offset:46155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46155*FLEN/8, x4, x1, x2) - -inst_15386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfffe00; valaddr_reg:x3; val_offset:46158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46158*FLEN/8, x4, x1, x2) - -inst_15387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xffff00; valaddr_reg:x3; val_offset:46161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46161*FLEN/8, x4, x1, x2) - -inst_15388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xffff80; valaddr_reg:x3; val_offset:46164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46164*FLEN/8, x4, x1, x2) - -inst_15389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xffffc0; valaddr_reg:x3; val_offset:46167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46167*FLEN/8, x4, x1, x2) - -inst_15390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xffffe0; valaddr_reg:x3; val_offset:46170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46170*FLEN/8, x4, x1, x2) - -inst_15391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfffff0; valaddr_reg:x3; val_offset:46173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46173*FLEN/8, x4, x1, x2) - -inst_15392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:46176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46176*FLEN/8, x4, x1, x2) - -inst_15393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:46179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46179*FLEN/8, x4, x1, x2) - -inst_15394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:46182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46182*FLEN/8, x4, x1, x2) - -inst_15395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; -op3val:0xffffff; valaddr_reg:x3; val_offset:46185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46185*FLEN/8, x4, x1, x2) - -inst_15396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5800000; valaddr_reg:x3; val_offset:46188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46188*FLEN/8, x4, x1, x2) - -inst_15397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5800001; valaddr_reg:x3; val_offset:46191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46191*FLEN/8, x4, x1, x2) - -inst_15398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5800003; valaddr_reg:x3; val_offset:46194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46194*FLEN/8, x4, x1, x2) - -inst_15399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5800007; valaddr_reg:x3; val_offset:46197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46197*FLEN/8, x4, x1, x2) - -inst_15400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf580000f; valaddr_reg:x3; val_offset:46200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46200*FLEN/8, x4, x1, x2) - -inst_15401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf580001f; valaddr_reg:x3; val_offset:46203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46203*FLEN/8, x4, x1, x2) - -inst_15402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf580003f; valaddr_reg:x3; val_offset:46206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46206*FLEN/8, x4, x1, x2) - -inst_15403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf580007f; valaddr_reg:x3; val_offset:46209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46209*FLEN/8, x4, x1, x2) - -inst_15404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf58000ff; valaddr_reg:x3; val_offset:46212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46212*FLEN/8, x4, x1, x2) - -inst_15405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf58001ff; valaddr_reg:x3; val_offset:46215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46215*FLEN/8, x4, x1, x2) - -inst_15406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf58003ff; valaddr_reg:x3; val_offset:46218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46218*FLEN/8, x4, x1, x2) - -inst_15407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf58007ff; valaddr_reg:x3; val_offset:46221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46221*FLEN/8, x4, x1, x2) - -inst_15408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5800fff; valaddr_reg:x3; val_offset:46224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46224*FLEN/8, x4, x1, x2) - -inst_15409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5801fff; valaddr_reg:x3; val_offset:46227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46227*FLEN/8, x4, x1, x2) - -inst_15410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5803fff; valaddr_reg:x3; val_offset:46230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46230*FLEN/8, x4, x1, x2) - -inst_15411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5807fff; valaddr_reg:x3; val_offset:46233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46233*FLEN/8, x4, x1, x2) - -inst_15412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf580ffff; valaddr_reg:x3; val_offset:46236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46236*FLEN/8, x4, x1, x2) - -inst_15413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf581ffff; valaddr_reg:x3; val_offset:46239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46239*FLEN/8, x4, x1, x2) - -inst_15414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf583ffff; valaddr_reg:x3; val_offset:46242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46242*FLEN/8, x4, x1, x2) - -inst_15415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf587ffff; valaddr_reg:x3; val_offset:46245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46245*FLEN/8, x4, x1, x2) - -inst_15416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf58fffff; valaddr_reg:x3; val_offset:46248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46248*FLEN/8, x4, x1, x2) - -inst_15417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf59fffff; valaddr_reg:x3; val_offset:46251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46251*FLEN/8, x4, x1, x2) - -inst_15418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5bfffff; valaddr_reg:x3; val_offset:46254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46254*FLEN/8, x4, x1, x2) - -inst_15419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5c00000; valaddr_reg:x3; val_offset:46257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46257*FLEN/8, x4, x1, x2) - -inst_15420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5e00000; valaddr_reg:x3; val_offset:46260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46260*FLEN/8, x4, x1, x2) - -inst_15421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5f00000; valaddr_reg:x3; val_offset:46263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46263*FLEN/8, x4, x1, x2) - -inst_15422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5f80000; valaddr_reg:x3; val_offset:46266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46266*FLEN/8, x4, x1, x2) - -inst_15423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fc0000; valaddr_reg:x3; val_offset:46269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46269*FLEN/8, x4, x1, x2) - -inst_15424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fe0000; valaddr_reg:x3; val_offset:46272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46272*FLEN/8, x4, x1, x2) - -inst_15425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ff0000; valaddr_reg:x3; val_offset:46275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46275*FLEN/8, x4, x1, x2) - -inst_15426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ff8000; valaddr_reg:x3; val_offset:46278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46278*FLEN/8, x4, x1, x2) - -inst_15427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ffc000; valaddr_reg:x3; val_offset:46281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46281*FLEN/8, x4, x1, x2) - -inst_15428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ffe000; valaddr_reg:x3; val_offset:46284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46284*FLEN/8, x4, x1, x2) - -inst_15429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fff000; valaddr_reg:x3; val_offset:46287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46287*FLEN/8, x4, x1, x2) - -inst_15430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fff800; valaddr_reg:x3; val_offset:46290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46290*FLEN/8, x4, x1, x2) - -inst_15431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fffc00; valaddr_reg:x3; val_offset:46293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46293*FLEN/8, x4, x1, x2) - -inst_15432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fffe00; valaddr_reg:x3; val_offset:46296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46296*FLEN/8, x4, x1, x2) - -inst_15433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ffff00; valaddr_reg:x3; val_offset:46299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46299*FLEN/8, x4, x1, x2) - -inst_15434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ffff80; valaddr_reg:x3; val_offset:46302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46302*FLEN/8, x4, x1, x2) - -inst_15435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ffffc0; valaddr_reg:x3; val_offset:46305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46305*FLEN/8, x4, x1, x2) - -inst_15436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ffffe0; valaddr_reg:x3; val_offset:46308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46308*FLEN/8, x4, x1, x2) - -inst_15437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fffff0; valaddr_reg:x3; val_offset:46311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46311*FLEN/8, x4, x1, x2) - -inst_15438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fffff8; valaddr_reg:x3; val_offset:46314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46314*FLEN/8, x4, x1, x2) - -inst_15439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fffffc; valaddr_reg:x3; val_offset:46317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46317*FLEN/8, x4, x1, x2) - -inst_15440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5fffffe; valaddr_reg:x3; val_offset:46320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46320*FLEN/8, x4, x1, x2) - -inst_15441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xf5ffffff; valaddr_reg:x3; val_offset:46323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46323*FLEN/8, x4, x1, x2) - -inst_15442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff000001; valaddr_reg:x3; val_offset:46326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46326*FLEN/8, x4, x1, x2) - -inst_15443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff000003; valaddr_reg:x3; val_offset:46329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46329*FLEN/8, x4, x1, x2) - -inst_15444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff000007; valaddr_reg:x3; val_offset:46332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46332*FLEN/8, x4, x1, x2) - -inst_15445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff199999; valaddr_reg:x3; val_offset:46335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46335*FLEN/8, x4, x1, x2) - -inst_15446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff249249; valaddr_reg:x3; val_offset:46338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46338*FLEN/8, x4, x1, x2) - -inst_15447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff333333; valaddr_reg:x3; val_offset:46341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46341*FLEN/8, x4, x1, x2) - -inst_15448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:46344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46344*FLEN/8, x4, x1, x2) - -inst_15449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:46347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46347*FLEN/8, x4, x1, x2) - -inst_15450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff444444; valaddr_reg:x3; val_offset:46350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46350*FLEN/8, x4, x1, x2) - -inst_15451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:46353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46353*FLEN/8, x4, x1, x2) - -inst_15452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:46356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46356*FLEN/8, x4, x1, x2) - -inst_15453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff666666; valaddr_reg:x3; val_offset:46359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46359*FLEN/8, x4, x1, x2) - -inst_15454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:46362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46362*FLEN/8, x4, x1, x2) - -inst_15455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:46365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46365*FLEN/8, x4, x1, x2) - -inst_15456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:46368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46368*FLEN/8, x4, x1, x2) - -inst_15457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:46371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46371*FLEN/8, x4, x1, x2) - -inst_15458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4800000; valaddr_reg:x3; val_offset:46374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46374*FLEN/8, x4, x1, x2) - -inst_15459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4800001; valaddr_reg:x3; val_offset:46377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46377*FLEN/8, x4, x1, x2) - -inst_15460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4800003; valaddr_reg:x3; val_offset:46380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46380*FLEN/8, x4, x1, x2) - -inst_15461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4800007; valaddr_reg:x3; val_offset:46383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46383*FLEN/8, x4, x1, x2) - -inst_15462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe480000f; valaddr_reg:x3; val_offset:46386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46386*FLEN/8, x4, x1, x2) - -inst_15463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe480001f; valaddr_reg:x3; val_offset:46389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46389*FLEN/8, x4, x1, x2) - -inst_15464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe480003f; valaddr_reg:x3; val_offset:46392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46392*FLEN/8, x4, x1, x2) - -inst_15465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe480007f; valaddr_reg:x3; val_offset:46395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46395*FLEN/8, x4, x1, x2) - -inst_15466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe48000ff; valaddr_reg:x3; val_offset:46398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46398*FLEN/8, x4, x1, x2) - -inst_15467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe48001ff; valaddr_reg:x3; val_offset:46401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46401*FLEN/8, x4, x1, x2) - -inst_15468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe48003ff; valaddr_reg:x3; val_offset:46404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46404*FLEN/8, x4, x1, x2) - -inst_15469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe48007ff; valaddr_reg:x3; val_offset:46407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46407*FLEN/8, x4, x1, x2) - -inst_15470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4800fff; valaddr_reg:x3; val_offset:46410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46410*FLEN/8, x4, x1, x2) - -inst_15471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4801fff; valaddr_reg:x3; val_offset:46413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46413*FLEN/8, x4, x1, x2) - -inst_15472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4803fff; valaddr_reg:x3; val_offset:46416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46416*FLEN/8, x4, x1, x2) - -inst_15473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4807fff; valaddr_reg:x3; val_offset:46419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46419*FLEN/8, x4, x1, x2) - -inst_15474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe480ffff; valaddr_reg:x3; val_offset:46422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46422*FLEN/8, x4, x1, x2) - -inst_15475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe481ffff; valaddr_reg:x3; val_offset:46425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46425*FLEN/8, x4, x1, x2) - -inst_15476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe483ffff; valaddr_reg:x3; val_offset:46428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46428*FLEN/8, x4, x1, x2) - -inst_15477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe487ffff; valaddr_reg:x3; val_offset:46431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46431*FLEN/8, x4, x1, x2) - -inst_15478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe48fffff; valaddr_reg:x3; val_offset:46434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46434*FLEN/8, x4, x1, x2) - -inst_15479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe49fffff; valaddr_reg:x3; val_offset:46437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46437*FLEN/8, x4, x1, x2) - -inst_15480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4bfffff; valaddr_reg:x3; val_offset:46440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46440*FLEN/8, x4, x1, x2) - -inst_15481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4c00000; valaddr_reg:x3; val_offset:46443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46443*FLEN/8, x4, x1, x2) - -inst_15482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4e00000; valaddr_reg:x3; val_offset:46446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46446*FLEN/8, x4, x1, x2) - -inst_15483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4f00000; valaddr_reg:x3; val_offset:46449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46449*FLEN/8, x4, x1, x2) - -inst_15484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4f80000; valaddr_reg:x3; val_offset:46452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46452*FLEN/8, x4, x1, x2) - -inst_15485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fc0000; valaddr_reg:x3; val_offset:46455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46455*FLEN/8, x4, x1, x2) - -inst_15486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fe0000; valaddr_reg:x3; val_offset:46458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46458*FLEN/8, x4, x1, x2) - -inst_15487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ff0000; valaddr_reg:x3; val_offset:46461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46461*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_122) - -inst_15488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ff8000; valaddr_reg:x3; val_offset:46464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46464*FLEN/8, x4, x1, x2) - -inst_15489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ffc000; valaddr_reg:x3; val_offset:46467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46467*FLEN/8, x4, x1, x2) - -inst_15490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ffe000; valaddr_reg:x3; val_offset:46470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46470*FLEN/8, x4, x1, x2) - -inst_15491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fff000; valaddr_reg:x3; val_offset:46473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46473*FLEN/8, x4, x1, x2) - -inst_15492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fff800; valaddr_reg:x3; val_offset:46476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46476*FLEN/8, x4, x1, x2) - -inst_15493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fffc00; valaddr_reg:x3; val_offset:46479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46479*FLEN/8, x4, x1, x2) - -inst_15494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fffe00; valaddr_reg:x3; val_offset:46482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46482*FLEN/8, x4, x1, x2) - -inst_15495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ffff00; valaddr_reg:x3; val_offset:46485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46485*FLEN/8, x4, x1, x2) - -inst_15496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ffff80; valaddr_reg:x3; val_offset:46488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46488*FLEN/8, x4, x1, x2) - -inst_15497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ffffc0; valaddr_reg:x3; val_offset:46491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46491*FLEN/8, x4, x1, x2) - -inst_15498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ffffe0; valaddr_reg:x3; val_offset:46494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46494*FLEN/8, x4, x1, x2) - -inst_15499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fffff0; valaddr_reg:x3; val_offset:46497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46497*FLEN/8, x4, x1, x2) - -inst_15500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fffff8; valaddr_reg:x3; val_offset:46500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46500*FLEN/8, x4, x1, x2) - -inst_15501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fffffc; valaddr_reg:x3; val_offset:46503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46503*FLEN/8, x4, x1, x2) - -inst_15502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4fffffe; valaddr_reg:x3; val_offset:46506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46506*FLEN/8, x4, x1, x2) - -inst_15503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xe4ffffff; valaddr_reg:x3; val_offset:46509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46509*FLEN/8, x4, x1, x2) - -inst_15504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff000001; valaddr_reg:x3; val_offset:46512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46512*FLEN/8, x4, x1, x2) - -inst_15505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff000003; valaddr_reg:x3; val_offset:46515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46515*FLEN/8, x4, x1, x2) - -inst_15506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff000007; valaddr_reg:x3; val_offset:46518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46518*FLEN/8, x4, x1, x2) - -inst_15507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff199999; valaddr_reg:x3; val_offset:46521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46521*FLEN/8, x4, x1, x2) - -inst_15508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff249249; valaddr_reg:x3; val_offset:46524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46524*FLEN/8, x4, x1, x2) - -inst_15509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff333333; valaddr_reg:x3; val_offset:46527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46527*FLEN/8, x4, x1, x2) - -inst_15510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:46530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46530*FLEN/8, x4, x1, x2) - -inst_15511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:46533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46533*FLEN/8, x4, x1, x2) - -inst_15512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff444444; valaddr_reg:x3; val_offset:46536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46536*FLEN/8, x4, x1, x2) - -inst_15513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:46539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46539*FLEN/8, x4, x1, x2) - -inst_15514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:46542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46542*FLEN/8, x4, x1, x2) - -inst_15515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff666666; valaddr_reg:x3; val_offset:46545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46545*FLEN/8, x4, x1, x2) - -inst_15516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:46548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46548*FLEN/8, x4, x1, x2) - -inst_15517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:46551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46551*FLEN/8, x4, x1, x2) - -inst_15518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:46554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46554*FLEN/8, x4, x1, x2) - -inst_15519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:46557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46557*FLEN/8, x4, x1, x2) - -inst_15520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:46560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46560*FLEN/8, x4, x1, x2) - -inst_15521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:46563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46563*FLEN/8, x4, x1, x2) - -inst_15522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:46566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46566*FLEN/8, x4, x1, x2) - -inst_15523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:46569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46569*FLEN/8, x4, x1, x2) - -inst_15524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:46572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46572*FLEN/8, x4, x1, x2) - -inst_15525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:46575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46575*FLEN/8, x4, x1, x2) - -inst_15526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:46578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46578*FLEN/8, x4, x1, x2) - -inst_15527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:46581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46581*FLEN/8, x4, x1, x2) - -inst_15528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:46584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46584*FLEN/8, x4, x1, x2) - -inst_15529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:46587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46587*FLEN/8, x4, x1, x2) - -inst_15530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:46590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46590*FLEN/8, x4, x1, x2) - -inst_15531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:46593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46593*FLEN/8, x4, x1, x2) - -inst_15532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:46596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46596*FLEN/8, x4, x1, x2) - -inst_15533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:46599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46599*FLEN/8, x4, x1, x2) - -inst_15534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:46602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46602*FLEN/8, x4, x1, x2) - -inst_15535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:46605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46605*FLEN/8, x4, x1, x2) - -inst_15536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc000000; valaddr_reg:x3; val_offset:46608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46608*FLEN/8, x4, x1, x2) - -inst_15537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc000001; valaddr_reg:x3; val_offset:46611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46611*FLEN/8, x4, x1, x2) - -inst_15538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc000003; valaddr_reg:x3; val_offset:46614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46614*FLEN/8, x4, x1, x2) - -inst_15539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc000007; valaddr_reg:x3; val_offset:46617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46617*FLEN/8, x4, x1, x2) - -inst_15540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc00000f; valaddr_reg:x3; val_offset:46620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46620*FLEN/8, x4, x1, x2) - -inst_15541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc00001f; valaddr_reg:x3; val_offset:46623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46623*FLEN/8, x4, x1, x2) - -inst_15542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc00003f; valaddr_reg:x3; val_offset:46626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46626*FLEN/8, x4, x1, x2) - -inst_15543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc00007f; valaddr_reg:x3; val_offset:46629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46629*FLEN/8, x4, x1, x2) - -inst_15544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc0000ff; valaddr_reg:x3; val_offset:46632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46632*FLEN/8, x4, x1, x2) - -inst_15545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc0001ff; valaddr_reg:x3; val_offset:46635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46635*FLEN/8, x4, x1, x2) - -inst_15546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc0003ff; valaddr_reg:x3; val_offset:46638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46638*FLEN/8, x4, x1, x2) - -inst_15547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc0007ff; valaddr_reg:x3; val_offset:46641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46641*FLEN/8, x4, x1, x2) - -inst_15548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc000fff; valaddr_reg:x3; val_offset:46644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46644*FLEN/8, x4, x1, x2) - -inst_15549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc001fff; valaddr_reg:x3; val_offset:46647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46647*FLEN/8, x4, x1, x2) - -inst_15550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc003fff; valaddr_reg:x3; val_offset:46650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46650*FLEN/8, x4, x1, x2) - -inst_15551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc007fff; valaddr_reg:x3; val_offset:46653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46653*FLEN/8, x4, x1, x2) - -inst_15552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc00ffff; valaddr_reg:x3; val_offset:46656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46656*FLEN/8, x4, x1, x2) - -inst_15553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc01ffff; valaddr_reg:x3; val_offset:46659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46659*FLEN/8, x4, x1, x2) - -inst_15554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc03ffff; valaddr_reg:x3; val_offset:46662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46662*FLEN/8, x4, x1, x2) - -inst_15555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc07ffff; valaddr_reg:x3; val_offset:46665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46665*FLEN/8, x4, x1, x2) - -inst_15556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc0fffff; valaddr_reg:x3; val_offset:46668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46668*FLEN/8, x4, x1, x2) - -inst_15557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc1fffff; valaddr_reg:x3; val_offset:46671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46671*FLEN/8, x4, x1, x2) - -inst_15558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc3fffff; valaddr_reg:x3; val_offset:46674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46674*FLEN/8, x4, x1, x2) - -inst_15559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc400000; valaddr_reg:x3; val_offset:46677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46677*FLEN/8, x4, x1, x2) - -inst_15560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc600000; valaddr_reg:x3; val_offset:46680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46680*FLEN/8, x4, x1, x2) - -inst_15561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc700000; valaddr_reg:x3; val_offset:46683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46683*FLEN/8, x4, x1, x2) - -inst_15562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc780000; valaddr_reg:x3; val_offset:46686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46686*FLEN/8, x4, x1, x2) - -inst_15563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7c0000; valaddr_reg:x3; val_offset:46689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46689*FLEN/8, x4, x1, x2) - -inst_15564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7e0000; valaddr_reg:x3; val_offset:46692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46692*FLEN/8, x4, x1, x2) - -inst_15565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7f0000; valaddr_reg:x3; val_offset:46695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46695*FLEN/8, x4, x1, x2) - -inst_15566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7f8000; valaddr_reg:x3; val_offset:46698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46698*FLEN/8, x4, x1, x2) - -inst_15567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7fc000; valaddr_reg:x3; val_offset:46701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46701*FLEN/8, x4, x1, x2) - -inst_15568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7fe000; valaddr_reg:x3; val_offset:46704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46704*FLEN/8, x4, x1, x2) - -inst_15569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7ff000; valaddr_reg:x3; val_offset:46707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46707*FLEN/8, x4, x1, x2) - -inst_15570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7ff800; valaddr_reg:x3; val_offset:46710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46710*FLEN/8, x4, x1, x2) - -inst_15571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7ffc00; valaddr_reg:x3; val_offset:46713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46713*FLEN/8, x4, x1, x2) - -inst_15572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7ffe00; valaddr_reg:x3; val_offset:46716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46716*FLEN/8, x4, x1, x2) - -inst_15573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7fff00; valaddr_reg:x3; val_offset:46719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46719*FLEN/8, x4, x1, x2) - -inst_15574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7fff80; valaddr_reg:x3; val_offset:46722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46722*FLEN/8, x4, x1, x2) - -inst_15575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7fffc0; valaddr_reg:x3; val_offset:46725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46725*FLEN/8, x4, x1, x2) - -inst_15576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7fffe0; valaddr_reg:x3; val_offset:46728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46728*FLEN/8, x4, x1, x2) - -inst_15577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7ffff0; valaddr_reg:x3; val_offset:46731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46731*FLEN/8, x4, x1, x2) - -inst_15578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7ffff8; valaddr_reg:x3; val_offset:46734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46734*FLEN/8, x4, x1, x2) - -inst_15579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7ffffc; valaddr_reg:x3; val_offset:46737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46737*FLEN/8, x4, x1, x2) - -inst_15580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7ffffe; valaddr_reg:x3; val_offset:46740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46740*FLEN/8, x4, x1, x2) - -inst_15581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; -op3val:0xfc7fffff; valaddr_reg:x3; val_offset:46743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46743*FLEN/8, x4, x1, x2) - -inst_15582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:46746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46746*FLEN/8, x4, x1, x2) - -inst_15583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:46749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46749*FLEN/8, x4, x1, x2) - -inst_15584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:46752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46752*FLEN/8, x4, x1, x2) - -inst_15585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:46755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46755*FLEN/8, x4, x1, x2) - -inst_15586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:46758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46758*FLEN/8, x4, x1, x2) - -inst_15587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:46761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46761*FLEN/8, x4, x1, x2) - -inst_15588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:46764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46764*FLEN/8, x4, x1, x2) - -inst_15589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:46767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46767*FLEN/8, x4, x1, x2) - -inst_15590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:46770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46770*FLEN/8, x4, x1, x2) - -inst_15591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:46773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46773*FLEN/8, x4, x1, x2) - -inst_15592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:46776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46776*FLEN/8, x4, x1, x2) - -inst_15593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:46779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46779*FLEN/8, x4, x1, x2) - -inst_15594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:46782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46782*FLEN/8, x4, x1, x2) - -inst_15595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:46785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46785*FLEN/8, x4, x1, x2) - -inst_15596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:46788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46788*FLEN/8, x4, x1, x2) - -inst_15597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:46791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46791*FLEN/8, x4, x1, x2) - -inst_15598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5000000; valaddr_reg:x3; val_offset:46794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46794*FLEN/8, x4, x1, x2) - -inst_15599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5000001; valaddr_reg:x3; val_offset:46797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46797*FLEN/8, x4, x1, x2) - -inst_15600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5000003; valaddr_reg:x3; val_offset:46800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46800*FLEN/8, x4, x1, x2) - -inst_15601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5000007; valaddr_reg:x3; val_offset:46803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46803*FLEN/8, x4, x1, x2) - -inst_15602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x500000f; valaddr_reg:x3; val_offset:46806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46806*FLEN/8, x4, x1, x2) - -inst_15603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x500001f; valaddr_reg:x3; val_offset:46809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46809*FLEN/8, x4, x1, x2) - -inst_15604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x500003f; valaddr_reg:x3; val_offset:46812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46812*FLEN/8, x4, x1, x2) - -inst_15605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x500007f; valaddr_reg:x3; val_offset:46815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46815*FLEN/8, x4, x1, x2) - -inst_15606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x50000ff; valaddr_reg:x3; val_offset:46818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46818*FLEN/8, x4, x1, x2) - -inst_15607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x50001ff; valaddr_reg:x3; val_offset:46821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46821*FLEN/8, x4, x1, x2) - -inst_15608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x50003ff; valaddr_reg:x3; val_offset:46824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46824*FLEN/8, x4, x1, x2) - -inst_15609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x50007ff; valaddr_reg:x3; val_offset:46827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46827*FLEN/8, x4, x1, x2) - -inst_15610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5000fff; valaddr_reg:x3; val_offset:46830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46830*FLEN/8, x4, x1, x2) - -inst_15611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5001fff; valaddr_reg:x3; val_offset:46833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46833*FLEN/8, x4, x1, x2) - -inst_15612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5003fff; valaddr_reg:x3; val_offset:46836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46836*FLEN/8, x4, x1, x2) - -inst_15613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5007fff; valaddr_reg:x3; val_offset:46839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46839*FLEN/8, x4, x1, x2) - -inst_15614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x500ffff; valaddr_reg:x3; val_offset:46842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46842*FLEN/8, x4, x1, x2) - -inst_15615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x501ffff; valaddr_reg:x3; val_offset:46845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46845*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_123) - -inst_15616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x503ffff; valaddr_reg:x3; val_offset:46848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46848*FLEN/8, x4, x1, x2) - -inst_15617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x507ffff; valaddr_reg:x3; val_offset:46851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46851*FLEN/8, x4, x1, x2) - -inst_15618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x50fffff; valaddr_reg:x3; val_offset:46854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46854*FLEN/8, x4, x1, x2) - -inst_15619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x51fffff; valaddr_reg:x3; val_offset:46857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46857*FLEN/8, x4, x1, x2) - -inst_15620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x53fffff; valaddr_reg:x3; val_offset:46860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46860*FLEN/8, x4, x1, x2) - -inst_15621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5400000; valaddr_reg:x3; val_offset:46863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46863*FLEN/8, x4, x1, x2) - -inst_15622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5600000; valaddr_reg:x3; val_offset:46866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46866*FLEN/8, x4, x1, x2) - -inst_15623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5700000; valaddr_reg:x3; val_offset:46869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46869*FLEN/8, x4, x1, x2) - -inst_15624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x5780000; valaddr_reg:x3; val_offset:46872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46872*FLEN/8, x4, x1, x2) - -inst_15625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57c0000; valaddr_reg:x3; val_offset:46875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46875*FLEN/8, x4, x1, x2) - -inst_15626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57e0000; valaddr_reg:x3; val_offset:46878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46878*FLEN/8, x4, x1, x2) - -inst_15627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57f0000; valaddr_reg:x3; val_offset:46881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46881*FLEN/8, x4, x1, x2) - -inst_15628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57f8000; valaddr_reg:x3; val_offset:46884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46884*FLEN/8, x4, x1, x2) - -inst_15629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57fc000; valaddr_reg:x3; val_offset:46887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46887*FLEN/8, x4, x1, x2) - -inst_15630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57fe000; valaddr_reg:x3; val_offset:46890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46890*FLEN/8, x4, x1, x2) - -inst_15631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57ff000; valaddr_reg:x3; val_offset:46893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46893*FLEN/8, x4, x1, x2) - -inst_15632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57ff800; valaddr_reg:x3; val_offset:46896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46896*FLEN/8, x4, x1, x2) - -inst_15633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57ffc00; valaddr_reg:x3; val_offset:46899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46899*FLEN/8, x4, x1, x2) - -inst_15634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57ffe00; valaddr_reg:x3; val_offset:46902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46902*FLEN/8, x4, x1, x2) - -inst_15635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57fff00; valaddr_reg:x3; val_offset:46905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46905*FLEN/8, x4, x1, x2) - -inst_15636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57fff80; valaddr_reg:x3; val_offset:46908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46908*FLEN/8, x4, x1, x2) - -inst_15637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57fffc0; valaddr_reg:x3; val_offset:46911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46911*FLEN/8, x4, x1, x2) - -inst_15638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57fffe0; valaddr_reg:x3; val_offset:46914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46914*FLEN/8, x4, x1, x2) - -inst_15639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57ffff0; valaddr_reg:x3; val_offset:46917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46917*FLEN/8, x4, x1, x2) - -inst_15640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57ffff8; valaddr_reg:x3; val_offset:46920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46920*FLEN/8, x4, x1, x2) - -inst_15641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57ffffc; valaddr_reg:x3; val_offset:46923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46923*FLEN/8, x4, x1, x2) - -inst_15642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57ffffe; valaddr_reg:x3; val_offset:46926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46926*FLEN/8, x4, x1, x2) - -inst_15643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; -op3val:0x57fffff; valaddr_reg:x3; val_offset:46929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46929*FLEN/8, x4, x1, x2) - -inst_15644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0000000; valaddr_reg:x3; val_offset:46932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46932*FLEN/8, x4, x1, x2) - -inst_15645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0000001; valaddr_reg:x3; val_offset:46935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46935*FLEN/8, x4, x1, x2) - -inst_15646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0000003; valaddr_reg:x3; val_offset:46938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46938*FLEN/8, x4, x1, x2) - -inst_15647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0000007; valaddr_reg:x3; val_offset:46941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46941*FLEN/8, x4, x1, x2) - -inst_15648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb000000f; valaddr_reg:x3; val_offset:46944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46944*FLEN/8, x4, x1, x2) - -inst_15649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb000001f; valaddr_reg:x3; val_offset:46947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46947*FLEN/8, x4, x1, x2) - -inst_15650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb000003f; valaddr_reg:x3; val_offset:46950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46950*FLEN/8, x4, x1, x2) - -inst_15651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb000007f; valaddr_reg:x3; val_offset:46953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46953*FLEN/8, x4, x1, x2) - -inst_15652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb00000ff; valaddr_reg:x3; val_offset:46956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46956*FLEN/8, x4, x1, x2) - -inst_15653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb00001ff; valaddr_reg:x3; val_offset:46959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46959*FLEN/8, x4, x1, x2) - -inst_15654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb00003ff; valaddr_reg:x3; val_offset:46962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46962*FLEN/8, x4, x1, x2) - -inst_15655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb00007ff; valaddr_reg:x3; val_offset:46965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46965*FLEN/8, x4, x1, x2) - -inst_15656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0000fff; valaddr_reg:x3; val_offset:46968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46968*FLEN/8, x4, x1, x2) - -inst_15657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0001fff; valaddr_reg:x3; val_offset:46971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46971*FLEN/8, x4, x1, x2) - -inst_15658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0003fff; valaddr_reg:x3; val_offset:46974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46974*FLEN/8, x4, x1, x2) - -inst_15659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0007fff; valaddr_reg:x3; val_offset:46977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46977*FLEN/8, x4, x1, x2) - -inst_15660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb000ffff; valaddr_reg:x3; val_offset:46980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46980*FLEN/8, x4, x1, x2) - -inst_15661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb001ffff; valaddr_reg:x3; val_offset:46983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46983*FLEN/8, x4, x1, x2) - -inst_15662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb003ffff; valaddr_reg:x3; val_offset:46986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46986*FLEN/8, x4, x1, x2) - -inst_15663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb007ffff; valaddr_reg:x3; val_offset:46989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46989*FLEN/8, x4, x1, x2) - -inst_15664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb00fffff; valaddr_reg:x3; val_offset:46992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46992*FLEN/8, x4, x1, x2) - -inst_15665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb01fffff; valaddr_reg:x3; val_offset:46995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46995*FLEN/8, x4, x1, x2) - -inst_15666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb03fffff; valaddr_reg:x3; val_offset:46998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46998*FLEN/8, x4, x1, x2) - -inst_15667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0400000; valaddr_reg:x3; val_offset:47001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47001*FLEN/8, x4, x1, x2) - -inst_15668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0600000; valaddr_reg:x3; val_offset:47004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47004*FLEN/8, x4, x1, x2) - -inst_15669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0700000; valaddr_reg:x3; val_offset:47007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47007*FLEN/8, x4, x1, x2) - -inst_15670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb0780000; valaddr_reg:x3; val_offset:47010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47010*FLEN/8, x4, x1, x2) - -inst_15671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07c0000; valaddr_reg:x3; val_offset:47013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47013*FLEN/8, x4, x1, x2) - -inst_15672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07e0000; valaddr_reg:x3; val_offset:47016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47016*FLEN/8, x4, x1, x2) - -inst_15673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07f0000; valaddr_reg:x3; val_offset:47019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47019*FLEN/8, x4, x1, x2) - -inst_15674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07f8000; valaddr_reg:x3; val_offset:47022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47022*FLEN/8, x4, x1, x2) - -inst_15675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07fc000; valaddr_reg:x3; val_offset:47025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47025*FLEN/8, x4, x1, x2) - -inst_15676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07fe000; valaddr_reg:x3; val_offset:47028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47028*FLEN/8, x4, x1, x2) - -inst_15677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07ff000; valaddr_reg:x3; val_offset:47031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47031*FLEN/8, x4, x1, x2) - -inst_15678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07ff800; valaddr_reg:x3; val_offset:47034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47034*FLEN/8, x4, x1, x2) - -inst_15679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07ffc00; valaddr_reg:x3; val_offset:47037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47037*FLEN/8, x4, x1, x2) - -inst_15680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07ffe00; valaddr_reg:x3; val_offset:47040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47040*FLEN/8, x4, x1, x2) - -inst_15681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07fff00; valaddr_reg:x3; val_offset:47043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47043*FLEN/8, x4, x1, x2) - -inst_15682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07fff80; valaddr_reg:x3; val_offset:47046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47046*FLEN/8, x4, x1, x2) - -inst_15683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07fffc0; valaddr_reg:x3; val_offset:47049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47049*FLEN/8, x4, x1, x2) - -inst_15684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07fffe0; valaddr_reg:x3; val_offset:47052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47052*FLEN/8, x4, x1, x2) - -inst_15685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07ffff0; valaddr_reg:x3; val_offset:47055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47055*FLEN/8, x4, x1, x2) - -inst_15686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07ffff8; valaddr_reg:x3; val_offset:47058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47058*FLEN/8, x4, x1, x2) - -inst_15687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07ffffc; valaddr_reg:x3; val_offset:47061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47061*FLEN/8, x4, x1, x2) - -inst_15688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07ffffe; valaddr_reg:x3; val_offset:47064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47064*FLEN/8, x4, x1, x2) - -inst_15689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xb07fffff; valaddr_reg:x3; val_offset:47067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47067*FLEN/8, x4, x1, x2) - -inst_15690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff000001; valaddr_reg:x3; val_offset:47070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47070*FLEN/8, x4, x1, x2) - -inst_15691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff000003; valaddr_reg:x3; val_offset:47073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47073*FLEN/8, x4, x1, x2) - -inst_15692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff000007; valaddr_reg:x3; val_offset:47076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47076*FLEN/8, x4, x1, x2) - -inst_15693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff199999; valaddr_reg:x3; val_offset:47079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47079*FLEN/8, x4, x1, x2) - -inst_15694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff249249; valaddr_reg:x3; val_offset:47082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47082*FLEN/8, x4, x1, x2) - -inst_15695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff333333; valaddr_reg:x3; val_offset:47085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47085*FLEN/8, x4, x1, x2) - -inst_15696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:47088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47088*FLEN/8, x4, x1, x2) - -inst_15697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:47091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47091*FLEN/8, x4, x1, x2) - -inst_15698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff444444; valaddr_reg:x3; val_offset:47094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47094*FLEN/8, x4, x1, x2) - -inst_15699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:47097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47097*FLEN/8, x4, x1, x2) - -inst_15700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:47100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47100*FLEN/8, x4, x1, x2) - -inst_15701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff666666; valaddr_reg:x3; val_offset:47103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47103*FLEN/8, x4, x1, x2) - -inst_15702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:47106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47106*FLEN/8, x4, x1, x2) - -inst_15703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:47109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47109*FLEN/8, x4, x1, x2) - -inst_15704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:47112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47112*FLEN/8, x4, x1, x2) - -inst_15705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:47115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47115*FLEN/8, x4, x1, x2) - -inst_15706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:47118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47118*FLEN/8, x4, x1, x2) - -inst_15707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:47121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47121*FLEN/8, x4, x1, x2) - -inst_15708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:47124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47124*FLEN/8, x4, x1, x2) - -inst_15709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:47127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47127*FLEN/8, x4, x1, x2) - -inst_15710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:47130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47130*FLEN/8, x4, x1, x2) - -inst_15711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:47133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47133*FLEN/8, x4, x1, x2) - -inst_15712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:47136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47136*FLEN/8, x4, x1, x2) - -inst_15713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:47139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47139*FLEN/8, x4, x1, x2) - -inst_15714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:47142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47142*FLEN/8, x4, x1, x2) - -inst_15715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:47145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47145*FLEN/8, x4, x1, x2) - -inst_15716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:47148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47148*FLEN/8, x4, x1, x2) - -inst_15717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:47151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47151*FLEN/8, x4, x1, x2) - -inst_15718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:47154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47154*FLEN/8, x4, x1, x2) - -inst_15719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:47157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47157*FLEN/8, x4, x1, x2) - -inst_15720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:47160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47160*FLEN/8, x4, x1, x2) - -inst_15721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:47163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47163*FLEN/8, x4, x1, x2) - -inst_15722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4000000; valaddr_reg:x3; val_offset:47166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47166*FLEN/8, x4, x1, x2) - -inst_15723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4000001; valaddr_reg:x3; val_offset:47169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47169*FLEN/8, x4, x1, x2) - -inst_15724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4000003; valaddr_reg:x3; val_offset:47172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47172*FLEN/8, x4, x1, x2) - -inst_15725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4000007; valaddr_reg:x3; val_offset:47175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47175*FLEN/8, x4, x1, x2) - -inst_15726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x400000f; valaddr_reg:x3; val_offset:47178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47178*FLEN/8, x4, x1, x2) - -inst_15727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x400001f; valaddr_reg:x3; val_offset:47181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47181*FLEN/8, x4, x1, x2) - -inst_15728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x400003f; valaddr_reg:x3; val_offset:47184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47184*FLEN/8, x4, x1, x2) - -inst_15729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x400007f; valaddr_reg:x3; val_offset:47187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47187*FLEN/8, x4, x1, x2) - -inst_15730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x40000ff; valaddr_reg:x3; val_offset:47190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47190*FLEN/8, x4, x1, x2) - -inst_15731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x40001ff; valaddr_reg:x3; val_offset:47193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47193*FLEN/8, x4, x1, x2) - -inst_15732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x40003ff; valaddr_reg:x3; val_offset:47196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47196*FLEN/8, x4, x1, x2) - -inst_15733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x40007ff; valaddr_reg:x3; val_offset:47199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47199*FLEN/8, x4, x1, x2) - -inst_15734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4000fff; valaddr_reg:x3; val_offset:47202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47202*FLEN/8, x4, x1, x2) - -inst_15735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4001fff; valaddr_reg:x3; val_offset:47205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47205*FLEN/8, x4, x1, x2) - -inst_15736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4003fff; valaddr_reg:x3; val_offset:47208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47208*FLEN/8, x4, x1, x2) - -inst_15737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4007fff; valaddr_reg:x3; val_offset:47211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47211*FLEN/8, x4, x1, x2) - -inst_15738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x400ffff; valaddr_reg:x3; val_offset:47214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47214*FLEN/8, x4, x1, x2) - -inst_15739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x401ffff; valaddr_reg:x3; val_offset:47217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47217*FLEN/8, x4, x1, x2) - -inst_15740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x403ffff; valaddr_reg:x3; val_offset:47220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47220*FLEN/8, x4, x1, x2) - -inst_15741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x407ffff; valaddr_reg:x3; val_offset:47223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47223*FLEN/8, x4, x1, x2) - -inst_15742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x40fffff; valaddr_reg:x3; val_offset:47226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47226*FLEN/8, x4, x1, x2) - -inst_15743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x41fffff; valaddr_reg:x3; val_offset:47229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47229*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_124) - -inst_15744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x43fffff; valaddr_reg:x3; val_offset:47232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47232*FLEN/8, x4, x1, x2) - -inst_15745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4400000; valaddr_reg:x3; val_offset:47235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47235*FLEN/8, x4, x1, x2) - -inst_15746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4600000; valaddr_reg:x3; val_offset:47238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47238*FLEN/8, x4, x1, x2) - -inst_15747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4700000; valaddr_reg:x3; val_offset:47241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47241*FLEN/8, x4, x1, x2) - -inst_15748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x4780000; valaddr_reg:x3; val_offset:47244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47244*FLEN/8, x4, x1, x2) - -inst_15749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47c0000; valaddr_reg:x3; val_offset:47247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47247*FLEN/8, x4, x1, x2) - -inst_15750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47e0000; valaddr_reg:x3; val_offset:47250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47250*FLEN/8, x4, x1, x2) - -inst_15751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47f0000; valaddr_reg:x3; val_offset:47253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47253*FLEN/8, x4, x1, x2) - -inst_15752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47f8000; valaddr_reg:x3; val_offset:47256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47256*FLEN/8, x4, x1, x2) - -inst_15753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47fc000; valaddr_reg:x3; val_offset:47259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47259*FLEN/8, x4, x1, x2) - -inst_15754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47fe000; valaddr_reg:x3; val_offset:47262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47262*FLEN/8, x4, x1, x2) - -inst_15755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47ff000; valaddr_reg:x3; val_offset:47265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47265*FLEN/8, x4, x1, x2) - -inst_15756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47ff800; valaddr_reg:x3; val_offset:47268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47268*FLEN/8, x4, x1, x2) - -inst_15757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47ffc00; valaddr_reg:x3; val_offset:47271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47271*FLEN/8, x4, x1, x2) - -inst_15758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47ffe00; valaddr_reg:x3; val_offset:47274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47274*FLEN/8, x4, x1, x2) - -inst_15759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47fff00; valaddr_reg:x3; val_offset:47277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47277*FLEN/8, x4, x1, x2) - -inst_15760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47fff80; valaddr_reg:x3; val_offset:47280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47280*FLEN/8, x4, x1, x2) - -inst_15761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47fffc0; valaddr_reg:x3; val_offset:47283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47283*FLEN/8, x4, x1, x2) - -inst_15762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47fffe0; valaddr_reg:x3; val_offset:47286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47286*FLEN/8, x4, x1, x2) - -inst_15763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47ffff0; valaddr_reg:x3; val_offset:47289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47289*FLEN/8, x4, x1, x2) - -inst_15764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47ffff8; valaddr_reg:x3; val_offset:47292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47292*FLEN/8, x4, x1, x2) - -inst_15765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47ffffc; valaddr_reg:x3; val_offset:47295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47295*FLEN/8, x4, x1, x2) - -inst_15766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47ffffe; valaddr_reg:x3; val_offset:47298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47298*FLEN/8, x4, x1, x2) - -inst_15767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; -op3val:0x47fffff; valaddr_reg:x3; val_offset:47301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47301*FLEN/8, x4, x1, x2) - -inst_15768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:47304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47304*FLEN/8, x4, x1, x2) - -inst_15769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:47307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47307*FLEN/8, x4, x1, x2) - -inst_15770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:47310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47310*FLEN/8, x4, x1, x2) - -inst_15771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:47313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47313*FLEN/8, x4, x1, x2) - -inst_15772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:47316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47316*FLEN/8, x4, x1, x2) - -inst_15773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:47319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47319*FLEN/8, x4, x1, x2) - -inst_15774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:47322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47322*FLEN/8, x4, x1, x2) - -inst_15775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:47325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47325*FLEN/8, x4, x1, x2) - -inst_15776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:47328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47328*FLEN/8, x4, x1, x2) - -inst_15777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:47331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47331*FLEN/8, x4, x1, x2) - -inst_15778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:47334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47334*FLEN/8, x4, x1, x2) - -inst_15779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:47337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47337*FLEN/8, x4, x1, x2) - -inst_15780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:47340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47340*FLEN/8, x4, x1, x2) - -inst_15781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:47343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47343*FLEN/8, x4, x1, x2) - -inst_15782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:47346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47346*FLEN/8, x4, x1, x2) - -inst_15783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:47349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47349*FLEN/8, x4, x1, x2) - -inst_15784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6000000; valaddr_reg:x3; val_offset:47352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47352*FLEN/8, x4, x1, x2) - -inst_15785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6000001; valaddr_reg:x3; val_offset:47355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47355*FLEN/8, x4, x1, x2) - -inst_15786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6000003; valaddr_reg:x3; val_offset:47358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47358*FLEN/8, x4, x1, x2) - -inst_15787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6000007; valaddr_reg:x3; val_offset:47361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47361*FLEN/8, x4, x1, x2) - -inst_15788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x600000f; valaddr_reg:x3; val_offset:47364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47364*FLEN/8, x4, x1, x2) - -inst_15789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x600001f; valaddr_reg:x3; val_offset:47367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47367*FLEN/8, x4, x1, x2) - -inst_15790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x600003f; valaddr_reg:x3; val_offset:47370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47370*FLEN/8, x4, x1, x2) - -inst_15791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x600007f; valaddr_reg:x3; val_offset:47373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47373*FLEN/8, x4, x1, x2) - -inst_15792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x60000ff; valaddr_reg:x3; val_offset:47376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47376*FLEN/8, x4, x1, x2) - -inst_15793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x60001ff; valaddr_reg:x3; val_offset:47379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47379*FLEN/8, x4, x1, x2) - -inst_15794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x60003ff; valaddr_reg:x3; val_offset:47382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47382*FLEN/8, x4, x1, x2) - -inst_15795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x60007ff; valaddr_reg:x3; val_offset:47385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47385*FLEN/8, x4, x1, x2) - -inst_15796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6000fff; valaddr_reg:x3; val_offset:47388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47388*FLEN/8, x4, x1, x2) - -inst_15797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6001fff; valaddr_reg:x3; val_offset:47391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47391*FLEN/8, x4, x1, x2) - -inst_15798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6003fff; valaddr_reg:x3; val_offset:47394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47394*FLEN/8, x4, x1, x2) - -inst_15799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6007fff; valaddr_reg:x3; val_offset:47397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47397*FLEN/8, x4, x1, x2) - -inst_15800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x600ffff; valaddr_reg:x3; val_offset:47400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47400*FLEN/8, x4, x1, x2) - -inst_15801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x601ffff; valaddr_reg:x3; val_offset:47403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47403*FLEN/8, x4, x1, x2) - -inst_15802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x603ffff; valaddr_reg:x3; val_offset:47406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47406*FLEN/8, x4, x1, x2) - -inst_15803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x607ffff; valaddr_reg:x3; val_offset:47409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47409*FLEN/8, x4, x1, x2) - -inst_15804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x60fffff; valaddr_reg:x3; val_offset:47412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47412*FLEN/8, x4, x1, x2) - -inst_15805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x61fffff; valaddr_reg:x3; val_offset:47415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47415*FLEN/8, x4, x1, x2) - -inst_15806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x63fffff; valaddr_reg:x3; val_offset:47418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47418*FLEN/8, x4, x1, x2) - -inst_15807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6400000; valaddr_reg:x3; val_offset:47421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47421*FLEN/8, x4, x1, x2) - -inst_15808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6600000; valaddr_reg:x3; val_offset:47424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47424*FLEN/8, x4, x1, x2) - -inst_15809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6700000; valaddr_reg:x3; val_offset:47427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47427*FLEN/8, x4, x1, x2) - -inst_15810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x6780000; valaddr_reg:x3; val_offset:47430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47430*FLEN/8, x4, x1, x2) - -inst_15811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67c0000; valaddr_reg:x3; val_offset:47433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47433*FLEN/8, x4, x1, x2) - -inst_15812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67e0000; valaddr_reg:x3; val_offset:47436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47436*FLEN/8, x4, x1, x2) - -inst_15813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67f0000; valaddr_reg:x3; val_offset:47439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47439*FLEN/8, x4, x1, x2) - -inst_15814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67f8000; valaddr_reg:x3; val_offset:47442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47442*FLEN/8, x4, x1, x2) - -inst_15815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67fc000; valaddr_reg:x3; val_offset:47445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47445*FLEN/8, x4, x1, x2) - -inst_15816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67fe000; valaddr_reg:x3; val_offset:47448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47448*FLEN/8, x4, x1, x2) - -inst_15817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67ff000; valaddr_reg:x3; val_offset:47451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47451*FLEN/8, x4, x1, x2) - -inst_15818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67ff800; valaddr_reg:x3; val_offset:47454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47454*FLEN/8, x4, x1, x2) - -inst_15819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67ffc00; valaddr_reg:x3; val_offset:47457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47457*FLEN/8, x4, x1, x2) - -inst_15820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67ffe00; valaddr_reg:x3; val_offset:47460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47460*FLEN/8, x4, x1, x2) - -inst_15821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67fff00; valaddr_reg:x3; val_offset:47463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47463*FLEN/8, x4, x1, x2) - -inst_15822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67fff80; valaddr_reg:x3; val_offset:47466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47466*FLEN/8, x4, x1, x2) - -inst_15823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67fffc0; valaddr_reg:x3; val_offset:47469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47469*FLEN/8, x4, x1, x2) - -inst_15824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67fffe0; valaddr_reg:x3; val_offset:47472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47472*FLEN/8, x4, x1, x2) - -inst_15825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67ffff0; valaddr_reg:x3; val_offset:47475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47475*FLEN/8, x4, x1, x2) - -inst_15826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67ffff8; valaddr_reg:x3; val_offset:47478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47478*FLEN/8, x4, x1, x2) - -inst_15827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67ffffc; valaddr_reg:x3; val_offset:47481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47481*FLEN/8, x4, x1, x2) - -inst_15828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67ffffe; valaddr_reg:x3; val_offset:47484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47484*FLEN/8, x4, x1, x2) - -inst_15829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; -op3val:0x67fffff; valaddr_reg:x3; val_offset:47487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47487*FLEN/8, x4, x1, x2) - -inst_15830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd000000; valaddr_reg:x3; val_offset:47490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47490*FLEN/8, x4, x1, x2) - -inst_15831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd000001; valaddr_reg:x3; val_offset:47493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47493*FLEN/8, x4, x1, x2) - -inst_15832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd000003; valaddr_reg:x3; val_offset:47496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47496*FLEN/8, x4, x1, x2) - -inst_15833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd000007; valaddr_reg:x3; val_offset:47499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47499*FLEN/8, x4, x1, x2) - -inst_15834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd00000f; valaddr_reg:x3; val_offset:47502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47502*FLEN/8, x4, x1, x2) - -inst_15835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd00001f; valaddr_reg:x3; val_offset:47505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47505*FLEN/8, x4, x1, x2) - -inst_15836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd00003f; valaddr_reg:x3; val_offset:47508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47508*FLEN/8, x4, x1, x2) - -inst_15837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd00007f; valaddr_reg:x3; val_offset:47511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47511*FLEN/8, x4, x1, x2) - -inst_15838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd0000ff; valaddr_reg:x3; val_offset:47514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47514*FLEN/8, x4, x1, x2) - -inst_15839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd0001ff; valaddr_reg:x3; val_offset:47517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47517*FLEN/8, x4, x1, x2) - -inst_15840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd0003ff; valaddr_reg:x3; val_offset:47520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47520*FLEN/8, x4, x1, x2) - -inst_15841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd0007ff; valaddr_reg:x3; val_offset:47523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47523*FLEN/8, x4, x1, x2) - -inst_15842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd000fff; valaddr_reg:x3; val_offset:47526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47526*FLEN/8, x4, x1, x2) - -inst_15843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd001fff; valaddr_reg:x3; val_offset:47529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47529*FLEN/8, x4, x1, x2) - -inst_15844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd003fff; valaddr_reg:x3; val_offset:47532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47532*FLEN/8, x4, x1, x2) - -inst_15845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd007fff; valaddr_reg:x3; val_offset:47535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47535*FLEN/8, x4, x1, x2) - -inst_15846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd00ffff; valaddr_reg:x3; val_offset:47538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47538*FLEN/8, x4, x1, x2) - -inst_15847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd01ffff; valaddr_reg:x3; val_offset:47541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47541*FLEN/8, x4, x1, x2) - -inst_15848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd03ffff; valaddr_reg:x3; val_offset:47544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47544*FLEN/8, x4, x1, x2) - -inst_15849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd07ffff; valaddr_reg:x3; val_offset:47547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47547*FLEN/8, x4, x1, x2) - -inst_15850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd0fffff; valaddr_reg:x3; val_offset:47550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47550*FLEN/8, x4, x1, x2) - -inst_15851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd1fffff; valaddr_reg:x3; val_offset:47553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47553*FLEN/8, x4, x1, x2) - -inst_15852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd3fffff; valaddr_reg:x3; val_offset:47556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47556*FLEN/8, x4, x1, x2) - -inst_15853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd400000; valaddr_reg:x3; val_offset:47559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47559*FLEN/8, x4, x1, x2) - -inst_15854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd600000; valaddr_reg:x3; val_offset:47562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47562*FLEN/8, x4, x1, x2) - -inst_15855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd700000; valaddr_reg:x3; val_offset:47565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47565*FLEN/8, x4, x1, x2) - -inst_15856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd780000; valaddr_reg:x3; val_offset:47568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47568*FLEN/8, x4, x1, x2) - -inst_15857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7c0000; valaddr_reg:x3; val_offset:47571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47571*FLEN/8, x4, x1, x2) - -inst_15858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7e0000; valaddr_reg:x3; val_offset:47574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47574*FLEN/8, x4, x1, x2) - -inst_15859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7f0000; valaddr_reg:x3; val_offset:47577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47577*FLEN/8, x4, x1, x2) - -inst_15860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7f8000; valaddr_reg:x3; val_offset:47580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47580*FLEN/8, x4, x1, x2) - -inst_15861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7fc000; valaddr_reg:x3; val_offset:47583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47583*FLEN/8, x4, x1, x2) - -inst_15862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7fe000; valaddr_reg:x3; val_offset:47586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47586*FLEN/8, x4, x1, x2) - -inst_15863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7ff000; valaddr_reg:x3; val_offset:47589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47589*FLEN/8, x4, x1, x2) - -inst_15864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7ff800; valaddr_reg:x3; val_offset:47592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47592*FLEN/8, x4, x1, x2) - -inst_15865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7ffc00; valaddr_reg:x3; val_offset:47595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47595*FLEN/8, x4, x1, x2) - -inst_15866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7ffe00; valaddr_reg:x3; val_offset:47598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47598*FLEN/8, x4, x1, x2) - -inst_15867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7fff00; valaddr_reg:x3; val_offset:47601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47601*FLEN/8, x4, x1, x2) - -inst_15868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7fff80; valaddr_reg:x3; val_offset:47604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47604*FLEN/8, x4, x1, x2) - -inst_15869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7fffc0; valaddr_reg:x3; val_offset:47607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47607*FLEN/8, x4, x1, x2) - -inst_15870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7fffe0; valaddr_reg:x3; val_offset:47610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47610*FLEN/8, x4, x1, x2) - -inst_15871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7ffff0; valaddr_reg:x3; val_offset:47613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47613*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_125) - -inst_15872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7ffff8; valaddr_reg:x3; val_offset:47616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47616*FLEN/8, x4, x1, x2) - -inst_15873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7ffffc; valaddr_reg:x3; val_offset:47619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47619*FLEN/8, x4, x1, x2) - -inst_15874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7ffffe; valaddr_reg:x3; val_offset:47622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47622*FLEN/8, x4, x1, x2) - -inst_15875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xfd7fffff; valaddr_reg:x3; val_offset:47625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47625*FLEN/8, x4, x1, x2) - -inst_15876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff000001; valaddr_reg:x3; val_offset:47628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47628*FLEN/8, x4, x1, x2) - -inst_15877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff000003; valaddr_reg:x3; val_offset:47631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47631*FLEN/8, x4, x1, x2) - -inst_15878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff000007; valaddr_reg:x3; val_offset:47634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47634*FLEN/8, x4, x1, x2) - -inst_15879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff199999; valaddr_reg:x3; val_offset:47637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47637*FLEN/8, x4, x1, x2) - -inst_15880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff249249; valaddr_reg:x3; val_offset:47640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47640*FLEN/8, x4, x1, x2) - -inst_15881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff333333; valaddr_reg:x3; val_offset:47643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47643*FLEN/8, x4, x1, x2) - -inst_15882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:47646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47646*FLEN/8, x4, x1, x2) - -inst_15883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:47649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47649*FLEN/8, x4, x1, x2) - -inst_15884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff444444; valaddr_reg:x3; val_offset:47652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47652*FLEN/8, x4, x1, x2) - -inst_15885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:47655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47655*FLEN/8, x4, x1, x2) - -inst_15886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:47658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47658*FLEN/8, x4, x1, x2) - -inst_15887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff666666; valaddr_reg:x3; val_offset:47661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47661*FLEN/8, x4, x1, x2) - -inst_15888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:47664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47664*FLEN/8, x4, x1, x2) - -inst_15889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:47667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47667*FLEN/8, x4, x1, x2) - -inst_15890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:47670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47670*FLEN/8, x4, x1, x2) - -inst_15891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:47673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47673*FLEN/8, x4, x1, x2) - -inst_15892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2000000; valaddr_reg:x3; val_offset:47676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47676*FLEN/8, x4, x1, x2) - -inst_15893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2000001; valaddr_reg:x3; val_offset:47679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47679*FLEN/8, x4, x1, x2) - -inst_15894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2000003; valaddr_reg:x3; val_offset:47682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47682*FLEN/8, x4, x1, x2) - -inst_15895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2000007; valaddr_reg:x3; val_offset:47685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47685*FLEN/8, x4, x1, x2) - -inst_15896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb200000f; valaddr_reg:x3; val_offset:47688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47688*FLEN/8, x4, x1, x2) - -inst_15897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb200001f; valaddr_reg:x3; val_offset:47691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47691*FLEN/8, x4, x1, x2) - -inst_15898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb200003f; valaddr_reg:x3; val_offset:47694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47694*FLEN/8, x4, x1, x2) - -inst_15899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb200007f; valaddr_reg:x3; val_offset:47697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47697*FLEN/8, x4, x1, x2) - -inst_15900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb20000ff; valaddr_reg:x3; val_offset:47700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47700*FLEN/8, x4, x1, x2) - -inst_15901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb20001ff; valaddr_reg:x3; val_offset:47703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47703*FLEN/8, x4, x1, x2) - -inst_15902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb20003ff; valaddr_reg:x3; val_offset:47706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47706*FLEN/8, x4, x1, x2) - -inst_15903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb20007ff; valaddr_reg:x3; val_offset:47709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47709*FLEN/8, x4, x1, x2) - -inst_15904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2000fff; valaddr_reg:x3; val_offset:47712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47712*FLEN/8, x4, x1, x2) - -inst_15905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2001fff; valaddr_reg:x3; val_offset:47715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47715*FLEN/8, x4, x1, x2) - -inst_15906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2003fff; valaddr_reg:x3; val_offset:47718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47718*FLEN/8, x4, x1, x2) - -inst_15907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2007fff; valaddr_reg:x3; val_offset:47721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47721*FLEN/8, x4, x1, x2) - -inst_15908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb200ffff; valaddr_reg:x3; val_offset:47724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47724*FLEN/8, x4, x1, x2) - -inst_15909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb201ffff; valaddr_reg:x3; val_offset:47727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47727*FLEN/8, x4, x1, x2) - -inst_15910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb203ffff; valaddr_reg:x3; val_offset:47730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47730*FLEN/8, x4, x1, x2) - -inst_15911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb207ffff; valaddr_reg:x3; val_offset:47733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47733*FLEN/8, x4, x1, x2) - -inst_15912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb20fffff; valaddr_reg:x3; val_offset:47736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47736*FLEN/8, x4, x1, x2) - -inst_15913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb21fffff; valaddr_reg:x3; val_offset:47739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47739*FLEN/8, x4, x1, x2) - -inst_15914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb23fffff; valaddr_reg:x3; val_offset:47742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47742*FLEN/8, x4, x1, x2) - -inst_15915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2400000; valaddr_reg:x3; val_offset:47745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47745*FLEN/8, x4, x1, x2) - -inst_15916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2600000; valaddr_reg:x3; val_offset:47748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47748*FLEN/8, x4, x1, x2) - -inst_15917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2700000; valaddr_reg:x3; val_offset:47751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47751*FLEN/8, x4, x1, x2) - -inst_15918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb2780000; valaddr_reg:x3; val_offset:47754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47754*FLEN/8, x4, x1, x2) - -inst_15919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27c0000; valaddr_reg:x3; val_offset:47757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47757*FLEN/8, x4, x1, x2) - -inst_15920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27e0000; valaddr_reg:x3; val_offset:47760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47760*FLEN/8, x4, x1, x2) - -inst_15921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27f0000; valaddr_reg:x3; val_offset:47763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47763*FLEN/8, x4, x1, x2) - -inst_15922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27f8000; valaddr_reg:x3; val_offset:47766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47766*FLEN/8, x4, x1, x2) - -inst_15923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27fc000; valaddr_reg:x3; val_offset:47769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47769*FLEN/8, x4, x1, x2) - -inst_15924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27fe000; valaddr_reg:x3; val_offset:47772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47772*FLEN/8, x4, x1, x2) - -inst_15925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27ff000; valaddr_reg:x3; val_offset:47775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47775*FLEN/8, x4, x1, x2) - -inst_15926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27ff800; valaddr_reg:x3; val_offset:47778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47778*FLEN/8, x4, x1, x2) - -inst_15927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27ffc00; valaddr_reg:x3; val_offset:47781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47781*FLEN/8, x4, x1, x2) - -inst_15928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27ffe00; valaddr_reg:x3; val_offset:47784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47784*FLEN/8, x4, x1, x2) - -inst_15929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27fff00; valaddr_reg:x3; val_offset:47787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47787*FLEN/8, x4, x1, x2) - -inst_15930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27fff80; valaddr_reg:x3; val_offset:47790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47790*FLEN/8, x4, x1, x2) - -inst_15931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27fffc0; valaddr_reg:x3; val_offset:47793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47793*FLEN/8, x4, x1, x2) - -inst_15932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27fffe0; valaddr_reg:x3; val_offset:47796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47796*FLEN/8, x4, x1, x2) - -inst_15933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27ffff0; valaddr_reg:x3; val_offset:47799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47799*FLEN/8, x4, x1, x2) - -inst_15934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27ffff8; valaddr_reg:x3; val_offset:47802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47802*FLEN/8, x4, x1, x2) - -inst_15935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27ffffc; valaddr_reg:x3; val_offset:47805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47805*FLEN/8, x4, x1, x2) - -inst_15936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27ffffe; valaddr_reg:x3; val_offset:47808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47808*FLEN/8, x4, x1, x2) - -inst_15937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xb27fffff; valaddr_reg:x3; val_offset:47811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47811*FLEN/8, x4, x1, x2) - -inst_15938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbf800001; valaddr_reg:x3; val_offset:47814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47814*FLEN/8, x4, x1, x2) - -inst_15939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbf800003; valaddr_reg:x3; val_offset:47817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47817*FLEN/8, x4, x1, x2) - -inst_15940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbf800007; valaddr_reg:x3; val_offset:47820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47820*FLEN/8, x4, x1, x2) - -inst_15941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbf999999; valaddr_reg:x3; val_offset:47823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47823*FLEN/8, x4, x1, x2) - -inst_15942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:47826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47826*FLEN/8, x4, x1, x2) - -inst_15943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:47829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47829*FLEN/8, x4, x1, x2) - -inst_15944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:47832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47832*FLEN/8, x4, x1, x2) - -inst_15945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:47835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47835*FLEN/8, x4, x1, x2) - -inst_15946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:47838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47838*FLEN/8, x4, x1, x2) - -inst_15947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:47841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47841*FLEN/8, x4, x1, x2) - -inst_15948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:47844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47844*FLEN/8, x4, x1, x2) - -inst_15949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:47847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47847*FLEN/8, x4, x1, x2) - -inst_15950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:47850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47850*FLEN/8, x4, x1, x2) - -inst_15951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:47853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47853*FLEN/8, x4, x1, x2) - -inst_15952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:47856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47856*FLEN/8, x4, x1, x2) - -inst_15953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:47859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47859*FLEN/8, x4, x1, x2) - -inst_15954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:47862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47862*FLEN/8, x4, x1, x2) - -inst_15955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:47865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47865*FLEN/8, x4, x1, x2) - -inst_15956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:47868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47868*FLEN/8, x4, x1, x2) - -inst_15957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:47871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47871*FLEN/8, x4, x1, x2) - -inst_15958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:47874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47874*FLEN/8, x4, x1, x2) - -inst_15959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:47877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47877*FLEN/8, x4, x1, x2) - -inst_15960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:47880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47880*FLEN/8, x4, x1, x2) - -inst_15961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:47883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47883*FLEN/8, x4, x1, x2) - -inst_15962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:47886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47886*FLEN/8, x4, x1, x2) - -inst_15963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:47889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47889*FLEN/8, x4, x1, x2) - -inst_15964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:47892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47892*FLEN/8, x4, x1, x2) - -inst_15965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:47895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47895*FLEN/8, x4, x1, x2) - -inst_15966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:47898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47898*FLEN/8, x4, x1, x2) - -inst_15967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:47901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47901*FLEN/8, x4, x1, x2) - -inst_15968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:47904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47904*FLEN/8, x4, x1, x2) - -inst_15969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:47907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47907*FLEN/8, x4, x1, x2) - -inst_15970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f800000; valaddr_reg:x3; val_offset:47910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47910*FLEN/8, x4, x1, x2) - -inst_15971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f800001; valaddr_reg:x3; val_offset:47913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47913*FLEN/8, x4, x1, x2) - -inst_15972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f800003; valaddr_reg:x3; val_offset:47916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47916*FLEN/8, x4, x1, x2) - -inst_15973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f800007; valaddr_reg:x3; val_offset:47919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47919*FLEN/8, x4, x1, x2) - -inst_15974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f80000f; valaddr_reg:x3; val_offset:47922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47922*FLEN/8, x4, x1, x2) - -inst_15975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f80001f; valaddr_reg:x3; val_offset:47925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47925*FLEN/8, x4, x1, x2) - -inst_15976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f80003f; valaddr_reg:x3; val_offset:47928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47928*FLEN/8, x4, x1, x2) - -inst_15977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f80007f; valaddr_reg:x3; val_offset:47931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47931*FLEN/8, x4, x1, x2) - -inst_15978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f8000ff; valaddr_reg:x3; val_offset:47934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47934*FLEN/8, x4, x1, x2) - -inst_15979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f8001ff; valaddr_reg:x3; val_offset:47937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47937*FLEN/8, x4, x1, x2) - -inst_15980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f8003ff; valaddr_reg:x3; val_offset:47940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47940*FLEN/8, x4, x1, x2) - -inst_15981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f8007ff; valaddr_reg:x3; val_offset:47943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47943*FLEN/8, x4, x1, x2) - -inst_15982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f800fff; valaddr_reg:x3; val_offset:47946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47946*FLEN/8, x4, x1, x2) - -inst_15983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f801fff; valaddr_reg:x3; val_offset:47949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47949*FLEN/8, x4, x1, x2) - -inst_15984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f803fff; valaddr_reg:x3; val_offset:47952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47952*FLEN/8, x4, x1, x2) - -inst_15985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f807fff; valaddr_reg:x3; val_offset:47955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47955*FLEN/8, x4, x1, x2) - -inst_15986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f80ffff; valaddr_reg:x3; val_offset:47958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47958*FLEN/8, x4, x1, x2) - -inst_15987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f81ffff; valaddr_reg:x3; val_offset:47961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47961*FLEN/8, x4, x1, x2) - -inst_15988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f83ffff; valaddr_reg:x3; val_offset:47964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47964*FLEN/8, x4, x1, x2) - -inst_15989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f87ffff; valaddr_reg:x3; val_offset:47967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47967*FLEN/8, x4, x1, x2) - -inst_15990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f8fffff; valaddr_reg:x3; val_offset:47970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47970*FLEN/8, x4, x1, x2) - -inst_15991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8f9fffff; valaddr_reg:x3; val_offset:47973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47973*FLEN/8, x4, x1, x2) - -inst_15992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fbfffff; valaddr_reg:x3; val_offset:47976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47976*FLEN/8, x4, x1, x2) - -inst_15993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fc00000; valaddr_reg:x3; val_offset:47979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47979*FLEN/8, x4, x1, x2) - -inst_15994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fe00000; valaddr_reg:x3; val_offset:47982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47982*FLEN/8, x4, x1, x2) - -inst_15995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ff00000; valaddr_reg:x3; val_offset:47985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47985*FLEN/8, x4, x1, x2) - -inst_15996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ff80000; valaddr_reg:x3; val_offset:47988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47988*FLEN/8, x4, x1, x2) - -inst_15997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffc0000; valaddr_reg:x3; val_offset:47991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47991*FLEN/8, x4, x1, x2) - -inst_15998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffe0000; valaddr_reg:x3; val_offset:47994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47994*FLEN/8, x4, x1, x2) - -inst_15999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fff0000; valaddr_reg:x3; val_offset:47997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47997*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_126) - -inst_16000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fff8000; valaddr_reg:x3; val_offset:48000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48000*FLEN/8, x4, x1, x2) - -inst_16001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fffc000; valaddr_reg:x3; val_offset:48003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48003*FLEN/8, x4, x1, x2) - -inst_16002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fffe000; valaddr_reg:x3; val_offset:48006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48006*FLEN/8, x4, x1, x2) - -inst_16003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffff000; valaddr_reg:x3; val_offset:48009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48009*FLEN/8, x4, x1, x2) - -inst_16004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffff800; valaddr_reg:x3; val_offset:48012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48012*FLEN/8, x4, x1, x2) - -inst_16005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffffc00; valaddr_reg:x3; val_offset:48015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48015*FLEN/8, x4, x1, x2) - -inst_16006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffffe00; valaddr_reg:x3; val_offset:48018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48018*FLEN/8, x4, x1, x2) - -inst_16007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fffff00; valaddr_reg:x3; val_offset:48021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48021*FLEN/8, x4, x1, x2) - -inst_16008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fffff80; valaddr_reg:x3; val_offset:48024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48024*FLEN/8, x4, x1, x2) - -inst_16009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fffffc0; valaddr_reg:x3; val_offset:48027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48027*FLEN/8, x4, x1, x2) - -inst_16010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fffffe0; valaddr_reg:x3; val_offset:48030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48030*FLEN/8, x4, x1, x2) - -inst_16011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffffff0; valaddr_reg:x3; val_offset:48033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48033*FLEN/8, x4, x1, x2) - -inst_16012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffffff8; valaddr_reg:x3; val_offset:48036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48036*FLEN/8, x4, x1, x2) - -inst_16013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffffffc; valaddr_reg:x3; val_offset:48039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48039*FLEN/8, x4, x1, x2) - -inst_16014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8ffffffe; valaddr_reg:x3; val_offset:48042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48042*FLEN/8, x4, x1, x2) - -inst_16015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; -op3val:0x8fffffff; valaddr_reg:x3; val_offset:48045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48045*FLEN/8, x4, x1, x2) - -inst_16016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b000000; valaddr_reg:x3; val_offset:48048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48048*FLEN/8, x4, x1, x2) - -inst_16017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b000001; valaddr_reg:x3; val_offset:48051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48051*FLEN/8, x4, x1, x2) - -inst_16018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b000003; valaddr_reg:x3; val_offset:48054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48054*FLEN/8, x4, x1, x2) - -inst_16019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b000007; valaddr_reg:x3; val_offset:48057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48057*FLEN/8, x4, x1, x2) - -inst_16020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b00000f; valaddr_reg:x3; val_offset:48060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48060*FLEN/8, x4, x1, x2) - -inst_16021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b00001f; valaddr_reg:x3; val_offset:48063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48063*FLEN/8, x4, x1, x2) - -inst_16022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b00003f; valaddr_reg:x3; val_offset:48066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48066*FLEN/8, x4, x1, x2) - -inst_16023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b00007f; valaddr_reg:x3; val_offset:48069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48069*FLEN/8, x4, x1, x2) - -inst_16024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b0000ff; valaddr_reg:x3; val_offset:48072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48072*FLEN/8, x4, x1, x2) - -inst_16025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b0001ff; valaddr_reg:x3; val_offset:48075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48075*FLEN/8, x4, x1, x2) - -inst_16026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b0003ff; valaddr_reg:x3; val_offset:48078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48078*FLEN/8, x4, x1, x2) - -inst_16027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b0007ff; valaddr_reg:x3; val_offset:48081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48081*FLEN/8, x4, x1, x2) - -inst_16028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b000fff; valaddr_reg:x3; val_offset:48084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48084*FLEN/8, x4, x1, x2) - -inst_16029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b001fff; valaddr_reg:x3; val_offset:48087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48087*FLEN/8, x4, x1, x2) - -inst_16030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b003fff; valaddr_reg:x3; val_offset:48090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48090*FLEN/8, x4, x1, x2) - -inst_16031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b007fff; valaddr_reg:x3; val_offset:48093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48093*FLEN/8, x4, x1, x2) - -inst_16032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b00ffff; valaddr_reg:x3; val_offset:48096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48096*FLEN/8, x4, x1, x2) - -inst_16033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b01ffff; valaddr_reg:x3; val_offset:48099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48099*FLEN/8, x4, x1, x2) - -inst_16034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b03ffff; valaddr_reg:x3; val_offset:48102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48102*FLEN/8, x4, x1, x2) - -inst_16035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b07ffff; valaddr_reg:x3; val_offset:48105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48105*FLEN/8, x4, x1, x2) - -inst_16036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b0fffff; valaddr_reg:x3; val_offset:48108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48108*FLEN/8, x4, x1, x2) - -inst_16037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b1fffff; valaddr_reg:x3; val_offset:48111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48111*FLEN/8, x4, x1, x2) - -inst_16038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b3fffff; valaddr_reg:x3; val_offset:48114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48114*FLEN/8, x4, x1, x2) - -inst_16039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b400000; valaddr_reg:x3; val_offset:48117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48117*FLEN/8, x4, x1, x2) - -inst_16040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b600000; valaddr_reg:x3; val_offset:48120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48120*FLEN/8, x4, x1, x2) - -inst_16041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b700000; valaddr_reg:x3; val_offset:48123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48123*FLEN/8, x4, x1, x2) - -inst_16042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b780000; valaddr_reg:x3; val_offset:48126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48126*FLEN/8, x4, x1, x2) - -inst_16043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7c0000; valaddr_reg:x3; val_offset:48129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48129*FLEN/8, x4, x1, x2) - -inst_16044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7e0000; valaddr_reg:x3; val_offset:48132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48132*FLEN/8, x4, x1, x2) - -inst_16045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7f0000; valaddr_reg:x3; val_offset:48135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48135*FLEN/8, x4, x1, x2) - -inst_16046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7f8000; valaddr_reg:x3; val_offset:48138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48138*FLEN/8, x4, x1, x2) - -inst_16047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7fc000; valaddr_reg:x3; val_offset:48141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48141*FLEN/8, x4, x1, x2) - -inst_16048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7fe000; valaddr_reg:x3; val_offset:48144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48144*FLEN/8, x4, x1, x2) - -inst_16049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7ff000; valaddr_reg:x3; val_offset:48147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48147*FLEN/8, x4, x1, x2) - -inst_16050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7ff800; valaddr_reg:x3; val_offset:48150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48150*FLEN/8, x4, x1, x2) - -inst_16051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7ffc00; valaddr_reg:x3; val_offset:48153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48153*FLEN/8, x4, x1, x2) - -inst_16052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7ffe00; valaddr_reg:x3; val_offset:48156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48156*FLEN/8, x4, x1, x2) - -inst_16053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7fff00; valaddr_reg:x3; val_offset:48159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48159*FLEN/8, x4, x1, x2) - -inst_16054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7fff80; valaddr_reg:x3; val_offset:48162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48162*FLEN/8, x4, x1, x2) - -inst_16055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7fffc0; valaddr_reg:x3; val_offset:48165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48165*FLEN/8, x4, x1, x2) - -inst_16056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7fffe0; valaddr_reg:x3; val_offset:48168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48168*FLEN/8, x4, x1, x2) - -inst_16057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7ffff0; valaddr_reg:x3; val_offset:48171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48171*FLEN/8, x4, x1, x2) - -inst_16058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7ffff8; valaddr_reg:x3; val_offset:48174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48174*FLEN/8, x4, x1, x2) - -inst_16059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7ffffc; valaddr_reg:x3; val_offset:48177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48177*FLEN/8, x4, x1, x2) - -inst_16060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7ffffe; valaddr_reg:x3; val_offset:48180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48180*FLEN/8, x4, x1, x2) - -inst_16061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7b7fffff; valaddr_reg:x3; val_offset:48183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48183*FLEN/8, x4, x1, x2) - -inst_16062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f000001; valaddr_reg:x3; val_offset:48186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48186*FLEN/8, x4, x1, x2) - -inst_16063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f000003; valaddr_reg:x3; val_offset:48189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48189*FLEN/8, x4, x1, x2) - -inst_16064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f000007; valaddr_reg:x3; val_offset:48192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48192*FLEN/8, x4, x1, x2) - -inst_16065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f199999; valaddr_reg:x3; val_offset:48195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48195*FLEN/8, x4, x1, x2) - -inst_16066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f249249; valaddr_reg:x3; val_offset:48198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48198*FLEN/8, x4, x1, x2) - -inst_16067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f333333; valaddr_reg:x3; val_offset:48201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48201*FLEN/8, x4, x1, x2) - -inst_16068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:48204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48204*FLEN/8, x4, x1, x2) - -inst_16069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:48207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48207*FLEN/8, x4, x1, x2) - -inst_16070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f444444; valaddr_reg:x3; val_offset:48210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48210*FLEN/8, x4, x1, x2) - -inst_16071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:48213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48213*FLEN/8, x4, x1, x2) - -inst_16072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:48216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48216*FLEN/8, x4, x1, x2) - -inst_16073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f666666; valaddr_reg:x3; val_offset:48219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48219*FLEN/8, x4, x1, x2) - -inst_16074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:48222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48222*FLEN/8, x4, x1, x2) - -inst_16075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:48225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48225*FLEN/8, x4, x1, x2) - -inst_16076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:48228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48228*FLEN/8, x4, x1, x2) - -inst_16077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:48231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48231*FLEN/8, x4, x1, x2) - -inst_16078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f000000; valaddr_reg:x3; val_offset:48234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48234*FLEN/8, x4, x1, x2) - -inst_16079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f000001; valaddr_reg:x3; val_offset:48237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48237*FLEN/8, x4, x1, x2) - -inst_16080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f000003; valaddr_reg:x3; val_offset:48240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48240*FLEN/8, x4, x1, x2) - -inst_16081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f000007; valaddr_reg:x3; val_offset:48243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48243*FLEN/8, x4, x1, x2) - -inst_16082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f00000f; valaddr_reg:x3; val_offset:48246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48246*FLEN/8, x4, x1, x2) - -inst_16083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f00001f; valaddr_reg:x3; val_offset:48249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48249*FLEN/8, x4, x1, x2) - -inst_16084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f00003f; valaddr_reg:x3; val_offset:48252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48252*FLEN/8, x4, x1, x2) - -inst_16085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f00007f; valaddr_reg:x3; val_offset:48255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48255*FLEN/8, x4, x1, x2) - -inst_16086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f0000ff; valaddr_reg:x3; val_offset:48258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48258*FLEN/8, x4, x1, x2) - -inst_16087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f0001ff; valaddr_reg:x3; val_offset:48261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48261*FLEN/8, x4, x1, x2) - -inst_16088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f0003ff; valaddr_reg:x3; val_offset:48264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48264*FLEN/8, x4, x1, x2) - -inst_16089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f0007ff; valaddr_reg:x3; val_offset:48267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48267*FLEN/8, x4, x1, x2) - -inst_16090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f000fff; valaddr_reg:x3; val_offset:48270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48270*FLEN/8, x4, x1, x2) - -inst_16091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f001fff; valaddr_reg:x3; val_offset:48273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48273*FLEN/8, x4, x1, x2) - -inst_16092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f003fff; valaddr_reg:x3; val_offset:48276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48276*FLEN/8, x4, x1, x2) - -inst_16093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f007fff; valaddr_reg:x3; val_offset:48279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48279*FLEN/8, x4, x1, x2) - -inst_16094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f00ffff; valaddr_reg:x3; val_offset:48282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48282*FLEN/8, x4, x1, x2) - -inst_16095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f01ffff; valaddr_reg:x3; val_offset:48285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48285*FLEN/8, x4, x1, x2) - -inst_16096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f03ffff; valaddr_reg:x3; val_offset:48288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48288*FLEN/8, x4, x1, x2) - -inst_16097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f07ffff; valaddr_reg:x3; val_offset:48291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48291*FLEN/8, x4, x1, x2) - -inst_16098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f0fffff; valaddr_reg:x3; val_offset:48294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48294*FLEN/8, x4, x1, x2) - -inst_16099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f1fffff; valaddr_reg:x3; val_offset:48297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48297*FLEN/8, x4, x1, x2) - -inst_16100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f3fffff; valaddr_reg:x3; val_offset:48300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48300*FLEN/8, x4, x1, x2) - -inst_16101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f400000; valaddr_reg:x3; val_offset:48303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48303*FLEN/8, x4, x1, x2) - -inst_16102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f600000; valaddr_reg:x3; val_offset:48306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48306*FLEN/8, x4, x1, x2) - -inst_16103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f700000; valaddr_reg:x3; val_offset:48309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48309*FLEN/8, x4, x1, x2) - -inst_16104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f780000; valaddr_reg:x3; val_offset:48312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48312*FLEN/8, x4, x1, x2) - -inst_16105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7c0000; valaddr_reg:x3; val_offset:48315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48315*FLEN/8, x4, x1, x2) - -inst_16106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7e0000; valaddr_reg:x3; val_offset:48318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48318*FLEN/8, x4, x1, x2) - -inst_16107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7f0000; valaddr_reg:x3; val_offset:48321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48321*FLEN/8, x4, x1, x2) - -inst_16108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7f8000; valaddr_reg:x3; val_offset:48324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48324*FLEN/8, x4, x1, x2) - -inst_16109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7fc000; valaddr_reg:x3; val_offset:48327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48327*FLEN/8, x4, x1, x2) - -inst_16110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7fe000; valaddr_reg:x3; val_offset:48330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48330*FLEN/8, x4, x1, x2) - -inst_16111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7ff000; valaddr_reg:x3; val_offset:48333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48333*FLEN/8, x4, x1, x2) - -inst_16112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7ff800; valaddr_reg:x3; val_offset:48336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48336*FLEN/8, x4, x1, x2) - -inst_16113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7ffc00; valaddr_reg:x3; val_offset:48339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48339*FLEN/8, x4, x1, x2) - -inst_16114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7ffe00; valaddr_reg:x3; val_offset:48342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48342*FLEN/8, x4, x1, x2) - -inst_16115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7fff00; valaddr_reg:x3; val_offset:48345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48345*FLEN/8, x4, x1, x2) - -inst_16116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7fff80; valaddr_reg:x3; val_offset:48348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48348*FLEN/8, x4, x1, x2) - -inst_16117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7fffc0; valaddr_reg:x3; val_offset:48351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48351*FLEN/8, x4, x1, x2) - -inst_16118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7fffe0; valaddr_reg:x3; val_offset:48354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48354*FLEN/8, x4, x1, x2) - -inst_16119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7ffff0; valaddr_reg:x3; val_offset:48357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48357*FLEN/8, x4, x1, x2) - -inst_16120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7ffff8; valaddr_reg:x3; val_offset:48360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48360*FLEN/8, x4, x1, x2) - -inst_16121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7ffffc; valaddr_reg:x3; val_offset:48363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48363*FLEN/8, x4, x1, x2) - -inst_16122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7ffffe; valaddr_reg:x3; val_offset:48366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48366*FLEN/8, x4, x1, x2) - -inst_16123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x5f7fffff; valaddr_reg:x3; val_offset:48369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48369*FLEN/8, x4, x1, x2) - -inst_16124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f000001; valaddr_reg:x3; val_offset:48372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48372*FLEN/8, x4, x1, x2) - -inst_16125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f000003; valaddr_reg:x3; val_offset:48375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48375*FLEN/8, x4, x1, x2) - -inst_16126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f000007; valaddr_reg:x3; val_offset:48378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48378*FLEN/8, x4, x1, x2) - -inst_16127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f199999; valaddr_reg:x3; val_offset:48381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48381*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_127) - -inst_16128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f249249; valaddr_reg:x3; val_offset:48384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48384*FLEN/8, x4, x1, x2) - -inst_16129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f333333; valaddr_reg:x3; val_offset:48387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48387*FLEN/8, x4, x1, x2) - -inst_16130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:48390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48390*FLEN/8, x4, x1, x2) - -inst_16131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:48393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48393*FLEN/8, x4, x1, x2) - -inst_16132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f444444; valaddr_reg:x3; val_offset:48396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48396*FLEN/8, x4, x1, x2) - -inst_16133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:48399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48399*FLEN/8, x4, x1, x2) - -inst_16134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:48402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48402*FLEN/8, x4, x1, x2) - -inst_16135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f666666; valaddr_reg:x3; val_offset:48405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48405*FLEN/8, x4, x1, x2) - -inst_16136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:48408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48408*FLEN/8, x4, x1, x2) - -inst_16137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:48411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48411*FLEN/8, x4, x1, x2) - -inst_16138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:48414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48414*FLEN/8, x4, x1, x2) - -inst_16139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:48417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48417*FLEN/8, x4, x1, x2) - -inst_16140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff000001; valaddr_reg:x3; val_offset:48420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48420*FLEN/8, x4, x1, x2) - -inst_16141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff000003; valaddr_reg:x3; val_offset:48423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48423*FLEN/8, x4, x1, x2) - -inst_16142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff000007; valaddr_reg:x3; val_offset:48426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48426*FLEN/8, x4, x1, x2) - -inst_16143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff199999; valaddr_reg:x3; val_offset:48429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48429*FLEN/8, x4, x1, x2) - -inst_16144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff249249; valaddr_reg:x3; val_offset:48432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48432*FLEN/8, x4, x1, x2) - -inst_16145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff333333; valaddr_reg:x3; val_offset:48435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48435*FLEN/8, x4, x1, x2) - -inst_16146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:48438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48438*FLEN/8, x4, x1, x2) - -inst_16147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:48441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48441*FLEN/8, x4, x1, x2) - -inst_16148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff444444; valaddr_reg:x3; val_offset:48444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48444*FLEN/8, x4, x1, x2) - -inst_16149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:48447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48447*FLEN/8, x4, x1, x2) - -inst_16150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:48450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48450*FLEN/8, x4, x1, x2) - -inst_16151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff666666; valaddr_reg:x3; val_offset:48453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48453*FLEN/8, x4, x1, x2) - -inst_16152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:48456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48456*FLEN/8, x4, x1, x2) - -inst_16153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:48459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48459*FLEN/8, x4, x1, x2) - -inst_16154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:48462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48462*FLEN/8, x4, x1, x2) - -inst_16155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:48465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48465*FLEN/8, x4, x1, x2) - -inst_16156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; -op3val:0xff7fffff; valaddr_reg:x3; val_offset:48468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48468*FLEN/8, x4, x1, x2) - -inst_16157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6000000; valaddr_reg:x3; val_offset:48471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48471*FLEN/8, x4, x1, x2) - -inst_16158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6000001; valaddr_reg:x3; val_offset:48474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48474*FLEN/8, x4, x1, x2) - -inst_16159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6000003; valaddr_reg:x3; val_offset:48477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48477*FLEN/8, x4, x1, x2) - -inst_16160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6000007; valaddr_reg:x3; val_offset:48480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48480*FLEN/8, x4, x1, x2) - -inst_16161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb600000f; valaddr_reg:x3; val_offset:48483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48483*FLEN/8, x4, x1, x2) - -inst_16162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb600001f; valaddr_reg:x3; val_offset:48486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48486*FLEN/8, x4, x1, x2) - -inst_16163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb600003f; valaddr_reg:x3; val_offset:48489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48489*FLEN/8, x4, x1, x2) - -inst_16164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb600007f; valaddr_reg:x3; val_offset:48492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48492*FLEN/8, x4, x1, x2) - -inst_16165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb60000ff; valaddr_reg:x3; val_offset:48495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48495*FLEN/8, x4, x1, x2) - -inst_16166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb60001ff; valaddr_reg:x3; val_offset:48498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48498*FLEN/8, x4, x1, x2) - -inst_16167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb60003ff; valaddr_reg:x3; val_offset:48501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48501*FLEN/8, x4, x1, x2) - -inst_16168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb60007ff; valaddr_reg:x3; val_offset:48504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48504*FLEN/8, x4, x1, x2) - -inst_16169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6000fff; valaddr_reg:x3; val_offset:48507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48507*FLEN/8, x4, x1, x2) - -inst_16170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6001fff; valaddr_reg:x3; val_offset:48510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48510*FLEN/8, x4, x1, x2) - -inst_16171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6003fff; valaddr_reg:x3; val_offset:48513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48513*FLEN/8, x4, x1, x2) - -inst_16172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6007fff; valaddr_reg:x3; val_offset:48516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48516*FLEN/8, x4, x1, x2) - -inst_16173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb600ffff; valaddr_reg:x3; val_offset:48519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48519*FLEN/8, x4, x1, x2) - -inst_16174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb601ffff; valaddr_reg:x3; val_offset:48522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48522*FLEN/8, x4, x1, x2) - -inst_16175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb603ffff; valaddr_reg:x3; val_offset:48525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48525*FLEN/8, x4, x1, x2) - -inst_16176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb607ffff; valaddr_reg:x3; val_offset:48528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48528*FLEN/8, x4, x1, x2) - -inst_16177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb60fffff; valaddr_reg:x3; val_offset:48531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48531*FLEN/8, x4, x1, x2) - -inst_16178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb61fffff; valaddr_reg:x3; val_offset:48534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48534*FLEN/8, x4, x1, x2) - -inst_16179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb63fffff; valaddr_reg:x3; val_offset:48537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48537*FLEN/8, x4, x1, x2) - -inst_16180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6400000; valaddr_reg:x3; val_offset:48540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48540*FLEN/8, x4, x1, x2) - -inst_16181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6600000; valaddr_reg:x3; val_offset:48543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48543*FLEN/8, x4, x1, x2) - -inst_16182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6700000; valaddr_reg:x3; val_offset:48546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48546*FLEN/8, x4, x1, x2) - -inst_16183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb6780000; valaddr_reg:x3; val_offset:48549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48549*FLEN/8, x4, x1, x2) - -inst_16184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67c0000; valaddr_reg:x3; val_offset:48552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48552*FLEN/8, x4, x1, x2) - -inst_16185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67e0000; valaddr_reg:x3; val_offset:48555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48555*FLEN/8, x4, x1, x2) - -inst_16186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67f0000; valaddr_reg:x3; val_offset:48558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48558*FLEN/8, x4, x1, x2) - -inst_16187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67f8000; valaddr_reg:x3; val_offset:48561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48561*FLEN/8, x4, x1, x2) - -inst_16188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67fc000; valaddr_reg:x3; val_offset:48564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48564*FLEN/8, x4, x1, x2) - -inst_16189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67fe000; valaddr_reg:x3; val_offset:48567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48567*FLEN/8, x4, x1, x2) - -inst_16190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67ff000; valaddr_reg:x3; val_offset:48570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48570*FLEN/8, x4, x1, x2) - -inst_16191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67ff800; valaddr_reg:x3; val_offset:48573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48573*FLEN/8, x4, x1, x2) - -inst_16192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67ffc00; valaddr_reg:x3; val_offset:48576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48576*FLEN/8, x4, x1, x2) - -inst_16193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67ffe00; valaddr_reg:x3; val_offset:48579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48579*FLEN/8, x4, x1, x2) - -inst_16194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67fff00; valaddr_reg:x3; val_offset:48582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48582*FLEN/8, x4, x1, x2) - -inst_16195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67fff80; valaddr_reg:x3; val_offset:48585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48585*FLEN/8, x4, x1, x2) - -inst_16196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67fffc0; valaddr_reg:x3; val_offset:48588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48588*FLEN/8, x4, x1, x2) - -inst_16197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67fffe0; valaddr_reg:x3; val_offset:48591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48591*FLEN/8, x4, x1, x2) - -inst_16198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67ffff0; valaddr_reg:x3; val_offset:48594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48594*FLEN/8, x4, x1, x2) - -inst_16199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67ffff8; valaddr_reg:x3; val_offset:48597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48597*FLEN/8, x4, x1, x2) - -inst_16200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67ffffc; valaddr_reg:x3; val_offset:48600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48600*FLEN/8, x4, x1, x2) - -inst_16201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67ffffe; valaddr_reg:x3; val_offset:48603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48603*FLEN/8, x4, x1, x2) - -inst_16202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xb67fffff; valaddr_reg:x3; val_offset:48606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48606*FLEN/8, x4, x1, x2) - -inst_16203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbf800001; valaddr_reg:x3; val_offset:48609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48609*FLEN/8, x4, x1, x2) - -inst_16204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbf800003; valaddr_reg:x3; val_offset:48612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48612*FLEN/8, x4, x1, x2) - -inst_16205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbf800007; valaddr_reg:x3; val_offset:48615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48615*FLEN/8, x4, x1, x2) - -inst_16206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbf999999; valaddr_reg:x3; val_offset:48618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48618*FLEN/8, x4, x1, x2) - -inst_16207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:48621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48621*FLEN/8, x4, x1, x2) - -inst_16208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:48624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48624*FLEN/8, x4, x1, x2) - -inst_16209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:48627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48627*FLEN/8, x4, x1, x2) - -inst_16210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:48630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48630*FLEN/8, x4, x1, x2) - -inst_16211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:48633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48633*FLEN/8, x4, x1, x2) - -inst_16212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:48636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48636*FLEN/8, x4, x1, x2) - -inst_16213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:48639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48639*FLEN/8, x4, x1, x2) - -inst_16214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:48642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48642*FLEN/8, x4, x1, x2) - -inst_16215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:48645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48645*FLEN/8, x4, x1, x2) - -inst_16216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:48648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48648*FLEN/8, x4, x1, x2) - -inst_16217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:48651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48651*FLEN/8, x4, x1, x2) - -inst_16218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:48654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48654*FLEN/8, x4, x1, x2) - -inst_16219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:48657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48657*FLEN/8, x4, x1, x2) - -inst_16220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:48660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48660*FLEN/8, x4, x1, x2) - -inst_16221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:48663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48663*FLEN/8, x4, x1, x2) - -inst_16222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:48666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48666*FLEN/8, x4, x1, x2) - -inst_16223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:48669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48669*FLEN/8, x4, x1, x2) - -inst_16224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:48672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48672*FLEN/8, x4, x1, x2) - -inst_16225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:48675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48675*FLEN/8, x4, x1, x2) - -inst_16226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:48678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48678*FLEN/8, x4, x1, x2) - -inst_16227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:48681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48681*FLEN/8, x4, x1, x2) - -inst_16228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:48684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48684*FLEN/8, x4, x1, x2) - -inst_16229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:48687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48687*FLEN/8, x4, x1, x2) - -inst_16230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:48690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48690*FLEN/8, x4, x1, x2) - -inst_16231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:48693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48693*FLEN/8, x4, x1, x2) - -inst_16232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:48696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48696*FLEN/8, x4, x1, x2) - -inst_16233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:48699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48699*FLEN/8, x4, x1, x2) - -inst_16234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:48702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48702*FLEN/8, x4, x1, x2) - -inst_16235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85800000; valaddr_reg:x3; val_offset:48705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48705*FLEN/8, x4, x1, x2) - -inst_16236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85800001; valaddr_reg:x3; val_offset:48708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48708*FLEN/8, x4, x1, x2) - -inst_16237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85800003; valaddr_reg:x3; val_offset:48711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48711*FLEN/8, x4, x1, x2) - -inst_16238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85800007; valaddr_reg:x3; val_offset:48714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48714*FLEN/8, x4, x1, x2) - -inst_16239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8580000f; valaddr_reg:x3; val_offset:48717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48717*FLEN/8, x4, x1, x2) - -inst_16240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8580001f; valaddr_reg:x3; val_offset:48720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48720*FLEN/8, x4, x1, x2) - -inst_16241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8580003f; valaddr_reg:x3; val_offset:48723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48723*FLEN/8, x4, x1, x2) - -inst_16242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8580007f; valaddr_reg:x3; val_offset:48726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48726*FLEN/8, x4, x1, x2) - -inst_16243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x858000ff; valaddr_reg:x3; val_offset:48729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48729*FLEN/8, x4, x1, x2) - -inst_16244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x858001ff; valaddr_reg:x3; val_offset:48732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48732*FLEN/8, x4, x1, x2) - -inst_16245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x858003ff; valaddr_reg:x3; val_offset:48735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48735*FLEN/8, x4, x1, x2) - -inst_16246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x858007ff; valaddr_reg:x3; val_offset:48738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48738*FLEN/8, x4, x1, x2) - -inst_16247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85800fff; valaddr_reg:x3; val_offset:48741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48741*FLEN/8, x4, x1, x2) - -inst_16248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85801fff; valaddr_reg:x3; val_offset:48744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48744*FLEN/8, x4, x1, x2) - -inst_16249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85803fff; valaddr_reg:x3; val_offset:48747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48747*FLEN/8, x4, x1, x2) - -inst_16250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85807fff; valaddr_reg:x3; val_offset:48750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48750*FLEN/8, x4, x1, x2) - -inst_16251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8580ffff; valaddr_reg:x3; val_offset:48753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48753*FLEN/8, x4, x1, x2) - -inst_16252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8581ffff; valaddr_reg:x3; val_offset:48756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48756*FLEN/8, x4, x1, x2) - -inst_16253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8583ffff; valaddr_reg:x3; val_offset:48759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48759*FLEN/8, x4, x1, x2) - -inst_16254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x8587ffff; valaddr_reg:x3; val_offset:48762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48762*FLEN/8, x4, x1, x2) - -inst_16255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x858fffff; valaddr_reg:x3; val_offset:48765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48765*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_128) - -inst_16256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x859fffff; valaddr_reg:x3; val_offset:48768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48768*FLEN/8, x4, x1, x2) - -inst_16257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85bfffff; valaddr_reg:x3; val_offset:48771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48771*FLEN/8, x4, x1, x2) - -inst_16258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85c00000; valaddr_reg:x3; val_offset:48774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48774*FLEN/8, x4, x1, x2) - -inst_16259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85e00000; valaddr_reg:x3; val_offset:48777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48777*FLEN/8, x4, x1, x2) - -inst_16260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85f00000; valaddr_reg:x3; val_offset:48780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48780*FLEN/8, x4, x1, x2) - -inst_16261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85f80000; valaddr_reg:x3; val_offset:48783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48783*FLEN/8, x4, x1, x2) - -inst_16262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fc0000; valaddr_reg:x3; val_offset:48786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48786*FLEN/8, x4, x1, x2) - -inst_16263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fe0000; valaddr_reg:x3; val_offset:48789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48789*FLEN/8, x4, x1, x2) - -inst_16264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ff0000; valaddr_reg:x3; val_offset:48792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48792*FLEN/8, x4, x1, x2) - -inst_16265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ff8000; valaddr_reg:x3; val_offset:48795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48795*FLEN/8, x4, x1, x2) - -inst_16266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ffc000; valaddr_reg:x3; val_offset:48798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48798*FLEN/8, x4, x1, x2) - -inst_16267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ffe000; valaddr_reg:x3; val_offset:48801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48801*FLEN/8, x4, x1, x2) - -inst_16268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fff000; valaddr_reg:x3; val_offset:48804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48804*FLEN/8, x4, x1, x2) - -inst_16269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fff800; valaddr_reg:x3; val_offset:48807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48807*FLEN/8, x4, x1, x2) - -inst_16270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fffc00; valaddr_reg:x3; val_offset:48810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48810*FLEN/8, x4, x1, x2) - -inst_16271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fffe00; valaddr_reg:x3; val_offset:48813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48813*FLEN/8, x4, x1, x2) - -inst_16272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ffff00; valaddr_reg:x3; val_offset:48816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48816*FLEN/8, x4, x1, x2) - -inst_16273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ffff80; valaddr_reg:x3; val_offset:48819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48819*FLEN/8, x4, x1, x2) - -inst_16274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ffffc0; valaddr_reg:x3; val_offset:48822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48822*FLEN/8, x4, x1, x2) - -inst_16275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ffffe0; valaddr_reg:x3; val_offset:48825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48825*FLEN/8, x4, x1, x2) - -inst_16276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fffff0; valaddr_reg:x3; val_offset:48828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48828*FLEN/8, x4, x1, x2) - -inst_16277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fffff8; valaddr_reg:x3; val_offset:48831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48831*FLEN/8, x4, x1, x2) - -inst_16278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fffffc; valaddr_reg:x3; val_offset:48834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48834*FLEN/8, x4, x1, x2) - -inst_16279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85fffffe; valaddr_reg:x3; val_offset:48837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48837*FLEN/8, x4, x1, x2) - -inst_16280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; -op3val:0x85ffffff; valaddr_reg:x3; val_offset:48840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48840*FLEN/8, x4, x1, x2) - -inst_16281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x800000; valaddr_reg:x3; val_offset:48843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48843*FLEN/8, x4, x1, x2) - -inst_16282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:48846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48846*FLEN/8, x4, x1, x2) - -inst_16283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:48849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48849*FLEN/8, x4, x1, x2) - -inst_16284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:48852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48852*FLEN/8, x4, x1, x2) - -inst_16285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x80000f; valaddr_reg:x3; val_offset:48855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48855*FLEN/8, x4, x1, x2) - -inst_16286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x80001f; valaddr_reg:x3; val_offset:48858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48858*FLEN/8, x4, x1, x2) - -inst_16287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x80003f; valaddr_reg:x3; val_offset:48861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48861*FLEN/8, x4, x1, x2) - -inst_16288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x80007f; valaddr_reg:x3; val_offset:48864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48864*FLEN/8, x4, x1, x2) - -inst_16289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x8000ff; valaddr_reg:x3; val_offset:48867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48867*FLEN/8, x4, x1, x2) - -inst_16290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x8001ff; valaddr_reg:x3; val_offset:48870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48870*FLEN/8, x4, x1, x2) - -inst_16291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x8003ff; valaddr_reg:x3; val_offset:48873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48873*FLEN/8, x4, x1, x2) - -inst_16292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x8007ff; valaddr_reg:x3; val_offset:48876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48876*FLEN/8, x4, x1, x2) - -inst_16293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x800fff; valaddr_reg:x3; val_offset:48879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48879*FLEN/8, x4, x1, x2) - -inst_16294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x801fff; valaddr_reg:x3; val_offset:48882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48882*FLEN/8, x4, x1, x2) - -inst_16295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x803fff; valaddr_reg:x3; val_offset:48885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48885*FLEN/8, x4, x1, x2) - -inst_16296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x807fff; valaddr_reg:x3; val_offset:48888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48888*FLEN/8, x4, x1, x2) - -inst_16297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x80ffff; valaddr_reg:x3; val_offset:48891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48891*FLEN/8, x4, x1, x2) - -inst_16298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x81ffff; valaddr_reg:x3; val_offset:48894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48894*FLEN/8, x4, x1, x2) - -inst_16299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x83ffff; valaddr_reg:x3; val_offset:48897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48897*FLEN/8, x4, x1, x2) - -inst_16300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x87ffff; valaddr_reg:x3; val_offset:48900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48900*FLEN/8, x4, x1, x2) - -inst_16301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x8fffff; valaddr_reg:x3; val_offset:48903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48903*FLEN/8, x4, x1, x2) - -inst_16302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:48906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48906*FLEN/8, x4, x1, x2) - -inst_16303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0x9fffff; valaddr_reg:x3; val_offset:48909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48909*FLEN/8, x4, x1, x2) - -inst_16304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:48912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48912*FLEN/8, x4, x1, x2) - -inst_16305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:48915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48915*FLEN/8, x4, x1, x2) - -inst_16306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:48918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48918*FLEN/8, x4, x1, x2) - -inst_16307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:48921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48921*FLEN/8, x4, x1, x2) - -inst_16308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xbfffff; valaddr_reg:x3; val_offset:48924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48924*FLEN/8, x4, x1, x2) - -inst_16309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xc00000; valaddr_reg:x3; val_offset:48927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48927*FLEN/8, x4, x1, x2) - -inst_16310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:48930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48930*FLEN/8, x4, x1, x2) - -inst_16311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:48933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48933*FLEN/8, x4, x1, x2) - -inst_16312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:48936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48936*FLEN/8, x4, x1, x2) - -inst_16313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xe00000; valaddr_reg:x3; val_offset:48939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48939*FLEN/8, x4, x1, x2) - -inst_16314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:48942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48942*FLEN/8, x4, x1, x2) - -inst_16315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:48945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48945*FLEN/8, x4, x1, x2) - -inst_16316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xf00000; valaddr_reg:x3; val_offset:48948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48948*FLEN/8, x4, x1, x2) - -inst_16317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xf80000; valaddr_reg:x3; val_offset:48951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48951*FLEN/8, x4, x1, x2) - -inst_16318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfc0000; valaddr_reg:x3; val_offset:48954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48954*FLEN/8, x4, x1, x2) - -inst_16319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfe0000; valaddr_reg:x3; val_offset:48957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48957*FLEN/8, x4, x1, x2) - -inst_16320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xff0000; valaddr_reg:x3; val_offset:48960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48960*FLEN/8, x4, x1, x2) - -inst_16321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xff8000; valaddr_reg:x3; val_offset:48963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48963*FLEN/8, x4, x1, x2) - -inst_16322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xffc000; valaddr_reg:x3; val_offset:48966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48966*FLEN/8, x4, x1, x2) - -inst_16323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xffe000; valaddr_reg:x3; val_offset:48969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48969*FLEN/8, x4, x1, x2) - -inst_16324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfff000; valaddr_reg:x3; val_offset:48972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48972*FLEN/8, x4, x1, x2) - -inst_16325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfff800; valaddr_reg:x3; val_offset:48975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48975*FLEN/8, x4, x1, x2) - -inst_16326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfffc00; valaddr_reg:x3; val_offset:48978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48978*FLEN/8, x4, x1, x2) - -inst_16327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfffe00; valaddr_reg:x3; val_offset:48981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48981*FLEN/8, x4, x1, x2) - -inst_16328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xffff00; valaddr_reg:x3; val_offset:48984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48984*FLEN/8, x4, x1, x2) - -inst_16329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xffff80; valaddr_reg:x3; val_offset:48987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48987*FLEN/8, x4, x1, x2) - -inst_16330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xffffc0; valaddr_reg:x3; val_offset:48990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48990*FLEN/8, x4, x1, x2) - -inst_16331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xffffe0; valaddr_reg:x3; val_offset:48993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48993*FLEN/8, x4, x1, x2) - -inst_16332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfffff0; valaddr_reg:x3; val_offset:48996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48996*FLEN/8, x4, x1, x2) - -inst_16333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:48999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48999*FLEN/8, x4, x1, x2) - -inst_16334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:49002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49002*FLEN/8, x4, x1, x2) - -inst_16335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:49005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49005*FLEN/8, x4, x1, x2) - -inst_16336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; -op3val:0xffffff; valaddr_reg:x3; val_offset:49008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49008*FLEN/8, x4, x1, x2) - -inst_16337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27000000; valaddr_reg:x3; val_offset:49011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49011*FLEN/8, x4, x1, x2) - -inst_16338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27000001; valaddr_reg:x3; val_offset:49014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49014*FLEN/8, x4, x1, x2) - -inst_16339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27000003; valaddr_reg:x3; val_offset:49017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49017*FLEN/8, x4, x1, x2) - -inst_16340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27000007; valaddr_reg:x3; val_offset:49020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49020*FLEN/8, x4, x1, x2) - -inst_16341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x2700000f; valaddr_reg:x3; val_offset:49023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49023*FLEN/8, x4, x1, x2) - -inst_16342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x2700001f; valaddr_reg:x3; val_offset:49026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49026*FLEN/8, x4, x1, x2) - -inst_16343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x2700003f; valaddr_reg:x3; val_offset:49029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49029*FLEN/8, x4, x1, x2) - -inst_16344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x2700007f; valaddr_reg:x3; val_offset:49032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49032*FLEN/8, x4, x1, x2) - -inst_16345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x270000ff; valaddr_reg:x3; val_offset:49035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49035*FLEN/8, x4, x1, x2) - -inst_16346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x270001ff; valaddr_reg:x3; val_offset:49038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49038*FLEN/8, x4, x1, x2) - -inst_16347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x270003ff; valaddr_reg:x3; val_offset:49041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49041*FLEN/8, x4, x1, x2) - -inst_16348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x270007ff; valaddr_reg:x3; val_offset:49044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49044*FLEN/8, x4, x1, x2) - -inst_16349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27000fff; valaddr_reg:x3; val_offset:49047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49047*FLEN/8, x4, x1, x2) - -inst_16350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27001fff; valaddr_reg:x3; val_offset:49050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49050*FLEN/8, x4, x1, x2) - -inst_16351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27003fff; valaddr_reg:x3; val_offset:49053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49053*FLEN/8, x4, x1, x2) - -inst_16352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27007fff; valaddr_reg:x3; val_offset:49056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49056*FLEN/8, x4, x1, x2) - -inst_16353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x2700ffff; valaddr_reg:x3; val_offset:49059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49059*FLEN/8, x4, x1, x2) - -inst_16354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x2701ffff; valaddr_reg:x3; val_offset:49062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49062*FLEN/8, x4, x1, x2) - -inst_16355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x2703ffff; valaddr_reg:x3; val_offset:49065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49065*FLEN/8, x4, x1, x2) - -inst_16356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x2707ffff; valaddr_reg:x3; val_offset:49068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49068*FLEN/8, x4, x1, x2) - -inst_16357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x270fffff; valaddr_reg:x3; val_offset:49071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49071*FLEN/8, x4, x1, x2) - -inst_16358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x271fffff; valaddr_reg:x3; val_offset:49074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49074*FLEN/8, x4, x1, x2) - -inst_16359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x273fffff; valaddr_reg:x3; val_offset:49077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49077*FLEN/8, x4, x1, x2) - -inst_16360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27400000; valaddr_reg:x3; val_offset:49080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49080*FLEN/8, x4, x1, x2) - -inst_16361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27600000; valaddr_reg:x3; val_offset:49083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49083*FLEN/8, x4, x1, x2) - -inst_16362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27700000; valaddr_reg:x3; val_offset:49086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49086*FLEN/8, x4, x1, x2) - -inst_16363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x27780000; valaddr_reg:x3; val_offset:49089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49089*FLEN/8, x4, x1, x2) - -inst_16364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277c0000; valaddr_reg:x3; val_offset:49092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49092*FLEN/8, x4, x1, x2) - -inst_16365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277e0000; valaddr_reg:x3; val_offset:49095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49095*FLEN/8, x4, x1, x2) - -inst_16366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277f0000; valaddr_reg:x3; val_offset:49098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49098*FLEN/8, x4, x1, x2) - -inst_16367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277f8000; valaddr_reg:x3; val_offset:49101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49101*FLEN/8, x4, x1, x2) - -inst_16368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277fc000; valaddr_reg:x3; val_offset:49104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49104*FLEN/8, x4, x1, x2) - -inst_16369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277fe000; valaddr_reg:x3; val_offset:49107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49107*FLEN/8, x4, x1, x2) - -inst_16370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277ff000; valaddr_reg:x3; val_offset:49110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49110*FLEN/8, x4, x1, x2) - -inst_16371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277ff800; valaddr_reg:x3; val_offset:49113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49113*FLEN/8, x4, x1, x2) - -inst_16372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277ffc00; valaddr_reg:x3; val_offset:49116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49116*FLEN/8, x4, x1, x2) - -inst_16373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277ffe00; valaddr_reg:x3; val_offset:49119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49119*FLEN/8, x4, x1, x2) - -inst_16374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277fff00; valaddr_reg:x3; val_offset:49122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49122*FLEN/8, x4, x1, x2) - -inst_16375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277fff80; valaddr_reg:x3; val_offset:49125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49125*FLEN/8, x4, x1, x2) - -inst_16376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277fffc0; valaddr_reg:x3; val_offset:49128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49128*FLEN/8, x4, x1, x2) - -inst_16377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277fffe0; valaddr_reg:x3; val_offset:49131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49131*FLEN/8, x4, x1, x2) - -inst_16378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277ffff0; valaddr_reg:x3; val_offset:49134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49134*FLEN/8, x4, x1, x2) - -inst_16379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277ffff8; valaddr_reg:x3; val_offset:49137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49137*FLEN/8, x4, x1, x2) - -inst_16380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277ffffc; valaddr_reg:x3; val_offset:49140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49140*FLEN/8, x4, x1, x2) - -inst_16381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277ffffe; valaddr_reg:x3; val_offset:49143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49143*FLEN/8, x4, x1, x2) - -inst_16382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x277fffff; valaddr_reg:x3; val_offset:49146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49146*FLEN/8, x4, x1, x2) - -inst_16383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3f800001; valaddr_reg:x3; val_offset:49149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49149*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_129) - -inst_16384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3f800003; valaddr_reg:x3; val_offset:49152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49152*FLEN/8, x4, x1, x2) - -inst_16385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3f800007; valaddr_reg:x3; val_offset:49155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49155*FLEN/8, x4, x1, x2) - -inst_16386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3f999999; valaddr_reg:x3; val_offset:49158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49158*FLEN/8, x4, x1, x2) - -inst_16387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:49161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49161*FLEN/8, x4, x1, x2) - -inst_16388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:49164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49164*FLEN/8, x4, x1, x2) - -inst_16389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:49167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49167*FLEN/8, x4, x1, x2) - -inst_16390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:49170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49170*FLEN/8, x4, x1, x2) - -inst_16391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:49173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49173*FLEN/8, x4, x1, x2) - -inst_16392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:49176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49176*FLEN/8, x4, x1, x2) - -inst_16393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:49179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49179*FLEN/8, x4, x1, x2) - -inst_16394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:49182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49182*FLEN/8, x4, x1, x2) - -inst_16395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:49185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49185*FLEN/8, x4, x1, x2) - -inst_16396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:49188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49188*FLEN/8, x4, x1, x2) - -inst_16397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:49191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49191*FLEN/8, x4, x1, x2) - -inst_16398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:49194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49194*FLEN/8, x4, x1, x2) - -inst_16399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:49197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49197*FLEN/8, x4, x1, x2) - -inst_16400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:49200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49200*FLEN/8, x4, x1, x2) - -inst_16401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:49203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49203*FLEN/8, x4, x1, x2) - -inst_16402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:49206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49206*FLEN/8, x4, x1, x2) - -inst_16403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:49209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49209*FLEN/8, x4, x1, x2) - -inst_16404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:49212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49212*FLEN/8, x4, x1, x2) - -inst_16405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:49215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49215*FLEN/8, x4, x1, x2) - -inst_16406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:49218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49218*FLEN/8, x4, x1, x2) - -inst_16407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:49221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49221*FLEN/8, x4, x1, x2) - -inst_16408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:49224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49224*FLEN/8, x4, x1, x2) - -inst_16409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:49227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49227*FLEN/8, x4, x1, x2) - -inst_16410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:49230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49230*FLEN/8, x4, x1, x2) - -inst_16411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:49233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49233*FLEN/8, x4, x1, x2) - -inst_16412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:49236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49236*FLEN/8, x4, x1, x2) - -inst_16413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:49239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49239*FLEN/8, x4, x1, x2) - -inst_16414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:49242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49242*FLEN/8, x4, x1, x2) - -inst_16415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c000000; valaddr_reg:x3; val_offset:49245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49245*FLEN/8, x4, x1, x2) - -inst_16416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c000001; valaddr_reg:x3; val_offset:49248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49248*FLEN/8, x4, x1, x2) - -inst_16417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c000003; valaddr_reg:x3; val_offset:49251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49251*FLEN/8, x4, x1, x2) - -inst_16418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c000007; valaddr_reg:x3; val_offset:49254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49254*FLEN/8, x4, x1, x2) - -inst_16419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c00000f; valaddr_reg:x3; val_offset:49257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49257*FLEN/8, x4, x1, x2) - -inst_16420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c00001f; valaddr_reg:x3; val_offset:49260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49260*FLEN/8, x4, x1, x2) - -inst_16421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c00003f; valaddr_reg:x3; val_offset:49263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49263*FLEN/8, x4, x1, x2) - -inst_16422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c00007f; valaddr_reg:x3; val_offset:49266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49266*FLEN/8, x4, x1, x2) - -inst_16423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c0000ff; valaddr_reg:x3; val_offset:49269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49269*FLEN/8, x4, x1, x2) - -inst_16424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c0001ff; valaddr_reg:x3; val_offset:49272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49272*FLEN/8, x4, x1, x2) - -inst_16425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c0003ff; valaddr_reg:x3; val_offset:49275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49275*FLEN/8, x4, x1, x2) - -inst_16426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c0007ff; valaddr_reg:x3; val_offset:49278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49278*FLEN/8, x4, x1, x2) - -inst_16427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c000fff; valaddr_reg:x3; val_offset:49281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49281*FLEN/8, x4, x1, x2) - -inst_16428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c001fff; valaddr_reg:x3; val_offset:49284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49284*FLEN/8, x4, x1, x2) - -inst_16429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c003fff; valaddr_reg:x3; val_offset:49287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49287*FLEN/8, x4, x1, x2) - -inst_16430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c007fff; valaddr_reg:x3; val_offset:49290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49290*FLEN/8, x4, x1, x2) - -inst_16431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c00ffff; valaddr_reg:x3; val_offset:49293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49293*FLEN/8, x4, x1, x2) - -inst_16432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c01ffff; valaddr_reg:x3; val_offset:49296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49296*FLEN/8, x4, x1, x2) - -inst_16433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c03ffff; valaddr_reg:x3; val_offset:49299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49299*FLEN/8, x4, x1, x2) - -inst_16434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c07ffff; valaddr_reg:x3; val_offset:49302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49302*FLEN/8, x4, x1, x2) - -inst_16435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c0fffff; valaddr_reg:x3; val_offset:49305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49305*FLEN/8, x4, x1, x2) - -inst_16436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c1fffff; valaddr_reg:x3; val_offset:49308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49308*FLEN/8, x4, x1, x2) - -inst_16437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c3fffff; valaddr_reg:x3; val_offset:49311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49311*FLEN/8, x4, x1, x2) - -inst_16438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c400000; valaddr_reg:x3; val_offset:49314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49314*FLEN/8, x4, x1, x2) - -inst_16439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c600000; valaddr_reg:x3; val_offset:49317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49317*FLEN/8, x4, x1, x2) - -inst_16440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c700000; valaddr_reg:x3; val_offset:49320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49320*FLEN/8, x4, x1, x2) - -inst_16441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c780000; valaddr_reg:x3; val_offset:49323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49323*FLEN/8, x4, x1, x2) - -inst_16442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7c0000; valaddr_reg:x3; val_offset:49326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49326*FLEN/8, x4, x1, x2) - -inst_16443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7e0000; valaddr_reg:x3; val_offset:49329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49329*FLEN/8, x4, x1, x2) - -inst_16444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7f0000; valaddr_reg:x3; val_offset:49332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49332*FLEN/8, x4, x1, x2) - -inst_16445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7f8000; valaddr_reg:x3; val_offset:49335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49335*FLEN/8, x4, x1, x2) - -inst_16446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7fc000; valaddr_reg:x3; val_offset:49338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49338*FLEN/8, x4, x1, x2) - -inst_16447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7fe000; valaddr_reg:x3; val_offset:49341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49341*FLEN/8, x4, x1, x2) - -inst_16448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7ff000; valaddr_reg:x3; val_offset:49344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49344*FLEN/8, x4, x1, x2) - -inst_16449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7ff800; valaddr_reg:x3; val_offset:49347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49347*FLEN/8, x4, x1, x2) - -inst_16450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7ffc00; valaddr_reg:x3; val_offset:49350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49350*FLEN/8, x4, x1, x2) - -inst_16451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7ffe00; valaddr_reg:x3; val_offset:49353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49353*FLEN/8, x4, x1, x2) - -inst_16452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7fff00; valaddr_reg:x3; val_offset:49356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49356*FLEN/8, x4, x1, x2) - -inst_16453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7fff80; valaddr_reg:x3; val_offset:49359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49359*FLEN/8, x4, x1, x2) - -inst_16454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7fffc0; valaddr_reg:x3; val_offset:49362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49362*FLEN/8, x4, x1, x2) - -inst_16455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7fffe0; valaddr_reg:x3; val_offset:49365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49365*FLEN/8, x4, x1, x2) - -inst_16456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7ffff0; valaddr_reg:x3; val_offset:49368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49368*FLEN/8, x4, x1, x2) - -inst_16457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7ffff8; valaddr_reg:x3; val_offset:49371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49371*FLEN/8, x4, x1, x2) - -inst_16458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7ffffc; valaddr_reg:x3; val_offset:49374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49374*FLEN/8, x4, x1, x2) - -inst_16459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7ffffe; valaddr_reg:x3; val_offset:49377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49377*FLEN/8, x4, x1, x2) - -inst_16460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; -op3val:0x8c7fffff; valaddr_reg:x3; val_offset:49380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49380*FLEN/8, x4, x1, x2) - -inst_16461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:49383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49383*FLEN/8, x4, x1, x2) - -inst_16462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:49386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49386*FLEN/8, x4, x1, x2) - -inst_16463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:49389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49389*FLEN/8, x4, x1, x2) - -inst_16464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:49392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49392*FLEN/8, x4, x1, x2) - -inst_16465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:49395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49395*FLEN/8, x4, x1, x2) - -inst_16466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:49398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49398*FLEN/8, x4, x1, x2) - -inst_16467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:49401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49401*FLEN/8, x4, x1, x2) - -inst_16468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:49404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49404*FLEN/8, x4, x1, x2) - -inst_16469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:49407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49407*FLEN/8, x4, x1, x2) - -inst_16470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:49410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49410*FLEN/8, x4, x1, x2) - -inst_16471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:49413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49413*FLEN/8, x4, x1, x2) - -inst_16472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:49416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49416*FLEN/8, x4, x1, x2) - -inst_16473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:49419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49419*FLEN/8, x4, x1, x2) - -inst_16474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:49422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49422*FLEN/8, x4, x1, x2) - -inst_16475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:49425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49425*FLEN/8, x4, x1, x2) - -inst_16476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:49428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49428*FLEN/8, x4, x1, x2) - -inst_16477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d800000; valaddr_reg:x3; val_offset:49431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49431*FLEN/8, x4, x1, x2) - -inst_16478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d800001; valaddr_reg:x3; val_offset:49434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49434*FLEN/8, x4, x1, x2) - -inst_16479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d800003; valaddr_reg:x3; val_offset:49437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49437*FLEN/8, x4, x1, x2) - -inst_16480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d800007; valaddr_reg:x3; val_offset:49440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49440*FLEN/8, x4, x1, x2) - -inst_16481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d80000f; valaddr_reg:x3; val_offset:49443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49443*FLEN/8, x4, x1, x2) - -inst_16482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d80001f; valaddr_reg:x3; val_offset:49446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49446*FLEN/8, x4, x1, x2) - -inst_16483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d80003f; valaddr_reg:x3; val_offset:49449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49449*FLEN/8, x4, x1, x2) - -inst_16484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d80007f; valaddr_reg:x3; val_offset:49452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49452*FLEN/8, x4, x1, x2) - -inst_16485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d8000ff; valaddr_reg:x3; val_offset:49455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49455*FLEN/8, x4, x1, x2) - -inst_16486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d8001ff; valaddr_reg:x3; val_offset:49458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49458*FLEN/8, x4, x1, x2) - -inst_16487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d8003ff; valaddr_reg:x3; val_offset:49461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49461*FLEN/8, x4, x1, x2) - -inst_16488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d8007ff; valaddr_reg:x3; val_offset:49464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49464*FLEN/8, x4, x1, x2) - -inst_16489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d800fff; valaddr_reg:x3; val_offset:49467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49467*FLEN/8, x4, x1, x2) - -inst_16490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d801fff; valaddr_reg:x3; val_offset:49470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49470*FLEN/8, x4, x1, x2) - -inst_16491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d803fff; valaddr_reg:x3; val_offset:49473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49473*FLEN/8, x4, x1, x2) - -inst_16492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d807fff; valaddr_reg:x3; val_offset:49476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49476*FLEN/8, x4, x1, x2) - -inst_16493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d80ffff; valaddr_reg:x3; val_offset:49479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49479*FLEN/8, x4, x1, x2) - -inst_16494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d81ffff; valaddr_reg:x3; val_offset:49482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49482*FLEN/8, x4, x1, x2) - -inst_16495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d83ffff; valaddr_reg:x3; val_offset:49485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49485*FLEN/8, x4, x1, x2) - -inst_16496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d87ffff; valaddr_reg:x3; val_offset:49488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49488*FLEN/8, x4, x1, x2) - -inst_16497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d8fffff; valaddr_reg:x3; val_offset:49491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49491*FLEN/8, x4, x1, x2) - -inst_16498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8d9fffff; valaddr_reg:x3; val_offset:49494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49494*FLEN/8, x4, x1, x2) - -inst_16499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dbfffff; valaddr_reg:x3; val_offset:49497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49497*FLEN/8, x4, x1, x2) - -inst_16500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dc00000; valaddr_reg:x3; val_offset:49500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49500*FLEN/8, x4, x1, x2) - -inst_16501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8de00000; valaddr_reg:x3; val_offset:49503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49503*FLEN/8, x4, x1, x2) - -inst_16502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8df00000; valaddr_reg:x3; val_offset:49506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49506*FLEN/8, x4, x1, x2) - -inst_16503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8df80000; valaddr_reg:x3; val_offset:49509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49509*FLEN/8, x4, x1, x2) - -inst_16504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfc0000; valaddr_reg:x3; val_offset:49512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49512*FLEN/8, x4, x1, x2) - -inst_16505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfe0000; valaddr_reg:x3; val_offset:49515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49515*FLEN/8, x4, x1, x2) - -inst_16506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dff0000; valaddr_reg:x3; val_offset:49518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49518*FLEN/8, x4, x1, x2) - -inst_16507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dff8000; valaddr_reg:x3; val_offset:49521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49521*FLEN/8, x4, x1, x2) - -inst_16508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dffc000; valaddr_reg:x3; val_offset:49524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49524*FLEN/8, x4, x1, x2) - -inst_16509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dffe000; valaddr_reg:x3; val_offset:49527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49527*FLEN/8, x4, x1, x2) - -inst_16510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfff000; valaddr_reg:x3; val_offset:49530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49530*FLEN/8, x4, x1, x2) - -inst_16511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfff800; valaddr_reg:x3; val_offset:49533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49533*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_130) - -inst_16512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfffc00; valaddr_reg:x3; val_offset:49536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49536*FLEN/8, x4, x1, x2) - -inst_16513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfffe00; valaddr_reg:x3; val_offset:49539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49539*FLEN/8, x4, x1, x2) - -inst_16514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dffff00; valaddr_reg:x3; val_offset:49542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49542*FLEN/8, x4, x1, x2) - -inst_16515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dffff80; valaddr_reg:x3; val_offset:49545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49545*FLEN/8, x4, x1, x2) - -inst_16516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dffffc0; valaddr_reg:x3; val_offset:49548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49548*FLEN/8, x4, x1, x2) - -inst_16517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dffffe0; valaddr_reg:x3; val_offset:49551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49551*FLEN/8, x4, x1, x2) - -inst_16518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfffff0; valaddr_reg:x3; val_offset:49554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49554*FLEN/8, x4, x1, x2) - -inst_16519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfffff8; valaddr_reg:x3; val_offset:49557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49557*FLEN/8, x4, x1, x2) - -inst_16520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfffffc; valaddr_reg:x3; val_offset:49560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49560*FLEN/8, x4, x1, x2) - -inst_16521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dfffffe; valaddr_reg:x3; val_offset:49563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49563*FLEN/8, x4, x1, x2) - -inst_16522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; -op3val:0x8dffffff; valaddr_reg:x3; val_offset:49566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49566*FLEN/8, x4, x1, x2) - -inst_16523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f800000; valaddr_reg:x3; val_offset:49569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49569*FLEN/8, x4, x1, x2) - -inst_16524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f800001; valaddr_reg:x3; val_offset:49572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49572*FLEN/8, x4, x1, x2) - -inst_16525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f800003; valaddr_reg:x3; val_offset:49575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49575*FLEN/8, x4, x1, x2) - -inst_16526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f800007; valaddr_reg:x3; val_offset:49578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49578*FLEN/8, x4, x1, x2) - -inst_16527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f80000f; valaddr_reg:x3; val_offset:49581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49581*FLEN/8, x4, x1, x2) - -inst_16528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f80001f; valaddr_reg:x3; val_offset:49584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49584*FLEN/8, x4, x1, x2) - -inst_16529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f80003f; valaddr_reg:x3; val_offset:49587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49587*FLEN/8, x4, x1, x2) - -inst_16530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f80007f; valaddr_reg:x3; val_offset:49590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49590*FLEN/8, x4, x1, x2) - -inst_16531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f8000ff; valaddr_reg:x3; val_offset:49593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49593*FLEN/8, x4, x1, x2) - -inst_16532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f8001ff; valaddr_reg:x3; val_offset:49596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49596*FLEN/8, x4, x1, x2) - -inst_16533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f8003ff; valaddr_reg:x3; val_offset:49599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49599*FLEN/8, x4, x1, x2) - -inst_16534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f8007ff; valaddr_reg:x3; val_offset:49602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49602*FLEN/8, x4, x1, x2) - -inst_16535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f800fff; valaddr_reg:x3; val_offset:49605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49605*FLEN/8, x4, x1, x2) - -inst_16536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f801fff; valaddr_reg:x3; val_offset:49608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49608*FLEN/8, x4, x1, x2) - -inst_16537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f803fff; valaddr_reg:x3; val_offset:49611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49611*FLEN/8, x4, x1, x2) - -inst_16538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f807fff; valaddr_reg:x3; val_offset:49614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49614*FLEN/8, x4, x1, x2) - -inst_16539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f80ffff; valaddr_reg:x3; val_offset:49617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49617*FLEN/8, x4, x1, x2) - -inst_16540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f81ffff; valaddr_reg:x3; val_offset:49620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49620*FLEN/8, x4, x1, x2) - -inst_16541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f83ffff; valaddr_reg:x3; val_offset:49623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49623*FLEN/8, x4, x1, x2) - -inst_16542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f87ffff; valaddr_reg:x3; val_offset:49626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49626*FLEN/8, x4, x1, x2) - -inst_16543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f8fffff; valaddr_reg:x3; val_offset:49629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49629*FLEN/8, x4, x1, x2) - -inst_16544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2f9fffff; valaddr_reg:x3; val_offset:49632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49632*FLEN/8, x4, x1, x2) - -inst_16545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fbfffff; valaddr_reg:x3; val_offset:49635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49635*FLEN/8, x4, x1, x2) - -inst_16546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fc00000; valaddr_reg:x3; val_offset:49638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49638*FLEN/8, x4, x1, x2) - -inst_16547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fe00000; valaddr_reg:x3; val_offset:49641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49641*FLEN/8, x4, x1, x2) - -inst_16548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ff00000; valaddr_reg:x3; val_offset:49644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49644*FLEN/8, x4, x1, x2) - -inst_16549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ff80000; valaddr_reg:x3; val_offset:49647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49647*FLEN/8, x4, x1, x2) - -inst_16550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffc0000; valaddr_reg:x3; val_offset:49650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49650*FLEN/8, x4, x1, x2) - -inst_16551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffe0000; valaddr_reg:x3; val_offset:49653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49653*FLEN/8, x4, x1, x2) - -inst_16552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fff0000; valaddr_reg:x3; val_offset:49656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49656*FLEN/8, x4, x1, x2) - -inst_16553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fff8000; valaddr_reg:x3; val_offset:49659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49659*FLEN/8, x4, x1, x2) - -inst_16554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fffc000; valaddr_reg:x3; val_offset:49662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49662*FLEN/8, x4, x1, x2) - -inst_16555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fffe000; valaddr_reg:x3; val_offset:49665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49665*FLEN/8, x4, x1, x2) - -inst_16556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffff000; valaddr_reg:x3; val_offset:49668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49668*FLEN/8, x4, x1, x2) - -inst_16557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffff800; valaddr_reg:x3; val_offset:49671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49671*FLEN/8, x4, x1, x2) - -inst_16558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffffc00; valaddr_reg:x3; val_offset:49674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49674*FLEN/8, x4, x1, x2) - -inst_16559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffffe00; valaddr_reg:x3; val_offset:49677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49677*FLEN/8, x4, x1, x2) - -inst_16560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fffff00; valaddr_reg:x3; val_offset:49680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49680*FLEN/8, x4, x1, x2) - -inst_16561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fffff80; valaddr_reg:x3; val_offset:49683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49683*FLEN/8, x4, x1, x2) - -inst_16562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fffffc0; valaddr_reg:x3; val_offset:49686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49686*FLEN/8, x4, x1, x2) - -inst_16563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fffffe0; valaddr_reg:x3; val_offset:49689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49689*FLEN/8, x4, x1, x2) - -inst_16564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffffff0; valaddr_reg:x3; val_offset:49692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49692*FLEN/8, x4, x1, x2) - -inst_16565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffffff8; valaddr_reg:x3; val_offset:49695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49695*FLEN/8, x4, x1, x2) - -inst_16566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffffffc; valaddr_reg:x3; val_offset:49698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49698*FLEN/8, x4, x1, x2) - -inst_16567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2ffffffe; valaddr_reg:x3; val_offset:49701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49701*FLEN/8, x4, x1, x2) - -inst_16568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x2fffffff; valaddr_reg:x3; val_offset:49704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49704*FLEN/8, x4, x1, x2) - -inst_16569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3f800001; valaddr_reg:x3; val_offset:49707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49707*FLEN/8, x4, x1, x2) - -inst_16570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3f800003; valaddr_reg:x3; val_offset:49710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49710*FLEN/8, x4, x1, x2) - -inst_16571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3f800007; valaddr_reg:x3; val_offset:49713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49713*FLEN/8, x4, x1, x2) - -inst_16572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3f999999; valaddr_reg:x3; val_offset:49716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49716*FLEN/8, x4, x1, x2) - -inst_16573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:49719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49719*FLEN/8, x4, x1, x2) - -inst_16574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:49722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49722*FLEN/8, x4, x1, x2) - -inst_16575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:49725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49725*FLEN/8, x4, x1, x2) - -inst_16576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:49728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49728*FLEN/8, x4, x1, x2) - -inst_16577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:49731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49731*FLEN/8, x4, x1, x2) - -inst_16578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:49734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49734*FLEN/8, x4, x1, x2) - -inst_16579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:49737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49737*FLEN/8, x4, x1, x2) - -inst_16580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:49740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49740*FLEN/8, x4, x1, x2) - -inst_16581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:49743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49743*FLEN/8, x4, x1, x2) - -inst_16582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:49746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49746*FLEN/8, x4, x1, x2) - -inst_16583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:49749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49749*FLEN/8, x4, x1, x2) - -inst_16584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:49752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49752*FLEN/8, x4, x1, x2) - -inst_16585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:49755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49755*FLEN/8, x4, x1, x2) - -inst_16586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:49758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49758*FLEN/8, x4, x1, x2) - -inst_16587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:49761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49761*FLEN/8, x4, x1, x2) - -inst_16588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:49764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49764*FLEN/8, x4, x1, x2) - -inst_16589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:49767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49767*FLEN/8, x4, x1, x2) - -inst_16590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:49770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49770*FLEN/8, x4, x1, x2) - -inst_16591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:49773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49773*FLEN/8, x4, x1, x2) - -inst_16592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:49776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49776*FLEN/8, x4, x1, x2) - -inst_16593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:49779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49779*FLEN/8, x4, x1, x2) - -inst_16594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:49782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49782*FLEN/8, x4, x1, x2) - -inst_16595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:49785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49785*FLEN/8, x4, x1, x2) - -inst_16596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:49788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49788*FLEN/8, x4, x1, x2) - -inst_16597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:49791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49791*FLEN/8, x4, x1, x2) - -inst_16598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:49794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49794*FLEN/8, x4, x1, x2) - -inst_16599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:49797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49797*FLEN/8, x4, x1, x2) - -inst_16600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:49800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49800*FLEN/8, x4, x1, x2) - -inst_16601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83800000; valaddr_reg:x3; val_offset:49803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49803*FLEN/8, x4, x1, x2) - -inst_16602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83800001; valaddr_reg:x3; val_offset:49806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49806*FLEN/8, x4, x1, x2) - -inst_16603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83800003; valaddr_reg:x3; val_offset:49809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49809*FLEN/8, x4, x1, x2) - -inst_16604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83800007; valaddr_reg:x3; val_offset:49812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49812*FLEN/8, x4, x1, x2) - -inst_16605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8380000f; valaddr_reg:x3; val_offset:49815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49815*FLEN/8, x4, x1, x2) - -inst_16606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8380001f; valaddr_reg:x3; val_offset:49818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49818*FLEN/8, x4, x1, x2) - -inst_16607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8380003f; valaddr_reg:x3; val_offset:49821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49821*FLEN/8, x4, x1, x2) - -inst_16608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8380007f; valaddr_reg:x3; val_offset:49824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49824*FLEN/8, x4, x1, x2) - -inst_16609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x838000ff; valaddr_reg:x3; val_offset:49827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49827*FLEN/8, x4, x1, x2) - -inst_16610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x838001ff; valaddr_reg:x3; val_offset:49830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49830*FLEN/8, x4, x1, x2) - -inst_16611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x838003ff; valaddr_reg:x3; val_offset:49833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49833*FLEN/8, x4, x1, x2) - -inst_16612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x838007ff; valaddr_reg:x3; val_offset:49836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49836*FLEN/8, x4, x1, x2) - -inst_16613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83800fff; valaddr_reg:x3; val_offset:49839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49839*FLEN/8, x4, x1, x2) - -inst_16614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83801fff; valaddr_reg:x3; val_offset:49842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49842*FLEN/8, x4, x1, x2) - -inst_16615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83803fff; valaddr_reg:x3; val_offset:49845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49845*FLEN/8, x4, x1, x2) - -inst_16616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83807fff; valaddr_reg:x3; val_offset:49848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49848*FLEN/8, x4, x1, x2) - -inst_16617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8380ffff; valaddr_reg:x3; val_offset:49851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49851*FLEN/8, x4, x1, x2) - -inst_16618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8381ffff; valaddr_reg:x3; val_offset:49854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49854*FLEN/8, x4, x1, x2) - -inst_16619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8383ffff; valaddr_reg:x3; val_offset:49857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49857*FLEN/8, x4, x1, x2) - -inst_16620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x8387ffff; valaddr_reg:x3; val_offset:49860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49860*FLEN/8, x4, x1, x2) - -inst_16621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x838fffff; valaddr_reg:x3; val_offset:49863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49863*FLEN/8, x4, x1, x2) - -inst_16622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x839fffff; valaddr_reg:x3; val_offset:49866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49866*FLEN/8, x4, x1, x2) - -inst_16623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83bfffff; valaddr_reg:x3; val_offset:49869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49869*FLEN/8, x4, x1, x2) - -inst_16624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83c00000; valaddr_reg:x3; val_offset:49872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49872*FLEN/8, x4, x1, x2) - -inst_16625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83e00000; valaddr_reg:x3; val_offset:49875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49875*FLEN/8, x4, x1, x2) - -inst_16626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83f00000; valaddr_reg:x3; val_offset:49878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49878*FLEN/8, x4, x1, x2) - -inst_16627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83f80000; valaddr_reg:x3; val_offset:49881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49881*FLEN/8, x4, x1, x2) - -inst_16628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fc0000; valaddr_reg:x3; val_offset:49884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49884*FLEN/8, x4, x1, x2) - -inst_16629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fe0000; valaddr_reg:x3; val_offset:49887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49887*FLEN/8, x4, x1, x2) - -inst_16630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ff0000; valaddr_reg:x3; val_offset:49890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49890*FLEN/8, x4, x1, x2) - -inst_16631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ff8000; valaddr_reg:x3; val_offset:49893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49893*FLEN/8, x4, x1, x2) - -inst_16632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ffc000; valaddr_reg:x3; val_offset:49896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49896*FLEN/8, x4, x1, x2) - -inst_16633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ffe000; valaddr_reg:x3; val_offset:49899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49899*FLEN/8, x4, x1, x2) - -inst_16634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fff000; valaddr_reg:x3; val_offset:49902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49902*FLEN/8, x4, x1, x2) - -inst_16635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fff800; valaddr_reg:x3; val_offset:49905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49905*FLEN/8, x4, x1, x2) - -inst_16636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fffc00; valaddr_reg:x3; val_offset:49908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49908*FLEN/8, x4, x1, x2) - -inst_16637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fffe00; valaddr_reg:x3; val_offset:49911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49911*FLEN/8, x4, x1, x2) - -inst_16638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ffff00; valaddr_reg:x3; val_offset:49914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49914*FLEN/8, x4, x1, x2) - -inst_16639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ffff80; valaddr_reg:x3; val_offset:49917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49917*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_131) - -inst_16640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ffffc0; valaddr_reg:x3; val_offset:49920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49920*FLEN/8, x4, x1, x2) - -inst_16641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ffffe0; valaddr_reg:x3; val_offset:49923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49923*FLEN/8, x4, x1, x2) - -inst_16642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fffff0; valaddr_reg:x3; val_offset:49926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49926*FLEN/8, x4, x1, x2) - -inst_16643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fffff8; valaddr_reg:x3; val_offset:49929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49929*FLEN/8, x4, x1, x2) - -inst_16644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fffffc; valaddr_reg:x3; val_offset:49932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49932*FLEN/8, x4, x1, x2) - -inst_16645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83fffffe; valaddr_reg:x3; val_offset:49935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49935*FLEN/8, x4, x1, x2) - -inst_16646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; -op3val:0x83ffffff; valaddr_reg:x3; val_offset:49938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49938*FLEN/8, x4, x1, x2) - -inst_16647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:49941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49941*FLEN/8, x4, x1, x2) - -inst_16648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:49944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49944*FLEN/8, x4, x1, x2) - -inst_16649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:49947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49947*FLEN/8, x4, x1, x2) - -inst_16650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:49950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49950*FLEN/8, x4, x1, x2) - -inst_16651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:49953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49953*FLEN/8, x4, x1, x2) - -inst_16652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:49956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49956*FLEN/8, x4, x1, x2) - -inst_16653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:49959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49959*FLEN/8, x4, x1, x2) - -inst_16654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:49962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49962*FLEN/8, x4, x1, x2) - -inst_16655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:49965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49965*FLEN/8, x4, x1, x2) - -inst_16656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:49968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49968*FLEN/8, x4, x1, x2) - -inst_16657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:49971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49971*FLEN/8, x4, x1, x2) - -inst_16658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:49974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49974*FLEN/8, x4, x1, x2) - -inst_16659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:49977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49977*FLEN/8, x4, x1, x2) - -inst_16660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:49980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49980*FLEN/8, x4, x1, x2) - -inst_16661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:49983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49983*FLEN/8, x4, x1, x2) - -inst_16662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:49986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49986*FLEN/8, x4, x1, x2) - -inst_16663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa800000; valaddr_reg:x3; val_offset:49989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49989*FLEN/8, x4, x1, x2) - -inst_16664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa800001; valaddr_reg:x3; val_offset:49992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49992*FLEN/8, x4, x1, x2) - -inst_16665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa800003; valaddr_reg:x3; val_offset:49995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49995*FLEN/8, x4, x1, x2) - -inst_16666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa800007; valaddr_reg:x3; val_offset:49998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49998*FLEN/8, x4, x1, x2) - -inst_16667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa80000f; valaddr_reg:x3; val_offset:50001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50001*FLEN/8, x4, x1, x2) - -inst_16668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa80001f; valaddr_reg:x3; val_offset:50004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50004*FLEN/8, x4, x1, x2) - -inst_16669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa80003f; valaddr_reg:x3; val_offset:50007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50007*FLEN/8, x4, x1, x2) - -inst_16670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa80007f; valaddr_reg:x3; val_offset:50010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50010*FLEN/8, x4, x1, x2) - -inst_16671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa8000ff; valaddr_reg:x3; val_offset:50013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50013*FLEN/8, x4, x1, x2) - -inst_16672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa8001ff; valaddr_reg:x3; val_offset:50016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50016*FLEN/8, x4, x1, x2) - -inst_16673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa8003ff; valaddr_reg:x3; val_offset:50019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50019*FLEN/8, x4, x1, x2) - -inst_16674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa8007ff; valaddr_reg:x3; val_offset:50022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50022*FLEN/8, x4, x1, x2) - -inst_16675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa800fff; valaddr_reg:x3; val_offset:50025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50025*FLEN/8, x4, x1, x2) - -inst_16676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa801fff; valaddr_reg:x3; val_offset:50028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50028*FLEN/8, x4, x1, x2) - -inst_16677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa803fff; valaddr_reg:x3; val_offset:50031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50031*FLEN/8, x4, x1, x2) - -inst_16678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa807fff; valaddr_reg:x3; val_offset:50034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50034*FLEN/8, x4, x1, x2) - -inst_16679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa80ffff; valaddr_reg:x3; val_offset:50037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50037*FLEN/8, x4, x1, x2) - -inst_16680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa81ffff; valaddr_reg:x3; val_offset:50040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50040*FLEN/8, x4, x1, x2) - -inst_16681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa83ffff; valaddr_reg:x3; val_offset:50043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50043*FLEN/8, x4, x1, x2) - -inst_16682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa87ffff; valaddr_reg:x3; val_offset:50046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50046*FLEN/8, x4, x1, x2) - -inst_16683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa8fffff; valaddr_reg:x3; val_offset:50049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50049*FLEN/8, x4, x1, x2) - -inst_16684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xa9fffff; valaddr_reg:x3; val_offset:50052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50052*FLEN/8, x4, x1, x2) - -inst_16685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xabfffff; valaddr_reg:x3; val_offset:50055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50055*FLEN/8, x4, x1, x2) - -inst_16686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xac00000; valaddr_reg:x3; val_offset:50058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50058*FLEN/8, x4, x1, x2) - -inst_16687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xae00000; valaddr_reg:x3; val_offset:50061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50061*FLEN/8, x4, x1, x2) - -inst_16688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaf00000; valaddr_reg:x3; val_offset:50064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50064*FLEN/8, x4, x1, x2) - -inst_16689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaf80000; valaddr_reg:x3; val_offset:50067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50067*FLEN/8, x4, x1, x2) - -inst_16690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafc0000; valaddr_reg:x3; val_offset:50070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50070*FLEN/8, x4, x1, x2) - -inst_16691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafe0000; valaddr_reg:x3; val_offset:50073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50073*FLEN/8, x4, x1, x2) - -inst_16692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaff0000; valaddr_reg:x3; val_offset:50076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50076*FLEN/8, x4, x1, x2) - -inst_16693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaff8000; valaddr_reg:x3; val_offset:50079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50079*FLEN/8, x4, x1, x2) - -inst_16694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaffc000; valaddr_reg:x3; val_offset:50082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50082*FLEN/8, x4, x1, x2) - -inst_16695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaffe000; valaddr_reg:x3; val_offset:50085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50085*FLEN/8, x4, x1, x2) - -inst_16696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafff000; valaddr_reg:x3; val_offset:50088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50088*FLEN/8, x4, x1, x2) - -inst_16697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafff800; valaddr_reg:x3; val_offset:50091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50091*FLEN/8, x4, x1, x2) - -inst_16698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafffc00; valaddr_reg:x3; val_offset:50094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50094*FLEN/8, x4, x1, x2) - -inst_16699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafffe00; valaddr_reg:x3; val_offset:50097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50097*FLEN/8, x4, x1, x2) - -inst_16700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaffff00; valaddr_reg:x3; val_offset:50100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50100*FLEN/8, x4, x1, x2) - -inst_16701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaffff80; valaddr_reg:x3; val_offset:50103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50103*FLEN/8, x4, x1, x2) - -inst_16702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaffffc0; valaddr_reg:x3; val_offset:50106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50106*FLEN/8, x4, x1, x2) - -inst_16703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaffffe0; valaddr_reg:x3; val_offset:50109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50109*FLEN/8, x4, x1, x2) - -inst_16704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafffff0; valaddr_reg:x3; val_offset:50112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50112*FLEN/8, x4, x1, x2) - -inst_16705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafffff8; valaddr_reg:x3; val_offset:50115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50115*FLEN/8, x4, x1, x2) - -inst_16706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafffffc; valaddr_reg:x3; val_offset:50118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50118*FLEN/8, x4, x1, x2) - -inst_16707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xafffffe; valaddr_reg:x3; val_offset:50121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50121*FLEN/8, x4, x1, x2) - -inst_16708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; -op3val:0xaffffff; valaddr_reg:x3; val_offset:50124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50124*FLEN/8, x4, x1, x2) - -inst_16709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e800000; valaddr_reg:x3; val_offset:50127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50127*FLEN/8, x4, x1, x2) - -inst_16710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e800001; valaddr_reg:x3; val_offset:50130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50130*FLEN/8, x4, x1, x2) - -inst_16711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e800003; valaddr_reg:x3; val_offset:50133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50133*FLEN/8, x4, x1, x2) - -inst_16712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e800007; valaddr_reg:x3; val_offset:50136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50136*FLEN/8, x4, x1, x2) - -inst_16713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e80000f; valaddr_reg:x3; val_offset:50139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50139*FLEN/8, x4, x1, x2) - -inst_16714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e80001f; valaddr_reg:x3; val_offset:50142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50142*FLEN/8, x4, x1, x2) - -inst_16715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e80003f; valaddr_reg:x3; val_offset:50145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50145*FLEN/8, x4, x1, x2) - -inst_16716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e80007f; valaddr_reg:x3; val_offset:50148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50148*FLEN/8, x4, x1, x2) - -inst_16717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e8000ff; valaddr_reg:x3; val_offset:50151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50151*FLEN/8, x4, x1, x2) - -inst_16718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e8001ff; valaddr_reg:x3; val_offset:50154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50154*FLEN/8, x4, x1, x2) - -inst_16719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e8003ff; valaddr_reg:x3; val_offset:50157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50157*FLEN/8, x4, x1, x2) - -inst_16720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e8007ff; valaddr_reg:x3; val_offset:50160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50160*FLEN/8, x4, x1, x2) - -inst_16721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e800fff; valaddr_reg:x3; val_offset:50163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50163*FLEN/8, x4, x1, x2) - -inst_16722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e801fff; valaddr_reg:x3; val_offset:50166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50166*FLEN/8, x4, x1, x2) - -inst_16723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e803fff; valaddr_reg:x3; val_offset:50169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50169*FLEN/8, x4, x1, x2) - -inst_16724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e807fff; valaddr_reg:x3; val_offset:50172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50172*FLEN/8, x4, x1, x2) - -inst_16725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e80ffff; valaddr_reg:x3; val_offset:50175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50175*FLEN/8, x4, x1, x2) - -inst_16726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e81ffff; valaddr_reg:x3; val_offset:50178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50178*FLEN/8, x4, x1, x2) - -inst_16727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e83ffff; valaddr_reg:x3; val_offset:50181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50181*FLEN/8, x4, x1, x2) - -inst_16728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e87ffff; valaddr_reg:x3; val_offset:50184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50184*FLEN/8, x4, x1, x2) - -inst_16729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e8fffff; valaddr_reg:x3; val_offset:50187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50187*FLEN/8, x4, x1, x2) - -inst_16730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5e9fffff; valaddr_reg:x3; val_offset:50190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50190*FLEN/8, x4, x1, x2) - -inst_16731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5ebfffff; valaddr_reg:x3; val_offset:50193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50193*FLEN/8, x4, x1, x2) - -inst_16732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5ec00000; valaddr_reg:x3; val_offset:50196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50196*FLEN/8, x4, x1, x2) - -inst_16733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5ee00000; valaddr_reg:x3; val_offset:50199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50199*FLEN/8, x4, x1, x2) - -inst_16734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5ef00000; valaddr_reg:x3; val_offset:50202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50202*FLEN/8, x4, x1, x2) - -inst_16735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5ef80000; valaddr_reg:x3; val_offset:50205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50205*FLEN/8, x4, x1, x2) - -inst_16736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efc0000; valaddr_reg:x3; val_offset:50208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50208*FLEN/8, x4, x1, x2) - -inst_16737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efe0000; valaddr_reg:x3; val_offset:50211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50211*FLEN/8, x4, x1, x2) - -inst_16738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5eff0000; valaddr_reg:x3; val_offset:50214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50214*FLEN/8, x4, x1, x2) - -inst_16739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5eff8000; valaddr_reg:x3; val_offset:50217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50217*FLEN/8, x4, x1, x2) - -inst_16740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5effc000; valaddr_reg:x3; val_offset:50220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50220*FLEN/8, x4, x1, x2) - -inst_16741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5effe000; valaddr_reg:x3; val_offset:50223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50223*FLEN/8, x4, x1, x2) - -inst_16742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efff000; valaddr_reg:x3; val_offset:50226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50226*FLEN/8, x4, x1, x2) - -inst_16743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efff800; valaddr_reg:x3; val_offset:50229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50229*FLEN/8, x4, x1, x2) - -inst_16744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efffc00; valaddr_reg:x3; val_offset:50232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50232*FLEN/8, x4, x1, x2) - -inst_16745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efffe00; valaddr_reg:x3; val_offset:50235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50235*FLEN/8, x4, x1, x2) - -inst_16746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5effff00; valaddr_reg:x3; val_offset:50238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50238*FLEN/8, x4, x1, x2) - -inst_16747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5effff80; valaddr_reg:x3; val_offset:50241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50241*FLEN/8, x4, x1, x2) - -inst_16748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5effffc0; valaddr_reg:x3; val_offset:50244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50244*FLEN/8, x4, x1, x2) - -inst_16749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5effffe0; valaddr_reg:x3; val_offset:50247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50247*FLEN/8, x4, x1, x2) - -inst_16750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efffff0; valaddr_reg:x3; val_offset:50250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50250*FLEN/8, x4, x1, x2) - -inst_16751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efffff8; valaddr_reg:x3; val_offset:50253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50253*FLEN/8, x4, x1, x2) - -inst_16752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efffffc; valaddr_reg:x3; val_offset:50256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50256*FLEN/8, x4, x1, x2) - -inst_16753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5efffffe; valaddr_reg:x3; val_offset:50259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50259*FLEN/8, x4, x1, x2) - -inst_16754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x5effffff; valaddr_reg:x3; val_offset:50262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50262*FLEN/8, x4, x1, x2) - -inst_16755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f000001; valaddr_reg:x3; val_offset:50265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50265*FLEN/8, x4, x1, x2) - -inst_16756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f000003; valaddr_reg:x3; val_offset:50268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50268*FLEN/8, x4, x1, x2) - -inst_16757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f000007; valaddr_reg:x3; val_offset:50271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50271*FLEN/8, x4, x1, x2) - -inst_16758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f199999; valaddr_reg:x3; val_offset:50274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50274*FLEN/8, x4, x1, x2) - -inst_16759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f249249; valaddr_reg:x3; val_offset:50277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50277*FLEN/8, x4, x1, x2) - -inst_16760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f333333; valaddr_reg:x3; val_offset:50280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50280*FLEN/8, x4, x1, x2) - -inst_16761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:50283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50283*FLEN/8, x4, x1, x2) - -inst_16762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:50286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50286*FLEN/8, x4, x1, x2) - -inst_16763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f444444; valaddr_reg:x3; val_offset:50289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50289*FLEN/8, x4, x1, x2) - -inst_16764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:50292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50292*FLEN/8, x4, x1, x2) - -inst_16765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:50295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50295*FLEN/8, x4, x1, x2) - -inst_16766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f666666; valaddr_reg:x3; val_offset:50298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50298*FLEN/8, x4, x1, x2) - -inst_16767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:50301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50301*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_132) - -inst_16768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:50304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50304*FLEN/8, x4, x1, x2) - -inst_16769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:50307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50307*FLEN/8, x4, x1, x2) - -inst_16770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:50310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50310*FLEN/8, x4, x1, x2) - -inst_16771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5800000; valaddr_reg:x3; val_offset:50313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50313*FLEN/8, x4, x1, x2) - -inst_16772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5800001; valaddr_reg:x3; val_offset:50316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50316*FLEN/8, x4, x1, x2) - -inst_16773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5800003; valaddr_reg:x3; val_offset:50319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50319*FLEN/8, x4, x1, x2) - -inst_16774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5800007; valaddr_reg:x3; val_offset:50322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50322*FLEN/8, x4, x1, x2) - -inst_16775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe580000f; valaddr_reg:x3; val_offset:50325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50325*FLEN/8, x4, x1, x2) - -inst_16776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe580001f; valaddr_reg:x3; val_offset:50328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50328*FLEN/8, x4, x1, x2) - -inst_16777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe580003f; valaddr_reg:x3; val_offset:50331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50331*FLEN/8, x4, x1, x2) - -inst_16778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe580007f; valaddr_reg:x3; val_offset:50334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50334*FLEN/8, x4, x1, x2) - -inst_16779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe58000ff; valaddr_reg:x3; val_offset:50337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50337*FLEN/8, x4, x1, x2) - -inst_16780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe58001ff; valaddr_reg:x3; val_offset:50340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50340*FLEN/8, x4, x1, x2) - -inst_16781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe58003ff; valaddr_reg:x3; val_offset:50343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50343*FLEN/8, x4, x1, x2) - -inst_16782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe58007ff; valaddr_reg:x3; val_offset:50346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50346*FLEN/8, x4, x1, x2) - -inst_16783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5800fff; valaddr_reg:x3; val_offset:50349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50349*FLEN/8, x4, x1, x2) - -inst_16784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5801fff; valaddr_reg:x3; val_offset:50352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50352*FLEN/8, x4, x1, x2) - -inst_16785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5803fff; valaddr_reg:x3; val_offset:50355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50355*FLEN/8, x4, x1, x2) - -inst_16786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5807fff; valaddr_reg:x3; val_offset:50358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50358*FLEN/8, x4, x1, x2) - -inst_16787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe580ffff; valaddr_reg:x3; val_offset:50361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50361*FLEN/8, x4, x1, x2) - -inst_16788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe581ffff; valaddr_reg:x3; val_offset:50364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50364*FLEN/8, x4, x1, x2) - -inst_16789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe583ffff; valaddr_reg:x3; val_offset:50367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50367*FLEN/8, x4, x1, x2) - -inst_16790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe587ffff; valaddr_reg:x3; val_offset:50370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50370*FLEN/8, x4, x1, x2) - -inst_16791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe58fffff; valaddr_reg:x3; val_offset:50373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50373*FLEN/8, x4, x1, x2) - -inst_16792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe59fffff; valaddr_reg:x3; val_offset:50376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50376*FLEN/8, x4, x1, x2) - -inst_16793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5bfffff; valaddr_reg:x3; val_offset:50379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50379*FLEN/8, x4, x1, x2) - -inst_16794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5c00000; valaddr_reg:x3; val_offset:50382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50382*FLEN/8, x4, x1, x2) - -inst_16795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5e00000; valaddr_reg:x3; val_offset:50385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50385*FLEN/8, x4, x1, x2) - -inst_16796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5f00000; valaddr_reg:x3; val_offset:50388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50388*FLEN/8, x4, x1, x2) - -inst_16797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5f80000; valaddr_reg:x3; val_offset:50391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50391*FLEN/8, x4, x1, x2) - -inst_16798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fc0000; valaddr_reg:x3; val_offset:50394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50394*FLEN/8, x4, x1, x2) - -inst_16799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fe0000; valaddr_reg:x3; val_offset:50397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50397*FLEN/8, x4, x1, x2) - -inst_16800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ff0000; valaddr_reg:x3; val_offset:50400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50400*FLEN/8, x4, x1, x2) - -inst_16801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ff8000; valaddr_reg:x3; val_offset:50403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50403*FLEN/8, x4, x1, x2) - -inst_16802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ffc000; valaddr_reg:x3; val_offset:50406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50406*FLEN/8, x4, x1, x2) - -inst_16803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ffe000; valaddr_reg:x3; val_offset:50409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50409*FLEN/8, x4, x1, x2) - -inst_16804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fff000; valaddr_reg:x3; val_offset:50412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50412*FLEN/8, x4, x1, x2) - -inst_16805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fff800; valaddr_reg:x3; val_offset:50415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50415*FLEN/8, x4, x1, x2) - -inst_16806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fffc00; valaddr_reg:x3; val_offset:50418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50418*FLEN/8, x4, x1, x2) - -inst_16807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fffe00; valaddr_reg:x3; val_offset:50421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50421*FLEN/8, x4, x1, x2) - -inst_16808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ffff00; valaddr_reg:x3; val_offset:50424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50424*FLEN/8, x4, x1, x2) - -inst_16809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ffff80; valaddr_reg:x3; val_offset:50427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50427*FLEN/8, x4, x1, x2) - -inst_16810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ffffc0; valaddr_reg:x3; val_offset:50430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50430*FLEN/8, x4, x1, x2) - -inst_16811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ffffe0; valaddr_reg:x3; val_offset:50433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50433*FLEN/8, x4, x1, x2) - -inst_16812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fffff0; valaddr_reg:x3; val_offset:50436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50436*FLEN/8, x4, x1, x2) - -inst_16813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fffff8; valaddr_reg:x3; val_offset:50439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50439*FLEN/8, x4, x1, x2) - -inst_16814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fffffc; valaddr_reg:x3; val_offset:50442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50442*FLEN/8, x4, x1, x2) - -inst_16815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5fffffe; valaddr_reg:x3; val_offset:50445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50445*FLEN/8, x4, x1, x2) - -inst_16816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xe5ffffff; valaddr_reg:x3; val_offset:50448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50448*FLEN/8, x4, x1, x2) - -inst_16817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff000001; valaddr_reg:x3; val_offset:50451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50451*FLEN/8, x4, x1, x2) - -inst_16818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff000003; valaddr_reg:x3; val_offset:50454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50454*FLEN/8, x4, x1, x2) - -inst_16819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff000007; valaddr_reg:x3; val_offset:50457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50457*FLEN/8, x4, x1, x2) - -inst_16820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff199999; valaddr_reg:x3; val_offset:50460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50460*FLEN/8, x4, x1, x2) - -inst_16821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff249249; valaddr_reg:x3; val_offset:50463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50463*FLEN/8, x4, x1, x2) - -inst_16822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff333333; valaddr_reg:x3; val_offset:50466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50466*FLEN/8, x4, x1, x2) - -inst_16823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:50469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50469*FLEN/8, x4, x1, x2) - -inst_16824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:50472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50472*FLEN/8, x4, x1, x2) - -inst_16825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff444444; valaddr_reg:x3; val_offset:50475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50475*FLEN/8, x4, x1, x2) - -inst_16826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:50478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50478*FLEN/8, x4, x1, x2) - -inst_16827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:50481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50481*FLEN/8, x4, x1, x2) - -inst_16828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff666666; valaddr_reg:x3; val_offset:50484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50484*FLEN/8, x4, x1, x2) - -inst_16829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:50487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50487*FLEN/8, x4, x1, x2) - -inst_16830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:50490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50490*FLEN/8, x4, x1, x2) - -inst_16831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:50493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50493*FLEN/8, x4, x1, x2) - -inst_16832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:50496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50496*FLEN/8, x4, x1, x2) - -inst_16833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbf800001; valaddr_reg:x3; val_offset:50499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50499*FLEN/8, x4, x1, x2) - -inst_16834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbf800003; valaddr_reg:x3; val_offset:50502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50502*FLEN/8, x4, x1, x2) - -inst_16835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbf800007; valaddr_reg:x3; val_offset:50505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50505*FLEN/8, x4, x1, x2) - -inst_16836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbf999999; valaddr_reg:x3; val_offset:50508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50508*FLEN/8, x4, x1, x2) - -inst_16837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:50511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50511*FLEN/8, x4, x1, x2) - -inst_16838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:50514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50514*FLEN/8, x4, x1, x2) - -inst_16839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:50517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50517*FLEN/8, x4, x1, x2) - -inst_16840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:50520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50520*FLEN/8, x4, x1, x2) - -inst_16841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:50523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50523*FLEN/8, x4, x1, x2) - -inst_16842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:50526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50526*FLEN/8, x4, x1, x2) - -inst_16843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:50529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50529*FLEN/8, x4, x1, x2) - -inst_16844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:50532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50532*FLEN/8, x4, x1, x2) - -inst_16845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:50535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50535*FLEN/8, x4, x1, x2) - -inst_16846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:50538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50538*FLEN/8, x4, x1, x2) - -inst_16847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:50541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50541*FLEN/8, x4, x1, x2) - -inst_16848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:50544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50544*FLEN/8, x4, x1, x2) - -inst_16849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca000000; valaddr_reg:x3; val_offset:50547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50547*FLEN/8, x4, x1, x2) - -inst_16850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca000001; valaddr_reg:x3; val_offset:50550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50550*FLEN/8, x4, x1, x2) - -inst_16851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca000003; valaddr_reg:x3; val_offset:50553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50553*FLEN/8, x4, x1, x2) - -inst_16852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca000007; valaddr_reg:x3; val_offset:50556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50556*FLEN/8, x4, x1, x2) - -inst_16853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca00000f; valaddr_reg:x3; val_offset:50559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50559*FLEN/8, x4, x1, x2) - -inst_16854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca00001f; valaddr_reg:x3; val_offset:50562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50562*FLEN/8, x4, x1, x2) - -inst_16855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca00003f; valaddr_reg:x3; val_offset:50565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50565*FLEN/8, x4, x1, x2) - -inst_16856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca00007f; valaddr_reg:x3; val_offset:50568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50568*FLEN/8, x4, x1, x2) - -inst_16857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca0000ff; valaddr_reg:x3; val_offset:50571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50571*FLEN/8, x4, x1, x2) - -inst_16858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca0001ff; valaddr_reg:x3; val_offset:50574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50574*FLEN/8, x4, x1, x2) - -inst_16859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca0003ff; valaddr_reg:x3; val_offset:50577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50577*FLEN/8, x4, x1, x2) - -inst_16860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca0007ff; valaddr_reg:x3; val_offset:50580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50580*FLEN/8, x4, x1, x2) - -inst_16861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca000fff; valaddr_reg:x3; val_offset:50583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50583*FLEN/8, x4, x1, x2) - -inst_16862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca001fff; valaddr_reg:x3; val_offset:50586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50586*FLEN/8, x4, x1, x2) - -inst_16863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca003fff; valaddr_reg:x3; val_offset:50589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50589*FLEN/8, x4, x1, x2) - -inst_16864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca007fff; valaddr_reg:x3; val_offset:50592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50592*FLEN/8, x4, x1, x2) - -inst_16865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca00ffff; valaddr_reg:x3; val_offset:50595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50595*FLEN/8, x4, x1, x2) - -inst_16866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca01ffff; valaddr_reg:x3; val_offset:50598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50598*FLEN/8, x4, x1, x2) - -inst_16867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca03ffff; valaddr_reg:x3; val_offset:50601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50601*FLEN/8, x4, x1, x2) - -inst_16868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca07ffff; valaddr_reg:x3; val_offset:50604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50604*FLEN/8, x4, x1, x2) - -inst_16869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca0fffff; valaddr_reg:x3; val_offset:50607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50607*FLEN/8, x4, x1, x2) - -inst_16870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca1fffff; valaddr_reg:x3; val_offset:50610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50610*FLEN/8, x4, x1, x2) - -inst_16871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca3fffff; valaddr_reg:x3; val_offset:50613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50613*FLEN/8, x4, x1, x2) - -inst_16872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca400000; valaddr_reg:x3; val_offset:50616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50616*FLEN/8, x4, x1, x2) - -inst_16873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca600000; valaddr_reg:x3; val_offset:50619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50619*FLEN/8, x4, x1, x2) - -inst_16874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca700000; valaddr_reg:x3; val_offset:50622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50622*FLEN/8, x4, x1, x2) - -inst_16875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca780000; valaddr_reg:x3; val_offset:50625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50625*FLEN/8, x4, x1, x2) - -inst_16876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7c0000; valaddr_reg:x3; val_offset:50628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50628*FLEN/8, x4, x1, x2) - -inst_16877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7e0000; valaddr_reg:x3; val_offset:50631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50631*FLEN/8, x4, x1, x2) - -inst_16878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7f0000; valaddr_reg:x3; val_offset:50634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50634*FLEN/8, x4, x1, x2) - -inst_16879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7f8000; valaddr_reg:x3; val_offset:50637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50637*FLEN/8, x4, x1, x2) - -inst_16880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7fc000; valaddr_reg:x3; val_offset:50640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50640*FLEN/8, x4, x1, x2) - -inst_16881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7fe000; valaddr_reg:x3; val_offset:50643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50643*FLEN/8, x4, x1, x2) - -inst_16882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7ff000; valaddr_reg:x3; val_offset:50646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50646*FLEN/8, x4, x1, x2) - -inst_16883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7ff800; valaddr_reg:x3; val_offset:50649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50649*FLEN/8, x4, x1, x2) - -inst_16884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7ffc00; valaddr_reg:x3; val_offset:50652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50652*FLEN/8, x4, x1, x2) - -inst_16885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7ffe00; valaddr_reg:x3; val_offset:50655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50655*FLEN/8, x4, x1, x2) - -inst_16886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7fff00; valaddr_reg:x3; val_offset:50658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50658*FLEN/8, x4, x1, x2) - -inst_16887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7fff80; valaddr_reg:x3; val_offset:50661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50661*FLEN/8, x4, x1, x2) - -inst_16888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7fffc0; valaddr_reg:x3; val_offset:50664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50664*FLEN/8, x4, x1, x2) - -inst_16889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7fffe0; valaddr_reg:x3; val_offset:50667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50667*FLEN/8, x4, x1, x2) - -inst_16890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7ffff0; valaddr_reg:x3; val_offset:50670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50670*FLEN/8, x4, x1, x2) - -inst_16891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7ffff8; valaddr_reg:x3; val_offset:50673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50673*FLEN/8, x4, x1, x2) - -inst_16892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7ffffc; valaddr_reg:x3; val_offset:50676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50676*FLEN/8, x4, x1, x2) - -inst_16893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7ffffe; valaddr_reg:x3; val_offset:50679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50679*FLEN/8, x4, x1, x2) - -inst_16894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; -op3val:0xca7fffff; valaddr_reg:x3; val_offset:50682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50682*FLEN/8, x4, x1, x2) - -inst_16895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f000000; valaddr_reg:x3; val_offset:50685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50685*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_133) - -inst_16896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f000001; valaddr_reg:x3; val_offset:50688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50688*FLEN/8, x4, x1, x2) - -inst_16897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f000003; valaddr_reg:x3; val_offset:50691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50691*FLEN/8, x4, x1, x2) - -inst_16898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f000007; valaddr_reg:x3; val_offset:50694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50694*FLEN/8, x4, x1, x2) - -inst_16899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f00000f; valaddr_reg:x3; val_offset:50697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50697*FLEN/8, x4, x1, x2) - -inst_16900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f00001f; valaddr_reg:x3; val_offset:50700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50700*FLEN/8, x4, x1, x2) - -inst_16901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f00003f; valaddr_reg:x3; val_offset:50703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50703*FLEN/8, x4, x1, x2) - -inst_16902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f00007f; valaddr_reg:x3; val_offset:50706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50706*FLEN/8, x4, x1, x2) - -inst_16903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f0000ff; valaddr_reg:x3; val_offset:50709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50709*FLEN/8, x4, x1, x2) - -inst_16904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f0001ff; valaddr_reg:x3; val_offset:50712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50712*FLEN/8, x4, x1, x2) - -inst_16905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f0003ff; valaddr_reg:x3; val_offset:50715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50715*FLEN/8, x4, x1, x2) - -inst_16906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f0007ff; valaddr_reg:x3; val_offset:50718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50718*FLEN/8, x4, x1, x2) - -inst_16907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f000fff; valaddr_reg:x3; val_offset:50721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50721*FLEN/8, x4, x1, x2) - -inst_16908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f001fff; valaddr_reg:x3; val_offset:50724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50724*FLEN/8, x4, x1, x2) - -inst_16909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f003fff; valaddr_reg:x3; val_offset:50727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50727*FLEN/8, x4, x1, x2) - -inst_16910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f007fff; valaddr_reg:x3; val_offset:50730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50730*FLEN/8, x4, x1, x2) - -inst_16911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f00ffff; valaddr_reg:x3; val_offset:50733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50733*FLEN/8, x4, x1, x2) - -inst_16912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f01ffff; valaddr_reg:x3; val_offset:50736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50736*FLEN/8, x4, x1, x2) - -inst_16913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f03ffff; valaddr_reg:x3; val_offset:50739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50739*FLEN/8, x4, x1, x2) - -inst_16914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f07ffff; valaddr_reg:x3; val_offset:50742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50742*FLEN/8, x4, x1, x2) - -inst_16915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f0fffff; valaddr_reg:x3; val_offset:50745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50745*FLEN/8, x4, x1, x2) - -inst_16916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f1fffff; valaddr_reg:x3; val_offset:50748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50748*FLEN/8, x4, x1, x2) - -inst_16917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f3fffff; valaddr_reg:x3; val_offset:50751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50751*FLEN/8, x4, x1, x2) - -inst_16918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f400000; valaddr_reg:x3; val_offset:50754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50754*FLEN/8, x4, x1, x2) - -inst_16919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f600000; valaddr_reg:x3; val_offset:50757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50757*FLEN/8, x4, x1, x2) - -inst_16920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f700000; valaddr_reg:x3; val_offset:50760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50760*FLEN/8, x4, x1, x2) - -inst_16921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f780000; valaddr_reg:x3; val_offset:50763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50763*FLEN/8, x4, x1, x2) - -inst_16922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7c0000; valaddr_reg:x3; val_offset:50766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50766*FLEN/8, x4, x1, x2) - -inst_16923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7e0000; valaddr_reg:x3; val_offset:50769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50769*FLEN/8, x4, x1, x2) - -inst_16924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7f0000; valaddr_reg:x3; val_offset:50772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50772*FLEN/8, x4, x1, x2) - -inst_16925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7f8000; valaddr_reg:x3; val_offset:50775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50775*FLEN/8, x4, x1, x2) - -inst_16926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7fc000; valaddr_reg:x3; val_offset:50778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50778*FLEN/8, x4, x1, x2) - -inst_16927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7fe000; valaddr_reg:x3; val_offset:50781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50781*FLEN/8, x4, x1, x2) - -inst_16928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7ff000; valaddr_reg:x3; val_offset:50784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50784*FLEN/8, x4, x1, x2) - -inst_16929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7ff800; valaddr_reg:x3; val_offset:50787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50787*FLEN/8, x4, x1, x2) - -inst_16930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7ffc00; valaddr_reg:x3; val_offset:50790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50790*FLEN/8, x4, x1, x2) - -inst_16931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7ffe00; valaddr_reg:x3; val_offset:50793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50793*FLEN/8, x4, x1, x2) - -inst_16932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7fff00; valaddr_reg:x3; val_offset:50796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50796*FLEN/8, x4, x1, x2) - -inst_16933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7fff80; valaddr_reg:x3; val_offset:50799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50799*FLEN/8, x4, x1, x2) - -inst_16934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7fffc0; valaddr_reg:x3; val_offset:50802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50802*FLEN/8, x4, x1, x2) - -inst_16935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7fffe0; valaddr_reg:x3; val_offset:50805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50805*FLEN/8, x4, x1, x2) - -inst_16936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7ffff0; valaddr_reg:x3; val_offset:50808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50808*FLEN/8, x4, x1, x2) - -inst_16937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7ffff8; valaddr_reg:x3; val_offset:50811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50811*FLEN/8, x4, x1, x2) - -inst_16938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7ffffc; valaddr_reg:x3; val_offset:50814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50814*FLEN/8, x4, x1, x2) - -inst_16939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7ffffe; valaddr_reg:x3; val_offset:50817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50817*FLEN/8, x4, x1, x2) - -inst_16940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f7fffff; valaddr_reg:x3; val_offset:50820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50820*FLEN/8, x4, x1, x2) - -inst_16941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f800001; valaddr_reg:x3; val_offset:50823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50823*FLEN/8, x4, x1, x2) - -inst_16942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f800003; valaddr_reg:x3; val_offset:50826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50826*FLEN/8, x4, x1, x2) - -inst_16943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f800007; valaddr_reg:x3; val_offset:50829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50829*FLEN/8, x4, x1, x2) - -inst_16944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3f999999; valaddr_reg:x3; val_offset:50832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50832*FLEN/8, x4, x1, x2) - -inst_16945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:50835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50835*FLEN/8, x4, x1, x2) - -inst_16946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:50838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50838*FLEN/8, x4, x1, x2) - -inst_16947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:50841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50841*FLEN/8, x4, x1, x2) - -inst_16948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:50844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50844*FLEN/8, x4, x1, x2) - -inst_16949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:50847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50847*FLEN/8, x4, x1, x2) - -inst_16950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:50850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50850*FLEN/8, x4, x1, x2) - -inst_16951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:50853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50853*FLEN/8, x4, x1, x2) - -inst_16952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:50856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50856*FLEN/8, x4, x1, x2) - -inst_16953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:50859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50859*FLEN/8, x4, x1, x2) - -inst_16954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:50862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50862*FLEN/8, x4, x1, x2) - -inst_16955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:50865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50865*FLEN/8, x4, x1, x2) - -inst_16956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:50868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50868*FLEN/8, x4, x1, x2) - -inst_16957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:50871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50871*FLEN/8, x4, x1, x2) - -inst_16958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:50874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50874*FLEN/8, x4, x1, x2) - -inst_16959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:50877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50877*FLEN/8, x4, x1, x2) - -inst_16960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:50880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50880*FLEN/8, x4, x1, x2) - -inst_16961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:50883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50883*FLEN/8, x4, x1, x2) - -inst_16962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:50886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50886*FLEN/8, x4, x1, x2) - -inst_16963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:50889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50889*FLEN/8, x4, x1, x2) - -inst_16964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:50892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50892*FLEN/8, x4, x1, x2) - -inst_16965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:50895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50895*FLEN/8, x4, x1, x2) - -inst_16966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:50898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50898*FLEN/8, x4, x1, x2) - -inst_16967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:50901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50901*FLEN/8, x4, x1, x2) - -inst_16968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:50904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50904*FLEN/8, x4, x1, x2) - -inst_16969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:50907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50907*FLEN/8, x4, x1, x2) - -inst_16970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:50910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50910*FLEN/8, x4, x1, x2) - -inst_16971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:50913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50913*FLEN/8, x4, x1, x2) - -inst_16972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:50916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50916*FLEN/8, x4, x1, x2) - -inst_16973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe000000; valaddr_reg:x3; val_offset:50919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50919*FLEN/8, x4, x1, x2) - -inst_16974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe000001; valaddr_reg:x3; val_offset:50922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50922*FLEN/8, x4, x1, x2) - -inst_16975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe000003; valaddr_reg:x3; val_offset:50925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50925*FLEN/8, x4, x1, x2) - -inst_16976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe000007; valaddr_reg:x3; val_offset:50928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50928*FLEN/8, x4, x1, x2) - -inst_16977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe00000f; valaddr_reg:x3; val_offset:50931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50931*FLEN/8, x4, x1, x2) - -inst_16978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe00001f; valaddr_reg:x3; val_offset:50934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50934*FLEN/8, x4, x1, x2) - -inst_16979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe00003f; valaddr_reg:x3; val_offset:50937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50937*FLEN/8, x4, x1, x2) - -inst_16980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe00007f; valaddr_reg:x3; val_offset:50940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50940*FLEN/8, x4, x1, x2) - -inst_16981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe0000ff; valaddr_reg:x3; val_offset:50943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50943*FLEN/8, x4, x1, x2) - -inst_16982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe0001ff; valaddr_reg:x3; val_offset:50946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50946*FLEN/8, x4, x1, x2) - -inst_16983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe0003ff; valaddr_reg:x3; val_offset:50949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50949*FLEN/8, x4, x1, x2) - -inst_16984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe0007ff; valaddr_reg:x3; val_offset:50952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50952*FLEN/8, x4, x1, x2) - -inst_16985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe000fff; valaddr_reg:x3; val_offset:50955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50955*FLEN/8, x4, x1, x2) - -inst_16986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe001fff; valaddr_reg:x3; val_offset:50958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50958*FLEN/8, x4, x1, x2) - -inst_16987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe003fff; valaddr_reg:x3; val_offset:50961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50961*FLEN/8, x4, x1, x2) - -inst_16988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe007fff; valaddr_reg:x3; val_offset:50964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50964*FLEN/8, x4, x1, x2) - -inst_16989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe00ffff; valaddr_reg:x3; val_offset:50967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50967*FLEN/8, x4, x1, x2) - -inst_16990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe01ffff; valaddr_reg:x3; val_offset:50970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50970*FLEN/8, x4, x1, x2) - -inst_16991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe03ffff; valaddr_reg:x3; val_offset:50973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50973*FLEN/8, x4, x1, x2) - -inst_16992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe07ffff; valaddr_reg:x3; val_offset:50976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50976*FLEN/8, x4, x1, x2) - -inst_16993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe0fffff; valaddr_reg:x3; val_offset:50979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50979*FLEN/8, x4, x1, x2) - -inst_16994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe1fffff; valaddr_reg:x3; val_offset:50982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50982*FLEN/8, x4, x1, x2) - -inst_16995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe3fffff; valaddr_reg:x3; val_offset:50985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50985*FLEN/8, x4, x1, x2) - -inst_16996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe400000; valaddr_reg:x3; val_offset:50988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50988*FLEN/8, x4, x1, x2) - -inst_16997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe600000; valaddr_reg:x3; val_offset:50991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50991*FLEN/8, x4, x1, x2) - -inst_16998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe700000; valaddr_reg:x3; val_offset:50994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50994*FLEN/8, x4, x1, x2) - -inst_16999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe780000; valaddr_reg:x3; val_offset:50997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50997*FLEN/8, x4, x1, x2) - -inst_17000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7c0000; valaddr_reg:x3; val_offset:51000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51000*FLEN/8, x4, x1, x2) - -inst_17001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7e0000; valaddr_reg:x3; val_offset:51003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51003*FLEN/8, x4, x1, x2) - -inst_17002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7f0000; valaddr_reg:x3; val_offset:51006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51006*FLEN/8, x4, x1, x2) - -inst_17003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7f8000; valaddr_reg:x3; val_offset:51009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51009*FLEN/8, x4, x1, x2) - -inst_17004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7fc000; valaddr_reg:x3; val_offset:51012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51012*FLEN/8, x4, x1, x2) - -inst_17005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7fe000; valaddr_reg:x3; val_offset:51015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51015*FLEN/8, x4, x1, x2) - -inst_17006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7ff000; valaddr_reg:x3; val_offset:51018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51018*FLEN/8, x4, x1, x2) - -inst_17007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7ff800; valaddr_reg:x3; val_offset:51021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51021*FLEN/8, x4, x1, x2) - -inst_17008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7ffc00; valaddr_reg:x3; val_offset:51024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51024*FLEN/8, x4, x1, x2) - -inst_17009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7ffe00; valaddr_reg:x3; val_offset:51027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51027*FLEN/8, x4, x1, x2) - -inst_17010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7fff00; valaddr_reg:x3; val_offset:51030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51030*FLEN/8, x4, x1, x2) - -inst_17011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7fff80; valaddr_reg:x3; val_offset:51033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51033*FLEN/8, x4, x1, x2) - -inst_17012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7fffc0; valaddr_reg:x3; val_offset:51036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51036*FLEN/8, x4, x1, x2) - -inst_17013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7fffe0; valaddr_reg:x3; val_offset:51039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51039*FLEN/8, x4, x1, x2) - -inst_17014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7ffff0; valaddr_reg:x3; val_offset:51042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51042*FLEN/8, x4, x1, x2) - -inst_17015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7ffff8; valaddr_reg:x3; val_offset:51045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51045*FLEN/8, x4, x1, x2) - -inst_17016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7ffffc; valaddr_reg:x3; val_offset:51048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51048*FLEN/8, x4, x1, x2) - -inst_17017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7ffffe; valaddr_reg:x3; val_offset:51051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51051*FLEN/8, x4, x1, x2) - -inst_17018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; -op3val:0xe7fffff; valaddr_reg:x3; val_offset:51054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51054*FLEN/8, x4, x1, x2) - -inst_17019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:51057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51057*FLEN/8, x4, x1, x2) - -inst_17020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:51060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51060*FLEN/8, x4, x1, x2) - -inst_17021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:51063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51063*FLEN/8, x4, x1, x2) - -inst_17022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:51066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51066*FLEN/8, x4, x1, x2) - -inst_17023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:51069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51069*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_134) - -inst_17024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:51072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51072*FLEN/8, x4, x1, x2) - -inst_17025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:51075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51075*FLEN/8, x4, x1, x2) - -inst_17026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:51078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51078*FLEN/8, x4, x1, x2) - -inst_17027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:51081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51081*FLEN/8, x4, x1, x2) - -inst_17028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:51084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51084*FLEN/8, x4, x1, x2) - -inst_17029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:51087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51087*FLEN/8, x4, x1, x2) - -inst_17030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:51090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51090*FLEN/8, x4, x1, x2) - -inst_17031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:51093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51093*FLEN/8, x4, x1, x2) - -inst_17032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:51096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51096*FLEN/8, x4, x1, x2) - -inst_17033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:51099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51099*FLEN/8, x4, x1, x2) - -inst_17034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:51102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51102*FLEN/8, x4, x1, x2) - -inst_17035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83000000; valaddr_reg:x3; val_offset:51105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51105*FLEN/8, x4, x1, x2) - -inst_17036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83000001; valaddr_reg:x3; val_offset:51108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51108*FLEN/8, x4, x1, x2) - -inst_17037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83000003; valaddr_reg:x3; val_offset:51111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51111*FLEN/8, x4, x1, x2) - -inst_17038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83000007; valaddr_reg:x3; val_offset:51114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51114*FLEN/8, x4, x1, x2) - -inst_17039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x8300000f; valaddr_reg:x3; val_offset:51117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51117*FLEN/8, x4, x1, x2) - -inst_17040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x8300001f; valaddr_reg:x3; val_offset:51120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51120*FLEN/8, x4, x1, x2) - -inst_17041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x8300003f; valaddr_reg:x3; val_offset:51123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51123*FLEN/8, x4, x1, x2) - -inst_17042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x8300007f; valaddr_reg:x3; val_offset:51126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51126*FLEN/8, x4, x1, x2) - -inst_17043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x830000ff; valaddr_reg:x3; val_offset:51129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51129*FLEN/8, x4, x1, x2) - -inst_17044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x830001ff; valaddr_reg:x3; val_offset:51132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51132*FLEN/8, x4, x1, x2) - -inst_17045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x830003ff; valaddr_reg:x3; val_offset:51135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51135*FLEN/8, x4, x1, x2) - -inst_17046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x830007ff; valaddr_reg:x3; val_offset:51138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51138*FLEN/8, x4, x1, x2) - -inst_17047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83000fff; valaddr_reg:x3; val_offset:51141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51141*FLEN/8, x4, x1, x2) - -inst_17048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83001fff; valaddr_reg:x3; val_offset:51144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51144*FLEN/8, x4, x1, x2) - -inst_17049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83003fff; valaddr_reg:x3; val_offset:51147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51147*FLEN/8, x4, x1, x2) - -inst_17050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83007fff; valaddr_reg:x3; val_offset:51150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51150*FLEN/8, x4, x1, x2) - -inst_17051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x8300ffff; valaddr_reg:x3; val_offset:51153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51153*FLEN/8, x4, x1, x2) - -inst_17052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x8301ffff; valaddr_reg:x3; val_offset:51156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51156*FLEN/8, x4, x1, x2) - -inst_17053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x8303ffff; valaddr_reg:x3; val_offset:51159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51159*FLEN/8, x4, x1, x2) - -inst_17054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x8307ffff; valaddr_reg:x3; val_offset:51162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51162*FLEN/8, x4, x1, x2) - -inst_17055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x830fffff; valaddr_reg:x3; val_offset:51165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51165*FLEN/8, x4, x1, x2) - -inst_17056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x831fffff; valaddr_reg:x3; val_offset:51168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51168*FLEN/8, x4, x1, x2) - -inst_17057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x833fffff; valaddr_reg:x3; val_offset:51171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51171*FLEN/8, x4, x1, x2) - -inst_17058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83400000; valaddr_reg:x3; val_offset:51174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51174*FLEN/8, x4, x1, x2) - -inst_17059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83600000; valaddr_reg:x3; val_offset:51177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51177*FLEN/8, x4, x1, x2) - -inst_17060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83700000; valaddr_reg:x3; val_offset:51180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51180*FLEN/8, x4, x1, x2) - -inst_17061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x83780000; valaddr_reg:x3; val_offset:51183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51183*FLEN/8, x4, x1, x2) - -inst_17062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837c0000; valaddr_reg:x3; val_offset:51186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51186*FLEN/8, x4, x1, x2) - -inst_17063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837e0000; valaddr_reg:x3; val_offset:51189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51189*FLEN/8, x4, x1, x2) - -inst_17064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837f0000; valaddr_reg:x3; val_offset:51192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51192*FLEN/8, x4, x1, x2) - -inst_17065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837f8000; valaddr_reg:x3; val_offset:51195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51195*FLEN/8, x4, x1, x2) - -inst_17066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837fc000; valaddr_reg:x3; val_offset:51198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51198*FLEN/8, x4, x1, x2) - -inst_17067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837fe000; valaddr_reg:x3; val_offset:51201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51201*FLEN/8, x4, x1, x2) - -inst_17068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837ff000; valaddr_reg:x3; val_offset:51204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51204*FLEN/8, x4, x1, x2) - -inst_17069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837ff800; valaddr_reg:x3; val_offset:51207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51207*FLEN/8, x4, x1, x2) - -inst_17070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837ffc00; valaddr_reg:x3; val_offset:51210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51210*FLEN/8, x4, x1, x2) - -inst_17071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837ffe00; valaddr_reg:x3; val_offset:51213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51213*FLEN/8, x4, x1, x2) - -inst_17072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837fff00; valaddr_reg:x3; val_offset:51216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51216*FLEN/8, x4, x1, x2) - -inst_17073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837fff80; valaddr_reg:x3; val_offset:51219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51219*FLEN/8, x4, x1, x2) - -inst_17074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837fffc0; valaddr_reg:x3; val_offset:51222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51222*FLEN/8, x4, x1, x2) - -inst_17075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837fffe0; valaddr_reg:x3; val_offset:51225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51225*FLEN/8, x4, x1, x2) - -inst_17076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837ffff0; valaddr_reg:x3; val_offset:51228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51228*FLEN/8, x4, x1, x2) - -inst_17077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837ffff8; valaddr_reg:x3; val_offset:51231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51231*FLEN/8, x4, x1, x2) - -inst_17078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837ffffc; valaddr_reg:x3; val_offset:51234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51234*FLEN/8, x4, x1, x2) - -inst_17079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837ffffe; valaddr_reg:x3; val_offset:51237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51237*FLEN/8, x4, x1, x2) - -inst_17080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; -op3val:0x837fffff; valaddr_reg:x3; val_offset:51240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51240*FLEN/8, x4, x1, x2) - -inst_17081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:51243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51243*FLEN/8, x4, x1, x2) - -inst_17082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:51246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51246*FLEN/8, x4, x1, x2) - -inst_17083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:51249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51249*FLEN/8, x4, x1, x2) - -inst_17084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:51252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51252*FLEN/8, x4, x1, x2) - -inst_17085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:51255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51255*FLEN/8, x4, x1, x2) - -inst_17086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:51258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51258*FLEN/8, x4, x1, x2) - -inst_17087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:51261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51261*FLEN/8, x4, x1, x2) - -inst_17088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:51264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51264*FLEN/8, x4, x1, x2) - -inst_17089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:51267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51267*FLEN/8, x4, x1, x2) - -inst_17090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:51270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51270*FLEN/8, x4, x1, x2) - -inst_17091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:51273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51273*FLEN/8, x4, x1, x2) - -inst_17092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:51276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51276*FLEN/8, x4, x1, x2) - -inst_17093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:51279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51279*FLEN/8, x4, x1, x2) - -inst_17094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:51282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51282*FLEN/8, x4, x1, x2) - -inst_17095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:51285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51285*FLEN/8, x4, x1, x2) - -inst_17096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:51288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51288*FLEN/8, x4, x1, x2) - -inst_17097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d800000; valaddr_reg:x3; val_offset:51291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51291*FLEN/8, x4, x1, x2) - -inst_17098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d800001; valaddr_reg:x3; val_offset:51294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51294*FLEN/8, x4, x1, x2) - -inst_17099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d800003; valaddr_reg:x3; val_offset:51297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51297*FLEN/8, x4, x1, x2) - -inst_17100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d800007; valaddr_reg:x3; val_offset:51300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51300*FLEN/8, x4, x1, x2) - -inst_17101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d80000f; valaddr_reg:x3; val_offset:51303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51303*FLEN/8, x4, x1, x2) - -inst_17102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d80001f; valaddr_reg:x3; val_offset:51306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51306*FLEN/8, x4, x1, x2) - -inst_17103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d80003f; valaddr_reg:x3; val_offset:51309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51309*FLEN/8, x4, x1, x2) - -inst_17104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d80007f; valaddr_reg:x3; val_offset:51312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51312*FLEN/8, x4, x1, x2) - -inst_17105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d8000ff; valaddr_reg:x3; val_offset:51315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51315*FLEN/8, x4, x1, x2) - -inst_17106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d8001ff; valaddr_reg:x3; val_offset:51318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51318*FLEN/8, x4, x1, x2) - -inst_17107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d8003ff; valaddr_reg:x3; val_offset:51321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51321*FLEN/8, x4, x1, x2) - -inst_17108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d8007ff; valaddr_reg:x3; val_offset:51324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51324*FLEN/8, x4, x1, x2) - -inst_17109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d800fff; valaddr_reg:x3; val_offset:51327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51327*FLEN/8, x4, x1, x2) - -inst_17110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d801fff; valaddr_reg:x3; val_offset:51330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51330*FLEN/8, x4, x1, x2) - -inst_17111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d803fff; valaddr_reg:x3; val_offset:51333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51333*FLEN/8, x4, x1, x2) - -inst_17112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d807fff; valaddr_reg:x3; val_offset:51336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51336*FLEN/8, x4, x1, x2) - -inst_17113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d80ffff; valaddr_reg:x3; val_offset:51339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51339*FLEN/8, x4, x1, x2) - -inst_17114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d81ffff; valaddr_reg:x3; val_offset:51342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51342*FLEN/8, x4, x1, x2) - -inst_17115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d83ffff; valaddr_reg:x3; val_offset:51345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51345*FLEN/8, x4, x1, x2) - -inst_17116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d87ffff; valaddr_reg:x3; val_offset:51348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51348*FLEN/8, x4, x1, x2) - -inst_17117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d8fffff; valaddr_reg:x3; val_offset:51351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51351*FLEN/8, x4, x1, x2) - -inst_17118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8d9fffff; valaddr_reg:x3; val_offset:51354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51354*FLEN/8, x4, x1, x2) - -inst_17119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dbfffff; valaddr_reg:x3; val_offset:51357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51357*FLEN/8, x4, x1, x2) - -inst_17120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dc00000; valaddr_reg:x3; val_offset:51360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51360*FLEN/8, x4, x1, x2) - -inst_17121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8de00000; valaddr_reg:x3; val_offset:51363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51363*FLEN/8, x4, x1, x2) - -inst_17122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8df00000; valaddr_reg:x3; val_offset:51366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51366*FLEN/8, x4, x1, x2) - -inst_17123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8df80000; valaddr_reg:x3; val_offset:51369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51369*FLEN/8, x4, x1, x2) - -inst_17124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfc0000; valaddr_reg:x3; val_offset:51372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51372*FLEN/8, x4, x1, x2) - -inst_17125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfe0000; valaddr_reg:x3; val_offset:51375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51375*FLEN/8, x4, x1, x2) - -inst_17126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dff0000; valaddr_reg:x3; val_offset:51378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51378*FLEN/8, x4, x1, x2) - -inst_17127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dff8000; valaddr_reg:x3; val_offset:51381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51381*FLEN/8, x4, x1, x2) - -inst_17128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dffc000; valaddr_reg:x3; val_offset:51384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51384*FLEN/8, x4, x1, x2) - -inst_17129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dffe000; valaddr_reg:x3; val_offset:51387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51387*FLEN/8, x4, x1, x2) - -inst_17130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfff000; valaddr_reg:x3; val_offset:51390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51390*FLEN/8, x4, x1, x2) - -inst_17131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfff800; valaddr_reg:x3; val_offset:51393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51393*FLEN/8, x4, x1, x2) - -inst_17132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfffc00; valaddr_reg:x3; val_offset:51396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51396*FLEN/8, x4, x1, x2) - -inst_17133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfffe00; valaddr_reg:x3; val_offset:51399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51399*FLEN/8, x4, x1, x2) - -inst_17134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dffff00; valaddr_reg:x3; val_offset:51402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51402*FLEN/8, x4, x1, x2) - -inst_17135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dffff80; valaddr_reg:x3; val_offset:51405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51405*FLEN/8, x4, x1, x2) - -inst_17136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dffffc0; valaddr_reg:x3; val_offset:51408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51408*FLEN/8, x4, x1, x2) - -inst_17137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dffffe0; valaddr_reg:x3; val_offset:51411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51411*FLEN/8, x4, x1, x2) - -inst_17138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfffff0; valaddr_reg:x3; val_offset:51414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51414*FLEN/8, x4, x1, x2) - -inst_17139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfffff8; valaddr_reg:x3; val_offset:51417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51417*FLEN/8, x4, x1, x2) - -inst_17140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfffffc; valaddr_reg:x3; val_offset:51420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51420*FLEN/8, x4, x1, x2) - -inst_17141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dfffffe; valaddr_reg:x3; val_offset:51423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51423*FLEN/8, x4, x1, x2) - -inst_17142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; -op3val:0x8dffffff; valaddr_reg:x3; val_offset:51426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51426*FLEN/8, x4, x1, x2) - -inst_17143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4000000; valaddr_reg:x3; val_offset:51429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51429*FLEN/8, x4, x1, x2) - -inst_17144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4000001; valaddr_reg:x3; val_offset:51432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51432*FLEN/8, x4, x1, x2) - -inst_17145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4000003; valaddr_reg:x3; val_offset:51435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51435*FLEN/8, x4, x1, x2) - -inst_17146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4000007; valaddr_reg:x3; val_offset:51438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51438*FLEN/8, x4, x1, x2) - -inst_17147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe400000f; valaddr_reg:x3; val_offset:51441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51441*FLEN/8, x4, x1, x2) - -inst_17148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe400001f; valaddr_reg:x3; val_offset:51444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51444*FLEN/8, x4, x1, x2) - -inst_17149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe400003f; valaddr_reg:x3; val_offset:51447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51447*FLEN/8, x4, x1, x2) - -inst_17150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe400007f; valaddr_reg:x3; val_offset:51450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51450*FLEN/8, x4, x1, x2) - -inst_17151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe40000ff; valaddr_reg:x3; val_offset:51453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51453*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_135) - -inst_17152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe40001ff; valaddr_reg:x3; val_offset:51456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51456*FLEN/8, x4, x1, x2) - -inst_17153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe40003ff; valaddr_reg:x3; val_offset:51459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51459*FLEN/8, x4, x1, x2) - -inst_17154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe40007ff; valaddr_reg:x3; val_offset:51462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51462*FLEN/8, x4, x1, x2) - -inst_17155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4000fff; valaddr_reg:x3; val_offset:51465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51465*FLEN/8, x4, x1, x2) - -inst_17156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4001fff; valaddr_reg:x3; val_offset:51468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51468*FLEN/8, x4, x1, x2) - -inst_17157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4003fff; valaddr_reg:x3; val_offset:51471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51471*FLEN/8, x4, x1, x2) - -inst_17158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4007fff; valaddr_reg:x3; val_offset:51474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51474*FLEN/8, x4, x1, x2) - -inst_17159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe400ffff; valaddr_reg:x3; val_offset:51477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51477*FLEN/8, x4, x1, x2) - -inst_17160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe401ffff; valaddr_reg:x3; val_offset:51480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51480*FLEN/8, x4, x1, x2) - -inst_17161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe403ffff; valaddr_reg:x3; val_offset:51483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51483*FLEN/8, x4, x1, x2) - -inst_17162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe407ffff; valaddr_reg:x3; val_offset:51486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51486*FLEN/8, x4, x1, x2) - -inst_17163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe40fffff; valaddr_reg:x3; val_offset:51489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51489*FLEN/8, x4, x1, x2) - -inst_17164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe41fffff; valaddr_reg:x3; val_offset:51492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51492*FLEN/8, x4, x1, x2) - -inst_17165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe43fffff; valaddr_reg:x3; val_offset:51495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51495*FLEN/8, x4, x1, x2) - -inst_17166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4400000; valaddr_reg:x3; val_offset:51498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51498*FLEN/8, x4, x1, x2) - -inst_17167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4600000; valaddr_reg:x3; val_offset:51501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51501*FLEN/8, x4, x1, x2) - -inst_17168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4700000; valaddr_reg:x3; val_offset:51504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51504*FLEN/8, x4, x1, x2) - -inst_17169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe4780000; valaddr_reg:x3; val_offset:51507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51507*FLEN/8, x4, x1, x2) - -inst_17170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47c0000; valaddr_reg:x3; val_offset:51510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51510*FLEN/8, x4, x1, x2) - -inst_17171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47e0000; valaddr_reg:x3; val_offset:51513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51513*FLEN/8, x4, x1, x2) - -inst_17172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47f0000; valaddr_reg:x3; val_offset:51516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51516*FLEN/8, x4, x1, x2) - -inst_17173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47f8000; valaddr_reg:x3; val_offset:51519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51519*FLEN/8, x4, x1, x2) - -inst_17174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47fc000; valaddr_reg:x3; val_offset:51522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51522*FLEN/8, x4, x1, x2) - -inst_17175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47fe000; valaddr_reg:x3; val_offset:51525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51525*FLEN/8, x4, x1, x2) - -inst_17176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47ff000; valaddr_reg:x3; val_offset:51528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51528*FLEN/8, x4, x1, x2) - -inst_17177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47ff800; valaddr_reg:x3; val_offset:51531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51531*FLEN/8, x4, x1, x2) - -inst_17178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47ffc00; valaddr_reg:x3; val_offset:51534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51534*FLEN/8, x4, x1, x2) - -inst_17179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47ffe00; valaddr_reg:x3; val_offset:51537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51537*FLEN/8, x4, x1, x2) - -inst_17180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47fff00; valaddr_reg:x3; val_offset:51540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51540*FLEN/8, x4, x1, x2) - -inst_17181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47fff80; valaddr_reg:x3; val_offset:51543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51543*FLEN/8, x4, x1, x2) - -inst_17182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47fffc0; valaddr_reg:x3; val_offset:51546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51546*FLEN/8, x4, x1, x2) - -inst_17183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47fffe0; valaddr_reg:x3; val_offset:51549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51549*FLEN/8, x4, x1, x2) - -inst_17184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47ffff0; valaddr_reg:x3; val_offset:51552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51552*FLEN/8, x4, x1, x2) - -inst_17185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47ffff8; valaddr_reg:x3; val_offset:51555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51555*FLEN/8, x4, x1, x2) - -inst_17186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47ffffc; valaddr_reg:x3; val_offset:51558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51558*FLEN/8, x4, x1, x2) - -inst_17187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47ffffe; valaddr_reg:x3; val_offset:51561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51561*FLEN/8, x4, x1, x2) - -inst_17188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xe47fffff; valaddr_reg:x3; val_offset:51564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51564*FLEN/8, x4, x1, x2) - -inst_17189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff000001; valaddr_reg:x3; val_offset:51567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51567*FLEN/8, x4, x1, x2) - -inst_17190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff000003; valaddr_reg:x3; val_offset:51570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51570*FLEN/8, x4, x1, x2) - -inst_17191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff000007; valaddr_reg:x3; val_offset:51573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51573*FLEN/8, x4, x1, x2) - -inst_17192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff199999; valaddr_reg:x3; val_offset:51576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51576*FLEN/8, x4, x1, x2) - -inst_17193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff249249; valaddr_reg:x3; val_offset:51579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51579*FLEN/8, x4, x1, x2) - -inst_17194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff333333; valaddr_reg:x3; val_offset:51582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51582*FLEN/8, x4, x1, x2) - -inst_17195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:51585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51585*FLEN/8, x4, x1, x2) - -inst_17196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:51588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51588*FLEN/8, x4, x1, x2) - -inst_17197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff444444; valaddr_reg:x3; val_offset:51591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51591*FLEN/8, x4, x1, x2) - -inst_17198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:51594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51594*FLEN/8, x4, x1, x2) - -inst_17199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:51597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51597*FLEN/8, x4, x1, x2) - -inst_17200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff666666; valaddr_reg:x3; val_offset:51600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51600*FLEN/8, x4, x1, x2) - -inst_17201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:51603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51603*FLEN/8, x4, x1, x2) - -inst_17202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:51606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51606*FLEN/8, x4, x1, x2) - -inst_17203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:51609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51609*FLEN/8, x4, x1, x2) - -inst_17204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:51612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51612*FLEN/8, x4, x1, x2) - -inst_17205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac800000; valaddr_reg:x3; val_offset:51615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51615*FLEN/8, x4, x1, x2) - -inst_17206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac800001; valaddr_reg:x3; val_offset:51618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51618*FLEN/8, x4, x1, x2) - -inst_17207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac800003; valaddr_reg:x3; val_offset:51621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51621*FLEN/8, x4, x1, x2) - -inst_17208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac800007; valaddr_reg:x3; val_offset:51624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51624*FLEN/8, x4, x1, x2) - -inst_17209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac80000f; valaddr_reg:x3; val_offset:51627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51627*FLEN/8, x4, x1, x2) - -inst_17210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac80001f; valaddr_reg:x3; val_offset:51630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51630*FLEN/8, x4, x1, x2) - -inst_17211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac80003f; valaddr_reg:x3; val_offset:51633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51633*FLEN/8, x4, x1, x2) - -inst_17212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac80007f; valaddr_reg:x3; val_offset:51636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51636*FLEN/8, x4, x1, x2) - -inst_17213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac8000ff; valaddr_reg:x3; val_offset:51639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51639*FLEN/8, x4, x1, x2) - -inst_17214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac8001ff; valaddr_reg:x3; val_offset:51642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51642*FLEN/8, x4, x1, x2) - -inst_17215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac8003ff; valaddr_reg:x3; val_offset:51645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51645*FLEN/8, x4, x1, x2) - -inst_17216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac8007ff; valaddr_reg:x3; val_offset:51648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51648*FLEN/8, x4, x1, x2) - -inst_17217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac800fff; valaddr_reg:x3; val_offset:51651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51651*FLEN/8, x4, x1, x2) - -inst_17218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac801fff; valaddr_reg:x3; val_offset:51654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51654*FLEN/8, x4, x1, x2) - -inst_17219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac803fff; valaddr_reg:x3; val_offset:51657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51657*FLEN/8, x4, x1, x2) - -inst_17220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac807fff; valaddr_reg:x3; val_offset:51660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51660*FLEN/8, x4, x1, x2) - -inst_17221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac80ffff; valaddr_reg:x3; val_offset:51663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51663*FLEN/8, x4, x1, x2) - -inst_17222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac81ffff; valaddr_reg:x3; val_offset:51666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51666*FLEN/8, x4, x1, x2) - -inst_17223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac83ffff; valaddr_reg:x3; val_offset:51669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51669*FLEN/8, x4, x1, x2) - -inst_17224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac87ffff; valaddr_reg:x3; val_offset:51672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51672*FLEN/8, x4, x1, x2) - -inst_17225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac8fffff; valaddr_reg:x3; val_offset:51675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51675*FLEN/8, x4, x1, x2) - -inst_17226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xac9fffff; valaddr_reg:x3; val_offset:51678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51678*FLEN/8, x4, x1, x2) - -inst_17227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacbfffff; valaddr_reg:x3; val_offset:51681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51681*FLEN/8, x4, x1, x2) - -inst_17228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacc00000; valaddr_reg:x3; val_offset:51684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51684*FLEN/8, x4, x1, x2) - -inst_17229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xace00000; valaddr_reg:x3; val_offset:51687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51687*FLEN/8, x4, x1, x2) - -inst_17230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacf00000; valaddr_reg:x3; val_offset:51690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51690*FLEN/8, x4, x1, x2) - -inst_17231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacf80000; valaddr_reg:x3; val_offset:51693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51693*FLEN/8, x4, x1, x2) - -inst_17232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfc0000; valaddr_reg:x3; val_offset:51696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51696*FLEN/8, x4, x1, x2) - -inst_17233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfe0000; valaddr_reg:x3; val_offset:51699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51699*FLEN/8, x4, x1, x2) - -inst_17234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacff0000; valaddr_reg:x3; val_offset:51702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51702*FLEN/8, x4, x1, x2) - -inst_17235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacff8000; valaddr_reg:x3; val_offset:51705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51705*FLEN/8, x4, x1, x2) - -inst_17236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacffc000; valaddr_reg:x3; val_offset:51708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51708*FLEN/8, x4, x1, x2) - -inst_17237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacffe000; valaddr_reg:x3; val_offset:51711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51711*FLEN/8, x4, x1, x2) - -inst_17238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfff000; valaddr_reg:x3; val_offset:51714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51714*FLEN/8, x4, x1, x2) - -inst_17239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfff800; valaddr_reg:x3; val_offset:51717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51717*FLEN/8, x4, x1, x2) - -inst_17240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfffc00; valaddr_reg:x3; val_offset:51720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51720*FLEN/8, x4, x1, x2) - -inst_17241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfffe00; valaddr_reg:x3; val_offset:51723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51723*FLEN/8, x4, x1, x2) - -inst_17242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacffff00; valaddr_reg:x3; val_offset:51726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51726*FLEN/8, x4, x1, x2) - -inst_17243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacffff80; valaddr_reg:x3; val_offset:51729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51729*FLEN/8, x4, x1, x2) - -inst_17244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacffffc0; valaddr_reg:x3; val_offset:51732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51732*FLEN/8, x4, x1, x2) - -inst_17245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacffffe0; valaddr_reg:x3; val_offset:51735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51735*FLEN/8, x4, x1, x2) - -inst_17246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfffff0; valaddr_reg:x3; val_offset:51738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51738*FLEN/8, x4, x1, x2) - -inst_17247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfffff8; valaddr_reg:x3; val_offset:51741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51741*FLEN/8, x4, x1, x2) - -inst_17248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfffffc; valaddr_reg:x3; val_offset:51744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51744*FLEN/8, x4, x1, x2) - -inst_17249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacfffffe; valaddr_reg:x3; val_offset:51747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51747*FLEN/8, x4, x1, x2) - -inst_17250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xacffffff; valaddr_reg:x3; val_offset:51750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51750*FLEN/8, x4, x1, x2) - -inst_17251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbf800001; valaddr_reg:x3; val_offset:51753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51753*FLEN/8, x4, x1, x2) - -inst_17252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbf800003; valaddr_reg:x3; val_offset:51756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51756*FLEN/8, x4, x1, x2) - -inst_17253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbf800007; valaddr_reg:x3; val_offset:51759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51759*FLEN/8, x4, x1, x2) - -inst_17254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbf999999; valaddr_reg:x3; val_offset:51762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51762*FLEN/8, x4, x1, x2) - -inst_17255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:51765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51765*FLEN/8, x4, x1, x2) - -inst_17256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:51768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51768*FLEN/8, x4, x1, x2) - -inst_17257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:51771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51771*FLEN/8, x4, x1, x2) - -inst_17258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:51774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51774*FLEN/8, x4, x1, x2) - -inst_17259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:51777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51777*FLEN/8, x4, x1, x2) - -inst_17260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:51780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51780*FLEN/8, x4, x1, x2) - -inst_17261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:51783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51783*FLEN/8, x4, x1, x2) - -inst_17262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:51786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51786*FLEN/8, x4, x1, x2) - -inst_17263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:51789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51789*FLEN/8, x4, x1, x2) - -inst_17264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:51792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51792*FLEN/8, x4, x1, x2) - -inst_17265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:51795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51795*FLEN/8, x4, x1, x2) - -inst_17266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:51798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51798*FLEN/8, x4, x1, x2) - -inst_17267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:51801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51801*FLEN/8, x4, x1, x2) - -inst_17268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:51804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51804*FLEN/8, x4, x1, x2) - -inst_17269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:51807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51807*FLEN/8, x4, x1, x2) - -inst_17270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:51810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51810*FLEN/8, x4, x1, x2) - -inst_17271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:51813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51813*FLEN/8, x4, x1, x2) - -inst_17272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:51816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51816*FLEN/8, x4, x1, x2) - -inst_17273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:51819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51819*FLEN/8, x4, x1, x2) - -inst_17274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:51822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51822*FLEN/8, x4, x1, x2) - -inst_17275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:51825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51825*FLEN/8, x4, x1, x2) - -inst_17276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:51828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51828*FLEN/8, x4, x1, x2) - -inst_17277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:51831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51831*FLEN/8, x4, x1, x2) - -inst_17278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:51834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51834*FLEN/8, x4, x1, x2) - -inst_17279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:51837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51837*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_136) - -inst_17280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:51840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51840*FLEN/8, x4, x1, x2) - -inst_17281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:51843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51843*FLEN/8, x4, x1, x2) - -inst_17282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:51846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51846*FLEN/8, x4, x1, x2) - -inst_17283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86800000; valaddr_reg:x3; val_offset:51849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51849*FLEN/8, x4, x1, x2) - -inst_17284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86800001; valaddr_reg:x3; val_offset:51852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51852*FLEN/8, x4, x1, x2) - -inst_17285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86800003; valaddr_reg:x3; val_offset:51855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51855*FLEN/8, x4, x1, x2) - -inst_17286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86800007; valaddr_reg:x3; val_offset:51858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51858*FLEN/8, x4, x1, x2) - -inst_17287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8680000f; valaddr_reg:x3; val_offset:51861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51861*FLEN/8, x4, x1, x2) - -inst_17288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8680001f; valaddr_reg:x3; val_offset:51864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51864*FLEN/8, x4, x1, x2) - -inst_17289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8680003f; valaddr_reg:x3; val_offset:51867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51867*FLEN/8, x4, x1, x2) - -inst_17290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8680007f; valaddr_reg:x3; val_offset:51870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51870*FLEN/8, x4, x1, x2) - -inst_17291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x868000ff; valaddr_reg:x3; val_offset:51873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51873*FLEN/8, x4, x1, x2) - -inst_17292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x868001ff; valaddr_reg:x3; val_offset:51876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51876*FLEN/8, x4, x1, x2) - -inst_17293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x868003ff; valaddr_reg:x3; val_offset:51879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51879*FLEN/8, x4, x1, x2) - -inst_17294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x868007ff; valaddr_reg:x3; val_offset:51882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51882*FLEN/8, x4, x1, x2) - -inst_17295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86800fff; valaddr_reg:x3; val_offset:51885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51885*FLEN/8, x4, x1, x2) - -inst_17296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86801fff; valaddr_reg:x3; val_offset:51888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51888*FLEN/8, x4, x1, x2) - -inst_17297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86803fff; valaddr_reg:x3; val_offset:51891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51891*FLEN/8, x4, x1, x2) - -inst_17298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86807fff; valaddr_reg:x3; val_offset:51894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51894*FLEN/8, x4, x1, x2) - -inst_17299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8680ffff; valaddr_reg:x3; val_offset:51897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51897*FLEN/8, x4, x1, x2) - -inst_17300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8681ffff; valaddr_reg:x3; val_offset:51900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51900*FLEN/8, x4, x1, x2) - -inst_17301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8683ffff; valaddr_reg:x3; val_offset:51903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51903*FLEN/8, x4, x1, x2) - -inst_17302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x8687ffff; valaddr_reg:x3; val_offset:51906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51906*FLEN/8, x4, x1, x2) - -inst_17303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x868fffff; valaddr_reg:x3; val_offset:51909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51909*FLEN/8, x4, x1, x2) - -inst_17304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x869fffff; valaddr_reg:x3; val_offset:51912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51912*FLEN/8, x4, x1, x2) - -inst_17305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86bfffff; valaddr_reg:x3; val_offset:51915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51915*FLEN/8, x4, x1, x2) - -inst_17306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86c00000; valaddr_reg:x3; val_offset:51918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51918*FLEN/8, x4, x1, x2) - -inst_17307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86e00000; valaddr_reg:x3; val_offset:51921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51921*FLEN/8, x4, x1, x2) - -inst_17308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86f00000; valaddr_reg:x3; val_offset:51924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51924*FLEN/8, x4, x1, x2) - -inst_17309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86f80000; valaddr_reg:x3; val_offset:51927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51927*FLEN/8, x4, x1, x2) - -inst_17310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fc0000; valaddr_reg:x3; val_offset:51930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51930*FLEN/8, x4, x1, x2) - -inst_17311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fe0000; valaddr_reg:x3; val_offset:51933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51933*FLEN/8, x4, x1, x2) - -inst_17312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ff0000; valaddr_reg:x3; val_offset:51936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51936*FLEN/8, x4, x1, x2) - -inst_17313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ff8000; valaddr_reg:x3; val_offset:51939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51939*FLEN/8, x4, x1, x2) - -inst_17314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ffc000; valaddr_reg:x3; val_offset:51942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51942*FLEN/8, x4, x1, x2) - -inst_17315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ffe000; valaddr_reg:x3; val_offset:51945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51945*FLEN/8, x4, x1, x2) - -inst_17316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fff000; valaddr_reg:x3; val_offset:51948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51948*FLEN/8, x4, x1, x2) - -inst_17317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fff800; valaddr_reg:x3; val_offset:51951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51951*FLEN/8, x4, x1, x2) - -inst_17318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fffc00; valaddr_reg:x3; val_offset:51954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51954*FLEN/8, x4, x1, x2) - -inst_17319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fffe00; valaddr_reg:x3; val_offset:51957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51957*FLEN/8, x4, x1, x2) - -inst_17320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ffff00; valaddr_reg:x3; val_offset:51960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51960*FLEN/8, x4, x1, x2) - -inst_17321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ffff80; valaddr_reg:x3; val_offset:51963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51963*FLEN/8, x4, x1, x2) - -inst_17322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ffffc0; valaddr_reg:x3; val_offset:51966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51966*FLEN/8, x4, x1, x2) - -inst_17323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ffffe0; valaddr_reg:x3; val_offset:51969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51969*FLEN/8, x4, x1, x2) - -inst_17324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fffff0; valaddr_reg:x3; val_offset:51972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51972*FLEN/8, x4, x1, x2) - -inst_17325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fffff8; valaddr_reg:x3; val_offset:51975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51975*FLEN/8, x4, x1, x2) - -inst_17326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fffffc; valaddr_reg:x3; val_offset:51978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51978*FLEN/8, x4, x1, x2) - -inst_17327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86fffffe; valaddr_reg:x3; val_offset:51981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51981*FLEN/8, x4, x1, x2) - -inst_17328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; -op3val:0x86ffffff; valaddr_reg:x3; val_offset:51984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51984*FLEN/8, x4, x1, x2) - -inst_17329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6800000; valaddr_reg:x3; val_offset:51987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51987*FLEN/8, x4, x1, x2) - -inst_17330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6800001; valaddr_reg:x3; val_offset:51990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51990*FLEN/8, x4, x1, x2) - -inst_17331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6800003; valaddr_reg:x3; val_offset:51993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51993*FLEN/8, x4, x1, x2) - -inst_17332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6800007; valaddr_reg:x3; val_offset:51996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51996*FLEN/8, x4, x1, x2) - -inst_17333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa680000f; valaddr_reg:x3; val_offset:51999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51999*FLEN/8, x4, x1, x2) - -inst_17334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa680001f; valaddr_reg:x3; val_offset:52002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52002*FLEN/8, x4, x1, x2) - -inst_17335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa680003f; valaddr_reg:x3; val_offset:52005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52005*FLEN/8, x4, x1, x2) - -inst_17336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa680007f; valaddr_reg:x3; val_offset:52008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52008*FLEN/8, x4, x1, x2) - -inst_17337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa68000ff; valaddr_reg:x3; val_offset:52011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52011*FLEN/8, x4, x1, x2) - -inst_17338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa68001ff; valaddr_reg:x3; val_offset:52014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52014*FLEN/8, x4, x1, x2) - -inst_17339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa68003ff; valaddr_reg:x3; val_offset:52017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52017*FLEN/8, x4, x1, x2) - -inst_17340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa68007ff; valaddr_reg:x3; val_offset:52020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52020*FLEN/8, x4, x1, x2) - -inst_17341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6800fff; valaddr_reg:x3; val_offset:52023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52023*FLEN/8, x4, x1, x2) - -inst_17342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6801fff; valaddr_reg:x3; val_offset:52026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52026*FLEN/8, x4, x1, x2) - -inst_17343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6803fff; valaddr_reg:x3; val_offset:52029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52029*FLEN/8, x4, x1, x2) - -inst_17344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6807fff; valaddr_reg:x3; val_offset:52032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52032*FLEN/8, x4, x1, x2) - -inst_17345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa680ffff; valaddr_reg:x3; val_offset:52035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52035*FLEN/8, x4, x1, x2) - -inst_17346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa681ffff; valaddr_reg:x3; val_offset:52038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52038*FLEN/8, x4, x1, x2) - -inst_17347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa683ffff; valaddr_reg:x3; val_offset:52041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52041*FLEN/8, x4, x1, x2) - -inst_17348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa687ffff; valaddr_reg:x3; val_offset:52044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52044*FLEN/8, x4, x1, x2) - -inst_17349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa68fffff; valaddr_reg:x3; val_offset:52047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52047*FLEN/8, x4, x1, x2) - -inst_17350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa69fffff; valaddr_reg:x3; val_offset:52050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52050*FLEN/8, x4, x1, x2) - -inst_17351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6bfffff; valaddr_reg:x3; val_offset:52053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52053*FLEN/8, x4, x1, x2) - -inst_17352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6c00000; valaddr_reg:x3; val_offset:52056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52056*FLEN/8, x4, x1, x2) - -inst_17353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6e00000; valaddr_reg:x3; val_offset:52059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52059*FLEN/8, x4, x1, x2) - -inst_17354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6f00000; valaddr_reg:x3; val_offset:52062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52062*FLEN/8, x4, x1, x2) - -inst_17355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6f80000; valaddr_reg:x3; val_offset:52065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52065*FLEN/8, x4, x1, x2) - -inst_17356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fc0000; valaddr_reg:x3; val_offset:52068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52068*FLEN/8, x4, x1, x2) - -inst_17357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fe0000; valaddr_reg:x3; val_offset:52071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52071*FLEN/8, x4, x1, x2) - -inst_17358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ff0000; valaddr_reg:x3; val_offset:52074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52074*FLEN/8, x4, x1, x2) - -inst_17359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ff8000; valaddr_reg:x3; val_offset:52077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52077*FLEN/8, x4, x1, x2) - -inst_17360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ffc000; valaddr_reg:x3; val_offset:52080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52080*FLEN/8, x4, x1, x2) - -inst_17361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ffe000; valaddr_reg:x3; val_offset:52083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52083*FLEN/8, x4, x1, x2) - -inst_17362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fff000; valaddr_reg:x3; val_offset:52086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52086*FLEN/8, x4, x1, x2) - -inst_17363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fff800; valaddr_reg:x3; val_offset:52089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52089*FLEN/8, x4, x1, x2) - -inst_17364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fffc00; valaddr_reg:x3; val_offset:52092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52092*FLEN/8, x4, x1, x2) - -inst_17365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fffe00; valaddr_reg:x3; val_offset:52095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52095*FLEN/8, x4, x1, x2) - -inst_17366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ffff00; valaddr_reg:x3; val_offset:52098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52098*FLEN/8, x4, x1, x2) - -inst_17367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ffff80; valaddr_reg:x3; val_offset:52101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52101*FLEN/8, x4, x1, x2) - -inst_17368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ffffc0; valaddr_reg:x3; val_offset:52104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52104*FLEN/8, x4, x1, x2) - -inst_17369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ffffe0; valaddr_reg:x3; val_offset:52107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52107*FLEN/8, x4, x1, x2) - -inst_17370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fffff0; valaddr_reg:x3; val_offset:52110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52110*FLEN/8, x4, x1, x2) - -inst_17371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fffff8; valaddr_reg:x3; val_offset:52113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52113*FLEN/8, x4, x1, x2) - -inst_17372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fffffc; valaddr_reg:x3; val_offset:52116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52116*FLEN/8, x4, x1, x2) - -inst_17373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6fffffe; valaddr_reg:x3; val_offset:52119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52119*FLEN/8, x4, x1, x2) - -inst_17374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xa6ffffff; valaddr_reg:x3; val_offset:52122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52122*FLEN/8, x4, x1, x2) - -inst_17375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbf800001; valaddr_reg:x3; val_offset:52125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52125*FLEN/8, x4, x1, x2) - -inst_17376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbf800003; valaddr_reg:x3; val_offset:52128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52128*FLEN/8, x4, x1, x2) - -inst_17377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbf800007; valaddr_reg:x3; val_offset:52131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52131*FLEN/8, x4, x1, x2) - -inst_17378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbf999999; valaddr_reg:x3; val_offset:52134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52134*FLEN/8, x4, x1, x2) - -inst_17379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:52137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52137*FLEN/8, x4, x1, x2) - -inst_17380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:52140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52140*FLEN/8, x4, x1, x2) - -inst_17381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:52143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52143*FLEN/8, x4, x1, x2) - -inst_17382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:52146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52146*FLEN/8, x4, x1, x2) - -inst_17383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:52149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52149*FLEN/8, x4, x1, x2) - -inst_17384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:52152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52152*FLEN/8, x4, x1, x2) - -inst_17385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:52155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52155*FLEN/8, x4, x1, x2) - -inst_17386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:52158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52158*FLEN/8, x4, x1, x2) - -inst_17387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:52161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52161*FLEN/8, x4, x1, x2) - -inst_17388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:52164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52164*FLEN/8, x4, x1, x2) - -inst_17389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:52167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52167*FLEN/8, x4, x1, x2) - -inst_17390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:52170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52170*FLEN/8, x4, x1, x2) - -inst_17391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6800000; valaddr_reg:x3; val_offset:52173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52173*FLEN/8, x4, x1, x2) - -inst_17392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6800001; valaddr_reg:x3; val_offset:52176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52176*FLEN/8, x4, x1, x2) - -inst_17393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6800003; valaddr_reg:x3; val_offset:52179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52179*FLEN/8, x4, x1, x2) - -inst_17394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6800007; valaddr_reg:x3; val_offset:52182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52182*FLEN/8, x4, x1, x2) - -inst_17395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe680000f; valaddr_reg:x3; val_offset:52185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52185*FLEN/8, x4, x1, x2) - -inst_17396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe680001f; valaddr_reg:x3; val_offset:52188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52188*FLEN/8, x4, x1, x2) - -inst_17397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe680003f; valaddr_reg:x3; val_offset:52191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52191*FLEN/8, x4, x1, x2) - -inst_17398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe680007f; valaddr_reg:x3; val_offset:52194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52194*FLEN/8, x4, x1, x2) - -inst_17399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe68000ff; valaddr_reg:x3; val_offset:52197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52197*FLEN/8, x4, x1, x2) - -inst_17400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe68001ff; valaddr_reg:x3; val_offset:52200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52200*FLEN/8, x4, x1, x2) - -inst_17401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe68003ff; valaddr_reg:x3; val_offset:52203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52203*FLEN/8, x4, x1, x2) - -inst_17402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe68007ff; valaddr_reg:x3; val_offset:52206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52206*FLEN/8, x4, x1, x2) - -inst_17403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6800fff; valaddr_reg:x3; val_offset:52209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52209*FLEN/8, x4, x1, x2) - -inst_17404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6801fff; valaddr_reg:x3; val_offset:52212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52212*FLEN/8, x4, x1, x2) - -inst_17405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6803fff; valaddr_reg:x3; val_offset:52215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52215*FLEN/8, x4, x1, x2) - -inst_17406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6807fff; valaddr_reg:x3; val_offset:52218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52218*FLEN/8, x4, x1, x2) - -inst_17407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe680ffff; valaddr_reg:x3; val_offset:52221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52221*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_137) - -inst_17408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe681ffff; valaddr_reg:x3; val_offset:52224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52224*FLEN/8, x4, x1, x2) - -inst_17409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe683ffff; valaddr_reg:x3; val_offset:52227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52227*FLEN/8, x4, x1, x2) - -inst_17410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe687ffff; valaddr_reg:x3; val_offset:52230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52230*FLEN/8, x4, x1, x2) - -inst_17411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe68fffff; valaddr_reg:x3; val_offset:52233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52233*FLEN/8, x4, x1, x2) - -inst_17412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe69fffff; valaddr_reg:x3; val_offset:52236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52236*FLEN/8, x4, x1, x2) - -inst_17413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6bfffff; valaddr_reg:x3; val_offset:52239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52239*FLEN/8, x4, x1, x2) - -inst_17414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6c00000; valaddr_reg:x3; val_offset:52242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52242*FLEN/8, x4, x1, x2) - -inst_17415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6e00000; valaddr_reg:x3; val_offset:52245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52245*FLEN/8, x4, x1, x2) - -inst_17416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6f00000; valaddr_reg:x3; val_offset:52248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52248*FLEN/8, x4, x1, x2) - -inst_17417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6f80000; valaddr_reg:x3; val_offset:52251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52251*FLEN/8, x4, x1, x2) - -inst_17418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fc0000; valaddr_reg:x3; val_offset:52254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52254*FLEN/8, x4, x1, x2) - -inst_17419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fe0000; valaddr_reg:x3; val_offset:52257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52257*FLEN/8, x4, x1, x2) - -inst_17420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ff0000; valaddr_reg:x3; val_offset:52260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52260*FLEN/8, x4, x1, x2) - -inst_17421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ff8000; valaddr_reg:x3; val_offset:52263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52263*FLEN/8, x4, x1, x2) - -inst_17422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ffc000; valaddr_reg:x3; val_offset:52266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52266*FLEN/8, x4, x1, x2) - -inst_17423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ffe000; valaddr_reg:x3; val_offset:52269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52269*FLEN/8, x4, x1, x2) - -inst_17424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fff000; valaddr_reg:x3; val_offset:52272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52272*FLEN/8, x4, x1, x2) - -inst_17425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fff800; valaddr_reg:x3; val_offset:52275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52275*FLEN/8, x4, x1, x2) - -inst_17426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fffc00; valaddr_reg:x3; val_offset:52278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52278*FLEN/8, x4, x1, x2) - -inst_17427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fffe00; valaddr_reg:x3; val_offset:52281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52281*FLEN/8, x4, x1, x2) - -inst_17428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ffff00; valaddr_reg:x3; val_offset:52284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52284*FLEN/8, x4, x1, x2) - -inst_17429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ffff80; valaddr_reg:x3; val_offset:52287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52287*FLEN/8, x4, x1, x2) - -inst_17430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ffffc0; valaddr_reg:x3; val_offset:52290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52290*FLEN/8, x4, x1, x2) - -inst_17431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ffffe0; valaddr_reg:x3; val_offset:52293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52293*FLEN/8, x4, x1, x2) - -inst_17432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fffff0; valaddr_reg:x3; val_offset:52296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52296*FLEN/8, x4, x1, x2) - -inst_17433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fffff8; valaddr_reg:x3; val_offset:52299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52299*FLEN/8, x4, x1, x2) - -inst_17434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fffffc; valaddr_reg:x3; val_offset:52302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52302*FLEN/8, x4, x1, x2) - -inst_17435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6fffffe; valaddr_reg:x3; val_offset:52305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52305*FLEN/8, x4, x1, x2) - -inst_17436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xe6ffffff; valaddr_reg:x3; val_offset:52308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52308*FLEN/8, x4, x1, x2) - -inst_17437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff000001; valaddr_reg:x3; val_offset:52311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52311*FLEN/8, x4, x1, x2) - -inst_17438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff000003; valaddr_reg:x3; val_offset:52314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52314*FLEN/8, x4, x1, x2) - -inst_17439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff000007; valaddr_reg:x3; val_offset:52317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52317*FLEN/8, x4, x1, x2) - -inst_17440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff199999; valaddr_reg:x3; val_offset:52320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52320*FLEN/8, x4, x1, x2) - -inst_17441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff249249; valaddr_reg:x3; val_offset:52323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52323*FLEN/8, x4, x1, x2) - -inst_17442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff333333; valaddr_reg:x3; val_offset:52326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52326*FLEN/8, x4, x1, x2) - -inst_17443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:52329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52329*FLEN/8, x4, x1, x2) - -inst_17444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:52332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52332*FLEN/8, x4, x1, x2) - -inst_17445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff444444; valaddr_reg:x3; val_offset:52335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52335*FLEN/8, x4, x1, x2) - -inst_17446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:52338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52338*FLEN/8, x4, x1, x2) - -inst_17447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:52341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52341*FLEN/8, x4, x1, x2) - -inst_17448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff666666; valaddr_reg:x3; val_offset:52344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52344*FLEN/8, x4, x1, x2) - -inst_17449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:52347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52347*FLEN/8, x4, x1, x2) - -inst_17450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:52350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52350*FLEN/8, x4, x1, x2) - -inst_17451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:52353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52353*FLEN/8, x4, x1, x2) - -inst_17452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:52356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52356*FLEN/8, x4, x1, x2) - -inst_17453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b800000; valaddr_reg:x3; val_offset:52359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52359*FLEN/8, x4, x1, x2) - -inst_17454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b800001; valaddr_reg:x3; val_offset:52362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52362*FLEN/8, x4, x1, x2) - -inst_17455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b800003; valaddr_reg:x3; val_offset:52365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52365*FLEN/8, x4, x1, x2) - -inst_17456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b800007; valaddr_reg:x3; val_offset:52368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52368*FLEN/8, x4, x1, x2) - -inst_17457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b80000f; valaddr_reg:x3; val_offset:52371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52371*FLEN/8, x4, x1, x2) - -inst_17458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b80001f; valaddr_reg:x3; val_offset:52374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52374*FLEN/8, x4, x1, x2) - -inst_17459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b80003f; valaddr_reg:x3; val_offset:52377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52377*FLEN/8, x4, x1, x2) - -inst_17460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b80007f; valaddr_reg:x3; val_offset:52380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52380*FLEN/8, x4, x1, x2) - -inst_17461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b8000ff; valaddr_reg:x3; val_offset:52383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52383*FLEN/8, x4, x1, x2) - -inst_17462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b8001ff; valaddr_reg:x3; val_offset:52386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52386*FLEN/8, x4, x1, x2) - -inst_17463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b8003ff; valaddr_reg:x3; val_offset:52389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52389*FLEN/8, x4, x1, x2) - -inst_17464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b8007ff; valaddr_reg:x3; val_offset:52392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52392*FLEN/8, x4, x1, x2) - -inst_17465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b800fff; valaddr_reg:x3; val_offset:52395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52395*FLEN/8, x4, x1, x2) - -inst_17466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b801fff; valaddr_reg:x3; val_offset:52398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52398*FLEN/8, x4, x1, x2) - -inst_17467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b803fff; valaddr_reg:x3; val_offset:52401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52401*FLEN/8, x4, x1, x2) - -inst_17468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b807fff; valaddr_reg:x3; val_offset:52404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52404*FLEN/8, x4, x1, x2) - -inst_17469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b80ffff; valaddr_reg:x3; val_offset:52407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52407*FLEN/8, x4, x1, x2) - -inst_17470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b81ffff; valaddr_reg:x3; val_offset:52410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52410*FLEN/8, x4, x1, x2) - -inst_17471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b83ffff; valaddr_reg:x3; val_offset:52413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52413*FLEN/8, x4, x1, x2) - -inst_17472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b87ffff; valaddr_reg:x3; val_offset:52416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52416*FLEN/8, x4, x1, x2) - -inst_17473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b8fffff; valaddr_reg:x3; val_offset:52419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52419*FLEN/8, x4, x1, x2) - -inst_17474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6b9fffff; valaddr_reg:x3; val_offset:52422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52422*FLEN/8, x4, x1, x2) - -inst_17475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bbfffff; valaddr_reg:x3; val_offset:52425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52425*FLEN/8, x4, x1, x2) - -inst_17476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bc00000; valaddr_reg:x3; val_offset:52428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52428*FLEN/8, x4, x1, x2) - -inst_17477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6be00000; valaddr_reg:x3; val_offset:52431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52431*FLEN/8, x4, x1, x2) - -inst_17478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bf00000; valaddr_reg:x3; val_offset:52434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52434*FLEN/8, x4, x1, x2) - -inst_17479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bf80000; valaddr_reg:x3; val_offset:52437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52437*FLEN/8, x4, x1, x2) - -inst_17480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfc0000; valaddr_reg:x3; val_offset:52440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52440*FLEN/8, x4, x1, x2) - -inst_17481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfe0000; valaddr_reg:x3; val_offset:52443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52443*FLEN/8, x4, x1, x2) - -inst_17482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bff0000; valaddr_reg:x3; val_offset:52446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52446*FLEN/8, x4, x1, x2) - -inst_17483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bff8000; valaddr_reg:x3; val_offset:52449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52449*FLEN/8, x4, x1, x2) - -inst_17484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bffc000; valaddr_reg:x3; val_offset:52452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52452*FLEN/8, x4, x1, x2) - -inst_17485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bffe000; valaddr_reg:x3; val_offset:52455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52455*FLEN/8, x4, x1, x2) - -inst_17486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfff000; valaddr_reg:x3; val_offset:52458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52458*FLEN/8, x4, x1, x2) - -inst_17487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfff800; valaddr_reg:x3; val_offset:52461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52461*FLEN/8, x4, x1, x2) - -inst_17488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfffc00; valaddr_reg:x3; val_offset:52464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52464*FLEN/8, x4, x1, x2) - -inst_17489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfffe00; valaddr_reg:x3; val_offset:52467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52467*FLEN/8, x4, x1, x2) - -inst_17490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bffff00; valaddr_reg:x3; val_offset:52470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52470*FLEN/8, x4, x1, x2) - -inst_17491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bffff80; valaddr_reg:x3; val_offset:52473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52473*FLEN/8, x4, x1, x2) - -inst_17492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bffffc0; valaddr_reg:x3; val_offset:52476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52476*FLEN/8, x4, x1, x2) - -inst_17493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bffffe0; valaddr_reg:x3; val_offset:52479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52479*FLEN/8, x4, x1, x2) - -inst_17494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfffff0; valaddr_reg:x3; val_offset:52482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52482*FLEN/8, x4, x1, x2) - -inst_17495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfffff8; valaddr_reg:x3; val_offset:52485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52485*FLEN/8, x4, x1, x2) - -inst_17496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfffffc; valaddr_reg:x3; val_offset:52488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52488*FLEN/8, x4, x1, x2) - -inst_17497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bfffffe; valaddr_reg:x3; val_offset:52491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52491*FLEN/8, x4, x1, x2) - -inst_17498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x6bffffff; valaddr_reg:x3; val_offset:52494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52494*FLEN/8, x4, x1, x2) - -inst_17499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f000001; valaddr_reg:x3; val_offset:52497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52497*FLEN/8, x4, x1, x2) - -inst_17500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f000003; valaddr_reg:x3; val_offset:52500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52500*FLEN/8, x4, x1, x2) - -inst_17501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f000007; valaddr_reg:x3; val_offset:52503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52503*FLEN/8, x4, x1, x2) - -inst_17502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f199999; valaddr_reg:x3; val_offset:52506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52506*FLEN/8, x4, x1, x2) - -inst_17503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f249249; valaddr_reg:x3; val_offset:52509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52509*FLEN/8, x4, x1, x2) - -inst_17504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f333333; valaddr_reg:x3; val_offset:52512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52512*FLEN/8, x4, x1, x2) - -inst_17505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:52515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52515*FLEN/8, x4, x1, x2) - -inst_17506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:52518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52518*FLEN/8, x4, x1, x2) - -inst_17507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f444444; valaddr_reg:x3; val_offset:52521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52521*FLEN/8, x4, x1, x2) - -inst_17508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:52524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52524*FLEN/8, x4, x1, x2) - -inst_17509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:52527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52527*FLEN/8, x4, x1, x2) - -inst_17510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f666666; valaddr_reg:x3; val_offset:52530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52530*FLEN/8, x4, x1, x2) - -inst_17511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:52533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52533*FLEN/8, x4, x1, x2) - -inst_17512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:52536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52536*FLEN/8, x4, x1, x2) - -inst_17513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:52539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52539*FLEN/8, x4, x1, x2) - -inst_17514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:52542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52542*FLEN/8, x4, x1, x2) - -inst_17515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:52545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52545*FLEN/8, x4, x1, x2) - -inst_17516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:52548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52548*FLEN/8, x4, x1, x2) - -inst_17517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:52551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52551*FLEN/8, x4, x1, x2) - -inst_17518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:52554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52554*FLEN/8, x4, x1, x2) - -inst_17519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:52557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52557*FLEN/8, x4, x1, x2) - -inst_17520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:52560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52560*FLEN/8, x4, x1, x2) - -inst_17521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:52563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52563*FLEN/8, x4, x1, x2) - -inst_17522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:52566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52566*FLEN/8, x4, x1, x2) - -inst_17523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:52569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52569*FLEN/8, x4, x1, x2) - -inst_17524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:52572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52572*FLEN/8, x4, x1, x2) - -inst_17525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:52575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52575*FLEN/8, x4, x1, x2) - -inst_17526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:52578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52578*FLEN/8, x4, x1, x2) - -inst_17527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:52581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52581*FLEN/8, x4, x1, x2) - -inst_17528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:52584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52584*FLEN/8, x4, x1, x2) - -inst_17529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:52587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52587*FLEN/8, x4, x1, x2) - -inst_17530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:52590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52590*FLEN/8, x4, x1, x2) - -inst_17531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84000000; valaddr_reg:x3; val_offset:52593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52593*FLEN/8, x4, x1, x2) - -inst_17532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84000001; valaddr_reg:x3; val_offset:52596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52596*FLEN/8, x4, x1, x2) - -inst_17533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84000003; valaddr_reg:x3; val_offset:52599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52599*FLEN/8, x4, x1, x2) - -inst_17534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84000007; valaddr_reg:x3; val_offset:52602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52602*FLEN/8, x4, x1, x2) - -inst_17535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x8400000f; valaddr_reg:x3; val_offset:52605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52605*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_138) - -inst_17536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x8400001f; valaddr_reg:x3; val_offset:52608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52608*FLEN/8, x4, x1, x2) - -inst_17537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x8400003f; valaddr_reg:x3; val_offset:52611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52611*FLEN/8, x4, x1, x2) - -inst_17538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x8400007f; valaddr_reg:x3; val_offset:52614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52614*FLEN/8, x4, x1, x2) - -inst_17539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x840000ff; valaddr_reg:x3; val_offset:52617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52617*FLEN/8, x4, x1, x2) - -inst_17540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x840001ff; valaddr_reg:x3; val_offset:52620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52620*FLEN/8, x4, x1, x2) - -inst_17541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x840003ff; valaddr_reg:x3; val_offset:52623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52623*FLEN/8, x4, x1, x2) - -inst_17542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x840007ff; valaddr_reg:x3; val_offset:52626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52626*FLEN/8, x4, x1, x2) - -inst_17543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84000fff; valaddr_reg:x3; val_offset:52629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52629*FLEN/8, x4, x1, x2) - -inst_17544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84001fff; valaddr_reg:x3; val_offset:52632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52632*FLEN/8, x4, x1, x2) - -inst_17545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84003fff; valaddr_reg:x3; val_offset:52635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52635*FLEN/8, x4, x1, x2) - -inst_17546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84007fff; valaddr_reg:x3; val_offset:52638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52638*FLEN/8, x4, x1, x2) - -inst_17547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x8400ffff; valaddr_reg:x3; val_offset:52641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52641*FLEN/8, x4, x1, x2) - -inst_17548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x8401ffff; valaddr_reg:x3; val_offset:52644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52644*FLEN/8, x4, x1, x2) - -inst_17549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x8403ffff; valaddr_reg:x3; val_offset:52647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52647*FLEN/8, x4, x1, x2) - -inst_17550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x8407ffff; valaddr_reg:x3; val_offset:52650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52650*FLEN/8, x4, x1, x2) - -inst_17551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x840fffff; valaddr_reg:x3; val_offset:52653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52653*FLEN/8, x4, x1, x2) - -inst_17552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x841fffff; valaddr_reg:x3; val_offset:52656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52656*FLEN/8, x4, x1, x2) - -inst_17553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x843fffff; valaddr_reg:x3; val_offset:52659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52659*FLEN/8, x4, x1, x2) - -inst_17554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84400000; valaddr_reg:x3; val_offset:52662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52662*FLEN/8, x4, x1, x2) - -inst_17555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84600000; valaddr_reg:x3; val_offset:52665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52665*FLEN/8, x4, x1, x2) - -inst_17556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84700000; valaddr_reg:x3; val_offset:52668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52668*FLEN/8, x4, x1, x2) - -inst_17557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x84780000; valaddr_reg:x3; val_offset:52671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52671*FLEN/8, x4, x1, x2) - -inst_17558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847c0000; valaddr_reg:x3; val_offset:52674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52674*FLEN/8, x4, x1, x2) - -inst_17559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847e0000; valaddr_reg:x3; val_offset:52677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52677*FLEN/8, x4, x1, x2) - -inst_17560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847f0000; valaddr_reg:x3; val_offset:52680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52680*FLEN/8, x4, x1, x2) - -inst_17561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847f8000; valaddr_reg:x3; val_offset:52683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52683*FLEN/8, x4, x1, x2) - -inst_17562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847fc000; valaddr_reg:x3; val_offset:52686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52686*FLEN/8, x4, x1, x2) - -inst_17563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847fe000; valaddr_reg:x3; val_offset:52689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52689*FLEN/8, x4, x1, x2) - -inst_17564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847ff000; valaddr_reg:x3; val_offset:52692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52692*FLEN/8, x4, x1, x2) - -inst_17565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847ff800; valaddr_reg:x3; val_offset:52695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52695*FLEN/8, x4, x1, x2) - -inst_17566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847ffc00; valaddr_reg:x3; val_offset:52698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52698*FLEN/8, x4, x1, x2) - -inst_17567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847ffe00; valaddr_reg:x3; val_offset:52701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52701*FLEN/8, x4, x1, x2) - -inst_17568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847fff00; valaddr_reg:x3; val_offset:52704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52704*FLEN/8, x4, x1, x2) - -inst_17569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847fff80; valaddr_reg:x3; val_offset:52707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52707*FLEN/8, x4, x1, x2) - -inst_17570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847fffc0; valaddr_reg:x3; val_offset:52710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52710*FLEN/8, x4, x1, x2) - -inst_17571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847fffe0; valaddr_reg:x3; val_offset:52713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52713*FLEN/8, x4, x1, x2) - -inst_17572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847ffff0; valaddr_reg:x3; val_offset:52716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52716*FLEN/8, x4, x1, x2) - -inst_17573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847ffff8; valaddr_reg:x3; val_offset:52719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52719*FLEN/8, x4, x1, x2) - -inst_17574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847ffffc; valaddr_reg:x3; val_offset:52722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52722*FLEN/8, x4, x1, x2) - -inst_17575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847ffffe; valaddr_reg:x3; val_offset:52725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52725*FLEN/8, x4, x1, x2) - -inst_17576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; -op3val:0x847fffff; valaddr_reg:x3; val_offset:52728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52728*FLEN/8, x4, x1, x2) - -inst_17577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3f800001; valaddr_reg:x3; val_offset:52731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52731*FLEN/8, x4, x1, x2) - -inst_17578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3f800003; valaddr_reg:x3; val_offset:52734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52734*FLEN/8, x4, x1, x2) - -inst_17579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3f800007; valaddr_reg:x3; val_offset:52737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52737*FLEN/8, x4, x1, x2) - -inst_17580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3f999999; valaddr_reg:x3; val_offset:52740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52740*FLEN/8, x4, x1, x2) - -inst_17581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:52743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52743*FLEN/8, x4, x1, x2) - -inst_17582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:52746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52746*FLEN/8, x4, x1, x2) - -inst_17583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:52749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52749*FLEN/8, x4, x1, x2) - -inst_17584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:52752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52752*FLEN/8, x4, x1, x2) - -inst_17585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:52755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52755*FLEN/8, x4, x1, x2) - -inst_17586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:52758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52758*FLEN/8, x4, x1, x2) - -inst_17587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:52761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52761*FLEN/8, x4, x1, x2) - -inst_17588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:52764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52764*FLEN/8, x4, x1, x2) - -inst_17589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:52767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52767*FLEN/8, x4, x1, x2) - -inst_17590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:52770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52770*FLEN/8, x4, x1, x2) - -inst_17591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:52773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52773*FLEN/8, x4, x1, x2) - -inst_17592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:52776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52776*FLEN/8, x4, x1, x2) - -inst_17593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e800000; valaddr_reg:x3; val_offset:52779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52779*FLEN/8, x4, x1, x2) - -inst_17594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e800001; valaddr_reg:x3; val_offset:52782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52782*FLEN/8, x4, x1, x2) - -inst_17595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e800003; valaddr_reg:x3; val_offset:52785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52785*FLEN/8, x4, x1, x2) - -inst_17596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e800007; valaddr_reg:x3; val_offset:52788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52788*FLEN/8, x4, x1, x2) - -inst_17597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e80000f; valaddr_reg:x3; val_offset:52791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52791*FLEN/8, x4, x1, x2) - -inst_17598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e80001f; valaddr_reg:x3; val_offset:52794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52794*FLEN/8, x4, x1, x2) - -inst_17599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e80003f; valaddr_reg:x3; val_offset:52797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52797*FLEN/8, x4, x1, x2) - -inst_17600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e80007f; valaddr_reg:x3; val_offset:52800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52800*FLEN/8, x4, x1, x2) - -inst_17601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e8000ff; valaddr_reg:x3; val_offset:52803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52803*FLEN/8, x4, x1, x2) - -inst_17602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e8001ff; valaddr_reg:x3; val_offset:52806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52806*FLEN/8, x4, x1, x2) - -inst_17603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e8003ff; valaddr_reg:x3; val_offset:52809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52809*FLEN/8, x4, x1, x2) - -inst_17604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e8007ff; valaddr_reg:x3; val_offset:52812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52812*FLEN/8, x4, x1, x2) - -inst_17605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e800fff; valaddr_reg:x3; val_offset:52815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52815*FLEN/8, x4, x1, x2) - -inst_17606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e801fff; valaddr_reg:x3; val_offset:52818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52818*FLEN/8, x4, x1, x2) - -inst_17607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e803fff; valaddr_reg:x3; val_offset:52821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52821*FLEN/8, x4, x1, x2) - -inst_17608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e807fff; valaddr_reg:x3; val_offset:52824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52824*FLEN/8, x4, x1, x2) - -inst_17609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e80ffff; valaddr_reg:x3; val_offset:52827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52827*FLEN/8, x4, x1, x2) - -inst_17610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e81ffff; valaddr_reg:x3; val_offset:52830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52830*FLEN/8, x4, x1, x2) - -inst_17611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e83ffff; valaddr_reg:x3; val_offset:52833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52833*FLEN/8, x4, x1, x2) - -inst_17612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e87ffff; valaddr_reg:x3; val_offset:52836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52836*FLEN/8, x4, x1, x2) - -inst_17613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e8fffff; valaddr_reg:x3; val_offset:52839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52839*FLEN/8, x4, x1, x2) - -inst_17614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4e9fffff; valaddr_reg:x3; val_offset:52842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52842*FLEN/8, x4, x1, x2) - -inst_17615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4ebfffff; valaddr_reg:x3; val_offset:52845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52845*FLEN/8, x4, x1, x2) - -inst_17616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4ec00000; valaddr_reg:x3; val_offset:52848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52848*FLEN/8, x4, x1, x2) - -inst_17617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4ee00000; valaddr_reg:x3; val_offset:52851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52851*FLEN/8, x4, x1, x2) - -inst_17618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4ef00000; valaddr_reg:x3; val_offset:52854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52854*FLEN/8, x4, x1, x2) - -inst_17619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4ef80000; valaddr_reg:x3; val_offset:52857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52857*FLEN/8, x4, x1, x2) - -inst_17620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efc0000; valaddr_reg:x3; val_offset:52860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52860*FLEN/8, x4, x1, x2) - -inst_17621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efe0000; valaddr_reg:x3; val_offset:52863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52863*FLEN/8, x4, x1, x2) - -inst_17622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4eff0000; valaddr_reg:x3; val_offset:52866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52866*FLEN/8, x4, x1, x2) - -inst_17623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4eff8000; valaddr_reg:x3; val_offset:52869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52869*FLEN/8, x4, x1, x2) - -inst_17624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4effc000; valaddr_reg:x3; val_offset:52872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52872*FLEN/8, x4, x1, x2) - -inst_17625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4effe000; valaddr_reg:x3; val_offset:52875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52875*FLEN/8, x4, x1, x2) - -inst_17626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efff000; valaddr_reg:x3; val_offset:52878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52878*FLEN/8, x4, x1, x2) - -inst_17627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efff800; valaddr_reg:x3; val_offset:52881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52881*FLEN/8, x4, x1, x2) - -inst_17628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efffc00; valaddr_reg:x3; val_offset:52884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52884*FLEN/8, x4, x1, x2) - -inst_17629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efffe00; valaddr_reg:x3; val_offset:52887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52887*FLEN/8, x4, x1, x2) - -inst_17630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4effff00; valaddr_reg:x3; val_offset:52890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52890*FLEN/8, x4, x1, x2) - -inst_17631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4effff80; valaddr_reg:x3; val_offset:52893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52893*FLEN/8, x4, x1, x2) - -inst_17632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4effffc0; valaddr_reg:x3; val_offset:52896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52896*FLEN/8, x4, x1, x2) - -inst_17633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4effffe0; valaddr_reg:x3; val_offset:52899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52899*FLEN/8, x4, x1, x2) - -inst_17634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efffff0; valaddr_reg:x3; val_offset:52902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52902*FLEN/8, x4, x1, x2) - -inst_17635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efffff8; valaddr_reg:x3; val_offset:52905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52905*FLEN/8, x4, x1, x2) - -inst_17636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efffffc; valaddr_reg:x3; val_offset:52908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52908*FLEN/8, x4, x1, x2) - -inst_17637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4efffffe; valaddr_reg:x3; val_offset:52911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52911*FLEN/8, x4, x1, x2) - -inst_17638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; -op3val:0x4effffff; valaddr_reg:x3; val_offset:52914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52914*FLEN/8, x4, x1, x2) - -inst_17639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:52917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52917*FLEN/8, x4, x1, x2) - -inst_17640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:52920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52920*FLEN/8, x4, x1, x2) - -inst_17641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:52923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52923*FLEN/8, x4, x1, x2) - -inst_17642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:52926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52926*FLEN/8, x4, x1, x2) - -inst_17643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:52929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52929*FLEN/8, x4, x1, x2) - -inst_17644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:52932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52932*FLEN/8, x4, x1, x2) - -inst_17645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:52935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52935*FLEN/8, x4, x1, x2) - -inst_17646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:52938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52938*FLEN/8, x4, x1, x2) - -inst_17647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:52941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52941*FLEN/8, x4, x1, x2) - -inst_17648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:52944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52944*FLEN/8, x4, x1, x2) - -inst_17649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:52947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52947*FLEN/8, x4, x1, x2) - -inst_17650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:52950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52950*FLEN/8, x4, x1, x2) - -inst_17651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:52953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52953*FLEN/8, x4, x1, x2) - -inst_17652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:52956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52956*FLEN/8, x4, x1, x2) - -inst_17653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:52959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52959*FLEN/8, x4, x1, x2) - -inst_17654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:52962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52962*FLEN/8, x4, x1, x2) - -inst_17655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d000000; valaddr_reg:x3; val_offset:52965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52965*FLEN/8, x4, x1, x2) - -inst_17656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d000001; valaddr_reg:x3; val_offset:52968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52968*FLEN/8, x4, x1, x2) - -inst_17657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d000003; valaddr_reg:x3; val_offset:52971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52971*FLEN/8, x4, x1, x2) - -inst_17658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d000007; valaddr_reg:x3; val_offset:52974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52974*FLEN/8, x4, x1, x2) - -inst_17659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d00000f; valaddr_reg:x3; val_offset:52977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52977*FLEN/8, x4, x1, x2) - -inst_17660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d00001f; valaddr_reg:x3; val_offset:52980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52980*FLEN/8, x4, x1, x2) - -inst_17661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d00003f; valaddr_reg:x3; val_offset:52983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52983*FLEN/8, x4, x1, x2) - -inst_17662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d00007f; valaddr_reg:x3; val_offset:52986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52986*FLEN/8, x4, x1, x2) - -inst_17663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d0000ff; valaddr_reg:x3; val_offset:52989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52989*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_139) - -inst_17664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d0001ff; valaddr_reg:x3; val_offset:52992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52992*FLEN/8, x4, x1, x2) - -inst_17665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d0003ff; valaddr_reg:x3; val_offset:52995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52995*FLEN/8, x4, x1, x2) - -inst_17666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d0007ff; valaddr_reg:x3; val_offset:52998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52998*FLEN/8, x4, x1, x2) - -inst_17667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d000fff; valaddr_reg:x3; val_offset:53001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53001*FLEN/8, x4, x1, x2) - -inst_17668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d001fff; valaddr_reg:x3; val_offset:53004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53004*FLEN/8, x4, x1, x2) - -inst_17669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d003fff; valaddr_reg:x3; val_offset:53007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53007*FLEN/8, x4, x1, x2) - -inst_17670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d007fff; valaddr_reg:x3; val_offset:53010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53010*FLEN/8, x4, x1, x2) - -inst_17671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d00ffff; valaddr_reg:x3; val_offset:53013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53013*FLEN/8, x4, x1, x2) - -inst_17672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d01ffff; valaddr_reg:x3; val_offset:53016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53016*FLEN/8, x4, x1, x2) - -inst_17673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d03ffff; valaddr_reg:x3; val_offset:53019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53019*FLEN/8, x4, x1, x2) - -inst_17674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d07ffff; valaddr_reg:x3; val_offset:53022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53022*FLEN/8, x4, x1, x2) - -inst_17675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d0fffff; valaddr_reg:x3; val_offset:53025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53025*FLEN/8, x4, x1, x2) - -inst_17676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d1fffff; valaddr_reg:x3; val_offset:53028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53028*FLEN/8, x4, x1, x2) - -inst_17677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d3fffff; valaddr_reg:x3; val_offset:53031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53031*FLEN/8, x4, x1, x2) - -inst_17678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d400000; valaddr_reg:x3; val_offset:53034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53034*FLEN/8, x4, x1, x2) - -inst_17679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d600000; valaddr_reg:x3; val_offset:53037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53037*FLEN/8, x4, x1, x2) - -inst_17680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d700000; valaddr_reg:x3; val_offset:53040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53040*FLEN/8, x4, x1, x2) - -inst_17681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d780000; valaddr_reg:x3; val_offset:53043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53043*FLEN/8, x4, x1, x2) - -inst_17682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7c0000; valaddr_reg:x3; val_offset:53046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53046*FLEN/8, x4, x1, x2) - -inst_17683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7e0000; valaddr_reg:x3; val_offset:53049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53049*FLEN/8, x4, x1, x2) - -inst_17684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7f0000; valaddr_reg:x3; val_offset:53052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53052*FLEN/8, x4, x1, x2) - -inst_17685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7f8000; valaddr_reg:x3; val_offset:53055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53055*FLEN/8, x4, x1, x2) - -inst_17686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7fc000; valaddr_reg:x3; val_offset:53058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53058*FLEN/8, x4, x1, x2) - -inst_17687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7fe000; valaddr_reg:x3; val_offset:53061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53061*FLEN/8, x4, x1, x2) - -inst_17688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7ff000; valaddr_reg:x3; val_offset:53064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53064*FLEN/8, x4, x1, x2) - -inst_17689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7ff800; valaddr_reg:x3; val_offset:53067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53067*FLEN/8, x4, x1, x2) - -inst_17690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:53070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53070*FLEN/8, x4, x1, x2) - -inst_17691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:53073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53073*FLEN/8, x4, x1, x2) - -inst_17692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7fff00; valaddr_reg:x3; val_offset:53076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53076*FLEN/8, x4, x1, x2) - -inst_17693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7fff80; valaddr_reg:x3; val_offset:53079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53079*FLEN/8, x4, x1, x2) - -inst_17694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:53082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53082*FLEN/8, x4, x1, x2) - -inst_17695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:53085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53085*FLEN/8, x4, x1, x2) - -inst_17696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:53088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53088*FLEN/8, x4, x1, x2) - -inst_17697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:53091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53091*FLEN/8, x4, x1, x2) - -inst_17698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:53094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53094*FLEN/8, x4, x1, x2) - -inst_17699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:53097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53097*FLEN/8, x4, x1, x2) - -inst_17700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; -op3val:0x8d7fffff; valaddr_reg:x3; val_offset:53100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53100*FLEN/8, x4, x1, x2) - -inst_17701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbf800001; valaddr_reg:x3; val_offset:53103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53103*FLEN/8, x4, x1, x2) - -inst_17702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbf800003; valaddr_reg:x3; val_offset:53106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53106*FLEN/8, x4, x1, x2) - -inst_17703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbf800007; valaddr_reg:x3; val_offset:53109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53109*FLEN/8, x4, x1, x2) - -inst_17704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbf999999; valaddr_reg:x3; val_offset:53112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53112*FLEN/8, x4, x1, x2) - -inst_17705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:53115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53115*FLEN/8, x4, x1, x2) - -inst_17706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:53118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53118*FLEN/8, x4, x1, x2) - -inst_17707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:53121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53121*FLEN/8, x4, x1, x2) - -inst_17708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:53124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53124*FLEN/8, x4, x1, x2) - -inst_17709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:53127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53127*FLEN/8, x4, x1, x2) - -inst_17710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:53130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53130*FLEN/8, x4, x1, x2) - -inst_17711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:53133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53133*FLEN/8, x4, x1, x2) - -inst_17712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:53136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53136*FLEN/8, x4, x1, x2) - -inst_17713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:53139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53139*FLEN/8, x4, x1, x2) - -inst_17714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:53142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53142*FLEN/8, x4, x1, x2) - -inst_17715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:53145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53145*FLEN/8, x4, x1, x2) - -inst_17716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:53148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53148*FLEN/8, x4, x1, x2) - -inst_17717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9800000; valaddr_reg:x3; val_offset:53151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53151*FLEN/8, x4, x1, x2) - -inst_17718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9800001; valaddr_reg:x3; val_offset:53154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53154*FLEN/8, x4, x1, x2) - -inst_17719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9800003; valaddr_reg:x3; val_offset:53157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53157*FLEN/8, x4, x1, x2) - -inst_17720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9800007; valaddr_reg:x3; val_offset:53160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53160*FLEN/8, x4, x1, x2) - -inst_17721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc980000f; valaddr_reg:x3; val_offset:53163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53163*FLEN/8, x4, x1, x2) - -inst_17722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc980001f; valaddr_reg:x3; val_offset:53166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53166*FLEN/8, x4, x1, x2) - -inst_17723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc980003f; valaddr_reg:x3; val_offset:53169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53169*FLEN/8, x4, x1, x2) - -inst_17724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc980007f; valaddr_reg:x3; val_offset:53172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53172*FLEN/8, x4, x1, x2) - -inst_17725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc98000ff; valaddr_reg:x3; val_offset:53175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53175*FLEN/8, x4, x1, x2) - -inst_17726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc98001ff; valaddr_reg:x3; val_offset:53178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53178*FLEN/8, x4, x1, x2) - -inst_17727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc98003ff; valaddr_reg:x3; val_offset:53181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53181*FLEN/8, x4, x1, x2) - -inst_17728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc98007ff; valaddr_reg:x3; val_offset:53184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53184*FLEN/8, x4, x1, x2) - -inst_17729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9800fff; valaddr_reg:x3; val_offset:53187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53187*FLEN/8, x4, x1, x2) - -inst_17730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9801fff; valaddr_reg:x3; val_offset:53190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53190*FLEN/8, x4, x1, x2) - -inst_17731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9803fff; valaddr_reg:x3; val_offset:53193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53193*FLEN/8, x4, x1, x2) - -inst_17732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9807fff; valaddr_reg:x3; val_offset:53196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53196*FLEN/8, x4, x1, x2) - -inst_17733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc980ffff; valaddr_reg:x3; val_offset:53199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53199*FLEN/8, x4, x1, x2) - -inst_17734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc981ffff; valaddr_reg:x3; val_offset:53202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53202*FLEN/8, x4, x1, x2) - -inst_17735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc983ffff; valaddr_reg:x3; val_offset:53205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53205*FLEN/8, x4, x1, x2) - -inst_17736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc987ffff; valaddr_reg:x3; val_offset:53208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53208*FLEN/8, x4, x1, x2) - -inst_17737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc98fffff; valaddr_reg:x3; val_offset:53211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53211*FLEN/8, x4, x1, x2) - -inst_17738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc99fffff; valaddr_reg:x3; val_offset:53214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53214*FLEN/8, x4, x1, x2) - -inst_17739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9bfffff; valaddr_reg:x3; val_offset:53217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53217*FLEN/8, x4, x1, x2) - -inst_17740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9c00000; valaddr_reg:x3; val_offset:53220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53220*FLEN/8, x4, x1, x2) - -inst_17741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9e00000; valaddr_reg:x3; val_offset:53223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53223*FLEN/8, x4, x1, x2) - -inst_17742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9f00000; valaddr_reg:x3; val_offset:53226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53226*FLEN/8, x4, x1, x2) - -inst_17743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9f80000; valaddr_reg:x3; val_offset:53229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53229*FLEN/8, x4, x1, x2) - -inst_17744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fc0000; valaddr_reg:x3; val_offset:53232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53232*FLEN/8, x4, x1, x2) - -inst_17745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fe0000; valaddr_reg:x3; val_offset:53235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53235*FLEN/8, x4, x1, x2) - -inst_17746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ff0000; valaddr_reg:x3; val_offset:53238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53238*FLEN/8, x4, x1, x2) - -inst_17747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ff8000; valaddr_reg:x3; val_offset:53241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53241*FLEN/8, x4, x1, x2) - -inst_17748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ffc000; valaddr_reg:x3; val_offset:53244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53244*FLEN/8, x4, x1, x2) - -inst_17749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ffe000; valaddr_reg:x3; val_offset:53247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53247*FLEN/8, x4, x1, x2) - -inst_17750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fff000; valaddr_reg:x3; val_offset:53250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53250*FLEN/8, x4, x1, x2) - -inst_17751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fff800; valaddr_reg:x3; val_offset:53253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53253*FLEN/8, x4, x1, x2) - -inst_17752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fffc00; valaddr_reg:x3; val_offset:53256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53256*FLEN/8, x4, x1, x2) - -inst_17753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fffe00; valaddr_reg:x3; val_offset:53259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53259*FLEN/8, x4, x1, x2) - -inst_17754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ffff00; valaddr_reg:x3; val_offset:53262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53262*FLEN/8, x4, x1, x2) - -inst_17755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ffff80; valaddr_reg:x3; val_offset:53265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53265*FLEN/8, x4, x1, x2) - -inst_17756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ffffc0; valaddr_reg:x3; val_offset:53268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53268*FLEN/8, x4, x1, x2) - -inst_17757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ffffe0; valaddr_reg:x3; val_offset:53271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53271*FLEN/8, x4, x1, x2) - -inst_17758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fffff0; valaddr_reg:x3; val_offset:53274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53274*FLEN/8, x4, x1, x2) - -inst_17759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fffff8; valaddr_reg:x3; val_offset:53277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53277*FLEN/8, x4, x1, x2) - -inst_17760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fffffc; valaddr_reg:x3; val_offset:53280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53280*FLEN/8, x4, x1, x2) - -inst_17761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9fffffe; valaddr_reg:x3; val_offset:53283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53283*FLEN/8, x4, x1, x2) - -inst_17762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; -op3val:0xc9ffffff; valaddr_reg:x3; val_offset:53286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53286*FLEN/8, x4, x1, x2) - -inst_17763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8000000; valaddr_reg:x3; val_offset:53289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53289*FLEN/8, x4, x1, x2) - -inst_17764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8000001; valaddr_reg:x3; val_offset:53292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53292*FLEN/8, x4, x1, x2) - -inst_17765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8000003; valaddr_reg:x3; val_offset:53295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53295*FLEN/8, x4, x1, x2) - -inst_17766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8000007; valaddr_reg:x3; val_offset:53298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53298*FLEN/8, x4, x1, x2) - -inst_17767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe800000f; valaddr_reg:x3; val_offset:53301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53301*FLEN/8, x4, x1, x2) - -inst_17768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe800001f; valaddr_reg:x3; val_offset:53304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53304*FLEN/8, x4, x1, x2) - -inst_17769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe800003f; valaddr_reg:x3; val_offset:53307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53307*FLEN/8, x4, x1, x2) - -inst_17770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe800007f; valaddr_reg:x3; val_offset:53310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53310*FLEN/8, x4, x1, x2) - -inst_17771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe80000ff; valaddr_reg:x3; val_offset:53313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53313*FLEN/8, x4, x1, x2) - -inst_17772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe80001ff; valaddr_reg:x3; val_offset:53316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53316*FLEN/8, x4, x1, x2) - -inst_17773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe80003ff; valaddr_reg:x3; val_offset:53319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53319*FLEN/8, x4, x1, x2) - -inst_17774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe80007ff; valaddr_reg:x3; val_offset:53322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53322*FLEN/8, x4, x1, x2) - -inst_17775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8000fff; valaddr_reg:x3; val_offset:53325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53325*FLEN/8, x4, x1, x2) - -inst_17776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8001fff; valaddr_reg:x3; val_offset:53328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53328*FLEN/8, x4, x1, x2) - -inst_17777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8003fff; valaddr_reg:x3; val_offset:53331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53331*FLEN/8, x4, x1, x2) - -inst_17778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8007fff; valaddr_reg:x3; val_offset:53334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53334*FLEN/8, x4, x1, x2) - -inst_17779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe800ffff; valaddr_reg:x3; val_offset:53337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53337*FLEN/8, x4, x1, x2) - -inst_17780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe801ffff; valaddr_reg:x3; val_offset:53340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53340*FLEN/8, x4, x1, x2) - -inst_17781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe803ffff; valaddr_reg:x3; val_offset:53343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53343*FLEN/8, x4, x1, x2) - -inst_17782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe807ffff; valaddr_reg:x3; val_offset:53346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53346*FLEN/8, x4, x1, x2) - -inst_17783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe80fffff; valaddr_reg:x3; val_offset:53349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53349*FLEN/8, x4, x1, x2) - -inst_17784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe81fffff; valaddr_reg:x3; val_offset:53352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53352*FLEN/8, x4, x1, x2) - -inst_17785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe83fffff; valaddr_reg:x3; val_offset:53355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53355*FLEN/8, x4, x1, x2) - -inst_17786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8400000; valaddr_reg:x3; val_offset:53358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53358*FLEN/8, x4, x1, x2) - -inst_17787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8600000; valaddr_reg:x3; val_offset:53361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53361*FLEN/8, x4, x1, x2) - -inst_17788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8700000; valaddr_reg:x3; val_offset:53364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53364*FLEN/8, x4, x1, x2) - -inst_17789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe8780000; valaddr_reg:x3; val_offset:53367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53367*FLEN/8, x4, x1, x2) - -inst_17790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87c0000; valaddr_reg:x3; val_offset:53370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53370*FLEN/8, x4, x1, x2) - -inst_17791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87e0000; valaddr_reg:x3; val_offset:53373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53373*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_140) - -inst_17792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87f0000; valaddr_reg:x3; val_offset:53376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53376*FLEN/8, x4, x1, x2) - -inst_17793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87f8000; valaddr_reg:x3; val_offset:53379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53379*FLEN/8, x4, x1, x2) - -inst_17794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87fc000; valaddr_reg:x3; val_offset:53382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53382*FLEN/8, x4, x1, x2) - -inst_17795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87fe000; valaddr_reg:x3; val_offset:53385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53385*FLEN/8, x4, x1, x2) - -inst_17796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87ff000; valaddr_reg:x3; val_offset:53388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53388*FLEN/8, x4, x1, x2) - -inst_17797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87ff800; valaddr_reg:x3; val_offset:53391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53391*FLEN/8, x4, x1, x2) - -inst_17798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87ffc00; valaddr_reg:x3; val_offset:53394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53394*FLEN/8, x4, x1, x2) - -inst_17799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87ffe00; valaddr_reg:x3; val_offset:53397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53397*FLEN/8, x4, x1, x2) - -inst_17800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87fff00; valaddr_reg:x3; val_offset:53400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53400*FLEN/8, x4, x1, x2) - -inst_17801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87fff80; valaddr_reg:x3; val_offset:53403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53403*FLEN/8, x4, x1, x2) - -inst_17802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87fffc0; valaddr_reg:x3; val_offset:53406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53406*FLEN/8, x4, x1, x2) - -inst_17803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87fffe0; valaddr_reg:x3; val_offset:53409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53409*FLEN/8, x4, x1, x2) - -inst_17804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87ffff0; valaddr_reg:x3; val_offset:53412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53412*FLEN/8, x4, x1, x2) - -inst_17805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87ffff8; valaddr_reg:x3; val_offset:53415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53415*FLEN/8, x4, x1, x2) - -inst_17806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87ffffc; valaddr_reg:x3; val_offset:53418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53418*FLEN/8, x4, x1, x2) - -inst_17807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87ffffe; valaddr_reg:x3; val_offset:53421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53421*FLEN/8, x4, x1, x2) - -inst_17808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xe87fffff; valaddr_reg:x3; val_offset:53424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53424*FLEN/8, x4, x1, x2) - -inst_17809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff000001; valaddr_reg:x3; val_offset:53427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53427*FLEN/8, x4, x1, x2) - -inst_17810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff000003; valaddr_reg:x3; val_offset:53430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53430*FLEN/8, x4, x1, x2) - -inst_17811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff000007; valaddr_reg:x3; val_offset:53433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53433*FLEN/8, x4, x1, x2) - -inst_17812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff199999; valaddr_reg:x3; val_offset:53436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53436*FLEN/8, x4, x1, x2) - -inst_17813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff249249; valaddr_reg:x3; val_offset:53439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53439*FLEN/8, x4, x1, x2) - -inst_17814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff333333; valaddr_reg:x3; val_offset:53442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53442*FLEN/8, x4, x1, x2) - -inst_17815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:53445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53445*FLEN/8, x4, x1, x2) - -inst_17816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:53448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53448*FLEN/8, x4, x1, x2) - -inst_17817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff444444; valaddr_reg:x3; val_offset:53451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53451*FLEN/8, x4, x1, x2) - -inst_17818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:53454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53454*FLEN/8, x4, x1, x2) - -inst_17819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:53457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53457*FLEN/8, x4, x1, x2) - -inst_17820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff666666; valaddr_reg:x3; val_offset:53460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53460*FLEN/8, x4, x1, x2) - -inst_17821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:53463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53463*FLEN/8, x4, x1, x2) - -inst_17822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:53466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53466*FLEN/8, x4, x1, x2) - -inst_17823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:53469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53469*FLEN/8, x4, x1, x2) - -inst_17824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:53472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53472*FLEN/8, x4, x1, x2) - -inst_17825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3f800001; valaddr_reg:x3; val_offset:53475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53475*FLEN/8, x4, x1, x2) - -inst_17826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3f800003; valaddr_reg:x3; val_offset:53478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53478*FLEN/8, x4, x1, x2) - -inst_17827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3f800007; valaddr_reg:x3; val_offset:53481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53481*FLEN/8, x4, x1, x2) - -inst_17828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3f999999; valaddr_reg:x3; val_offset:53484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53484*FLEN/8, x4, x1, x2) - -inst_17829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:53487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53487*FLEN/8, x4, x1, x2) - -inst_17830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:53490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53490*FLEN/8, x4, x1, x2) - -inst_17831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:53493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53493*FLEN/8, x4, x1, x2) - -inst_17832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:53496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53496*FLEN/8, x4, x1, x2) - -inst_17833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:53499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53499*FLEN/8, x4, x1, x2) - -inst_17834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:53502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53502*FLEN/8, x4, x1, x2) - -inst_17835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:53505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53505*FLEN/8, x4, x1, x2) - -inst_17836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:53508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53508*FLEN/8, x4, x1, x2) - -inst_17837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:53511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53511*FLEN/8, x4, x1, x2) - -inst_17838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:53514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53514*FLEN/8, x4, x1, x2) - -inst_17839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:53517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53517*FLEN/8, x4, x1, x2) - -inst_17840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:53520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53520*FLEN/8, x4, x1, x2) - -inst_17841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40000000; valaddr_reg:x3; val_offset:53523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53523*FLEN/8, x4, x1, x2) - -inst_17842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40000001; valaddr_reg:x3; val_offset:53526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53526*FLEN/8, x4, x1, x2) - -inst_17843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40000003; valaddr_reg:x3; val_offset:53529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53529*FLEN/8, x4, x1, x2) - -inst_17844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40000007; valaddr_reg:x3; val_offset:53532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53532*FLEN/8, x4, x1, x2) - -inst_17845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x4000000f; valaddr_reg:x3; val_offset:53535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53535*FLEN/8, x4, x1, x2) - -inst_17846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x4000001f; valaddr_reg:x3; val_offset:53538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53538*FLEN/8, x4, x1, x2) - -inst_17847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x4000003f; valaddr_reg:x3; val_offset:53541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53541*FLEN/8, x4, x1, x2) - -inst_17848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x4000007f; valaddr_reg:x3; val_offset:53544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53544*FLEN/8, x4, x1, x2) - -inst_17849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x400000ff; valaddr_reg:x3; val_offset:53547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53547*FLEN/8, x4, x1, x2) - -inst_17850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x400001ff; valaddr_reg:x3; val_offset:53550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53550*FLEN/8, x4, x1, x2) - -inst_17851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x400003ff; valaddr_reg:x3; val_offset:53553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53553*FLEN/8, x4, x1, x2) - -inst_17852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x400007ff; valaddr_reg:x3; val_offset:53556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53556*FLEN/8, x4, x1, x2) - -inst_17853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40000fff; valaddr_reg:x3; val_offset:53559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53559*FLEN/8, x4, x1, x2) - -inst_17854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40001fff; valaddr_reg:x3; val_offset:53562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53562*FLEN/8, x4, x1, x2) - -inst_17855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40003fff; valaddr_reg:x3; val_offset:53565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53565*FLEN/8, x4, x1, x2) - -inst_17856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40007fff; valaddr_reg:x3; val_offset:53568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53568*FLEN/8, x4, x1, x2) - -inst_17857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x4000ffff; valaddr_reg:x3; val_offset:53571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53571*FLEN/8, x4, x1, x2) - -inst_17858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x4001ffff; valaddr_reg:x3; val_offset:53574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53574*FLEN/8, x4, x1, x2) - -inst_17859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x4003ffff; valaddr_reg:x3; val_offset:53577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53577*FLEN/8, x4, x1, x2) - -inst_17860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x4007ffff; valaddr_reg:x3; val_offset:53580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53580*FLEN/8, x4, x1, x2) - -inst_17861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x400fffff; valaddr_reg:x3; val_offset:53583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53583*FLEN/8, x4, x1, x2) - -inst_17862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x401fffff; valaddr_reg:x3; val_offset:53586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53586*FLEN/8, x4, x1, x2) - -inst_17863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x403fffff; valaddr_reg:x3; val_offset:53589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53589*FLEN/8, x4, x1, x2) - -inst_17864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40400000; valaddr_reg:x3; val_offset:53592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53592*FLEN/8, x4, x1, x2) - -inst_17865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40600000; valaddr_reg:x3; val_offset:53595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53595*FLEN/8, x4, x1, x2) - -inst_17866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40700000; valaddr_reg:x3; val_offset:53598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53598*FLEN/8, x4, x1, x2) - -inst_17867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x40780000; valaddr_reg:x3; val_offset:53601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53601*FLEN/8, x4, x1, x2) - -inst_17868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407c0000; valaddr_reg:x3; val_offset:53604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53604*FLEN/8, x4, x1, x2) - -inst_17869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407e0000; valaddr_reg:x3; val_offset:53607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53607*FLEN/8, x4, x1, x2) - -inst_17870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407f0000; valaddr_reg:x3; val_offset:53610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53610*FLEN/8, x4, x1, x2) - -inst_17871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407f8000; valaddr_reg:x3; val_offset:53613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53613*FLEN/8, x4, x1, x2) - -inst_17872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407fc000; valaddr_reg:x3; val_offset:53616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53616*FLEN/8, x4, x1, x2) - -inst_17873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407fe000; valaddr_reg:x3; val_offset:53619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53619*FLEN/8, x4, x1, x2) - -inst_17874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407ff000; valaddr_reg:x3; val_offset:53622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53622*FLEN/8, x4, x1, x2) - -inst_17875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407ff800; valaddr_reg:x3; val_offset:53625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53625*FLEN/8, x4, x1, x2) - -inst_17876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407ffc00; valaddr_reg:x3; val_offset:53628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53628*FLEN/8, x4, x1, x2) - -inst_17877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407ffe00; valaddr_reg:x3; val_offset:53631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53631*FLEN/8, x4, x1, x2) - -inst_17878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407fff00; valaddr_reg:x3; val_offset:53634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53634*FLEN/8, x4, x1, x2) - -inst_17879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407fff80; valaddr_reg:x3; val_offset:53637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53637*FLEN/8, x4, x1, x2) - -inst_17880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407fffc0; valaddr_reg:x3; val_offset:53640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53640*FLEN/8, x4, x1, x2) - -inst_17881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407fffe0; valaddr_reg:x3; val_offset:53643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53643*FLEN/8, x4, x1, x2) - -inst_17882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407ffff0; valaddr_reg:x3; val_offset:53646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53646*FLEN/8, x4, x1, x2) - -inst_17883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407ffff8; valaddr_reg:x3; val_offset:53649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53649*FLEN/8, x4, x1, x2) - -inst_17884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407ffffc; valaddr_reg:x3; val_offset:53652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53652*FLEN/8, x4, x1, x2) - -inst_17885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407ffffe; valaddr_reg:x3; val_offset:53655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53655*FLEN/8, x4, x1, x2) - -inst_17886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; -op3val:0x407fffff; valaddr_reg:x3; val_offset:53658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53658*FLEN/8, x4, x1, x2) - -inst_17887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:53661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53661*FLEN/8, x4, x1, x2) - -inst_17888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:53664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53664*FLEN/8, x4, x1, x2) - -inst_17889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:53667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53667*FLEN/8, x4, x1, x2) - -inst_17890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:53670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53670*FLEN/8, x4, x1, x2) - -inst_17891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:53673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53673*FLEN/8, x4, x1, x2) - -inst_17892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:53676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53676*FLEN/8, x4, x1, x2) - -inst_17893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:53679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53679*FLEN/8, x4, x1, x2) - -inst_17894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:53682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53682*FLEN/8, x4, x1, x2) - -inst_17895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:53685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53685*FLEN/8, x4, x1, x2) - -inst_17896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:53688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53688*FLEN/8, x4, x1, x2) - -inst_17897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:53691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53691*FLEN/8, x4, x1, x2) - -inst_17898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:53694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53694*FLEN/8, x4, x1, x2) - -inst_17899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:53697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53697*FLEN/8, x4, x1, x2) - -inst_17900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:53700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53700*FLEN/8, x4, x1, x2) - -inst_17901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:53703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53703*FLEN/8, x4, x1, x2) - -inst_17902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:53706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53706*FLEN/8, x4, x1, x2) - -inst_17903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc800000; valaddr_reg:x3; val_offset:53709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53709*FLEN/8, x4, x1, x2) - -inst_17904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc800001; valaddr_reg:x3; val_offset:53712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53712*FLEN/8, x4, x1, x2) - -inst_17905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc800003; valaddr_reg:x3; val_offset:53715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53715*FLEN/8, x4, x1, x2) - -inst_17906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc800007; valaddr_reg:x3; val_offset:53718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53718*FLEN/8, x4, x1, x2) - -inst_17907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc80000f; valaddr_reg:x3; val_offset:53721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53721*FLEN/8, x4, x1, x2) - -inst_17908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc80001f; valaddr_reg:x3; val_offset:53724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53724*FLEN/8, x4, x1, x2) - -inst_17909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc80003f; valaddr_reg:x3; val_offset:53727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53727*FLEN/8, x4, x1, x2) - -inst_17910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc80007f; valaddr_reg:x3; val_offset:53730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53730*FLEN/8, x4, x1, x2) - -inst_17911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc8000ff; valaddr_reg:x3; val_offset:53733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53733*FLEN/8, x4, x1, x2) - -inst_17912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc8001ff; valaddr_reg:x3; val_offset:53736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53736*FLEN/8, x4, x1, x2) - -inst_17913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc8003ff; valaddr_reg:x3; val_offset:53739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53739*FLEN/8, x4, x1, x2) - -inst_17914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc8007ff; valaddr_reg:x3; val_offset:53742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53742*FLEN/8, x4, x1, x2) - -inst_17915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc800fff; valaddr_reg:x3; val_offset:53745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53745*FLEN/8, x4, x1, x2) - -inst_17916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc801fff; valaddr_reg:x3; val_offset:53748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53748*FLEN/8, x4, x1, x2) - -inst_17917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc803fff; valaddr_reg:x3; val_offset:53751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53751*FLEN/8, x4, x1, x2) - -inst_17918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc807fff; valaddr_reg:x3; val_offset:53754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53754*FLEN/8, x4, x1, x2) - -inst_17919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc80ffff; valaddr_reg:x3; val_offset:53757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53757*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_141) - -inst_17920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc81ffff; valaddr_reg:x3; val_offset:53760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53760*FLEN/8, x4, x1, x2) - -inst_17921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc83ffff; valaddr_reg:x3; val_offset:53763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53763*FLEN/8, x4, x1, x2) - -inst_17922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc87ffff; valaddr_reg:x3; val_offset:53766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53766*FLEN/8, x4, x1, x2) - -inst_17923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc8fffff; valaddr_reg:x3; val_offset:53769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53769*FLEN/8, x4, x1, x2) - -inst_17924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xc9fffff; valaddr_reg:x3; val_offset:53772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53772*FLEN/8, x4, x1, x2) - -inst_17925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcbfffff; valaddr_reg:x3; val_offset:53775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53775*FLEN/8, x4, x1, x2) - -inst_17926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcc00000; valaddr_reg:x3; val_offset:53778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53778*FLEN/8, x4, x1, x2) - -inst_17927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xce00000; valaddr_reg:x3; val_offset:53781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53781*FLEN/8, x4, x1, x2) - -inst_17928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcf00000; valaddr_reg:x3; val_offset:53784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53784*FLEN/8, x4, x1, x2) - -inst_17929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcf80000; valaddr_reg:x3; val_offset:53787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53787*FLEN/8, x4, x1, x2) - -inst_17930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfc0000; valaddr_reg:x3; val_offset:53790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53790*FLEN/8, x4, x1, x2) - -inst_17931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfe0000; valaddr_reg:x3; val_offset:53793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53793*FLEN/8, x4, x1, x2) - -inst_17932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcff0000; valaddr_reg:x3; val_offset:53796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53796*FLEN/8, x4, x1, x2) - -inst_17933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcff8000; valaddr_reg:x3; val_offset:53799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53799*FLEN/8, x4, x1, x2) - -inst_17934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcffc000; valaddr_reg:x3; val_offset:53802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53802*FLEN/8, x4, x1, x2) - -inst_17935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcffe000; valaddr_reg:x3; val_offset:53805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53805*FLEN/8, x4, x1, x2) - -inst_17936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfff000; valaddr_reg:x3; val_offset:53808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53808*FLEN/8, x4, x1, x2) - -inst_17937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfff800; valaddr_reg:x3; val_offset:53811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53811*FLEN/8, x4, x1, x2) - -inst_17938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfffc00; valaddr_reg:x3; val_offset:53814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53814*FLEN/8, x4, x1, x2) - -inst_17939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfffe00; valaddr_reg:x3; val_offset:53817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53817*FLEN/8, x4, x1, x2) - -inst_17940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcffff00; valaddr_reg:x3; val_offset:53820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53820*FLEN/8, x4, x1, x2) - -inst_17941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcffff80; valaddr_reg:x3; val_offset:53823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53823*FLEN/8, x4, x1, x2) - -inst_17942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcffffc0; valaddr_reg:x3; val_offset:53826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53826*FLEN/8, x4, x1, x2) - -inst_17943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcffffe0; valaddr_reg:x3; val_offset:53829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53829*FLEN/8, x4, x1, x2) - -inst_17944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfffff0; valaddr_reg:x3; val_offset:53832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53832*FLEN/8, x4, x1, x2) - -inst_17945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfffff8; valaddr_reg:x3; val_offset:53835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53835*FLEN/8, x4, x1, x2) - -inst_17946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfffffc; valaddr_reg:x3; val_offset:53838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53838*FLEN/8, x4, x1, x2) - -inst_17947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcfffffe; valaddr_reg:x3; val_offset:53841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53841*FLEN/8, x4, x1, x2) - -inst_17948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; -op3val:0xcffffff; valaddr_reg:x3; val_offset:53844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53844*FLEN/8, x4, x1, x2) - -inst_17949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3f800001; valaddr_reg:x3; val_offset:53847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53847*FLEN/8, x4, x1, x2) - -inst_17950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3f800003; valaddr_reg:x3; val_offset:53850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53850*FLEN/8, x4, x1, x2) - -inst_17951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3f800007; valaddr_reg:x3; val_offset:53853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53853*FLEN/8, x4, x1, x2) - -inst_17952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3f999999; valaddr_reg:x3; val_offset:53856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53856*FLEN/8, x4, x1, x2) - -inst_17953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:53859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53859*FLEN/8, x4, x1, x2) - -inst_17954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:53862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53862*FLEN/8, x4, x1, x2) - -inst_17955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:53865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53865*FLEN/8, x4, x1, x2) - -inst_17956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:53868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53868*FLEN/8, x4, x1, x2) - -inst_17957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:53871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53871*FLEN/8, x4, x1, x2) - -inst_17958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:53874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53874*FLEN/8, x4, x1, x2) - -inst_17959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:53877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53877*FLEN/8, x4, x1, x2) - -inst_17960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:53880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53880*FLEN/8, x4, x1, x2) - -inst_17961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:53883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53883*FLEN/8, x4, x1, x2) - -inst_17962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:53886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53886*FLEN/8, x4, x1, x2) - -inst_17963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:53889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53889*FLEN/8, x4, x1, x2) - -inst_17964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:53892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53892*FLEN/8, x4, x1, x2) - -inst_17965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43000000; valaddr_reg:x3; val_offset:53895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53895*FLEN/8, x4, x1, x2) - -inst_17966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43000001; valaddr_reg:x3; val_offset:53898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53898*FLEN/8, x4, x1, x2) - -inst_17967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43000003; valaddr_reg:x3; val_offset:53901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53901*FLEN/8, x4, x1, x2) - -inst_17968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43000007; valaddr_reg:x3; val_offset:53904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53904*FLEN/8, x4, x1, x2) - -inst_17969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x4300000f; valaddr_reg:x3; val_offset:53907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53907*FLEN/8, x4, x1, x2) - -inst_17970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x4300001f; valaddr_reg:x3; val_offset:53910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53910*FLEN/8, x4, x1, x2) - -inst_17971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x4300003f; valaddr_reg:x3; val_offset:53913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53913*FLEN/8, x4, x1, x2) - -inst_17972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x4300007f; valaddr_reg:x3; val_offset:53916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53916*FLEN/8, x4, x1, x2) - -inst_17973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x430000ff; valaddr_reg:x3; val_offset:53919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53919*FLEN/8, x4, x1, x2) - -inst_17974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x430001ff; valaddr_reg:x3; val_offset:53922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53922*FLEN/8, x4, x1, x2) - -inst_17975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x430003ff; valaddr_reg:x3; val_offset:53925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53925*FLEN/8, x4, x1, x2) - -inst_17976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x430007ff; valaddr_reg:x3; val_offset:53928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53928*FLEN/8, x4, x1, x2) - -inst_17977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43000fff; valaddr_reg:x3; val_offset:53931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53931*FLEN/8, x4, x1, x2) - -inst_17978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43001fff; valaddr_reg:x3; val_offset:53934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53934*FLEN/8, x4, x1, x2) - -inst_17979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43003fff; valaddr_reg:x3; val_offset:53937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53937*FLEN/8, x4, x1, x2) - -inst_17980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43007fff; valaddr_reg:x3; val_offset:53940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53940*FLEN/8, x4, x1, x2) - -inst_17981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x4300ffff; valaddr_reg:x3; val_offset:53943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53943*FLEN/8, x4, x1, x2) - -inst_17982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x4301ffff; valaddr_reg:x3; val_offset:53946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53946*FLEN/8, x4, x1, x2) - -inst_17983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x4303ffff; valaddr_reg:x3; val_offset:53949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53949*FLEN/8, x4, x1, x2) - -inst_17984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x4307ffff; valaddr_reg:x3; val_offset:53952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53952*FLEN/8, x4, x1, x2) - -inst_17985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x430fffff; valaddr_reg:x3; val_offset:53955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53955*FLEN/8, x4, x1, x2) - -inst_17986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x431fffff; valaddr_reg:x3; val_offset:53958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53958*FLEN/8, x4, x1, x2) - -inst_17987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x433fffff; valaddr_reg:x3; val_offset:53961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53961*FLEN/8, x4, x1, x2) - -inst_17988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43400000; valaddr_reg:x3; val_offset:53964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53964*FLEN/8, x4, x1, x2) - -inst_17989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43600000; valaddr_reg:x3; val_offset:53967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53967*FLEN/8, x4, x1, x2) - -inst_17990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43700000; valaddr_reg:x3; val_offset:53970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53970*FLEN/8, x4, x1, x2) - -inst_17991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x43780000; valaddr_reg:x3; val_offset:53973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53973*FLEN/8, x4, x1, x2) - -inst_17992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437c0000; valaddr_reg:x3; val_offset:53976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53976*FLEN/8, x4, x1, x2) - -inst_17993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437e0000; valaddr_reg:x3; val_offset:53979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53979*FLEN/8, x4, x1, x2) - -inst_17994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437f0000; valaddr_reg:x3; val_offset:53982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53982*FLEN/8, x4, x1, x2) - -inst_17995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437f8000; valaddr_reg:x3; val_offset:53985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53985*FLEN/8, x4, x1, x2) - -inst_17996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437fc000; valaddr_reg:x3; val_offset:53988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53988*FLEN/8, x4, x1, x2) - -inst_17997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437fe000; valaddr_reg:x3; val_offset:53991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53991*FLEN/8, x4, x1, x2) - -inst_17998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437ff000; valaddr_reg:x3; val_offset:53994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53994*FLEN/8, x4, x1, x2) - -inst_17999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437ff800; valaddr_reg:x3; val_offset:53997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53997*FLEN/8, x4, x1, x2) - -inst_18000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437ffc00; valaddr_reg:x3; val_offset:54000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54000*FLEN/8, x4, x1, x2) - -inst_18001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437ffe00; valaddr_reg:x3; val_offset:54003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54003*FLEN/8, x4, x1, x2) - -inst_18002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437fff00; valaddr_reg:x3; val_offset:54006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54006*FLEN/8, x4, x1, x2) - -inst_18003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437fff80; valaddr_reg:x3; val_offset:54009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54009*FLEN/8, x4, x1, x2) - -inst_18004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437fffc0; valaddr_reg:x3; val_offset:54012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54012*FLEN/8, x4, x1, x2) - -inst_18005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437fffe0; valaddr_reg:x3; val_offset:54015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54015*FLEN/8, x4, x1, x2) - -inst_18006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437ffff0; valaddr_reg:x3; val_offset:54018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54018*FLEN/8, x4, x1, x2) - -inst_18007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437ffff8; valaddr_reg:x3; val_offset:54021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54021*FLEN/8, x4, x1, x2) - -inst_18008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437ffffc; valaddr_reg:x3; val_offset:54024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54024*FLEN/8, x4, x1, x2) - -inst_18009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437ffffe; valaddr_reg:x3; val_offset:54027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54027*FLEN/8, x4, x1, x2) - -inst_18010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; -op3val:0x437fffff; valaddr_reg:x3; val_offset:54030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54030*FLEN/8, x4, x1, x2) - -inst_18011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0800000; valaddr_reg:x3; val_offset:54033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54033*FLEN/8, x4, x1, x2) - -inst_18012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0800001; valaddr_reg:x3; val_offset:54036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54036*FLEN/8, x4, x1, x2) - -inst_18013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0800003; valaddr_reg:x3; val_offset:54039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54039*FLEN/8, x4, x1, x2) - -inst_18014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0800007; valaddr_reg:x3; val_offset:54042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54042*FLEN/8, x4, x1, x2) - -inst_18015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe080000f; valaddr_reg:x3; val_offset:54045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54045*FLEN/8, x4, x1, x2) - -inst_18016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe080001f; valaddr_reg:x3; val_offset:54048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54048*FLEN/8, x4, x1, x2) - -inst_18017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe080003f; valaddr_reg:x3; val_offset:54051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54051*FLEN/8, x4, x1, x2) - -inst_18018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe080007f; valaddr_reg:x3; val_offset:54054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54054*FLEN/8, x4, x1, x2) - -inst_18019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe08000ff; valaddr_reg:x3; val_offset:54057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54057*FLEN/8, x4, x1, x2) - -inst_18020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe08001ff; valaddr_reg:x3; val_offset:54060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54060*FLEN/8, x4, x1, x2) - -inst_18021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe08003ff; valaddr_reg:x3; val_offset:54063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54063*FLEN/8, x4, x1, x2) - -inst_18022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe08007ff; valaddr_reg:x3; val_offset:54066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54066*FLEN/8, x4, x1, x2) - -inst_18023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0800fff; valaddr_reg:x3; val_offset:54069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54069*FLEN/8, x4, x1, x2) - -inst_18024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0801fff; valaddr_reg:x3; val_offset:54072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54072*FLEN/8, x4, x1, x2) - -inst_18025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0803fff; valaddr_reg:x3; val_offset:54075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54075*FLEN/8, x4, x1, x2) - -inst_18026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0807fff; valaddr_reg:x3; val_offset:54078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54078*FLEN/8, x4, x1, x2) - -inst_18027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe080ffff; valaddr_reg:x3; val_offset:54081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54081*FLEN/8, x4, x1, x2) - -inst_18028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe081ffff; valaddr_reg:x3; val_offset:54084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54084*FLEN/8, x4, x1, x2) - -inst_18029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe083ffff; valaddr_reg:x3; val_offset:54087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54087*FLEN/8, x4, x1, x2) - -inst_18030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe087ffff; valaddr_reg:x3; val_offset:54090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54090*FLEN/8, x4, x1, x2) - -inst_18031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe08fffff; valaddr_reg:x3; val_offset:54093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54093*FLEN/8, x4, x1, x2) - -inst_18032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe09fffff; valaddr_reg:x3; val_offset:54096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54096*FLEN/8, x4, x1, x2) - -inst_18033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0bfffff; valaddr_reg:x3; val_offset:54099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54099*FLEN/8, x4, x1, x2) - -inst_18034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0c00000; valaddr_reg:x3; val_offset:54102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54102*FLEN/8, x4, x1, x2) - -inst_18035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0e00000; valaddr_reg:x3; val_offset:54105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54105*FLEN/8, x4, x1, x2) - -inst_18036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0f00000; valaddr_reg:x3; val_offset:54108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54108*FLEN/8, x4, x1, x2) - -inst_18037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0f80000; valaddr_reg:x3; val_offset:54111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54111*FLEN/8, x4, x1, x2) - -inst_18038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fc0000; valaddr_reg:x3; val_offset:54114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54114*FLEN/8, x4, x1, x2) - -inst_18039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fe0000; valaddr_reg:x3; val_offset:54117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54117*FLEN/8, x4, x1, x2) - -inst_18040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ff0000; valaddr_reg:x3; val_offset:54120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54120*FLEN/8, x4, x1, x2) - -inst_18041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ff8000; valaddr_reg:x3; val_offset:54123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54123*FLEN/8, x4, x1, x2) - -inst_18042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ffc000; valaddr_reg:x3; val_offset:54126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54126*FLEN/8, x4, x1, x2) - -inst_18043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ffe000; valaddr_reg:x3; val_offset:54129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54129*FLEN/8, x4, x1, x2) - -inst_18044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fff000; valaddr_reg:x3; val_offset:54132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54132*FLEN/8, x4, x1, x2) - -inst_18045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fff800; valaddr_reg:x3; val_offset:54135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54135*FLEN/8, x4, x1, x2) - -inst_18046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fffc00; valaddr_reg:x3; val_offset:54138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54138*FLEN/8, x4, x1, x2) - -inst_18047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fffe00; valaddr_reg:x3; val_offset:54141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54141*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_142) - -inst_18048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ffff00; valaddr_reg:x3; val_offset:54144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54144*FLEN/8, x4, x1, x2) - -inst_18049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ffff80; valaddr_reg:x3; val_offset:54147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54147*FLEN/8, x4, x1, x2) - -inst_18050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ffffc0; valaddr_reg:x3; val_offset:54150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54150*FLEN/8, x4, x1, x2) - -inst_18051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ffffe0; valaddr_reg:x3; val_offset:54153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54153*FLEN/8, x4, x1, x2) - -inst_18052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fffff0; valaddr_reg:x3; val_offset:54156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54156*FLEN/8, x4, x1, x2) - -inst_18053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fffff8; valaddr_reg:x3; val_offset:54159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54159*FLEN/8, x4, x1, x2) - -inst_18054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fffffc; valaddr_reg:x3; val_offset:54162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54162*FLEN/8, x4, x1, x2) - -inst_18055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0fffffe; valaddr_reg:x3; val_offset:54165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54165*FLEN/8, x4, x1, x2) - -inst_18056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xe0ffffff; valaddr_reg:x3; val_offset:54168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54168*FLEN/8, x4, x1, x2) - -inst_18057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff000001; valaddr_reg:x3; val_offset:54171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54171*FLEN/8, x4, x1, x2) - -inst_18058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff000003; valaddr_reg:x3; val_offset:54174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54174*FLEN/8, x4, x1, x2) - -inst_18059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff000007; valaddr_reg:x3; val_offset:54177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54177*FLEN/8, x4, x1, x2) - -inst_18060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff199999; valaddr_reg:x3; val_offset:54180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54180*FLEN/8, x4, x1, x2) - -inst_18061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff249249; valaddr_reg:x3; val_offset:54183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54183*FLEN/8, x4, x1, x2) - -inst_18062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff333333; valaddr_reg:x3; val_offset:54186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54186*FLEN/8, x4, x1, x2) - -inst_18063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:54189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54189*FLEN/8, x4, x1, x2) - -inst_18064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:54192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54192*FLEN/8, x4, x1, x2) - -inst_18065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff444444; valaddr_reg:x3; val_offset:54195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54195*FLEN/8, x4, x1, x2) - -inst_18066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:54198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54198*FLEN/8, x4, x1, x2) - -inst_18067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:54201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54201*FLEN/8, x4, x1, x2) - -inst_18068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff666666; valaddr_reg:x3; val_offset:54204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54204*FLEN/8, x4, x1, x2) - -inst_18069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:54207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54207*FLEN/8, x4, x1, x2) - -inst_18070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:54210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54210*FLEN/8, x4, x1, x2) - -inst_18071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:54213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54213*FLEN/8, x4, x1, x2) - -inst_18072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:54216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54216*FLEN/8, x4, x1, x2) - -inst_18073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:54219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54219*FLEN/8, x4, x1, x2) - -inst_18074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:54222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54222*FLEN/8, x4, x1, x2) - -inst_18075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:54225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54225*FLEN/8, x4, x1, x2) - -inst_18076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:54228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54228*FLEN/8, x4, x1, x2) - -inst_18077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:54231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54231*FLEN/8, x4, x1, x2) - -inst_18078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:54234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54234*FLEN/8, x4, x1, x2) - -inst_18079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:54237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54237*FLEN/8, x4, x1, x2) - -inst_18080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:54240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54240*FLEN/8, x4, x1, x2) - -inst_18081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:54243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54243*FLEN/8, x4, x1, x2) - -inst_18082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:54246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54246*FLEN/8, x4, x1, x2) - -inst_18083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:54249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54249*FLEN/8, x4, x1, x2) - -inst_18084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:54252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54252*FLEN/8, x4, x1, x2) - -inst_18085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:54255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54255*FLEN/8, x4, x1, x2) - -inst_18086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:54258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54258*FLEN/8, x4, x1, x2) - -inst_18087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:54261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54261*FLEN/8, x4, x1, x2) - -inst_18088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:54264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54264*FLEN/8, x4, x1, x2) - -inst_18089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6000000; valaddr_reg:x3; val_offset:54267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54267*FLEN/8, x4, x1, x2) - -inst_18090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6000001; valaddr_reg:x3; val_offset:54270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54270*FLEN/8, x4, x1, x2) - -inst_18091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6000003; valaddr_reg:x3; val_offset:54273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54273*FLEN/8, x4, x1, x2) - -inst_18092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6000007; valaddr_reg:x3; val_offset:54276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54276*FLEN/8, x4, x1, x2) - -inst_18093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x600000f; valaddr_reg:x3; val_offset:54279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54279*FLEN/8, x4, x1, x2) - -inst_18094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x600001f; valaddr_reg:x3; val_offset:54282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54282*FLEN/8, x4, x1, x2) - -inst_18095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x600003f; valaddr_reg:x3; val_offset:54285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54285*FLEN/8, x4, x1, x2) - -inst_18096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x600007f; valaddr_reg:x3; val_offset:54288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54288*FLEN/8, x4, x1, x2) - -inst_18097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x60000ff; valaddr_reg:x3; val_offset:54291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54291*FLEN/8, x4, x1, x2) - -inst_18098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x60001ff; valaddr_reg:x3; val_offset:54294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54294*FLEN/8, x4, x1, x2) - -inst_18099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x60003ff; valaddr_reg:x3; val_offset:54297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54297*FLEN/8, x4, x1, x2) - -inst_18100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x60007ff; valaddr_reg:x3; val_offset:54300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54300*FLEN/8, x4, x1, x2) - -inst_18101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6000fff; valaddr_reg:x3; val_offset:54303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54303*FLEN/8, x4, x1, x2) - -inst_18102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6001fff; valaddr_reg:x3; val_offset:54306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54306*FLEN/8, x4, x1, x2) - -inst_18103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6003fff; valaddr_reg:x3; val_offset:54309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54309*FLEN/8, x4, x1, x2) - -inst_18104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6007fff; valaddr_reg:x3; val_offset:54312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54312*FLEN/8, x4, x1, x2) - -inst_18105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x600ffff; valaddr_reg:x3; val_offset:54315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54315*FLEN/8, x4, x1, x2) - -inst_18106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x601ffff; valaddr_reg:x3; val_offset:54318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54318*FLEN/8, x4, x1, x2) - -inst_18107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x603ffff; valaddr_reg:x3; val_offset:54321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54321*FLEN/8, x4, x1, x2) - -inst_18108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x607ffff; valaddr_reg:x3; val_offset:54324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54324*FLEN/8, x4, x1, x2) - -inst_18109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x60fffff; valaddr_reg:x3; val_offset:54327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54327*FLEN/8, x4, x1, x2) - -inst_18110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x61fffff; valaddr_reg:x3; val_offset:54330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54330*FLEN/8, x4, x1, x2) - -inst_18111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x63fffff; valaddr_reg:x3; val_offset:54333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54333*FLEN/8, x4, x1, x2) - -inst_18112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6400000; valaddr_reg:x3; val_offset:54336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54336*FLEN/8, x4, x1, x2) - -inst_18113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6600000; valaddr_reg:x3; val_offset:54339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54339*FLEN/8, x4, x1, x2) - -inst_18114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6700000; valaddr_reg:x3; val_offset:54342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54342*FLEN/8, x4, x1, x2) - -inst_18115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x6780000; valaddr_reg:x3; val_offset:54345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54345*FLEN/8, x4, x1, x2) - -inst_18116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67c0000; valaddr_reg:x3; val_offset:54348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54348*FLEN/8, x4, x1, x2) - -inst_18117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67e0000; valaddr_reg:x3; val_offset:54351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54351*FLEN/8, x4, x1, x2) - -inst_18118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67f0000; valaddr_reg:x3; val_offset:54354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54354*FLEN/8, x4, x1, x2) - -inst_18119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67f8000; valaddr_reg:x3; val_offset:54357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54357*FLEN/8, x4, x1, x2) - -inst_18120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67fc000; valaddr_reg:x3; val_offset:54360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54360*FLEN/8, x4, x1, x2) - -inst_18121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67fe000; valaddr_reg:x3; val_offset:54363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54363*FLEN/8, x4, x1, x2) - -inst_18122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67ff000; valaddr_reg:x3; val_offset:54366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54366*FLEN/8, x4, x1, x2) - -inst_18123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67ff800; valaddr_reg:x3; val_offset:54369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54369*FLEN/8, x4, x1, x2) - -inst_18124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67ffc00; valaddr_reg:x3; val_offset:54372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54372*FLEN/8, x4, x1, x2) - -inst_18125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67ffe00; valaddr_reg:x3; val_offset:54375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54375*FLEN/8, x4, x1, x2) - -inst_18126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67fff00; valaddr_reg:x3; val_offset:54378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54378*FLEN/8, x4, x1, x2) - -inst_18127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67fff80; valaddr_reg:x3; val_offset:54381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54381*FLEN/8, x4, x1, x2) - -inst_18128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67fffc0; valaddr_reg:x3; val_offset:54384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54384*FLEN/8, x4, x1, x2) - -inst_18129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67fffe0; valaddr_reg:x3; val_offset:54387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54387*FLEN/8, x4, x1, x2) - -inst_18130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67ffff0; valaddr_reg:x3; val_offset:54390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54390*FLEN/8, x4, x1, x2) - -inst_18131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67ffff8; valaddr_reg:x3; val_offset:54393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54393*FLEN/8, x4, x1, x2) - -inst_18132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67ffffc; valaddr_reg:x3; val_offset:54396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54396*FLEN/8, x4, x1, x2) - -inst_18133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67ffffe; valaddr_reg:x3; val_offset:54399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54399*FLEN/8, x4, x1, x2) - -inst_18134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; -op3val:0x67fffff; valaddr_reg:x3; val_offset:54402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54402*FLEN/8, x4, x1, x2) - -inst_18135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef000000; valaddr_reg:x3; val_offset:54405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54405*FLEN/8, x4, x1, x2) - -inst_18136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef000001; valaddr_reg:x3; val_offset:54408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54408*FLEN/8, x4, x1, x2) - -inst_18137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef000003; valaddr_reg:x3; val_offset:54411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54411*FLEN/8, x4, x1, x2) - -inst_18138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef000007; valaddr_reg:x3; val_offset:54414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54414*FLEN/8, x4, x1, x2) - -inst_18139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef00000f; valaddr_reg:x3; val_offset:54417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54417*FLEN/8, x4, x1, x2) - -inst_18140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef00001f; valaddr_reg:x3; val_offset:54420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54420*FLEN/8, x4, x1, x2) - -inst_18141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef00003f; valaddr_reg:x3; val_offset:54423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54423*FLEN/8, x4, x1, x2) - -inst_18142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef00007f; valaddr_reg:x3; val_offset:54426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54426*FLEN/8, x4, x1, x2) - -inst_18143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef0000ff; valaddr_reg:x3; val_offset:54429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54429*FLEN/8, x4, x1, x2) - -inst_18144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef0001ff; valaddr_reg:x3; val_offset:54432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54432*FLEN/8, x4, x1, x2) - -inst_18145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef0003ff; valaddr_reg:x3; val_offset:54435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54435*FLEN/8, x4, x1, x2) - -inst_18146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef0007ff; valaddr_reg:x3; val_offset:54438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54438*FLEN/8, x4, x1, x2) - -inst_18147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef000fff; valaddr_reg:x3; val_offset:54441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54441*FLEN/8, x4, x1, x2) - -inst_18148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef001fff; valaddr_reg:x3; val_offset:54444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54444*FLEN/8, x4, x1, x2) - -inst_18149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef003fff; valaddr_reg:x3; val_offset:54447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54447*FLEN/8, x4, x1, x2) - -inst_18150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef007fff; valaddr_reg:x3; val_offset:54450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54450*FLEN/8, x4, x1, x2) - -inst_18151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef00ffff; valaddr_reg:x3; val_offset:54453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54453*FLEN/8, x4, x1, x2) - -inst_18152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef01ffff; valaddr_reg:x3; val_offset:54456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54456*FLEN/8, x4, x1, x2) - -inst_18153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef03ffff; valaddr_reg:x3; val_offset:54459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54459*FLEN/8, x4, x1, x2) - -inst_18154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef07ffff; valaddr_reg:x3; val_offset:54462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54462*FLEN/8, x4, x1, x2) - -inst_18155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef0fffff; valaddr_reg:x3; val_offset:54465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54465*FLEN/8, x4, x1, x2) - -inst_18156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef1fffff; valaddr_reg:x3; val_offset:54468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54468*FLEN/8, x4, x1, x2) - -inst_18157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef3fffff; valaddr_reg:x3; val_offset:54471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54471*FLEN/8, x4, x1, x2) - -inst_18158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef400000; valaddr_reg:x3; val_offset:54474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54474*FLEN/8, x4, x1, x2) - -inst_18159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef600000; valaddr_reg:x3; val_offset:54477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54477*FLEN/8, x4, x1, x2) - -inst_18160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef700000; valaddr_reg:x3; val_offset:54480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54480*FLEN/8, x4, x1, x2) - -inst_18161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef780000; valaddr_reg:x3; val_offset:54483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54483*FLEN/8, x4, x1, x2) - -inst_18162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7c0000; valaddr_reg:x3; val_offset:54486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54486*FLEN/8, x4, x1, x2) - -inst_18163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7e0000; valaddr_reg:x3; val_offset:54489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54489*FLEN/8, x4, x1, x2) - -inst_18164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7f0000; valaddr_reg:x3; val_offset:54492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54492*FLEN/8, x4, x1, x2) - -inst_18165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7f8000; valaddr_reg:x3; val_offset:54495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54495*FLEN/8, x4, x1, x2) - -inst_18166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7fc000; valaddr_reg:x3; val_offset:54498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54498*FLEN/8, x4, x1, x2) - -inst_18167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7fe000; valaddr_reg:x3; val_offset:54501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54501*FLEN/8, x4, x1, x2) - -inst_18168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7ff000; valaddr_reg:x3; val_offset:54504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54504*FLEN/8, x4, x1, x2) - -inst_18169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7ff800; valaddr_reg:x3; val_offset:54507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54507*FLEN/8, x4, x1, x2) - -inst_18170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7ffc00; valaddr_reg:x3; val_offset:54510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54510*FLEN/8, x4, x1, x2) - -inst_18171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7ffe00; valaddr_reg:x3; val_offset:54513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54513*FLEN/8, x4, x1, x2) - -inst_18172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7fff00; valaddr_reg:x3; val_offset:54516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54516*FLEN/8, x4, x1, x2) - -inst_18173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7fff80; valaddr_reg:x3; val_offset:54519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54519*FLEN/8, x4, x1, x2) - -inst_18174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7fffc0; valaddr_reg:x3; val_offset:54522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54522*FLEN/8, x4, x1, x2) - -inst_18175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7fffe0; valaddr_reg:x3; val_offset:54525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54525*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_143) - -inst_18176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7ffff0; valaddr_reg:x3; val_offset:54528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54528*FLEN/8, x4, x1, x2) - -inst_18177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7ffff8; valaddr_reg:x3; val_offset:54531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54531*FLEN/8, x4, x1, x2) - -inst_18178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7ffffc; valaddr_reg:x3; val_offset:54534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54534*FLEN/8, x4, x1, x2) - -inst_18179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7ffffe; valaddr_reg:x3; val_offset:54537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54537*FLEN/8, x4, x1, x2) - -inst_18180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xef7fffff; valaddr_reg:x3; val_offset:54540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54540*FLEN/8, x4, x1, x2) - -inst_18181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff000001; valaddr_reg:x3; val_offset:54543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54543*FLEN/8, x4, x1, x2) - -inst_18182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff000003; valaddr_reg:x3; val_offset:54546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54546*FLEN/8, x4, x1, x2) - -inst_18183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff000007; valaddr_reg:x3; val_offset:54549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54549*FLEN/8, x4, x1, x2) - -inst_18184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff199999; valaddr_reg:x3; val_offset:54552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54552*FLEN/8, x4, x1, x2) - -inst_18185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff249249; valaddr_reg:x3; val_offset:54555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54555*FLEN/8, x4, x1, x2) - -inst_18186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff333333; valaddr_reg:x3; val_offset:54558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54558*FLEN/8, x4, x1, x2) - -inst_18187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:54561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54561*FLEN/8, x4, x1, x2) - -inst_18188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:54564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54564*FLEN/8, x4, x1, x2) - -inst_18189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff444444; valaddr_reg:x3; val_offset:54567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54567*FLEN/8, x4, x1, x2) - -inst_18190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:54570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54570*FLEN/8, x4, x1, x2) - -inst_18191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:54573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54573*FLEN/8, x4, x1, x2) - -inst_18192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff666666; valaddr_reg:x3; val_offset:54576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54576*FLEN/8, x4, x1, x2) - -inst_18193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:54579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54579*FLEN/8, x4, x1, x2) - -inst_18194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:54582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54582*FLEN/8, x4, x1, x2) - -inst_18195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:54585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54585*FLEN/8, x4, x1, x2) - -inst_18196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:54588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54588*FLEN/8, x4, x1, x2) - -inst_18197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:54591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54591*FLEN/8, x4, x1, x2) - -inst_18198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:54594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54594*FLEN/8, x4, x1, x2) - -inst_18199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:54597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54597*FLEN/8, x4, x1, x2) - -inst_18200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:54600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54600*FLEN/8, x4, x1, x2) - -inst_18201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:54603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54603*FLEN/8, x4, x1, x2) - -inst_18202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:54606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54606*FLEN/8, x4, x1, x2) - -inst_18203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:54609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54609*FLEN/8, x4, x1, x2) - -inst_18204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:54612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54612*FLEN/8, x4, x1, x2) - -inst_18205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:54615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54615*FLEN/8, x4, x1, x2) - -inst_18206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:54618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54618*FLEN/8, x4, x1, x2) - -inst_18207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:54621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54621*FLEN/8, x4, x1, x2) - -inst_18208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:54624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54624*FLEN/8, x4, x1, x2) - -inst_18209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:54627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54627*FLEN/8, x4, x1, x2) - -inst_18210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:54630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54630*FLEN/8, x4, x1, x2) - -inst_18211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:54633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54633*FLEN/8, x4, x1, x2) - -inst_18212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:54636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54636*FLEN/8, x4, x1, x2) - -inst_18213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7800000; valaddr_reg:x3; val_offset:54639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54639*FLEN/8, x4, x1, x2) - -inst_18214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7800001; valaddr_reg:x3; val_offset:54642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54642*FLEN/8, x4, x1, x2) - -inst_18215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7800003; valaddr_reg:x3; val_offset:54645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54645*FLEN/8, x4, x1, x2) - -inst_18216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7800007; valaddr_reg:x3; val_offset:54648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54648*FLEN/8, x4, x1, x2) - -inst_18217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x780000f; valaddr_reg:x3; val_offset:54651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54651*FLEN/8, x4, x1, x2) - -inst_18218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x780001f; valaddr_reg:x3; val_offset:54654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54654*FLEN/8, x4, x1, x2) - -inst_18219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x780003f; valaddr_reg:x3; val_offset:54657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54657*FLEN/8, x4, x1, x2) - -inst_18220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x780007f; valaddr_reg:x3; val_offset:54660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54660*FLEN/8, x4, x1, x2) - -inst_18221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x78000ff; valaddr_reg:x3; val_offset:54663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54663*FLEN/8, x4, x1, x2) - -inst_18222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x78001ff; valaddr_reg:x3; val_offset:54666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54666*FLEN/8, x4, x1, x2) - -inst_18223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x78003ff; valaddr_reg:x3; val_offset:54669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54669*FLEN/8, x4, x1, x2) - -inst_18224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x78007ff; valaddr_reg:x3; val_offset:54672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54672*FLEN/8, x4, x1, x2) - -inst_18225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7800fff; valaddr_reg:x3; val_offset:54675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54675*FLEN/8, x4, x1, x2) - -inst_18226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7801fff; valaddr_reg:x3; val_offset:54678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54678*FLEN/8, x4, x1, x2) - -inst_18227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7803fff; valaddr_reg:x3; val_offset:54681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54681*FLEN/8, x4, x1, x2) - -inst_18228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7807fff; valaddr_reg:x3; val_offset:54684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54684*FLEN/8, x4, x1, x2) - -inst_18229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x780ffff; valaddr_reg:x3; val_offset:54687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54687*FLEN/8, x4, x1, x2) - -inst_18230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x781ffff; valaddr_reg:x3; val_offset:54690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54690*FLEN/8, x4, x1, x2) - -inst_18231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x783ffff; valaddr_reg:x3; val_offset:54693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54693*FLEN/8, x4, x1, x2) - -inst_18232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x787ffff; valaddr_reg:x3; val_offset:54696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54696*FLEN/8, x4, x1, x2) - -inst_18233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x78fffff; valaddr_reg:x3; val_offset:54699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54699*FLEN/8, x4, x1, x2) - -inst_18234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x79fffff; valaddr_reg:x3; val_offset:54702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54702*FLEN/8, x4, x1, x2) - -inst_18235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7bfffff; valaddr_reg:x3; val_offset:54705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54705*FLEN/8, x4, x1, x2) - -inst_18236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7c00000; valaddr_reg:x3; val_offset:54708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54708*FLEN/8, x4, x1, x2) - -inst_18237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7e00000; valaddr_reg:x3; val_offset:54711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54711*FLEN/8, x4, x1, x2) - -inst_18238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7f00000; valaddr_reg:x3; val_offset:54714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54714*FLEN/8, x4, x1, x2) - -inst_18239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7f80000; valaddr_reg:x3; val_offset:54717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54717*FLEN/8, x4, x1, x2) - -inst_18240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fc0000; valaddr_reg:x3; val_offset:54720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54720*FLEN/8, x4, x1, x2) - -inst_18241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fe0000; valaddr_reg:x3; val_offset:54723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54723*FLEN/8, x4, x1, x2) - -inst_18242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ff0000; valaddr_reg:x3; val_offset:54726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54726*FLEN/8, x4, x1, x2) - -inst_18243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ff8000; valaddr_reg:x3; val_offset:54729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54729*FLEN/8, x4, x1, x2) - -inst_18244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffc000; valaddr_reg:x3; val_offset:54732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54732*FLEN/8, x4, x1, x2) - -inst_18245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffe000; valaddr_reg:x3; val_offset:54735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54735*FLEN/8, x4, x1, x2) - -inst_18246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fff000; valaddr_reg:x3; val_offset:54738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54738*FLEN/8, x4, x1, x2) - -inst_18247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fff800; valaddr_reg:x3; val_offset:54741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54741*FLEN/8, x4, x1, x2) - -inst_18248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fffc00; valaddr_reg:x3; val_offset:54744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54744*FLEN/8, x4, x1, x2) - -inst_18249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fffe00; valaddr_reg:x3; val_offset:54747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54747*FLEN/8, x4, x1, x2) - -inst_18250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffff00; valaddr_reg:x3; val_offset:54750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54750*FLEN/8, x4, x1, x2) - -inst_18251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffff80; valaddr_reg:x3; val_offset:54753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54753*FLEN/8, x4, x1, x2) - -inst_18252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffffc0; valaddr_reg:x3; val_offset:54756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54756*FLEN/8, x4, x1, x2) - -inst_18253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffffe0; valaddr_reg:x3; val_offset:54759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54759*FLEN/8, x4, x1, x2) - -inst_18254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fffff0; valaddr_reg:x3; val_offset:54762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54762*FLEN/8, x4, x1, x2) - -inst_18255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fffff8; valaddr_reg:x3; val_offset:54765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54765*FLEN/8, x4, x1, x2) - -inst_18256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fffffc; valaddr_reg:x3; val_offset:54768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54768*FLEN/8, x4, x1, x2) - -inst_18257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7fffffe; valaddr_reg:x3; val_offset:54771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54771*FLEN/8, x4, x1, x2) - -inst_18258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; -op3val:0x7ffffff; valaddr_reg:x3; val_offset:54774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54774*FLEN/8, x4, x1, x2) - -inst_18259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc800000; valaddr_reg:x3; val_offset:54777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54777*FLEN/8, x4, x1, x2) - -inst_18260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc800001; valaddr_reg:x3; val_offset:54780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54780*FLEN/8, x4, x1, x2) - -inst_18261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc800003; valaddr_reg:x3; val_offset:54783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54783*FLEN/8, x4, x1, x2) - -inst_18262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc800007; valaddr_reg:x3; val_offset:54786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54786*FLEN/8, x4, x1, x2) - -inst_18263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc80000f; valaddr_reg:x3; val_offset:54789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54789*FLEN/8, x4, x1, x2) - -inst_18264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc80001f; valaddr_reg:x3; val_offset:54792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54792*FLEN/8, x4, x1, x2) - -inst_18265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc80003f; valaddr_reg:x3; val_offset:54795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54795*FLEN/8, x4, x1, x2) - -inst_18266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc80007f; valaddr_reg:x3; val_offset:54798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54798*FLEN/8, x4, x1, x2) - -inst_18267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc8000ff; valaddr_reg:x3; val_offset:54801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54801*FLEN/8, x4, x1, x2) - -inst_18268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc8001ff; valaddr_reg:x3; val_offset:54804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54804*FLEN/8, x4, x1, x2) - -inst_18269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc8003ff; valaddr_reg:x3; val_offset:54807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54807*FLEN/8, x4, x1, x2) - -inst_18270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc8007ff; valaddr_reg:x3; val_offset:54810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54810*FLEN/8, x4, x1, x2) - -inst_18271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc800fff; valaddr_reg:x3; val_offset:54813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54813*FLEN/8, x4, x1, x2) - -inst_18272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc801fff; valaddr_reg:x3; val_offset:54816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54816*FLEN/8, x4, x1, x2) - -inst_18273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc803fff; valaddr_reg:x3; val_offset:54819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54819*FLEN/8, x4, x1, x2) - -inst_18274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc807fff; valaddr_reg:x3; val_offset:54822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54822*FLEN/8, x4, x1, x2) - -inst_18275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc80ffff; valaddr_reg:x3; val_offset:54825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54825*FLEN/8, x4, x1, x2) - -inst_18276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc81ffff; valaddr_reg:x3; val_offset:54828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54828*FLEN/8, x4, x1, x2) - -inst_18277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc83ffff; valaddr_reg:x3; val_offset:54831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54831*FLEN/8, x4, x1, x2) - -inst_18278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc87ffff; valaddr_reg:x3; val_offset:54834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54834*FLEN/8, x4, x1, x2) - -inst_18279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc8fffff; valaddr_reg:x3; val_offset:54837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54837*FLEN/8, x4, x1, x2) - -inst_18280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbc9fffff; valaddr_reg:x3; val_offset:54840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54840*FLEN/8, x4, x1, x2) - -inst_18281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcbfffff; valaddr_reg:x3; val_offset:54843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54843*FLEN/8, x4, x1, x2) - -inst_18282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcc00000; valaddr_reg:x3; val_offset:54846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54846*FLEN/8, x4, x1, x2) - -inst_18283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbce00000; valaddr_reg:x3; val_offset:54849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54849*FLEN/8, x4, x1, x2) - -inst_18284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcf00000; valaddr_reg:x3; val_offset:54852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54852*FLEN/8, x4, x1, x2) - -inst_18285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcf80000; valaddr_reg:x3; val_offset:54855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54855*FLEN/8, x4, x1, x2) - -inst_18286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfc0000; valaddr_reg:x3; val_offset:54858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54858*FLEN/8, x4, x1, x2) - -inst_18287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfe0000; valaddr_reg:x3; val_offset:54861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54861*FLEN/8, x4, x1, x2) - -inst_18288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcff0000; valaddr_reg:x3; val_offset:54864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54864*FLEN/8, x4, x1, x2) - -inst_18289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcff8000; valaddr_reg:x3; val_offset:54867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54867*FLEN/8, x4, x1, x2) - -inst_18290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcffc000; valaddr_reg:x3; val_offset:54870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54870*FLEN/8, x4, x1, x2) - -inst_18291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcffe000; valaddr_reg:x3; val_offset:54873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54873*FLEN/8, x4, x1, x2) - -inst_18292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfff000; valaddr_reg:x3; val_offset:54876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54876*FLEN/8, x4, x1, x2) - -inst_18293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfff800; valaddr_reg:x3; val_offset:54879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54879*FLEN/8, x4, x1, x2) - -inst_18294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfffc00; valaddr_reg:x3; val_offset:54882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54882*FLEN/8, x4, x1, x2) - -inst_18295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfffe00; valaddr_reg:x3; val_offset:54885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54885*FLEN/8, x4, x1, x2) - -inst_18296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcffff00; valaddr_reg:x3; val_offset:54888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54888*FLEN/8, x4, x1, x2) - -inst_18297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcffff80; valaddr_reg:x3; val_offset:54891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54891*FLEN/8, x4, x1, x2) - -inst_18298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcffffc0; valaddr_reg:x3; val_offset:54894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54894*FLEN/8, x4, x1, x2) - -inst_18299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcffffe0; valaddr_reg:x3; val_offset:54897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54897*FLEN/8, x4, x1, x2) - -inst_18300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfffff0; valaddr_reg:x3; val_offset:54900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54900*FLEN/8, x4, x1, x2) - -inst_18301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfffff8; valaddr_reg:x3; val_offset:54903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54903*FLEN/8, x4, x1, x2) - -inst_18302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfffffc; valaddr_reg:x3; val_offset:54906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54906*FLEN/8, x4, x1, x2) - -inst_18303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcfffffe; valaddr_reg:x3; val_offset:54909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54909*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_144) - -inst_18304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbcffffff; valaddr_reg:x3; val_offset:54912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54912*FLEN/8, x4, x1, x2) - -inst_18305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbf800001; valaddr_reg:x3; val_offset:54915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54915*FLEN/8, x4, x1, x2) - -inst_18306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbf800003; valaddr_reg:x3; val_offset:54918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54918*FLEN/8, x4, x1, x2) - -inst_18307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbf800007; valaddr_reg:x3; val_offset:54921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54921*FLEN/8, x4, x1, x2) - -inst_18308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbf999999; valaddr_reg:x3; val_offset:54924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54924*FLEN/8, x4, x1, x2) - -inst_18309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:54927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54927*FLEN/8, x4, x1, x2) - -inst_18310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:54930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54930*FLEN/8, x4, x1, x2) - -inst_18311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:54933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54933*FLEN/8, x4, x1, x2) - -inst_18312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:54936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54936*FLEN/8, x4, x1, x2) - -inst_18313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:54939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54939*FLEN/8, x4, x1, x2) - -inst_18314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:54942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54942*FLEN/8, x4, x1, x2) - -inst_18315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:54945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54945*FLEN/8, x4, x1, x2) - -inst_18316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:54948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54948*FLEN/8, x4, x1, x2) - -inst_18317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:54951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54951*FLEN/8, x4, x1, x2) - -inst_18318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:54954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54954*FLEN/8, x4, x1, x2) - -inst_18319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:54957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54957*FLEN/8, x4, x1, x2) - -inst_18320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:54960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54960*FLEN/8, x4, x1, x2) - -inst_18321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c000000; valaddr_reg:x3; val_offset:54963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54963*FLEN/8, x4, x1, x2) - -inst_18322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c000001; valaddr_reg:x3; val_offset:54966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54966*FLEN/8, x4, x1, x2) - -inst_18323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c000003; valaddr_reg:x3; val_offset:54969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54969*FLEN/8, x4, x1, x2) - -inst_18324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c000007; valaddr_reg:x3; val_offset:54972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54972*FLEN/8, x4, x1, x2) - -inst_18325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c00000f; valaddr_reg:x3; val_offset:54975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54975*FLEN/8, x4, x1, x2) - -inst_18326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c00001f; valaddr_reg:x3; val_offset:54978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54978*FLEN/8, x4, x1, x2) - -inst_18327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c00003f; valaddr_reg:x3; val_offset:54981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54981*FLEN/8, x4, x1, x2) - -inst_18328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c00007f; valaddr_reg:x3; val_offset:54984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54984*FLEN/8, x4, x1, x2) - -inst_18329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c0000ff; valaddr_reg:x3; val_offset:54987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54987*FLEN/8, x4, x1, x2) - -inst_18330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c0001ff; valaddr_reg:x3; val_offset:54990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54990*FLEN/8, x4, x1, x2) - -inst_18331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c0003ff; valaddr_reg:x3; val_offset:54993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54993*FLEN/8, x4, x1, x2) - -inst_18332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c0007ff; valaddr_reg:x3; val_offset:54996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54996*FLEN/8, x4, x1, x2) - -inst_18333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c000fff; valaddr_reg:x3; val_offset:54999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54999*FLEN/8, x4, x1, x2) - -inst_18334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c001fff; valaddr_reg:x3; val_offset:55002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55002*FLEN/8, x4, x1, x2) - -inst_18335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c003fff; valaddr_reg:x3; val_offset:55005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55005*FLEN/8, x4, x1, x2) - -inst_18336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c007fff; valaddr_reg:x3; val_offset:55008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55008*FLEN/8, x4, x1, x2) - -inst_18337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c00ffff; valaddr_reg:x3; val_offset:55011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55011*FLEN/8, x4, x1, x2) - -inst_18338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c01ffff; valaddr_reg:x3; val_offset:55014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55014*FLEN/8, x4, x1, x2) - -inst_18339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c03ffff; valaddr_reg:x3; val_offset:55017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55017*FLEN/8, x4, x1, x2) - -inst_18340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c07ffff; valaddr_reg:x3; val_offset:55020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55020*FLEN/8, x4, x1, x2) - -inst_18341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c0fffff; valaddr_reg:x3; val_offset:55023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55023*FLEN/8, x4, x1, x2) - -inst_18342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c1fffff; valaddr_reg:x3; val_offset:55026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55026*FLEN/8, x4, x1, x2) - -inst_18343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c3fffff; valaddr_reg:x3; val_offset:55029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55029*FLEN/8, x4, x1, x2) - -inst_18344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c400000; valaddr_reg:x3; val_offset:55032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55032*FLEN/8, x4, x1, x2) - -inst_18345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c600000; valaddr_reg:x3; val_offset:55035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55035*FLEN/8, x4, x1, x2) - -inst_18346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c700000; valaddr_reg:x3; val_offset:55038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55038*FLEN/8, x4, x1, x2) - -inst_18347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c780000; valaddr_reg:x3; val_offset:55041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55041*FLEN/8, x4, x1, x2) - -inst_18348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7c0000; valaddr_reg:x3; val_offset:55044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55044*FLEN/8, x4, x1, x2) - -inst_18349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7e0000; valaddr_reg:x3; val_offset:55047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55047*FLEN/8, x4, x1, x2) - -inst_18350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7f0000; valaddr_reg:x3; val_offset:55050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55050*FLEN/8, x4, x1, x2) - -inst_18351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7f8000; valaddr_reg:x3; val_offset:55053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55053*FLEN/8, x4, x1, x2) - -inst_18352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7fc000; valaddr_reg:x3; val_offset:55056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55056*FLEN/8, x4, x1, x2) - -inst_18353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7fe000; valaddr_reg:x3; val_offset:55059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55059*FLEN/8, x4, x1, x2) - -inst_18354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7ff000; valaddr_reg:x3; val_offset:55062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55062*FLEN/8, x4, x1, x2) - -inst_18355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7ff800; valaddr_reg:x3; val_offset:55065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55065*FLEN/8, x4, x1, x2) - -inst_18356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7ffc00; valaddr_reg:x3; val_offset:55068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55068*FLEN/8, x4, x1, x2) - -inst_18357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7ffe00; valaddr_reg:x3; val_offset:55071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55071*FLEN/8, x4, x1, x2) - -inst_18358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7fff00; valaddr_reg:x3; val_offset:55074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55074*FLEN/8, x4, x1, x2) - -inst_18359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7fff80; valaddr_reg:x3; val_offset:55077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55077*FLEN/8, x4, x1, x2) - -inst_18360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7fffc0; valaddr_reg:x3; val_offset:55080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55080*FLEN/8, x4, x1, x2) - -inst_18361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7fffe0; valaddr_reg:x3; val_offset:55083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55083*FLEN/8, x4, x1, x2) - -inst_18362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7ffff0; valaddr_reg:x3; val_offset:55086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55086*FLEN/8, x4, x1, x2) - -inst_18363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7ffff8; valaddr_reg:x3; val_offset:55089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55089*FLEN/8, x4, x1, x2) - -inst_18364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7ffffc; valaddr_reg:x3; val_offset:55092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55092*FLEN/8, x4, x1, x2) - -inst_18365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7ffffe; valaddr_reg:x3; val_offset:55095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55095*FLEN/8, x4, x1, x2) - -inst_18366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x6c7fffff; valaddr_reg:x3; val_offset:55098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55098*FLEN/8, x4, x1, x2) - -inst_18367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f000001; valaddr_reg:x3; val_offset:55101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55101*FLEN/8, x4, x1, x2) - -inst_18368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f000003; valaddr_reg:x3; val_offset:55104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55104*FLEN/8, x4, x1, x2) - -inst_18369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f000007; valaddr_reg:x3; val_offset:55107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55107*FLEN/8, x4, x1, x2) - -inst_18370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f199999; valaddr_reg:x3; val_offset:55110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55110*FLEN/8, x4, x1, x2) - -inst_18371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f249249; valaddr_reg:x3; val_offset:55113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55113*FLEN/8, x4, x1, x2) - -inst_18372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f333333; valaddr_reg:x3; val_offset:55116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55116*FLEN/8, x4, x1, x2) - -inst_18373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:55119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55119*FLEN/8, x4, x1, x2) - -inst_18374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:55122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55122*FLEN/8, x4, x1, x2) - -inst_18375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f444444; valaddr_reg:x3; val_offset:55125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55125*FLEN/8, x4, x1, x2) - -inst_18376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:55128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55128*FLEN/8, x4, x1, x2) - -inst_18377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:55131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55131*FLEN/8, x4, x1, x2) - -inst_18378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f666666; valaddr_reg:x3; val_offset:55134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55134*FLEN/8, x4, x1, x2) - -inst_18379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:55137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55137*FLEN/8, x4, x1, x2) - -inst_18380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:55140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55140*FLEN/8, x4, x1, x2) - -inst_18381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:55143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55143*FLEN/8, x4, x1, x2) - -inst_18382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:55146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55146*FLEN/8, x4, x1, x2) - -inst_18383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:55149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55149*FLEN/8, x4, x1, x2) - -inst_18384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:55152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55152*FLEN/8, x4, x1, x2) - -inst_18385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:55155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55155*FLEN/8, x4, x1, x2) - -inst_18386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:55158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55158*FLEN/8, x4, x1, x2) - -inst_18387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:55161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55161*FLEN/8, x4, x1, x2) - -inst_18388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:55164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55164*FLEN/8, x4, x1, x2) - -inst_18389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:55167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55167*FLEN/8, x4, x1, x2) - -inst_18390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:55170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55170*FLEN/8, x4, x1, x2) - -inst_18391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:55173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55173*FLEN/8, x4, x1, x2) - -inst_18392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:55176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55176*FLEN/8, x4, x1, x2) - -inst_18393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:55179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55179*FLEN/8, x4, x1, x2) - -inst_18394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:55182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55182*FLEN/8, x4, x1, x2) - -inst_18395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:55185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55185*FLEN/8, x4, x1, x2) - -inst_18396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:55188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55188*FLEN/8, x4, x1, x2) - -inst_18397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:55191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55191*FLEN/8, x4, x1, x2) - -inst_18398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:55194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55194*FLEN/8, x4, x1, x2) - -inst_18399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2000000; valaddr_reg:x3; val_offset:55197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55197*FLEN/8, x4, x1, x2) - -inst_18400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2000001; valaddr_reg:x3; val_offset:55200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55200*FLEN/8, x4, x1, x2) - -inst_18401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2000003; valaddr_reg:x3; val_offset:55203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55203*FLEN/8, x4, x1, x2) - -inst_18402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2000007; valaddr_reg:x3; val_offset:55206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55206*FLEN/8, x4, x1, x2) - -inst_18403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x200000f; valaddr_reg:x3; val_offset:55209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55209*FLEN/8, x4, x1, x2) - -inst_18404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x200001f; valaddr_reg:x3; val_offset:55212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55212*FLEN/8, x4, x1, x2) - -inst_18405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x200003f; valaddr_reg:x3; val_offset:55215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55215*FLEN/8, x4, x1, x2) - -inst_18406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x200007f; valaddr_reg:x3; val_offset:55218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55218*FLEN/8, x4, x1, x2) - -inst_18407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x20000ff; valaddr_reg:x3; val_offset:55221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55221*FLEN/8, x4, x1, x2) - -inst_18408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x20001ff; valaddr_reg:x3; val_offset:55224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55224*FLEN/8, x4, x1, x2) - -inst_18409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x20003ff; valaddr_reg:x3; val_offset:55227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55227*FLEN/8, x4, x1, x2) - -inst_18410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x20007ff; valaddr_reg:x3; val_offset:55230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55230*FLEN/8, x4, x1, x2) - -inst_18411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2000fff; valaddr_reg:x3; val_offset:55233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55233*FLEN/8, x4, x1, x2) - -inst_18412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2001fff; valaddr_reg:x3; val_offset:55236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55236*FLEN/8, x4, x1, x2) - -inst_18413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2003fff; valaddr_reg:x3; val_offset:55239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55239*FLEN/8, x4, x1, x2) - -inst_18414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2007fff; valaddr_reg:x3; val_offset:55242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55242*FLEN/8, x4, x1, x2) - -inst_18415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x200ffff; valaddr_reg:x3; val_offset:55245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55245*FLEN/8, x4, x1, x2) - -inst_18416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x201ffff; valaddr_reg:x3; val_offset:55248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55248*FLEN/8, x4, x1, x2) - -inst_18417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x203ffff; valaddr_reg:x3; val_offset:55251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55251*FLEN/8, x4, x1, x2) - -inst_18418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x207ffff; valaddr_reg:x3; val_offset:55254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55254*FLEN/8, x4, x1, x2) - -inst_18419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x20fffff; valaddr_reg:x3; val_offset:55257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55257*FLEN/8, x4, x1, x2) - -inst_18420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x21fffff; valaddr_reg:x3; val_offset:55260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55260*FLEN/8, x4, x1, x2) - -inst_18421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x23fffff; valaddr_reg:x3; val_offset:55263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55263*FLEN/8, x4, x1, x2) - -inst_18422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2400000; valaddr_reg:x3; val_offset:55266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55266*FLEN/8, x4, x1, x2) - -inst_18423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2600000; valaddr_reg:x3; val_offset:55269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55269*FLEN/8, x4, x1, x2) - -inst_18424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2700000; valaddr_reg:x3; val_offset:55272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55272*FLEN/8, x4, x1, x2) - -inst_18425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x2780000; valaddr_reg:x3; val_offset:55275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55275*FLEN/8, x4, x1, x2) - -inst_18426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27c0000; valaddr_reg:x3; val_offset:55278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55278*FLEN/8, x4, x1, x2) - -inst_18427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27e0000; valaddr_reg:x3; val_offset:55281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55281*FLEN/8, x4, x1, x2) - -inst_18428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27f0000; valaddr_reg:x3; val_offset:55284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55284*FLEN/8, x4, x1, x2) - -inst_18429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27f8000; valaddr_reg:x3; val_offset:55287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55287*FLEN/8, x4, x1, x2) - -inst_18430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27fc000; valaddr_reg:x3; val_offset:55290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55290*FLEN/8, x4, x1, x2) - -inst_18431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27fe000; valaddr_reg:x3; val_offset:55293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55293*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_145) - -inst_18432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27ff000; valaddr_reg:x3; val_offset:55296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55296*FLEN/8, x4, x1, x2) - -inst_18433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27ff800; valaddr_reg:x3; val_offset:55299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55299*FLEN/8, x4, x1, x2) - -inst_18434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27ffc00; valaddr_reg:x3; val_offset:55302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55302*FLEN/8, x4, x1, x2) - -inst_18435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27ffe00; valaddr_reg:x3; val_offset:55305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55305*FLEN/8, x4, x1, x2) - -inst_18436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27fff00; valaddr_reg:x3; val_offset:55308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55308*FLEN/8, x4, x1, x2) - -inst_18437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27fff80; valaddr_reg:x3; val_offset:55311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55311*FLEN/8, x4, x1, x2) - -inst_18438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27fffc0; valaddr_reg:x3; val_offset:55314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55314*FLEN/8, x4, x1, x2) - -inst_18439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27fffe0; valaddr_reg:x3; val_offset:55317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55317*FLEN/8, x4, x1, x2) - -inst_18440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27ffff0; valaddr_reg:x3; val_offset:55320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55320*FLEN/8, x4, x1, x2) - -inst_18441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27ffff8; valaddr_reg:x3; val_offset:55323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55323*FLEN/8, x4, x1, x2) - -inst_18442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27ffffc; valaddr_reg:x3; val_offset:55326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55326*FLEN/8, x4, x1, x2) - -inst_18443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27ffffe; valaddr_reg:x3; val_offset:55329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55329*FLEN/8, x4, x1, x2) - -inst_18444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; -op3val:0x27fffff; valaddr_reg:x3; val_offset:55332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55332*FLEN/8, x4, x1, x2) - -inst_18445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:55335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55335*FLEN/8, x4, x1, x2) - -inst_18446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:55338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55338*FLEN/8, x4, x1, x2) - -inst_18447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:55341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55341*FLEN/8, x4, x1, x2) - -inst_18448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:55344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55344*FLEN/8, x4, x1, x2) - -inst_18449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:55347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55347*FLEN/8, x4, x1, x2) - -inst_18450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:55350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55350*FLEN/8, x4, x1, x2) - -inst_18451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:55353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55353*FLEN/8, x4, x1, x2) - -inst_18452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:55356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55356*FLEN/8, x4, x1, x2) - -inst_18453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:55359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55359*FLEN/8, x4, x1, x2) - -inst_18454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:55362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55362*FLEN/8, x4, x1, x2) - -inst_18455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:55365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55365*FLEN/8, x4, x1, x2) - -inst_18456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:55368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55368*FLEN/8, x4, x1, x2) - -inst_18457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:55371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55371*FLEN/8, x4, x1, x2) - -inst_18458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:55374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55374*FLEN/8, x4, x1, x2) - -inst_18459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:55377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55377*FLEN/8, x4, x1, x2) - -inst_18460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:55380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55380*FLEN/8, x4, x1, x2) - -inst_18461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9800000; valaddr_reg:x3; val_offset:55383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55383*FLEN/8, x4, x1, x2) - -inst_18462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9800001; valaddr_reg:x3; val_offset:55386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55386*FLEN/8, x4, x1, x2) - -inst_18463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9800003; valaddr_reg:x3; val_offset:55389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55389*FLEN/8, x4, x1, x2) - -inst_18464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9800007; valaddr_reg:x3; val_offset:55392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55392*FLEN/8, x4, x1, x2) - -inst_18465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x980000f; valaddr_reg:x3; val_offset:55395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55395*FLEN/8, x4, x1, x2) - -inst_18466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x980001f; valaddr_reg:x3; val_offset:55398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55398*FLEN/8, x4, x1, x2) - -inst_18467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x980003f; valaddr_reg:x3; val_offset:55401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55401*FLEN/8, x4, x1, x2) - -inst_18468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x980007f; valaddr_reg:x3; val_offset:55404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55404*FLEN/8, x4, x1, x2) - -inst_18469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x98000ff; valaddr_reg:x3; val_offset:55407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55407*FLEN/8, x4, x1, x2) - -inst_18470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x98001ff; valaddr_reg:x3; val_offset:55410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55410*FLEN/8, x4, x1, x2) - -inst_18471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x98003ff; valaddr_reg:x3; val_offset:55413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55413*FLEN/8, x4, x1, x2) - -inst_18472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x98007ff; valaddr_reg:x3; val_offset:55416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55416*FLEN/8, x4, x1, x2) - -inst_18473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9800fff; valaddr_reg:x3; val_offset:55419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55419*FLEN/8, x4, x1, x2) - -inst_18474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9801fff; valaddr_reg:x3; val_offset:55422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55422*FLEN/8, x4, x1, x2) - -inst_18475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9803fff; valaddr_reg:x3; val_offset:55425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55425*FLEN/8, x4, x1, x2) - -inst_18476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9807fff; valaddr_reg:x3; val_offset:55428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55428*FLEN/8, x4, x1, x2) - -inst_18477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x980ffff; valaddr_reg:x3; val_offset:55431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55431*FLEN/8, x4, x1, x2) - -inst_18478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x981ffff; valaddr_reg:x3; val_offset:55434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55434*FLEN/8, x4, x1, x2) - -inst_18479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x983ffff; valaddr_reg:x3; val_offset:55437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55437*FLEN/8, x4, x1, x2) - -inst_18480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x987ffff; valaddr_reg:x3; val_offset:55440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55440*FLEN/8, x4, x1, x2) - -inst_18481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x98fffff; valaddr_reg:x3; val_offset:55443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55443*FLEN/8, x4, x1, x2) - -inst_18482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x99fffff; valaddr_reg:x3; val_offset:55446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55446*FLEN/8, x4, x1, x2) - -inst_18483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9bfffff; valaddr_reg:x3; val_offset:55449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55449*FLEN/8, x4, x1, x2) - -inst_18484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9c00000; valaddr_reg:x3; val_offset:55452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55452*FLEN/8, x4, x1, x2) - -inst_18485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9e00000; valaddr_reg:x3; val_offset:55455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55455*FLEN/8, x4, x1, x2) - -inst_18486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9f00000; valaddr_reg:x3; val_offset:55458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55458*FLEN/8, x4, x1, x2) - -inst_18487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9f80000; valaddr_reg:x3; val_offset:55461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55461*FLEN/8, x4, x1, x2) - -inst_18488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fc0000; valaddr_reg:x3; val_offset:55464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55464*FLEN/8, x4, x1, x2) - -inst_18489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fe0000; valaddr_reg:x3; val_offset:55467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55467*FLEN/8, x4, x1, x2) - -inst_18490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ff0000; valaddr_reg:x3; val_offset:55470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55470*FLEN/8, x4, x1, x2) - -inst_18491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ff8000; valaddr_reg:x3; val_offset:55473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55473*FLEN/8, x4, x1, x2) - -inst_18492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ffc000; valaddr_reg:x3; val_offset:55476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55476*FLEN/8, x4, x1, x2) - -inst_18493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ffe000; valaddr_reg:x3; val_offset:55479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55479*FLEN/8, x4, x1, x2) - -inst_18494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fff000; valaddr_reg:x3; val_offset:55482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55482*FLEN/8, x4, x1, x2) - -inst_18495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fff800; valaddr_reg:x3; val_offset:55485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55485*FLEN/8, x4, x1, x2) - -inst_18496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fffc00; valaddr_reg:x3; val_offset:55488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55488*FLEN/8, x4, x1, x2) - -inst_18497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fffe00; valaddr_reg:x3; val_offset:55491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55491*FLEN/8, x4, x1, x2) - -inst_18498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ffff00; valaddr_reg:x3; val_offset:55494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55494*FLEN/8, x4, x1, x2) - -inst_18499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ffff80; valaddr_reg:x3; val_offset:55497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55497*FLEN/8, x4, x1, x2) - -inst_18500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ffffc0; valaddr_reg:x3; val_offset:55500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55500*FLEN/8, x4, x1, x2) - -inst_18501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ffffe0; valaddr_reg:x3; val_offset:55503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55503*FLEN/8, x4, x1, x2) - -inst_18502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fffff0; valaddr_reg:x3; val_offset:55506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55506*FLEN/8, x4, x1, x2) - -inst_18503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fffff8; valaddr_reg:x3; val_offset:55509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55509*FLEN/8, x4, x1, x2) - -inst_18504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fffffc; valaddr_reg:x3; val_offset:55512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55512*FLEN/8, x4, x1, x2) - -inst_18505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9fffffe; valaddr_reg:x3; val_offset:55515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55515*FLEN/8, x4, x1, x2) - -inst_18506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; -op3val:0x9ffffff; valaddr_reg:x3; val_offset:55518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55518*FLEN/8, x4, x1, x2) - -inst_18507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a000000; valaddr_reg:x3; val_offset:55521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55521*FLEN/8, x4, x1, x2) - -inst_18508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a000001; valaddr_reg:x3; val_offset:55524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55524*FLEN/8, x4, x1, x2) - -inst_18509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a000003; valaddr_reg:x3; val_offset:55527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55527*FLEN/8, x4, x1, x2) - -inst_18510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a000007; valaddr_reg:x3; val_offset:55530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55530*FLEN/8, x4, x1, x2) - -inst_18511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a00000f; valaddr_reg:x3; val_offset:55533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55533*FLEN/8, x4, x1, x2) - -inst_18512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a00001f; valaddr_reg:x3; val_offset:55536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55536*FLEN/8, x4, x1, x2) - -inst_18513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a00003f; valaddr_reg:x3; val_offset:55539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55539*FLEN/8, x4, x1, x2) - -inst_18514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a00007f; valaddr_reg:x3; val_offset:55542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55542*FLEN/8, x4, x1, x2) - -inst_18515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a0000ff; valaddr_reg:x3; val_offset:55545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55545*FLEN/8, x4, x1, x2) - -inst_18516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a0001ff; valaddr_reg:x3; val_offset:55548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55548*FLEN/8, x4, x1, x2) - -inst_18517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a0003ff; valaddr_reg:x3; val_offset:55551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55551*FLEN/8, x4, x1, x2) - -inst_18518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a0007ff; valaddr_reg:x3; val_offset:55554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55554*FLEN/8, x4, x1, x2) - -inst_18519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a000fff; valaddr_reg:x3; val_offset:55557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55557*FLEN/8, x4, x1, x2) - -inst_18520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a001fff; valaddr_reg:x3; val_offset:55560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55560*FLEN/8, x4, x1, x2) - -inst_18521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a003fff; valaddr_reg:x3; val_offset:55563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55563*FLEN/8, x4, x1, x2) - -inst_18522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a007fff; valaddr_reg:x3; val_offset:55566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55566*FLEN/8, x4, x1, x2) - -inst_18523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a00ffff; valaddr_reg:x3; val_offset:55569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55569*FLEN/8, x4, x1, x2) - -inst_18524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a01ffff; valaddr_reg:x3; val_offset:55572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55572*FLEN/8, x4, x1, x2) - -inst_18525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a03ffff; valaddr_reg:x3; val_offset:55575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55575*FLEN/8, x4, x1, x2) - -inst_18526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a07ffff; valaddr_reg:x3; val_offset:55578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55578*FLEN/8, x4, x1, x2) - -inst_18527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a0fffff; valaddr_reg:x3; val_offset:55581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55581*FLEN/8, x4, x1, x2) - -inst_18528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a1fffff; valaddr_reg:x3; val_offset:55584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55584*FLEN/8, x4, x1, x2) - -inst_18529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a3fffff; valaddr_reg:x3; val_offset:55587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55587*FLEN/8, x4, x1, x2) - -inst_18530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a400000; valaddr_reg:x3; val_offset:55590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55590*FLEN/8, x4, x1, x2) - -inst_18531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a600000; valaddr_reg:x3; val_offset:55593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55593*FLEN/8, x4, x1, x2) - -inst_18532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a700000; valaddr_reg:x3; val_offset:55596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55596*FLEN/8, x4, x1, x2) - -inst_18533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a780000; valaddr_reg:x3; val_offset:55599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55599*FLEN/8, x4, x1, x2) - -inst_18534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7c0000; valaddr_reg:x3; val_offset:55602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55602*FLEN/8, x4, x1, x2) - -inst_18535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7e0000; valaddr_reg:x3; val_offset:55605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55605*FLEN/8, x4, x1, x2) - -inst_18536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7f0000; valaddr_reg:x3; val_offset:55608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55608*FLEN/8, x4, x1, x2) - -inst_18537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7f8000; valaddr_reg:x3; val_offset:55611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55611*FLEN/8, x4, x1, x2) - -inst_18538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7fc000; valaddr_reg:x3; val_offset:55614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55614*FLEN/8, x4, x1, x2) - -inst_18539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7fe000; valaddr_reg:x3; val_offset:55617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55617*FLEN/8, x4, x1, x2) - -inst_18540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7ff000; valaddr_reg:x3; val_offset:55620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55620*FLEN/8, x4, x1, x2) - -inst_18541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7ff800; valaddr_reg:x3; val_offset:55623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55623*FLEN/8, x4, x1, x2) - -inst_18542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7ffc00; valaddr_reg:x3; val_offset:55626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55626*FLEN/8, x4, x1, x2) - -inst_18543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7ffe00; valaddr_reg:x3; val_offset:55629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55629*FLEN/8, x4, x1, x2) - -inst_18544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7fff00; valaddr_reg:x3; val_offset:55632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55632*FLEN/8, x4, x1, x2) - -inst_18545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7fff80; valaddr_reg:x3; val_offset:55635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55635*FLEN/8, x4, x1, x2) - -inst_18546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7fffc0; valaddr_reg:x3; val_offset:55638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55638*FLEN/8, x4, x1, x2) - -inst_18547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7fffe0; valaddr_reg:x3; val_offset:55641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55641*FLEN/8, x4, x1, x2) - -inst_18548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7ffff0; valaddr_reg:x3; val_offset:55644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55644*FLEN/8, x4, x1, x2) - -inst_18549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7ffff8; valaddr_reg:x3; val_offset:55647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55647*FLEN/8, x4, x1, x2) - -inst_18550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7ffffc; valaddr_reg:x3; val_offset:55650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55650*FLEN/8, x4, x1, x2) - -inst_18551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7ffffe; valaddr_reg:x3; val_offset:55653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55653*FLEN/8, x4, x1, x2) - -inst_18552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3a7fffff; valaddr_reg:x3; val_offset:55656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55656*FLEN/8, x4, x1, x2) - -inst_18553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3f800001; valaddr_reg:x3; val_offset:55659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55659*FLEN/8, x4, x1, x2) - -inst_18554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3f800003; valaddr_reg:x3; val_offset:55662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55662*FLEN/8, x4, x1, x2) - -inst_18555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3f800007; valaddr_reg:x3; val_offset:55665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55665*FLEN/8, x4, x1, x2) - -inst_18556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3f999999; valaddr_reg:x3; val_offset:55668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55668*FLEN/8, x4, x1, x2) - -inst_18557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:55671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55671*FLEN/8, x4, x1, x2) - -inst_18558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:55674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55674*FLEN/8, x4, x1, x2) - -inst_18559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:55677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55677*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_146) - -inst_18560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:55680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55680*FLEN/8, x4, x1, x2) - -inst_18561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:55683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55683*FLEN/8, x4, x1, x2) - -inst_18562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:55686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55686*FLEN/8, x4, x1, x2) - -inst_18563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:55689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55689*FLEN/8, x4, x1, x2) - -inst_18564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:55692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55692*FLEN/8, x4, x1, x2) - -inst_18565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:55695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55695*FLEN/8, x4, x1, x2) - -inst_18566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:55698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55698*FLEN/8, x4, x1, x2) - -inst_18567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:55701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55701*FLEN/8, x4, x1, x2) - -inst_18568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:55704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55704*FLEN/8, x4, x1, x2) - -inst_18569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f000000; valaddr_reg:x3; val_offset:55707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55707*FLEN/8, x4, x1, x2) - -inst_18570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f000001; valaddr_reg:x3; val_offset:55710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55710*FLEN/8, x4, x1, x2) - -inst_18571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f000003; valaddr_reg:x3; val_offset:55713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55713*FLEN/8, x4, x1, x2) - -inst_18572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f000007; valaddr_reg:x3; val_offset:55716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55716*FLEN/8, x4, x1, x2) - -inst_18573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f00000f; valaddr_reg:x3; val_offset:55719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55719*FLEN/8, x4, x1, x2) - -inst_18574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f00001f; valaddr_reg:x3; val_offset:55722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55722*FLEN/8, x4, x1, x2) - -inst_18575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f00003f; valaddr_reg:x3; val_offset:55725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55725*FLEN/8, x4, x1, x2) - -inst_18576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f00007f; valaddr_reg:x3; val_offset:55728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55728*FLEN/8, x4, x1, x2) - -inst_18577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f0000ff; valaddr_reg:x3; val_offset:55731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55731*FLEN/8, x4, x1, x2) - -inst_18578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f0001ff; valaddr_reg:x3; val_offset:55734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55734*FLEN/8, x4, x1, x2) - -inst_18579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f0003ff; valaddr_reg:x3; val_offset:55737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55737*FLEN/8, x4, x1, x2) - -inst_18580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f0007ff; valaddr_reg:x3; val_offset:55740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55740*FLEN/8, x4, x1, x2) - -inst_18581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f000fff; valaddr_reg:x3; val_offset:55743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55743*FLEN/8, x4, x1, x2) - -inst_18582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f001fff; valaddr_reg:x3; val_offset:55746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55746*FLEN/8, x4, x1, x2) - -inst_18583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f003fff; valaddr_reg:x3; val_offset:55749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55749*FLEN/8, x4, x1, x2) - -inst_18584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f007fff; valaddr_reg:x3; val_offset:55752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55752*FLEN/8, x4, x1, x2) - -inst_18585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f00ffff; valaddr_reg:x3; val_offset:55755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55755*FLEN/8, x4, x1, x2) - -inst_18586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f01ffff; valaddr_reg:x3; val_offset:55758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55758*FLEN/8, x4, x1, x2) - -inst_18587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f03ffff; valaddr_reg:x3; val_offset:55761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55761*FLEN/8, x4, x1, x2) - -inst_18588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f07ffff; valaddr_reg:x3; val_offset:55764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55764*FLEN/8, x4, x1, x2) - -inst_18589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f0fffff; valaddr_reg:x3; val_offset:55767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55767*FLEN/8, x4, x1, x2) - -inst_18590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f1fffff; valaddr_reg:x3; val_offset:55770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55770*FLEN/8, x4, x1, x2) - -inst_18591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f3fffff; valaddr_reg:x3; val_offset:55773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55773*FLEN/8, x4, x1, x2) - -inst_18592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f400000; valaddr_reg:x3; val_offset:55776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55776*FLEN/8, x4, x1, x2) - -inst_18593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f600000; valaddr_reg:x3; val_offset:55779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55779*FLEN/8, x4, x1, x2) - -inst_18594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f700000; valaddr_reg:x3; val_offset:55782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55782*FLEN/8, x4, x1, x2) - -inst_18595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f780000; valaddr_reg:x3; val_offset:55785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55785*FLEN/8, x4, x1, x2) - -inst_18596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7c0000; valaddr_reg:x3; val_offset:55788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55788*FLEN/8, x4, x1, x2) - -inst_18597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7e0000; valaddr_reg:x3; val_offset:55791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55791*FLEN/8, x4, x1, x2) - -inst_18598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7f0000; valaddr_reg:x3; val_offset:55794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55794*FLEN/8, x4, x1, x2) - -inst_18599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7f8000; valaddr_reg:x3; val_offset:55797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55797*FLEN/8, x4, x1, x2) - -inst_18600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7fc000; valaddr_reg:x3; val_offset:55800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55800*FLEN/8, x4, x1, x2) - -inst_18601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7fe000; valaddr_reg:x3; val_offset:55803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55803*FLEN/8, x4, x1, x2) - -inst_18602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7ff000; valaddr_reg:x3; val_offset:55806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55806*FLEN/8, x4, x1, x2) - -inst_18603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7ff800; valaddr_reg:x3; val_offset:55809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55809*FLEN/8, x4, x1, x2) - -inst_18604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7ffc00; valaddr_reg:x3; val_offset:55812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55812*FLEN/8, x4, x1, x2) - -inst_18605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7ffe00; valaddr_reg:x3; val_offset:55815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55815*FLEN/8, x4, x1, x2) - -inst_18606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7fff00; valaddr_reg:x3; val_offset:55818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55818*FLEN/8, x4, x1, x2) - -inst_18607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7fff80; valaddr_reg:x3; val_offset:55821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55821*FLEN/8, x4, x1, x2) - -inst_18608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7fffc0; valaddr_reg:x3; val_offset:55824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55824*FLEN/8, x4, x1, x2) - -inst_18609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7fffe0; valaddr_reg:x3; val_offset:55827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55827*FLEN/8, x4, x1, x2) - -inst_18610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7ffff0; valaddr_reg:x3; val_offset:55830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55830*FLEN/8, x4, x1, x2) - -inst_18611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7ffff8; valaddr_reg:x3; val_offset:55833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55833*FLEN/8, x4, x1, x2) - -inst_18612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7ffffc; valaddr_reg:x3; val_offset:55836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55836*FLEN/8, x4, x1, x2) - -inst_18613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7ffffe; valaddr_reg:x3; val_offset:55839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55839*FLEN/8, x4, x1, x2) - -inst_18614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0x9f7fffff; valaddr_reg:x3; val_offset:55842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55842*FLEN/8, x4, x1, x2) - -inst_18615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbf800001; valaddr_reg:x3; val_offset:55845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55845*FLEN/8, x4, x1, x2) - -inst_18616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbf800003; valaddr_reg:x3; val_offset:55848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55848*FLEN/8, x4, x1, x2) - -inst_18617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbf800007; valaddr_reg:x3; val_offset:55851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55851*FLEN/8, x4, x1, x2) - -inst_18618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbf999999; valaddr_reg:x3; val_offset:55854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55854*FLEN/8, x4, x1, x2) - -inst_18619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:55857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55857*FLEN/8, x4, x1, x2) - -inst_18620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:55860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55860*FLEN/8, x4, x1, x2) - -inst_18621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:55863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55863*FLEN/8, x4, x1, x2) - -inst_18622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:55866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55866*FLEN/8, x4, x1, x2) - -inst_18623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:55869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55869*FLEN/8, x4, x1, x2) - -inst_18624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:55872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55872*FLEN/8, x4, x1, x2) - -inst_18625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:55875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55875*FLEN/8, x4, x1, x2) - -inst_18626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:55878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55878*FLEN/8, x4, x1, x2) - -inst_18627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:55881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55881*FLEN/8, x4, x1, x2) - -inst_18628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:55884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55884*FLEN/8, x4, x1, x2) - -inst_18629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:55887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55887*FLEN/8, x4, x1, x2) - -inst_18630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:55890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55890*FLEN/8, x4, x1, x2) - -inst_18631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9000000; valaddr_reg:x3; val_offset:55893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55893*FLEN/8, x4, x1, x2) - -inst_18632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9000001; valaddr_reg:x3; val_offset:55896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55896*FLEN/8, x4, x1, x2) - -inst_18633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9000003; valaddr_reg:x3; val_offset:55899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55899*FLEN/8, x4, x1, x2) - -inst_18634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9000007; valaddr_reg:x3; val_offset:55902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55902*FLEN/8, x4, x1, x2) - -inst_18635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe900000f; valaddr_reg:x3; val_offset:55905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55905*FLEN/8, x4, x1, x2) - -inst_18636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe900001f; valaddr_reg:x3; val_offset:55908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55908*FLEN/8, x4, x1, x2) - -inst_18637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe900003f; valaddr_reg:x3; val_offset:55911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55911*FLEN/8, x4, x1, x2) - -inst_18638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe900007f; valaddr_reg:x3; val_offset:55914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55914*FLEN/8, x4, x1, x2) - -inst_18639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe90000ff; valaddr_reg:x3; val_offset:55917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55917*FLEN/8, x4, x1, x2) - -inst_18640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe90001ff; valaddr_reg:x3; val_offset:55920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55920*FLEN/8, x4, x1, x2) - -inst_18641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe90003ff; valaddr_reg:x3; val_offset:55923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55923*FLEN/8, x4, x1, x2) - -inst_18642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe90007ff; valaddr_reg:x3; val_offset:55926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55926*FLEN/8, x4, x1, x2) - -inst_18643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9000fff; valaddr_reg:x3; val_offset:55929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55929*FLEN/8, x4, x1, x2) - -inst_18644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9001fff; valaddr_reg:x3; val_offset:55932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55932*FLEN/8, x4, x1, x2) - -inst_18645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9003fff; valaddr_reg:x3; val_offset:55935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55935*FLEN/8, x4, x1, x2) - -inst_18646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9007fff; valaddr_reg:x3; val_offset:55938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55938*FLEN/8, x4, x1, x2) - -inst_18647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe900ffff; valaddr_reg:x3; val_offset:55941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55941*FLEN/8, x4, x1, x2) - -inst_18648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe901ffff; valaddr_reg:x3; val_offset:55944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55944*FLEN/8, x4, x1, x2) - -inst_18649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe903ffff; valaddr_reg:x3; val_offset:55947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55947*FLEN/8, x4, x1, x2) - -inst_18650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe907ffff; valaddr_reg:x3; val_offset:55950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55950*FLEN/8, x4, x1, x2) - -inst_18651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe90fffff; valaddr_reg:x3; val_offset:55953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55953*FLEN/8, x4, x1, x2) - -inst_18652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe91fffff; valaddr_reg:x3; val_offset:55956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55956*FLEN/8, x4, x1, x2) - -inst_18653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe93fffff; valaddr_reg:x3; val_offset:55959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55959*FLEN/8, x4, x1, x2) - -inst_18654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9400000; valaddr_reg:x3; val_offset:55962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55962*FLEN/8, x4, x1, x2) - -inst_18655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9600000; valaddr_reg:x3; val_offset:55965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55965*FLEN/8, x4, x1, x2) - -inst_18656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9700000; valaddr_reg:x3; val_offset:55968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55968*FLEN/8, x4, x1, x2) - -inst_18657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe9780000; valaddr_reg:x3; val_offset:55971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55971*FLEN/8, x4, x1, x2) - -inst_18658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97c0000; valaddr_reg:x3; val_offset:55974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55974*FLEN/8, x4, x1, x2) - -inst_18659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97e0000; valaddr_reg:x3; val_offset:55977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55977*FLEN/8, x4, x1, x2) - -inst_18660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97f0000; valaddr_reg:x3; val_offset:55980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55980*FLEN/8, x4, x1, x2) - -inst_18661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97f8000; valaddr_reg:x3; val_offset:55983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55983*FLEN/8, x4, x1, x2) - -inst_18662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97fc000; valaddr_reg:x3; val_offset:55986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55986*FLEN/8, x4, x1, x2) - -inst_18663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97fe000; valaddr_reg:x3; val_offset:55989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55989*FLEN/8, x4, x1, x2) - -inst_18664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97ff000; valaddr_reg:x3; val_offset:55992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55992*FLEN/8, x4, x1, x2) - -inst_18665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97ff800; valaddr_reg:x3; val_offset:55995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55995*FLEN/8, x4, x1, x2) - -inst_18666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97ffc00; valaddr_reg:x3; val_offset:55998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55998*FLEN/8, x4, x1, x2) - -inst_18667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97ffe00; valaddr_reg:x3; val_offset:56001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56001*FLEN/8, x4, x1, x2) - -inst_18668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97fff00; valaddr_reg:x3; val_offset:56004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56004*FLEN/8, x4, x1, x2) - -inst_18669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97fff80; valaddr_reg:x3; val_offset:56007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56007*FLEN/8, x4, x1, x2) - -inst_18670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97fffc0; valaddr_reg:x3; val_offset:56010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56010*FLEN/8, x4, x1, x2) - -inst_18671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97fffe0; valaddr_reg:x3; val_offset:56013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56013*FLEN/8, x4, x1, x2) - -inst_18672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97ffff0; valaddr_reg:x3; val_offset:56016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56016*FLEN/8, x4, x1, x2) - -inst_18673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97ffff8; valaddr_reg:x3; val_offset:56019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56019*FLEN/8, x4, x1, x2) - -inst_18674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97ffffc; valaddr_reg:x3; val_offset:56022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56022*FLEN/8, x4, x1, x2) - -inst_18675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97ffffe; valaddr_reg:x3; val_offset:56025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56025*FLEN/8, x4, x1, x2) - -inst_18676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xe97fffff; valaddr_reg:x3; val_offset:56028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56028*FLEN/8, x4, x1, x2) - -inst_18677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff000001; valaddr_reg:x3; val_offset:56031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56031*FLEN/8, x4, x1, x2) - -inst_18678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff000003; valaddr_reg:x3; val_offset:56034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56034*FLEN/8, x4, x1, x2) - -inst_18679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff000007; valaddr_reg:x3; val_offset:56037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56037*FLEN/8, x4, x1, x2) - -inst_18680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff199999; valaddr_reg:x3; val_offset:56040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56040*FLEN/8, x4, x1, x2) - -inst_18681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff249249; valaddr_reg:x3; val_offset:56043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56043*FLEN/8, x4, x1, x2) - -inst_18682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff333333; valaddr_reg:x3; val_offset:56046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56046*FLEN/8, x4, x1, x2) - -inst_18683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:56049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56049*FLEN/8, x4, x1, x2) - -inst_18684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:56052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56052*FLEN/8, x4, x1, x2) - -inst_18685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff444444; valaddr_reg:x3; val_offset:56055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56055*FLEN/8, x4, x1, x2) - -inst_18686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:56058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56058*FLEN/8, x4, x1, x2) - -inst_18687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:56061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56061*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_147) - -inst_18688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff666666; valaddr_reg:x3; val_offset:56064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56064*FLEN/8, x4, x1, x2) - -inst_18689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:56067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56067*FLEN/8, x4, x1, x2) - -inst_18690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:56070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56070*FLEN/8, x4, x1, x2) - -inst_18691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:56073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56073*FLEN/8, x4, x1, x2) - -inst_18692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:56076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56076*FLEN/8, x4, x1, x2) - -inst_18693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:56079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56079*FLEN/8, x4, x1, x2) - -inst_18694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:56082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56082*FLEN/8, x4, x1, x2) - -inst_18695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:56085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56085*FLEN/8, x4, x1, x2) - -inst_18696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:56088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56088*FLEN/8, x4, x1, x2) - -inst_18697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:56091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56091*FLEN/8, x4, x1, x2) - -inst_18698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:56094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56094*FLEN/8, x4, x1, x2) - -inst_18699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:56097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56097*FLEN/8, x4, x1, x2) - -inst_18700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:56100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56100*FLEN/8, x4, x1, x2) - -inst_18701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:56103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56103*FLEN/8, x4, x1, x2) - -inst_18702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:56106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56106*FLEN/8, x4, x1, x2) - -inst_18703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:56109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56109*FLEN/8, x4, x1, x2) - -inst_18704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:56112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56112*FLEN/8, x4, x1, x2) - -inst_18705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:56115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56115*FLEN/8, x4, x1, x2) - -inst_18706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:56118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56118*FLEN/8, x4, x1, x2) - -inst_18707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:56121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56121*FLEN/8, x4, x1, x2) - -inst_18708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:56124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56124*FLEN/8, x4, x1, x2) - -inst_18709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1000000; valaddr_reg:x3; val_offset:56127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56127*FLEN/8, x4, x1, x2) - -inst_18710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1000001; valaddr_reg:x3; val_offset:56130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56130*FLEN/8, x4, x1, x2) - -inst_18711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1000003; valaddr_reg:x3; val_offset:56133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56133*FLEN/8, x4, x1, x2) - -inst_18712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1000007; valaddr_reg:x3; val_offset:56136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56136*FLEN/8, x4, x1, x2) - -inst_18713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x100000f; valaddr_reg:x3; val_offset:56139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56139*FLEN/8, x4, x1, x2) - -inst_18714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x100001f; valaddr_reg:x3; val_offset:56142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56142*FLEN/8, x4, x1, x2) - -inst_18715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x100003f; valaddr_reg:x3; val_offset:56145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56145*FLEN/8, x4, x1, x2) - -inst_18716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x100007f; valaddr_reg:x3; val_offset:56148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56148*FLEN/8, x4, x1, x2) - -inst_18717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x10000ff; valaddr_reg:x3; val_offset:56151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56151*FLEN/8, x4, x1, x2) - -inst_18718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x10001ff; valaddr_reg:x3; val_offset:56154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56154*FLEN/8, x4, x1, x2) - -inst_18719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x10003ff; valaddr_reg:x3; val_offset:56157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56157*FLEN/8, x4, x1, x2) - -inst_18720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x10007ff; valaddr_reg:x3; val_offset:56160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56160*FLEN/8, x4, x1, x2) - -inst_18721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1000fff; valaddr_reg:x3; val_offset:56163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56163*FLEN/8, x4, x1, x2) - -inst_18722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1001fff; valaddr_reg:x3; val_offset:56166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56166*FLEN/8, x4, x1, x2) - -inst_18723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1003fff; valaddr_reg:x3; val_offset:56169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56169*FLEN/8, x4, x1, x2) - -inst_18724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1007fff; valaddr_reg:x3; val_offset:56172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56172*FLEN/8, x4, x1, x2) - -inst_18725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x100ffff; valaddr_reg:x3; val_offset:56175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56175*FLEN/8, x4, x1, x2) - -inst_18726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x101ffff; valaddr_reg:x3; val_offset:56178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56178*FLEN/8, x4, x1, x2) - -inst_18727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x103ffff; valaddr_reg:x3; val_offset:56181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56181*FLEN/8, x4, x1, x2) - -inst_18728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x107ffff; valaddr_reg:x3; val_offset:56184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56184*FLEN/8, x4, x1, x2) - -inst_18729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x10fffff; valaddr_reg:x3; val_offset:56187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56187*FLEN/8, x4, x1, x2) - -inst_18730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x11fffff; valaddr_reg:x3; val_offset:56190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56190*FLEN/8, x4, x1, x2) - -inst_18731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x13fffff; valaddr_reg:x3; val_offset:56193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56193*FLEN/8, x4, x1, x2) - -inst_18732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1400000; valaddr_reg:x3; val_offset:56196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56196*FLEN/8, x4, x1, x2) - -inst_18733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1600000; valaddr_reg:x3; val_offset:56199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56199*FLEN/8, x4, x1, x2) - -inst_18734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1700000; valaddr_reg:x3; val_offset:56202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56202*FLEN/8, x4, x1, x2) - -inst_18735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x1780000; valaddr_reg:x3; val_offset:56205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56205*FLEN/8, x4, x1, x2) - -inst_18736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17c0000; valaddr_reg:x3; val_offset:56208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56208*FLEN/8, x4, x1, x2) - -inst_18737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17e0000; valaddr_reg:x3; val_offset:56211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56211*FLEN/8, x4, x1, x2) - -inst_18738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17f0000; valaddr_reg:x3; val_offset:56214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56214*FLEN/8, x4, x1, x2) - -inst_18739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17f8000; valaddr_reg:x3; val_offset:56217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56217*FLEN/8, x4, x1, x2) - -inst_18740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17fc000; valaddr_reg:x3; val_offset:56220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56220*FLEN/8, x4, x1, x2) - -inst_18741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17fe000; valaddr_reg:x3; val_offset:56223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56223*FLEN/8, x4, x1, x2) - -inst_18742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17ff000; valaddr_reg:x3; val_offset:56226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56226*FLEN/8, x4, x1, x2) - -inst_18743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17ff800; valaddr_reg:x3; val_offset:56229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56229*FLEN/8, x4, x1, x2) - -inst_18744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17ffc00; valaddr_reg:x3; val_offset:56232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56232*FLEN/8, x4, x1, x2) - -inst_18745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17ffe00; valaddr_reg:x3; val_offset:56235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56235*FLEN/8, x4, x1, x2) - -inst_18746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17fff00; valaddr_reg:x3; val_offset:56238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56238*FLEN/8, x4, x1, x2) - -inst_18747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17fff80; valaddr_reg:x3; val_offset:56241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56241*FLEN/8, x4, x1, x2) - -inst_18748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17fffc0; valaddr_reg:x3; val_offset:56244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56244*FLEN/8, x4, x1, x2) - -inst_18749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17fffe0; valaddr_reg:x3; val_offset:56247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56247*FLEN/8, x4, x1, x2) - -inst_18750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17ffff0; valaddr_reg:x3; val_offset:56250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56250*FLEN/8, x4, x1, x2) - -inst_18751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17ffff8; valaddr_reg:x3; val_offset:56253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56253*FLEN/8, x4, x1, x2) - -inst_18752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17ffffc; valaddr_reg:x3; val_offset:56256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56256*FLEN/8, x4, x1, x2) - -inst_18753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17ffffe; valaddr_reg:x3; val_offset:56259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56259*FLEN/8, x4, x1, x2) - -inst_18754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; -op3val:0x17fffff; valaddr_reg:x3; val_offset:56262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56262*FLEN/8, x4, x1, x2) - -inst_18755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:56265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56265*FLEN/8, x4, x1, x2) - -inst_18756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:56268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56268*FLEN/8, x4, x1, x2) - -inst_18757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:56271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56271*FLEN/8, x4, x1, x2) - -inst_18758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:56274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56274*FLEN/8, x4, x1, x2) - -inst_18759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:56277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56277*FLEN/8, x4, x1, x2) - -inst_18760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:56280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56280*FLEN/8, x4, x1, x2) - -inst_18761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:56283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56283*FLEN/8, x4, x1, x2) - -inst_18762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:56286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56286*FLEN/8, x4, x1, x2) - -inst_18763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:56289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56289*FLEN/8, x4, x1, x2) - -inst_18764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:56292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56292*FLEN/8, x4, x1, x2) - -inst_18765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:56295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56295*FLEN/8, x4, x1, x2) - -inst_18766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:56298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56298*FLEN/8, x4, x1, x2) - -inst_18767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:56301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56301*FLEN/8, x4, x1, x2) - -inst_18768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:56304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56304*FLEN/8, x4, x1, x2) - -inst_18769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:56307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56307*FLEN/8, x4, x1, x2) - -inst_18770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:56310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56310*FLEN/8, x4, x1, x2) - -inst_18771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86800000; valaddr_reg:x3; val_offset:56313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56313*FLEN/8, x4, x1, x2) - -inst_18772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86800001; valaddr_reg:x3; val_offset:56316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56316*FLEN/8, x4, x1, x2) - -inst_18773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86800003; valaddr_reg:x3; val_offset:56319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56319*FLEN/8, x4, x1, x2) - -inst_18774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86800007; valaddr_reg:x3; val_offset:56322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56322*FLEN/8, x4, x1, x2) - -inst_18775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x8680000f; valaddr_reg:x3; val_offset:56325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56325*FLEN/8, x4, x1, x2) - -inst_18776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x8680001f; valaddr_reg:x3; val_offset:56328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56328*FLEN/8, x4, x1, x2) - -inst_18777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x8680003f; valaddr_reg:x3; val_offset:56331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56331*FLEN/8, x4, x1, x2) - -inst_18778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x8680007f; valaddr_reg:x3; val_offset:56334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56334*FLEN/8, x4, x1, x2) - -inst_18779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x868000ff; valaddr_reg:x3; val_offset:56337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56337*FLEN/8, x4, x1, x2) - -inst_18780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x868001ff; valaddr_reg:x3; val_offset:56340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56340*FLEN/8, x4, x1, x2) - -inst_18781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x868003ff; valaddr_reg:x3; val_offset:56343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56343*FLEN/8, x4, x1, x2) - -inst_18782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x868007ff; valaddr_reg:x3; val_offset:56346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56346*FLEN/8, x4, x1, x2) - -inst_18783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86800fff; valaddr_reg:x3; val_offset:56349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56349*FLEN/8, x4, x1, x2) - -inst_18784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86801fff; valaddr_reg:x3; val_offset:56352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56352*FLEN/8, x4, x1, x2) - -inst_18785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86803fff; valaddr_reg:x3; val_offset:56355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56355*FLEN/8, x4, x1, x2) - -inst_18786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86807fff; valaddr_reg:x3; val_offset:56358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56358*FLEN/8, x4, x1, x2) - -inst_18787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x8680ffff; valaddr_reg:x3; val_offset:56361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56361*FLEN/8, x4, x1, x2) - -inst_18788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x8681ffff; valaddr_reg:x3; val_offset:56364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56364*FLEN/8, x4, x1, x2) - -inst_18789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x8683ffff; valaddr_reg:x3; val_offset:56367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56367*FLEN/8, x4, x1, x2) - -inst_18790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x8687ffff; valaddr_reg:x3; val_offset:56370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56370*FLEN/8, x4, x1, x2) - -inst_18791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x868fffff; valaddr_reg:x3; val_offset:56373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56373*FLEN/8, x4, x1, x2) - -inst_18792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x869fffff; valaddr_reg:x3; val_offset:56376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56376*FLEN/8, x4, x1, x2) - -inst_18793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86bfffff; valaddr_reg:x3; val_offset:56379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56379*FLEN/8, x4, x1, x2) - -inst_18794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86c00000; valaddr_reg:x3; val_offset:56382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56382*FLEN/8, x4, x1, x2) - -inst_18795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86e00000; valaddr_reg:x3; val_offset:56385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56385*FLEN/8, x4, x1, x2) - -inst_18796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86f00000; valaddr_reg:x3; val_offset:56388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56388*FLEN/8, x4, x1, x2) - -inst_18797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86f80000; valaddr_reg:x3; val_offset:56391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56391*FLEN/8, x4, x1, x2) - -inst_18798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fc0000; valaddr_reg:x3; val_offset:56394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56394*FLEN/8, x4, x1, x2) - -inst_18799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fe0000; valaddr_reg:x3; val_offset:56397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56397*FLEN/8, x4, x1, x2) - -inst_18800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ff0000; valaddr_reg:x3; val_offset:56400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56400*FLEN/8, x4, x1, x2) - -inst_18801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ff8000; valaddr_reg:x3; val_offset:56403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56403*FLEN/8, x4, x1, x2) - -inst_18802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ffc000; valaddr_reg:x3; val_offset:56406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56406*FLEN/8, x4, x1, x2) - -inst_18803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ffe000; valaddr_reg:x3; val_offset:56409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56409*FLEN/8, x4, x1, x2) - -inst_18804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fff000; valaddr_reg:x3; val_offset:56412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56412*FLEN/8, x4, x1, x2) - -inst_18805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fff800; valaddr_reg:x3; val_offset:56415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56415*FLEN/8, x4, x1, x2) - -inst_18806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fffc00; valaddr_reg:x3; val_offset:56418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56418*FLEN/8, x4, x1, x2) - -inst_18807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fffe00; valaddr_reg:x3; val_offset:56421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56421*FLEN/8, x4, x1, x2) - -inst_18808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ffff00; valaddr_reg:x3; val_offset:56424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56424*FLEN/8, x4, x1, x2) - -inst_18809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ffff80; valaddr_reg:x3; val_offset:56427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56427*FLEN/8, x4, x1, x2) - -inst_18810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ffffc0; valaddr_reg:x3; val_offset:56430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56430*FLEN/8, x4, x1, x2) - -inst_18811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ffffe0; valaddr_reg:x3; val_offset:56433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56433*FLEN/8, x4, x1, x2) - -inst_18812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fffff0; valaddr_reg:x3; val_offset:56436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56436*FLEN/8, x4, x1, x2) - -inst_18813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fffff8; valaddr_reg:x3; val_offset:56439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56439*FLEN/8, x4, x1, x2) - -inst_18814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fffffc; valaddr_reg:x3; val_offset:56442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56442*FLEN/8, x4, x1, x2) - -inst_18815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86fffffe; valaddr_reg:x3; val_offset:56445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56445*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_148) - -inst_18816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; -op3val:0x86ffffff; valaddr_reg:x3; val_offset:56448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56448*FLEN/8, x4, x1, x2) - -inst_18817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:56451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56451*FLEN/8, x4, x1, x2) - -inst_18818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:56454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56454*FLEN/8, x4, x1, x2) - -inst_18819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:56457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56457*FLEN/8, x4, x1, x2) - -inst_18820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:56460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56460*FLEN/8, x4, x1, x2) - -inst_18821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:56463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56463*FLEN/8, x4, x1, x2) - -inst_18822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:56466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56466*FLEN/8, x4, x1, x2) - -inst_18823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:56469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56469*FLEN/8, x4, x1, x2) - -inst_18824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:56472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56472*FLEN/8, x4, x1, x2) - -inst_18825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:56475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56475*FLEN/8, x4, x1, x2) - -inst_18826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:56478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56478*FLEN/8, x4, x1, x2) - -inst_18827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:56481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56481*FLEN/8, x4, x1, x2) - -inst_18828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:56484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56484*FLEN/8, x4, x1, x2) - -inst_18829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:56487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56487*FLEN/8, x4, x1, x2) - -inst_18830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:56490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56490*FLEN/8, x4, x1, x2) - -inst_18831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:56493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56493*FLEN/8, x4, x1, x2) - -inst_18832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:56496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56496*FLEN/8, x4, x1, x2) - -inst_18833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f800000; valaddr_reg:x3; val_offset:56499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56499*FLEN/8, x4, x1, x2) - -inst_18834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f800001; valaddr_reg:x3; val_offset:56502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56502*FLEN/8, x4, x1, x2) - -inst_18835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f800003; valaddr_reg:x3; val_offset:56505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56505*FLEN/8, x4, x1, x2) - -inst_18836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f800007; valaddr_reg:x3; val_offset:56508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56508*FLEN/8, x4, x1, x2) - -inst_18837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f80000f; valaddr_reg:x3; val_offset:56511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56511*FLEN/8, x4, x1, x2) - -inst_18838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f80001f; valaddr_reg:x3; val_offset:56514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56514*FLEN/8, x4, x1, x2) - -inst_18839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f80003f; valaddr_reg:x3; val_offset:56517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56517*FLEN/8, x4, x1, x2) - -inst_18840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f80007f; valaddr_reg:x3; val_offset:56520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56520*FLEN/8, x4, x1, x2) - -inst_18841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f8000ff; valaddr_reg:x3; val_offset:56523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56523*FLEN/8, x4, x1, x2) - -inst_18842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f8001ff; valaddr_reg:x3; val_offset:56526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56526*FLEN/8, x4, x1, x2) - -inst_18843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f8003ff; valaddr_reg:x3; val_offset:56529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56529*FLEN/8, x4, x1, x2) - -inst_18844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f8007ff; valaddr_reg:x3; val_offset:56532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56532*FLEN/8, x4, x1, x2) - -inst_18845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f800fff; valaddr_reg:x3; val_offset:56535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56535*FLEN/8, x4, x1, x2) - -inst_18846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f801fff; valaddr_reg:x3; val_offset:56538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56538*FLEN/8, x4, x1, x2) - -inst_18847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f803fff; valaddr_reg:x3; val_offset:56541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56541*FLEN/8, x4, x1, x2) - -inst_18848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f807fff; valaddr_reg:x3; val_offset:56544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56544*FLEN/8, x4, x1, x2) - -inst_18849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f80ffff; valaddr_reg:x3; val_offset:56547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56547*FLEN/8, x4, x1, x2) - -inst_18850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f81ffff; valaddr_reg:x3; val_offset:56550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56550*FLEN/8, x4, x1, x2) - -inst_18851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f83ffff; valaddr_reg:x3; val_offset:56553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56553*FLEN/8, x4, x1, x2) - -inst_18852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f87ffff; valaddr_reg:x3; val_offset:56556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56556*FLEN/8, x4, x1, x2) - -inst_18853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f8fffff; valaddr_reg:x3; val_offset:56559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56559*FLEN/8, x4, x1, x2) - -inst_18854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8f9fffff; valaddr_reg:x3; val_offset:56562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56562*FLEN/8, x4, x1, x2) - -inst_18855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fbfffff; valaddr_reg:x3; val_offset:56565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56565*FLEN/8, x4, x1, x2) - -inst_18856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fc00000; valaddr_reg:x3; val_offset:56568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56568*FLEN/8, x4, x1, x2) - -inst_18857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fe00000; valaddr_reg:x3; val_offset:56571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56571*FLEN/8, x4, x1, x2) - -inst_18858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ff00000; valaddr_reg:x3; val_offset:56574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56574*FLEN/8, x4, x1, x2) - -inst_18859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ff80000; valaddr_reg:x3; val_offset:56577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56577*FLEN/8, x4, x1, x2) - -inst_18860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffc0000; valaddr_reg:x3; val_offset:56580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56580*FLEN/8, x4, x1, x2) - -inst_18861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffe0000; valaddr_reg:x3; val_offset:56583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56583*FLEN/8, x4, x1, x2) - -inst_18862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fff0000; valaddr_reg:x3; val_offset:56586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56586*FLEN/8, x4, x1, x2) - -inst_18863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fff8000; valaddr_reg:x3; val_offset:56589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56589*FLEN/8, x4, x1, x2) - -inst_18864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fffc000; valaddr_reg:x3; val_offset:56592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56592*FLEN/8, x4, x1, x2) - -inst_18865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fffe000; valaddr_reg:x3; val_offset:56595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56595*FLEN/8, x4, x1, x2) - -inst_18866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffff000; valaddr_reg:x3; val_offset:56598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56598*FLEN/8, x4, x1, x2) - -inst_18867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffff800; valaddr_reg:x3; val_offset:56601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56601*FLEN/8, x4, x1, x2) - -inst_18868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffffc00; valaddr_reg:x3; val_offset:56604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56604*FLEN/8, x4, x1, x2) - -inst_18869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffffe00; valaddr_reg:x3; val_offset:56607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56607*FLEN/8, x4, x1, x2) - -inst_18870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fffff00; valaddr_reg:x3; val_offset:56610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56610*FLEN/8, x4, x1, x2) - -inst_18871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fffff80; valaddr_reg:x3; val_offset:56613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56613*FLEN/8, x4, x1, x2) - -inst_18872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fffffc0; valaddr_reg:x3; val_offset:56616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56616*FLEN/8, x4, x1, x2) - -inst_18873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fffffe0; valaddr_reg:x3; val_offset:56619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56619*FLEN/8, x4, x1, x2) - -inst_18874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffffff0; valaddr_reg:x3; val_offset:56622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56622*FLEN/8, x4, x1, x2) - -inst_18875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffffff8; valaddr_reg:x3; val_offset:56625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56625*FLEN/8, x4, x1, x2) - -inst_18876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffffffc; valaddr_reg:x3; val_offset:56628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56628*FLEN/8, x4, x1, x2) - -inst_18877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8ffffffe; valaddr_reg:x3; val_offset:56631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56631*FLEN/8, x4, x1, x2) - -inst_18878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; -op3val:0x8fffffff; valaddr_reg:x3; val_offset:56634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56634*FLEN/8, x4, x1, x2) - -inst_18879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:56637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56637*FLEN/8, x4, x1, x2) - -inst_18880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:56640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56640*FLEN/8, x4, x1, x2) - -inst_18881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:56643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56643*FLEN/8, x4, x1, x2) - -inst_18882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:56646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56646*FLEN/8, x4, x1, x2) - -inst_18883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:56649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56649*FLEN/8, x4, x1, x2) - -inst_18884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:56652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56652*FLEN/8, x4, x1, x2) - -inst_18885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:56655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56655*FLEN/8, x4, x1, x2) - -inst_18886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:56658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56658*FLEN/8, x4, x1, x2) - -inst_18887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:56661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56661*FLEN/8, x4, x1, x2) - -inst_18888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:56664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56664*FLEN/8, x4, x1, x2) - -inst_18889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:56667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56667*FLEN/8, x4, x1, x2) - -inst_18890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:56670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56670*FLEN/8, x4, x1, x2) - -inst_18891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:56673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56673*FLEN/8, x4, x1, x2) - -inst_18892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:56676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56676*FLEN/8, x4, x1, x2) - -inst_18893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:56679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56679*FLEN/8, x4, x1, x2) - -inst_18894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:56682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56682*FLEN/8, x4, x1, x2) - -inst_18895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb000000; valaddr_reg:x3; val_offset:56685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56685*FLEN/8, x4, x1, x2) - -inst_18896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb000001; valaddr_reg:x3; val_offset:56688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56688*FLEN/8, x4, x1, x2) - -inst_18897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb000003; valaddr_reg:x3; val_offset:56691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56691*FLEN/8, x4, x1, x2) - -inst_18898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb000007; valaddr_reg:x3; val_offset:56694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56694*FLEN/8, x4, x1, x2) - -inst_18899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb00000f; valaddr_reg:x3; val_offset:56697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56697*FLEN/8, x4, x1, x2) - -inst_18900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb00001f; valaddr_reg:x3; val_offset:56700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56700*FLEN/8, x4, x1, x2) - -inst_18901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb00003f; valaddr_reg:x3; val_offset:56703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56703*FLEN/8, x4, x1, x2) - -inst_18902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb00007f; valaddr_reg:x3; val_offset:56706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56706*FLEN/8, x4, x1, x2) - -inst_18903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb0000ff; valaddr_reg:x3; val_offset:56709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56709*FLEN/8, x4, x1, x2) - -inst_18904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb0001ff; valaddr_reg:x3; val_offset:56712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56712*FLEN/8, x4, x1, x2) - -inst_18905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb0003ff; valaddr_reg:x3; val_offset:56715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56715*FLEN/8, x4, x1, x2) - -inst_18906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb0007ff; valaddr_reg:x3; val_offset:56718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56718*FLEN/8, x4, x1, x2) - -inst_18907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb000fff; valaddr_reg:x3; val_offset:56721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56721*FLEN/8, x4, x1, x2) - -inst_18908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb001fff; valaddr_reg:x3; val_offset:56724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56724*FLEN/8, x4, x1, x2) - -inst_18909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb003fff; valaddr_reg:x3; val_offset:56727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56727*FLEN/8, x4, x1, x2) - -inst_18910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb007fff; valaddr_reg:x3; val_offset:56730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56730*FLEN/8, x4, x1, x2) - -inst_18911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb00ffff; valaddr_reg:x3; val_offset:56733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56733*FLEN/8, x4, x1, x2) - -inst_18912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb01ffff; valaddr_reg:x3; val_offset:56736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56736*FLEN/8, x4, x1, x2) - -inst_18913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb03ffff; valaddr_reg:x3; val_offset:56739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56739*FLEN/8, x4, x1, x2) - -inst_18914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb07ffff; valaddr_reg:x3; val_offset:56742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56742*FLEN/8, x4, x1, x2) - -inst_18915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb0fffff; valaddr_reg:x3; val_offset:56745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56745*FLEN/8, x4, x1, x2) - -inst_18916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb1fffff; valaddr_reg:x3; val_offset:56748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56748*FLEN/8, x4, x1, x2) - -inst_18917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb3fffff; valaddr_reg:x3; val_offset:56751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56751*FLEN/8, x4, x1, x2) - -inst_18918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb400000; valaddr_reg:x3; val_offset:56754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56754*FLEN/8, x4, x1, x2) - -inst_18919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb600000; valaddr_reg:x3; val_offset:56757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56757*FLEN/8, x4, x1, x2) - -inst_18920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb700000; valaddr_reg:x3; val_offset:56760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56760*FLEN/8, x4, x1, x2) - -inst_18921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb780000; valaddr_reg:x3; val_offset:56763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56763*FLEN/8, x4, x1, x2) - -inst_18922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7c0000; valaddr_reg:x3; val_offset:56766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56766*FLEN/8, x4, x1, x2) - -inst_18923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7e0000; valaddr_reg:x3; val_offset:56769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56769*FLEN/8, x4, x1, x2) - -inst_18924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7f0000; valaddr_reg:x3; val_offset:56772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56772*FLEN/8, x4, x1, x2) - -inst_18925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7f8000; valaddr_reg:x3; val_offset:56775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56775*FLEN/8, x4, x1, x2) - -inst_18926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7fc000; valaddr_reg:x3; val_offset:56778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56778*FLEN/8, x4, x1, x2) - -inst_18927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7fe000; valaddr_reg:x3; val_offset:56781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56781*FLEN/8, x4, x1, x2) - -inst_18928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7ff000; valaddr_reg:x3; val_offset:56784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56784*FLEN/8, x4, x1, x2) - -inst_18929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7ff800; valaddr_reg:x3; val_offset:56787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56787*FLEN/8, x4, x1, x2) - -inst_18930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7ffc00; valaddr_reg:x3; val_offset:56790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56790*FLEN/8, x4, x1, x2) - -inst_18931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7ffe00; valaddr_reg:x3; val_offset:56793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56793*FLEN/8, x4, x1, x2) - -inst_18932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7fff00; valaddr_reg:x3; val_offset:56796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56796*FLEN/8, x4, x1, x2) - -inst_18933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7fff80; valaddr_reg:x3; val_offset:56799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56799*FLEN/8, x4, x1, x2) - -inst_18934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7fffc0; valaddr_reg:x3; val_offset:56802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56802*FLEN/8, x4, x1, x2) - -inst_18935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7fffe0; valaddr_reg:x3; val_offset:56805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56805*FLEN/8, x4, x1, x2) - -inst_18936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7ffff0; valaddr_reg:x3; val_offset:56808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56808*FLEN/8, x4, x1, x2) - -inst_18937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7ffff8; valaddr_reg:x3; val_offset:56811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56811*FLEN/8, x4, x1, x2) - -inst_18938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7ffffc; valaddr_reg:x3; val_offset:56814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56814*FLEN/8, x4, x1, x2) - -inst_18939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7ffffe; valaddr_reg:x3; val_offset:56817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56817*FLEN/8, x4, x1, x2) - -inst_18940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; -op3val:0xb7fffff; valaddr_reg:x3; val_offset:56820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56820*FLEN/8, x4, x1, x2) - -inst_18941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:56823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56823*FLEN/8, x4, x1, x2) - -inst_18942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:56826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56826*FLEN/8, x4, x1, x2) - -inst_18943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:56829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56829*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_149) - -inst_18944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:56832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56832*FLEN/8, x4, x1, x2) - -inst_18945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:56835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56835*FLEN/8, x4, x1, x2) - -inst_18946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:56838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56838*FLEN/8, x4, x1, x2) - -inst_18947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:56841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56841*FLEN/8, x4, x1, x2) - -inst_18948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:56844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56844*FLEN/8, x4, x1, x2) - -inst_18949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:56847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56847*FLEN/8, x4, x1, x2) - -inst_18950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:56850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56850*FLEN/8, x4, x1, x2) - -inst_18951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:56853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56853*FLEN/8, x4, x1, x2) - -inst_18952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:56856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56856*FLEN/8, x4, x1, x2) - -inst_18953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:56859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56859*FLEN/8, x4, x1, x2) - -inst_18954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:56862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56862*FLEN/8, x4, x1, x2) - -inst_18955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:56865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56865*FLEN/8, x4, x1, x2) - -inst_18956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:56868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56868*FLEN/8, x4, x1, x2) - -inst_18957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1000000; valaddr_reg:x3; val_offset:56871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56871*FLEN/8, x4, x1, x2) - -inst_18958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1000001; valaddr_reg:x3; val_offset:56874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56874*FLEN/8, x4, x1, x2) - -inst_18959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1000003; valaddr_reg:x3; val_offset:56877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56877*FLEN/8, x4, x1, x2) - -inst_18960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1000007; valaddr_reg:x3; val_offset:56880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56880*FLEN/8, x4, x1, x2) - -inst_18961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x100000f; valaddr_reg:x3; val_offset:56883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56883*FLEN/8, x4, x1, x2) - -inst_18962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x100001f; valaddr_reg:x3; val_offset:56886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56886*FLEN/8, x4, x1, x2) - -inst_18963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x100003f; valaddr_reg:x3; val_offset:56889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56889*FLEN/8, x4, x1, x2) - -inst_18964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x100007f; valaddr_reg:x3; val_offset:56892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56892*FLEN/8, x4, x1, x2) - -inst_18965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x10000ff; valaddr_reg:x3; val_offset:56895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56895*FLEN/8, x4, x1, x2) - -inst_18966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x10001ff; valaddr_reg:x3; val_offset:56898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56898*FLEN/8, x4, x1, x2) - -inst_18967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x10003ff; valaddr_reg:x3; val_offset:56901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56901*FLEN/8, x4, x1, x2) - -inst_18968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x10007ff; valaddr_reg:x3; val_offset:56904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56904*FLEN/8, x4, x1, x2) - -inst_18969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1000fff; valaddr_reg:x3; val_offset:56907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56907*FLEN/8, x4, x1, x2) - -inst_18970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1001fff; valaddr_reg:x3; val_offset:56910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56910*FLEN/8, x4, x1, x2) - -inst_18971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1003fff; valaddr_reg:x3; val_offset:56913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56913*FLEN/8, x4, x1, x2) - -inst_18972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1007fff; valaddr_reg:x3; val_offset:56916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56916*FLEN/8, x4, x1, x2) - -inst_18973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x100ffff; valaddr_reg:x3; val_offset:56919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56919*FLEN/8, x4, x1, x2) - -inst_18974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x101ffff; valaddr_reg:x3; val_offset:56922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56922*FLEN/8, x4, x1, x2) - -inst_18975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x103ffff; valaddr_reg:x3; val_offset:56925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56925*FLEN/8, x4, x1, x2) - -inst_18976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x107ffff; valaddr_reg:x3; val_offset:56928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56928*FLEN/8, x4, x1, x2) - -inst_18977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x10fffff; valaddr_reg:x3; val_offset:56931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56931*FLEN/8, x4, x1, x2) - -inst_18978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x11fffff; valaddr_reg:x3; val_offset:56934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56934*FLEN/8, x4, x1, x2) - -inst_18979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x13fffff; valaddr_reg:x3; val_offset:56937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56937*FLEN/8, x4, x1, x2) - -inst_18980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1400000; valaddr_reg:x3; val_offset:56940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56940*FLEN/8, x4, x1, x2) - -inst_18981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1600000; valaddr_reg:x3; val_offset:56943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56943*FLEN/8, x4, x1, x2) - -inst_18982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1700000; valaddr_reg:x3; val_offset:56946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56946*FLEN/8, x4, x1, x2) - -inst_18983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x1780000; valaddr_reg:x3; val_offset:56949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56949*FLEN/8, x4, x1, x2) - -inst_18984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17c0000; valaddr_reg:x3; val_offset:56952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56952*FLEN/8, x4, x1, x2) - -inst_18985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17e0000; valaddr_reg:x3; val_offset:56955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56955*FLEN/8, x4, x1, x2) - -inst_18986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17f0000; valaddr_reg:x3; val_offset:56958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56958*FLEN/8, x4, x1, x2) - -inst_18987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17f8000; valaddr_reg:x3; val_offset:56961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56961*FLEN/8, x4, x1, x2) - -inst_18988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17fc000; valaddr_reg:x3; val_offset:56964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56964*FLEN/8, x4, x1, x2) - -inst_18989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17fe000; valaddr_reg:x3; val_offset:56967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56967*FLEN/8, x4, x1, x2) - -inst_18990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17ff000; valaddr_reg:x3; val_offset:56970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56970*FLEN/8, x4, x1, x2) - -inst_18991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17ff800; valaddr_reg:x3; val_offset:56973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56973*FLEN/8, x4, x1, x2) - -inst_18992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17ffc00; valaddr_reg:x3; val_offset:56976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56976*FLEN/8, x4, x1, x2) - -inst_18993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17ffe00; valaddr_reg:x3; val_offset:56979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56979*FLEN/8, x4, x1, x2) - -inst_18994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17fff00; valaddr_reg:x3; val_offset:56982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56982*FLEN/8, x4, x1, x2) - -inst_18995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17fff80; valaddr_reg:x3; val_offset:56985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56985*FLEN/8, x4, x1, x2) - -inst_18996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17fffc0; valaddr_reg:x3; val_offset:56988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56988*FLEN/8, x4, x1, x2) - -inst_18997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17fffe0; valaddr_reg:x3; val_offset:56991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56991*FLEN/8, x4, x1, x2) - -inst_18998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17ffff0; valaddr_reg:x3; val_offset:56994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56994*FLEN/8, x4, x1, x2) - -inst_18999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17ffff8; valaddr_reg:x3; val_offset:56997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56997*FLEN/8, x4, x1, x2) - -inst_19000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17ffffc; valaddr_reg:x3; val_offset:57000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57000*FLEN/8, x4, x1, x2) - -inst_19001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17ffffe; valaddr_reg:x3; val_offset:57003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57003*FLEN/8, x4, x1, x2) - -inst_19002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; -op3val:0x17fffff; valaddr_reg:x3; val_offset:57006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57006*FLEN/8, x4, x1, x2) - -inst_19003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28000000; valaddr_reg:x3; val_offset:57009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57009*FLEN/8, x4, x1, x2) - -inst_19004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28000001; valaddr_reg:x3; val_offset:57012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57012*FLEN/8, x4, x1, x2) - -inst_19005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28000003; valaddr_reg:x3; val_offset:57015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57015*FLEN/8, x4, x1, x2) - -inst_19006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28000007; valaddr_reg:x3; val_offset:57018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57018*FLEN/8, x4, x1, x2) - -inst_19007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x2800000f; valaddr_reg:x3; val_offset:57021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57021*FLEN/8, x4, x1, x2) - -inst_19008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x2800001f; valaddr_reg:x3; val_offset:57024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57024*FLEN/8, x4, x1, x2) - -inst_19009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x2800003f; valaddr_reg:x3; val_offset:57027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57027*FLEN/8, x4, x1, x2) - -inst_19010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x2800007f; valaddr_reg:x3; val_offset:57030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57030*FLEN/8, x4, x1, x2) - -inst_19011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x280000ff; valaddr_reg:x3; val_offset:57033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57033*FLEN/8, x4, x1, x2) - -inst_19012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x280001ff; valaddr_reg:x3; val_offset:57036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57036*FLEN/8, x4, x1, x2) - -inst_19013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x280003ff; valaddr_reg:x3; val_offset:57039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57039*FLEN/8, x4, x1, x2) - -inst_19014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x280007ff; valaddr_reg:x3; val_offset:57042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57042*FLEN/8, x4, x1, x2) - -inst_19015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28000fff; valaddr_reg:x3; val_offset:57045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57045*FLEN/8, x4, x1, x2) - -inst_19016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28001fff; valaddr_reg:x3; val_offset:57048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57048*FLEN/8, x4, x1, x2) - -inst_19017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28003fff; valaddr_reg:x3; val_offset:57051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57051*FLEN/8, x4, x1, x2) - -inst_19018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28007fff; valaddr_reg:x3; val_offset:57054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57054*FLEN/8, x4, x1, x2) - -inst_19019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x2800ffff; valaddr_reg:x3; val_offset:57057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57057*FLEN/8, x4, x1, x2) - -inst_19020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x2801ffff; valaddr_reg:x3; val_offset:57060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57060*FLEN/8, x4, x1, x2) - -inst_19021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x2803ffff; valaddr_reg:x3; val_offset:57063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57063*FLEN/8, x4, x1, x2) - -inst_19022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x2807ffff; valaddr_reg:x3; val_offset:57066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57066*FLEN/8, x4, x1, x2) - -inst_19023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x280fffff; valaddr_reg:x3; val_offset:57069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57069*FLEN/8, x4, x1, x2) - -inst_19024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x281fffff; valaddr_reg:x3; val_offset:57072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57072*FLEN/8, x4, x1, x2) - -inst_19025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x283fffff; valaddr_reg:x3; val_offset:57075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57075*FLEN/8, x4, x1, x2) - -inst_19026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28400000; valaddr_reg:x3; val_offset:57078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57078*FLEN/8, x4, x1, x2) - -inst_19027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28600000; valaddr_reg:x3; val_offset:57081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57081*FLEN/8, x4, x1, x2) - -inst_19028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28700000; valaddr_reg:x3; val_offset:57084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57084*FLEN/8, x4, x1, x2) - -inst_19029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x28780000; valaddr_reg:x3; val_offset:57087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57087*FLEN/8, x4, x1, x2) - -inst_19030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287c0000; valaddr_reg:x3; val_offset:57090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57090*FLEN/8, x4, x1, x2) - -inst_19031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287e0000; valaddr_reg:x3; val_offset:57093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57093*FLEN/8, x4, x1, x2) - -inst_19032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287f0000; valaddr_reg:x3; val_offset:57096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57096*FLEN/8, x4, x1, x2) - -inst_19033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287f8000; valaddr_reg:x3; val_offset:57099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57099*FLEN/8, x4, x1, x2) - -inst_19034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287fc000; valaddr_reg:x3; val_offset:57102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57102*FLEN/8, x4, x1, x2) - -inst_19035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287fe000; valaddr_reg:x3; val_offset:57105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57105*FLEN/8, x4, x1, x2) - -inst_19036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287ff000; valaddr_reg:x3; val_offset:57108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57108*FLEN/8, x4, x1, x2) - -inst_19037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287ff800; valaddr_reg:x3; val_offset:57111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57111*FLEN/8, x4, x1, x2) - -inst_19038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287ffc00; valaddr_reg:x3; val_offset:57114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57114*FLEN/8, x4, x1, x2) - -inst_19039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287ffe00; valaddr_reg:x3; val_offset:57117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57117*FLEN/8, x4, x1, x2) - -inst_19040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287fff00; valaddr_reg:x3; val_offset:57120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57120*FLEN/8, x4, x1, x2) - -inst_19041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287fff80; valaddr_reg:x3; val_offset:57123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57123*FLEN/8, x4, x1, x2) - -inst_19042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287fffc0; valaddr_reg:x3; val_offset:57126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57126*FLEN/8, x4, x1, x2) - -inst_19043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287fffe0; valaddr_reg:x3; val_offset:57129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57129*FLEN/8, x4, x1, x2) - -inst_19044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287ffff0; valaddr_reg:x3; val_offset:57132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57132*FLEN/8, x4, x1, x2) - -inst_19045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287ffff8; valaddr_reg:x3; val_offset:57135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57135*FLEN/8, x4, x1, x2) - -inst_19046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287ffffc; valaddr_reg:x3; val_offset:57138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57138*FLEN/8, x4, x1, x2) - -inst_19047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287ffffe; valaddr_reg:x3; val_offset:57141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57141*FLEN/8, x4, x1, x2) - -inst_19048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x287fffff; valaddr_reg:x3; val_offset:57144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57144*FLEN/8, x4, x1, x2) - -inst_19049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3f800001; valaddr_reg:x3; val_offset:57147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57147*FLEN/8, x4, x1, x2) - -inst_19050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3f800003; valaddr_reg:x3; val_offset:57150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57150*FLEN/8, x4, x1, x2) - -inst_19051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3f800007; valaddr_reg:x3; val_offset:57153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57153*FLEN/8, x4, x1, x2) - -inst_19052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3f999999; valaddr_reg:x3; val_offset:57156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57156*FLEN/8, x4, x1, x2) - -inst_19053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:57159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57159*FLEN/8, x4, x1, x2) - -inst_19054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:57162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57162*FLEN/8, x4, x1, x2) - -inst_19055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:57165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57165*FLEN/8, x4, x1, x2) - -inst_19056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:57168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57168*FLEN/8, x4, x1, x2) - -inst_19057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:57171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57171*FLEN/8, x4, x1, x2) - -inst_19058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:57174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57174*FLEN/8, x4, x1, x2) - -inst_19059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:57177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57177*FLEN/8, x4, x1, x2) - -inst_19060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:57180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57180*FLEN/8, x4, x1, x2) - -inst_19061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:57183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57183*FLEN/8, x4, x1, x2) - -inst_19062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:57186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57186*FLEN/8, x4, x1, x2) - -inst_19063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:57189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57189*FLEN/8, x4, x1, x2) - -inst_19064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:57192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57192*FLEN/8, x4, x1, x2) - -inst_19065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:57195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57195*FLEN/8, x4, x1, x2) - -inst_19066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:57198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57198*FLEN/8, x4, x1, x2) - -inst_19067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:57201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57201*FLEN/8, x4, x1, x2) - -inst_19068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:57204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57204*FLEN/8, x4, x1, x2) - -inst_19069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:57207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57207*FLEN/8, x4, x1, x2) - -inst_19070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:57210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57210*FLEN/8, x4, x1, x2) - -inst_19071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:57213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57213*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_150) - -inst_19072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:57216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57216*FLEN/8, x4, x1, x2) - -inst_19073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:57219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57219*FLEN/8, x4, x1, x2) - -inst_19074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:57222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57222*FLEN/8, x4, x1, x2) - -inst_19075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:57225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57225*FLEN/8, x4, x1, x2) - -inst_19076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:57228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57228*FLEN/8, x4, x1, x2) - -inst_19077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:57231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57231*FLEN/8, x4, x1, x2) - -inst_19078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:57234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57234*FLEN/8, x4, x1, x2) - -inst_19079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:57237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57237*FLEN/8, x4, x1, x2) - -inst_19080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:57240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57240*FLEN/8, x4, x1, x2) - -inst_19081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c000000; valaddr_reg:x3; val_offset:57243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57243*FLEN/8, x4, x1, x2) - -inst_19082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c000001; valaddr_reg:x3; val_offset:57246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57246*FLEN/8, x4, x1, x2) - -inst_19083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c000003; valaddr_reg:x3; val_offset:57249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57249*FLEN/8, x4, x1, x2) - -inst_19084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c000007; valaddr_reg:x3; val_offset:57252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57252*FLEN/8, x4, x1, x2) - -inst_19085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c00000f; valaddr_reg:x3; val_offset:57255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57255*FLEN/8, x4, x1, x2) - -inst_19086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c00001f; valaddr_reg:x3; val_offset:57258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57258*FLEN/8, x4, x1, x2) - -inst_19087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c00003f; valaddr_reg:x3; val_offset:57261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57261*FLEN/8, x4, x1, x2) - -inst_19088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c00007f; valaddr_reg:x3; val_offset:57264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57264*FLEN/8, x4, x1, x2) - -inst_19089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c0000ff; valaddr_reg:x3; val_offset:57267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57267*FLEN/8, x4, x1, x2) - -inst_19090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c0001ff; valaddr_reg:x3; val_offset:57270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57270*FLEN/8, x4, x1, x2) - -inst_19091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c0003ff; valaddr_reg:x3; val_offset:57273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57273*FLEN/8, x4, x1, x2) - -inst_19092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c0007ff; valaddr_reg:x3; val_offset:57276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57276*FLEN/8, x4, x1, x2) - -inst_19093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c000fff; valaddr_reg:x3; val_offset:57279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57279*FLEN/8, x4, x1, x2) - -inst_19094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c001fff; valaddr_reg:x3; val_offset:57282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57282*FLEN/8, x4, x1, x2) - -inst_19095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c003fff; valaddr_reg:x3; val_offset:57285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57285*FLEN/8, x4, x1, x2) - -inst_19096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c007fff; valaddr_reg:x3; val_offset:57288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57288*FLEN/8, x4, x1, x2) - -inst_19097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c00ffff; valaddr_reg:x3; val_offset:57291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57291*FLEN/8, x4, x1, x2) - -inst_19098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c01ffff; valaddr_reg:x3; val_offset:57294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57294*FLEN/8, x4, x1, x2) - -inst_19099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c03ffff; valaddr_reg:x3; val_offset:57297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57297*FLEN/8, x4, x1, x2) - -inst_19100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c07ffff; valaddr_reg:x3; val_offset:57300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57300*FLEN/8, x4, x1, x2) - -inst_19101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c0fffff; valaddr_reg:x3; val_offset:57303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57303*FLEN/8, x4, x1, x2) - -inst_19102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c1fffff; valaddr_reg:x3; val_offset:57306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57306*FLEN/8, x4, x1, x2) - -inst_19103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c3fffff; valaddr_reg:x3; val_offset:57309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57309*FLEN/8, x4, x1, x2) - -inst_19104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c400000; valaddr_reg:x3; val_offset:57312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57312*FLEN/8, x4, x1, x2) - -inst_19105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c600000; valaddr_reg:x3; val_offset:57315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57315*FLEN/8, x4, x1, x2) - -inst_19106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c700000; valaddr_reg:x3; val_offset:57318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57318*FLEN/8, x4, x1, x2) - -inst_19107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c780000; valaddr_reg:x3; val_offset:57321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57321*FLEN/8, x4, x1, x2) - -inst_19108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7c0000; valaddr_reg:x3; val_offset:57324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57324*FLEN/8, x4, x1, x2) - -inst_19109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7e0000; valaddr_reg:x3; val_offset:57327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57327*FLEN/8, x4, x1, x2) - -inst_19110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7f0000; valaddr_reg:x3; val_offset:57330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57330*FLEN/8, x4, x1, x2) - -inst_19111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7f8000; valaddr_reg:x3; val_offset:57333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57333*FLEN/8, x4, x1, x2) - -inst_19112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7fc000; valaddr_reg:x3; val_offset:57336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57336*FLEN/8, x4, x1, x2) - -inst_19113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7fe000; valaddr_reg:x3; val_offset:57339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57339*FLEN/8, x4, x1, x2) - -inst_19114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7ff000; valaddr_reg:x3; val_offset:57342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57342*FLEN/8, x4, x1, x2) - -inst_19115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7ff800; valaddr_reg:x3; val_offset:57345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57345*FLEN/8, x4, x1, x2) - -inst_19116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7ffc00; valaddr_reg:x3; val_offset:57348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57348*FLEN/8, x4, x1, x2) - -inst_19117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7ffe00; valaddr_reg:x3; val_offset:57351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57351*FLEN/8, x4, x1, x2) - -inst_19118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7fff00; valaddr_reg:x3; val_offset:57354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57354*FLEN/8, x4, x1, x2) - -inst_19119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7fff80; valaddr_reg:x3; val_offset:57357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57357*FLEN/8, x4, x1, x2) - -inst_19120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7fffc0; valaddr_reg:x3; val_offset:57360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57360*FLEN/8, x4, x1, x2) - -inst_19121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7fffe0; valaddr_reg:x3; val_offset:57363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57363*FLEN/8, x4, x1, x2) - -inst_19122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7ffff0; valaddr_reg:x3; val_offset:57366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57366*FLEN/8, x4, x1, x2) - -inst_19123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7ffff8; valaddr_reg:x3; val_offset:57369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57369*FLEN/8, x4, x1, x2) - -inst_19124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7ffffc; valaddr_reg:x3; val_offset:57372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57372*FLEN/8, x4, x1, x2) - -inst_19125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7ffffe; valaddr_reg:x3; val_offset:57375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57375*FLEN/8, x4, x1, x2) - -inst_19126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; -op3val:0x8c7fffff; valaddr_reg:x3; val_offset:57378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57378*FLEN/8, x4, x1, x2) - -inst_19127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:57381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57381*FLEN/8, x4, x1, x2) - -inst_19128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:57384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57384*FLEN/8, x4, x1, x2) - -inst_19129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:57387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57387*FLEN/8, x4, x1, x2) - -inst_19130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:57390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57390*FLEN/8, x4, x1, x2) - -inst_19131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:57393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57393*FLEN/8, x4, x1, x2) - -inst_19132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:57396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57396*FLEN/8, x4, x1, x2) - -inst_19133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:57399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57399*FLEN/8, x4, x1, x2) - -inst_19134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:57402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57402*FLEN/8, x4, x1, x2) - -inst_19135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:57405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57405*FLEN/8, x4, x1, x2) - -inst_19136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:57408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57408*FLEN/8, x4, x1, x2) - -inst_19137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:57411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57411*FLEN/8, x4, x1, x2) - -inst_19138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:57414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57414*FLEN/8, x4, x1, x2) - -inst_19139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:57417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57417*FLEN/8, x4, x1, x2) - -inst_19140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:57420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57420*FLEN/8, x4, x1, x2) - -inst_19141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:57423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57423*FLEN/8, x4, x1, x2) - -inst_19142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:57426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57426*FLEN/8, x4, x1, x2) - -inst_19143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81800000; valaddr_reg:x3; val_offset:57429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57429*FLEN/8, x4, x1, x2) - -inst_19144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81800001; valaddr_reg:x3; val_offset:57432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57432*FLEN/8, x4, x1, x2) - -inst_19145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81800003; valaddr_reg:x3; val_offset:57435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57435*FLEN/8, x4, x1, x2) - -inst_19146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81800007; valaddr_reg:x3; val_offset:57438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57438*FLEN/8, x4, x1, x2) - -inst_19147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8180000f; valaddr_reg:x3; val_offset:57441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57441*FLEN/8, x4, x1, x2) - -inst_19148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8180001f; valaddr_reg:x3; val_offset:57444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57444*FLEN/8, x4, x1, x2) - -inst_19149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8180003f; valaddr_reg:x3; val_offset:57447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57447*FLEN/8, x4, x1, x2) - -inst_19150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8180007f; valaddr_reg:x3; val_offset:57450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57450*FLEN/8, x4, x1, x2) - -inst_19151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x818000ff; valaddr_reg:x3; val_offset:57453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57453*FLEN/8, x4, x1, x2) - -inst_19152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x818001ff; valaddr_reg:x3; val_offset:57456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57456*FLEN/8, x4, x1, x2) - -inst_19153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x818003ff; valaddr_reg:x3; val_offset:57459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57459*FLEN/8, x4, x1, x2) - -inst_19154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x818007ff; valaddr_reg:x3; val_offset:57462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57462*FLEN/8, x4, x1, x2) - -inst_19155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81800fff; valaddr_reg:x3; val_offset:57465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57465*FLEN/8, x4, x1, x2) - -inst_19156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81801fff; valaddr_reg:x3; val_offset:57468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57468*FLEN/8, x4, x1, x2) - -inst_19157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81803fff; valaddr_reg:x3; val_offset:57471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57471*FLEN/8, x4, x1, x2) - -inst_19158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81807fff; valaddr_reg:x3; val_offset:57474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57474*FLEN/8, x4, x1, x2) - -inst_19159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8180ffff; valaddr_reg:x3; val_offset:57477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57477*FLEN/8, x4, x1, x2) - -inst_19160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8181ffff; valaddr_reg:x3; val_offset:57480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57480*FLEN/8, x4, x1, x2) - -inst_19161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8183ffff; valaddr_reg:x3; val_offset:57483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57483*FLEN/8, x4, x1, x2) - -inst_19162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x8187ffff; valaddr_reg:x3; val_offset:57486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57486*FLEN/8, x4, x1, x2) - -inst_19163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x818fffff; valaddr_reg:x3; val_offset:57489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57489*FLEN/8, x4, x1, x2) - -inst_19164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x819fffff; valaddr_reg:x3; val_offset:57492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57492*FLEN/8, x4, x1, x2) - -inst_19165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81bfffff; valaddr_reg:x3; val_offset:57495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57495*FLEN/8, x4, x1, x2) - -inst_19166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81c00000; valaddr_reg:x3; val_offset:57498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57498*FLEN/8, x4, x1, x2) - -inst_19167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81e00000; valaddr_reg:x3; val_offset:57501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57501*FLEN/8, x4, x1, x2) - -inst_19168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81f00000; valaddr_reg:x3; val_offset:57504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57504*FLEN/8, x4, x1, x2) - -inst_19169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81f80000; valaddr_reg:x3; val_offset:57507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57507*FLEN/8, x4, x1, x2) - -inst_19170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fc0000; valaddr_reg:x3; val_offset:57510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57510*FLEN/8, x4, x1, x2) - -inst_19171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fe0000; valaddr_reg:x3; val_offset:57513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57513*FLEN/8, x4, x1, x2) - -inst_19172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ff0000; valaddr_reg:x3; val_offset:57516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57516*FLEN/8, x4, x1, x2) - -inst_19173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ff8000; valaddr_reg:x3; val_offset:57519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57519*FLEN/8, x4, x1, x2) - -inst_19174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ffc000; valaddr_reg:x3; val_offset:57522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57522*FLEN/8, x4, x1, x2) - -inst_19175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ffe000; valaddr_reg:x3; val_offset:57525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57525*FLEN/8, x4, x1, x2) - -inst_19176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fff000; valaddr_reg:x3; val_offset:57528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57528*FLEN/8, x4, x1, x2) - -inst_19177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fff800; valaddr_reg:x3; val_offset:57531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57531*FLEN/8, x4, x1, x2) - -inst_19178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fffc00; valaddr_reg:x3; val_offset:57534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57534*FLEN/8, x4, x1, x2) - -inst_19179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fffe00; valaddr_reg:x3; val_offset:57537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57537*FLEN/8, x4, x1, x2) - -inst_19180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ffff00; valaddr_reg:x3; val_offset:57540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57540*FLEN/8, x4, x1, x2) - -inst_19181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ffff80; valaddr_reg:x3; val_offset:57543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57543*FLEN/8, x4, x1, x2) - -inst_19182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ffffc0; valaddr_reg:x3; val_offset:57546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57546*FLEN/8, x4, x1, x2) - -inst_19183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ffffe0; valaddr_reg:x3; val_offset:57549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57549*FLEN/8, x4, x1, x2) - -inst_19184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fffff0; valaddr_reg:x3; val_offset:57552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57552*FLEN/8, x4, x1, x2) - -inst_19185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fffff8; valaddr_reg:x3; val_offset:57555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57555*FLEN/8, x4, x1, x2) - -inst_19186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fffffc; valaddr_reg:x3; val_offset:57558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57558*FLEN/8, x4, x1, x2) - -inst_19187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81fffffe; valaddr_reg:x3; val_offset:57561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57561*FLEN/8, x4, x1, x2) - -inst_19188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; -op3val:0x81ffffff; valaddr_reg:x3; val_offset:57564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57564*FLEN/8, x4, x1, x2) - -inst_19189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbf800001; valaddr_reg:x3; val_offset:57567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57567*FLEN/8, x4, x1, x2) - -inst_19190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbf800003; valaddr_reg:x3; val_offset:57570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57570*FLEN/8, x4, x1, x2) - -inst_19191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbf800007; valaddr_reg:x3; val_offset:57573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57573*FLEN/8, x4, x1, x2) - -inst_19192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbf999999; valaddr_reg:x3; val_offset:57576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57576*FLEN/8, x4, x1, x2) - -inst_19193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:57579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57579*FLEN/8, x4, x1, x2) - -inst_19194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:57582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57582*FLEN/8, x4, x1, x2) - -inst_19195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:57585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57585*FLEN/8, x4, x1, x2) - -inst_19196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:57588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57588*FLEN/8, x4, x1, x2) - -inst_19197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:57591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57591*FLEN/8, x4, x1, x2) - -inst_19198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:57594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57594*FLEN/8, x4, x1, x2) - -inst_19199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:57597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57597*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_151) - -inst_19200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:57600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57600*FLEN/8, x4, x1, x2) - -inst_19201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:57603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57603*FLEN/8, x4, x1, x2) - -inst_19202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:57606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57606*FLEN/8, x4, x1, x2) - -inst_19203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:57609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57609*FLEN/8, x4, x1, x2) - -inst_19204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:57612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57612*FLEN/8, x4, x1, x2) - -inst_19205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8800000; valaddr_reg:x3; val_offset:57615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57615*FLEN/8, x4, x1, x2) - -inst_19206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8800001; valaddr_reg:x3; val_offset:57618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57618*FLEN/8, x4, x1, x2) - -inst_19207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8800003; valaddr_reg:x3; val_offset:57621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57621*FLEN/8, x4, x1, x2) - -inst_19208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8800007; valaddr_reg:x3; val_offset:57624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57624*FLEN/8, x4, x1, x2) - -inst_19209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc880000f; valaddr_reg:x3; val_offset:57627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57627*FLEN/8, x4, x1, x2) - -inst_19210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc880001f; valaddr_reg:x3; val_offset:57630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57630*FLEN/8, x4, x1, x2) - -inst_19211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc880003f; valaddr_reg:x3; val_offset:57633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57633*FLEN/8, x4, x1, x2) - -inst_19212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc880007f; valaddr_reg:x3; val_offset:57636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57636*FLEN/8, x4, x1, x2) - -inst_19213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc88000ff; valaddr_reg:x3; val_offset:57639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57639*FLEN/8, x4, x1, x2) - -inst_19214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc88001ff; valaddr_reg:x3; val_offset:57642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57642*FLEN/8, x4, x1, x2) - -inst_19215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc88003ff; valaddr_reg:x3; val_offset:57645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57645*FLEN/8, x4, x1, x2) - -inst_19216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc88007ff; valaddr_reg:x3; val_offset:57648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57648*FLEN/8, x4, x1, x2) - -inst_19217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8800fff; valaddr_reg:x3; val_offset:57651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57651*FLEN/8, x4, x1, x2) - -inst_19218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8801fff; valaddr_reg:x3; val_offset:57654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57654*FLEN/8, x4, x1, x2) - -inst_19219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8803fff; valaddr_reg:x3; val_offset:57657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57657*FLEN/8, x4, x1, x2) - -inst_19220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8807fff; valaddr_reg:x3; val_offset:57660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57660*FLEN/8, x4, x1, x2) - -inst_19221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc880ffff; valaddr_reg:x3; val_offset:57663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57663*FLEN/8, x4, x1, x2) - -inst_19222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc881ffff; valaddr_reg:x3; val_offset:57666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57666*FLEN/8, x4, x1, x2) - -inst_19223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc883ffff; valaddr_reg:x3; val_offset:57669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57669*FLEN/8, x4, x1, x2) - -inst_19224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc887ffff; valaddr_reg:x3; val_offset:57672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57672*FLEN/8, x4, x1, x2) - -inst_19225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc88fffff; valaddr_reg:x3; val_offset:57675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57675*FLEN/8, x4, x1, x2) - -inst_19226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc89fffff; valaddr_reg:x3; val_offset:57678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57678*FLEN/8, x4, x1, x2) - -inst_19227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8bfffff; valaddr_reg:x3; val_offset:57681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57681*FLEN/8, x4, x1, x2) - -inst_19228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8c00000; valaddr_reg:x3; val_offset:57684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57684*FLEN/8, x4, x1, x2) - -inst_19229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8e00000; valaddr_reg:x3; val_offset:57687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57687*FLEN/8, x4, x1, x2) - -inst_19230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8f00000; valaddr_reg:x3; val_offset:57690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57690*FLEN/8, x4, x1, x2) - -inst_19231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8f80000; valaddr_reg:x3; val_offset:57693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57693*FLEN/8, x4, x1, x2) - -inst_19232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fc0000; valaddr_reg:x3; val_offset:57696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57696*FLEN/8, x4, x1, x2) - -inst_19233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fe0000; valaddr_reg:x3; val_offset:57699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57699*FLEN/8, x4, x1, x2) - -inst_19234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ff0000; valaddr_reg:x3; val_offset:57702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57702*FLEN/8, x4, x1, x2) - -inst_19235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ff8000; valaddr_reg:x3; val_offset:57705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57705*FLEN/8, x4, x1, x2) - -inst_19236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ffc000; valaddr_reg:x3; val_offset:57708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57708*FLEN/8, x4, x1, x2) - -inst_19237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ffe000; valaddr_reg:x3; val_offset:57711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57711*FLEN/8, x4, x1, x2) - -inst_19238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fff000; valaddr_reg:x3; val_offset:57714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57714*FLEN/8, x4, x1, x2) - -inst_19239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fff800; valaddr_reg:x3; val_offset:57717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57717*FLEN/8, x4, x1, x2) - -inst_19240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fffc00; valaddr_reg:x3; val_offset:57720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57720*FLEN/8, x4, x1, x2) - -inst_19241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fffe00; valaddr_reg:x3; val_offset:57723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57723*FLEN/8, x4, x1, x2) - -inst_19242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ffff00; valaddr_reg:x3; val_offset:57726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57726*FLEN/8, x4, x1, x2) - -inst_19243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ffff80; valaddr_reg:x3; val_offset:57729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57729*FLEN/8, x4, x1, x2) - -inst_19244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ffffc0; valaddr_reg:x3; val_offset:57732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57732*FLEN/8, x4, x1, x2) - -inst_19245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ffffe0; valaddr_reg:x3; val_offset:57735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57735*FLEN/8, x4, x1, x2) - -inst_19246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fffff0; valaddr_reg:x3; val_offset:57738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57738*FLEN/8, x4, x1, x2) - -inst_19247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fffff8; valaddr_reg:x3; val_offset:57741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57741*FLEN/8, x4, x1, x2) - -inst_19248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fffffc; valaddr_reg:x3; val_offset:57744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57744*FLEN/8, x4, x1, x2) - -inst_19249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8fffffe; valaddr_reg:x3; val_offset:57747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57747*FLEN/8, x4, x1, x2) - -inst_19250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; -op3val:0xc8ffffff; valaddr_reg:x3; val_offset:57750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57750*FLEN/8, x4, x1, x2) - -inst_19251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x0; valaddr_reg:x3; val_offset:57753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57753*FLEN/8, x4, x1, x2) - -inst_19252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:57756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57756*FLEN/8, x4, x1, x2) - -inst_19253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:57759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57759*FLEN/8, x4, x1, x2) - -inst_19254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:57762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57762*FLEN/8, x4, x1, x2) - -inst_19255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0xf; valaddr_reg:x3; val_offset:57765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57765*FLEN/8, x4, x1, x2) - -inst_19256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x1f; valaddr_reg:x3; val_offset:57768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57768*FLEN/8, x4, x1, x2) - -inst_19257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x3f; valaddr_reg:x3; val_offset:57771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57771*FLEN/8, x4, x1, x2) - -inst_19258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7f; valaddr_reg:x3; val_offset:57774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57774*FLEN/8, x4, x1, x2) - -inst_19259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0xff; valaddr_reg:x3; val_offset:57777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57777*FLEN/8, x4, x1, x2) - -inst_19260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x1ff; valaddr_reg:x3; val_offset:57780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57780*FLEN/8, x4, x1, x2) - -inst_19261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x3ff; valaddr_reg:x3; val_offset:57783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57783*FLEN/8, x4, x1, x2) - -inst_19262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ff; valaddr_reg:x3; val_offset:57786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57786*FLEN/8, x4, x1, x2) - -inst_19263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0xfff; valaddr_reg:x3; val_offset:57789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57789*FLEN/8, x4, x1, x2) - -inst_19264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x1fff; valaddr_reg:x3; val_offset:57792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57792*FLEN/8, x4, x1, x2) - -inst_19265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x3fff; valaddr_reg:x3; val_offset:57795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57795*FLEN/8, x4, x1, x2) - -inst_19266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7fff; valaddr_reg:x3; val_offset:57798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57798*FLEN/8, x4, x1, x2) - -inst_19267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0xffff; valaddr_reg:x3; val_offset:57801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57801*FLEN/8, x4, x1, x2) - -inst_19268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x1ffff; valaddr_reg:x3; val_offset:57804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57804*FLEN/8, x4, x1, x2) - -inst_19269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x3ffff; valaddr_reg:x3; val_offset:57807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57807*FLEN/8, x4, x1, x2) - -inst_19270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ffff; valaddr_reg:x3; val_offset:57810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57810*FLEN/8, x4, x1, x2) - -inst_19271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0xfffff; valaddr_reg:x3; val_offset:57813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57813*FLEN/8, x4, x1, x2) - -inst_19272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:57816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57816*FLEN/8, x4, x1, x2) - -inst_19273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x1fffff; valaddr_reg:x3; val_offset:57819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57819*FLEN/8, x4, x1, x2) - -inst_19274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:57822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57822*FLEN/8, x4, x1, x2) - -inst_19275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:57825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57825*FLEN/8, x4, x1, x2) - -inst_19276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:57828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57828*FLEN/8, x4, x1, x2) - -inst_19277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:57831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57831*FLEN/8, x4, x1, x2) - -inst_19278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x3fffff; valaddr_reg:x3; val_offset:57834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57834*FLEN/8, x4, x1, x2) - -inst_19279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x400000; valaddr_reg:x3; val_offset:57837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57837*FLEN/8, x4, x1, x2) - -inst_19280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:57840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57840*FLEN/8, x4, x1, x2) - -inst_19281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:57843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57843*FLEN/8, x4, x1, x2) - -inst_19282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:57846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57846*FLEN/8, x4, x1, x2) - -inst_19283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x600000; valaddr_reg:x3; val_offset:57849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57849*FLEN/8, x4, x1, x2) - -inst_19284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:57852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57852*FLEN/8, x4, x1, x2) - -inst_19285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:57855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57855*FLEN/8, x4, x1, x2) - -inst_19286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x700000; valaddr_reg:x3; val_offset:57858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57858*FLEN/8, x4, x1, x2) - -inst_19287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x780000; valaddr_reg:x3; val_offset:57861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57861*FLEN/8, x4, x1, x2) - -inst_19288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7c0000; valaddr_reg:x3; val_offset:57864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57864*FLEN/8, x4, x1, x2) - -inst_19289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7e0000; valaddr_reg:x3; val_offset:57867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57867*FLEN/8, x4, x1, x2) - -inst_19290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7f0000; valaddr_reg:x3; val_offset:57870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57870*FLEN/8, x4, x1, x2) - -inst_19291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7f8000; valaddr_reg:x3; val_offset:57873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57873*FLEN/8, x4, x1, x2) - -inst_19292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7fc000; valaddr_reg:x3; val_offset:57876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57876*FLEN/8, x4, x1, x2) - -inst_19293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7fe000; valaddr_reg:x3; val_offset:57879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57879*FLEN/8, x4, x1, x2) - -inst_19294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ff000; valaddr_reg:x3; val_offset:57882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57882*FLEN/8, x4, x1, x2) - -inst_19295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ff800; valaddr_reg:x3; val_offset:57885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57885*FLEN/8, x4, x1, x2) - -inst_19296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ffc00; valaddr_reg:x3; val_offset:57888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57888*FLEN/8, x4, x1, x2) - -inst_19297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ffe00; valaddr_reg:x3; val_offset:57891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57891*FLEN/8, x4, x1, x2) - -inst_19298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7fff00; valaddr_reg:x3; val_offset:57894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57894*FLEN/8, x4, x1, x2) - -inst_19299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7fff80; valaddr_reg:x3; val_offset:57897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57897*FLEN/8, x4, x1, x2) - -inst_19300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7fffc0; valaddr_reg:x3; val_offset:57900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57900*FLEN/8, x4, x1, x2) - -inst_19301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7fffe0; valaddr_reg:x3; val_offset:57903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57903*FLEN/8, x4, x1, x2) - -inst_19302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ffff0; valaddr_reg:x3; val_offset:57906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57906*FLEN/8, x4, x1, x2) - -inst_19303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:57909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57909*FLEN/8, x4, x1, x2) - -inst_19304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:57912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57912*FLEN/8, x4, x1, x2) - -inst_19305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:57915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57915*FLEN/8, x4, x1, x2) - -inst_19306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; -op3val:0x7fffff; valaddr_reg:x3; val_offset:57918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57918*FLEN/8, x4, x1, x2) - -inst_19307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f800000; valaddr_reg:x3; val_offset:57921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57921*FLEN/8, x4, x1, x2) - -inst_19308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f800001; valaddr_reg:x3; val_offset:57924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57924*FLEN/8, x4, x1, x2) - -inst_19309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f800003; valaddr_reg:x3; val_offset:57927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57927*FLEN/8, x4, x1, x2) - -inst_19310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f800007; valaddr_reg:x3; val_offset:57930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57930*FLEN/8, x4, x1, x2) - -inst_19311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f80000f; valaddr_reg:x3; val_offset:57933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57933*FLEN/8, x4, x1, x2) - -inst_19312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f80001f; valaddr_reg:x3; val_offset:57936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57936*FLEN/8, x4, x1, x2) - -inst_19313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f80003f; valaddr_reg:x3; val_offset:57939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57939*FLEN/8, x4, x1, x2) - -inst_19314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f80007f; valaddr_reg:x3; val_offset:57942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57942*FLEN/8, x4, x1, x2) - -inst_19315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f8000ff; valaddr_reg:x3; val_offset:57945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57945*FLEN/8, x4, x1, x2) - -inst_19316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f8001ff; valaddr_reg:x3; val_offset:57948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57948*FLEN/8, x4, x1, x2) - -inst_19317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f8003ff; valaddr_reg:x3; val_offset:57951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57951*FLEN/8, x4, x1, x2) - -inst_19318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f8007ff; valaddr_reg:x3; val_offset:57954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57954*FLEN/8, x4, x1, x2) - -inst_19319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f800fff; valaddr_reg:x3; val_offset:57957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57957*FLEN/8, x4, x1, x2) - -inst_19320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f801fff; valaddr_reg:x3; val_offset:57960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57960*FLEN/8, x4, x1, x2) - -inst_19321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f803fff; valaddr_reg:x3; val_offset:57963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57963*FLEN/8, x4, x1, x2) - -inst_19322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f807fff; valaddr_reg:x3; val_offset:57966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57966*FLEN/8, x4, x1, x2) - -inst_19323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f80ffff; valaddr_reg:x3; val_offset:57969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57969*FLEN/8, x4, x1, x2) - -inst_19324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f81ffff; valaddr_reg:x3; val_offset:57972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57972*FLEN/8, x4, x1, x2) - -inst_19325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f83ffff; valaddr_reg:x3; val_offset:57975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57975*FLEN/8, x4, x1, x2) - -inst_19326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f87ffff; valaddr_reg:x3; val_offset:57978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57978*FLEN/8, x4, x1, x2) - -inst_19327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f8fffff; valaddr_reg:x3; val_offset:57981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57981*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_152) - -inst_19328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5f9fffff; valaddr_reg:x3; val_offset:57984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57984*FLEN/8, x4, x1, x2) - -inst_19329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fbfffff; valaddr_reg:x3; val_offset:57987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57987*FLEN/8, x4, x1, x2) - -inst_19330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fc00000; valaddr_reg:x3; val_offset:57990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57990*FLEN/8, x4, x1, x2) - -inst_19331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fe00000; valaddr_reg:x3; val_offset:57993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57993*FLEN/8, x4, x1, x2) - -inst_19332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ff00000; valaddr_reg:x3; val_offset:57996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57996*FLEN/8, x4, x1, x2) - -inst_19333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ff80000; valaddr_reg:x3; val_offset:57999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57999*FLEN/8, x4, x1, x2) - -inst_19334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffc0000; valaddr_reg:x3; val_offset:58002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58002*FLEN/8, x4, x1, x2) - -inst_19335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffe0000; valaddr_reg:x3; val_offset:58005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58005*FLEN/8, x4, x1, x2) - -inst_19336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fff0000; valaddr_reg:x3; val_offset:58008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58008*FLEN/8, x4, x1, x2) - -inst_19337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fff8000; valaddr_reg:x3; val_offset:58011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58011*FLEN/8, x4, x1, x2) - -inst_19338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fffc000; valaddr_reg:x3; val_offset:58014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58014*FLEN/8, x4, x1, x2) - -inst_19339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fffe000; valaddr_reg:x3; val_offset:58017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58017*FLEN/8, x4, x1, x2) - -inst_19340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffff000; valaddr_reg:x3; val_offset:58020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58020*FLEN/8, x4, x1, x2) - -inst_19341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffff800; valaddr_reg:x3; val_offset:58023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58023*FLEN/8, x4, x1, x2) - -inst_19342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffffc00; valaddr_reg:x3; val_offset:58026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58026*FLEN/8, x4, x1, x2) - -inst_19343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffffe00; valaddr_reg:x3; val_offset:58029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58029*FLEN/8, x4, x1, x2) - -inst_19344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fffff00; valaddr_reg:x3; val_offset:58032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58032*FLEN/8, x4, x1, x2) - -inst_19345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fffff80; valaddr_reg:x3; val_offset:58035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58035*FLEN/8, x4, x1, x2) - -inst_19346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fffffc0; valaddr_reg:x3; val_offset:58038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58038*FLEN/8, x4, x1, x2) - -inst_19347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fffffe0; valaddr_reg:x3; val_offset:58041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58041*FLEN/8, x4, x1, x2) - -inst_19348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffffff0; valaddr_reg:x3; val_offset:58044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58044*FLEN/8, x4, x1, x2) - -inst_19349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffffff8; valaddr_reg:x3; val_offset:58047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58047*FLEN/8, x4, x1, x2) - -inst_19350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffffffc; valaddr_reg:x3; val_offset:58050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58050*FLEN/8, x4, x1, x2) - -inst_19351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5ffffffe; valaddr_reg:x3; val_offset:58053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58053*FLEN/8, x4, x1, x2) - -inst_19352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x5fffffff; valaddr_reg:x3; val_offset:58056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58056*FLEN/8, x4, x1, x2) - -inst_19353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f000001; valaddr_reg:x3; val_offset:58059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58059*FLEN/8, x4, x1, x2) - -inst_19354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f000003; valaddr_reg:x3; val_offset:58062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58062*FLEN/8, x4, x1, x2) - -inst_19355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f000007; valaddr_reg:x3; val_offset:58065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58065*FLEN/8, x4, x1, x2) - -inst_19356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f199999; valaddr_reg:x3; val_offset:58068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58068*FLEN/8, x4, x1, x2) - -inst_19357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f249249; valaddr_reg:x3; val_offset:58071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58071*FLEN/8, x4, x1, x2) - -inst_19358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f333333; valaddr_reg:x3; val_offset:58074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58074*FLEN/8, x4, x1, x2) - -inst_19359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:58077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58077*FLEN/8, x4, x1, x2) - -inst_19360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:58080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58080*FLEN/8, x4, x1, x2) - -inst_19361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f444444; valaddr_reg:x3; val_offset:58083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58083*FLEN/8, x4, x1, x2) - -inst_19362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:58086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58086*FLEN/8, x4, x1, x2) - -inst_19363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:58089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58089*FLEN/8, x4, x1, x2) - -inst_19364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f666666; valaddr_reg:x3; val_offset:58092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58092*FLEN/8, x4, x1, x2) - -inst_19365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:58095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58095*FLEN/8, x4, x1, x2) - -inst_19366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:58098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58098*FLEN/8, x4, x1, x2) - -inst_19367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:58101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58101*FLEN/8, x4, x1, x2) - -inst_19368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:58104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58104*FLEN/8, x4, x1, x2) - -inst_19369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:58107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58107*FLEN/8, x4, x1, x2) - -inst_19370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:58110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58110*FLEN/8, x4, x1, x2) - -inst_19371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:58113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58113*FLEN/8, x4, x1, x2) - -inst_19372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:58116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58116*FLEN/8, x4, x1, x2) - -inst_19373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:58119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58119*FLEN/8, x4, x1, x2) - -inst_19374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:58122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58122*FLEN/8, x4, x1, x2) - -inst_19375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:58125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58125*FLEN/8, x4, x1, x2) - -inst_19376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:58128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58128*FLEN/8, x4, x1, x2) - -inst_19377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:58131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58131*FLEN/8, x4, x1, x2) - -inst_19378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:58134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58134*FLEN/8, x4, x1, x2) - -inst_19379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:58137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58137*FLEN/8, x4, x1, x2) - -inst_19380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:58140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58140*FLEN/8, x4, x1, x2) - -inst_19381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:58143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58143*FLEN/8, x4, x1, x2) - -inst_19382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:58146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58146*FLEN/8, x4, x1, x2) - -inst_19383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:58149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58149*FLEN/8, x4, x1, x2) - -inst_19384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:58152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58152*FLEN/8, x4, x1, x2) - -inst_19385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89800000; valaddr_reg:x3; val_offset:58155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58155*FLEN/8, x4, x1, x2) - -inst_19386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89800001; valaddr_reg:x3; val_offset:58158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58158*FLEN/8, x4, x1, x2) - -inst_19387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89800003; valaddr_reg:x3; val_offset:58161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58161*FLEN/8, x4, x1, x2) - -inst_19388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89800007; valaddr_reg:x3; val_offset:58164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58164*FLEN/8, x4, x1, x2) - -inst_19389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8980000f; valaddr_reg:x3; val_offset:58167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58167*FLEN/8, x4, x1, x2) - -inst_19390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8980001f; valaddr_reg:x3; val_offset:58170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58170*FLEN/8, x4, x1, x2) - -inst_19391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8980003f; valaddr_reg:x3; val_offset:58173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58173*FLEN/8, x4, x1, x2) - -inst_19392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8980007f; valaddr_reg:x3; val_offset:58176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58176*FLEN/8, x4, x1, x2) - -inst_19393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x898000ff; valaddr_reg:x3; val_offset:58179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58179*FLEN/8, x4, x1, x2) - -inst_19394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x898001ff; valaddr_reg:x3; val_offset:58182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58182*FLEN/8, x4, x1, x2) - -inst_19395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x898003ff; valaddr_reg:x3; val_offset:58185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58185*FLEN/8, x4, x1, x2) - -inst_19396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x898007ff; valaddr_reg:x3; val_offset:58188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58188*FLEN/8, x4, x1, x2) - -inst_19397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89800fff; valaddr_reg:x3; val_offset:58191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58191*FLEN/8, x4, x1, x2) - -inst_19398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89801fff; valaddr_reg:x3; val_offset:58194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58194*FLEN/8, x4, x1, x2) - -inst_19399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89803fff; valaddr_reg:x3; val_offset:58197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58197*FLEN/8, x4, x1, x2) - -inst_19400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89807fff; valaddr_reg:x3; val_offset:58200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58200*FLEN/8, x4, x1, x2) - -inst_19401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8980ffff; valaddr_reg:x3; val_offset:58203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58203*FLEN/8, x4, x1, x2) - -inst_19402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8981ffff; valaddr_reg:x3; val_offset:58206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58206*FLEN/8, x4, x1, x2) - -inst_19403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8983ffff; valaddr_reg:x3; val_offset:58209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58209*FLEN/8, x4, x1, x2) - -inst_19404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x8987ffff; valaddr_reg:x3; val_offset:58212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58212*FLEN/8, x4, x1, x2) - -inst_19405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x898fffff; valaddr_reg:x3; val_offset:58215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58215*FLEN/8, x4, x1, x2) - -inst_19406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x899fffff; valaddr_reg:x3; val_offset:58218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58218*FLEN/8, x4, x1, x2) - -inst_19407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89bfffff; valaddr_reg:x3; val_offset:58221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58221*FLEN/8, x4, x1, x2) - -inst_19408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89c00000; valaddr_reg:x3; val_offset:58224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58224*FLEN/8, x4, x1, x2) - -inst_19409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89e00000; valaddr_reg:x3; val_offset:58227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58227*FLEN/8, x4, x1, x2) - -inst_19410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89f00000; valaddr_reg:x3; val_offset:58230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58230*FLEN/8, x4, x1, x2) - -inst_19411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89f80000; valaddr_reg:x3; val_offset:58233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58233*FLEN/8, x4, x1, x2) - -inst_19412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fc0000; valaddr_reg:x3; val_offset:58236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58236*FLEN/8, x4, x1, x2) - -inst_19413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fe0000; valaddr_reg:x3; val_offset:58239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58239*FLEN/8, x4, x1, x2) - -inst_19414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ff0000; valaddr_reg:x3; val_offset:58242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58242*FLEN/8, x4, x1, x2) - -inst_19415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ff8000; valaddr_reg:x3; val_offset:58245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58245*FLEN/8, x4, x1, x2) - -inst_19416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ffc000; valaddr_reg:x3; val_offset:58248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58248*FLEN/8, x4, x1, x2) - -inst_19417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ffe000; valaddr_reg:x3; val_offset:58251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58251*FLEN/8, x4, x1, x2) - -inst_19418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fff000; valaddr_reg:x3; val_offset:58254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58254*FLEN/8, x4, x1, x2) - -inst_19419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fff800; valaddr_reg:x3; val_offset:58257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58257*FLEN/8, x4, x1, x2) - -inst_19420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fffc00; valaddr_reg:x3; val_offset:58260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58260*FLEN/8, x4, x1, x2) - -inst_19421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fffe00; valaddr_reg:x3; val_offset:58263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58263*FLEN/8, x4, x1, x2) - -inst_19422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ffff00; valaddr_reg:x3; val_offset:58266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58266*FLEN/8, x4, x1, x2) - -inst_19423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ffff80; valaddr_reg:x3; val_offset:58269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58269*FLEN/8, x4, x1, x2) - -inst_19424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ffffc0; valaddr_reg:x3; val_offset:58272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58272*FLEN/8, x4, x1, x2) - -inst_19425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ffffe0; valaddr_reg:x3; val_offset:58275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58275*FLEN/8, x4, x1, x2) - -inst_19426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fffff0; valaddr_reg:x3; val_offset:58278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58278*FLEN/8, x4, x1, x2) - -inst_19427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fffff8; valaddr_reg:x3; val_offset:58281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58281*FLEN/8, x4, x1, x2) - -inst_19428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fffffc; valaddr_reg:x3; val_offset:58284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58284*FLEN/8, x4, x1, x2) - -inst_19429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89fffffe; valaddr_reg:x3; val_offset:58287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58287*FLEN/8, x4, x1, x2) - -inst_19430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; -op3val:0x89ffffff; valaddr_reg:x3; val_offset:58290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58290*FLEN/8, x4, x1, x2) - -inst_19431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:58293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58293*FLEN/8, x4, x1, x2) - -inst_19432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:58296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58296*FLEN/8, x4, x1, x2) - -inst_19433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:58299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58299*FLEN/8, x4, x1, x2) - -inst_19434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:58302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58302*FLEN/8, x4, x1, x2) - -inst_19435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:58305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58305*FLEN/8, x4, x1, x2) - -inst_19436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:58308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58308*FLEN/8, x4, x1, x2) - -inst_19437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:58311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58311*FLEN/8, x4, x1, x2) - -inst_19438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:58314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58314*FLEN/8, x4, x1, x2) - -inst_19439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:58317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58317*FLEN/8, x4, x1, x2) - -inst_19440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:58320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58320*FLEN/8, x4, x1, x2) - -inst_19441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:58323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58323*FLEN/8, x4, x1, x2) - -inst_19442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:58326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58326*FLEN/8, x4, x1, x2) - -inst_19443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:58329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58329*FLEN/8, x4, x1, x2) - -inst_19444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:58332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58332*FLEN/8, x4, x1, x2) - -inst_19445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:58335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58335*FLEN/8, x4, x1, x2) - -inst_19446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:58338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58338*FLEN/8, x4, x1, x2) - -inst_19447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1800000; valaddr_reg:x3; val_offset:58341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58341*FLEN/8, x4, x1, x2) - -inst_19448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1800001; valaddr_reg:x3; val_offset:58344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58344*FLEN/8, x4, x1, x2) - -inst_19449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1800003; valaddr_reg:x3; val_offset:58347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58347*FLEN/8, x4, x1, x2) - -inst_19450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1800007; valaddr_reg:x3; val_offset:58350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58350*FLEN/8, x4, x1, x2) - -inst_19451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x180000f; valaddr_reg:x3; val_offset:58353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58353*FLEN/8, x4, x1, x2) - -inst_19452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x180001f; valaddr_reg:x3; val_offset:58356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58356*FLEN/8, x4, x1, x2) - -inst_19453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x180003f; valaddr_reg:x3; val_offset:58359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58359*FLEN/8, x4, x1, x2) - -inst_19454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x180007f; valaddr_reg:x3; val_offset:58362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58362*FLEN/8, x4, x1, x2) - -inst_19455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x18000ff; valaddr_reg:x3; val_offset:58365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58365*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_153) - -inst_19456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x18001ff; valaddr_reg:x3; val_offset:58368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58368*FLEN/8, x4, x1, x2) - -inst_19457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x18003ff; valaddr_reg:x3; val_offset:58371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58371*FLEN/8, x4, x1, x2) - -inst_19458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x18007ff; valaddr_reg:x3; val_offset:58374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58374*FLEN/8, x4, x1, x2) - -inst_19459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1800fff; valaddr_reg:x3; val_offset:58377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58377*FLEN/8, x4, x1, x2) - -inst_19460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1801fff; valaddr_reg:x3; val_offset:58380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58380*FLEN/8, x4, x1, x2) - -inst_19461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1803fff; valaddr_reg:x3; val_offset:58383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58383*FLEN/8, x4, x1, x2) - -inst_19462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1807fff; valaddr_reg:x3; val_offset:58386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58386*FLEN/8, x4, x1, x2) - -inst_19463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x180ffff; valaddr_reg:x3; val_offset:58389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58389*FLEN/8, x4, x1, x2) - -inst_19464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x181ffff; valaddr_reg:x3; val_offset:58392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58392*FLEN/8, x4, x1, x2) - -inst_19465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x183ffff; valaddr_reg:x3; val_offset:58395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58395*FLEN/8, x4, x1, x2) - -inst_19466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x187ffff; valaddr_reg:x3; val_offset:58398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58398*FLEN/8, x4, x1, x2) - -inst_19467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x18fffff; valaddr_reg:x3; val_offset:58401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58401*FLEN/8, x4, x1, x2) - -inst_19468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x19fffff; valaddr_reg:x3; val_offset:58404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58404*FLEN/8, x4, x1, x2) - -inst_19469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1bfffff; valaddr_reg:x3; val_offset:58407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58407*FLEN/8, x4, x1, x2) - -inst_19470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1c00000; valaddr_reg:x3; val_offset:58410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58410*FLEN/8, x4, x1, x2) - -inst_19471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1e00000; valaddr_reg:x3; val_offset:58413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58413*FLEN/8, x4, x1, x2) - -inst_19472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1f00000; valaddr_reg:x3; val_offset:58416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58416*FLEN/8, x4, x1, x2) - -inst_19473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1f80000; valaddr_reg:x3; val_offset:58419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58419*FLEN/8, x4, x1, x2) - -inst_19474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fc0000; valaddr_reg:x3; val_offset:58422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58422*FLEN/8, x4, x1, x2) - -inst_19475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fe0000; valaddr_reg:x3; val_offset:58425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58425*FLEN/8, x4, x1, x2) - -inst_19476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ff0000; valaddr_reg:x3; val_offset:58428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58428*FLEN/8, x4, x1, x2) - -inst_19477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ff8000; valaddr_reg:x3; val_offset:58431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58431*FLEN/8, x4, x1, x2) - -inst_19478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ffc000; valaddr_reg:x3; val_offset:58434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58434*FLEN/8, x4, x1, x2) - -inst_19479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ffe000; valaddr_reg:x3; val_offset:58437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58437*FLEN/8, x4, x1, x2) - -inst_19480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fff000; valaddr_reg:x3; val_offset:58440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58440*FLEN/8, x4, x1, x2) - -inst_19481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fff800; valaddr_reg:x3; val_offset:58443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58443*FLEN/8, x4, x1, x2) - -inst_19482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fffc00; valaddr_reg:x3; val_offset:58446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58446*FLEN/8, x4, x1, x2) - -inst_19483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fffe00; valaddr_reg:x3; val_offset:58449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58449*FLEN/8, x4, x1, x2) - -inst_19484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ffff00; valaddr_reg:x3; val_offset:58452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58452*FLEN/8, x4, x1, x2) - -inst_19485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ffff80; valaddr_reg:x3; val_offset:58455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58455*FLEN/8, x4, x1, x2) - -inst_19486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ffffc0; valaddr_reg:x3; val_offset:58458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58458*FLEN/8, x4, x1, x2) - -inst_19487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ffffe0; valaddr_reg:x3; val_offset:58461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58461*FLEN/8, x4, x1, x2) - -inst_19488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fffff0; valaddr_reg:x3; val_offset:58464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58464*FLEN/8, x4, x1, x2) - -inst_19489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fffff8; valaddr_reg:x3; val_offset:58467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58467*FLEN/8, x4, x1, x2) - -inst_19490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fffffc; valaddr_reg:x3; val_offset:58470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58470*FLEN/8, x4, x1, x2) - -inst_19491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1fffffe; valaddr_reg:x3; val_offset:58473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58473*FLEN/8, x4, x1, x2) - -inst_19492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; -op3val:0x1ffffff; valaddr_reg:x3; val_offset:58476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58476*FLEN/8, x4, x1, x2) - -inst_19493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:58479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58479*FLEN/8, x4, x1, x2) - -inst_19494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:58482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58482*FLEN/8, x4, x1, x2) - -inst_19495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:58485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58485*FLEN/8, x4, x1, x2) - -inst_19496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:58488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58488*FLEN/8, x4, x1, x2) - -inst_19497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:58491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58491*FLEN/8, x4, x1, x2) - -inst_19498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:58494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58494*FLEN/8, x4, x1, x2) - -inst_19499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:58497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58497*FLEN/8, x4, x1, x2) - -inst_19500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:58500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58500*FLEN/8, x4, x1, x2) - -inst_19501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:58503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58503*FLEN/8, x4, x1, x2) - -inst_19502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:58506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58506*FLEN/8, x4, x1, x2) - -inst_19503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:58509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58509*FLEN/8, x4, x1, x2) - -inst_19504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:58512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58512*FLEN/8, x4, x1, x2) - -inst_19505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:58515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58515*FLEN/8, x4, x1, x2) - -inst_19506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:58518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58518*FLEN/8, x4, x1, x2) - -inst_19507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:58521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58521*FLEN/8, x4, x1, x2) - -inst_19508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:58524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58524*FLEN/8, x4, x1, x2) - -inst_19509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2000000; valaddr_reg:x3; val_offset:58527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58527*FLEN/8, x4, x1, x2) - -inst_19510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2000001; valaddr_reg:x3; val_offset:58530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58530*FLEN/8, x4, x1, x2) - -inst_19511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2000003; valaddr_reg:x3; val_offset:58533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58533*FLEN/8, x4, x1, x2) - -inst_19512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2000007; valaddr_reg:x3; val_offset:58536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58536*FLEN/8, x4, x1, x2) - -inst_19513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x200000f; valaddr_reg:x3; val_offset:58539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58539*FLEN/8, x4, x1, x2) - -inst_19514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x200001f; valaddr_reg:x3; val_offset:58542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58542*FLEN/8, x4, x1, x2) - -inst_19515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x200003f; valaddr_reg:x3; val_offset:58545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58545*FLEN/8, x4, x1, x2) - -inst_19516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x200007f; valaddr_reg:x3; val_offset:58548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58548*FLEN/8, x4, x1, x2) - -inst_19517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x20000ff; valaddr_reg:x3; val_offset:58551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58551*FLEN/8, x4, x1, x2) - -inst_19518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x20001ff; valaddr_reg:x3; val_offset:58554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58554*FLEN/8, x4, x1, x2) - -inst_19519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x20003ff; valaddr_reg:x3; val_offset:58557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58557*FLEN/8, x4, x1, x2) - -inst_19520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x20007ff; valaddr_reg:x3; val_offset:58560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58560*FLEN/8, x4, x1, x2) - -inst_19521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2000fff; valaddr_reg:x3; val_offset:58563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58563*FLEN/8, x4, x1, x2) - -inst_19522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2001fff; valaddr_reg:x3; val_offset:58566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58566*FLEN/8, x4, x1, x2) - -inst_19523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2003fff; valaddr_reg:x3; val_offset:58569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58569*FLEN/8, x4, x1, x2) - -inst_19524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2007fff; valaddr_reg:x3; val_offset:58572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58572*FLEN/8, x4, x1, x2) - -inst_19525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x200ffff; valaddr_reg:x3; val_offset:58575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58575*FLEN/8, x4, x1, x2) - -inst_19526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x201ffff; valaddr_reg:x3; val_offset:58578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58578*FLEN/8, x4, x1, x2) - -inst_19527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x203ffff; valaddr_reg:x3; val_offset:58581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58581*FLEN/8, x4, x1, x2) - -inst_19528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x207ffff; valaddr_reg:x3; val_offset:58584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58584*FLEN/8, x4, x1, x2) - -inst_19529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x20fffff; valaddr_reg:x3; val_offset:58587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58587*FLEN/8, x4, x1, x2) - -inst_19530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x21fffff; valaddr_reg:x3; val_offset:58590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58590*FLEN/8, x4, x1, x2) - -inst_19531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x23fffff; valaddr_reg:x3; val_offset:58593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58593*FLEN/8, x4, x1, x2) - -inst_19532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2400000; valaddr_reg:x3; val_offset:58596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58596*FLEN/8, x4, x1, x2) - -inst_19533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2600000; valaddr_reg:x3; val_offset:58599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58599*FLEN/8, x4, x1, x2) - -inst_19534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2700000; valaddr_reg:x3; val_offset:58602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58602*FLEN/8, x4, x1, x2) - -inst_19535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x2780000; valaddr_reg:x3; val_offset:58605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58605*FLEN/8, x4, x1, x2) - -inst_19536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27c0000; valaddr_reg:x3; val_offset:58608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58608*FLEN/8, x4, x1, x2) - -inst_19537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27e0000; valaddr_reg:x3; val_offset:58611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58611*FLEN/8, x4, x1, x2) - -inst_19538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27f0000; valaddr_reg:x3; val_offset:58614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58614*FLEN/8, x4, x1, x2) - -inst_19539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27f8000; valaddr_reg:x3; val_offset:58617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58617*FLEN/8, x4, x1, x2) - -inst_19540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27fc000; valaddr_reg:x3; val_offset:58620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58620*FLEN/8, x4, x1, x2) - -inst_19541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27fe000; valaddr_reg:x3; val_offset:58623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58623*FLEN/8, x4, x1, x2) - -inst_19542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27ff000; valaddr_reg:x3; val_offset:58626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58626*FLEN/8, x4, x1, x2) - -inst_19543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27ff800; valaddr_reg:x3; val_offset:58629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58629*FLEN/8, x4, x1, x2) - -inst_19544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27ffc00; valaddr_reg:x3; val_offset:58632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58632*FLEN/8, x4, x1, x2) - -inst_19545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27ffe00; valaddr_reg:x3; val_offset:58635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58635*FLEN/8, x4, x1, x2) - -inst_19546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27fff00; valaddr_reg:x3; val_offset:58638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58638*FLEN/8, x4, x1, x2) - -inst_19547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27fff80; valaddr_reg:x3; val_offset:58641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58641*FLEN/8, x4, x1, x2) - -inst_19548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27fffc0; valaddr_reg:x3; val_offset:58644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58644*FLEN/8, x4, x1, x2) - -inst_19549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27fffe0; valaddr_reg:x3; val_offset:58647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58647*FLEN/8, x4, x1, x2) - -inst_19550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27ffff0; valaddr_reg:x3; val_offset:58650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58650*FLEN/8, x4, x1, x2) - -inst_19551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27ffff8; valaddr_reg:x3; val_offset:58653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58653*FLEN/8, x4, x1, x2) - -inst_19552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27ffffc; valaddr_reg:x3; val_offset:58656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58656*FLEN/8, x4, x1, x2) - -inst_19553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27ffffe; valaddr_reg:x3; val_offset:58659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58659*FLEN/8, x4, x1, x2) - -inst_19554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; -op3val:0x27fffff; valaddr_reg:x3; val_offset:58662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58662*FLEN/8, x4, x1, x2) - -inst_19555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:58665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58665*FLEN/8, x4, x1, x2) - -inst_19556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:58668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58668*FLEN/8, x4, x1, x2) - -inst_19557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:58671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58671*FLEN/8, x4, x1, x2) - -inst_19558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:58674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58674*FLEN/8, x4, x1, x2) - -inst_19559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:58677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58677*FLEN/8, x4, x1, x2) - -inst_19560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:58680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58680*FLEN/8, x4, x1, x2) - -inst_19561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:58683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58683*FLEN/8, x4, x1, x2) - -inst_19562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:58686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58686*FLEN/8, x4, x1, x2) - -inst_19563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:58689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58689*FLEN/8, x4, x1, x2) - -inst_19564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:58692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58692*FLEN/8, x4, x1, x2) - -inst_19565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:58695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58695*FLEN/8, x4, x1, x2) - -inst_19566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:58698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58698*FLEN/8, x4, x1, x2) - -inst_19567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:58701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58701*FLEN/8, x4, x1, x2) - -inst_19568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:58704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58704*FLEN/8, x4, x1, x2) - -inst_19569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:58707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58707*FLEN/8, x4, x1, x2) - -inst_19570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:58710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58710*FLEN/8, x4, x1, x2) - -inst_19571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88000000; valaddr_reg:x3; val_offset:58713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58713*FLEN/8, x4, x1, x2) - -inst_19572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88000001; valaddr_reg:x3; val_offset:58716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58716*FLEN/8, x4, x1, x2) - -inst_19573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88000003; valaddr_reg:x3; val_offset:58719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58719*FLEN/8, x4, x1, x2) - -inst_19574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88000007; valaddr_reg:x3; val_offset:58722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58722*FLEN/8, x4, x1, x2) - -inst_19575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8800000f; valaddr_reg:x3; val_offset:58725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58725*FLEN/8, x4, x1, x2) - -inst_19576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8800001f; valaddr_reg:x3; val_offset:58728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58728*FLEN/8, x4, x1, x2) - -inst_19577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8800003f; valaddr_reg:x3; val_offset:58731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58731*FLEN/8, x4, x1, x2) - -inst_19578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8800007f; valaddr_reg:x3; val_offset:58734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58734*FLEN/8, x4, x1, x2) - -inst_19579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x880000ff; valaddr_reg:x3; val_offset:58737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58737*FLEN/8, x4, x1, x2) - -inst_19580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x880001ff; valaddr_reg:x3; val_offset:58740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58740*FLEN/8, x4, x1, x2) - -inst_19581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x880003ff; valaddr_reg:x3; val_offset:58743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58743*FLEN/8, x4, x1, x2) - -inst_19582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x880007ff; valaddr_reg:x3; val_offset:58746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58746*FLEN/8, x4, x1, x2) - -inst_19583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88000fff; valaddr_reg:x3; val_offset:58749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58749*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_154) - -inst_19584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88001fff; valaddr_reg:x3; val_offset:58752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58752*FLEN/8, x4, x1, x2) - -inst_19585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88003fff; valaddr_reg:x3; val_offset:58755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58755*FLEN/8, x4, x1, x2) - -inst_19586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88007fff; valaddr_reg:x3; val_offset:58758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58758*FLEN/8, x4, x1, x2) - -inst_19587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8800ffff; valaddr_reg:x3; val_offset:58761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58761*FLEN/8, x4, x1, x2) - -inst_19588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8801ffff; valaddr_reg:x3; val_offset:58764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58764*FLEN/8, x4, x1, x2) - -inst_19589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8803ffff; valaddr_reg:x3; val_offset:58767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58767*FLEN/8, x4, x1, x2) - -inst_19590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x8807ffff; valaddr_reg:x3; val_offset:58770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58770*FLEN/8, x4, x1, x2) - -inst_19591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x880fffff; valaddr_reg:x3; val_offset:58773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58773*FLEN/8, x4, x1, x2) - -inst_19592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x881fffff; valaddr_reg:x3; val_offset:58776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58776*FLEN/8, x4, x1, x2) - -inst_19593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x883fffff; valaddr_reg:x3; val_offset:58779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58779*FLEN/8, x4, x1, x2) - -inst_19594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88400000; valaddr_reg:x3; val_offset:58782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58782*FLEN/8, x4, x1, x2) - -inst_19595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88600000; valaddr_reg:x3; val_offset:58785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58785*FLEN/8, x4, x1, x2) - -inst_19596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88700000; valaddr_reg:x3; val_offset:58788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58788*FLEN/8, x4, x1, x2) - -inst_19597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x88780000; valaddr_reg:x3; val_offset:58791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58791*FLEN/8, x4, x1, x2) - -inst_19598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887c0000; valaddr_reg:x3; val_offset:58794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58794*FLEN/8, x4, x1, x2) - -inst_19599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887e0000; valaddr_reg:x3; val_offset:58797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58797*FLEN/8, x4, x1, x2) - -inst_19600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887f0000; valaddr_reg:x3; val_offset:58800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58800*FLEN/8, x4, x1, x2) - -inst_19601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887f8000; valaddr_reg:x3; val_offset:58803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58803*FLEN/8, x4, x1, x2) - -inst_19602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887fc000; valaddr_reg:x3; val_offset:58806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58806*FLEN/8, x4, x1, x2) - -inst_19603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887fe000; valaddr_reg:x3; val_offset:58809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58809*FLEN/8, x4, x1, x2) - -inst_19604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887ff000; valaddr_reg:x3; val_offset:58812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58812*FLEN/8, x4, x1, x2) - -inst_19605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887ff800; valaddr_reg:x3; val_offset:58815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58815*FLEN/8, x4, x1, x2) - -inst_19606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887ffc00; valaddr_reg:x3; val_offset:58818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58818*FLEN/8, x4, x1, x2) - -inst_19607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887ffe00; valaddr_reg:x3; val_offset:58821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58821*FLEN/8, x4, x1, x2) - -inst_19608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887fff00; valaddr_reg:x3; val_offset:58824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58824*FLEN/8, x4, x1, x2) - -inst_19609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887fff80; valaddr_reg:x3; val_offset:58827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58827*FLEN/8, x4, x1, x2) - -inst_19610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887fffc0; valaddr_reg:x3; val_offset:58830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58830*FLEN/8, x4, x1, x2) - -inst_19611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887fffe0; valaddr_reg:x3; val_offset:58833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58833*FLEN/8, x4, x1, x2) - -inst_19612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887ffff0; valaddr_reg:x3; val_offset:58836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58836*FLEN/8, x4, x1, x2) - -inst_19613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887ffff8; valaddr_reg:x3; val_offset:58839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58839*FLEN/8, x4, x1, x2) - -inst_19614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887ffffc; valaddr_reg:x3; val_offset:58842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58842*FLEN/8, x4, x1, x2) - -inst_19615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887ffffe; valaddr_reg:x3; val_offset:58845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58845*FLEN/8, x4, x1, x2) - -inst_19616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; -op3val:0x887fffff; valaddr_reg:x3; val_offset:58848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58848*FLEN/8, x4, x1, x2) - -inst_19617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75800000; valaddr_reg:x3; val_offset:58851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58851*FLEN/8, x4, x1, x2) - -inst_19618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75800001; valaddr_reg:x3; val_offset:58854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58854*FLEN/8, x4, x1, x2) - -inst_19619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75800003; valaddr_reg:x3; val_offset:58857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58857*FLEN/8, x4, x1, x2) - -inst_19620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75800007; valaddr_reg:x3; val_offset:58860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58860*FLEN/8, x4, x1, x2) - -inst_19621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7580000f; valaddr_reg:x3; val_offset:58863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58863*FLEN/8, x4, x1, x2) - -inst_19622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7580001f; valaddr_reg:x3; val_offset:58866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58866*FLEN/8, x4, x1, x2) - -inst_19623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7580003f; valaddr_reg:x3; val_offset:58869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58869*FLEN/8, x4, x1, x2) - -inst_19624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7580007f; valaddr_reg:x3; val_offset:58872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58872*FLEN/8, x4, x1, x2) - -inst_19625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x758000ff; valaddr_reg:x3; val_offset:58875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58875*FLEN/8, x4, x1, x2) - -inst_19626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x758001ff; valaddr_reg:x3; val_offset:58878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58878*FLEN/8, x4, x1, x2) - -inst_19627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x758003ff; valaddr_reg:x3; val_offset:58881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58881*FLEN/8, x4, x1, x2) - -inst_19628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x758007ff; valaddr_reg:x3; val_offset:58884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58884*FLEN/8, x4, x1, x2) - -inst_19629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75800fff; valaddr_reg:x3; val_offset:58887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58887*FLEN/8, x4, x1, x2) - -inst_19630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75801fff; valaddr_reg:x3; val_offset:58890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58890*FLEN/8, x4, x1, x2) - -inst_19631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75803fff; valaddr_reg:x3; val_offset:58893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58893*FLEN/8, x4, x1, x2) - -inst_19632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75807fff; valaddr_reg:x3; val_offset:58896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58896*FLEN/8, x4, x1, x2) - -inst_19633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7580ffff; valaddr_reg:x3; val_offset:58899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58899*FLEN/8, x4, x1, x2) - -inst_19634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7581ffff; valaddr_reg:x3; val_offset:58902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58902*FLEN/8, x4, x1, x2) - -inst_19635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7583ffff; valaddr_reg:x3; val_offset:58905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58905*FLEN/8, x4, x1, x2) - -inst_19636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7587ffff; valaddr_reg:x3; val_offset:58908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58908*FLEN/8, x4, x1, x2) - -inst_19637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x758fffff; valaddr_reg:x3; val_offset:58911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58911*FLEN/8, x4, x1, x2) - -inst_19638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x759fffff; valaddr_reg:x3; val_offset:58914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58914*FLEN/8, x4, x1, x2) - -inst_19639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75bfffff; valaddr_reg:x3; val_offset:58917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58917*FLEN/8, x4, x1, x2) - -inst_19640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75c00000; valaddr_reg:x3; val_offset:58920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58920*FLEN/8, x4, x1, x2) - -inst_19641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75e00000; valaddr_reg:x3; val_offset:58923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58923*FLEN/8, x4, x1, x2) - -inst_19642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75f00000; valaddr_reg:x3; val_offset:58926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58926*FLEN/8, x4, x1, x2) - -inst_19643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75f80000; valaddr_reg:x3; val_offset:58929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58929*FLEN/8, x4, x1, x2) - -inst_19644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fc0000; valaddr_reg:x3; val_offset:58932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58932*FLEN/8, x4, x1, x2) - -inst_19645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fe0000; valaddr_reg:x3; val_offset:58935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58935*FLEN/8, x4, x1, x2) - -inst_19646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ff0000; valaddr_reg:x3; val_offset:58938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58938*FLEN/8, x4, x1, x2) - -inst_19647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ff8000; valaddr_reg:x3; val_offset:58941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58941*FLEN/8, x4, x1, x2) - -inst_19648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ffc000; valaddr_reg:x3; val_offset:58944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58944*FLEN/8, x4, x1, x2) - -inst_19649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ffe000; valaddr_reg:x3; val_offset:58947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58947*FLEN/8, x4, x1, x2) - -inst_19650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fff000; valaddr_reg:x3; val_offset:58950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58950*FLEN/8, x4, x1, x2) - -inst_19651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fff800; valaddr_reg:x3; val_offset:58953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58953*FLEN/8, x4, x1, x2) - -inst_19652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fffc00; valaddr_reg:x3; val_offset:58956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58956*FLEN/8, x4, x1, x2) - -inst_19653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fffe00; valaddr_reg:x3; val_offset:58959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58959*FLEN/8, x4, x1, x2) - -inst_19654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ffff00; valaddr_reg:x3; val_offset:58962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58962*FLEN/8, x4, x1, x2) - -inst_19655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ffff80; valaddr_reg:x3; val_offset:58965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58965*FLEN/8, x4, x1, x2) - -inst_19656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ffffc0; valaddr_reg:x3; val_offset:58968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58968*FLEN/8, x4, x1, x2) - -inst_19657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ffffe0; valaddr_reg:x3; val_offset:58971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58971*FLEN/8, x4, x1, x2) - -inst_19658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fffff0; valaddr_reg:x3; val_offset:58974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58974*FLEN/8, x4, x1, x2) - -inst_19659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fffff8; valaddr_reg:x3; val_offset:58977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58977*FLEN/8, x4, x1, x2) - -inst_19660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fffffc; valaddr_reg:x3; val_offset:58980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58980*FLEN/8, x4, x1, x2) - -inst_19661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75fffffe; valaddr_reg:x3; val_offset:58983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58983*FLEN/8, x4, x1, x2) - -inst_19662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x75ffffff; valaddr_reg:x3; val_offset:58986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58986*FLEN/8, x4, x1, x2) - -inst_19663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f000001; valaddr_reg:x3; val_offset:58989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58989*FLEN/8, x4, x1, x2) - -inst_19664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f000003; valaddr_reg:x3; val_offset:58992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58992*FLEN/8, x4, x1, x2) - -inst_19665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f000007; valaddr_reg:x3; val_offset:58995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58995*FLEN/8, x4, x1, x2) - -inst_19666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f199999; valaddr_reg:x3; val_offset:58998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58998*FLEN/8, x4, x1, x2) - -inst_19667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f249249; valaddr_reg:x3; val_offset:59001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59001*FLEN/8, x4, x1, x2) - -inst_19668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f333333; valaddr_reg:x3; val_offset:59004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59004*FLEN/8, x4, x1, x2) - -inst_19669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:59007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59007*FLEN/8, x4, x1, x2) - -inst_19670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:59010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59010*FLEN/8, x4, x1, x2) - -inst_19671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f444444; valaddr_reg:x3; val_offset:59013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59013*FLEN/8, x4, x1, x2) - -inst_19672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:59016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59016*FLEN/8, x4, x1, x2) - -inst_19673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:59019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59019*FLEN/8, x4, x1, x2) - -inst_19674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f666666; valaddr_reg:x3; val_offset:59022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59022*FLEN/8, x4, x1, x2) - -inst_19675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:59025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59025*FLEN/8, x4, x1, x2) - -inst_19676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:59028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59028*FLEN/8, x4, x1, x2) - -inst_19677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:59031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59031*FLEN/8, x4, x1, x2) - -inst_19678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:59034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59034*FLEN/8, x4, x1, x2) - -inst_19679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:59037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59037*FLEN/8, x4, x1, x2) - -inst_19680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:59040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59040*FLEN/8, x4, x1, x2) - -inst_19681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:59043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59043*FLEN/8, x4, x1, x2) - -inst_19682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:59046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59046*FLEN/8, x4, x1, x2) - -inst_19683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:59049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59049*FLEN/8, x4, x1, x2) - -inst_19684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:59052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59052*FLEN/8, x4, x1, x2) - -inst_19685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:59055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59055*FLEN/8, x4, x1, x2) - -inst_19686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:59058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59058*FLEN/8, x4, x1, x2) - -inst_19687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:59061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59061*FLEN/8, x4, x1, x2) - -inst_19688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:59064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59064*FLEN/8, x4, x1, x2) - -inst_19689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:59067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59067*FLEN/8, x4, x1, x2) - -inst_19690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:59070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59070*FLEN/8, x4, x1, x2) - -inst_19691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:59073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59073*FLEN/8, x4, x1, x2) - -inst_19692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:59076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59076*FLEN/8, x4, x1, x2) - -inst_19693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:59079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59079*FLEN/8, x4, x1, x2) - -inst_19694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:59082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59082*FLEN/8, x4, x1, x2) - -inst_19695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82000000; valaddr_reg:x3; val_offset:59085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59085*FLEN/8, x4, x1, x2) - -inst_19696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82000001; valaddr_reg:x3; val_offset:59088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59088*FLEN/8, x4, x1, x2) - -inst_19697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82000003; valaddr_reg:x3; val_offset:59091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59091*FLEN/8, x4, x1, x2) - -inst_19698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82000007; valaddr_reg:x3; val_offset:59094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59094*FLEN/8, x4, x1, x2) - -inst_19699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8200000f; valaddr_reg:x3; val_offset:59097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59097*FLEN/8, x4, x1, x2) - -inst_19700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8200001f; valaddr_reg:x3; val_offset:59100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59100*FLEN/8, x4, x1, x2) - -inst_19701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8200003f; valaddr_reg:x3; val_offset:59103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59103*FLEN/8, x4, x1, x2) - -inst_19702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8200007f; valaddr_reg:x3; val_offset:59106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59106*FLEN/8, x4, x1, x2) - -inst_19703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x820000ff; valaddr_reg:x3; val_offset:59109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59109*FLEN/8, x4, x1, x2) - -inst_19704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x820001ff; valaddr_reg:x3; val_offset:59112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59112*FLEN/8, x4, x1, x2) - -inst_19705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x820003ff; valaddr_reg:x3; val_offset:59115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59115*FLEN/8, x4, x1, x2) - -inst_19706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x820007ff; valaddr_reg:x3; val_offset:59118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59118*FLEN/8, x4, x1, x2) - -inst_19707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82000fff; valaddr_reg:x3; val_offset:59121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59121*FLEN/8, x4, x1, x2) - -inst_19708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82001fff; valaddr_reg:x3; val_offset:59124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59124*FLEN/8, x4, x1, x2) - -inst_19709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82003fff; valaddr_reg:x3; val_offset:59127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59127*FLEN/8, x4, x1, x2) - -inst_19710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82007fff; valaddr_reg:x3; val_offset:59130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59130*FLEN/8, x4, x1, x2) - -inst_19711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8200ffff; valaddr_reg:x3; val_offset:59133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59133*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_155) - -inst_19712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8201ffff; valaddr_reg:x3; val_offset:59136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59136*FLEN/8, x4, x1, x2) - -inst_19713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8203ffff; valaddr_reg:x3; val_offset:59139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59139*FLEN/8, x4, x1, x2) - -inst_19714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x8207ffff; valaddr_reg:x3; val_offset:59142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59142*FLEN/8, x4, x1, x2) - -inst_19715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x820fffff; valaddr_reg:x3; val_offset:59145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59145*FLEN/8, x4, x1, x2) - -inst_19716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x821fffff; valaddr_reg:x3; val_offset:59148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59148*FLEN/8, x4, x1, x2) - -inst_19717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x823fffff; valaddr_reg:x3; val_offset:59151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59151*FLEN/8, x4, x1, x2) - -inst_19718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82400000; valaddr_reg:x3; val_offset:59154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59154*FLEN/8, x4, x1, x2) - -inst_19719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82600000; valaddr_reg:x3; val_offset:59157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59157*FLEN/8, x4, x1, x2) - -inst_19720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82700000; valaddr_reg:x3; val_offset:59160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59160*FLEN/8, x4, x1, x2) - -inst_19721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x82780000; valaddr_reg:x3; val_offset:59163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59163*FLEN/8, x4, x1, x2) - -inst_19722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827c0000; valaddr_reg:x3; val_offset:59166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59166*FLEN/8, x4, x1, x2) - -inst_19723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827e0000; valaddr_reg:x3; val_offset:59169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59169*FLEN/8, x4, x1, x2) - -inst_19724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827f0000; valaddr_reg:x3; val_offset:59172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59172*FLEN/8, x4, x1, x2) - -inst_19725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827f8000; valaddr_reg:x3; val_offset:59175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59175*FLEN/8, x4, x1, x2) - -inst_19726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827fc000; valaddr_reg:x3; val_offset:59178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59178*FLEN/8, x4, x1, x2) - -inst_19727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827fe000; valaddr_reg:x3; val_offset:59181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59181*FLEN/8, x4, x1, x2) - -inst_19728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827ff000; valaddr_reg:x3; val_offset:59184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59184*FLEN/8, x4, x1, x2) - -inst_19729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827ff800; valaddr_reg:x3; val_offset:59187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59187*FLEN/8, x4, x1, x2) - -inst_19730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827ffc00; valaddr_reg:x3; val_offset:59190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59190*FLEN/8, x4, x1, x2) - -inst_19731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827ffe00; valaddr_reg:x3; val_offset:59193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59193*FLEN/8, x4, x1, x2) - -inst_19732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827fff00; valaddr_reg:x3; val_offset:59196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59196*FLEN/8, x4, x1, x2) - -inst_19733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827fff80; valaddr_reg:x3; val_offset:59199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59199*FLEN/8, x4, x1, x2) - -inst_19734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827fffc0; valaddr_reg:x3; val_offset:59202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59202*FLEN/8, x4, x1, x2) - -inst_19735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827fffe0; valaddr_reg:x3; val_offset:59205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59205*FLEN/8, x4, x1, x2) - -inst_19736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827ffff0; valaddr_reg:x3; val_offset:59208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59208*FLEN/8, x4, x1, x2) - -inst_19737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827ffff8; valaddr_reg:x3; val_offset:59211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59211*FLEN/8, x4, x1, x2) - -inst_19738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827ffffc; valaddr_reg:x3; val_offset:59214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59214*FLEN/8, x4, x1, x2) - -inst_19739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827ffffe; valaddr_reg:x3; val_offset:59217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59217*FLEN/8, x4, x1, x2) - -inst_19740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; -op3val:0x827fffff; valaddr_reg:x3; val_offset:59220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59220*FLEN/8, x4, x1, x2) - -inst_19741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:59223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59223*FLEN/8, x4, x1, x2) - -inst_19742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:59226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59226*FLEN/8, x4, x1, x2) - -inst_19743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:59229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59229*FLEN/8, x4, x1, x2) - -inst_19744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:59232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59232*FLEN/8, x4, x1, x2) - -inst_19745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:59235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59235*FLEN/8, x4, x1, x2) - -inst_19746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:59238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59238*FLEN/8, x4, x1, x2) - -inst_19747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:59241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59241*FLEN/8, x4, x1, x2) - -inst_19748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:59244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59244*FLEN/8, x4, x1, x2) - -inst_19749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:59247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59247*FLEN/8, x4, x1, x2) - -inst_19750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:59250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59250*FLEN/8, x4, x1, x2) - -inst_19751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:59253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59253*FLEN/8, x4, x1, x2) - -inst_19752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:59256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59256*FLEN/8, x4, x1, x2) - -inst_19753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:59259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59259*FLEN/8, x4, x1, x2) - -inst_19754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:59262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59262*FLEN/8, x4, x1, x2) - -inst_19755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:59265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59265*FLEN/8, x4, x1, x2) - -inst_19756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:59268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59268*FLEN/8, x4, x1, x2) - -inst_19757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81000000; valaddr_reg:x3; val_offset:59271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59271*FLEN/8, x4, x1, x2) - -inst_19758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81000001; valaddr_reg:x3; val_offset:59274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59274*FLEN/8, x4, x1, x2) - -inst_19759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81000003; valaddr_reg:x3; val_offset:59277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59277*FLEN/8, x4, x1, x2) - -inst_19760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81000007; valaddr_reg:x3; val_offset:59280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59280*FLEN/8, x4, x1, x2) - -inst_19761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x8100000f; valaddr_reg:x3; val_offset:59283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59283*FLEN/8, x4, x1, x2) - -inst_19762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x8100001f; valaddr_reg:x3; val_offset:59286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59286*FLEN/8, x4, x1, x2) - -inst_19763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x8100003f; valaddr_reg:x3; val_offset:59289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59289*FLEN/8, x4, x1, x2) - -inst_19764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x8100007f; valaddr_reg:x3; val_offset:59292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59292*FLEN/8, x4, x1, x2) - -inst_19765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x810000ff; valaddr_reg:x3; val_offset:59295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59295*FLEN/8, x4, x1, x2) - -inst_19766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x810001ff; valaddr_reg:x3; val_offset:59298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59298*FLEN/8, x4, x1, x2) - -inst_19767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x810003ff; valaddr_reg:x3; val_offset:59301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59301*FLEN/8, x4, x1, x2) - -inst_19768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x810007ff; valaddr_reg:x3; val_offset:59304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59304*FLEN/8, x4, x1, x2) - -inst_19769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81000fff; valaddr_reg:x3; val_offset:59307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59307*FLEN/8, x4, x1, x2) - -inst_19770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81001fff; valaddr_reg:x3; val_offset:59310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59310*FLEN/8, x4, x1, x2) - -inst_19771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81003fff; valaddr_reg:x3; val_offset:59313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59313*FLEN/8, x4, x1, x2) - -inst_19772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81007fff; valaddr_reg:x3; val_offset:59316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59316*FLEN/8, x4, x1, x2) - -inst_19773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x8100ffff; valaddr_reg:x3; val_offset:59319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59319*FLEN/8, x4, x1, x2) - -inst_19774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x8101ffff; valaddr_reg:x3; val_offset:59322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59322*FLEN/8, x4, x1, x2) - -inst_19775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x8103ffff; valaddr_reg:x3; val_offset:59325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59325*FLEN/8, x4, x1, x2) - -inst_19776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x8107ffff; valaddr_reg:x3; val_offset:59328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59328*FLEN/8, x4, x1, x2) - -inst_19777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x810fffff; valaddr_reg:x3; val_offset:59331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59331*FLEN/8, x4, x1, x2) - -inst_19778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x811fffff; valaddr_reg:x3; val_offset:59334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59334*FLEN/8, x4, x1, x2) - -inst_19779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x813fffff; valaddr_reg:x3; val_offset:59337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59337*FLEN/8, x4, x1, x2) - -inst_19780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81400000; valaddr_reg:x3; val_offset:59340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59340*FLEN/8, x4, x1, x2) - -inst_19781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81600000; valaddr_reg:x3; val_offset:59343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59343*FLEN/8, x4, x1, x2) - -inst_19782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81700000; valaddr_reg:x3; val_offset:59346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59346*FLEN/8, x4, x1, x2) - -inst_19783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x81780000; valaddr_reg:x3; val_offset:59349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59349*FLEN/8, x4, x1, x2) - -inst_19784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817c0000; valaddr_reg:x3; val_offset:59352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59352*FLEN/8, x4, x1, x2) - -inst_19785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817e0000; valaddr_reg:x3; val_offset:59355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59355*FLEN/8, x4, x1, x2) - -inst_19786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817f0000; valaddr_reg:x3; val_offset:59358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59358*FLEN/8, x4, x1, x2) - -inst_19787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817f8000; valaddr_reg:x3; val_offset:59361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59361*FLEN/8, x4, x1, x2) - -inst_19788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817fc000; valaddr_reg:x3; val_offset:59364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59364*FLEN/8, x4, x1, x2) - -inst_19789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817fe000; valaddr_reg:x3; val_offset:59367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59367*FLEN/8, x4, x1, x2) - -inst_19790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817ff000; valaddr_reg:x3; val_offset:59370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59370*FLEN/8, x4, x1, x2) - -inst_19791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817ff800; valaddr_reg:x3; val_offset:59373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59373*FLEN/8, x4, x1, x2) - -inst_19792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817ffc00; valaddr_reg:x3; val_offset:59376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59376*FLEN/8, x4, x1, x2) - -inst_19793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817ffe00; valaddr_reg:x3; val_offset:59379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59379*FLEN/8, x4, x1, x2) - -inst_19794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817fff00; valaddr_reg:x3; val_offset:59382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59382*FLEN/8, x4, x1, x2) - -inst_19795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817fff80; valaddr_reg:x3; val_offset:59385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59385*FLEN/8, x4, x1, x2) - -inst_19796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817fffc0; valaddr_reg:x3; val_offset:59388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59388*FLEN/8, x4, x1, x2) - -inst_19797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817fffe0; valaddr_reg:x3; val_offset:59391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59391*FLEN/8, x4, x1, x2) - -inst_19798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817ffff0; valaddr_reg:x3; val_offset:59394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59394*FLEN/8, x4, x1, x2) - -inst_19799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817ffff8; valaddr_reg:x3; val_offset:59397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59397*FLEN/8, x4, x1, x2) - -inst_19800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817ffffc; valaddr_reg:x3; val_offset:59400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59400*FLEN/8, x4, x1, x2) - -inst_19801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817ffffe; valaddr_reg:x3; val_offset:59403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59403*FLEN/8, x4, x1, x2) - -inst_19802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; -op3val:0x817fffff; valaddr_reg:x3; val_offset:59406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59406*FLEN/8, x4, x1, x2) - -inst_19803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe000000; valaddr_reg:x3; val_offset:59409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59409*FLEN/8, x4, x1, x2) - -inst_19804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe000001; valaddr_reg:x3; val_offset:59412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59412*FLEN/8, x4, x1, x2) - -inst_19805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe000003; valaddr_reg:x3; val_offset:59415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59415*FLEN/8, x4, x1, x2) - -inst_19806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe000007; valaddr_reg:x3; val_offset:59418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59418*FLEN/8, x4, x1, x2) - -inst_19807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe00000f; valaddr_reg:x3; val_offset:59421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59421*FLEN/8, x4, x1, x2) - -inst_19808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe00001f; valaddr_reg:x3; val_offset:59424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59424*FLEN/8, x4, x1, x2) - -inst_19809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe00003f; valaddr_reg:x3; val_offset:59427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59427*FLEN/8, x4, x1, x2) - -inst_19810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe00007f; valaddr_reg:x3; val_offset:59430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59430*FLEN/8, x4, x1, x2) - -inst_19811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe0000ff; valaddr_reg:x3; val_offset:59433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59433*FLEN/8, x4, x1, x2) - -inst_19812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe0001ff; valaddr_reg:x3; val_offset:59436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59436*FLEN/8, x4, x1, x2) - -inst_19813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe0003ff; valaddr_reg:x3; val_offset:59439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59439*FLEN/8, x4, x1, x2) - -inst_19814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe0007ff; valaddr_reg:x3; val_offset:59442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59442*FLEN/8, x4, x1, x2) - -inst_19815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe000fff; valaddr_reg:x3; val_offset:59445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59445*FLEN/8, x4, x1, x2) - -inst_19816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe001fff; valaddr_reg:x3; val_offset:59448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59448*FLEN/8, x4, x1, x2) - -inst_19817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe003fff; valaddr_reg:x3; val_offset:59451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59451*FLEN/8, x4, x1, x2) - -inst_19818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe007fff; valaddr_reg:x3; val_offset:59454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59454*FLEN/8, x4, x1, x2) - -inst_19819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe00ffff; valaddr_reg:x3; val_offset:59457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59457*FLEN/8, x4, x1, x2) - -inst_19820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe01ffff; valaddr_reg:x3; val_offset:59460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59460*FLEN/8, x4, x1, x2) - -inst_19821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe03ffff; valaddr_reg:x3; val_offset:59463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59463*FLEN/8, x4, x1, x2) - -inst_19822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe07ffff; valaddr_reg:x3; val_offset:59466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59466*FLEN/8, x4, x1, x2) - -inst_19823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe0fffff; valaddr_reg:x3; val_offset:59469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59469*FLEN/8, x4, x1, x2) - -inst_19824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe1fffff; valaddr_reg:x3; val_offset:59472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59472*FLEN/8, x4, x1, x2) - -inst_19825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe3fffff; valaddr_reg:x3; val_offset:59475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59475*FLEN/8, x4, x1, x2) - -inst_19826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe400000; valaddr_reg:x3; val_offset:59478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59478*FLEN/8, x4, x1, x2) - -inst_19827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe600000; valaddr_reg:x3; val_offset:59481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59481*FLEN/8, x4, x1, x2) - -inst_19828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe700000; valaddr_reg:x3; val_offset:59484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59484*FLEN/8, x4, x1, x2) - -inst_19829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe780000; valaddr_reg:x3; val_offset:59487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59487*FLEN/8, x4, x1, x2) - -inst_19830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7c0000; valaddr_reg:x3; val_offset:59490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59490*FLEN/8, x4, x1, x2) - -inst_19831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7e0000; valaddr_reg:x3; val_offset:59493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59493*FLEN/8, x4, x1, x2) - -inst_19832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7f0000; valaddr_reg:x3; val_offset:59496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59496*FLEN/8, x4, x1, x2) - -inst_19833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7f8000; valaddr_reg:x3; val_offset:59499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59499*FLEN/8, x4, x1, x2) - -inst_19834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7fc000; valaddr_reg:x3; val_offset:59502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59502*FLEN/8, x4, x1, x2) - -inst_19835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7fe000; valaddr_reg:x3; val_offset:59505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59505*FLEN/8, x4, x1, x2) - -inst_19836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7ff000; valaddr_reg:x3; val_offset:59508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59508*FLEN/8, x4, x1, x2) - -inst_19837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7ff800; valaddr_reg:x3; val_offset:59511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59511*FLEN/8, x4, x1, x2) - -inst_19838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7ffc00; valaddr_reg:x3; val_offset:59514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59514*FLEN/8, x4, x1, x2) - -inst_19839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7ffe00; valaddr_reg:x3; val_offset:59517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59517*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_156) - -inst_19840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7fff00; valaddr_reg:x3; val_offset:59520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59520*FLEN/8, x4, x1, x2) - -inst_19841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7fff80; valaddr_reg:x3; val_offset:59523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59523*FLEN/8, x4, x1, x2) - -inst_19842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7fffc0; valaddr_reg:x3; val_offset:59526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59526*FLEN/8, x4, x1, x2) - -inst_19843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7fffe0; valaddr_reg:x3; val_offset:59529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59529*FLEN/8, x4, x1, x2) - -inst_19844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7ffff0; valaddr_reg:x3; val_offset:59532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59532*FLEN/8, x4, x1, x2) - -inst_19845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7ffff8; valaddr_reg:x3; val_offset:59535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59535*FLEN/8, x4, x1, x2) - -inst_19846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7ffffc; valaddr_reg:x3; val_offset:59538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59538*FLEN/8, x4, x1, x2) - -inst_19847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7ffffe; valaddr_reg:x3; val_offset:59541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59541*FLEN/8, x4, x1, x2) - -inst_19848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xfe7fffff; valaddr_reg:x3; val_offset:59544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59544*FLEN/8, x4, x1, x2) - -inst_19849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff000001; valaddr_reg:x3; val_offset:59547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59547*FLEN/8, x4, x1, x2) - -inst_19850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff000003; valaddr_reg:x3; val_offset:59550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59550*FLEN/8, x4, x1, x2) - -inst_19851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff000007; valaddr_reg:x3; val_offset:59553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59553*FLEN/8, x4, x1, x2) - -inst_19852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff199999; valaddr_reg:x3; val_offset:59556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59556*FLEN/8, x4, x1, x2) - -inst_19853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff249249; valaddr_reg:x3; val_offset:59559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59559*FLEN/8, x4, x1, x2) - -inst_19854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff333333; valaddr_reg:x3; val_offset:59562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59562*FLEN/8, x4, x1, x2) - -inst_19855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:59565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59565*FLEN/8, x4, x1, x2) - -inst_19856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:59568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59568*FLEN/8, x4, x1, x2) - -inst_19857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff444444; valaddr_reg:x3; val_offset:59571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59571*FLEN/8, x4, x1, x2) - -inst_19858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:59574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59574*FLEN/8, x4, x1, x2) - -inst_19859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:59577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59577*FLEN/8, x4, x1, x2) - -inst_19860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff666666; valaddr_reg:x3; val_offset:59580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59580*FLEN/8, x4, x1, x2) - -inst_19861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:59583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59583*FLEN/8, x4, x1, x2) - -inst_19862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:59586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59586*FLEN/8, x4, x1, x2) - -inst_19863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:59589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59589*FLEN/8, x4, x1, x2) - -inst_19864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:59592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59592*FLEN/8, x4, x1, x2) - -inst_19865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:59595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59595*FLEN/8, x4, x1, x2) - -inst_19866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:59598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59598*FLEN/8, x4, x1, x2) - -inst_19867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:59601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59601*FLEN/8, x4, x1, x2) - -inst_19868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:59604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59604*FLEN/8, x4, x1, x2) - -inst_19869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:59607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59607*FLEN/8, x4, x1, x2) - -inst_19870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:59610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59610*FLEN/8, x4, x1, x2) - -inst_19871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:59613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59613*FLEN/8, x4, x1, x2) - -inst_19872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:59616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59616*FLEN/8, x4, x1, x2) - -inst_19873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:59619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59619*FLEN/8, x4, x1, x2) - -inst_19874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:59622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59622*FLEN/8, x4, x1, x2) - -inst_19875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:59625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59625*FLEN/8, x4, x1, x2) - -inst_19876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:59628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59628*FLEN/8, x4, x1, x2) - -inst_19877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:59631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59631*FLEN/8, x4, x1, x2) - -inst_19878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:59634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59634*FLEN/8, x4, x1, x2) - -inst_19879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:59637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59637*FLEN/8, x4, x1, x2) - -inst_19880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:59640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59640*FLEN/8, x4, x1, x2) - -inst_19881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe800000; valaddr_reg:x3; val_offset:59643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59643*FLEN/8, x4, x1, x2) - -inst_19882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe800001; valaddr_reg:x3; val_offset:59646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59646*FLEN/8, x4, x1, x2) - -inst_19883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe800003; valaddr_reg:x3; val_offset:59649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59649*FLEN/8, x4, x1, x2) - -inst_19884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe800007; valaddr_reg:x3; val_offset:59652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59652*FLEN/8, x4, x1, x2) - -inst_19885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe80000f; valaddr_reg:x3; val_offset:59655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59655*FLEN/8, x4, x1, x2) - -inst_19886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe80001f; valaddr_reg:x3; val_offset:59658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59658*FLEN/8, x4, x1, x2) - -inst_19887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe80003f; valaddr_reg:x3; val_offset:59661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59661*FLEN/8, x4, x1, x2) - -inst_19888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe80007f; valaddr_reg:x3; val_offset:59664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59664*FLEN/8, x4, x1, x2) - -inst_19889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe8000ff; valaddr_reg:x3; val_offset:59667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59667*FLEN/8, x4, x1, x2) - -inst_19890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe8001ff; valaddr_reg:x3; val_offset:59670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59670*FLEN/8, x4, x1, x2) - -inst_19891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe8003ff; valaddr_reg:x3; val_offset:59673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59673*FLEN/8, x4, x1, x2) - -inst_19892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe8007ff; valaddr_reg:x3; val_offset:59676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59676*FLEN/8, x4, x1, x2) - -inst_19893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe800fff; valaddr_reg:x3; val_offset:59679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59679*FLEN/8, x4, x1, x2) - -inst_19894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe801fff; valaddr_reg:x3; val_offset:59682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59682*FLEN/8, x4, x1, x2) - -inst_19895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe803fff; valaddr_reg:x3; val_offset:59685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59685*FLEN/8, x4, x1, x2) - -inst_19896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe807fff; valaddr_reg:x3; val_offset:59688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59688*FLEN/8, x4, x1, x2) - -inst_19897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe80ffff; valaddr_reg:x3; val_offset:59691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59691*FLEN/8, x4, x1, x2) - -inst_19898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe81ffff; valaddr_reg:x3; val_offset:59694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59694*FLEN/8, x4, x1, x2) - -inst_19899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe83ffff; valaddr_reg:x3; val_offset:59697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59697*FLEN/8, x4, x1, x2) - -inst_19900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe87ffff; valaddr_reg:x3; val_offset:59700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59700*FLEN/8, x4, x1, x2) - -inst_19901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe8fffff; valaddr_reg:x3; val_offset:59703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59703*FLEN/8, x4, x1, x2) - -inst_19902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xe9fffff; valaddr_reg:x3; val_offset:59706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59706*FLEN/8, x4, x1, x2) - -inst_19903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xebfffff; valaddr_reg:x3; val_offset:59709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59709*FLEN/8, x4, x1, x2) - -inst_19904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xec00000; valaddr_reg:x3; val_offset:59712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59712*FLEN/8, x4, x1, x2) - -inst_19905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xee00000; valaddr_reg:x3; val_offset:59715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59715*FLEN/8, x4, x1, x2) - -inst_19906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xef00000; valaddr_reg:x3; val_offset:59718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59718*FLEN/8, x4, x1, x2) - -inst_19907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xef80000; valaddr_reg:x3; val_offset:59721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59721*FLEN/8, x4, x1, x2) - -inst_19908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefc0000; valaddr_reg:x3; val_offset:59724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59724*FLEN/8, x4, x1, x2) - -inst_19909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefe0000; valaddr_reg:x3; val_offset:59727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59727*FLEN/8, x4, x1, x2) - -inst_19910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeff0000; valaddr_reg:x3; val_offset:59730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59730*FLEN/8, x4, x1, x2) - -inst_19911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeff8000; valaddr_reg:x3; val_offset:59733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59733*FLEN/8, x4, x1, x2) - -inst_19912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeffc000; valaddr_reg:x3; val_offset:59736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59736*FLEN/8, x4, x1, x2) - -inst_19913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeffe000; valaddr_reg:x3; val_offset:59739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59739*FLEN/8, x4, x1, x2) - -inst_19914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefff000; valaddr_reg:x3; val_offset:59742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59742*FLEN/8, x4, x1, x2) - -inst_19915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefff800; valaddr_reg:x3; val_offset:59745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59745*FLEN/8, x4, x1, x2) - -inst_19916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefffc00; valaddr_reg:x3; val_offset:59748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59748*FLEN/8, x4, x1, x2) - -inst_19917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefffe00; valaddr_reg:x3; val_offset:59751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59751*FLEN/8, x4, x1, x2) - -inst_19918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeffff00; valaddr_reg:x3; val_offset:59754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59754*FLEN/8, x4, x1, x2) - -inst_19919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeffff80; valaddr_reg:x3; val_offset:59757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59757*FLEN/8, x4, x1, x2) - -inst_19920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeffffc0; valaddr_reg:x3; val_offset:59760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59760*FLEN/8, x4, x1, x2) - -inst_19921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeffffe0; valaddr_reg:x3; val_offset:59763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59763*FLEN/8, x4, x1, x2) - -inst_19922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefffff0; valaddr_reg:x3; val_offset:59766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59766*FLEN/8, x4, x1, x2) - -inst_19923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefffff8; valaddr_reg:x3; val_offset:59769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59769*FLEN/8, x4, x1, x2) - -inst_19924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefffffc; valaddr_reg:x3; val_offset:59772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59772*FLEN/8, x4, x1, x2) - -inst_19925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xefffffe; valaddr_reg:x3; val_offset:59775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59775*FLEN/8, x4, x1, x2) - -inst_19926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; -op3val:0xeffffff; valaddr_reg:x3; val_offset:59778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59778*FLEN/8, x4, x1, x2) - -inst_19927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24800000; valaddr_reg:x3; val_offset:59781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59781*FLEN/8, x4, x1, x2) - -inst_19928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24800001; valaddr_reg:x3; val_offset:59784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59784*FLEN/8, x4, x1, x2) - -inst_19929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24800003; valaddr_reg:x3; val_offset:59787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59787*FLEN/8, x4, x1, x2) - -inst_19930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24800007; valaddr_reg:x3; val_offset:59790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59790*FLEN/8, x4, x1, x2) - -inst_19931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x2480000f; valaddr_reg:x3; val_offset:59793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59793*FLEN/8, x4, x1, x2) - -inst_19932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x2480001f; valaddr_reg:x3; val_offset:59796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59796*FLEN/8, x4, x1, x2) - -inst_19933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x2480003f; valaddr_reg:x3; val_offset:59799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59799*FLEN/8, x4, x1, x2) - -inst_19934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x2480007f; valaddr_reg:x3; val_offset:59802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59802*FLEN/8, x4, x1, x2) - -inst_19935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x248000ff; valaddr_reg:x3; val_offset:59805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59805*FLEN/8, x4, x1, x2) - -inst_19936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x248001ff; valaddr_reg:x3; val_offset:59808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59808*FLEN/8, x4, x1, x2) - -inst_19937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x248003ff; valaddr_reg:x3; val_offset:59811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59811*FLEN/8, x4, x1, x2) - -inst_19938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x248007ff; valaddr_reg:x3; val_offset:59814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59814*FLEN/8, x4, x1, x2) - -inst_19939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24800fff; valaddr_reg:x3; val_offset:59817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59817*FLEN/8, x4, x1, x2) - -inst_19940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24801fff; valaddr_reg:x3; val_offset:59820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59820*FLEN/8, x4, x1, x2) - -inst_19941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24803fff; valaddr_reg:x3; val_offset:59823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59823*FLEN/8, x4, x1, x2) - -inst_19942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24807fff; valaddr_reg:x3; val_offset:59826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59826*FLEN/8, x4, x1, x2) - -inst_19943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x2480ffff; valaddr_reg:x3; val_offset:59829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59829*FLEN/8, x4, x1, x2) - -inst_19944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x2481ffff; valaddr_reg:x3; val_offset:59832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59832*FLEN/8, x4, x1, x2) - -inst_19945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x2483ffff; valaddr_reg:x3; val_offset:59835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59835*FLEN/8, x4, x1, x2) - -inst_19946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x2487ffff; valaddr_reg:x3; val_offset:59838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59838*FLEN/8, x4, x1, x2) - -inst_19947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x248fffff; valaddr_reg:x3; val_offset:59841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59841*FLEN/8, x4, x1, x2) - -inst_19948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x249fffff; valaddr_reg:x3; val_offset:59844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59844*FLEN/8, x4, x1, x2) - -inst_19949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24bfffff; valaddr_reg:x3; val_offset:59847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59847*FLEN/8, x4, x1, x2) - -inst_19950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24c00000; valaddr_reg:x3; val_offset:59850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59850*FLEN/8, x4, x1, x2) - -inst_19951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24e00000; valaddr_reg:x3; val_offset:59853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59853*FLEN/8, x4, x1, x2) - -inst_19952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24f00000; valaddr_reg:x3; val_offset:59856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59856*FLEN/8, x4, x1, x2) - -inst_19953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24f80000; valaddr_reg:x3; val_offset:59859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59859*FLEN/8, x4, x1, x2) - -inst_19954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fc0000; valaddr_reg:x3; val_offset:59862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59862*FLEN/8, x4, x1, x2) - -inst_19955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fe0000; valaddr_reg:x3; val_offset:59865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59865*FLEN/8, x4, x1, x2) - -inst_19956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ff0000; valaddr_reg:x3; val_offset:59868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59868*FLEN/8, x4, x1, x2) - -inst_19957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ff8000; valaddr_reg:x3; val_offset:59871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59871*FLEN/8, x4, x1, x2) - -inst_19958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ffc000; valaddr_reg:x3; val_offset:59874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59874*FLEN/8, x4, x1, x2) - -inst_19959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ffe000; valaddr_reg:x3; val_offset:59877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59877*FLEN/8, x4, x1, x2) - -inst_19960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fff000; valaddr_reg:x3; val_offset:59880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59880*FLEN/8, x4, x1, x2) - -inst_19961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fff800; valaddr_reg:x3; val_offset:59883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59883*FLEN/8, x4, x1, x2) - -inst_19962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fffc00; valaddr_reg:x3; val_offset:59886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59886*FLEN/8, x4, x1, x2) - -inst_19963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fffe00; valaddr_reg:x3; val_offset:59889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59889*FLEN/8, x4, x1, x2) - -inst_19964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ffff00; valaddr_reg:x3; val_offset:59892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59892*FLEN/8, x4, x1, x2) - -inst_19965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ffff80; valaddr_reg:x3; val_offset:59895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59895*FLEN/8, x4, x1, x2) - -inst_19966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ffffc0; valaddr_reg:x3; val_offset:59898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59898*FLEN/8, x4, x1, x2) - -inst_19967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ffffe0; valaddr_reg:x3; val_offset:59901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59901*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_157) - -inst_19968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fffff0; valaddr_reg:x3; val_offset:59904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59904*FLEN/8, x4, x1, x2) - -inst_19969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fffff8; valaddr_reg:x3; val_offset:59907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59907*FLEN/8, x4, x1, x2) - -inst_19970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fffffc; valaddr_reg:x3; val_offset:59910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59910*FLEN/8, x4, x1, x2) - -inst_19971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24fffffe; valaddr_reg:x3; val_offset:59913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59913*FLEN/8, x4, x1, x2) - -inst_19972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x24ffffff; valaddr_reg:x3; val_offset:59916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59916*FLEN/8, x4, x1, x2) - -inst_19973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3f800001; valaddr_reg:x3; val_offset:59919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59919*FLEN/8, x4, x1, x2) - -inst_19974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3f800003; valaddr_reg:x3; val_offset:59922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59922*FLEN/8, x4, x1, x2) - -inst_19975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3f800007; valaddr_reg:x3; val_offset:59925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59925*FLEN/8, x4, x1, x2) - -inst_19976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3f999999; valaddr_reg:x3; val_offset:59928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59928*FLEN/8, x4, x1, x2) - -inst_19977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:59931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59931*FLEN/8, x4, x1, x2) - -inst_19978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:59934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59934*FLEN/8, x4, x1, x2) - -inst_19979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:59937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59937*FLEN/8, x4, x1, x2) - -inst_19980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:59940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59940*FLEN/8, x4, x1, x2) - -inst_19981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:59943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59943*FLEN/8, x4, x1, x2) - -inst_19982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:59946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59946*FLEN/8, x4, x1, x2) - -inst_19983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:59949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59949*FLEN/8, x4, x1, x2) - -inst_19984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:59952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59952*FLEN/8, x4, x1, x2) - -inst_19985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:59955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59955*FLEN/8, x4, x1, x2) - -inst_19986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:59958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59958*FLEN/8, x4, x1, x2) - -inst_19987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:59961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59961*FLEN/8, x4, x1, x2) - -inst_19988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:59964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59964*FLEN/8, x4, x1, x2) - -inst_19989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:59967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59967*FLEN/8, x4, x1, x2) - -inst_19990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:59970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59970*FLEN/8, x4, x1, x2) - -inst_19991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:59973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59973*FLEN/8, x4, x1, x2) - -inst_19992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:59976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59976*FLEN/8, x4, x1, x2) - -inst_19993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:59979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59979*FLEN/8, x4, x1, x2) - -inst_19994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:59982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59982*FLEN/8, x4, x1, x2) - -inst_19995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:59985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59985*FLEN/8, x4, x1, x2) - -inst_19996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:59988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59988*FLEN/8, x4, x1, x2) - -inst_19997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:59991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59991*FLEN/8, x4, x1, x2) - -inst_19998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:59994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59994*FLEN/8, x4, x1, x2) - -inst_19999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:59997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59997*FLEN/8, x4, x1, x2) - -inst_20000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:60000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60000*FLEN/8, x4, x1, x2) - -inst_20001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:60003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60003*FLEN/8, x4, x1, x2) - -inst_20002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:60006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60006*FLEN/8, x4, x1, x2) - -inst_20003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:60009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60009*FLEN/8, x4, x1, x2) - -inst_20004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:60012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60012*FLEN/8, x4, x1, x2) - -inst_20005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4000000; valaddr_reg:x3; val_offset:60015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60015*FLEN/8, x4, x1, x2) - -inst_20006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4000001; valaddr_reg:x3; val_offset:60018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60018*FLEN/8, x4, x1, x2) - -inst_20007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4000003; valaddr_reg:x3; val_offset:60021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60021*FLEN/8, x4, x1, x2) - -inst_20008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4000007; valaddr_reg:x3; val_offset:60024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60024*FLEN/8, x4, x1, x2) - -inst_20009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x400000f; valaddr_reg:x3; val_offset:60027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60027*FLEN/8, x4, x1, x2) - -inst_20010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x400001f; valaddr_reg:x3; val_offset:60030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60030*FLEN/8, x4, x1, x2) - -inst_20011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x400003f; valaddr_reg:x3; val_offset:60033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60033*FLEN/8, x4, x1, x2) - -inst_20012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x400007f; valaddr_reg:x3; val_offset:60036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60036*FLEN/8, x4, x1, x2) - -inst_20013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x40000ff; valaddr_reg:x3; val_offset:60039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60039*FLEN/8, x4, x1, x2) - -inst_20014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x40001ff; valaddr_reg:x3; val_offset:60042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60042*FLEN/8, x4, x1, x2) - -inst_20015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x40003ff; valaddr_reg:x3; val_offset:60045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60045*FLEN/8, x4, x1, x2) - -inst_20016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x40007ff; valaddr_reg:x3; val_offset:60048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60048*FLEN/8, x4, x1, x2) - -inst_20017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4000fff; valaddr_reg:x3; val_offset:60051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60051*FLEN/8, x4, x1, x2) - -inst_20018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4001fff; valaddr_reg:x3; val_offset:60054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60054*FLEN/8, x4, x1, x2) - -inst_20019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4003fff; valaddr_reg:x3; val_offset:60057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60057*FLEN/8, x4, x1, x2) - -inst_20020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4007fff; valaddr_reg:x3; val_offset:60060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60060*FLEN/8, x4, x1, x2) - -inst_20021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x400ffff; valaddr_reg:x3; val_offset:60063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60063*FLEN/8, x4, x1, x2) - -inst_20022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x401ffff; valaddr_reg:x3; val_offset:60066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60066*FLEN/8, x4, x1, x2) - -inst_20023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x403ffff; valaddr_reg:x3; val_offset:60069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60069*FLEN/8, x4, x1, x2) - -inst_20024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x407ffff; valaddr_reg:x3; val_offset:60072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60072*FLEN/8, x4, x1, x2) - -inst_20025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x40fffff; valaddr_reg:x3; val_offset:60075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60075*FLEN/8, x4, x1, x2) - -inst_20026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x41fffff; valaddr_reg:x3; val_offset:60078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60078*FLEN/8, x4, x1, x2) - -inst_20027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x43fffff; valaddr_reg:x3; val_offset:60081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60081*FLEN/8, x4, x1, x2) - -inst_20028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4400000; valaddr_reg:x3; val_offset:60084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60084*FLEN/8, x4, x1, x2) - -inst_20029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4600000; valaddr_reg:x3; val_offset:60087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60087*FLEN/8, x4, x1, x2) - -inst_20030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4700000; valaddr_reg:x3; val_offset:60090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60090*FLEN/8, x4, x1, x2) - -inst_20031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x4780000; valaddr_reg:x3; val_offset:60093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60093*FLEN/8, x4, x1, x2) - -inst_20032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47c0000; valaddr_reg:x3; val_offset:60096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60096*FLEN/8, x4, x1, x2) - -inst_20033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47e0000; valaddr_reg:x3; val_offset:60099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60099*FLEN/8, x4, x1, x2) - -inst_20034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47f0000; valaddr_reg:x3; val_offset:60102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60102*FLEN/8, x4, x1, x2) - -inst_20035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47f8000; valaddr_reg:x3; val_offset:60105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60105*FLEN/8, x4, x1, x2) - -inst_20036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47fc000; valaddr_reg:x3; val_offset:60108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60108*FLEN/8, x4, x1, x2) - -inst_20037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47fe000; valaddr_reg:x3; val_offset:60111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60111*FLEN/8, x4, x1, x2) - -inst_20038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47ff000; valaddr_reg:x3; val_offset:60114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60114*FLEN/8, x4, x1, x2) - -inst_20039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47ff800; valaddr_reg:x3; val_offset:60117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60117*FLEN/8, x4, x1, x2) - -inst_20040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47ffc00; valaddr_reg:x3; val_offset:60120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60120*FLEN/8, x4, x1, x2) - -inst_20041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47ffe00; valaddr_reg:x3; val_offset:60123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60123*FLEN/8, x4, x1, x2) - -inst_20042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47fff00; valaddr_reg:x3; val_offset:60126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60126*FLEN/8, x4, x1, x2) - -inst_20043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47fff80; valaddr_reg:x3; val_offset:60129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60129*FLEN/8, x4, x1, x2) - -inst_20044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47fffc0; valaddr_reg:x3; val_offset:60132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60132*FLEN/8, x4, x1, x2) - -inst_20045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47fffe0; valaddr_reg:x3; val_offset:60135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60135*FLEN/8, x4, x1, x2) - -inst_20046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47ffff0; valaddr_reg:x3; val_offset:60138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60138*FLEN/8, x4, x1, x2) - -inst_20047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47ffff8; valaddr_reg:x3; val_offset:60141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60141*FLEN/8, x4, x1, x2) - -inst_20048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47ffffc; valaddr_reg:x3; val_offset:60144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60144*FLEN/8, x4, x1, x2) - -inst_20049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47ffffe; valaddr_reg:x3; val_offset:60147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60147*FLEN/8, x4, x1, x2) - -inst_20050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; -op3val:0x47fffff; valaddr_reg:x3; val_offset:60150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60150*FLEN/8, x4, x1, x2) - -inst_20051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24000000; valaddr_reg:x3; val_offset:60153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60153*FLEN/8, x4, x1, x2) - -inst_20052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24000001; valaddr_reg:x3; val_offset:60156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60156*FLEN/8, x4, x1, x2) - -inst_20053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24000003; valaddr_reg:x3; val_offset:60159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60159*FLEN/8, x4, x1, x2) - -inst_20054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24000007; valaddr_reg:x3; val_offset:60162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60162*FLEN/8, x4, x1, x2) - -inst_20055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x2400000f; valaddr_reg:x3; val_offset:60165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60165*FLEN/8, x4, x1, x2) - -inst_20056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x2400001f; valaddr_reg:x3; val_offset:60168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60168*FLEN/8, x4, x1, x2) - -inst_20057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x2400003f; valaddr_reg:x3; val_offset:60171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60171*FLEN/8, x4, x1, x2) - -inst_20058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x2400007f; valaddr_reg:x3; val_offset:60174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60174*FLEN/8, x4, x1, x2) - -inst_20059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x240000ff; valaddr_reg:x3; val_offset:60177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60177*FLEN/8, x4, x1, x2) - -inst_20060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x240001ff; valaddr_reg:x3; val_offset:60180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60180*FLEN/8, x4, x1, x2) - -inst_20061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x240003ff; valaddr_reg:x3; val_offset:60183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60183*FLEN/8, x4, x1, x2) - -inst_20062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x240007ff; valaddr_reg:x3; val_offset:60186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60186*FLEN/8, x4, x1, x2) - -inst_20063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24000fff; valaddr_reg:x3; val_offset:60189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60189*FLEN/8, x4, x1, x2) - -inst_20064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24001fff; valaddr_reg:x3; val_offset:60192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60192*FLEN/8, x4, x1, x2) - -inst_20065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24003fff; valaddr_reg:x3; val_offset:60195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60195*FLEN/8, x4, x1, x2) - -inst_20066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24007fff; valaddr_reg:x3; val_offset:60198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60198*FLEN/8, x4, x1, x2) - -inst_20067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x2400ffff; valaddr_reg:x3; val_offset:60201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60201*FLEN/8, x4, x1, x2) - -inst_20068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x2401ffff; valaddr_reg:x3; val_offset:60204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60204*FLEN/8, x4, x1, x2) - -inst_20069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x2403ffff; valaddr_reg:x3; val_offset:60207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60207*FLEN/8, x4, x1, x2) - -inst_20070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x2407ffff; valaddr_reg:x3; val_offset:60210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60210*FLEN/8, x4, x1, x2) - -inst_20071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x240fffff; valaddr_reg:x3; val_offset:60213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60213*FLEN/8, x4, x1, x2) - -inst_20072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x241fffff; valaddr_reg:x3; val_offset:60216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60216*FLEN/8, x4, x1, x2) - -inst_20073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x243fffff; valaddr_reg:x3; val_offset:60219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60219*FLEN/8, x4, x1, x2) - -inst_20074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24400000; valaddr_reg:x3; val_offset:60222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60222*FLEN/8, x4, x1, x2) - -inst_20075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24600000; valaddr_reg:x3; val_offset:60225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60225*FLEN/8, x4, x1, x2) - -inst_20076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24700000; valaddr_reg:x3; val_offset:60228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60228*FLEN/8, x4, x1, x2) - -inst_20077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x24780000; valaddr_reg:x3; val_offset:60231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60231*FLEN/8, x4, x1, x2) - -inst_20078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247c0000; valaddr_reg:x3; val_offset:60234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60234*FLEN/8, x4, x1, x2) - -inst_20079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247e0000; valaddr_reg:x3; val_offset:60237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60237*FLEN/8, x4, x1, x2) - -inst_20080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247f0000; valaddr_reg:x3; val_offset:60240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60240*FLEN/8, x4, x1, x2) - -inst_20081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247f8000; valaddr_reg:x3; val_offset:60243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60243*FLEN/8, x4, x1, x2) - -inst_20082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247fc000; valaddr_reg:x3; val_offset:60246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60246*FLEN/8, x4, x1, x2) - -inst_20083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247fe000; valaddr_reg:x3; val_offset:60249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60249*FLEN/8, x4, x1, x2) - -inst_20084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247ff000; valaddr_reg:x3; val_offset:60252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60252*FLEN/8, x4, x1, x2) - -inst_20085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247ff800; valaddr_reg:x3; val_offset:60255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60255*FLEN/8, x4, x1, x2) - -inst_20086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247ffc00; valaddr_reg:x3; val_offset:60258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60258*FLEN/8, x4, x1, x2) - -inst_20087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247ffe00; valaddr_reg:x3; val_offset:60261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60261*FLEN/8, x4, x1, x2) - -inst_20088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247fff00; valaddr_reg:x3; val_offset:60264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60264*FLEN/8, x4, x1, x2) - -inst_20089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247fff80; valaddr_reg:x3; val_offset:60267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60267*FLEN/8, x4, x1, x2) - -inst_20090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247fffc0; valaddr_reg:x3; val_offset:60270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60270*FLEN/8, x4, x1, x2) - -inst_20091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247fffe0; valaddr_reg:x3; val_offset:60273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60273*FLEN/8, x4, x1, x2) - -inst_20092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247ffff0; valaddr_reg:x3; val_offset:60276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60276*FLEN/8, x4, x1, x2) - -inst_20093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247ffff8; valaddr_reg:x3; val_offset:60279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60279*FLEN/8, x4, x1, x2) - -inst_20094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247ffffc; valaddr_reg:x3; val_offset:60282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60282*FLEN/8, x4, x1, x2) - -inst_20095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247ffffe; valaddr_reg:x3; val_offset:60285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60285*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_158) - -inst_20096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x247fffff; valaddr_reg:x3; val_offset:60288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60288*FLEN/8, x4, x1, x2) - -inst_20097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3f800001; valaddr_reg:x3; val_offset:60291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60291*FLEN/8, x4, x1, x2) - -inst_20098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3f800003; valaddr_reg:x3; val_offset:60294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60294*FLEN/8, x4, x1, x2) - -inst_20099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3f800007; valaddr_reg:x3; val_offset:60297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60297*FLEN/8, x4, x1, x2) - -inst_20100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3f999999; valaddr_reg:x3; val_offset:60300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60300*FLEN/8, x4, x1, x2) - -inst_20101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:60303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60303*FLEN/8, x4, x1, x2) - -inst_20102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:60306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60306*FLEN/8, x4, x1, x2) - -inst_20103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:60309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60309*FLEN/8, x4, x1, x2) - -inst_20104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:60312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60312*FLEN/8, x4, x1, x2) - -inst_20105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:60315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60315*FLEN/8, x4, x1, x2) - -inst_20106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:60318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60318*FLEN/8, x4, x1, x2) - -inst_20107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:60321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60321*FLEN/8, x4, x1, x2) - -inst_20108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:60324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60324*FLEN/8, x4, x1, x2) - -inst_20109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:60327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60327*FLEN/8, x4, x1, x2) - -inst_20110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:60330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60330*FLEN/8, x4, x1, x2) - -inst_20111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:60333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60333*FLEN/8, x4, x1, x2) - -inst_20112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:60336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60336*FLEN/8, x4, x1, x2) - -inst_20113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:60339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60339*FLEN/8, x4, x1, x2) - -inst_20114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:60342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60342*FLEN/8, x4, x1, x2) - -inst_20115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:60345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60345*FLEN/8, x4, x1, x2) - -inst_20116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:60348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60348*FLEN/8, x4, x1, x2) - -inst_20117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:60351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60351*FLEN/8, x4, x1, x2) - -inst_20118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:60354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60354*FLEN/8, x4, x1, x2) - -inst_20119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:60357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60357*FLEN/8, x4, x1, x2) - -inst_20120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:60360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60360*FLEN/8, x4, x1, x2) - -inst_20121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:60363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60363*FLEN/8, x4, x1, x2) - -inst_20122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:60366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60366*FLEN/8, x4, x1, x2) - -inst_20123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:60369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60369*FLEN/8, x4, x1, x2) - -inst_20124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:60372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60372*FLEN/8, x4, x1, x2) - -inst_20125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:60375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60375*FLEN/8, x4, x1, x2) - -inst_20126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:60378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60378*FLEN/8, x4, x1, x2) - -inst_20127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:60381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60381*FLEN/8, x4, x1, x2) - -inst_20128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:60384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60384*FLEN/8, x4, x1, x2) - -inst_20129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88000000; valaddr_reg:x3; val_offset:60387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60387*FLEN/8, x4, x1, x2) - -inst_20130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88000001; valaddr_reg:x3; val_offset:60390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60390*FLEN/8, x4, x1, x2) - -inst_20131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88000003; valaddr_reg:x3; val_offset:60393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60393*FLEN/8, x4, x1, x2) - -inst_20132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88000007; valaddr_reg:x3; val_offset:60396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60396*FLEN/8, x4, x1, x2) - -inst_20133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8800000f; valaddr_reg:x3; val_offset:60399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60399*FLEN/8, x4, x1, x2) - -inst_20134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8800001f; valaddr_reg:x3; val_offset:60402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60402*FLEN/8, x4, x1, x2) - -inst_20135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8800003f; valaddr_reg:x3; val_offset:60405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60405*FLEN/8, x4, x1, x2) - -inst_20136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8800007f; valaddr_reg:x3; val_offset:60408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60408*FLEN/8, x4, x1, x2) - -inst_20137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x880000ff; valaddr_reg:x3; val_offset:60411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60411*FLEN/8, x4, x1, x2) - -inst_20138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x880001ff; valaddr_reg:x3; val_offset:60414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60414*FLEN/8, x4, x1, x2) - -inst_20139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x880003ff; valaddr_reg:x3; val_offset:60417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60417*FLEN/8, x4, x1, x2) - -inst_20140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x880007ff; valaddr_reg:x3; val_offset:60420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60420*FLEN/8, x4, x1, x2) - -inst_20141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88000fff; valaddr_reg:x3; val_offset:60423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60423*FLEN/8, x4, x1, x2) - -inst_20142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88001fff; valaddr_reg:x3; val_offset:60426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60426*FLEN/8, x4, x1, x2) - -inst_20143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88003fff; valaddr_reg:x3; val_offset:60429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60429*FLEN/8, x4, x1, x2) - -inst_20144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88007fff; valaddr_reg:x3; val_offset:60432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60432*FLEN/8, x4, x1, x2) - -inst_20145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8800ffff; valaddr_reg:x3; val_offset:60435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60435*FLEN/8, x4, x1, x2) - -inst_20146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8801ffff; valaddr_reg:x3; val_offset:60438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60438*FLEN/8, x4, x1, x2) - -inst_20147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8803ffff; valaddr_reg:x3; val_offset:60441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60441*FLEN/8, x4, x1, x2) - -inst_20148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x8807ffff; valaddr_reg:x3; val_offset:60444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60444*FLEN/8, x4, x1, x2) - -inst_20149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x880fffff; valaddr_reg:x3; val_offset:60447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60447*FLEN/8, x4, x1, x2) - -inst_20150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x881fffff; valaddr_reg:x3; val_offset:60450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60450*FLEN/8, x4, x1, x2) - -inst_20151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x883fffff; valaddr_reg:x3; val_offset:60453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60453*FLEN/8, x4, x1, x2) - -inst_20152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88400000; valaddr_reg:x3; val_offset:60456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60456*FLEN/8, x4, x1, x2) - -inst_20153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88600000; valaddr_reg:x3; val_offset:60459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60459*FLEN/8, x4, x1, x2) - -inst_20154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88700000; valaddr_reg:x3; val_offset:60462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60462*FLEN/8, x4, x1, x2) - -inst_20155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x88780000; valaddr_reg:x3; val_offset:60465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60465*FLEN/8, x4, x1, x2) - -inst_20156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887c0000; valaddr_reg:x3; val_offset:60468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60468*FLEN/8, x4, x1, x2) - -inst_20157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887e0000; valaddr_reg:x3; val_offset:60471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60471*FLEN/8, x4, x1, x2) - -inst_20158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887f0000; valaddr_reg:x3; val_offset:60474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60474*FLEN/8, x4, x1, x2) - -inst_20159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887f8000; valaddr_reg:x3; val_offset:60477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60477*FLEN/8, x4, x1, x2) - -inst_20160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887fc000; valaddr_reg:x3; val_offset:60480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60480*FLEN/8, x4, x1, x2) - -inst_20161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887fe000; valaddr_reg:x3; val_offset:60483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60483*FLEN/8, x4, x1, x2) - -inst_20162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887ff000; valaddr_reg:x3; val_offset:60486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60486*FLEN/8, x4, x1, x2) - -inst_20163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887ff800; valaddr_reg:x3; val_offset:60489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60489*FLEN/8, x4, x1, x2) - -inst_20164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887ffc00; valaddr_reg:x3; val_offset:60492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60492*FLEN/8, x4, x1, x2) - -inst_20165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887ffe00; valaddr_reg:x3; val_offset:60495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60495*FLEN/8, x4, x1, x2) - -inst_20166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887fff00; valaddr_reg:x3; val_offset:60498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60498*FLEN/8, x4, x1, x2) - -inst_20167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887fff80; valaddr_reg:x3; val_offset:60501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60501*FLEN/8, x4, x1, x2) - -inst_20168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887fffc0; valaddr_reg:x3; val_offset:60504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60504*FLEN/8, x4, x1, x2) - -inst_20169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887fffe0; valaddr_reg:x3; val_offset:60507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60507*FLEN/8, x4, x1, x2) - -inst_20170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887ffff0; valaddr_reg:x3; val_offset:60510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60510*FLEN/8, x4, x1, x2) - -inst_20171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887ffff8; valaddr_reg:x3; val_offset:60513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60513*FLEN/8, x4, x1, x2) - -inst_20172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887ffffc; valaddr_reg:x3; val_offset:60516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60516*FLEN/8, x4, x1, x2) - -inst_20173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887ffffe; valaddr_reg:x3; val_offset:60519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60519*FLEN/8, x4, x1, x2) - -inst_20174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; -op3val:0x887fffff; valaddr_reg:x3; val_offset:60522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60522*FLEN/8, x4, x1, x2) - -inst_20175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4800000; valaddr_reg:x3; val_offset:60525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60525*FLEN/8, x4, x1, x2) - -inst_20176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4800001; valaddr_reg:x3; val_offset:60528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60528*FLEN/8, x4, x1, x2) - -inst_20177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4800003; valaddr_reg:x3; val_offset:60531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60531*FLEN/8, x4, x1, x2) - -inst_20178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4800007; valaddr_reg:x3; val_offset:60534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60534*FLEN/8, x4, x1, x2) - -inst_20179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf480000f; valaddr_reg:x3; val_offset:60537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60537*FLEN/8, x4, x1, x2) - -inst_20180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf480001f; valaddr_reg:x3; val_offset:60540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60540*FLEN/8, x4, x1, x2) - -inst_20181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf480003f; valaddr_reg:x3; val_offset:60543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60543*FLEN/8, x4, x1, x2) - -inst_20182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf480007f; valaddr_reg:x3; val_offset:60546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60546*FLEN/8, x4, x1, x2) - -inst_20183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf48000ff; valaddr_reg:x3; val_offset:60549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60549*FLEN/8, x4, x1, x2) - -inst_20184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf48001ff; valaddr_reg:x3; val_offset:60552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60552*FLEN/8, x4, x1, x2) - -inst_20185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf48003ff; valaddr_reg:x3; val_offset:60555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60555*FLEN/8, x4, x1, x2) - -inst_20186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf48007ff; valaddr_reg:x3; val_offset:60558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60558*FLEN/8, x4, x1, x2) - -inst_20187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4800fff; valaddr_reg:x3; val_offset:60561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60561*FLEN/8, x4, x1, x2) - -inst_20188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4801fff; valaddr_reg:x3; val_offset:60564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60564*FLEN/8, x4, x1, x2) - -inst_20189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4803fff; valaddr_reg:x3; val_offset:60567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60567*FLEN/8, x4, x1, x2) - -inst_20190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4807fff; valaddr_reg:x3; val_offset:60570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60570*FLEN/8, x4, x1, x2) - -inst_20191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf480ffff; valaddr_reg:x3; val_offset:60573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60573*FLEN/8, x4, x1, x2) - -inst_20192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf481ffff; valaddr_reg:x3; val_offset:60576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60576*FLEN/8, x4, x1, x2) - -inst_20193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf483ffff; valaddr_reg:x3; val_offset:60579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60579*FLEN/8, x4, x1, x2) - -inst_20194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf487ffff; valaddr_reg:x3; val_offset:60582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60582*FLEN/8, x4, x1, x2) - -inst_20195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf48fffff; valaddr_reg:x3; val_offset:60585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60585*FLEN/8, x4, x1, x2) - -inst_20196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf49fffff; valaddr_reg:x3; val_offset:60588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60588*FLEN/8, x4, x1, x2) - -inst_20197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4bfffff; valaddr_reg:x3; val_offset:60591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60591*FLEN/8, x4, x1, x2) - -inst_20198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4c00000; valaddr_reg:x3; val_offset:60594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60594*FLEN/8, x4, x1, x2) - -inst_20199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4e00000; valaddr_reg:x3; val_offset:60597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60597*FLEN/8, x4, x1, x2) - -inst_20200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4f00000; valaddr_reg:x3; val_offset:60600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60600*FLEN/8, x4, x1, x2) - -inst_20201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4f80000; valaddr_reg:x3; val_offset:60603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60603*FLEN/8, x4, x1, x2) - -inst_20202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fc0000; valaddr_reg:x3; val_offset:60606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60606*FLEN/8, x4, x1, x2) - -inst_20203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fe0000; valaddr_reg:x3; val_offset:60609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60609*FLEN/8, x4, x1, x2) - -inst_20204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ff0000; valaddr_reg:x3; val_offset:60612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60612*FLEN/8, x4, x1, x2) - -inst_20205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ff8000; valaddr_reg:x3; val_offset:60615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60615*FLEN/8, x4, x1, x2) - -inst_20206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ffc000; valaddr_reg:x3; val_offset:60618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60618*FLEN/8, x4, x1, x2) - -inst_20207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ffe000; valaddr_reg:x3; val_offset:60621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60621*FLEN/8, x4, x1, x2) - -inst_20208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fff000; valaddr_reg:x3; val_offset:60624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60624*FLEN/8, x4, x1, x2) - -inst_20209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fff800; valaddr_reg:x3; val_offset:60627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60627*FLEN/8, x4, x1, x2) - -inst_20210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fffc00; valaddr_reg:x3; val_offset:60630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60630*FLEN/8, x4, x1, x2) - -inst_20211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fffe00; valaddr_reg:x3; val_offset:60633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60633*FLEN/8, x4, x1, x2) - -inst_20212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ffff00; valaddr_reg:x3; val_offset:60636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60636*FLEN/8, x4, x1, x2) - -inst_20213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ffff80; valaddr_reg:x3; val_offset:60639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60639*FLEN/8, x4, x1, x2) - -inst_20214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ffffc0; valaddr_reg:x3; val_offset:60642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60642*FLEN/8, x4, x1, x2) - -inst_20215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ffffe0; valaddr_reg:x3; val_offset:60645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60645*FLEN/8, x4, x1, x2) - -inst_20216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fffff0; valaddr_reg:x3; val_offset:60648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60648*FLEN/8, x4, x1, x2) - -inst_20217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fffff8; valaddr_reg:x3; val_offset:60651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60651*FLEN/8, x4, x1, x2) - -inst_20218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fffffc; valaddr_reg:x3; val_offset:60654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60654*FLEN/8, x4, x1, x2) - -inst_20219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4fffffe; valaddr_reg:x3; val_offset:60657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60657*FLEN/8, x4, x1, x2) - -inst_20220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xf4ffffff; valaddr_reg:x3; val_offset:60660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60660*FLEN/8, x4, x1, x2) - -inst_20221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff000001; valaddr_reg:x3; val_offset:60663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60663*FLEN/8, x4, x1, x2) - -inst_20222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff000003; valaddr_reg:x3; val_offset:60666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60666*FLEN/8, x4, x1, x2) - -inst_20223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff000007; valaddr_reg:x3; val_offset:60669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60669*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_159) - -inst_20224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff199999; valaddr_reg:x3; val_offset:60672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60672*FLEN/8, x4, x1, x2) - -inst_20225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff249249; valaddr_reg:x3; val_offset:60675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60675*FLEN/8, x4, x1, x2) - -inst_20226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff333333; valaddr_reg:x3; val_offset:60678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60678*FLEN/8, x4, x1, x2) - -inst_20227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:60681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60681*FLEN/8, x4, x1, x2) - -inst_20228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:60684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60684*FLEN/8, x4, x1, x2) - -inst_20229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff444444; valaddr_reg:x3; val_offset:60687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60687*FLEN/8, x4, x1, x2) - -inst_20230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:60690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60690*FLEN/8, x4, x1, x2) - -inst_20231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:60693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60693*FLEN/8, x4, x1, x2) - -inst_20232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff666666; valaddr_reg:x3; val_offset:60696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60696*FLEN/8, x4, x1, x2) - -inst_20233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:60699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60699*FLEN/8, x4, x1, x2) - -inst_20234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:60702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60702*FLEN/8, x4, x1, x2) - -inst_20235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:60705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60705*FLEN/8, x4, x1, x2) - -inst_20236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:60708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60708*FLEN/8, x4, x1, x2) - -inst_20237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f000000; valaddr_reg:x3; val_offset:60711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60711*FLEN/8, x4, x1, x2) - -inst_20238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f000001; valaddr_reg:x3; val_offset:60714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60714*FLEN/8, x4, x1, x2) - -inst_20239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f000003; valaddr_reg:x3; val_offset:60717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60717*FLEN/8, x4, x1, x2) - -inst_20240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f000007; valaddr_reg:x3; val_offset:60720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60720*FLEN/8, x4, x1, x2) - -inst_20241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f00000f; valaddr_reg:x3; val_offset:60723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60723*FLEN/8, x4, x1, x2) - -inst_20242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f00001f; valaddr_reg:x3; val_offset:60726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60726*FLEN/8, x4, x1, x2) - -inst_20243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f00003f; valaddr_reg:x3; val_offset:60729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60729*FLEN/8, x4, x1, x2) - -inst_20244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f00007f; valaddr_reg:x3; val_offset:60732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60732*FLEN/8, x4, x1, x2) - -inst_20245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f0000ff; valaddr_reg:x3; val_offset:60735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60735*FLEN/8, x4, x1, x2) - -inst_20246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f0001ff; valaddr_reg:x3; val_offset:60738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60738*FLEN/8, x4, x1, x2) - -inst_20247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f0003ff; valaddr_reg:x3; val_offset:60741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60741*FLEN/8, x4, x1, x2) - -inst_20248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f0007ff; valaddr_reg:x3; val_offset:60744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60744*FLEN/8, x4, x1, x2) - -inst_20249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f000fff; valaddr_reg:x3; val_offset:60747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60747*FLEN/8, x4, x1, x2) - -inst_20250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f001fff; valaddr_reg:x3; val_offset:60750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60750*FLEN/8, x4, x1, x2) - -inst_20251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f003fff; valaddr_reg:x3; val_offset:60753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60753*FLEN/8, x4, x1, x2) - -inst_20252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f007fff; valaddr_reg:x3; val_offset:60756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60756*FLEN/8, x4, x1, x2) - -inst_20253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f00ffff; valaddr_reg:x3; val_offset:60759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60759*FLEN/8, x4, x1, x2) - -inst_20254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f01ffff; valaddr_reg:x3; val_offset:60762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60762*FLEN/8, x4, x1, x2) - -inst_20255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f03ffff; valaddr_reg:x3; val_offset:60765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60765*FLEN/8, x4, x1, x2) - -inst_20256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f07ffff; valaddr_reg:x3; val_offset:60768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60768*FLEN/8, x4, x1, x2) - -inst_20257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f0fffff; valaddr_reg:x3; val_offset:60771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60771*FLEN/8, x4, x1, x2) - -inst_20258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f199999; valaddr_reg:x3; val_offset:60774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60774*FLEN/8, x4, x1, x2) - -inst_20259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f1fffff; valaddr_reg:x3; val_offset:60777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60777*FLEN/8, x4, x1, x2) - -inst_20260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f249249; valaddr_reg:x3; val_offset:60780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60780*FLEN/8, x4, x1, x2) - -inst_20261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f333333; valaddr_reg:x3; val_offset:60783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60783*FLEN/8, x4, x1, x2) - -inst_20262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:60786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60786*FLEN/8, x4, x1, x2) - -inst_20263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:60789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60789*FLEN/8, x4, x1, x2) - -inst_20264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f3fffff; valaddr_reg:x3; val_offset:60792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60792*FLEN/8, x4, x1, x2) - -inst_20265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f400000; valaddr_reg:x3; val_offset:60795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60795*FLEN/8, x4, x1, x2) - -inst_20266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f444444; valaddr_reg:x3; val_offset:60798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60798*FLEN/8, x4, x1, x2) - -inst_20267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:60801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60801*FLEN/8, x4, x1, x2) - -inst_20268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:60804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60804*FLEN/8, x4, x1, x2) - -inst_20269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f600000; valaddr_reg:x3; val_offset:60807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60807*FLEN/8, x4, x1, x2) - -inst_20270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f666666; valaddr_reg:x3; val_offset:60810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60810*FLEN/8, x4, x1, x2) - -inst_20271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:60813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60813*FLEN/8, x4, x1, x2) - -inst_20272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f700000; valaddr_reg:x3; val_offset:60816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60816*FLEN/8, x4, x1, x2) - -inst_20273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f780000; valaddr_reg:x3; val_offset:60819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60819*FLEN/8, x4, x1, x2) - -inst_20274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7c0000; valaddr_reg:x3; val_offset:60822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60822*FLEN/8, x4, x1, x2) - -inst_20275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7e0000; valaddr_reg:x3; val_offset:60825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60825*FLEN/8, x4, x1, x2) - -inst_20276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7f0000; valaddr_reg:x3; val_offset:60828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60828*FLEN/8, x4, x1, x2) - -inst_20277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7f8000; valaddr_reg:x3; val_offset:60831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60831*FLEN/8, x4, x1, x2) - -inst_20278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7fc000; valaddr_reg:x3; val_offset:60834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60834*FLEN/8, x4, x1, x2) - -inst_20279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7fe000; valaddr_reg:x3; val_offset:60837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60837*FLEN/8, x4, x1, x2) - -inst_20280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7ff000; valaddr_reg:x3; val_offset:60840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60840*FLEN/8, x4, x1, x2) - -inst_20281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7ff800; valaddr_reg:x3; val_offset:60843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60843*FLEN/8, x4, x1, x2) - -inst_20282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7ffc00; valaddr_reg:x3; val_offset:60846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60846*FLEN/8, x4, x1, x2) - -inst_20283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7ffe00; valaddr_reg:x3; val_offset:60849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60849*FLEN/8, x4, x1, x2) - -inst_20284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7fff00; valaddr_reg:x3; val_offset:60852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60852*FLEN/8, x4, x1, x2) - -inst_20285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7fff80; valaddr_reg:x3; val_offset:60855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60855*FLEN/8, x4, x1, x2) - -inst_20286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7fffc0; valaddr_reg:x3; val_offset:60858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60858*FLEN/8, x4, x1, x2) - -inst_20287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7fffe0; valaddr_reg:x3; val_offset:60861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60861*FLEN/8, x4, x1, x2) - -inst_20288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7ffff0; valaddr_reg:x3; val_offset:60864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60864*FLEN/8, x4, x1, x2) - -inst_20289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:60867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60867*FLEN/8, x4, x1, x2) - -inst_20290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:60870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60870*FLEN/8, x4, x1, x2) - -inst_20291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:60873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60873*FLEN/8, x4, x1, x2) - -inst_20292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; -op3val:0x7f7fffff; valaddr_reg:x3; val_offset:60876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60876*FLEN/8, x4, x1, x2) - -inst_20293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3f800001; valaddr_reg:x3; val_offset:60879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60879*FLEN/8, x4, x1, x2) - -inst_20294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3f800003; valaddr_reg:x3; val_offset:60882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60882*FLEN/8, x4, x1, x2) - -inst_20295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3f800007; valaddr_reg:x3; val_offset:60885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60885*FLEN/8, x4, x1, x2) - -inst_20296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3f999999; valaddr_reg:x3; val_offset:60888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60888*FLEN/8, x4, x1, x2) - -inst_20297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:60891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60891*FLEN/8, x4, x1, x2) - -inst_20298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:60894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60894*FLEN/8, x4, x1, x2) - -inst_20299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:60897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60897*FLEN/8, x4, x1, x2) - -inst_20300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:60900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60900*FLEN/8, x4, x1, x2) - -inst_20301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:60903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60903*FLEN/8, x4, x1, x2) - -inst_20302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:60906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60906*FLEN/8, x4, x1, x2) - -inst_20303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:60909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60909*FLEN/8, x4, x1, x2) - -inst_20304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:60912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60912*FLEN/8, x4, x1, x2) - -inst_20305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:60915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60915*FLEN/8, x4, x1, x2) - -inst_20306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:60918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60918*FLEN/8, x4, x1, x2) - -inst_20307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:60921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60921*FLEN/8, x4, x1, x2) - -inst_20308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:60924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60924*FLEN/8, x4, x1, x2) - -inst_20309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47800000; valaddr_reg:x3; val_offset:60927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60927*FLEN/8, x4, x1, x2) - -inst_20310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47800001; valaddr_reg:x3; val_offset:60930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60930*FLEN/8, x4, x1, x2) - -inst_20311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47800003; valaddr_reg:x3; val_offset:60933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60933*FLEN/8, x4, x1, x2) - -inst_20312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47800007; valaddr_reg:x3; val_offset:60936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60936*FLEN/8, x4, x1, x2) - -inst_20313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x4780000f; valaddr_reg:x3; val_offset:60939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60939*FLEN/8, x4, x1, x2) - -inst_20314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x4780001f; valaddr_reg:x3; val_offset:60942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60942*FLEN/8, x4, x1, x2) - -inst_20315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x4780003f; valaddr_reg:x3; val_offset:60945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60945*FLEN/8, x4, x1, x2) - -inst_20316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x4780007f; valaddr_reg:x3; val_offset:60948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60948*FLEN/8, x4, x1, x2) - -inst_20317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x478000ff; valaddr_reg:x3; val_offset:60951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60951*FLEN/8, x4, x1, x2) - -inst_20318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x478001ff; valaddr_reg:x3; val_offset:60954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60954*FLEN/8, x4, x1, x2) - -inst_20319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x478003ff; valaddr_reg:x3; val_offset:60957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60957*FLEN/8, x4, x1, x2) - -inst_20320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x478007ff; valaddr_reg:x3; val_offset:60960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60960*FLEN/8, x4, x1, x2) - -inst_20321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47800fff; valaddr_reg:x3; val_offset:60963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60963*FLEN/8, x4, x1, x2) - -inst_20322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47801fff; valaddr_reg:x3; val_offset:60966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60966*FLEN/8, x4, x1, x2) - -inst_20323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47803fff; valaddr_reg:x3; val_offset:60969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60969*FLEN/8, x4, x1, x2) - -inst_20324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47807fff; valaddr_reg:x3; val_offset:60972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60972*FLEN/8, x4, x1, x2) - -inst_20325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x4780ffff; valaddr_reg:x3; val_offset:60975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60975*FLEN/8, x4, x1, x2) - -inst_20326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x4781ffff; valaddr_reg:x3; val_offset:60978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60978*FLEN/8, x4, x1, x2) - -inst_20327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x4783ffff; valaddr_reg:x3; val_offset:60981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60981*FLEN/8, x4, x1, x2) - -inst_20328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x4787ffff; valaddr_reg:x3; val_offset:60984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60984*FLEN/8, x4, x1, x2) - -inst_20329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x478fffff; valaddr_reg:x3; val_offset:60987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60987*FLEN/8, x4, x1, x2) - -inst_20330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x479fffff; valaddr_reg:x3; val_offset:60990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60990*FLEN/8, x4, x1, x2) - -inst_20331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47bfffff; valaddr_reg:x3; val_offset:60993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60993*FLEN/8, x4, x1, x2) - -inst_20332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47c00000; valaddr_reg:x3; val_offset:60996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60996*FLEN/8, x4, x1, x2) - -inst_20333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47e00000; valaddr_reg:x3; val_offset:60999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60999*FLEN/8, x4, x1, x2) - -inst_20334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47f00000; valaddr_reg:x3; val_offset:61002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61002*FLEN/8, x4, x1, x2) - -inst_20335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47f80000; valaddr_reg:x3; val_offset:61005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61005*FLEN/8, x4, x1, x2) - -inst_20336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fc0000; valaddr_reg:x3; val_offset:61008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61008*FLEN/8, x4, x1, x2) - -inst_20337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fe0000; valaddr_reg:x3; val_offset:61011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61011*FLEN/8, x4, x1, x2) - -inst_20338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ff0000; valaddr_reg:x3; val_offset:61014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61014*FLEN/8, x4, x1, x2) - -inst_20339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ff8000; valaddr_reg:x3; val_offset:61017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61017*FLEN/8, x4, x1, x2) - -inst_20340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ffc000; valaddr_reg:x3; val_offset:61020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61020*FLEN/8, x4, x1, x2) - -inst_20341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ffe000; valaddr_reg:x3; val_offset:61023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61023*FLEN/8, x4, x1, x2) - -inst_20342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fff000; valaddr_reg:x3; val_offset:61026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61026*FLEN/8, x4, x1, x2) - -inst_20343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fff800; valaddr_reg:x3; val_offset:61029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61029*FLEN/8, x4, x1, x2) - -inst_20344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fffc00; valaddr_reg:x3; val_offset:61032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61032*FLEN/8, x4, x1, x2) - -inst_20345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fffe00; valaddr_reg:x3; val_offset:61035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61035*FLEN/8, x4, x1, x2) - -inst_20346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ffff00; valaddr_reg:x3; val_offset:61038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61038*FLEN/8, x4, x1, x2) - -inst_20347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ffff80; valaddr_reg:x3; val_offset:61041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61041*FLEN/8, x4, x1, x2) - -inst_20348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ffffc0; valaddr_reg:x3; val_offset:61044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61044*FLEN/8, x4, x1, x2) - -inst_20349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ffffe0; valaddr_reg:x3; val_offset:61047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61047*FLEN/8, x4, x1, x2) - -inst_20350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fffff0; valaddr_reg:x3; val_offset:61050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61050*FLEN/8, x4, x1, x2) - -inst_20351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fffff8; valaddr_reg:x3; val_offset:61053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61053*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_160) - -inst_20352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fffffc; valaddr_reg:x3; val_offset:61056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61056*FLEN/8, x4, x1, x2) - -inst_20353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47fffffe; valaddr_reg:x3; val_offset:61059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61059*FLEN/8, x4, x1, x2) - -inst_20354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; -op3val:0x47ffffff; valaddr_reg:x3; val_offset:61062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61062*FLEN/8, x4, x1, x2) - -inst_20355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80000000; valaddr_reg:x3; val_offset:61065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61065*FLEN/8, x4, x1, x2) - -inst_20356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:61068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61068*FLEN/8, x4, x1, x2) - -inst_20357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:61071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61071*FLEN/8, x4, x1, x2) - -inst_20358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:61074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61074*FLEN/8, x4, x1, x2) - -inst_20359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8000000f; valaddr_reg:x3; val_offset:61077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61077*FLEN/8, x4, x1, x2) - -inst_20360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8000001f; valaddr_reg:x3; val_offset:61080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61080*FLEN/8, x4, x1, x2) - -inst_20361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8000003f; valaddr_reg:x3; val_offset:61083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61083*FLEN/8, x4, x1, x2) - -inst_20362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8000007f; valaddr_reg:x3; val_offset:61086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61086*FLEN/8, x4, x1, x2) - -inst_20363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x800000ff; valaddr_reg:x3; val_offset:61089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61089*FLEN/8, x4, x1, x2) - -inst_20364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x800001ff; valaddr_reg:x3; val_offset:61092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61092*FLEN/8, x4, x1, x2) - -inst_20365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x800003ff; valaddr_reg:x3; val_offset:61095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61095*FLEN/8, x4, x1, x2) - -inst_20366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x800007ff; valaddr_reg:x3; val_offset:61098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61098*FLEN/8, x4, x1, x2) - -inst_20367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80000fff; valaddr_reg:x3; val_offset:61101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61101*FLEN/8, x4, x1, x2) - -inst_20368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80001fff; valaddr_reg:x3; val_offset:61104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61104*FLEN/8, x4, x1, x2) - -inst_20369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80003fff; valaddr_reg:x3; val_offset:61107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61107*FLEN/8, x4, x1, x2) - -inst_20370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80007fff; valaddr_reg:x3; val_offset:61110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61110*FLEN/8, x4, x1, x2) - -inst_20371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8000ffff; valaddr_reg:x3; val_offset:61113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61113*FLEN/8, x4, x1, x2) - -inst_20372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8001ffff; valaddr_reg:x3; val_offset:61116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61116*FLEN/8, x4, x1, x2) - -inst_20373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8003ffff; valaddr_reg:x3; val_offset:61119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61119*FLEN/8, x4, x1, x2) - -inst_20374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8007ffff; valaddr_reg:x3; val_offset:61122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61122*FLEN/8, x4, x1, x2) - -inst_20375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x800fffff; valaddr_reg:x3; val_offset:61125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61125*FLEN/8, x4, x1, x2) - -inst_20376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:61128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61128*FLEN/8, x4, x1, x2) - -inst_20377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x801fffff; valaddr_reg:x3; val_offset:61131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61131*FLEN/8, x4, x1, x2) - -inst_20378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:61134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61134*FLEN/8, x4, x1, x2) - -inst_20379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:61137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61137*FLEN/8, x4, x1, x2) - -inst_20380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:61140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61140*FLEN/8, x4, x1, x2) - -inst_20381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:61143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61143*FLEN/8, x4, x1, x2) - -inst_20382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x803fffff; valaddr_reg:x3; val_offset:61146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61146*FLEN/8, x4, x1, x2) - -inst_20383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80400000; valaddr_reg:x3; val_offset:61149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61149*FLEN/8, x4, x1, x2) - -inst_20384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:61152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61152*FLEN/8, x4, x1, x2) - -inst_20385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:61155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61155*FLEN/8, x4, x1, x2) - -inst_20386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:61158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61158*FLEN/8, x4, x1, x2) - -inst_20387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80600000; valaddr_reg:x3; val_offset:61161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61161*FLEN/8, x4, x1, x2) - -inst_20388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:61164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61164*FLEN/8, x4, x1, x2) - -inst_20389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:61167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61167*FLEN/8, x4, x1, x2) - -inst_20390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80700000; valaddr_reg:x3; val_offset:61170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61170*FLEN/8, x4, x1, x2) - -inst_20391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x80780000; valaddr_reg:x3; val_offset:61173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61173*FLEN/8, x4, x1, x2) - -inst_20392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807c0000; valaddr_reg:x3; val_offset:61176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61176*FLEN/8, x4, x1, x2) - -inst_20393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807e0000; valaddr_reg:x3; val_offset:61179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61179*FLEN/8, x4, x1, x2) - -inst_20394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807f0000; valaddr_reg:x3; val_offset:61182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61182*FLEN/8, x4, x1, x2) - -inst_20395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807f8000; valaddr_reg:x3; val_offset:61185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61185*FLEN/8, x4, x1, x2) - -inst_20396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807fc000; valaddr_reg:x3; val_offset:61188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61188*FLEN/8, x4, x1, x2) - -inst_20397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807fe000; valaddr_reg:x3; val_offset:61191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61191*FLEN/8, x4, x1, x2) - -inst_20398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807ff000; valaddr_reg:x3; val_offset:61194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61194*FLEN/8, x4, x1, x2) - -inst_20399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807ff800; valaddr_reg:x3; val_offset:61197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61197*FLEN/8, x4, x1, x2) - -inst_20400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807ffc00; valaddr_reg:x3; val_offset:61200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61200*FLEN/8, x4, x1, x2) - -inst_20401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807ffe00; valaddr_reg:x3; val_offset:61203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61203*FLEN/8, x4, x1, x2) - -inst_20402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807fff00; valaddr_reg:x3; val_offset:61206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61206*FLEN/8, x4, x1, x2) - -inst_20403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807fff80; valaddr_reg:x3; val_offset:61209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61209*FLEN/8, x4, x1, x2) - -inst_20404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807fffc0; valaddr_reg:x3; val_offset:61212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61212*FLEN/8, x4, x1, x2) - -inst_20405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807fffe0; valaddr_reg:x3; val_offset:61215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61215*FLEN/8, x4, x1, x2) - -inst_20406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807ffff0; valaddr_reg:x3; val_offset:61218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61218*FLEN/8, x4, x1, x2) - -inst_20407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:61221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61221*FLEN/8, x4, x1, x2) - -inst_20408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:61224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61224*FLEN/8, x4, x1, x2) - -inst_20409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:61227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61227*FLEN/8, x4, x1, x2) - -inst_20410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; -op3val:0x807fffff; valaddr_reg:x3; val_offset:61230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61230*FLEN/8, x4, x1, x2) - -inst_20411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb000000; valaddr_reg:x3; val_offset:61233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61233*FLEN/8, x4, x1, x2) - -inst_20412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb000001; valaddr_reg:x3; val_offset:61236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61236*FLEN/8, x4, x1, x2) - -inst_20413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb000003; valaddr_reg:x3; val_offset:61239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61239*FLEN/8, x4, x1, x2) - -inst_20414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb000007; valaddr_reg:x3; val_offset:61242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61242*FLEN/8, x4, x1, x2) - -inst_20415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb00000f; valaddr_reg:x3; val_offset:61245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61245*FLEN/8, x4, x1, x2) - -inst_20416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb00001f; valaddr_reg:x3; val_offset:61248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61248*FLEN/8, x4, x1, x2) - -inst_20417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb00003f; valaddr_reg:x3; val_offset:61251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61251*FLEN/8, x4, x1, x2) - -inst_20418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb00007f; valaddr_reg:x3; val_offset:61254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61254*FLEN/8, x4, x1, x2) - -inst_20419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb0000ff; valaddr_reg:x3; val_offset:61257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61257*FLEN/8, x4, x1, x2) - -inst_20420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb0001ff; valaddr_reg:x3; val_offset:61260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61260*FLEN/8, x4, x1, x2) - -inst_20421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb0003ff; valaddr_reg:x3; val_offset:61263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61263*FLEN/8, x4, x1, x2) - -inst_20422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb0007ff; valaddr_reg:x3; val_offset:61266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61266*FLEN/8, x4, x1, x2) - -inst_20423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb000fff; valaddr_reg:x3; val_offset:61269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61269*FLEN/8, x4, x1, x2) - -inst_20424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb001fff; valaddr_reg:x3; val_offset:61272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61272*FLEN/8, x4, x1, x2) - -inst_20425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb003fff; valaddr_reg:x3; val_offset:61275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61275*FLEN/8, x4, x1, x2) - -inst_20426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb007fff; valaddr_reg:x3; val_offset:61278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61278*FLEN/8, x4, x1, x2) - -inst_20427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb00ffff; valaddr_reg:x3; val_offset:61281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61281*FLEN/8, x4, x1, x2) - -inst_20428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb01ffff; valaddr_reg:x3; val_offset:61284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61284*FLEN/8, x4, x1, x2) - -inst_20429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb03ffff; valaddr_reg:x3; val_offset:61287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61287*FLEN/8, x4, x1, x2) - -inst_20430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb07ffff; valaddr_reg:x3; val_offset:61290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61290*FLEN/8, x4, x1, x2) - -inst_20431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb0fffff; valaddr_reg:x3; val_offset:61293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61293*FLEN/8, x4, x1, x2) - -inst_20432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb1fffff; valaddr_reg:x3; val_offset:61296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61296*FLEN/8, x4, x1, x2) - -inst_20433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb3fffff; valaddr_reg:x3; val_offset:61299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61299*FLEN/8, x4, x1, x2) - -inst_20434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb400000; valaddr_reg:x3; val_offset:61302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61302*FLEN/8, x4, x1, x2) - -inst_20435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb600000; valaddr_reg:x3; val_offset:61305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61305*FLEN/8, x4, x1, x2) - -inst_20436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb700000; valaddr_reg:x3; val_offset:61308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61308*FLEN/8, x4, x1, x2) - -inst_20437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb780000; valaddr_reg:x3; val_offset:61311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61311*FLEN/8, x4, x1, x2) - -inst_20438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7c0000; valaddr_reg:x3; val_offset:61314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61314*FLEN/8, x4, x1, x2) - -inst_20439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7e0000; valaddr_reg:x3; val_offset:61317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61317*FLEN/8, x4, x1, x2) - -inst_20440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7f0000; valaddr_reg:x3; val_offset:61320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61320*FLEN/8, x4, x1, x2) - -inst_20441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7f8000; valaddr_reg:x3; val_offset:61323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61323*FLEN/8, x4, x1, x2) - -inst_20442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7fc000; valaddr_reg:x3; val_offset:61326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61326*FLEN/8, x4, x1, x2) - -inst_20443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7fe000; valaddr_reg:x3; val_offset:61329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61329*FLEN/8, x4, x1, x2) - -inst_20444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7ff000; valaddr_reg:x3; val_offset:61332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61332*FLEN/8, x4, x1, x2) - -inst_20445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7ff800; valaddr_reg:x3; val_offset:61335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61335*FLEN/8, x4, x1, x2) - -inst_20446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7ffc00; valaddr_reg:x3; val_offset:61338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61338*FLEN/8, x4, x1, x2) - -inst_20447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7ffe00; valaddr_reg:x3; val_offset:61341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61341*FLEN/8, x4, x1, x2) - -inst_20448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7fff00; valaddr_reg:x3; val_offset:61344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61344*FLEN/8, x4, x1, x2) - -inst_20449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7fff80; valaddr_reg:x3; val_offset:61347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61347*FLEN/8, x4, x1, x2) - -inst_20450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7fffc0; valaddr_reg:x3; val_offset:61350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61350*FLEN/8, x4, x1, x2) - -inst_20451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7fffe0; valaddr_reg:x3; val_offset:61353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61353*FLEN/8, x4, x1, x2) - -inst_20452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7ffff0; valaddr_reg:x3; val_offset:61356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61356*FLEN/8, x4, x1, x2) - -inst_20453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7ffff8; valaddr_reg:x3; val_offset:61359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61359*FLEN/8, x4, x1, x2) - -inst_20454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7ffffc; valaddr_reg:x3; val_offset:61362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61362*FLEN/8, x4, x1, x2) - -inst_20455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7ffffe; valaddr_reg:x3; val_offset:61365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61365*FLEN/8, x4, x1, x2) - -inst_20456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xfb7fffff; valaddr_reg:x3; val_offset:61368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61368*FLEN/8, x4, x1, x2) - -inst_20457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff000001; valaddr_reg:x3; val_offset:61371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61371*FLEN/8, x4, x1, x2) - -inst_20458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff000003; valaddr_reg:x3; val_offset:61374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61374*FLEN/8, x4, x1, x2) - -inst_20459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff000007; valaddr_reg:x3; val_offset:61377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61377*FLEN/8, x4, x1, x2) - -inst_20460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff199999; valaddr_reg:x3; val_offset:61380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61380*FLEN/8, x4, x1, x2) - -inst_20461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff249249; valaddr_reg:x3; val_offset:61383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61383*FLEN/8, x4, x1, x2) - -inst_20462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff333333; valaddr_reg:x3; val_offset:61386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61386*FLEN/8, x4, x1, x2) - -inst_20463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:61389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61389*FLEN/8, x4, x1, x2) - -inst_20464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:61392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61392*FLEN/8, x4, x1, x2) - -inst_20465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff444444; valaddr_reg:x3; val_offset:61395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61395*FLEN/8, x4, x1, x2) - -inst_20466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:61398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61398*FLEN/8, x4, x1, x2) - -inst_20467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:61401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61401*FLEN/8, x4, x1, x2) - -inst_20468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff666666; valaddr_reg:x3; val_offset:61404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61404*FLEN/8, x4, x1, x2) - -inst_20469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:61407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61407*FLEN/8, x4, x1, x2) - -inst_20470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:61410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61410*FLEN/8, x4, x1, x2) - -inst_20471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:61413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61413*FLEN/8, x4, x1, x2) - -inst_20472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:61416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61416*FLEN/8, x4, x1, x2) - -inst_20473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:61419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61419*FLEN/8, x4, x1, x2) - -inst_20474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:61422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61422*FLEN/8, x4, x1, x2) - -inst_20475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:61425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61425*FLEN/8, x4, x1, x2) - -inst_20476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:61428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61428*FLEN/8, x4, x1, x2) - -inst_20477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:61431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61431*FLEN/8, x4, x1, x2) - -inst_20478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:61434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61434*FLEN/8, x4, x1, x2) - -inst_20479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:61437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61437*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_161) - -inst_20480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:61440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61440*FLEN/8, x4, x1, x2) - -inst_20481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:61443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61443*FLEN/8, x4, x1, x2) - -inst_20482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:61446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61446*FLEN/8, x4, x1, x2) - -inst_20483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:61449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61449*FLEN/8, x4, x1, x2) - -inst_20484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:61452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61452*FLEN/8, x4, x1, x2) - -inst_20485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:61455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61455*FLEN/8, x4, x1, x2) - -inst_20486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:61458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61458*FLEN/8, x4, x1, x2) - -inst_20487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:61461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61461*FLEN/8, x4, x1, x2) - -inst_20488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:61464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61464*FLEN/8, x4, x1, x2) - -inst_20489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7000000; valaddr_reg:x3; val_offset:61467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61467*FLEN/8, x4, x1, x2) - -inst_20490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7000001; valaddr_reg:x3; val_offset:61470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61470*FLEN/8, x4, x1, x2) - -inst_20491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7000003; valaddr_reg:x3; val_offset:61473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61473*FLEN/8, x4, x1, x2) - -inst_20492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7000007; valaddr_reg:x3; val_offset:61476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61476*FLEN/8, x4, x1, x2) - -inst_20493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x700000f; valaddr_reg:x3; val_offset:61479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61479*FLEN/8, x4, x1, x2) - -inst_20494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x700001f; valaddr_reg:x3; val_offset:61482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61482*FLEN/8, x4, x1, x2) - -inst_20495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x700003f; valaddr_reg:x3; val_offset:61485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61485*FLEN/8, x4, x1, x2) - -inst_20496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x700007f; valaddr_reg:x3; val_offset:61488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61488*FLEN/8, x4, x1, x2) - -inst_20497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x70000ff; valaddr_reg:x3; val_offset:61491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61491*FLEN/8, x4, x1, x2) - -inst_20498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x70001ff; valaddr_reg:x3; val_offset:61494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61494*FLEN/8, x4, x1, x2) - -inst_20499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x70003ff; valaddr_reg:x3; val_offset:61497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61497*FLEN/8, x4, x1, x2) - -inst_20500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x70007ff; valaddr_reg:x3; val_offset:61500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61500*FLEN/8, x4, x1, x2) - -inst_20501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7000fff; valaddr_reg:x3; val_offset:61503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61503*FLEN/8, x4, x1, x2) - -inst_20502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7001fff; valaddr_reg:x3; val_offset:61506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61506*FLEN/8, x4, x1, x2) - -inst_20503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7003fff; valaddr_reg:x3; val_offset:61509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61509*FLEN/8, x4, x1, x2) - -inst_20504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7007fff; valaddr_reg:x3; val_offset:61512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61512*FLEN/8, x4, x1, x2) - -inst_20505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x700ffff; valaddr_reg:x3; val_offset:61515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61515*FLEN/8, x4, x1, x2) - -inst_20506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x701ffff; valaddr_reg:x3; val_offset:61518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61518*FLEN/8, x4, x1, x2) - -inst_20507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x703ffff; valaddr_reg:x3; val_offset:61521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61521*FLEN/8, x4, x1, x2) - -inst_20508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x707ffff; valaddr_reg:x3; val_offset:61524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61524*FLEN/8, x4, x1, x2) - -inst_20509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x70fffff; valaddr_reg:x3; val_offset:61527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61527*FLEN/8, x4, x1, x2) - -inst_20510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x71fffff; valaddr_reg:x3; val_offset:61530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61530*FLEN/8, x4, x1, x2) - -inst_20511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x73fffff; valaddr_reg:x3; val_offset:61533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61533*FLEN/8, x4, x1, x2) - -inst_20512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7400000; valaddr_reg:x3; val_offset:61536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61536*FLEN/8, x4, x1, x2) - -inst_20513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7600000; valaddr_reg:x3; val_offset:61539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61539*FLEN/8, x4, x1, x2) - -inst_20514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7700000; valaddr_reg:x3; val_offset:61542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61542*FLEN/8, x4, x1, x2) - -inst_20515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x7780000; valaddr_reg:x3; val_offset:61545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61545*FLEN/8, x4, x1, x2) - -inst_20516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77c0000; valaddr_reg:x3; val_offset:61548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61548*FLEN/8, x4, x1, x2) - -inst_20517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77e0000; valaddr_reg:x3; val_offset:61551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61551*FLEN/8, x4, x1, x2) - -inst_20518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77f0000; valaddr_reg:x3; val_offset:61554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61554*FLEN/8, x4, x1, x2) - -inst_20519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77f8000; valaddr_reg:x3; val_offset:61557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61557*FLEN/8, x4, x1, x2) - -inst_20520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77fc000; valaddr_reg:x3; val_offset:61560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61560*FLEN/8, x4, x1, x2) - -inst_20521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77fe000; valaddr_reg:x3; val_offset:61563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61563*FLEN/8, x4, x1, x2) - -inst_20522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77ff000; valaddr_reg:x3; val_offset:61566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61566*FLEN/8, x4, x1, x2) - -inst_20523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77ff800; valaddr_reg:x3; val_offset:61569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61569*FLEN/8, x4, x1, x2) - -inst_20524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77ffc00; valaddr_reg:x3; val_offset:61572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61572*FLEN/8, x4, x1, x2) - -inst_20525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77ffe00; valaddr_reg:x3; val_offset:61575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61575*FLEN/8, x4, x1, x2) - -inst_20526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77fff00; valaddr_reg:x3; val_offset:61578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61578*FLEN/8, x4, x1, x2) - -inst_20527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77fff80; valaddr_reg:x3; val_offset:61581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61581*FLEN/8, x4, x1, x2) - -inst_20528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77fffc0; valaddr_reg:x3; val_offset:61584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61584*FLEN/8, x4, x1, x2) - -inst_20529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77fffe0; valaddr_reg:x3; val_offset:61587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61587*FLEN/8, x4, x1, x2) - -inst_20530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77ffff0; valaddr_reg:x3; val_offset:61590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61590*FLEN/8, x4, x1, x2) - -inst_20531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77ffff8; valaddr_reg:x3; val_offset:61593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61593*FLEN/8, x4, x1, x2) - -inst_20532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77ffffc; valaddr_reg:x3; val_offset:61596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61596*FLEN/8, x4, x1, x2) - -inst_20533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77ffffe; valaddr_reg:x3; val_offset:61599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61599*FLEN/8, x4, x1, x2) - -inst_20534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; -op3val:0x77fffff; valaddr_reg:x3; val_offset:61602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61602*FLEN/8, x4, x1, x2) - -inst_20535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72800000; valaddr_reg:x3; val_offset:61605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61605*FLEN/8, x4, x1, x2) - -inst_20536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72800001; valaddr_reg:x3; val_offset:61608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61608*FLEN/8, x4, x1, x2) - -inst_20537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72800003; valaddr_reg:x3; val_offset:61611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61611*FLEN/8, x4, x1, x2) - -inst_20538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72800007; valaddr_reg:x3; val_offset:61614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61614*FLEN/8, x4, x1, x2) - -inst_20539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7280000f; valaddr_reg:x3; val_offset:61617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61617*FLEN/8, x4, x1, x2) - -inst_20540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7280001f; valaddr_reg:x3; val_offset:61620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61620*FLEN/8, x4, x1, x2) - -inst_20541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7280003f; valaddr_reg:x3; val_offset:61623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61623*FLEN/8, x4, x1, x2) - -inst_20542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7280007f; valaddr_reg:x3; val_offset:61626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61626*FLEN/8, x4, x1, x2) - -inst_20543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x728000ff; valaddr_reg:x3; val_offset:61629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61629*FLEN/8, x4, x1, x2) - -inst_20544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x728001ff; valaddr_reg:x3; val_offset:61632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61632*FLEN/8, x4, x1, x2) - -inst_20545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x728003ff; valaddr_reg:x3; val_offset:61635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61635*FLEN/8, x4, x1, x2) - -inst_20546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x728007ff; valaddr_reg:x3; val_offset:61638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61638*FLEN/8, x4, x1, x2) - -inst_20547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72800fff; valaddr_reg:x3; val_offset:61641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61641*FLEN/8, x4, x1, x2) - -inst_20548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72801fff; valaddr_reg:x3; val_offset:61644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61644*FLEN/8, x4, x1, x2) - -inst_20549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72803fff; valaddr_reg:x3; val_offset:61647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61647*FLEN/8, x4, x1, x2) - -inst_20550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72807fff; valaddr_reg:x3; val_offset:61650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61650*FLEN/8, x4, x1, x2) - -inst_20551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7280ffff; valaddr_reg:x3; val_offset:61653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61653*FLEN/8, x4, x1, x2) - -inst_20552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7281ffff; valaddr_reg:x3; val_offset:61656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61656*FLEN/8, x4, x1, x2) - -inst_20553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7283ffff; valaddr_reg:x3; val_offset:61659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61659*FLEN/8, x4, x1, x2) - -inst_20554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7287ffff; valaddr_reg:x3; val_offset:61662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61662*FLEN/8, x4, x1, x2) - -inst_20555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x728fffff; valaddr_reg:x3; val_offset:61665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61665*FLEN/8, x4, x1, x2) - -inst_20556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x729fffff; valaddr_reg:x3; val_offset:61668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61668*FLEN/8, x4, x1, x2) - -inst_20557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72bfffff; valaddr_reg:x3; val_offset:61671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61671*FLEN/8, x4, x1, x2) - -inst_20558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72c00000; valaddr_reg:x3; val_offset:61674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61674*FLEN/8, x4, x1, x2) - -inst_20559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72e00000; valaddr_reg:x3; val_offset:61677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61677*FLEN/8, x4, x1, x2) - -inst_20560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72f00000; valaddr_reg:x3; val_offset:61680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61680*FLEN/8, x4, x1, x2) - -inst_20561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72f80000; valaddr_reg:x3; val_offset:61683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61683*FLEN/8, x4, x1, x2) - -inst_20562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fc0000; valaddr_reg:x3; val_offset:61686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61686*FLEN/8, x4, x1, x2) - -inst_20563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fe0000; valaddr_reg:x3; val_offset:61689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61689*FLEN/8, x4, x1, x2) - -inst_20564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ff0000; valaddr_reg:x3; val_offset:61692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61692*FLEN/8, x4, x1, x2) - -inst_20565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ff8000; valaddr_reg:x3; val_offset:61695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61695*FLEN/8, x4, x1, x2) - -inst_20566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ffc000; valaddr_reg:x3; val_offset:61698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61698*FLEN/8, x4, x1, x2) - -inst_20567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ffe000; valaddr_reg:x3; val_offset:61701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61701*FLEN/8, x4, x1, x2) - -inst_20568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fff000; valaddr_reg:x3; val_offset:61704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61704*FLEN/8, x4, x1, x2) - -inst_20569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fff800; valaddr_reg:x3; val_offset:61707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61707*FLEN/8, x4, x1, x2) - -inst_20570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fffc00; valaddr_reg:x3; val_offset:61710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61710*FLEN/8, x4, x1, x2) - -inst_20571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fffe00; valaddr_reg:x3; val_offset:61713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61713*FLEN/8, x4, x1, x2) - -inst_20572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ffff00; valaddr_reg:x3; val_offset:61716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61716*FLEN/8, x4, x1, x2) - -inst_20573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ffff80; valaddr_reg:x3; val_offset:61719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61719*FLEN/8, x4, x1, x2) - -inst_20574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ffffc0; valaddr_reg:x3; val_offset:61722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61722*FLEN/8, x4, x1, x2) - -inst_20575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ffffe0; valaddr_reg:x3; val_offset:61725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61725*FLEN/8, x4, x1, x2) - -inst_20576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fffff0; valaddr_reg:x3; val_offset:61728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61728*FLEN/8, x4, x1, x2) - -inst_20577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fffff8; valaddr_reg:x3; val_offset:61731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61731*FLEN/8, x4, x1, x2) - -inst_20578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fffffc; valaddr_reg:x3; val_offset:61734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61734*FLEN/8, x4, x1, x2) - -inst_20579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72fffffe; valaddr_reg:x3; val_offset:61737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61737*FLEN/8, x4, x1, x2) - -inst_20580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x72ffffff; valaddr_reg:x3; val_offset:61740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61740*FLEN/8, x4, x1, x2) - -inst_20581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f000001; valaddr_reg:x3; val_offset:61743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61743*FLEN/8, x4, x1, x2) - -inst_20582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f000003; valaddr_reg:x3; val_offset:61746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61746*FLEN/8, x4, x1, x2) - -inst_20583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f000007; valaddr_reg:x3; val_offset:61749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61749*FLEN/8, x4, x1, x2) - -inst_20584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f199999; valaddr_reg:x3; val_offset:61752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61752*FLEN/8, x4, x1, x2) - -inst_20585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f249249; valaddr_reg:x3; val_offset:61755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61755*FLEN/8, x4, x1, x2) - -inst_20586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f333333; valaddr_reg:x3; val_offset:61758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61758*FLEN/8, x4, x1, x2) - -inst_20587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:61761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61761*FLEN/8, x4, x1, x2) - -inst_20588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:61764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61764*FLEN/8, x4, x1, x2) - -inst_20589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f444444; valaddr_reg:x3; val_offset:61767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61767*FLEN/8, x4, x1, x2) - -inst_20590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:61770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61770*FLEN/8, x4, x1, x2) - -inst_20591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:61773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61773*FLEN/8, x4, x1, x2) - -inst_20592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f666666; valaddr_reg:x3; val_offset:61776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61776*FLEN/8, x4, x1, x2) - -inst_20593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:61779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61779*FLEN/8, x4, x1, x2) - -inst_20594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:61782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61782*FLEN/8, x4, x1, x2) - -inst_20595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:61785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61785*FLEN/8, x4, x1, x2) - -inst_20596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:61788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61788*FLEN/8, x4, x1, x2) - -inst_20597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:61791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61791*FLEN/8, x4, x1, x2) - -inst_20598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:61794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61794*FLEN/8, x4, x1, x2) - -inst_20599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:61797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61797*FLEN/8, x4, x1, x2) - -inst_20600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:61800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61800*FLEN/8, x4, x1, x2) - -inst_20601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:61803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61803*FLEN/8, x4, x1, x2) - -inst_20602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:61806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61806*FLEN/8, x4, x1, x2) - -inst_20603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:61809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61809*FLEN/8, x4, x1, x2) - -inst_20604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:61812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61812*FLEN/8, x4, x1, x2) - -inst_20605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:61815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61815*FLEN/8, x4, x1, x2) - -inst_20606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:61818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61818*FLEN/8, x4, x1, x2) - -inst_20607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:61821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61821*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_162) - -inst_20608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:61824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61824*FLEN/8, x4, x1, x2) - -inst_20609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:61827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61827*FLEN/8, x4, x1, x2) - -inst_20610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:61830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61830*FLEN/8, x4, x1, x2) - -inst_20611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:61833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61833*FLEN/8, x4, x1, x2) - -inst_20612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:61836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61836*FLEN/8, x4, x1, x2) - -inst_20613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b800000; valaddr_reg:x3; val_offset:61839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61839*FLEN/8, x4, x1, x2) - -inst_20614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b800001; valaddr_reg:x3; val_offset:61842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61842*FLEN/8, x4, x1, x2) - -inst_20615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b800003; valaddr_reg:x3; val_offset:61845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61845*FLEN/8, x4, x1, x2) - -inst_20616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b800007; valaddr_reg:x3; val_offset:61848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61848*FLEN/8, x4, x1, x2) - -inst_20617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b80000f; valaddr_reg:x3; val_offset:61851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61851*FLEN/8, x4, x1, x2) - -inst_20618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b80001f; valaddr_reg:x3; val_offset:61854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61854*FLEN/8, x4, x1, x2) - -inst_20619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b80003f; valaddr_reg:x3; val_offset:61857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61857*FLEN/8, x4, x1, x2) - -inst_20620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b80007f; valaddr_reg:x3; val_offset:61860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61860*FLEN/8, x4, x1, x2) - -inst_20621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b8000ff; valaddr_reg:x3; val_offset:61863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61863*FLEN/8, x4, x1, x2) - -inst_20622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b8001ff; valaddr_reg:x3; val_offset:61866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61866*FLEN/8, x4, x1, x2) - -inst_20623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b8003ff; valaddr_reg:x3; val_offset:61869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61869*FLEN/8, x4, x1, x2) - -inst_20624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b8007ff; valaddr_reg:x3; val_offset:61872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61872*FLEN/8, x4, x1, x2) - -inst_20625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b800fff; valaddr_reg:x3; val_offset:61875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61875*FLEN/8, x4, x1, x2) - -inst_20626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b801fff; valaddr_reg:x3; val_offset:61878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61878*FLEN/8, x4, x1, x2) - -inst_20627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b803fff; valaddr_reg:x3; val_offset:61881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61881*FLEN/8, x4, x1, x2) - -inst_20628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b807fff; valaddr_reg:x3; val_offset:61884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61884*FLEN/8, x4, x1, x2) - -inst_20629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b80ffff; valaddr_reg:x3; val_offset:61887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61887*FLEN/8, x4, x1, x2) - -inst_20630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b81ffff; valaddr_reg:x3; val_offset:61890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61890*FLEN/8, x4, x1, x2) - -inst_20631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b83ffff; valaddr_reg:x3; val_offset:61893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61893*FLEN/8, x4, x1, x2) - -inst_20632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b87ffff; valaddr_reg:x3; val_offset:61896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61896*FLEN/8, x4, x1, x2) - -inst_20633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b8fffff; valaddr_reg:x3; val_offset:61899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61899*FLEN/8, x4, x1, x2) - -inst_20634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8b9fffff; valaddr_reg:x3; val_offset:61902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61902*FLEN/8, x4, x1, x2) - -inst_20635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bbfffff; valaddr_reg:x3; val_offset:61905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61905*FLEN/8, x4, x1, x2) - -inst_20636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bc00000; valaddr_reg:x3; val_offset:61908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61908*FLEN/8, x4, x1, x2) - -inst_20637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8be00000; valaddr_reg:x3; val_offset:61911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61911*FLEN/8, x4, x1, x2) - -inst_20638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bf00000; valaddr_reg:x3; val_offset:61914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61914*FLEN/8, x4, x1, x2) - -inst_20639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bf80000; valaddr_reg:x3; val_offset:61917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61917*FLEN/8, x4, x1, x2) - -inst_20640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfc0000; valaddr_reg:x3; val_offset:61920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61920*FLEN/8, x4, x1, x2) - -inst_20641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfe0000; valaddr_reg:x3; val_offset:61923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61923*FLEN/8, x4, x1, x2) - -inst_20642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bff0000; valaddr_reg:x3; val_offset:61926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61926*FLEN/8, x4, x1, x2) - -inst_20643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bff8000; valaddr_reg:x3; val_offset:61929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61929*FLEN/8, x4, x1, x2) - -inst_20644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bffc000; valaddr_reg:x3; val_offset:61932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61932*FLEN/8, x4, x1, x2) - -inst_20645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bffe000; valaddr_reg:x3; val_offset:61935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61935*FLEN/8, x4, x1, x2) - -inst_20646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfff000; valaddr_reg:x3; val_offset:61938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61938*FLEN/8, x4, x1, x2) - -inst_20647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfff800; valaddr_reg:x3; val_offset:61941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61941*FLEN/8, x4, x1, x2) - -inst_20648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfffc00; valaddr_reg:x3; val_offset:61944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61944*FLEN/8, x4, x1, x2) - -inst_20649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfffe00; valaddr_reg:x3; val_offset:61947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61947*FLEN/8, x4, x1, x2) - -inst_20650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bffff00; valaddr_reg:x3; val_offset:61950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61950*FLEN/8, x4, x1, x2) - -inst_20651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bffff80; valaddr_reg:x3; val_offset:61953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61953*FLEN/8, x4, x1, x2) - -inst_20652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bffffc0; valaddr_reg:x3; val_offset:61956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61956*FLEN/8, x4, x1, x2) - -inst_20653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bffffe0; valaddr_reg:x3; val_offset:61959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61959*FLEN/8, x4, x1, x2) - -inst_20654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfffff0; valaddr_reg:x3; val_offset:61962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61962*FLEN/8, x4, x1, x2) - -inst_20655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfffff8; valaddr_reg:x3; val_offset:61965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61965*FLEN/8, x4, x1, x2) - -inst_20656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfffffc; valaddr_reg:x3; val_offset:61968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61968*FLEN/8, x4, x1, x2) - -inst_20657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bfffffe; valaddr_reg:x3; val_offset:61971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61971*FLEN/8, x4, x1, x2) - -inst_20658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; -op3val:0x8bffffff; valaddr_reg:x3; val_offset:61974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61974*FLEN/8, x4, x1, x2) - -inst_20659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c000000; valaddr_reg:x3; val_offset:61977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61977*FLEN/8, x4, x1, x2) - -inst_20660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c000001; valaddr_reg:x3; val_offset:61980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61980*FLEN/8, x4, x1, x2) - -inst_20661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c000003; valaddr_reg:x3; val_offset:61983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61983*FLEN/8, x4, x1, x2) - -inst_20662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c000007; valaddr_reg:x3; val_offset:61986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61986*FLEN/8, x4, x1, x2) - -inst_20663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c00000f; valaddr_reg:x3; val_offset:61989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61989*FLEN/8, x4, x1, x2) - -inst_20664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c00001f; valaddr_reg:x3; val_offset:61992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61992*FLEN/8, x4, x1, x2) - -inst_20665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c00003f; valaddr_reg:x3; val_offset:61995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61995*FLEN/8, x4, x1, x2) - -inst_20666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c00007f; valaddr_reg:x3; val_offset:61998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61998*FLEN/8, x4, x1, x2) - -inst_20667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c0000ff; valaddr_reg:x3; val_offset:62001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62001*FLEN/8, x4, x1, x2) - -inst_20668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c0001ff; valaddr_reg:x3; val_offset:62004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62004*FLEN/8, x4, x1, x2) - -inst_20669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c0003ff; valaddr_reg:x3; val_offset:62007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62007*FLEN/8, x4, x1, x2) - -inst_20670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c0007ff; valaddr_reg:x3; val_offset:62010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62010*FLEN/8, x4, x1, x2) - -inst_20671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c000fff; valaddr_reg:x3; val_offset:62013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62013*FLEN/8, x4, x1, x2) - -inst_20672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c001fff; valaddr_reg:x3; val_offset:62016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62016*FLEN/8, x4, x1, x2) - -inst_20673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c003fff; valaddr_reg:x3; val_offset:62019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62019*FLEN/8, x4, x1, x2) - -inst_20674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c007fff; valaddr_reg:x3; val_offset:62022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62022*FLEN/8, x4, x1, x2) - -inst_20675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c00ffff; valaddr_reg:x3; val_offset:62025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62025*FLEN/8, x4, x1, x2) - -inst_20676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c01ffff; valaddr_reg:x3; val_offset:62028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62028*FLEN/8, x4, x1, x2) - -inst_20677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c03ffff; valaddr_reg:x3; val_offset:62031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62031*FLEN/8, x4, x1, x2) - -inst_20678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c07ffff; valaddr_reg:x3; val_offset:62034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62034*FLEN/8, x4, x1, x2) - -inst_20679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c0fffff; valaddr_reg:x3; val_offset:62037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62037*FLEN/8, x4, x1, x2) - -inst_20680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c1fffff; valaddr_reg:x3; val_offset:62040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62040*FLEN/8, x4, x1, x2) - -inst_20681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c3fffff; valaddr_reg:x3; val_offset:62043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62043*FLEN/8, x4, x1, x2) - -inst_20682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c400000; valaddr_reg:x3; val_offset:62046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62046*FLEN/8, x4, x1, x2) - -inst_20683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c600000; valaddr_reg:x3; val_offset:62049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62049*FLEN/8, x4, x1, x2) - -inst_20684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c700000; valaddr_reg:x3; val_offset:62052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62052*FLEN/8, x4, x1, x2) - -inst_20685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c780000; valaddr_reg:x3; val_offset:62055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62055*FLEN/8, x4, x1, x2) - -inst_20686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7c0000; valaddr_reg:x3; val_offset:62058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62058*FLEN/8, x4, x1, x2) - -inst_20687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7e0000; valaddr_reg:x3; val_offset:62061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62061*FLEN/8, x4, x1, x2) - -inst_20688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7f0000; valaddr_reg:x3; val_offset:62064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62064*FLEN/8, x4, x1, x2) - -inst_20689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7f8000; valaddr_reg:x3; val_offset:62067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62067*FLEN/8, x4, x1, x2) - -inst_20690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7fc000; valaddr_reg:x3; val_offset:62070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62070*FLEN/8, x4, x1, x2) - -inst_20691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7fe000; valaddr_reg:x3; val_offset:62073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62073*FLEN/8, x4, x1, x2) - -inst_20692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7ff000; valaddr_reg:x3; val_offset:62076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62076*FLEN/8, x4, x1, x2) - -inst_20693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7ff800; valaddr_reg:x3; val_offset:62079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62079*FLEN/8, x4, x1, x2) - -inst_20694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7ffc00; valaddr_reg:x3; val_offset:62082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62082*FLEN/8, x4, x1, x2) - -inst_20695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7ffe00; valaddr_reg:x3; val_offset:62085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62085*FLEN/8, x4, x1, x2) - -inst_20696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7fff00; valaddr_reg:x3; val_offset:62088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62088*FLEN/8, x4, x1, x2) - -inst_20697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7fff80; valaddr_reg:x3; val_offset:62091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62091*FLEN/8, x4, x1, x2) - -inst_20698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7fffc0; valaddr_reg:x3; val_offset:62094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62094*FLEN/8, x4, x1, x2) - -inst_20699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7fffe0; valaddr_reg:x3; val_offset:62097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62097*FLEN/8, x4, x1, x2) - -inst_20700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7ffff0; valaddr_reg:x3; val_offset:62100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62100*FLEN/8, x4, x1, x2) - -inst_20701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7ffff8; valaddr_reg:x3; val_offset:62103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62103*FLEN/8, x4, x1, x2) - -inst_20702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7ffffc; valaddr_reg:x3; val_offset:62106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62106*FLEN/8, x4, x1, x2) - -inst_20703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7ffffe; valaddr_reg:x3; val_offset:62109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62109*FLEN/8, x4, x1, x2) - -inst_20704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3c7fffff; valaddr_reg:x3; val_offset:62112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62112*FLEN/8, x4, x1, x2) - -inst_20705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3f800001; valaddr_reg:x3; val_offset:62115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62115*FLEN/8, x4, x1, x2) - -inst_20706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3f800003; valaddr_reg:x3; val_offset:62118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62118*FLEN/8, x4, x1, x2) - -inst_20707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3f800007; valaddr_reg:x3; val_offset:62121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62121*FLEN/8, x4, x1, x2) - -inst_20708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3f999999; valaddr_reg:x3; val_offset:62124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62124*FLEN/8, x4, x1, x2) - -inst_20709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:62127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62127*FLEN/8, x4, x1, x2) - -inst_20710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:62130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62130*FLEN/8, x4, x1, x2) - -inst_20711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:62133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62133*FLEN/8, x4, x1, x2) - -inst_20712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:62136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62136*FLEN/8, x4, x1, x2) - -inst_20713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:62139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62139*FLEN/8, x4, x1, x2) - -inst_20714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:62142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62142*FLEN/8, x4, x1, x2) - -inst_20715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:62145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62145*FLEN/8, x4, x1, x2) - -inst_20716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:62148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62148*FLEN/8, x4, x1, x2) - -inst_20717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:62151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62151*FLEN/8, x4, x1, x2) - -inst_20718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:62154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62154*FLEN/8, x4, x1, x2) - -inst_20719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:62157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62157*FLEN/8, x4, x1, x2) - -inst_20720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:62160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62160*FLEN/8, x4, x1, x2) - -inst_20721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed800000; valaddr_reg:x3; val_offset:62163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62163*FLEN/8, x4, x1, x2) - -inst_20722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed800001; valaddr_reg:x3; val_offset:62166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62166*FLEN/8, x4, x1, x2) - -inst_20723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed800003; valaddr_reg:x3; val_offset:62169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62169*FLEN/8, x4, x1, x2) - -inst_20724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed800007; valaddr_reg:x3; val_offset:62172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62172*FLEN/8, x4, x1, x2) - -inst_20725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed80000f; valaddr_reg:x3; val_offset:62175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62175*FLEN/8, x4, x1, x2) - -inst_20726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed80001f; valaddr_reg:x3; val_offset:62178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62178*FLEN/8, x4, x1, x2) - -inst_20727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed80003f; valaddr_reg:x3; val_offset:62181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62181*FLEN/8, x4, x1, x2) - -inst_20728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed80007f; valaddr_reg:x3; val_offset:62184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62184*FLEN/8, x4, x1, x2) - -inst_20729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed8000ff; valaddr_reg:x3; val_offset:62187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62187*FLEN/8, x4, x1, x2) - -inst_20730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed8001ff; valaddr_reg:x3; val_offset:62190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62190*FLEN/8, x4, x1, x2) - -inst_20731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed8003ff; valaddr_reg:x3; val_offset:62193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62193*FLEN/8, x4, x1, x2) - -inst_20732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed8007ff; valaddr_reg:x3; val_offset:62196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62196*FLEN/8, x4, x1, x2) - -inst_20733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed800fff; valaddr_reg:x3; val_offset:62199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62199*FLEN/8, x4, x1, x2) - -inst_20734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed801fff; valaddr_reg:x3; val_offset:62202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62202*FLEN/8, x4, x1, x2) - -inst_20735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed803fff; valaddr_reg:x3; val_offset:62205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62205*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_163) - -inst_20736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed807fff; valaddr_reg:x3; val_offset:62208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62208*FLEN/8, x4, x1, x2) - -inst_20737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed80ffff; valaddr_reg:x3; val_offset:62211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62211*FLEN/8, x4, x1, x2) - -inst_20738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed81ffff; valaddr_reg:x3; val_offset:62214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62214*FLEN/8, x4, x1, x2) - -inst_20739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed83ffff; valaddr_reg:x3; val_offset:62217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62217*FLEN/8, x4, x1, x2) - -inst_20740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed87ffff; valaddr_reg:x3; val_offset:62220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62220*FLEN/8, x4, x1, x2) - -inst_20741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed8fffff; valaddr_reg:x3; val_offset:62223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62223*FLEN/8, x4, x1, x2) - -inst_20742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xed9fffff; valaddr_reg:x3; val_offset:62226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62226*FLEN/8, x4, x1, x2) - -inst_20743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedbfffff; valaddr_reg:x3; val_offset:62229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62229*FLEN/8, x4, x1, x2) - -inst_20744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedc00000; valaddr_reg:x3; val_offset:62232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62232*FLEN/8, x4, x1, x2) - -inst_20745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xede00000; valaddr_reg:x3; val_offset:62235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62235*FLEN/8, x4, x1, x2) - -inst_20746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedf00000; valaddr_reg:x3; val_offset:62238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62238*FLEN/8, x4, x1, x2) - -inst_20747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedf80000; valaddr_reg:x3; val_offset:62241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62241*FLEN/8, x4, x1, x2) - -inst_20748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfc0000; valaddr_reg:x3; val_offset:62244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62244*FLEN/8, x4, x1, x2) - -inst_20749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfe0000; valaddr_reg:x3; val_offset:62247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62247*FLEN/8, x4, x1, x2) - -inst_20750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedff0000; valaddr_reg:x3; val_offset:62250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62250*FLEN/8, x4, x1, x2) - -inst_20751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedff8000; valaddr_reg:x3; val_offset:62253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62253*FLEN/8, x4, x1, x2) - -inst_20752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedffc000; valaddr_reg:x3; val_offset:62256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62256*FLEN/8, x4, x1, x2) - -inst_20753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedffe000; valaddr_reg:x3; val_offset:62259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62259*FLEN/8, x4, x1, x2) - -inst_20754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfff000; valaddr_reg:x3; val_offset:62262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62262*FLEN/8, x4, x1, x2) - -inst_20755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfff800; valaddr_reg:x3; val_offset:62265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62265*FLEN/8, x4, x1, x2) - -inst_20756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfffc00; valaddr_reg:x3; val_offset:62268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62268*FLEN/8, x4, x1, x2) - -inst_20757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfffe00; valaddr_reg:x3; val_offset:62271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62271*FLEN/8, x4, x1, x2) - -inst_20758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedffff00; valaddr_reg:x3; val_offset:62274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62274*FLEN/8, x4, x1, x2) - -inst_20759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedffff80; valaddr_reg:x3; val_offset:62277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62277*FLEN/8, x4, x1, x2) - -inst_20760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedffffc0; valaddr_reg:x3; val_offset:62280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62280*FLEN/8, x4, x1, x2) - -inst_20761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedffffe0; valaddr_reg:x3; val_offset:62283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62283*FLEN/8, x4, x1, x2) - -inst_20762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfffff0; valaddr_reg:x3; val_offset:62286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62286*FLEN/8, x4, x1, x2) - -inst_20763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfffff8; valaddr_reg:x3; val_offset:62289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62289*FLEN/8, x4, x1, x2) - -inst_20764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfffffc; valaddr_reg:x3; val_offset:62292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62292*FLEN/8, x4, x1, x2) - -inst_20765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedfffffe; valaddr_reg:x3; val_offset:62295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62295*FLEN/8, x4, x1, x2) - -inst_20766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xedffffff; valaddr_reg:x3; val_offset:62298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62298*FLEN/8, x4, x1, x2) - -inst_20767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff000001; valaddr_reg:x3; val_offset:62301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62301*FLEN/8, x4, x1, x2) - -inst_20768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff000003; valaddr_reg:x3; val_offset:62304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62304*FLEN/8, x4, x1, x2) - -inst_20769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff000007; valaddr_reg:x3; val_offset:62307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62307*FLEN/8, x4, x1, x2) - -inst_20770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff199999; valaddr_reg:x3; val_offset:62310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62310*FLEN/8, x4, x1, x2) - -inst_20771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff249249; valaddr_reg:x3; val_offset:62313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62313*FLEN/8, x4, x1, x2) - -inst_20772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff333333; valaddr_reg:x3; val_offset:62316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62316*FLEN/8, x4, x1, x2) - -inst_20773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:62319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62319*FLEN/8, x4, x1, x2) - -inst_20774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:62322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62322*FLEN/8, x4, x1, x2) - -inst_20775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff444444; valaddr_reg:x3; val_offset:62325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62325*FLEN/8, x4, x1, x2) - -inst_20776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:62328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62328*FLEN/8, x4, x1, x2) - -inst_20777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:62331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62331*FLEN/8, x4, x1, x2) - -inst_20778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff666666; valaddr_reg:x3; val_offset:62334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62334*FLEN/8, x4, x1, x2) - -inst_20779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:62337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62337*FLEN/8, x4, x1, x2) - -inst_20780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:62340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62340*FLEN/8, x4, x1, x2) - -inst_20781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:62343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62343*FLEN/8, x4, x1, x2) - -inst_20782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:62346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62346*FLEN/8, x4, x1, x2) - -inst_20783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:62349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62349*FLEN/8, x4, x1, x2) - -inst_20784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:62352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62352*FLEN/8, x4, x1, x2) - -inst_20785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:62355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62355*FLEN/8, x4, x1, x2) - -inst_20786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:62358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62358*FLEN/8, x4, x1, x2) - -inst_20787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:62361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62361*FLEN/8, x4, x1, x2) - -inst_20788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:62364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62364*FLEN/8, x4, x1, x2) - -inst_20789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:62367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62367*FLEN/8, x4, x1, x2) - -inst_20790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:62370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62370*FLEN/8, x4, x1, x2) - -inst_20791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:62373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62373*FLEN/8, x4, x1, x2) - -inst_20792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:62376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62376*FLEN/8, x4, x1, x2) - -inst_20793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:62379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62379*FLEN/8, x4, x1, x2) - -inst_20794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:62382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62382*FLEN/8, x4, x1, x2) - -inst_20795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:62385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62385*FLEN/8, x4, x1, x2) - -inst_20796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:62388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62388*FLEN/8, x4, x1, x2) - -inst_20797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:62391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62391*FLEN/8, x4, x1, x2) - -inst_20798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:62394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62394*FLEN/8, x4, x1, x2) - -inst_20799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a800000; valaddr_reg:x3; val_offset:62397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62397*FLEN/8, x4, x1, x2) - -inst_20800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a800001; valaddr_reg:x3; val_offset:62400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62400*FLEN/8, x4, x1, x2) - -inst_20801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a800003; valaddr_reg:x3; val_offset:62403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62403*FLEN/8, x4, x1, x2) - -inst_20802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a800007; valaddr_reg:x3; val_offset:62406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62406*FLEN/8, x4, x1, x2) - -inst_20803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a80000f; valaddr_reg:x3; val_offset:62409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62409*FLEN/8, x4, x1, x2) - -inst_20804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a80001f; valaddr_reg:x3; val_offset:62412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62412*FLEN/8, x4, x1, x2) - -inst_20805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a80003f; valaddr_reg:x3; val_offset:62415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62415*FLEN/8, x4, x1, x2) - -inst_20806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a80007f; valaddr_reg:x3; val_offset:62418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62418*FLEN/8, x4, x1, x2) - -inst_20807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a8000ff; valaddr_reg:x3; val_offset:62421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62421*FLEN/8, x4, x1, x2) - -inst_20808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a8001ff; valaddr_reg:x3; val_offset:62424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62424*FLEN/8, x4, x1, x2) - -inst_20809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a8003ff; valaddr_reg:x3; val_offset:62427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62427*FLEN/8, x4, x1, x2) - -inst_20810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a8007ff; valaddr_reg:x3; val_offset:62430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62430*FLEN/8, x4, x1, x2) - -inst_20811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a800fff; valaddr_reg:x3; val_offset:62433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62433*FLEN/8, x4, x1, x2) - -inst_20812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a801fff; valaddr_reg:x3; val_offset:62436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62436*FLEN/8, x4, x1, x2) - -inst_20813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a803fff; valaddr_reg:x3; val_offset:62439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62439*FLEN/8, x4, x1, x2) - -inst_20814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a807fff; valaddr_reg:x3; val_offset:62442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62442*FLEN/8, x4, x1, x2) - -inst_20815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a80ffff; valaddr_reg:x3; val_offset:62445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62445*FLEN/8, x4, x1, x2) - -inst_20816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a81ffff; valaddr_reg:x3; val_offset:62448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62448*FLEN/8, x4, x1, x2) - -inst_20817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a83ffff; valaddr_reg:x3; val_offset:62451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62451*FLEN/8, x4, x1, x2) - -inst_20818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a87ffff; valaddr_reg:x3; val_offset:62454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62454*FLEN/8, x4, x1, x2) - -inst_20819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a8fffff; valaddr_reg:x3; val_offset:62457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62457*FLEN/8, x4, x1, x2) - -inst_20820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8a9fffff; valaddr_reg:x3; val_offset:62460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62460*FLEN/8, x4, x1, x2) - -inst_20821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8abfffff; valaddr_reg:x3; val_offset:62463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62463*FLEN/8, x4, x1, x2) - -inst_20822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8ac00000; valaddr_reg:x3; val_offset:62466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62466*FLEN/8, x4, x1, x2) - -inst_20823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8ae00000; valaddr_reg:x3; val_offset:62469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62469*FLEN/8, x4, x1, x2) - -inst_20824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8af00000; valaddr_reg:x3; val_offset:62472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62472*FLEN/8, x4, x1, x2) - -inst_20825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8af80000; valaddr_reg:x3; val_offset:62475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62475*FLEN/8, x4, x1, x2) - -inst_20826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afc0000; valaddr_reg:x3; val_offset:62478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62478*FLEN/8, x4, x1, x2) - -inst_20827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afe0000; valaddr_reg:x3; val_offset:62481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62481*FLEN/8, x4, x1, x2) - -inst_20828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8aff0000; valaddr_reg:x3; val_offset:62484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62484*FLEN/8, x4, x1, x2) - -inst_20829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8aff8000; valaddr_reg:x3; val_offset:62487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62487*FLEN/8, x4, x1, x2) - -inst_20830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8affc000; valaddr_reg:x3; val_offset:62490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62490*FLEN/8, x4, x1, x2) - -inst_20831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8affe000; valaddr_reg:x3; val_offset:62493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62493*FLEN/8, x4, x1, x2) - -inst_20832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afff000; valaddr_reg:x3; val_offset:62496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62496*FLEN/8, x4, x1, x2) - -inst_20833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afff800; valaddr_reg:x3; val_offset:62499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62499*FLEN/8, x4, x1, x2) - -inst_20834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afffc00; valaddr_reg:x3; val_offset:62502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62502*FLEN/8, x4, x1, x2) - -inst_20835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afffe00; valaddr_reg:x3; val_offset:62505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62505*FLEN/8, x4, x1, x2) - -inst_20836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8affff00; valaddr_reg:x3; val_offset:62508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62508*FLEN/8, x4, x1, x2) - -inst_20837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8affff80; valaddr_reg:x3; val_offset:62511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62511*FLEN/8, x4, x1, x2) - -inst_20838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8affffc0; valaddr_reg:x3; val_offset:62514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62514*FLEN/8, x4, x1, x2) - -inst_20839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8affffe0; valaddr_reg:x3; val_offset:62517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62517*FLEN/8, x4, x1, x2) - -inst_20840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afffff0; valaddr_reg:x3; val_offset:62520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62520*FLEN/8, x4, x1, x2) - -inst_20841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afffff8; valaddr_reg:x3; val_offset:62523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62523*FLEN/8, x4, x1, x2) - -inst_20842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afffffc; valaddr_reg:x3; val_offset:62526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62526*FLEN/8, x4, x1, x2) - -inst_20843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8afffffe; valaddr_reg:x3; val_offset:62529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62529*FLEN/8, x4, x1, x2) - -inst_20844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; -op3val:0x8affffff; valaddr_reg:x3; val_offset:62532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62532*FLEN/8, x4, x1, x2) - -inst_20845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:62535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62535*FLEN/8, x4, x1, x2) - -inst_20846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:62538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62538*FLEN/8, x4, x1, x2) - -inst_20847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:62541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62541*FLEN/8, x4, x1, x2) - -inst_20848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:62544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62544*FLEN/8, x4, x1, x2) - -inst_20849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:62547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62547*FLEN/8, x4, x1, x2) - -inst_20850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:62550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62550*FLEN/8, x4, x1, x2) - -inst_20851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:62553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62553*FLEN/8, x4, x1, x2) - -inst_20852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:62556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62556*FLEN/8, x4, x1, x2) - -inst_20853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:62559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62559*FLEN/8, x4, x1, x2) - -inst_20854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:62562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62562*FLEN/8, x4, x1, x2) - -inst_20855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:62565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62565*FLEN/8, x4, x1, x2) - -inst_20856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:62568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62568*FLEN/8, x4, x1, x2) - -inst_20857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:62571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62571*FLEN/8, x4, x1, x2) - -inst_20858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:62574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62574*FLEN/8, x4, x1, x2) - -inst_20859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:62577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62577*FLEN/8, x4, x1, x2) - -inst_20860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:62580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62580*FLEN/8, x4, x1, x2) - -inst_20861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1000000; valaddr_reg:x3; val_offset:62583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62583*FLEN/8, x4, x1, x2) - -inst_20862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1000001; valaddr_reg:x3; val_offset:62586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62586*FLEN/8, x4, x1, x2) - -inst_20863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1000003; valaddr_reg:x3; val_offset:62589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62589*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_164) - -inst_20864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1000007; valaddr_reg:x3; val_offset:62592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62592*FLEN/8, x4, x1, x2) - -inst_20865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x100000f; valaddr_reg:x3; val_offset:62595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62595*FLEN/8, x4, x1, x2) - -inst_20866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x100001f; valaddr_reg:x3; val_offset:62598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62598*FLEN/8, x4, x1, x2) - -inst_20867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x100003f; valaddr_reg:x3; val_offset:62601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62601*FLEN/8, x4, x1, x2) - -inst_20868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x100007f; valaddr_reg:x3; val_offset:62604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62604*FLEN/8, x4, x1, x2) - -inst_20869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x10000ff; valaddr_reg:x3; val_offset:62607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62607*FLEN/8, x4, x1, x2) - -inst_20870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x10001ff; valaddr_reg:x3; val_offset:62610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62610*FLEN/8, x4, x1, x2) - -inst_20871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x10003ff; valaddr_reg:x3; val_offset:62613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62613*FLEN/8, x4, x1, x2) - -inst_20872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x10007ff; valaddr_reg:x3; val_offset:62616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62616*FLEN/8, x4, x1, x2) - -inst_20873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1000fff; valaddr_reg:x3; val_offset:62619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62619*FLEN/8, x4, x1, x2) - -inst_20874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1001fff; valaddr_reg:x3; val_offset:62622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62622*FLEN/8, x4, x1, x2) - -inst_20875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1003fff; valaddr_reg:x3; val_offset:62625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62625*FLEN/8, x4, x1, x2) - -inst_20876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1007fff; valaddr_reg:x3; val_offset:62628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62628*FLEN/8, x4, x1, x2) - -inst_20877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x100ffff; valaddr_reg:x3; val_offset:62631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62631*FLEN/8, x4, x1, x2) - -inst_20878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x101ffff; valaddr_reg:x3; val_offset:62634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62634*FLEN/8, x4, x1, x2) - -inst_20879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x103ffff; valaddr_reg:x3; val_offset:62637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62637*FLEN/8, x4, x1, x2) - -inst_20880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x107ffff; valaddr_reg:x3; val_offset:62640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62640*FLEN/8, x4, x1, x2) - -inst_20881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x10fffff; valaddr_reg:x3; val_offset:62643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62643*FLEN/8, x4, x1, x2) - -inst_20882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x11fffff; valaddr_reg:x3; val_offset:62646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62646*FLEN/8, x4, x1, x2) - -inst_20883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x13fffff; valaddr_reg:x3; val_offset:62649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62649*FLEN/8, x4, x1, x2) - -inst_20884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1400000; valaddr_reg:x3; val_offset:62652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62652*FLEN/8, x4, x1, x2) - -inst_20885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1600000; valaddr_reg:x3; val_offset:62655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62655*FLEN/8, x4, x1, x2) - -inst_20886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1700000; valaddr_reg:x3; val_offset:62658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62658*FLEN/8, x4, x1, x2) - -inst_20887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x1780000; valaddr_reg:x3; val_offset:62661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62661*FLEN/8, x4, x1, x2) - -inst_20888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17c0000; valaddr_reg:x3; val_offset:62664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62664*FLEN/8, x4, x1, x2) - -inst_20889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17e0000; valaddr_reg:x3; val_offset:62667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62667*FLEN/8, x4, x1, x2) - -inst_20890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17f0000; valaddr_reg:x3; val_offset:62670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62670*FLEN/8, x4, x1, x2) - -inst_20891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17f8000; valaddr_reg:x3; val_offset:62673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62673*FLEN/8, x4, x1, x2) - -inst_20892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17fc000; valaddr_reg:x3; val_offset:62676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62676*FLEN/8, x4, x1, x2) - -inst_20893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17fe000; valaddr_reg:x3; val_offset:62679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62679*FLEN/8, x4, x1, x2) - -inst_20894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17ff000; valaddr_reg:x3; val_offset:62682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62682*FLEN/8, x4, x1, x2) - -inst_20895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17ff800; valaddr_reg:x3; val_offset:62685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62685*FLEN/8, x4, x1, x2) - -inst_20896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17ffc00; valaddr_reg:x3; val_offset:62688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62688*FLEN/8, x4, x1, x2) - -inst_20897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17ffe00; valaddr_reg:x3; val_offset:62691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62691*FLEN/8, x4, x1, x2) - -inst_20898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17fff00; valaddr_reg:x3; val_offset:62694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62694*FLEN/8, x4, x1, x2) - -inst_20899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17fff80; valaddr_reg:x3; val_offset:62697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62697*FLEN/8, x4, x1, x2) - -inst_20900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17fffc0; valaddr_reg:x3; val_offset:62700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62700*FLEN/8, x4, x1, x2) - -inst_20901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17fffe0; valaddr_reg:x3; val_offset:62703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62703*FLEN/8, x4, x1, x2) - -inst_20902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17ffff0; valaddr_reg:x3; val_offset:62706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62706*FLEN/8, x4, x1, x2) - -inst_20903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17ffff8; valaddr_reg:x3; val_offset:62709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62709*FLEN/8, x4, x1, x2) - -inst_20904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17ffffc; valaddr_reg:x3; val_offset:62712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62712*FLEN/8, x4, x1, x2) - -inst_20905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17ffffe; valaddr_reg:x3; val_offset:62715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62715*FLEN/8, x4, x1, x2) - -inst_20906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; -op3val:0x17fffff; valaddr_reg:x3; val_offset:62718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62718*FLEN/8, x4, x1, x2) - -inst_20907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2800000; valaddr_reg:x3; val_offset:62721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62721*FLEN/8, x4, x1, x2) - -inst_20908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2800001; valaddr_reg:x3; val_offset:62724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62724*FLEN/8, x4, x1, x2) - -inst_20909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2800003; valaddr_reg:x3; val_offset:62727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62727*FLEN/8, x4, x1, x2) - -inst_20910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2800007; valaddr_reg:x3; val_offset:62730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62730*FLEN/8, x4, x1, x2) - -inst_20911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb280000f; valaddr_reg:x3; val_offset:62733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62733*FLEN/8, x4, x1, x2) - -inst_20912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb280001f; valaddr_reg:x3; val_offset:62736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62736*FLEN/8, x4, x1, x2) - -inst_20913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb280003f; valaddr_reg:x3; val_offset:62739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62739*FLEN/8, x4, x1, x2) - -inst_20914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb280007f; valaddr_reg:x3; val_offset:62742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62742*FLEN/8, x4, x1, x2) - -inst_20915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb28000ff; valaddr_reg:x3; val_offset:62745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62745*FLEN/8, x4, x1, x2) - -inst_20916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb28001ff; valaddr_reg:x3; val_offset:62748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62748*FLEN/8, x4, x1, x2) - -inst_20917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb28003ff; valaddr_reg:x3; val_offset:62751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62751*FLEN/8, x4, x1, x2) - -inst_20918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb28007ff; valaddr_reg:x3; val_offset:62754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62754*FLEN/8, x4, x1, x2) - -inst_20919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2800fff; valaddr_reg:x3; val_offset:62757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62757*FLEN/8, x4, x1, x2) - -inst_20920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2801fff; valaddr_reg:x3; val_offset:62760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62760*FLEN/8, x4, x1, x2) - -inst_20921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2803fff; valaddr_reg:x3; val_offset:62763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62763*FLEN/8, x4, x1, x2) - -inst_20922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2807fff; valaddr_reg:x3; val_offset:62766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62766*FLEN/8, x4, x1, x2) - -inst_20923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb280ffff; valaddr_reg:x3; val_offset:62769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62769*FLEN/8, x4, x1, x2) - -inst_20924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb281ffff; valaddr_reg:x3; val_offset:62772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62772*FLEN/8, x4, x1, x2) - -inst_20925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb283ffff; valaddr_reg:x3; val_offset:62775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62775*FLEN/8, x4, x1, x2) - -inst_20926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb287ffff; valaddr_reg:x3; val_offset:62778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62778*FLEN/8, x4, x1, x2) - -inst_20927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb28fffff; valaddr_reg:x3; val_offset:62781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62781*FLEN/8, x4, x1, x2) - -inst_20928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb29fffff; valaddr_reg:x3; val_offset:62784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62784*FLEN/8, x4, x1, x2) - -inst_20929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2bfffff; valaddr_reg:x3; val_offset:62787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62787*FLEN/8, x4, x1, x2) - -inst_20930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2c00000; valaddr_reg:x3; val_offset:62790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62790*FLEN/8, x4, x1, x2) - -inst_20931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2e00000; valaddr_reg:x3; val_offset:62793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62793*FLEN/8, x4, x1, x2) - -inst_20932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2f00000; valaddr_reg:x3; val_offset:62796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62796*FLEN/8, x4, x1, x2) - -inst_20933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2f80000; valaddr_reg:x3; val_offset:62799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62799*FLEN/8, x4, x1, x2) - -inst_20934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fc0000; valaddr_reg:x3; val_offset:62802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62802*FLEN/8, x4, x1, x2) - -inst_20935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fe0000; valaddr_reg:x3; val_offset:62805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62805*FLEN/8, x4, x1, x2) - -inst_20936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ff0000; valaddr_reg:x3; val_offset:62808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62808*FLEN/8, x4, x1, x2) - -inst_20937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ff8000; valaddr_reg:x3; val_offset:62811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62811*FLEN/8, x4, x1, x2) - -inst_20938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ffc000; valaddr_reg:x3; val_offset:62814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62814*FLEN/8, x4, x1, x2) - -inst_20939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ffe000; valaddr_reg:x3; val_offset:62817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62817*FLEN/8, x4, x1, x2) - -inst_20940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fff000; valaddr_reg:x3; val_offset:62820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62820*FLEN/8, x4, x1, x2) - -inst_20941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fff800; valaddr_reg:x3; val_offset:62823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62823*FLEN/8, x4, x1, x2) - -inst_20942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fffc00; valaddr_reg:x3; val_offset:62826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62826*FLEN/8, x4, x1, x2) - -inst_20943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fffe00; valaddr_reg:x3; val_offset:62829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62829*FLEN/8, x4, x1, x2) - -inst_20944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ffff00; valaddr_reg:x3; val_offset:62832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62832*FLEN/8, x4, x1, x2) - -inst_20945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ffff80; valaddr_reg:x3; val_offset:62835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62835*FLEN/8, x4, x1, x2) - -inst_20946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ffffc0; valaddr_reg:x3; val_offset:62838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62838*FLEN/8, x4, x1, x2) - -inst_20947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ffffe0; valaddr_reg:x3; val_offset:62841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62841*FLEN/8, x4, x1, x2) - -inst_20948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fffff0; valaddr_reg:x3; val_offset:62844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62844*FLEN/8, x4, x1, x2) - -inst_20949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fffff8; valaddr_reg:x3; val_offset:62847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62847*FLEN/8, x4, x1, x2) - -inst_20950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fffffc; valaddr_reg:x3; val_offset:62850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62850*FLEN/8, x4, x1, x2) - -inst_20951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2fffffe; valaddr_reg:x3; val_offset:62853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62853*FLEN/8, x4, x1, x2) - -inst_20952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xb2ffffff; valaddr_reg:x3; val_offset:62856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62856*FLEN/8, x4, x1, x2) - -inst_20953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbf800001; valaddr_reg:x3; val_offset:62859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62859*FLEN/8, x4, x1, x2) - -inst_20954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbf800003; valaddr_reg:x3; val_offset:62862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62862*FLEN/8, x4, x1, x2) - -inst_20955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbf800007; valaddr_reg:x3; val_offset:62865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62865*FLEN/8, x4, x1, x2) - -inst_20956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbf999999; valaddr_reg:x3; val_offset:62868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62868*FLEN/8, x4, x1, x2) - -inst_20957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:62871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62871*FLEN/8, x4, x1, x2) - -inst_20958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:62874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62874*FLEN/8, x4, x1, x2) - -inst_20959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:62877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62877*FLEN/8, x4, x1, x2) - -inst_20960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:62880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62880*FLEN/8, x4, x1, x2) - -inst_20961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:62883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62883*FLEN/8, x4, x1, x2) - -inst_20962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:62886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62886*FLEN/8, x4, x1, x2) - -inst_20963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:62889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62889*FLEN/8, x4, x1, x2) - -inst_20964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:62892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62892*FLEN/8, x4, x1, x2) - -inst_20965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:62895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62895*FLEN/8, x4, x1, x2) - -inst_20966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:62898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62898*FLEN/8, x4, x1, x2) - -inst_20967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:62901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62901*FLEN/8, x4, x1, x2) - -inst_20968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:62904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62904*FLEN/8, x4, x1, x2) - -inst_20969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:62907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62907*FLEN/8, x4, x1, x2) - -inst_20970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:62910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62910*FLEN/8, x4, x1, x2) - -inst_20971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:62913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62913*FLEN/8, x4, x1, x2) - -inst_20972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:62916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62916*FLEN/8, x4, x1, x2) - -inst_20973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:62919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62919*FLEN/8, x4, x1, x2) - -inst_20974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:62922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62922*FLEN/8, x4, x1, x2) - -inst_20975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:62925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62925*FLEN/8, x4, x1, x2) - -inst_20976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:62928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62928*FLEN/8, x4, x1, x2) - -inst_20977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:62931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62931*FLEN/8, x4, x1, x2) - -inst_20978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:62934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62934*FLEN/8, x4, x1, x2) - -inst_20979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:62937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62937*FLEN/8, x4, x1, x2) - -inst_20980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:62940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62940*FLEN/8, x4, x1, x2) - -inst_20981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:62943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62943*FLEN/8, x4, x1, x2) - -inst_20982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:62946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62946*FLEN/8, x4, x1, x2) - -inst_20983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:62949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62949*FLEN/8, x4, x1, x2) - -inst_20984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:62952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62952*FLEN/8, x4, x1, x2) - -inst_20985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9000000; valaddr_reg:x3; val_offset:62955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62955*FLEN/8, x4, x1, x2) - -inst_20986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9000001; valaddr_reg:x3; val_offset:62958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62958*FLEN/8, x4, x1, x2) - -inst_20987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9000003; valaddr_reg:x3; val_offset:62961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62961*FLEN/8, x4, x1, x2) - -inst_20988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9000007; valaddr_reg:x3; val_offset:62964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62964*FLEN/8, x4, x1, x2) - -inst_20989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x900000f; valaddr_reg:x3; val_offset:62967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62967*FLEN/8, x4, x1, x2) - -inst_20990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x900001f; valaddr_reg:x3; val_offset:62970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62970*FLEN/8, x4, x1, x2) - -inst_20991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x900003f; valaddr_reg:x3; val_offset:62973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62973*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_165) - -inst_20992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x900007f; valaddr_reg:x3; val_offset:62976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62976*FLEN/8, x4, x1, x2) - -inst_20993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x90000ff; valaddr_reg:x3; val_offset:62979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62979*FLEN/8, x4, x1, x2) - -inst_20994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x90001ff; valaddr_reg:x3; val_offset:62982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62982*FLEN/8, x4, x1, x2) - -inst_20995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x90003ff; valaddr_reg:x3; val_offset:62985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62985*FLEN/8, x4, x1, x2) - -inst_20996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x90007ff; valaddr_reg:x3; val_offset:62988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62988*FLEN/8, x4, x1, x2) - -inst_20997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9000fff; valaddr_reg:x3; val_offset:62991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62991*FLEN/8, x4, x1, x2) - -inst_20998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9001fff; valaddr_reg:x3; val_offset:62994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62994*FLEN/8, x4, x1, x2) - -inst_20999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9003fff; valaddr_reg:x3; val_offset:62997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62997*FLEN/8, x4, x1, x2) - -inst_21000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9007fff; valaddr_reg:x3; val_offset:63000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63000*FLEN/8, x4, x1, x2) - -inst_21001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x900ffff; valaddr_reg:x3; val_offset:63003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63003*FLEN/8, x4, x1, x2) - -inst_21002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x901ffff; valaddr_reg:x3; val_offset:63006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63006*FLEN/8, x4, x1, x2) - -inst_21003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x903ffff; valaddr_reg:x3; val_offset:63009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63009*FLEN/8, x4, x1, x2) - -inst_21004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x907ffff; valaddr_reg:x3; val_offset:63012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63012*FLEN/8, x4, x1, x2) - -inst_21005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x90fffff; valaddr_reg:x3; val_offset:63015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63015*FLEN/8, x4, x1, x2) - -inst_21006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x91fffff; valaddr_reg:x3; val_offset:63018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63018*FLEN/8, x4, x1, x2) - -inst_21007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x93fffff; valaddr_reg:x3; val_offset:63021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63021*FLEN/8, x4, x1, x2) - -inst_21008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9400000; valaddr_reg:x3; val_offset:63024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63024*FLEN/8, x4, x1, x2) - -inst_21009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9600000; valaddr_reg:x3; val_offset:63027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63027*FLEN/8, x4, x1, x2) - -inst_21010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9700000; valaddr_reg:x3; val_offset:63030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63030*FLEN/8, x4, x1, x2) - -inst_21011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x9780000; valaddr_reg:x3; val_offset:63033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63033*FLEN/8, x4, x1, x2) - -inst_21012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97c0000; valaddr_reg:x3; val_offset:63036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63036*FLEN/8, x4, x1, x2) - -inst_21013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97e0000; valaddr_reg:x3; val_offset:63039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63039*FLEN/8, x4, x1, x2) - -inst_21014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97f0000; valaddr_reg:x3; val_offset:63042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63042*FLEN/8, x4, x1, x2) - -inst_21015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97f8000; valaddr_reg:x3; val_offset:63045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63045*FLEN/8, x4, x1, x2) - -inst_21016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97fc000; valaddr_reg:x3; val_offset:63048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63048*FLEN/8, x4, x1, x2) - -inst_21017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97fe000; valaddr_reg:x3; val_offset:63051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63051*FLEN/8, x4, x1, x2) - -inst_21018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97ff000; valaddr_reg:x3; val_offset:63054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63054*FLEN/8, x4, x1, x2) - -inst_21019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97ff800; valaddr_reg:x3; val_offset:63057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63057*FLEN/8, x4, x1, x2) - -inst_21020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97ffc00; valaddr_reg:x3; val_offset:63060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63060*FLEN/8, x4, x1, x2) - -inst_21021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97ffe00; valaddr_reg:x3; val_offset:63063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63063*FLEN/8, x4, x1, x2) - -inst_21022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97fff00; valaddr_reg:x3; val_offset:63066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63066*FLEN/8, x4, x1, x2) - -inst_21023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97fff80; valaddr_reg:x3; val_offset:63069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63069*FLEN/8, x4, x1, x2) - -inst_21024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97fffc0; valaddr_reg:x3; val_offset:63072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63072*FLEN/8, x4, x1, x2) - -inst_21025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97fffe0; valaddr_reg:x3; val_offset:63075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63075*FLEN/8, x4, x1, x2) - -inst_21026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97ffff0; valaddr_reg:x3; val_offset:63078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63078*FLEN/8, x4, x1, x2) - -inst_21027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97ffff8; valaddr_reg:x3; val_offset:63081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63081*FLEN/8, x4, x1, x2) - -inst_21028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97ffffc; valaddr_reg:x3; val_offset:63084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63084*FLEN/8, x4, x1, x2) - -inst_21029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97ffffe; valaddr_reg:x3; val_offset:63087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63087*FLEN/8, x4, x1, x2) - -inst_21030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; -op3val:0x97fffff; valaddr_reg:x3; val_offset:63090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63090*FLEN/8, x4, x1, x2) - -inst_21031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:63093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63093*FLEN/8, x4, x1, x2) - -inst_21032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:63096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63096*FLEN/8, x4, x1, x2) - -inst_21033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:63099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63099*FLEN/8, x4, x1, x2) - -inst_21034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:63102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63102*FLEN/8, x4, x1, x2) - -inst_21035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:63105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63105*FLEN/8, x4, x1, x2) - -inst_21036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:63108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63108*FLEN/8, x4, x1, x2) - -inst_21037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:63111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63111*FLEN/8, x4, x1, x2) - -inst_21038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:63114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63114*FLEN/8, x4, x1, x2) - -inst_21039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:63117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63117*FLEN/8, x4, x1, x2) - -inst_21040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:63120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63120*FLEN/8, x4, x1, x2) - -inst_21041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:63123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63123*FLEN/8, x4, x1, x2) - -inst_21042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:63126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63126*FLEN/8, x4, x1, x2) - -inst_21043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:63129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63129*FLEN/8, x4, x1, x2) - -inst_21044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:63132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63132*FLEN/8, x4, x1, x2) - -inst_21045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:63135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63135*FLEN/8, x4, x1, x2) - -inst_21046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:63138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63138*FLEN/8, x4, x1, x2) - -inst_21047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89800000; valaddr_reg:x3; val_offset:63141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63141*FLEN/8, x4, x1, x2) - -inst_21048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89800001; valaddr_reg:x3; val_offset:63144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63144*FLEN/8, x4, x1, x2) - -inst_21049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89800003; valaddr_reg:x3; val_offset:63147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63147*FLEN/8, x4, x1, x2) - -inst_21050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89800007; valaddr_reg:x3; val_offset:63150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63150*FLEN/8, x4, x1, x2) - -inst_21051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8980000f; valaddr_reg:x3; val_offset:63153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63153*FLEN/8, x4, x1, x2) - -inst_21052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8980001f; valaddr_reg:x3; val_offset:63156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63156*FLEN/8, x4, x1, x2) - -inst_21053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8980003f; valaddr_reg:x3; val_offset:63159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63159*FLEN/8, x4, x1, x2) - -inst_21054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8980007f; valaddr_reg:x3; val_offset:63162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63162*FLEN/8, x4, x1, x2) - -inst_21055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x898000ff; valaddr_reg:x3; val_offset:63165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63165*FLEN/8, x4, x1, x2) - -inst_21056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x898001ff; valaddr_reg:x3; val_offset:63168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63168*FLEN/8, x4, x1, x2) - -inst_21057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x898003ff; valaddr_reg:x3; val_offset:63171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63171*FLEN/8, x4, x1, x2) - -inst_21058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x898007ff; valaddr_reg:x3; val_offset:63174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63174*FLEN/8, x4, x1, x2) - -inst_21059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89800fff; valaddr_reg:x3; val_offset:63177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63177*FLEN/8, x4, x1, x2) - -inst_21060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89801fff; valaddr_reg:x3; val_offset:63180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63180*FLEN/8, x4, x1, x2) - -inst_21061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89803fff; valaddr_reg:x3; val_offset:63183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63183*FLEN/8, x4, x1, x2) - -inst_21062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89807fff; valaddr_reg:x3; val_offset:63186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63186*FLEN/8, x4, x1, x2) - -inst_21063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8980ffff; valaddr_reg:x3; val_offset:63189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63189*FLEN/8, x4, x1, x2) - -inst_21064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8981ffff; valaddr_reg:x3; val_offset:63192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63192*FLEN/8, x4, x1, x2) - -inst_21065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8983ffff; valaddr_reg:x3; val_offset:63195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63195*FLEN/8, x4, x1, x2) - -inst_21066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x8987ffff; valaddr_reg:x3; val_offset:63198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63198*FLEN/8, x4, x1, x2) - -inst_21067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x898fffff; valaddr_reg:x3; val_offset:63201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63201*FLEN/8, x4, x1, x2) - -inst_21068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x899fffff; valaddr_reg:x3; val_offset:63204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63204*FLEN/8, x4, x1, x2) - -inst_21069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89bfffff; valaddr_reg:x3; val_offset:63207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63207*FLEN/8, x4, x1, x2) - -inst_21070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89c00000; valaddr_reg:x3; val_offset:63210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63210*FLEN/8, x4, x1, x2) - -inst_21071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89e00000; valaddr_reg:x3; val_offset:63213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63213*FLEN/8, x4, x1, x2) - -inst_21072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89f00000; valaddr_reg:x3; val_offset:63216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63216*FLEN/8, x4, x1, x2) - -inst_21073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89f80000; valaddr_reg:x3; val_offset:63219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63219*FLEN/8, x4, x1, x2) - -inst_21074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fc0000; valaddr_reg:x3; val_offset:63222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63222*FLEN/8, x4, x1, x2) - -inst_21075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fe0000; valaddr_reg:x3; val_offset:63225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63225*FLEN/8, x4, x1, x2) - -inst_21076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ff0000; valaddr_reg:x3; val_offset:63228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63228*FLEN/8, x4, x1, x2) - -inst_21077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ff8000; valaddr_reg:x3; val_offset:63231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63231*FLEN/8, x4, x1, x2) - -inst_21078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ffc000; valaddr_reg:x3; val_offset:63234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63234*FLEN/8, x4, x1, x2) - -inst_21079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ffe000; valaddr_reg:x3; val_offset:63237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63237*FLEN/8, x4, x1, x2) - -inst_21080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fff000; valaddr_reg:x3; val_offset:63240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63240*FLEN/8, x4, x1, x2) - -inst_21081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fff800; valaddr_reg:x3; val_offset:63243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63243*FLEN/8, x4, x1, x2) - -inst_21082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fffc00; valaddr_reg:x3; val_offset:63246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63246*FLEN/8, x4, x1, x2) - -inst_21083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fffe00; valaddr_reg:x3; val_offset:63249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63249*FLEN/8, x4, x1, x2) - -inst_21084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ffff00; valaddr_reg:x3; val_offset:63252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63252*FLEN/8, x4, x1, x2) - -inst_21085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ffff80; valaddr_reg:x3; val_offset:63255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63255*FLEN/8, x4, x1, x2) - -inst_21086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ffffc0; valaddr_reg:x3; val_offset:63258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63258*FLEN/8, x4, x1, x2) - -inst_21087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ffffe0; valaddr_reg:x3; val_offset:63261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63261*FLEN/8, x4, x1, x2) - -inst_21088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fffff0; valaddr_reg:x3; val_offset:63264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63264*FLEN/8, x4, x1, x2) - -inst_21089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fffff8; valaddr_reg:x3; val_offset:63267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63267*FLEN/8, x4, x1, x2) - -inst_21090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fffffc; valaddr_reg:x3; val_offset:63270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63270*FLEN/8, x4, x1, x2) - -inst_21091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89fffffe; valaddr_reg:x3; val_offset:63273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63273*FLEN/8, x4, x1, x2) - -inst_21092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; -op3val:0x89ffffff; valaddr_reg:x3; val_offset:63276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63276*FLEN/8, x4, x1, x2) - -inst_21093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:63279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63279*FLEN/8, x4, x1, x2) - -inst_21094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:63282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63282*FLEN/8, x4, x1, x2) - -inst_21095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:63285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63285*FLEN/8, x4, x1, x2) - -inst_21096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:63288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63288*FLEN/8, x4, x1, x2) - -inst_21097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:63291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63291*FLEN/8, x4, x1, x2) - -inst_21098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:63294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63294*FLEN/8, x4, x1, x2) - -inst_21099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:63297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63297*FLEN/8, x4, x1, x2) - -inst_21100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:63300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63300*FLEN/8, x4, x1, x2) - -inst_21101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:63303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63303*FLEN/8, x4, x1, x2) - -inst_21102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:63306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63306*FLEN/8, x4, x1, x2) - -inst_21103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:63309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63309*FLEN/8, x4, x1, x2) - -inst_21104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:63312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63312*FLEN/8, x4, x1, x2) - -inst_21105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:63315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63315*FLEN/8, x4, x1, x2) - -inst_21106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:63318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63318*FLEN/8, x4, x1, x2) - -inst_21107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:63321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63321*FLEN/8, x4, x1, x2) - -inst_21108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:63324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63324*FLEN/8, x4, x1, x2) - -inst_21109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd800000; valaddr_reg:x3; val_offset:63327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63327*FLEN/8, x4, x1, x2) - -inst_21110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd800001; valaddr_reg:x3; val_offset:63330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63330*FLEN/8, x4, x1, x2) - -inst_21111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd800003; valaddr_reg:x3; val_offset:63333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63333*FLEN/8, x4, x1, x2) - -inst_21112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd800007; valaddr_reg:x3; val_offset:63336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63336*FLEN/8, x4, x1, x2) - -inst_21113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd80000f; valaddr_reg:x3; val_offset:63339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63339*FLEN/8, x4, x1, x2) - -inst_21114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd80001f; valaddr_reg:x3; val_offset:63342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63342*FLEN/8, x4, x1, x2) - -inst_21115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd80003f; valaddr_reg:x3; val_offset:63345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63345*FLEN/8, x4, x1, x2) - -inst_21116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd80007f; valaddr_reg:x3; val_offset:63348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63348*FLEN/8, x4, x1, x2) - -inst_21117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd8000ff; valaddr_reg:x3; val_offset:63351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63351*FLEN/8, x4, x1, x2) - -inst_21118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd8001ff; valaddr_reg:x3; val_offset:63354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63354*FLEN/8, x4, x1, x2) - -inst_21119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd8003ff; valaddr_reg:x3; val_offset:63357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63357*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_166) - -inst_21120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd8007ff; valaddr_reg:x3; val_offset:63360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63360*FLEN/8, x4, x1, x2) - -inst_21121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd800fff; valaddr_reg:x3; val_offset:63363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63363*FLEN/8, x4, x1, x2) - -inst_21122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd801fff; valaddr_reg:x3; val_offset:63366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63366*FLEN/8, x4, x1, x2) - -inst_21123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd803fff; valaddr_reg:x3; val_offset:63369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63369*FLEN/8, x4, x1, x2) - -inst_21124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd807fff; valaddr_reg:x3; val_offset:63372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63372*FLEN/8, x4, x1, x2) - -inst_21125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd80ffff; valaddr_reg:x3; val_offset:63375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63375*FLEN/8, x4, x1, x2) - -inst_21126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd81ffff; valaddr_reg:x3; val_offset:63378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63378*FLEN/8, x4, x1, x2) - -inst_21127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd83ffff; valaddr_reg:x3; val_offset:63381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63381*FLEN/8, x4, x1, x2) - -inst_21128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd87ffff; valaddr_reg:x3; val_offset:63384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63384*FLEN/8, x4, x1, x2) - -inst_21129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd8fffff; valaddr_reg:x3; val_offset:63387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63387*FLEN/8, x4, x1, x2) - -inst_21130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xd9fffff; valaddr_reg:x3; val_offset:63390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63390*FLEN/8, x4, x1, x2) - -inst_21131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdbfffff; valaddr_reg:x3; val_offset:63393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63393*FLEN/8, x4, x1, x2) - -inst_21132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdc00000; valaddr_reg:x3; val_offset:63396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63396*FLEN/8, x4, x1, x2) - -inst_21133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xde00000; valaddr_reg:x3; val_offset:63399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63399*FLEN/8, x4, x1, x2) - -inst_21134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdf00000; valaddr_reg:x3; val_offset:63402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63402*FLEN/8, x4, x1, x2) - -inst_21135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdf80000; valaddr_reg:x3; val_offset:63405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63405*FLEN/8, x4, x1, x2) - -inst_21136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfc0000; valaddr_reg:x3; val_offset:63408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63408*FLEN/8, x4, x1, x2) - -inst_21137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfe0000; valaddr_reg:x3; val_offset:63411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63411*FLEN/8, x4, x1, x2) - -inst_21138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdff0000; valaddr_reg:x3; val_offset:63414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63414*FLEN/8, x4, x1, x2) - -inst_21139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdff8000; valaddr_reg:x3; val_offset:63417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63417*FLEN/8, x4, x1, x2) - -inst_21140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdffc000; valaddr_reg:x3; val_offset:63420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63420*FLEN/8, x4, x1, x2) - -inst_21141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdffe000; valaddr_reg:x3; val_offset:63423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63423*FLEN/8, x4, x1, x2) - -inst_21142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfff000; valaddr_reg:x3; val_offset:63426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63426*FLEN/8, x4, x1, x2) - -inst_21143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfff800; valaddr_reg:x3; val_offset:63429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63429*FLEN/8, x4, x1, x2) - -inst_21144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfffc00; valaddr_reg:x3; val_offset:63432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63432*FLEN/8, x4, x1, x2) - -inst_21145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfffe00; valaddr_reg:x3; val_offset:63435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63435*FLEN/8, x4, x1, x2) - -inst_21146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdffff00; valaddr_reg:x3; val_offset:63438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63438*FLEN/8, x4, x1, x2) - -inst_21147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdffff80; valaddr_reg:x3; val_offset:63441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63441*FLEN/8, x4, x1, x2) - -inst_21148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdffffc0; valaddr_reg:x3; val_offset:63444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63444*FLEN/8, x4, x1, x2) - -inst_21149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdffffe0; valaddr_reg:x3; val_offset:63447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63447*FLEN/8, x4, x1, x2) - -inst_21150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfffff0; valaddr_reg:x3; val_offset:63450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63450*FLEN/8, x4, x1, x2) - -inst_21151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfffff8; valaddr_reg:x3; val_offset:63453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63453*FLEN/8, x4, x1, x2) - -inst_21152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfffffc; valaddr_reg:x3; val_offset:63456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63456*FLEN/8, x4, x1, x2) - -inst_21153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdfffffe; valaddr_reg:x3; val_offset:63459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63459*FLEN/8, x4, x1, x2) - -inst_21154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; -op3val:0xdffffff; valaddr_reg:x3; val_offset:63462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63462*FLEN/8, x4, x1, x2) - -inst_21155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70800000; valaddr_reg:x3; val_offset:63465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63465*FLEN/8, x4, x1, x2) - -inst_21156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70800001; valaddr_reg:x3; val_offset:63468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63468*FLEN/8, x4, x1, x2) - -inst_21157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70800003; valaddr_reg:x3; val_offset:63471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63471*FLEN/8, x4, x1, x2) - -inst_21158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70800007; valaddr_reg:x3; val_offset:63474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63474*FLEN/8, x4, x1, x2) - -inst_21159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7080000f; valaddr_reg:x3; val_offset:63477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63477*FLEN/8, x4, x1, x2) - -inst_21160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7080001f; valaddr_reg:x3; val_offset:63480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63480*FLEN/8, x4, x1, x2) - -inst_21161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7080003f; valaddr_reg:x3; val_offset:63483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63483*FLEN/8, x4, x1, x2) - -inst_21162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7080007f; valaddr_reg:x3; val_offset:63486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63486*FLEN/8, x4, x1, x2) - -inst_21163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x708000ff; valaddr_reg:x3; val_offset:63489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63489*FLEN/8, x4, x1, x2) - -inst_21164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x708001ff; valaddr_reg:x3; val_offset:63492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63492*FLEN/8, x4, x1, x2) - -inst_21165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x708003ff; valaddr_reg:x3; val_offset:63495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63495*FLEN/8, x4, x1, x2) - -inst_21166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x708007ff; valaddr_reg:x3; val_offset:63498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63498*FLEN/8, x4, x1, x2) - -inst_21167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70800fff; valaddr_reg:x3; val_offset:63501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63501*FLEN/8, x4, x1, x2) - -inst_21168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70801fff; valaddr_reg:x3; val_offset:63504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63504*FLEN/8, x4, x1, x2) - -inst_21169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70803fff; valaddr_reg:x3; val_offset:63507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63507*FLEN/8, x4, x1, x2) - -inst_21170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70807fff; valaddr_reg:x3; val_offset:63510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63510*FLEN/8, x4, x1, x2) - -inst_21171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7080ffff; valaddr_reg:x3; val_offset:63513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63513*FLEN/8, x4, x1, x2) - -inst_21172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7081ffff; valaddr_reg:x3; val_offset:63516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63516*FLEN/8, x4, x1, x2) - -inst_21173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7083ffff; valaddr_reg:x3; val_offset:63519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63519*FLEN/8, x4, x1, x2) - -inst_21174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7087ffff; valaddr_reg:x3; val_offset:63522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63522*FLEN/8, x4, x1, x2) - -inst_21175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x708fffff; valaddr_reg:x3; val_offset:63525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63525*FLEN/8, x4, x1, x2) - -inst_21176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x709fffff; valaddr_reg:x3; val_offset:63528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63528*FLEN/8, x4, x1, x2) - -inst_21177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70bfffff; valaddr_reg:x3; val_offset:63531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63531*FLEN/8, x4, x1, x2) - -inst_21178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70c00000; valaddr_reg:x3; val_offset:63534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63534*FLEN/8, x4, x1, x2) - -inst_21179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70e00000; valaddr_reg:x3; val_offset:63537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63537*FLEN/8, x4, x1, x2) - -inst_21180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70f00000; valaddr_reg:x3; val_offset:63540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63540*FLEN/8, x4, x1, x2) - -inst_21181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70f80000; valaddr_reg:x3; val_offset:63543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63543*FLEN/8, x4, x1, x2) - -inst_21182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fc0000; valaddr_reg:x3; val_offset:63546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63546*FLEN/8, x4, x1, x2) - -inst_21183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fe0000; valaddr_reg:x3; val_offset:63549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63549*FLEN/8, x4, x1, x2) - -inst_21184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ff0000; valaddr_reg:x3; val_offset:63552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63552*FLEN/8, x4, x1, x2) - -inst_21185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ff8000; valaddr_reg:x3; val_offset:63555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63555*FLEN/8, x4, x1, x2) - -inst_21186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ffc000; valaddr_reg:x3; val_offset:63558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63558*FLEN/8, x4, x1, x2) - -inst_21187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ffe000; valaddr_reg:x3; val_offset:63561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63561*FLEN/8, x4, x1, x2) - -inst_21188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fff000; valaddr_reg:x3; val_offset:63564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63564*FLEN/8, x4, x1, x2) - -inst_21189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fff800; valaddr_reg:x3; val_offset:63567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63567*FLEN/8, x4, x1, x2) - -inst_21190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fffc00; valaddr_reg:x3; val_offset:63570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63570*FLEN/8, x4, x1, x2) - -inst_21191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fffe00; valaddr_reg:x3; val_offset:63573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63573*FLEN/8, x4, x1, x2) - -inst_21192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ffff00; valaddr_reg:x3; val_offset:63576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63576*FLEN/8, x4, x1, x2) - -inst_21193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ffff80; valaddr_reg:x3; val_offset:63579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63579*FLEN/8, x4, x1, x2) - -inst_21194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ffffc0; valaddr_reg:x3; val_offset:63582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63582*FLEN/8, x4, x1, x2) - -inst_21195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ffffe0; valaddr_reg:x3; val_offset:63585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63585*FLEN/8, x4, x1, x2) - -inst_21196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fffff0; valaddr_reg:x3; val_offset:63588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63588*FLEN/8, x4, x1, x2) - -inst_21197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fffff8; valaddr_reg:x3; val_offset:63591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63591*FLEN/8, x4, x1, x2) - -inst_21198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fffffc; valaddr_reg:x3; val_offset:63594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63594*FLEN/8, x4, x1, x2) - -inst_21199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70fffffe; valaddr_reg:x3; val_offset:63597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63597*FLEN/8, x4, x1, x2) - -inst_21200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x70ffffff; valaddr_reg:x3; val_offset:63600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63600*FLEN/8, x4, x1, x2) - -inst_21201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f000001; valaddr_reg:x3; val_offset:63603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63603*FLEN/8, x4, x1, x2) - -inst_21202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f000003; valaddr_reg:x3; val_offset:63606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63606*FLEN/8, x4, x1, x2) - -inst_21203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f000007; valaddr_reg:x3; val_offset:63609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63609*FLEN/8, x4, x1, x2) - -inst_21204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f199999; valaddr_reg:x3; val_offset:63612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63612*FLEN/8, x4, x1, x2) - -inst_21205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f249249; valaddr_reg:x3; val_offset:63615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63615*FLEN/8, x4, x1, x2) - -inst_21206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f333333; valaddr_reg:x3; val_offset:63618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63618*FLEN/8, x4, x1, x2) - -inst_21207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:63621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63621*FLEN/8, x4, x1, x2) - -inst_21208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:63624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63624*FLEN/8, x4, x1, x2) - -inst_21209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f444444; valaddr_reg:x3; val_offset:63627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63627*FLEN/8, x4, x1, x2) - -inst_21210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:63630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63630*FLEN/8, x4, x1, x2) - -inst_21211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:63633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63633*FLEN/8, x4, x1, x2) - -inst_21212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f666666; valaddr_reg:x3; val_offset:63636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63636*FLEN/8, x4, x1, x2) - -inst_21213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:63639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63639*FLEN/8, x4, x1, x2) - -inst_21214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:63642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63642*FLEN/8, x4, x1, x2) - -inst_21215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:63645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63645*FLEN/8, x4, x1, x2) - -inst_21216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:63648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63648*FLEN/8, x4, x1, x2) - -inst_21217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80000000; valaddr_reg:x3; val_offset:63651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63651*FLEN/8, x4, x1, x2) - -inst_21218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:63654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63654*FLEN/8, x4, x1, x2) - -inst_21219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:63657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63657*FLEN/8, x4, x1, x2) - -inst_21220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:63660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63660*FLEN/8, x4, x1, x2) - -inst_21221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8000000f; valaddr_reg:x3; val_offset:63663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63663*FLEN/8, x4, x1, x2) - -inst_21222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8000001f; valaddr_reg:x3; val_offset:63666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63666*FLEN/8, x4, x1, x2) - -inst_21223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8000003f; valaddr_reg:x3; val_offset:63669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63669*FLEN/8, x4, x1, x2) - -inst_21224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8000007f; valaddr_reg:x3; val_offset:63672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63672*FLEN/8, x4, x1, x2) - -inst_21225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x800000ff; valaddr_reg:x3; val_offset:63675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63675*FLEN/8, x4, x1, x2) - -inst_21226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x800001ff; valaddr_reg:x3; val_offset:63678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63678*FLEN/8, x4, x1, x2) - -inst_21227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x800003ff; valaddr_reg:x3; val_offset:63681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63681*FLEN/8, x4, x1, x2) - -inst_21228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x800007ff; valaddr_reg:x3; val_offset:63684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63684*FLEN/8, x4, x1, x2) - -inst_21229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80000fff; valaddr_reg:x3; val_offset:63687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63687*FLEN/8, x4, x1, x2) - -inst_21230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80001fff; valaddr_reg:x3; val_offset:63690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63690*FLEN/8, x4, x1, x2) - -inst_21231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80003fff; valaddr_reg:x3; val_offset:63693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63693*FLEN/8, x4, x1, x2) - -inst_21232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80007fff; valaddr_reg:x3; val_offset:63696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63696*FLEN/8, x4, x1, x2) - -inst_21233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8000ffff; valaddr_reg:x3; val_offset:63699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63699*FLEN/8, x4, x1, x2) - -inst_21234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8001ffff; valaddr_reg:x3; val_offset:63702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63702*FLEN/8, x4, x1, x2) - -inst_21235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8003ffff; valaddr_reg:x3; val_offset:63705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63705*FLEN/8, x4, x1, x2) - -inst_21236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8007ffff; valaddr_reg:x3; val_offset:63708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63708*FLEN/8, x4, x1, x2) - -inst_21237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x800fffff; valaddr_reg:x3; val_offset:63711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63711*FLEN/8, x4, x1, x2) - -inst_21238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:63714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63714*FLEN/8, x4, x1, x2) - -inst_21239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x801fffff; valaddr_reg:x3; val_offset:63717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63717*FLEN/8, x4, x1, x2) - -inst_21240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:63720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63720*FLEN/8, x4, x1, x2) - -inst_21241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:63723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63723*FLEN/8, x4, x1, x2) - -inst_21242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:63726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63726*FLEN/8, x4, x1, x2) - -inst_21243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:63729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63729*FLEN/8, x4, x1, x2) - -inst_21244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x803fffff; valaddr_reg:x3; val_offset:63732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63732*FLEN/8, x4, x1, x2) - -inst_21245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80400000; valaddr_reg:x3; val_offset:63735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63735*FLEN/8, x4, x1, x2) - -inst_21246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:63738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63738*FLEN/8, x4, x1, x2) - -inst_21247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:63741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63741*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_167) - -inst_21248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:63744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63744*FLEN/8, x4, x1, x2) - -inst_21249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80600000; valaddr_reg:x3; val_offset:63747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63747*FLEN/8, x4, x1, x2) - -inst_21250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:63750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63750*FLEN/8, x4, x1, x2) - -inst_21251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:63753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63753*FLEN/8, x4, x1, x2) - -inst_21252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80700000; valaddr_reg:x3; val_offset:63756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63756*FLEN/8, x4, x1, x2) - -inst_21253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x80780000; valaddr_reg:x3; val_offset:63759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63759*FLEN/8, x4, x1, x2) - -inst_21254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807c0000; valaddr_reg:x3; val_offset:63762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63762*FLEN/8, x4, x1, x2) - -inst_21255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807e0000; valaddr_reg:x3; val_offset:63765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63765*FLEN/8, x4, x1, x2) - -inst_21256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807f0000; valaddr_reg:x3; val_offset:63768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63768*FLEN/8, x4, x1, x2) - -inst_21257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807f8000; valaddr_reg:x3; val_offset:63771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63771*FLEN/8, x4, x1, x2) - -inst_21258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807fc000; valaddr_reg:x3; val_offset:63774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63774*FLEN/8, x4, x1, x2) - -inst_21259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807fe000; valaddr_reg:x3; val_offset:63777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63777*FLEN/8, x4, x1, x2) - -inst_21260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807ff000; valaddr_reg:x3; val_offset:63780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63780*FLEN/8, x4, x1, x2) - -inst_21261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807ff800; valaddr_reg:x3; val_offset:63783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63783*FLEN/8, x4, x1, x2) - -inst_21262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807ffc00; valaddr_reg:x3; val_offset:63786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63786*FLEN/8, x4, x1, x2) - -inst_21263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807ffe00; valaddr_reg:x3; val_offset:63789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63789*FLEN/8, x4, x1, x2) - -inst_21264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807fff00; valaddr_reg:x3; val_offset:63792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63792*FLEN/8, x4, x1, x2) - -inst_21265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807fff80; valaddr_reg:x3; val_offset:63795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63795*FLEN/8, x4, x1, x2) - -inst_21266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807fffc0; valaddr_reg:x3; val_offset:63798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63798*FLEN/8, x4, x1, x2) - -inst_21267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807fffe0; valaddr_reg:x3; val_offset:63801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63801*FLEN/8, x4, x1, x2) - -inst_21268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807ffff0; valaddr_reg:x3; val_offset:63804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63804*FLEN/8, x4, x1, x2) - -inst_21269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:63807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63807*FLEN/8, x4, x1, x2) - -inst_21270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:63810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63810*FLEN/8, x4, x1, x2) - -inst_21271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:63813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63813*FLEN/8, x4, x1, x2) - -inst_21272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; -op3val:0x807fffff; valaddr_reg:x3; val_offset:63816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63816*FLEN/8, x4, x1, x2) - -inst_21273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2800000; valaddr_reg:x3; val_offset:63819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63819*FLEN/8, x4, x1, x2) - -inst_21274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2800001; valaddr_reg:x3; val_offset:63822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63822*FLEN/8, x4, x1, x2) - -inst_21275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2800003; valaddr_reg:x3; val_offset:63825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63825*FLEN/8, x4, x1, x2) - -inst_21276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2800007; valaddr_reg:x3; val_offset:63828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63828*FLEN/8, x4, x1, x2) - -inst_21277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe280000f; valaddr_reg:x3; val_offset:63831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63831*FLEN/8, x4, x1, x2) - -inst_21278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe280001f; valaddr_reg:x3; val_offset:63834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63834*FLEN/8, x4, x1, x2) - -inst_21279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe280003f; valaddr_reg:x3; val_offset:63837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63837*FLEN/8, x4, x1, x2) - -inst_21280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe280007f; valaddr_reg:x3; val_offset:63840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63840*FLEN/8, x4, x1, x2) - -inst_21281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe28000ff; valaddr_reg:x3; val_offset:63843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63843*FLEN/8, x4, x1, x2) - -inst_21282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe28001ff; valaddr_reg:x3; val_offset:63846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63846*FLEN/8, x4, x1, x2) - -inst_21283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe28003ff; valaddr_reg:x3; val_offset:63849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63849*FLEN/8, x4, x1, x2) - -inst_21284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe28007ff; valaddr_reg:x3; val_offset:63852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63852*FLEN/8, x4, x1, x2) - -inst_21285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2800fff; valaddr_reg:x3; val_offset:63855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63855*FLEN/8, x4, x1, x2) - -inst_21286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2801fff; valaddr_reg:x3; val_offset:63858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63858*FLEN/8, x4, x1, x2) - -inst_21287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2803fff; valaddr_reg:x3; val_offset:63861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63861*FLEN/8, x4, x1, x2) - -inst_21288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2807fff; valaddr_reg:x3; val_offset:63864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63864*FLEN/8, x4, x1, x2) - -inst_21289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe280ffff; valaddr_reg:x3; val_offset:63867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63867*FLEN/8, x4, x1, x2) - -inst_21290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe281ffff; valaddr_reg:x3; val_offset:63870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63870*FLEN/8, x4, x1, x2) - -inst_21291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe283ffff; valaddr_reg:x3; val_offset:63873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63873*FLEN/8, x4, x1, x2) - -inst_21292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe287ffff; valaddr_reg:x3; val_offset:63876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63876*FLEN/8, x4, x1, x2) - -inst_21293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe28fffff; valaddr_reg:x3; val_offset:63879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63879*FLEN/8, x4, x1, x2) - -inst_21294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe29fffff; valaddr_reg:x3; val_offset:63882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63882*FLEN/8, x4, x1, x2) - -inst_21295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2bfffff; valaddr_reg:x3; val_offset:63885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63885*FLEN/8, x4, x1, x2) - -inst_21296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2c00000; valaddr_reg:x3; val_offset:63888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63888*FLEN/8, x4, x1, x2) - -inst_21297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2e00000; valaddr_reg:x3; val_offset:63891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63891*FLEN/8, x4, x1, x2) - -inst_21298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2f00000; valaddr_reg:x3; val_offset:63894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63894*FLEN/8, x4, x1, x2) - -inst_21299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2f80000; valaddr_reg:x3; val_offset:63897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63897*FLEN/8, x4, x1, x2) - -inst_21300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fc0000; valaddr_reg:x3; val_offset:63900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63900*FLEN/8, x4, x1, x2) - -inst_21301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fe0000; valaddr_reg:x3; val_offset:63903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63903*FLEN/8, x4, x1, x2) - -inst_21302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ff0000; valaddr_reg:x3; val_offset:63906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63906*FLEN/8, x4, x1, x2) - -inst_21303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ff8000; valaddr_reg:x3; val_offset:63909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63909*FLEN/8, x4, x1, x2) - -inst_21304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ffc000; valaddr_reg:x3; val_offset:63912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63912*FLEN/8, x4, x1, x2) - -inst_21305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ffe000; valaddr_reg:x3; val_offset:63915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63915*FLEN/8, x4, x1, x2) - -inst_21306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fff000; valaddr_reg:x3; val_offset:63918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63918*FLEN/8, x4, x1, x2) - -inst_21307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fff800; valaddr_reg:x3; val_offset:63921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63921*FLEN/8, x4, x1, x2) - -inst_21308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fffc00; valaddr_reg:x3; val_offset:63924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63924*FLEN/8, x4, x1, x2) - -inst_21309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fffe00; valaddr_reg:x3; val_offset:63927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63927*FLEN/8, x4, x1, x2) - -inst_21310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ffff00; valaddr_reg:x3; val_offset:63930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63930*FLEN/8, x4, x1, x2) - -inst_21311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ffff80; valaddr_reg:x3; val_offset:63933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63933*FLEN/8, x4, x1, x2) - -inst_21312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ffffc0; valaddr_reg:x3; val_offset:63936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63936*FLEN/8, x4, x1, x2) - -inst_21313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ffffe0; valaddr_reg:x3; val_offset:63939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63939*FLEN/8, x4, x1, x2) - -inst_21314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fffff0; valaddr_reg:x3; val_offset:63942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63942*FLEN/8, x4, x1, x2) - -inst_21315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fffff8; valaddr_reg:x3; val_offset:63945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63945*FLEN/8, x4, x1, x2) - -inst_21316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fffffc; valaddr_reg:x3; val_offset:63948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63948*FLEN/8, x4, x1, x2) - -inst_21317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2fffffe; valaddr_reg:x3; val_offset:63951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63951*FLEN/8, x4, x1, x2) - -inst_21318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xe2ffffff; valaddr_reg:x3; val_offset:63954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63954*FLEN/8, x4, x1, x2) - -inst_21319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff000001; valaddr_reg:x3; val_offset:63957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63957*FLEN/8, x4, x1, x2) - -inst_21320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff000003; valaddr_reg:x3; val_offset:63960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63960*FLEN/8, x4, x1, x2) - -inst_21321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff000007; valaddr_reg:x3; val_offset:63963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63963*FLEN/8, x4, x1, x2) - -inst_21322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff199999; valaddr_reg:x3; val_offset:63966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63966*FLEN/8, x4, x1, x2) - -inst_21323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff249249; valaddr_reg:x3; val_offset:63969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63969*FLEN/8, x4, x1, x2) - -inst_21324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff333333; valaddr_reg:x3; val_offset:63972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63972*FLEN/8, x4, x1, x2) - -inst_21325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:63975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63975*FLEN/8, x4, x1, x2) - -inst_21326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:63978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63978*FLEN/8, x4, x1, x2) - -inst_21327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff444444; valaddr_reg:x3; val_offset:63981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63981*FLEN/8, x4, x1, x2) - -inst_21328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:63984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63984*FLEN/8, x4, x1, x2) - -inst_21329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:63987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63987*FLEN/8, x4, x1, x2) - -inst_21330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff666666; valaddr_reg:x3; val_offset:63990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63990*FLEN/8, x4, x1, x2) - -inst_21331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:63993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63993*FLEN/8, x4, x1, x2) - -inst_21332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:63996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63996*FLEN/8, x4, x1, x2) - -inst_21333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:63999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63999*FLEN/8, x4, x1, x2) - -inst_21334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:64002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64002*FLEN/8, x4, x1, x2) - -inst_21335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:64005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64005*FLEN/8, x4, x1, x2) - -inst_21336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:64008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64008*FLEN/8, x4, x1, x2) - -inst_21337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:64011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64011*FLEN/8, x4, x1, x2) - -inst_21338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:64014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64014*FLEN/8, x4, x1, x2) - -inst_21339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:64017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64017*FLEN/8, x4, x1, x2) - -inst_21340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:64020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64020*FLEN/8, x4, x1, x2) - -inst_21341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:64023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64023*FLEN/8, x4, x1, x2) - -inst_21342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:64026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64026*FLEN/8, x4, x1, x2) - -inst_21343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:64029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64029*FLEN/8, x4, x1, x2) - -inst_21344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:64032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64032*FLEN/8, x4, x1, x2) - -inst_21345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:64035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64035*FLEN/8, x4, x1, x2) - -inst_21346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:64038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64038*FLEN/8, x4, x1, x2) - -inst_21347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:64041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64041*FLEN/8, x4, x1, x2) - -inst_21348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:64044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64044*FLEN/8, x4, x1, x2) - -inst_21349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:64047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64047*FLEN/8, x4, x1, x2) - -inst_21350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:64050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64050*FLEN/8, x4, x1, x2) - -inst_21351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb000000; valaddr_reg:x3; val_offset:64053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64053*FLEN/8, x4, x1, x2) - -inst_21352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb000001; valaddr_reg:x3; val_offset:64056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64056*FLEN/8, x4, x1, x2) - -inst_21353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb000003; valaddr_reg:x3; val_offset:64059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64059*FLEN/8, x4, x1, x2) - -inst_21354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb000007; valaddr_reg:x3; val_offset:64062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64062*FLEN/8, x4, x1, x2) - -inst_21355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb00000f; valaddr_reg:x3; val_offset:64065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64065*FLEN/8, x4, x1, x2) - -inst_21356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb00001f; valaddr_reg:x3; val_offset:64068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64068*FLEN/8, x4, x1, x2) - -inst_21357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb00003f; valaddr_reg:x3; val_offset:64071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64071*FLEN/8, x4, x1, x2) - -inst_21358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb00007f; valaddr_reg:x3; val_offset:64074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64074*FLEN/8, x4, x1, x2) - -inst_21359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb0000ff; valaddr_reg:x3; val_offset:64077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64077*FLEN/8, x4, x1, x2) - -inst_21360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb0001ff; valaddr_reg:x3; val_offset:64080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64080*FLEN/8, x4, x1, x2) - -inst_21361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb0003ff; valaddr_reg:x3; val_offset:64083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64083*FLEN/8, x4, x1, x2) - -inst_21362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb0007ff; valaddr_reg:x3; val_offset:64086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64086*FLEN/8, x4, x1, x2) - -inst_21363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb000fff; valaddr_reg:x3; val_offset:64089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64089*FLEN/8, x4, x1, x2) - -inst_21364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb001fff; valaddr_reg:x3; val_offset:64092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64092*FLEN/8, x4, x1, x2) - -inst_21365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb003fff; valaddr_reg:x3; val_offset:64095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64095*FLEN/8, x4, x1, x2) - -inst_21366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb007fff; valaddr_reg:x3; val_offset:64098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64098*FLEN/8, x4, x1, x2) - -inst_21367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb00ffff; valaddr_reg:x3; val_offset:64101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64101*FLEN/8, x4, x1, x2) - -inst_21368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb01ffff; valaddr_reg:x3; val_offset:64104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64104*FLEN/8, x4, x1, x2) - -inst_21369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb03ffff; valaddr_reg:x3; val_offset:64107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64107*FLEN/8, x4, x1, x2) - -inst_21370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb07ffff; valaddr_reg:x3; val_offset:64110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64110*FLEN/8, x4, x1, x2) - -inst_21371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb0fffff; valaddr_reg:x3; val_offset:64113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64113*FLEN/8, x4, x1, x2) - -inst_21372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb1fffff; valaddr_reg:x3; val_offset:64116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64116*FLEN/8, x4, x1, x2) - -inst_21373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb3fffff; valaddr_reg:x3; val_offset:64119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64119*FLEN/8, x4, x1, x2) - -inst_21374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb400000; valaddr_reg:x3; val_offset:64122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64122*FLEN/8, x4, x1, x2) - -inst_21375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb600000; valaddr_reg:x3; val_offset:64125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64125*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_168) - -inst_21376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb700000; valaddr_reg:x3; val_offset:64128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64128*FLEN/8, x4, x1, x2) - -inst_21377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb780000; valaddr_reg:x3; val_offset:64131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64131*FLEN/8, x4, x1, x2) - -inst_21378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7c0000; valaddr_reg:x3; val_offset:64134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64134*FLEN/8, x4, x1, x2) - -inst_21379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7e0000; valaddr_reg:x3; val_offset:64137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64137*FLEN/8, x4, x1, x2) - -inst_21380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7f0000; valaddr_reg:x3; val_offset:64140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64140*FLEN/8, x4, x1, x2) - -inst_21381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7f8000; valaddr_reg:x3; val_offset:64143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64143*FLEN/8, x4, x1, x2) - -inst_21382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7fc000; valaddr_reg:x3; val_offset:64146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64146*FLEN/8, x4, x1, x2) - -inst_21383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7fe000; valaddr_reg:x3; val_offset:64149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64149*FLEN/8, x4, x1, x2) - -inst_21384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7ff000; valaddr_reg:x3; val_offset:64152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64152*FLEN/8, x4, x1, x2) - -inst_21385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7ff800; valaddr_reg:x3; val_offset:64155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64155*FLEN/8, x4, x1, x2) - -inst_21386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7ffc00; valaddr_reg:x3; val_offset:64158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64158*FLEN/8, x4, x1, x2) - -inst_21387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7ffe00; valaddr_reg:x3; val_offset:64161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64161*FLEN/8, x4, x1, x2) - -inst_21388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7fff00; valaddr_reg:x3; val_offset:64164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64164*FLEN/8, x4, x1, x2) - -inst_21389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7fff80; valaddr_reg:x3; val_offset:64167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64167*FLEN/8, x4, x1, x2) - -inst_21390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7fffc0; valaddr_reg:x3; val_offset:64170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64170*FLEN/8, x4, x1, x2) - -inst_21391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7fffe0; valaddr_reg:x3; val_offset:64173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64173*FLEN/8, x4, x1, x2) - -inst_21392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7ffff0; valaddr_reg:x3; val_offset:64176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64176*FLEN/8, x4, x1, x2) - -inst_21393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7ffff8; valaddr_reg:x3; val_offset:64179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64179*FLEN/8, x4, x1, x2) - -inst_21394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7ffffc; valaddr_reg:x3; val_offset:64182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64182*FLEN/8, x4, x1, x2) - -inst_21395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7ffffe; valaddr_reg:x3; val_offset:64185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64185*FLEN/8, x4, x1, x2) - -inst_21396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; -op3val:0xb7fffff; valaddr_reg:x3; val_offset:64188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64188*FLEN/8, x4, x1, x2) - -inst_21397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:64191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64191*FLEN/8, x4, x1, x2) - -inst_21398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:64194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64194*FLEN/8, x4, x1, x2) - -inst_21399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:64197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64197*FLEN/8, x4, x1, x2) - -inst_21400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:64200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64200*FLEN/8, x4, x1, x2) - -inst_21401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:64203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64203*FLEN/8, x4, x1, x2) - -inst_21402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:64206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64206*FLEN/8, x4, x1, x2) - -inst_21403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:64209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64209*FLEN/8, x4, x1, x2) - -inst_21404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:64212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64212*FLEN/8, x4, x1, x2) - -inst_21405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:64215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64215*FLEN/8, x4, x1, x2) - -inst_21406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:64218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64218*FLEN/8, x4, x1, x2) - -inst_21407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:64221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64221*FLEN/8, x4, x1, x2) - -inst_21408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:64224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64224*FLEN/8, x4, x1, x2) - -inst_21409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:64227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64227*FLEN/8, x4, x1, x2) - -inst_21410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:64230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64230*FLEN/8, x4, x1, x2) - -inst_21411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:64233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64233*FLEN/8, x4, x1, x2) - -inst_21412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:64236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64236*FLEN/8, x4, x1, x2) - -inst_21413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90000000; valaddr_reg:x3; val_offset:64239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64239*FLEN/8, x4, x1, x2) - -inst_21414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90000001; valaddr_reg:x3; val_offset:64242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64242*FLEN/8, x4, x1, x2) - -inst_21415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90000003; valaddr_reg:x3; val_offset:64245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64245*FLEN/8, x4, x1, x2) - -inst_21416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90000007; valaddr_reg:x3; val_offset:64248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64248*FLEN/8, x4, x1, x2) - -inst_21417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x9000000f; valaddr_reg:x3; val_offset:64251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64251*FLEN/8, x4, x1, x2) - -inst_21418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x9000001f; valaddr_reg:x3; val_offset:64254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64254*FLEN/8, x4, x1, x2) - -inst_21419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x9000003f; valaddr_reg:x3; val_offset:64257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64257*FLEN/8, x4, x1, x2) - -inst_21420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x9000007f; valaddr_reg:x3; val_offset:64260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64260*FLEN/8, x4, x1, x2) - -inst_21421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x900000ff; valaddr_reg:x3; val_offset:64263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64263*FLEN/8, x4, x1, x2) - -inst_21422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x900001ff; valaddr_reg:x3; val_offset:64266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64266*FLEN/8, x4, x1, x2) - -inst_21423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x900003ff; valaddr_reg:x3; val_offset:64269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64269*FLEN/8, x4, x1, x2) - -inst_21424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x900007ff; valaddr_reg:x3; val_offset:64272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64272*FLEN/8, x4, x1, x2) - -inst_21425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90000fff; valaddr_reg:x3; val_offset:64275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64275*FLEN/8, x4, x1, x2) - -inst_21426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90001fff; valaddr_reg:x3; val_offset:64278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64278*FLEN/8, x4, x1, x2) - -inst_21427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90003fff; valaddr_reg:x3; val_offset:64281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64281*FLEN/8, x4, x1, x2) - -inst_21428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90007fff; valaddr_reg:x3; val_offset:64284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64284*FLEN/8, x4, x1, x2) - -inst_21429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x9000ffff; valaddr_reg:x3; val_offset:64287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64287*FLEN/8, x4, x1, x2) - -inst_21430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x9001ffff; valaddr_reg:x3; val_offset:64290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64290*FLEN/8, x4, x1, x2) - -inst_21431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x9003ffff; valaddr_reg:x3; val_offset:64293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64293*FLEN/8, x4, x1, x2) - -inst_21432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x9007ffff; valaddr_reg:x3; val_offset:64296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64296*FLEN/8, x4, x1, x2) - -inst_21433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x900fffff; valaddr_reg:x3; val_offset:64299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64299*FLEN/8, x4, x1, x2) - -inst_21434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x901fffff; valaddr_reg:x3; val_offset:64302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64302*FLEN/8, x4, x1, x2) - -inst_21435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x903fffff; valaddr_reg:x3; val_offset:64305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64305*FLEN/8, x4, x1, x2) - -inst_21436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90400000; valaddr_reg:x3; val_offset:64308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64308*FLEN/8, x4, x1, x2) - -inst_21437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90600000; valaddr_reg:x3; val_offset:64311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64311*FLEN/8, x4, x1, x2) - -inst_21438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90700000; valaddr_reg:x3; val_offset:64314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64314*FLEN/8, x4, x1, x2) - -inst_21439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x90780000; valaddr_reg:x3; val_offset:64317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64317*FLEN/8, x4, x1, x2) - -inst_21440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907c0000; valaddr_reg:x3; val_offset:64320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64320*FLEN/8, x4, x1, x2) - -inst_21441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907e0000; valaddr_reg:x3; val_offset:64323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64323*FLEN/8, x4, x1, x2) - -inst_21442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907f0000; valaddr_reg:x3; val_offset:64326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64326*FLEN/8, x4, x1, x2) - -inst_21443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907f8000; valaddr_reg:x3; val_offset:64329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64329*FLEN/8, x4, x1, x2) - -inst_21444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907fc000; valaddr_reg:x3; val_offset:64332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64332*FLEN/8, x4, x1, x2) - -inst_21445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907fe000; valaddr_reg:x3; val_offset:64335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64335*FLEN/8, x4, x1, x2) - -inst_21446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907ff000; valaddr_reg:x3; val_offset:64338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64338*FLEN/8, x4, x1, x2) - -inst_21447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907ff800; valaddr_reg:x3; val_offset:64341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64341*FLEN/8, x4, x1, x2) - -inst_21448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907ffc00; valaddr_reg:x3; val_offset:64344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64344*FLEN/8, x4, x1, x2) - -inst_21449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907ffe00; valaddr_reg:x3; val_offset:64347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64347*FLEN/8, x4, x1, x2) - -inst_21450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907fff00; valaddr_reg:x3; val_offset:64350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64350*FLEN/8, x4, x1, x2) - -inst_21451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907fff80; valaddr_reg:x3; val_offset:64353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64353*FLEN/8, x4, x1, x2) - -inst_21452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907fffc0; valaddr_reg:x3; val_offset:64356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64356*FLEN/8, x4, x1, x2) - -inst_21453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907fffe0; valaddr_reg:x3; val_offset:64359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64359*FLEN/8, x4, x1, x2) - -inst_21454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907ffff0; valaddr_reg:x3; val_offset:64362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64362*FLEN/8, x4, x1, x2) - -inst_21455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907ffff8; valaddr_reg:x3; val_offset:64365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64365*FLEN/8, x4, x1, x2) - -inst_21456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907ffffc; valaddr_reg:x3; val_offset:64368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64368*FLEN/8, x4, x1, x2) - -inst_21457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907ffffe; valaddr_reg:x3; val_offset:64371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64371*FLEN/8, x4, x1, x2) - -inst_21458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; -op3val:0x907fffff; valaddr_reg:x3; val_offset:64374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64374*FLEN/8, x4, x1, x2) - -inst_21459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:64377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64377*FLEN/8, x4, x1, x2) - -inst_21460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:64380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64380*FLEN/8, x4, x1, x2) - -inst_21461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:64383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64383*FLEN/8, x4, x1, x2) - -inst_21462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:64386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64386*FLEN/8, x4, x1, x2) - -inst_21463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:64389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64389*FLEN/8, x4, x1, x2) - -inst_21464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:64392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64392*FLEN/8, x4, x1, x2) - -inst_21465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:64395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64395*FLEN/8, x4, x1, x2) - -inst_21466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:64398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64398*FLEN/8, x4, x1, x2) - -inst_21467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:64401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64401*FLEN/8, x4, x1, x2) - -inst_21468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:64404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64404*FLEN/8, x4, x1, x2) - -inst_21469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:64407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64407*FLEN/8, x4, x1, x2) - -inst_21470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:64410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64410*FLEN/8, x4, x1, x2) - -inst_21471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:64413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64413*FLEN/8, x4, x1, x2) - -inst_21472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:64416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64416*FLEN/8, x4, x1, x2) - -inst_21473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:64419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64419*FLEN/8, x4, x1, x2) - -inst_21474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:64422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64422*FLEN/8, x4, x1, x2) - -inst_21475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e000000; valaddr_reg:x3; val_offset:64425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64425*FLEN/8, x4, x1, x2) - -inst_21476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e000001; valaddr_reg:x3; val_offset:64428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64428*FLEN/8, x4, x1, x2) - -inst_21477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e000003; valaddr_reg:x3; val_offset:64431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64431*FLEN/8, x4, x1, x2) - -inst_21478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e000007; valaddr_reg:x3; val_offset:64434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64434*FLEN/8, x4, x1, x2) - -inst_21479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e00000f; valaddr_reg:x3; val_offset:64437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64437*FLEN/8, x4, x1, x2) - -inst_21480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e00001f; valaddr_reg:x3; val_offset:64440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64440*FLEN/8, x4, x1, x2) - -inst_21481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e00003f; valaddr_reg:x3; val_offset:64443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64443*FLEN/8, x4, x1, x2) - -inst_21482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e00007f; valaddr_reg:x3; val_offset:64446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64446*FLEN/8, x4, x1, x2) - -inst_21483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e0000ff; valaddr_reg:x3; val_offset:64449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64449*FLEN/8, x4, x1, x2) - -inst_21484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e0001ff; valaddr_reg:x3; val_offset:64452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64452*FLEN/8, x4, x1, x2) - -inst_21485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e0003ff; valaddr_reg:x3; val_offset:64455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64455*FLEN/8, x4, x1, x2) - -inst_21486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e0007ff; valaddr_reg:x3; val_offset:64458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64458*FLEN/8, x4, x1, x2) - -inst_21487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e000fff; valaddr_reg:x3; val_offset:64461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64461*FLEN/8, x4, x1, x2) - -inst_21488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e001fff; valaddr_reg:x3; val_offset:64464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64464*FLEN/8, x4, x1, x2) - -inst_21489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e003fff; valaddr_reg:x3; val_offset:64467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64467*FLEN/8, x4, x1, x2) - -inst_21490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e007fff; valaddr_reg:x3; val_offset:64470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64470*FLEN/8, x4, x1, x2) - -inst_21491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e00ffff; valaddr_reg:x3; val_offset:64473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64473*FLEN/8, x4, x1, x2) - -inst_21492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e01ffff; valaddr_reg:x3; val_offset:64476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64476*FLEN/8, x4, x1, x2) - -inst_21493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e03ffff; valaddr_reg:x3; val_offset:64479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64479*FLEN/8, x4, x1, x2) - -inst_21494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e07ffff; valaddr_reg:x3; val_offset:64482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64482*FLEN/8, x4, x1, x2) - -inst_21495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e0fffff; valaddr_reg:x3; val_offset:64485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64485*FLEN/8, x4, x1, x2) - -inst_21496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e1fffff; valaddr_reg:x3; val_offset:64488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64488*FLEN/8, x4, x1, x2) - -inst_21497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e3fffff; valaddr_reg:x3; val_offset:64491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64491*FLEN/8, x4, x1, x2) - -inst_21498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e400000; valaddr_reg:x3; val_offset:64494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64494*FLEN/8, x4, x1, x2) - -inst_21499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e600000; valaddr_reg:x3; val_offset:64497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64497*FLEN/8, x4, x1, x2) - -inst_21500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e700000; valaddr_reg:x3; val_offset:64500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64500*FLEN/8, x4, x1, x2) - -inst_21501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e780000; valaddr_reg:x3; val_offset:64503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64503*FLEN/8, x4, x1, x2) - -inst_21502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7c0000; valaddr_reg:x3; val_offset:64506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64506*FLEN/8, x4, x1, x2) - -inst_21503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7e0000; valaddr_reg:x3; val_offset:64509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64509*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_169) - -inst_21504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7f0000; valaddr_reg:x3; val_offset:64512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64512*FLEN/8, x4, x1, x2) - -inst_21505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7f8000; valaddr_reg:x3; val_offset:64515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64515*FLEN/8, x4, x1, x2) - -inst_21506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7fc000; valaddr_reg:x3; val_offset:64518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64518*FLEN/8, x4, x1, x2) - -inst_21507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7fe000; valaddr_reg:x3; val_offset:64521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64521*FLEN/8, x4, x1, x2) - -inst_21508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7ff000; valaddr_reg:x3; val_offset:64524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64524*FLEN/8, x4, x1, x2) - -inst_21509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7ff800; valaddr_reg:x3; val_offset:64527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64527*FLEN/8, x4, x1, x2) - -inst_21510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:64530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64530*FLEN/8, x4, x1, x2) - -inst_21511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:64533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64533*FLEN/8, x4, x1, x2) - -inst_21512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7fff00; valaddr_reg:x3; val_offset:64536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64536*FLEN/8, x4, x1, x2) - -inst_21513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7fff80; valaddr_reg:x3; val_offset:64539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64539*FLEN/8, x4, x1, x2) - -inst_21514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:64542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64542*FLEN/8, x4, x1, x2) - -inst_21515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:64545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64545*FLEN/8, x4, x1, x2) - -inst_21516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:64548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64548*FLEN/8, x4, x1, x2) - -inst_21517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:64551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64551*FLEN/8, x4, x1, x2) - -inst_21518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:64554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64554*FLEN/8, x4, x1, x2) - -inst_21519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:64557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64557*FLEN/8, x4, x1, x2) - -inst_21520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; -op3val:0x8e7fffff; valaddr_reg:x3; val_offset:64560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64560*FLEN/8, x4, x1, x2) - -inst_21521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbf800001; valaddr_reg:x3; val_offset:64563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64563*FLEN/8, x4, x1, x2) - -inst_21522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbf800003; valaddr_reg:x3; val_offset:64566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64566*FLEN/8, x4, x1, x2) - -inst_21523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbf800007; valaddr_reg:x3; val_offset:64569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64569*FLEN/8, x4, x1, x2) - -inst_21524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbf999999; valaddr_reg:x3; val_offset:64572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64572*FLEN/8, x4, x1, x2) - -inst_21525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:64575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64575*FLEN/8, x4, x1, x2) - -inst_21526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:64578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64578*FLEN/8, x4, x1, x2) - -inst_21527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:64581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64581*FLEN/8, x4, x1, x2) - -inst_21528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:64584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64584*FLEN/8, x4, x1, x2) - -inst_21529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:64587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64587*FLEN/8, x4, x1, x2) - -inst_21530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:64590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64590*FLEN/8, x4, x1, x2) - -inst_21531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:64593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64593*FLEN/8, x4, x1, x2) - -inst_21532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:64596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64596*FLEN/8, x4, x1, x2) - -inst_21533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:64599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64599*FLEN/8, x4, x1, x2) - -inst_21534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:64602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64602*FLEN/8, x4, x1, x2) - -inst_21535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:64605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64605*FLEN/8, x4, x1, x2) - -inst_21536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:64608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64608*FLEN/8, x4, x1, x2) - -inst_21537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6000000; valaddr_reg:x3; val_offset:64611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64611*FLEN/8, x4, x1, x2) - -inst_21538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6000001; valaddr_reg:x3; val_offset:64614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64614*FLEN/8, x4, x1, x2) - -inst_21539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6000003; valaddr_reg:x3; val_offset:64617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64617*FLEN/8, x4, x1, x2) - -inst_21540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6000007; valaddr_reg:x3; val_offset:64620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64620*FLEN/8, x4, x1, x2) - -inst_21541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc600000f; valaddr_reg:x3; val_offset:64623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64623*FLEN/8, x4, x1, x2) - -inst_21542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc600001f; valaddr_reg:x3; val_offset:64626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64626*FLEN/8, x4, x1, x2) - -inst_21543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc600003f; valaddr_reg:x3; val_offset:64629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64629*FLEN/8, x4, x1, x2) - -inst_21544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc600007f; valaddr_reg:x3; val_offset:64632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64632*FLEN/8, x4, x1, x2) - -inst_21545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc60000ff; valaddr_reg:x3; val_offset:64635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64635*FLEN/8, x4, x1, x2) - -inst_21546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc60001ff; valaddr_reg:x3; val_offset:64638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64638*FLEN/8, x4, x1, x2) - -inst_21547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc60003ff; valaddr_reg:x3; val_offset:64641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64641*FLEN/8, x4, x1, x2) - -inst_21548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc60007ff; valaddr_reg:x3; val_offset:64644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64644*FLEN/8, x4, x1, x2) - -inst_21549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6000fff; valaddr_reg:x3; val_offset:64647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64647*FLEN/8, x4, x1, x2) - -inst_21550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6001fff; valaddr_reg:x3; val_offset:64650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64650*FLEN/8, x4, x1, x2) - -inst_21551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6003fff; valaddr_reg:x3; val_offset:64653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64653*FLEN/8, x4, x1, x2) - -inst_21552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6007fff; valaddr_reg:x3; val_offset:64656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64656*FLEN/8, x4, x1, x2) - -inst_21553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc600ffff; valaddr_reg:x3; val_offset:64659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64659*FLEN/8, x4, x1, x2) - -inst_21554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc601ffff; valaddr_reg:x3; val_offset:64662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64662*FLEN/8, x4, x1, x2) - -inst_21555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc603ffff; valaddr_reg:x3; val_offset:64665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64665*FLEN/8, x4, x1, x2) - -inst_21556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc607ffff; valaddr_reg:x3; val_offset:64668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64668*FLEN/8, x4, x1, x2) - -inst_21557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc60fffff; valaddr_reg:x3; val_offset:64671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64671*FLEN/8, x4, x1, x2) - -inst_21558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc61fffff; valaddr_reg:x3; val_offset:64674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64674*FLEN/8, x4, x1, x2) - -inst_21559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc63fffff; valaddr_reg:x3; val_offset:64677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64677*FLEN/8, x4, x1, x2) - -inst_21560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6400000; valaddr_reg:x3; val_offset:64680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64680*FLEN/8, x4, x1, x2) - -inst_21561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6600000; valaddr_reg:x3; val_offset:64683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64683*FLEN/8, x4, x1, x2) - -inst_21562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6700000; valaddr_reg:x3; val_offset:64686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64686*FLEN/8, x4, x1, x2) - -inst_21563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc6780000; valaddr_reg:x3; val_offset:64689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64689*FLEN/8, x4, x1, x2) - -inst_21564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67c0000; valaddr_reg:x3; val_offset:64692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64692*FLEN/8, x4, x1, x2) - -inst_21565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67e0000; valaddr_reg:x3; val_offset:64695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64695*FLEN/8, x4, x1, x2) - -inst_21566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67f0000; valaddr_reg:x3; val_offset:64698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64698*FLEN/8, x4, x1, x2) - -inst_21567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67f8000; valaddr_reg:x3; val_offset:64701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64701*FLEN/8, x4, x1, x2) - -inst_21568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67fc000; valaddr_reg:x3; val_offset:64704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64704*FLEN/8, x4, x1, x2) - -inst_21569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67fe000; valaddr_reg:x3; val_offset:64707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64707*FLEN/8, x4, x1, x2) - -inst_21570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67ff000; valaddr_reg:x3; val_offset:64710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64710*FLEN/8, x4, x1, x2) - -inst_21571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67ff800; valaddr_reg:x3; val_offset:64713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64713*FLEN/8, x4, x1, x2) - -inst_21572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67ffc00; valaddr_reg:x3; val_offset:64716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64716*FLEN/8, x4, x1, x2) - -inst_21573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67ffe00; valaddr_reg:x3; val_offset:64719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64719*FLEN/8, x4, x1, x2) - -inst_21574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67fff00; valaddr_reg:x3; val_offset:64722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64722*FLEN/8, x4, x1, x2) - -inst_21575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67fff80; valaddr_reg:x3; val_offset:64725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64725*FLEN/8, x4, x1, x2) - -inst_21576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67fffc0; valaddr_reg:x3; val_offset:64728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64728*FLEN/8, x4, x1, x2) - -inst_21577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67fffe0; valaddr_reg:x3; val_offset:64731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64731*FLEN/8, x4, x1, x2) - -inst_21578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67ffff0; valaddr_reg:x3; val_offset:64734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64734*FLEN/8, x4, x1, x2) - -inst_21579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67ffff8; valaddr_reg:x3; val_offset:64737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64737*FLEN/8, x4, x1, x2) - -inst_21580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67ffffc; valaddr_reg:x3; val_offset:64740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64740*FLEN/8, x4, x1, x2) - -inst_21581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67ffffe; valaddr_reg:x3; val_offset:64743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64743*FLEN/8, x4, x1, x2) - -inst_21582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; -op3val:0xc67fffff; valaddr_reg:x3; val_offset:64746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64746*FLEN/8, x4, x1, x2) - -inst_21583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9800000; valaddr_reg:x3; val_offset:64749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64749*FLEN/8, x4, x1, x2) - -inst_21584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9800001; valaddr_reg:x3; val_offset:64752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64752*FLEN/8, x4, x1, x2) - -inst_21585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9800003; valaddr_reg:x3; val_offset:64755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64755*FLEN/8, x4, x1, x2) - -inst_21586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9800007; valaddr_reg:x3; val_offset:64758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64758*FLEN/8, x4, x1, x2) - -inst_21587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa980000f; valaddr_reg:x3; val_offset:64761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64761*FLEN/8, x4, x1, x2) - -inst_21588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa980001f; valaddr_reg:x3; val_offset:64764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64764*FLEN/8, x4, x1, x2) - -inst_21589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa980003f; valaddr_reg:x3; val_offset:64767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64767*FLEN/8, x4, x1, x2) - -inst_21590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa980007f; valaddr_reg:x3; val_offset:64770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64770*FLEN/8, x4, x1, x2) - -inst_21591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa98000ff; valaddr_reg:x3; val_offset:64773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64773*FLEN/8, x4, x1, x2) - -inst_21592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa98001ff; valaddr_reg:x3; val_offset:64776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64776*FLEN/8, x4, x1, x2) - -inst_21593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa98003ff; valaddr_reg:x3; val_offset:64779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64779*FLEN/8, x4, x1, x2) - -inst_21594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa98007ff; valaddr_reg:x3; val_offset:64782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64782*FLEN/8, x4, x1, x2) - -inst_21595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9800fff; valaddr_reg:x3; val_offset:64785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64785*FLEN/8, x4, x1, x2) - -inst_21596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9801fff; valaddr_reg:x3; val_offset:64788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64788*FLEN/8, x4, x1, x2) - -inst_21597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9803fff; valaddr_reg:x3; val_offset:64791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64791*FLEN/8, x4, x1, x2) - -inst_21598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9807fff; valaddr_reg:x3; val_offset:64794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64794*FLEN/8, x4, x1, x2) - -inst_21599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa980ffff; valaddr_reg:x3; val_offset:64797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64797*FLEN/8, x4, x1, x2) - -inst_21600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa981ffff; valaddr_reg:x3; val_offset:64800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64800*FLEN/8, x4, x1, x2) - -inst_21601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa983ffff; valaddr_reg:x3; val_offset:64803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64803*FLEN/8, x4, x1, x2) - -inst_21602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa987ffff; valaddr_reg:x3; val_offset:64806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64806*FLEN/8, x4, x1, x2) - -inst_21603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa98fffff; valaddr_reg:x3; val_offset:64809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64809*FLEN/8, x4, x1, x2) - -inst_21604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa99fffff; valaddr_reg:x3; val_offset:64812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64812*FLEN/8, x4, x1, x2) - -inst_21605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9bfffff; valaddr_reg:x3; val_offset:64815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64815*FLEN/8, x4, x1, x2) - -inst_21606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9c00000; valaddr_reg:x3; val_offset:64818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64818*FLEN/8, x4, x1, x2) - -inst_21607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9e00000; valaddr_reg:x3; val_offset:64821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64821*FLEN/8, x4, x1, x2) - -inst_21608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9f00000; valaddr_reg:x3; val_offset:64824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64824*FLEN/8, x4, x1, x2) - -inst_21609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9f80000; valaddr_reg:x3; val_offset:64827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64827*FLEN/8, x4, x1, x2) - -inst_21610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fc0000; valaddr_reg:x3; val_offset:64830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64830*FLEN/8, x4, x1, x2) - -inst_21611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fe0000; valaddr_reg:x3; val_offset:64833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64833*FLEN/8, x4, x1, x2) - -inst_21612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ff0000; valaddr_reg:x3; val_offset:64836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64836*FLEN/8, x4, x1, x2) - -inst_21613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ff8000; valaddr_reg:x3; val_offset:64839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64839*FLEN/8, x4, x1, x2) - -inst_21614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ffc000; valaddr_reg:x3; val_offset:64842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64842*FLEN/8, x4, x1, x2) - -inst_21615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ffe000; valaddr_reg:x3; val_offset:64845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64845*FLEN/8, x4, x1, x2) - -inst_21616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fff000; valaddr_reg:x3; val_offset:64848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64848*FLEN/8, x4, x1, x2) - -inst_21617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fff800; valaddr_reg:x3; val_offset:64851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64851*FLEN/8, x4, x1, x2) - -inst_21618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fffc00; valaddr_reg:x3; val_offset:64854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64854*FLEN/8, x4, x1, x2) - -inst_21619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fffe00; valaddr_reg:x3; val_offset:64857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64857*FLEN/8, x4, x1, x2) - -inst_21620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ffff00; valaddr_reg:x3; val_offset:64860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64860*FLEN/8, x4, x1, x2) - -inst_21621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ffff80; valaddr_reg:x3; val_offset:64863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64863*FLEN/8, x4, x1, x2) - -inst_21622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ffffc0; valaddr_reg:x3; val_offset:64866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64866*FLEN/8, x4, x1, x2) - -inst_21623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ffffe0; valaddr_reg:x3; val_offset:64869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64869*FLEN/8, x4, x1, x2) - -inst_21624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fffff0; valaddr_reg:x3; val_offset:64872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64872*FLEN/8, x4, x1, x2) - -inst_21625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fffff8; valaddr_reg:x3; val_offset:64875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64875*FLEN/8, x4, x1, x2) - -inst_21626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fffffc; valaddr_reg:x3; val_offset:64878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64878*FLEN/8, x4, x1, x2) - -inst_21627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9fffffe; valaddr_reg:x3; val_offset:64881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64881*FLEN/8, x4, x1, x2) - -inst_21628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xa9ffffff; valaddr_reg:x3; val_offset:64884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64884*FLEN/8, x4, x1, x2) - -inst_21629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbf800001; valaddr_reg:x3; val_offset:64887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64887*FLEN/8, x4, x1, x2) - -inst_21630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbf800003; valaddr_reg:x3; val_offset:64890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64890*FLEN/8, x4, x1, x2) - -inst_21631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbf800007; valaddr_reg:x3; val_offset:64893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64893*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_170) - -inst_21632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbf999999; valaddr_reg:x3; val_offset:64896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64896*FLEN/8, x4, x1, x2) - -inst_21633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:64899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64899*FLEN/8, x4, x1, x2) - -inst_21634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:64902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64902*FLEN/8, x4, x1, x2) - -inst_21635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:64905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64905*FLEN/8, x4, x1, x2) - -inst_21636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:64908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64908*FLEN/8, x4, x1, x2) - -inst_21637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:64911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64911*FLEN/8, x4, x1, x2) - -inst_21638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:64914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64914*FLEN/8, x4, x1, x2) - -inst_21639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:64917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64917*FLEN/8, x4, x1, x2) - -inst_21640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:64920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64920*FLEN/8, x4, x1, x2) - -inst_21641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:64923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64923*FLEN/8, x4, x1, x2) - -inst_21642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:64926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64926*FLEN/8, x4, x1, x2) - -inst_21643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:64929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64929*FLEN/8, x4, x1, x2) - -inst_21644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:64932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64932*FLEN/8, x4, x1, x2) - -inst_21645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:64935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64935*FLEN/8, x4, x1, x2) - -inst_21646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:64938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64938*FLEN/8, x4, x1, x2) - -inst_21647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:64941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64941*FLEN/8, x4, x1, x2) - -inst_21648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:64944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64944*FLEN/8, x4, x1, x2) - -inst_21649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:64947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64947*FLEN/8, x4, x1, x2) - -inst_21650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:64950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64950*FLEN/8, x4, x1, x2) - -inst_21651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:64953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64953*FLEN/8, x4, x1, x2) - -inst_21652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:64956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64956*FLEN/8, x4, x1, x2) - -inst_21653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:64959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64959*FLEN/8, x4, x1, x2) - -inst_21654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:64962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64962*FLEN/8, x4, x1, x2) - -inst_21655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:64965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64965*FLEN/8, x4, x1, x2) - -inst_21656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:64968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64968*FLEN/8, x4, x1, x2) - -inst_21657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:64971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64971*FLEN/8, x4, x1, x2) - -inst_21658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:64974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64974*FLEN/8, x4, x1, x2) - -inst_21659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:64977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64977*FLEN/8, x4, x1, x2) - -inst_21660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:64980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64980*FLEN/8, x4, x1, x2) - -inst_21661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84800000; valaddr_reg:x3; val_offset:64983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64983*FLEN/8, x4, x1, x2) - -inst_21662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84800001; valaddr_reg:x3; val_offset:64986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64986*FLEN/8, x4, x1, x2) - -inst_21663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84800003; valaddr_reg:x3; val_offset:64989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64989*FLEN/8, x4, x1, x2) - -inst_21664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84800007; valaddr_reg:x3; val_offset:64992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64992*FLEN/8, x4, x1, x2) - -inst_21665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8480000f; valaddr_reg:x3; val_offset:64995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64995*FLEN/8, x4, x1, x2) - -inst_21666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8480001f; valaddr_reg:x3; val_offset:64998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64998*FLEN/8, x4, x1, x2) - -inst_21667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8480003f; valaddr_reg:x3; val_offset:65001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65001*FLEN/8, x4, x1, x2) - -inst_21668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8480007f; valaddr_reg:x3; val_offset:65004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65004*FLEN/8, x4, x1, x2) - -inst_21669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x848000ff; valaddr_reg:x3; val_offset:65007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65007*FLEN/8, x4, x1, x2) - -inst_21670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x848001ff; valaddr_reg:x3; val_offset:65010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65010*FLEN/8, x4, x1, x2) - -inst_21671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x848003ff; valaddr_reg:x3; val_offset:65013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65013*FLEN/8, x4, x1, x2) - -inst_21672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x848007ff; valaddr_reg:x3; val_offset:65016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65016*FLEN/8, x4, x1, x2) - -inst_21673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84800fff; valaddr_reg:x3; val_offset:65019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65019*FLEN/8, x4, x1, x2) - -inst_21674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84801fff; valaddr_reg:x3; val_offset:65022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65022*FLEN/8, x4, x1, x2) - -inst_21675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84803fff; valaddr_reg:x3; val_offset:65025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65025*FLEN/8, x4, x1, x2) - -inst_21676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84807fff; valaddr_reg:x3; val_offset:65028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65028*FLEN/8, x4, x1, x2) - -inst_21677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8480ffff; valaddr_reg:x3; val_offset:65031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65031*FLEN/8, x4, x1, x2) - -inst_21678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8481ffff; valaddr_reg:x3; val_offset:65034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65034*FLEN/8, x4, x1, x2) - -inst_21679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8483ffff; valaddr_reg:x3; val_offset:65037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65037*FLEN/8, x4, x1, x2) - -inst_21680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x8487ffff; valaddr_reg:x3; val_offset:65040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65040*FLEN/8, x4, x1, x2) - -inst_21681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x848fffff; valaddr_reg:x3; val_offset:65043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65043*FLEN/8, x4, x1, x2) - -inst_21682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x849fffff; valaddr_reg:x3; val_offset:65046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65046*FLEN/8, x4, x1, x2) - -inst_21683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84bfffff; valaddr_reg:x3; val_offset:65049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65049*FLEN/8, x4, x1, x2) - -inst_21684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84c00000; valaddr_reg:x3; val_offset:65052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65052*FLEN/8, x4, x1, x2) - -inst_21685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84e00000; valaddr_reg:x3; val_offset:65055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65055*FLEN/8, x4, x1, x2) - -inst_21686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84f00000; valaddr_reg:x3; val_offset:65058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65058*FLEN/8, x4, x1, x2) - -inst_21687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84f80000; valaddr_reg:x3; val_offset:65061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65061*FLEN/8, x4, x1, x2) - -inst_21688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fc0000; valaddr_reg:x3; val_offset:65064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65064*FLEN/8, x4, x1, x2) - -inst_21689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fe0000; valaddr_reg:x3; val_offset:65067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65067*FLEN/8, x4, x1, x2) - -inst_21690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ff0000; valaddr_reg:x3; val_offset:65070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65070*FLEN/8, x4, x1, x2) - -inst_21691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ff8000; valaddr_reg:x3; val_offset:65073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65073*FLEN/8, x4, x1, x2) - -inst_21692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ffc000; valaddr_reg:x3; val_offset:65076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65076*FLEN/8, x4, x1, x2) - -inst_21693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ffe000; valaddr_reg:x3; val_offset:65079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65079*FLEN/8, x4, x1, x2) - -inst_21694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fff000; valaddr_reg:x3; val_offset:65082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65082*FLEN/8, x4, x1, x2) - -inst_21695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fff800; valaddr_reg:x3; val_offset:65085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65085*FLEN/8, x4, x1, x2) - -inst_21696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fffc00; valaddr_reg:x3; val_offset:65088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65088*FLEN/8, x4, x1, x2) - -inst_21697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fffe00; valaddr_reg:x3; val_offset:65091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65091*FLEN/8, x4, x1, x2) - -inst_21698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ffff00; valaddr_reg:x3; val_offset:65094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65094*FLEN/8, x4, x1, x2) - -inst_21699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ffff80; valaddr_reg:x3; val_offset:65097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65097*FLEN/8, x4, x1, x2) - -inst_21700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ffffc0; valaddr_reg:x3; val_offset:65100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65100*FLEN/8, x4, x1, x2) - -inst_21701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ffffe0; valaddr_reg:x3; val_offset:65103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65103*FLEN/8, x4, x1, x2) - -inst_21702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fffff0; valaddr_reg:x3; val_offset:65106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65106*FLEN/8, x4, x1, x2) - -inst_21703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fffff8; valaddr_reg:x3; val_offset:65109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65109*FLEN/8, x4, x1, x2) - -inst_21704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fffffc; valaddr_reg:x3; val_offset:65112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65112*FLEN/8, x4, x1, x2) - -inst_21705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84fffffe; valaddr_reg:x3; val_offset:65115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65115*FLEN/8, x4, x1, x2) - -inst_21706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; -op3val:0x84ffffff; valaddr_reg:x3; val_offset:65118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65118*FLEN/8, x4, x1, x2) - -inst_21707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3f800001; valaddr_reg:x3; val_offset:65121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65121*FLEN/8, x4, x1, x2) - -inst_21708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3f800003; valaddr_reg:x3; val_offset:65124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65124*FLEN/8, x4, x1, x2) - -inst_21709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3f800007; valaddr_reg:x3; val_offset:65127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65127*FLEN/8, x4, x1, x2) - -inst_21710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3f999999; valaddr_reg:x3; val_offset:65130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65130*FLEN/8, x4, x1, x2) - -inst_21711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:65133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65133*FLEN/8, x4, x1, x2) - -inst_21712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:65136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65136*FLEN/8, x4, x1, x2) - -inst_21713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:65139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65139*FLEN/8, x4, x1, x2) - -inst_21714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:65142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65142*FLEN/8, x4, x1, x2) - -inst_21715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:65145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65145*FLEN/8, x4, x1, x2) - -inst_21716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:65148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65148*FLEN/8, x4, x1, x2) - -inst_21717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:65151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65151*FLEN/8, x4, x1, x2) - -inst_21718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:65154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65154*FLEN/8, x4, x1, x2) - -inst_21719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:65157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65157*FLEN/8, x4, x1, x2) - -inst_21720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:65160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65160*FLEN/8, x4, x1, x2) - -inst_21721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:65163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65163*FLEN/8, x4, x1, x2) - -inst_21722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:65166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65166*FLEN/8, x4, x1, x2) - -inst_21723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44000000; valaddr_reg:x3; val_offset:65169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65169*FLEN/8, x4, x1, x2) - -inst_21724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44000001; valaddr_reg:x3; val_offset:65172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65172*FLEN/8, x4, x1, x2) - -inst_21725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44000003; valaddr_reg:x3; val_offset:65175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65175*FLEN/8, x4, x1, x2) - -inst_21726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44000007; valaddr_reg:x3; val_offset:65178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65178*FLEN/8, x4, x1, x2) - -inst_21727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x4400000f; valaddr_reg:x3; val_offset:65181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65181*FLEN/8, x4, x1, x2) - -inst_21728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x4400001f; valaddr_reg:x3; val_offset:65184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65184*FLEN/8, x4, x1, x2) - -inst_21729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x4400003f; valaddr_reg:x3; val_offset:65187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65187*FLEN/8, x4, x1, x2) - -inst_21730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x4400007f; valaddr_reg:x3; val_offset:65190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65190*FLEN/8, x4, x1, x2) - -inst_21731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x440000ff; valaddr_reg:x3; val_offset:65193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65193*FLEN/8, x4, x1, x2) - -inst_21732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x440001ff; valaddr_reg:x3; val_offset:65196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65196*FLEN/8, x4, x1, x2) - -inst_21733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x440003ff; valaddr_reg:x3; val_offset:65199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65199*FLEN/8, x4, x1, x2) - -inst_21734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x440007ff; valaddr_reg:x3; val_offset:65202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65202*FLEN/8, x4, x1, x2) - -inst_21735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44000fff; valaddr_reg:x3; val_offset:65205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65205*FLEN/8, x4, x1, x2) - -inst_21736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44001fff; valaddr_reg:x3; val_offset:65208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65208*FLEN/8, x4, x1, x2) - -inst_21737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44003fff; valaddr_reg:x3; val_offset:65211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65211*FLEN/8, x4, x1, x2) - -inst_21738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44007fff; valaddr_reg:x3; val_offset:65214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65214*FLEN/8, x4, x1, x2) - -inst_21739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x4400ffff; valaddr_reg:x3; val_offset:65217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65217*FLEN/8, x4, x1, x2) - -inst_21740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x4401ffff; valaddr_reg:x3; val_offset:65220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65220*FLEN/8, x4, x1, x2) - -inst_21741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x4403ffff; valaddr_reg:x3; val_offset:65223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65223*FLEN/8, x4, x1, x2) - -inst_21742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x4407ffff; valaddr_reg:x3; val_offset:65226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65226*FLEN/8, x4, x1, x2) - -inst_21743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x440fffff; valaddr_reg:x3; val_offset:65229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65229*FLEN/8, x4, x1, x2) - -inst_21744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x441fffff; valaddr_reg:x3; val_offset:65232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65232*FLEN/8, x4, x1, x2) - -inst_21745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x443fffff; valaddr_reg:x3; val_offset:65235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65235*FLEN/8, x4, x1, x2) - -inst_21746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44400000; valaddr_reg:x3; val_offset:65238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65238*FLEN/8, x4, x1, x2) - -inst_21747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44600000; valaddr_reg:x3; val_offset:65241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65241*FLEN/8, x4, x1, x2) - -inst_21748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44700000; valaddr_reg:x3; val_offset:65244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65244*FLEN/8, x4, x1, x2) - -inst_21749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x44780000; valaddr_reg:x3; val_offset:65247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65247*FLEN/8, x4, x1, x2) - -inst_21750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447c0000; valaddr_reg:x3; val_offset:65250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65250*FLEN/8, x4, x1, x2) - -inst_21751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447e0000; valaddr_reg:x3; val_offset:65253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65253*FLEN/8, x4, x1, x2) - -inst_21752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447f0000; valaddr_reg:x3; val_offset:65256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65256*FLEN/8, x4, x1, x2) - -inst_21753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447f8000; valaddr_reg:x3; val_offset:65259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65259*FLEN/8, x4, x1, x2) - -inst_21754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447fc000; valaddr_reg:x3; val_offset:65262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65262*FLEN/8, x4, x1, x2) - -inst_21755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447fe000; valaddr_reg:x3; val_offset:65265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65265*FLEN/8, x4, x1, x2) - -inst_21756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447ff000; valaddr_reg:x3; val_offset:65268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65268*FLEN/8, x4, x1, x2) - -inst_21757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447ff800; valaddr_reg:x3; val_offset:65271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65271*FLEN/8, x4, x1, x2) - -inst_21758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447ffc00; valaddr_reg:x3; val_offset:65274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65274*FLEN/8, x4, x1, x2) - -inst_21759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447ffe00; valaddr_reg:x3; val_offset:65277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65277*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_171) - -inst_21760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447fff00; valaddr_reg:x3; val_offset:65280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65280*FLEN/8, x4, x1, x2) - -inst_21761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447fff80; valaddr_reg:x3; val_offset:65283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65283*FLEN/8, x4, x1, x2) - -inst_21762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447fffc0; valaddr_reg:x3; val_offset:65286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65286*FLEN/8, x4, x1, x2) - -inst_21763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447fffe0; valaddr_reg:x3; val_offset:65289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65289*FLEN/8, x4, x1, x2) - -inst_21764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447ffff0; valaddr_reg:x3; val_offset:65292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65292*FLEN/8, x4, x1, x2) - -inst_21765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447ffff8; valaddr_reg:x3; val_offset:65295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65295*FLEN/8, x4, x1, x2) - -inst_21766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447ffffc; valaddr_reg:x3; val_offset:65298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65298*FLEN/8, x4, x1, x2) - -inst_21767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447ffffe; valaddr_reg:x3; val_offset:65301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65301*FLEN/8, x4, x1, x2) - -inst_21768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; -op3val:0x447fffff; valaddr_reg:x3; val_offset:65304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65304*FLEN/8, x4, x1, x2) - -inst_21769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:65307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65307*FLEN/8, x4, x1, x2) - -inst_21770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:65310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65310*FLEN/8, x4, x1, x2) - -inst_21771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:65313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65313*FLEN/8, x4, x1, x2) - -inst_21772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:65316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65316*FLEN/8, x4, x1, x2) - -inst_21773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:65319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65319*FLEN/8, x4, x1, x2) - -inst_21774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:65322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65322*FLEN/8, x4, x1, x2) - -inst_21775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:65325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65325*FLEN/8, x4, x1, x2) - -inst_21776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:65328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65328*FLEN/8, x4, x1, x2) - -inst_21777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:65331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65331*FLEN/8, x4, x1, x2) - -inst_21778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:65334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65334*FLEN/8, x4, x1, x2) - -inst_21779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:65337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65337*FLEN/8, x4, x1, x2) - -inst_21780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:65340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65340*FLEN/8, x4, x1, x2) - -inst_21781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:65343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65343*FLEN/8, x4, x1, x2) - -inst_21782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:65346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65346*FLEN/8, x4, x1, x2) - -inst_21783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:65349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65349*FLEN/8, x4, x1, x2) - -inst_21784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:65352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65352*FLEN/8, x4, x1, x2) - -inst_21785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b000000; valaddr_reg:x3; val_offset:65355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65355*FLEN/8, x4, x1, x2) - -inst_21786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b000001; valaddr_reg:x3; val_offset:65358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65358*FLEN/8, x4, x1, x2) - -inst_21787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b000003; valaddr_reg:x3; val_offset:65361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65361*FLEN/8, x4, x1, x2) - -inst_21788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b000007; valaddr_reg:x3; val_offset:65364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65364*FLEN/8, x4, x1, x2) - -inst_21789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b00000f; valaddr_reg:x3; val_offset:65367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65367*FLEN/8, x4, x1, x2) - -inst_21790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b00001f; valaddr_reg:x3; val_offset:65370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65370*FLEN/8, x4, x1, x2) - -inst_21791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b00003f; valaddr_reg:x3; val_offset:65373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65373*FLEN/8, x4, x1, x2) - -inst_21792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b00007f; valaddr_reg:x3; val_offset:65376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65376*FLEN/8, x4, x1, x2) - -inst_21793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b0000ff; valaddr_reg:x3; val_offset:65379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65379*FLEN/8, x4, x1, x2) - -inst_21794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b0001ff; valaddr_reg:x3; val_offset:65382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65382*FLEN/8, x4, x1, x2) - -inst_21795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b0003ff; valaddr_reg:x3; val_offset:65385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65385*FLEN/8, x4, x1, x2) - -inst_21796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b0007ff; valaddr_reg:x3; val_offset:65388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65388*FLEN/8, x4, x1, x2) - -inst_21797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b000fff; valaddr_reg:x3; val_offset:65391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65391*FLEN/8, x4, x1, x2) - -inst_21798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b001fff; valaddr_reg:x3; val_offset:65394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65394*FLEN/8, x4, x1, x2) - -inst_21799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b003fff; valaddr_reg:x3; val_offset:65397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65397*FLEN/8, x4, x1, x2) - -inst_21800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b007fff; valaddr_reg:x3; val_offset:65400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65400*FLEN/8, x4, x1, x2) - -inst_21801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b00ffff; valaddr_reg:x3; val_offset:65403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65403*FLEN/8, x4, x1, x2) - -inst_21802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b01ffff; valaddr_reg:x3; val_offset:65406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65406*FLEN/8, x4, x1, x2) - -inst_21803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b03ffff; valaddr_reg:x3; val_offset:65409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65409*FLEN/8, x4, x1, x2) - -inst_21804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b07ffff; valaddr_reg:x3; val_offset:65412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65412*FLEN/8, x4, x1, x2) - -inst_21805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b0fffff; valaddr_reg:x3; val_offset:65415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65415*FLEN/8, x4, x1, x2) - -inst_21806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b1fffff; valaddr_reg:x3; val_offset:65418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65418*FLEN/8, x4, x1, x2) - -inst_21807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b3fffff; valaddr_reg:x3; val_offset:65421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65421*FLEN/8, x4, x1, x2) - -inst_21808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b400000; valaddr_reg:x3; val_offset:65424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65424*FLEN/8, x4, x1, x2) - -inst_21809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b600000; valaddr_reg:x3; val_offset:65427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65427*FLEN/8, x4, x1, x2) - -inst_21810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b700000; valaddr_reg:x3; val_offset:65430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65430*FLEN/8, x4, x1, x2) - -inst_21811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b780000; valaddr_reg:x3; val_offset:65433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65433*FLEN/8, x4, x1, x2) - -inst_21812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7c0000; valaddr_reg:x3; val_offset:65436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65436*FLEN/8, x4, x1, x2) - -inst_21813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7e0000; valaddr_reg:x3; val_offset:65439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65439*FLEN/8, x4, x1, x2) - -inst_21814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7f0000; valaddr_reg:x3; val_offset:65442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65442*FLEN/8, x4, x1, x2) - -inst_21815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7f8000; valaddr_reg:x3; val_offset:65445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65445*FLEN/8, x4, x1, x2) - -inst_21816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7fc000; valaddr_reg:x3; val_offset:65448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65448*FLEN/8, x4, x1, x2) - -inst_21817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7fe000; valaddr_reg:x3; val_offset:65451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65451*FLEN/8, x4, x1, x2) - -inst_21818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7ff000; valaddr_reg:x3; val_offset:65454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65454*FLEN/8, x4, x1, x2) - -inst_21819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7ff800; valaddr_reg:x3; val_offset:65457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65457*FLEN/8, x4, x1, x2) - -inst_21820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:65460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65460*FLEN/8, x4, x1, x2) - -inst_21821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:65463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65463*FLEN/8, x4, x1, x2) - -inst_21822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7fff00; valaddr_reg:x3; val_offset:65466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65466*FLEN/8, x4, x1, x2) - -inst_21823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7fff80; valaddr_reg:x3; val_offset:65469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65469*FLEN/8, x4, x1, x2) - -inst_21824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:65472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65472*FLEN/8, x4, x1, x2) - -inst_21825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:65475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65475*FLEN/8, x4, x1, x2) - -inst_21826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:65478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65478*FLEN/8, x4, x1, x2) - -inst_21827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:65481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65481*FLEN/8, x4, x1, x2) - -inst_21828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:65484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65484*FLEN/8, x4, x1, x2) - -inst_21829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:65487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65487*FLEN/8, x4, x1, x2) - -inst_21830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; -op3val:0x8b7fffff; valaddr_reg:x3; val_offset:65490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65490*FLEN/8, x4, x1, x2) - -inst_21831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:65493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65493*FLEN/8, x4, x1, x2) - -inst_21832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:65496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65496*FLEN/8, x4, x1, x2) - -inst_21833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:65499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65499*FLEN/8, x4, x1, x2) - -inst_21834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:65502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65502*FLEN/8, x4, x1, x2) - -inst_21835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:65505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65505*FLEN/8, x4, x1, x2) - -inst_21836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:65508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65508*FLEN/8, x4, x1, x2) - -inst_21837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:65511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65511*FLEN/8, x4, x1, x2) - -inst_21838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:65514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65514*FLEN/8, x4, x1, x2) - -inst_21839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:65517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65517*FLEN/8, x4, x1, x2) - -inst_21840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:65520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65520*FLEN/8, x4, x1, x2) - -inst_21841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:65523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65523*FLEN/8, x4, x1, x2) - -inst_21842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:65526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65526*FLEN/8, x4, x1, x2) - -inst_21843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:65529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65529*FLEN/8, x4, x1, x2) - -inst_21844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:65532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65532*FLEN/8, x4, x1, x2) - -inst_21845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:65535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65535*FLEN/8, x4, x1, x2) - -inst_21846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:65538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65538*FLEN/8, x4, x1, x2) - -inst_21847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88800000; valaddr_reg:x3; val_offset:65541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65541*FLEN/8, x4, x1, x2) - -inst_21848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88800001; valaddr_reg:x3; val_offset:65544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65544*FLEN/8, x4, x1, x2) - -inst_21849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88800003; valaddr_reg:x3; val_offset:65547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65547*FLEN/8, x4, x1, x2) - -inst_21850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88800007; valaddr_reg:x3; val_offset:65550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65550*FLEN/8, x4, x1, x2) - -inst_21851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x8880000f; valaddr_reg:x3; val_offset:65553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65553*FLEN/8, x4, x1, x2) - -inst_21852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x8880001f; valaddr_reg:x3; val_offset:65556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65556*FLEN/8, x4, x1, x2) - -inst_21853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x8880003f; valaddr_reg:x3; val_offset:65559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65559*FLEN/8, x4, x1, x2) - -inst_21854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x8880007f; valaddr_reg:x3; val_offset:65562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65562*FLEN/8, x4, x1, x2) - -inst_21855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x888000ff; valaddr_reg:x3; val_offset:65565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65565*FLEN/8, x4, x1, x2) - -inst_21856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x888001ff; valaddr_reg:x3; val_offset:65568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65568*FLEN/8, x4, x1, x2) - -inst_21857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x888003ff; valaddr_reg:x3; val_offset:65571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65571*FLEN/8, x4, x1, x2) - -inst_21858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x888007ff; valaddr_reg:x3; val_offset:65574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65574*FLEN/8, x4, x1, x2) - -inst_21859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88800fff; valaddr_reg:x3; val_offset:65577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65577*FLEN/8, x4, x1, x2) - -inst_21860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88801fff; valaddr_reg:x3; val_offset:65580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65580*FLEN/8, x4, x1, x2) - -inst_21861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88803fff; valaddr_reg:x3; val_offset:65583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65583*FLEN/8, x4, x1, x2) - -inst_21862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88807fff; valaddr_reg:x3; val_offset:65586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65586*FLEN/8, x4, x1, x2) - -inst_21863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x8880ffff; valaddr_reg:x3; val_offset:65589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65589*FLEN/8, x4, x1, x2) - -inst_21864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x8881ffff; valaddr_reg:x3; val_offset:65592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65592*FLEN/8, x4, x1, x2) - -inst_21865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x8883ffff; valaddr_reg:x3; val_offset:65595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65595*FLEN/8, x4, x1, x2) - -inst_21866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x8887ffff; valaddr_reg:x3; val_offset:65598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65598*FLEN/8, x4, x1, x2) - -inst_21867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x888fffff; valaddr_reg:x3; val_offset:65601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65601*FLEN/8, x4, x1, x2) - -inst_21868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x889fffff; valaddr_reg:x3; val_offset:65604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65604*FLEN/8, x4, x1, x2) - -inst_21869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88bfffff; valaddr_reg:x3; val_offset:65607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65607*FLEN/8, x4, x1, x2) - -inst_21870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88c00000; valaddr_reg:x3; val_offset:65610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65610*FLEN/8, x4, x1, x2) - -inst_21871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88e00000; valaddr_reg:x3; val_offset:65613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65613*FLEN/8, x4, x1, x2) - -inst_21872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88f00000; valaddr_reg:x3; val_offset:65616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65616*FLEN/8, x4, x1, x2) - -inst_21873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88f80000; valaddr_reg:x3; val_offset:65619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65619*FLEN/8, x4, x1, x2) - -inst_21874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fc0000; valaddr_reg:x3; val_offset:65622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65622*FLEN/8, x4, x1, x2) - -inst_21875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fe0000; valaddr_reg:x3; val_offset:65625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65625*FLEN/8, x4, x1, x2) - -inst_21876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ff0000; valaddr_reg:x3; val_offset:65628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65628*FLEN/8, x4, x1, x2) - -inst_21877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ff8000; valaddr_reg:x3; val_offset:65631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65631*FLEN/8, x4, x1, x2) - -inst_21878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ffc000; valaddr_reg:x3; val_offset:65634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65634*FLEN/8, x4, x1, x2) - -inst_21879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ffe000; valaddr_reg:x3; val_offset:65637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65637*FLEN/8, x4, x1, x2) - -inst_21880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fff000; valaddr_reg:x3; val_offset:65640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65640*FLEN/8, x4, x1, x2) - -inst_21881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fff800; valaddr_reg:x3; val_offset:65643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65643*FLEN/8, x4, x1, x2) - -inst_21882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fffc00; valaddr_reg:x3; val_offset:65646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65646*FLEN/8, x4, x1, x2) - -inst_21883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fffe00; valaddr_reg:x3; val_offset:65649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65649*FLEN/8, x4, x1, x2) - -inst_21884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ffff00; valaddr_reg:x3; val_offset:65652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65652*FLEN/8, x4, x1, x2) - -inst_21885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ffff80; valaddr_reg:x3; val_offset:65655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65655*FLEN/8, x4, x1, x2) - -inst_21886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ffffc0; valaddr_reg:x3; val_offset:65658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65658*FLEN/8, x4, x1, x2) - -inst_21887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ffffe0; valaddr_reg:x3; val_offset:65661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65661*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_172) - -inst_21888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fffff0; valaddr_reg:x3; val_offset:65664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65664*FLEN/8, x4, x1, x2) - -inst_21889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fffff8; valaddr_reg:x3; val_offset:65667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65667*FLEN/8, x4, x1, x2) - -inst_21890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fffffc; valaddr_reg:x3; val_offset:65670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65670*FLEN/8, x4, x1, x2) - -inst_21891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88fffffe; valaddr_reg:x3; val_offset:65673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65673*FLEN/8, x4, x1, x2) - -inst_21892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; -op3val:0x88ffffff; valaddr_reg:x3; val_offset:65676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65676*FLEN/8, x4, x1, x2) - -inst_21893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe800000; valaddr_reg:x3; val_offset:65679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65679*FLEN/8, x4, x1, x2) - -inst_21894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe800001; valaddr_reg:x3; val_offset:65682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65682*FLEN/8, x4, x1, x2) - -inst_21895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe800003; valaddr_reg:x3; val_offset:65685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65685*FLEN/8, x4, x1, x2) - -inst_21896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe800007; valaddr_reg:x3; val_offset:65688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65688*FLEN/8, x4, x1, x2) - -inst_21897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe80000f; valaddr_reg:x3; val_offset:65691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65691*FLEN/8, x4, x1, x2) - -inst_21898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe80001f; valaddr_reg:x3; val_offset:65694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65694*FLEN/8, x4, x1, x2) - -inst_21899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe80003f; valaddr_reg:x3; val_offset:65697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65697*FLEN/8, x4, x1, x2) - -inst_21900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe80007f; valaddr_reg:x3; val_offset:65700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65700*FLEN/8, x4, x1, x2) - -inst_21901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe8000ff; valaddr_reg:x3; val_offset:65703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65703*FLEN/8, x4, x1, x2) - -inst_21902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe8001ff; valaddr_reg:x3; val_offset:65706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65706*FLEN/8, x4, x1, x2) - -inst_21903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe8003ff; valaddr_reg:x3; val_offset:65709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65709*FLEN/8, x4, x1, x2) - -inst_21904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe8007ff; valaddr_reg:x3; val_offset:65712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65712*FLEN/8, x4, x1, x2) - -inst_21905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe800fff; valaddr_reg:x3; val_offset:65715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65715*FLEN/8, x4, x1, x2) - -inst_21906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe801fff; valaddr_reg:x3; val_offset:65718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65718*FLEN/8, x4, x1, x2) - -inst_21907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe803fff; valaddr_reg:x3; val_offset:65721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65721*FLEN/8, x4, x1, x2) - -inst_21908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe807fff; valaddr_reg:x3; val_offset:65724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65724*FLEN/8, x4, x1, x2) - -inst_21909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe80ffff; valaddr_reg:x3; val_offset:65727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65727*FLEN/8, x4, x1, x2) - -inst_21910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe81ffff; valaddr_reg:x3; val_offset:65730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65730*FLEN/8, x4, x1, x2) - -inst_21911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe83ffff; valaddr_reg:x3; val_offset:65733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65733*FLEN/8, x4, x1, x2) - -inst_21912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe87ffff; valaddr_reg:x3; val_offset:65736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65736*FLEN/8, x4, x1, x2) - -inst_21913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe8fffff; valaddr_reg:x3; val_offset:65739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65739*FLEN/8, x4, x1, x2) - -inst_21914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfe9fffff; valaddr_reg:x3; val_offset:65742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65742*FLEN/8, x4, x1, x2) - -inst_21915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfebfffff; valaddr_reg:x3; val_offset:65745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65745*FLEN/8, x4, x1, x2) - -inst_21916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfec00000; valaddr_reg:x3; val_offset:65748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65748*FLEN/8, x4, x1, x2) - -inst_21917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfee00000; valaddr_reg:x3; val_offset:65751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65751*FLEN/8, x4, x1, x2) - -inst_21918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfef00000; valaddr_reg:x3; val_offset:65754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65754*FLEN/8, x4, x1, x2) - -inst_21919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfef80000; valaddr_reg:x3; val_offset:65757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65757*FLEN/8, x4, x1, x2) - -inst_21920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefc0000; valaddr_reg:x3; val_offset:65760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65760*FLEN/8, x4, x1, x2) - -inst_21921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefe0000; valaddr_reg:x3; val_offset:65763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65763*FLEN/8, x4, x1, x2) - -inst_21922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeff0000; valaddr_reg:x3; val_offset:65766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65766*FLEN/8, x4, x1, x2) - -inst_21923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeff8000; valaddr_reg:x3; val_offset:65769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65769*FLEN/8, x4, x1, x2) - -inst_21924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeffc000; valaddr_reg:x3; val_offset:65772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65772*FLEN/8, x4, x1, x2) - -inst_21925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeffe000; valaddr_reg:x3; val_offset:65775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65775*FLEN/8, x4, x1, x2) - -inst_21926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefff000; valaddr_reg:x3; val_offset:65778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65778*FLEN/8, x4, x1, x2) - -inst_21927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefff800; valaddr_reg:x3; val_offset:65781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65781*FLEN/8, x4, x1, x2) - -inst_21928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefffc00; valaddr_reg:x3; val_offset:65784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65784*FLEN/8, x4, x1, x2) - -inst_21929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefffe00; valaddr_reg:x3; val_offset:65787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65787*FLEN/8, x4, x1, x2) - -inst_21930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeffff00; valaddr_reg:x3; val_offset:65790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65790*FLEN/8, x4, x1, x2) - -inst_21931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeffff80; valaddr_reg:x3; val_offset:65793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65793*FLEN/8, x4, x1, x2) - -inst_21932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeffffc0; valaddr_reg:x3; val_offset:65796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65796*FLEN/8, x4, x1, x2) - -inst_21933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeffffe0; valaddr_reg:x3; val_offset:65799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65799*FLEN/8, x4, x1, x2) - -inst_21934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefffff0; valaddr_reg:x3; val_offset:65802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65802*FLEN/8, x4, x1, x2) - -inst_21935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefffff8; valaddr_reg:x3; val_offset:65805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65805*FLEN/8, x4, x1, x2) - -inst_21936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefffffc; valaddr_reg:x3; val_offset:65808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65808*FLEN/8, x4, x1, x2) - -inst_21937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfefffffe; valaddr_reg:x3; val_offset:65811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65811*FLEN/8, x4, x1, x2) - -inst_21938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xfeffffff; valaddr_reg:x3; val_offset:65814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65814*FLEN/8, x4, x1, x2) - -inst_21939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff000001; valaddr_reg:x3; val_offset:65817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65817*FLEN/8, x4, x1, x2) - -inst_21940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff000003; valaddr_reg:x3; val_offset:65820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65820*FLEN/8, x4, x1, x2) - -inst_21941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff000007; valaddr_reg:x3; val_offset:65823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65823*FLEN/8, x4, x1, x2) - -inst_21942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff199999; valaddr_reg:x3; val_offset:65826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65826*FLEN/8, x4, x1, x2) - -inst_21943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff249249; valaddr_reg:x3; val_offset:65829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65829*FLEN/8, x4, x1, x2) - -inst_21944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff333333; valaddr_reg:x3; val_offset:65832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65832*FLEN/8, x4, x1, x2) - -inst_21945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:65835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65835*FLEN/8, x4, x1, x2) - -inst_21946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:65838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65838*FLEN/8, x4, x1, x2) - -inst_21947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff444444; valaddr_reg:x3; val_offset:65841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65841*FLEN/8, x4, x1, x2) - -inst_21948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:65844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65844*FLEN/8, x4, x1, x2) - -inst_21949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:65847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65847*FLEN/8, x4, x1, x2) - -inst_21950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff666666; valaddr_reg:x3; val_offset:65850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65850*FLEN/8, x4, x1, x2) - -inst_21951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:65853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65853*FLEN/8, x4, x1, x2) - -inst_21952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:65856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65856*FLEN/8, x4, x1, x2) - -inst_21953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:65859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65859*FLEN/8, x4, x1, x2) - -inst_21954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:65862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65862*FLEN/8, x4, x1, x2) - -inst_21955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:65865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65865*FLEN/8, x4, x1, x2) - -inst_21956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:65868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65868*FLEN/8, x4, x1, x2) - -inst_21957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:65871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65871*FLEN/8, x4, x1, x2) - -inst_21958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:65874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65874*FLEN/8, x4, x1, x2) - -inst_21959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:65877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65877*FLEN/8, x4, x1, x2) - -inst_21960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:65880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65880*FLEN/8, x4, x1, x2) - -inst_21961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:65883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65883*FLEN/8, x4, x1, x2) - -inst_21962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:65886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65886*FLEN/8, x4, x1, x2) - -inst_21963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:65889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65889*FLEN/8, x4, x1, x2) - -inst_21964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:65892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65892*FLEN/8, x4, x1, x2) - -inst_21965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:65895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65895*FLEN/8, x4, x1, x2) - -inst_21966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:65898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65898*FLEN/8, x4, x1, x2) - -inst_21967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:65901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65901*FLEN/8, x4, x1, x2) - -inst_21968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:65904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65904*FLEN/8, x4, x1, x2) - -inst_21969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:65907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65907*FLEN/8, x4, x1, x2) - -inst_21970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:65910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65910*FLEN/8, x4, x1, x2) - -inst_21971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f000000; valaddr_reg:x3; val_offset:65913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65913*FLEN/8, x4, x1, x2) - -inst_21972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f000001; valaddr_reg:x3; val_offset:65916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65916*FLEN/8, x4, x1, x2) - -inst_21973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f000003; valaddr_reg:x3; val_offset:65919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65919*FLEN/8, x4, x1, x2) - -inst_21974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f000007; valaddr_reg:x3; val_offset:65922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65922*FLEN/8, x4, x1, x2) - -inst_21975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f00000f; valaddr_reg:x3; val_offset:65925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65925*FLEN/8, x4, x1, x2) - -inst_21976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f00001f; valaddr_reg:x3; val_offset:65928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65928*FLEN/8, x4, x1, x2) - -inst_21977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f00003f; valaddr_reg:x3; val_offset:65931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65931*FLEN/8, x4, x1, x2) - -inst_21978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f00007f; valaddr_reg:x3; val_offset:65934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65934*FLEN/8, x4, x1, x2) - -inst_21979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f0000ff; valaddr_reg:x3; val_offset:65937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65937*FLEN/8, x4, x1, x2) - -inst_21980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f0001ff; valaddr_reg:x3; val_offset:65940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65940*FLEN/8, x4, x1, x2) - -inst_21981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f0003ff; valaddr_reg:x3; val_offset:65943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65943*FLEN/8, x4, x1, x2) - -inst_21982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f0007ff; valaddr_reg:x3; val_offset:65946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65946*FLEN/8, x4, x1, x2) - -inst_21983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f000fff; valaddr_reg:x3; val_offset:65949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65949*FLEN/8, x4, x1, x2) - -inst_21984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f001fff; valaddr_reg:x3; val_offset:65952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65952*FLEN/8, x4, x1, x2) - -inst_21985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f003fff; valaddr_reg:x3; val_offset:65955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65955*FLEN/8, x4, x1, x2) - -inst_21986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f007fff; valaddr_reg:x3; val_offset:65958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65958*FLEN/8, x4, x1, x2) - -inst_21987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f00ffff; valaddr_reg:x3; val_offset:65961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65961*FLEN/8, x4, x1, x2) - -inst_21988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f01ffff; valaddr_reg:x3; val_offset:65964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65964*FLEN/8, x4, x1, x2) - -inst_21989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f03ffff; valaddr_reg:x3; val_offset:65967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65967*FLEN/8, x4, x1, x2) - -inst_21990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f07ffff; valaddr_reg:x3; val_offset:65970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65970*FLEN/8, x4, x1, x2) - -inst_21991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f0fffff; valaddr_reg:x3; val_offset:65973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65973*FLEN/8, x4, x1, x2) - -inst_21992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f1fffff; valaddr_reg:x3; val_offset:65976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65976*FLEN/8, x4, x1, x2) - -inst_21993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f3fffff; valaddr_reg:x3; val_offset:65979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65979*FLEN/8, x4, x1, x2) - -inst_21994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f400000; valaddr_reg:x3; val_offset:65982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65982*FLEN/8, x4, x1, x2) - -inst_21995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f600000; valaddr_reg:x3; val_offset:65985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65985*FLEN/8, x4, x1, x2) - -inst_21996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f700000; valaddr_reg:x3; val_offset:65988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65988*FLEN/8, x4, x1, x2) - -inst_21997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f780000; valaddr_reg:x3; val_offset:65991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65991*FLEN/8, x4, x1, x2) - -inst_21998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7c0000; valaddr_reg:x3; val_offset:65994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65994*FLEN/8, x4, x1, x2) - -inst_21999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7e0000; valaddr_reg:x3; val_offset:65997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65997*FLEN/8, x4, x1, x2) - -inst_22000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7f0000; valaddr_reg:x3; val_offset:66000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66000*FLEN/8, x4, x1, x2) - -inst_22001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7f8000; valaddr_reg:x3; val_offset:66003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66003*FLEN/8, x4, x1, x2) - -inst_22002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7fc000; valaddr_reg:x3; val_offset:66006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66006*FLEN/8, x4, x1, x2) - -inst_22003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7fe000; valaddr_reg:x3; val_offset:66009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66009*FLEN/8, x4, x1, x2) - -inst_22004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7ff000; valaddr_reg:x3; val_offset:66012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66012*FLEN/8, x4, x1, x2) - -inst_22005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7ff800; valaddr_reg:x3; val_offset:66015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66015*FLEN/8, x4, x1, x2) - -inst_22006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:66018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66018*FLEN/8, x4, x1, x2) - -inst_22007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:66021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66021*FLEN/8, x4, x1, x2) - -inst_22008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7fff00; valaddr_reg:x3; val_offset:66024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66024*FLEN/8, x4, x1, x2) - -inst_22009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7fff80; valaddr_reg:x3; val_offset:66027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66027*FLEN/8, x4, x1, x2) - -inst_22010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:66030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66030*FLEN/8, x4, x1, x2) - -inst_22011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:66033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66033*FLEN/8, x4, x1, x2) - -inst_22012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:66036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66036*FLEN/8, x4, x1, x2) - -inst_22013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:66039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66039*FLEN/8, x4, x1, x2) - -inst_22014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:66042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66042*FLEN/8, x4, x1, x2) - -inst_22015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:66045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66045*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_173) - -inst_22016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; -op3val:0x8f7fffff; valaddr_reg:x3; val_offset:66048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66048*FLEN/8, x4, x1, x2) - -inst_22017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5000000; valaddr_reg:x3; val_offset:66051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66051*FLEN/8, x4, x1, x2) - -inst_22018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5000001; valaddr_reg:x3; val_offset:66054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66054*FLEN/8, x4, x1, x2) - -inst_22019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5000003; valaddr_reg:x3; val_offset:66057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66057*FLEN/8, x4, x1, x2) - -inst_22020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5000007; valaddr_reg:x3; val_offset:66060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66060*FLEN/8, x4, x1, x2) - -inst_22021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf500000f; valaddr_reg:x3; val_offset:66063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66063*FLEN/8, x4, x1, x2) - -inst_22022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf500001f; valaddr_reg:x3; val_offset:66066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66066*FLEN/8, x4, x1, x2) - -inst_22023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf500003f; valaddr_reg:x3; val_offset:66069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66069*FLEN/8, x4, x1, x2) - -inst_22024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf500007f; valaddr_reg:x3; val_offset:66072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66072*FLEN/8, x4, x1, x2) - -inst_22025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf50000ff; valaddr_reg:x3; val_offset:66075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66075*FLEN/8, x4, x1, x2) - -inst_22026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf50001ff; valaddr_reg:x3; val_offset:66078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66078*FLEN/8, x4, x1, x2) - -inst_22027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf50003ff; valaddr_reg:x3; val_offset:66081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66081*FLEN/8, x4, x1, x2) - -inst_22028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf50007ff; valaddr_reg:x3; val_offset:66084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66084*FLEN/8, x4, x1, x2) - -inst_22029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5000fff; valaddr_reg:x3; val_offset:66087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66087*FLEN/8, x4, x1, x2) - -inst_22030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5001fff; valaddr_reg:x3; val_offset:66090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66090*FLEN/8, x4, x1, x2) - -inst_22031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5003fff; valaddr_reg:x3; val_offset:66093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66093*FLEN/8, x4, x1, x2) - -inst_22032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5007fff; valaddr_reg:x3; val_offset:66096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66096*FLEN/8, x4, x1, x2) - -inst_22033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf500ffff; valaddr_reg:x3; val_offset:66099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66099*FLEN/8, x4, x1, x2) - -inst_22034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf501ffff; valaddr_reg:x3; val_offset:66102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66102*FLEN/8, x4, x1, x2) - -inst_22035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf503ffff; valaddr_reg:x3; val_offset:66105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66105*FLEN/8, x4, x1, x2) - -inst_22036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf507ffff; valaddr_reg:x3; val_offset:66108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66108*FLEN/8, x4, x1, x2) - -inst_22037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf50fffff; valaddr_reg:x3; val_offset:66111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66111*FLEN/8, x4, x1, x2) - -inst_22038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf51fffff; valaddr_reg:x3; val_offset:66114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66114*FLEN/8, x4, x1, x2) - -inst_22039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf53fffff; valaddr_reg:x3; val_offset:66117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66117*FLEN/8, x4, x1, x2) - -inst_22040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5400000; valaddr_reg:x3; val_offset:66120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66120*FLEN/8, x4, x1, x2) - -inst_22041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5600000; valaddr_reg:x3; val_offset:66123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66123*FLEN/8, x4, x1, x2) - -inst_22042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5700000; valaddr_reg:x3; val_offset:66126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66126*FLEN/8, x4, x1, x2) - -inst_22043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf5780000; valaddr_reg:x3; val_offset:66129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66129*FLEN/8, x4, x1, x2) - -inst_22044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57c0000; valaddr_reg:x3; val_offset:66132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66132*FLEN/8, x4, x1, x2) - -inst_22045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57e0000; valaddr_reg:x3; val_offset:66135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66135*FLEN/8, x4, x1, x2) - -inst_22046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57f0000; valaddr_reg:x3; val_offset:66138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66138*FLEN/8, x4, x1, x2) - -inst_22047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57f8000; valaddr_reg:x3; val_offset:66141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66141*FLEN/8, x4, x1, x2) - -inst_22048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57fc000; valaddr_reg:x3; val_offset:66144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66144*FLEN/8, x4, x1, x2) - -inst_22049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57fe000; valaddr_reg:x3; val_offset:66147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66147*FLEN/8, x4, x1, x2) - -inst_22050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57ff000; valaddr_reg:x3; val_offset:66150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66150*FLEN/8, x4, x1, x2) - -inst_22051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57ff800; valaddr_reg:x3; val_offset:66153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66153*FLEN/8, x4, x1, x2) - -inst_22052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57ffc00; valaddr_reg:x3; val_offset:66156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66156*FLEN/8, x4, x1, x2) - -inst_22053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57ffe00; valaddr_reg:x3; val_offset:66159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66159*FLEN/8, x4, x1, x2) - -inst_22054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57fff00; valaddr_reg:x3; val_offset:66162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66162*FLEN/8, x4, x1, x2) - -inst_22055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57fff80; valaddr_reg:x3; val_offset:66165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66165*FLEN/8, x4, x1, x2) - -inst_22056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57fffc0; valaddr_reg:x3; val_offset:66168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66168*FLEN/8, x4, x1, x2) - -inst_22057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57fffe0; valaddr_reg:x3; val_offset:66171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66171*FLEN/8, x4, x1, x2) - -inst_22058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57ffff0; valaddr_reg:x3; val_offset:66174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66174*FLEN/8, x4, x1, x2) - -inst_22059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57ffff8; valaddr_reg:x3; val_offset:66177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66177*FLEN/8, x4, x1, x2) - -inst_22060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57ffffc; valaddr_reg:x3; val_offset:66180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66180*FLEN/8, x4, x1, x2) - -inst_22061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57ffffe; valaddr_reg:x3; val_offset:66183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66183*FLEN/8, x4, x1, x2) - -inst_22062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xf57fffff; valaddr_reg:x3; val_offset:66186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66186*FLEN/8, x4, x1, x2) - -inst_22063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff000001; valaddr_reg:x3; val_offset:66189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66189*FLEN/8, x4, x1, x2) - -inst_22064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff000003; valaddr_reg:x3; val_offset:66192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66192*FLEN/8, x4, x1, x2) - -inst_22065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff000007; valaddr_reg:x3; val_offset:66195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66195*FLEN/8, x4, x1, x2) - -inst_22066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff199999; valaddr_reg:x3; val_offset:66198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66198*FLEN/8, x4, x1, x2) - -inst_22067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff249249; valaddr_reg:x3; val_offset:66201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66201*FLEN/8, x4, x1, x2) - -inst_22068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff333333; valaddr_reg:x3; val_offset:66204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66204*FLEN/8, x4, x1, x2) - -inst_22069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:66207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66207*FLEN/8, x4, x1, x2) - -inst_22070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:66210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66210*FLEN/8, x4, x1, x2) - -inst_22071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff444444; valaddr_reg:x3; val_offset:66213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66213*FLEN/8, x4, x1, x2) - -inst_22072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:66216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66216*FLEN/8, x4, x1, x2) - -inst_22073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:66219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66219*FLEN/8, x4, x1, x2) - -inst_22074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff666666; valaddr_reg:x3; val_offset:66222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66222*FLEN/8, x4, x1, x2) - -inst_22075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:66225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66225*FLEN/8, x4, x1, x2) - -inst_22076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:66228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66228*FLEN/8, x4, x1, x2) - -inst_22077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:66231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66231*FLEN/8, x4, x1, x2) - -inst_22078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:66234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66234*FLEN/8, x4, x1, x2) - -inst_22079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:66237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66237*FLEN/8, x4, x1, x2) - -inst_22080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:66240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66240*FLEN/8, x4, x1, x2) - -inst_22081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:66243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66243*FLEN/8, x4, x1, x2) - -inst_22082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:66246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66246*FLEN/8, x4, x1, x2) - -inst_22083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:66249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66249*FLEN/8, x4, x1, x2) - -inst_22084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:66252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66252*FLEN/8, x4, x1, x2) - -inst_22085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:66255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66255*FLEN/8, x4, x1, x2) - -inst_22086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:66258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66258*FLEN/8, x4, x1, x2) - -inst_22087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:66261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66261*FLEN/8, x4, x1, x2) - -inst_22088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:66264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66264*FLEN/8, x4, x1, x2) - -inst_22089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:66267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66267*FLEN/8, x4, x1, x2) - -inst_22090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:66270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66270*FLEN/8, x4, x1, x2) - -inst_22091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:66273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66273*FLEN/8, x4, x1, x2) - -inst_22092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:66276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66276*FLEN/8, x4, x1, x2) - -inst_22093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:66279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66279*FLEN/8, x4, x1, x2) - -inst_22094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:66282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66282*FLEN/8, x4, x1, x2) - -inst_22095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9000000; valaddr_reg:x3; val_offset:66285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66285*FLEN/8, x4, x1, x2) - -inst_22096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9000001; valaddr_reg:x3; val_offset:66288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66288*FLEN/8, x4, x1, x2) - -inst_22097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9000003; valaddr_reg:x3; val_offset:66291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66291*FLEN/8, x4, x1, x2) - -inst_22098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9000007; valaddr_reg:x3; val_offset:66294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66294*FLEN/8, x4, x1, x2) - -inst_22099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x900000f; valaddr_reg:x3; val_offset:66297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66297*FLEN/8, x4, x1, x2) - -inst_22100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x900001f; valaddr_reg:x3; val_offset:66300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66300*FLEN/8, x4, x1, x2) - -inst_22101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x900003f; valaddr_reg:x3; val_offset:66303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66303*FLEN/8, x4, x1, x2) - -inst_22102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x900007f; valaddr_reg:x3; val_offset:66306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66306*FLEN/8, x4, x1, x2) - -inst_22103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x90000ff; valaddr_reg:x3; val_offset:66309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66309*FLEN/8, x4, x1, x2) - -inst_22104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x90001ff; valaddr_reg:x3; val_offset:66312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66312*FLEN/8, x4, x1, x2) - -inst_22105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x90003ff; valaddr_reg:x3; val_offset:66315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66315*FLEN/8, x4, x1, x2) - -inst_22106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x90007ff; valaddr_reg:x3; val_offset:66318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66318*FLEN/8, x4, x1, x2) - -inst_22107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9000fff; valaddr_reg:x3; val_offset:66321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66321*FLEN/8, x4, x1, x2) - -inst_22108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9001fff; valaddr_reg:x3; val_offset:66324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66324*FLEN/8, x4, x1, x2) - -inst_22109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9003fff; valaddr_reg:x3; val_offset:66327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66327*FLEN/8, x4, x1, x2) - -inst_22110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9007fff; valaddr_reg:x3; val_offset:66330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66330*FLEN/8, x4, x1, x2) - -inst_22111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x900ffff; valaddr_reg:x3; val_offset:66333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66333*FLEN/8, x4, x1, x2) - -inst_22112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x901ffff; valaddr_reg:x3; val_offset:66336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66336*FLEN/8, x4, x1, x2) - -inst_22113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x903ffff; valaddr_reg:x3; val_offset:66339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66339*FLEN/8, x4, x1, x2) - -inst_22114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x907ffff; valaddr_reg:x3; val_offset:66342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66342*FLEN/8, x4, x1, x2) - -inst_22115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x90fffff; valaddr_reg:x3; val_offset:66345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66345*FLEN/8, x4, x1, x2) - -inst_22116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x91fffff; valaddr_reg:x3; val_offset:66348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66348*FLEN/8, x4, x1, x2) - -inst_22117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x93fffff; valaddr_reg:x3; val_offset:66351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66351*FLEN/8, x4, x1, x2) - -inst_22118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9400000; valaddr_reg:x3; val_offset:66354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66354*FLEN/8, x4, x1, x2) - -inst_22119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9600000; valaddr_reg:x3; val_offset:66357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66357*FLEN/8, x4, x1, x2) - -inst_22120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9700000; valaddr_reg:x3; val_offset:66360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66360*FLEN/8, x4, x1, x2) - -inst_22121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x9780000; valaddr_reg:x3; val_offset:66363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66363*FLEN/8, x4, x1, x2) - -inst_22122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97c0000; valaddr_reg:x3; val_offset:66366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66366*FLEN/8, x4, x1, x2) - -inst_22123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97e0000; valaddr_reg:x3; val_offset:66369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66369*FLEN/8, x4, x1, x2) - -inst_22124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97f0000; valaddr_reg:x3; val_offset:66372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66372*FLEN/8, x4, x1, x2) - -inst_22125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97f8000; valaddr_reg:x3; val_offset:66375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66375*FLEN/8, x4, x1, x2) - -inst_22126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97fc000; valaddr_reg:x3; val_offset:66378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66378*FLEN/8, x4, x1, x2) - -inst_22127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97fe000; valaddr_reg:x3; val_offset:66381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66381*FLEN/8, x4, x1, x2) - -inst_22128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97ff000; valaddr_reg:x3; val_offset:66384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66384*FLEN/8, x4, x1, x2) - -inst_22129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97ff800; valaddr_reg:x3; val_offset:66387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66387*FLEN/8, x4, x1, x2) - -inst_22130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97ffc00; valaddr_reg:x3; val_offset:66390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66390*FLEN/8, x4, x1, x2) - -inst_22131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97ffe00; valaddr_reg:x3; val_offset:66393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66393*FLEN/8, x4, x1, x2) - -inst_22132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97fff00; valaddr_reg:x3; val_offset:66396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66396*FLEN/8, x4, x1, x2) - -inst_22133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97fff80; valaddr_reg:x3; val_offset:66399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66399*FLEN/8, x4, x1, x2) - -inst_22134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97fffc0; valaddr_reg:x3; val_offset:66402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66402*FLEN/8, x4, x1, x2) - -inst_22135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97fffe0; valaddr_reg:x3; val_offset:66405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66405*FLEN/8, x4, x1, x2) - -inst_22136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97ffff0; valaddr_reg:x3; val_offset:66408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66408*FLEN/8, x4, x1, x2) - -inst_22137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97ffff8; valaddr_reg:x3; val_offset:66411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66411*FLEN/8, x4, x1, x2) - -inst_22138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97ffffc; valaddr_reg:x3; val_offset:66414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66414*FLEN/8, x4, x1, x2) - -inst_22139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97ffffe; valaddr_reg:x3; val_offset:66417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66417*FLEN/8, x4, x1, x2) - -inst_22140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; -op3val:0x97fffff; valaddr_reg:x3; val_offset:66420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66420*FLEN/8, x4, x1, x2) - -inst_22141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:66423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66423*FLEN/8, x4, x1, x2) - -inst_22142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:66426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66426*FLEN/8, x4, x1, x2) - -inst_22143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:66429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66429*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_174) - -inst_22144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:66432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66432*FLEN/8, x4, x1, x2) - -inst_22145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:66435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66435*FLEN/8, x4, x1, x2) - -inst_22146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:66438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66438*FLEN/8, x4, x1, x2) - -inst_22147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:66441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66441*FLEN/8, x4, x1, x2) - -inst_22148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:66444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66444*FLEN/8, x4, x1, x2) - -inst_22149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:66447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66447*FLEN/8, x4, x1, x2) - -inst_22150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:66450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66450*FLEN/8, x4, x1, x2) - -inst_22151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:66453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66453*FLEN/8, x4, x1, x2) - -inst_22152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:66456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66456*FLEN/8, x4, x1, x2) - -inst_22153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:66459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66459*FLEN/8, x4, x1, x2) - -inst_22154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:66462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66462*FLEN/8, x4, x1, x2) - -inst_22155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:66465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66465*FLEN/8, x4, x1, x2) - -inst_22156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:66468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66468*FLEN/8, x4, x1, x2) - -inst_22157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84800000; valaddr_reg:x3; val_offset:66471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66471*FLEN/8, x4, x1, x2) - -inst_22158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84800001; valaddr_reg:x3; val_offset:66474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66474*FLEN/8, x4, x1, x2) - -inst_22159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84800003; valaddr_reg:x3; val_offset:66477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66477*FLEN/8, x4, x1, x2) - -inst_22160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84800007; valaddr_reg:x3; val_offset:66480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66480*FLEN/8, x4, x1, x2) - -inst_22161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8480000f; valaddr_reg:x3; val_offset:66483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66483*FLEN/8, x4, x1, x2) - -inst_22162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8480001f; valaddr_reg:x3; val_offset:66486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66486*FLEN/8, x4, x1, x2) - -inst_22163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8480003f; valaddr_reg:x3; val_offset:66489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66489*FLEN/8, x4, x1, x2) - -inst_22164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8480007f; valaddr_reg:x3; val_offset:66492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66492*FLEN/8, x4, x1, x2) - -inst_22165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x848000ff; valaddr_reg:x3; val_offset:66495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66495*FLEN/8, x4, x1, x2) - -inst_22166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x848001ff; valaddr_reg:x3; val_offset:66498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66498*FLEN/8, x4, x1, x2) - -inst_22167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x848003ff; valaddr_reg:x3; val_offset:66501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66501*FLEN/8, x4, x1, x2) - -inst_22168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x848007ff; valaddr_reg:x3; val_offset:66504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66504*FLEN/8, x4, x1, x2) - -inst_22169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84800fff; valaddr_reg:x3; val_offset:66507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66507*FLEN/8, x4, x1, x2) - -inst_22170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84801fff; valaddr_reg:x3; val_offset:66510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66510*FLEN/8, x4, x1, x2) - -inst_22171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84803fff; valaddr_reg:x3; val_offset:66513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66513*FLEN/8, x4, x1, x2) - -inst_22172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84807fff; valaddr_reg:x3; val_offset:66516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66516*FLEN/8, x4, x1, x2) - -inst_22173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8480ffff; valaddr_reg:x3; val_offset:66519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66519*FLEN/8, x4, x1, x2) - -inst_22174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8481ffff; valaddr_reg:x3; val_offset:66522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66522*FLEN/8, x4, x1, x2) - -inst_22175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8483ffff; valaddr_reg:x3; val_offset:66525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66525*FLEN/8, x4, x1, x2) - -inst_22176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x8487ffff; valaddr_reg:x3; val_offset:66528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66528*FLEN/8, x4, x1, x2) - -inst_22177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x848fffff; valaddr_reg:x3; val_offset:66531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66531*FLEN/8, x4, x1, x2) - -inst_22178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x849fffff; valaddr_reg:x3; val_offset:66534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66534*FLEN/8, x4, x1, x2) - -inst_22179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84bfffff; valaddr_reg:x3; val_offset:66537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66537*FLEN/8, x4, x1, x2) - -inst_22180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84c00000; valaddr_reg:x3; val_offset:66540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66540*FLEN/8, x4, x1, x2) - -inst_22181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84e00000; valaddr_reg:x3; val_offset:66543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66543*FLEN/8, x4, x1, x2) - -inst_22182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84f00000; valaddr_reg:x3; val_offset:66546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66546*FLEN/8, x4, x1, x2) - -inst_22183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84f80000; valaddr_reg:x3; val_offset:66549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66549*FLEN/8, x4, x1, x2) - -inst_22184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fc0000; valaddr_reg:x3; val_offset:66552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66552*FLEN/8, x4, x1, x2) - -inst_22185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fe0000; valaddr_reg:x3; val_offset:66555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66555*FLEN/8, x4, x1, x2) - -inst_22186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ff0000; valaddr_reg:x3; val_offset:66558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66558*FLEN/8, x4, x1, x2) - -inst_22187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ff8000; valaddr_reg:x3; val_offset:66561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66561*FLEN/8, x4, x1, x2) - -inst_22188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ffc000; valaddr_reg:x3; val_offset:66564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66564*FLEN/8, x4, x1, x2) - -inst_22189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ffe000; valaddr_reg:x3; val_offset:66567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66567*FLEN/8, x4, x1, x2) - -inst_22190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fff000; valaddr_reg:x3; val_offset:66570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66570*FLEN/8, x4, x1, x2) - -inst_22191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fff800; valaddr_reg:x3; val_offset:66573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66573*FLEN/8, x4, x1, x2) - -inst_22192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fffc00; valaddr_reg:x3; val_offset:66576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66576*FLEN/8, x4, x1, x2) - -inst_22193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fffe00; valaddr_reg:x3; val_offset:66579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66579*FLEN/8, x4, x1, x2) - -inst_22194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ffff00; valaddr_reg:x3; val_offset:66582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66582*FLEN/8, x4, x1, x2) - -inst_22195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ffff80; valaddr_reg:x3; val_offset:66585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66585*FLEN/8, x4, x1, x2) - -inst_22196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ffffc0; valaddr_reg:x3; val_offset:66588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66588*FLEN/8, x4, x1, x2) - -inst_22197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ffffe0; valaddr_reg:x3; val_offset:66591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66591*FLEN/8, x4, x1, x2) - -inst_22198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fffff0; valaddr_reg:x3; val_offset:66594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66594*FLEN/8, x4, x1, x2) - -inst_22199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fffff8; valaddr_reg:x3; val_offset:66597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66597*FLEN/8, x4, x1, x2) - -inst_22200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fffffc; valaddr_reg:x3; val_offset:66600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66600*FLEN/8, x4, x1, x2) - -inst_22201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84fffffe; valaddr_reg:x3; val_offset:66603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66603*FLEN/8, x4, x1, x2) - -inst_22202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; -op3val:0x84ffffff; valaddr_reg:x3; val_offset:66606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66606*FLEN/8, x4, x1, x2) - -inst_22203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b800000; valaddr_reg:x3; val_offset:66609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66609*FLEN/8, x4, x1, x2) - -inst_22204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b800001; valaddr_reg:x3; val_offset:66612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66612*FLEN/8, x4, x1, x2) - -inst_22205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b800003; valaddr_reg:x3; val_offset:66615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66615*FLEN/8, x4, x1, x2) - -inst_22206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b800007; valaddr_reg:x3; val_offset:66618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66618*FLEN/8, x4, x1, x2) - -inst_22207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b80000f; valaddr_reg:x3; val_offset:66621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66621*FLEN/8, x4, x1, x2) - -inst_22208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b80001f; valaddr_reg:x3; val_offset:66624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66624*FLEN/8, x4, x1, x2) - -inst_22209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b80003f; valaddr_reg:x3; val_offset:66627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66627*FLEN/8, x4, x1, x2) - -inst_22210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b80007f; valaddr_reg:x3; val_offset:66630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66630*FLEN/8, x4, x1, x2) - -inst_22211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b8000ff; valaddr_reg:x3; val_offset:66633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66633*FLEN/8, x4, x1, x2) - -inst_22212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b8001ff; valaddr_reg:x3; val_offset:66636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66636*FLEN/8, x4, x1, x2) - -inst_22213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b8003ff; valaddr_reg:x3; val_offset:66639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66639*FLEN/8, x4, x1, x2) - -inst_22214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b8007ff; valaddr_reg:x3; val_offset:66642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66642*FLEN/8, x4, x1, x2) - -inst_22215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b800fff; valaddr_reg:x3; val_offset:66645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66645*FLEN/8, x4, x1, x2) - -inst_22216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b801fff; valaddr_reg:x3; val_offset:66648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66648*FLEN/8, x4, x1, x2) - -inst_22217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b803fff; valaddr_reg:x3; val_offset:66651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66651*FLEN/8, x4, x1, x2) - -inst_22218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b807fff; valaddr_reg:x3; val_offset:66654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66654*FLEN/8, x4, x1, x2) - -inst_22219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b80ffff; valaddr_reg:x3; val_offset:66657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66657*FLEN/8, x4, x1, x2) - -inst_22220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b81ffff; valaddr_reg:x3; val_offset:66660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66660*FLEN/8, x4, x1, x2) - -inst_22221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b83ffff; valaddr_reg:x3; val_offset:66663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66663*FLEN/8, x4, x1, x2) - -inst_22222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b87ffff; valaddr_reg:x3; val_offset:66666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66666*FLEN/8, x4, x1, x2) - -inst_22223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b8fffff; valaddr_reg:x3; val_offset:66669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66669*FLEN/8, x4, x1, x2) - -inst_22224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2b9fffff; valaddr_reg:x3; val_offset:66672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66672*FLEN/8, x4, x1, x2) - -inst_22225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bbfffff; valaddr_reg:x3; val_offset:66675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66675*FLEN/8, x4, x1, x2) - -inst_22226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bc00000; valaddr_reg:x3; val_offset:66678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66678*FLEN/8, x4, x1, x2) - -inst_22227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2be00000; valaddr_reg:x3; val_offset:66681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66681*FLEN/8, x4, x1, x2) - -inst_22228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bf00000; valaddr_reg:x3; val_offset:66684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66684*FLEN/8, x4, x1, x2) - -inst_22229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bf80000; valaddr_reg:x3; val_offset:66687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66687*FLEN/8, x4, x1, x2) - -inst_22230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfc0000; valaddr_reg:x3; val_offset:66690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66690*FLEN/8, x4, x1, x2) - -inst_22231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfe0000; valaddr_reg:x3; val_offset:66693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66693*FLEN/8, x4, x1, x2) - -inst_22232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bff0000; valaddr_reg:x3; val_offset:66696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66696*FLEN/8, x4, x1, x2) - -inst_22233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bff8000; valaddr_reg:x3; val_offset:66699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66699*FLEN/8, x4, x1, x2) - -inst_22234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bffc000; valaddr_reg:x3; val_offset:66702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66702*FLEN/8, x4, x1, x2) - -inst_22235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bffe000; valaddr_reg:x3; val_offset:66705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66705*FLEN/8, x4, x1, x2) - -inst_22236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfff000; valaddr_reg:x3; val_offset:66708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66708*FLEN/8, x4, x1, x2) - -inst_22237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfff800; valaddr_reg:x3; val_offset:66711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66711*FLEN/8, x4, x1, x2) - -inst_22238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfffc00; valaddr_reg:x3; val_offset:66714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66714*FLEN/8, x4, x1, x2) - -inst_22239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfffe00; valaddr_reg:x3; val_offset:66717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66717*FLEN/8, x4, x1, x2) - -inst_22240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bffff00; valaddr_reg:x3; val_offset:66720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66720*FLEN/8, x4, x1, x2) - -inst_22241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bffff80; valaddr_reg:x3; val_offset:66723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66723*FLEN/8, x4, x1, x2) - -inst_22242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bffffc0; valaddr_reg:x3; val_offset:66726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66726*FLEN/8, x4, x1, x2) - -inst_22243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bffffe0; valaddr_reg:x3; val_offset:66729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66729*FLEN/8, x4, x1, x2) - -inst_22244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfffff0; valaddr_reg:x3; val_offset:66732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66732*FLEN/8, x4, x1, x2) - -inst_22245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfffff8; valaddr_reg:x3; val_offset:66735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66735*FLEN/8, x4, x1, x2) - -inst_22246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfffffc; valaddr_reg:x3; val_offset:66738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66738*FLEN/8, x4, x1, x2) - -inst_22247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bfffffe; valaddr_reg:x3; val_offset:66741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66741*FLEN/8, x4, x1, x2) - -inst_22248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x2bffffff; valaddr_reg:x3; val_offset:66744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66744*FLEN/8, x4, x1, x2) - -inst_22249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3f800001; valaddr_reg:x3; val_offset:66747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66747*FLEN/8, x4, x1, x2) - -inst_22250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3f800003; valaddr_reg:x3; val_offset:66750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66750*FLEN/8, x4, x1, x2) - -inst_22251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3f800007; valaddr_reg:x3; val_offset:66753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66753*FLEN/8, x4, x1, x2) - -inst_22252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3f999999; valaddr_reg:x3; val_offset:66756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66756*FLEN/8, x4, x1, x2) - -inst_22253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:66759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66759*FLEN/8, x4, x1, x2) - -inst_22254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:66762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66762*FLEN/8, x4, x1, x2) - -inst_22255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:66765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66765*FLEN/8, x4, x1, x2) - -inst_22256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:66768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66768*FLEN/8, x4, x1, x2) - -inst_22257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:66771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66771*FLEN/8, x4, x1, x2) - -inst_22258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:66774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66774*FLEN/8, x4, x1, x2) - -inst_22259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:66777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66777*FLEN/8, x4, x1, x2) - -inst_22260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:66780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66780*FLEN/8, x4, x1, x2) - -inst_22261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:66783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66783*FLEN/8, x4, x1, x2) - -inst_22262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:66786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66786*FLEN/8, x4, x1, x2) - -inst_22263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:66789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66789*FLEN/8, x4, x1, x2) - -inst_22264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:66792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66792*FLEN/8, x4, x1, x2) - -inst_22265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:66795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66795*FLEN/8, x4, x1, x2) - -inst_22266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:66798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66798*FLEN/8, x4, x1, x2) - -inst_22267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:66801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66801*FLEN/8, x4, x1, x2) - -inst_22268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:66804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66804*FLEN/8, x4, x1, x2) - -inst_22269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:66807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66807*FLEN/8, x4, x1, x2) - -inst_22270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:66810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66810*FLEN/8, x4, x1, x2) - -inst_22271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:66813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66813*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_175) - -inst_22272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:66816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66816*FLEN/8, x4, x1, x2) - -inst_22273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:66819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66819*FLEN/8, x4, x1, x2) - -inst_22274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:66822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66822*FLEN/8, x4, x1, x2) - -inst_22275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:66825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66825*FLEN/8, x4, x1, x2) - -inst_22276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:66828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66828*FLEN/8, x4, x1, x2) - -inst_22277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:66831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66831*FLEN/8, x4, x1, x2) - -inst_22278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:66834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66834*FLEN/8, x4, x1, x2) - -inst_22279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:66837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66837*FLEN/8, x4, x1, x2) - -inst_22280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:66840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66840*FLEN/8, x4, x1, x2) - -inst_22281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d000000; valaddr_reg:x3; val_offset:66843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66843*FLEN/8, x4, x1, x2) - -inst_22282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d000001; valaddr_reg:x3; val_offset:66846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66846*FLEN/8, x4, x1, x2) - -inst_22283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d000003; valaddr_reg:x3; val_offset:66849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66849*FLEN/8, x4, x1, x2) - -inst_22284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d000007; valaddr_reg:x3; val_offset:66852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66852*FLEN/8, x4, x1, x2) - -inst_22285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d00000f; valaddr_reg:x3; val_offset:66855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66855*FLEN/8, x4, x1, x2) - -inst_22286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d00001f; valaddr_reg:x3; val_offset:66858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66858*FLEN/8, x4, x1, x2) - -inst_22287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d00003f; valaddr_reg:x3; val_offset:66861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66861*FLEN/8, x4, x1, x2) - -inst_22288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d00007f; valaddr_reg:x3; val_offset:66864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66864*FLEN/8, x4, x1, x2) - -inst_22289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d0000ff; valaddr_reg:x3; val_offset:66867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66867*FLEN/8, x4, x1, x2) - -inst_22290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d0001ff; valaddr_reg:x3; val_offset:66870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66870*FLEN/8, x4, x1, x2) - -inst_22291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d0003ff; valaddr_reg:x3; val_offset:66873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66873*FLEN/8, x4, x1, x2) - -inst_22292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d0007ff; valaddr_reg:x3; val_offset:66876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66876*FLEN/8, x4, x1, x2) - -inst_22293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d000fff; valaddr_reg:x3; val_offset:66879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66879*FLEN/8, x4, x1, x2) - -inst_22294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d001fff; valaddr_reg:x3; val_offset:66882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66882*FLEN/8, x4, x1, x2) - -inst_22295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d003fff; valaddr_reg:x3; val_offset:66885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66885*FLEN/8, x4, x1, x2) - -inst_22296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d007fff; valaddr_reg:x3; val_offset:66888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66888*FLEN/8, x4, x1, x2) - -inst_22297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d00ffff; valaddr_reg:x3; val_offset:66891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66891*FLEN/8, x4, x1, x2) - -inst_22298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d01ffff; valaddr_reg:x3; val_offset:66894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66894*FLEN/8, x4, x1, x2) - -inst_22299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d03ffff; valaddr_reg:x3; val_offset:66897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66897*FLEN/8, x4, x1, x2) - -inst_22300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d07ffff; valaddr_reg:x3; val_offset:66900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66900*FLEN/8, x4, x1, x2) - -inst_22301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d0fffff; valaddr_reg:x3; val_offset:66903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66903*FLEN/8, x4, x1, x2) - -inst_22302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d1fffff; valaddr_reg:x3; val_offset:66906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66906*FLEN/8, x4, x1, x2) - -inst_22303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d3fffff; valaddr_reg:x3; val_offset:66909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66909*FLEN/8, x4, x1, x2) - -inst_22304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d400000; valaddr_reg:x3; val_offset:66912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66912*FLEN/8, x4, x1, x2) - -inst_22305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d600000; valaddr_reg:x3; val_offset:66915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66915*FLEN/8, x4, x1, x2) - -inst_22306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d700000; valaddr_reg:x3; val_offset:66918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66918*FLEN/8, x4, x1, x2) - -inst_22307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d780000; valaddr_reg:x3; val_offset:66921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66921*FLEN/8, x4, x1, x2) - -inst_22308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7c0000; valaddr_reg:x3; val_offset:66924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66924*FLEN/8, x4, x1, x2) - -inst_22309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7e0000; valaddr_reg:x3; val_offset:66927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66927*FLEN/8, x4, x1, x2) - -inst_22310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7f0000; valaddr_reg:x3; val_offset:66930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66930*FLEN/8, x4, x1, x2) - -inst_22311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7f8000; valaddr_reg:x3; val_offset:66933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66933*FLEN/8, x4, x1, x2) - -inst_22312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7fc000; valaddr_reg:x3; val_offset:66936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66936*FLEN/8, x4, x1, x2) - -inst_22313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7fe000; valaddr_reg:x3; val_offset:66939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66939*FLEN/8, x4, x1, x2) - -inst_22314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7ff000; valaddr_reg:x3; val_offset:66942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66942*FLEN/8, x4, x1, x2) - -inst_22315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7ff800; valaddr_reg:x3; val_offset:66945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66945*FLEN/8, x4, x1, x2) - -inst_22316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:66948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66948*FLEN/8, x4, x1, x2) - -inst_22317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:66951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66951*FLEN/8, x4, x1, x2) - -inst_22318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7fff00; valaddr_reg:x3; val_offset:66954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66954*FLEN/8, x4, x1, x2) - -inst_22319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7fff80; valaddr_reg:x3; val_offset:66957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66957*FLEN/8, x4, x1, x2) - -inst_22320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:66960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66960*FLEN/8, x4, x1, x2) - -inst_22321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:66963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66963*FLEN/8, x4, x1, x2) - -inst_22322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:66966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66966*FLEN/8, x4, x1, x2) - -inst_22323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:66969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66969*FLEN/8, x4, x1, x2) - -inst_22324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:66972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66972*FLEN/8, x4, x1, x2) - -inst_22325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:66975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66975*FLEN/8, x4, x1, x2) - -inst_22326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; -op3val:0x8d7fffff; valaddr_reg:x3; val_offset:66978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66978*FLEN/8, x4, x1, x2) - -inst_22327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0800000; valaddr_reg:x3; val_offset:66981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66981*FLEN/8, x4, x1, x2) - -inst_22328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0800001; valaddr_reg:x3; val_offset:66984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66984*FLEN/8, x4, x1, x2) - -inst_22329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0800003; valaddr_reg:x3; val_offset:66987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66987*FLEN/8, x4, x1, x2) - -inst_22330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0800007; valaddr_reg:x3; val_offset:66990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66990*FLEN/8, x4, x1, x2) - -inst_22331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa080000f; valaddr_reg:x3; val_offset:66993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66993*FLEN/8, x4, x1, x2) - -inst_22332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa080001f; valaddr_reg:x3; val_offset:66996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66996*FLEN/8, x4, x1, x2) - -inst_22333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa080003f; valaddr_reg:x3; val_offset:66999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66999*FLEN/8, x4, x1, x2) - -inst_22334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa080007f; valaddr_reg:x3; val_offset:67002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67002*FLEN/8, x4, x1, x2) - -inst_22335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa08000ff; valaddr_reg:x3; val_offset:67005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67005*FLEN/8, x4, x1, x2) - -inst_22336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa08001ff; valaddr_reg:x3; val_offset:67008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67008*FLEN/8, x4, x1, x2) - -inst_22337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa08003ff; valaddr_reg:x3; val_offset:67011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67011*FLEN/8, x4, x1, x2) - -inst_22338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa08007ff; valaddr_reg:x3; val_offset:67014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67014*FLEN/8, x4, x1, x2) - -inst_22339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0800fff; valaddr_reg:x3; val_offset:67017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67017*FLEN/8, x4, x1, x2) - -inst_22340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0801fff; valaddr_reg:x3; val_offset:67020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67020*FLEN/8, x4, x1, x2) - -inst_22341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0803fff; valaddr_reg:x3; val_offset:67023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67023*FLEN/8, x4, x1, x2) - -inst_22342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0807fff; valaddr_reg:x3; val_offset:67026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67026*FLEN/8, x4, x1, x2) - -inst_22343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa080ffff; valaddr_reg:x3; val_offset:67029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67029*FLEN/8, x4, x1, x2) - -inst_22344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa081ffff; valaddr_reg:x3; val_offset:67032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67032*FLEN/8, x4, x1, x2) - -inst_22345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa083ffff; valaddr_reg:x3; val_offset:67035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67035*FLEN/8, x4, x1, x2) - -inst_22346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa087ffff; valaddr_reg:x3; val_offset:67038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67038*FLEN/8, x4, x1, x2) - -inst_22347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa08fffff; valaddr_reg:x3; val_offset:67041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67041*FLEN/8, x4, x1, x2) - -inst_22348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa09fffff; valaddr_reg:x3; val_offset:67044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67044*FLEN/8, x4, x1, x2) - -inst_22349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0bfffff; valaddr_reg:x3; val_offset:67047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67047*FLEN/8, x4, x1, x2) - -inst_22350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0c00000; valaddr_reg:x3; val_offset:67050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67050*FLEN/8, x4, x1, x2) - -inst_22351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0e00000; valaddr_reg:x3; val_offset:67053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67053*FLEN/8, x4, x1, x2) - -inst_22352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0f00000; valaddr_reg:x3; val_offset:67056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67056*FLEN/8, x4, x1, x2) - -inst_22353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0f80000; valaddr_reg:x3; val_offset:67059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67059*FLEN/8, x4, x1, x2) - -inst_22354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fc0000; valaddr_reg:x3; val_offset:67062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67062*FLEN/8, x4, x1, x2) - -inst_22355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fe0000; valaddr_reg:x3; val_offset:67065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67065*FLEN/8, x4, x1, x2) - -inst_22356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ff0000; valaddr_reg:x3; val_offset:67068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67068*FLEN/8, x4, x1, x2) - -inst_22357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ff8000; valaddr_reg:x3; val_offset:67071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67071*FLEN/8, x4, x1, x2) - -inst_22358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ffc000; valaddr_reg:x3; val_offset:67074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67074*FLEN/8, x4, x1, x2) - -inst_22359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ffe000; valaddr_reg:x3; val_offset:67077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67077*FLEN/8, x4, x1, x2) - -inst_22360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fff000; valaddr_reg:x3; val_offset:67080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67080*FLEN/8, x4, x1, x2) - -inst_22361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fff800; valaddr_reg:x3; val_offset:67083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67083*FLEN/8, x4, x1, x2) - -inst_22362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fffc00; valaddr_reg:x3; val_offset:67086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67086*FLEN/8, x4, x1, x2) - -inst_22363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fffe00; valaddr_reg:x3; val_offset:67089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67089*FLEN/8, x4, x1, x2) - -inst_22364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ffff00; valaddr_reg:x3; val_offset:67092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67092*FLEN/8, x4, x1, x2) - -inst_22365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ffff80; valaddr_reg:x3; val_offset:67095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67095*FLEN/8, x4, x1, x2) - -inst_22366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ffffc0; valaddr_reg:x3; val_offset:67098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67098*FLEN/8, x4, x1, x2) - -inst_22367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ffffe0; valaddr_reg:x3; val_offset:67101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67101*FLEN/8, x4, x1, x2) - -inst_22368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fffff0; valaddr_reg:x3; val_offset:67104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67104*FLEN/8, x4, x1, x2) - -inst_22369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fffff8; valaddr_reg:x3; val_offset:67107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67107*FLEN/8, x4, x1, x2) - -inst_22370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fffffc; valaddr_reg:x3; val_offset:67110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67110*FLEN/8, x4, x1, x2) - -inst_22371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0fffffe; valaddr_reg:x3; val_offset:67113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67113*FLEN/8, x4, x1, x2) - -inst_22372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xa0ffffff; valaddr_reg:x3; val_offset:67116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67116*FLEN/8, x4, x1, x2) - -inst_22373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbf800001; valaddr_reg:x3; val_offset:67119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67119*FLEN/8, x4, x1, x2) - -inst_22374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbf800003; valaddr_reg:x3; val_offset:67122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67122*FLEN/8, x4, x1, x2) - -inst_22375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbf800007; valaddr_reg:x3; val_offset:67125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67125*FLEN/8, x4, x1, x2) - -inst_22376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbf999999; valaddr_reg:x3; val_offset:67128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67128*FLEN/8, x4, x1, x2) - -inst_22377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:67131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67131*FLEN/8, x4, x1, x2) - -inst_22378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:67134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67134*FLEN/8, x4, x1, x2) - -inst_22379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:67137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67137*FLEN/8, x4, x1, x2) - -inst_22380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:67140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67140*FLEN/8, x4, x1, x2) - -inst_22381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:67143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67143*FLEN/8, x4, x1, x2) - -inst_22382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:67146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67146*FLEN/8, x4, x1, x2) - -inst_22383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:67149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67149*FLEN/8, x4, x1, x2) - -inst_22384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:67152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67152*FLEN/8, x4, x1, x2) - -inst_22385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:67155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67155*FLEN/8, x4, x1, x2) - -inst_22386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:67158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67158*FLEN/8, x4, x1, x2) - -inst_22387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:67161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67161*FLEN/8, x4, x1, x2) - -inst_22388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:67164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67164*FLEN/8, x4, x1, x2) - -inst_22389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c000000; valaddr_reg:x3; val_offset:67167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67167*FLEN/8, x4, x1, x2) - -inst_22390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c000001; valaddr_reg:x3; val_offset:67170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67170*FLEN/8, x4, x1, x2) - -inst_22391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c000003; valaddr_reg:x3; val_offset:67173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67173*FLEN/8, x4, x1, x2) - -inst_22392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c000007; valaddr_reg:x3; val_offset:67176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67176*FLEN/8, x4, x1, x2) - -inst_22393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c00000f; valaddr_reg:x3; val_offset:67179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67179*FLEN/8, x4, x1, x2) - -inst_22394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c00001f; valaddr_reg:x3; val_offset:67182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67182*FLEN/8, x4, x1, x2) - -inst_22395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c00003f; valaddr_reg:x3; val_offset:67185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67185*FLEN/8, x4, x1, x2) - -inst_22396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c00007f; valaddr_reg:x3; val_offset:67188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67188*FLEN/8, x4, x1, x2) - -inst_22397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c0000ff; valaddr_reg:x3; val_offset:67191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67191*FLEN/8, x4, x1, x2) - -inst_22398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c0001ff; valaddr_reg:x3; val_offset:67194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67194*FLEN/8, x4, x1, x2) - -inst_22399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c0003ff; valaddr_reg:x3; val_offset:67197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67197*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_176) - -inst_22400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c0007ff; valaddr_reg:x3; val_offset:67200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67200*FLEN/8, x4, x1, x2) - -inst_22401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c000fff; valaddr_reg:x3; val_offset:67203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67203*FLEN/8, x4, x1, x2) - -inst_22402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c001fff; valaddr_reg:x3; val_offset:67206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67206*FLEN/8, x4, x1, x2) - -inst_22403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c003fff; valaddr_reg:x3; val_offset:67209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67209*FLEN/8, x4, x1, x2) - -inst_22404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c007fff; valaddr_reg:x3; val_offset:67212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67212*FLEN/8, x4, x1, x2) - -inst_22405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c00ffff; valaddr_reg:x3; val_offset:67215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67215*FLEN/8, x4, x1, x2) - -inst_22406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c01ffff; valaddr_reg:x3; val_offset:67218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67218*FLEN/8, x4, x1, x2) - -inst_22407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c03ffff; valaddr_reg:x3; val_offset:67221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67221*FLEN/8, x4, x1, x2) - -inst_22408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c07ffff; valaddr_reg:x3; val_offset:67224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67224*FLEN/8, x4, x1, x2) - -inst_22409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c0fffff; valaddr_reg:x3; val_offset:67227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67227*FLEN/8, x4, x1, x2) - -inst_22410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c1fffff; valaddr_reg:x3; val_offset:67230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67230*FLEN/8, x4, x1, x2) - -inst_22411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c3fffff; valaddr_reg:x3; val_offset:67233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67233*FLEN/8, x4, x1, x2) - -inst_22412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c400000; valaddr_reg:x3; val_offset:67236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67236*FLEN/8, x4, x1, x2) - -inst_22413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c600000; valaddr_reg:x3; val_offset:67239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67239*FLEN/8, x4, x1, x2) - -inst_22414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c700000; valaddr_reg:x3; val_offset:67242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67242*FLEN/8, x4, x1, x2) - -inst_22415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c780000; valaddr_reg:x3; val_offset:67245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67245*FLEN/8, x4, x1, x2) - -inst_22416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7c0000; valaddr_reg:x3; val_offset:67248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67248*FLEN/8, x4, x1, x2) - -inst_22417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7e0000; valaddr_reg:x3; val_offset:67251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67251*FLEN/8, x4, x1, x2) - -inst_22418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7f0000; valaddr_reg:x3; val_offset:67254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67254*FLEN/8, x4, x1, x2) - -inst_22419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7f8000; valaddr_reg:x3; val_offset:67257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67257*FLEN/8, x4, x1, x2) - -inst_22420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7fc000; valaddr_reg:x3; val_offset:67260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67260*FLEN/8, x4, x1, x2) - -inst_22421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7fe000; valaddr_reg:x3; val_offset:67263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67263*FLEN/8, x4, x1, x2) - -inst_22422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7ff000; valaddr_reg:x3; val_offset:67266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67266*FLEN/8, x4, x1, x2) - -inst_22423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7ff800; valaddr_reg:x3; val_offset:67269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67269*FLEN/8, x4, x1, x2) - -inst_22424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7ffc00; valaddr_reg:x3; val_offset:67272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67272*FLEN/8, x4, x1, x2) - -inst_22425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7ffe00; valaddr_reg:x3; val_offset:67275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67275*FLEN/8, x4, x1, x2) - -inst_22426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7fff00; valaddr_reg:x3; val_offset:67278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67278*FLEN/8, x4, x1, x2) - -inst_22427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7fff80; valaddr_reg:x3; val_offset:67281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67281*FLEN/8, x4, x1, x2) - -inst_22428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7fffc0; valaddr_reg:x3; val_offset:67284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67284*FLEN/8, x4, x1, x2) - -inst_22429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7fffe0; valaddr_reg:x3; val_offset:67287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67287*FLEN/8, x4, x1, x2) - -inst_22430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7ffff0; valaddr_reg:x3; val_offset:67290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67290*FLEN/8, x4, x1, x2) - -inst_22431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7ffff8; valaddr_reg:x3; val_offset:67293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67293*FLEN/8, x4, x1, x2) - -inst_22432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7ffffc; valaddr_reg:x3; val_offset:67296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67296*FLEN/8, x4, x1, x2) - -inst_22433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7ffffe; valaddr_reg:x3; val_offset:67299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67299*FLEN/8, x4, x1, x2) - -inst_22434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7c7fffff; valaddr_reg:x3; val_offset:67302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67302*FLEN/8, x4, x1, x2) - -inst_22435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f000001; valaddr_reg:x3; val_offset:67305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67305*FLEN/8, x4, x1, x2) - -inst_22436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f000003; valaddr_reg:x3; val_offset:67308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67308*FLEN/8, x4, x1, x2) - -inst_22437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f000007; valaddr_reg:x3; val_offset:67311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67311*FLEN/8, x4, x1, x2) - -inst_22438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f199999; valaddr_reg:x3; val_offset:67314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67314*FLEN/8, x4, x1, x2) - -inst_22439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f249249; valaddr_reg:x3; val_offset:67317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67317*FLEN/8, x4, x1, x2) - -inst_22440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f333333; valaddr_reg:x3; val_offset:67320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67320*FLEN/8, x4, x1, x2) - -inst_22441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:67323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67323*FLEN/8, x4, x1, x2) - -inst_22442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:67326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67326*FLEN/8, x4, x1, x2) - -inst_22443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f444444; valaddr_reg:x3; val_offset:67329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67329*FLEN/8, x4, x1, x2) - -inst_22444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:67332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67332*FLEN/8, x4, x1, x2) - -inst_22445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:67335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67335*FLEN/8, x4, x1, x2) - -inst_22446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f666666; valaddr_reg:x3; val_offset:67338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67338*FLEN/8, x4, x1, x2) - -inst_22447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:67341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67341*FLEN/8, x4, x1, x2) - -inst_22448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:67344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67344*FLEN/8, x4, x1, x2) - -inst_22449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:67347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67347*FLEN/8, x4, x1, x2) - -inst_22450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:67350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67350*FLEN/8, x4, x1, x2) - -inst_22451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71800000; valaddr_reg:x3; val_offset:67353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67353*FLEN/8, x4, x1, x2) - -inst_22452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71800001; valaddr_reg:x3; val_offset:67356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67356*FLEN/8, x4, x1, x2) - -inst_22453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71800003; valaddr_reg:x3; val_offset:67359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67359*FLEN/8, x4, x1, x2) - -inst_22454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71800007; valaddr_reg:x3; val_offset:67362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67362*FLEN/8, x4, x1, x2) - -inst_22455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7180000f; valaddr_reg:x3; val_offset:67365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67365*FLEN/8, x4, x1, x2) - -inst_22456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7180001f; valaddr_reg:x3; val_offset:67368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67368*FLEN/8, x4, x1, x2) - -inst_22457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7180003f; valaddr_reg:x3; val_offset:67371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67371*FLEN/8, x4, x1, x2) - -inst_22458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7180007f; valaddr_reg:x3; val_offset:67374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67374*FLEN/8, x4, x1, x2) - -inst_22459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x718000ff; valaddr_reg:x3; val_offset:67377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67377*FLEN/8, x4, x1, x2) - -inst_22460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x718001ff; valaddr_reg:x3; val_offset:67380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67380*FLEN/8, x4, x1, x2) - -inst_22461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x718003ff; valaddr_reg:x3; val_offset:67383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67383*FLEN/8, x4, x1, x2) - -inst_22462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x718007ff; valaddr_reg:x3; val_offset:67386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67386*FLEN/8, x4, x1, x2) - -inst_22463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71800fff; valaddr_reg:x3; val_offset:67389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67389*FLEN/8, x4, x1, x2) - -inst_22464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71801fff; valaddr_reg:x3; val_offset:67392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67392*FLEN/8, x4, x1, x2) - -inst_22465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71803fff; valaddr_reg:x3; val_offset:67395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67395*FLEN/8, x4, x1, x2) - -inst_22466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71807fff; valaddr_reg:x3; val_offset:67398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67398*FLEN/8, x4, x1, x2) - -inst_22467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7180ffff; valaddr_reg:x3; val_offset:67401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67401*FLEN/8, x4, x1, x2) - -inst_22468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7181ffff; valaddr_reg:x3; val_offset:67404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67404*FLEN/8, x4, x1, x2) - -inst_22469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7183ffff; valaddr_reg:x3; val_offset:67407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67407*FLEN/8, x4, x1, x2) - -inst_22470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7187ffff; valaddr_reg:x3; val_offset:67410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67410*FLEN/8, x4, x1, x2) - -inst_22471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x718fffff; valaddr_reg:x3; val_offset:67413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67413*FLEN/8, x4, x1, x2) - -inst_22472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x719fffff; valaddr_reg:x3; val_offset:67416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67416*FLEN/8, x4, x1, x2) - -inst_22473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71bfffff; valaddr_reg:x3; val_offset:67419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67419*FLEN/8, x4, x1, x2) - -inst_22474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71c00000; valaddr_reg:x3; val_offset:67422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67422*FLEN/8, x4, x1, x2) - -inst_22475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71e00000; valaddr_reg:x3; val_offset:67425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67425*FLEN/8, x4, x1, x2) - -inst_22476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71f00000; valaddr_reg:x3; val_offset:67428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67428*FLEN/8, x4, x1, x2) - -inst_22477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71f80000; valaddr_reg:x3; val_offset:67431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67431*FLEN/8, x4, x1, x2) - -inst_22478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fc0000; valaddr_reg:x3; val_offset:67434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67434*FLEN/8, x4, x1, x2) - -inst_22479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fe0000; valaddr_reg:x3; val_offset:67437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67437*FLEN/8, x4, x1, x2) - -inst_22480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ff0000; valaddr_reg:x3; val_offset:67440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67440*FLEN/8, x4, x1, x2) - -inst_22481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ff8000; valaddr_reg:x3; val_offset:67443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67443*FLEN/8, x4, x1, x2) - -inst_22482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ffc000; valaddr_reg:x3; val_offset:67446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67446*FLEN/8, x4, x1, x2) - -inst_22483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ffe000; valaddr_reg:x3; val_offset:67449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67449*FLEN/8, x4, x1, x2) - -inst_22484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fff000; valaddr_reg:x3; val_offset:67452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67452*FLEN/8, x4, x1, x2) - -inst_22485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fff800; valaddr_reg:x3; val_offset:67455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67455*FLEN/8, x4, x1, x2) - -inst_22486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fffc00; valaddr_reg:x3; val_offset:67458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67458*FLEN/8, x4, x1, x2) - -inst_22487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fffe00; valaddr_reg:x3; val_offset:67461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67461*FLEN/8, x4, x1, x2) - -inst_22488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ffff00; valaddr_reg:x3; val_offset:67464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67464*FLEN/8, x4, x1, x2) - -inst_22489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ffff80; valaddr_reg:x3; val_offset:67467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67467*FLEN/8, x4, x1, x2) - -inst_22490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ffffc0; valaddr_reg:x3; val_offset:67470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67470*FLEN/8, x4, x1, x2) - -inst_22491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ffffe0; valaddr_reg:x3; val_offset:67473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67473*FLEN/8, x4, x1, x2) - -inst_22492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fffff0; valaddr_reg:x3; val_offset:67476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67476*FLEN/8, x4, x1, x2) - -inst_22493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fffff8; valaddr_reg:x3; val_offset:67479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67479*FLEN/8, x4, x1, x2) - -inst_22494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fffffc; valaddr_reg:x3; val_offset:67482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67482*FLEN/8, x4, x1, x2) - -inst_22495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71fffffe; valaddr_reg:x3; val_offset:67485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67485*FLEN/8, x4, x1, x2) - -inst_22496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x71ffffff; valaddr_reg:x3; val_offset:67488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67488*FLEN/8, x4, x1, x2) - -inst_22497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f000001; valaddr_reg:x3; val_offset:67491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67491*FLEN/8, x4, x1, x2) - -inst_22498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f000003; valaddr_reg:x3; val_offset:67494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67494*FLEN/8, x4, x1, x2) - -inst_22499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f000007; valaddr_reg:x3; val_offset:67497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67497*FLEN/8, x4, x1, x2) - -inst_22500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f199999; valaddr_reg:x3; val_offset:67500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67500*FLEN/8, x4, x1, x2) - -inst_22501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f249249; valaddr_reg:x3; val_offset:67503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67503*FLEN/8, x4, x1, x2) - -inst_22502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f333333; valaddr_reg:x3; val_offset:67506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67506*FLEN/8, x4, x1, x2) - -inst_22503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:67509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67509*FLEN/8, x4, x1, x2) - -inst_22504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:67512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67512*FLEN/8, x4, x1, x2) - -inst_22505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f444444; valaddr_reg:x3; val_offset:67515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67515*FLEN/8, x4, x1, x2) - -inst_22506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:67518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67518*FLEN/8, x4, x1, x2) - -inst_22507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:67521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67521*FLEN/8, x4, x1, x2) - -inst_22508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f666666; valaddr_reg:x3; val_offset:67524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67524*FLEN/8, x4, x1, x2) - -inst_22509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:67527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67527*FLEN/8, x4, x1, x2) - -inst_22510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:67530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67530*FLEN/8, x4, x1, x2) - -inst_22511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:67533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67533*FLEN/8, x4, x1, x2) - -inst_22512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:67536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67536*FLEN/8, x4, x1, x2) - -inst_22513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4800000; valaddr_reg:x3; val_offset:67539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67539*FLEN/8, x4, x1, x2) - -inst_22514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4800001; valaddr_reg:x3; val_offset:67542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67542*FLEN/8, x4, x1, x2) - -inst_22515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4800003; valaddr_reg:x3; val_offset:67545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67545*FLEN/8, x4, x1, x2) - -inst_22516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4800007; valaddr_reg:x3; val_offset:67548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67548*FLEN/8, x4, x1, x2) - -inst_22517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa480000f; valaddr_reg:x3; val_offset:67551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67551*FLEN/8, x4, x1, x2) - -inst_22518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa480001f; valaddr_reg:x3; val_offset:67554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67554*FLEN/8, x4, x1, x2) - -inst_22519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa480003f; valaddr_reg:x3; val_offset:67557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67557*FLEN/8, x4, x1, x2) - -inst_22520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa480007f; valaddr_reg:x3; val_offset:67560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67560*FLEN/8, x4, x1, x2) - -inst_22521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa48000ff; valaddr_reg:x3; val_offset:67563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67563*FLEN/8, x4, x1, x2) - -inst_22522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa48001ff; valaddr_reg:x3; val_offset:67566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67566*FLEN/8, x4, x1, x2) - -inst_22523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa48003ff; valaddr_reg:x3; val_offset:67569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67569*FLEN/8, x4, x1, x2) - -inst_22524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa48007ff; valaddr_reg:x3; val_offset:67572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67572*FLEN/8, x4, x1, x2) - -inst_22525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4800fff; valaddr_reg:x3; val_offset:67575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67575*FLEN/8, x4, x1, x2) - -inst_22526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4801fff; valaddr_reg:x3; val_offset:67578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67578*FLEN/8, x4, x1, x2) - -inst_22527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4803fff; valaddr_reg:x3; val_offset:67581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67581*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_177) - -inst_22528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4807fff; valaddr_reg:x3; val_offset:67584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67584*FLEN/8, x4, x1, x2) - -inst_22529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa480ffff; valaddr_reg:x3; val_offset:67587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67587*FLEN/8, x4, x1, x2) - -inst_22530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa481ffff; valaddr_reg:x3; val_offset:67590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67590*FLEN/8, x4, x1, x2) - -inst_22531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa483ffff; valaddr_reg:x3; val_offset:67593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67593*FLEN/8, x4, x1, x2) - -inst_22532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa487ffff; valaddr_reg:x3; val_offset:67596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67596*FLEN/8, x4, x1, x2) - -inst_22533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa48fffff; valaddr_reg:x3; val_offset:67599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67599*FLEN/8, x4, x1, x2) - -inst_22534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa49fffff; valaddr_reg:x3; val_offset:67602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67602*FLEN/8, x4, x1, x2) - -inst_22535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4bfffff; valaddr_reg:x3; val_offset:67605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67605*FLEN/8, x4, x1, x2) - -inst_22536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4c00000; valaddr_reg:x3; val_offset:67608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67608*FLEN/8, x4, x1, x2) - -inst_22537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4e00000; valaddr_reg:x3; val_offset:67611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67611*FLEN/8, x4, x1, x2) - -inst_22538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4f00000; valaddr_reg:x3; val_offset:67614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67614*FLEN/8, x4, x1, x2) - -inst_22539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4f80000; valaddr_reg:x3; val_offset:67617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67617*FLEN/8, x4, x1, x2) - -inst_22540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fc0000; valaddr_reg:x3; val_offset:67620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67620*FLEN/8, x4, x1, x2) - -inst_22541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fe0000; valaddr_reg:x3; val_offset:67623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67623*FLEN/8, x4, x1, x2) - -inst_22542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ff0000; valaddr_reg:x3; val_offset:67626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67626*FLEN/8, x4, x1, x2) - -inst_22543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ff8000; valaddr_reg:x3; val_offset:67629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67629*FLEN/8, x4, x1, x2) - -inst_22544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ffc000; valaddr_reg:x3; val_offset:67632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67632*FLEN/8, x4, x1, x2) - -inst_22545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ffe000; valaddr_reg:x3; val_offset:67635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67635*FLEN/8, x4, x1, x2) - -inst_22546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fff000; valaddr_reg:x3; val_offset:67638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67638*FLEN/8, x4, x1, x2) - -inst_22547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fff800; valaddr_reg:x3; val_offset:67641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67641*FLEN/8, x4, x1, x2) - -inst_22548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fffc00; valaddr_reg:x3; val_offset:67644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67644*FLEN/8, x4, x1, x2) - -inst_22549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fffe00; valaddr_reg:x3; val_offset:67647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67647*FLEN/8, x4, x1, x2) - -inst_22550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ffff00; valaddr_reg:x3; val_offset:67650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67650*FLEN/8, x4, x1, x2) - -inst_22551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ffff80; valaddr_reg:x3; val_offset:67653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67653*FLEN/8, x4, x1, x2) - -inst_22552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ffffc0; valaddr_reg:x3; val_offset:67656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67656*FLEN/8, x4, x1, x2) - -inst_22553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ffffe0; valaddr_reg:x3; val_offset:67659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67659*FLEN/8, x4, x1, x2) - -inst_22554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fffff0; valaddr_reg:x3; val_offset:67662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67662*FLEN/8, x4, x1, x2) - -inst_22555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fffff8; valaddr_reg:x3; val_offset:67665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67665*FLEN/8, x4, x1, x2) - -inst_22556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fffffc; valaddr_reg:x3; val_offset:67668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67668*FLEN/8, x4, x1, x2) - -inst_22557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4fffffe; valaddr_reg:x3; val_offset:67671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67671*FLEN/8, x4, x1, x2) - -inst_22558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xa4ffffff; valaddr_reg:x3; val_offset:67674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67674*FLEN/8, x4, x1, x2) - -inst_22559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbf800001; valaddr_reg:x3; val_offset:67677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67677*FLEN/8, x4, x1, x2) - -inst_22560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbf800003; valaddr_reg:x3; val_offset:67680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67680*FLEN/8, x4, x1, x2) - -inst_22561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbf800007; valaddr_reg:x3; val_offset:67683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67683*FLEN/8, x4, x1, x2) - -inst_22562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbf999999; valaddr_reg:x3; val_offset:67686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67686*FLEN/8, x4, x1, x2) - -inst_22563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:67689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67689*FLEN/8, x4, x1, x2) - -inst_22564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:67692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67692*FLEN/8, x4, x1, x2) - -inst_22565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:67695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67695*FLEN/8, x4, x1, x2) - -inst_22566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:67698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67698*FLEN/8, x4, x1, x2) - -inst_22567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:67701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67701*FLEN/8, x4, x1, x2) - -inst_22568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:67704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67704*FLEN/8, x4, x1, x2) - -inst_22569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:67707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67707*FLEN/8, x4, x1, x2) - -inst_22570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:67710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67710*FLEN/8, x4, x1, x2) - -inst_22571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:67713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67713*FLEN/8, x4, x1, x2) - -inst_22572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:67716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67716*FLEN/8, x4, x1, x2) - -inst_22573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:67719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67719*FLEN/8, x4, x1, x2) - -inst_22574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:67722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67722*FLEN/8, x4, x1, x2) - -inst_22575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8800000; valaddr_reg:x3; val_offset:67725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67725*FLEN/8, x4, x1, x2) - -inst_22576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8800001; valaddr_reg:x3; val_offset:67728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67728*FLEN/8, x4, x1, x2) - -inst_22577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8800003; valaddr_reg:x3; val_offset:67731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67731*FLEN/8, x4, x1, x2) - -inst_22578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8800007; valaddr_reg:x3; val_offset:67734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67734*FLEN/8, x4, x1, x2) - -inst_22579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf880000f; valaddr_reg:x3; val_offset:67737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67737*FLEN/8, x4, x1, x2) - -inst_22580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf880001f; valaddr_reg:x3; val_offset:67740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67740*FLEN/8, x4, x1, x2) - -inst_22581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf880003f; valaddr_reg:x3; val_offset:67743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67743*FLEN/8, x4, x1, x2) - -inst_22582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf880007f; valaddr_reg:x3; val_offset:67746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67746*FLEN/8, x4, x1, x2) - -inst_22583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf88000ff; valaddr_reg:x3; val_offset:67749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67749*FLEN/8, x4, x1, x2) - -inst_22584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf88001ff; valaddr_reg:x3; val_offset:67752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67752*FLEN/8, x4, x1, x2) - -inst_22585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf88003ff; valaddr_reg:x3; val_offset:67755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67755*FLEN/8, x4, x1, x2) - -inst_22586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf88007ff; valaddr_reg:x3; val_offset:67758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67758*FLEN/8, x4, x1, x2) - -inst_22587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8800fff; valaddr_reg:x3; val_offset:67761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67761*FLEN/8, x4, x1, x2) - -inst_22588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8801fff; valaddr_reg:x3; val_offset:67764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67764*FLEN/8, x4, x1, x2) - -inst_22589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8803fff; valaddr_reg:x3; val_offset:67767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67767*FLEN/8, x4, x1, x2) - -inst_22590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8807fff; valaddr_reg:x3; val_offset:67770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67770*FLEN/8, x4, x1, x2) - -inst_22591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf880ffff; valaddr_reg:x3; val_offset:67773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67773*FLEN/8, x4, x1, x2) - -inst_22592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf881ffff; valaddr_reg:x3; val_offset:67776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67776*FLEN/8, x4, x1, x2) - -inst_22593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf883ffff; valaddr_reg:x3; val_offset:67779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67779*FLEN/8, x4, x1, x2) - -inst_22594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf887ffff; valaddr_reg:x3; val_offset:67782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67782*FLEN/8, x4, x1, x2) - -inst_22595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf88fffff; valaddr_reg:x3; val_offset:67785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67785*FLEN/8, x4, x1, x2) - -inst_22596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf89fffff; valaddr_reg:x3; val_offset:67788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67788*FLEN/8, x4, x1, x2) - -inst_22597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8bfffff; valaddr_reg:x3; val_offset:67791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67791*FLEN/8, x4, x1, x2) - -inst_22598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8c00000; valaddr_reg:x3; val_offset:67794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67794*FLEN/8, x4, x1, x2) - -inst_22599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8e00000; valaddr_reg:x3; val_offset:67797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67797*FLEN/8, x4, x1, x2) - -inst_22600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8f00000; valaddr_reg:x3; val_offset:67800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67800*FLEN/8, x4, x1, x2) - -inst_22601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8f80000; valaddr_reg:x3; val_offset:67803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67803*FLEN/8, x4, x1, x2) - -inst_22602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fc0000; valaddr_reg:x3; val_offset:67806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67806*FLEN/8, x4, x1, x2) - -inst_22603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fe0000; valaddr_reg:x3; val_offset:67809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67809*FLEN/8, x4, x1, x2) - -inst_22604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ff0000; valaddr_reg:x3; val_offset:67812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67812*FLEN/8, x4, x1, x2) - -inst_22605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ff8000; valaddr_reg:x3; val_offset:67815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67815*FLEN/8, x4, x1, x2) - -inst_22606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ffc000; valaddr_reg:x3; val_offset:67818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67818*FLEN/8, x4, x1, x2) - -inst_22607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ffe000; valaddr_reg:x3; val_offset:67821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67821*FLEN/8, x4, x1, x2) - -inst_22608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fff000; valaddr_reg:x3; val_offset:67824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67824*FLEN/8, x4, x1, x2) - -inst_22609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fff800; valaddr_reg:x3; val_offset:67827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67827*FLEN/8, x4, x1, x2) - -inst_22610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fffc00; valaddr_reg:x3; val_offset:67830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67830*FLEN/8, x4, x1, x2) - -inst_22611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fffe00; valaddr_reg:x3; val_offset:67833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67833*FLEN/8, x4, x1, x2) - -inst_22612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ffff00; valaddr_reg:x3; val_offset:67836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67836*FLEN/8, x4, x1, x2) - -inst_22613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ffff80; valaddr_reg:x3; val_offset:67839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67839*FLEN/8, x4, x1, x2) - -inst_22614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ffffc0; valaddr_reg:x3; val_offset:67842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67842*FLEN/8, x4, x1, x2) - -inst_22615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ffffe0; valaddr_reg:x3; val_offset:67845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67845*FLEN/8, x4, x1, x2) - -inst_22616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fffff0; valaddr_reg:x3; val_offset:67848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67848*FLEN/8, x4, x1, x2) - -inst_22617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fffff8; valaddr_reg:x3; val_offset:67851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67851*FLEN/8, x4, x1, x2) - -inst_22618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fffffc; valaddr_reg:x3; val_offset:67854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67854*FLEN/8, x4, x1, x2) - -inst_22619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8fffffe; valaddr_reg:x3; val_offset:67857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67857*FLEN/8, x4, x1, x2) - -inst_22620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xf8ffffff; valaddr_reg:x3; val_offset:67860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67860*FLEN/8, x4, x1, x2) - -inst_22621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff000001; valaddr_reg:x3; val_offset:67863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67863*FLEN/8, x4, x1, x2) - -inst_22622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff000003; valaddr_reg:x3; val_offset:67866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67866*FLEN/8, x4, x1, x2) - -inst_22623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff000007; valaddr_reg:x3; val_offset:67869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67869*FLEN/8, x4, x1, x2) - -inst_22624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff199999; valaddr_reg:x3; val_offset:67872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67872*FLEN/8, x4, x1, x2) - -inst_22625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff249249; valaddr_reg:x3; val_offset:67875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67875*FLEN/8, x4, x1, x2) - -inst_22626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff333333; valaddr_reg:x3; val_offset:67878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67878*FLEN/8, x4, x1, x2) - -inst_22627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:67881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67881*FLEN/8, x4, x1, x2) - -inst_22628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:67884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67884*FLEN/8, x4, x1, x2) - -inst_22629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff444444; valaddr_reg:x3; val_offset:67887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67887*FLEN/8, x4, x1, x2) - -inst_22630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:67890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67890*FLEN/8, x4, x1, x2) - -inst_22631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:67893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67893*FLEN/8, x4, x1, x2) - -inst_22632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff666666; valaddr_reg:x3; val_offset:67896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67896*FLEN/8, x4, x1, x2) - -inst_22633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:67899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67899*FLEN/8, x4, x1, x2) - -inst_22634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:67902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67902*FLEN/8, x4, x1, x2) - -inst_22635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:67905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67905*FLEN/8, x4, x1, x2) - -inst_22636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:67908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67908*FLEN/8, x4, x1, x2) - -inst_22637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:67911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67911*FLEN/8, x4, x1, x2) - -inst_22638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:67914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67914*FLEN/8, x4, x1, x2) - -inst_22639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:67917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67917*FLEN/8, x4, x1, x2) - -inst_22640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:67920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67920*FLEN/8, x4, x1, x2) - -inst_22641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:67923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67923*FLEN/8, x4, x1, x2) - -inst_22642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:67926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67926*FLEN/8, x4, x1, x2) - -inst_22643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:67929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67929*FLEN/8, x4, x1, x2) - -inst_22644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:67932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67932*FLEN/8, x4, x1, x2) - -inst_22645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:67935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67935*FLEN/8, x4, x1, x2) - -inst_22646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:67938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67938*FLEN/8, x4, x1, x2) - -inst_22647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:67941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67941*FLEN/8, x4, x1, x2) - -inst_22648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:67944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67944*FLEN/8, x4, x1, x2) - -inst_22649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:67947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67947*FLEN/8, x4, x1, x2) - -inst_22650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:67950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67950*FLEN/8, x4, x1, x2) - -inst_22651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:67953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67953*FLEN/8, x4, x1, x2) - -inst_22652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:67956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67956*FLEN/8, x4, x1, x2) - -inst_22653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f000000; valaddr_reg:x3; val_offset:67959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67959*FLEN/8, x4, x1, x2) - -inst_22654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f000001; valaddr_reg:x3; val_offset:67962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67962*FLEN/8, x4, x1, x2) - -inst_22655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f000003; valaddr_reg:x3; val_offset:67965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67965*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_178) - -inst_22656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f000007; valaddr_reg:x3; val_offset:67968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67968*FLEN/8, x4, x1, x2) - -inst_22657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f00000f; valaddr_reg:x3; val_offset:67971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67971*FLEN/8, x4, x1, x2) - -inst_22658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f00001f; valaddr_reg:x3; val_offset:67974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67974*FLEN/8, x4, x1, x2) - -inst_22659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f00003f; valaddr_reg:x3; val_offset:67977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67977*FLEN/8, x4, x1, x2) - -inst_22660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f00007f; valaddr_reg:x3; val_offset:67980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67980*FLEN/8, x4, x1, x2) - -inst_22661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f0000ff; valaddr_reg:x3; val_offset:67983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67983*FLEN/8, x4, x1, x2) - -inst_22662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f0001ff; valaddr_reg:x3; val_offset:67986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67986*FLEN/8, x4, x1, x2) - -inst_22663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f0003ff; valaddr_reg:x3; val_offset:67989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67989*FLEN/8, x4, x1, x2) - -inst_22664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f0007ff; valaddr_reg:x3; val_offset:67992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67992*FLEN/8, x4, x1, x2) - -inst_22665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f000fff; valaddr_reg:x3; val_offset:67995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67995*FLEN/8, x4, x1, x2) - -inst_22666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f001fff; valaddr_reg:x3; val_offset:67998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67998*FLEN/8, x4, x1, x2) - -inst_22667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f003fff; valaddr_reg:x3; val_offset:68001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68001*FLEN/8, x4, x1, x2) - -inst_22668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f007fff; valaddr_reg:x3; val_offset:68004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68004*FLEN/8, x4, x1, x2) - -inst_22669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f00ffff; valaddr_reg:x3; val_offset:68007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68007*FLEN/8, x4, x1, x2) - -inst_22670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f01ffff; valaddr_reg:x3; val_offset:68010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68010*FLEN/8, x4, x1, x2) - -inst_22671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f03ffff; valaddr_reg:x3; val_offset:68013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68013*FLEN/8, x4, x1, x2) - -inst_22672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f07ffff; valaddr_reg:x3; val_offset:68016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68016*FLEN/8, x4, x1, x2) - -inst_22673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f0fffff; valaddr_reg:x3; val_offset:68019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68019*FLEN/8, x4, x1, x2) - -inst_22674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f1fffff; valaddr_reg:x3; val_offset:68022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68022*FLEN/8, x4, x1, x2) - -inst_22675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f3fffff; valaddr_reg:x3; val_offset:68025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68025*FLEN/8, x4, x1, x2) - -inst_22676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f400000; valaddr_reg:x3; val_offset:68028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68028*FLEN/8, x4, x1, x2) - -inst_22677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f600000; valaddr_reg:x3; val_offset:68031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68031*FLEN/8, x4, x1, x2) - -inst_22678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f700000; valaddr_reg:x3; val_offset:68034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68034*FLEN/8, x4, x1, x2) - -inst_22679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f780000; valaddr_reg:x3; val_offset:68037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68037*FLEN/8, x4, x1, x2) - -inst_22680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7c0000; valaddr_reg:x3; val_offset:68040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68040*FLEN/8, x4, x1, x2) - -inst_22681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7e0000; valaddr_reg:x3; val_offset:68043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68043*FLEN/8, x4, x1, x2) - -inst_22682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7f0000; valaddr_reg:x3; val_offset:68046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68046*FLEN/8, x4, x1, x2) - -inst_22683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7f8000; valaddr_reg:x3; val_offset:68049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68049*FLEN/8, x4, x1, x2) - -inst_22684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7fc000; valaddr_reg:x3; val_offset:68052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68052*FLEN/8, x4, x1, x2) - -inst_22685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7fe000; valaddr_reg:x3; val_offset:68055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68055*FLEN/8, x4, x1, x2) - -inst_22686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7ff000; valaddr_reg:x3; val_offset:68058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68058*FLEN/8, x4, x1, x2) - -inst_22687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7ff800; valaddr_reg:x3; val_offset:68061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68061*FLEN/8, x4, x1, x2) - -inst_22688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:68064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68064*FLEN/8, x4, x1, x2) - -inst_22689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:68067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68067*FLEN/8, x4, x1, x2) - -inst_22690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7fff00; valaddr_reg:x3; val_offset:68070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68070*FLEN/8, x4, x1, x2) - -inst_22691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7fff80; valaddr_reg:x3; val_offset:68073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68073*FLEN/8, x4, x1, x2) - -inst_22692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:68076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68076*FLEN/8, x4, x1, x2) - -inst_22693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:68079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68079*FLEN/8, x4, x1, x2) - -inst_22694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:68082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68082*FLEN/8, x4, x1, x2) - -inst_22695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:68085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68085*FLEN/8, x4, x1, x2) - -inst_22696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:68088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68088*FLEN/8, x4, x1, x2) - -inst_22697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:68091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68091*FLEN/8, x4, x1, x2) - -inst_22698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; -op3val:0x8f7fffff; valaddr_reg:x3; val_offset:68094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68094*FLEN/8, x4, x1, x2) - -inst_22699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:68097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68097*FLEN/8, x4, x1, x2) - -inst_22700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:68100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68100*FLEN/8, x4, x1, x2) - -inst_22701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:68103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68103*FLEN/8, x4, x1, x2) - -inst_22702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:68106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68106*FLEN/8, x4, x1, x2) - -inst_22703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:68109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68109*FLEN/8, x4, x1, x2) - -inst_22704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:68112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68112*FLEN/8, x4, x1, x2) - -inst_22705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:68115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68115*FLEN/8, x4, x1, x2) - -inst_22706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:68118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68118*FLEN/8, x4, x1, x2) - -inst_22707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:68121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68121*FLEN/8, x4, x1, x2) - -inst_22708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:68124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68124*FLEN/8, x4, x1, x2) - -inst_22709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:68127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68127*FLEN/8, x4, x1, x2) - -inst_22710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:68130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68130*FLEN/8, x4, x1, x2) - -inst_22711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:68133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68133*FLEN/8, x4, x1, x2) - -inst_22712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:68136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68136*FLEN/8, x4, x1, x2) - -inst_22713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:68139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68139*FLEN/8, x4, x1, x2) - -inst_22714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:68142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68142*FLEN/8, x4, x1, x2) - -inst_22715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e000000; valaddr_reg:x3; val_offset:68145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68145*FLEN/8, x4, x1, x2) - -inst_22716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e000001; valaddr_reg:x3; val_offset:68148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68148*FLEN/8, x4, x1, x2) - -inst_22717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e000003; valaddr_reg:x3; val_offset:68151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68151*FLEN/8, x4, x1, x2) - -inst_22718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e000007; valaddr_reg:x3; val_offset:68154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68154*FLEN/8, x4, x1, x2) - -inst_22719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e00000f; valaddr_reg:x3; val_offset:68157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68157*FLEN/8, x4, x1, x2) - -inst_22720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e00001f; valaddr_reg:x3; val_offset:68160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68160*FLEN/8, x4, x1, x2) - -inst_22721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e00003f; valaddr_reg:x3; val_offset:68163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68163*FLEN/8, x4, x1, x2) - -inst_22722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e00007f; valaddr_reg:x3; val_offset:68166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68166*FLEN/8, x4, x1, x2) - -inst_22723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e0000ff; valaddr_reg:x3; val_offset:68169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68169*FLEN/8, x4, x1, x2) - -inst_22724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e0001ff; valaddr_reg:x3; val_offset:68172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68172*FLEN/8, x4, x1, x2) - -inst_22725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e0003ff; valaddr_reg:x3; val_offset:68175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68175*FLEN/8, x4, x1, x2) - -inst_22726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e0007ff; valaddr_reg:x3; val_offset:68178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68178*FLEN/8, x4, x1, x2) - -inst_22727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e000fff; valaddr_reg:x3; val_offset:68181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68181*FLEN/8, x4, x1, x2) - -inst_22728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e001fff; valaddr_reg:x3; val_offset:68184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68184*FLEN/8, x4, x1, x2) - -inst_22729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e003fff; valaddr_reg:x3; val_offset:68187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68187*FLEN/8, x4, x1, x2) - -inst_22730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e007fff; valaddr_reg:x3; val_offset:68190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68190*FLEN/8, x4, x1, x2) - -inst_22731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e00ffff; valaddr_reg:x3; val_offset:68193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68193*FLEN/8, x4, x1, x2) - -inst_22732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e01ffff; valaddr_reg:x3; val_offset:68196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68196*FLEN/8, x4, x1, x2) - -inst_22733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e03ffff; valaddr_reg:x3; val_offset:68199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68199*FLEN/8, x4, x1, x2) - -inst_22734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e07ffff; valaddr_reg:x3; val_offset:68202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68202*FLEN/8, x4, x1, x2) - -inst_22735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e0fffff; valaddr_reg:x3; val_offset:68205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68205*FLEN/8, x4, x1, x2) - -inst_22736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e1fffff; valaddr_reg:x3; val_offset:68208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68208*FLEN/8, x4, x1, x2) - -inst_22737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e3fffff; valaddr_reg:x3; val_offset:68211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68211*FLEN/8, x4, x1, x2) - -inst_22738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e400000; valaddr_reg:x3; val_offset:68214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68214*FLEN/8, x4, x1, x2) - -inst_22739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e600000; valaddr_reg:x3; val_offset:68217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68217*FLEN/8, x4, x1, x2) - -inst_22740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e700000; valaddr_reg:x3; val_offset:68220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68220*FLEN/8, x4, x1, x2) - -inst_22741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e780000; valaddr_reg:x3; val_offset:68223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68223*FLEN/8, x4, x1, x2) - -inst_22742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7c0000; valaddr_reg:x3; val_offset:68226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68226*FLEN/8, x4, x1, x2) - -inst_22743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7e0000; valaddr_reg:x3; val_offset:68229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68229*FLEN/8, x4, x1, x2) - -inst_22744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7f0000; valaddr_reg:x3; val_offset:68232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68232*FLEN/8, x4, x1, x2) - -inst_22745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7f8000; valaddr_reg:x3; val_offset:68235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68235*FLEN/8, x4, x1, x2) - -inst_22746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7fc000; valaddr_reg:x3; val_offset:68238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68238*FLEN/8, x4, x1, x2) - -inst_22747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7fe000; valaddr_reg:x3; val_offset:68241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68241*FLEN/8, x4, x1, x2) - -inst_22748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7ff000; valaddr_reg:x3; val_offset:68244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68244*FLEN/8, x4, x1, x2) - -inst_22749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7ff800; valaddr_reg:x3; val_offset:68247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68247*FLEN/8, x4, x1, x2) - -inst_22750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:68250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68250*FLEN/8, x4, x1, x2) - -inst_22751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:68253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68253*FLEN/8, x4, x1, x2) - -inst_22752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7fff00; valaddr_reg:x3; val_offset:68256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68256*FLEN/8, x4, x1, x2) - -inst_22753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7fff80; valaddr_reg:x3; val_offset:68259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68259*FLEN/8, x4, x1, x2) - -inst_22754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:68262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68262*FLEN/8, x4, x1, x2) - -inst_22755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:68265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68265*FLEN/8, x4, x1, x2) - -inst_22756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:68268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68268*FLEN/8, x4, x1, x2) - -inst_22757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:68271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68271*FLEN/8, x4, x1, x2) - -inst_22758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:68274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68274*FLEN/8, x4, x1, x2) - -inst_22759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:68277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68277*FLEN/8, x4, x1, x2) - -inst_22760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; -op3val:0x8e7fffff; valaddr_reg:x3; val_offset:68280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68280*FLEN/8, x4, x1, x2) - -inst_22761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3f800001; valaddr_reg:x3; val_offset:68283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68283*FLEN/8, x4, x1, x2) - -inst_22762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3f800003; valaddr_reg:x3; val_offset:68286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68286*FLEN/8, x4, x1, x2) - -inst_22763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3f800007; valaddr_reg:x3; val_offset:68289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68289*FLEN/8, x4, x1, x2) - -inst_22764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3f999999; valaddr_reg:x3; val_offset:68292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68292*FLEN/8, x4, x1, x2) - -inst_22765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:68295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68295*FLEN/8, x4, x1, x2) - -inst_22766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:68298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68298*FLEN/8, x4, x1, x2) - -inst_22767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:68301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68301*FLEN/8, x4, x1, x2) - -inst_22768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:68304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68304*FLEN/8, x4, x1, x2) - -inst_22769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:68307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68307*FLEN/8, x4, x1, x2) - -inst_22770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:68310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68310*FLEN/8, x4, x1, x2) - -inst_22771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:68313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68313*FLEN/8, x4, x1, x2) - -inst_22772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:68316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68316*FLEN/8, x4, x1, x2) - -inst_22773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:68319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68319*FLEN/8, x4, x1, x2) - -inst_22774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:68322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68322*FLEN/8, x4, x1, x2) - -inst_22775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:68325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68325*FLEN/8, x4, x1, x2) - -inst_22776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:68328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68328*FLEN/8, x4, x1, x2) - -inst_22777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40800000; valaddr_reg:x3; val_offset:68331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68331*FLEN/8, x4, x1, x2) - -inst_22778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40800001; valaddr_reg:x3; val_offset:68334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68334*FLEN/8, x4, x1, x2) - -inst_22779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40800003; valaddr_reg:x3; val_offset:68337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68337*FLEN/8, x4, x1, x2) - -inst_22780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40800007; valaddr_reg:x3; val_offset:68340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68340*FLEN/8, x4, x1, x2) - -inst_22781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x4080000f; valaddr_reg:x3; val_offset:68343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68343*FLEN/8, x4, x1, x2) - -inst_22782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x4080001f; valaddr_reg:x3; val_offset:68346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68346*FLEN/8, x4, x1, x2) - -inst_22783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x4080003f; valaddr_reg:x3; val_offset:68349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68349*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_179) - -inst_22784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x4080007f; valaddr_reg:x3; val_offset:68352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68352*FLEN/8, x4, x1, x2) - -inst_22785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x408000ff; valaddr_reg:x3; val_offset:68355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68355*FLEN/8, x4, x1, x2) - -inst_22786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x408001ff; valaddr_reg:x3; val_offset:68358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68358*FLEN/8, x4, x1, x2) - -inst_22787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x408003ff; valaddr_reg:x3; val_offset:68361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68361*FLEN/8, x4, x1, x2) - -inst_22788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x408007ff; valaddr_reg:x3; val_offset:68364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68364*FLEN/8, x4, x1, x2) - -inst_22789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40800fff; valaddr_reg:x3; val_offset:68367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68367*FLEN/8, x4, x1, x2) - -inst_22790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40801fff; valaddr_reg:x3; val_offset:68370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68370*FLEN/8, x4, x1, x2) - -inst_22791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40803fff; valaddr_reg:x3; val_offset:68373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68373*FLEN/8, x4, x1, x2) - -inst_22792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40807fff; valaddr_reg:x3; val_offset:68376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68376*FLEN/8, x4, x1, x2) - -inst_22793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x4080ffff; valaddr_reg:x3; val_offset:68379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68379*FLEN/8, x4, x1, x2) - -inst_22794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x4081ffff; valaddr_reg:x3; val_offset:68382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68382*FLEN/8, x4, x1, x2) - -inst_22795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x4083ffff; valaddr_reg:x3; val_offset:68385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68385*FLEN/8, x4, x1, x2) - -inst_22796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x4087ffff; valaddr_reg:x3; val_offset:68388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68388*FLEN/8, x4, x1, x2) - -inst_22797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x408fffff; valaddr_reg:x3; val_offset:68391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68391*FLEN/8, x4, x1, x2) - -inst_22798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x409fffff; valaddr_reg:x3; val_offset:68394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68394*FLEN/8, x4, x1, x2) - -inst_22799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40bfffff; valaddr_reg:x3; val_offset:68397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68397*FLEN/8, x4, x1, x2) - -inst_22800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40c00000; valaddr_reg:x3; val_offset:68400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68400*FLEN/8, x4, x1, x2) - -inst_22801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40e00000; valaddr_reg:x3; val_offset:68403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68403*FLEN/8, x4, x1, x2) - -inst_22802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40f00000; valaddr_reg:x3; val_offset:68406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68406*FLEN/8, x4, x1, x2) - -inst_22803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40f80000; valaddr_reg:x3; val_offset:68409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68409*FLEN/8, x4, x1, x2) - -inst_22804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fc0000; valaddr_reg:x3; val_offset:68412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68412*FLEN/8, x4, x1, x2) - -inst_22805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fe0000; valaddr_reg:x3; val_offset:68415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68415*FLEN/8, x4, x1, x2) - -inst_22806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ff0000; valaddr_reg:x3; val_offset:68418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68418*FLEN/8, x4, x1, x2) - -inst_22807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ff8000; valaddr_reg:x3; val_offset:68421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68421*FLEN/8, x4, x1, x2) - -inst_22808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ffc000; valaddr_reg:x3; val_offset:68424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68424*FLEN/8, x4, x1, x2) - -inst_22809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ffe000; valaddr_reg:x3; val_offset:68427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68427*FLEN/8, x4, x1, x2) - -inst_22810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fff000; valaddr_reg:x3; val_offset:68430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68430*FLEN/8, x4, x1, x2) - -inst_22811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fff800; valaddr_reg:x3; val_offset:68433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68433*FLEN/8, x4, x1, x2) - -inst_22812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fffc00; valaddr_reg:x3; val_offset:68436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68436*FLEN/8, x4, x1, x2) - -inst_22813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fffe00; valaddr_reg:x3; val_offset:68439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68439*FLEN/8, x4, x1, x2) - -inst_22814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ffff00; valaddr_reg:x3; val_offset:68442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68442*FLEN/8, x4, x1, x2) - -inst_22815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ffff80; valaddr_reg:x3; val_offset:68445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68445*FLEN/8, x4, x1, x2) - -inst_22816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ffffc0; valaddr_reg:x3; val_offset:68448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68448*FLEN/8, x4, x1, x2) - -inst_22817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ffffe0; valaddr_reg:x3; val_offset:68451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68451*FLEN/8, x4, x1, x2) - -inst_22818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fffff0; valaddr_reg:x3; val_offset:68454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68454*FLEN/8, x4, x1, x2) - -inst_22819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fffff8; valaddr_reg:x3; val_offset:68457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68457*FLEN/8, x4, x1, x2) - -inst_22820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fffffc; valaddr_reg:x3; val_offset:68460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68460*FLEN/8, x4, x1, x2) - -inst_22821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40fffffe; valaddr_reg:x3; val_offset:68463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68463*FLEN/8, x4, x1, x2) - -inst_22822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; -op3val:0x40ffffff; valaddr_reg:x3; val_offset:68466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68466*FLEN/8, x4, x1, x2) - -inst_22823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65800000; valaddr_reg:x3; val_offset:68469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68469*FLEN/8, x4, x1, x2) - -inst_22824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65800001; valaddr_reg:x3; val_offset:68472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68472*FLEN/8, x4, x1, x2) - -inst_22825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65800003; valaddr_reg:x3; val_offset:68475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68475*FLEN/8, x4, x1, x2) - -inst_22826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65800007; valaddr_reg:x3; val_offset:68478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68478*FLEN/8, x4, x1, x2) - -inst_22827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x6580000f; valaddr_reg:x3; val_offset:68481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68481*FLEN/8, x4, x1, x2) - -inst_22828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x6580001f; valaddr_reg:x3; val_offset:68484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68484*FLEN/8, x4, x1, x2) - -inst_22829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x6580003f; valaddr_reg:x3; val_offset:68487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68487*FLEN/8, x4, x1, x2) - -inst_22830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x6580007f; valaddr_reg:x3; val_offset:68490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68490*FLEN/8, x4, x1, x2) - -inst_22831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x658000ff; valaddr_reg:x3; val_offset:68493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68493*FLEN/8, x4, x1, x2) - -inst_22832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x658001ff; valaddr_reg:x3; val_offset:68496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68496*FLEN/8, x4, x1, x2) - -inst_22833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x658003ff; valaddr_reg:x3; val_offset:68499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68499*FLEN/8, x4, x1, x2) - -inst_22834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x658007ff; valaddr_reg:x3; val_offset:68502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68502*FLEN/8, x4, x1, x2) - -inst_22835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65800fff; valaddr_reg:x3; val_offset:68505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68505*FLEN/8, x4, x1, x2) - -inst_22836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65801fff; valaddr_reg:x3; val_offset:68508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68508*FLEN/8, x4, x1, x2) - -inst_22837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65803fff; valaddr_reg:x3; val_offset:68511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68511*FLEN/8, x4, x1, x2) - -inst_22838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65807fff; valaddr_reg:x3; val_offset:68514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68514*FLEN/8, x4, x1, x2) - -inst_22839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x6580ffff; valaddr_reg:x3; val_offset:68517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68517*FLEN/8, x4, x1, x2) - -inst_22840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x6581ffff; valaddr_reg:x3; val_offset:68520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68520*FLEN/8, x4, x1, x2) - -inst_22841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x6583ffff; valaddr_reg:x3; val_offset:68523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68523*FLEN/8, x4, x1, x2) - -inst_22842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x6587ffff; valaddr_reg:x3; val_offset:68526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68526*FLEN/8, x4, x1, x2) - -inst_22843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x658fffff; valaddr_reg:x3; val_offset:68529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68529*FLEN/8, x4, x1, x2) - -inst_22844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x659fffff; valaddr_reg:x3; val_offset:68532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68532*FLEN/8, x4, x1, x2) - -inst_22845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65bfffff; valaddr_reg:x3; val_offset:68535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68535*FLEN/8, x4, x1, x2) - -inst_22846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65c00000; valaddr_reg:x3; val_offset:68538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68538*FLEN/8, x4, x1, x2) - -inst_22847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65e00000; valaddr_reg:x3; val_offset:68541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68541*FLEN/8, x4, x1, x2) - -inst_22848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65f00000; valaddr_reg:x3; val_offset:68544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68544*FLEN/8, x4, x1, x2) - -inst_22849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65f80000; valaddr_reg:x3; val_offset:68547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68547*FLEN/8, x4, x1, x2) - -inst_22850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fc0000; valaddr_reg:x3; val_offset:68550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68550*FLEN/8, x4, x1, x2) - -inst_22851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fe0000; valaddr_reg:x3; val_offset:68553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68553*FLEN/8, x4, x1, x2) - -inst_22852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ff0000; valaddr_reg:x3; val_offset:68556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68556*FLEN/8, x4, x1, x2) - -inst_22853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ff8000; valaddr_reg:x3; val_offset:68559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68559*FLEN/8, x4, x1, x2) - -inst_22854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ffc000; valaddr_reg:x3; val_offset:68562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68562*FLEN/8, x4, x1, x2) - -inst_22855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ffe000; valaddr_reg:x3; val_offset:68565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68565*FLEN/8, x4, x1, x2) - -inst_22856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fff000; valaddr_reg:x3; val_offset:68568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68568*FLEN/8, x4, x1, x2) - -inst_22857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fff800; valaddr_reg:x3; val_offset:68571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68571*FLEN/8, x4, x1, x2) - -inst_22858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fffc00; valaddr_reg:x3; val_offset:68574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68574*FLEN/8, x4, x1, x2) - -inst_22859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fffe00; valaddr_reg:x3; val_offset:68577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68577*FLEN/8, x4, x1, x2) - -inst_22860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ffff00; valaddr_reg:x3; val_offset:68580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68580*FLEN/8, x4, x1, x2) - -inst_22861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ffff80; valaddr_reg:x3; val_offset:68583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68583*FLEN/8, x4, x1, x2) - -inst_22862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ffffc0; valaddr_reg:x3; val_offset:68586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68586*FLEN/8, x4, x1, x2) - -inst_22863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ffffe0; valaddr_reg:x3; val_offset:68589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68589*FLEN/8, x4, x1, x2) - -inst_22864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fffff0; valaddr_reg:x3; val_offset:68592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68592*FLEN/8, x4, x1, x2) - -inst_22865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fffff8; valaddr_reg:x3; val_offset:68595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68595*FLEN/8, x4, x1, x2) - -inst_22866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fffffc; valaddr_reg:x3; val_offset:68598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68598*FLEN/8, x4, x1, x2) - -inst_22867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65fffffe; valaddr_reg:x3; val_offset:68601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68601*FLEN/8, x4, x1, x2) - -inst_22868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x65ffffff; valaddr_reg:x3; val_offset:68604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68604*FLEN/8, x4, x1, x2) - -inst_22869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f000001; valaddr_reg:x3; val_offset:68607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68607*FLEN/8, x4, x1, x2) - -inst_22870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f000003; valaddr_reg:x3; val_offset:68610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68610*FLEN/8, x4, x1, x2) - -inst_22871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f000007; valaddr_reg:x3; val_offset:68613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68613*FLEN/8, x4, x1, x2) - -inst_22872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f199999; valaddr_reg:x3; val_offset:68616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68616*FLEN/8, x4, x1, x2) - -inst_22873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f249249; valaddr_reg:x3; val_offset:68619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68619*FLEN/8, x4, x1, x2) - -inst_22874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f333333; valaddr_reg:x3; val_offset:68622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68622*FLEN/8, x4, x1, x2) - -inst_22875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:68625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68625*FLEN/8, x4, x1, x2) - -inst_22876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:68628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68628*FLEN/8, x4, x1, x2) - -inst_22877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f444444; valaddr_reg:x3; val_offset:68631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68631*FLEN/8, x4, x1, x2) - -inst_22878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:68634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68634*FLEN/8, x4, x1, x2) - -inst_22879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:68637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68637*FLEN/8, x4, x1, x2) - -inst_22880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f666666; valaddr_reg:x3; val_offset:68640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68640*FLEN/8, x4, x1, x2) - -inst_22881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:68643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68643*FLEN/8, x4, x1, x2) - -inst_22882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:68646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68646*FLEN/8, x4, x1, x2) - -inst_22883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:68649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68649*FLEN/8, x4, x1, x2) - -inst_22884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:68652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68652*FLEN/8, x4, x1, x2) - -inst_22885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:68655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68655*FLEN/8, x4, x1, x2) - -inst_22886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:68658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68658*FLEN/8, x4, x1, x2) - -inst_22887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:68661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68661*FLEN/8, x4, x1, x2) - -inst_22888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:68664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68664*FLEN/8, x4, x1, x2) - -inst_22889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:68667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68667*FLEN/8, x4, x1, x2) - -inst_22890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:68670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68670*FLEN/8, x4, x1, x2) - -inst_22891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:68673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68673*FLEN/8, x4, x1, x2) - -inst_22892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:68676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68676*FLEN/8, x4, x1, x2) - -inst_22893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:68679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68679*FLEN/8, x4, x1, x2) - -inst_22894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:68682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68682*FLEN/8, x4, x1, x2) - -inst_22895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:68685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68685*FLEN/8, x4, x1, x2) - -inst_22896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:68688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68688*FLEN/8, x4, x1, x2) - -inst_22897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:68691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68691*FLEN/8, x4, x1, x2) - -inst_22898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:68694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68694*FLEN/8, x4, x1, x2) - -inst_22899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:68697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68697*FLEN/8, x4, x1, x2) - -inst_22900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:68700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68700*FLEN/8, x4, x1, x2) - -inst_22901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82800000; valaddr_reg:x3; val_offset:68703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68703*FLEN/8, x4, x1, x2) - -inst_22902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82800001; valaddr_reg:x3; val_offset:68706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68706*FLEN/8, x4, x1, x2) - -inst_22903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82800003; valaddr_reg:x3; val_offset:68709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68709*FLEN/8, x4, x1, x2) - -inst_22904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82800007; valaddr_reg:x3; val_offset:68712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68712*FLEN/8, x4, x1, x2) - -inst_22905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8280000f; valaddr_reg:x3; val_offset:68715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68715*FLEN/8, x4, x1, x2) - -inst_22906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8280001f; valaddr_reg:x3; val_offset:68718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68718*FLEN/8, x4, x1, x2) - -inst_22907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8280003f; valaddr_reg:x3; val_offset:68721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68721*FLEN/8, x4, x1, x2) - -inst_22908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8280007f; valaddr_reg:x3; val_offset:68724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68724*FLEN/8, x4, x1, x2) - -inst_22909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x828000ff; valaddr_reg:x3; val_offset:68727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68727*FLEN/8, x4, x1, x2) - -inst_22910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x828001ff; valaddr_reg:x3; val_offset:68730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68730*FLEN/8, x4, x1, x2) - -inst_22911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x828003ff; valaddr_reg:x3; val_offset:68733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68733*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_180) - -inst_22912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x828007ff; valaddr_reg:x3; val_offset:68736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68736*FLEN/8, x4, x1, x2) - -inst_22913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82800fff; valaddr_reg:x3; val_offset:68739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68739*FLEN/8, x4, x1, x2) - -inst_22914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82801fff; valaddr_reg:x3; val_offset:68742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68742*FLEN/8, x4, x1, x2) - -inst_22915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82803fff; valaddr_reg:x3; val_offset:68745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68745*FLEN/8, x4, x1, x2) - -inst_22916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82807fff; valaddr_reg:x3; val_offset:68748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68748*FLEN/8, x4, x1, x2) - -inst_22917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8280ffff; valaddr_reg:x3; val_offset:68751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68751*FLEN/8, x4, x1, x2) - -inst_22918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8281ffff; valaddr_reg:x3; val_offset:68754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68754*FLEN/8, x4, x1, x2) - -inst_22919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8283ffff; valaddr_reg:x3; val_offset:68757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68757*FLEN/8, x4, x1, x2) - -inst_22920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x8287ffff; valaddr_reg:x3; val_offset:68760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68760*FLEN/8, x4, x1, x2) - -inst_22921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x828fffff; valaddr_reg:x3; val_offset:68763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68763*FLEN/8, x4, x1, x2) - -inst_22922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x829fffff; valaddr_reg:x3; val_offset:68766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68766*FLEN/8, x4, x1, x2) - -inst_22923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82bfffff; valaddr_reg:x3; val_offset:68769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68769*FLEN/8, x4, x1, x2) - -inst_22924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82c00000; valaddr_reg:x3; val_offset:68772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68772*FLEN/8, x4, x1, x2) - -inst_22925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82e00000; valaddr_reg:x3; val_offset:68775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68775*FLEN/8, x4, x1, x2) - -inst_22926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82f00000; valaddr_reg:x3; val_offset:68778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68778*FLEN/8, x4, x1, x2) - -inst_22927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82f80000; valaddr_reg:x3; val_offset:68781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68781*FLEN/8, x4, x1, x2) - -inst_22928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fc0000; valaddr_reg:x3; val_offset:68784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68784*FLEN/8, x4, x1, x2) - -inst_22929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fe0000; valaddr_reg:x3; val_offset:68787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68787*FLEN/8, x4, x1, x2) - -inst_22930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ff0000; valaddr_reg:x3; val_offset:68790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68790*FLEN/8, x4, x1, x2) - -inst_22931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ff8000; valaddr_reg:x3; val_offset:68793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68793*FLEN/8, x4, x1, x2) - -inst_22932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ffc000; valaddr_reg:x3; val_offset:68796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68796*FLEN/8, x4, x1, x2) - -inst_22933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ffe000; valaddr_reg:x3; val_offset:68799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68799*FLEN/8, x4, x1, x2) - -inst_22934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fff000; valaddr_reg:x3; val_offset:68802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68802*FLEN/8, x4, x1, x2) - -inst_22935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fff800; valaddr_reg:x3; val_offset:68805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68805*FLEN/8, x4, x1, x2) - -inst_22936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fffc00; valaddr_reg:x3; val_offset:68808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68808*FLEN/8, x4, x1, x2) - -inst_22937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fffe00; valaddr_reg:x3; val_offset:68811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68811*FLEN/8, x4, x1, x2) - -inst_22938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ffff00; valaddr_reg:x3; val_offset:68814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68814*FLEN/8, x4, x1, x2) - -inst_22939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ffff80; valaddr_reg:x3; val_offset:68817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68817*FLEN/8, x4, x1, x2) - -inst_22940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ffffc0; valaddr_reg:x3; val_offset:68820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68820*FLEN/8, x4, x1, x2) - -inst_22941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ffffe0; valaddr_reg:x3; val_offset:68823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68823*FLEN/8, x4, x1, x2) - -inst_22942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fffff0; valaddr_reg:x3; val_offset:68826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68826*FLEN/8, x4, x1, x2) - -inst_22943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fffff8; valaddr_reg:x3; val_offset:68829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68829*FLEN/8, x4, x1, x2) - -inst_22944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fffffc; valaddr_reg:x3; val_offset:68832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68832*FLEN/8, x4, x1, x2) - -inst_22945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82fffffe; valaddr_reg:x3; val_offset:68835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68835*FLEN/8, x4, x1, x2) - -inst_22946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; -op3val:0x82ffffff; valaddr_reg:x3; val_offset:68838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68838*FLEN/8, x4, x1, x2) - -inst_22947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78800000; valaddr_reg:x3; val_offset:68841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68841*FLEN/8, x4, x1, x2) - -inst_22948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78800001; valaddr_reg:x3; val_offset:68844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68844*FLEN/8, x4, x1, x2) - -inst_22949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78800003; valaddr_reg:x3; val_offset:68847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68847*FLEN/8, x4, x1, x2) - -inst_22950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78800007; valaddr_reg:x3; val_offset:68850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68850*FLEN/8, x4, x1, x2) - -inst_22951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7880000f; valaddr_reg:x3; val_offset:68853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68853*FLEN/8, x4, x1, x2) - -inst_22952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7880001f; valaddr_reg:x3; val_offset:68856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68856*FLEN/8, x4, x1, x2) - -inst_22953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7880003f; valaddr_reg:x3; val_offset:68859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68859*FLEN/8, x4, x1, x2) - -inst_22954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7880007f; valaddr_reg:x3; val_offset:68862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68862*FLEN/8, x4, x1, x2) - -inst_22955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x788000ff; valaddr_reg:x3; val_offset:68865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68865*FLEN/8, x4, x1, x2) - -inst_22956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x788001ff; valaddr_reg:x3; val_offset:68868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68868*FLEN/8, x4, x1, x2) - -inst_22957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x788003ff; valaddr_reg:x3; val_offset:68871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68871*FLEN/8, x4, x1, x2) - -inst_22958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x788007ff; valaddr_reg:x3; val_offset:68874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68874*FLEN/8, x4, x1, x2) - -inst_22959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78800fff; valaddr_reg:x3; val_offset:68877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68877*FLEN/8, x4, x1, x2) - -inst_22960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78801fff; valaddr_reg:x3; val_offset:68880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68880*FLEN/8, x4, x1, x2) - -inst_22961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78803fff; valaddr_reg:x3; val_offset:68883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68883*FLEN/8, x4, x1, x2) - -inst_22962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78807fff; valaddr_reg:x3; val_offset:68886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68886*FLEN/8, x4, x1, x2) - -inst_22963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7880ffff; valaddr_reg:x3; val_offset:68889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68889*FLEN/8, x4, x1, x2) - -inst_22964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7881ffff; valaddr_reg:x3; val_offset:68892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68892*FLEN/8, x4, x1, x2) - -inst_22965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7883ffff; valaddr_reg:x3; val_offset:68895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68895*FLEN/8, x4, x1, x2) - -inst_22966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7887ffff; valaddr_reg:x3; val_offset:68898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68898*FLEN/8, x4, x1, x2) - -inst_22967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x788fffff; valaddr_reg:x3; val_offset:68901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68901*FLEN/8, x4, x1, x2) - -inst_22968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x789fffff; valaddr_reg:x3; val_offset:68904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68904*FLEN/8, x4, x1, x2) - -inst_22969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78bfffff; valaddr_reg:x3; val_offset:68907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68907*FLEN/8, x4, x1, x2) - -inst_22970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78c00000; valaddr_reg:x3; val_offset:68910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68910*FLEN/8, x4, x1, x2) - -inst_22971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78e00000; valaddr_reg:x3; val_offset:68913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68913*FLEN/8, x4, x1, x2) - -inst_22972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78f00000; valaddr_reg:x3; val_offset:68916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68916*FLEN/8, x4, x1, x2) - -inst_22973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78f80000; valaddr_reg:x3; val_offset:68919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68919*FLEN/8, x4, x1, x2) - -inst_22974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fc0000; valaddr_reg:x3; val_offset:68922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68922*FLEN/8, x4, x1, x2) - -inst_22975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fe0000; valaddr_reg:x3; val_offset:68925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68925*FLEN/8, x4, x1, x2) - -inst_22976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ff0000; valaddr_reg:x3; val_offset:68928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68928*FLEN/8, x4, x1, x2) - -inst_22977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ff8000; valaddr_reg:x3; val_offset:68931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68931*FLEN/8, x4, x1, x2) - -inst_22978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ffc000; valaddr_reg:x3; val_offset:68934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68934*FLEN/8, x4, x1, x2) - -inst_22979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ffe000; valaddr_reg:x3; val_offset:68937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68937*FLEN/8, x4, x1, x2) - -inst_22980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fff000; valaddr_reg:x3; val_offset:68940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68940*FLEN/8, x4, x1, x2) - -inst_22981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fff800; valaddr_reg:x3; val_offset:68943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68943*FLEN/8, x4, x1, x2) - -inst_22982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fffc00; valaddr_reg:x3; val_offset:68946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68946*FLEN/8, x4, x1, x2) - -inst_22983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fffe00; valaddr_reg:x3; val_offset:68949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68949*FLEN/8, x4, x1, x2) - -inst_22984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ffff00; valaddr_reg:x3; val_offset:68952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68952*FLEN/8, x4, x1, x2) - -inst_22985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ffff80; valaddr_reg:x3; val_offset:68955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68955*FLEN/8, x4, x1, x2) - -inst_22986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ffffc0; valaddr_reg:x3; val_offset:68958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68958*FLEN/8, x4, x1, x2) - -inst_22987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ffffe0; valaddr_reg:x3; val_offset:68961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68961*FLEN/8, x4, x1, x2) - -inst_22988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fffff0; valaddr_reg:x3; val_offset:68964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68964*FLEN/8, x4, x1, x2) - -inst_22989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fffff8; valaddr_reg:x3; val_offset:68967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68967*FLEN/8, x4, x1, x2) - -inst_22990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fffffc; valaddr_reg:x3; val_offset:68970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68970*FLEN/8, x4, x1, x2) - -inst_22991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78fffffe; valaddr_reg:x3; val_offset:68973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68973*FLEN/8, x4, x1, x2) - -inst_22992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x78ffffff; valaddr_reg:x3; val_offset:68976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68976*FLEN/8, x4, x1, x2) - -inst_22993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f000001; valaddr_reg:x3; val_offset:68979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68979*FLEN/8, x4, x1, x2) - -inst_22994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f000003; valaddr_reg:x3; val_offset:68982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68982*FLEN/8, x4, x1, x2) - -inst_22995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f000007; valaddr_reg:x3; val_offset:68985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68985*FLEN/8, x4, x1, x2) - -inst_22996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f199999; valaddr_reg:x3; val_offset:68988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68988*FLEN/8, x4, x1, x2) - -inst_22997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f249249; valaddr_reg:x3; val_offset:68991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68991*FLEN/8, x4, x1, x2) - -inst_22998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f333333; valaddr_reg:x3; val_offset:68994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68994*FLEN/8, x4, x1, x2) - -inst_22999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:68997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68997*FLEN/8, x4, x1, x2) - -inst_23000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:69000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69000*FLEN/8, x4, x1, x2) - -inst_23001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f444444; valaddr_reg:x3; val_offset:69003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69003*FLEN/8, x4, x1, x2) - -inst_23002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:69006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69006*FLEN/8, x4, x1, x2) - -inst_23003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:69009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69009*FLEN/8, x4, x1, x2) - -inst_23004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f666666; valaddr_reg:x3; val_offset:69012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69012*FLEN/8, x4, x1, x2) - -inst_23005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:69015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69015*FLEN/8, x4, x1, x2) - -inst_23006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:69018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69018*FLEN/8, x4, x1, x2) - -inst_23007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:69021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69021*FLEN/8, x4, x1, x2) - -inst_23008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:69024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69024*FLEN/8, x4, x1, x2) - -inst_23009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:69027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69027*FLEN/8, x4, x1, x2) - -inst_23010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:69030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69030*FLEN/8, x4, x1, x2) - -inst_23011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:69033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69033*FLEN/8, x4, x1, x2) - -inst_23012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:69036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69036*FLEN/8, x4, x1, x2) - -inst_23013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:69039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69039*FLEN/8, x4, x1, x2) - -inst_23014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:69042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69042*FLEN/8, x4, x1, x2) - -inst_23015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:69045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69045*FLEN/8, x4, x1, x2) - -inst_23016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:69048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69048*FLEN/8, x4, x1, x2) - -inst_23017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:69051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69051*FLEN/8, x4, x1, x2) - -inst_23018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:69054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69054*FLEN/8, x4, x1, x2) - -inst_23019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:69057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69057*FLEN/8, x4, x1, x2) - -inst_23020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:69060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69060*FLEN/8, x4, x1, x2) - -inst_23021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:69063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69063*FLEN/8, x4, x1, x2) - -inst_23022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:69066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69066*FLEN/8, x4, x1, x2) - -inst_23023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:69069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69069*FLEN/8, x4, x1, x2) - -inst_23024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:69072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69072*FLEN/8, x4, x1, x2) - -inst_23025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8000000; valaddr_reg:x3; val_offset:69075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69075*FLEN/8, x4, x1, x2) - -inst_23026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8000001; valaddr_reg:x3; val_offset:69078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69078*FLEN/8, x4, x1, x2) - -inst_23027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8000003; valaddr_reg:x3; val_offset:69081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69081*FLEN/8, x4, x1, x2) - -inst_23028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8000007; valaddr_reg:x3; val_offset:69084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69084*FLEN/8, x4, x1, x2) - -inst_23029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x800000f; valaddr_reg:x3; val_offset:69087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69087*FLEN/8, x4, x1, x2) - -inst_23030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x800001f; valaddr_reg:x3; val_offset:69090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69090*FLEN/8, x4, x1, x2) - -inst_23031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x800003f; valaddr_reg:x3; val_offset:69093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69093*FLEN/8, x4, x1, x2) - -inst_23032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x800007f; valaddr_reg:x3; val_offset:69096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69096*FLEN/8, x4, x1, x2) - -inst_23033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x80000ff; valaddr_reg:x3; val_offset:69099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69099*FLEN/8, x4, x1, x2) - -inst_23034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x80001ff; valaddr_reg:x3; val_offset:69102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69102*FLEN/8, x4, x1, x2) - -inst_23035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x80003ff; valaddr_reg:x3; val_offset:69105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69105*FLEN/8, x4, x1, x2) - -inst_23036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x80007ff; valaddr_reg:x3; val_offset:69108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69108*FLEN/8, x4, x1, x2) - -inst_23037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8000fff; valaddr_reg:x3; val_offset:69111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69111*FLEN/8, x4, x1, x2) - -inst_23038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8001fff; valaddr_reg:x3; val_offset:69114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69114*FLEN/8, x4, x1, x2) - -inst_23039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8003fff; valaddr_reg:x3; val_offset:69117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69117*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_181) - -inst_23040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8007fff; valaddr_reg:x3; val_offset:69120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69120*FLEN/8, x4, x1, x2) - -inst_23041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x800ffff; valaddr_reg:x3; val_offset:69123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69123*FLEN/8, x4, x1, x2) - -inst_23042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x801ffff; valaddr_reg:x3; val_offset:69126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69126*FLEN/8, x4, x1, x2) - -inst_23043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x803ffff; valaddr_reg:x3; val_offset:69129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69129*FLEN/8, x4, x1, x2) - -inst_23044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x807ffff; valaddr_reg:x3; val_offset:69132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69132*FLEN/8, x4, x1, x2) - -inst_23045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x80fffff; valaddr_reg:x3; val_offset:69135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69135*FLEN/8, x4, x1, x2) - -inst_23046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x81fffff; valaddr_reg:x3; val_offset:69138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69138*FLEN/8, x4, x1, x2) - -inst_23047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x83fffff; valaddr_reg:x3; val_offset:69141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69141*FLEN/8, x4, x1, x2) - -inst_23048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8400000; valaddr_reg:x3; val_offset:69144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69144*FLEN/8, x4, x1, x2) - -inst_23049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8600000; valaddr_reg:x3; val_offset:69147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69147*FLEN/8, x4, x1, x2) - -inst_23050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8700000; valaddr_reg:x3; val_offset:69150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69150*FLEN/8, x4, x1, x2) - -inst_23051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x8780000; valaddr_reg:x3; val_offset:69153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69153*FLEN/8, x4, x1, x2) - -inst_23052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87c0000; valaddr_reg:x3; val_offset:69156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69156*FLEN/8, x4, x1, x2) - -inst_23053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87e0000; valaddr_reg:x3; val_offset:69159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69159*FLEN/8, x4, x1, x2) - -inst_23054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87f0000; valaddr_reg:x3; val_offset:69162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69162*FLEN/8, x4, x1, x2) - -inst_23055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87f8000; valaddr_reg:x3; val_offset:69165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69165*FLEN/8, x4, x1, x2) - -inst_23056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87fc000; valaddr_reg:x3; val_offset:69168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69168*FLEN/8, x4, x1, x2) - -inst_23057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87fe000; valaddr_reg:x3; val_offset:69171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69171*FLEN/8, x4, x1, x2) - -inst_23058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87ff000; valaddr_reg:x3; val_offset:69174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69174*FLEN/8, x4, x1, x2) - -inst_23059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87ff800; valaddr_reg:x3; val_offset:69177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69177*FLEN/8, x4, x1, x2) - -inst_23060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87ffc00; valaddr_reg:x3; val_offset:69180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69180*FLEN/8, x4, x1, x2) - -inst_23061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87ffe00; valaddr_reg:x3; val_offset:69183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69183*FLEN/8, x4, x1, x2) - -inst_23062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87fff00; valaddr_reg:x3; val_offset:69186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69186*FLEN/8, x4, x1, x2) - -inst_23063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87fff80; valaddr_reg:x3; val_offset:69189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69189*FLEN/8, x4, x1, x2) - -inst_23064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87fffc0; valaddr_reg:x3; val_offset:69192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69192*FLEN/8, x4, x1, x2) - -inst_23065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87fffe0; valaddr_reg:x3; val_offset:69195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69195*FLEN/8, x4, x1, x2) - -inst_23066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87ffff0; valaddr_reg:x3; val_offset:69198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69198*FLEN/8, x4, x1, x2) - -inst_23067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87ffff8; valaddr_reg:x3; val_offset:69201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69201*FLEN/8, x4, x1, x2) - -inst_23068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87ffffc; valaddr_reg:x3; val_offset:69204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69204*FLEN/8, x4, x1, x2) - -inst_23069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87ffffe; valaddr_reg:x3; val_offset:69207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69207*FLEN/8, x4, x1, x2) - -inst_23070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; -op3val:0x87fffff; valaddr_reg:x3; val_offset:69210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69210*FLEN/8, x4, x1, x2) - -inst_23071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33800000; valaddr_reg:x3; val_offset:69213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69213*FLEN/8, x4, x1, x2) - -inst_23072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33800001; valaddr_reg:x3; val_offset:69216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69216*FLEN/8, x4, x1, x2) - -inst_23073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33800003; valaddr_reg:x3; val_offset:69219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69219*FLEN/8, x4, x1, x2) - -inst_23074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33800007; valaddr_reg:x3; val_offset:69222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69222*FLEN/8, x4, x1, x2) - -inst_23075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3380000f; valaddr_reg:x3; val_offset:69225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69225*FLEN/8, x4, x1, x2) - -inst_23076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3380001f; valaddr_reg:x3; val_offset:69228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69228*FLEN/8, x4, x1, x2) - -inst_23077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3380003f; valaddr_reg:x3; val_offset:69231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69231*FLEN/8, x4, x1, x2) - -inst_23078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3380007f; valaddr_reg:x3; val_offset:69234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69234*FLEN/8, x4, x1, x2) - -inst_23079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x338000ff; valaddr_reg:x3; val_offset:69237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69237*FLEN/8, x4, x1, x2) - -inst_23080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x338001ff; valaddr_reg:x3; val_offset:69240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69240*FLEN/8, x4, x1, x2) - -inst_23081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x338003ff; valaddr_reg:x3; val_offset:69243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69243*FLEN/8, x4, x1, x2) - -inst_23082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x338007ff; valaddr_reg:x3; val_offset:69246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69246*FLEN/8, x4, x1, x2) - -inst_23083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33800fff; valaddr_reg:x3; val_offset:69249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69249*FLEN/8, x4, x1, x2) - -inst_23084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33801fff; valaddr_reg:x3; val_offset:69252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69252*FLEN/8, x4, x1, x2) - -inst_23085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33803fff; valaddr_reg:x3; val_offset:69255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69255*FLEN/8, x4, x1, x2) - -inst_23086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33807fff; valaddr_reg:x3; val_offset:69258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69258*FLEN/8, x4, x1, x2) - -inst_23087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3380ffff; valaddr_reg:x3; val_offset:69261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69261*FLEN/8, x4, x1, x2) - -inst_23088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3381ffff; valaddr_reg:x3; val_offset:69264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69264*FLEN/8, x4, x1, x2) - -inst_23089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3383ffff; valaddr_reg:x3; val_offset:69267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69267*FLEN/8, x4, x1, x2) - -inst_23090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3387ffff; valaddr_reg:x3; val_offset:69270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69270*FLEN/8, x4, x1, x2) - -inst_23091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x338fffff; valaddr_reg:x3; val_offset:69273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69273*FLEN/8, x4, x1, x2) - -inst_23092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x339fffff; valaddr_reg:x3; val_offset:69276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69276*FLEN/8, x4, x1, x2) - -inst_23093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33bfffff; valaddr_reg:x3; val_offset:69279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69279*FLEN/8, x4, x1, x2) - -inst_23094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33c00000; valaddr_reg:x3; val_offset:69282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69282*FLEN/8, x4, x1, x2) - -inst_23095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33e00000; valaddr_reg:x3; val_offset:69285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69285*FLEN/8, x4, x1, x2) - -inst_23096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33f00000; valaddr_reg:x3; val_offset:69288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69288*FLEN/8, x4, x1, x2) - -inst_23097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33f80000; valaddr_reg:x3; val_offset:69291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69291*FLEN/8, x4, x1, x2) - -inst_23098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fc0000; valaddr_reg:x3; val_offset:69294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69294*FLEN/8, x4, x1, x2) - -inst_23099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fe0000; valaddr_reg:x3; val_offset:69297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69297*FLEN/8, x4, x1, x2) - -inst_23100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ff0000; valaddr_reg:x3; val_offset:69300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69300*FLEN/8, x4, x1, x2) - -inst_23101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ff8000; valaddr_reg:x3; val_offset:69303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69303*FLEN/8, x4, x1, x2) - -inst_23102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ffc000; valaddr_reg:x3; val_offset:69306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69306*FLEN/8, x4, x1, x2) - -inst_23103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ffe000; valaddr_reg:x3; val_offset:69309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69309*FLEN/8, x4, x1, x2) - -inst_23104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fff000; valaddr_reg:x3; val_offset:69312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69312*FLEN/8, x4, x1, x2) - -inst_23105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fff800; valaddr_reg:x3; val_offset:69315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69315*FLEN/8, x4, x1, x2) - -inst_23106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fffc00; valaddr_reg:x3; val_offset:69318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69318*FLEN/8, x4, x1, x2) - -inst_23107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fffe00; valaddr_reg:x3; val_offset:69321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69321*FLEN/8, x4, x1, x2) - -inst_23108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ffff00; valaddr_reg:x3; val_offset:69324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69324*FLEN/8, x4, x1, x2) - -inst_23109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ffff80; valaddr_reg:x3; val_offset:69327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69327*FLEN/8, x4, x1, x2) - -inst_23110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ffffc0; valaddr_reg:x3; val_offset:69330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69330*FLEN/8, x4, x1, x2) - -inst_23111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ffffe0; valaddr_reg:x3; val_offset:69333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69333*FLEN/8, x4, x1, x2) - -inst_23112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fffff0; valaddr_reg:x3; val_offset:69336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69336*FLEN/8, x4, x1, x2) - -inst_23113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fffff8; valaddr_reg:x3; val_offset:69339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69339*FLEN/8, x4, x1, x2) - -inst_23114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fffffc; valaddr_reg:x3; val_offset:69342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69342*FLEN/8, x4, x1, x2) - -inst_23115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33fffffe; valaddr_reg:x3; val_offset:69345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69345*FLEN/8, x4, x1, x2) - -inst_23116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x33ffffff; valaddr_reg:x3; val_offset:69348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69348*FLEN/8, x4, x1, x2) - -inst_23117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3f800001; valaddr_reg:x3; val_offset:69351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69351*FLEN/8, x4, x1, x2) - -inst_23118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3f800003; valaddr_reg:x3; val_offset:69354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69354*FLEN/8, x4, x1, x2) - -inst_23119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3f800007; valaddr_reg:x3; val_offset:69357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69357*FLEN/8, x4, x1, x2) - -inst_23120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3f999999; valaddr_reg:x3; val_offset:69360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69360*FLEN/8, x4, x1, x2) - -inst_23121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:69363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69363*FLEN/8, x4, x1, x2) - -inst_23122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:69366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69366*FLEN/8, x4, x1, x2) - -inst_23123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:69369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69369*FLEN/8, x4, x1, x2) - -inst_23124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:69372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69372*FLEN/8, x4, x1, x2) - -inst_23125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:69375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69375*FLEN/8, x4, x1, x2) - -inst_23126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:69378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69378*FLEN/8, x4, x1, x2) - -inst_23127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:69381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69381*FLEN/8, x4, x1, x2) - -inst_23128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:69384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69384*FLEN/8, x4, x1, x2) - -inst_23129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:69387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69387*FLEN/8, x4, x1, x2) - -inst_23130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:69390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69390*FLEN/8, x4, x1, x2) - -inst_23131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:69393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69393*FLEN/8, x4, x1, x2) - -inst_23132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:69396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69396*FLEN/8, x4, x1, x2) - -inst_23133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:69399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69399*FLEN/8, x4, x1, x2) - -inst_23134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:69402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69402*FLEN/8, x4, x1, x2) - -inst_23135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:69405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69405*FLEN/8, x4, x1, x2) - -inst_23136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:69408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69408*FLEN/8, x4, x1, x2) - -inst_23137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:69411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69411*FLEN/8, x4, x1, x2) - -inst_23138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:69414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69414*FLEN/8, x4, x1, x2) - -inst_23139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:69417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69417*FLEN/8, x4, x1, x2) - -inst_23140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:69420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69420*FLEN/8, x4, x1, x2) - -inst_23141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:69423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69423*FLEN/8, x4, x1, x2) - -inst_23142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:69426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69426*FLEN/8, x4, x1, x2) - -inst_23143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:69429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69429*FLEN/8, x4, x1, x2) - -inst_23144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:69432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69432*FLEN/8, x4, x1, x2) - -inst_23145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:69435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69435*FLEN/8, x4, x1, x2) - -inst_23146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:69438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69438*FLEN/8, x4, x1, x2) - -inst_23147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:69441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69441*FLEN/8, x4, x1, x2) - -inst_23148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:69444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69444*FLEN/8, x4, x1, x2) - -inst_23149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c800000; valaddr_reg:x3; val_offset:69447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69447*FLEN/8, x4, x1, x2) - -inst_23150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c800001; valaddr_reg:x3; val_offset:69450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69450*FLEN/8, x4, x1, x2) - -inst_23151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c800003; valaddr_reg:x3; val_offset:69453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69453*FLEN/8, x4, x1, x2) - -inst_23152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c800007; valaddr_reg:x3; val_offset:69456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69456*FLEN/8, x4, x1, x2) - -inst_23153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c80000f; valaddr_reg:x3; val_offset:69459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69459*FLEN/8, x4, x1, x2) - -inst_23154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c80001f; valaddr_reg:x3; val_offset:69462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69462*FLEN/8, x4, x1, x2) - -inst_23155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c80003f; valaddr_reg:x3; val_offset:69465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69465*FLEN/8, x4, x1, x2) - -inst_23156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c80007f; valaddr_reg:x3; val_offset:69468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69468*FLEN/8, x4, x1, x2) - -inst_23157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c8000ff; valaddr_reg:x3; val_offset:69471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69471*FLEN/8, x4, x1, x2) - -inst_23158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c8001ff; valaddr_reg:x3; val_offset:69474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69474*FLEN/8, x4, x1, x2) - -inst_23159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c8003ff; valaddr_reg:x3; val_offset:69477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69477*FLEN/8, x4, x1, x2) - -inst_23160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c8007ff; valaddr_reg:x3; val_offset:69480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69480*FLEN/8, x4, x1, x2) - -inst_23161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c800fff; valaddr_reg:x3; val_offset:69483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69483*FLEN/8, x4, x1, x2) - -inst_23162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c801fff; valaddr_reg:x3; val_offset:69486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69486*FLEN/8, x4, x1, x2) - -inst_23163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c803fff; valaddr_reg:x3; val_offset:69489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69489*FLEN/8, x4, x1, x2) - -inst_23164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c807fff; valaddr_reg:x3; val_offset:69492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69492*FLEN/8, x4, x1, x2) - -inst_23165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c80ffff; valaddr_reg:x3; val_offset:69495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69495*FLEN/8, x4, x1, x2) - -inst_23166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c81ffff; valaddr_reg:x3; val_offset:69498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69498*FLEN/8, x4, x1, x2) - -inst_23167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c83ffff; valaddr_reg:x3; val_offset:69501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69501*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_182) - -inst_23168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c87ffff; valaddr_reg:x3; val_offset:69504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69504*FLEN/8, x4, x1, x2) - -inst_23169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c8fffff; valaddr_reg:x3; val_offset:69507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69507*FLEN/8, x4, x1, x2) - -inst_23170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8c9fffff; valaddr_reg:x3; val_offset:69510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69510*FLEN/8, x4, x1, x2) - -inst_23171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cbfffff; valaddr_reg:x3; val_offset:69513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69513*FLEN/8, x4, x1, x2) - -inst_23172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cc00000; valaddr_reg:x3; val_offset:69516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69516*FLEN/8, x4, x1, x2) - -inst_23173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8ce00000; valaddr_reg:x3; val_offset:69519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69519*FLEN/8, x4, x1, x2) - -inst_23174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cf00000; valaddr_reg:x3; val_offset:69522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69522*FLEN/8, x4, x1, x2) - -inst_23175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cf80000; valaddr_reg:x3; val_offset:69525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69525*FLEN/8, x4, x1, x2) - -inst_23176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfc0000; valaddr_reg:x3; val_offset:69528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69528*FLEN/8, x4, x1, x2) - -inst_23177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfe0000; valaddr_reg:x3; val_offset:69531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69531*FLEN/8, x4, x1, x2) - -inst_23178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cff0000; valaddr_reg:x3; val_offset:69534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69534*FLEN/8, x4, x1, x2) - -inst_23179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cff8000; valaddr_reg:x3; val_offset:69537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69537*FLEN/8, x4, x1, x2) - -inst_23180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cffc000; valaddr_reg:x3; val_offset:69540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69540*FLEN/8, x4, x1, x2) - -inst_23181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cffe000; valaddr_reg:x3; val_offset:69543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69543*FLEN/8, x4, x1, x2) - -inst_23182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfff000; valaddr_reg:x3; val_offset:69546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69546*FLEN/8, x4, x1, x2) - -inst_23183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfff800; valaddr_reg:x3; val_offset:69549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69549*FLEN/8, x4, x1, x2) - -inst_23184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfffc00; valaddr_reg:x3; val_offset:69552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69552*FLEN/8, x4, x1, x2) - -inst_23185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfffe00; valaddr_reg:x3; val_offset:69555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69555*FLEN/8, x4, x1, x2) - -inst_23186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cffff00; valaddr_reg:x3; val_offset:69558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69558*FLEN/8, x4, x1, x2) - -inst_23187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cffff80; valaddr_reg:x3; val_offset:69561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69561*FLEN/8, x4, x1, x2) - -inst_23188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cffffc0; valaddr_reg:x3; val_offset:69564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69564*FLEN/8, x4, x1, x2) - -inst_23189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cffffe0; valaddr_reg:x3; val_offset:69567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69567*FLEN/8, x4, x1, x2) - -inst_23190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfffff0; valaddr_reg:x3; val_offset:69570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69570*FLEN/8, x4, x1, x2) - -inst_23191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfffff8; valaddr_reg:x3; val_offset:69573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69573*FLEN/8, x4, x1, x2) - -inst_23192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfffffc; valaddr_reg:x3; val_offset:69576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69576*FLEN/8, x4, x1, x2) - -inst_23193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cfffffe; valaddr_reg:x3; val_offset:69579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69579*FLEN/8, x4, x1, x2) - -inst_23194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; -op3val:0x8cffffff; valaddr_reg:x3; val_offset:69582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69582*FLEN/8, x4, x1, x2) - -inst_23195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae000000; valaddr_reg:x3; val_offset:69585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69585*FLEN/8, x4, x1, x2) - -inst_23196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae000001; valaddr_reg:x3; val_offset:69588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69588*FLEN/8, x4, x1, x2) - -inst_23197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae000003; valaddr_reg:x3; val_offset:69591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69591*FLEN/8, x4, x1, x2) - -inst_23198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae000007; valaddr_reg:x3; val_offset:69594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69594*FLEN/8, x4, x1, x2) - -inst_23199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae00000f; valaddr_reg:x3; val_offset:69597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69597*FLEN/8, x4, x1, x2) - -inst_23200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae00001f; valaddr_reg:x3; val_offset:69600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69600*FLEN/8, x4, x1, x2) - -inst_23201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae00003f; valaddr_reg:x3; val_offset:69603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69603*FLEN/8, x4, x1, x2) - -inst_23202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae00007f; valaddr_reg:x3; val_offset:69606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69606*FLEN/8, x4, x1, x2) - -inst_23203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae0000ff; valaddr_reg:x3; val_offset:69609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69609*FLEN/8, x4, x1, x2) - -inst_23204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae0001ff; valaddr_reg:x3; val_offset:69612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69612*FLEN/8, x4, x1, x2) - -inst_23205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae0003ff; valaddr_reg:x3; val_offset:69615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69615*FLEN/8, x4, x1, x2) - -inst_23206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae0007ff; valaddr_reg:x3; val_offset:69618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69618*FLEN/8, x4, x1, x2) - -inst_23207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae000fff; valaddr_reg:x3; val_offset:69621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69621*FLEN/8, x4, x1, x2) - -inst_23208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae001fff; valaddr_reg:x3; val_offset:69624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69624*FLEN/8, x4, x1, x2) - -inst_23209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae003fff; valaddr_reg:x3; val_offset:69627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69627*FLEN/8, x4, x1, x2) - -inst_23210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae007fff; valaddr_reg:x3; val_offset:69630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69630*FLEN/8, x4, x1, x2) - -inst_23211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae00ffff; valaddr_reg:x3; val_offset:69633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69633*FLEN/8, x4, x1, x2) - -inst_23212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae01ffff; valaddr_reg:x3; val_offset:69636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69636*FLEN/8, x4, x1, x2) - -inst_23213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae03ffff; valaddr_reg:x3; val_offset:69639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69639*FLEN/8, x4, x1, x2) - -inst_23214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae07ffff; valaddr_reg:x3; val_offset:69642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69642*FLEN/8, x4, x1, x2) - -inst_23215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae0fffff; valaddr_reg:x3; val_offset:69645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69645*FLEN/8, x4, x1, x2) - -inst_23216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae1fffff; valaddr_reg:x3; val_offset:69648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69648*FLEN/8, x4, x1, x2) - -inst_23217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae3fffff; valaddr_reg:x3; val_offset:69651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69651*FLEN/8, x4, x1, x2) - -inst_23218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae400000; valaddr_reg:x3; val_offset:69654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69654*FLEN/8, x4, x1, x2) - -inst_23219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae600000; valaddr_reg:x3; val_offset:69657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69657*FLEN/8, x4, x1, x2) - -inst_23220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae700000; valaddr_reg:x3; val_offset:69660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69660*FLEN/8, x4, x1, x2) - -inst_23221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae780000; valaddr_reg:x3; val_offset:69663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69663*FLEN/8, x4, x1, x2) - -inst_23222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7c0000; valaddr_reg:x3; val_offset:69666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69666*FLEN/8, x4, x1, x2) - -inst_23223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7e0000; valaddr_reg:x3; val_offset:69669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69669*FLEN/8, x4, x1, x2) - -inst_23224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7f0000; valaddr_reg:x3; val_offset:69672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69672*FLEN/8, x4, x1, x2) - -inst_23225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7f8000; valaddr_reg:x3; val_offset:69675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69675*FLEN/8, x4, x1, x2) - -inst_23226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7fc000; valaddr_reg:x3; val_offset:69678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69678*FLEN/8, x4, x1, x2) - -inst_23227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7fe000; valaddr_reg:x3; val_offset:69681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69681*FLEN/8, x4, x1, x2) - -inst_23228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7ff000; valaddr_reg:x3; val_offset:69684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69684*FLEN/8, x4, x1, x2) - -inst_23229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7ff800; valaddr_reg:x3; val_offset:69687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69687*FLEN/8, x4, x1, x2) - -inst_23230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7ffc00; valaddr_reg:x3; val_offset:69690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69690*FLEN/8, x4, x1, x2) - -inst_23231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7ffe00; valaddr_reg:x3; val_offset:69693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69693*FLEN/8, x4, x1, x2) - -inst_23232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7fff00; valaddr_reg:x3; val_offset:69696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69696*FLEN/8, x4, x1, x2) - -inst_23233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7fff80; valaddr_reg:x3; val_offset:69699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69699*FLEN/8, x4, x1, x2) - -inst_23234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7fffc0; valaddr_reg:x3; val_offset:69702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69702*FLEN/8, x4, x1, x2) - -inst_23235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7fffe0; valaddr_reg:x3; val_offset:69705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69705*FLEN/8, x4, x1, x2) - -inst_23236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7ffff0; valaddr_reg:x3; val_offset:69708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69708*FLEN/8, x4, x1, x2) - -inst_23237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7ffff8; valaddr_reg:x3; val_offset:69711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69711*FLEN/8, x4, x1, x2) - -inst_23238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7ffffc; valaddr_reg:x3; val_offset:69714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69714*FLEN/8, x4, x1, x2) - -inst_23239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7ffffe; valaddr_reg:x3; val_offset:69717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69717*FLEN/8, x4, x1, x2) - -inst_23240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xae7fffff; valaddr_reg:x3; val_offset:69720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69720*FLEN/8, x4, x1, x2) - -inst_23241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbf800001; valaddr_reg:x3; val_offset:69723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69723*FLEN/8, x4, x1, x2) - -inst_23242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbf800003; valaddr_reg:x3; val_offset:69726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69726*FLEN/8, x4, x1, x2) - -inst_23243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbf800007; valaddr_reg:x3; val_offset:69729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69729*FLEN/8, x4, x1, x2) - -inst_23244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbf999999; valaddr_reg:x3; val_offset:69732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69732*FLEN/8, x4, x1, x2) - -inst_23245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:69735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69735*FLEN/8, x4, x1, x2) - -inst_23246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:69738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69738*FLEN/8, x4, x1, x2) - -inst_23247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:69741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69741*FLEN/8, x4, x1, x2) - -inst_23248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:69744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69744*FLEN/8, x4, x1, x2) - -inst_23249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:69747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69747*FLEN/8, x4, x1, x2) - -inst_23250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:69750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69750*FLEN/8, x4, x1, x2) - -inst_23251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:69753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69753*FLEN/8, x4, x1, x2) - -inst_23252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:69756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69756*FLEN/8, x4, x1, x2) - -inst_23253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:69759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69759*FLEN/8, x4, x1, x2) - -inst_23254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:69762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69762*FLEN/8, x4, x1, x2) - -inst_23255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:69765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69765*FLEN/8, x4, x1, x2) - -inst_23256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:69768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69768*FLEN/8, x4, x1, x2) - -inst_23257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38000000; valaddr_reg:x3; val_offset:69771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69771*FLEN/8, x4, x1, x2) - -inst_23258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38000001; valaddr_reg:x3; val_offset:69774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69774*FLEN/8, x4, x1, x2) - -inst_23259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38000003; valaddr_reg:x3; val_offset:69777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69777*FLEN/8, x4, x1, x2) - -inst_23260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38000007; valaddr_reg:x3; val_offset:69780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69780*FLEN/8, x4, x1, x2) - -inst_23261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3800000f; valaddr_reg:x3; val_offset:69783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69783*FLEN/8, x4, x1, x2) - -inst_23262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3800001f; valaddr_reg:x3; val_offset:69786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69786*FLEN/8, x4, x1, x2) - -inst_23263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3800003f; valaddr_reg:x3; val_offset:69789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69789*FLEN/8, x4, x1, x2) - -inst_23264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3800007f; valaddr_reg:x3; val_offset:69792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69792*FLEN/8, x4, x1, x2) - -inst_23265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x380000ff; valaddr_reg:x3; val_offset:69795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69795*FLEN/8, x4, x1, x2) - -inst_23266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x380001ff; valaddr_reg:x3; val_offset:69798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69798*FLEN/8, x4, x1, x2) - -inst_23267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x380003ff; valaddr_reg:x3; val_offset:69801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69801*FLEN/8, x4, x1, x2) - -inst_23268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x380007ff; valaddr_reg:x3; val_offset:69804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69804*FLEN/8, x4, x1, x2) - -inst_23269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38000fff; valaddr_reg:x3; val_offset:69807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69807*FLEN/8, x4, x1, x2) - -inst_23270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38001fff; valaddr_reg:x3; val_offset:69810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69810*FLEN/8, x4, x1, x2) - -inst_23271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38003fff; valaddr_reg:x3; val_offset:69813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69813*FLEN/8, x4, x1, x2) - -inst_23272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38007fff; valaddr_reg:x3; val_offset:69816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69816*FLEN/8, x4, x1, x2) - -inst_23273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3800ffff; valaddr_reg:x3; val_offset:69819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69819*FLEN/8, x4, x1, x2) - -inst_23274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3801ffff; valaddr_reg:x3; val_offset:69822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69822*FLEN/8, x4, x1, x2) - -inst_23275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3803ffff; valaddr_reg:x3; val_offset:69825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69825*FLEN/8, x4, x1, x2) - -inst_23276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3807ffff; valaddr_reg:x3; val_offset:69828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69828*FLEN/8, x4, x1, x2) - -inst_23277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x380fffff; valaddr_reg:x3; val_offset:69831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69831*FLEN/8, x4, x1, x2) - -inst_23278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x381fffff; valaddr_reg:x3; val_offset:69834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69834*FLEN/8, x4, x1, x2) - -inst_23279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x383fffff; valaddr_reg:x3; val_offset:69837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69837*FLEN/8, x4, x1, x2) - -inst_23280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38400000; valaddr_reg:x3; val_offset:69840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69840*FLEN/8, x4, x1, x2) - -inst_23281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38600000; valaddr_reg:x3; val_offset:69843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69843*FLEN/8, x4, x1, x2) - -inst_23282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38700000; valaddr_reg:x3; val_offset:69846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69846*FLEN/8, x4, x1, x2) - -inst_23283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x38780000; valaddr_reg:x3; val_offset:69849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69849*FLEN/8, x4, x1, x2) - -inst_23284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387c0000; valaddr_reg:x3; val_offset:69852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69852*FLEN/8, x4, x1, x2) - -inst_23285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387e0000; valaddr_reg:x3; val_offset:69855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69855*FLEN/8, x4, x1, x2) - -inst_23286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387f0000; valaddr_reg:x3; val_offset:69858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69858*FLEN/8, x4, x1, x2) - -inst_23287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387f8000; valaddr_reg:x3; val_offset:69861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69861*FLEN/8, x4, x1, x2) - -inst_23288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387fc000; valaddr_reg:x3; val_offset:69864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69864*FLEN/8, x4, x1, x2) - -inst_23289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387fe000; valaddr_reg:x3; val_offset:69867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69867*FLEN/8, x4, x1, x2) - -inst_23290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387ff000; valaddr_reg:x3; val_offset:69870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69870*FLEN/8, x4, x1, x2) - -inst_23291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387ff800; valaddr_reg:x3; val_offset:69873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69873*FLEN/8, x4, x1, x2) - -inst_23292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387ffc00; valaddr_reg:x3; val_offset:69876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69876*FLEN/8, x4, x1, x2) - -inst_23293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387ffe00; valaddr_reg:x3; val_offset:69879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69879*FLEN/8, x4, x1, x2) - -inst_23294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387fff00; valaddr_reg:x3; val_offset:69882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69882*FLEN/8, x4, x1, x2) - -inst_23295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387fff80; valaddr_reg:x3; val_offset:69885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69885*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_183) - -inst_23296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387fffc0; valaddr_reg:x3; val_offset:69888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69888*FLEN/8, x4, x1, x2) - -inst_23297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387fffe0; valaddr_reg:x3; val_offset:69891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69891*FLEN/8, x4, x1, x2) - -inst_23298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387ffff0; valaddr_reg:x3; val_offset:69894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69894*FLEN/8, x4, x1, x2) - -inst_23299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387ffff8; valaddr_reg:x3; val_offset:69897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69897*FLEN/8, x4, x1, x2) - -inst_23300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387ffffc; valaddr_reg:x3; val_offset:69900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69900*FLEN/8, x4, x1, x2) - -inst_23301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387ffffe; valaddr_reg:x3; val_offset:69903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69903*FLEN/8, x4, x1, x2) - -inst_23302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x387fffff; valaddr_reg:x3; val_offset:69906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69906*FLEN/8, x4, x1, x2) - -inst_23303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3f800001; valaddr_reg:x3; val_offset:69909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69909*FLEN/8, x4, x1, x2) - -inst_23304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3f800003; valaddr_reg:x3; val_offset:69912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69912*FLEN/8, x4, x1, x2) - -inst_23305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3f800007; valaddr_reg:x3; val_offset:69915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69915*FLEN/8, x4, x1, x2) - -inst_23306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3f999999; valaddr_reg:x3; val_offset:69918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69918*FLEN/8, x4, x1, x2) - -inst_23307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:69921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69921*FLEN/8, x4, x1, x2) - -inst_23308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:69924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69924*FLEN/8, x4, x1, x2) - -inst_23309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:69927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69927*FLEN/8, x4, x1, x2) - -inst_23310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:69930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69930*FLEN/8, x4, x1, x2) - -inst_23311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:69933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69933*FLEN/8, x4, x1, x2) - -inst_23312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:69936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69936*FLEN/8, x4, x1, x2) - -inst_23313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:69939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69939*FLEN/8, x4, x1, x2) - -inst_23314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:69942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69942*FLEN/8, x4, x1, x2) - -inst_23315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:69945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69945*FLEN/8, x4, x1, x2) - -inst_23316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:69948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69948*FLEN/8, x4, x1, x2) - -inst_23317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:69951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69951*FLEN/8, x4, x1, x2) - -inst_23318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:69954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69954*FLEN/8, x4, x1, x2) - -inst_23319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:69957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69957*FLEN/8, x4, x1, x2) - -inst_23320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:69960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69960*FLEN/8, x4, x1, x2) - -inst_23321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:69963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69963*FLEN/8, x4, x1, x2) - -inst_23322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:69966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69966*FLEN/8, x4, x1, x2) - -inst_23323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:69969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69969*FLEN/8, x4, x1, x2) - -inst_23324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:69972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69972*FLEN/8, x4, x1, x2) - -inst_23325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:69975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69975*FLEN/8, x4, x1, x2) - -inst_23326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:69978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69978*FLEN/8, x4, x1, x2) - -inst_23327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:69981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69981*FLEN/8, x4, x1, x2) - -inst_23328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:69984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69984*FLEN/8, x4, x1, x2) - -inst_23329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:69987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69987*FLEN/8, x4, x1, x2) - -inst_23330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:69990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69990*FLEN/8, x4, x1, x2) - -inst_23331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:69993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69993*FLEN/8, x4, x1, x2) - -inst_23332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:69996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69996*FLEN/8, x4, x1, x2) - -inst_23333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:69999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69999*FLEN/8, x4, x1, x2) - -inst_23334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:70002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70002*FLEN/8, x4, x1, x2) - -inst_23335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87800000; valaddr_reg:x3; val_offset:70005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70005*FLEN/8, x4, x1, x2) - -inst_23336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87800001; valaddr_reg:x3; val_offset:70008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70008*FLEN/8, x4, x1, x2) - -inst_23337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87800003; valaddr_reg:x3; val_offset:70011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70011*FLEN/8, x4, x1, x2) - -inst_23338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87800007; valaddr_reg:x3; val_offset:70014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70014*FLEN/8, x4, x1, x2) - -inst_23339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8780000f; valaddr_reg:x3; val_offset:70017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70017*FLEN/8, x4, x1, x2) - -inst_23340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8780001f; valaddr_reg:x3; val_offset:70020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70020*FLEN/8, x4, x1, x2) - -inst_23341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8780003f; valaddr_reg:x3; val_offset:70023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70023*FLEN/8, x4, x1, x2) - -inst_23342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8780007f; valaddr_reg:x3; val_offset:70026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70026*FLEN/8, x4, x1, x2) - -inst_23343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x878000ff; valaddr_reg:x3; val_offset:70029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70029*FLEN/8, x4, x1, x2) - -inst_23344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x878001ff; valaddr_reg:x3; val_offset:70032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70032*FLEN/8, x4, x1, x2) - -inst_23345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x878003ff; valaddr_reg:x3; val_offset:70035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70035*FLEN/8, x4, x1, x2) - -inst_23346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x878007ff; valaddr_reg:x3; val_offset:70038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70038*FLEN/8, x4, x1, x2) - -inst_23347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87800fff; valaddr_reg:x3; val_offset:70041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70041*FLEN/8, x4, x1, x2) - -inst_23348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87801fff; valaddr_reg:x3; val_offset:70044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70044*FLEN/8, x4, x1, x2) - -inst_23349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87803fff; valaddr_reg:x3; val_offset:70047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70047*FLEN/8, x4, x1, x2) - -inst_23350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87807fff; valaddr_reg:x3; val_offset:70050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70050*FLEN/8, x4, x1, x2) - -inst_23351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8780ffff; valaddr_reg:x3; val_offset:70053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70053*FLEN/8, x4, x1, x2) - -inst_23352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8781ffff; valaddr_reg:x3; val_offset:70056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70056*FLEN/8, x4, x1, x2) - -inst_23353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8783ffff; valaddr_reg:x3; val_offset:70059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70059*FLEN/8, x4, x1, x2) - -inst_23354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x8787ffff; valaddr_reg:x3; val_offset:70062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70062*FLEN/8, x4, x1, x2) - -inst_23355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x878fffff; valaddr_reg:x3; val_offset:70065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70065*FLEN/8, x4, x1, x2) - -inst_23356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x879fffff; valaddr_reg:x3; val_offset:70068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70068*FLEN/8, x4, x1, x2) - -inst_23357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87bfffff; valaddr_reg:x3; val_offset:70071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70071*FLEN/8, x4, x1, x2) - -inst_23358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87c00000; valaddr_reg:x3; val_offset:70074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70074*FLEN/8, x4, x1, x2) - -inst_23359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87e00000; valaddr_reg:x3; val_offset:70077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70077*FLEN/8, x4, x1, x2) - -inst_23360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87f00000; valaddr_reg:x3; val_offset:70080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70080*FLEN/8, x4, x1, x2) - -inst_23361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87f80000; valaddr_reg:x3; val_offset:70083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70083*FLEN/8, x4, x1, x2) - -inst_23362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fc0000; valaddr_reg:x3; val_offset:70086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70086*FLEN/8, x4, x1, x2) - -inst_23363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fe0000; valaddr_reg:x3; val_offset:70089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70089*FLEN/8, x4, x1, x2) - -inst_23364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ff0000; valaddr_reg:x3; val_offset:70092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70092*FLEN/8, x4, x1, x2) - -inst_23365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ff8000; valaddr_reg:x3; val_offset:70095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70095*FLEN/8, x4, x1, x2) - -inst_23366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ffc000; valaddr_reg:x3; val_offset:70098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70098*FLEN/8, x4, x1, x2) - -inst_23367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ffe000; valaddr_reg:x3; val_offset:70101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70101*FLEN/8, x4, x1, x2) - -inst_23368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fff000; valaddr_reg:x3; val_offset:70104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70104*FLEN/8, x4, x1, x2) - -inst_23369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fff800; valaddr_reg:x3; val_offset:70107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70107*FLEN/8, x4, x1, x2) - -inst_23370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fffc00; valaddr_reg:x3; val_offset:70110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70110*FLEN/8, x4, x1, x2) - -inst_23371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fffe00; valaddr_reg:x3; val_offset:70113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70113*FLEN/8, x4, x1, x2) - -inst_23372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ffff00; valaddr_reg:x3; val_offset:70116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70116*FLEN/8, x4, x1, x2) - -inst_23373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ffff80; valaddr_reg:x3; val_offset:70119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70119*FLEN/8, x4, x1, x2) - -inst_23374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ffffc0; valaddr_reg:x3; val_offset:70122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70122*FLEN/8, x4, x1, x2) - -inst_23375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ffffe0; valaddr_reg:x3; val_offset:70125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70125*FLEN/8, x4, x1, x2) - -inst_23376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fffff0; valaddr_reg:x3; val_offset:70128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70128*FLEN/8, x4, x1, x2) - -inst_23377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fffff8; valaddr_reg:x3; val_offset:70131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70131*FLEN/8, x4, x1, x2) - -inst_23378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fffffc; valaddr_reg:x3; val_offset:70134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70134*FLEN/8, x4, x1, x2) - -inst_23379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87fffffe; valaddr_reg:x3; val_offset:70137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70137*FLEN/8, x4, x1, x2) - -inst_23380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; -op3val:0x87ffffff; valaddr_reg:x3; val_offset:70140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70140*FLEN/8, x4, x1, x2) - -inst_23381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbf800001; valaddr_reg:x3; val_offset:70143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70143*FLEN/8, x4, x1, x2) - -inst_23382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbf800003; valaddr_reg:x3; val_offset:70146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70146*FLEN/8, x4, x1, x2) - -inst_23383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbf800007; valaddr_reg:x3; val_offset:70149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70149*FLEN/8, x4, x1, x2) - -inst_23384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbf999999; valaddr_reg:x3; val_offset:70152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70152*FLEN/8, x4, x1, x2) - -inst_23385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:70155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70155*FLEN/8, x4, x1, x2) - -inst_23386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:70158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70158*FLEN/8, x4, x1, x2) - -inst_23387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:70161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70161*FLEN/8, x4, x1, x2) - -inst_23388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:70164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70164*FLEN/8, x4, x1, x2) - -inst_23389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:70167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70167*FLEN/8, x4, x1, x2) - -inst_23390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:70170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70170*FLEN/8, x4, x1, x2) - -inst_23391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:70173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70173*FLEN/8, x4, x1, x2) - -inst_23392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:70176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70176*FLEN/8, x4, x1, x2) - -inst_23393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:70179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70179*FLEN/8, x4, x1, x2) - -inst_23394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:70182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70182*FLEN/8, x4, x1, x2) - -inst_23395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:70185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70185*FLEN/8, x4, x1, x2) - -inst_23396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:70188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70188*FLEN/8, x4, x1, x2) - -inst_23397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8000000; valaddr_reg:x3; val_offset:70191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70191*FLEN/8, x4, x1, x2) - -inst_23398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8000001; valaddr_reg:x3; val_offset:70194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70194*FLEN/8, x4, x1, x2) - -inst_23399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8000003; valaddr_reg:x3; val_offset:70197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70197*FLEN/8, x4, x1, x2) - -inst_23400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8000007; valaddr_reg:x3; val_offset:70200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70200*FLEN/8, x4, x1, x2) - -inst_23401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc800000f; valaddr_reg:x3; val_offset:70203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70203*FLEN/8, x4, x1, x2) - -inst_23402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc800001f; valaddr_reg:x3; val_offset:70206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70206*FLEN/8, x4, x1, x2) - -inst_23403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc800003f; valaddr_reg:x3; val_offset:70209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70209*FLEN/8, x4, x1, x2) - -inst_23404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc800007f; valaddr_reg:x3; val_offset:70212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70212*FLEN/8, x4, x1, x2) - -inst_23405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc80000ff; valaddr_reg:x3; val_offset:70215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70215*FLEN/8, x4, x1, x2) - -inst_23406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc80001ff; valaddr_reg:x3; val_offset:70218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70218*FLEN/8, x4, x1, x2) - -inst_23407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc80003ff; valaddr_reg:x3; val_offset:70221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70221*FLEN/8, x4, x1, x2) - -inst_23408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc80007ff; valaddr_reg:x3; val_offset:70224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70224*FLEN/8, x4, x1, x2) - -inst_23409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8000fff; valaddr_reg:x3; val_offset:70227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70227*FLEN/8, x4, x1, x2) - -inst_23410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8001fff; valaddr_reg:x3; val_offset:70230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70230*FLEN/8, x4, x1, x2) - -inst_23411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8003fff; valaddr_reg:x3; val_offset:70233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70233*FLEN/8, x4, x1, x2) - -inst_23412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8007fff; valaddr_reg:x3; val_offset:70236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70236*FLEN/8, x4, x1, x2) - -inst_23413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc800ffff; valaddr_reg:x3; val_offset:70239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70239*FLEN/8, x4, x1, x2) - -inst_23414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc801ffff; valaddr_reg:x3; val_offset:70242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70242*FLEN/8, x4, x1, x2) - -inst_23415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc803ffff; valaddr_reg:x3; val_offset:70245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70245*FLEN/8, x4, x1, x2) - -inst_23416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc807ffff; valaddr_reg:x3; val_offset:70248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70248*FLEN/8, x4, x1, x2) - -inst_23417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc80fffff; valaddr_reg:x3; val_offset:70251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70251*FLEN/8, x4, x1, x2) - -inst_23418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc81fffff; valaddr_reg:x3; val_offset:70254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70254*FLEN/8, x4, x1, x2) - -inst_23419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc83fffff; valaddr_reg:x3; val_offset:70257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70257*FLEN/8, x4, x1, x2) - -inst_23420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8400000; valaddr_reg:x3; val_offset:70260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70260*FLEN/8, x4, x1, x2) - -inst_23421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8600000; valaddr_reg:x3; val_offset:70263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70263*FLEN/8, x4, x1, x2) - -inst_23422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8700000; valaddr_reg:x3; val_offset:70266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70266*FLEN/8, x4, x1, x2) - -inst_23423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc8780000; valaddr_reg:x3; val_offset:70269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70269*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_184) - -inst_23424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87c0000; valaddr_reg:x3; val_offset:70272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70272*FLEN/8, x4, x1, x2) - -inst_23425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87e0000; valaddr_reg:x3; val_offset:70275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70275*FLEN/8, x4, x1, x2) - -inst_23426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87f0000; valaddr_reg:x3; val_offset:70278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70278*FLEN/8, x4, x1, x2) - -inst_23427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87f8000; valaddr_reg:x3; val_offset:70281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70281*FLEN/8, x4, x1, x2) - -inst_23428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87fc000; valaddr_reg:x3; val_offset:70284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70284*FLEN/8, x4, x1, x2) - -inst_23429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87fe000; valaddr_reg:x3; val_offset:70287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70287*FLEN/8, x4, x1, x2) - -inst_23430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87ff000; valaddr_reg:x3; val_offset:70290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70290*FLEN/8, x4, x1, x2) - -inst_23431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87ff800; valaddr_reg:x3; val_offset:70293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70293*FLEN/8, x4, x1, x2) - -inst_23432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87ffc00; valaddr_reg:x3; val_offset:70296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70296*FLEN/8, x4, x1, x2) - -inst_23433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87ffe00; valaddr_reg:x3; val_offset:70299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70299*FLEN/8, x4, x1, x2) - -inst_23434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87fff00; valaddr_reg:x3; val_offset:70302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70302*FLEN/8, x4, x1, x2) - -inst_23435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87fff80; valaddr_reg:x3; val_offset:70305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70305*FLEN/8, x4, x1, x2) - -inst_23436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87fffc0; valaddr_reg:x3; val_offset:70308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70308*FLEN/8, x4, x1, x2) - -inst_23437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87fffe0; valaddr_reg:x3; val_offset:70311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70311*FLEN/8, x4, x1, x2) - -inst_23438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87ffff0; valaddr_reg:x3; val_offset:70314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70314*FLEN/8, x4, x1, x2) - -inst_23439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87ffff8; valaddr_reg:x3; val_offset:70317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70317*FLEN/8, x4, x1, x2) - -inst_23440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87ffffc; valaddr_reg:x3; val_offset:70320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70320*FLEN/8, x4, x1, x2) - -inst_23441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87ffffe; valaddr_reg:x3; val_offset:70323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70323*FLEN/8, x4, x1, x2) - -inst_23442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; -op3val:0xc87fffff; valaddr_reg:x3; val_offset:70326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70326*FLEN/8, x4, x1, x2) - -inst_23443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba000000; valaddr_reg:x3; val_offset:70329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70329*FLEN/8, x4, x1, x2) - -inst_23444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba000001; valaddr_reg:x3; val_offset:70332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70332*FLEN/8, x4, x1, x2) - -inst_23445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba000003; valaddr_reg:x3; val_offset:70335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70335*FLEN/8, x4, x1, x2) - -inst_23446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba000007; valaddr_reg:x3; val_offset:70338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70338*FLEN/8, x4, x1, x2) - -inst_23447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba00000f; valaddr_reg:x3; val_offset:70341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70341*FLEN/8, x4, x1, x2) - -inst_23448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba00001f; valaddr_reg:x3; val_offset:70344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70344*FLEN/8, x4, x1, x2) - -inst_23449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba00003f; valaddr_reg:x3; val_offset:70347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70347*FLEN/8, x4, x1, x2) - -inst_23450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba00007f; valaddr_reg:x3; val_offset:70350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70350*FLEN/8, x4, x1, x2) - -inst_23451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba0000ff; valaddr_reg:x3; val_offset:70353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70353*FLEN/8, x4, x1, x2) - -inst_23452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba0001ff; valaddr_reg:x3; val_offset:70356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70356*FLEN/8, x4, x1, x2) - -inst_23453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba0003ff; valaddr_reg:x3; val_offset:70359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70359*FLEN/8, x4, x1, x2) - -inst_23454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba0007ff; valaddr_reg:x3; val_offset:70362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70362*FLEN/8, x4, x1, x2) - -inst_23455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba000fff; valaddr_reg:x3; val_offset:70365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70365*FLEN/8, x4, x1, x2) - -inst_23456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba001fff; valaddr_reg:x3; val_offset:70368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70368*FLEN/8, x4, x1, x2) - -inst_23457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba003fff; valaddr_reg:x3; val_offset:70371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70371*FLEN/8, x4, x1, x2) - -inst_23458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba007fff; valaddr_reg:x3; val_offset:70374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70374*FLEN/8, x4, x1, x2) - -inst_23459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba00ffff; valaddr_reg:x3; val_offset:70377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70377*FLEN/8, x4, x1, x2) - -inst_23460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba01ffff; valaddr_reg:x3; val_offset:70380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70380*FLEN/8, x4, x1, x2) - -inst_23461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba03ffff; valaddr_reg:x3; val_offset:70383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70383*FLEN/8, x4, x1, x2) - -inst_23462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba07ffff; valaddr_reg:x3; val_offset:70386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70386*FLEN/8, x4, x1, x2) - -inst_23463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba0fffff; valaddr_reg:x3; val_offset:70389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70389*FLEN/8, x4, x1, x2) - -inst_23464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba1fffff; valaddr_reg:x3; val_offset:70392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70392*FLEN/8, x4, x1, x2) - -inst_23465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba3fffff; valaddr_reg:x3; val_offset:70395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70395*FLEN/8, x4, x1, x2) - -inst_23466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba400000; valaddr_reg:x3; val_offset:70398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70398*FLEN/8, x4, x1, x2) - -inst_23467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba600000; valaddr_reg:x3; val_offset:70401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70401*FLEN/8, x4, x1, x2) - -inst_23468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba700000; valaddr_reg:x3; val_offset:70404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70404*FLEN/8, x4, x1, x2) - -inst_23469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba780000; valaddr_reg:x3; val_offset:70407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70407*FLEN/8, x4, x1, x2) - -inst_23470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7c0000; valaddr_reg:x3; val_offset:70410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70410*FLEN/8, x4, x1, x2) - -inst_23471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7e0000; valaddr_reg:x3; val_offset:70413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70413*FLEN/8, x4, x1, x2) - -inst_23472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7f0000; valaddr_reg:x3; val_offset:70416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70416*FLEN/8, x4, x1, x2) - -inst_23473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7f8000; valaddr_reg:x3; val_offset:70419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70419*FLEN/8, x4, x1, x2) - -inst_23474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7fc000; valaddr_reg:x3; val_offset:70422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70422*FLEN/8, x4, x1, x2) - -inst_23475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7fe000; valaddr_reg:x3; val_offset:70425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70425*FLEN/8, x4, x1, x2) - -inst_23476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7ff000; valaddr_reg:x3; val_offset:70428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70428*FLEN/8, x4, x1, x2) - -inst_23477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7ff800; valaddr_reg:x3; val_offset:70431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70431*FLEN/8, x4, x1, x2) - -inst_23478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7ffc00; valaddr_reg:x3; val_offset:70434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70434*FLEN/8, x4, x1, x2) - -inst_23479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7ffe00; valaddr_reg:x3; val_offset:70437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70437*FLEN/8, x4, x1, x2) - -inst_23480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7fff00; valaddr_reg:x3; val_offset:70440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70440*FLEN/8, x4, x1, x2) - -inst_23481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7fff80; valaddr_reg:x3; val_offset:70443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70443*FLEN/8, x4, x1, x2) - -inst_23482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7fffc0; valaddr_reg:x3; val_offset:70446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70446*FLEN/8, x4, x1, x2) - -inst_23483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7fffe0; valaddr_reg:x3; val_offset:70449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70449*FLEN/8, x4, x1, x2) - -inst_23484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7ffff0; valaddr_reg:x3; val_offset:70452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70452*FLEN/8, x4, x1, x2) - -inst_23485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7ffff8; valaddr_reg:x3; val_offset:70455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70455*FLEN/8, x4, x1, x2) - -inst_23486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7ffffc; valaddr_reg:x3; val_offset:70458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70458*FLEN/8, x4, x1, x2) - -inst_23487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7ffffe; valaddr_reg:x3; val_offset:70461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70461*FLEN/8, x4, x1, x2) - -inst_23488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xba7fffff; valaddr_reg:x3; val_offset:70464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70464*FLEN/8, x4, x1, x2) - -inst_23489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbf800001; valaddr_reg:x3; val_offset:70467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70467*FLEN/8, x4, x1, x2) - -inst_23490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbf800003; valaddr_reg:x3; val_offset:70470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70470*FLEN/8, x4, x1, x2) - -inst_23491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbf800007; valaddr_reg:x3; val_offset:70473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70473*FLEN/8, x4, x1, x2) - -inst_23492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbf999999; valaddr_reg:x3; val_offset:70476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70476*FLEN/8, x4, x1, x2) - -inst_23493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:70479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70479*FLEN/8, x4, x1, x2) - -inst_23494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:70482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70482*FLEN/8, x4, x1, x2) - -inst_23495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:70485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70485*FLEN/8, x4, x1, x2) - -inst_23496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:70488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70488*FLEN/8, x4, x1, x2) - -inst_23497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:70491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70491*FLEN/8, x4, x1, x2) - -inst_23498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:70494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70494*FLEN/8, x4, x1, x2) - -inst_23499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:70497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70497*FLEN/8, x4, x1, x2) - -inst_23500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:70500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70500*FLEN/8, x4, x1, x2) - -inst_23501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:70503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70503*FLEN/8, x4, x1, x2) - -inst_23502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:70506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70506*FLEN/8, x4, x1, x2) - -inst_23503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:70509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70509*FLEN/8, x4, x1, x2) - -inst_23504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:70512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70512*FLEN/8, x4, x1, x2) - -inst_23505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:70515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70515*FLEN/8, x4, x1, x2) - -inst_23506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:70518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70518*FLEN/8, x4, x1, x2) - -inst_23507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:70521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70521*FLEN/8, x4, x1, x2) - -inst_23508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:70524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70524*FLEN/8, x4, x1, x2) - -inst_23509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:70527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70527*FLEN/8, x4, x1, x2) - -inst_23510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:70530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70530*FLEN/8, x4, x1, x2) - -inst_23511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:70533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70533*FLEN/8, x4, x1, x2) - -inst_23512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:70536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70536*FLEN/8, x4, x1, x2) - -inst_23513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:70539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70539*FLEN/8, x4, x1, x2) - -inst_23514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:70542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70542*FLEN/8, x4, x1, x2) - -inst_23515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:70545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70545*FLEN/8, x4, x1, x2) - -inst_23516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:70548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70548*FLEN/8, x4, x1, x2) - -inst_23517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:70551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70551*FLEN/8, x4, x1, x2) - -inst_23518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:70554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70554*FLEN/8, x4, x1, x2) - -inst_23519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:70557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70557*FLEN/8, x4, x1, x2) - -inst_23520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:70560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70560*FLEN/8, x4, x1, x2) - -inst_23521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3800000; valaddr_reg:x3; val_offset:70563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70563*FLEN/8, x4, x1, x2) - -inst_23522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3800001; valaddr_reg:x3; val_offset:70566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70566*FLEN/8, x4, x1, x2) - -inst_23523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3800003; valaddr_reg:x3; val_offset:70569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70569*FLEN/8, x4, x1, x2) - -inst_23524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3800007; valaddr_reg:x3; val_offset:70572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70572*FLEN/8, x4, x1, x2) - -inst_23525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x380000f; valaddr_reg:x3; val_offset:70575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70575*FLEN/8, x4, x1, x2) - -inst_23526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x380001f; valaddr_reg:x3; val_offset:70578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70578*FLEN/8, x4, x1, x2) - -inst_23527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x380003f; valaddr_reg:x3; val_offset:70581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70581*FLEN/8, x4, x1, x2) - -inst_23528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x380007f; valaddr_reg:x3; val_offset:70584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70584*FLEN/8, x4, x1, x2) - -inst_23529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x38000ff; valaddr_reg:x3; val_offset:70587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70587*FLEN/8, x4, x1, x2) - -inst_23530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x38001ff; valaddr_reg:x3; val_offset:70590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70590*FLEN/8, x4, x1, x2) - -inst_23531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x38003ff; valaddr_reg:x3; val_offset:70593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70593*FLEN/8, x4, x1, x2) - -inst_23532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x38007ff; valaddr_reg:x3; val_offset:70596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70596*FLEN/8, x4, x1, x2) - -inst_23533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3800fff; valaddr_reg:x3; val_offset:70599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70599*FLEN/8, x4, x1, x2) - -inst_23534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3801fff; valaddr_reg:x3; val_offset:70602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70602*FLEN/8, x4, x1, x2) - -inst_23535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3803fff; valaddr_reg:x3; val_offset:70605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70605*FLEN/8, x4, x1, x2) - -inst_23536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3807fff; valaddr_reg:x3; val_offset:70608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70608*FLEN/8, x4, x1, x2) - -inst_23537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x380ffff; valaddr_reg:x3; val_offset:70611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70611*FLEN/8, x4, x1, x2) - -inst_23538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x381ffff; valaddr_reg:x3; val_offset:70614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70614*FLEN/8, x4, x1, x2) - -inst_23539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x383ffff; valaddr_reg:x3; val_offset:70617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70617*FLEN/8, x4, x1, x2) - -inst_23540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x387ffff; valaddr_reg:x3; val_offset:70620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70620*FLEN/8, x4, x1, x2) - -inst_23541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x38fffff; valaddr_reg:x3; val_offset:70623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70623*FLEN/8, x4, x1, x2) - -inst_23542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x39fffff; valaddr_reg:x3; val_offset:70626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70626*FLEN/8, x4, x1, x2) - -inst_23543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3bfffff; valaddr_reg:x3; val_offset:70629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70629*FLEN/8, x4, x1, x2) - -inst_23544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3c00000; valaddr_reg:x3; val_offset:70632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70632*FLEN/8, x4, x1, x2) - -inst_23545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3e00000; valaddr_reg:x3; val_offset:70635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70635*FLEN/8, x4, x1, x2) - -inst_23546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3f00000; valaddr_reg:x3; val_offset:70638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70638*FLEN/8, x4, x1, x2) - -inst_23547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3f80000; valaddr_reg:x3; val_offset:70641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70641*FLEN/8, x4, x1, x2) - -inst_23548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fc0000; valaddr_reg:x3; val_offset:70644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70644*FLEN/8, x4, x1, x2) - -inst_23549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fe0000; valaddr_reg:x3; val_offset:70647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70647*FLEN/8, x4, x1, x2) - -inst_23550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ff0000; valaddr_reg:x3; val_offset:70650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70650*FLEN/8, x4, x1, x2) - -inst_23551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ff8000; valaddr_reg:x3; val_offset:70653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70653*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_185) - -inst_23552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ffc000; valaddr_reg:x3; val_offset:70656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70656*FLEN/8, x4, x1, x2) - -inst_23553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ffe000; valaddr_reg:x3; val_offset:70659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70659*FLEN/8, x4, x1, x2) - -inst_23554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fff000; valaddr_reg:x3; val_offset:70662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70662*FLEN/8, x4, x1, x2) - -inst_23555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fff800; valaddr_reg:x3; val_offset:70665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70665*FLEN/8, x4, x1, x2) - -inst_23556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fffc00; valaddr_reg:x3; val_offset:70668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70668*FLEN/8, x4, x1, x2) - -inst_23557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fffe00; valaddr_reg:x3; val_offset:70671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70671*FLEN/8, x4, x1, x2) - -inst_23558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ffff00; valaddr_reg:x3; val_offset:70674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70674*FLEN/8, x4, x1, x2) - -inst_23559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ffff80; valaddr_reg:x3; val_offset:70677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70677*FLEN/8, x4, x1, x2) - -inst_23560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ffffc0; valaddr_reg:x3; val_offset:70680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70680*FLEN/8, x4, x1, x2) - -inst_23561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ffffe0; valaddr_reg:x3; val_offset:70683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70683*FLEN/8, x4, x1, x2) - -inst_23562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fffff0; valaddr_reg:x3; val_offset:70686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70686*FLEN/8, x4, x1, x2) - -inst_23563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fffff8; valaddr_reg:x3; val_offset:70689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70689*FLEN/8, x4, x1, x2) - -inst_23564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fffffc; valaddr_reg:x3; val_offset:70692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70692*FLEN/8, x4, x1, x2) - -inst_23565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3fffffe; valaddr_reg:x3; val_offset:70695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70695*FLEN/8, x4, x1, x2) - -inst_23566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; -op3val:0x3ffffff; valaddr_reg:x3; val_offset:70698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70698*FLEN/8, x4, x1, x2) - -inst_23567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:70701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70701*FLEN/8, x4, x1, x2) - -inst_23568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:70704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70704*FLEN/8, x4, x1, x2) - -inst_23569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:70707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70707*FLEN/8, x4, x1, x2) - -inst_23570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:70710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70710*FLEN/8, x4, x1, x2) - -inst_23571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:70713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70713*FLEN/8, x4, x1, x2) - -inst_23572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:70716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70716*FLEN/8, x4, x1, x2) - -inst_23573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:70719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70719*FLEN/8, x4, x1, x2) - -inst_23574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:70722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70722*FLEN/8, x4, x1, x2) - -inst_23575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:70725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70725*FLEN/8, x4, x1, x2) - -inst_23576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:70728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70728*FLEN/8, x4, x1, x2) - -inst_23577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:70731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70731*FLEN/8, x4, x1, x2) - -inst_23578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:70734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70734*FLEN/8, x4, x1, x2) - -inst_23579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:70737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70737*FLEN/8, x4, x1, x2) - -inst_23580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:70740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70740*FLEN/8, x4, x1, x2) - -inst_23581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:70743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70743*FLEN/8, x4, x1, x2) - -inst_23582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:70746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70746*FLEN/8, x4, x1, x2) - -inst_23583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc000000; valaddr_reg:x3; val_offset:70749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70749*FLEN/8, x4, x1, x2) - -inst_23584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc000001; valaddr_reg:x3; val_offset:70752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70752*FLEN/8, x4, x1, x2) - -inst_23585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc000003; valaddr_reg:x3; val_offset:70755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70755*FLEN/8, x4, x1, x2) - -inst_23586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc000007; valaddr_reg:x3; val_offset:70758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70758*FLEN/8, x4, x1, x2) - -inst_23587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc00000f; valaddr_reg:x3; val_offset:70761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70761*FLEN/8, x4, x1, x2) - -inst_23588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc00001f; valaddr_reg:x3; val_offset:70764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70764*FLEN/8, x4, x1, x2) - -inst_23589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc00003f; valaddr_reg:x3; val_offset:70767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70767*FLEN/8, x4, x1, x2) - -inst_23590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc00007f; valaddr_reg:x3; val_offset:70770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70770*FLEN/8, x4, x1, x2) - -inst_23591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc0000ff; valaddr_reg:x3; val_offset:70773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70773*FLEN/8, x4, x1, x2) - -inst_23592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc0001ff; valaddr_reg:x3; val_offset:70776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70776*FLEN/8, x4, x1, x2) - -inst_23593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc0003ff; valaddr_reg:x3; val_offset:70779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70779*FLEN/8, x4, x1, x2) - -inst_23594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc0007ff; valaddr_reg:x3; val_offset:70782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70782*FLEN/8, x4, x1, x2) - -inst_23595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc000fff; valaddr_reg:x3; val_offset:70785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70785*FLEN/8, x4, x1, x2) - -inst_23596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc001fff; valaddr_reg:x3; val_offset:70788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70788*FLEN/8, x4, x1, x2) - -inst_23597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc003fff; valaddr_reg:x3; val_offset:70791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70791*FLEN/8, x4, x1, x2) - -inst_23598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc007fff; valaddr_reg:x3; val_offset:70794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70794*FLEN/8, x4, x1, x2) - -inst_23599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc00ffff; valaddr_reg:x3; val_offset:70797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70797*FLEN/8, x4, x1, x2) - -inst_23600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc01ffff; valaddr_reg:x3; val_offset:70800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70800*FLEN/8, x4, x1, x2) - -inst_23601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc03ffff; valaddr_reg:x3; val_offset:70803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70803*FLEN/8, x4, x1, x2) - -inst_23602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc07ffff; valaddr_reg:x3; val_offset:70806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70806*FLEN/8, x4, x1, x2) - -inst_23603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc0fffff; valaddr_reg:x3; val_offset:70809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70809*FLEN/8, x4, x1, x2) - -inst_23604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc1fffff; valaddr_reg:x3; val_offset:70812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70812*FLEN/8, x4, x1, x2) - -inst_23605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc3fffff; valaddr_reg:x3; val_offset:70815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70815*FLEN/8, x4, x1, x2) - -inst_23606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc400000; valaddr_reg:x3; val_offset:70818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70818*FLEN/8, x4, x1, x2) - -inst_23607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc600000; valaddr_reg:x3; val_offset:70821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70821*FLEN/8, x4, x1, x2) - -inst_23608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc700000; valaddr_reg:x3; val_offset:70824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70824*FLEN/8, x4, x1, x2) - -inst_23609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc780000; valaddr_reg:x3; val_offset:70827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70827*FLEN/8, x4, x1, x2) - -inst_23610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7c0000; valaddr_reg:x3; val_offset:70830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70830*FLEN/8, x4, x1, x2) - -inst_23611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7e0000; valaddr_reg:x3; val_offset:70833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70833*FLEN/8, x4, x1, x2) - -inst_23612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7f0000; valaddr_reg:x3; val_offset:70836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70836*FLEN/8, x4, x1, x2) - -inst_23613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7f8000; valaddr_reg:x3; val_offset:70839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70839*FLEN/8, x4, x1, x2) - -inst_23614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7fc000; valaddr_reg:x3; val_offset:70842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70842*FLEN/8, x4, x1, x2) - -inst_23615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7fe000; valaddr_reg:x3; val_offset:70845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70845*FLEN/8, x4, x1, x2) - -inst_23616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7ff000; valaddr_reg:x3; val_offset:70848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70848*FLEN/8, x4, x1, x2) - -inst_23617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7ff800; valaddr_reg:x3; val_offset:70851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70851*FLEN/8, x4, x1, x2) - -inst_23618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7ffc00; valaddr_reg:x3; val_offset:70854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70854*FLEN/8, x4, x1, x2) - -inst_23619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7ffe00; valaddr_reg:x3; val_offset:70857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70857*FLEN/8, x4, x1, x2) - -inst_23620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7fff00; valaddr_reg:x3; val_offset:70860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70860*FLEN/8, x4, x1, x2) - -inst_23621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7fff80; valaddr_reg:x3; val_offset:70863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70863*FLEN/8, x4, x1, x2) - -inst_23622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7fffc0; valaddr_reg:x3; val_offset:70866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70866*FLEN/8, x4, x1, x2) - -inst_23623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7fffe0; valaddr_reg:x3; val_offset:70869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70869*FLEN/8, x4, x1, x2) - -inst_23624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7ffff0; valaddr_reg:x3; val_offset:70872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70872*FLEN/8, x4, x1, x2) - -inst_23625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7ffff8; valaddr_reg:x3; val_offset:70875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70875*FLEN/8, x4, x1, x2) - -inst_23626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7ffffc; valaddr_reg:x3; val_offset:70878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70878*FLEN/8, x4, x1, x2) - -inst_23627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7ffffe; valaddr_reg:x3; val_offset:70881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70881*FLEN/8, x4, x1, x2) - -inst_23628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; -op3val:0xc7fffff; valaddr_reg:x3; val_offset:70884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70884*FLEN/8, x4, x1, x2) - -inst_23629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f800000; valaddr_reg:x3; val_offset:70887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70887*FLEN/8, x4, x1, x2) - -inst_23630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f800001; valaddr_reg:x3; val_offset:70890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70890*FLEN/8, x4, x1, x2) - -inst_23631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f800003; valaddr_reg:x3; val_offset:70893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70893*FLEN/8, x4, x1, x2) - -inst_23632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f800007; valaddr_reg:x3; val_offset:70896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70896*FLEN/8, x4, x1, x2) - -inst_23633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f80000f; valaddr_reg:x3; val_offset:70899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70899*FLEN/8, x4, x1, x2) - -inst_23634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f80001f; valaddr_reg:x3; val_offset:70902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70902*FLEN/8, x4, x1, x2) - -inst_23635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f80003f; valaddr_reg:x3; val_offset:70905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70905*FLEN/8, x4, x1, x2) - -inst_23636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f80007f; valaddr_reg:x3; val_offset:70908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70908*FLEN/8, x4, x1, x2) - -inst_23637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f8000ff; valaddr_reg:x3; val_offset:70911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70911*FLEN/8, x4, x1, x2) - -inst_23638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f8001ff; valaddr_reg:x3; val_offset:70914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70914*FLEN/8, x4, x1, x2) - -inst_23639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f8003ff; valaddr_reg:x3; val_offset:70917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70917*FLEN/8, x4, x1, x2) - -inst_23640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f8007ff; valaddr_reg:x3; val_offset:70920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70920*FLEN/8, x4, x1, x2) - -inst_23641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f800fff; valaddr_reg:x3; val_offset:70923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70923*FLEN/8, x4, x1, x2) - -inst_23642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f801fff; valaddr_reg:x3; val_offset:70926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70926*FLEN/8, x4, x1, x2) - -inst_23643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f803fff; valaddr_reg:x3; val_offset:70929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70929*FLEN/8, x4, x1, x2) - -inst_23644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f807fff; valaddr_reg:x3; val_offset:70932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70932*FLEN/8, x4, x1, x2) - -inst_23645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f80ffff; valaddr_reg:x3; val_offset:70935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70935*FLEN/8, x4, x1, x2) - -inst_23646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f81ffff; valaddr_reg:x3; val_offset:70938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70938*FLEN/8, x4, x1, x2) - -inst_23647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f83ffff; valaddr_reg:x3; val_offset:70941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70941*FLEN/8, x4, x1, x2) - -inst_23648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f87ffff; valaddr_reg:x3; val_offset:70944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70944*FLEN/8, x4, x1, x2) - -inst_23649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f8fffff; valaddr_reg:x3; val_offset:70947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70947*FLEN/8, x4, x1, x2) - -inst_23650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9f9fffff; valaddr_reg:x3; val_offset:70950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70950*FLEN/8, x4, x1, x2) - -inst_23651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fbfffff; valaddr_reg:x3; val_offset:70953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70953*FLEN/8, x4, x1, x2) - -inst_23652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fc00000; valaddr_reg:x3; val_offset:70956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70956*FLEN/8, x4, x1, x2) - -inst_23653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fe00000; valaddr_reg:x3; val_offset:70959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70959*FLEN/8, x4, x1, x2) - -inst_23654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ff00000; valaddr_reg:x3; val_offset:70962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70962*FLEN/8, x4, x1, x2) - -inst_23655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ff80000; valaddr_reg:x3; val_offset:70965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70965*FLEN/8, x4, x1, x2) - -inst_23656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffc0000; valaddr_reg:x3; val_offset:70968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70968*FLEN/8, x4, x1, x2) - -inst_23657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffe0000; valaddr_reg:x3; val_offset:70971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70971*FLEN/8, x4, x1, x2) - -inst_23658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fff0000; valaddr_reg:x3; val_offset:70974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70974*FLEN/8, x4, x1, x2) - -inst_23659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fff8000; valaddr_reg:x3; val_offset:70977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70977*FLEN/8, x4, x1, x2) - -inst_23660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fffc000; valaddr_reg:x3; val_offset:70980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70980*FLEN/8, x4, x1, x2) - -inst_23661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fffe000; valaddr_reg:x3; val_offset:70983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70983*FLEN/8, x4, x1, x2) - -inst_23662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffff000; valaddr_reg:x3; val_offset:70986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70986*FLEN/8, x4, x1, x2) - -inst_23663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffff800; valaddr_reg:x3; val_offset:70989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70989*FLEN/8, x4, x1, x2) - -inst_23664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffffc00; valaddr_reg:x3; val_offset:70992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70992*FLEN/8, x4, x1, x2) - -inst_23665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffffe00; valaddr_reg:x3; val_offset:70995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70995*FLEN/8, x4, x1, x2) - -inst_23666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fffff00; valaddr_reg:x3; val_offset:70998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70998*FLEN/8, x4, x1, x2) - -inst_23667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fffff80; valaddr_reg:x3; val_offset:71001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71001*FLEN/8, x4, x1, x2) - -inst_23668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fffffc0; valaddr_reg:x3; val_offset:71004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71004*FLEN/8, x4, x1, x2) - -inst_23669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fffffe0; valaddr_reg:x3; val_offset:71007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71007*FLEN/8, x4, x1, x2) - -inst_23670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffffff0; valaddr_reg:x3; val_offset:71010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71010*FLEN/8, x4, x1, x2) - -inst_23671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffffff8; valaddr_reg:x3; val_offset:71013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71013*FLEN/8, x4, x1, x2) - -inst_23672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffffffc; valaddr_reg:x3; val_offset:71016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71016*FLEN/8, x4, x1, x2) - -inst_23673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9ffffffe; valaddr_reg:x3; val_offset:71019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71019*FLEN/8, x4, x1, x2) - -inst_23674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0x9fffffff; valaddr_reg:x3; val_offset:71022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71022*FLEN/8, x4, x1, x2) - -inst_23675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbf800001; valaddr_reg:x3; val_offset:71025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71025*FLEN/8, x4, x1, x2) - -inst_23676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbf800003; valaddr_reg:x3; val_offset:71028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71028*FLEN/8, x4, x1, x2) - -inst_23677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbf800007; valaddr_reg:x3; val_offset:71031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71031*FLEN/8, x4, x1, x2) - -inst_23678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbf999999; valaddr_reg:x3; val_offset:71034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71034*FLEN/8, x4, x1, x2) - -inst_23679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:71037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71037*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_186) - -inst_23680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:71040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71040*FLEN/8, x4, x1, x2) - -inst_23681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:71043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71043*FLEN/8, x4, x1, x2) - -inst_23682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:71046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71046*FLEN/8, x4, x1, x2) - -inst_23683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:71049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71049*FLEN/8, x4, x1, x2) - -inst_23684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:71052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71052*FLEN/8, x4, x1, x2) - -inst_23685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:71055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71055*FLEN/8, x4, x1, x2) - -inst_23686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:71058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71058*FLEN/8, x4, x1, x2) - -inst_23687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:71061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71061*FLEN/8, x4, x1, x2) - -inst_23688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:71064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71064*FLEN/8, x4, x1, x2) - -inst_23689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:71067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71067*FLEN/8, x4, x1, x2) - -inst_23690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:71070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71070*FLEN/8, x4, x1, x2) - -inst_23691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:71073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71073*FLEN/8, x4, x1, x2) - -inst_23692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:71076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71076*FLEN/8, x4, x1, x2) - -inst_23693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:71079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71079*FLEN/8, x4, x1, x2) - -inst_23694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:71082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71082*FLEN/8, x4, x1, x2) - -inst_23695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:71085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71085*FLEN/8, x4, x1, x2) - -inst_23696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:71088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71088*FLEN/8, x4, x1, x2) - -inst_23697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:71091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71091*FLEN/8, x4, x1, x2) - -inst_23698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:71094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71094*FLEN/8, x4, x1, x2) - -inst_23699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:71097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71097*FLEN/8, x4, x1, x2) - -inst_23700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:71100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71100*FLEN/8, x4, x1, x2) - -inst_23701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:71103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71103*FLEN/8, x4, x1, x2) - -inst_23702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:71106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71106*FLEN/8, x4, x1, x2) - -inst_23703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:71109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71109*FLEN/8, x4, x1, x2) - -inst_23704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:71112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71112*FLEN/8, x4, x1, x2) - -inst_23705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:71115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71115*FLEN/8, x4, x1, x2) - -inst_23706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:71118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71118*FLEN/8, x4, x1, x2) - -inst_23707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4800000; valaddr_reg:x3; val_offset:71121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71121*FLEN/8, x4, x1, x2) - -inst_23708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4800001; valaddr_reg:x3; val_offset:71124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71124*FLEN/8, x4, x1, x2) - -inst_23709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4800003; valaddr_reg:x3; val_offset:71127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71127*FLEN/8, x4, x1, x2) - -inst_23710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4800007; valaddr_reg:x3; val_offset:71130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71130*FLEN/8, x4, x1, x2) - -inst_23711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x480000f; valaddr_reg:x3; val_offset:71133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71133*FLEN/8, x4, x1, x2) - -inst_23712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x480001f; valaddr_reg:x3; val_offset:71136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71136*FLEN/8, x4, x1, x2) - -inst_23713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x480003f; valaddr_reg:x3; val_offset:71139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71139*FLEN/8, x4, x1, x2) - -inst_23714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x480007f; valaddr_reg:x3; val_offset:71142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71142*FLEN/8, x4, x1, x2) - -inst_23715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x48000ff; valaddr_reg:x3; val_offset:71145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71145*FLEN/8, x4, x1, x2) - -inst_23716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x48001ff; valaddr_reg:x3; val_offset:71148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71148*FLEN/8, x4, x1, x2) - -inst_23717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x48003ff; valaddr_reg:x3; val_offset:71151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71151*FLEN/8, x4, x1, x2) - -inst_23718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x48007ff; valaddr_reg:x3; val_offset:71154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71154*FLEN/8, x4, x1, x2) - -inst_23719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4800fff; valaddr_reg:x3; val_offset:71157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71157*FLEN/8, x4, x1, x2) - -inst_23720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4801fff; valaddr_reg:x3; val_offset:71160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71160*FLEN/8, x4, x1, x2) - -inst_23721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4803fff; valaddr_reg:x3; val_offset:71163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71163*FLEN/8, x4, x1, x2) - -inst_23722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4807fff; valaddr_reg:x3; val_offset:71166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71166*FLEN/8, x4, x1, x2) - -inst_23723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x480ffff; valaddr_reg:x3; val_offset:71169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71169*FLEN/8, x4, x1, x2) - -inst_23724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x481ffff; valaddr_reg:x3; val_offset:71172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71172*FLEN/8, x4, x1, x2) - -inst_23725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x483ffff; valaddr_reg:x3; val_offset:71175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71175*FLEN/8, x4, x1, x2) - -inst_23726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x487ffff; valaddr_reg:x3; val_offset:71178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71178*FLEN/8, x4, x1, x2) - -inst_23727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x48fffff; valaddr_reg:x3; val_offset:71181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71181*FLEN/8, x4, x1, x2) - -inst_23728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x49fffff; valaddr_reg:x3; val_offset:71184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71184*FLEN/8, x4, x1, x2) - -inst_23729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4bfffff; valaddr_reg:x3; val_offset:71187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71187*FLEN/8, x4, x1, x2) - -inst_23730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4c00000; valaddr_reg:x3; val_offset:71190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71190*FLEN/8, x4, x1, x2) - -inst_23731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4e00000; valaddr_reg:x3; val_offset:71193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71193*FLEN/8, x4, x1, x2) - -inst_23732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4f00000; valaddr_reg:x3; val_offset:71196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71196*FLEN/8, x4, x1, x2) - -inst_23733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4f80000; valaddr_reg:x3; val_offset:71199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71199*FLEN/8, x4, x1, x2) - -inst_23734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fc0000; valaddr_reg:x3; val_offset:71202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71202*FLEN/8, x4, x1, x2) - -inst_23735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fe0000; valaddr_reg:x3; val_offset:71205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71205*FLEN/8, x4, x1, x2) - -inst_23736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ff0000; valaddr_reg:x3; val_offset:71208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71208*FLEN/8, x4, x1, x2) - -inst_23737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ff8000; valaddr_reg:x3; val_offset:71211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71211*FLEN/8, x4, x1, x2) - -inst_23738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ffc000; valaddr_reg:x3; val_offset:71214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71214*FLEN/8, x4, x1, x2) - -inst_23739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ffe000; valaddr_reg:x3; val_offset:71217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71217*FLEN/8, x4, x1, x2) - -inst_23740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fff000; valaddr_reg:x3; val_offset:71220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71220*FLEN/8, x4, x1, x2) - -inst_23741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fff800; valaddr_reg:x3; val_offset:71223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71223*FLEN/8, x4, x1, x2) - -inst_23742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fffc00; valaddr_reg:x3; val_offset:71226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71226*FLEN/8, x4, x1, x2) - -inst_23743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fffe00; valaddr_reg:x3; val_offset:71229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71229*FLEN/8, x4, x1, x2) - -inst_23744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ffff00; valaddr_reg:x3; val_offset:71232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71232*FLEN/8, x4, x1, x2) - -inst_23745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ffff80; valaddr_reg:x3; val_offset:71235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71235*FLEN/8, x4, x1, x2) - -inst_23746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ffffc0; valaddr_reg:x3; val_offset:71238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71238*FLEN/8, x4, x1, x2) - -inst_23747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ffffe0; valaddr_reg:x3; val_offset:71241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71241*FLEN/8, x4, x1, x2) - -inst_23748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fffff0; valaddr_reg:x3; val_offset:71244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71244*FLEN/8, x4, x1, x2) - -inst_23749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fffff8; valaddr_reg:x3; val_offset:71247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71247*FLEN/8, x4, x1, x2) - -inst_23750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fffffc; valaddr_reg:x3; val_offset:71250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71250*FLEN/8, x4, x1, x2) - -inst_23751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4fffffe; valaddr_reg:x3; val_offset:71253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71253*FLEN/8, x4, x1, x2) - -inst_23752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; -op3val:0x4ffffff; valaddr_reg:x3; val_offset:71256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71256*FLEN/8, x4, x1, x2) - -inst_23753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9000000; valaddr_reg:x3; val_offset:71259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71259*FLEN/8, x4, x1, x2) - -inst_23754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9000001; valaddr_reg:x3; val_offset:71262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71262*FLEN/8, x4, x1, x2) - -inst_23755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9000003; valaddr_reg:x3; val_offset:71265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71265*FLEN/8, x4, x1, x2) - -inst_23756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9000007; valaddr_reg:x3; val_offset:71268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71268*FLEN/8, x4, x1, x2) - -inst_23757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb900000f; valaddr_reg:x3; val_offset:71271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71271*FLEN/8, x4, x1, x2) - -inst_23758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb900001f; valaddr_reg:x3; val_offset:71274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71274*FLEN/8, x4, x1, x2) - -inst_23759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb900003f; valaddr_reg:x3; val_offset:71277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71277*FLEN/8, x4, x1, x2) - -inst_23760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb900007f; valaddr_reg:x3; val_offset:71280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71280*FLEN/8, x4, x1, x2) - -inst_23761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb90000ff; valaddr_reg:x3; val_offset:71283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71283*FLEN/8, x4, x1, x2) - -inst_23762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb90001ff; valaddr_reg:x3; val_offset:71286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71286*FLEN/8, x4, x1, x2) - -inst_23763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb90003ff; valaddr_reg:x3; val_offset:71289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71289*FLEN/8, x4, x1, x2) - -inst_23764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb90007ff; valaddr_reg:x3; val_offset:71292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71292*FLEN/8, x4, x1, x2) - -inst_23765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9000fff; valaddr_reg:x3; val_offset:71295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71295*FLEN/8, x4, x1, x2) - -inst_23766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9001fff; valaddr_reg:x3; val_offset:71298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71298*FLEN/8, x4, x1, x2) - -inst_23767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9003fff; valaddr_reg:x3; val_offset:71301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71301*FLEN/8, x4, x1, x2) - -inst_23768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9007fff; valaddr_reg:x3; val_offset:71304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71304*FLEN/8, x4, x1, x2) - -inst_23769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb900ffff; valaddr_reg:x3; val_offset:71307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71307*FLEN/8, x4, x1, x2) - -inst_23770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb901ffff; valaddr_reg:x3; val_offset:71310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71310*FLEN/8, x4, x1, x2) - -inst_23771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb903ffff; valaddr_reg:x3; val_offset:71313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71313*FLEN/8, x4, x1, x2) - -inst_23772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb907ffff; valaddr_reg:x3; val_offset:71316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71316*FLEN/8, x4, x1, x2) - -inst_23773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb90fffff; valaddr_reg:x3; val_offset:71319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71319*FLEN/8, x4, x1, x2) - -inst_23774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb91fffff; valaddr_reg:x3; val_offset:71322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71322*FLEN/8, x4, x1, x2) - -inst_23775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb93fffff; valaddr_reg:x3; val_offset:71325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71325*FLEN/8, x4, x1, x2) - -inst_23776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9400000; valaddr_reg:x3; val_offset:71328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71328*FLEN/8, x4, x1, x2) - -inst_23777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9600000; valaddr_reg:x3; val_offset:71331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71331*FLEN/8, x4, x1, x2) - -inst_23778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9700000; valaddr_reg:x3; val_offset:71334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71334*FLEN/8, x4, x1, x2) - -inst_23779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb9780000; valaddr_reg:x3; val_offset:71337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71337*FLEN/8, x4, x1, x2) - -inst_23780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97c0000; valaddr_reg:x3; val_offset:71340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71340*FLEN/8, x4, x1, x2) - -inst_23781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97e0000; valaddr_reg:x3; val_offset:71343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71343*FLEN/8, x4, x1, x2) - -inst_23782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97f0000; valaddr_reg:x3; val_offset:71346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71346*FLEN/8, x4, x1, x2) - -inst_23783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97f8000; valaddr_reg:x3; val_offset:71349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71349*FLEN/8, x4, x1, x2) - -inst_23784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97fc000; valaddr_reg:x3; val_offset:71352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71352*FLEN/8, x4, x1, x2) - -inst_23785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97fe000; valaddr_reg:x3; val_offset:71355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71355*FLEN/8, x4, x1, x2) - -inst_23786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97ff000; valaddr_reg:x3; val_offset:71358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71358*FLEN/8, x4, x1, x2) - -inst_23787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97ff800; valaddr_reg:x3; val_offset:71361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71361*FLEN/8, x4, x1, x2) - -inst_23788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97ffc00; valaddr_reg:x3; val_offset:71364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71364*FLEN/8, x4, x1, x2) - -inst_23789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97ffe00; valaddr_reg:x3; val_offset:71367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71367*FLEN/8, x4, x1, x2) - -inst_23790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97fff00; valaddr_reg:x3; val_offset:71370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71370*FLEN/8, x4, x1, x2) - -inst_23791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97fff80; valaddr_reg:x3; val_offset:71373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71373*FLEN/8, x4, x1, x2) - -inst_23792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97fffc0; valaddr_reg:x3; val_offset:71376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71376*FLEN/8, x4, x1, x2) - -inst_23793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97fffe0; valaddr_reg:x3; val_offset:71379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71379*FLEN/8, x4, x1, x2) - -inst_23794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97ffff0; valaddr_reg:x3; val_offset:71382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71382*FLEN/8, x4, x1, x2) - -inst_23795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97ffff8; valaddr_reg:x3; val_offset:71385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71385*FLEN/8, x4, x1, x2) - -inst_23796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97ffffc; valaddr_reg:x3; val_offset:71388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71388*FLEN/8, x4, x1, x2) - -inst_23797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97ffffe; valaddr_reg:x3; val_offset:71391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71391*FLEN/8, x4, x1, x2) - -inst_23798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xb97fffff; valaddr_reg:x3; val_offset:71394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71394*FLEN/8, x4, x1, x2) - -inst_23799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbf800001; valaddr_reg:x3; val_offset:71397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71397*FLEN/8, x4, x1, x2) - -inst_23800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbf800003; valaddr_reg:x3; val_offset:71400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71400*FLEN/8, x4, x1, x2) - -inst_23801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbf800007; valaddr_reg:x3; val_offset:71403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71403*FLEN/8, x4, x1, x2) - -inst_23802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbf999999; valaddr_reg:x3; val_offset:71406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71406*FLEN/8, x4, x1, x2) - -inst_23803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:71409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71409*FLEN/8, x4, x1, x2) - -inst_23804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:71412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71412*FLEN/8, x4, x1, x2) - -inst_23805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:71415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71415*FLEN/8, x4, x1, x2) - -inst_23806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:71418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71418*FLEN/8, x4, x1, x2) - -inst_23807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:71421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71421*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_187) - -inst_23808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:71424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71424*FLEN/8, x4, x1, x2) - -inst_23809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:71427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71427*FLEN/8, x4, x1, x2) - -inst_23810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:71430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71430*FLEN/8, x4, x1, x2) - -inst_23811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:71433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71433*FLEN/8, x4, x1, x2) - -inst_23812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:71436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71436*FLEN/8, x4, x1, x2) - -inst_23813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:71439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71439*FLEN/8, x4, x1, x2) - -inst_23814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:71442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71442*FLEN/8, x4, x1, x2) - -inst_23815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:71445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71445*FLEN/8, x4, x1, x2) - -inst_23816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:71448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71448*FLEN/8, x4, x1, x2) - -inst_23817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:71451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71451*FLEN/8, x4, x1, x2) - -inst_23818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:71454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71454*FLEN/8, x4, x1, x2) - -inst_23819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:71457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71457*FLEN/8, x4, x1, x2) - -inst_23820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:71460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71460*FLEN/8, x4, x1, x2) - -inst_23821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:71463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71463*FLEN/8, x4, x1, x2) - -inst_23822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:71466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71466*FLEN/8, x4, x1, x2) - -inst_23823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:71469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71469*FLEN/8, x4, x1, x2) - -inst_23824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:71472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71472*FLEN/8, x4, x1, x2) - -inst_23825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:71475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71475*FLEN/8, x4, x1, x2) - -inst_23826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:71478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71478*FLEN/8, x4, x1, x2) - -inst_23827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:71481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71481*FLEN/8, x4, x1, x2) - -inst_23828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:71484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71484*FLEN/8, x4, x1, x2) - -inst_23829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:71487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71487*FLEN/8, x4, x1, x2) - -inst_23830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:71490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71490*FLEN/8, x4, x1, x2) - -inst_23831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7800000; valaddr_reg:x3; val_offset:71493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71493*FLEN/8, x4, x1, x2) - -inst_23832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7800001; valaddr_reg:x3; val_offset:71496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71496*FLEN/8, x4, x1, x2) - -inst_23833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7800003; valaddr_reg:x3; val_offset:71499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71499*FLEN/8, x4, x1, x2) - -inst_23834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7800007; valaddr_reg:x3; val_offset:71502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71502*FLEN/8, x4, x1, x2) - -inst_23835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x780000f; valaddr_reg:x3; val_offset:71505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71505*FLEN/8, x4, x1, x2) - -inst_23836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x780001f; valaddr_reg:x3; val_offset:71508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71508*FLEN/8, x4, x1, x2) - -inst_23837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x780003f; valaddr_reg:x3; val_offset:71511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71511*FLEN/8, x4, x1, x2) - -inst_23838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x780007f; valaddr_reg:x3; val_offset:71514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71514*FLEN/8, x4, x1, x2) - -inst_23839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x78000ff; valaddr_reg:x3; val_offset:71517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71517*FLEN/8, x4, x1, x2) - -inst_23840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x78001ff; valaddr_reg:x3; val_offset:71520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71520*FLEN/8, x4, x1, x2) - -inst_23841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x78003ff; valaddr_reg:x3; val_offset:71523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71523*FLEN/8, x4, x1, x2) - -inst_23842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x78007ff; valaddr_reg:x3; val_offset:71526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71526*FLEN/8, x4, x1, x2) - -inst_23843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7800fff; valaddr_reg:x3; val_offset:71529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71529*FLEN/8, x4, x1, x2) - -inst_23844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7801fff; valaddr_reg:x3; val_offset:71532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71532*FLEN/8, x4, x1, x2) - -inst_23845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7803fff; valaddr_reg:x3; val_offset:71535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71535*FLEN/8, x4, x1, x2) - -inst_23846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7807fff; valaddr_reg:x3; val_offset:71538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71538*FLEN/8, x4, x1, x2) - -inst_23847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x780ffff; valaddr_reg:x3; val_offset:71541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71541*FLEN/8, x4, x1, x2) - -inst_23848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x781ffff; valaddr_reg:x3; val_offset:71544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71544*FLEN/8, x4, x1, x2) - -inst_23849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x783ffff; valaddr_reg:x3; val_offset:71547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71547*FLEN/8, x4, x1, x2) - -inst_23850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x787ffff; valaddr_reg:x3; val_offset:71550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71550*FLEN/8, x4, x1, x2) - -inst_23851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x78fffff; valaddr_reg:x3; val_offset:71553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71553*FLEN/8, x4, x1, x2) - -inst_23852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x79fffff; valaddr_reg:x3; val_offset:71556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71556*FLEN/8, x4, x1, x2) - -inst_23853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7bfffff; valaddr_reg:x3; val_offset:71559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71559*FLEN/8, x4, x1, x2) - -inst_23854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7c00000; valaddr_reg:x3; val_offset:71562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71562*FLEN/8, x4, x1, x2) - -inst_23855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7e00000; valaddr_reg:x3; val_offset:71565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71565*FLEN/8, x4, x1, x2) - -inst_23856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7f00000; valaddr_reg:x3; val_offset:71568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71568*FLEN/8, x4, x1, x2) - -inst_23857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7f80000; valaddr_reg:x3; val_offset:71571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71571*FLEN/8, x4, x1, x2) - -inst_23858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fc0000; valaddr_reg:x3; val_offset:71574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71574*FLEN/8, x4, x1, x2) - -inst_23859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fe0000; valaddr_reg:x3; val_offset:71577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71577*FLEN/8, x4, x1, x2) - -inst_23860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ff0000; valaddr_reg:x3; val_offset:71580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71580*FLEN/8, x4, x1, x2) - -inst_23861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ff8000; valaddr_reg:x3; val_offset:71583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71583*FLEN/8, x4, x1, x2) - -inst_23862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ffc000; valaddr_reg:x3; val_offset:71586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71586*FLEN/8, x4, x1, x2) - -inst_23863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ffe000; valaddr_reg:x3; val_offset:71589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71589*FLEN/8, x4, x1, x2) - -inst_23864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fff000; valaddr_reg:x3; val_offset:71592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71592*FLEN/8, x4, x1, x2) - -inst_23865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fff800; valaddr_reg:x3; val_offset:71595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71595*FLEN/8, x4, x1, x2) - -inst_23866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fffc00; valaddr_reg:x3; val_offset:71598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71598*FLEN/8, x4, x1, x2) - -inst_23867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fffe00; valaddr_reg:x3; val_offset:71601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71601*FLEN/8, x4, x1, x2) - -inst_23868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ffff00; valaddr_reg:x3; val_offset:71604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71604*FLEN/8, x4, x1, x2) - -inst_23869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ffff80; valaddr_reg:x3; val_offset:71607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71607*FLEN/8, x4, x1, x2) - -inst_23870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ffffc0; valaddr_reg:x3; val_offset:71610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71610*FLEN/8, x4, x1, x2) - -inst_23871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ffffe0; valaddr_reg:x3; val_offset:71613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71613*FLEN/8, x4, x1, x2) - -inst_23872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fffff0; valaddr_reg:x3; val_offset:71616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71616*FLEN/8, x4, x1, x2) - -inst_23873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fffff8; valaddr_reg:x3; val_offset:71619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71619*FLEN/8, x4, x1, x2) - -inst_23874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fffffc; valaddr_reg:x3; val_offset:71622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71622*FLEN/8, x4, x1, x2) - -inst_23875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7fffffe; valaddr_reg:x3; val_offset:71625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71625*FLEN/8, x4, x1, x2) - -inst_23876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; -op3val:0x7ffffff; valaddr_reg:x3; val_offset:71628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71628*FLEN/8, x4, x1, x2) - -inst_23877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb000000; valaddr_reg:x3; val_offset:71631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71631*FLEN/8, x4, x1, x2) - -inst_23878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb000001; valaddr_reg:x3; val_offset:71634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71634*FLEN/8, x4, x1, x2) - -inst_23879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb000003; valaddr_reg:x3; val_offset:71637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71637*FLEN/8, x4, x1, x2) - -inst_23880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb000007; valaddr_reg:x3; val_offset:71640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71640*FLEN/8, x4, x1, x2) - -inst_23881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb00000f; valaddr_reg:x3; val_offset:71643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71643*FLEN/8, x4, x1, x2) - -inst_23882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb00001f; valaddr_reg:x3; val_offset:71646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71646*FLEN/8, x4, x1, x2) - -inst_23883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb00003f; valaddr_reg:x3; val_offset:71649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71649*FLEN/8, x4, x1, x2) - -inst_23884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb00007f; valaddr_reg:x3; val_offset:71652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71652*FLEN/8, x4, x1, x2) - -inst_23885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb0000ff; valaddr_reg:x3; val_offset:71655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71655*FLEN/8, x4, x1, x2) - -inst_23886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb0001ff; valaddr_reg:x3; val_offset:71658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71658*FLEN/8, x4, x1, x2) - -inst_23887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb0003ff; valaddr_reg:x3; val_offset:71661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71661*FLEN/8, x4, x1, x2) - -inst_23888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb0007ff; valaddr_reg:x3; val_offset:71664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71664*FLEN/8, x4, x1, x2) - -inst_23889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb000fff; valaddr_reg:x3; val_offset:71667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71667*FLEN/8, x4, x1, x2) - -inst_23890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb001fff; valaddr_reg:x3; val_offset:71670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71670*FLEN/8, x4, x1, x2) - -inst_23891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb003fff; valaddr_reg:x3; val_offset:71673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71673*FLEN/8, x4, x1, x2) - -inst_23892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb007fff; valaddr_reg:x3; val_offset:71676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71676*FLEN/8, x4, x1, x2) - -inst_23893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb00ffff; valaddr_reg:x3; val_offset:71679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71679*FLEN/8, x4, x1, x2) - -inst_23894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb01ffff; valaddr_reg:x3; val_offset:71682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71682*FLEN/8, x4, x1, x2) - -inst_23895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb03ffff; valaddr_reg:x3; val_offset:71685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71685*FLEN/8, x4, x1, x2) - -inst_23896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb07ffff; valaddr_reg:x3; val_offset:71688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71688*FLEN/8, x4, x1, x2) - -inst_23897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb0fffff; valaddr_reg:x3; val_offset:71691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71691*FLEN/8, x4, x1, x2) - -inst_23898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb1fffff; valaddr_reg:x3; val_offset:71694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71694*FLEN/8, x4, x1, x2) - -inst_23899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb3fffff; valaddr_reg:x3; val_offset:71697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71697*FLEN/8, x4, x1, x2) - -inst_23900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb400000; valaddr_reg:x3; val_offset:71700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71700*FLEN/8, x4, x1, x2) - -inst_23901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb600000; valaddr_reg:x3; val_offset:71703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71703*FLEN/8, x4, x1, x2) - -inst_23902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb700000; valaddr_reg:x3; val_offset:71706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71706*FLEN/8, x4, x1, x2) - -inst_23903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb780000; valaddr_reg:x3; val_offset:71709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71709*FLEN/8, x4, x1, x2) - -inst_23904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7c0000; valaddr_reg:x3; val_offset:71712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71712*FLEN/8, x4, x1, x2) - -inst_23905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7e0000; valaddr_reg:x3; val_offset:71715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71715*FLEN/8, x4, x1, x2) - -inst_23906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7f0000; valaddr_reg:x3; val_offset:71718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71718*FLEN/8, x4, x1, x2) - -inst_23907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7f8000; valaddr_reg:x3; val_offset:71721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71721*FLEN/8, x4, x1, x2) - -inst_23908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7fc000; valaddr_reg:x3; val_offset:71724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71724*FLEN/8, x4, x1, x2) - -inst_23909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7fe000; valaddr_reg:x3; val_offset:71727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71727*FLEN/8, x4, x1, x2) - -inst_23910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7ff000; valaddr_reg:x3; val_offset:71730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71730*FLEN/8, x4, x1, x2) - -inst_23911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7ff800; valaddr_reg:x3; val_offset:71733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71733*FLEN/8, x4, x1, x2) - -inst_23912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7ffc00; valaddr_reg:x3; val_offset:71736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71736*FLEN/8, x4, x1, x2) - -inst_23913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7ffe00; valaddr_reg:x3; val_offset:71739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71739*FLEN/8, x4, x1, x2) - -inst_23914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7fff00; valaddr_reg:x3; val_offset:71742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71742*FLEN/8, x4, x1, x2) - -inst_23915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7fff80; valaddr_reg:x3; val_offset:71745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71745*FLEN/8, x4, x1, x2) - -inst_23916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7fffc0; valaddr_reg:x3; val_offset:71748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71748*FLEN/8, x4, x1, x2) - -inst_23917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7fffe0; valaddr_reg:x3; val_offset:71751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71751*FLEN/8, x4, x1, x2) - -inst_23918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7ffff0; valaddr_reg:x3; val_offset:71754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71754*FLEN/8, x4, x1, x2) - -inst_23919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7ffff8; valaddr_reg:x3; val_offset:71757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71757*FLEN/8, x4, x1, x2) - -inst_23920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7ffffc; valaddr_reg:x3; val_offset:71760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71760*FLEN/8, x4, x1, x2) - -inst_23921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7ffffe; valaddr_reg:x3; val_offset:71763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71763*FLEN/8, x4, x1, x2) - -inst_23922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xeb7fffff; valaddr_reg:x3; val_offset:71766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71766*FLEN/8, x4, x1, x2) - -inst_23923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff000001; valaddr_reg:x3; val_offset:71769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71769*FLEN/8, x4, x1, x2) - -inst_23924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff000003; valaddr_reg:x3; val_offset:71772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71772*FLEN/8, x4, x1, x2) - -inst_23925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff000007; valaddr_reg:x3; val_offset:71775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71775*FLEN/8, x4, x1, x2) - -inst_23926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff199999; valaddr_reg:x3; val_offset:71778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71778*FLEN/8, x4, x1, x2) - -inst_23927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff249249; valaddr_reg:x3; val_offset:71781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71781*FLEN/8, x4, x1, x2) - -inst_23928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff333333; valaddr_reg:x3; val_offset:71784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71784*FLEN/8, x4, x1, x2) - -inst_23929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:71787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71787*FLEN/8, x4, x1, x2) - -inst_23930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:71790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71790*FLEN/8, x4, x1, x2) - -inst_23931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff444444; valaddr_reg:x3; val_offset:71793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71793*FLEN/8, x4, x1, x2) - -inst_23932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:71796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71796*FLEN/8, x4, x1, x2) - -inst_23933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:71799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71799*FLEN/8, x4, x1, x2) - -inst_23934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff666666; valaddr_reg:x3; val_offset:71802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71802*FLEN/8, x4, x1, x2) - -inst_23935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:71805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71805*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_188) - -inst_23936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:71808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71808*FLEN/8, x4, x1, x2) - -inst_23937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:71811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71811*FLEN/8, x4, x1, x2) - -inst_23938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:71814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71814*FLEN/8, x4, x1, x2) - -inst_23939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c800000; valaddr_reg:x3; val_offset:71817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71817*FLEN/8, x4, x1, x2) - -inst_23940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c800001; valaddr_reg:x3; val_offset:71820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71820*FLEN/8, x4, x1, x2) - -inst_23941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c800003; valaddr_reg:x3; val_offset:71823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71823*FLEN/8, x4, x1, x2) - -inst_23942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c800007; valaddr_reg:x3; val_offset:71826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71826*FLEN/8, x4, x1, x2) - -inst_23943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c80000f; valaddr_reg:x3; val_offset:71829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71829*FLEN/8, x4, x1, x2) - -inst_23944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c80001f; valaddr_reg:x3; val_offset:71832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71832*FLEN/8, x4, x1, x2) - -inst_23945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c80003f; valaddr_reg:x3; val_offset:71835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71835*FLEN/8, x4, x1, x2) - -inst_23946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c80007f; valaddr_reg:x3; val_offset:71838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71838*FLEN/8, x4, x1, x2) - -inst_23947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c8000ff; valaddr_reg:x3; val_offset:71841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71841*FLEN/8, x4, x1, x2) - -inst_23948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c8001ff; valaddr_reg:x3; val_offset:71844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71844*FLEN/8, x4, x1, x2) - -inst_23949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c8003ff; valaddr_reg:x3; val_offset:71847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71847*FLEN/8, x4, x1, x2) - -inst_23950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c8007ff; valaddr_reg:x3; val_offset:71850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71850*FLEN/8, x4, x1, x2) - -inst_23951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c800fff; valaddr_reg:x3; val_offset:71853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71853*FLEN/8, x4, x1, x2) - -inst_23952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c801fff; valaddr_reg:x3; val_offset:71856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71856*FLEN/8, x4, x1, x2) - -inst_23953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c803fff; valaddr_reg:x3; val_offset:71859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71859*FLEN/8, x4, x1, x2) - -inst_23954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c807fff; valaddr_reg:x3; val_offset:71862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71862*FLEN/8, x4, x1, x2) - -inst_23955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c80ffff; valaddr_reg:x3; val_offset:71865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71865*FLEN/8, x4, x1, x2) - -inst_23956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c81ffff; valaddr_reg:x3; val_offset:71868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71868*FLEN/8, x4, x1, x2) - -inst_23957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c83ffff; valaddr_reg:x3; val_offset:71871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71871*FLEN/8, x4, x1, x2) - -inst_23958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c87ffff; valaddr_reg:x3; val_offset:71874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71874*FLEN/8, x4, x1, x2) - -inst_23959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c8fffff; valaddr_reg:x3; val_offset:71877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71877*FLEN/8, x4, x1, x2) - -inst_23960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3c9fffff; valaddr_reg:x3; val_offset:71880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71880*FLEN/8, x4, x1, x2) - -inst_23961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cbfffff; valaddr_reg:x3; val_offset:71883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71883*FLEN/8, x4, x1, x2) - -inst_23962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cc00000; valaddr_reg:x3; val_offset:71886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71886*FLEN/8, x4, x1, x2) - -inst_23963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3ce00000; valaddr_reg:x3; val_offset:71889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71889*FLEN/8, x4, x1, x2) - -inst_23964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cf00000; valaddr_reg:x3; val_offset:71892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71892*FLEN/8, x4, x1, x2) - -inst_23965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cf80000; valaddr_reg:x3; val_offset:71895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71895*FLEN/8, x4, x1, x2) - -inst_23966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfc0000; valaddr_reg:x3; val_offset:71898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71898*FLEN/8, x4, x1, x2) - -inst_23967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfe0000; valaddr_reg:x3; val_offset:71901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71901*FLEN/8, x4, x1, x2) - -inst_23968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cff0000; valaddr_reg:x3; val_offset:71904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71904*FLEN/8, x4, x1, x2) - -inst_23969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cff8000; valaddr_reg:x3; val_offset:71907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71907*FLEN/8, x4, x1, x2) - -inst_23970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cffc000; valaddr_reg:x3; val_offset:71910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71910*FLEN/8, x4, x1, x2) - -inst_23971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cffe000; valaddr_reg:x3; val_offset:71913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71913*FLEN/8, x4, x1, x2) - -inst_23972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfff000; valaddr_reg:x3; val_offset:71916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71916*FLEN/8, x4, x1, x2) - -inst_23973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfff800; valaddr_reg:x3; val_offset:71919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71919*FLEN/8, x4, x1, x2) - -inst_23974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfffc00; valaddr_reg:x3; val_offset:71922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71922*FLEN/8, x4, x1, x2) - -inst_23975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfffe00; valaddr_reg:x3; val_offset:71925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71925*FLEN/8, x4, x1, x2) - -inst_23976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cffff00; valaddr_reg:x3; val_offset:71928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71928*FLEN/8, x4, x1, x2) - -inst_23977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cffff80; valaddr_reg:x3; val_offset:71931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71931*FLEN/8, x4, x1, x2) - -inst_23978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cffffc0; valaddr_reg:x3; val_offset:71934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71934*FLEN/8, x4, x1, x2) - -inst_23979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cffffe0; valaddr_reg:x3; val_offset:71937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71937*FLEN/8, x4, x1, x2) - -inst_23980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfffff0; valaddr_reg:x3; val_offset:71940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71940*FLEN/8, x4, x1, x2) - -inst_23981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfffff8; valaddr_reg:x3; val_offset:71943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71943*FLEN/8, x4, x1, x2) - -inst_23982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfffffc; valaddr_reg:x3; val_offset:71946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71946*FLEN/8, x4, x1, x2) - -inst_23983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cfffffe; valaddr_reg:x3; val_offset:71949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71949*FLEN/8, x4, x1, x2) - -inst_23984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3cffffff; valaddr_reg:x3; val_offset:71952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71952*FLEN/8, x4, x1, x2) - -inst_23985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3f800001; valaddr_reg:x3; val_offset:71955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71955*FLEN/8, x4, x1, x2) - -inst_23986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3f800003; valaddr_reg:x3; val_offset:71958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71958*FLEN/8, x4, x1, x2) - -inst_23987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3f800007; valaddr_reg:x3; val_offset:71961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71961*FLEN/8, x4, x1, x2) - -inst_23988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3f999999; valaddr_reg:x3; val_offset:71964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71964*FLEN/8, x4, x1, x2) - -inst_23989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:71967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71967*FLEN/8, x4, x1, x2) - -inst_23990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:71970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71970*FLEN/8, x4, x1, x2) - -inst_23991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:71973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71973*FLEN/8, x4, x1, x2) - -inst_23992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:71976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71976*FLEN/8, x4, x1, x2) - -inst_23993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:71979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71979*FLEN/8, x4, x1, x2) - -inst_23994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:71982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71982*FLEN/8, x4, x1, x2) - -inst_23995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:71985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71985*FLEN/8, x4, x1, x2) - -inst_23996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:71988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71988*FLEN/8, x4, x1, x2) - -inst_23997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:71991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71991*FLEN/8, x4, x1, x2) - -inst_23998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:71994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71994*FLEN/8, x4, x1, x2) - -inst_23999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:71997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71997*FLEN/8, x4, x1, x2) - -inst_24000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:72000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72000*FLEN/8, x4, x1, x2) - -inst_24001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:72003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72003*FLEN/8, x4, x1, x2) - -inst_24002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:72006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72006*FLEN/8, x4, x1, x2) - -inst_24003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:72009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72009*FLEN/8, x4, x1, x2) - -inst_24004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:72012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72012*FLEN/8, x4, x1, x2) - -inst_24005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:72015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72015*FLEN/8, x4, x1, x2) - -inst_24006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:72018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72018*FLEN/8, x4, x1, x2) - -inst_24007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:72021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72021*FLEN/8, x4, x1, x2) - -inst_24008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:72024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72024*FLEN/8, x4, x1, x2) - -inst_24009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:72027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72027*FLEN/8, x4, x1, x2) - -inst_24010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:72030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72030*FLEN/8, x4, x1, x2) - -inst_24011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:72033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72033*FLEN/8, x4, x1, x2) - -inst_24012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:72036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72036*FLEN/8, x4, x1, x2) - -inst_24013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:72039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72039*FLEN/8, x4, x1, x2) - -inst_24014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:72042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72042*FLEN/8, x4, x1, x2) - -inst_24015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:72045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72045*FLEN/8, x4, x1, x2) - -inst_24016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:72048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72048*FLEN/8, x4, x1, x2) - -inst_24017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf000000; valaddr_reg:x3; val_offset:72051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72051*FLEN/8, x4, x1, x2) - -inst_24018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf000001; valaddr_reg:x3; val_offset:72054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72054*FLEN/8, x4, x1, x2) - -inst_24019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf000003; valaddr_reg:x3; val_offset:72057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72057*FLEN/8, x4, x1, x2) - -inst_24020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf000007; valaddr_reg:x3; val_offset:72060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72060*FLEN/8, x4, x1, x2) - -inst_24021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf00000f; valaddr_reg:x3; val_offset:72063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72063*FLEN/8, x4, x1, x2) - -inst_24022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf00001f; valaddr_reg:x3; val_offset:72066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72066*FLEN/8, x4, x1, x2) - -inst_24023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf00003f; valaddr_reg:x3; val_offset:72069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72069*FLEN/8, x4, x1, x2) - -inst_24024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf00007f; valaddr_reg:x3; val_offset:72072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72072*FLEN/8, x4, x1, x2) - -inst_24025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf0000ff; valaddr_reg:x3; val_offset:72075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72075*FLEN/8, x4, x1, x2) - -inst_24026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf0001ff; valaddr_reg:x3; val_offset:72078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72078*FLEN/8, x4, x1, x2) - -inst_24027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf0003ff; valaddr_reg:x3; val_offset:72081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72081*FLEN/8, x4, x1, x2) - -inst_24028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf0007ff; valaddr_reg:x3; val_offset:72084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72084*FLEN/8, x4, x1, x2) - -inst_24029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf000fff; valaddr_reg:x3; val_offset:72087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72087*FLEN/8, x4, x1, x2) - -inst_24030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf001fff; valaddr_reg:x3; val_offset:72090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72090*FLEN/8, x4, x1, x2) - -inst_24031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf003fff; valaddr_reg:x3; val_offset:72093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72093*FLEN/8, x4, x1, x2) - -inst_24032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf007fff; valaddr_reg:x3; val_offset:72096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72096*FLEN/8, x4, x1, x2) - -inst_24033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf00ffff; valaddr_reg:x3; val_offset:72099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72099*FLEN/8, x4, x1, x2) - -inst_24034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf01ffff; valaddr_reg:x3; val_offset:72102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72102*FLEN/8, x4, x1, x2) - -inst_24035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf03ffff; valaddr_reg:x3; val_offset:72105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72105*FLEN/8, x4, x1, x2) - -inst_24036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf07ffff; valaddr_reg:x3; val_offset:72108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72108*FLEN/8, x4, x1, x2) - -inst_24037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf0fffff; valaddr_reg:x3; val_offset:72111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72111*FLEN/8, x4, x1, x2) - -inst_24038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf1fffff; valaddr_reg:x3; val_offset:72114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72114*FLEN/8, x4, x1, x2) - -inst_24039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf3fffff; valaddr_reg:x3; val_offset:72117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72117*FLEN/8, x4, x1, x2) - -inst_24040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf400000; valaddr_reg:x3; val_offset:72120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72120*FLEN/8, x4, x1, x2) - -inst_24041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf600000; valaddr_reg:x3; val_offset:72123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72123*FLEN/8, x4, x1, x2) - -inst_24042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf700000; valaddr_reg:x3; val_offset:72126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72126*FLEN/8, x4, x1, x2) - -inst_24043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf780000; valaddr_reg:x3; val_offset:72129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72129*FLEN/8, x4, x1, x2) - -inst_24044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7c0000; valaddr_reg:x3; val_offset:72132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72132*FLEN/8, x4, x1, x2) - -inst_24045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7e0000; valaddr_reg:x3; val_offset:72135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72135*FLEN/8, x4, x1, x2) - -inst_24046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7f0000; valaddr_reg:x3; val_offset:72138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72138*FLEN/8, x4, x1, x2) - -inst_24047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7f8000; valaddr_reg:x3; val_offset:72141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72141*FLEN/8, x4, x1, x2) - -inst_24048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7fc000; valaddr_reg:x3; val_offset:72144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72144*FLEN/8, x4, x1, x2) - -inst_24049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7fe000; valaddr_reg:x3; val_offset:72147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72147*FLEN/8, x4, x1, x2) - -inst_24050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7ff000; valaddr_reg:x3; val_offset:72150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72150*FLEN/8, x4, x1, x2) - -inst_24051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7ff800; valaddr_reg:x3; val_offset:72153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72153*FLEN/8, x4, x1, x2) - -inst_24052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7ffc00; valaddr_reg:x3; val_offset:72156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72156*FLEN/8, x4, x1, x2) - -inst_24053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7ffe00; valaddr_reg:x3; val_offset:72159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72159*FLEN/8, x4, x1, x2) - -inst_24054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7fff00; valaddr_reg:x3; val_offset:72162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72162*FLEN/8, x4, x1, x2) - -inst_24055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7fff80; valaddr_reg:x3; val_offset:72165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72165*FLEN/8, x4, x1, x2) - -inst_24056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7fffc0; valaddr_reg:x3; val_offset:72168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72168*FLEN/8, x4, x1, x2) - -inst_24057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7fffe0; valaddr_reg:x3; val_offset:72171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72171*FLEN/8, x4, x1, x2) - -inst_24058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7ffff0; valaddr_reg:x3; val_offset:72174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72174*FLEN/8, x4, x1, x2) - -inst_24059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7ffff8; valaddr_reg:x3; val_offset:72177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72177*FLEN/8, x4, x1, x2) - -inst_24060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7ffffc; valaddr_reg:x3; val_offset:72180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72180*FLEN/8, x4, x1, x2) - -inst_24061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7ffffe; valaddr_reg:x3; val_offset:72183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72183*FLEN/8, x4, x1, x2) - -inst_24062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; -op3val:0xf7fffff; valaddr_reg:x3; val_offset:72186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72186*FLEN/8, x4, x1, x2) - -inst_24063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:72189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72189*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_189) - -inst_24064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:72192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72192*FLEN/8, x4, x1, x2) - -inst_24065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:72195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72195*FLEN/8, x4, x1, x2) - -inst_24066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:72198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72198*FLEN/8, x4, x1, x2) - -inst_24067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:72201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72201*FLEN/8, x4, x1, x2) - -inst_24068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:72204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72204*FLEN/8, x4, x1, x2) - -inst_24069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:72207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72207*FLEN/8, x4, x1, x2) - -inst_24070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:72210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72210*FLEN/8, x4, x1, x2) - -inst_24071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:72213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72213*FLEN/8, x4, x1, x2) - -inst_24072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:72216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72216*FLEN/8, x4, x1, x2) - -inst_24073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:72219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72219*FLEN/8, x4, x1, x2) - -inst_24074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:72222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72222*FLEN/8, x4, x1, x2) - -inst_24075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:72225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72225*FLEN/8, x4, x1, x2) - -inst_24076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:72228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72228*FLEN/8, x4, x1, x2) - -inst_24077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:72231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72231*FLEN/8, x4, x1, x2) - -inst_24078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:72234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72234*FLEN/8, x4, x1, x2) - -inst_24079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c000000; valaddr_reg:x3; val_offset:72237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72237*FLEN/8, x4, x1, x2) - -inst_24080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c000001; valaddr_reg:x3; val_offset:72240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72240*FLEN/8, x4, x1, x2) - -inst_24081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c000003; valaddr_reg:x3; val_offset:72243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72243*FLEN/8, x4, x1, x2) - -inst_24082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c000007; valaddr_reg:x3; val_offset:72246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72246*FLEN/8, x4, x1, x2) - -inst_24083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c00000f; valaddr_reg:x3; val_offset:72249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72249*FLEN/8, x4, x1, x2) - -inst_24084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c00001f; valaddr_reg:x3; val_offset:72252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72252*FLEN/8, x4, x1, x2) - -inst_24085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c00003f; valaddr_reg:x3; val_offset:72255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72255*FLEN/8, x4, x1, x2) - -inst_24086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c00007f; valaddr_reg:x3; val_offset:72258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72258*FLEN/8, x4, x1, x2) - -inst_24087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c0000ff; valaddr_reg:x3; val_offset:72261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72261*FLEN/8, x4, x1, x2) - -inst_24088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c0001ff; valaddr_reg:x3; val_offset:72264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72264*FLEN/8, x4, x1, x2) - -inst_24089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c0003ff; valaddr_reg:x3; val_offset:72267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72267*FLEN/8, x4, x1, x2) - -inst_24090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c0007ff; valaddr_reg:x3; val_offset:72270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72270*FLEN/8, x4, x1, x2) - -inst_24091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c000fff; valaddr_reg:x3; val_offset:72273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72273*FLEN/8, x4, x1, x2) - -inst_24092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c001fff; valaddr_reg:x3; val_offset:72276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72276*FLEN/8, x4, x1, x2) - -inst_24093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c003fff; valaddr_reg:x3; val_offset:72279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72279*FLEN/8, x4, x1, x2) - -inst_24094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c007fff; valaddr_reg:x3; val_offset:72282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72282*FLEN/8, x4, x1, x2) - -inst_24095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c00ffff; valaddr_reg:x3; val_offset:72285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72285*FLEN/8, x4, x1, x2) - -inst_24096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c01ffff; valaddr_reg:x3; val_offset:72288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72288*FLEN/8, x4, x1, x2) - -inst_24097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c03ffff; valaddr_reg:x3; val_offset:72291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72291*FLEN/8, x4, x1, x2) - -inst_24098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c07ffff; valaddr_reg:x3; val_offset:72294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72294*FLEN/8, x4, x1, x2) - -inst_24099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c0fffff; valaddr_reg:x3; val_offset:72297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72297*FLEN/8, x4, x1, x2) - -inst_24100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c1fffff; valaddr_reg:x3; val_offset:72300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72300*FLEN/8, x4, x1, x2) - -inst_24101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c3fffff; valaddr_reg:x3; val_offset:72303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72303*FLEN/8, x4, x1, x2) - -inst_24102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c400000; valaddr_reg:x3; val_offset:72306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72306*FLEN/8, x4, x1, x2) - -inst_24103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c600000; valaddr_reg:x3; val_offset:72309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72309*FLEN/8, x4, x1, x2) - -inst_24104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c700000; valaddr_reg:x3; val_offset:72312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72312*FLEN/8, x4, x1, x2) - -inst_24105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c780000; valaddr_reg:x3; val_offset:72315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72315*FLEN/8, x4, x1, x2) - -inst_24106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7c0000; valaddr_reg:x3; val_offset:72318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72318*FLEN/8, x4, x1, x2) - -inst_24107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7e0000; valaddr_reg:x3; val_offset:72321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72321*FLEN/8, x4, x1, x2) - -inst_24108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7f0000; valaddr_reg:x3; val_offset:72324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72324*FLEN/8, x4, x1, x2) - -inst_24109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7f8000; valaddr_reg:x3; val_offset:72327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72327*FLEN/8, x4, x1, x2) - -inst_24110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7fc000; valaddr_reg:x3; val_offset:72330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72330*FLEN/8, x4, x1, x2) - -inst_24111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7fe000; valaddr_reg:x3; val_offset:72333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72333*FLEN/8, x4, x1, x2) - -inst_24112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7ff000; valaddr_reg:x3; val_offset:72336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72336*FLEN/8, x4, x1, x2) - -inst_24113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7ff800; valaddr_reg:x3; val_offset:72339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72339*FLEN/8, x4, x1, x2) - -inst_24114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7ffc00; valaddr_reg:x3; val_offset:72342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72342*FLEN/8, x4, x1, x2) - -inst_24115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7ffe00; valaddr_reg:x3; val_offset:72345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72345*FLEN/8, x4, x1, x2) - -inst_24116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7fff00; valaddr_reg:x3; val_offset:72348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72348*FLEN/8, x4, x1, x2) - -inst_24117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7fff80; valaddr_reg:x3; val_offset:72351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72351*FLEN/8, x4, x1, x2) - -inst_24118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7fffc0; valaddr_reg:x3; val_offset:72354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72354*FLEN/8, x4, x1, x2) - -inst_24119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7fffe0; valaddr_reg:x3; val_offset:72357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72357*FLEN/8, x4, x1, x2) - -inst_24120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7ffff0; valaddr_reg:x3; val_offset:72360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72360*FLEN/8, x4, x1, x2) - -inst_24121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7ffff8; valaddr_reg:x3; val_offset:72363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72363*FLEN/8, x4, x1, x2) - -inst_24122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7ffffc; valaddr_reg:x3; val_offset:72366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72366*FLEN/8, x4, x1, x2) - -inst_24123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7ffffe; valaddr_reg:x3; val_offset:72369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72369*FLEN/8, x4, x1, x2) - -inst_24124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; -op3val:0x8c7fffff; valaddr_reg:x3; val_offset:72372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72372*FLEN/8, x4, x1, x2) - -inst_24125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:72375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72375*FLEN/8, x4, x1, x2) - -inst_24126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:72378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72378*FLEN/8, x4, x1, x2) - -inst_24127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:72381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72381*FLEN/8, x4, x1, x2) - -inst_24128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:72384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72384*FLEN/8, x4, x1, x2) - -inst_24129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:72387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72387*FLEN/8, x4, x1, x2) - -inst_24130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:72390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72390*FLEN/8, x4, x1, x2) - -inst_24131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:72393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72393*FLEN/8, x4, x1, x2) - -inst_24132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:72396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72396*FLEN/8, x4, x1, x2) - -inst_24133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:72399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72399*FLEN/8, x4, x1, x2) - -inst_24134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:72402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72402*FLEN/8, x4, x1, x2) - -inst_24135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:72405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72405*FLEN/8, x4, x1, x2) - -inst_24136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:72408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72408*FLEN/8, x4, x1, x2) - -inst_24137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:72411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72411*FLEN/8, x4, x1, x2) - -inst_24138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:72414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72414*FLEN/8, x4, x1, x2) - -inst_24139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:72417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72417*FLEN/8, x4, x1, x2) - -inst_24140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:72420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72420*FLEN/8, x4, x1, x2) - -inst_24141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd000000; valaddr_reg:x3; val_offset:72423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72423*FLEN/8, x4, x1, x2) - -inst_24142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd000001; valaddr_reg:x3; val_offset:72426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72426*FLEN/8, x4, x1, x2) - -inst_24143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd000003; valaddr_reg:x3; val_offset:72429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72429*FLEN/8, x4, x1, x2) - -inst_24144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd000007; valaddr_reg:x3; val_offset:72432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72432*FLEN/8, x4, x1, x2) - -inst_24145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd00000f; valaddr_reg:x3; val_offset:72435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72435*FLEN/8, x4, x1, x2) - -inst_24146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd00001f; valaddr_reg:x3; val_offset:72438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72438*FLEN/8, x4, x1, x2) - -inst_24147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd00003f; valaddr_reg:x3; val_offset:72441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72441*FLEN/8, x4, x1, x2) - -inst_24148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd00007f; valaddr_reg:x3; val_offset:72444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72444*FLEN/8, x4, x1, x2) - -inst_24149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd0000ff; valaddr_reg:x3; val_offset:72447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72447*FLEN/8, x4, x1, x2) - -inst_24150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd0001ff; valaddr_reg:x3; val_offset:72450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72450*FLEN/8, x4, x1, x2) - -inst_24151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd0003ff; valaddr_reg:x3; val_offset:72453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72453*FLEN/8, x4, x1, x2) - -inst_24152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd0007ff; valaddr_reg:x3; val_offset:72456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72456*FLEN/8, x4, x1, x2) - -inst_24153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd000fff; valaddr_reg:x3; val_offset:72459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72459*FLEN/8, x4, x1, x2) - -inst_24154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd001fff; valaddr_reg:x3; val_offset:72462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72462*FLEN/8, x4, x1, x2) - -inst_24155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd003fff; valaddr_reg:x3; val_offset:72465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72465*FLEN/8, x4, x1, x2) - -inst_24156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd007fff; valaddr_reg:x3; val_offset:72468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72468*FLEN/8, x4, x1, x2) - -inst_24157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd00ffff; valaddr_reg:x3; val_offset:72471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72471*FLEN/8, x4, x1, x2) - -inst_24158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd01ffff; valaddr_reg:x3; val_offset:72474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72474*FLEN/8, x4, x1, x2) - -inst_24159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd03ffff; valaddr_reg:x3; val_offset:72477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72477*FLEN/8, x4, x1, x2) - -inst_24160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd07ffff; valaddr_reg:x3; val_offset:72480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72480*FLEN/8, x4, x1, x2) - -inst_24161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd0fffff; valaddr_reg:x3; val_offset:72483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72483*FLEN/8, x4, x1, x2) - -inst_24162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd1fffff; valaddr_reg:x3; val_offset:72486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72486*FLEN/8, x4, x1, x2) - -inst_24163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd3fffff; valaddr_reg:x3; val_offset:72489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72489*FLEN/8, x4, x1, x2) - -inst_24164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd400000; valaddr_reg:x3; val_offset:72492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72492*FLEN/8, x4, x1, x2) - -inst_24165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd600000; valaddr_reg:x3; val_offset:72495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72495*FLEN/8, x4, x1, x2) - -inst_24166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd700000; valaddr_reg:x3; val_offset:72498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72498*FLEN/8, x4, x1, x2) - -inst_24167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd780000; valaddr_reg:x3; val_offset:72501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72501*FLEN/8, x4, x1, x2) - -inst_24168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7c0000; valaddr_reg:x3; val_offset:72504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72504*FLEN/8, x4, x1, x2) - -inst_24169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7e0000; valaddr_reg:x3; val_offset:72507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72507*FLEN/8, x4, x1, x2) - -inst_24170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7f0000; valaddr_reg:x3; val_offset:72510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72510*FLEN/8, x4, x1, x2) - -inst_24171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7f8000; valaddr_reg:x3; val_offset:72513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72513*FLEN/8, x4, x1, x2) - -inst_24172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7fc000; valaddr_reg:x3; val_offset:72516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72516*FLEN/8, x4, x1, x2) - -inst_24173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7fe000; valaddr_reg:x3; val_offset:72519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72519*FLEN/8, x4, x1, x2) - -inst_24174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7ff000; valaddr_reg:x3; val_offset:72522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72522*FLEN/8, x4, x1, x2) - -inst_24175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7ff800; valaddr_reg:x3; val_offset:72525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72525*FLEN/8, x4, x1, x2) - -inst_24176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7ffc00; valaddr_reg:x3; val_offset:72528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72528*FLEN/8, x4, x1, x2) - -inst_24177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7ffe00; valaddr_reg:x3; val_offset:72531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72531*FLEN/8, x4, x1, x2) - -inst_24178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7fff00; valaddr_reg:x3; val_offset:72534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72534*FLEN/8, x4, x1, x2) - -inst_24179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7fff80; valaddr_reg:x3; val_offset:72537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72537*FLEN/8, x4, x1, x2) - -inst_24180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7fffc0; valaddr_reg:x3; val_offset:72540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72540*FLEN/8, x4, x1, x2) - -inst_24181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7fffe0; valaddr_reg:x3; val_offset:72543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72543*FLEN/8, x4, x1, x2) - -inst_24182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7ffff0; valaddr_reg:x3; val_offset:72546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72546*FLEN/8, x4, x1, x2) - -inst_24183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7ffff8; valaddr_reg:x3; val_offset:72549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72549*FLEN/8, x4, x1, x2) - -inst_24184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7ffffc; valaddr_reg:x3; val_offset:72552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72552*FLEN/8, x4, x1, x2) - -inst_24185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7ffffe; valaddr_reg:x3; val_offset:72555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72555*FLEN/8, x4, x1, x2) - -inst_24186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; -op3val:0xd7fffff; valaddr_reg:x3; val_offset:72558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72558*FLEN/8, x4, x1, x2) - -inst_24187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff000000; valaddr_reg:x3; val_offset:72561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72561*FLEN/8, x4, x1, x2) - -inst_24188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff000001; valaddr_reg:x3; val_offset:72564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72564*FLEN/8, x4, x1, x2) - -inst_24189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff000003; valaddr_reg:x3; val_offset:72567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72567*FLEN/8, x4, x1, x2) - -inst_24190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff000007; valaddr_reg:x3; val_offset:72570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72570*FLEN/8, x4, x1, x2) - -inst_24191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff00000f; valaddr_reg:x3; val_offset:72573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72573*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_190) - -inst_24192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff00001f; valaddr_reg:x3; val_offset:72576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72576*FLEN/8, x4, x1, x2) - -inst_24193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff00003f; valaddr_reg:x3; val_offset:72579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72579*FLEN/8, x4, x1, x2) - -inst_24194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff00007f; valaddr_reg:x3; val_offset:72582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72582*FLEN/8, x4, x1, x2) - -inst_24195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff0000ff; valaddr_reg:x3; val_offset:72585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72585*FLEN/8, x4, x1, x2) - -inst_24196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff0001ff; valaddr_reg:x3; val_offset:72588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72588*FLEN/8, x4, x1, x2) - -inst_24197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff0003ff; valaddr_reg:x3; val_offset:72591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72591*FLEN/8, x4, x1, x2) - -inst_24198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff0007ff; valaddr_reg:x3; val_offset:72594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72594*FLEN/8, x4, x1, x2) - -inst_24199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff000fff; valaddr_reg:x3; val_offset:72597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72597*FLEN/8, x4, x1, x2) - -inst_24200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff001fff; valaddr_reg:x3; val_offset:72600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72600*FLEN/8, x4, x1, x2) - -inst_24201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff003fff; valaddr_reg:x3; val_offset:72603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72603*FLEN/8, x4, x1, x2) - -inst_24202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff007fff; valaddr_reg:x3; val_offset:72606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72606*FLEN/8, x4, x1, x2) - -inst_24203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff00ffff; valaddr_reg:x3; val_offset:72609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72609*FLEN/8, x4, x1, x2) - -inst_24204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff01ffff; valaddr_reg:x3; val_offset:72612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72612*FLEN/8, x4, x1, x2) - -inst_24205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff03ffff; valaddr_reg:x3; val_offset:72615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72615*FLEN/8, x4, x1, x2) - -inst_24206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff07ffff; valaddr_reg:x3; val_offset:72618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72618*FLEN/8, x4, x1, x2) - -inst_24207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff0fffff; valaddr_reg:x3; val_offset:72621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72621*FLEN/8, x4, x1, x2) - -inst_24208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff199999; valaddr_reg:x3; val_offset:72624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72624*FLEN/8, x4, x1, x2) - -inst_24209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff1fffff; valaddr_reg:x3; val_offset:72627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72627*FLEN/8, x4, x1, x2) - -inst_24210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff249249; valaddr_reg:x3; val_offset:72630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72630*FLEN/8, x4, x1, x2) - -inst_24211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff333333; valaddr_reg:x3; val_offset:72633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72633*FLEN/8, x4, x1, x2) - -inst_24212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:72636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72636*FLEN/8, x4, x1, x2) - -inst_24213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:72639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72639*FLEN/8, x4, x1, x2) - -inst_24214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff3fffff; valaddr_reg:x3; val_offset:72642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72642*FLEN/8, x4, x1, x2) - -inst_24215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff400000; valaddr_reg:x3; val_offset:72645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72645*FLEN/8, x4, x1, x2) - -inst_24216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff444444; valaddr_reg:x3; val_offset:72648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72648*FLEN/8, x4, x1, x2) - -inst_24217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:72651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72651*FLEN/8, x4, x1, x2) - -inst_24218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:72654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72654*FLEN/8, x4, x1, x2) - -inst_24219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff600000; valaddr_reg:x3; val_offset:72657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72657*FLEN/8, x4, x1, x2) - -inst_24220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff666666; valaddr_reg:x3; val_offset:72660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72660*FLEN/8, x4, x1, x2) - -inst_24221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:72663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72663*FLEN/8, x4, x1, x2) - -inst_24222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff700000; valaddr_reg:x3; val_offset:72666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72666*FLEN/8, x4, x1, x2) - -inst_24223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff780000; valaddr_reg:x3; val_offset:72669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72669*FLEN/8, x4, x1, x2) - -inst_24224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7c0000; valaddr_reg:x3; val_offset:72672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72672*FLEN/8, x4, x1, x2) - -inst_24225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7e0000; valaddr_reg:x3; val_offset:72675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72675*FLEN/8, x4, x1, x2) - -inst_24226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7f0000; valaddr_reg:x3; val_offset:72678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72678*FLEN/8, x4, x1, x2) - -inst_24227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7f8000; valaddr_reg:x3; val_offset:72681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72681*FLEN/8, x4, x1, x2) - -inst_24228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7fc000; valaddr_reg:x3; val_offset:72684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72684*FLEN/8, x4, x1, x2) - -inst_24229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7fe000; valaddr_reg:x3; val_offset:72687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72687*FLEN/8, x4, x1, x2) - -inst_24230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7ff000; valaddr_reg:x3; val_offset:72690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72690*FLEN/8, x4, x1, x2) - -inst_24231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7ff800; valaddr_reg:x3; val_offset:72693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72693*FLEN/8, x4, x1, x2) - -inst_24232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7ffc00; valaddr_reg:x3; val_offset:72696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72696*FLEN/8, x4, x1, x2) - -inst_24233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7ffe00; valaddr_reg:x3; val_offset:72699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72699*FLEN/8, x4, x1, x2) - -inst_24234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7fff00; valaddr_reg:x3; val_offset:72702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72702*FLEN/8, x4, x1, x2) - -inst_24235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7fff80; valaddr_reg:x3; val_offset:72705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72705*FLEN/8, x4, x1, x2) - -inst_24236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7fffc0; valaddr_reg:x3; val_offset:72708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72708*FLEN/8, x4, x1, x2) - -inst_24237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7fffe0; valaddr_reg:x3; val_offset:72711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72711*FLEN/8, x4, x1, x2) - -inst_24238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7ffff0; valaddr_reg:x3; val_offset:72714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72714*FLEN/8, x4, x1, x2) - -inst_24239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:72717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72717*FLEN/8, x4, x1, x2) - -inst_24240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:72720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72720*FLEN/8, x4, x1, x2) - -inst_24241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:72723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72723*FLEN/8, x4, x1, x2) - -inst_24242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; -op3val:0xff7fffff; valaddr_reg:x3; val_offset:72726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72726*FLEN/8, x4, x1, x2) - -inst_24243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd800000; valaddr_reg:x3; val_offset:72729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72729*FLEN/8, x4, x1, x2) - -inst_24244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd800001; valaddr_reg:x3; val_offset:72732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72732*FLEN/8, x4, x1, x2) - -inst_24245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd800003; valaddr_reg:x3; val_offset:72735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72735*FLEN/8, x4, x1, x2) - -inst_24246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd800007; valaddr_reg:x3; val_offset:72738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72738*FLEN/8, x4, x1, x2) - -inst_24247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd80000f; valaddr_reg:x3; val_offset:72741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72741*FLEN/8, x4, x1, x2) - -inst_24248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd80001f; valaddr_reg:x3; val_offset:72744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72744*FLEN/8, x4, x1, x2) - -inst_24249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd80003f; valaddr_reg:x3; val_offset:72747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72747*FLEN/8, x4, x1, x2) - -inst_24250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd80007f; valaddr_reg:x3; val_offset:72750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72750*FLEN/8, x4, x1, x2) - -inst_24251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd8000ff; valaddr_reg:x3; val_offset:72753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72753*FLEN/8, x4, x1, x2) - -inst_24252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd8001ff; valaddr_reg:x3; val_offset:72756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72756*FLEN/8, x4, x1, x2) - -inst_24253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd8003ff; valaddr_reg:x3; val_offset:72759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72759*FLEN/8, x4, x1, x2) - -inst_24254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd8007ff; valaddr_reg:x3; val_offset:72762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72762*FLEN/8, x4, x1, x2) - -inst_24255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd800fff; valaddr_reg:x3; val_offset:72765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72765*FLEN/8, x4, x1, x2) - -inst_24256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd801fff; valaddr_reg:x3; val_offset:72768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72768*FLEN/8, x4, x1, x2) - -inst_24257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd803fff; valaddr_reg:x3; val_offset:72771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72771*FLEN/8, x4, x1, x2) - -inst_24258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd807fff; valaddr_reg:x3; val_offset:72774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72774*FLEN/8, x4, x1, x2) - -inst_24259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd80ffff; valaddr_reg:x3; val_offset:72777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72777*FLEN/8, x4, x1, x2) - -inst_24260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd81ffff; valaddr_reg:x3; val_offset:72780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72780*FLEN/8, x4, x1, x2) - -inst_24261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd83ffff; valaddr_reg:x3; val_offset:72783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72783*FLEN/8, x4, x1, x2) - -inst_24262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd87ffff; valaddr_reg:x3; val_offset:72786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72786*FLEN/8, x4, x1, x2) - -inst_24263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd8fffff; valaddr_reg:x3; val_offset:72789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72789*FLEN/8, x4, x1, x2) - -inst_24264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbd9fffff; valaddr_reg:x3; val_offset:72792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72792*FLEN/8, x4, x1, x2) - -inst_24265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdbfffff; valaddr_reg:x3; val_offset:72795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72795*FLEN/8, x4, x1, x2) - -inst_24266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdc00000; valaddr_reg:x3; val_offset:72798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72798*FLEN/8, x4, x1, x2) - -inst_24267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbde00000; valaddr_reg:x3; val_offset:72801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72801*FLEN/8, x4, x1, x2) - -inst_24268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdf00000; valaddr_reg:x3; val_offset:72804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72804*FLEN/8, x4, x1, x2) - -inst_24269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdf80000; valaddr_reg:x3; val_offset:72807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72807*FLEN/8, x4, x1, x2) - -inst_24270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfc0000; valaddr_reg:x3; val_offset:72810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72810*FLEN/8, x4, x1, x2) - -inst_24271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfe0000; valaddr_reg:x3; val_offset:72813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72813*FLEN/8, x4, x1, x2) - -inst_24272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdff0000; valaddr_reg:x3; val_offset:72816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72816*FLEN/8, x4, x1, x2) - -inst_24273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdff8000; valaddr_reg:x3; val_offset:72819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72819*FLEN/8, x4, x1, x2) - -inst_24274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdffc000; valaddr_reg:x3; val_offset:72822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72822*FLEN/8, x4, x1, x2) - -inst_24275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdffe000; valaddr_reg:x3; val_offset:72825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72825*FLEN/8, x4, x1, x2) - -inst_24276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfff000; valaddr_reg:x3; val_offset:72828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72828*FLEN/8, x4, x1, x2) - -inst_24277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfff800; valaddr_reg:x3; val_offset:72831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72831*FLEN/8, x4, x1, x2) - -inst_24278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfffc00; valaddr_reg:x3; val_offset:72834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72834*FLEN/8, x4, x1, x2) - -inst_24279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfffe00; valaddr_reg:x3; val_offset:72837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72837*FLEN/8, x4, x1, x2) - -inst_24280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdffff00; valaddr_reg:x3; val_offset:72840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72840*FLEN/8, x4, x1, x2) - -inst_24281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdffff80; valaddr_reg:x3; val_offset:72843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72843*FLEN/8, x4, x1, x2) - -inst_24282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdffffc0; valaddr_reg:x3; val_offset:72846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72846*FLEN/8, x4, x1, x2) - -inst_24283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdffffe0; valaddr_reg:x3; val_offset:72849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72849*FLEN/8, x4, x1, x2) - -inst_24284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfffff0; valaddr_reg:x3; val_offset:72852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72852*FLEN/8, x4, x1, x2) - -inst_24285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfffff8; valaddr_reg:x3; val_offset:72855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72855*FLEN/8, x4, x1, x2) - -inst_24286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfffffc; valaddr_reg:x3; val_offset:72858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72858*FLEN/8, x4, x1, x2) - -inst_24287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdfffffe; valaddr_reg:x3; val_offset:72861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72861*FLEN/8, x4, x1, x2) - -inst_24288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbdffffff; valaddr_reg:x3; val_offset:72864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72864*FLEN/8, x4, x1, x2) - -inst_24289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbf800001; valaddr_reg:x3; val_offset:72867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72867*FLEN/8, x4, x1, x2) - -inst_24290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbf800003; valaddr_reg:x3; val_offset:72870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72870*FLEN/8, x4, x1, x2) - -inst_24291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbf800007; valaddr_reg:x3; val_offset:72873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72873*FLEN/8, x4, x1, x2) - -inst_24292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbf999999; valaddr_reg:x3; val_offset:72876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72876*FLEN/8, x4, x1, x2) - -inst_24293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:72879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72879*FLEN/8, x4, x1, x2) - -inst_24294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:72882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72882*FLEN/8, x4, x1, x2) - -inst_24295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:72885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72885*FLEN/8, x4, x1, x2) - -inst_24296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:72888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72888*FLEN/8, x4, x1, x2) - -inst_24297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:72891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72891*FLEN/8, x4, x1, x2) - -inst_24298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:72894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72894*FLEN/8, x4, x1, x2) - -inst_24299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:72897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72897*FLEN/8, x4, x1, x2) - -inst_24300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:72900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72900*FLEN/8, x4, x1, x2) - -inst_24301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:72903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72903*FLEN/8, x4, x1, x2) - -inst_24302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:72906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72906*FLEN/8, x4, x1, x2) - -inst_24303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:72909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72909*FLEN/8, x4, x1, x2) - -inst_24304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:72912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72912*FLEN/8, x4, x1, x2) - -inst_24305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed000000; valaddr_reg:x3; val_offset:72915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72915*FLEN/8, x4, x1, x2) - -inst_24306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed000001; valaddr_reg:x3; val_offset:72918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72918*FLEN/8, x4, x1, x2) - -inst_24307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed000003; valaddr_reg:x3; val_offset:72921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72921*FLEN/8, x4, x1, x2) - -inst_24308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed000007; valaddr_reg:x3; val_offset:72924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72924*FLEN/8, x4, x1, x2) - -inst_24309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed00000f; valaddr_reg:x3; val_offset:72927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72927*FLEN/8, x4, x1, x2) - -inst_24310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed00001f; valaddr_reg:x3; val_offset:72930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72930*FLEN/8, x4, x1, x2) - -inst_24311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed00003f; valaddr_reg:x3; val_offset:72933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72933*FLEN/8, x4, x1, x2) - -inst_24312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed00007f; valaddr_reg:x3; val_offset:72936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72936*FLEN/8, x4, x1, x2) - -inst_24313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed0000ff; valaddr_reg:x3; val_offset:72939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72939*FLEN/8, x4, x1, x2) - -inst_24314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed0001ff; valaddr_reg:x3; val_offset:72942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72942*FLEN/8, x4, x1, x2) - -inst_24315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed0003ff; valaddr_reg:x3; val_offset:72945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72945*FLEN/8, x4, x1, x2) - -inst_24316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed0007ff; valaddr_reg:x3; val_offset:72948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72948*FLEN/8, x4, x1, x2) - -inst_24317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed000fff; valaddr_reg:x3; val_offset:72951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72951*FLEN/8, x4, x1, x2) - -inst_24318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed001fff; valaddr_reg:x3; val_offset:72954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72954*FLEN/8, x4, x1, x2) - -inst_24319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed003fff; valaddr_reg:x3; val_offset:72957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72957*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_191) - -inst_24320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed007fff; valaddr_reg:x3; val_offset:72960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72960*FLEN/8, x4, x1, x2) - -inst_24321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed00ffff; valaddr_reg:x3; val_offset:72963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72963*FLEN/8, x4, x1, x2) - -inst_24322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed01ffff; valaddr_reg:x3; val_offset:72966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72966*FLEN/8, x4, x1, x2) - -inst_24323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed03ffff; valaddr_reg:x3; val_offset:72969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72969*FLEN/8, x4, x1, x2) - -inst_24324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed07ffff; valaddr_reg:x3; val_offset:72972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72972*FLEN/8, x4, x1, x2) - -inst_24325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed0fffff; valaddr_reg:x3; val_offset:72975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72975*FLEN/8, x4, x1, x2) - -inst_24326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed1fffff; valaddr_reg:x3; val_offset:72978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72978*FLEN/8, x4, x1, x2) - -inst_24327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed3fffff; valaddr_reg:x3; val_offset:72981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72981*FLEN/8, x4, x1, x2) - -inst_24328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed400000; valaddr_reg:x3; val_offset:72984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72984*FLEN/8, x4, x1, x2) - -inst_24329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed600000; valaddr_reg:x3; val_offset:72987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72987*FLEN/8, x4, x1, x2) - -inst_24330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed700000; valaddr_reg:x3; val_offset:72990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72990*FLEN/8, x4, x1, x2) - -inst_24331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed780000; valaddr_reg:x3; val_offset:72993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72993*FLEN/8, x4, x1, x2) - -inst_24332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7c0000; valaddr_reg:x3; val_offset:72996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72996*FLEN/8, x4, x1, x2) - -inst_24333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7e0000; valaddr_reg:x3; val_offset:72999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72999*FLEN/8, x4, x1, x2) - -inst_24334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7f0000; valaddr_reg:x3; val_offset:73002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73002*FLEN/8, x4, x1, x2) - -inst_24335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7f8000; valaddr_reg:x3; val_offset:73005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73005*FLEN/8, x4, x1, x2) - -inst_24336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7fc000; valaddr_reg:x3; val_offset:73008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73008*FLEN/8, x4, x1, x2) - -inst_24337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7fe000; valaddr_reg:x3; val_offset:73011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73011*FLEN/8, x4, x1, x2) - -inst_24338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7ff000; valaddr_reg:x3; val_offset:73014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73014*FLEN/8, x4, x1, x2) - -inst_24339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7ff800; valaddr_reg:x3; val_offset:73017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73017*FLEN/8, x4, x1, x2) - -inst_24340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7ffc00; valaddr_reg:x3; val_offset:73020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73020*FLEN/8, x4, x1, x2) - -inst_24341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7ffe00; valaddr_reg:x3; val_offset:73023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73023*FLEN/8, x4, x1, x2) - -inst_24342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7fff00; valaddr_reg:x3; val_offset:73026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73026*FLEN/8, x4, x1, x2) - -inst_24343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7fff80; valaddr_reg:x3; val_offset:73029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73029*FLEN/8, x4, x1, x2) - -inst_24344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7fffc0; valaddr_reg:x3; val_offset:73032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73032*FLEN/8, x4, x1, x2) - -inst_24345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7fffe0; valaddr_reg:x3; val_offset:73035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73035*FLEN/8, x4, x1, x2) - -inst_24346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7ffff0; valaddr_reg:x3; val_offset:73038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73038*FLEN/8, x4, x1, x2) - -inst_24347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7ffff8; valaddr_reg:x3; val_offset:73041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73041*FLEN/8, x4, x1, x2) - -inst_24348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7ffffc; valaddr_reg:x3; val_offset:73044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73044*FLEN/8, x4, x1, x2) - -inst_24349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7ffffe; valaddr_reg:x3; val_offset:73047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73047*FLEN/8, x4, x1, x2) - -inst_24350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xed7fffff; valaddr_reg:x3; val_offset:73050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73050*FLEN/8, x4, x1, x2) - -inst_24351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff000001; valaddr_reg:x3; val_offset:73053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73053*FLEN/8, x4, x1, x2) - -inst_24352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff000003; valaddr_reg:x3; val_offset:73056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73056*FLEN/8, x4, x1, x2) - -inst_24353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff000007; valaddr_reg:x3; val_offset:73059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73059*FLEN/8, x4, x1, x2) - -inst_24354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff199999; valaddr_reg:x3; val_offset:73062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73062*FLEN/8, x4, x1, x2) - -inst_24355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff249249; valaddr_reg:x3; val_offset:73065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73065*FLEN/8, x4, x1, x2) - -inst_24356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff333333; valaddr_reg:x3; val_offset:73068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73068*FLEN/8, x4, x1, x2) - -inst_24357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:73071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73071*FLEN/8, x4, x1, x2) - -inst_24358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:73074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73074*FLEN/8, x4, x1, x2) - -inst_24359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff444444; valaddr_reg:x3; val_offset:73077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73077*FLEN/8, x4, x1, x2) - -inst_24360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:73080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73080*FLEN/8, x4, x1, x2) - -inst_24361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:73083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73083*FLEN/8, x4, x1, x2) - -inst_24362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff666666; valaddr_reg:x3; val_offset:73086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73086*FLEN/8, x4, x1, x2) - -inst_24363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:73089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73089*FLEN/8, x4, x1, x2) - -inst_24364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:73092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73092*FLEN/8, x4, x1, x2) - -inst_24365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:73095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73095*FLEN/8, x4, x1, x2) - -inst_24366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:73098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73098*FLEN/8, x4, x1, x2) - -inst_24367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:73101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73101*FLEN/8, x4, x1, x2) - -inst_24368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:73104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73104*FLEN/8, x4, x1, x2) - -inst_24369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:73107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73107*FLEN/8, x4, x1, x2) - -inst_24370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:73110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73110*FLEN/8, x4, x1, x2) - -inst_24371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:73113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73113*FLEN/8, x4, x1, x2) - -inst_24372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:73116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73116*FLEN/8, x4, x1, x2) - -inst_24373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:73119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73119*FLEN/8, x4, x1, x2) - -inst_24374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:73122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73122*FLEN/8, x4, x1, x2) - -inst_24375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:73125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73125*FLEN/8, x4, x1, x2) - -inst_24376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:73128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73128*FLEN/8, x4, x1, x2) - -inst_24377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:73131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73131*FLEN/8, x4, x1, x2) - -inst_24378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:73134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73134*FLEN/8, x4, x1, x2) - -inst_24379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:73137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73137*FLEN/8, x4, x1, x2) - -inst_24380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:73140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73140*FLEN/8, x4, x1, x2) - -inst_24381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:73143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73143*FLEN/8, x4, x1, x2) - -inst_24382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:73146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73146*FLEN/8, x4, x1, x2) - -inst_24383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8000000; valaddr_reg:x3; val_offset:73149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73149*FLEN/8, x4, x1, x2) - -inst_24384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8000001; valaddr_reg:x3; val_offset:73152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73152*FLEN/8, x4, x1, x2) - -inst_24385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8000003; valaddr_reg:x3; val_offset:73155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73155*FLEN/8, x4, x1, x2) - -inst_24386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8000007; valaddr_reg:x3; val_offset:73158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73158*FLEN/8, x4, x1, x2) - -inst_24387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x800000f; valaddr_reg:x3; val_offset:73161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73161*FLEN/8, x4, x1, x2) - -inst_24388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x800001f; valaddr_reg:x3; val_offset:73164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73164*FLEN/8, x4, x1, x2) - -inst_24389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x800003f; valaddr_reg:x3; val_offset:73167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73167*FLEN/8, x4, x1, x2) - -inst_24390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x800007f; valaddr_reg:x3; val_offset:73170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73170*FLEN/8, x4, x1, x2) - -inst_24391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x80000ff; valaddr_reg:x3; val_offset:73173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73173*FLEN/8, x4, x1, x2) - -inst_24392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x80001ff; valaddr_reg:x3; val_offset:73176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73176*FLEN/8, x4, x1, x2) - -inst_24393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x80003ff; valaddr_reg:x3; val_offset:73179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73179*FLEN/8, x4, x1, x2) - -inst_24394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x80007ff; valaddr_reg:x3; val_offset:73182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73182*FLEN/8, x4, x1, x2) - -inst_24395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8000fff; valaddr_reg:x3; val_offset:73185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73185*FLEN/8, x4, x1, x2) - -inst_24396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8001fff; valaddr_reg:x3; val_offset:73188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73188*FLEN/8, x4, x1, x2) - -inst_24397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8003fff; valaddr_reg:x3; val_offset:73191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73191*FLEN/8, x4, x1, x2) - -inst_24398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8007fff; valaddr_reg:x3; val_offset:73194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73194*FLEN/8, x4, x1, x2) - -inst_24399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x800ffff; valaddr_reg:x3; val_offset:73197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73197*FLEN/8, x4, x1, x2) - -inst_24400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x801ffff; valaddr_reg:x3; val_offset:73200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73200*FLEN/8, x4, x1, x2) - -inst_24401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x803ffff; valaddr_reg:x3; val_offset:73203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73203*FLEN/8, x4, x1, x2) - -inst_24402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x807ffff; valaddr_reg:x3; val_offset:73206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73206*FLEN/8, x4, x1, x2) - -inst_24403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x80fffff; valaddr_reg:x3; val_offset:73209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73209*FLEN/8, x4, x1, x2) - -inst_24404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x81fffff; valaddr_reg:x3; val_offset:73212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73212*FLEN/8, x4, x1, x2) - -inst_24405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x83fffff; valaddr_reg:x3; val_offset:73215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73215*FLEN/8, x4, x1, x2) - -inst_24406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8400000; valaddr_reg:x3; val_offset:73218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73218*FLEN/8, x4, x1, x2) - -inst_24407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8600000; valaddr_reg:x3; val_offset:73221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73221*FLEN/8, x4, x1, x2) - -inst_24408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8700000; valaddr_reg:x3; val_offset:73224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73224*FLEN/8, x4, x1, x2) - -inst_24409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x8780000; valaddr_reg:x3; val_offset:73227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73227*FLEN/8, x4, x1, x2) - -inst_24410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87c0000; valaddr_reg:x3; val_offset:73230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73230*FLEN/8, x4, x1, x2) - -inst_24411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87e0000; valaddr_reg:x3; val_offset:73233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73233*FLEN/8, x4, x1, x2) - -inst_24412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87f0000; valaddr_reg:x3; val_offset:73236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73236*FLEN/8, x4, x1, x2) - -inst_24413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87f8000; valaddr_reg:x3; val_offset:73239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73239*FLEN/8, x4, x1, x2) - -inst_24414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87fc000; valaddr_reg:x3; val_offset:73242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73242*FLEN/8, x4, x1, x2) - -inst_24415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87fe000; valaddr_reg:x3; val_offset:73245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73245*FLEN/8, x4, x1, x2) - -inst_24416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87ff000; valaddr_reg:x3; val_offset:73248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73248*FLEN/8, x4, x1, x2) - -inst_24417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87ff800; valaddr_reg:x3; val_offset:73251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73251*FLEN/8, x4, x1, x2) - -inst_24418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87ffc00; valaddr_reg:x3; val_offset:73254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73254*FLEN/8, x4, x1, x2) - -inst_24419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87ffe00; valaddr_reg:x3; val_offset:73257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73257*FLEN/8, x4, x1, x2) - -inst_24420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87fff00; valaddr_reg:x3; val_offset:73260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73260*FLEN/8, x4, x1, x2) - -inst_24421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87fff80; valaddr_reg:x3; val_offset:73263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73263*FLEN/8, x4, x1, x2) - -inst_24422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87fffc0; valaddr_reg:x3; val_offset:73266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73266*FLEN/8, x4, x1, x2) - -inst_24423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87fffe0; valaddr_reg:x3; val_offset:73269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73269*FLEN/8, x4, x1, x2) - -inst_24424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87ffff0; valaddr_reg:x3; val_offset:73272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73272*FLEN/8, x4, x1, x2) - -inst_24425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87ffff8; valaddr_reg:x3; val_offset:73275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73275*FLEN/8, x4, x1, x2) - -inst_24426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87ffffc; valaddr_reg:x3; val_offset:73278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73278*FLEN/8, x4, x1, x2) - -inst_24427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87ffffe; valaddr_reg:x3; val_offset:73281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73281*FLEN/8, x4, x1, x2) - -inst_24428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; -op3val:0x87fffff; valaddr_reg:x3; val_offset:73284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73284*FLEN/8, x4, x1, x2) - -inst_24429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:73287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73287*FLEN/8, x4, x1, x2) - -inst_24430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:73290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73290*FLEN/8, x4, x1, x2) - -inst_24431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:73293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73293*FLEN/8, x4, x1, x2) - -inst_24432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:73296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73296*FLEN/8, x4, x1, x2) - -inst_24433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:73299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73299*FLEN/8, x4, x1, x2) - -inst_24434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:73302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73302*FLEN/8, x4, x1, x2) - -inst_24435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:73305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73305*FLEN/8, x4, x1, x2) - -inst_24436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:73308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73308*FLEN/8, x4, x1, x2) - -inst_24437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:73311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73311*FLEN/8, x4, x1, x2) - -inst_24438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:73314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73314*FLEN/8, x4, x1, x2) - -inst_24439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:73317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73317*FLEN/8, x4, x1, x2) - -inst_24440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:73320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73320*FLEN/8, x4, x1, x2) - -inst_24441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:73323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73323*FLEN/8, x4, x1, x2) - -inst_24442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:73326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73326*FLEN/8, x4, x1, x2) - -inst_24443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:73329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73329*FLEN/8, x4, x1, x2) - -inst_24444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:73332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73332*FLEN/8, x4, x1, x2) - -inst_24445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd000000; valaddr_reg:x3; val_offset:73335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73335*FLEN/8, x4, x1, x2) - -inst_24446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd000001; valaddr_reg:x3; val_offset:73338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73338*FLEN/8, x4, x1, x2) - -inst_24447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd000003; valaddr_reg:x3; val_offset:73341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73341*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_192) - -inst_24448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd000007; valaddr_reg:x3; val_offset:73344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73344*FLEN/8, x4, x1, x2) - -inst_24449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd00000f; valaddr_reg:x3; val_offset:73347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73347*FLEN/8, x4, x1, x2) - -inst_24450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd00001f; valaddr_reg:x3; val_offset:73350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73350*FLEN/8, x4, x1, x2) - -inst_24451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd00003f; valaddr_reg:x3; val_offset:73353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73353*FLEN/8, x4, x1, x2) - -inst_24452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd00007f; valaddr_reg:x3; val_offset:73356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73356*FLEN/8, x4, x1, x2) - -inst_24453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd0000ff; valaddr_reg:x3; val_offset:73359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73359*FLEN/8, x4, x1, x2) - -inst_24454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd0001ff; valaddr_reg:x3; val_offset:73362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73362*FLEN/8, x4, x1, x2) - -inst_24455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd0003ff; valaddr_reg:x3; val_offset:73365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73365*FLEN/8, x4, x1, x2) - -inst_24456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd0007ff; valaddr_reg:x3; val_offset:73368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73368*FLEN/8, x4, x1, x2) - -inst_24457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd000fff; valaddr_reg:x3; val_offset:73371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73371*FLEN/8, x4, x1, x2) - -inst_24458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd001fff; valaddr_reg:x3; val_offset:73374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73374*FLEN/8, x4, x1, x2) - -inst_24459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd003fff; valaddr_reg:x3; val_offset:73377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73377*FLEN/8, x4, x1, x2) - -inst_24460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd007fff; valaddr_reg:x3; val_offset:73380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73380*FLEN/8, x4, x1, x2) - -inst_24461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd00ffff; valaddr_reg:x3; val_offset:73383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73383*FLEN/8, x4, x1, x2) - -inst_24462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd01ffff; valaddr_reg:x3; val_offset:73386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73386*FLEN/8, x4, x1, x2) - -inst_24463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd03ffff; valaddr_reg:x3; val_offset:73389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73389*FLEN/8, x4, x1, x2) - -inst_24464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd07ffff; valaddr_reg:x3; val_offset:73392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73392*FLEN/8, x4, x1, x2) - -inst_24465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd0fffff; valaddr_reg:x3; val_offset:73395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73395*FLEN/8, x4, x1, x2) - -inst_24466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd1fffff; valaddr_reg:x3; val_offset:73398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73398*FLEN/8, x4, x1, x2) - -inst_24467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd3fffff; valaddr_reg:x3; val_offset:73401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73401*FLEN/8, x4, x1, x2) - -inst_24468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd400000; valaddr_reg:x3; val_offset:73404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73404*FLEN/8, x4, x1, x2) - -inst_24469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd600000; valaddr_reg:x3; val_offset:73407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73407*FLEN/8, x4, x1, x2) - -inst_24470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd700000; valaddr_reg:x3; val_offset:73410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73410*FLEN/8, x4, x1, x2) - -inst_24471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd780000; valaddr_reg:x3; val_offset:73413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73413*FLEN/8, x4, x1, x2) - -inst_24472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7c0000; valaddr_reg:x3; val_offset:73416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73416*FLEN/8, x4, x1, x2) - -inst_24473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7e0000; valaddr_reg:x3; val_offset:73419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73419*FLEN/8, x4, x1, x2) - -inst_24474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7f0000; valaddr_reg:x3; val_offset:73422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73422*FLEN/8, x4, x1, x2) - -inst_24475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7f8000; valaddr_reg:x3; val_offset:73425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73425*FLEN/8, x4, x1, x2) - -inst_24476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7fc000; valaddr_reg:x3; val_offset:73428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73428*FLEN/8, x4, x1, x2) - -inst_24477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7fe000; valaddr_reg:x3; val_offset:73431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73431*FLEN/8, x4, x1, x2) - -inst_24478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7ff000; valaddr_reg:x3; val_offset:73434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73434*FLEN/8, x4, x1, x2) - -inst_24479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7ff800; valaddr_reg:x3; val_offset:73437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73437*FLEN/8, x4, x1, x2) - -inst_24480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7ffc00; valaddr_reg:x3; val_offset:73440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73440*FLEN/8, x4, x1, x2) - -inst_24481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7ffe00; valaddr_reg:x3; val_offset:73443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73443*FLEN/8, x4, x1, x2) - -inst_24482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7fff00; valaddr_reg:x3; val_offset:73446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73446*FLEN/8, x4, x1, x2) - -inst_24483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7fff80; valaddr_reg:x3; val_offset:73449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73449*FLEN/8, x4, x1, x2) - -inst_24484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7fffc0; valaddr_reg:x3; val_offset:73452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73452*FLEN/8, x4, x1, x2) - -inst_24485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7fffe0; valaddr_reg:x3; val_offset:73455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73455*FLEN/8, x4, x1, x2) - -inst_24486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7ffff0; valaddr_reg:x3; val_offset:73458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73458*FLEN/8, x4, x1, x2) - -inst_24487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7ffff8; valaddr_reg:x3; val_offset:73461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73461*FLEN/8, x4, x1, x2) - -inst_24488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7ffffc; valaddr_reg:x3; val_offset:73464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73464*FLEN/8, x4, x1, x2) - -inst_24489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7ffffe; valaddr_reg:x3; val_offset:73467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73467*FLEN/8, x4, x1, x2) - -inst_24490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; -op3val:0xd7fffff; valaddr_reg:x3; val_offset:73470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73470*FLEN/8, x4, x1, x2) - -inst_24491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e000000; valaddr_reg:x3; val_offset:73473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73473*FLEN/8, x4, x1, x2) - -inst_24492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e000001; valaddr_reg:x3; val_offset:73476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73476*FLEN/8, x4, x1, x2) - -inst_24493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e000003; valaddr_reg:x3; val_offset:73479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73479*FLEN/8, x4, x1, x2) - -inst_24494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e000007; valaddr_reg:x3; val_offset:73482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73482*FLEN/8, x4, x1, x2) - -inst_24495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e00000f; valaddr_reg:x3; val_offset:73485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73485*FLEN/8, x4, x1, x2) - -inst_24496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e00001f; valaddr_reg:x3; val_offset:73488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73488*FLEN/8, x4, x1, x2) - -inst_24497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e00003f; valaddr_reg:x3; val_offset:73491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73491*FLEN/8, x4, x1, x2) - -inst_24498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e00007f; valaddr_reg:x3; val_offset:73494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73494*FLEN/8, x4, x1, x2) - -inst_24499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e0000ff; valaddr_reg:x3; val_offset:73497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73497*FLEN/8, x4, x1, x2) - -inst_24500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e0001ff; valaddr_reg:x3; val_offset:73500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73500*FLEN/8, x4, x1, x2) - -inst_24501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e0003ff; valaddr_reg:x3; val_offset:73503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73503*FLEN/8, x4, x1, x2) - -inst_24502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e0007ff; valaddr_reg:x3; val_offset:73506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73506*FLEN/8, x4, x1, x2) - -inst_24503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e000fff; valaddr_reg:x3; val_offset:73509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73509*FLEN/8, x4, x1, x2) - -inst_24504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e001fff; valaddr_reg:x3; val_offset:73512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73512*FLEN/8, x4, x1, x2) - -inst_24505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e003fff; valaddr_reg:x3; val_offset:73515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73515*FLEN/8, x4, x1, x2) - -inst_24506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e007fff; valaddr_reg:x3; val_offset:73518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73518*FLEN/8, x4, x1, x2) - -inst_24507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e00ffff; valaddr_reg:x3; val_offset:73521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73521*FLEN/8, x4, x1, x2) - -inst_24508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e01ffff; valaddr_reg:x3; val_offset:73524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73524*FLEN/8, x4, x1, x2) - -inst_24509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e03ffff; valaddr_reg:x3; val_offset:73527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73527*FLEN/8, x4, x1, x2) - -inst_24510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e07ffff; valaddr_reg:x3; val_offset:73530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73530*FLEN/8, x4, x1, x2) - -inst_24511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e0fffff; valaddr_reg:x3; val_offset:73533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73533*FLEN/8, x4, x1, x2) - -inst_24512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e1fffff; valaddr_reg:x3; val_offset:73536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73536*FLEN/8, x4, x1, x2) - -inst_24513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e3fffff; valaddr_reg:x3; val_offset:73539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73539*FLEN/8, x4, x1, x2) - -inst_24514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e400000; valaddr_reg:x3; val_offset:73542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73542*FLEN/8, x4, x1, x2) - -inst_24515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e600000; valaddr_reg:x3; val_offset:73545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73545*FLEN/8, x4, x1, x2) - -inst_24516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e700000; valaddr_reg:x3; val_offset:73548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73548*FLEN/8, x4, x1, x2) - -inst_24517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e780000; valaddr_reg:x3; val_offset:73551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73551*FLEN/8, x4, x1, x2) - -inst_24518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7c0000; valaddr_reg:x3; val_offset:73554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73554*FLEN/8, x4, x1, x2) - -inst_24519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7e0000; valaddr_reg:x3; val_offset:73557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73557*FLEN/8, x4, x1, x2) - -inst_24520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7f0000; valaddr_reg:x3; val_offset:73560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73560*FLEN/8, x4, x1, x2) - -inst_24521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7f8000; valaddr_reg:x3; val_offset:73563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73563*FLEN/8, x4, x1, x2) - -inst_24522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7fc000; valaddr_reg:x3; val_offset:73566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73566*FLEN/8, x4, x1, x2) - -inst_24523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7fe000; valaddr_reg:x3; val_offset:73569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73569*FLEN/8, x4, x1, x2) - -inst_24524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7ff000; valaddr_reg:x3; val_offset:73572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73572*FLEN/8, x4, x1, x2) - -inst_24525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7ff800; valaddr_reg:x3; val_offset:73575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73575*FLEN/8, x4, x1, x2) - -inst_24526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7ffc00; valaddr_reg:x3; val_offset:73578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73578*FLEN/8, x4, x1, x2) - -inst_24527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7ffe00; valaddr_reg:x3; val_offset:73581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73581*FLEN/8, x4, x1, x2) - -inst_24528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7fff00; valaddr_reg:x3; val_offset:73584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73584*FLEN/8, x4, x1, x2) - -inst_24529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7fff80; valaddr_reg:x3; val_offset:73587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73587*FLEN/8, x4, x1, x2) - -inst_24530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7fffc0; valaddr_reg:x3; val_offset:73590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73590*FLEN/8, x4, x1, x2) - -inst_24531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7fffe0; valaddr_reg:x3; val_offset:73593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73593*FLEN/8, x4, x1, x2) - -inst_24532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7ffff0; valaddr_reg:x3; val_offset:73596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73596*FLEN/8, x4, x1, x2) - -inst_24533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7ffff8; valaddr_reg:x3; val_offset:73599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73599*FLEN/8, x4, x1, x2) - -inst_24534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7ffffc; valaddr_reg:x3; val_offset:73602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73602*FLEN/8, x4, x1, x2) - -inst_24535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7ffffe; valaddr_reg:x3; val_offset:73605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73605*FLEN/8, x4, x1, x2) - -inst_24536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7e7fffff; valaddr_reg:x3; val_offset:73608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73608*FLEN/8, x4, x1, x2) - -inst_24537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f000001; valaddr_reg:x3; val_offset:73611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73611*FLEN/8, x4, x1, x2) - -inst_24538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f000003; valaddr_reg:x3; val_offset:73614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73614*FLEN/8, x4, x1, x2) - -inst_24539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f000007; valaddr_reg:x3; val_offset:73617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73617*FLEN/8, x4, x1, x2) - -inst_24540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f199999; valaddr_reg:x3; val_offset:73620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73620*FLEN/8, x4, x1, x2) - -inst_24541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f249249; valaddr_reg:x3; val_offset:73623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73623*FLEN/8, x4, x1, x2) - -inst_24542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f333333; valaddr_reg:x3; val_offset:73626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73626*FLEN/8, x4, x1, x2) - -inst_24543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:73629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73629*FLEN/8, x4, x1, x2) - -inst_24544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:73632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73632*FLEN/8, x4, x1, x2) - -inst_24545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f444444; valaddr_reg:x3; val_offset:73635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73635*FLEN/8, x4, x1, x2) - -inst_24546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:73638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73638*FLEN/8, x4, x1, x2) - -inst_24547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:73641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73641*FLEN/8, x4, x1, x2) - -inst_24548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f666666; valaddr_reg:x3; val_offset:73644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73644*FLEN/8, x4, x1, x2) - -inst_24549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:73647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73647*FLEN/8, x4, x1, x2) - -inst_24550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:73650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73650*FLEN/8, x4, x1, x2) - -inst_24551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:73653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73653*FLEN/8, x4, x1, x2) - -inst_24552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:73656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73656*FLEN/8, x4, x1, x2) - -inst_24553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32800000; valaddr_reg:x3; val_offset:73659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73659*FLEN/8, x4, x1, x2) - -inst_24554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32800001; valaddr_reg:x3; val_offset:73662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73662*FLEN/8, x4, x1, x2) - -inst_24555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32800003; valaddr_reg:x3; val_offset:73665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73665*FLEN/8, x4, x1, x2) - -inst_24556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32800007; valaddr_reg:x3; val_offset:73668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73668*FLEN/8, x4, x1, x2) - -inst_24557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3280000f; valaddr_reg:x3; val_offset:73671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73671*FLEN/8, x4, x1, x2) - -inst_24558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3280001f; valaddr_reg:x3; val_offset:73674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73674*FLEN/8, x4, x1, x2) - -inst_24559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3280003f; valaddr_reg:x3; val_offset:73677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73677*FLEN/8, x4, x1, x2) - -inst_24560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3280007f; valaddr_reg:x3; val_offset:73680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73680*FLEN/8, x4, x1, x2) - -inst_24561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x328000ff; valaddr_reg:x3; val_offset:73683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73683*FLEN/8, x4, x1, x2) - -inst_24562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x328001ff; valaddr_reg:x3; val_offset:73686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73686*FLEN/8, x4, x1, x2) - -inst_24563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x328003ff; valaddr_reg:x3; val_offset:73689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73689*FLEN/8, x4, x1, x2) - -inst_24564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x328007ff; valaddr_reg:x3; val_offset:73692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73692*FLEN/8, x4, x1, x2) - -inst_24565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32800fff; valaddr_reg:x3; val_offset:73695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73695*FLEN/8, x4, x1, x2) - -inst_24566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32801fff; valaddr_reg:x3; val_offset:73698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73698*FLEN/8, x4, x1, x2) - -inst_24567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32803fff; valaddr_reg:x3; val_offset:73701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73701*FLEN/8, x4, x1, x2) - -inst_24568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32807fff; valaddr_reg:x3; val_offset:73704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73704*FLEN/8, x4, x1, x2) - -inst_24569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3280ffff; valaddr_reg:x3; val_offset:73707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73707*FLEN/8, x4, x1, x2) - -inst_24570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3281ffff; valaddr_reg:x3; val_offset:73710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73710*FLEN/8, x4, x1, x2) - -inst_24571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3283ffff; valaddr_reg:x3; val_offset:73713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73713*FLEN/8, x4, x1, x2) - -inst_24572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3287ffff; valaddr_reg:x3; val_offset:73716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73716*FLEN/8, x4, x1, x2) - -inst_24573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x328fffff; valaddr_reg:x3; val_offset:73719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73719*FLEN/8, x4, x1, x2) - -inst_24574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x329fffff; valaddr_reg:x3; val_offset:73722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73722*FLEN/8, x4, x1, x2) - -inst_24575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32bfffff; valaddr_reg:x3; val_offset:73725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73725*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_193) - -inst_24576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32c00000; valaddr_reg:x3; val_offset:73728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73728*FLEN/8, x4, x1, x2) - -inst_24577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32e00000; valaddr_reg:x3; val_offset:73731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73731*FLEN/8, x4, x1, x2) - -inst_24578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32f00000; valaddr_reg:x3; val_offset:73734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73734*FLEN/8, x4, x1, x2) - -inst_24579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32f80000; valaddr_reg:x3; val_offset:73737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73737*FLEN/8, x4, x1, x2) - -inst_24580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fc0000; valaddr_reg:x3; val_offset:73740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73740*FLEN/8, x4, x1, x2) - -inst_24581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fe0000; valaddr_reg:x3; val_offset:73743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73743*FLEN/8, x4, x1, x2) - -inst_24582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ff0000; valaddr_reg:x3; val_offset:73746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73746*FLEN/8, x4, x1, x2) - -inst_24583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ff8000; valaddr_reg:x3; val_offset:73749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73749*FLEN/8, x4, x1, x2) - -inst_24584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ffc000; valaddr_reg:x3; val_offset:73752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73752*FLEN/8, x4, x1, x2) - -inst_24585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ffe000; valaddr_reg:x3; val_offset:73755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73755*FLEN/8, x4, x1, x2) - -inst_24586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fff000; valaddr_reg:x3; val_offset:73758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73758*FLEN/8, x4, x1, x2) - -inst_24587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fff800; valaddr_reg:x3; val_offset:73761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73761*FLEN/8, x4, x1, x2) - -inst_24588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fffc00; valaddr_reg:x3; val_offset:73764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73764*FLEN/8, x4, x1, x2) - -inst_24589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fffe00; valaddr_reg:x3; val_offset:73767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73767*FLEN/8, x4, x1, x2) - -inst_24590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ffff00; valaddr_reg:x3; val_offset:73770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73770*FLEN/8, x4, x1, x2) - -inst_24591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ffff80; valaddr_reg:x3; val_offset:73773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73773*FLEN/8, x4, x1, x2) - -inst_24592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ffffc0; valaddr_reg:x3; val_offset:73776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73776*FLEN/8, x4, x1, x2) - -inst_24593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ffffe0; valaddr_reg:x3; val_offset:73779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73779*FLEN/8, x4, x1, x2) - -inst_24594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fffff0; valaddr_reg:x3; val_offset:73782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73782*FLEN/8, x4, x1, x2) - -inst_24595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fffff8; valaddr_reg:x3; val_offset:73785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73785*FLEN/8, x4, x1, x2) - -inst_24596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fffffc; valaddr_reg:x3; val_offset:73788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73788*FLEN/8, x4, x1, x2) - -inst_24597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32fffffe; valaddr_reg:x3; val_offset:73791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73791*FLEN/8, x4, x1, x2) - -inst_24598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x32ffffff; valaddr_reg:x3; val_offset:73794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73794*FLEN/8, x4, x1, x2) - -inst_24599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3f800001; valaddr_reg:x3; val_offset:73797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73797*FLEN/8, x4, x1, x2) - -inst_24600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3f800003; valaddr_reg:x3; val_offset:73800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73800*FLEN/8, x4, x1, x2) - -inst_24601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3f800007; valaddr_reg:x3; val_offset:73803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73803*FLEN/8, x4, x1, x2) - -inst_24602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3f999999; valaddr_reg:x3; val_offset:73806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73806*FLEN/8, x4, x1, x2) - -inst_24603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:73809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73809*FLEN/8, x4, x1, x2) - -inst_24604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:73812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73812*FLEN/8, x4, x1, x2) - -inst_24605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:73815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73815*FLEN/8, x4, x1, x2) - -inst_24606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:73818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73818*FLEN/8, x4, x1, x2) - -inst_24607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:73821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73821*FLEN/8, x4, x1, x2) - -inst_24608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:73824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73824*FLEN/8, x4, x1, x2) - -inst_24609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:73827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73827*FLEN/8, x4, x1, x2) - -inst_24610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:73830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73830*FLEN/8, x4, x1, x2) - -inst_24611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:73833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73833*FLEN/8, x4, x1, x2) - -inst_24612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:73836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73836*FLEN/8, x4, x1, x2) - -inst_24613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:73839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73839*FLEN/8, x4, x1, x2) - -inst_24614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:73842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73842*FLEN/8, x4, x1, x2) - -inst_24615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e800000; valaddr_reg:x3; val_offset:73845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73845*FLEN/8, x4, x1, x2) - -inst_24616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e800001; valaddr_reg:x3; val_offset:73848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73848*FLEN/8, x4, x1, x2) - -inst_24617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e800003; valaddr_reg:x3; val_offset:73851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73851*FLEN/8, x4, x1, x2) - -inst_24618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e800007; valaddr_reg:x3; val_offset:73854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73854*FLEN/8, x4, x1, x2) - -inst_24619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e80000f; valaddr_reg:x3; val_offset:73857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73857*FLEN/8, x4, x1, x2) - -inst_24620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e80001f; valaddr_reg:x3; val_offset:73860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73860*FLEN/8, x4, x1, x2) - -inst_24621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e80003f; valaddr_reg:x3; val_offset:73863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73863*FLEN/8, x4, x1, x2) - -inst_24622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e80007f; valaddr_reg:x3; val_offset:73866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73866*FLEN/8, x4, x1, x2) - -inst_24623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e8000ff; valaddr_reg:x3; val_offset:73869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73869*FLEN/8, x4, x1, x2) - -inst_24624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e8001ff; valaddr_reg:x3; val_offset:73872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73872*FLEN/8, x4, x1, x2) - -inst_24625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e8003ff; valaddr_reg:x3; val_offset:73875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73875*FLEN/8, x4, x1, x2) - -inst_24626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e8007ff; valaddr_reg:x3; val_offset:73878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73878*FLEN/8, x4, x1, x2) - -inst_24627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e800fff; valaddr_reg:x3; val_offset:73881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73881*FLEN/8, x4, x1, x2) - -inst_24628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e801fff; valaddr_reg:x3; val_offset:73884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73884*FLEN/8, x4, x1, x2) - -inst_24629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e803fff; valaddr_reg:x3; val_offset:73887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73887*FLEN/8, x4, x1, x2) - -inst_24630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e807fff; valaddr_reg:x3; val_offset:73890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73890*FLEN/8, x4, x1, x2) - -inst_24631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e80ffff; valaddr_reg:x3; val_offset:73893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73893*FLEN/8, x4, x1, x2) - -inst_24632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e81ffff; valaddr_reg:x3; val_offset:73896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73896*FLEN/8, x4, x1, x2) - -inst_24633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e83ffff; valaddr_reg:x3; val_offset:73899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73899*FLEN/8, x4, x1, x2) - -inst_24634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e87ffff; valaddr_reg:x3; val_offset:73902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73902*FLEN/8, x4, x1, x2) - -inst_24635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e8fffff; valaddr_reg:x3; val_offset:73905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73905*FLEN/8, x4, x1, x2) - -inst_24636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7e9fffff; valaddr_reg:x3; val_offset:73908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73908*FLEN/8, x4, x1, x2) - -inst_24637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7ebfffff; valaddr_reg:x3; val_offset:73911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73911*FLEN/8, x4, x1, x2) - -inst_24638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7ec00000; valaddr_reg:x3; val_offset:73914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73914*FLEN/8, x4, x1, x2) - -inst_24639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7ee00000; valaddr_reg:x3; val_offset:73917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73917*FLEN/8, x4, x1, x2) - -inst_24640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7ef00000; valaddr_reg:x3; val_offset:73920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73920*FLEN/8, x4, x1, x2) - -inst_24641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7ef80000; valaddr_reg:x3; val_offset:73923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73923*FLEN/8, x4, x1, x2) - -inst_24642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efc0000; valaddr_reg:x3; val_offset:73926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73926*FLEN/8, x4, x1, x2) - -inst_24643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efe0000; valaddr_reg:x3; val_offset:73929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73929*FLEN/8, x4, x1, x2) - -inst_24644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7eff0000; valaddr_reg:x3; val_offset:73932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73932*FLEN/8, x4, x1, x2) - -inst_24645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7eff8000; valaddr_reg:x3; val_offset:73935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73935*FLEN/8, x4, x1, x2) - -inst_24646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7effc000; valaddr_reg:x3; val_offset:73938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73938*FLEN/8, x4, x1, x2) - -inst_24647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7effe000; valaddr_reg:x3; val_offset:73941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73941*FLEN/8, x4, x1, x2) - -inst_24648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efff000; valaddr_reg:x3; val_offset:73944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73944*FLEN/8, x4, x1, x2) - -inst_24649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efff800; valaddr_reg:x3; val_offset:73947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73947*FLEN/8, x4, x1, x2) - -inst_24650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efffc00; valaddr_reg:x3; val_offset:73950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73950*FLEN/8, x4, x1, x2) - -inst_24651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efffe00; valaddr_reg:x3; val_offset:73953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73953*FLEN/8, x4, x1, x2) - -inst_24652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7effff00; valaddr_reg:x3; val_offset:73956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73956*FLEN/8, x4, x1, x2) - -inst_24653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7effff80; valaddr_reg:x3; val_offset:73959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73959*FLEN/8, x4, x1, x2) - -inst_24654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7effffc0; valaddr_reg:x3; val_offset:73962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73962*FLEN/8, x4, x1, x2) - -inst_24655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7effffe0; valaddr_reg:x3; val_offset:73965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73965*FLEN/8, x4, x1, x2) - -inst_24656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efffff0; valaddr_reg:x3; val_offset:73968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73968*FLEN/8, x4, x1, x2) - -inst_24657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efffff8; valaddr_reg:x3; val_offset:73971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73971*FLEN/8, x4, x1, x2) - -inst_24658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efffffc; valaddr_reg:x3; val_offset:73974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73974*FLEN/8, x4, x1, x2) - -inst_24659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7efffffe; valaddr_reg:x3; val_offset:73977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73977*FLEN/8, x4, x1, x2) - -inst_24660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7effffff; valaddr_reg:x3; val_offset:73980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73980*FLEN/8, x4, x1, x2) - -inst_24661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f000001; valaddr_reg:x3; val_offset:73983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73983*FLEN/8, x4, x1, x2) - -inst_24662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f000003; valaddr_reg:x3; val_offset:73986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73986*FLEN/8, x4, x1, x2) - -inst_24663: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f000007; valaddr_reg:x3; val_offset:73989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73989*FLEN/8, x4, x1, x2) - -inst_24664: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f199999; valaddr_reg:x3; val_offset:73992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73992*FLEN/8, x4, x1, x2) - -inst_24665: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f249249; valaddr_reg:x3; val_offset:73995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73995*FLEN/8, x4, x1, x2) - -inst_24666: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f333333; valaddr_reg:x3; val_offset:73998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73998*FLEN/8, x4, x1, x2) - -inst_24667: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:74001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74001*FLEN/8, x4, x1, x2) - -inst_24668: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:74004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74004*FLEN/8, x4, x1, x2) - -inst_24669: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f444444; valaddr_reg:x3; val_offset:74007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74007*FLEN/8, x4, x1, x2) - -inst_24670: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:74010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74010*FLEN/8, x4, x1, x2) - -inst_24671: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:74013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74013*FLEN/8, x4, x1, x2) - -inst_24672: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f666666; valaddr_reg:x3; val_offset:74016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74016*FLEN/8, x4, x1, x2) - -inst_24673: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:74019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74019*FLEN/8, x4, x1, x2) - -inst_24674: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:74022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74022*FLEN/8, x4, x1, x2) - -inst_24675: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:74025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74025*FLEN/8, x4, x1, x2) - -inst_24676: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:74028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74028*FLEN/8, x4, x1, x2) - -inst_24677: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8800000; valaddr_reg:x3; val_offset:74031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74031*FLEN/8, x4, x1, x2) - -inst_24678: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8800001; valaddr_reg:x3; val_offset:74034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74034*FLEN/8, x4, x1, x2) - -inst_24679: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8800003; valaddr_reg:x3; val_offset:74037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74037*FLEN/8, x4, x1, x2) - -inst_24680: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8800007; valaddr_reg:x3; val_offset:74040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74040*FLEN/8, x4, x1, x2) - -inst_24681: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe880000f; valaddr_reg:x3; val_offset:74043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74043*FLEN/8, x4, x1, x2) - -inst_24682: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe880001f; valaddr_reg:x3; val_offset:74046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74046*FLEN/8, x4, x1, x2) - -inst_24683: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe880003f; valaddr_reg:x3; val_offset:74049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74049*FLEN/8, x4, x1, x2) - -inst_24684: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe880007f; valaddr_reg:x3; val_offset:74052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74052*FLEN/8, x4, x1, x2) - -inst_24685: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe88000ff; valaddr_reg:x3; val_offset:74055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74055*FLEN/8, x4, x1, x2) - -inst_24686: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe88001ff; valaddr_reg:x3; val_offset:74058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74058*FLEN/8, x4, x1, x2) - -inst_24687: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe88003ff; valaddr_reg:x3; val_offset:74061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74061*FLEN/8, x4, x1, x2) - -inst_24688: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe88007ff; valaddr_reg:x3; val_offset:74064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74064*FLEN/8, x4, x1, x2) - -inst_24689: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8800fff; valaddr_reg:x3; val_offset:74067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74067*FLEN/8, x4, x1, x2) - -inst_24690: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8801fff; valaddr_reg:x3; val_offset:74070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74070*FLEN/8, x4, x1, x2) - -inst_24691: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8803fff; valaddr_reg:x3; val_offset:74073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74073*FLEN/8, x4, x1, x2) - -inst_24692: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8807fff; valaddr_reg:x3; val_offset:74076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74076*FLEN/8, x4, x1, x2) - -inst_24693: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe880ffff; valaddr_reg:x3; val_offset:74079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74079*FLEN/8, x4, x1, x2) - -inst_24694: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe881ffff; valaddr_reg:x3; val_offset:74082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74082*FLEN/8, x4, x1, x2) - -inst_24695: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe883ffff; valaddr_reg:x3; val_offset:74085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74085*FLEN/8, x4, x1, x2) - -inst_24696: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe887ffff; valaddr_reg:x3; val_offset:74088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74088*FLEN/8, x4, x1, x2) - -inst_24697: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe88fffff; valaddr_reg:x3; val_offset:74091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74091*FLEN/8, x4, x1, x2) - -inst_24698: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe89fffff; valaddr_reg:x3; val_offset:74094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74094*FLEN/8, x4, x1, x2) - -inst_24699: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8bfffff; valaddr_reg:x3; val_offset:74097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74097*FLEN/8, x4, x1, x2) - -inst_24700: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8c00000; valaddr_reg:x3; val_offset:74100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74100*FLEN/8, x4, x1, x2) - -inst_24701: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8e00000; valaddr_reg:x3; val_offset:74103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74103*FLEN/8, x4, x1, x2) - -inst_24702: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8f00000; valaddr_reg:x3; val_offset:74106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74106*FLEN/8, x4, x1, x2) - -inst_24703: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8f80000; valaddr_reg:x3; val_offset:74109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74109*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_194) - -inst_24704: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fc0000; valaddr_reg:x3; val_offset:74112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74112*FLEN/8, x4, x1, x2) - -inst_24705: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fe0000; valaddr_reg:x3; val_offset:74115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74115*FLEN/8, x4, x1, x2) - -inst_24706: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ff0000; valaddr_reg:x3; val_offset:74118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74118*FLEN/8, x4, x1, x2) - -inst_24707: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ff8000; valaddr_reg:x3; val_offset:74121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74121*FLEN/8, x4, x1, x2) - -inst_24708: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ffc000; valaddr_reg:x3; val_offset:74124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74124*FLEN/8, x4, x1, x2) - -inst_24709: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ffe000; valaddr_reg:x3; val_offset:74127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74127*FLEN/8, x4, x1, x2) - -inst_24710: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fff000; valaddr_reg:x3; val_offset:74130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74130*FLEN/8, x4, x1, x2) - -inst_24711: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fff800; valaddr_reg:x3; val_offset:74133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74133*FLEN/8, x4, x1, x2) - -inst_24712: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fffc00; valaddr_reg:x3; val_offset:74136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74136*FLEN/8, x4, x1, x2) - -inst_24713: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fffe00; valaddr_reg:x3; val_offset:74139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74139*FLEN/8, x4, x1, x2) - -inst_24714: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ffff00; valaddr_reg:x3; val_offset:74142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74142*FLEN/8, x4, x1, x2) - -inst_24715: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ffff80; valaddr_reg:x3; val_offset:74145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74145*FLEN/8, x4, x1, x2) - -inst_24716: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ffffc0; valaddr_reg:x3; val_offset:74148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74148*FLEN/8, x4, x1, x2) - -inst_24717: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ffffe0; valaddr_reg:x3; val_offset:74151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74151*FLEN/8, x4, x1, x2) - -inst_24718: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fffff0; valaddr_reg:x3; val_offset:74154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74154*FLEN/8, x4, x1, x2) - -inst_24719: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fffff8; valaddr_reg:x3; val_offset:74157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74157*FLEN/8, x4, x1, x2) - -inst_24720: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fffffc; valaddr_reg:x3; val_offset:74160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74160*FLEN/8, x4, x1, x2) - -inst_24721: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8fffffe; valaddr_reg:x3; val_offset:74163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74163*FLEN/8, x4, x1, x2) - -inst_24722: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xe8ffffff; valaddr_reg:x3; val_offset:74166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74166*FLEN/8, x4, x1, x2) - -inst_24723: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff000001; valaddr_reg:x3; val_offset:74169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74169*FLEN/8, x4, x1, x2) - -inst_24724: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff000003; valaddr_reg:x3; val_offset:74172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74172*FLEN/8, x4, x1, x2) - -inst_24725: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff000007; valaddr_reg:x3; val_offset:74175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74175*FLEN/8, x4, x1, x2) - -inst_24726: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff199999; valaddr_reg:x3; val_offset:74178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74178*FLEN/8, x4, x1, x2) - -inst_24727: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff249249; valaddr_reg:x3; val_offset:74181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74181*FLEN/8, x4, x1, x2) - -inst_24728: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff333333; valaddr_reg:x3; val_offset:74184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74184*FLEN/8, x4, x1, x2) - -inst_24729: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:74187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74187*FLEN/8, x4, x1, x2) - -inst_24730: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:74190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74190*FLEN/8, x4, x1, x2) - -inst_24731: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff444444; valaddr_reg:x3; val_offset:74193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74193*FLEN/8, x4, x1, x2) - -inst_24732: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:74196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74196*FLEN/8, x4, x1, x2) - -inst_24733: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:74199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74199*FLEN/8, x4, x1, x2) - -inst_24734: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff666666; valaddr_reg:x3; val_offset:74202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74202*FLEN/8, x4, x1, x2) - -inst_24735: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:74205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74205*FLEN/8, x4, x1, x2) - -inst_24736: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:74208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74208*FLEN/8, x4, x1, x2) - -inst_24737: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:74211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74211*FLEN/8, x4, x1, x2) - -inst_24738: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:74214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74214*FLEN/8, x4, x1, x2) - -inst_24739: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x0; valaddr_reg:x3; val_offset:74217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74217*FLEN/8, x4, x1, x2) - -inst_24740: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:74220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74220*FLEN/8, x4, x1, x2) - -inst_24741: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:74223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74223*FLEN/8, x4, x1, x2) - -inst_24742: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:74226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74226*FLEN/8, x4, x1, x2) - -inst_24743: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0xf; valaddr_reg:x3; val_offset:74229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74229*FLEN/8, x4, x1, x2) - -inst_24744: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x1f; valaddr_reg:x3; val_offset:74232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74232*FLEN/8, x4, x1, x2) - -inst_24745: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x3f; valaddr_reg:x3; val_offset:74235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74235*FLEN/8, x4, x1, x2) - -inst_24746: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7f; valaddr_reg:x3; val_offset:74238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74238*FLEN/8, x4, x1, x2) - -inst_24747: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0xff; valaddr_reg:x3; val_offset:74241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74241*FLEN/8, x4, x1, x2) - -inst_24748: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x1ff; valaddr_reg:x3; val_offset:74244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74244*FLEN/8, x4, x1, x2) - -inst_24749: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x3ff; valaddr_reg:x3; val_offset:74247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74247*FLEN/8, x4, x1, x2) - -inst_24750: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ff; valaddr_reg:x3; val_offset:74250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74250*FLEN/8, x4, x1, x2) - -inst_24751: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0xfff; valaddr_reg:x3; val_offset:74253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74253*FLEN/8, x4, x1, x2) - -inst_24752: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x1fff; valaddr_reg:x3; val_offset:74256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74256*FLEN/8, x4, x1, x2) - -inst_24753: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x3fff; valaddr_reg:x3; val_offset:74259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74259*FLEN/8, x4, x1, x2) - -inst_24754: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7fff; valaddr_reg:x3; val_offset:74262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74262*FLEN/8, x4, x1, x2) - -inst_24755: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0xffff; valaddr_reg:x3; val_offset:74265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74265*FLEN/8, x4, x1, x2) - -inst_24756: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x1ffff; valaddr_reg:x3; val_offset:74268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74268*FLEN/8, x4, x1, x2) - -inst_24757: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x3ffff; valaddr_reg:x3; val_offset:74271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74271*FLEN/8, x4, x1, x2) - -inst_24758: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ffff; valaddr_reg:x3; val_offset:74274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74274*FLEN/8, x4, x1, x2) - -inst_24759: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0xfffff; valaddr_reg:x3; val_offset:74277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74277*FLEN/8, x4, x1, x2) - -inst_24760: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:74280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74280*FLEN/8, x4, x1, x2) - -inst_24761: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x1fffff; valaddr_reg:x3; val_offset:74283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74283*FLEN/8, x4, x1, x2) - -inst_24762: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:74286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74286*FLEN/8, x4, x1, x2) - -inst_24763: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:74289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74289*FLEN/8, x4, x1, x2) - -inst_24764: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:74292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74292*FLEN/8, x4, x1, x2) - -inst_24765: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:74295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74295*FLEN/8, x4, x1, x2) - -inst_24766: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x3fffff; valaddr_reg:x3; val_offset:74298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74298*FLEN/8, x4, x1, x2) - -inst_24767: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x400000; valaddr_reg:x3; val_offset:74301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74301*FLEN/8, x4, x1, x2) - -inst_24768: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:74304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74304*FLEN/8, x4, x1, x2) - -inst_24769: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:74307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74307*FLEN/8, x4, x1, x2) - -inst_24770: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:74310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74310*FLEN/8, x4, x1, x2) - -inst_24771: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x600000; valaddr_reg:x3; val_offset:74313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74313*FLEN/8, x4, x1, x2) - -inst_24772: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:74316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74316*FLEN/8, x4, x1, x2) - -inst_24773: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:74319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74319*FLEN/8, x4, x1, x2) - -inst_24774: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x700000; valaddr_reg:x3; val_offset:74322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74322*FLEN/8, x4, x1, x2) - -inst_24775: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x780000; valaddr_reg:x3; val_offset:74325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74325*FLEN/8, x4, x1, x2) - -inst_24776: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7c0000; valaddr_reg:x3; val_offset:74328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74328*FLEN/8, x4, x1, x2) - -inst_24777: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7e0000; valaddr_reg:x3; val_offset:74331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74331*FLEN/8, x4, x1, x2) - -inst_24778: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7f0000; valaddr_reg:x3; val_offset:74334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74334*FLEN/8, x4, x1, x2) - -inst_24779: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7f8000; valaddr_reg:x3; val_offset:74337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74337*FLEN/8, x4, x1, x2) - -inst_24780: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7fc000; valaddr_reg:x3; val_offset:74340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74340*FLEN/8, x4, x1, x2) - -inst_24781: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7fe000; valaddr_reg:x3; val_offset:74343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74343*FLEN/8, x4, x1, x2) - -inst_24782: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ff000; valaddr_reg:x3; val_offset:74346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74346*FLEN/8, x4, x1, x2) - -inst_24783: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ff800; valaddr_reg:x3; val_offset:74349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74349*FLEN/8, x4, x1, x2) - -inst_24784: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ffc00; valaddr_reg:x3; val_offset:74352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74352*FLEN/8, x4, x1, x2) - -inst_24785: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ffe00; valaddr_reg:x3; val_offset:74355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74355*FLEN/8, x4, x1, x2) - -inst_24786: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7fff00; valaddr_reg:x3; val_offset:74358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74358*FLEN/8, x4, x1, x2) - -inst_24787: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7fff80; valaddr_reg:x3; val_offset:74361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74361*FLEN/8, x4, x1, x2) - -inst_24788: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7fffc0; valaddr_reg:x3; val_offset:74364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74364*FLEN/8, x4, x1, x2) - -inst_24789: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7fffe0; valaddr_reg:x3; val_offset:74367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74367*FLEN/8, x4, x1, x2) - -inst_24790: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ffff0; valaddr_reg:x3; val_offset:74370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74370*FLEN/8, x4, x1, x2) - -inst_24791: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:74373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74373*FLEN/8, x4, x1, x2) - -inst_24792: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:74376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74376*FLEN/8, x4, x1, x2) - -inst_24793: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:74379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74379*FLEN/8, x4, x1, x2) - -inst_24794: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; -op3val:0x7fffff; valaddr_reg:x3; val_offset:74382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74382*FLEN/8, x4, x1, x2) - -inst_24795: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:74385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74385*FLEN/8, x4, x1, x2) - -inst_24796: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:74388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74388*FLEN/8, x4, x1, x2) - -inst_24797: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:74391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74391*FLEN/8, x4, x1, x2) - -inst_24798: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:74394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74394*FLEN/8, x4, x1, x2) - -inst_24799: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:74397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74397*FLEN/8, x4, x1, x2) - -inst_24800: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:74400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74400*FLEN/8, x4, x1, x2) - -inst_24801: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:74403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74403*FLEN/8, x4, x1, x2) - -inst_24802: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:74406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74406*FLEN/8, x4, x1, x2) - -inst_24803: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:74409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74409*FLEN/8, x4, x1, x2) - -inst_24804: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:74412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74412*FLEN/8, x4, x1, x2) - -inst_24805: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:74415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74415*FLEN/8, x4, x1, x2) - -inst_24806: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:74418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74418*FLEN/8, x4, x1, x2) - -inst_24807: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:74421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74421*FLEN/8, x4, x1, x2) - -inst_24808: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:74424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74424*FLEN/8, x4, x1, x2) - -inst_24809: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:74427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74427*FLEN/8, x4, x1, x2) - -inst_24810: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:74430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74430*FLEN/8, x4, x1, x2) - -inst_24811: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe800000; valaddr_reg:x3; val_offset:74433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74433*FLEN/8, x4, x1, x2) - -inst_24812: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe800001; valaddr_reg:x3; val_offset:74436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74436*FLEN/8, x4, x1, x2) - -inst_24813: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe800003; valaddr_reg:x3; val_offset:74439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74439*FLEN/8, x4, x1, x2) - -inst_24814: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe800007; valaddr_reg:x3; val_offset:74442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74442*FLEN/8, x4, x1, x2) - -inst_24815: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe80000f; valaddr_reg:x3; val_offset:74445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74445*FLEN/8, x4, x1, x2) - -inst_24816: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe80001f; valaddr_reg:x3; val_offset:74448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74448*FLEN/8, x4, x1, x2) - -inst_24817: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe80003f; valaddr_reg:x3; val_offset:74451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74451*FLEN/8, x4, x1, x2) - -inst_24818: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe80007f; valaddr_reg:x3; val_offset:74454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74454*FLEN/8, x4, x1, x2) - -inst_24819: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe8000ff; valaddr_reg:x3; val_offset:74457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74457*FLEN/8, x4, x1, x2) - -inst_24820: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe8001ff; valaddr_reg:x3; val_offset:74460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74460*FLEN/8, x4, x1, x2) - -inst_24821: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe8003ff; valaddr_reg:x3; val_offset:74463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74463*FLEN/8, x4, x1, x2) - -inst_24822: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe8007ff; valaddr_reg:x3; val_offset:74466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74466*FLEN/8, x4, x1, x2) - -inst_24823: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe800fff; valaddr_reg:x3; val_offset:74469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74469*FLEN/8, x4, x1, x2) - -inst_24824: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe801fff; valaddr_reg:x3; val_offset:74472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74472*FLEN/8, x4, x1, x2) - -inst_24825: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe803fff; valaddr_reg:x3; val_offset:74475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74475*FLEN/8, x4, x1, x2) - -inst_24826: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe807fff; valaddr_reg:x3; val_offset:74478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74478*FLEN/8, x4, x1, x2) - -inst_24827: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe80ffff; valaddr_reg:x3; val_offset:74481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74481*FLEN/8, x4, x1, x2) - -inst_24828: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe81ffff; valaddr_reg:x3; val_offset:74484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74484*FLEN/8, x4, x1, x2) - -inst_24829: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe83ffff; valaddr_reg:x3; val_offset:74487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74487*FLEN/8, x4, x1, x2) - -inst_24830: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe87ffff; valaddr_reg:x3; val_offset:74490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74490*FLEN/8, x4, x1, x2) - -inst_24831: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe8fffff; valaddr_reg:x3; val_offset:74493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74493*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_195) - -inst_24832: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xe9fffff; valaddr_reg:x3; val_offset:74496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74496*FLEN/8, x4, x1, x2) - -inst_24833: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xebfffff; valaddr_reg:x3; val_offset:74499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74499*FLEN/8, x4, x1, x2) - -inst_24834: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xec00000; valaddr_reg:x3; val_offset:74502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74502*FLEN/8, x4, x1, x2) - -inst_24835: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xee00000; valaddr_reg:x3; val_offset:74505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74505*FLEN/8, x4, x1, x2) - -inst_24836: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xef00000; valaddr_reg:x3; val_offset:74508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74508*FLEN/8, x4, x1, x2) - -inst_24837: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xef80000; valaddr_reg:x3; val_offset:74511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74511*FLEN/8, x4, x1, x2) - -inst_24838: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefc0000; valaddr_reg:x3; val_offset:74514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74514*FLEN/8, x4, x1, x2) - -inst_24839: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefe0000; valaddr_reg:x3; val_offset:74517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74517*FLEN/8, x4, x1, x2) - -inst_24840: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeff0000; valaddr_reg:x3; val_offset:74520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74520*FLEN/8, x4, x1, x2) - -inst_24841: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeff8000; valaddr_reg:x3; val_offset:74523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74523*FLEN/8, x4, x1, x2) - -inst_24842: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeffc000; valaddr_reg:x3; val_offset:74526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74526*FLEN/8, x4, x1, x2) - -inst_24843: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeffe000; valaddr_reg:x3; val_offset:74529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74529*FLEN/8, x4, x1, x2) - -inst_24844: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefff000; valaddr_reg:x3; val_offset:74532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74532*FLEN/8, x4, x1, x2) - -inst_24845: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefff800; valaddr_reg:x3; val_offset:74535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74535*FLEN/8, x4, x1, x2) - -inst_24846: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefffc00; valaddr_reg:x3; val_offset:74538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74538*FLEN/8, x4, x1, x2) - -inst_24847: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefffe00; valaddr_reg:x3; val_offset:74541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74541*FLEN/8, x4, x1, x2) - -inst_24848: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeffff00; valaddr_reg:x3; val_offset:74544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74544*FLEN/8, x4, x1, x2) - -inst_24849: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeffff80; valaddr_reg:x3; val_offset:74547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74547*FLEN/8, x4, x1, x2) - -inst_24850: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeffffc0; valaddr_reg:x3; val_offset:74550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74550*FLEN/8, x4, x1, x2) - -inst_24851: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeffffe0; valaddr_reg:x3; val_offset:74553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74553*FLEN/8, x4, x1, x2) - -inst_24852: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefffff0; valaddr_reg:x3; val_offset:74556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74556*FLEN/8, x4, x1, x2) - -inst_24853: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefffff8; valaddr_reg:x3; val_offset:74559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74559*FLEN/8, x4, x1, x2) - -inst_24854: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefffffc; valaddr_reg:x3; val_offset:74562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74562*FLEN/8, x4, x1, x2) - -inst_24855: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xefffffe; valaddr_reg:x3; val_offset:74565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74565*FLEN/8, x4, x1, x2) - -inst_24856: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; -op3val:0xeffffff; valaddr_reg:x3; val_offset:74568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74568*FLEN/8, x4, x1, x2) - -inst_24857: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:74571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74571*FLEN/8, x4, x1, x2) - -inst_24858: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:74574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74574*FLEN/8, x4, x1, x2) - -inst_24859: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:74577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74577*FLEN/8, x4, x1, x2) - -inst_24860: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:74580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74580*FLEN/8, x4, x1, x2) - -inst_24861: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:74583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74583*FLEN/8, x4, x1, x2) - -inst_24862: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:74586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74586*FLEN/8, x4, x1, x2) - -inst_24863: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:74589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74589*FLEN/8, x4, x1, x2) - -inst_24864: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:74592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74592*FLEN/8, x4, x1, x2) - -inst_24865: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:74595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74595*FLEN/8, x4, x1, x2) - -inst_24866: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:74598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74598*FLEN/8, x4, x1, x2) - -inst_24867: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:74601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74601*FLEN/8, x4, x1, x2) - -inst_24868: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:74604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74604*FLEN/8, x4, x1, x2) - -inst_24869: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:74607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74607*FLEN/8, x4, x1, x2) - -inst_24870: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:74610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74610*FLEN/8, x4, x1, x2) - -inst_24871: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:74613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74613*FLEN/8, x4, x1, x2) - -inst_24872: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:74616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74616*FLEN/8, x4, x1, x2) - -inst_24873: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc800000; valaddr_reg:x3; val_offset:74619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74619*FLEN/8, x4, x1, x2) - -inst_24874: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc800001; valaddr_reg:x3; val_offset:74622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74622*FLEN/8, x4, x1, x2) - -inst_24875: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc800003; valaddr_reg:x3; val_offset:74625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74625*FLEN/8, x4, x1, x2) - -inst_24876: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc800007; valaddr_reg:x3; val_offset:74628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74628*FLEN/8, x4, x1, x2) - -inst_24877: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc80000f; valaddr_reg:x3; val_offset:74631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74631*FLEN/8, x4, x1, x2) - -inst_24878: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc80001f; valaddr_reg:x3; val_offset:74634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74634*FLEN/8, x4, x1, x2) - -inst_24879: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc80003f; valaddr_reg:x3; val_offset:74637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74637*FLEN/8, x4, x1, x2) - -inst_24880: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc80007f; valaddr_reg:x3; val_offset:74640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74640*FLEN/8, x4, x1, x2) - -inst_24881: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc8000ff; valaddr_reg:x3; val_offset:74643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74643*FLEN/8, x4, x1, x2) - -inst_24882: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc8001ff; valaddr_reg:x3; val_offset:74646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74646*FLEN/8, x4, x1, x2) - -inst_24883: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc8003ff; valaddr_reg:x3; val_offset:74649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74649*FLEN/8, x4, x1, x2) - -inst_24884: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc8007ff; valaddr_reg:x3; val_offset:74652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74652*FLEN/8, x4, x1, x2) - -inst_24885: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc800fff; valaddr_reg:x3; val_offset:74655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74655*FLEN/8, x4, x1, x2) - -inst_24886: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc801fff; valaddr_reg:x3; val_offset:74658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74658*FLEN/8, x4, x1, x2) - -inst_24887: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc803fff; valaddr_reg:x3; val_offset:74661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74661*FLEN/8, x4, x1, x2) - -inst_24888: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc807fff; valaddr_reg:x3; val_offset:74664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74664*FLEN/8, x4, x1, x2) - -inst_24889: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc80ffff; valaddr_reg:x3; val_offset:74667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74667*FLEN/8, x4, x1, x2) - -inst_24890: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc81ffff; valaddr_reg:x3; val_offset:74670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74670*FLEN/8, x4, x1, x2) - -inst_24891: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc83ffff; valaddr_reg:x3; val_offset:74673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74673*FLEN/8, x4, x1, x2) - -inst_24892: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc87ffff; valaddr_reg:x3; val_offset:74676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74676*FLEN/8, x4, x1, x2) - -inst_24893: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc8fffff; valaddr_reg:x3; val_offset:74679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74679*FLEN/8, x4, x1, x2) - -inst_24894: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xc9fffff; valaddr_reg:x3; val_offset:74682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74682*FLEN/8, x4, x1, x2) - -inst_24895: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcbfffff; valaddr_reg:x3; val_offset:74685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74685*FLEN/8, x4, x1, x2) - -inst_24896: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcc00000; valaddr_reg:x3; val_offset:74688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74688*FLEN/8, x4, x1, x2) - -inst_24897: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xce00000; valaddr_reg:x3; val_offset:74691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74691*FLEN/8, x4, x1, x2) - -inst_24898: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcf00000; valaddr_reg:x3; val_offset:74694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74694*FLEN/8, x4, x1, x2) - -inst_24899: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcf80000; valaddr_reg:x3; val_offset:74697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74697*FLEN/8, x4, x1, x2) - -inst_24900: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfc0000; valaddr_reg:x3; val_offset:74700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74700*FLEN/8, x4, x1, x2) - -inst_24901: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfe0000; valaddr_reg:x3; val_offset:74703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74703*FLEN/8, x4, x1, x2) - -inst_24902: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcff0000; valaddr_reg:x3; val_offset:74706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74706*FLEN/8, x4, x1, x2) - -inst_24903: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcff8000; valaddr_reg:x3; val_offset:74709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74709*FLEN/8, x4, x1, x2) - -inst_24904: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcffc000; valaddr_reg:x3; val_offset:74712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74712*FLEN/8, x4, x1, x2) - -inst_24905: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcffe000; valaddr_reg:x3; val_offset:74715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74715*FLEN/8, x4, x1, x2) - -inst_24906: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfff000; valaddr_reg:x3; val_offset:74718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74718*FLEN/8, x4, x1, x2) - -inst_24907: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfff800; valaddr_reg:x3; val_offset:74721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74721*FLEN/8, x4, x1, x2) - -inst_24908: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfffc00; valaddr_reg:x3; val_offset:74724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74724*FLEN/8, x4, x1, x2) - -inst_24909: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfffe00; valaddr_reg:x3; val_offset:74727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74727*FLEN/8, x4, x1, x2) - -inst_24910: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcffff00; valaddr_reg:x3; val_offset:74730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74730*FLEN/8, x4, x1, x2) - -inst_24911: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcffff80; valaddr_reg:x3; val_offset:74733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74733*FLEN/8, x4, x1, x2) - -inst_24912: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcffffc0; valaddr_reg:x3; val_offset:74736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74736*FLEN/8, x4, x1, x2) - -inst_24913: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcffffe0; valaddr_reg:x3; val_offset:74739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74739*FLEN/8, x4, x1, x2) - -inst_24914: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfffff0; valaddr_reg:x3; val_offset:74742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74742*FLEN/8, x4, x1, x2) - -inst_24915: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfffff8; valaddr_reg:x3; val_offset:74745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74745*FLEN/8, x4, x1, x2) - -inst_24916: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfffffc; valaddr_reg:x3; val_offset:74748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74748*FLEN/8, x4, x1, x2) - -inst_24917: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcfffffe; valaddr_reg:x3; val_offset:74751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74751*FLEN/8, x4, x1, x2) - -inst_24918: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; -op3val:0xcffffff; valaddr_reg:x3; val_offset:74754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74754*FLEN/8, x4, x1, x2) - -inst_24919: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:74757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74757*FLEN/8, x4, x1, x2) - -inst_24920: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:74760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74760*FLEN/8, x4, x1, x2) - -inst_24921: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:74763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74763*FLEN/8, x4, x1, x2) - -inst_24922: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:74766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74766*FLEN/8, x4, x1, x2) - -inst_24923: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:74769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74769*FLEN/8, x4, x1, x2) - -inst_24924: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:74772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74772*FLEN/8, x4, x1, x2) - -inst_24925: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:74775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74775*FLEN/8, x4, x1, x2) - -inst_24926: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:74778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74778*FLEN/8, x4, x1, x2) - -inst_24927: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:74781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74781*FLEN/8, x4, x1, x2) - -inst_24928: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:74784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74784*FLEN/8, x4, x1, x2) - -inst_24929: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:74787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74787*FLEN/8, x4, x1, x2) - -inst_24930: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:74790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74790*FLEN/8, x4, x1, x2) - -inst_24931: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:74793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74793*FLEN/8, x4, x1, x2) - -inst_24932: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:74796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74796*FLEN/8, x4, x1, x2) - -inst_24933: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:74799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74799*FLEN/8, x4, x1, x2) - -inst_24934: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:74802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74802*FLEN/8, x4, x1, x2) - -inst_24935: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a800000; valaddr_reg:x3; val_offset:74805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74805*FLEN/8, x4, x1, x2) - -inst_24936: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a800001; valaddr_reg:x3; val_offset:74808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74808*FLEN/8, x4, x1, x2) - -inst_24937: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a800003; valaddr_reg:x3; val_offset:74811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74811*FLEN/8, x4, x1, x2) - -inst_24938: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a800007; valaddr_reg:x3; val_offset:74814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74814*FLEN/8, x4, x1, x2) - -inst_24939: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a80000f; valaddr_reg:x3; val_offset:74817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74817*FLEN/8, x4, x1, x2) - -inst_24940: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a80001f; valaddr_reg:x3; val_offset:74820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74820*FLEN/8, x4, x1, x2) - -inst_24941: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a80003f; valaddr_reg:x3; val_offset:74823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74823*FLEN/8, x4, x1, x2) - -inst_24942: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a80007f; valaddr_reg:x3; val_offset:74826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74826*FLEN/8, x4, x1, x2) - -inst_24943: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a8000ff; valaddr_reg:x3; val_offset:74829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74829*FLEN/8, x4, x1, x2) - -inst_24944: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a8001ff; valaddr_reg:x3; val_offset:74832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74832*FLEN/8, x4, x1, x2) - -inst_24945: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a8003ff; valaddr_reg:x3; val_offset:74835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74835*FLEN/8, x4, x1, x2) - -inst_24946: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a8007ff; valaddr_reg:x3; val_offset:74838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74838*FLEN/8, x4, x1, x2) - -inst_24947: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a800fff; valaddr_reg:x3; val_offset:74841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74841*FLEN/8, x4, x1, x2) - -inst_24948: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a801fff; valaddr_reg:x3; val_offset:74844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74844*FLEN/8, x4, x1, x2) - -inst_24949: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a803fff; valaddr_reg:x3; val_offset:74847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74847*FLEN/8, x4, x1, x2) - -inst_24950: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a807fff; valaddr_reg:x3; val_offset:74850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74850*FLEN/8, x4, x1, x2) - -inst_24951: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a80ffff; valaddr_reg:x3; val_offset:74853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74853*FLEN/8, x4, x1, x2) - -inst_24952: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a81ffff; valaddr_reg:x3; val_offset:74856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74856*FLEN/8, x4, x1, x2) - -inst_24953: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a83ffff; valaddr_reg:x3; val_offset:74859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74859*FLEN/8, x4, x1, x2) - -inst_24954: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a87ffff; valaddr_reg:x3; val_offset:74862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74862*FLEN/8, x4, x1, x2) - -inst_24955: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a8fffff; valaddr_reg:x3; val_offset:74865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74865*FLEN/8, x4, x1, x2) - -inst_24956: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8a9fffff; valaddr_reg:x3; val_offset:74868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74868*FLEN/8, x4, x1, x2) - -inst_24957: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8abfffff; valaddr_reg:x3; val_offset:74871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74871*FLEN/8, x4, x1, x2) - -inst_24958: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8ac00000; valaddr_reg:x3; val_offset:74874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74874*FLEN/8, x4, x1, x2) - -inst_24959: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8ae00000; valaddr_reg:x3; val_offset:74877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74877*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_196) - -inst_24960: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8af00000; valaddr_reg:x3; val_offset:74880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74880*FLEN/8, x4, x1, x2) - -inst_24961: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8af80000; valaddr_reg:x3; val_offset:74883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74883*FLEN/8, x4, x1, x2) - -inst_24962: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afc0000; valaddr_reg:x3; val_offset:74886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74886*FLEN/8, x4, x1, x2) - -inst_24963: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afe0000; valaddr_reg:x3; val_offset:74889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74889*FLEN/8, x4, x1, x2) - -inst_24964: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8aff0000; valaddr_reg:x3; val_offset:74892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74892*FLEN/8, x4, x1, x2) - -inst_24965: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8aff8000; valaddr_reg:x3; val_offset:74895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74895*FLEN/8, x4, x1, x2) - -inst_24966: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8affc000; valaddr_reg:x3; val_offset:74898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74898*FLEN/8, x4, x1, x2) - -inst_24967: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8affe000; valaddr_reg:x3; val_offset:74901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74901*FLEN/8, x4, x1, x2) - -inst_24968: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afff000; valaddr_reg:x3; val_offset:74904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74904*FLEN/8, x4, x1, x2) - -inst_24969: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afff800; valaddr_reg:x3; val_offset:74907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74907*FLEN/8, x4, x1, x2) - -inst_24970: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afffc00; valaddr_reg:x3; val_offset:74910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74910*FLEN/8, x4, x1, x2) - -inst_24971: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afffe00; valaddr_reg:x3; val_offset:74913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74913*FLEN/8, x4, x1, x2) - -inst_24972: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8affff00; valaddr_reg:x3; val_offset:74916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74916*FLEN/8, x4, x1, x2) - -inst_24973: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8affff80; valaddr_reg:x3; val_offset:74919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74919*FLEN/8, x4, x1, x2) - -inst_24974: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8affffc0; valaddr_reg:x3; val_offset:74922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74922*FLEN/8, x4, x1, x2) - -inst_24975: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8affffe0; valaddr_reg:x3; val_offset:74925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74925*FLEN/8, x4, x1, x2) - -inst_24976: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afffff0; valaddr_reg:x3; val_offset:74928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74928*FLEN/8, x4, x1, x2) - -inst_24977: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afffff8; valaddr_reg:x3; val_offset:74931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74931*FLEN/8, x4, x1, x2) - -inst_24978: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afffffc; valaddr_reg:x3; val_offset:74934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74934*FLEN/8, x4, x1, x2) - -inst_24979: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8afffffe; valaddr_reg:x3; val_offset:74937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74937*FLEN/8, x4, x1, x2) - -inst_24980: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; -op3val:0x8affffff; valaddr_reg:x3; val_offset:74940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74940*FLEN/8, x4, x1, x2) - -inst_24981: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28800000; valaddr_reg:x3; val_offset:74943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74943*FLEN/8, x4, x1, x2) - -inst_24982: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28800001; valaddr_reg:x3; val_offset:74946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74946*FLEN/8, x4, x1, x2) - -inst_24983: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28800003; valaddr_reg:x3; val_offset:74949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74949*FLEN/8, x4, x1, x2) - -inst_24984: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28800007; valaddr_reg:x3; val_offset:74952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74952*FLEN/8, x4, x1, x2) - -inst_24985: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x2880000f; valaddr_reg:x3; val_offset:74955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74955*FLEN/8, x4, x1, x2) - -inst_24986: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x2880001f; valaddr_reg:x3; val_offset:74958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74958*FLEN/8, x4, x1, x2) - -inst_24987: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x2880003f; valaddr_reg:x3; val_offset:74961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74961*FLEN/8, x4, x1, x2) - -inst_24988: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x2880007f; valaddr_reg:x3; val_offset:74964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74964*FLEN/8, x4, x1, x2) - -inst_24989: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x288000ff; valaddr_reg:x3; val_offset:74967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74967*FLEN/8, x4, x1, x2) - -inst_24990: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x288001ff; valaddr_reg:x3; val_offset:74970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74970*FLEN/8, x4, x1, x2) - -inst_24991: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x288003ff; valaddr_reg:x3; val_offset:74973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74973*FLEN/8, x4, x1, x2) - -inst_24992: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x288007ff; valaddr_reg:x3; val_offset:74976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74976*FLEN/8, x4, x1, x2) - -inst_24993: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28800fff; valaddr_reg:x3; val_offset:74979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74979*FLEN/8, x4, x1, x2) - -inst_24994: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28801fff; valaddr_reg:x3; val_offset:74982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74982*FLEN/8, x4, x1, x2) - -inst_24995: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28803fff; valaddr_reg:x3; val_offset:74985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74985*FLEN/8, x4, x1, x2) - -inst_24996: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28807fff; valaddr_reg:x3; val_offset:74988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74988*FLEN/8, x4, x1, x2) - -inst_24997: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x2880ffff; valaddr_reg:x3; val_offset:74991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74991*FLEN/8, x4, x1, x2) - -inst_24998: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x2881ffff; valaddr_reg:x3; val_offset:74994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74994*FLEN/8, x4, x1, x2) - -inst_24999: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x2883ffff; valaddr_reg:x3; val_offset:74997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74997*FLEN/8, x4, x1, x2) - -inst_25000: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x2887ffff; valaddr_reg:x3; val_offset:75000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75000*FLEN/8, x4, x1, x2) - -inst_25001: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x288fffff; valaddr_reg:x3; val_offset:75003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75003*FLEN/8, x4, x1, x2) - -inst_25002: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x289fffff; valaddr_reg:x3; val_offset:75006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75006*FLEN/8, x4, x1, x2) - -inst_25003: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28bfffff; valaddr_reg:x3; val_offset:75009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75009*FLEN/8, x4, x1, x2) - -inst_25004: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28c00000; valaddr_reg:x3; val_offset:75012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75012*FLEN/8, x4, x1, x2) - -inst_25005: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28e00000; valaddr_reg:x3; val_offset:75015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75015*FLEN/8, x4, x1, x2) - -inst_25006: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28f00000; valaddr_reg:x3; val_offset:75018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75018*FLEN/8, x4, x1, x2) - -inst_25007: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28f80000; valaddr_reg:x3; val_offset:75021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75021*FLEN/8, x4, x1, x2) - -inst_25008: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fc0000; valaddr_reg:x3; val_offset:75024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75024*FLEN/8, x4, x1, x2) - -inst_25009: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fe0000; valaddr_reg:x3; val_offset:75027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75027*FLEN/8, x4, x1, x2) - -inst_25010: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ff0000; valaddr_reg:x3; val_offset:75030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75030*FLEN/8, x4, x1, x2) - -inst_25011: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ff8000; valaddr_reg:x3; val_offset:75033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75033*FLEN/8, x4, x1, x2) - -inst_25012: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ffc000; valaddr_reg:x3; val_offset:75036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75036*FLEN/8, x4, x1, x2) - -inst_25013: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ffe000; valaddr_reg:x3; val_offset:75039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75039*FLEN/8, x4, x1, x2) - -inst_25014: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fff000; valaddr_reg:x3; val_offset:75042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75042*FLEN/8, x4, x1, x2) - -inst_25015: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fff800; valaddr_reg:x3; val_offset:75045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75045*FLEN/8, x4, x1, x2) - -inst_25016: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fffc00; valaddr_reg:x3; val_offset:75048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75048*FLEN/8, x4, x1, x2) - -inst_25017: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fffe00; valaddr_reg:x3; val_offset:75051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75051*FLEN/8, x4, x1, x2) - -inst_25018: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ffff00; valaddr_reg:x3; val_offset:75054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75054*FLEN/8, x4, x1, x2) - -inst_25019: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ffff80; valaddr_reg:x3; val_offset:75057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75057*FLEN/8, x4, x1, x2) - -inst_25020: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ffffc0; valaddr_reg:x3; val_offset:75060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75060*FLEN/8, x4, x1, x2) - -inst_25021: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ffffe0; valaddr_reg:x3; val_offset:75063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75063*FLEN/8, x4, x1, x2) - -inst_25022: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fffff0; valaddr_reg:x3; val_offset:75066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75066*FLEN/8, x4, x1, x2) - -inst_25023: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fffff8; valaddr_reg:x3; val_offset:75069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75069*FLEN/8, x4, x1, x2) - -inst_25024: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fffffc; valaddr_reg:x3; val_offset:75072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75072*FLEN/8, x4, x1, x2) - -inst_25025: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28fffffe; valaddr_reg:x3; val_offset:75075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75075*FLEN/8, x4, x1, x2) - -inst_25026: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x28ffffff; valaddr_reg:x3; val_offset:75078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75078*FLEN/8, x4, x1, x2) - -inst_25027: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3f800001; valaddr_reg:x3; val_offset:75081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75081*FLEN/8, x4, x1, x2) - -inst_25028: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3f800003; valaddr_reg:x3; val_offset:75084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75084*FLEN/8, x4, x1, x2) - -inst_25029: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3f800007; valaddr_reg:x3; val_offset:75087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75087*FLEN/8, x4, x1, x2) - -inst_25030: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3f999999; valaddr_reg:x3; val_offset:75090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75090*FLEN/8, x4, x1, x2) - -inst_25031: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:75093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75093*FLEN/8, x4, x1, x2) - -inst_25032: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:75096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75096*FLEN/8, x4, x1, x2) - -inst_25033: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:75099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75099*FLEN/8, x4, x1, x2) - -inst_25034: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:75102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75102*FLEN/8, x4, x1, x2) - -inst_25035: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:75105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75105*FLEN/8, x4, x1, x2) - -inst_25036: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:75108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75108*FLEN/8, x4, x1, x2) - -inst_25037: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:75111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75111*FLEN/8, x4, x1, x2) - -inst_25038: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:75114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75114*FLEN/8, x4, x1, x2) - -inst_25039: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:75117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75117*FLEN/8, x4, x1, x2) - -inst_25040: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:75120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75120*FLEN/8, x4, x1, x2) - -inst_25041: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:75123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75123*FLEN/8, x4, x1, x2) - -inst_25042: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:75126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75126*FLEN/8, x4, x1, x2) - -inst_25043: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbf800001; valaddr_reg:x3; val_offset:75129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75129*FLEN/8, x4, x1, x2) - -inst_25044: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbf800003; valaddr_reg:x3; val_offset:75132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75132*FLEN/8, x4, x1, x2) - -inst_25045: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbf800007; valaddr_reg:x3; val_offset:75135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75135*FLEN/8, x4, x1, x2) - -inst_25046: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbf999999; valaddr_reg:x3; val_offset:75138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75138*FLEN/8, x4, x1, x2) - -inst_25047: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:75141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75141*FLEN/8, x4, x1, x2) - -inst_25048: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:75144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75144*FLEN/8, x4, x1, x2) - -inst_25049: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:75147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75147*FLEN/8, x4, x1, x2) - -inst_25050: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:75150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75150*FLEN/8, x4, x1, x2) - -inst_25051: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:75153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75153*FLEN/8, x4, x1, x2) - -inst_25052: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:75156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75156*FLEN/8, x4, x1, x2) - -inst_25053: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:75159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75159*FLEN/8, x4, x1, x2) - -inst_25054: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:75162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75162*FLEN/8, x4, x1, x2) - -inst_25055: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:75165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75165*FLEN/8, x4, x1, x2) - -inst_25056: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:75168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75168*FLEN/8, x4, x1, x2) - -inst_25057: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:75171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75171*FLEN/8, x4, x1, x2) - -inst_25058: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:75174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75174*FLEN/8, x4, x1, x2) - -inst_25059: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9000000; valaddr_reg:x3; val_offset:75177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75177*FLEN/8, x4, x1, x2) - -inst_25060: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9000001; valaddr_reg:x3; val_offset:75180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75180*FLEN/8, x4, x1, x2) - -inst_25061: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9000003; valaddr_reg:x3; val_offset:75183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75183*FLEN/8, x4, x1, x2) - -inst_25062: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9000007; valaddr_reg:x3; val_offset:75186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75186*FLEN/8, x4, x1, x2) - -inst_25063: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc900000f; valaddr_reg:x3; val_offset:75189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75189*FLEN/8, x4, x1, x2) - -inst_25064: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc900001f; valaddr_reg:x3; val_offset:75192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75192*FLEN/8, x4, x1, x2) - -inst_25065: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc900003f; valaddr_reg:x3; val_offset:75195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75195*FLEN/8, x4, x1, x2) - -inst_25066: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc900007f; valaddr_reg:x3; val_offset:75198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75198*FLEN/8, x4, x1, x2) - -inst_25067: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc90000ff; valaddr_reg:x3; val_offset:75201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75201*FLEN/8, x4, x1, x2) - -inst_25068: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc90001ff; valaddr_reg:x3; val_offset:75204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75204*FLEN/8, x4, x1, x2) - -inst_25069: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc90003ff; valaddr_reg:x3; val_offset:75207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75207*FLEN/8, x4, x1, x2) - -inst_25070: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc90007ff; valaddr_reg:x3; val_offset:75210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75210*FLEN/8, x4, x1, x2) - -inst_25071: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9000fff; valaddr_reg:x3; val_offset:75213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75213*FLEN/8, x4, x1, x2) - -inst_25072: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9001fff; valaddr_reg:x3; val_offset:75216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75216*FLEN/8, x4, x1, x2) - -inst_25073: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9003fff; valaddr_reg:x3; val_offset:75219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75219*FLEN/8, x4, x1, x2) - -inst_25074: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9007fff; valaddr_reg:x3; val_offset:75222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75222*FLEN/8, x4, x1, x2) - -inst_25075: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc900ffff; valaddr_reg:x3; val_offset:75225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75225*FLEN/8, x4, x1, x2) - -inst_25076: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc901ffff; valaddr_reg:x3; val_offset:75228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75228*FLEN/8, x4, x1, x2) - -inst_25077: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc903ffff; valaddr_reg:x3; val_offset:75231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75231*FLEN/8, x4, x1, x2) - -inst_25078: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc907ffff; valaddr_reg:x3; val_offset:75234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75234*FLEN/8, x4, x1, x2) - -inst_25079: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc90fffff; valaddr_reg:x3; val_offset:75237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75237*FLEN/8, x4, x1, x2) - -inst_25080: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc91fffff; valaddr_reg:x3; val_offset:75240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75240*FLEN/8, x4, x1, x2) - -inst_25081: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc93fffff; valaddr_reg:x3; val_offset:75243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75243*FLEN/8, x4, x1, x2) - -inst_25082: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9400000; valaddr_reg:x3; val_offset:75246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75246*FLEN/8, x4, x1, x2) - -inst_25083: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9600000; valaddr_reg:x3; val_offset:75249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75249*FLEN/8, x4, x1, x2) - -inst_25084: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9700000; valaddr_reg:x3; val_offset:75252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75252*FLEN/8, x4, x1, x2) - -inst_25085: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc9780000; valaddr_reg:x3; val_offset:75255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75255*FLEN/8, x4, x1, x2) - -inst_25086: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97c0000; valaddr_reg:x3; val_offset:75258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75258*FLEN/8, x4, x1, x2) - -inst_25087: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97e0000; valaddr_reg:x3; val_offset:75261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75261*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_197) - -inst_25088: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97f0000; valaddr_reg:x3; val_offset:75264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75264*FLEN/8, x4, x1, x2) - -inst_25089: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97f8000; valaddr_reg:x3; val_offset:75267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75267*FLEN/8, x4, x1, x2) - -inst_25090: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97fc000; valaddr_reg:x3; val_offset:75270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75270*FLEN/8, x4, x1, x2) - -inst_25091: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97fe000; valaddr_reg:x3; val_offset:75273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75273*FLEN/8, x4, x1, x2) - -inst_25092: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97ff000; valaddr_reg:x3; val_offset:75276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75276*FLEN/8, x4, x1, x2) - -inst_25093: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97ff800; valaddr_reg:x3; val_offset:75279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75279*FLEN/8, x4, x1, x2) - -inst_25094: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97ffc00; valaddr_reg:x3; val_offset:75282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75282*FLEN/8, x4, x1, x2) - -inst_25095: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97ffe00; valaddr_reg:x3; val_offset:75285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75285*FLEN/8, x4, x1, x2) - -inst_25096: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97fff00; valaddr_reg:x3; val_offset:75288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75288*FLEN/8, x4, x1, x2) - -inst_25097: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97fff80; valaddr_reg:x3; val_offset:75291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75291*FLEN/8, x4, x1, x2) - -inst_25098: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97fffc0; valaddr_reg:x3; val_offset:75294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75294*FLEN/8, x4, x1, x2) - -inst_25099: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97fffe0; valaddr_reg:x3; val_offset:75297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75297*FLEN/8, x4, x1, x2) - -inst_25100: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97ffff0; valaddr_reg:x3; val_offset:75300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75300*FLEN/8, x4, x1, x2) - -inst_25101: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97ffff8; valaddr_reg:x3; val_offset:75303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75303*FLEN/8, x4, x1, x2) - -inst_25102: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97ffffc; valaddr_reg:x3; val_offset:75306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75306*FLEN/8, x4, x1, x2) - -inst_25103: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97ffffe; valaddr_reg:x3; val_offset:75309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75309*FLEN/8, x4, x1, x2) - -inst_25104: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; -op3val:0xc97fffff; valaddr_reg:x3; val_offset:75312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75312*FLEN/8, x4, x1, x2) - -inst_25105: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbf800001; valaddr_reg:x3; val_offset:75315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75315*FLEN/8, x4, x1, x2) - -inst_25106: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbf800003; valaddr_reg:x3; val_offset:75318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75318*FLEN/8, x4, x1, x2) - -inst_25107: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbf800007; valaddr_reg:x3; val_offset:75321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75321*FLEN/8, x4, x1, x2) - -inst_25108: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbf999999; valaddr_reg:x3; val_offset:75324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75324*FLEN/8, x4, x1, x2) - -inst_25109: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:75327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75327*FLEN/8, x4, x1, x2) - -inst_25110: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:75330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75330*FLEN/8, x4, x1, x2) - -inst_25111: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:75333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75333*FLEN/8, x4, x1, x2) - -inst_25112: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:75336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75336*FLEN/8, x4, x1, x2) - -inst_25113: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:75339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75339*FLEN/8, x4, x1, x2) - -inst_25114: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:75342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75342*FLEN/8, x4, x1, x2) - -inst_25115: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:75345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75345*FLEN/8, x4, x1, x2) - -inst_25116: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:75348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75348*FLEN/8, x4, x1, x2) - -inst_25117: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:75351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75351*FLEN/8, x4, x1, x2) - -inst_25118: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:75354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75354*FLEN/8, x4, x1, x2) - -inst_25119: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:75357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75357*FLEN/8, x4, x1, x2) - -inst_25120: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:75360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75360*FLEN/8, x4, x1, x2) - -inst_25121: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1800000; valaddr_reg:x3; val_offset:75363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75363*FLEN/8, x4, x1, x2) - -inst_25122: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1800001; valaddr_reg:x3; val_offset:75366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75366*FLEN/8, x4, x1, x2) - -inst_25123: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1800003; valaddr_reg:x3; val_offset:75369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75369*FLEN/8, x4, x1, x2) - -inst_25124: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1800007; valaddr_reg:x3; val_offset:75372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75372*FLEN/8, x4, x1, x2) - -inst_25125: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc180000f; valaddr_reg:x3; val_offset:75375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75375*FLEN/8, x4, x1, x2) - -inst_25126: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc180001f; valaddr_reg:x3; val_offset:75378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75378*FLEN/8, x4, x1, x2) - -inst_25127: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc180003f; valaddr_reg:x3; val_offset:75381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75381*FLEN/8, x4, x1, x2) - -inst_25128: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc180007f; valaddr_reg:x3; val_offset:75384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75384*FLEN/8, x4, x1, x2) - -inst_25129: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc18000ff; valaddr_reg:x3; val_offset:75387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75387*FLEN/8, x4, x1, x2) - -inst_25130: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc18001ff; valaddr_reg:x3; val_offset:75390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75390*FLEN/8, x4, x1, x2) - -inst_25131: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc18003ff; valaddr_reg:x3; val_offset:75393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75393*FLEN/8, x4, x1, x2) - -inst_25132: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc18007ff; valaddr_reg:x3; val_offset:75396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75396*FLEN/8, x4, x1, x2) - -inst_25133: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1800fff; valaddr_reg:x3; val_offset:75399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75399*FLEN/8, x4, x1, x2) - -inst_25134: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1801fff; valaddr_reg:x3; val_offset:75402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75402*FLEN/8, x4, x1, x2) - -inst_25135: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1803fff; valaddr_reg:x3; val_offset:75405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75405*FLEN/8, x4, x1, x2) - -inst_25136: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1807fff; valaddr_reg:x3; val_offset:75408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75408*FLEN/8, x4, x1, x2) - -inst_25137: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc180ffff; valaddr_reg:x3; val_offset:75411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75411*FLEN/8, x4, x1, x2) - -inst_25138: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc181ffff; valaddr_reg:x3; val_offset:75414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75414*FLEN/8, x4, x1, x2) - -inst_25139: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc183ffff; valaddr_reg:x3; val_offset:75417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75417*FLEN/8, x4, x1, x2) - -inst_25140: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc187ffff; valaddr_reg:x3; val_offset:75420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75420*FLEN/8, x4, x1, x2) - -inst_25141: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc18fffff; valaddr_reg:x3; val_offset:75423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75423*FLEN/8, x4, x1, x2) - -inst_25142: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc19fffff; valaddr_reg:x3; val_offset:75426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75426*FLEN/8, x4, x1, x2) - -inst_25143: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1bfffff; valaddr_reg:x3; val_offset:75429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75429*FLEN/8, x4, x1, x2) - -inst_25144: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1c00000; valaddr_reg:x3; val_offset:75432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75432*FLEN/8, x4, x1, x2) - -inst_25145: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1e00000; valaddr_reg:x3; val_offset:75435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75435*FLEN/8, x4, x1, x2) - -inst_25146: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1f00000; valaddr_reg:x3; val_offset:75438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75438*FLEN/8, x4, x1, x2) - -inst_25147: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1f80000; valaddr_reg:x3; val_offset:75441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75441*FLEN/8, x4, x1, x2) - -inst_25148: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fc0000; valaddr_reg:x3; val_offset:75444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75444*FLEN/8, x4, x1, x2) - -inst_25149: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fe0000; valaddr_reg:x3; val_offset:75447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75447*FLEN/8, x4, x1, x2) - -inst_25150: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ff0000; valaddr_reg:x3; val_offset:75450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75450*FLEN/8, x4, x1, x2) - -inst_25151: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ff8000; valaddr_reg:x3; val_offset:75453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75453*FLEN/8, x4, x1, x2) - -inst_25152: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ffc000; valaddr_reg:x3; val_offset:75456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75456*FLEN/8, x4, x1, x2) - -inst_25153: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ffe000; valaddr_reg:x3; val_offset:75459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75459*FLEN/8, x4, x1, x2) - -inst_25154: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fff000; valaddr_reg:x3; val_offset:75462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75462*FLEN/8, x4, x1, x2) - -inst_25155: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fff800; valaddr_reg:x3; val_offset:75465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75465*FLEN/8, x4, x1, x2) - -inst_25156: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fffc00; valaddr_reg:x3; val_offset:75468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75468*FLEN/8, x4, x1, x2) - -inst_25157: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fffe00; valaddr_reg:x3; val_offset:75471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75471*FLEN/8, x4, x1, x2) - -inst_25158: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ffff00; valaddr_reg:x3; val_offset:75474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75474*FLEN/8, x4, x1, x2) - -inst_25159: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ffff80; valaddr_reg:x3; val_offset:75477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75477*FLEN/8, x4, x1, x2) - -inst_25160: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ffffc0; valaddr_reg:x3; val_offset:75480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75480*FLEN/8, x4, x1, x2) - -inst_25161: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ffffe0; valaddr_reg:x3; val_offset:75483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75483*FLEN/8, x4, x1, x2) - -inst_25162: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fffff0; valaddr_reg:x3; val_offset:75486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75486*FLEN/8, x4, x1, x2) - -inst_25163: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fffff8; valaddr_reg:x3; val_offset:75489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75489*FLEN/8, x4, x1, x2) - -inst_25164: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fffffc; valaddr_reg:x3; val_offset:75492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75492*FLEN/8, x4, x1, x2) - -inst_25165: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1fffffe; valaddr_reg:x3; val_offset:75495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75495*FLEN/8, x4, x1, x2) - -inst_25166: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; -op3val:0xc1ffffff; valaddr_reg:x3; val_offset:75498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75498*FLEN/8, x4, x1, x2) - -inst_25167: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3f800001; valaddr_reg:x3; val_offset:75501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75501*FLEN/8, x4, x1, x2) - -inst_25168: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3f800003; valaddr_reg:x3; val_offset:75504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75504*FLEN/8, x4, x1, x2) - -inst_25169: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3f800007; valaddr_reg:x3; val_offset:75507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75507*FLEN/8, x4, x1, x2) - -inst_25170: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3f999999; valaddr_reg:x3; val_offset:75510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75510*FLEN/8, x4, x1, x2) - -inst_25171: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:75513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75513*FLEN/8, x4, x1, x2) - -inst_25172: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:75516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75516*FLEN/8, x4, x1, x2) - -inst_25173: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:75519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75519*FLEN/8, x4, x1, x2) - -inst_25174: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:75522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75522*FLEN/8, x4, x1, x2) - -inst_25175: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:75525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75525*FLEN/8, x4, x1, x2) - -inst_25176: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:75528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75528*FLEN/8, x4, x1, x2) - -inst_25177: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:75531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75531*FLEN/8, x4, x1, x2) - -inst_25178: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:75534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75534*FLEN/8, x4, x1, x2) - -inst_25179: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:75537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75537*FLEN/8, x4, x1, x2) - -inst_25180: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:75540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75540*FLEN/8, x4, x1, x2) - -inst_25181: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:75543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75543*FLEN/8, x4, x1, x2) - -inst_25182: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:75546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75546*FLEN/8, x4, x1, x2) - -inst_25183: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c000000; valaddr_reg:x3; val_offset:75549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75549*FLEN/8, x4, x1, x2) - -inst_25184: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c000001; valaddr_reg:x3; val_offset:75552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75552*FLEN/8, x4, x1, x2) - -inst_25185: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c000003; valaddr_reg:x3; val_offset:75555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75555*FLEN/8, x4, x1, x2) - -inst_25186: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c000007; valaddr_reg:x3; val_offset:75558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75558*FLEN/8, x4, x1, x2) - -inst_25187: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c00000f; valaddr_reg:x3; val_offset:75561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75561*FLEN/8, x4, x1, x2) - -inst_25188: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c00001f; valaddr_reg:x3; val_offset:75564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75564*FLEN/8, x4, x1, x2) - -inst_25189: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c00003f; valaddr_reg:x3; val_offset:75567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75567*FLEN/8, x4, x1, x2) - -inst_25190: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c00007f; valaddr_reg:x3; val_offset:75570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75570*FLEN/8, x4, x1, x2) - -inst_25191: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c0000ff; valaddr_reg:x3; val_offset:75573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75573*FLEN/8, x4, x1, x2) - -inst_25192: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c0001ff; valaddr_reg:x3; val_offset:75576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75576*FLEN/8, x4, x1, x2) - -inst_25193: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c0003ff; valaddr_reg:x3; val_offset:75579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75579*FLEN/8, x4, x1, x2) - -inst_25194: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c0007ff; valaddr_reg:x3; val_offset:75582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75582*FLEN/8, x4, x1, x2) - -inst_25195: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c000fff; valaddr_reg:x3; val_offset:75585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75585*FLEN/8, x4, x1, x2) - -inst_25196: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c001fff; valaddr_reg:x3; val_offset:75588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75588*FLEN/8, x4, x1, x2) - -inst_25197: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c003fff; valaddr_reg:x3; val_offset:75591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75591*FLEN/8, x4, x1, x2) - -inst_25198: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c007fff; valaddr_reg:x3; val_offset:75594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75594*FLEN/8, x4, x1, x2) - -inst_25199: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c00ffff; valaddr_reg:x3; val_offset:75597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75597*FLEN/8, x4, x1, x2) - -inst_25200: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c01ffff; valaddr_reg:x3; val_offset:75600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75600*FLEN/8, x4, x1, x2) - -inst_25201: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c03ffff; valaddr_reg:x3; val_offset:75603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75603*FLEN/8, x4, x1, x2) - -inst_25202: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c07ffff; valaddr_reg:x3; val_offset:75606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75606*FLEN/8, x4, x1, x2) - -inst_25203: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c0fffff; valaddr_reg:x3; val_offset:75609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75609*FLEN/8, x4, x1, x2) - -inst_25204: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c1fffff; valaddr_reg:x3; val_offset:75612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75612*FLEN/8, x4, x1, x2) - -inst_25205: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c3fffff; valaddr_reg:x3; val_offset:75615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75615*FLEN/8, x4, x1, x2) - -inst_25206: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c400000; valaddr_reg:x3; val_offset:75618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75618*FLEN/8, x4, x1, x2) - -inst_25207: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c600000; valaddr_reg:x3; val_offset:75621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75621*FLEN/8, x4, x1, x2) - -inst_25208: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c700000; valaddr_reg:x3; val_offset:75624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75624*FLEN/8, x4, x1, x2) - -inst_25209: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c780000; valaddr_reg:x3; val_offset:75627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75627*FLEN/8, x4, x1, x2) - -inst_25210: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7c0000; valaddr_reg:x3; val_offset:75630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75630*FLEN/8, x4, x1, x2) - -inst_25211: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7e0000; valaddr_reg:x3; val_offset:75633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75633*FLEN/8, x4, x1, x2) - -inst_25212: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7f0000; valaddr_reg:x3; val_offset:75636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75636*FLEN/8, x4, x1, x2) - -inst_25213: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7f8000; valaddr_reg:x3; val_offset:75639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75639*FLEN/8, x4, x1, x2) - -inst_25214: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7fc000; valaddr_reg:x3; val_offset:75642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75642*FLEN/8, x4, x1, x2) - -inst_25215: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7fe000; valaddr_reg:x3; val_offset:75645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75645*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_198) - -inst_25216: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7ff000; valaddr_reg:x3; val_offset:75648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75648*FLEN/8, x4, x1, x2) - -inst_25217: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7ff800; valaddr_reg:x3; val_offset:75651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75651*FLEN/8, x4, x1, x2) - -inst_25218: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7ffc00; valaddr_reg:x3; val_offset:75654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75654*FLEN/8, x4, x1, x2) - -inst_25219: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7ffe00; valaddr_reg:x3; val_offset:75657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75657*FLEN/8, x4, x1, x2) - -inst_25220: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7fff00; valaddr_reg:x3; val_offset:75660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75660*FLEN/8, x4, x1, x2) - -inst_25221: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7fff80; valaddr_reg:x3; val_offset:75663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75663*FLEN/8, x4, x1, x2) - -inst_25222: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7fffc0; valaddr_reg:x3; val_offset:75666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75666*FLEN/8, x4, x1, x2) - -inst_25223: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7fffe0; valaddr_reg:x3; val_offset:75669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75669*FLEN/8, x4, x1, x2) - -inst_25224: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7ffff0; valaddr_reg:x3; val_offset:75672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75672*FLEN/8, x4, x1, x2) - -inst_25225: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7ffff8; valaddr_reg:x3; val_offset:75675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75675*FLEN/8, x4, x1, x2) - -inst_25226: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7ffffc; valaddr_reg:x3; val_offset:75678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75678*FLEN/8, x4, x1, x2) - -inst_25227: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7ffffe; valaddr_reg:x3; val_offset:75681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75681*FLEN/8, x4, x1, x2) - -inst_25228: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; -op3val:0x4c7fffff; valaddr_reg:x3; val_offset:75684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75684*FLEN/8, x4, x1, x2) - -inst_25229: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbf800001; valaddr_reg:x3; val_offset:75687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75687*FLEN/8, x4, x1, x2) - -inst_25230: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbf800003; valaddr_reg:x3; val_offset:75690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75690*FLEN/8, x4, x1, x2) - -inst_25231: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbf800007; valaddr_reg:x3; val_offset:75693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75693*FLEN/8, x4, x1, x2) - -inst_25232: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbf999999; valaddr_reg:x3; val_offset:75696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75696*FLEN/8, x4, x1, x2) - -inst_25233: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:75699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75699*FLEN/8, x4, x1, x2) - -inst_25234: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:75702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75702*FLEN/8, x4, x1, x2) - -inst_25235: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:75705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75705*FLEN/8, x4, x1, x2) - -inst_25236: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:75708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75708*FLEN/8, x4, x1, x2) - -inst_25237: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:75711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75711*FLEN/8, x4, x1, x2) - -inst_25238: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:75714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75714*FLEN/8, x4, x1, x2) - -inst_25239: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:75717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75717*FLEN/8, x4, x1, x2) - -inst_25240: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:75720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75720*FLEN/8, x4, x1, x2) - -inst_25241: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:75723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75723*FLEN/8, x4, x1, x2) - -inst_25242: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:75726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75726*FLEN/8, x4, x1, x2) - -inst_25243: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:75729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75729*FLEN/8, x4, x1, x2) - -inst_25244: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:75732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75732*FLEN/8, x4, x1, x2) - -inst_25245: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0800000; valaddr_reg:x3; val_offset:75735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75735*FLEN/8, x4, x1, x2) - -inst_25246: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0800001; valaddr_reg:x3; val_offset:75738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75738*FLEN/8, x4, x1, x2) - -inst_25247: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0800003; valaddr_reg:x3; val_offset:75741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75741*FLEN/8, x4, x1, x2) - -inst_25248: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0800007; valaddr_reg:x3; val_offset:75744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75744*FLEN/8, x4, x1, x2) - -inst_25249: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc080000f; valaddr_reg:x3; val_offset:75747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75747*FLEN/8, x4, x1, x2) - -inst_25250: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc080001f; valaddr_reg:x3; val_offset:75750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75750*FLEN/8, x4, x1, x2) - -inst_25251: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc080003f; valaddr_reg:x3; val_offset:75753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75753*FLEN/8, x4, x1, x2) - -inst_25252: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc080007f; valaddr_reg:x3; val_offset:75756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75756*FLEN/8, x4, x1, x2) - -inst_25253: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc08000ff; valaddr_reg:x3; val_offset:75759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75759*FLEN/8, x4, x1, x2) - -inst_25254: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc08001ff; valaddr_reg:x3; val_offset:75762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75762*FLEN/8, x4, x1, x2) - -inst_25255: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc08003ff; valaddr_reg:x3; val_offset:75765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75765*FLEN/8, x4, x1, x2) - -inst_25256: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc08007ff; valaddr_reg:x3; val_offset:75768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75768*FLEN/8, x4, x1, x2) - -inst_25257: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0800fff; valaddr_reg:x3; val_offset:75771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75771*FLEN/8, x4, x1, x2) - -inst_25258: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0801fff; valaddr_reg:x3; val_offset:75774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75774*FLEN/8, x4, x1, x2) - -inst_25259: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0803fff; valaddr_reg:x3; val_offset:75777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75777*FLEN/8, x4, x1, x2) - -inst_25260: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0807fff; valaddr_reg:x3; val_offset:75780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75780*FLEN/8, x4, x1, x2) - -inst_25261: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc080ffff; valaddr_reg:x3; val_offset:75783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75783*FLEN/8, x4, x1, x2) - -inst_25262: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc081ffff; valaddr_reg:x3; val_offset:75786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75786*FLEN/8, x4, x1, x2) - -inst_25263: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc083ffff; valaddr_reg:x3; val_offset:75789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75789*FLEN/8, x4, x1, x2) - -inst_25264: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc087ffff; valaddr_reg:x3; val_offset:75792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75792*FLEN/8, x4, x1, x2) - -inst_25265: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc08fffff; valaddr_reg:x3; val_offset:75795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75795*FLEN/8, x4, x1, x2) - -inst_25266: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc09fffff; valaddr_reg:x3; val_offset:75798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75798*FLEN/8, x4, x1, x2) - -inst_25267: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0bfffff; valaddr_reg:x3; val_offset:75801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75801*FLEN/8, x4, x1, x2) - -inst_25268: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0c00000; valaddr_reg:x3; val_offset:75804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75804*FLEN/8, x4, x1, x2) - -inst_25269: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0e00000; valaddr_reg:x3; val_offset:75807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75807*FLEN/8, x4, x1, x2) - -inst_25270: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0f00000; valaddr_reg:x3; val_offset:75810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75810*FLEN/8, x4, x1, x2) - -inst_25271: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0f80000; valaddr_reg:x3; val_offset:75813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75813*FLEN/8, x4, x1, x2) - -inst_25272: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fc0000; valaddr_reg:x3; val_offset:75816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75816*FLEN/8, x4, x1, x2) - -inst_25273: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fe0000; valaddr_reg:x3; val_offset:75819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75819*FLEN/8, x4, x1, x2) - -inst_25274: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ff0000; valaddr_reg:x3; val_offset:75822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75822*FLEN/8, x4, x1, x2) - -inst_25275: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ff8000; valaddr_reg:x3; val_offset:75825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75825*FLEN/8, x4, x1, x2) - -inst_25276: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ffc000; valaddr_reg:x3; val_offset:75828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75828*FLEN/8, x4, x1, x2) - -inst_25277: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ffe000; valaddr_reg:x3; val_offset:75831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75831*FLEN/8, x4, x1, x2) - -inst_25278: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fff000; valaddr_reg:x3; val_offset:75834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75834*FLEN/8, x4, x1, x2) - -inst_25279: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fff800; valaddr_reg:x3; val_offset:75837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75837*FLEN/8, x4, x1, x2) - -inst_25280: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fffc00; valaddr_reg:x3; val_offset:75840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75840*FLEN/8, x4, x1, x2) - -inst_25281: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fffe00; valaddr_reg:x3; val_offset:75843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75843*FLEN/8, x4, x1, x2) - -inst_25282: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ffff00; valaddr_reg:x3; val_offset:75846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75846*FLEN/8, x4, x1, x2) - -inst_25283: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ffff80; valaddr_reg:x3; val_offset:75849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75849*FLEN/8, x4, x1, x2) - -inst_25284: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ffffc0; valaddr_reg:x3; val_offset:75852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75852*FLEN/8, x4, x1, x2) - -inst_25285: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ffffe0; valaddr_reg:x3; val_offset:75855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75855*FLEN/8, x4, x1, x2) - -inst_25286: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fffff0; valaddr_reg:x3; val_offset:75858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75858*FLEN/8, x4, x1, x2) - -inst_25287: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fffff8; valaddr_reg:x3; val_offset:75861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75861*FLEN/8, x4, x1, x2) - -inst_25288: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fffffc; valaddr_reg:x3; val_offset:75864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75864*FLEN/8, x4, x1, x2) - -inst_25289: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0fffffe; valaddr_reg:x3; val_offset:75867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75867*FLEN/8, x4, x1, x2) - -inst_25290: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; -op3val:0xc0ffffff; valaddr_reg:x3; val_offset:75870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75870*FLEN/8, x4, x1, x2) - -inst_25291: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:75873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75873*FLEN/8, x4, x1, x2) - -inst_25292: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:75876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75876*FLEN/8, x4, x1, x2) - -inst_25293: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:75879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75879*FLEN/8, x4, x1, x2) - -inst_25294: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:75882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75882*FLEN/8, x4, x1, x2) - -inst_25295: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:75885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75885*FLEN/8, x4, x1, x2) - -inst_25296: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:75888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75888*FLEN/8, x4, x1, x2) - -inst_25297: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:75891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75891*FLEN/8, x4, x1, x2) - -inst_25298: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:75894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75894*FLEN/8, x4, x1, x2) - -inst_25299: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:75897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75897*FLEN/8, x4, x1, x2) - -inst_25300: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:75900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75900*FLEN/8, x4, x1, x2) - -inst_25301: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:75903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75903*FLEN/8, x4, x1, x2) - -inst_25302: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:75906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75906*FLEN/8, x4, x1, x2) - -inst_25303: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:75909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75909*FLEN/8, x4, x1, x2) - -inst_25304: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:75912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75912*FLEN/8, x4, x1, x2) - -inst_25305: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:75915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75915*FLEN/8, x4, x1, x2) - -inst_25306: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:75918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75918*FLEN/8, x4, x1, x2) - -inst_25307: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10000000; valaddr_reg:x3; val_offset:75921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75921*FLEN/8, x4, x1, x2) - -inst_25308: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10000001; valaddr_reg:x3; val_offset:75924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75924*FLEN/8, x4, x1, x2) - -inst_25309: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10000003; valaddr_reg:x3; val_offset:75927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75927*FLEN/8, x4, x1, x2) - -inst_25310: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10000007; valaddr_reg:x3; val_offset:75930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75930*FLEN/8, x4, x1, x2) - -inst_25311: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1000000f; valaddr_reg:x3; val_offset:75933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75933*FLEN/8, x4, x1, x2) - -inst_25312: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1000001f; valaddr_reg:x3; val_offset:75936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75936*FLEN/8, x4, x1, x2) - -inst_25313: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1000003f; valaddr_reg:x3; val_offset:75939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75939*FLEN/8, x4, x1, x2) - -inst_25314: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1000007f; valaddr_reg:x3; val_offset:75942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75942*FLEN/8, x4, x1, x2) - -inst_25315: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x100000ff; valaddr_reg:x3; val_offset:75945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75945*FLEN/8, x4, x1, x2) - -inst_25316: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x100001ff; valaddr_reg:x3; val_offset:75948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75948*FLEN/8, x4, x1, x2) - -inst_25317: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x100003ff; valaddr_reg:x3; val_offset:75951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75951*FLEN/8, x4, x1, x2) - -inst_25318: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x100007ff; valaddr_reg:x3; val_offset:75954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75954*FLEN/8, x4, x1, x2) - -inst_25319: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10000fff; valaddr_reg:x3; val_offset:75957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75957*FLEN/8, x4, x1, x2) - -inst_25320: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10001fff; valaddr_reg:x3; val_offset:75960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75960*FLEN/8, x4, x1, x2) - -inst_25321: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10003fff; valaddr_reg:x3; val_offset:75963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75963*FLEN/8, x4, x1, x2) - -inst_25322: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10007fff; valaddr_reg:x3; val_offset:75966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75966*FLEN/8, x4, x1, x2) - -inst_25323: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1000ffff; valaddr_reg:x3; val_offset:75969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75969*FLEN/8, x4, x1, x2) - -inst_25324: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1001ffff; valaddr_reg:x3; val_offset:75972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75972*FLEN/8, x4, x1, x2) - -inst_25325: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1003ffff; valaddr_reg:x3; val_offset:75975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75975*FLEN/8, x4, x1, x2) - -inst_25326: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x1007ffff; valaddr_reg:x3; val_offset:75978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75978*FLEN/8, x4, x1, x2) - -inst_25327: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x100fffff; valaddr_reg:x3; val_offset:75981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75981*FLEN/8, x4, x1, x2) - -inst_25328: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x101fffff; valaddr_reg:x3; val_offset:75984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75984*FLEN/8, x4, x1, x2) - -inst_25329: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x103fffff; valaddr_reg:x3; val_offset:75987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75987*FLEN/8, x4, x1, x2) - -inst_25330: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10400000; valaddr_reg:x3; val_offset:75990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75990*FLEN/8, x4, x1, x2) - -inst_25331: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10600000; valaddr_reg:x3; val_offset:75993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75993*FLEN/8, x4, x1, x2) - -inst_25332: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10700000; valaddr_reg:x3; val_offset:75996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75996*FLEN/8, x4, x1, x2) - -inst_25333: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x10780000; valaddr_reg:x3; val_offset:75999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75999*FLEN/8, x4, x1, x2) - -inst_25334: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107c0000; valaddr_reg:x3; val_offset:76002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76002*FLEN/8, x4, x1, x2) - -inst_25335: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107e0000; valaddr_reg:x3; val_offset:76005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76005*FLEN/8, x4, x1, x2) - -inst_25336: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107f0000; valaddr_reg:x3; val_offset:76008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76008*FLEN/8, x4, x1, x2) - -inst_25337: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107f8000; valaddr_reg:x3; val_offset:76011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76011*FLEN/8, x4, x1, x2) - -inst_25338: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107fc000; valaddr_reg:x3; val_offset:76014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76014*FLEN/8, x4, x1, x2) - -inst_25339: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107fe000; valaddr_reg:x3; val_offset:76017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76017*FLEN/8, x4, x1, x2) - -inst_25340: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107ff000; valaddr_reg:x3; val_offset:76020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76020*FLEN/8, x4, x1, x2) - -inst_25341: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107ff800; valaddr_reg:x3; val_offset:76023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76023*FLEN/8, x4, x1, x2) - -inst_25342: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107ffc00; valaddr_reg:x3; val_offset:76026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76026*FLEN/8, x4, x1, x2) - -inst_25343: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107ffe00; valaddr_reg:x3; val_offset:76029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76029*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_199) - -inst_25344: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107fff00; valaddr_reg:x3; val_offset:76032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76032*FLEN/8, x4, x1, x2) - -inst_25345: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107fff80; valaddr_reg:x3; val_offset:76035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76035*FLEN/8, x4, x1, x2) - -inst_25346: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107fffc0; valaddr_reg:x3; val_offset:76038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76038*FLEN/8, x4, x1, x2) - -inst_25347: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107fffe0; valaddr_reg:x3; val_offset:76041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76041*FLEN/8, x4, x1, x2) - -inst_25348: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107ffff0; valaddr_reg:x3; val_offset:76044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76044*FLEN/8, x4, x1, x2) - -inst_25349: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107ffff8; valaddr_reg:x3; val_offset:76047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76047*FLEN/8, x4, x1, x2) - -inst_25350: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107ffffc; valaddr_reg:x3; val_offset:76050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76050*FLEN/8, x4, x1, x2) - -inst_25351: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107ffffe; valaddr_reg:x3; val_offset:76053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76053*FLEN/8, x4, x1, x2) - -inst_25352: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; -op3val:0x107fffff; valaddr_reg:x3; val_offset:76056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76056*FLEN/8, x4, x1, x2) - -inst_25353: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3f800001; valaddr_reg:x3; val_offset:76059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76059*FLEN/8, x4, x1, x2) - -inst_25354: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3f800003; valaddr_reg:x3; val_offset:76062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76062*FLEN/8, x4, x1, x2) - -inst_25355: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3f800007; valaddr_reg:x3; val_offset:76065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76065*FLEN/8, x4, x1, x2) - -inst_25356: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3f999999; valaddr_reg:x3; val_offset:76068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76068*FLEN/8, x4, x1, x2) - -inst_25357: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:76071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76071*FLEN/8, x4, x1, x2) - -inst_25358: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:76074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76074*FLEN/8, x4, x1, x2) - -inst_25359: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:76077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76077*FLEN/8, x4, x1, x2) - -inst_25360: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:76080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76080*FLEN/8, x4, x1, x2) - -inst_25361: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:76083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76083*FLEN/8, x4, x1, x2) - -inst_25362: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:76086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76086*FLEN/8, x4, x1, x2) - -inst_25363: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:76089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76089*FLEN/8, x4, x1, x2) - -inst_25364: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:76092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76092*FLEN/8, x4, x1, x2) - -inst_25365: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:76095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76095*FLEN/8, x4, x1, x2) - -inst_25366: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:76098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76098*FLEN/8, x4, x1, x2) - -inst_25367: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:76101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76101*FLEN/8, x4, x1, x2) - -inst_25368: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:76104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76104*FLEN/8, x4, x1, x2) - -inst_25369: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d000000; valaddr_reg:x3; val_offset:76107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76107*FLEN/8, x4, x1, x2) - -inst_25370: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d000001; valaddr_reg:x3; val_offset:76110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76110*FLEN/8, x4, x1, x2) - -inst_25371: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d000003; valaddr_reg:x3; val_offset:76113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76113*FLEN/8, x4, x1, x2) - -inst_25372: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d000007; valaddr_reg:x3; val_offset:76116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76116*FLEN/8, x4, x1, x2) - -inst_25373: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d00000f; valaddr_reg:x3; val_offset:76119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76119*FLEN/8, x4, x1, x2) - -inst_25374: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d00001f; valaddr_reg:x3; val_offset:76122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76122*FLEN/8, x4, x1, x2) - -inst_25375: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d00003f; valaddr_reg:x3; val_offset:76125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76125*FLEN/8, x4, x1, x2) - -inst_25376: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d00007f; valaddr_reg:x3; val_offset:76128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76128*FLEN/8, x4, x1, x2) - -inst_25377: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d0000ff; valaddr_reg:x3; val_offset:76131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76131*FLEN/8, x4, x1, x2) - -inst_25378: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d0001ff; valaddr_reg:x3; val_offset:76134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76134*FLEN/8, x4, x1, x2) - -inst_25379: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d0003ff; valaddr_reg:x3; val_offset:76137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76137*FLEN/8, x4, x1, x2) - -inst_25380: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d0007ff; valaddr_reg:x3; val_offset:76140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76140*FLEN/8, x4, x1, x2) - -inst_25381: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d000fff; valaddr_reg:x3; val_offset:76143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76143*FLEN/8, x4, x1, x2) - -inst_25382: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d001fff; valaddr_reg:x3; val_offset:76146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76146*FLEN/8, x4, x1, x2) - -inst_25383: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d003fff; valaddr_reg:x3; val_offset:76149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76149*FLEN/8, x4, x1, x2) - -inst_25384: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d007fff; valaddr_reg:x3; val_offset:76152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76152*FLEN/8, x4, x1, x2) - -inst_25385: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d00ffff; valaddr_reg:x3; val_offset:76155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76155*FLEN/8, x4, x1, x2) - -inst_25386: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d01ffff; valaddr_reg:x3; val_offset:76158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76158*FLEN/8, x4, x1, x2) - -inst_25387: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d03ffff; valaddr_reg:x3; val_offset:76161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76161*FLEN/8, x4, x1, x2) - -inst_25388: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d07ffff; valaddr_reg:x3; val_offset:76164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76164*FLEN/8, x4, x1, x2) - -inst_25389: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d0fffff; valaddr_reg:x3; val_offset:76167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76167*FLEN/8, x4, x1, x2) - -inst_25390: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d1fffff; valaddr_reg:x3; val_offset:76170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76170*FLEN/8, x4, x1, x2) - -inst_25391: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d3fffff; valaddr_reg:x3; val_offset:76173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76173*FLEN/8, x4, x1, x2) - -inst_25392: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d400000; valaddr_reg:x3; val_offset:76176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76176*FLEN/8, x4, x1, x2) - -inst_25393: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d600000; valaddr_reg:x3; val_offset:76179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76179*FLEN/8, x4, x1, x2) - -inst_25394: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d700000; valaddr_reg:x3; val_offset:76182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76182*FLEN/8, x4, x1, x2) - -inst_25395: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d780000; valaddr_reg:x3; val_offset:76185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76185*FLEN/8, x4, x1, x2) - -inst_25396: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7c0000; valaddr_reg:x3; val_offset:76188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76188*FLEN/8, x4, x1, x2) - -inst_25397: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7e0000; valaddr_reg:x3; val_offset:76191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76191*FLEN/8, x4, x1, x2) - -inst_25398: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7f0000; valaddr_reg:x3; val_offset:76194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76194*FLEN/8, x4, x1, x2) - -inst_25399: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7f8000; valaddr_reg:x3; val_offset:76197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76197*FLEN/8, x4, x1, x2) - -inst_25400: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7fc000; valaddr_reg:x3; val_offset:76200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76200*FLEN/8, x4, x1, x2) - -inst_25401: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7fe000; valaddr_reg:x3; val_offset:76203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76203*FLEN/8, x4, x1, x2) - -inst_25402: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7ff000; valaddr_reg:x3; val_offset:76206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76206*FLEN/8, x4, x1, x2) - -inst_25403: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7ff800; valaddr_reg:x3; val_offset:76209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76209*FLEN/8, x4, x1, x2) - -inst_25404: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7ffc00; valaddr_reg:x3; val_offset:76212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76212*FLEN/8, x4, x1, x2) - -inst_25405: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7ffe00; valaddr_reg:x3; val_offset:76215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76215*FLEN/8, x4, x1, x2) - -inst_25406: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7fff00; valaddr_reg:x3; val_offset:76218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76218*FLEN/8, x4, x1, x2) - -inst_25407: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7fff80; valaddr_reg:x3; val_offset:76221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76221*FLEN/8, x4, x1, x2) - -inst_25408: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7fffc0; valaddr_reg:x3; val_offset:76224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76224*FLEN/8, x4, x1, x2) - -inst_25409: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7fffe0; valaddr_reg:x3; val_offset:76227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76227*FLEN/8, x4, x1, x2) - -inst_25410: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7ffff0; valaddr_reg:x3; val_offset:76230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76230*FLEN/8, x4, x1, x2) - -inst_25411: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7ffff8; valaddr_reg:x3; val_offset:76233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76233*FLEN/8, x4, x1, x2) - -inst_25412: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7ffffc; valaddr_reg:x3; val_offset:76236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76236*FLEN/8, x4, x1, x2) - -inst_25413: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7ffffe; valaddr_reg:x3; val_offset:76239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76239*FLEN/8, x4, x1, x2) - -inst_25414: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; -op3val:0x4d7fffff; valaddr_reg:x3; val_offset:76242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76242*FLEN/8, x4, x1, x2) - -inst_25415: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67000000; valaddr_reg:x3; val_offset:76245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76245*FLEN/8, x4, x1, x2) - -inst_25416: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67000001; valaddr_reg:x3; val_offset:76248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76248*FLEN/8, x4, x1, x2) - -inst_25417: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67000003; valaddr_reg:x3; val_offset:76251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76251*FLEN/8, x4, x1, x2) - -inst_25418: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67000007; valaddr_reg:x3; val_offset:76254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76254*FLEN/8, x4, x1, x2) - -inst_25419: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x6700000f; valaddr_reg:x3; val_offset:76257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76257*FLEN/8, x4, x1, x2) - -inst_25420: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x6700001f; valaddr_reg:x3; val_offset:76260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76260*FLEN/8, x4, x1, x2) - -inst_25421: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x6700003f; valaddr_reg:x3; val_offset:76263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76263*FLEN/8, x4, x1, x2) - -inst_25422: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x6700007f; valaddr_reg:x3; val_offset:76266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76266*FLEN/8, x4, x1, x2) - -inst_25423: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x670000ff; valaddr_reg:x3; val_offset:76269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76269*FLEN/8, x4, x1, x2) - -inst_25424: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x670001ff; valaddr_reg:x3; val_offset:76272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76272*FLEN/8, x4, x1, x2) - -inst_25425: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x670003ff; valaddr_reg:x3; val_offset:76275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76275*FLEN/8, x4, x1, x2) - -inst_25426: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x670007ff; valaddr_reg:x3; val_offset:76278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76278*FLEN/8, x4, x1, x2) - -inst_25427: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67000fff; valaddr_reg:x3; val_offset:76281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76281*FLEN/8, x4, x1, x2) - -inst_25428: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67001fff; valaddr_reg:x3; val_offset:76284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76284*FLEN/8, x4, x1, x2) - -inst_25429: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67003fff; valaddr_reg:x3; val_offset:76287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76287*FLEN/8, x4, x1, x2) - -inst_25430: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67007fff; valaddr_reg:x3; val_offset:76290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76290*FLEN/8, x4, x1, x2) - -inst_25431: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x6700ffff; valaddr_reg:x3; val_offset:76293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76293*FLEN/8, x4, x1, x2) - -inst_25432: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x6701ffff; valaddr_reg:x3; val_offset:76296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76296*FLEN/8, x4, x1, x2) - -inst_25433: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x6703ffff; valaddr_reg:x3; val_offset:76299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76299*FLEN/8, x4, x1, x2) - -inst_25434: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x6707ffff; valaddr_reg:x3; val_offset:76302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76302*FLEN/8, x4, x1, x2) - -inst_25435: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x670fffff; valaddr_reg:x3; val_offset:76305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76305*FLEN/8, x4, x1, x2) - -inst_25436: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x671fffff; valaddr_reg:x3; val_offset:76308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76308*FLEN/8, x4, x1, x2) - -inst_25437: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x673fffff; valaddr_reg:x3; val_offset:76311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76311*FLEN/8, x4, x1, x2) - -inst_25438: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67400000; valaddr_reg:x3; val_offset:76314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76314*FLEN/8, x4, x1, x2) - -inst_25439: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67600000; valaddr_reg:x3; val_offset:76317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76317*FLEN/8, x4, x1, x2) - -inst_25440: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67700000; valaddr_reg:x3; val_offset:76320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76320*FLEN/8, x4, x1, x2) - -inst_25441: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x67780000; valaddr_reg:x3; val_offset:76323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76323*FLEN/8, x4, x1, x2) - -inst_25442: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677c0000; valaddr_reg:x3; val_offset:76326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76326*FLEN/8, x4, x1, x2) - -inst_25443: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677e0000; valaddr_reg:x3; val_offset:76329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76329*FLEN/8, x4, x1, x2) - -inst_25444: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677f0000; valaddr_reg:x3; val_offset:76332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76332*FLEN/8, x4, x1, x2) - -inst_25445: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677f8000; valaddr_reg:x3; val_offset:76335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76335*FLEN/8, x4, x1, x2) - -inst_25446: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677fc000; valaddr_reg:x3; val_offset:76338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76338*FLEN/8, x4, x1, x2) - -inst_25447: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677fe000; valaddr_reg:x3; val_offset:76341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76341*FLEN/8, x4, x1, x2) - -inst_25448: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677ff000; valaddr_reg:x3; val_offset:76344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76344*FLEN/8, x4, x1, x2) - -inst_25449: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677ff800; valaddr_reg:x3; val_offset:76347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76347*FLEN/8, x4, x1, x2) - -inst_25450: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677ffc00; valaddr_reg:x3; val_offset:76350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76350*FLEN/8, x4, x1, x2) - -inst_25451: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677ffe00; valaddr_reg:x3; val_offset:76353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76353*FLEN/8, x4, x1, x2) - -inst_25452: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677fff00; valaddr_reg:x3; val_offset:76356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76356*FLEN/8, x4, x1, x2) - -inst_25453: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677fff80; valaddr_reg:x3; val_offset:76359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76359*FLEN/8, x4, x1, x2) - -inst_25454: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677fffc0; valaddr_reg:x3; val_offset:76362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76362*FLEN/8, x4, x1, x2) - -inst_25455: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677fffe0; valaddr_reg:x3; val_offset:76365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76365*FLEN/8, x4, x1, x2) - -inst_25456: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677ffff0; valaddr_reg:x3; val_offset:76368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76368*FLEN/8, x4, x1, x2) - -inst_25457: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677ffff8; valaddr_reg:x3; val_offset:76371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76371*FLEN/8, x4, x1, x2) - -inst_25458: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677ffffc; valaddr_reg:x3; val_offset:76374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76374*FLEN/8, x4, x1, x2) - -inst_25459: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677ffffe; valaddr_reg:x3; val_offset:76377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76377*FLEN/8, x4, x1, x2) - -inst_25460: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x677fffff; valaddr_reg:x3; val_offset:76380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76380*FLEN/8, x4, x1, x2) - -inst_25461: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f000001; valaddr_reg:x3; val_offset:76383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76383*FLEN/8, x4, x1, x2) - -inst_25462: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f000003; valaddr_reg:x3; val_offset:76386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76386*FLEN/8, x4, x1, x2) - -inst_25463: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f000007; valaddr_reg:x3; val_offset:76389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76389*FLEN/8, x4, x1, x2) - -inst_25464: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f199999; valaddr_reg:x3; val_offset:76392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76392*FLEN/8, x4, x1, x2) - -inst_25465: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f249249; valaddr_reg:x3; val_offset:76395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76395*FLEN/8, x4, x1, x2) - -inst_25466: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f333333; valaddr_reg:x3; val_offset:76398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76398*FLEN/8, x4, x1, x2) - -inst_25467: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:76401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76401*FLEN/8, x4, x1, x2) - -inst_25468: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:76404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76404*FLEN/8, x4, x1, x2) - -inst_25469: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f444444; valaddr_reg:x3; val_offset:76407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76407*FLEN/8, x4, x1, x2) - -inst_25470: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:76410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76410*FLEN/8, x4, x1, x2) - -inst_25471: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:76413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76413*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_200) - -inst_25472: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f666666; valaddr_reg:x3; val_offset:76416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76416*FLEN/8, x4, x1, x2) - -inst_25473: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:76419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76419*FLEN/8, x4, x1, x2) - -inst_25474: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:76422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76422*FLEN/8, x4, x1, x2) - -inst_25475: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:76425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76425*FLEN/8, x4, x1, x2) - -inst_25476: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:76428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76428*FLEN/8, x4, x1, x2) - -inst_25477: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77800000; valaddr_reg:x3; val_offset:76431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76431*FLEN/8, x4, x1, x2) - -inst_25478: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77800001; valaddr_reg:x3; val_offset:76434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76434*FLEN/8, x4, x1, x2) - -inst_25479: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77800003; valaddr_reg:x3; val_offset:76437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76437*FLEN/8, x4, x1, x2) - -inst_25480: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77800007; valaddr_reg:x3; val_offset:76440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76440*FLEN/8, x4, x1, x2) - -inst_25481: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7780000f; valaddr_reg:x3; val_offset:76443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76443*FLEN/8, x4, x1, x2) - -inst_25482: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7780001f; valaddr_reg:x3; val_offset:76446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76446*FLEN/8, x4, x1, x2) - -inst_25483: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7780003f; valaddr_reg:x3; val_offset:76449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76449*FLEN/8, x4, x1, x2) - -inst_25484: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7780007f; valaddr_reg:x3; val_offset:76452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76452*FLEN/8, x4, x1, x2) - -inst_25485: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x778000ff; valaddr_reg:x3; val_offset:76455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76455*FLEN/8, x4, x1, x2) - -inst_25486: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x778001ff; valaddr_reg:x3; val_offset:76458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76458*FLEN/8, x4, x1, x2) - -inst_25487: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x778003ff; valaddr_reg:x3; val_offset:76461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76461*FLEN/8, x4, x1, x2) - -inst_25488: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x778007ff; valaddr_reg:x3; val_offset:76464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76464*FLEN/8, x4, x1, x2) - -inst_25489: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77800fff; valaddr_reg:x3; val_offset:76467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76467*FLEN/8, x4, x1, x2) - -inst_25490: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77801fff; valaddr_reg:x3; val_offset:76470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76470*FLEN/8, x4, x1, x2) - -inst_25491: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77803fff; valaddr_reg:x3; val_offset:76473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76473*FLEN/8, x4, x1, x2) - -inst_25492: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77807fff; valaddr_reg:x3; val_offset:76476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76476*FLEN/8, x4, x1, x2) - -inst_25493: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7780ffff; valaddr_reg:x3; val_offset:76479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76479*FLEN/8, x4, x1, x2) - -inst_25494: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7781ffff; valaddr_reg:x3; val_offset:76482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76482*FLEN/8, x4, x1, x2) - -inst_25495: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7783ffff; valaddr_reg:x3; val_offset:76485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76485*FLEN/8, x4, x1, x2) - -inst_25496: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7787ffff; valaddr_reg:x3; val_offset:76488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76488*FLEN/8, x4, x1, x2) - -inst_25497: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x778fffff; valaddr_reg:x3; val_offset:76491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76491*FLEN/8, x4, x1, x2) - -inst_25498: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x779fffff; valaddr_reg:x3; val_offset:76494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76494*FLEN/8, x4, x1, x2) - -inst_25499: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77bfffff; valaddr_reg:x3; val_offset:76497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76497*FLEN/8, x4, x1, x2) - -inst_25500: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77c00000; valaddr_reg:x3; val_offset:76500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76500*FLEN/8, x4, x1, x2) - -inst_25501: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77e00000; valaddr_reg:x3; val_offset:76503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76503*FLEN/8, x4, x1, x2) - -inst_25502: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77f00000; valaddr_reg:x3; val_offset:76506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76506*FLEN/8, x4, x1, x2) - -inst_25503: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77f80000; valaddr_reg:x3; val_offset:76509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76509*FLEN/8, x4, x1, x2) - -inst_25504: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fc0000; valaddr_reg:x3; val_offset:76512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76512*FLEN/8, x4, x1, x2) - -inst_25505: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fe0000; valaddr_reg:x3; val_offset:76515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76515*FLEN/8, x4, x1, x2) - -inst_25506: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ff0000; valaddr_reg:x3; val_offset:76518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76518*FLEN/8, x4, x1, x2) - -inst_25507: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ff8000; valaddr_reg:x3; val_offset:76521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76521*FLEN/8, x4, x1, x2) - -inst_25508: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ffc000; valaddr_reg:x3; val_offset:76524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76524*FLEN/8, x4, x1, x2) - -inst_25509: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ffe000; valaddr_reg:x3; val_offset:76527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76527*FLEN/8, x4, x1, x2) - -inst_25510: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fff000; valaddr_reg:x3; val_offset:76530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76530*FLEN/8, x4, x1, x2) - -inst_25511: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fff800; valaddr_reg:x3; val_offset:76533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76533*FLEN/8, x4, x1, x2) - -inst_25512: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fffc00; valaddr_reg:x3; val_offset:76536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76536*FLEN/8, x4, x1, x2) - -inst_25513: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fffe00; valaddr_reg:x3; val_offset:76539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76539*FLEN/8, x4, x1, x2) - -inst_25514: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ffff00; valaddr_reg:x3; val_offset:76542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76542*FLEN/8, x4, x1, x2) - -inst_25515: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ffff80; valaddr_reg:x3; val_offset:76545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76545*FLEN/8, x4, x1, x2) - -inst_25516: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ffffc0; valaddr_reg:x3; val_offset:76548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76548*FLEN/8, x4, x1, x2) - -inst_25517: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ffffe0; valaddr_reg:x3; val_offset:76551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76551*FLEN/8, x4, x1, x2) - -inst_25518: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fffff0; valaddr_reg:x3; val_offset:76554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76554*FLEN/8, x4, x1, x2) - -inst_25519: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fffff8; valaddr_reg:x3; val_offset:76557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76557*FLEN/8, x4, x1, x2) - -inst_25520: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fffffc; valaddr_reg:x3; val_offset:76560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76560*FLEN/8, x4, x1, x2) - -inst_25521: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77fffffe; valaddr_reg:x3; val_offset:76563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76563*FLEN/8, x4, x1, x2) - -inst_25522: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x77ffffff; valaddr_reg:x3; val_offset:76566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76566*FLEN/8, x4, x1, x2) - -inst_25523: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f000001; valaddr_reg:x3; val_offset:76569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76569*FLEN/8, x4, x1, x2) - -inst_25524: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f000003; valaddr_reg:x3; val_offset:76572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76572*FLEN/8, x4, x1, x2) - -inst_25525: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f000007; valaddr_reg:x3; val_offset:76575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76575*FLEN/8, x4, x1, x2) - -inst_25526: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f199999; valaddr_reg:x3; val_offset:76578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76578*FLEN/8, x4, x1, x2) - -inst_25527: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f249249; valaddr_reg:x3; val_offset:76581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76581*FLEN/8, x4, x1, x2) - -inst_25528: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f333333; valaddr_reg:x3; val_offset:76584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76584*FLEN/8, x4, x1, x2) - -inst_25529: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:76587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76587*FLEN/8, x4, x1, x2) - -inst_25530: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:76590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76590*FLEN/8, x4, x1, x2) - -inst_25531: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f444444; valaddr_reg:x3; val_offset:76593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76593*FLEN/8, x4, x1, x2) - -inst_25532: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:76596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76596*FLEN/8, x4, x1, x2) - -inst_25533: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:76599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76599*FLEN/8, x4, x1, x2) - -inst_25534: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f666666; valaddr_reg:x3; val_offset:76602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76602*FLEN/8, x4, x1, x2) - -inst_25535: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:76605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76605*FLEN/8, x4, x1, x2) - -inst_25536: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:76608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76608*FLEN/8, x4, x1, x2) - -inst_25537: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:76611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76611*FLEN/8, x4, x1, x2) - -inst_25538: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:76614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76614*FLEN/8, x4, x1, x2) - -inst_25539: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:76617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76617*FLEN/8, x4, x1, x2) - -inst_25540: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:76620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76620*FLEN/8, x4, x1, x2) - -inst_25541: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:76623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76623*FLEN/8, x4, x1, x2) - -inst_25542: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:76626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76626*FLEN/8, x4, x1, x2) - -inst_25543: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:76629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76629*FLEN/8, x4, x1, x2) - -inst_25544: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:76632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76632*FLEN/8, x4, x1, x2) - -inst_25545: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:76635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76635*FLEN/8, x4, x1, x2) - -inst_25546: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:76638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76638*FLEN/8, x4, x1, x2) - -inst_25547: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:76641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76641*FLEN/8, x4, x1, x2) - -inst_25548: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:76644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76644*FLEN/8, x4, x1, x2) - -inst_25549: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:76647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76647*FLEN/8, x4, x1, x2) - -inst_25550: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:76650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76650*FLEN/8, x4, x1, x2) - -inst_25551: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:76653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76653*FLEN/8, x4, x1, x2) - -inst_25552: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:76656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76656*FLEN/8, x4, x1, x2) - -inst_25553: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:76659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76659*FLEN/8, x4, x1, x2) - -inst_25554: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:76662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76662*FLEN/8, x4, x1, x2) - -inst_25555: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49000000; valaddr_reg:x3; val_offset:76665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76665*FLEN/8, x4, x1, x2) - -inst_25556: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49000001; valaddr_reg:x3; val_offset:76668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76668*FLEN/8, x4, x1, x2) - -inst_25557: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49000003; valaddr_reg:x3; val_offset:76671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76671*FLEN/8, x4, x1, x2) - -inst_25558: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49000007; valaddr_reg:x3; val_offset:76674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76674*FLEN/8, x4, x1, x2) - -inst_25559: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x4900000f; valaddr_reg:x3; val_offset:76677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76677*FLEN/8, x4, x1, x2) - -inst_25560: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x4900001f; valaddr_reg:x3; val_offset:76680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76680*FLEN/8, x4, x1, x2) - -inst_25561: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x4900003f; valaddr_reg:x3; val_offset:76683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76683*FLEN/8, x4, x1, x2) - -inst_25562: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x4900007f; valaddr_reg:x3; val_offset:76686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76686*FLEN/8, x4, x1, x2) - -inst_25563: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x490000ff; valaddr_reg:x3; val_offset:76689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76689*FLEN/8, x4, x1, x2) - -inst_25564: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x490001ff; valaddr_reg:x3; val_offset:76692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76692*FLEN/8, x4, x1, x2) - -inst_25565: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x490003ff; valaddr_reg:x3; val_offset:76695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76695*FLEN/8, x4, x1, x2) - -inst_25566: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x490007ff; valaddr_reg:x3; val_offset:76698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76698*FLEN/8, x4, x1, x2) - -inst_25567: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49000fff; valaddr_reg:x3; val_offset:76701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76701*FLEN/8, x4, x1, x2) - -inst_25568: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49001fff; valaddr_reg:x3; val_offset:76704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76704*FLEN/8, x4, x1, x2) - -inst_25569: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49003fff; valaddr_reg:x3; val_offset:76707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76707*FLEN/8, x4, x1, x2) - -inst_25570: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49007fff; valaddr_reg:x3; val_offset:76710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76710*FLEN/8, x4, x1, x2) - -inst_25571: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x4900ffff; valaddr_reg:x3; val_offset:76713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76713*FLEN/8, x4, x1, x2) - -inst_25572: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x4901ffff; valaddr_reg:x3; val_offset:76716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76716*FLEN/8, x4, x1, x2) - -inst_25573: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x4903ffff; valaddr_reg:x3; val_offset:76719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76719*FLEN/8, x4, x1, x2) - -inst_25574: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x4907ffff; valaddr_reg:x3; val_offset:76722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76722*FLEN/8, x4, x1, x2) - -inst_25575: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x490fffff; valaddr_reg:x3; val_offset:76725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76725*FLEN/8, x4, x1, x2) - -inst_25576: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x491fffff; valaddr_reg:x3; val_offset:76728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76728*FLEN/8, x4, x1, x2) - -inst_25577: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x493fffff; valaddr_reg:x3; val_offset:76731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76731*FLEN/8, x4, x1, x2) - -inst_25578: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49400000; valaddr_reg:x3; val_offset:76734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76734*FLEN/8, x4, x1, x2) - -inst_25579: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49600000; valaddr_reg:x3; val_offset:76737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76737*FLEN/8, x4, x1, x2) - -inst_25580: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49700000; valaddr_reg:x3; val_offset:76740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76740*FLEN/8, x4, x1, x2) - -inst_25581: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x49780000; valaddr_reg:x3; val_offset:76743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76743*FLEN/8, x4, x1, x2) - -inst_25582: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497c0000; valaddr_reg:x3; val_offset:76746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76746*FLEN/8, x4, x1, x2) - -inst_25583: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497e0000; valaddr_reg:x3; val_offset:76749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76749*FLEN/8, x4, x1, x2) - -inst_25584: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497f0000; valaddr_reg:x3; val_offset:76752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76752*FLEN/8, x4, x1, x2) - -inst_25585: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497f8000; valaddr_reg:x3; val_offset:76755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76755*FLEN/8, x4, x1, x2) - -inst_25586: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497fc000; valaddr_reg:x3; val_offset:76758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76758*FLEN/8, x4, x1, x2) - -inst_25587: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497fe000; valaddr_reg:x3; val_offset:76761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76761*FLEN/8, x4, x1, x2) - -inst_25588: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497ff000; valaddr_reg:x3; val_offset:76764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76764*FLEN/8, x4, x1, x2) - -inst_25589: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497ff800; valaddr_reg:x3; val_offset:76767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76767*FLEN/8, x4, x1, x2) - -inst_25590: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497ffc00; valaddr_reg:x3; val_offset:76770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76770*FLEN/8, x4, x1, x2) - -inst_25591: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497ffe00; valaddr_reg:x3; val_offset:76773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76773*FLEN/8, x4, x1, x2) - -inst_25592: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497fff00; valaddr_reg:x3; val_offset:76776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76776*FLEN/8, x4, x1, x2) - -inst_25593: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497fff80; valaddr_reg:x3; val_offset:76779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76779*FLEN/8, x4, x1, x2) - -inst_25594: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497fffc0; valaddr_reg:x3; val_offset:76782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76782*FLEN/8, x4, x1, x2) - -inst_25595: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497fffe0; valaddr_reg:x3; val_offset:76785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76785*FLEN/8, x4, x1, x2) - -inst_25596: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497ffff0; valaddr_reg:x3; val_offset:76788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76788*FLEN/8, x4, x1, x2) - -inst_25597: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497ffff8; valaddr_reg:x3; val_offset:76791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76791*FLEN/8, x4, x1, x2) - -inst_25598: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497ffffc; valaddr_reg:x3; val_offset:76794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76794*FLEN/8, x4, x1, x2) - -inst_25599: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497ffffe; valaddr_reg:x3; val_offset:76797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76797*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_201) - -inst_25600: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; -op3val:0x497fffff; valaddr_reg:x3; val_offset:76800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76800*FLEN/8, x4, x1, x2) - -inst_25601: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:76803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76803*FLEN/8, x4, x1, x2) - -inst_25602: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:76806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76806*FLEN/8, x4, x1, x2) - -inst_25603: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:76809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76809*FLEN/8, x4, x1, x2) - -inst_25604: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:76812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76812*FLEN/8, x4, x1, x2) - -inst_25605: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:76815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76815*FLEN/8, x4, x1, x2) - -inst_25606: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:76818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76818*FLEN/8, x4, x1, x2) - -inst_25607: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:76821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76821*FLEN/8, x4, x1, x2) - -inst_25608: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:76824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76824*FLEN/8, x4, x1, x2) - -inst_25609: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:76827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76827*FLEN/8, x4, x1, x2) - -inst_25610: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:76830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76830*FLEN/8, x4, x1, x2) - -inst_25611: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:76833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76833*FLEN/8, x4, x1, x2) - -inst_25612: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:76836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76836*FLEN/8, x4, x1, x2) - -inst_25613: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:76839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76839*FLEN/8, x4, x1, x2) - -inst_25614: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:76842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76842*FLEN/8, x4, x1, x2) - -inst_25615: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:76845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76845*FLEN/8, x4, x1, x2) - -inst_25616: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:76848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76848*FLEN/8, x4, x1, x2) - -inst_25617: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88000000; valaddr_reg:x3; val_offset:76851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76851*FLEN/8, x4, x1, x2) - -inst_25618: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88000001; valaddr_reg:x3; val_offset:76854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76854*FLEN/8, x4, x1, x2) - -inst_25619: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88000003; valaddr_reg:x3; val_offset:76857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76857*FLEN/8, x4, x1, x2) - -inst_25620: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88000007; valaddr_reg:x3; val_offset:76860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76860*FLEN/8, x4, x1, x2) - -inst_25621: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x8800000f; valaddr_reg:x3; val_offset:76863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76863*FLEN/8, x4, x1, x2) - -inst_25622: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x8800001f; valaddr_reg:x3; val_offset:76866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76866*FLEN/8, x4, x1, x2) - -inst_25623: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x8800003f; valaddr_reg:x3; val_offset:76869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76869*FLEN/8, x4, x1, x2) - -inst_25624: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x8800007f; valaddr_reg:x3; val_offset:76872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76872*FLEN/8, x4, x1, x2) - -inst_25625: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x880000ff; valaddr_reg:x3; val_offset:76875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76875*FLEN/8, x4, x1, x2) - -inst_25626: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x880001ff; valaddr_reg:x3; val_offset:76878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76878*FLEN/8, x4, x1, x2) - -inst_25627: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x880003ff; valaddr_reg:x3; val_offset:76881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76881*FLEN/8, x4, x1, x2) - -inst_25628: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x880007ff; valaddr_reg:x3; val_offset:76884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76884*FLEN/8, x4, x1, x2) - -inst_25629: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88000fff; valaddr_reg:x3; val_offset:76887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76887*FLEN/8, x4, x1, x2) - -inst_25630: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88001fff; valaddr_reg:x3; val_offset:76890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76890*FLEN/8, x4, x1, x2) - -inst_25631: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88003fff; valaddr_reg:x3; val_offset:76893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76893*FLEN/8, x4, x1, x2) - -inst_25632: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88007fff; valaddr_reg:x3; val_offset:76896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76896*FLEN/8, x4, x1, x2) - -inst_25633: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x8800ffff; valaddr_reg:x3; val_offset:76899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76899*FLEN/8, x4, x1, x2) - -inst_25634: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x8801ffff; valaddr_reg:x3; val_offset:76902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76902*FLEN/8, x4, x1, x2) - -inst_25635: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x8803ffff; valaddr_reg:x3; val_offset:76905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76905*FLEN/8, x4, x1, x2) - -inst_25636: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x8807ffff; valaddr_reg:x3; val_offset:76908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76908*FLEN/8, x4, x1, x2) - -inst_25637: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x880fffff; valaddr_reg:x3; val_offset:76911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76911*FLEN/8, x4, x1, x2) - -inst_25638: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x881fffff; valaddr_reg:x3; val_offset:76914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76914*FLEN/8, x4, x1, x2) - -inst_25639: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x883fffff; valaddr_reg:x3; val_offset:76917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76917*FLEN/8, x4, x1, x2) - -inst_25640: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88400000; valaddr_reg:x3; val_offset:76920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76920*FLEN/8, x4, x1, x2) - -inst_25641: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88600000; valaddr_reg:x3; val_offset:76923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76923*FLEN/8, x4, x1, x2) - -inst_25642: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88700000; valaddr_reg:x3; val_offset:76926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76926*FLEN/8, x4, x1, x2) - -inst_25643: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x88780000; valaddr_reg:x3; val_offset:76929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76929*FLEN/8, x4, x1, x2) - -inst_25644: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887c0000; valaddr_reg:x3; val_offset:76932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76932*FLEN/8, x4, x1, x2) - -inst_25645: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887e0000; valaddr_reg:x3; val_offset:76935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76935*FLEN/8, x4, x1, x2) - -inst_25646: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887f0000; valaddr_reg:x3; val_offset:76938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76938*FLEN/8, x4, x1, x2) - -inst_25647: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887f8000; valaddr_reg:x3; val_offset:76941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76941*FLEN/8, x4, x1, x2) - -inst_25648: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887fc000; valaddr_reg:x3; val_offset:76944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76944*FLEN/8, x4, x1, x2) - -inst_25649: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887fe000; valaddr_reg:x3; val_offset:76947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76947*FLEN/8, x4, x1, x2) - -inst_25650: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887ff000; valaddr_reg:x3; val_offset:76950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76950*FLEN/8, x4, x1, x2) - -inst_25651: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887ff800; valaddr_reg:x3; val_offset:76953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76953*FLEN/8, x4, x1, x2) - -inst_25652: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887ffc00; valaddr_reg:x3; val_offset:76956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76956*FLEN/8, x4, x1, x2) - -inst_25653: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887ffe00; valaddr_reg:x3; val_offset:76959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76959*FLEN/8, x4, x1, x2) - -inst_25654: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887fff00; valaddr_reg:x3; val_offset:76962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76962*FLEN/8, x4, x1, x2) - -inst_25655: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887fff80; valaddr_reg:x3; val_offset:76965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76965*FLEN/8, x4, x1, x2) - -inst_25656: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887fffc0; valaddr_reg:x3; val_offset:76968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76968*FLEN/8, x4, x1, x2) - -inst_25657: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887fffe0; valaddr_reg:x3; val_offset:76971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76971*FLEN/8, x4, x1, x2) - -inst_25658: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887ffff0; valaddr_reg:x3; val_offset:76974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76974*FLEN/8, x4, x1, x2) - -inst_25659: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887ffff8; valaddr_reg:x3; val_offset:76977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76977*FLEN/8, x4, x1, x2) - -inst_25660: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887ffffc; valaddr_reg:x3; val_offset:76980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76980*FLEN/8, x4, x1, x2) - -inst_25661: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887ffffe; valaddr_reg:x3; val_offset:76983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76983*FLEN/8, x4, x1, x2) - -inst_25662: -// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; -op3val:0x887fffff; valaddr_reg:x3; val_offset:76986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76986*FLEN/8, x4, x1, x2) - -inst_25663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:76989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76989*FLEN/8, x4, x1, x2) - -inst_25664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:76992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76992*FLEN/8, x4, x1, x2) - -inst_25665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:76995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76995*FLEN/8, x4, x1, x2) - -inst_25666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:76998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76998*FLEN/8, x4, x1, x2) - -inst_25667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:77001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77001*FLEN/8, x4, x1, x2) - -inst_25668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:77004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77004*FLEN/8, x4, x1, x2) - -inst_25669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:77007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77007*FLEN/8, x4, x1, x2) - -inst_25670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:77010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77010*FLEN/8, x4, x1, x2) - -inst_25671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:77013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77013*FLEN/8, x4, x1, x2) - -inst_25672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:77016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77016*FLEN/8, x4, x1, x2) - -inst_25673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:77019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77019*FLEN/8, x4, x1, x2) - -inst_25674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:77022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77022*FLEN/8, x4, x1, x2) - -inst_25675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:77025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77025*FLEN/8, x4, x1, x2) - -inst_25676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:77028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77028*FLEN/8, x4, x1, x2) - -inst_25677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:77031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77031*FLEN/8, x4, x1, x2) - -inst_25678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:77034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77034*FLEN/8, x4, x1, x2) - -inst_25679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80800000; valaddr_reg:x3; val_offset:77037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77037*FLEN/8, x4, x1, x2) - -inst_25680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:77040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77040*FLEN/8, x4, x1, x2) - -inst_25681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:77043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77043*FLEN/8, x4, x1, x2) - -inst_25682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:77046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77046*FLEN/8, x4, x1, x2) - -inst_25683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8080000f; valaddr_reg:x3; val_offset:77049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77049*FLEN/8, x4, x1, x2) - -inst_25684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8080001f; valaddr_reg:x3; val_offset:77052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77052*FLEN/8, x4, x1, x2) - -inst_25685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8080003f; valaddr_reg:x3; val_offset:77055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77055*FLEN/8, x4, x1, x2) - -inst_25686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8080007f; valaddr_reg:x3; val_offset:77058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77058*FLEN/8, x4, x1, x2) - -inst_25687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x808000ff; valaddr_reg:x3; val_offset:77061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77061*FLEN/8, x4, x1, x2) - -inst_25688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x808001ff; valaddr_reg:x3; val_offset:77064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77064*FLEN/8, x4, x1, x2) - -inst_25689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x808003ff; valaddr_reg:x3; val_offset:77067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77067*FLEN/8, x4, x1, x2) - -inst_25690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x808007ff; valaddr_reg:x3; val_offset:77070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77070*FLEN/8, x4, x1, x2) - -inst_25691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80800fff; valaddr_reg:x3; val_offset:77073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77073*FLEN/8, x4, x1, x2) - -inst_25692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80801fff; valaddr_reg:x3; val_offset:77076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77076*FLEN/8, x4, x1, x2) - -inst_25693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80803fff; valaddr_reg:x3; val_offset:77079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77079*FLEN/8, x4, x1, x2) - -inst_25694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80807fff; valaddr_reg:x3; val_offset:77082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77082*FLEN/8, x4, x1, x2) - -inst_25695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8080ffff; valaddr_reg:x3; val_offset:77085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77085*FLEN/8, x4, x1, x2) - -inst_25696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8081ffff; valaddr_reg:x3; val_offset:77088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77088*FLEN/8, x4, x1, x2) - -inst_25697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8083ffff; valaddr_reg:x3; val_offset:77091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77091*FLEN/8, x4, x1, x2) - -inst_25698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x8087ffff; valaddr_reg:x3; val_offset:77094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77094*FLEN/8, x4, x1, x2) - -inst_25699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x808fffff; valaddr_reg:x3; val_offset:77097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77097*FLEN/8, x4, x1, x2) - -inst_25700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x809fffff; valaddr_reg:x3; val_offset:77100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77100*FLEN/8, x4, x1, x2) - -inst_25701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80bfffff; valaddr_reg:x3; val_offset:77103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77103*FLEN/8, x4, x1, x2) - -inst_25702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80c00000; valaddr_reg:x3; val_offset:77106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77106*FLEN/8, x4, x1, x2) - -inst_25703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80e00000; valaddr_reg:x3; val_offset:77109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77109*FLEN/8, x4, x1, x2) - -inst_25704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80f00000; valaddr_reg:x3; val_offset:77112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77112*FLEN/8, x4, x1, x2) - -inst_25705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80f80000; valaddr_reg:x3; val_offset:77115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77115*FLEN/8, x4, x1, x2) - -inst_25706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fc0000; valaddr_reg:x3; val_offset:77118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77118*FLEN/8, x4, x1, x2) - -inst_25707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fe0000; valaddr_reg:x3; val_offset:77121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77121*FLEN/8, x4, x1, x2) - -inst_25708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ff0000; valaddr_reg:x3; val_offset:77124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77124*FLEN/8, x4, x1, x2) - -inst_25709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ff8000; valaddr_reg:x3; val_offset:77127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77127*FLEN/8, x4, x1, x2) - -inst_25710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ffc000; valaddr_reg:x3; val_offset:77130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77130*FLEN/8, x4, x1, x2) - -inst_25711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ffe000; valaddr_reg:x3; val_offset:77133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77133*FLEN/8, x4, x1, x2) - -inst_25712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fff000; valaddr_reg:x3; val_offset:77136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77136*FLEN/8, x4, x1, x2) - -inst_25713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fff800; valaddr_reg:x3; val_offset:77139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77139*FLEN/8, x4, x1, x2) - -inst_25714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fffc00; valaddr_reg:x3; val_offset:77142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77142*FLEN/8, x4, x1, x2) - -inst_25715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fffe00; valaddr_reg:x3; val_offset:77145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77145*FLEN/8, x4, x1, x2) - -inst_25716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ffff00; valaddr_reg:x3; val_offset:77148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77148*FLEN/8, x4, x1, x2) - -inst_25717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ffff80; valaddr_reg:x3; val_offset:77151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77151*FLEN/8, x4, x1, x2) - -inst_25718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ffffc0; valaddr_reg:x3; val_offset:77154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77154*FLEN/8, x4, x1, x2) - -inst_25719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ffffe0; valaddr_reg:x3; val_offset:77157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77157*FLEN/8, x4, x1, x2) - -inst_25720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fffff0; valaddr_reg:x3; val_offset:77160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77160*FLEN/8, x4, x1, x2) - -inst_25721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:77163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77163*FLEN/8, x4, x1, x2) - -inst_25722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:77166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77166*FLEN/8, x4, x1, x2) - -inst_25723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:77169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77169*FLEN/8, x4, x1, x2) - -inst_25724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; -op3val:0x80ffffff; valaddr_reg:x3; val_offset:77172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77172*FLEN/8, x4, x1, x2) - -inst_25725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:77175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77175*FLEN/8, x4, x1, x2) - -inst_25726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:77178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77178*FLEN/8, x4, x1, x2) - -inst_25727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:77181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77181*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_202) - -inst_25728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:77184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77184*FLEN/8, x4, x1, x2) - -inst_25729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:77187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77187*FLEN/8, x4, x1, x2) - -inst_25730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:77190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77190*FLEN/8, x4, x1, x2) - -inst_25731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:77193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77193*FLEN/8, x4, x1, x2) - -inst_25732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:77196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77196*FLEN/8, x4, x1, x2) - -inst_25733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:77199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77199*FLEN/8, x4, x1, x2) - -inst_25734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:77202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77202*FLEN/8, x4, x1, x2) - -inst_25735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:77205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77205*FLEN/8, x4, x1, x2) - -inst_25736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:77208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77208*FLEN/8, x4, x1, x2) - -inst_25737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:77211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77211*FLEN/8, x4, x1, x2) - -inst_25738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:77214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77214*FLEN/8, x4, x1, x2) - -inst_25739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:77217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77217*FLEN/8, x4, x1, x2) - -inst_25740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:77220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77220*FLEN/8, x4, x1, x2) - -inst_25741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2800000; valaddr_reg:x3; val_offset:77223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77223*FLEN/8, x4, x1, x2) - -inst_25742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2800001; valaddr_reg:x3; val_offset:77226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77226*FLEN/8, x4, x1, x2) - -inst_25743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2800003; valaddr_reg:x3; val_offset:77229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77229*FLEN/8, x4, x1, x2) - -inst_25744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2800007; valaddr_reg:x3; val_offset:77232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77232*FLEN/8, x4, x1, x2) - -inst_25745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x280000f; valaddr_reg:x3; val_offset:77235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77235*FLEN/8, x4, x1, x2) - -inst_25746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x280001f; valaddr_reg:x3; val_offset:77238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77238*FLEN/8, x4, x1, x2) - -inst_25747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x280003f; valaddr_reg:x3; val_offset:77241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77241*FLEN/8, x4, x1, x2) - -inst_25748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x280007f; valaddr_reg:x3; val_offset:77244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77244*FLEN/8, x4, x1, x2) - -inst_25749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x28000ff; valaddr_reg:x3; val_offset:77247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77247*FLEN/8, x4, x1, x2) - -inst_25750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x28001ff; valaddr_reg:x3; val_offset:77250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77250*FLEN/8, x4, x1, x2) - -inst_25751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x28003ff; valaddr_reg:x3; val_offset:77253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77253*FLEN/8, x4, x1, x2) - -inst_25752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x28007ff; valaddr_reg:x3; val_offset:77256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77256*FLEN/8, x4, x1, x2) - -inst_25753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2800fff; valaddr_reg:x3; val_offset:77259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77259*FLEN/8, x4, x1, x2) - -inst_25754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2801fff; valaddr_reg:x3; val_offset:77262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77262*FLEN/8, x4, x1, x2) - -inst_25755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2803fff; valaddr_reg:x3; val_offset:77265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77265*FLEN/8, x4, x1, x2) - -inst_25756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2807fff; valaddr_reg:x3; val_offset:77268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77268*FLEN/8, x4, x1, x2) - -inst_25757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x280ffff; valaddr_reg:x3; val_offset:77271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77271*FLEN/8, x4, x1, x2) - -inst_25758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x281ffff; valaddr_reg:x3; val_offset:77274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77274*FLEN/8, x4, x1, x2) - -inst_25759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x283ffff; valaddr_reg:x3; val_offset:77277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77277*FLEN/8, x4, x1, x2) - -inst_25760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x287ffff; valaddr_reg:x3; val_offset:77280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77280*FLEN/8, x4, x1, x2) - -inst_25761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x28fffff; valaddr_reg:x3; val_offset:77283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77283*FLEN/8, x4, x1, x2) - -inst_25762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x29fffff; valaddr_reg:x3; val_offset:77286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77286*FLEN/8, x4, x1, x2) - -inst_25763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2bfffff; valaddr_reg:x3; val_offset:77289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77289*FLEN/8, x4, x1, x2) - -inst_25764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2c00000; valaddr_reg:x3; val_offset:77292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77292*FLEN/8, x4, x1, x2) - -inst_25765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2e00000; valaddr_reg:x3; val_offset:77295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77295*FLEN/8, x4, x1, x2) - -inst_25766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2f00000; valaddr_reg:x3; val_offset:77298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77298*FLEN/8, x4, x1, x2) - -inst_25767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2f80000; valaddr_reg:x3; val_offset:77301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77301*FLEN/8, x4, x1, x2) - -inst_25768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fc0000; valaddr_reg:x3; val_offset:77304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77304*FLEN/8, x4, x1, x2) - -inst_25769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fe0000; valaddr_reg:x3; val_offset:77307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77307*FLEN/8, x4, x1, x2) - -inst_25770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ff0000; valaddr_reg:x3; val_offset:77310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77310*FLEN/8, x4, x1, x2) - -inst_25771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ff8000; valaddr_reg:x3; val_offset:77313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77313*FLEN/8, x4, x1, x2) - -inst_25772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ffc000; valaddr_reg:x3; val_offset:77316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77316*FLEN/8, x4, x1, x2) - -inst_25773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ffe000; valaddr_reg:x3; val_offset:77319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77319*FLEN/8, x4, x1, x2) - -inst_25774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fff000; valaddr_reg:x3; val_offset:77322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77322*FLEN/8, x4, x1, x2) - -inst_25775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fff800; valaddr_reg:x3; val_offset:77325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77325*FLEN/8, x4, x1, x2) - -inst_25776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fffc00; valaddr_reg:x3; val_offset:77328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77328*FLEN/8, x4, x1, x2) - -inst_25777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fffe00; valaddr_reg:x3; val_offset:77331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77331*FLEN/8, x4, x1, x2) - -inst_25778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ffff00; valaddr_reg:x3; val_offset:77334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77334*FLEN/8, x4, x1, x2) - -inst_25779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ffff80; valaddr_reg:x3; val_offset:77337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77337*FLEN/8, x4, x1, x2) - -inst_25780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ffffc0; valaddr_reg:x3; val_offset:77340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77340*FLEN/8, x4, x1, x2) - -inst_25781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ffffe0; valaddr_reg:x3; val_offset:77343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77343*FLEN/8, x4, x1, x2) - -inst_25782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fffff0; valaddr_reg:x3; val_offset:77346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77346*FLEN/8, x4, x1, x2) - -inst_25783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fffff8; valaddr_reg:x3; val_offset:77349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77349*FLEN/8, x4, x1, x2) - -inst_25784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fffffc; valaddr_reg:x3; val_offset:77352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77352*FLEN/8, x4, x1, x2) - -inst_25785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2fffffe; valaddr_reg:x3; val_offset:77355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77355*FLEN/8, x4, x1, x2) - -inst_25786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; -op3val:0x2ffffff; valaddr_reg:x3; val_offset:77358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77358*FLEN/8, x4, x1, x2) - -inst_25787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0000000; valaddr_reg:x3; val_offset:77361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77361*FLEN/8, x4, x1, x2) - -inst_25788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0000001; valaddr_reg:x3; val_offset:77364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77364*FLEN/8, x4, x1, x2) - -inst_25789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0000003; valaddr_reg:x3; val_offset:77367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77367*FLEN/8, x4, x1, x2) - -inst_25790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0000007; valaddr_reg:x3; val_offset:77370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77370*FLEN/8, x4, x1, x2) - -inst_25791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa000000f; valaddr_reg:x3; val_offset:77373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77373*FLEN/8, x4, x1, x2) - -inst_25792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa000001f; valaddr_reg:x3; val_offset:77376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77376*FLEN/8, x4, x1, x2) - -inst_25793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa000003f; valaddr_reg:x3; val_offset:77379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77379*FLEN/8, x4, x1, x2) - -inst_25794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa000007f; valaddr_reg:x3; val_offset:77382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77382*FLEN/8, x4, x1, x2) - -inst_25795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa00000ff; valaddr_reg:x3; val_offset:77385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77385*FLEN/8, x4, x1, x2) - -inst_25796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa00001ff; valaddr_reg:x3; val_offset:77388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77388*FLEN/8, x4, x1, x2) - -inst_25797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa00003ff; valaddr_reg:x3; val_offset:77391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77391*FLEN/8, x4, x1, x2) - -inst_25798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa00007ff; valaddr_reg:x3; val_offset:77394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77394*FLEN/8, x4, x1, x2) - -inst_25799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0000fff; valaddr_reg:x3; val_offset:77397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77397*FLEN/8, x4, x1, x2) - -inst_25800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0001fff; valaddr_reg:x3; val_offset:77400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77400*FLEN/8, x4, x1, x2) - -inst_25801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0003fff; valaddr_reg:x3; val_offset:77403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77403*FLEN/8, x4, x1, x2) - -inst_25802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0007fff; valaddr_reg:x3; val_offset:77406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77406*FLEN/8, x4, x1, x2) - -inst_25803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa000ffff; valaddr_reg:x3; val_offset:77409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77409*FLEN/8, x4, x1, x2) - -inst_25804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa001ffff; valaddr_reg:x3; val_offset:77412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77412*FLEN/8, x4, x1, x2) - -inst_25805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa003ffff; valaddr_reg:x3; val_offset:77415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77415*FLEN/8, x4, x1, x2) - -inst_25806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa007ffff; valaddr_reg:x3; val_offset:77418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77418*FLEN/8, x4, x1, x2) - -inst_25807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa00fffff; valaddr_reg:x3; val_offset:77421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77421*FLEN/8, x4, x1, x2) - -inst_25808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa01fffff; valaddr_reg:x3; val_offset:77424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77424*FLEN/8, x4, x1, x2) - -inst_25809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa03fffff; valaddr_reg:x3; val_offset:77427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77427*FLEN/8, x4, x1, x2) - -inst_25810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0400000; valaddr_reg:x3; val_offset:77430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77430*FLEN/8, x4, x1, x2) - -inst_25811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0600000; valaddr_reg:x3; val_offset:77433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77433*FLEN/8, x4, x1, x2) - -inst_25812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0700000; valaddr_reg:x3; val_offset:77436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77436*FLEN/8, x4, x1, x2) - -inst_25813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa0780000; valaddr_reg:x3; val_offset:77439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77439*FLEN/8, x4, x1, x2) - -inst_25814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07c0000; valaddr_reg:x3; val_offset:77442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77442*FLEN/8, x4, x1, x2) - -inst_25815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07e0000; valaddr_reg:x3; val_offset:77445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77445*FLEN/8, x4, x1, x2) - -inst_25816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07f0000; valaddr_reg:x3; val_offset:77448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77448*FLEN/8, x4, x1, x2) - -inst_25817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07f8000; valaddr_reg:x3; val_offset:77451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77451*FLEN/8, x4, x1, x2) - -inst_25818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07fc000; valaddr_reg:x3; val_offset:77454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77454*FLEN/8, x4, x1, x2) - -inst_25819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07fe000; valaddr_reg:x3; val_offset:77457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77457*FLEN/8, x4, x1, x2) - -inst_25820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07ff000; valaddr_reg:x3; val_offset:77460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77460*FLEN/8, x4, x1, x2) - -inst_25821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07ff800; valaddr_reg:x3; val_offset:77463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77463*FLEN/8, x4, x1, x2) - -inst_25822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07ffc00; valaddr_reg:x3; val_offset:77466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77466*FLEN/8, x4, x1, x2) - -inst_25823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07ffe00; valaddr_reg:x3; val_offset:77469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77469*FLEN/8, x4, x1, x2) - -inst_25824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07fff00; valaddr_reg:x3; val_offset:77472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77472*FLEN/8, x4, x1, x2) - -inst_25825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07fff80; valaddr_reg:x3; val_offset:77475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77475*FLEN/8, x4, x1, x2) - -inst_25826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07fffc0; valaddr_reg:x3; val_offset:77478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77478*FLEN/8, x4, x1, x2) - -inst_25827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07fffe0; valaddr_reg:x3; val_offset:77481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77481*FLEN/8, x4, x1, x2) - -inst_25828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07ffff0; valaddr_reg:x3; val_offset:77484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77484*FLEN/8, x4, x1, x2) - -inst_25829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07ffff8; valaddr_reg:x3; val_offset:77487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77487*FLEN/8, x4, x1, x2) - -inst_25830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07ffffc; valaddr_reg:x3; val_offset:77490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77490*FLEN/8, x4, x1, x2) - -inst_25831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07ffffe; valaddr_reg:x3; val_offset:77493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77493*FLEN/8, x4, x1, x2) - -inst_25832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xa07fffff; valaddr_reg:x3; val_offset:77496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77496*FLEN/8, x4, x1, x2) - -inst_25833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbf800001; valaddr_reg:x3; val_offset:77499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77499*FLEN/8, x4, x1, x2) - -inst_25834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbf800003; valaddr_reg:x3; val_offset:77502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77502*FLEN/8, x4, x1, x2) - -inst_25835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbf800007; valaddr_reg:x3; val_offset:77505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77505*FLEN/8, x4, x1, x2) - -inst_25836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbf999999; valaddr_reg:x3; val_offset:77508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77508*FLEN/8, x4, x1, x2) - -inst_25837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:77511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77511*FLEN/8, x4, x1, x2) - -inst_25838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:77514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77514*FLEN/8, x4, x1, x2) - -inst_25839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:77517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77517*FLEN/8, x4, x1, x2) - -inst_25840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:77520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77520*FLEN/8, x4, x1, x2) - -inst_25841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:77523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77523*FLEN/8, x4, x1, x2) - -inst_25842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:77526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77526*FLEN/8, x4, x1, x2) - -inst_25843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:77529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77529*FLEN/8, x4, x1, x2) - -inst_25844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:77532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77532*FLEN/8, x4, x1, x2) - -inst_25845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:77535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77535*FLEN/8, x4, x1, x2) - -inst_25846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:77538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77538*FLEN/8, x4, x1, x2) - -inst_25847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:77541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77541*FLEN/8, x4, x1, x2) - -inst_25848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:77544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77544*FLEN/8, x4, x1, x2) - -inst_25849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:77547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77547*FLEN/8, x4, x1, x2) - -inst_25850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:77550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77550*FLEN/8, x4, x1, x2) - -inst_25851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:77553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77553*FLEN/8, x4, x1, x2) - -inst_25852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:77556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77556*FLEN/8, x4, x1, x2) - -inst_25853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:77559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77559*FLEN/8, x4, x1, x2) - -inst_25854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:77562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77562*FLEN/8, x4, x1, x2) - -inst_25855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:77565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77565*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_203) - -inst_25856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:77568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77568*FLEN/8, x4, x1, x2) - -inst_25857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:77571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77571*FLEN/8, x4, x1, x2) - -inst_25858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:77574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77574*FLEN/8, x4, x1, x2) - -inst_25859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:77577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77577*FLEN/8, x4, x1, x2) - -inst_25860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:77580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77580*FLEN/8, x4, x1, x2) - -inst_25861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:77583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77583*FLEN/8, x4, x1, x2) - -inst_25862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:77586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77586*FLEN/8, x4, x1, x2) - -inst_25863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:77589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77589*FLEN/8, x4, x1, x2) - -inst_25864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:77592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77592*FLEN/8, x4, x1, x2) - -inst_25865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2800000; valaddr_reg:x3; val_offset:77595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77595*FLEN/8, x4, x1, x2) - -inst_25866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2800001; valaddr_reg:x3; val_offset:77598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77598*FLEN/8, x4, x1, x2) - -inst_25867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2800003; valaddr_reg:x3; val_offset:77601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77601*FLEN/8, x4, x1, x2) - -inst_25868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2800007; valaddr_reg:x3; val_offset:77604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77604*FLEN/8, x4, x1, x2) - -inst_25869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x280000f; valaddr_reg:x3; val_offset:77607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77607*FLEN/8, x4, x1, x2) - -inst_25870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x280001f; valaddr_reg:x3; val_offset:77610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77610*FLEN/8, x4, x1, x2) - -inst_25871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x280003f; valaddr_reg:x3; val_offset:77613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77613*FLEN/8, x4, x1, x2) - -inst_25872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x280007f; valaddr_reg:x3; val_offset:77616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77616*FLEN/8, x4, x1, x2) - -inst_25873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x28000ff; valaddr_reg:x3; val_offset:77619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77619*FLEN/8, x4, x1, x2) - -inst_25874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x28001ff; valaddr_reg:x3; val_offset:77622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77622*FLEN/8, x4, x1, x2) - -inst_25875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x28003ff; valaddr_reg:x3; val_offset:77625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77625*FLEN/8, x4, x1, x2) - -inst_25876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x28007ff; valaddr_reg:x3; val_offset:77628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77628*FLEN/8, x4, x1, x2) - -inst_25877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2800fff; valaddr_reg:x3; val_offset:77631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77631*FLEN/8, x4, x1, x2) - -inst_25878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2801fff; valaddr_reg:x3; val_offset:77634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77634*FLEN/8, x4, x1, x2) - -inst_25879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2803fff; valaddr_reg:x3; val_offset:77637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77637*FLEN/8, x4, x1, x2) - -inst_25880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2807fff; valaddr_reg:x3; val_offset:77640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77640*FLEN/8, x4, x1, x2) - -inst_25881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x280ffff; valaddr_reg:x3; val_offset:77643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77643*FLEN/8, x4, x1, x2) - -inst_25882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x281ffff; valaddr_reg:x3; val_offset:77646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77646*FLEN/8, x4, x1, x2) - -inst_25883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x283ffff; valaddr_reg:x3; val_offset:77649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77649*FLEN/8, x4, x1, x2) - -inst_25884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x287ffff; valaddr_reg:x3; val_offset:77652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77652*FLEN/8, x4, x1, x2) - -inst_25885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x28fffff; valaddr_reg:x3; val_offset:77655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77655*FLEN/8, x4, x1, x2) - -inst_25886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x29fffff; valaddr_reg:x3; val_offset:77658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77658*FLEN/8, x4, x1, x2) - -inst_25887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2bfffff; valaddr_reg:x3; val_offset:77661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77661*FLEN/8, x4, x1, x2) - -inst_25888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2c00000; valaddr_reg:x3; val_offset:77664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77664*FLEN/8, x4, x1, x2) - -inst_25889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2e00000; valaddr_reg:x3; val_offset:77667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77667*FLEN/8, x4, x1, x2) - -inst_25890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2f00000; valaddr_reg:x3; val_offset:77670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77670*FLEN/8, x4, x1, x2) - -inst_25891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2f80000; valaddr_reg:x3; val_offset:77673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77673*FLEN/8, x4, x1, x2) - -inst_25892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fc0000; valaddr_reg:x3; val_offset:77676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77676*FLEN/8, x4, x1, x2) - -inst_25893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fe0000; valaddr_reg:x3; val_offset:77679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77679*FLEN/8, x4, x1, x2) - -inst_25894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ff0000; valaddr_reg:x3; val_offset:77682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77682*FLEN/8, x4, x1, x2) - -inst_25895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ff8000; valaddr_reg:x3; val_offset:77685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77685*FLEN/8, x4, x1, x2) - -inst_25896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ffc000; valaddr_reg:x3; val_offset:77688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77688*FLEN/8, x4, x1, x2) - -inst_25897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ffe000; valaddr_reg:x3; val_offset:77691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77691*FLEN/8, x4, x1, x2) - -inst_25898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fff000; valaddr_reg:x3; val_offset:77694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77694*FLEN/8, x4, x1, x2) - -inst_25899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fff800; valaddr_reg:x3; val_offset:77697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77697*FLEN/8, x4, x1, x2) - -inst_25900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fffc00; valaddr_reg:x3; val_offset:77700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77700*FLEN/8, x4, x1, x2) - -inst_25901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fffe00; valaddr_reg:x3; val_offset:77703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77703*FLEN/8, x4, x1, x2) - -inst_25902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ffff00; valaddr_reg:x3; val_offset:77706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77706*FLEN/8, x4, x1, x2) - -inst_25903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ffff80; valaddr_reg:x3; val_offset:77709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77709*FLEN/8, x4, x1, x2) - -inst_25904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ffffc0; valaddr_reg:x3; val_offset:77712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77712*FLEN/8, x4, x1, x2) - -inst_25905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ffffe0; valaddr_reg:x3; val_offset:77715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77715*FLEN/8, x4, x1, x2) - -inst_25906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fffff0; valaddr_reg:x3; val_offset:77718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77718*FLEN/8, x4, x1, x2) - -inst_25907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fffff8; valaddr_reg:x3; val_offset:77721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77721*FLEN/8, x4, x1, x2) - -inst_25908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fffffc; valaddr_reg:x3; val_offset:77724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77724*FLEN/8, x4, x1, x2) - -inst_25909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2fffffe; valaddr_reg:x3; val_offset:77727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77727*FLEN/8, x4, x1, x2) - -inst_25910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; -op3val:0x2ffffff; valaddr_reg:x3; val_offset:77730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77730*FLEN/8, x4, x1, x2) - -inst_25911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7800000; valaddr_reg:x3; val_offset:77733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77733*FLEN/8, x4, x1, x2) - -inst_25912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7800001; valaddr_reg:x3; val_offset:77736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77736*FLEN/8, x4, x1, x2) - -inst_25913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7800003; valaddr_reg:x3; val_offset:77739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77739*FLEN/8, x4, x1, x2) - -inst_25914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7800007; valaddr_reg:x3; val_offset:77742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77742*FLEN/8, x4, x1, x2) - -inst_25915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa780000f; valaddr_reg:x3; val_offset:77745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77745*FLEN/8, x4, x1, x2) - -inst_25916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa780001f; valaddr_reg:x3; val_offset:77748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77748*FLEN/8, x4, x1, x2) - -inst_25917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa780003f; valaddr_reg:x3; val_offset:77751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77751*FLEN/8, x4, x1, x2) - -inst_25918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa780007f; valaddr_reg:x3; val_offset:77754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77754*FLEN/8, x4, x1, x2) - -inst_25919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa78000ff; valaddr_reg:x3; val_offset:77757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77757*FLEN/8, x4, x1, x2) - -inst_25920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa78001ff; valaddr_reg:x3; val_offset:77760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77760*FLEN/8, x4, x1, x2) - -inst_25921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa78003ff; valaddr_reg:x3; val_offset:77763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77763*FLEN/8, x4, x1, x2) - -inst_25922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa78007ff; valaddr_reg:x3; val_offset:77766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77766*FLEN/8, x4, x1, x2) - -inst_25923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7800fff; valaddr_reg:x3; val_offset:77769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77769*FLEN/8, x4, x1, x2) - -inst_25924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7801fff; valaddr_reg:x3; val_offset:77772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77772*FLEN/8, x4, x1, x2) - -inst_25925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7803fff; valaddr_reg:x3; val_offset:77775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77775*FLEN/8, x4, x1, x2) - -inst_25926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7807fff; valaddr_reg:x3; val_offset:77778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77778*FLEN/8, x4, x1, x2) - -inst_25927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa780ffff; valaddr_reg:x3; val_offset:77781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77781*FLEN/8, x4, x1, x2) - -inst_25928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa781ffff; valaddr_reg:x3; val_offset:77784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77784*FLEN/8, x4, x1, x2) - -inst_25929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa783ffff; valaddr_reg:x3; val_offset:77787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77787*FLEN/8, x4, x1, x2) - -inst_25930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa787ffff; valaddr_reg:x3; val_offset:77790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77790*FLEN/8, x4, x1, x2) - -inst_25931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa78fffff; valaddr_reg:x3; val_offset:77793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77793*FLEN/8, x4, x1, x2) - -inst_25932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa79fffff; valaddr_reg:x3; val_offset:77796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77796*FLEN/8, x4, x1, x2) - -inst_25933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7bfffff; valaddr_reg:x3; val_offset:77799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77799*FLEN/8, x4, x1, x2) - -inst_25934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7c00000; valaddr_reg:x3; val_offset:77802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77802*FLEN/8, x4, x1, x2) - -inst_25935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7e00000; valaddr_reg:x3; val_offset:77805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77805*FLEN/8, x4, x1, x2) - -inst_25936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7f00000; valaddr_reg:x3; val_offset:77808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77808*FLEN/8, x4, x1, x2) - -inst_25937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7f80000; valaddr_reg:x3; val_offset:77811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77811*FLEN/8, x4, x1, x2) - -inst_25938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fc0000; valaddr_reg:x3; val_offset:77814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77814*FLEN/8, x4, x1, x2) - -inst_25939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fe0000; valaddr_reg:x3; val_offset:77817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77817*FLEN/8, x4, x1, x2) - -inst_25940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ff0000; valaddr_reg:x3; val_offset:77820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77820*FLEN/8, x4, x1, x2) - -inst_25941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ff8000; valaddr_reg:x3; val_offset:77823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77823*FLEN/8, x4, x1, x2) - -inst_25942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ffc000; valaddr_reg:x3; val_offset:77826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77826*FLEN/8, x4, x1, x2) - -inst_25943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ffe000; valaddr_reg:x3; val_offset:77829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77829*FLEN/8, x4, x1, x2) - -inst_25944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fff000; valaddr_reg:x3; val_offset:77832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77832*FLEN/8, x4, x1, x2) - -inst_25945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fff800; valaddr_reg:x3; val_offset:77835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77835*FLEN/8, x4, x1, x2) - -inst_25946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fffc00; valaddr_reg:x3; val_offset:77838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77838*FLEN/8, x4, x1, x2) - -inst_25947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fffe00; valaddr_reg:x3; val_offset:77841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77841*FLEN/8, x4, x1, x2) - -inst_25948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ffff00; valaddr_reg:x3; val_offset:77844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77844*FLEN/8, x4, x1, x2) - -inst_25949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ffff80; valaddr_reg:x3; val_offset:77847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77847*FLEN/8, x4, x1, x2) - -inst_25950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ffffc0; valaddr_reg:x3; val_offset:77850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77850*FLEN/8, x4, x1, x2) - -inst_25951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ffffe0; valaddr_reg:x3; val_offset:77853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77853*FLEN/8, x4, x1, x2) - -inst_25952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fffff0; valaddr_reg:x3; val_offset:77856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77856*FLEN/8, x4, x1, x2) - -inst_25953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fffff8; valaddr_reg:x3; val_offset:77859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77859*FLEN/8, x4, x1, x2) - -inst_25954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fffffc; valaddr_reg:x3; val_offset:77862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77862*FLEN/8, x4, x1, x2) - -inst_25955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7fffffe; valaddr_reg:x3; val_offset:77865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77865*FLEN/8, x4, x1, x2) - -inst_25956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xa7ffffff; valaddr_reg:x3; val_offset:77868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77868*FLEN/8, x4, x1, x2) - -inst_25957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbf800001; valaddr_reg:x3; val_offset:77871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77871*FLEN/8, x4, x1, x2) - -inst_25958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbf800003; valaddr_reg:x3; val_offset:77874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77874*FLEN/8, x4, x1, x2) - -inst_25959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbf800007; valaddr_reg:x3; val_offset:77877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77877*FLEN/8, x4, x1, x2) - -inst_25960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbf999999; valaddr_reg:x3; val_offset:77880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77880*FLEN/8, x4, x1, x2) - -inst_25961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:77883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77883*FLEN/8, x4, x1, x2) - -inst_25962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:77886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77886*FLEN/8, x4, x1, x2) - -inst_25963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:77889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77889*FLEN/8, x4, x1, x2) - -inst_25964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:77892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77892*FLEN/8, x4, x1, x2) - -inst_25965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:77895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77895*FLEN/8, x4, x1, x2) - -inst_25966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:77898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77898*FLEN/8, x4, x1, x2) - -inst_25967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:77901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77901*FLEN/8, x4, x1, x2) - -inst_25968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:77904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77904*FLEN/8, x4, x1, x2) - -inst_25969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:77907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77907*FLEN/8, x4, x1, x2) - -inst_25970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:77910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77910*FLEN/8, x4, x1, x2) - -inst_25971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:77913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77913*FLEN/8, x4, x1, x2) - -inst_25972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:77916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77916*FLEN/8, x4, x1, x2) - -inst_25973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8800000; valaddr_reg:x3; val_offset:77919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77919*FLEN/8, x4, x1, x2) - -inst_25974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8800001; valaddr_reg:x3; val_offset:77922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77922*FLEN/8, x4, x1, x2) - -inst_25975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8800003; valaddr_reg:x3; val_offset:77925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77925*FLEN/8, x4, x1, x2) - -inst_25976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8800007; valaddr_reg:x3; val_offset:77928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77928*FLEN/8, x4, x1, x2) - -inst_25977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb880000f; valaddr_reg:x3; val_offset:77931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77931*FLEN/8, x4, x1, x2) - -inst_25978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb880001f; valaddr_reg:x3; val_offset:77934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77934*FLEN/8, x4, x1, x2) - -inst_25979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb880003f; valaddr_reg:x3; val_offset:77937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77937*FLEN/8, x4, x1, x2) - -inst_25980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb880007f; valaddr_reg:x3; val_offset:77940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77940*FLEN/8, x4, x1, x2) - -inst_25981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb88000ff; valaddr_reg:x3; val_offset:77943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77943*FLEN/8, x4, x1, x2) - -inst_25982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb88001ff; valaddr_reg:x3; val_offset:77946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77946*FLEN/8, x4, x1, x2) - -inst_25983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb88003ff; valaddr_reg:x3; val_offset:77949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77949*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_204) - -inst_25984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb88007ff; valaddr_reg:x3; val_offset:77952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77952*FLEN/8, x4, x1, x2) - -inst_25985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8800fff; valaddr_reg:x3; val_offset:77955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77955*FLEN/8, x4, x1, x2) - -inst_25986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8801fff; valaddr_reg:x3; val_offset:77958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77958*FLEN/8, x4, x1, x2) - -inst_25987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8803fff; valaddr_reg:x3; val_offset:77961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77961*FLEN/8, x4, x1, x2) - -inst_25988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8807fff; valaddr_reg:x3; val_offset:77964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77964*FLEN/8, x4, x1, x2) - -inst_25989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb880ffff; valaddr_reg:x3; val_offset:77967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77967*FLEN/8, x4, x1, x2) - -inst_25990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb881ffff; valaddr_reg:x3; val_offset:77970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77970*FLEN/8, x4, x1, x2) - -inst_25991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb883ffff; valaddr_reg:x3; val_offset:77973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77973*FLEN/8, x4, x1, x2) - -inst_25992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb887ffff; valaddr_reg:x3; val_offset:77976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77976*FLEN/8, x4, x1, x2) - -inst_25993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb88fffff; valaddr_reg:x3; val_offset:77979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77979*FLEN/8, x4, x1, x2) - -inst_25994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb89fffff; valaddr_reg:x3; val_offset:77982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77982*FLEN/8, x4, x1, x2) - -inst_25995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8bfffff; valaddr_reg:x3; val_offset:77985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77985*FLEN/8, x4, x1, x2) - -inst_25996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8c00000; valaddr_reg:x3; val_offset:77988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77988*FLEN/8, x4, x1, x2) - -inst_25997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8e00000; valaddr_reg:x3; val_offset:77991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77991*FLEN/8, x4, x1, x2) - -inst_25998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8f00000; valaddr_reg:x3; val_offset:77994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77994*FLEN/8, x4, x1, x2) - -inst_25999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8f80000; valaddr_reg:x3; val_offset:77997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77997*FLEN/8, x4, x1, x2) - -inst_26000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fc0000; valaddr_reg:x3; val_offset:78000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78000*FLEN/8, x4, x1, x2) - -inst_26001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fe0000; valaddr_reg:x3; val_offset:78003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78003*FLEN/8, x4, x1, x2) - -inst_26002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ff0000; valaddr_reg:x3; val_offset:78006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78006*FLEN/8, x4, x1, x2) - -inst_26003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ff8000; valaddr_reg:x3; val_offset:78009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78009*FLEN/8, x4, x1, x2) - -inst_26004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ffc000; valaddr_reg:x3; val_offset:78012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78012*FLEN/8, x4, x1, x2) - -inst_26005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ffe000; valaddr_reg:x3; val_offset:78015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78015*FLEN/8, x4, x1, x2) - -inst_26006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fff000; valaddr_reg:x3; val_offset:78018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78018*FLEN/8, x4, x1, x2) - -inst_26007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fff800; valaddr_reg:x3; val_offset:78021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78021*FLEN/8, x4, x1, x2) - -inst_26008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fffc00; valaddr_reg:x3; val_offset:78024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78024*FLEN/8, x4, x1, x2) - -inst_26009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fffe00; valaddr_reg:x3; val_offset:78027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78027*FLEN/8, x4, x1, x2) - -inst_26010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ffff00; valaddr_reg:x3; val_offset:78030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78030*FLEN/8, x4, x1, x2) - -inst_26011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ffff80; valaddr_reg:x3; val_offset:78033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78033*FLEN/8, x4, x1, x2) - -inst_26012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ffffc0; valaddr_reg:x3; val_offset:78036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78036*FLEN/8, x4, x1, x2) - -inst_26013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ffffe0; valaddr_reg:x3; val_offset:78039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78039*FLEN/8, x4, x1, x2) - -inst_26014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fffff0; valaddr_reg:x3; val_offset:78042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78042*FLEN/8, x4, x1, x2) - -inst_26015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fffff8; valaddr_reg:x3; val_offset:78045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78045*FLEN/8, x4, x1, x2) - -inst_26016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fffffc; valaddr_reg:x3; val_offset:78048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78048*FLEN/8, x4, x1, x2) - -inst_26017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8fffffe; valaddr_reg:x3; val_offset:78051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78051*FLEN/8, x4, x1, x2) - -inst_26018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xb8ffffff; valaddr_reg:x3; val_offset:78054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78054*FLEN/8, x4, x1, x2) - -inst_26019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbf800001; valaddr_reg:x3; val_offset:78057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78057*FLEN/8, x4, x1, x2) - -inst_26020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbf800003; valaddr_reg:x3; val_offset:78060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78060*FLEN/8, x4, x1, x2) - -inst_26021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbf800007; valaddr_reg:x3; val_offset:78063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78063*FLEN/8, x4, x1, x2) - -inst_26022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbf999999; valaddr_reg:x3; val_offset:78066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78066*FLEN/8, x4, x1, x2) - -inst_26023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:78069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78069*FLEN/8, x4, x1, x2) - -inst_26024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:78072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78072*FLEN/8, x4, x1, x2) - -inst_26025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:78075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78075*FLEN/8, x4, x1, x2) - -inst_26026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:78078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78078*FLEN/8, x4, x1, x2) - -inst_26027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:78081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78081*FLEN/8, x4, x1, x2) - -inst_26028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:78084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78084*FLEN/8, x4, x1, x2) - -inst_26029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:78087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78087*FLEN/8, x4, x1, x2) - -inst_26030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:78090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78090*FLEN/8, x4, x1, x2) - -inst_26031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:78093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78093*FLEN/8, x4, x1, x2) - -inst_26032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:78096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78096*FLEN/8, x4, x1, x2) - -inst_26033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:78099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78099*FLEN/8, x4, x1, x2) - -inst_26034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:78102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78102*FLEN/8, x4, x1, x2) - -inst_26035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef800000; valaddr_reg:x3; val_offset:78105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78105*FLEN/8, x4, x1, x2) - -inst_26036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef800001; valaddr_reg:x3; val_offset:78108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78108*FLEN/8, x4, x1, x2) - -inst_26037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef800003; valaddr_reg:x3; val_offset:78111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78111*FLEN/8, x4, x1, x2) - -inst_26038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef800007; valaddr_reg:x3; val_offset:78114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78114*FLEN/8, x4, x1, x2) - -inst_26039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef80000f; valaddr_reg:x3; val_offset:78117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78117*FLEN/8, x4, x1, x2) - -inst_26040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef80001f; valaddr_reg:x3; val_offset:78120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78120*FLEN/8, x4, x1, x2) - -inst_26041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef80003f; valaddr_reg:x3; val_offset:78123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78123*FLEN/8, x4, x1, x2) - -inst_26042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef80007f; valaddr_reg:x3; val_offset:78126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78126*FLEN/8, x4, x1, x2) - -inst_26043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef8000ff; valaddr_reg:x3; val_offset:78129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78129*FLEN/8, x4, x1, x2) - -inst_26044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef8001ff; valaddr_reg:x3; val_offset:78132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78132*FLEN/8, x4, x1, x2) - -inst_26045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef8003ff; valaddr_reg:x3; val_offset:78135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78135*FLEN/8, x4, x1, x2) - -inst_26046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef8007ff; valaddr_reg:x3; val_offset:78138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78138*FLEN/8, x4, x1, x2) - -inst_26047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef800fff; valaddr_reg:x3; val_offset:78141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78141*FLEN/8, x4, x1, x2) - -inst_26048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef801fff; valaddr_reg:x3; val_offset:78144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78144*FLEN/8, x4, x1, x2) - -inst_26049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef803fff; valaddr_reg:x3; val_offset:78147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78147*FLEN/8, x4, x1, x2) - -inst_26050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef807fff; valaddr_reg:x3; val_offset:78150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78150*FLEN/8, x4, x1, x2) - -inst_26051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef80ffff; valaddr_reg:x3; val_offset:78153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78153*FLEN/8, x4, x1, x2) - -inst_26052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef81ffff; valaddr_reg:x3; val_offset:78156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78156*FLEN/8, x4, x1, x2) - -inst_26053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef83ffff; valaddr_reg:x3; val_offset:78159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78159*FLEN/8, x4, x1, x2) - -inst_26054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef87ffff; valaddr_reg:x3; val_offset:78162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78162*FLEN/8, x4, x1, x2) - -inst_26055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef8fffff; valaddr_reg:x3; val_offset:78165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78165*FLEN/8, x4, x1, x2) - -inst_26056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xef9fffff; valaddr_reg:x3; val_offset:78168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78168*FLEN/8, x4, x1, x2) - -inst_26057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefbfffff; valaddr_reg:x3; val_offset:78171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78171*FLEN/8, x4, x1, x2) - -inst_26058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefc00000; valaddr_reg:x3; val_offset:78174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78174*FLEN/8, x4, x1, x2) - -inst_26059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefe00000; valaddr_reg:x3; val_offset:78177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78177*FLEN/8, x4, x1, x2) - -inst_26060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeff00000; valaddr_reg:x3; val_offset:78180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78180*FLEN/8, x4, x1, x2) - -inst_26061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeff80000; valaddr_reg:x3; val_offset:78183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78183*FLEN/8, x4, x1, x2) - -inst_26062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffc0000; valaddr_reg:x3; val_offset:78186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78186*FLEN/8, x4, x1, x2) - -inst_26063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffe0000; valaddr_reg:x3; val_offset:78189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78189*FLEN/8, x4, x1, x2) - -inst_26064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefff0000; valaddr_reg:x3; val_offset:78192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78192*FLEN/8, x4, x1, x2) - -inst_26065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefff8000; valaddr_reg:x3; val_offset:78195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78195*FLEN/8, x4, x1, x2) - -inst_26066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefffc000; valaddr_reg:x3; val_offset:78198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78198*FLEN/8, x4, x1, x2) - -inst_26067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefffe000; valaddr_reg:x3; val_offset:78201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78201*FLEN/8, x4, x1, x2) - -inst_26068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffff000; valaddr_reg:x3; val_offset:78204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78204*FLEN/8, x4, x1, x2) - -inst_26069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffff800; valaddr_reg:x3; val_offset:78207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78207*FLEN/8, x4, x1, x2) - -inst_26070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffffc00; valaddr_reg:x3; val_offset:78210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78210*FLEN/8, x4, x1, x2) - -inst_26071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffffe00; valaddr_reg:x3; val_offset:78213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78213*FLEN/8, x4, x1, x2) - -inst_26072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefffff00; valaddr_reg:x3; val_offset:78216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78216*FLEN/8, x4, x1, x2) - -inst_26073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefffff80; valaddr_reg:x3; val_offset:78219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78219*FLEN/8, x4, x1, x2) - -inst_26074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefffffc0; valaddr_reg:x3; val_offset:78222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78222*FLEN/8, x4, x1, x2) - -inst_26075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefffffe0; valaddr_reg:x3; val_offset:78225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78225*FLEN/8, x4, x1, x2) - -inst_26076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffffff0; valaddr_reg:x3; val_offset:78228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78228*FLEN/8, x4, x1, x2) - -inst_26077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffffff8; valaddr_reg:x3; val_offset:78231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78231*FLEN/8, x4, x1, x2) - -inst_26078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffffffc; valaddr_reg:x3; val_offset:78234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78234*FLEN/8, x4, x1, x2) - -inst_26079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xeffffffe; valaddr_reg:x3; val_offset:78237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78237*FLEN/8, x4, x1, x2) - -inst_26080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xefffffff; valaddr_reg:x3; val_offset:78240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78240*FLEN/8, x4, x1, x2) - -inst_26081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff000001; valaddr_reg:x3; val_offset:78243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78243*FLEN/8, x4, x1, x2) - -inst_26082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff000003; valaddr_reg:x3; val_offset:78246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78246*FLEN/8, x4, x1, x2) - -inst_26083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff000007; valaddr_reg:x3; val_offset:78249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78249*FLEN/8, x4, x1, x2) - -inst_26084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff199999; valaddr_reg:x3; val_offset:78252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78252*FLEN/8, x4, x1, x2) - -inst_26085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff249249; valaddr_reg:x3; val_offset:78255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78255*FLEN/8, x4, x1, x2) - -inst_26086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff333333; valaddr_reg:x3; val_offset:78258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78258*FLEN/8, x4, x1, x2) - -inst_26087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:78261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78261*FLEN/8, x4, x1, x2) - -inst_26088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:78264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78264*FLEN/8, x4, x1, x2) - -inst_26089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff444444; valaddr_reg:x3; val_offset:78267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78267*FLEN/8, x4, x1, x2) - -inst_26090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:78270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78270*FLEN/8, x4, x1, x2) - -inst_26091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:78273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78273*FLEN/8, x4, x1, x2) - -inst_26092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff666666; valaddr_reg:x3; val_offset:78276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78276*FLEN/8, x4, x1, x2) - -inst_26093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:78279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78279*FLEN/8, x4, x1, x2) - -inst_26094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:78282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78282*FLEN/8, x4, x1, x2) - -inst_26095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:78285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78285*FLEN/8, x4, x1, x2) - -inst_26096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:78288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78288*FLEN/8, x4, x1, x2) - -inst_26097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f800000; valaddr_reg:x3; val_offset:78291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78291*FLEN/8, x4, x1, x2) - -inst_26098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f800001; valaddr_reg:x3; val_offset:78294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78294*FLEN/8, x4, x1, x2) - -inst_26099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f800003; valaddr_reg:x3; val_offset:78297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78297*FLEN/8, x4, x1, x2) - -inst_26100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f800007; valaddr_reg:x3; val_offset:78300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78300*FLEN/8, x4, x1, x2) - -inst_26101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f80000f; valaddr_reg:x3; val_offset:78303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78303*FLEN/8, x4, x1, x2) - -inst_26102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f80001f; valaddr_reg:x3; val_offset:78306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78306*FLEN/8, x4, x1, x2) - -inst_26103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f80003f; valaddr_reg:x3; val_offset:78309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78309*FLEN/8, x4, x1, x2) - -inst_26104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f80007f; valaddr_reg:x3; val_offset:78312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78312*FLEN/8, x4, x1, x2) - -inst_26105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f8000ff; valaddr_reg:x3; val_offset:78315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78315*FLEN/8, x4, x1, x2) - -inst_26106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f8001ff; valaddr_reg:x3; val_offset:78318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78318*FLEN/8, x4, x1, x2) - -inst_26107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f8003ff; valaddr_reg:x3; val_offset:78321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78321*FLEN/8, x4, x1, x2) - -inst_26108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f8007ff; valaddr_reg:x3; val_offset:78324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78324*FLEN/8, x4, x1, x2) - -inst_26109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f800fff; valaddr_reg:x3; val_offset:78327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78327*FLEN/8, x4, x1, x2) - -inst_26110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f801fff; valaddr_reg:x3; val_offset:78330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78330*FLEN/8, x4, x1, x2) - -inst_26111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f803fff; valaddr_reg:x3; val_offset:78333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78333*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_205) - -inst_26112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f807fff; valaddr_reg:x3; val_offset:78336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78336*FLEN/8, x4, x1, x2) - -inst_26113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f80ffff; valaddr_reg:x3; val_offset:78339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78339*FLEN/8, x4, x1, x2) - -inst_26114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f81ffff; valaddr_reg:x3; val_offset:78342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78342*FLEN/8, x4, x1, x2) - -inst_26115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f83ffff; valaddr_reg:x3; val_offset:78345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78345*FLEN/8, x4, x1, x2) - -inst_26116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f87ffff; valaddr_reg:x3; val_offset:78348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78348*FLEN/8, x4, x1, x2) - -inst_26117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f8fffff; valaddr_reg:x3; val_offset:78351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78351*FLEN/8, x4, x1, x2) - -inst_26118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1f9fffff; valaddr_reg:x3; val_offset:78354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78354*FLEN/8, x4, x1, x2) - -inst_26119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fbfffff; valaddr_reg:x3; val_offset:78357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78357*FLEN/8, x4, x1, x2) - -inst_26120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fc00000; valaddr_reg:x3; val_offset:78360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78360*FLEN/8, x4, x1, x2) - -inst_26121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fe00000; valaddr_reg:x3; val_offset:78363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78363*FLEN/8, x4, x1, x2) - -inst_26122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ff00000; valaddr_reg:x3; val_offset:78366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78366*FLEN/8, x4, x1, x2) - -inst_26123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ff80000; valaddr_reg:x3; val_offset:78369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78369*FLEN/8, x4, x1, x2) - -inst_26124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffc0000; valaddr_reg:x3; val_offset:78372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78372*FLEN/8, x4, x1, x2) - -inst_26125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffe0000; valaddr_reg:x3; val_offset:78375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78375*FLEN/8, x4, x1, x2) - -inst_26126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fff0000; valaddr_reg:x3; val_offset:78378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78378*FLEN/8, x4, x1, x2) - -inst_26127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fff8000; valaddr_reg:x3; val_offset:78381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78381*FLEN/8, x4, x1, x2) - -inst_26128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fffc000; valaddr_reg:x3; val_offset:78384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78384*FLEN/8, x4, x1, x2) - -inst_26129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fffe000; valaddr_reg:x3; val_offset:78387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78387*FLEN/8, x4, x1, x2) - -inst_26130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffff000; valaddr_reg:x3; val_offset:78390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78390*FLEN/8, x4, x1, x2) - -inst_26131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffff800; valaddr_reg:x3; val_offset:78393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78393*FLEN/8, x4, x1, x2) - -inst_26132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffffc00; valaddr_reg:x3; val_offset:78396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78396*FLEN/8, x4, x1, x2) - -inst_26133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffffe00; valaddr_reg:x3; val_offset:78399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78399*FLEN/8, x4, x1, x2) - -inst_26134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fffff00; valaddr_reg:x3; val_offset:78402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78402*FLEN/8, x4, x1, x2) - -inst_26135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fffff80; valaddr_reg:x3; val_offset:78405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78405*FLEN/8, x4, x1, x2) - -inst_26136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fffffc0; valaddr_reg:x3; val_offset:78408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78408*FLEN/8, x4, x1, x2) - -inst_26137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fffffe0; valaddr_reg:x3; val_offset:78411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78411*FLEN/8, x4, x1, x2) - -inst_26138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffffff0; valaddr_reg:x3; val_offset:78414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78414*FLEN/8, x4, x1, x2) - -inst_26139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffffff8; valaddr_reg:x3; val_offset:78417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78417*FLEN/8, x4, x1, x2) - -inst_26140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffffffc; valaddr_reg:x3; val_offset:78420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78420*FLEN/8, x4, x1, x2) - -inst_26141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1ffffffe; valaddr_reg:x3; val_offset:78423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78423*FLEN/8, x4, x1, x2) - -inst_26142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x1fffffff; valaddr_reg:x3; val_offset:78426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78426*FLEN/8, x4, x1, x2) - -inst_26143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3f800001; valaddr_reg:x3; val_offset:78429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78429*FLEN/8, x4, x1, x2) - -inst_26144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3f800003; valaddr_reg:x3; val_offset:78432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78432*FLEN/8, x4, x1, x2) - -inst_26145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3f800007; valaddr_reg:x3; val_offset:78435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78435*FLEN/8, x4, x1, x2) - -inst_26146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3f999999; valaddr_reg:x3; val_offset:78438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78438*FLEN/8, x4, x1, x2) - -inst_26147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:78441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78441*FLEN/8, x4, x1, x2) - -inst_26148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:78444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78444*FLEN/8, x4, x1, x2) - -inst_26149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:78447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78447*FLEN/8, x4, x1, x2) - -inst_26150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:78450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78450*FLEN/8, x4, x1, x2) - -inst_26151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:78453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78453*FLEN/8, x4, x1, x2) - -inst_26152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:78456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78456*FLEN/8, x4, x1, x2) - -inst_26153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:78459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78459*FLEN/8, x4, x1, x2) - -inst_26154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:78462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78462*FLEN/8, x4, x1, x2) - -inst_26155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:78465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78465*FLEN/8, x4, x1, x2) - -inst_26156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:78468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78468*FLEN/8, x4, x1, x2) - -inst_26157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:78471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78471*FLEN/8, x4, x1, x2) - -inst_26158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:78474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78474*FLEN/8, x4, x1, x2) - -inst_26159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b800000; valaddr_reg:x3; val_offset:78477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78477*FLEN/8, x4, x1, x2) - -inst_26160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b800001; valaddr_reg:x3; val_offset:78480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78480*FLEN/8, x4, x1, x2) - -inst_26161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b800003; valaddr_reg:x3; val_offset:78483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78483*FLEN/8, x4, x1, x2) - -inst_26162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b800007; valaddr_reg:x3; val_offset:78486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78486*FLEN/8, x4, x1, x2) - -inst_26163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b80000f; valaddr_reg:x3; val_offset:78489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78489*FLEN/8, x4, x1, x2) - -inst_26164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b80001f; valaddr_reg:x3; val_offset:78492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78492*FLEN/8, x4, x1, x2) - -inst_26165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b80003f; valaddr_reg:x3; val_offset:78495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78495*FLEN/8, x4, x1, x2) - -inst_26166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b80007f; valaddr_reg:x3; val_offset:78498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78498*FLEN/8, x4, x1, x2) - -inst_26167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b8000ff; valaddr_reg:x3; val_offset:78501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78501*FLEN/8, x4, x1, x2) - -inst_26168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b8001ff; valaddr_reg:x3; val_offset:78504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78504*FLEN/8, x4, x1, x2) - -inst_26169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b8003ff; valaddr_reg:x3; val_offset:78507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78507*FLEN/8, x4, x1, x2) - -inst_26170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b8007ff; valaddr_reg:x3; val_offset:78510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78510*FLEN/8, x4, x1, x2) - -inst_26171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b800fff; valaddr_reg:x3; val_offset:78513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78513*FLEN/8, x4, x1, x2) - -inst_26172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b801fff; valaddr_reg:x3; val_offset:78516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78516*FLEN/8, x4, x1, x2) - -inst_26173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b803fff; valaddr_reg:x3; val_offset:78519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78519*FLEN/8, x4, x1, x2) - -inst_26174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b807fff; valaddr_reg:x3; val_offset:78522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78522*FLEN/8, x4, x1, x2) - -inst_26175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b80ffff; valaddr_reg:x3; val_offset:78525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78525*FLEN/8, x4, x1, x2) - -inst_26176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b81ffff; valaddr_reg:x3; val_offset:78528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78528*FLEN/8, x4, x1, x2) - -inst_26177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b83ffff; valaddr_reg:x3; val_offset:78531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78531*FLEN/8, x4, x1, x2) - -inst_26178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b87ffff; valaddr_reg:x3; val_offset:78534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78534*FLEN/8, x4, x1, x2) - -inst_26179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b8fffff; valaddr_reg:x3; val_offset:78537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78537*FLEN/8, x4, x1, x2) - -inst_26180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3b9fffff; valaddr_reg:x3; val_offset:78540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78540*FLEN/8, x4, x1, x2) - -inst_26181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bbfffff; valaddr_reg:x3; val_offset:78543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78543*FLEN/8, x4, x1, x2) - -inst_26182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bc00000; valaddr_reg:x3; val_offset:78546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78546*FLEN/8, x4, x1, x2) - -inst_26183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3be00000; valaddr_reg:x3; val_offset:78549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78549*FLEN/8, x4, x1, x2) - -inst_26184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bf00000; valaddr_reg:x3; val_offset:78552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78552*FLEN/8, x4, x1, x2) - -inst_26185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bf80000; valaddr_reg:x3; val_offset:78555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78555*FLEN/8, x4, x1, x2) - -inst_26186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfc0000; valaddr_reg:x3; val_offset:78558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78558*FLEN/8, x4, x1, x2) - -inst_26187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfe0000; valaddr_reg:x3; val_offset:78561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78561*FLEN/8, x4, x1, x2) - -inst_26188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bff0000; valaddr_reg:x3; val_offset:78564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78564*FLEN/8, x4, x1, x2) - -inst_26189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bff8000; valaddr_reg:x3; val_offset:78567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78567*FLEN/8, x4, x1, x2) - -inst_26190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bffc000; valaddr_reg:x3; val_offset:78570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78570*FLEN/8, x4, x1, x2) - -inst_26191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bffe000; valaddr_reg:x3; val_offset:78573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78573*FLEN/8, x4, x1, x2) - -inst_26192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfff000; valaddr_reg:x3; val_offset:78576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78576*FLEN/8, x4, x1, x2) - -inst_26193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfff800; valaddr_reg:x3; val_offset:78579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78579*FLEN/8, x4, x1, x2) - -inst_26194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfffc00; valaddr_reg:x3; val_offset:78582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78582*FLEN/8, x4, x1, x2) - -inst_26195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfffe00; valaddr_reg:x3; val_offset:78585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78585*FLEN/8, x4, x1, x2) - -inst_26196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bffff00; valaddr_reg:x3; val_offset:78588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78588*FLEN/8, x4, x1, x2) - -inst_26197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bffff80; valaddr_reg:x3; val_offset:78591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78591*FLEN/8, x4, x1, x2) - -inst_26198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bffffc0; valaddr_reg:x3; val_offset:78594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78594*FLEN/8, x4, x1, x2) - -inst_26199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bffffe0; valaddr_reg:x3; val_offset:78597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78597*FLEN/8, x4, x1, x2) - -inst_26200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfffff0; valaddr_reg:x3; val_offset:78600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78600*FLEN/8, x4, x1, x2) - -inst_26201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfffff8; valaddr_reg:x3; val_offset:78603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78603*FLEN/8, x4, x1, x2) - -inst_26202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfffffc; valaddr_reg:x3; val_offset:78606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78606*FLEN/8, x4, x1, x2) - -inst_26203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bfffffe; valaddr_reg:x3; val_offset:78609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78609*FLEN/8, x4, x1, x2) - -inst_26204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3bffffff; valaddr_reg:x3; val_offset:78612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78612*FLEN/8, x4, x1, x2) - -inst_26205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3f800001; valaddr_reg:x3; val_offset:78615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78615*FLEN/8, x4, x1, x2) - -inst_26206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3f800003; valaddr_reg:x3; val_offset:78618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78618*FLEN/8, x4, x1, x2) - -inst_26207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3f800007; valaddr_reg:x3; val_offset:78621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78621*FLEN/8, x4, x1, x2) - -inst_26208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3f999999; valaddr_reg:x3; val_offset:78624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78624*FLEN/8, x4, x1, x2) - -inst_26209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:78627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78627*FLEN/8, x4, x1, x2) - -inst_26210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:78630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78630*FLEN/8, x4, x1, x2) - -inst_26211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:78633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78633*FLEN/8, x4, x1, x2) - -inst_26212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:78636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78636*FLEN/8, x4, x1, x2) - -inst_26213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:78639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78639*FLEN/8, x4, x1, x2) - -inst_26214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:78642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78642*FLEN/8, x4, x1, x2) - -inst_26215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:78645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78645*FLEN/8, x4, x1, x2) - -inst_26216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:78648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78648*FLEN/8, x4, x1, x2) - -inst_26217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:78651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78651*FLEN/8, x4, x1, x2) - -inst_26218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:78654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78654*FLEN/8, x4, x1, x2) - -inst_26219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:78657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78657*FLEN/8, x4, x1, x2) - -inst_26220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:78660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78660*FLEN/8, x4, x1, x2) - -inst_26221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26000000; valaddr_reg:x3; val_offset:78663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78663*FLEN/8, x4, x1, x2) - -inst_26222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26000001; valaddr_reg:x3; val_offset:78666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78666*FLEN/8, x4, x1, x2) - -inst_26223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26000003; valaddr_reg:x3; val_offset:78669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78669*FLEN/8, x4, x1, x2) - -inst_26224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26000007; valaddr_reg:x3; val_offset:78672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78672*FLEN/8, x4, x1, x2) - -inst_26225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x2600000f; valaddr_reg:x3; val_offset:78675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78675*FLEN/8, x4, x1, x2) - -inst_26226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x2600001f; valaddr_reg:x3; val_offset:78678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78678*FLEN/8, x4, x1, x2) - -inst_26227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x2600003f; valaddr_reg:x3; val_offset:78681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78681*FLEN/8, x4, x1, x2) - -inst_26228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x2600007f; valaddr_reg:x3; val_offset:78684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78684*FLEN/8, x4, x1, x2) - -inst_26229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x260000ff; valaddr_reg:x3; val_offset:78687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78687*FLEN/8, x4, x1, x2) - -inst_26230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x260001ff; valaddr_reg:x3; val_offset:78690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78690*FLEN/8, x4, x1, x2) - -inst_26231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x260003ff; valaddr_reg:x3; val_offset:78693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78693*FLEN/8, x4, x1, x2) - -inst_26232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x260007ff; valaddr_reg:x3; val_offset:78696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78696*FLEN/8, x4, x1, x2) - -inst_26233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26000fff; valaddr_reg:x3; val_offset:78699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78699*FLEN/8, x4, x1, x2) - -inst_26234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26001fff; valaddr_reg:x3; val_offset:78702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78702*FLEN/8, x4, x1, x2) - -inst_26235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26003fff; valaddr_reg:x3; val_offset:78705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78705*FLEN/8, x4, x1, x2) - -inst_26236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26007fff; valaddr_reg:x3; val_offset:78708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78708*FLEN/8, x4, x1, x2) - -inst_26237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x2600ffff; valaddr_reg:x3; val_offset:78711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78711*FLEN/8, x4, x1, x2) - -inst_26238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x2601ffff; valaddr_reg:x3; val_offset:78714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78714*FLEN/8, x4, x1, x2) - -inst_26239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x2603ffff; valaddr_reg:x3; val_offset:78717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78717*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_206) - -inst_26240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x2607ffff; valaddr_reg:x3; val_offset:78720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78720*FLEN/8, x4, x1, x2) - -inst_26241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x260fffff; valaddr_reg:x3; val_offset:78723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78723*FLEN/8, x4, x1, x2) - -inst_26242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x261fffff; valaddr_reg:x3; val_offset:78726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78726*FLEN/8, x4, x1, x2) - -inst_26243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x263fffff; valaddr_reg:x3; val_offset:78729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78729*FLEN/8, x4, x1, x2) - -inst_26244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26400000; valaddr_reg:x3; val_offset:78732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78732*FLEN/8, x4, x1, x2) - -inst_26245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26600000; valaddr_reg:x3; val_offset:78735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78735*FLEN/8, x4, x1, x2) - -inst_26246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26700000; valaddr_reg:x3; val_offset:78738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78738*FLEN/8, x4, x1, x2) - -inst_26247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x26780000; valaddr_reg:x3; val_offset:78741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78741*FLEN/8, x4, x1, x2) - -inst_26248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267c0000; valaddr_reg:x3; val_offset:78744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78744*FLEN/8, x4, x1, x2) - -inst_26249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267e0000; valaddr_reg:x3; val_offset:78747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78747*FLEN/8, x4, x1, x2) - -inst_26250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267f0000; valaddr_reg:x3; val_offset:78750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78750*FLEN/8, x4, x1, x2) - -inst_26251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267f8000; valaddr_reg:x3; val_offset:78753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78753*FLEN/8, x4, x1, x2) - -inst_26252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267fc000; valaddr_reg:x3; val_offset:78756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78756*FLEN/8, x4, x1, x2) - -inst_26253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267fe000; valaddr_reg:x3; val_offset:78759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78759*FLEN/8, x4, x1, x2) - -inst_26254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267ff000; valaddr_reg:x3; val_offset:78762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78762*FLEN/8, x4, x1, x2) - -inst_26255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267ff800; valaddr_reg:x3; val_offset:78765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78765*FLEN/8, x4, x1, x2) - -inst_26256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267ffc00; valaddr_reg:x3; val_offset:78768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78768*FLEN/8, x4, x1, x2) - -inst_26257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267ffe00; valaddr_reg:x3; val_offset:78771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78771*FLEN/8, x4, x1, x2) - -inst_26258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267fff00; valaddr_reg:x3; val_offset:78774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78774*FLEN/8, x4, x1, x2) - -inst_26259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267fff80; valaddr_reg:x3; val_offset:78777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78777*FLEN/8, x4, x1, x2) - -inst_26260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267fffc0; valaddr_reg:x3; val_offset:78780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78780*FLEN/8, x4, x1, x2) - -inst_26261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267fffe0; valaddr_reg:x3; val_offset:78783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78783*FLEN/8, x4, x1, x2) - -inst_26262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267ffff0; valaddr_reg:x3; val_offset:78786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78786*FLEN/8, x4, x1, x2) - -inst_26263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267ffff8; valaddr_reg:x3; val_offset:78789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78789*FLEN/8, x4, x1, x2) - -inst_26264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267ffffc; valaddr_reg:x3; val_offset:78792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78792*FLEN/8, x4, x1, x2) - -inst_26265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267ffffe; valaddr_reg:x3; val_offset:78795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78795*FLEN/8, x4, x1, x2) - -inst_26266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x267fffff; valaddr_reg:x3; val_offset:78798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78798*FLEN/8, x4, x1, x2) - -inst_26267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3f800001; valaddr_reg:x3; val_offset:78801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78801*FLEN/8, x4, x1, x2) - -inst_26268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3f800003; valaddr_reg:x3; val_offset:78804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78804*FLEN/8, x4, x1, x2) - -inst_26269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3f800007; valaddr_reg:x3; val_offset:78807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78807*FLEN/8, x4, x1, x2) - -inst_26270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3f999999; valaddr_reg:x3; val_offset:78810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78810*FLEN/8, x4, x1, x2) - -inst_26271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:78813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78813*FLEN/8, x4, x1, x2) - -inst_26272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:78816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78816*FLEN/8, x4, x1, x2) - -inst_26273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:78819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78819*FLEN/8, x4, x1, x2) - -inst_26274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:78822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78822*FLEN/8, x4, x1, x2) - -inst_26275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:78825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78825*FLEN/8, x4, x1, x2) - -inst_26276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:78828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78828*FLEN/8, x4, x1, x2) - -inst_26277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:78831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78831*FLEN/8, x4, x1, x2) - -inst_26278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:78834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78834*FLEN/8, x4, x1, x2) - -inst_26279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:78837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78837*FLEN/8, x4, x1, x2) - -inst_26280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:78840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78840*FLEN/8, x4, x1, x2) - -inst_26281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:78843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78843*FLEN/8, x4, x1, x2) - -inst_26282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:78846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78846*FLEN/8, x4, x1, x2) - -inst_26283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80000000; valaddr_reg:x3; val_offset:78849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78849*FLEN/8, x4, x1, x2) - -inst_26284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:78852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78852*FLEN/8, x4, x1, x2) - -inst_26285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:78855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78855*FLEN/8, x4, x1, x2) - -inst_26286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:78858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78858*FLEN/8, x4, x1, x2) - -inst_26287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x8000000f; valaddr_reg:x3; val_offset:78861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78861*FLEN/8, x4, x1, x2) - -inst_26288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x8000001f; valaddr_reg:x3; val_offset:78864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78864*FLEN/8, x4, x1, x2) - -inst_26289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x8000003f; valaddr_reg:x3; val_offset:78867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78867*FLEN/8, x4, x1, x2) - -inst_26290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x8000007f; valaddr_reg:x3; val_offset:78870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78870*FLEN/8, x4, x1, x2) - -inst_26291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x800000ff; valaddr_reg:x3; val_offset:78873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78873*FLEN/8, x4, x1, x2) - -inst_26292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x800001ff; valaddr_reg:x3; val_offset:78876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78876*FLEN/8, x4, x1, x2) - -inst_26293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x800003ff; valaddr_reg:x3; val_offset:78879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78879*FLEN/8, x4, x1, x2) - -inst_26294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x800007ff; valaddr_reg:x3; val_offset:78882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78882*FLEN/8, x4, x1, x2) - -inst_26295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80000fff; valaddr_reg:x3; val_offset:78885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78885*FLEN/8, x4, x1, x2) - -inst_26296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80001fff; valaddr_reg:x3; val_offset:78888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78888*FLEN/8, x4, x1, x2) - -inst_26297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80003fff; valaddr_reg:x3; val_offset:78891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78891*FLEN/8, x4, x1, x2) - -inst_26298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80007fff; valaddr_reg:x3; val_offset:78894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78894*FLEN/8, x4, x1, x2) - -inst_26299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x8000ffff; valaddr_reg:x3; val_offset:78897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78897*FLEN/8, x4, x1, x2) - -inst_26300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x8001ffff; valaddr_reg:x3; val_offset:78900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78900*FLEN/8, x4, x1, x2) - -inst_26301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x8003ffff; valaddr_reg:x3; val_offset:78903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78903*FLEN/8, x4, x1, x2) - -inst_26302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x8007ffff; valaddr_reg:x3; val_offset:78906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78906*FLEN/8, x4, x1, x2) - -inst_26303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x800fffff; valaddr_reg:x3; val_offset:78909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78909*FLEN/8, x4, x1, x2) - -inst_26304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x801fffff; valaddr_reg:x3; val_offset:78912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78912*FLEN/8, x4, x1, x2) - -inst_26305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x803fffff; valaddr_reg:x3; val_offset:78915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78915*FLEN/8, x4, x1, x2) - -inst_26306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80400000; valaddr_reg:x3; val_offset:78918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78918*FLEN/8, x4, x1, x2) - -inst_26307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80600000; valaddr_reg:x3; val_offset:78921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78921*FLEN/8, x4, x1, x2) - -inst_26308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80700000; valaddr_reg:x3; val_offset:78924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78924*FLEN/8, x4, x1, x2) - -inst_26309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80780000; valaddr_reg:x3; val_offset:78927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78927*FLEN/8, x4, x1, x2) - -inst_26310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807c0000; valaddr_reg:x3; val_offset:78930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78930*FLEN/8, x4, x1, x2) - -inst_26311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807e0000; valaddr_reg:x3; val_offset:78933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78933*FLEN/8, x4, x1, x2) - -inst_26312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807f0000; valaddr_reg:x3; val_offset:78936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78936*FLEN/8, x4, x1, x2) - -inst_26313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807f8000; valaddr_reg:x3; val_offset:78939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78939*FLEN/8, x4, x1, x2) - -inst_26314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807fc000; valaddr_reg:x3; val_offset:78942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78942*FLEN/8, x4, x1, x2) - -inst_26315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807fe000; valaddr_reg:x3; val_offset:78945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78945*FLEN/8, x4, x1, x2) - -inst_26316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807ff000; valaddr_reg:x3; val_offset:78948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78948*FLEN/8, x4, x1, x2) - -inst_26317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807ff800; valaddr_reg:x3; val_offset:78951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78951*FLEN/8, x4, x1, x2) - -inst_26318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807ffc00; valaddr_reg:x3; val_offset:78954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78954*FLEN/8, x4, x1, x2) - -inst_26319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807ffe00; valaddr_reg:x3; val_offset:78957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78957*FLEN/8, x4, x1, x2) - -inst_26320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807fff00; valaddr_reg:x3; val_offset:78960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78960*FLEN/8, x4, x1, x2) - -inst_26321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807fff80; valaddr_reg:x3; val_offset:78963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78963*FLEN/8, x4, x1, x2) - -inst_26322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807fffc0; valaddr_reg:x3; val_offset:78966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78966*FLEN/8, x4, x1, x2) - -inst_26323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807fffe0; valaddr_reg:x3; val_offset:78969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78969*FLEN/8, x4, x1, x2) - -inst_26324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807ffff0; valaddr_reg:x3; val_offset:78972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78972*FLEN/8, x4, x1, x2) - -inst_26325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:78975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78975*FLEN/8, x4, x1, x2) - -inst_26326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:78978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78978*FLEN/8, x4, x1, x2) - -inst_26327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:78981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78981*FLEN/8, x4, x1, x2) - -inst_26328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x807fffff; valaddr_reg:x3; val_offset:78984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78984*FLEN/8, x4, x1, x2) - -inst_26329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:78987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78987*FLEN/8, x4, x1, x2) - -inst_26330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:78990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78990*FLEN/8, x4, x1, x2) - -inst_26331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:78993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78993*FLEN/8, x4, x1, x2) - -inst_26332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:78996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78996*FLEN/8, x4, x1, x2) - -inst_26333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:78999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78999*FLEN/8, x4, x1, x2) - -inst_26334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:79002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79002*FLEN/8, x4, x1, x2) - -inst_26335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:79005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79005*FLEN/8, x4, x1, x2) - -inst_26336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:79008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79008*FLEN/8, x4, x1, x2) - -inst_26337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:79011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79011*FLEN/8, x4, x1, x2) - -inst_26338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:79014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79014*FLEN/8, x4, x1, x2) - -inst_26339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:79017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79017*FLEN/8, x4, x1, x2) - -inst_26340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:79020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79020*FLEN/8, x4, x1, x2) - -inst_26341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:79023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79023*FLEN/8, x4, x1, x2) - -inst_26342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:79026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79026*FLEN/8, x4, x1, x2) - -inst_26343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:79029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79029*FLEN/8, x4, x1, x2) - -inst_26344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:79032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79032*FLEN/8, x4, x1, x2) - -inst_26345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:79035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79035*FLEN/8, x4, x1, x2) - -inst_26346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:79038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79038*FLEN/8, x4, x1, x2) - -inst_26347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:79041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79041*FLEN/8, x4, x1, x2) - -inst_26348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:79044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79044*FLEN/8, x4, x1, x2) - -inst_26349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:79047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79047*FLEN/8, x4, x1, x2) - -inst_26350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:79050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79050*FLEN/8, x4, x1, x2) - -inst_26351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:79053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79053*FLEN/8, x4, x1, x2) - -inst_26352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:79056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79056*FLEN/8, x4, x1, x2) - -inst_26353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:79059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79059*FLEN/8, x4, x1, x2) - -inst_26354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:79062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79062*FLEN/8, x4, x1, x2) - -inst_26355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:79065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79065*FLEN/8, x4, x1, x2) - -inst_26356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:79068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79068*FLEN/8, x4, x1, x2) - -inst_26357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:79071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79071*FLEN/8, x4, x1, x2) - -inst_26358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:79074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79074*FLEN/8, x4, x1, x2) - -inst_26359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:79077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79077*FLEN/8, x4, x1, x2) - -inst_26360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:79080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79080*FLEN/8, x4, x1, x2) - -inst_26361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a000000; valaddr_reg:x3; val_offset:79083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79083*FLEN/8, x4, x1, x2) - -inst_26362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a000001; valaddr_reg:x3; val_offset:79086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79086*FLEN/8, x4, x1, x2) - -inst_26363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a000003; valaddr_reg:x3; val_offset:79089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79089*FLEN/8, x4, x1, x2) - -inst_26364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a000007; valaddr_reg:x3; val_offset:79092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79092*FLEN/8, x4, x1, x2) - -inst_26365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a00000f; valaddr_reg:x3; val_offset:79095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79095*FLEN/8, x4, x1, x2) - -inst_26366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a00001f; valaddr_reg:x3; val_offset:79098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79098*FLEN/8, x4, x1, x2) - -inst_26367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a00003f; valaddr_reg:x3; val_offset:79101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79101*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_207) - -inst_26368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a00007f; valaddr_reg:x3; val_offset:79104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79104*FLEN/8, x4, x1, x2) - -inst_26369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a0000ff; valaddr_reg:x3; val_offset:79107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79107*FLEN/8, x4, x1, x2) - -inst_26370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a0001ff; valaddr_reg:x3; val_offset:79110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79110*FLEN/8, x4, x1, x2) - -inst_26371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a0003ff; valaddr_reg:x3; val_offset:79113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79113*FLEN/8, x4, x1, x2) - -inst_26372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a0007ff; valaddr_reg:x3; val_offset:79116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79116*FLEN/8, x4, x1, x2) - -inst_26373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a000fff; valaddr_reg:x3; val_offset:79119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79119*FLEN/8, x4, x1, x2) - -inst_26374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a001fff; valaddr_reg:x3; val_offset:79122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79122*FLEN/8, x4, x1, x2) - -inst_26375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a003fff; valaddr_reg:x3; val_offset:79125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79125*FLEN/8, x4, x1, x2) - -inst_26376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a007fff; valaddr_reg:x3; val_offset:79128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79128*FLEN/8, x4, x1, x2) - -inst_26377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a00ffff; valaddr_reg:x3; val_offset:79131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79131*FLEN/8, x4, x1, x2) - -inst_26378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a01ffff; valaddr_reg:x3; val_offset:79134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79134*FLEN/8, x4, x1, x2) - -inst_26379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a03ffff; valaddr_reg:x3; val_offset:79137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79137*FLEN/8, x4, x1, x2) - -inst_26380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a07ffff; valaddr_reg:x3; val_offset:79140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79140*FLEN/8, x4, x1, x2) - -inst_26381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a0fffff; valaddr_reg:x3; val_offset:79143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79143*FLEN/8, x4, x1, x2) - -inst_26382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a1fffff; valaddr_reg:x3; val_offset:79146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79146*FLEN/8, x4, x1, x2) - -inst_26383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a3fffff; valaddr_reg:x3; val_offset:79149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79149*FLEN/8, x4, x1, x2) - -inst_26384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a400000; valaddr_reg:x3; val_offset:79152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79152*FLEN/8, x4, x1, x2) - -inst_26385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a600000; valaddr_reg:x3; val_offset:79155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79155*FLEN/8, x4, x1, x2) - -inst_26386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a700000; valaddr_reg:x3; val_offset:79158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79158*FLEN/8, x4, x1, x2) - -inst_26387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a780000; valaddr_reg:x3; val_offset:79161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79161*FLEN/8, x4, x1, x2) - -inst_26388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7c0000; valaddr_reg:x3; val_offset:79164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79164*FLEN/8, x4, x1, x2) - -inst_26389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7e0000; valaddr_reg:x3; val_offset:79167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79167*FLEN/8, x4, x1, x2) - -inst_26390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7f0000; valaddr_reg:x3; val_offset:79170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79170*FLEN/8, x4, x1, x2) - -inst_26391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7f8000; valaddr_reg:x3; val_offset:79173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79173*FLEN/8, x4, x1, x2) - -inst_26392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7fc000; valaddr_reg:x3; val_offset:79176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79176*FLEN/8, x4, x1, x2) - -inst_26393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7fe000; valaddr_reg:x3; val_offset:79179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79179*FLEN/8, x4, x1, x2) - -inst_26394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7ff000; valaddr_reg:x3; val_offset:79182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79182*FLEN/8, x4, x1, x2) - -inst_26395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7ff800; valaddr_reg:x3; val_offset:79185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79185*FLEN/8, x4, x1, x2) - -inst_26396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7ffc00; valaddr_reg:x3; val_offset:79188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79188*FLEN/8, x4, x1, x2) - -inst_26397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7ffe00; valaddr_reg:x3; val_offset:79191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79191*FLEN/8, x4, x1, x2) - -inst_26398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7fff00; valaddr_reg:x3; val_offset:79194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79194*FLEN/8, x4, x1, x2) - -inst_26399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7fff80; valaddr_reg:x3; val_offset:79197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79197*FLEN/8, x4, x1, x2) - -inst_26400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7fffc0; valaddr_reg:x3; val_offset:79200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79200*FLEN/8, x4, x1, x2) - -inst_26401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7fffe0; valaddr_reg:x3; val_offset:79203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79203*FLEN/8, x4, x1, x2) - -inst_26402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7ffff0; valaddr_reg:x3; val_offset:79206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79206*FLEN/8, x4, x1, x2) - -inst_26403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7ffff8; valaddr_reg:x3; val_offset:79209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79209*FLEN/8, x4, x1, x2) - -inst_26404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7ffffc; valaddr_reg:x3; val_offset:79212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79212*FLEN/8, x4, x1, x2) - -inst_26405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7ffffe; valaddr_reg:x3; val_offset:79215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79215*FLEN/8, x4, x1, x2) - -inst_26406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; -op3val:0x4a7fffff; valaddr_reg:x3; val_offset:79218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79218*FLEN/8, x4, x1, x2) - -inst_26407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:79221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79221*FLEN/8, x4, x1, x2) - -inst_26408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:79224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79224*FLEN/8, x4, x1, x2) - -inst_26409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:79227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79227*FLEN/8, x4, x1, x2) - -inst_26410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:79230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79230*FLEN/8, x4, x1, x2) - -inst_26411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:79233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79233*FLEN/8, x4, x1, x2) - -inst_26412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:79236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79236*FLEN/8, x4, x1, x2) - -inst_26413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:79239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79239*FLEN/8, x4, x1, x2) - -inst_26414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:79242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79242*FLEN/8, x4, x1, x2) - -inst_26415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:79245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79245*FLEN/8, x4, x1, x2) - -inst_26416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:79248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79248*FLEN/8, x4, x1, x2) - -inst_26417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:79251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79251*FLEN/8, x4, x1, x2) - -inst_26418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:79254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79254*FLEN/8, x4, x1, x2) - -inst_26419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:79257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79257*FLEN/8, x4, x1, x2) - -inst_26420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:79260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79260*FLEN/8, x4, x1, x2) - -inst_26421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:79263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79263*FLEN/8, x4, x1, x2) - -inst_26422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:79266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79266*FLEN/8, x4, x1, x2) - -inst_26423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe800000; valaddr_reg:x3; val_offset:79269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79269*FLEN/8, x4, x1, x2) - -inst_26424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe800001; valaddr_reg:x3; val_offset:79272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79272*FLEN/8, x4, x1, x2) - -inst_26425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe800003; valaddr_reg:x3; val_offset:79275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79275*FLEN/8, x4, x1, x2) - -inst_26426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe800007; valaddr_reg:x3; val_offset:79278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79278*FLEN/8, x4, x1, x2) - -inst_26427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe80000f; valaddr_reg:x3; val_offset:79281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79281*FLEN/8, x4, x1, x2) - -inst_26428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe80001f; valaddr_reg:x3; val_offset:79284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79284*FLEN/8, x4, x1, x2) - -inst_26429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe80003f; valaddr_reg:x3; val_offset:79287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79287*FLEN/8, x4, x1, x2) - -inst_26430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe80007f; valaddr_reg:x3; val_offset:79290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79290*FLEN/8, x4, x1, x2) - -inst_26431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe8000ff; valaddr_reg:x3; val_offset:79293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79293*FLEN/8, x4, x1, x2) - -inst_26432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe8001ff; valaddr_reg:x3; val_offset:79296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79296*FLEN/8, x4, x1, x2) - -inst_26433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe8003ff; valaddr_reg:x3; val_offset:79299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79299*FLEN/8, x4, x1, x2) - -inst_26434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe8007ff; valaddr_reg:x3; val_offset:79302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79302*FLEN/8, x4, x1, x2) - -inst_26435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe800fff; valaddr_reg:x3; val_offset:79305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79305*FLEN/8, x4, x1, x2) - -inst_26436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe801fff; valaddr_reg:x3; val_offset:79308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79308*FLEN/8, x4, x1, x2) - -inst_26437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe803fff; valaddr_reg:x3; val_offset:79311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79311*FLEN/8, x4, x1, x2) - -inst_26438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe807fff; valaddr_reg:x3; val_offset:79314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79314*FLEN/8, x4, x1, x2) - -inst_26439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe80ffff; valaddr_reg:x3; val_offset:79317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79317*FLEN/8, x4, x1, x2) - -inst_26440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe81ffff; valaddr_reg:x3; val_offset:79320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79320*FLEN/8, x4, x1, x2) - -inst_26441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe83ffff; valaddr_reg:x3; val_offset:79323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79323*FLEN/8, x4, x1, x2) - -inst_26442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe87ffff; valaddr_reg:x3; val_offset:79326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79326*FLEN/8, x4, x1, x2) - -inst_26443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe8fffff; valaddr_reg:x3; val_offset:79329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79329*FLEN/8, x4, x1, x2) - -inst_26444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xe9fffff; valaddr_reg:x3; val_offset:79332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79332*FLEN/8, x4, x1, x2) - -inst_26445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xebfffff; valaddr_reg:x3; val_offset:79335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79335*FLEN/8, x4, x1, x2) - -inst_26446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xec00000; valaddr_reg:x3; val_offset:79338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79338*FLEN/8, x4, x1, x2) - -inst_26447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xee00000; valaddr_reg:x3; val_offset:79341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79341*FLEN/8, x4, x1, x2) - -inst_26448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xef00000; valaddr_reg:x3; val_offset:79344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79344*FLEN/8, x4, x1, x2) - -inst_26449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xef80000; valaddr_reg:x3; val_offset:79347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79347*FLEN/8, x4, x1, x2) - -inst_26450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefc0000; valaddr_reg:x3; val_offset:79350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79350*FLEN/8, x4, x1, x2) - -inst_26451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefe0000; valaddr_reg:x3; val_offset:79353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79353*FLEN/8, x4, x1, x2) - -inst_26452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeff0000; valaddr_reg:x3; val_offset:79356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79356*FLEN/8, x4, x1, x2) - -inst_26453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeff8000; valaddr_reg:x3; val_offset:79359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79359*FLEN/8, x4, x1, x2) - -inst_26454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeffc000; valaddr_reg:x3; val_offset:79362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79362*FLEN/8, x4, x1, x2) - -inst_26455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeffe000; valaddr_reg:x3; val_offset:79365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79365*FLEN/8, x4, x1, x2) - -inst_26456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefff000; valaddr_reg:x3; val_offset:79368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79368*FLEN/8, x4, x1, x2) - -inst_26457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefff800; valaddr_reg:x3; val_offset:79371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79371*FLEN/8, x4, x1, x2) - -inst_26458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefffc00; valaddr_reg:x3; val_offset:79374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79374*FLEN/8, x4, x1, x2) - -inst_26459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefffe00; valaddr_reg:x3; val_offset:79377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79377*FLEN/8, x4, x1, x2) - -inst_26460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeffff00; valaddr_reg:x3; val_offset:79380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79380*FLEN/8, x4, x1, x2) - -inst_26461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeffff80; valaddr_reg:x3; val_offset:79383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79383*FLEN/8, x4, x1, x2) - -inst_26462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeffffc0; valaddr_reg:x3; val_offset:79386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79386*FLEN/8, x4, x1, x2) - -inst_26463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeffffe0; valaddr_reg:x3; val_offset:79389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79389*FLEN/8, x4, x1, x2) - -inst_26464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefffff0; valaddr_reg:x3; val_offset:79392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79392*FLEN/8, x4, x1, x2) - -inst_26465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefffff8; valaddr_reg:x3; val_offset:79395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79395*FLEN/8, x4, x1, x2) - -inst_26466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefffffc; valaddr_reg:x3; val_offset:79398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79398*FLEN/8, x4, x1, x2) - -inst_26467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xefffffe; valaddr_reg:x3; val_offset:79401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79401*FLEN/8, x4, x1, x2) - -inst_26468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; -op3val:0xeffffff; valaddr_reg:x3; val_offset:79404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79404*FLEN/8, x4, x1, x2) - -inst_26469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23000000; valaddr_reg:x3; val_offset:79407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79407*FLEN/8, x4, x1, x2) - -inst_26470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23000001; valaddr_reg:x3; val_offset:79410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79410*FLEN/8, x4, x1, x2) - -inst_26471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23000003; valaddr_reg:x3; val_offset:79413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79413*FLEN/8, x4, x1, x2) - -inst_26472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23000007; valaddr_reg:x3; val_offset:79416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79416*FLEN/8, x4, x1, x2) - -inst_26473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x2300000f; valaddr_reg:x3; val_offset:79419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79419*FLEN/8, x4, x1, x2) - -inst_26474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x2300001f; valaddr_reg:x3; val_offset:79422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79422*FLEN/8, x4, x1, x2) - -inst_26475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x2300003f; valaddr_reg:x3; val_offset:79425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79425*FLEN/8, x4, x1, x2) - -inst_26476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x2300007f; valaddr_reg:x3; val_offset:79428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79428*FLEN/8, x4, x1, x2) - -inst_26477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x230000ff; valaddr_reg:x3; val_offset:79431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79431*FLEN/8, x4, x1, x2) - -inst_26478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x230001ff; valaddr_reg:x3; val_offset:79434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79434*FLEN/8, x4, x1, x2) - -inst_26479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x230003ff; valaddr_reg:x3; val_offset:79437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79437*FLEN/8, x4, x1, x2) - -inst_26480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x230007ff; valaddr_reg:x3; val_offset:79440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79440*FLEN/8, x4, x1, x2) - -inst_26481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23000fff; valaddr_reg:x3; val_offset:79443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79443*FLEN/8, x4, x1, x2) - -inst_26482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23001fff; valaddr_reg:x3; val_offset:79446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79446*FLEN/8, x4, x1, x2) - -inst_26483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23003fff; valaddr_reg:x3; val_offset:79449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79449*FLEN/8, x4, x1, x2) - -inst_26484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23007fff; valaddr_reg:x3; val_offset:79452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79452*FLEN/8, x4, x1, x2) - -inst_26485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x2300ffff; valaddr_reg:x3; val_offset:79455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79455*FLEN/8, x4, x1, x2) - -inst_26486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x2301ffff; valaddr_reg:x3; val_offset:79458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79458*FLEN/8, x4, x1, x2) - -inst_26487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x2303ffff; valaddr_reg:x3; val_offset:79461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79461*FLEN/8, x4, x1, x2) - -inst_26488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x2307ffff; valaddr_reg:x3; val_offset:79464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79464*FLEN/8, x4, x1, x2) - -inst_26489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x230fffff; valaddr_reg:x3; val_offset:79467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79467*FLEN/8, x4, x1, x2) - -inst_26490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x231fffff; valaddr_reg:x3; val_offset:79470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79470*FLEN/8, x4, x1, x2) - -inst_26491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x233fffff; valaddr_reg:x3; val_offset:79473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79473*FLEN/8, x4, x1, x2) - -inst_26492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23400000; valaddr_reg:x3; val_offset:79476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79476*FLEN/8, x4, x1, x2) - -inst_26493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23600000; valaddr_reg:x3; val_offset:79479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79479*FLEN/8, x4, x1, x2) - -inst_26494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23700000; valaddr_reg:x3; val_offset:79482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79482*FLEN/8, x4, x1, x2) - -inst_26495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x23780000; valaddr_reg:x3; val_offset:79485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79485*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_208) - -inst_26496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237c0000; valaddr_reg:x3; val_offset:79488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79488*FLEN/8, x4, x1, x2) - -inst_26497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237e0000; valaddr_reg:x3; val_offset:79491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79491*FLEN/8, x4, x1, x2) - -inst_26498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237f0000; valaddr_reg:x3; val_offset:79494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79494*FLEN/8, x4, x1, x2) - -inst_26499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237f8000; valaddr_reg:x3; val_offset:79497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79497*FLEN/8, x4, x1, x2) - -inst_26500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237fc000; valaddr_reg:x3; val_offset:79500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79500*FLEN/8, x4, x1, x2) - -inst_26501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237fe000; valaddr_reg:x3; val_offset:79503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79503*FLEN/8, x4, x1, x2) - -inst_26502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237ff000; valaddr_reg:x3; val_offset:79506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79506*FLEN/8, x4, x1, x2) - -inst_26503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237ff800; valaddr_reg:x3; val_offset:79509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79509*FLEN/8, x4, x1, x2) - -inst_26504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237ffc00; valaddr_reg:x3; val_offset:79512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79512*FLEN/8, x4, x1, x2) - -inst_26505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237ffe00; valaddr_reg:x3; val_offset:79515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79515*FLEN/8, x4, x1, x2) - -inst_26506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237fff00; valaddr_reg:x3; val_offset:79518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79518*FLEN/8, x4, x1, x2) - -inst_26507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237fff80; valaddr_reg:x3; val_offset:79521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79521*FLEN/8, x4, x1, x2) - -inst_26508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237fffc0; valaddr_reg:x3; val_offset:79524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79524*FLEN/8, x4, x1, x2) - -inst_26509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237fffe0; valaddr_reg:x3; val_offset:79527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79527*FLEN/8, x4, x1, x2) - -inst_26510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237ffff0; valaddr_reg:x3; val_offset:79530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79530*FLEN/8, x4, x1, x2) - -inst_26511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237ffff8; valaddr_reg:x3; val_offset:79533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79533*FLEN/8, x4, x1, x2) - -inst_26512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237ffffc; valaddr_reg:x3; val_offset:79536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79536*FLEN/8, x4, x1, x2) - -inst_26513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237ffffe; valaddr_reg:x3; val_offset:79539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79539*FLEN/8, x4, x1, x2) - -inst_26514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x237fffff; valaddr_reg:x3; val_offset:79542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79542*FLEN/8, x4, x1, x2) - -inst_26515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3f800001; valaddr_reg:x3; val_offset:79545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79545*FLEN/8, x4, x1, x2) - -inst_26516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3f800003; valaddr_reg:x3; val_offset:79548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79548*FLEN/8, x4, x1, x2) - -inst_26517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3f800007; valaddr_reg:x3; val_offset:79551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79551*FLEN/8, x4, x1, x2) - -inst_26518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3f999999; valaddr_reg:x3; val_offset:79554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79554*FLEN/8, x4, x1, x2) - -inst_26519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:79557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79557*FLEN/8, x4, x1, x2) - -inst_26520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:79560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79560*FLEN/8, x4, x1, x2) - -inst_26521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:79563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79563*FLEN/8, x4, x1, x2) - -inst_26522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:79566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79566*FLEN/8, x4, x1, x2) - -inst_26523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:79569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79569*FLEN/8, x4, x1, x2) - -inst_26524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:79572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79572*FLEN/8, x4, x1, x2) - -inst_26525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:79575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79575*FLEN/8, x4, x1, x2) - -inst_26526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:79578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79578*FLEN/8, x4, x1, x2) - -inst_26527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:79581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79581*FLEN/8, x4, x1, x2) - -inst_26528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:79584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79584*FLEN/8, x4, x1, x2) - -inst_26529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:79587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79587*FLEN/8, x4, x1, x2) - -inst_26530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:79590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79590*FLEN/8, x4, x1, x2) - -inst_26531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3000000; valaddr_reg:x3; val_offset:79593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79593*FLEN/8, x4, x1, x2) - -inst_26532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3000001; valaddr_reg:x3; val_offset:79596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79596*FLEN/8, x4, x1, x2) - -inst_26533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3000003; valaddr_reg:x3; val_offset:79599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79599*FLEN/8, x4, x1, x2) - -inst_26534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3000007; valaddr_reg:x3; val_offset:79602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79602*FLEN/8, x4, x1, x2) - -inst_26535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe300000f; valaddr_reg:x3; val_offset:79605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79605*FLEN/8, x4, x1, x2) - -inst_26536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe300001f; valaddr_reg:x3; val_offset:79608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79608*FLEN/8, x4, x1, x2) - -inst_26537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe300003f; valaddr_reg:x3; val_offset:79611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79611*FLEN/8, x4, x1, x2) - -inst_26538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe300007f; valaddr_reg:x3; val_offset:79614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79614*FLEN/8, x4, x1, x2) - -inst_26539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe30000ff; valaddr_reg:x3; val_offset:79617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79617*FLEN/8, x4, x1, x2) - -inst_26540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe30001ff; valaddr_reg:x3; val_offset:79620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79620*FLEN/8, x4, x1, x2) - -inst_26541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe30003ff; valaddr_reg:x3; val_offset:79623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79623*FLEN/8, x4, x1, x2) - -inst_26542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe30007ff; valaddr_reg:x3; val_offset:79626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79626*FLEN/8, x4, x1, x2) - -inst_26543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3000fff; valaddr_reg:x3; val_offset:79629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79629*FLEN/8, x4, x1, x2) - -inst_26544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3001fff; valaddr_reg:x3; val_offset:79632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79632*FLEN/8, x4, x1, x2) - -inst_26545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3003fff; valaddr_reg:x3; val_offset:79635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79635*FLEN/8, x4, x1, x2) - -inst_26546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3007fff; valaddr_reg:x3; val_offset:79638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79638*FLEN/8, x4, x1, x2) - -inst_26547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe300ffff; valaddr_reg:x3; val_offset:79641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79641*FLEN/8, x4, x1, x2) - -inst_26548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe301ffff; valaddr_reg:x3; val_offset:79644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79644*FLEN/8, x4, x1, x2) - -inst_26549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe303ffff; valaddr_reg:x3; val_offset:79647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79647*FLEN/8, x4, x1, x2) - -inst_26550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe307ffff; valaddr_reg:x3; val_offset:79650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79650*FLEN/8, x4, x1, x2) - -inst_26551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe30fffff; valaddr_reg:x3; val_offset:79653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79653*FLEN/8, x4, x1, x2) - -inst_26552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe31fffff; valaddr_reg:x3; val_offset:79656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79656*FLEN/8, x4, x1, x2) - -inst_26553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe33fffff; valaddr_reg:x3; val_offset:79659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79659*FLEN/8, x4, x1, x2) - -inst_26554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3400000; valaddr_reg:x3; val_offset:79662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79662*FLEN/8, x4, x1, x2) - -inst_26555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3600000; valaddr_reg:x3; val_offset:79665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79665*FLEN/8, x4, x1, x2) - -inst_26556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3700000; valaddr_reg:x3; val_offset:79668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79668*FLEN/8, x4, x1, x2) - -inst_26557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe3780000; valaddr_reg:x3; val_offset:79671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79671*FLEN/8, x4, x1, x2) - -inst_26558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37c0000; valaddr_reg:x3; val_offset:79674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79674*FLEN/8, x4, x1, x2) - -inst_26559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37e0000; valaddr_reg:x3; val_offset:79677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79677*FLEN/8, x4, x1, x2) - -inst_26560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37f0000; valaddr_reg:x3; val_offset:79680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79680*FLEN/8, x4, x1, x2) - -inst_26561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37f8000; valaddr_reg:x3; val_offset:79683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79683*FLEN/8, x4, x1, x2) - -inst_26562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37fc000; valaddr_reg:x3; val_offset:79686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79686*FLEN/8, x4, x1, x2) - -inst_26563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37fe000; valaddr_reg:x3; val_offset:79689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79689*FLEN/8, x4, x1, x2) - -inst_26564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37ff000; valaddr_reg:x3; val_offset:79692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79692*FLEN/8, x4, x1, x2) - -inst_26565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37ff800; valaddr_reg:x3; val_offset:79695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79695*FLEN/8, x4, x1, x2) - -inst_26566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37ffc00; valaddr_reg:x3; val_offset:79698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79698*FLEN/8, x4, x1, x2) - -inst_26567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37ffe00; valaddr_reg:x3; val_offset:79701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79701*FLEN/8, x4, x1, x2) - -inst_26568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37fff00; valaddr_reg:x3; val_offset:79704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79704*FLEN/8, x4, x1, x2) - -inst_26569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37fff80; valaddr_reg:x3; val_offset:79707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79707*FLEN/8, x4, x1, x2) - -inst_26570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37fffc0; valaddr_reg:x3; val_offset:79710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79710*FLEN/8, x4, x1, x2) - -inst_26571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37fffe0; valaddr_reg:x3; val_offset:79713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79713*FLEN/8, x4, x1, x2) - -inst_26572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37ffff0; valaddr_reg:x3; val_offset:79716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79716*FLEN/8, x4, x1, x2) - -inst_26573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37ffff8; valaddr_reg:x3; val_offset:79719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79719*FLEN/8, x4, x1, x2) - -inst_26574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37ffffc; valaddr_reg:x3; val_offset:79722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79722*FLEN/8, x4, x1, x2) - -inst_26575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37ffffe; valaddr_reg:x3; val_offset:79725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79725*FLEN/8, x4, x1, x2) - -inst_26576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xe37fffff; valaddr_reg:x3; val_offset:79728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79728*FLEN/8, x4, x1, x2) - -inst_26577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff000001; valaddr_reg:x3; val_offset:79731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79731*FLEN/8, x4, x1, x2) - -inst_26578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff000003; valaddr_reg:x3; val_offset:79734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79734*FLEN/8, x4, x1, x2) - -inst_26579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff000007; valaddr_reg:x3; val_offset:79737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79737*FLEN/8, x4, x1, x2) - -inst_26580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff199999; valaddr_reg:x3; val_offset:79740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79740*FLEN/8, x4, x1, x2) - -inst_26581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff249249; valaddr_reg:x3; val_offset:79743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79743*FLEN/8, x4, x1, x2) - -inst_26582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff333333; valaddr_reg:x3; val_offset:79746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79746*FLEN/8, x4, x1, x2) - -inst_26583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:79749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79749*FLEN/8, x4, x1, x2) - -inst_26584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:79752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79752*FLEN/8, x4, x1, x2) - -inst_26585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff444444; valaddr_reg:x3; val_offset:79755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79755*FLEN/8, x4, x1, x2) - -inst_26586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:79758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79758*FLEN/8, x4, x1, x2) - -inst_26587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:79761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79761*FLEN/8, x4, x1, x2) - -inst_26588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff666666; valaddr_reg:x3; val_offset:79764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79764*FLEN/8, x4, x1, x2) - -inst_26589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:79767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79767*FLEN/8, x4, x1, x2) - -inst_26590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:79770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79770*FLEN/8, x4, x1, x2) - -inst_26591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:79773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79773*FLEN/8, x4, x1, x2) - -inst_26592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:79776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79776*FLEN/8, x4, x1, x2) - -inst_26593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb800000; valaddr_reg:x3; val_offset:79779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79779*FLEN/8, x4, x1, x2) - -inst_26594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb800001; valaddr_reg:x3; val_offset:79782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79782*FLEN/8, x4, x1, x2) - -inst_26595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb800003; valaddr_reg:x3; val_offset:79785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79785*FLEN/8, x4, x1, x2) - -inst_26596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb800007; valaddr_reg:x3; val_offset:79788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79788*FLEN/8, x4, x1, x2) - -inst_26597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb80000f; valaddr_reg:x3; val_offset:79791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79791*FLEN/8, x4, x1, x2) - -inst_26598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb80001f; valaddr_reg:x3; val_offset:79794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79794*FLEN/8, x4, x1, x2) - -inst_26599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb80003f; valaddr_reg:x3; val_offset:79797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79797*FLEN/8, x4, x1, x2) - -inst_26600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb80007f; valaddr_reg:x3; val_offset:79800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79800*FLEN/8, x4, x1, x2) - -inst_26601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb8000ff; valaddr_reg:x3; val_offset:79803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79803*FLEN/8, x4, x1, x2) - -inst_26602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb8001ff; valaddr_reg:x3; val_offset:79806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79806*FLEN/8, x4, x1, x2) - -inst_26603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb8003ff; valaddr_reg:x3; val_offset:79809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79809*FLEN/8, x4, x1, x2) - -inst_26604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb8007ff; valaddr_reg:x3; val_offset:79812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79812*FLEN/8, x4, x1, x2) - -inst_26605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb800fff; valaddr_reg:x3; val_offset:79815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79815*FLEN/8, x4, x1, x2) - -inst_26606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb801fff; valaddr_reg:x3; val_offset:79818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79818*FLEN/8, x4, x1, x2) - -inst_26607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb803fff; valaddr_reg:x3; val_offset:79821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79821*FLEN/8, x4, x1, x2) - -inst_26608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb807fff; valaddr_reg:x3; val_offset:79824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79824*FLEN/8, x4, x1, x2) - -inst_26609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb80ffff; valaddr_reg:x3; val_offset:79827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79827*FLEN/8, x4, x1, x2) - -inst_26610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb81ffff; valaddr_reg:x3; val_offset:79830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79830*FLEN/8, x4, x1, x2) - -inst_26611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb83ffff; valaddr_reg:x3; val_offset:79833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79833*FLEN/8, x4, x1, x2) - -inst_26612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb87ffff; valaddr_reg:x3; val_offset:79836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79836*FLEN/8, x4, x1, x2) - -inst_26613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb8fffff; valaddr_reg:x3; val_offset:79839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79839*FLEN/8, x4, x1, x2) - -inst_26614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbb9fffff; valaddr_reg:x3; val_offset:79842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79842*FLEN/8, x4, x1, x2) - -inst_26615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbbfffff; valaddr_reg:x3; val_offset:79845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79845*FLEN/8, x4, x1, x2) - -inst_26616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbc00000; valaddr_reg:x3; val_offset:79848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79848*FLEN/8, x4, x1, x2) - -inst_26617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbe00000; valaddr_reg:x3; val_offset:79851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79851*FLEN/8, x4, x1, x2) - -inst_26618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbf00000; valaddr_reg:x3; val_offset:79854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79854*FLEN/8, x4, x1, x2) - -inst_26619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbf80000; valaddr_reg:x3; val_offset:79857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79857*FLEN/8, x4, x1, x2) - -inst_26620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfc0000; valaddr_reg:x3; val_offset:79860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79860*FLEN/8, x4, x1, x2) - -inst_26621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfe0000; valaddr_reg:x3; val_offset:79863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79863*FLEN/8, x4, x1, x2) - -inst_26622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbff0000; valaddr_reg:x3; val_offset:79866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79866*FLEN/8, x4, x1, x2) - -inst_26623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbff8000; valaddr_reg:x3; val_offset:79869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79869*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_209) - -inst_26624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbffc000; valaddr_reg:x3; val_offset:79872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79872*FLEN/8, x4, x1, x2) - -inst_26625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbffe000; valaddr_reg:x3; val_offset:79875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79875*FLEN/8, x4, x1, x2) - -inst_26626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfff000; valaddr_reg:x3; val_offset:79878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79878*FLEN/8, x4, x1, x2) - -inst_26627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfff800; valaddr_reg:x3; val_offset:79881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79881*FLEN/8, x4, x1, x2) - -inst_26628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfffc00; valaddr_reg:x3; val_offset:79884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79884*FLEN/8, x4, x1, x2) - -inst_26629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfffe00; valaddr_reg:x3; val_offset:79887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79887*FLEN/8, x4, x1, x2) - -inst_26630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbffff00; valaddr_reg:x3; val_offset:79890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79890*FLEN/8, x4, x1, x2) - -inst_26631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbffff80; valaddr_reg:x3; val_offset:79893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79893*FLEN/8, x4, x1, x2) - -inst_26632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbffffc0; valaddr_reg:x3; val_offset:79896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79896*FLEN/8, x4, x1, x2) - -inst_26633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbffffe0; valaddr_reg:x3; val_offset:79899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79899*FLEN/8, x4, x1, x2) - -inst_26634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfffff0; valaddr_reg:x3; val_offset:79902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79902*FLEN/8, x4, x1, x2) - -inst_26635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfffff8; valaddr_reg:x3; val_offset:79905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79905*FLEN/8, x4, x1, x2) - -inst_26636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfffffc; valaddr_reg:x3; val_offset:79908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79908*FLEN/8, x4, x1, x2) - -inst_26637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbfffffe; valaddr_reg:x3; val_offset:79911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79911*FLEN/8, x4, x1, x2) - -inst_26638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbbffffff; valaddr_reg:x3; val_offset:79914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79914*FLEN/8, x4, x1, x2) - -inst_26639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbf800001; valaddr_reg:x3; val_offset:79917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79917*FLEN/8, x4, x1, x2) - -inst_26640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbf800003; valaddr_reg:x3; val_offset:79920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79920*FLEN/8, x4, x1, x2) - -inst_26641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbf800007; valaddr_reg:x3; val_offset:79923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79923*FLEN/8, x4, x1, x2) - -inst_26642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbf999999; valaddr_reg:x3; val_offset:79926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79926*FLEN/8, x4, x1, x2) - -inst_26643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:79929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79929*FLEN/8, x4, x1, x2) - -inst_26644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:79932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79932*FLEN/8, x4, x1, x2) - -inst_26645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:79935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79935*FLEN/8, x4, x1, x2) - -inst_26646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:79938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79938*FLEN/8, x4, x1, x2) - -inst_26647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:79941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79941*FLEN/8, x4, x1, x2) - -inst_26648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:79944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79944*FLEN/8, x4, x1, x2) - -inst_26649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:79947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79947*FLEN/8, x4, x1, x2) - -inst_26650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:79950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79950*FLEN/8, x4, x1, x2) - -inst_26651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:79953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79953*FLEN/8, x4, x1, x2) - -inst_26652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:79956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79956*FLEN/8, x4, x1, x2) - -inst_26653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:79959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79959*FLEN/8, x4, x1, x2) - -inst_26654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:79962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79962*FLEN/8, x4, x1, x2) - -inst_26655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69800000; valaddr_reg:x3; val_offset:79965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79965*FLEN/8, x4, x1, x2) - -inst_26656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69800001; valaddr_reg:x3; val_offset:79968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79968*FLEN/8, x4, x1, x2) - -inst_26657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69800003; valaddr_reg:x3; val_offset:79971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79971*FLEN/8, x4, x1, x2) - -inst_26658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69800007; valaddr_reg:x3; val_offset:79974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79974*FLEN/8, x4, x1, x2) - -inst_26659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x6980000f; valaddr_reg:x3; val_offset:79977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79977*FLEN/8, x4, x1, x2) - -inst_26660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x6980001f; valaddr_reg:x3; val_offset:79980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79980*FLEN/8, x4, x1, x2) - -inst_26661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x6980003f; valaddr_reg:x3; val_offset:79983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79983*FLEN/8, x4, x1, x2) - -inst_26662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x6980007f; valaddr_reg:x3; val_offset:79986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79986*FLEN/8, x4, x1, x2) - -inst_26663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x698000ff; valaddr_reg:x3; val_offset:79989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79989*FLEN/8, x4, x1, x2) - -inst_26664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x698001ff; valaddr_reg:x3; val_offset:79992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79992*FLEN/8, x4, x1, x2) - -inst_26665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x698003ff; valaddr_reg:x3; val_offset:79995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79995*FLEN/8, x4, x1, x2) - -inst_26666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x698007ff; valaddr_reg:x3; val_offset:79998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79998*FLEN/8, x4, x1, x2) - -inst_26667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69800fff; valaddr_reg:x3; val_offset:80001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80001*FLEN/8, x4, x1, x2) - -inst_26668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69801fff; valaddr_reg:x3; val_offset:80004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80004*FLEN/8, x4, x1, x2) - -inst_26669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69803fff; valaddr_reg:x3; val_offset:80007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80007*FLEN/8, x4, x1, x2) - -inst_26670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69807fff; valaddr_reg:x3; val_offset:80010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80010*FLEN/8, x4, x1, x2) - -inst_26671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x6980ffff; valaddr_reg:x3; val_offset:80013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80013*FLEN/8, x4, x1, x2) - -inst_26672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x6981ffff; valaddr_reg:x3; val_offset:80016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80016*FLEN/8, x4, x1, x2) - -inst_26673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x6983ffff; valaddr_reg:x3; val_offset:80019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80019*FLEN/8, x4, x1, x2) - -inst_26674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x6987ffff; valaddr_reg:x3; val_offset:80022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80022*FLEN/8, x4, x1, x2) - -inst_26675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x698fffff; valaddr_reg:x3; val_offset:80025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80025*FLEN/8, x4, x1, x2) - -inst_26676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x699fffff; valaddr_reg:x3; val_offset:80028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80028*FLEN/8, x4, x1, x2) - -inst_26677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69bfffff; valaddr_reg:x3; val_offset:80031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80031*FLEN/8, x4, x1, x2) - -inst_26678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69c00000; valaddr_reg:x3; val_offset:80034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80034*FLEN/8, x4, x1, x2) - -inst_26679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69e00000; valaddr_reg:x3; val_offset:80037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80037*FLEN/8, x4, x1, x2) - -inst_26680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69f00000; valaddr_reg:x3; val_offset:80040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80040*FLEN/8, x4, x1, x2) - -inst_26681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69f80000; valaddr_reg:x3; val_offset:80043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80043*FLEN/8, x4, x1, x2) - -inst_26682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fc0000; valaddr_reg:x3; val_offset:80046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80046*FLEN/8, x4, x1, x2) - -inst_26683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fe0000; valaddr_reg:x3; val_offset:80049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80049*FLEN/8, x4, x1, x2) - -inst_26684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ff0000; valaddr_reg:x3; val_offset:80052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80052*FLEN/8, x4, x1, x2) - -inst_26685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ff8000; valaddr_reg:x3; val_offset:80055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80055*FLEN/8, x4, x1, x2) - -inst_26686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ffc000; valaddr_reg:x3; val_offset:80058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80058*FLEN/8, x4, x1, x2) - -inst_26687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ffe000; valaddr_reg:x3; val_offset:80061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80061*FLEN/8, x4, x1, x2) - -inst_26688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fff000; valaddr_reg:x3; val_offset:80064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80064*FLEN/8, x4, x1, x2) - -inst_26689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fff800; valaddr_reg:x3; val_offset:80067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80067*FLEN/8, x4, x1, x2) - -inst_26690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fffc00; valaddr_reg:x3; val_offset:80070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80070*FLEN/8, x4, x1, x2) - -inst_26691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fffe00; valaddr_reg:x3; val_offset:80073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80073*FLEN/8, x4, x1, x2) - -inst_26692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ffff00; valaddr_reg:x3; val_offset:80076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80076*FLEN/8, x4, x1, x2) - -inst_26693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ffff80; valaddr_reg:x3; val_offset:80079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80079*FLEN/8, x4, x1, x2) - -inst_26694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ffffc0; valaddr_reg:x3; val_offset:80082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80082*FLEN/8, x4, x1, x2) - -inst_26695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ffffe0; valaddr_reg:x3; val_offset:80085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80085*FLEN/8, x4, x1, x2) - -inst_26696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fffff0; valaddr_reg:x3; val_offset:80088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80088*FLEN/8, x4, x1, x2) - -inst_26697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fffff8; valaddr_reg:x3; val_offset:80091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80091*FLEN/8, x4, x1, x2) - -inst_26698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fffffc; valaddr_reg:x3; val_offset:80094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80094*FLEN/8, x4, x1, x2) - -inst_26699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69fffffe; valaddr_reg:x3; val_offset:80097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80097*FLEN/8, x4, x1, x2) - -inst_26700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x69ffffff; valaddr_reg:x3; val_offset:80100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80100*FLEN/8, x4, x1, x2) - -inst_26701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f000001; valaddr_reg:x3; val_offset:80103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80103*FLEN/8, x4, x1, x2) - -inst_26702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f000003; valaddr_reg:x3; val_offset:80106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80106*FLEN/8, x4, x1, x2) - -inst_26703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f000007; valaddr_reg:x3; val_offset:80109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80109*FLEN/8, x4, x1, x2) - -inst_26704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f199999; valaddr_reg:x3; val_offset:80112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80112*FLEN/8, x4, x1, x2) - -inst_26705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f249249; valaddr_reg:x3; val_offset:80115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80115*FLEN/8, x4, x1, x2) - -inst_26706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f333333; valaddr_reg:x3; val_offset:80118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80118*FLEN/8, x4, x1, x2) - -inst_26707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:80121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80121*FLEN/8, x4, x1, x2) - -inst_26708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:80124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80124*FLEN/8, x4, x1, x2) - -inst_26709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f444444; valaddr_reg:x3; val_offset:80127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80127*FLEN/8, x4, x1, x2) - -inst_26710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:80130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80130*FLEN/8, x4, x1, x2) - -inst_26711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:80133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80133*FLEN/8, x4, x1, x2) - -inst_26712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f666666; valaddr_reg:x3; val_offset:80136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80136*FLEN/8, x4, x1, x2) - -inst_26713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:80139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80139*FLEN/8, x4, x1, x2) - -inst_26714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:80142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80142*FLEN/8, x4, x1, x2) - -inst_26715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:80145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80145*FLEN/8, x4, x1, x2) - -inst_26716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:80148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80148*FLEN/8, x4, x1, x2) - -inst_26717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3f800001; valaddr_reg:x3; val_offset:80151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80151*FLEN/8, x4, x1, x2) - -inst_26718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3f800003; valaddr_reg:x3; val_offset:80154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80154*FLEN/8, x4, x1, x2) - -inst_26719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3f800007; valaddr_reg:x3; val_offset:80157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80157*FLEN/8, x4, x1, x2) - -inst_26720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3f999999; valaddr_reg:x3; val_offset:80160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80160*FLEN/8, x4, x1, x2) - -inst_26721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:80163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80163*FLEN/8, x4, x1, x2) - -inst_26722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:80166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80166*FLEN/8, x4, x1, x2) - -inst_26723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:80169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80169*FLEN/8, x4, x1, x2) - -inst_26724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:80172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80172*FLEN/8, x4, x1, x2) - -inst_26725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:80175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80175*FLEN/8, x4, x1, x2) - -inst_26726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:80178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80178*FLEN/8, x4, x1, x2) - -inst_26727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:80181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80181*FLEN/8, x4, x1, x2) - -inst_26728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:80184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80184*FLEN/8, x4, x1, x2) - -inst_26729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:80187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80187*FLEN/8, x4, x1, x2) - -inst_26730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:80190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80190*FLEN/8, x4, x1, x2) - -inst_26731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:80193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80193*FLEN/8, x4, x1, x2) - -inst_26732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:80196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80196*FLEN/8, x4, x1, x2) - -inst_26733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e000000; valaddr_reg:x3; val_offset:80199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80199*FLEN/8, x4, x1, x2) - -inst_26734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e000001; valaddr_reg:x3; val_offset:80202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80202*FLEN/8, x4, x1, x2) - -inst_26735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e000003; valaddr_reg:x3; val_offset:80205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80205*FLEN/8, x4, x1, x2) - -inst_26736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e000007; valaddr_reg:x3; val_offset:80208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80208*FLEN/8, x4, x1, x2) - -inst_26737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e00000f; valaddr_reg:x3; val_offset:80211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80211*FLEN/8, x4, x1, x2) - -inst_26738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e00001f; valaddr_reg:x3; val_offset:80214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80214*FLEN/8, x4, x1, x2) - -inst_26739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e00003f; valaddr_reg:x3; val_offset:80217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80217*FLEN/8, x4, x1, x2) - -inst_26740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e00007f; valaddr_reg:x3; val_offset:80220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80220*FLEN/8, x4, x1, x2) - -inst_26741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e0000ff; valaddr_reg:x3; val_offset:80223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80223*FLEN/8, x4, x1, x2) - -inst_26742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e0001ff; valaddr_reg:x3; val_offset:80226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80226*FLEN/8, x4, x1, x2) - -inst_26743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e0003ff; valaddr_reg:x3; val_offset:80229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80229*FLEN/8, x4, x1, x2) - -inst_26744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e0007ff; valaddr_reg:x3; val_offset:80232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80232*FLEN/8, x4, x1, x2) - -inst_26745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e000fff; valaddr_reg:x3; val_offset:80235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80235*FLEN/8, x4, x1, x2) - -inst_26746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e001fff; valaddr_reg:x3; val_offset:80238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80238*FLEN/8, x4, x1, x2) - -inst_26747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e003fff; valaddr_reg:x3; val_offset:80241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80241*FLEN/8, x4, x1, x2) - -inst_26748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e007fff; valaddr_reg:x3; val_offset:80244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80244*FLEN/8, x4, x1, x2) - -inst_26749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e00ffff; valaddr_reg:x3; val_offset:80247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80247*FLEN/8, x4, x1, x2) - -inst_26750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e01ffff; valaddr_reg:x3; val_offset:80250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80250*FLEN/8, x4, x1, x2) - -inst_26751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e03ffff; valaddr_reg:x3; val_offset:80253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80253*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_210) - -inst_26752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e07ffff; valaddr_reg:x3; val_offset:80256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80256*FLEN/8, x4, x1, x2) - -inst_26753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e0fffff; valaddr_reg:x3; val_offset:80259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80259*FLEN/8, x4, x1, x2) - -inst_26754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e1fffff; valaddr_reg:x3; val_offset:80262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80262*FLEN/8, x4, x1, x2) - -inst_26755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e3fffff; valaddr_reg:x3; val_offset:80265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80265*FLEN/8, x4, x1, x2) - -inst_26756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e400000; valaddr_reg:x3; val_offset:80268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80268*FLEN/8, x4, x1, x2) - -inst_26757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e600000; valaddr_reg:x3; val_offset:80271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80271*FLEN/8, x4, x1, x2) - -inst_26758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e700000; valaddr_reg:x3; val_offset:80274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80274*FLEN/8, x4, x1, x2) - -inst_26759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e780000; valaddr_reg:x3; val_offset:80277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80277*FLEN/8, x4, x1, x2) - -inst_26760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7c0000; valaddr_reg:x3; val_offset:80280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80280*FLEN/8, x4, x1, x2) - -inst_26761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7e0000; valaddr_reg:x3; val_offset:80283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80283*FLEN/8, x4, x1, x2) - -inst_26762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7f0000; valaddr_reg:x3; val_offset:80286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80286*FLEN/8, x4, x1, x2) - -inst_26763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7f8000; valaddr_reg:x3; val_offset:80289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80289*FLEN/8, x4, x1, x2) - -inst_26764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7fc000; valaddr_reg:x3; val_offset:80292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80292*FLEN/8, x4, x1, x2) - -inst_26765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7fe000; valaddr_reg:x3; val_offset:80295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80295*FLEN/8, x4, x1, x2) - -inst_26766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7ff000; valaddr_reg:x3; val_offset:80298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80298*FLEN/8, x4, x1, x2) - -inst_26767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7ff800; valaddr_reg:x3; val_offset:80301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80301*FLEN/8, x4, x1, x2) - -inst_26768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7ffc00; valaddr_reg:x3; val_offset:80304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80304*FLEN/8, x4, x1, x2) - -inst_26769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7ffe00; valaddr_reg:x3; val_offset:80307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80307*FLEN/8, x4, x1, x2) - -inst_26770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7fff00; valaddr_reg:x3; val_offset:80310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80310*FLEN/8, x4, x1, x2) - -inst_26771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7fff80; valaddr_reg:x3; val_offset:80313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80313*FLEN/8, x4, x1, x2) - -inst_26772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7fffc0; valaddr_reg:x3; val_offset:80316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80316*FLEN/8, x4, x1, x2) - -inst_26773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7fffe0; valaddr_reg:x3; val_offset:80319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80319*FLEN/8, x4, x1, x2) - -inst_26774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7ffff0; valaddr_reg:x3; val_offset:80322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80322*FLEN/8, x4, x1, x2) - -inst_26775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7ffff8; valaddr_reg:x3; val_offset:80325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80325*FLEN/8, x4, x1, x2) - -inst_26776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7ffffc; valaddr_reg:x3; val_offset:80328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80328*FLEN/8, x4, x1, x2) - -inst_26777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7ffffe; valaddr_reg:x3; val_offset:80331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80331*FLEN/8, x4, x1, x2) - -inst_26778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; -op3val:0x4e7fffff; valaddr_reg:x3; val_offset:80334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80334*FLEN/8, x4, x1, x2) - -inst_26779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62800000; valaddr_reg:x3; val_offset:80337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80337*FLEN/8, x4, x1, x2) - -inst_26780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62800001; valaddr_reg:x3; val_offset:80340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80340*FLEN/8, x4, x1, x2) - -inst_26781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62800003; valaddr_reg:x3; val_offset:80343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80343*FLEN/8, x4, x1, x2) - -inst_26782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62800007; valaddr_reg:x3; val_offset:80346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80346*FLEN/8, x4, x1, x2) - -inst_26783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x6280000f; valaddr_reg:x3; val_offset:80349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80349*FLEN/8, x4, x1, x2) - -inst_26784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x6280001f; valaddr_reg:x3; val_offset:80352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80352*FLEN/8, x4, x1, x2) - -inst_26785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x6280003f; valaddr_reg:x3; val_offset:80355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80355*FLEN/8, x4, x1, x2) - -inst_26786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x6280007f; valaddr_reg:x3; val_offset:80358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80358*FLEN/8, x4, x1, x2) - -inst_26787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x628000ff; valaddr_reg:x3; val_offset:80361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80361*FLEN/8, x4, x1, x2) - -inst_26788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x628001ff; valaddr_reg:x3; val_offset:80364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80364*FLEN/8, x4, x1, x2) - -inst_26789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x628003ff; valaddr_reg:x3; val_offset:80367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80367*FLEN/8, x4, x1, x2) - -inst_26790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x628007ff; valaddr_reg:x3; val_offset:80370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80370*FLEN/8, x4, x1, x2) - -inst_26791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62800fff; valaddr_reg:x3; val_offset:80373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80373*FLEN/8, x4, x1, x2) - -inst_26792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62801fff; valaddr_reg:x3; val_offset:80376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80376*FLEN/8, x4, x1, x2) - -inst_26793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62803fff; valaddr_reg:x3; val_offset:80379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80379*FLEN/8, x4, x1, x2) - -inst_26794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62807fff; valaddr_reg:x3; val_offset:80382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80382*FLEN/8, x4, x1, x2) - -inst_26795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x6280ffff; valaddr_reg:x3; val_offset:80385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80385*FLEN/8, x4, x1, x2) - -inst_26796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x6281ffff; valaddr_reg:x3; val_offset:80388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80388*FLEN/8, x4, x1, x2) - -inst_26797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x6283ffff; valaddr_reg:x3; val_offset:80391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80391*FLEN/8, x4, x1, x2) - -inst_26798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x6287ffff; valaddr_reg:x3; val_offset:80394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80394*FLEN/8, x4, x1, x2) - -inst_26799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x628fffff; valaddr_reg:x3; val_offset:80397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80397*FLEN/8, x4, x1, x2) - -inst_26800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x629fffff; valaddr_reg:x3; val_offset:80400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80400*FLEN/8, x4, x1, x2) - -inst_26801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62bfffff; valaddr_reg:x3; val_offset:80403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80403*FLEN/8, x4, x1, x2) - -inst_26802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62c00000; valaddr_reg:x3; val_offset:80406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80406*FLEN/8, x4, x1, x2) - -inst_26803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62e00000; valaddr_reg:x3; val_offset:80409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80409*FLEN/8, x4, x1, x2) - -inst_26804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62f00000; valaddr_reg:x3; val_offset:80412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80412*FLEN/8, x4, x1, x2) - -inst_26805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62f80000; valaddr_reg:x3; val_offset:80415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80415*FLEN/8, x4, x1, x2) - -inst_26806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fc0000; valaddr_reg:x3; val_offset:80418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80418*FLEN/8, x4, x1, x2) - -inst_26807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fe0000; valaddr_reg:x3; val_offset:80421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80421*FLEN/8, x4, x1, x2) - -inst_26808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ff0000; valaddr_reg:x3; val_offset:80424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80424*FLEN/8, x4, x1, x2) - -inst_26809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ff8000; valaddr_reg:x3; val_offset:80427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80427*FLEN/8, x4, x1, x2) - -inst_26810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ffc000; valaddr_reg:x3; val_offset:80430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80430*FLEN/8, x4, x1, x2) - -inst_26811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ffe000; valaddr_reg:x3; val_offset:80433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80433*FLEN/8, x4, x1, x2) - -inst_26812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fff000; valaddr_reg:x3; val_offset:80436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80436*FLEN/8, x4, x1, x2) - -inst_26813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fff800; valaddr_reg:x3; val_offset:80439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80439*FLEN/8, x4, x1, x2) - -inst_26814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fffc00; valaddr_reg:x3; val_offset:80442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80442*FLEN/8, x4, x1, x2) - -inst_26815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fffe00; valaddr_reg:x3; val_offset:80445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80445*FLEN/8, x4, x1, x2) - -inst_26816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ffff00; valaddr_reg:x3; val_offset:80448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80448*FLEN/8, x4, x1, x2) - -inst_26817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ffff80; valaddr_reg:x3; val_offset:80451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80451*FLEN/8, x4, x1, x2) - -inst_26818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ffffc0; valaddr_reg:x3; val_offset:80454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80454*FLEN/8, x4, x1, x2) - -inst_26819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ffffe0; valaddr_reg:x3; val_offset:80457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80457*FLEN/8, x4, x1, x2) - -inst_26820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fffff0; valaddr_reg:x3; val_offset:80460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80460*FLEN/8, x4, x1, x2) - -inst_26821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fffff8; valaddr_reg:x3; val_offset:80463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80463*FLEN/8, x4, x1, x2) - -inst_26822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fffffc; valaddr_reg:x3; val_offset:80466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80466*FLEN/8, x4, x1, x2) - -inst_26823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62fffffe; valaddr_reg:x3; val_offset:80469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80469*FLEN/8, x4, x1, x2) - -inst_26824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x62ffffff; valaddr_reg:x3; val_offset:80472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80472*FLEN/8, x4, x1, x2) - -inst_26825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f000001; valaddr_reg:x3; val_offset:80475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80475*FLEN/8, x4, x1, x2) - -inst_26826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f000003; valaddr_reg:x3; val_offset:80478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80478*FLEN/8, x4, x1, x2) - -inst_26827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f000007; valaddr_reg:x3; val_offset:80481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80481*FLEN/8, x4, x1, x2) - -inst_26828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f199999; valaddr_reg:x3; val_offset:80484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80484*FLEN/8, x4, x1, x2) - -inst_26829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f249249; valaddr_reg:x3; val_offset:80487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80487*FLEN/8, x4, x1, x2) - -inst_26830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f333333; valaddr_reg:x3; val_offset:80490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80490*FLEN/8, x4, x1, x2) - -inst_26831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:80493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80493*FLEN/8, x4, x1, x2) - -inst_26832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:80496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80496*FLEN/8, x4, x1, x2) - -inst_26833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f444444; valaddr_reg:x3; val_offset:80499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80499*FLEN/8, x4, x1, x2) - -inst_26834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:80502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80502*FLEN/8, x4, x1, x2) - -inst_26835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:80505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80505*FLEN/8, x4, x1, x2) - -inst_26836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f666666; valaddr_reg:x3; val_offset:80508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80508*FLEN/8, x4, x1, x2) - -inst_26837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:80511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80511*FLEN/8, x4, x1, x2) - -inst_26838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:80514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80514*FLEN/8, x4, x1, x2) - -inst_26839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:80517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80517*FLEN/8, x4, x1, x2) - -inst_26840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:80520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80520*FLEN/8, x4, x1, x2) - -inst_26841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3f800001; valaddr_reg:x3; val_offset:80523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80523*FLEN/8, x4, x1, x2) - -inst_26842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3f800003; valaddr_reg:x3; val_offset:80526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80526*FLEN/8, x4, x1, x2) - -inst_26843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3f800007; valaddr_reg:x3; val_offset:80529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80529*FLEN/8, x4, x1, x2) - -inst_26844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3f999999; valaddr_reg:x3; val_offset:80532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80532*FLEN/8, x4, x1, x2) - -inst_26845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:80535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80535*FLEN/8, x4, x1, x2) - -inst_26846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:80538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80538*FLEN/8, x4, x1, x2) - -inst_26847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:80541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80541*FLEN/8, x4, x1, x2) - -inst_26848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:80544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80544*FLEN/8, x4, x1, x2) - -inst_26849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:80547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80547*FLEN/8, x4, x1, x2) - -inst_26850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:80550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80550*FLEN/8, x4, x1, x2) - -inst_26851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:80553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80553*FLEN/8, x4, x1, x2) - -inst_26852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:80556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80556*FLEN/8, x4, x1, x2) - -inst_26853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:80559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80559*FLEN/8, x4, x1, x2) - -inst_26854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:80562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80562*FLEN/8, x4, x1, x2) - -inst_26855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:80565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80565*FLEN/8, x4, x1, x2) - -inst_26856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:80568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80568*FLEN/8, x4, x1, x2) - -inst_26857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44800000; valaddr_reg:x3; val_offset:80571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80571*FLEN/8, x4, x1, x2) - -inst_26858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44800001; valaddr_reg:x3; val_offset:80574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80574*FLEN/8, x4, x1, x2) - -inst_26859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44800003; valaddr_reg:x3; val_offset:80577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80577*FLEN/8, x4, x1, x2) - -inst_26860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44800007; valaddr_reg:x3; val_offset:80580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80580*FLEN/8, x4, x1, x2) - -inst_26861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x4480000f; valaddr_reg:x3; val_offset:80583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80583*FLEN/8, x4, x1, x2) - -inst_26862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x4480001f; valaddr_reg:x3; val_offset:80586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80586*FLEN/8, x4, x1, x2) - -inst_26863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x4480003f; valaddr_reg:x3; val_offset:80589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80589*FLEN/8, x4, x1, x2) - -inst_26864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x4480007f; valaddr_reg:x3; val_offset:80592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80592*FLEN/8, x4, x1, x2) - -inst_26865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x448000ff; valaddr_reg:x3; val_offset:80595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80595*FLEN/8, x4, x1, x2) - -inst_26866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x448001ff; valaddr_reg:x3; val_offset:80598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80598*FLEN/8, x4, x1, x2) - -inst_26867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x448003ff; valaddr_reg:x3; val_offset:80601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80601*FLEN/8, x4, x1, x2) - -inst_26868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x448007ff; valaddr_reg:x3; val_offset:80604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80604*FLEN/8, x4, x1, x2) - -inst_26869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44800fff; valaddr_reg:x3; val_offset:80607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80607*FLEN/8, x4, x1, x2) - -inst_26870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44801fff; valaddr_reg:x3; val_offset:80610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80610*FLEN/8, x4, x1, x2) - -inst_26871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44803fff; valaddr_reg:x3; val_offset:80613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80613*FLEN/8, x4, x1, x2) - -inst_26872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44807fff; valaddr_reg:x3; val_offset:80616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80616*FLEN/8, x4, x1, x2) - -inst_26873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x4480ffff; valaddr_reg:x3; val_offset:80619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80619*FLEN/8, x4, x1, x2) - -inst_26874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x4481ffff; valaddr_reg:x3; val_offset:80622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80622*FLEN/8, x4, x1, x2) - -inst_26875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x4483ffff; valaddr_reg:x3; val_offset:80625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80625*FLEN/8, x4, x1, x2) - -inst_26876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x4487ffff; valaddr_reg:x3; val_offset:80628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80628*FLEN/8, x4, x1, x2) - -inst_26877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x448fffff; valaddr_reg:x3; val_offset:80631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80631*FLEN/8, x4, x1, x2) - -inst_26878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x449fffff; valaddr_reg:x3; val_offset:80634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80634*FLEN/8, x4, x1, x2) - -inst_26879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44bfffff; valaddr_reg:x3; val_offset:80637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80637*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_211) - -inst_26880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44c00000; valaddr_reg:x3; val_offset:80640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80640*FLEN/8, x4, x1, x2) - -inst_26881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44e00000; valaddr_reg:x3; val_offset:80643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80643*FLEN/8, x4, x1, x2) - -inst_26882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44f00000; valaddr_reg:x3; val_offset:80646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80646*FLEN/8, x4, x1, x2) - -inst_26883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44f80000; valaddr_reg:x3; val_offset:80649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80649*FLEN/8, x4, x1, x2) - -inst_26884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fc0000; valaddr_reg:x3; val_offset:80652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80652*FLEN/8, x4, x1, x2) - -inst_26885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fe0000; valaddr_reg:x3; val_offset:80655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80655*FLEN/8, x4, x1, x2) - -inst_26886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ff0000; valaddr_reg:x3; val_offset:80658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80658*FLEN/8, x4, x1, x2) - -inst_26887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ff8000; valaddr_reg:x3; val_offset:80661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80661*FLEN/8, x4, x1, x2) - -inst_26888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ffc000; valaddr_reg:x3; val_offset:80664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80664*FLEN/8, x4, x1, x2) - -inst_26889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ffe000; valaddr_reg:x3; val_offset:80667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80667*FLEN/8, x4, x1, x2) - -inst_26890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fff000; valaddr_reg:x3; val_offset:80670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80670*FLEN/8, x4, x1, x2) - -inst_26891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fff800; valaddr_reg:x3; val_offset:80673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80673*FLEN/8, x4, x1, x2) - -inst_26892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fffc00; valaddr_reg:x3; val_offset:80676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80676*FLEN/8, x4, x1, x2) - -inst_26893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fffe00; valaddr_reg:x3; val_offset:80679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80679*FLEN/8, x4, x1, x2) - -inst_26894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ffff00; valaddr_reg:x3; val_offset:80682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80682*FLEN/8, x4, x1, x2) - -inst_26895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ffff80; valaddr_reg:x3; val_offset:80685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80685*FLEN/8, x4, x1, x2) - -inst_26896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ffffc0; valaddr_reg:x3; val_offset:80688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80688*FLEN/8, x4, x1, x2) - -inst_26897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ffffe0; valaddr_reg:x3; val_offset:80691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80691*FLEN/8, x4, x1, x2) - -inst_26898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fffff0; valaddr_reg:x3; val_offset:80694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80694*FLEN/8, x4, x1, x2) - -inst_26899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fffff8; valaddr_reg:x3; val_offset:80697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80697*FLEN/8, x4, x1, x2) - -inst_26900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fffffc; valaddr_reg:x3; val_offset:80700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80700*FLEN/8, x4, x1, x2) - -inst_26901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44fffffe; valaddr_reg:x3; val_offset:80703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80703*FLEN/8, x4, x1, x2) - -inst_26902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; -op3val:0x44ffffff; valaddr_reg:x3; val_offset:80706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80706*FLEN/8, x4, x1, x2) - -inst_26903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:80709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80709*FLEN/8, x4, x1, x2) - -inst_26904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:80712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80712*FLEN/8, x4, x1, x2) - -inst_26905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:80715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80715*FLEN/8, x4, x1, x2) - -inst_26906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:80718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80718*FLEN/8, x4, x1, x2) - -inst_26907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:80721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80721*FLEN/8, x4, x1, x2) - -inst_26908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:80724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80724*FLEN/8, x4, x1, x2) - -inst_26909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:80727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80727*FLEN/8, x4, x1, x2) - -inst_26910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:80730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80730*FLEN/8, x4, x1, x2) - -inst_26911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:80733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80733*FLEN/8, x4, x1, x2) - -inst_26912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:80736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80736*FLEN/8, x4, x1, x2) - -inst_26913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:80739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80739*FLEN/8, x4, x1, x2) - -inst_26914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:80742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80742*FLEN/8, x4, x1, x2) - -inst_26915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:80745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80745*FLEN/8, x4, x1, x2) - -inst_26916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:80748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80748*FLEN/8, x4, x1, x2) - -inst_26917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:80751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80751*FLEN/8, x4, x1, x2) - -inst_26918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:80754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80754*FLEN/8, x4, x1, x2) - -inst_26919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b800000; valaddr_reg:x3; val_offset:80757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80757*FLEN/8, x4, x1, x2) - -inst_26920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b800001; valaddr_reg:x3; val_offset:80760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80760*FLEN/8, x4, x1, x2) - -inst_26921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b800003; valaddr_reg:x3; val_offset:80763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80763*FLEN/8, x4, x1, x2) - -inst_26922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b800007; valaddr_reg:x3; val_offset:80766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80766*FLEN/8, x4, x1, x2) - -inst_26923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b80000f; valaddr_reg:x3; val_offset:80769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80769*FLEN/8, x4, x1, x2) - -inst_26924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b80001f; valaddr_reg:x3; val_offset:80772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80772*FLEN/8, x4, x1, x2) - -inst_26925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b80003f; valaddr_reg:x3; val_offset:80775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80775*FLEN/8, x4, x1, x2) - -inst_26926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b80007f; valaddr_reg:x3; val_offset:80778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80778*FLEN/8, x4, x1, x2) - -inst_26927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b8000ff; valaddr_reg:x3; val_offset:80781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80781*FLEN/8, x4, x1, x2) - -inst_26928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b8001ff; valaddr_reg:x3; val_offset:80784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80784*FLEN/8, x4, x1, x2) - -inst_26929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b8003ff; valaddr_reg:x3; val_offset:80787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80787*FLEN/8, x4, x1, x2) - -inst_26930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b8007ff; valaddr_reg:x3; val_offset:80790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80790*FLEN/8, x4, x1, x2) - -inst_26931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b800fff; valaddr_reg:x3; val_offset:80793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80793*FLEN/8, x4, x1, x2) - -inst_26932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b801fff; valaddr_reg:x3; val_offset:80796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80796*FLEN/8, x4, x1, x2) - -inst_26933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b803fff; valaddr_reg:x3; val_offset:80799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80799*FLEN/8, x4, x1, x2) - -inst_26934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b807fff; valaddr_reg:x3; val_offset:80802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80802*FLEN/8, x4, x1, x2) - -inst_26935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b80ffff; valaddr_reg:x3; val_offset:80805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80805*FLEN/8, x4, x1, x2) - -inst_26936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b81ffff; valaddr_reg:x3; val_offset:80808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80808*FLEN/8, x4, x1, x2) - -inst_26937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b83ffff; valaddr_reg:x3; val_offset:80811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80811*FLEN/8, x4, x1, x2) - -inst_26938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b87ffff; valaddr_reg:x3; val_offset:80814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80814*FLEN/8, x4, x1, x2) - -inst_26939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b8fffff; valaddr_reg:x3; val_offset:80817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80817*FLEN/8, x4, x1, x2) - -inst_26940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8b9fffff; valaddr_reg:x3; val_offset:80820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80820*FLEN/8, x4, x1, x2) - -inst_26941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bbfffff; valaddr_reg:x3; val_offset:80823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80823*FLEN/8, x4, x1, x2) - -inst_26942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bc00000; valaddr_reg:x3; val_offset:80826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80826*FLEN/8, x4, x1, x2) - -inst_26943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8be00000; valaddr_reg:x3; val_offset:80829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80829*FLEN/8, x4, x1, x2) - -inst_26944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bf00000; valaddr_reg:x3; val_offset:80832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80832*FLEN/8, x4, x1, x2) - -inst_26945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bf80000; valaddr_reg:x3; val_offset:80835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80835*FLEN/8, x4, x1, x2) - -inst_26946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfc0000; valaddr_reg:x3; val_offset:80838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80838*FLEN/8, x4, x1, x2) - -inst_26947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfe0000; valaddr_reg:x3; val_offset:80841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80841*FLEN/8, x4, x1, x2) - -inst_26948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bff0000; valaddr_reg:x3; val_offset:80844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80844*FLEN/8, x4, x1, x2) - -inst_26949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bff8000; valaddr_reg:x3; val_offset:80847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80847*FLEN/8, x4, x1, x2) - -inst_26950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bffc000; valaddr_reg:x3; val_offset:80850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80850*FLEN/8, x4, x1, x2) - -inst_26951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bffe000; valaddr_reg:x3; val_offset:80853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80853*FLEN/8, x4, x1, x2) - -inst_26952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfff000; valaddr_reg:x3; val_offset:80856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80856*FLEN/8, x4, x1, x2) - -inst_26953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfff800; valaddr_reg:x3; val_offset:80859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80859*FLEN/8, x4, x1, x2) - -inst_26954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfffc00; valaddr_reg:x3; val_offset:80862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80862*FLEN/8, x4, x1, x2) - -inst_26955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfffe00; valaddr_reg:x3; val_offset:80865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80865*FLEN/8, x4, x1, x2) - -inst_26956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bffff00; valaddr_reg:x3; val_offset:80868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80868*FLEN/8, x4, x1, x2) - -inst_26957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bffff80; valaddr_reg:x3; val_offset:80871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80871*FLEN/8, x4, x1, x2) - -inst_26958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bffffc0; valaddr_reg:x3; val_offset:80874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80874*FLEN/8, x4, x1, x2) - -inst_26959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bffffe0; valaddr_reg:x3; val_offset:80877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80877*FLEN/8, x4, x1, x2) - -inst_26960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfffff0; valaddr_reg:x3; val_offset:80880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80880*FLEN/8, x4, x1, x2) - -inst_26961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfffff8; valaddr_reg:x3; val_offset:80883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80883*FLEN/8, x4, x1, x2) - -inst_26962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfffffc; valaddr_reg:x3; val_offset:80886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80886*FLEN/8, x4, x1, x2) - -inst_26963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bfffffe; valaddr_reg:x3; val_offset:80889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80889*FLEN/8, x4, x1, x2) - -inst_26964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; -op3val:0x8bffffff; valaddr_reg:x3; val_offset:80892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80892*FLEN/8, x4, x1, x2) - -inst_26965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5000000; valaddr_reg:x3; val_offset:80895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80895*FLEN/8, x4, x1, x2) - -inst_26966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5000001; valaddr_reg:x3; val_offset:80898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80898*FLEN/8, x4, x1, x2) - -inst_26967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5000003; valaddr_reg:x3; val_offset:80901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80901*FLEN/8, x4, x1, x2) - -inst_26968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5000007; valaddr_reg:x3; val_offset:80904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80904*FLEN/8, x4, x1, x2) - -inst_26969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa500000f; valaddr_reg:x3; val_offset:80907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80907*FLEN/8, x4, x1, x2) - -inst_26970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa500001f; valaddr_reg:x3; val_offset:80910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80910*FLEN/8, x4, x1, x2) - -inst_26971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa500003f; valaddr_reg:x3; val_offset:80913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80913*FLEN/8, x4, x1, x2) - -inst_26972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa500007f; valaddr_reg:x3; val_offset:80916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80916*FLEN/8, x4, x1, x2) - -inst_26973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa50000ff; valaddr_reg:x3; val_offset:80919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80919*FLEN/8, x4, x1, x2) - -inst_26974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa50001ff; valaddr_reg:x3; val_offset:80922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80922*FLEN/8, x4, x1, x2) - -inst_26975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa50003ff; valaddr_reg:x3; val_offset:80925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80925*FLEN/8, x4, x1, x2) - -inst_26976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa50007ff; valaddr_reg:x3; val_offset:80928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80928*FLEN/8, x4, x1, x2) - -inst_26977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5000fff; valaddr_reg:x3; val_offset:80931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80931*FLEN/8, x4, x1, x2) - -inst_26978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5001fff; valaddr_reg:x3; val_offset:80934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80934*FLEN/8, x4, x1, x2) - -inst_26979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5003fff; valaddr_reg:x3; val_offset:80937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80937*FLEN/8, x4, x1, x2) - -inst_26980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5007fff; valaddr_reg:x3; val_offset:80940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80940*FLEN/8, x4, x1, x2) - -inst_26981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa500ffff; valaddr_reg:x3; val_offset:80943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80943*FLEN/8, x4, x1, x2) - -inst_26982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa501ffff; valaddr_reg:x3; val_offset:80946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80946*FLEN/8, x4, x1, x2) - -inst_26983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa503ffff; valaddr_reg:x3; val_offset:80949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80949*FLEN/8, x4, x1, x2) - -inst_26984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa507ffff; valaddr_reg:x3; val_offset:80952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80952*FLEN/8, x4, x1, x2) - -inst_26985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa50fffff; valaddr_reg:x3; val_offset:80955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80955*FLEN/8, x4, x1, x2) - -inst_26986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa51fffff; valaddr_reg:x3; val_offset:80958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80958*FLEN/8, x4, x1, x2) - -inst_26987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa53fffff; valaddr_reg:x3; val_offset:80961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80961*FLEN/8, x4, x1, x2) - -inst_26988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5400000; valaddr_reg:x3; val_offset:80964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80964*FLEN/8, x4, x1, x2) - -inst_26989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5600000; valaddr_reg:x3; val_offset:80967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80967*FLEN/8, x4, x1, x2) - -inst_26990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5700000; valaddr_reg:x3; val_offset:80970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80970*FLEN/8, x4, x1, x2) - -inst_26991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa5780000; valaddr_reg:x3; val_offset:80973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80973*FLEN/8, x4, x1, x2) - -inst_26992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57c0000; valaddr_reg:x3; val_offset:80976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80976*FLEN/8, x4, x1, x2) - -inst_26993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57e0000; valaddr_reg:x3; val_offset:80979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80979*FLEN/8, x4, x1, x2) - -inst_26994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57f0000; valaddr_reg:x3; val_offset:80982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80982*FLEN/8, x4, x1, x2) - -inst_26995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57f8000; valaddr_reg:x3; val_offset:80985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80985*FLEN/8, x4, x1, x2) - -inst_26996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57fc000; valaddr_reg:x3; val_offset:80988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80988*FLEN/8, x4, x1, x2) - -inst_26997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57fe000; valaddr_reg:x3; val_offset:80991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80991*FLEN/8, x4, x1, x2) - -inst_26998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57ff000; valaddr_reg:x3; val_offset:80994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80994*FLEN/8, x4, x1, x2) - -inst_26999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57ff800; valaddr_reg:x3; val_offset:80997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80997*FLEN/8, x4, x1, x2) - -inst_27000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57ffc00; valaddr_reg:x3; val_offset:81000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81000*FLEN/8, x4, x1, x2) - -inst_27001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57ffe00; valaddr_reg:x3; val_offset:81003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81003*FLEN/8, x4, x1, x2) - -inst_27002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57fff00; valaddr_reg:x3; val_offset:81006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81006*FLEN/8, x4, x1, x2) - -inst_27003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57fff80; valaddr_reg:x3; val_offset:81009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81009*FLEN/8, x4, x1, x2) - -inst_27004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57fffc0; valaddr_reg:x3; val_offset:81012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81012*FLEN/8, x4, x1, x2) - -inst_27005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57fffe0; valaddr_reg:x3; val_offset:81015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81015*FLEN/8, x4, x1, x2) - -inst_27006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57ffff0; valaddr_reg:x3; val_offset:81018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81018*FLEN/8, x4, x1, x2) - -inst_27007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57ffff8; valaddr_reg:x3; val_offset:81021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81021*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_212) - -inst_27008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57ffffc; valaddr_reg:x3; val_offset:81024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81024*FLEN/8, x4, x1, x2) - -inst_27009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57ffffe; valaddr_reg:x3; val_offset:81027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81027*FLEN/8, x4, x1, x2) - -inst_27010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xa57fffff; valaddr_reg:x3; val_offset:81030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81030*FLEN/8, x4, x1, x2) - -inst_27011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbf800001; valaddr_reg:x3; val_offset:81033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81033*FLEN/8, x4, x1, x2) - -inst_27012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbf800003; valaddr_reg:x3; val_offset:81036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81036*FLEN/8, x4, x1, x2) - -inst_27013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbf800007; valaddr_reg:x3; val_offset:81039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81039*FLEN/8, x4, x1, x2) - -inst_27014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbf999999; valaddr_reg:x3; val_offset:81042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81042*FLEN/8, x4, x1, x2) - -inst_27015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:81045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81045*FLEN/8, x4, x1, x2) - -inst_27016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:81048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81048*FLEN/8, x4, x1, x2) - -inst_27017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:81051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81051*FLEN/8, x4, x1, x2) - -inst_27018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:81054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81054*FLEN/8, x4, x1, x2) - -inst_27019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:81057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81057*FLEN/8, x4, x1, x2) - -inst_27020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:81060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81060*FLEN/8, x4, x1, x2) - -inst_27021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:81063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81063*FLEN/8, x4, x1, x2) - -inst_27022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:81066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81066*FLEN/8, x4, x1, x2) - -inst_27023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:81069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81069*FLEN/8, x4, x1, x2) - -inst_27024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:81072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81072*FLEN/8, x4, x1, x2) - -inst_27025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:81075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81075*FLEN/8, x4, x1, x2) - -inst_27026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:81078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81078*FLEN/8, x4, x1, x2) - -inst_27027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea800000; valaddr_reg:x3; val_offset:81081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81081*FLEN/8, x4, x1, x2) - -inst_27028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea800001; valaddr_reg:x3; val_offset:81084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81084*FLEN/8, x4, x1, x2) - -inst_27029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea800003; valaddr_reg:x3; val_offset:81087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81087*FLEN/8, x4, x1, x2) - -inst_27030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea800007; valaddr_reg:x3; val_offset:81090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81090*FLEN/8, x4, x1, x2) - -inst_27031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea80000f; valaddr_reg:x3; val_offset:81093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81093*FLEN/8, x4, x1, x2) - -inst_27032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea80001f; valaddr_reg:x3; val_offset:81096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81096*FLEN/8, x4, x1, x2) - -inst_27033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea80003f; valaddr_reg:x3; val_offset:81099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81099*FLEN/8, x4, x1, x2) - -inst_27034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea80007f; valaddr_reg:x3; val_offset:81102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81102*FLEN/8, x4, x1, x2) - -inst_27035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea8000ff; valaddr_reg:x3; val_offset:81105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81105*FLEN/8, x4, x1, x2) - -inst_27036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea8001ff; valaddr_reg:x3; val_offset:81108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81108*FLEN/8, x4, x1, x2) - -inst_27037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea8003ff; valaddr_reg:x3; val_offset:81111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81111*FLEN/8, x4, x1, x2) - -inst_27038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea8007ff; valaddr_reg:x3; val_offset:81114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81114*FLEN/8, x4, x1, x2) - -inst_27039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea800fff; valaddr_reg:x3; val_offset:81117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81117*FLEN/8, x4, x1, x2) - -inst_27040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea801fff; valaddr_reg:x3; val_offset:81120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81120*FLEN/8, x4, x1, x2) - -inst_27041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea803fff; valaddr_reg:x3; val_offset:81123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81123*FLEN/8, x4, x1, x2) - -inst_27042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea807fff; valaddr_reg:x3; val_offset:81126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81126*FLEN/8, x4, x1, x2) - -inst_27043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea80ffff; valaddr_reg:x3; val_offset:81129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81129*FLEN/8, x4, x1, x2) - -inst_27044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea81ffff; valaddr_reg:x3; val_offset:81132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81132*FLEN/8, x4, x1, x2) - -inst_27045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea83ffff; valaddr_reg:x3; val_offset:81135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81135*FLEN/8, x4, x1, x2) - -inst_27046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea87ffff; valaddr_reg:x3; val_offset:81138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81138*FLEN/8, x4, x1, x2) - -inst_27047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea8fffff; valaddr_reg:x3; val_offset:81141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81141*FLEN/8, x4, x1, x2) - -inst_27048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xea9fffff; valaddr_reg:x3; val_offset:81144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81144*FLEN/8, x4, x1, x2) - -inst_27049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeabfffff; valaddr_reg:x3; val_offset:81147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81147*FLEN/8, x4, x1, x2) - -inst_27050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeac00000; valaddr_reg:x3; val_offset:81150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81150*FLEN/8, x4, x1, x2) - -inst_27051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeae00000; valaddr_reg:x3; val_offset:81153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81153*FLEN/8, x4, x1, x2) - -inst_27052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaf00000; valaddr_reg:x3; val_offset:81156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81156*FLEN/8, x4, x1, x2) - -inst_27053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaf80000; valaddr_reg:x3; val_offset:81159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81159*FLEN/8, x4, x1, x2) - -inst_27054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafc0000; valaddr_reg:x3; val_offset:81162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81162*FLEN/8, x4, x1, x2) - -inst_27055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafe0000; valaddr_reg:x3; val_offset:81165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81165*FLEN/8, x4, x1, x2) - -inst_27056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaff0000; valaddr_reg:x3; val_offset:81168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81168*FLEN/8, x4, x1, x2) - -inst_27057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaff8000; valaddr_reg:x3; val_offset:81171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81171*FLEN/8, x4, x1, x2) - -inst_27058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaffc000; valaddr_reg:x3; val_offset:81174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81174*FLEN/8, x4, x1, x2) - -inst_27059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaffe000; valaddr_reg:x3; val_offset:81177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81177*FLEN/8, x4, x1, x2) - -inst_27060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafff000; valaddr_reg:x3; val_offset:81180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81180*FLEN/8, x4, x1, x2) - -inst_27061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafff800; valaddr_reg:x3; val_offset:81183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81183*FLEN/8, x4, x1, x2) - -inst_27062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafffc00; valaddr_reg:x3; val_offset:81186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81186*FLEN/8, x4, x1, x2) - -inst_27063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafffe00; valaddr_reg:x3; val_offset:81189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81189*FLEN/8, x4, x1, x2) - -inst_27064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaffff00; valaddr_reg:x3; val_offset:81192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81192*FLEN/8, x4, x1, x2) - -inst_27065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaffff80; valaddr_reg:x3; val_offset:81195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81195*FLEN/8, x4, x1, x2) - -inst_27066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaffffc0; valaddr_reg:x3; val_offset:81198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81198*FLEN/8, x4, x1, x2) - -inst_27067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaffffe0; valaddr_reg:x3; val_offset:81201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81201*FLEN/8, x4, x1, x2) - -inst_27068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafffff0; valaddr_reg:x3; val_offset:81204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81204*FLEN/8, x4, x1, x2) - -inst_27069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafffff8; valaddr_reg:x3; val_offset:81207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81207*FLEN/8, x4, x1, x2) - -inst_27070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafffffc; valaddr_reg:x3; val_offset:81210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81210*FLEN/8, x4, x1, x2) - -inst_27071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeafffffe; valaddr_reg:x3; val_offset:81213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81213*FLEN/8, x4, x1, x2) - -inst_27072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xeaffffff; valaddr_reg:x3; val_offset:81216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81216*FLEN/8, x4, x1, x2) - -inst_27073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff000001; valaddr_reg:x3; val_offset:81219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81219*FLEN/8, x4, x1, x2) - -inst_27074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff000003; valaddr_reg:x3; val_offset:81222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81222*FLEN/8, x4, x1, x2) - -inst_27075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff000007; valaddr_reg:x3; val_offset:81225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81225*FLEN/8, x4, x1, x2) - -inst_27076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff199999; valaddr_reg:x3; val_offset:81228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81228*FLEN/8, x4, x1, x2) - -inst_27077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff249249; valaddr_reg:x3; val_offset:81231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81231*FLEN/8, x4, x1, x2) - -inst_27078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff333333; valaddr_reg:x3; val_offset:81234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81234*FLEN/8, x4, x1, x2) - -inst_27079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:81237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81237*FLEN/8, x4, x1, x2) - -inst_27080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:81240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81240*FLEN/8, x4, x1, x2) - -inst_27081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff444444; valaddr_reg:x3; val_offset:81243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81243*FLEN/8, x4, x1, x2) - -inst_27082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:81246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81246*FLEN/8, x4, x1, x2) - -inst_27083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:81249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81249*FLEN/8, x4, x1, x2) - -inst_27084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff666666; valaddr_reg:x3; val_offset:81252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81252*FLEN/8, x4, x1, x2) - -inst_27085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:81255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81255*FLEN/8, x4, x1, x2) - -inst_27086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:81258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81258*FLEN/8, x4, x1, x2) - -inst_27087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:81261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81261*FLEN/8, x4, x1, x2) - -inst_27088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:81264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81264*FLEN/8, x4, x1, x2) - -inst_27089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22000000; valaddr_reg:x3; val_offset:81267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81267*FLEN/8, x4, x1, x2) - -inst_27090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22000001; valaddr_reg:x3; val_offset:81270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81270*FLEN/8, x4, x1, x2) - -inst_27091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22000003; valaddr_reg:x3; val_offset:81273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81273*FLEN/8, x4, x1, x2) - -inst_27092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22000007; valaddr_reg:x3; val_offset:81276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81276*FLEN/8, x4, x1, x2) - -inst_27093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x2200000f; valaddr_reg:x3; val_offset:81279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81279*FLEN/8, x4, x1, x2) - -inst_27094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x2200001f; valaddr_reg:x3; val_offset:81282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81282*FLEN/8, x4, x1, x2) - -inst_27095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x2200003f; valaddr_reg:x3; val_offset:81285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81285*FLEN/8, x4, x1, x2) - -inst_27096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x2200007f; valaddr_reg:x3; val_offset:81288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81288*FLEN/8, x4, x1, x2) - -inst_27097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x220000ff; valaddr_reg:x3; val_offset:81291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81291*FLEN/8, x4, x1, x2) - -inst_27098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x220001ff; valaddr_reg:x3; val_offset:81294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81294*FLEN/8, x4, x1, x2) - -inst_27099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x220003ff; valaddr_reg:x3; val_offset:81297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81297*FLEN/8, x4, x1, x2) - -inst_27100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x220007ff; valaddr_reg:x3; val_offset:81300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81300*FLEN/8, x4, x1, x2) - -inst_27101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22000fff; valaddr_reg:x3; val_offset:81303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81303*FLEN/8, x4, x1, x2) - -inst_27102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22001fff; valaddr_reg:x3; val_offset:81306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81306*FLEN/8, x4, x1, x2) - -inst_27103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22003fff; valaddr_reg:x3; val_offset:81309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81309*FLEN/8, x4, x1, x2) - -inst_27104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22007fff; valaddr_reg:x3; val_offset:81312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81312*FLEN/8, x4, x1, x2) - -inst_27105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x2200ffff; valaddr_reg:x3; val_offset:81315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81315*FLEN/8, x4, x1, x2) - -inst_27106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x2201ffff; valaddr_reg:x3; val_offset:81318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81318*FLEN/8, x4, x1, x2) - -inst_27107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x2203ffff; valaddr_reg:x3; val_offset:81321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81321*FLEN/8, x4, x1, x2) - -inst_27108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x2207ffff; valaddr_reg:x3; val_offset:81324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81324*FLEN/8, x4, x1, x2) - -inst_27109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x220fffff; valaddr_reg:x3; val_offset:81327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81327*FLEN/8, x4, x1, x2) - -inst_27110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x221fffff; valaddr_reg:x3; val_offset:81330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81330*FLEN/8, x4, x1, x2) - -inst_27111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x223fffff; valaddr_reg:x3; val_offset:81333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81333*FLEN/8, x4, x1, x2) - -inst_27112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22400000; valaddr_reg:x3; val_offset:81336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81336*FLEN/8, x4, x1, x2) - -inst_27113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22600000; valaddr_reg:x3; val_offset:81339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81339*FLEN/8, x4, x1, x2) - -inst_27114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22700000; valaddr_reg:x3; val_offset:81342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81342*FLEN/8, x4, x1, x2) - -inst_27115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x22780000; valaddr_reg:x3; val_offset:81345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81345*FLEN/8, x4, x1, x2) - -inst_27116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227c0000; valaddr_reg:x3; val_offset:81348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81348*FLEN/8, x4, x1, x2) - -inst_27117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227e0000; valaddr_reg:x3; val_offset:81351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81351*FLEN/8, x4, x1, x2) - -inst_27118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227f0000; valaddr_reg:x3; val_offset:81354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81354*FLEN/8, x4, x1, x2) - -inst_27119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227f8000; valaddr_reg:x3; val_offset:81357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81357*FLEN/8, x4, x1, x2) - -inst_27120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227fc000; valaddr_reg:x3; val_offset:81360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81360*FLEN/8, x4, x1, x2) - -inst_27121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227fe000; valaddr_reg:x3; val_offset:81363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81363*FLEN/8, x4, x1, x2) - -inst_27122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227ff000; valaddr_reg:x3; val_offset:81366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81366*FLEN/8, x4, x1, x2) - -inst_27123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227ff800; valaddr_reg:x3; val_offset:81369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81369*FLEN/8, x4, x1, x2) - -inst_27124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227ffc00; valaddr_reg:x3; val_offset:81372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81372*FLEN/8, x4, x1, x2) - -inst_27125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227ffe00; valaddr_reg:x3; val_offset:81375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81375*FLEN/8, x4, x1, x2) - -inst_27126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227fff00; valaddr_reg:x3; val_offset:81378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81378*FLEN/8, x4, x1, x2) - -inst_27127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227fff80; valaddr_reg:x3; val_offset:81381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81381*FLEN/8, x4, x1, x2) - -inst_27128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227fffc0; valaddr_reg:x3; val_offset:81384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81384*FLEN/8, x4, x1, x2) - -inst_27129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227fffe0; valaddr_reg:x3; val_offset:81387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81387*FLEN/8, x4, x1, x2) - -inst_27130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227ffff0; valaddr_reg:x3; val_offset:81390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81390*FLEN/8, x4, x1, x2) - -inst_27131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227ffff8; valaddr_reg:x3; val_offset:81393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81393*FLEN/8, x4, x1, x2) - -inst_27132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227ffffc; valaddr_reg:x3; val_offset:81396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81396*FLEN/8, x4, x1, x2) - -inst_27133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227ffffe; valaddr_reg:x3; val_offset:81399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81399*FLEN/8, x4, x1, x2) - -inst_27134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x227fffff; valaddr_reg:x3; val_offset:81402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81402*FLEN/8, x4, x1, x2) - -inst_27135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3f800001; valaddr_reg:x3; val_offset:81405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81405*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_213) - -inst_27136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3f800003; valaddr_reg:x3; val_offset:81408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81408*FLEN/8, x4, x1, x2) - -inst_27137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3f800007; valaddr_reg:x3; val_offset:81411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81411*FLEN/8, x4, x1, x2) - -inst_27138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3f999999; valaddr_reg:x3; val_offset:81414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81414*FLEN/8, x4, x1, x2) - -inst_27139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:81417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81417*FLEN/8, x4, x1, x2) - -inst_27140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:81420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81420*FLEN/8, x4, x1, x2) - -inst_27141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:81423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81423*FLEN/8, x4, x1, x2) - -inst_27142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:81426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81426*FLEN/8, x4, x1, x2) - -inst_27143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:81429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81429*FLEN/8, x4, x1, x2) - -inst_27144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:81432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81432*FLEN/8, x4, x1, x2) - -inst_27145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:81435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81435*FLEN/8, x4, x1, x2) - -inst_27146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:81438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81438*FLEN/8, x4, x1, x2) - -inst_27147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:81441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81441*FLEN/8, x4, x1, x2) - -inst_27148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:81444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81444*FLEN/8, x4, x1, x2) - -inst_27149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:81447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81447*FLEN/8, x4, x1, x2) - -inst_27150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:81450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81450*FLEN/8, x4, x1, x2) - -inst_27151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3f800001; valaddr_reg:x3; val_offset:81453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81453*FLEN/8, x4, x1, x2) - -inst_27152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3f800003; valaddr_reg:x3; val_offset:81456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81456*FLEN/8, x4, x1, x2) - -inst_27153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3f800007; valaddr_reg:x3; val_offset:81459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81459*FLEN/8, x4, x1, x2) - -inst_27154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3f999999; valaddr_reg:x3; val_offset:81462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81462*FLEN/8, x4, x1, x2) - -inst_27155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:81465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81465*FLEN/8, x4, x1, x2) - -inst_27156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:81468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81468*FLEN/8, x4, x1, x2) - -inst_27157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:81471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81471*FLEN/8, x4, x1, x2) - -inst_27158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:81474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81474*FLEN/8, x4, x1, x2) - -inst_27159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:81477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81477*FLEN/8, x4, x1, x2) - -inst_27160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:81480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81480*FLEN/8, x4, x1, x2) - -inst_27161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:81483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81483*FLEN/8, x4, x1, x2) - -inst_27162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:81486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81486*FLEN/8, x4, x1, x2) - -inst_27163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:81489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81489*FLEN/8, x4, x1, x2) - -inst_27164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:81492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81492*FLEN/8, x4, x1, x2) - -inst_27165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:81495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81495*FLEN/8, x4, x1, x2) - -inst_27166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:81498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81498*FLEN/8, x4, x1, x2) - -inst_27167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41000000; valaddr_reg:x3; val_offset:81501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81501*FLEN/8, x4, x1, x2) - -inst_27168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41000001; valaddr_reg:x3; val_offset:81504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81504*FLEN/8, x4, x1, x2) - -inst_27169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41000003; valaddr_reg:x3; val_offset:81507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81507*FLEN/8, x4, x1, x2) - -inst_27170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41000007; valaddr_reg:x3; val_offset:81510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81510*FLEN/8, x4, x1, x2) - -inst_27171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x4100000f; valaddr_reg:x3; val_offset:81513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81513*FLEN/8, x4, x1, x2) - -inst_27172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x4100001f; valaddr_reg:x3; val_offset:81516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81516*FLEN/8, x4, x1, x2) - -inst_27173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x4100003f; valaddr_reg:x3; val_offset:81519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81519*FLEN/8, x4, x1, x2) - -inst_27174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x4100007f; valaddr_reg:x3; val_offset:81522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81522*FLEN/8, x4, x1, x2) - -inst_27175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x410000ff; valaddr_reg:x3; val_offset:81525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81525*FLEN/8, x4, x1, x2) - -inst_27176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x410001ff; valaddr_reg:x3; val_offset:81528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81528*FLEN/8, x4, x1, x2) - -inst_27177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x410003ff; valaddr_reg:x3; val_offset:81531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81531*FLEN/8, x4, x1, x2) - -inst_27178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x410007ff; valaddr_reg:x3; val_offset:81534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81534*FLEN/8, x4, x1, x2) - -inst_27179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41000fff; valaddr_reg:x3; val_offset:81537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81537*FLEN/8, x4, x1, x2) - -inst_27180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41001fff; valaddr_reg:x3; val_offset:81540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81540*FLEN/8, x4, x1, x2) - -inst_27181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41003fff; valaddr_reg:x3; val_offset:81543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81543*FLEN/8, x4, x1, x2) - -inst_27182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41007fff; valaddr_reg:x3; val_offset:81546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81546*FLEN/8, x4, x1, x2) - -inst_27183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x4100ffff; valaddr_reg:x3; val_offset:81549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81549*FLEN/8, x4, x1, x2) - -inst_27184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x4101ffff; valaddr_reg:x3; val_offset:81552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81552*FLEN/8, x4, x1, x2) - -inst_27185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x4103ffff; valaddr_reg:x3; val_offset:81555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81555*FLEN/8, x4, x1, x2) - -inst_27186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x4107ffff; valaddr_reg:x3; val_offset:81558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81558*FLEN/8, x4, x1, x2) - -inst_27187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x410fffff; valaddr_reg:x3; val_offset:81561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81561*FLEN/8, x4, x1, x2) - -inst_27188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x411fffff; valaddr_reg:x3; val_offset:81564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81564*FLEN/8, x4, x1, x2) - -inst_27189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x413fffff; valaddr_reg:x3; val_offset:81567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81567*FLEN/8, x4, x1, x2) - -inst_27190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41400000; valaddr_reg:x3; val_offset:81570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81570*FLEN/8, x4, x1, x2) - -inst_27191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41600000; valaddr_reg:x3; val_offset:81573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81573*FLEN/8, x4, x1, x2) - -inst_27192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41700000; valaddr_reg:x3; val_offset:81576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81576*FLEN/8, x4, x1, x2) - -inst_27193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x41780000; valaddr_reg:x3; val_offset:81579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81579*FLEN/8, x4, x1, x2) - -inst_27194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417c0000; valaddr_reg:x3; val_offset:81582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81582*FLEN/8, x4, x1, x2) - -inst_27195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417e0000; valaddr_reg:x3; val_offset:81585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81585*FLEN/8, x4, x1, x2) - -inst_27196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417f0000; valaddr_reg:x3; val_offset:81588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81588*FLEN/8, x4, x1, x2) - -inst_27197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417f8000; valaddr_reg:x3; val_offset:81591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81591*FLEN/8, x4, x1, x2) - -inst_27198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417fc000; valaddr_reg:x3; val_offset:81594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81594*FLEN/8, x4, x1, x2) - -inst_27199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417fe000; valaddr_reg:x3; val_offset:81597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81597*FLEN/8, x4, x1, x2) - -inst_27200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417ff000; valaddr_reg:x3; val_offset:81600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81600*FLEN/8, x4, x1, x2) - -inst_27201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417ff800; valaddr_reg:x3; val_offset:81603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81603*FLEN/8, x4, x1, x2) - -inst_27202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417ffc00; valaddr_reg:x3; val_offset:81606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81606*FLEN/8, x4, x1, x2) - -inst_27203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417ffe00; valaddr_reg:x3; val_offset:81609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81609*FLEN/8, x4, x1, x2) - -inst_27204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417fff00; valaddr_reg:x3; val_offset:81612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81612*FLEN/8, x4, x1, x2) - -inst_27205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417fff80; valaddr_reg:x3; val_offset:81615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81615*FLEN/8, x4, x1, x2) - -inst_27206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417fffc0; valaddr_reg:x3; val_offset:81618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81618*FLEN/8, x4, x1, x2) - -inst_27207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417fffe0; valaddr_reg:x3; val_offset:81621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81621*FLEN/8, x4, x1, x2) - -inst_27208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417ffff0; valaddr_reg:x3; val_offset:81624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81624*FLEN/8, x4, x1, x2) - -inst_27209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417ffff8; valaddr_reg:x3; val_offset:81627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81627*FLEN/8, x4, x1, x2) - -inst_27210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417ffffc; valaddr_reg:x3; val_offset:81630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81630*FLEN/8, x4, x1, x2) - -inst_27211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417ffffe; valaddr_reg:x3; val_offset:81633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81633*FLEN/8, x4, x1, x2) - -inst_27212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; -op3val:0x417fffff; valaddr_reg:x3; val_offset:81636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81636*FLEN/8, x4, x1, x2) - -inst_27213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:81639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81639*FLEN/8, x4, x1, x2) - -inst_27214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:81642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81642*FLEN/8, x4, x1, x2) - -inst_27215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:81645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81645*FLEN/8, x4, x1, x2) - -inst_27216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:81648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81648*FLEN/8, x4, x1, x2) - -inst_27217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:81651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81651*FLEN/8, x4, x1, x2) - -inst_27218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:81654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81654*FLEN/8, x4, x1, x2) - -inst_27219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:81657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81657*FLEN/8, x4, x1, x2) - -inst_27220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:81660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81660*FLEN/8, x4, x1, x2) - -inst_27221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:81663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81663*FLEN/8, x4, x1, x2) - -inst_27222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:81666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81666*FLEN/8, x4, x1, x2) - -inst_27223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:81669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81669*FLEN/8, x4, x1, x2) - -inst_27224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:81672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81672*FLEN/8, x4, x1, x2) - -inst_27225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:81675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81675*FLEN/8, x4, x1, x2) - -inst_27226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:81678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81678*FLEN/8, x4, x1, x2) - -inst_27227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:81681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81681*FLEN/8, x4, x1, x2) - -inst_27228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:81684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81684*FLEN/8, x4, x1, x2) - -inst_27229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa000000; valaddr_reg:x3; val_offset:81687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81687*FLEN/8, x4, x1, x2) - -inst_27230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa000001; valaddr_reg:x3; val_offset:81690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81690*FLEN/8, x4, x1, x2) - -inst_27231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa000003; valaddr_reg:x3; val_offset:81693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81693*FLEN/8, x4, x1, x2) - -inst_27232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa000007; valaddr_reg:x3; val_offset:81696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81696*FLEN/8, x4, x1, x2) - -inst_27233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa00000f; valaddr_reg:x3; val_offset:81699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81699*FLEN/8, x4, x1, x2) - -inst_27234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa00001f; valaddr_reg:x3; val_offset:81702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81702*FLEN/8, x4, x1, x2) - -inst_27235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa00003f; valaddr_reg:x3; val_offset:81705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81705*FLEN/8, x4, x1, x2) - -inst_27236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa00007f; valaddr_reg:x3; val_offset:81708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81708*FLEN/8, x4, x1, x2) - -inst_27237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa0000ff; valaddr_reg:x3; val_offset:81711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81711*FLEN/8, x4, x1, x2) - -inst_27238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa0001ff; valaddr_reg:x3; val_offset:81714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81714*FLEN/8, x4, x1, x2) - -inst_27239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa0003ff; valaddr_reg:x3; val_offset:81717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81717*FLEN/8, x4, x1, x2) - -inst_27240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa0007ff; valaddr_reg:x3; val_offset:81720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81720*FLEN/8, x4, x1, x2) - -inst_27241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa000fff; valaddr_reg:x3; val_offset:81723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81723*FLEN/8, x4, x1, x2) - -inst_27242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa001fff; valaddr_reg:x3; val_offset:81726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81726*FLEN/8, x4, x1, x2) - -inst_27243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa003fff; valaddr_reg:x3; val_offset:81729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81729*FLEN/8, x4, x1, x2) - -inst_27244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa007fff; valaddr_reg:x3; val_offset:81732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81732*FLEN/8, x4, x1, x2) - -inst_27245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa00ffff; valaddr_reg:x3; val_offset:81735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81735*FLEN/8, x4, x1, x2) - -inst_27246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa01ffff; valaddr_reg:x3; val_offset:81738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81738*FLEN/8, x4, x1, x2) - -inst_27247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa03ffff; valaddr_reg:x3; val_offset:81741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81741*FLEN/8, x4, x1, x2) - -inst_27248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa07ffff; valaddr_reg:x3; val_offset:81744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81744*FLEN/8, x4, x1, x2) - -inst_27249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa0fffff; valaddr_reg:x3; val_offset:81747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81747*FLEN/8, x4, x1, x2) - -inst_27250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa1fffff; valaddr_reg:x3; val_offset:81750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81750*FLEN/8, x4, x1, x2) - -inst_27251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa3fffff; valaddr_reg:x3; val_offset:81753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81753*FLEN/8, x4, x1, x2) - -inst_27252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa400000; valaddr_reg:x3; val_offset:81756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81756*FLEN/8, x4, x1, x2) - -inst_27253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa600000; valaddr_reg:x3; val_offset:81759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81759*FLEN/8, x4, x1, x2) - -inst_27254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa700000; valaddr_reg:x3; val_offset:81762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81762*FLEN/8, x4, x1, x2) - -inst_27255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa780000; valaddr_reg:x3; val_offset:81765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81765*FLEN/8, x4, x1, x2) - -inst_27256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7c0000; valaddr_reg:x3; val_offset:81768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81768*FLEN/8, x4, x1, x2) - -inst_27257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7e0000; valaddr_reg:x3; val_offset:81771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81771*FLEN/8, x4, x1, x2) - -inst_27258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7f0000; valaddr_reg:x3; val_offset:81774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81774*FLEN/8, x4, x1, x2) - -inst_27259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7f8000; valaddr_reg:x3; val_offset:81777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81777*FLEN/8, x4, x1, x2) - -inst_27260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7fc000; valaddr_reg:x3; val_offset:81780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81780*FLEN/8, x4, x1, x2) - -inst_27261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7fe000; valaddr_reg:x3; val_offset:81783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81783*FLEN/8, x4, x1, x2) - -inst_27262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7ff000; valaddr_reg:x3; val_offset:81786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81786*FLEN/8, x4, x1, x2) - -inst_27263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7ff800; valaddr_reg:x3; val_offset:81789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81789*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_214) - -inst_27264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7ffc00; valaddr_reg:x3; val_offset:81792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81792*FLEN/8, x4, x1, x2) - -inst_27265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7ffe00; valaddr_reg:x3; val_offset:81795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81795*FLEN/8, x4, x1, x2) - -inst_27266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7fff00; valaddr_reg:x3; val_offset:81798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81798*FLEN/8, x4, x1, x2) - -inst_27267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7fff80; valaddr_reg:x3; val_offset:81801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81801*FLEN/8, x4, x1, x2) - -inst_27268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7fffc0; valaddr_reg:x3; val_offset:81804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81804*FLEN/8, x4, x1, x2) - -inst_27269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7fffe0; valaddr_reg:x3; val_offset:81807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81807*FLEN/8, x4, x1, x2) - -inst_27270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7ffff0; valaddr_reg:x3; val_offset:81810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81810*FLEN/8, x4, x1, x2) - -inst_27271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7ffff8; valaddr_reg:x3; val_offset:81813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81813*FLEN/8, x4, x1, x2) - -inst_27272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7ffffc; valaddr_reg:x3; val_offset:81816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81816*FLEN/8, x4, x1, x2) - -inst_27273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7ffffe; valaddr_reg:x3; val_offset:81819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81819*FLEN/8, x4, x1, x2) - -inst_27274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; -op3val:0xa7fffff; valaddr_reg:x3; val_offset:81822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81822*FLEN/8, x4, x1, x2) - -inst_27275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29000000; valaddr_reg:x3; val_offset:81825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81825*FLEN/8, x4, x1, x2) - -inst_27276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29000001; valaddr_reg:x3; val_offset:81828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81828*FLEN/8, x4, x1, x2) - -inst_27277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29000003; valaddr_reg:x3; val_offset:81831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81831*FLEN/8, x4, x1, x2) - -inst_27278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29000007; valaddr_reg:x3; val_offset:81834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81834*FLEN/8, x4, x1, x2) - -inst_27279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x2900000f; valaddr_reg:x3; val_offset:81837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81837*FLEN/8, x4, x1, x2) - -inst_27280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x2900001f; valaddr_reg:x3; val_offset:81840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81840*FLEN/8, x4, x1, x2) - -inst_27281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x2900003f; valaddr_reg:x3; val_offset:81843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81843*FLEN/8, x4, x1, x2) - -inst_27282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x2900007f; valaddr_reg:x3; val_offset:81846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81846*FLEN/8, x4, x1, x2) - -inst_27283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x290000ff; valaddr_reg:x3; val_offset:81849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81849*FLEN/8, x4, x1, x2) - -inst_27284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x290001ff; valaddr_reg:x3; val_offset:81852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81852*FLEN/8, x4, x1, x2) - -inst_27285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x290003ff; valaddr_reg:x3; val_offset:81855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81855*FLEN/8, x4, x1, x2) - -inst_27286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x290007ff; valaddr_reg:x3; val_offset:81858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81858*FLEN/8, x4, x1, x2) - -inst_27287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29000fff; valaddr_reg:x3; val_offset:81861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81861*FLEN/8, x4, x1, x2) - -inst_27288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29001fff; valaddr_reg:x3; val_offset:81864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81864*FLEN/8, x4, x1, x2) - -inst_27289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29003fff; valaddr_reg:x3; val_offset:81867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81867*FLEN/8, x4, x1, x2) - -inst_27290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29007fff; valaddr_reg:x3; val_offset:81870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81870*FLEN/8, x4, x1, x2) - -inst_27291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x2900ffff; valaddr_reg:x3; val_offset:81873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81873*FLEN/8, x4, x1, x2) - -inst_27292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x2901ffff; valaddr_reg:x3; val_offset:81876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81876*FLEN/8, x4, x1, x2) - -inst_27293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x2903ffff; valaddr_reg:x3; val_offset:81879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81879*FLEN/8, x4, x1, x2) - -inst_27294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x2907ffff; valaddr_reg:x3; val_offset:81882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81882*FLEN/8, x4, x1, x2) - -inst_27295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x290fffff; valaddr_reg:x3; val_offset:81885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81885*FLEN/8, x4, x1, x2) - -inst_27296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x291fffff; valaddr_reg:x3; val_offset:81888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81888*FLEN/8, x4, x1, x2) - -inst_27297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x293fffff; valaddr_reg:x3; val_offset:81891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81891*FLEN/8, x4, x1, x2) - -inst_27298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29400000; valaddr_reg:x3; val_offset:81894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81894*FLEN/8, x4, x1, x2) - -inst_27299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29600000; valaddr_reg:x3; val_offset:81897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81897*FLEN/8, x4, x1, x2) - -inst_27300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29700000; valaddr_reg:x3; val_offset:81900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81900*FLEN/8, x4, x1, x2) - -inst_27301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x29780000; valaddr_reg:x3; val_offset:81903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81903*FLEN/8, x4, x1, x2) - -inst_27302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297c0000; valaddr_reg:x3; val_offset:81906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81906*FLEN/8, x4, x1, x2) - -inst_27303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297e0000; valaddr_reg:x3; val_offset:81909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81909*FLEN/8, x4, x1, x2) - -inst_27304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297f0000; valaddr_reg:x3; val_offset:81912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81912*FLEN/8, x4, x1, x2) - -inst_27305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297f8000; valaddr_reg:x3; val_offset:81915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81915*FLEN/8, x4, x1, x2) - -inst_27306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297fc000; valaddr_reg:x3; val_offset:81918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81918*FLEN/8, x4, x1, x2) - -inst_27307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297fe000; valaddr_reg:x3; val_offset:81921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81921*FLEN/8, x4, x1, x2) - -inst_27308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297ff000; valaddr_reg:x3; val_offset:81924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81924*FLEN/8, x4, x1, x2) - -inst_27309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297ff800; valaddr_reg:x3; val_offset:81927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81927*FLEN/8, x4, x1, x2) - -inst_27310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297ffc00; valaddr_reg:x3; val_offset:81930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81930*FLEN/8, x4, x1, x2) - -inst_27311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297ffe00; valaddr_reg:x3; val_offset:81933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81933*FLEN/8, x4, x1, x2) - -inst_27312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297fff00; valaddr_reg:x3; val_offset:81936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81936*FLEN/8, x4, x1, x2) - -inst_27313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297fff80; valaddr_reg:x3; val_offset:81939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81939*FLEN/8, x4, x1, x2) - -inst_27314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297fffc0; valaddr_reg:x3; val_offset:81942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81942*FLEN/8, x4, x1, x2) - -inst_27315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297fffe0; valaddr_reg:x3; val_offset:81945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81945*FLEN/8, x4, x1, x2) - -inst_27316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297ffff0; valaddr_reg:x3; val_offset:81948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81948*FLEN/8, x4, x1, x2) - -inst_27317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297ffff8; valaddr_reg:x3; val_offset:81951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81951*FLEN/8, x4, x1, x2) - -inst_27318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297ffffc; valaddr_reg:x3; val_offset:81954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81954*FLEN/8, x4, x1, x2) - -inst_27319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297ffffe; valaddr_reg:x3; val_offset:81957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81957*FLEN/8, x4, x1, x2) - -inst_27320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x297fffff; valaddr_reg:x3; val_offset:81960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81960*FLEN/8, x4, x1, x2) - -inst_27321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3f800001; valaddr_reg:x3; val_offset:81963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81963*FLEN/8, x4, x1, x2) - -inst_27322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3f800003; valaddr_reg:x3; val_offset:81966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81966*FLEN/8, x4, x1, x2) - -inst_27323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3f800007; valaddr_reg:x3; val_offset:81969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81969*FLEN/8, x4, x1, x2) - -inst_27324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3f999999; valaddr_reg:x3; val_offset:81972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81972*FLEN/8, x4, x1, x2) - -inst_27325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:81975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81975*FLEN/8, x4, x1, x2) - -inst_27326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:81978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81978*FLEN/8, x4, x1, x2) - -inst_27327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:81981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81981*FLEN/8, x4, x1, x2) - -inst_27328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:81984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81984*FLEN/8, x4, x1, x2) - -inst_27329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:81987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81987*FLEN/8, x4, x1, x2) - -inst_27330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:81990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81990*FLEN/8, x4, x1, x2) - -inst_27331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:81993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81993*FLEN/8, x4, x1, x2) - -inst_27332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:81996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81996*FLEN/8, x4, x1, x2) - -inst_27333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:81999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81999*FLEN/8, x4, x1, x2) - -inst_27334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:82002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82002*FLEN/8, x4, x1, x2) - -inst_27335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:82005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82005*FLEN/8, x4, x1, x2) - -inst_27336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:82008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82008*FLEN/8, x4, x1, x2) - -inst_27337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac000000; valaddr_reg:x3; val_offset:82011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82011*FLEN/8, x4, x1, x2) - -inst_27338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac000001; valaddr_reg:x3; val_offset:82014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82014*FLEN/8, x4, x1, x2) - -inst_27339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac000003; valaddr_reg:x3; val_offset:82017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82017*FLEN/8, x4, x1, x2) - -inst_27340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac000007; valaddr_reg:x3; val_offset:82020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82020*FLEN/8, x4, x1, x2) - -inst_27341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac00000f; valaddr_reg:x3; val_offset:82023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82023*FLEN/8, x4, x1, x2) - -inst_27342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac00001f; valaddr_reg:x3; val_offset:82026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82026*FLEN/8, x4, x1, x2) - -inst_27343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac00003f; valaddr_reg:x3; val_offset:82029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82029*FLEN/8, x4, x1, x2) - -inst_27344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac00007f; valaddr_reg:x3; val_offset:82032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82032*FLEN/8, x4, x1, x2) - -inst_27345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac0000ff; valaddr_reg:x3; val_offset:82035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82035*FLEN/8, x4, x1, x2) - -inst_27346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac0001ff; valaddr_reg:x3; val_offset:82038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82038*FLEN/8, x4, x1, x2) - -inst_27347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac0003ff; valaddr_reg:x3; val_offset:82041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82041*FLEN/8, x4, x1, x2) - -inst_27348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac0007ff; valaddr_reg:x3; val_offset:82044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82044*FLEN/8, x4, x1, x2) - -inst_27349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac000fff; valaddr_reg:x3; val_offset:82047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82047*FLEN/8, x4, x1, x2) - -inst_27350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac001fff; valaddr_reg:x3; val_offset:82050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82050*FLEN/8, x4, x1, x2) - -inst_27351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac003fff; valaddr_reg:x3; val_offset:82053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82053*FLEN/8, x4, x1, x2) - -inst_27352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac007fff; valaddr_reg:x3; val_offset:82056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82056*FLEN/8, x4, x1, x2) - -inst_27353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac00ffff; valaddr_reg:x3; val_offset:82059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82059*FLEN/8, x4, x1, x2) - -inst_27354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac01ffff; valaddr_reg:x3; val_offset:82062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82062*FLEN/8, x4, x1, x2) - -inst_27355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac03ffff; valaddr_reg:x3; val_offset:82065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82065*FLEN/8, x4, x1, x2) - -inst_27356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac07ffff; valaddr_reg:x3; val_offset:82068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82068*FLEN/8, x4, x1, x2) - -inst_27357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac0fffff; valaddr_reg:x3; val_offset:82071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82071*FLEN/8, x4, x1, x2) - -inst_27358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac1fffff; valaddr_reg:x3; val_offset:82074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82074*FLEN/8, x4, x1, x2) - -inst_27359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac3fffff; valaddr_reg:x3; val_offset:82077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82077*FLEN/8, x4, x1, x2) - -inst_27360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac400000; valaddr_reg:x3; val_offset:82080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82080*FLEN/8, x4, x1, x2) - -inst_27361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac600000; valaddr_reg:x3; val_offset:82083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82083*FLEN/8, x4, x1, x2) - -inst_27362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac700000; valaddr_reg:x3; val_offset:82086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82086*FLEN/8, x4, x1, x2) - -inst_27363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac780000; valaddr_reg:x3; val_offset:82089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82089*FLEN/8, x4, x1, x2) - -inst_27364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7c0000; valaddr_reg:x3; val_offset:82092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82092*FLEN/8, x4, x1, x2) - -inst_27365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7e0000; valaddr_reg:x3; val_offset:82095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82095*FLEN/8, x4, x1, x2) - -inst_27366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7f0000; valaddr_reg:x3; val_offset:82098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82098*FLEN/8, x4, x1, x2) - -inst_27367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7f8000; valaddr_reg:x3; val_offset:82101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82101*FLEN/8, x4, x1, x2) - -inst_27368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7fc000; valaddr_reg:x3; val_offset:82104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82104*FLEN/8, x4, x1, x2) - -inst_27369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7fe000; valaddr_reg:x3; val_offset:82107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82107*FLEN/8, x4, x1, x2) - -inst_27370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7ff000; valaddr_reg:x3; val_offset:82110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82110*FLEN/8, x4, x1, x2) - -inst_27371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7ff800; valaddr_reg:x3; val_offset:82113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82113*FLEN/8, x4, x1, x2) - -inst_27372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7ffc00; valaddr_reg:x3; val_offset:82116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82116*FLEN/8, x4, x1, x2) - -inst_27373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7ffe00; valaddr_reg:x3; val_offset:82119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82119*FLEN/8, x4, x1, x2) - -inst_27374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7fff00; valaddr_reg:x3; val_offset:82122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82122*FLEN/8, x4, x1, x2) - -inst_27375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7fff80; valaddr_reg:x3; val_offset:82125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82125*FLEN/8, x4, x1, x2) - -inst_27376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7fffc0; valaddr_reg:x3; val_offset:82128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82128*FLEN/8, x4, x1, x2) - -inst_27377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7fffe0; valaddr_reg:x3; val_offset:82131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82131*FLEN/8, x4, x1, x2) - -inst_27378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7ffff0; valaddr_reg:x3; val_offset:82134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82134*FLEN/8, x4, x1, x2) - -inst_27379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7ffff8; valaddr_reg:x3; val_offset:82137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82137*FLEN/8, x4, x1, x2) - -inst_27380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7ffffc; valaddr_reg:x3; val_offset:82140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82140*FLEN/8, x4, x1, x2) - -inst_27381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7ffffe; valaddr_reg:x3; val_offset:82143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82143*FLEN/8, x4, x1, x2) - -inst_27382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xac7fffff; valaddr_reg:x3; val_offset:82146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82146*FLEN/8, x4, x1, x2) - -inst_27383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbf800001; valaddr_reg:x3; val_offset:82149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82149*FLEN/8, x4, x1, x2) - -inst_27384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbf800003; valaddr_reg:x3; val_offset:82152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82152*FLEN/8, x4, x1, x2) - -inst_27385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbf800007; valaddr_reg:x3; val_offset:82155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82155*FLEN/8, x4, x1, x2) - -inst_27386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbf999999; valaddr_reg:x3; val_offset:82158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82158*FLEN/8, x4, x1, x2) - -inst_27387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:82161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82161*FLEN/8, x4, x1, x2) - -inst_27388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:82164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82164*FLEN/8, x4, x1, x2) - -inst_27389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:82167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82167*FLEN/8, x4, x1, x2) - -inst_27390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:82170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82170*FLEN/8, x4, x1, x2) - -inst_27391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:82173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82173*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_215) - -inst_27392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:82176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82176*FLEN/8, x4, x1, x2) - -inst_27393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:82179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82179*FLEN/8, x4, x1, x2) - -inst_27394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:82182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82182*FLEN/8, x4, x1, x2) - -inst_27395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:82185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82185*FLEN/8, x4, x1, x2) - -inst_27396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:82188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82188*FLEN/8, x4, x1, x2) - -inst_27397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:82191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82191*FLEN/8, x4, x1, x2) - -inst_27398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:82194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82194*FLEN/8, x4, x1, x2) - -inst_27399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79800000; valaddr_reg:x3; val_offset:82197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82197*FLEN/8, x4, x1, x2) - -inst_27400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79800001; valaddr_reg:x3; val_offset:82200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82200*FLEN/8, x4, x1, x2) - -inst_27401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79800003; valaddr_reg:x3; val_offset:82203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82203*FLEN/8, x4, x1, x2) - -inst_27402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79800007; valaddr_reg:x3; val_offset:82206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82206*FLEN/8, x4, x1, x2) - -inst_27403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7980000f; valaddr_reg:x3; val_offset:82209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82209*FLEN/8, x4, x1, x2) - -inst_27404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7980001f; valaddr_reg:x3; val_offset:82212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82212*FLEN/8, x4, x1, x2) - -inst_27405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7980003f; valaddr_reg:x3; val_offset:82215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82215*FLEN/8, x4, x1, x2) - -inst_27406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7980007f; valaddr_reg:x3; val_offset:82218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82218*FLEN/8, x4, x1, x2) - -inst_27407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x798000ff; valaddr_reg:x3; val_offset:82221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82221*FLEN/8, x4, x1, x2) - -inst_27408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x798001ff; valaddr_reg:x3; val_offset:82224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82224*FLEN/8, x4, x1, x2) - -inst_27409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x798003ff; valaddr_reg:x3; val_offset:82227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82227*FLEN/8, x4, x1, x2) - -inst_27410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x798007ff; valaddr_reg:x3; val_offset:82230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82230*FLEN/8, x4, x1, x2) - -inst_27411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79800fff; valaddr_reg:x3; val_offset:82233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82233*FLEN/8, x4, x1, x2) - -inst_27412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79801fff; valaddr_reg:x3; val_offset:82236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82236*FLEN/8, x4, x1, x2) - -inst_27413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79803fff; valaddr_reg:x3; val_offset:82239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82239*FLEN/8, x4, x1, x2) - -inst_27414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79807fff; valaddr_reg:x3; val_offset:82242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82242*FLEN/8, x4, x1, x2) - -inst_27415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7980ffff; valaddr_reg:x3; val_offset:82245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82245*FLEN/8, x4, x1, x2) - -inst_27416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7981ffff; valaddr_reg:x3; val_offset:82248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82248*FLEN/8, x4, x1, x2) - -inst_27417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7983ffff; valaddr_reg:x3; val_offset:82251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82251*FLEN/8, x4, x1, x2) - -inst_27418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7987ffff; valaddr_reg:x3; val_offset:82254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82254*FLEN/8, x4, x1, x2) - -inst_27419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x798fffff; valaddr_reg:x3; val_offset:82257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82257*FLEN/8, x4, x1, x2) - -inst_27420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x799fffff; valaddr_reg:x3; val_offset:82260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82260*FLEN/8, x4, x1, x2) - -inst_27421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79bfffff; valaddr_reg:x3; val_offset:82263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82263*FLEN/8, x4, x1, x2) - -inst_27422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79c00000; valaddr_reg:x3; val_offset:82266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82266*FLEN/8, x4, x1, x2) - -inst_27423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79e00000; valaddr_reg:x3; val_offset:82269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82269*FLEN/8, x4, x1, x2) - -inst_27424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79f00000; valaddr_reg:x3; val_offset:82272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82272*FLEN/8, x4, x1, x2) - -inst_27425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79f80000; valaddr_reg:x3; val_offset:82275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82275*FLEN/8, x4, x1, x2) - -inst_27426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fc0000; valaddr_reg:x3; val_offset:82278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82278*FLEN/8, x4, x1, x2) - -inst_27427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fe0000; valaddr_reg:x3; val_offset:82281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82281*FLEN/8, x4, x1, x2) - -inst_27428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ff0000; valaddr_reg:x3; val_offset:82284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82284*FLEN/8, x4, x1, x2) - -inst_27429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ff8000; valaddr_reg:x3; val_offset:82287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82287*FLEN/8, x4, x1, x2) - -inst_27430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ffc000; valaddr_reg:x3; val_offset:82290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82290*FLEN/8, x4, x1, x2) - -inst_27431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ffe000; valaddr_reg:x3; val_offset:82293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82293*FLEN/8, x4, x1, x2) - -inst_27432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fff000; valaddr_reg:x3; val_offset:82296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82296*FLEN/8, x4, x1, x2) - -inst_27433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fff800; valaddr_reg:x3; val_offset:82299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82299*FLEN/8, x4, x1, x2) - -inst_27434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fffc00; valaddr_reg:x3; val_offset:82302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82302*FLEN/8, x4, x1, x2) - -inst_27435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fffe00; valaddr_reg:x3; val_offset:82305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82305*FLEN/8, x4, x1, x2) - -inst_27436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ffff00; valaddr_reg:x3; val_offset:82308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82308*FLEN/8, x4, x1, x2) - -inst_27437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ffff80; valaddr_reg:x3; val_offset:82311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82311*FLEN/8, x4, x1, x2) - -inst_27438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ffffc0; valaddr_reg:x3; val_offset:82314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82314*FLEN/8, x4, x1, x2) - -inst_27439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ffffe0; valaddr_reg:x3; val_offset:82317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82317*FLEN/8, x4, x1, x2) - -inst_27440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fffff0; valaddr_reg:x3; val_offset:82320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82320*FLEN/8, x4, x1, x2) - -inst_27441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fffff8; valaddr_reg:x3; val_offset:82323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82323*FLEN/8, x4, x1, x2) - -inst_27442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fffffc; valaddr_reg:x3; val_offset:82326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82326*FLEN/8, x4, x1, x2) - -inst_27443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79fffffe; valaddr_reg:x3; val_offset:82329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82329*FLEN/8, x4, x1, x2) - -inst_27444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x79ffffff; valaddr_reg:x3; val_offset:82332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82332*FLEN/8, x4, x1, x2) - -inst_27445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f000001; valaddr_reg:x3; val_offset:82335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82335*FLEN/8, x4, x1, x2) - -inst_27446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f000003; valaddr_reg:x3; val_offset:82338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82338*FLEN/8, x4, x1, x2) - -inst_27447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f000007; valaddr_reg:x3; val_offset:82341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82341*FLEN/8, x4, x1, x2) - -inst_27448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f199999; valaddr_reg:x3; val_offset:82344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82344*FLEN/8, x4, x1, x2) - -inst_27449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f249249; valaddr_reg:x3; val_offset:82347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82347*FLEN/8, x4, x1, x2) - -inst_27450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f333333; valaddr_reg:x3; val_offset:82350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82350*FLEN/8, x4, x1, x2) - -inst_27451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:82353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82353*FLEN/8, x4, x1, x2) - -inst_27452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:82356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82356*FLEN/8, x4, x1, x2) - -inst_27453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f444444; valaddr_reg:x3; val_offset:82359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82359*FLEN/8, x4, x1, x2) - -inst_27454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:82362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82362*FLEN/8, x4, x1, x2) - -inst_27455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:82365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82365*FLEN/8, x4, x1, x2) - -inst_27456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f666666; valaddr_reg:x3; val_offset:82368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82368*FLEN/8, x4, x1, x2) - -inst_27457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:82371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82371*FLEN/8, x4, x1, x2) - -inst_27458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:82374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82374*FLEN/8, x4, x1, x2) - -inst_27459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:82377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82377*FLEN/8, x4, x1, x2) - -inst_27460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:82380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82380*FLEN/8, x4, x1, x2) - -inst_27461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:82383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82383*FLEN/8, x4, x1, x2) - -inst_27462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:82386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82386*FLEN/8, x4, x1, x2) - -inst_27463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:82389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82389*FLEN/8, x4, x1, x2) - -inst_27464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:82392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82392*FLEN/8, x4, x1, x2) - -inst_27465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:82395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82395*FLEN/8, x4, x1, x2) - -inst_27466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:82398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82398*FLEN/8, x4, x1, x2) - -inst_27467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:82401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82401*FLEN/8, x4, x1, x2) - -inst_27468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:82404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82404*FLEN/8, x4, x1, x2) - -inst_27469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:82407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82407*FLEN/8, x4, x1, x2) - -inst_27470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:82410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82410*FLEN/8, x4, x1, x2) - -inst_27471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:82413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82413*FLEN/8, x4, x1, x2) - -inst_27472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:82416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82416*FLEN/8, x4, x1, x2) - -inst_27473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:82419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82419*FLEN/8, x4, x1, x2) - -inst_27474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:82422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82422*FLEN/8, x4, x1, x2) - -inst_27475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:82425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82425*FLEN/8, x4, x1, x2) - -inst_27476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:82428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82428*FLEN/8, x4, x1, x2) - -inst_27477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7800000; valaddr_reg:x3; val_offset:82431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82431*FLEN/8, x4, x1, x2) - -inst_27478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7800001; valaddr_reg:x3; val_offset:82434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82434*FLEN/8, x4, x1, x2) - -inst_27479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7800003; valaddr_reg:x3; val_offset:82437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82437*FLEN/8, x4, x1, x2) - -inst_27480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7800007; valaddr_reg:x3; val_offset:82440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82440*FLEN/8, x4, x1, x2) - -inst_27481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x780000f; valaddr_reg:x3; val_offset:82443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82443*FLEN/8, x4, x1, x2) - -inst_27482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x780001f; valaddr_reg:x3; val_offset:82446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82446*FLEN/8, x4, x1, x2) - -inst_27483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x780003f; valaddr_reg:x3; val_offset:82449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82449*FLEN/8, x4, x1, x2) - -inst_27484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x780007f; valaddr_reg:x3; val_offset:82452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82452*FLEN/8, x4, x1, x2) - -inst_27485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x78000ff; valaddr_reg:x3; val_offset:82455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82455*FLEN/8, x4, x1, x2) - -inst_27486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x78001ff; valaddr_reg:x3; val_offset:82458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82458*FLEN/8, x4, x1, x2) - -inst_27487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x78003ff; valaddr_reg:x3; val_offset:82461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82461*FLEN/8, x4, x1, x2) - -inst_27488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x78007ff; valaddr_reg:x3; val_offset:82464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82464*FLEN/8, x4, x1, x2) - -inst_27489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7800fff; valaddr_reg:x3; val_offset:82467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82467*FLEN/8, x4, x1, x2) - -inst_27490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7801fff; valaddr_reg:x3; val_offset:82470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82470*FLEN/8, x4, x1, x2) - -inst_27491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7803fff; valaddr_reg:x3; val_offset:82473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82473*FLEN/8, x4, x1, x2) - -inst_27492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7807fff; valaddr_reg:x3; val_offset:82476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82476*FLEN/8, x4, x1, x2) - -inst_27493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x780ffff; valaddr_reg:x3; val_offset:82479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82479*FLEN/8, x4, x1, x2) - -inst_27494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x781ffff; valaddr_reg:x3; val_offset:82482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82482*FLEN/8, x4, x1, x2) - -inst_27495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x783ffff; valaddr_reg:x3; val_offset:82485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82485*FLEN/8, x4, x1, x2) - -inst_27496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x787ffff; valaddr_reg:x3; val_offset:82488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82488*FLEN/8, x4, x1, x2) - -inst_27497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x78fffff; valaddr_reg:x3; val_offset:82491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82491*FLEN/8, x4, x1, x2) - -inst_27498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x79fffff; valaddr_reg:x3; val_offset:82494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82494*FLEN/8, x4, x1, x2) - -inst_27499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7bfffff; valaddr_reg:x3; val_offset:82497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82497*FLEN/8, x4, x1, x2) - -inst_27500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7c00000; valaddr_reg:x3; val_offset:82500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82500*FLEN/8, x4, x1, x2) - -inst_27501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7e00000; valaddr_reg:x3; val_offset:82503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82503*FLEN/8, x4, x1, x2) - -inst_27502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7f00000; valaddr_reg:x3; val_offset:82506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82506*FLEN/8, x4, x1, x2) - -inst_27503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7f80000; valaddr_reg:x3; val_offset:82509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82509*FLEN/8, x4, x1, x2) - -inst_27504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fc0000; valaddr_reg:x3; val_offset:82512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82512*FLEN/8, x4, x1, x2) - -inst_27505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fe0000; valaddr_reg:x3; val_offset:82515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82515*FLEN/8, x4, x1, x2) - -inst_27506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ff0000; valaddr_reg:x3; val_offset:82518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82518*FLEN/8, x4, x1, x2) - -inst_27507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ff8000; valaddr_reg:x3; val_offset:82521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82521*FLEN/8, x4, x1, x2) - -inst_27508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffc000; valaddr_reg:x3; val_offset:82524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82524*FLEN/8, x4, x1, x2) - -inst_27509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffe000; valaddr_reg:x3; val_offset:82527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82527*FLEN/8, x4, x1, x2) - -inst_27510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fff000; valaddr_reg:x3; val_offset:82530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82530*FLEN/8, x4, x1, x2) - -inst_27511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fff800; valaddr_reg:x3; val_offset:82533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82533*FLEN/8, x4, x1, x2) - -inst_27512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fffc00; valaddr_reg:x3; val_offset:82536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82536*FLEN/8, x4, x1, x2) - -inst_27513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fffe00; valaddr_reg:x3; val_offset:82539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82539*FLEN/8, x4, x1, x2) - -inst_27514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffff00; valaddr_reg:x3; val_offset:82542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82542*FLEN/8, x4, x1, x2) - -inst_27515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffff80; valaddr_reg:x3; val_offset:82545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82545*FLEN/8, x4, x1, x2) - -inst_27516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffffc0; valaddr_reg:x3; val_offset:82548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82548*FLEN/8, x4, x1, x2) - -inst_27517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffffe0; valaddr_reg:x3; val_offset:82551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82551*FLEN/8, x4, x1, x2) - -inst_27518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fffff0; valaddr_reg:x3; val_offset:82554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82554*FLEN/8, x4, x1, x2) - -inst_27519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fffff8; valaddr_reg:x3; val_offset:82557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82557*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_216) - -inst_27520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fffffc; valaddr_reg:x3; val_offset:82560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82560*FLEN/8, x4, x1, x2) - -inst_27521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7fffffe; valaddr_reg:x3; val_offset:82563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82563*FLEN/8, x4, x1, x2) - -inst_27522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; -op3val:0x7ffffff; valaddr_reg:x3; val_offset:82566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82566*FLEN/8, x4, x1, x2) - -inst_27523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e000000; valaddr_reg:x3; val_offset:82569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82569*FLEN/8, x4, x1, x2) - -inst_27524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e000001; valaddr_reg:x3; val_offset:82572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82572*FLEN/8, x4, x1, x2) - -inst_27525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e000003; valaddr_reg:x3; val_offset:82575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82575*FLEN/8, x4, x1, x2) - -inst_27526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e000007; valaddr_reg:x3; val_offset:82578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82578*FLEN/8, x4, x1, x2) - -inst_27527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e00000f; valaddr_reg:x3; val_offset:82581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82581*FLEN/8, x4, x1, x2) - -inst_27528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e00001f; valaddr_reg:x3; val_offset:82584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82584*FLEN/8, x4, x1, x2) - -inst_27529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e00003f; valaddr_reg:x3; val_offset:82587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82587*FLEN/8, x4, x1, x2) - -inst_27530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e00007f; valaddr_reg:x3; val_offset:82590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82590*FLEN/8, x4, x1, x2) - -inst_27531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e0000ff; valaddr_reg:x3; val_offset:82593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82593*FLEN/8, x4, x1, x2) - -inst_27532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e0001ff; valaddr_reg:x3; val_offset:82596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82596*FLEN/8, x4, x1, x2) - -inst_27533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e0003ff; valaddr_reg:x3; val_offset:82599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82599*FLEN/8, x4, x1, x2) - -inst_27534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e0007ff; valaddr_reg:x3; val_offset:82602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82602*FLEN/8, x4, x1, x2) - -inst_27535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e000fff; valaddr_reg:x3; val_offset:82605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82605*FLEN/8, x4, x1, x2) - -inst_27536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e001fff; valaddr_reg:x3; val_offset:82608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82608*FLEN/8, x4, x1, x2) - -inst_27537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e003fff; valaddr_reg:x3; val_offset:82611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82611*FLEN/8, x4, x1, x2) - -inst_27538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e007fff; valaddr_reg:x3; val_offset:82614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82614*FLEN/8, x4, x1, x2) - -inst_27539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e00ffff; valaddr_reg:x3; val_offset:82617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82617*FLEN/8, x4, x1, x2) - -inst_27540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e01ffff; valaddr_reg:x3; val_offset:82620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82620*FLEN/8, x4, x1, x2) - -inst_27541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e03ffff; valaddr_reg:x3; val_offset:82623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82623*FLEN/8, x4, x1, x2) - -inst_27542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e07ffff; valaddr_reg:x3; val_offset:82626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82626*FLEN/8, x4, x1, x2) - -inst_27543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e0fffff; valaddr_reg:x3; val_offset:82629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82629*FLEN/8, x4, x1, x2) - -inst_27544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e1fffff; valaddr_reg:x3; val_offset:82632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82632*FLEN/8, x4, x1, x2) - -inst_27545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e3fffff; valaddr_reg:x3; val_offset:82635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82635*FLEN/8, x4, x1, x2) - -inst_27546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e400000; valaddr_reg:x3; val_offset:82638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82638*FLEN/8, x4, x1, x2) - -inst_27547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e600000; valaddr_reg:x3; val_offset:82641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82641*FLEN/8, x4, x1, x2) - -inst_27548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e700000; valaddr_reg:x3; val_offset:82644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82644*FLEN/8, x4, x1, x2) - -inst_27549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e780000; valaddr_reg:x3; val_offset:82647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82647*FLEN/8, x4, x1, x2) - -inst_27550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7c0000; valaddr_reg:x3; val_offset:82650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82650*FLEN/8, x4, x1, x2) - -inst_27551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7e0000; valaddr_reg:x3; val_offset:82653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82653*FLEN/8, x4, x1, x2) - -inst_27552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7f0000; valaddr_reg:x3; val_offset:82656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82656*FLEN/8, x4, x1, x2) - -inst_27553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7f8000; valaddr_reg:x3; val_offset:82659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82659*FLEN/8, x4, x1, x2) - -inst_27554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7fc000; valaddr_reg:x3; val_offset:82662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82662*FLEN/8, x4, x1, x2) - -inst_27555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7fe000; valaddr_reg:x3; val_offset:82665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82665*FLEN/8, x4, x1, x2) - -inst_27556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7ff000; valaddr_reg:x3; val_offset:82668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82668*FLEN/8, x4, x1, x2) - -inst_27557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7ff800; valaddr_reg:x3; val_offset:82671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82671*FLEN/8, x4, x1, x2) - -inst_27558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7ffc00; valaddr_reg:x3; val_offset:82674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82674*FLEN/8, x4, x1, x2) - -inst_27559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7ffe00; valaddr_reg:x3; val_offset:82677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82677*FLEN/8, x4, x1, x2) - -inst_27560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7fff00; valaddr_reg:x3; val_offset:82680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82680*FLEN/8, x4, x1, x2) - -inst_27561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7fff80; valaddr_reg:x3; val_offset:82683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82683*FLEN/8, x4, x1, x2) - -inst_27562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7fffc0; valaddr_reg:x3; val_offset:82686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82686*FLEN/8, x4, x1, x2) - -inst_27563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7fffe0; valaddr_reg:x3; val_offset:82689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82689*FLEN/8, x4, x1, x2) - -inst_27564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7ffff0; valaddr_reg:x3; val_offset:82692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82692*FLEN/8, x4, x1, x2) - -inst_27565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7ffff8; valaddr_reg:x3; val_offset:82695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82695*FLEN/8, x4, x1, x2) - -inst_27566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7ffffc; valaddr_reg:x3; val_offset:82698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82698*FLEN/8, x4, x1, x2) - -inst_27567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7ffffe; valaddr_reg:x3; val_offset:82701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82701*FLEN/8, x4, x1, x2) - -inst_27568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x2e7fffff; valaddr_reg:x3; val_offset:82704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82704*FLEN/8, x4, x1, x2) - -inst_27569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3f800001; valaddr_reg:x3; val_offset:82707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82707*FLEN/8, x4, x1, x2) - -inst_27570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3f800003; valaddr_reg:x3; val_offset:82710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82710*FLEN/8, x4, x1, x2) - -inst_27571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3f800007; valaddr_reg:x3; val_offset:82713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82713*FLEN/8, x4, x1, x2) - -inst_27572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3f999999; valaddr_reg:x3; val_offset:82716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82716*FLEN/8, x4, x1, x2) - -inst_27573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:82719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82719*FLEN/8, x4, x1, x2) - -inst_27574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:82722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82722*FLEN/8, x4, x1, x2) - -inst_27575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:82725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82725*FLEN/8, x4, x1, x2) - -inst_27576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:82728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82728*FLEN/8, x4, x1, x2) - -inst_27577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:82731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82731*FLEN/8, x4, x1, x2) - -inst_27578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:82734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82734*FLEN/8, x4, x1, x2) - -inst_27579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:82737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82737*FLEN/8, x4, x1, x2) - -inst_27580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:82740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82740*FLEN/8, x4, x1, x2) - -inst_27581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:82743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82743*FLEN/8, x4, x1, x2) - -inst_27582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:82746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82746*FLEN/8, x4, x1, x2) - -inst_27583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:82749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82749*FLEN/8, x4, x1, x2) - -inst_27584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:82752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82752*FLEN/8, x4, x1, x2) - -inst_27585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee800000; valaddr_reg:x3; val_offset:82755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82755*FLEN/8, x4, x1, x2) - -inst_27586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee800001; valaddr_reg:x3; val_offset:82758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82758*FLEN/8, x4, x1, x2) - -inst_27587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee800003; valaddr_reg:x3; val_offset:82761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82761*FLEN/8, x4, x1, x2) - -inst_27588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee800007; valaddr_reg:x3; val_offset:82764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82764*FLEN/8, x4, x1, x2) - -inst_27589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee80000f; valaddr_reg:x3; val_offset:82767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82767*FLEN/8, x4, x1, x2) - -inst_27590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee80001f; valaddr_reg:x3; val_offset:82770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82770*FLEN/8, x4, x1, x2) - -inst_27591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee80003f; valaddr_reg:x3; val_offset:82773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82773*FLEN/8, x4, x1, x2) - -inst_27592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee80007f; valaddr_reg:x3; val_offset:82776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82776*FLEN/8, x4, x1, x2) - -inst_27593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee8000ff; valaddr_reg:x3; val_offset:82779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82779*FLEN/8, x4, x1, x2) - -inst_27594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee8001ff; valaddr_reg:x3; val_offset:82782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82782*FLEN/8, x4, x1, x2) - -inst_27595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee8003ff; valaddr_reg:x3; val_offset:82785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82785*FLEN/8, x4, x1, x2) - -inst_27596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee8007ff; valaddr_reg:x3; val_offset:82788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82788*FLEN/8, x4, x1, x2) - -inst_27597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee800fff; valaddr_reg:x3; val_offset:82791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82791*FLEN/8, x4, x1, x2) - -inst_27598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee801fff; valaddr_reg:x3; val_offset:82794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82794*FLEN/8, x4, x1, x2) - -inst_27599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee803fff; valaddr_reg:x3; val_offset:82797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82797*FLEN/8, x4, x1, x2) - -inst_27600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee807fff; valaddr_reg:x3; val_offset:82800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82800*FLEN/8, x4, x1, x2) - -inst_27601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee80ffff; valaddr_reg:x3; val_offset:82803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82803*FLEN/8, x4, x1, x2) - -inst_27602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee81ffff; valaddr_reg:x3; val_offset:82806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82806*FLEN/8, x4, x1, x2) - -inst_27603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee83ffff; valaddr_reg:x3; val_offset:82809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82809*FLEN/8, x4, x1, x2) - -inst_27604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee87ffff; valaddr_reg:x3; val_offset:82812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82812*FLEN/8, x4, x1, x2) - -inst_27605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee8fffff; valaddr_reg:x3; val_offset:82815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82815*FLEN/8, x4, x1, x2) - -inst_27606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xee9fffff; valaddr_reg:x3; val_offset:82818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82818*FLEN/8, x4, x1, x2) - -inst_27607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeebfffff; valaddr_reg:x3; val_offset:82821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82821*FLEN/8, x4, x1, x2) - -inst_27608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeec00000; valaddr_reg:x3; val_offset:82824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82824*FLEN/8, x4, x1, x2) - -inst_27609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeee00000; valaddr_reg:x3; val_offset:82827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82827*FLEN/8, x4, x1, x2) - -inst_27610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeef00000; valaddr_reg:x3; val_offset:82830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82830*FLEN/8, x4, x1, x2) - -inst_27611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeef80000; valaddr_reg:x3; val_offset:82833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82833*FLEN/8, x4, x1, x2) - -inst_27612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefc0000; valaddr_reg:x3; val_offset:82836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82836*FLEN/8, x4, x1, x2) - -inst_27613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefe0000; valaddr_reg:x3; val_offset:82839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82839*FLEN/8, x4, x1, x2) - -inst_27614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeff0000; valaddr_reg:x3; val_offset:82842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82842*FLEN/8, x4, x1, x2) - -inst_27615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeff8000; valaddr_reg:x3; val_offset:82845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82845*FLEN/8, x4, x1, x2) - -inst_27616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeffc000; valaddr_reg:x3; val_offset:82848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82848*FLEN/8, x4, x1, x2) - -inst_27617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeffe000; valaddr_reg:x3; val_offset:82851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82851*FLEN/8, x4, x1, x2) - -inst_27618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefff000; valaddr_reg:x3; val_offset:82854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82854*FLEN/8, x4, x1, x2) - -inst_27619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefff800; valaddr_reg:x3; val_offset:82857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82857*FLEN/8, x4, x1, x2) - -inst_27620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefffc00; valaddr_reg:x3; val_offset:82860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82860*FLEN/8, x4, x1, x2) - -inst_27621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefffe00; valaddr_reg:x3; val_offset:82863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82863*FLEN/8, x4, x1, x2) - -inst_27622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeffff00; valaddr_reg:x3; val_offset:82866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82866*FLEN/8, x4, x1, x2) - -inst_27623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeffff80; valaddr_reg:x3; val_offset:82869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82869*FLEN/8, x4, x1, x2) - -inst_27624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeffffc0; valaddr_reg:x3; val_offset:82872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82872*FLEN/8, x4, x1, x2) - -inst_27625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeffffe0; valaddr_reg:x3; val_offset:82875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82875*FLEN/8, x4, x1, x2) - -inst_27626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefffff0; valaddr_reg:x3; val_offset:82878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82878*FLEN/8, x4, x1, x2) - -inst_27627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefffff8; valaddr_reg:x3; val_offset:82881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82881*FLEN/8, x4, x1, x2) - -inst_27628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefffffc; valaddr_reg:x3; val_offset:82884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82884*FLEN/8, x4, x1, x2) - -inst_27629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeefffffe; valaddr_reg:x3; val_offset:82887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82887*FLEN/8, x4, x1, x2) - -inst_27630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xeeffffff; valaddr_reg:x3; val_offset:82890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82890*FLEN/8, x4, x1, x2) - -inst_27631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff000001; valaddr_reg:x3; val_offset:82893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82893*FLEN/8, x4, x1, x2) - -inst_27632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff000003; valaddr_reg:x3; val_offset:82896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82896*FLEN/8, x4, x1, x2) - -inst_27633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff000007; valaddr_reg:x3; val_offset:82899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82899*FLEN/8, x4, x1, x2) - -inst_27634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff199999; valaddr_reg:x3; val_offset:82902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82902*FLEN/8, x4, x1, x2) - -inst_27635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff249249; valaddr_reg:x3; val_offset:82905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82905*FLEN/8, x4, x1, x2) - -inst_27636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff333333; valaddr_reg:x3; val_offset:82908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82908*FLEN/8, x4, x1, x2) - -inst_27637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:82911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82911*FLEN/8, x4, x1, x2) - -inst_27638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:82914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82914*FLEN/8, x4, x1, x2) - -inst_27639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff444444; valaddr_reg:x3; val_offset:82917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82917*FLEN/8, x4, x1, x2) - -inst_27640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:82920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82920*FLEN/8, x4, x1, x2) - -inst_27641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:82923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82923*FLEN/8, x4, x1, x2) - -inst_27642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff666666; valaddr_reg:x3; val_offset:82926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82926*FLEN/8, x4, x1, x2) - -inst_27643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:82929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82929*FLEN/8, x4, x1, x2) - -inst_27644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:82932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82932*FLEN/8, x4, x1, x2) - -inst_27645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:82935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82935*FLEN/8, x4, x1, x2) - -inst_27646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:82938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82938*FLEN/8, x4, x1, x2) - -inst_27647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:82941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82941*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_217) - -inst_27648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:82944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82944*FLEN/8, x4, x1, x2) - -inst_27649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:82947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82947*FLEN/8, x4, x1, x2) - -inst_27650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:82950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82950*FLEN/8, x4, x1, x2) - -inst_27651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:82953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82953*FLEN/8, x4, x1, x2) - -inst_27652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:82956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82956*FLEN/8, x4, x1, x2) - -inst_27653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:82959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82959*FLEN/8, x4, x1, x2) - -inst_27654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:82962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82962*FLEN/8, x4, x1, x2) - -inst_27655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:82965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82965*FLEN/8, x4, x1, x2) - -inst_27656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:82968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82968*FLEN/8, x4, x1, x2) - -inst_27657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:82971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82971*FLEN/8, x4, x1, x2) - -inst_27658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:82974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82974*FLEN/8, x4, x1, x2) - -inst_27659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:82977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82977*FLEN/8, x4, x1, x2) - -inst_27660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:82980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82980*FLEN/8, x4, x1, x2) - -inst_27661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:82983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82983*FLEN/8, x4, x1, x2) - -inst_27662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:82986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82986*FLEN/8, x4, x1, x2) - -inst_27663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a000000; valaddr_reg:x3; val_offset:82989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82989*FLEN/8, x4, x1, x2) - -inst_27664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a000001; valaddr_reg:x3; val_offset:82992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82992*FLEN/8, x4, x1, x2) - -inst_27665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a000003; valaddr_reg:x3; val_offset:82995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82995*FLEN/8, x4, x1, x2) - -inst_27666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a000007; valaddr_reg:x3; val_offset:82998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82998*FLEN/8, x4, x1, x2) - -inst_27667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a00000f; valaddr_reg:x3; val_offset:83001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83001*FLEN/8, x4, x1, x2) - -inst_27668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a00001f; valaddr_reg:x3; val_offset:83004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83004*FLEN/8, x4, x1, x2) - -inst_27669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a00003f; valaddr_reg:x3; val_offset:83007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83007*FLEN/8, x4, x1, x2) - -inst_27670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a00007f; valaddr_reg:x3; val_offset:83010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83010*FLEN/8, x4, x1, x2) - -inst_27671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a0000ff; valaddr_reg:x3; val_offset:83013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83013*FLEN/8, x4, x1, x2) - -inst_27672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a0001ff; valaddr_reg:x3; val_offset:83016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83016*FLEN/8, x4, x1, x2) - -inst_27673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a0003ff; valaddr_reg:x3; val_offset:83019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83019*FLEN/8, x4, x1, x2) - -inst_27674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a0007ff; valaddr_reg:x3; val_offset:83022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83022*FLEN/8, x4, x1, x2) - -inst_27675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a000fff; valaddr_reg:x3; val_offset:83025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83025*FLEN/8, x4, x1, x2) - -inst_27676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a001fff; valaddr_reg:x3; val_offset:83028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83028*FLEN/8, x4, x1, x2) - -inst_27677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a003fff; valaddr_reg:x3; val_offset:83031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83031*FLEN/8, x4, x1, x2) - -inst_27678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a007fff; valaddr_reg:x3; val_offset:83034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83034*FLEN/8, x4, x1, x2) - -inst_27679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a00ffff; valaddr_reg:x3; val_offset:83037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83037*FLEN/8, x4, x1, x2) - -inst_27680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a01ffff; valaddr_reg:x3; val_offset:83040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83040*FLEN/8, x4, x1, x2) - -inst_27681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a03ffff; valaddr_reg:x3; val_offset:83043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83043*FLEN/8, x4, x1, x2) - -inst_27682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a07ffff; valaddr_reg:x3; val_offset:83046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83046*FLEN/8, x4, x1, x2) - -inst_27683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a0fffff; valaddr_reg:x3; val_offset:83049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83049*FLEN/8, x4, x1, x2) - -inst_27684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a1fffff; valaddr_reg:x3; val_offset:83052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83052*FLEN/8, x4, x1, x2) - -inst_27685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a3fffff; valaddr_reg:x3; val_offset:83055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83055*FLEN/8, x4, x1, x2) - -inst_27686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a400000; valaddr_reg:x3; val_offset:83058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83058*FLEN/8, x4, x1, x2) - -inst_27687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a600000; valaddr_reg:x3; val_offset:83061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83061*FLEN/8, x4, x1, x2) - -inst_27688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a700000; valaddr_reg:x3; val_offset:83064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83064*FLEN/8, x4, x1, x2) - -inst_27689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a780000; valaddr_reg:x3; val_offset:83067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83067*FLEN/8, x4, x1, x2) - -inst_27690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7c0000; valaddr_reg:x3; val_offset:83070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83070*FLEN/8, x4, x1, x2) - -inst_27691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7e0000; valaddr_reg:x3; val_offset:83073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83073*FLEN/8, x4, x1, x2) - -inst_27692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7f0000; valaddr_reg:x3; val_offset:83076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83076*FLEN/8, x4, x1, x2) - -inst_27693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7f8000; valaddr_reg:x3; val_offset:83079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83079*FLEN/8, x4, x1, x2) - -inst_27694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7fc000; valaddr_reg:x3; val_offset:83082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83082*FLEN/8, x4, x1, x2) - -inst_27695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7fe000; valaddr_reg:x3; val_offset:83085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83085*FLEN/8, x4, x1, x2) - -inst_27696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7ff000; valaddr_reg:x3; val_offset:83088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83088*FLEN/8, x4, x1, x2) - -inst_27697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7ff800; valaddr_reg:x3; val_offset:83091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83091*FLEN/8, x4, x1, x2) - -inst_27698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:83094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83094*FLEN/8, x4, x1, x2) - -inst_27699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:83097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83097*FLEN/8, x4, x1, x2) - -inst_27700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7fff00; valaddr_reg:x3; val_offset:83100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83100*FLEN/8, x4, x1, x2) - -inst_27701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7fff80; valaddr_reg:x3; val_offset:83103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83103*FLEN/8, x4, x1, x2) - -inst_27702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:83106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83106*FLEN/8, x4, x1, x2) - -inst_27703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:83109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83109*FLEN/8, x4, x1, x2) - -inst_27704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:83112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83112*FLEN/8, x4, x1, x2) - -inst_27705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:83115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83115*FLEN/8, x4, x1, x2) - -inst_27706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:83118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83118*FLEN/8, x4, x1, x2) - -inst_27707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:83121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83121*FLEN/8, x4, x1, x2) - -inst_27708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; -op3val:0x8a7fffff; valaddr_reg:x3; val_offset:83124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83124*FLEN/8, x4, x1, x2) - -inst_27709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c800000; valaddr_reg:x3; val_offset:83127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83127*FLEN/8, x4, x1, x2) - -inst_27710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c800001; valaddr_reg:x3; val_offset:83130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83130*FLEN/8, x4, x1, x2) - -inst_27711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c800003; valaddr_reg:x3; val_offset:83133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83133*FLEN/8, x4, x1, x2) - -inst_27712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c800007; valaddr_reg:x3; val_offset:83136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83136*FLEN/8, x4, x1, x2) - -inst_27713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c80000f; valaddr_reg:x3; val_offset:83139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83139*FLEN/8, x4, x1, x2) - -inst_27714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c80001f; valaddr_reg:x3; val_offset:83142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83142*FLEN/8, x4, x1, x2) - -inst_27715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c80003f; valaddr_reg:x3; val_offset:83145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83145*FLEN/8, x4, x1, x2) - -inst_27716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c80007f; valaddr_reg:x3; val_offset:83148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83148*FLEN/8, x4, x1, x2) - -inst_27717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c8000ff; valaddr_reg:x3; val_offset:83151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83151*FLEN/8, x4, x1, x2) - -inst_27718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c8001ff; valaddr_reg:x3; val_offset:83154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83154*FLEN/8, x4, x1, x2) - -inst_27719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c8003ff; valaddr_reg:x3; val_offset:83157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83157*FLEN/8, x4, x1, x2) - -inst_27720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c8007ff; valaddr_reg:x3; val_offset:83160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83160*FLEN/8, x4, x1, x2) - -inst_27721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c800fff; valaddr_reg:x3; val_offset:83163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83163*FLEN/8, x4, x1, x2) - -inst_27722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c801fff; valaddr_reg:x3; val_offset:83166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83166*FLEN/8, x4, x1, x2) - -inst_27723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c803fff; valaddr_reg:x3; val_offset:83169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83169*FLEN/8, x4, x1, x2) - -inst_27724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c807fff; valaddr_reg:x3; val_offset:83172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83172*FLEN/8, x4, x1, x2) - -inst_27725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c80ffff; valaddr_reg:x3; val_offset:83175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83175*FLEN/8, x4, x1, x2) - -inst_27726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c81ffff; valaddr_reg:x3; val_offset:83178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83178*FLEN/8, x4, x1, x2) - -inst_27727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c83ffff; valaddr_reg:x3; val_offset:83181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83181*FLEN/8, x4, x1, x2) - -inst_27728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c87ffff; valaddr_reg:x3; val_offset:83184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83184*FLEN/8, x4, x1, x2) - -inst_27729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c8fffff; valaddr_reg:x3; val_offset:83187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83187*FLEN/8, x4, x1, x2) - -inst_27730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6c9fffff; valaddr_reg:x3; val_offset:83190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83190*FLEN/8, x4, x1, x2) - -inst_27731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cbfffff; valaddr_reg:x3; val_offset:83193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83193*FLEN/8, x4, x1, x2) - -inst_27732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cc00000; valaddr_reg:x3; val_offset:83196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83196*FLEN/8, x4, x1, x2) - -inst_27733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6ce00000; valaddr_reg:x3; val_offset:83199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83199*FLEN/8, x4, x1, x2) - -inst_27734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cf00000; valaddr_reg:x3; val_offset:83202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83202*FLEN/8, x4, x1, x2) - -inst_27735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cf80000; valaddr_reg:x3; val_offset:83205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83205*FLEN/8, x4, x1, x2) - -inst_27736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfc0000; valaddr_reg:x3; val_offset:83208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83208*FLEN/8, x4, x1, x2) - -inst_27737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfe0000; valaddr_reg:x3; val_offset:83211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83211*FLEN/8, x4, x1, x2) - -inst_27738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cff0000; valaddr_reg:x3; val_offset:83214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83214*FLEN/8, x4, x1, x2) - -inst_27739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cff8000; valaddr_reg:x3; val_offset:83217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83217*FLEN/8, x4, x1, x2) - -inst_27740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cffc000; valaddr_reg:x3; val_offset:83220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83220*FLEN/8, x4, x1, x2) - -inst_27741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cffe000; valaddr_reg:x3; val_offset:83223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83223*FLEN/8, x4, x1, x2) - -inst_27742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfff000; valaddr_reg:x3; val_offset:83226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83226*FLEN/8, x4, x1, x2) - -inst_27743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfff800; valaddr_reg:x3; val_offset:83229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83229*FLEN/8, x4, x1, x2) - -inst_27744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfffc00; valaddr_reg:x3; val_offset:83232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83232*FLEN/8, x4, x1, x2) - -inst_27745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfffe00; valaddr_reg:x3; val_offset:83235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83235*FLEN/8, x4, x1, x2) - -inst_27746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cffff00; valaddr_reg:x3; val_offset:83238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83238*FLEN/8, x4, x1, x2) - -inst_27747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cffff80; valaddr_reg:x3; val_offset:83241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83241*FLEN/8, x4, x1, x2) - -inst_27748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cffffc0; valaddr_reg:x3; val_offset:83244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83244*FLEN/8, x4, x1, x2) - -inst_27749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cffffe0; valaddr_reg:x3; val_offset:83247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83247*FLEN/8, x4, x1, x2) - -inst_27750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfffff0; valaddr_reg:x3; val_offset:83250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83250*FLEN/8, x4, x1, x2) - -inst_27751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfffff8; valaddr_reg:x3; val_offset:83253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83253*FLEN/8, x4, x1, x2) - -inst_27752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfffffc; valaddr_reg:x3; val_offset:83256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83256*FLEN/8, x4, x1, x2) - -inst_27753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cfffffe; valaddr_reg:x3; val_offset:83259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83259*FLEN/8, x4, x1, x2) - -inst_27754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x6cffffff; valaddr_reg:x3; val_offset:83262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83262*FLEN/8, x4, x1, x2) - -inst_27755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f000001; valaddr_reg:x3; val_offset:83265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83265*FLEN/8, x4, x1, x2) - -inst_27756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f000003; valaddr_reg:x3; val_offset:83268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83268*FLEN/8, x4, x1, x2) - -inst_27757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f000007; valaddr_reg:x3; val_offset:83271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83271*FLEN/8, x4, x1, x2) - -inst_27758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f199999; valaddr_reg:x3; val_offset:83274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83274*FLEN/8, x4, x1, x2) - -inst_27759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f249249; valaddr_reg:x3; val_offset:83277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83277*FLEN/8, x4, x1, x2) - -inst_27760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f333333; valaddr_reg:x3; val_offset:83280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83280*FLEN/8, x4, x1, x2) - -inst_27761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:83283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83283*FLEN/8, x4, x1, x2) - -inst_27762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:83286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83286*FLEN/8, x4, x1, x2) - -inst_27763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f444444; valaddr_reg:x3; val_offset:83289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83289*FLEN/8, x4, x1, x2) - -inst_27764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:83292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83292*FLEN/8, x4, x1, x2) - -inst_27765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:83295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83295*FLEN/8, x4, x1, x2) - -inst_27766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f666666; valaddr_reg:x3; val_offset:83298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83298*FLEN/8, x4, x1, x2) - -inst_27767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:83301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83301*FLEN/8, x4, x1, x2) - -inst_27768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:83304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83304*FLEN/8, x4, x1, x2) - -inst_27769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:83307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83307*FLEN/8, x4, x1, x2) - -inst_27770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:83310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83310*FLEN/8, x4, x1, x2) - -inst_27771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa800000; valaddr_reg:x3; val_offset:83313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83313*FLEN/8, x4, x1, x2) - -inst_27772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa800001; valaddr_reg:x3; val_offset:83316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83316*FLEN/8, x4, x1, x2) - -inst_27773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa800003; valaddr_reg:x3; val_offset:83319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83319*FLEN/8, x4, x1, x2) - -inst_27774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa800007; valaddr_reg:x3; val_offset:83322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83322*FLEN/8, x4, x1, x2) - -inst_27775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa80000f; valaddr_reg:x3; val_offset:83325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83325*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_218) - -inst_27776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa80001f; valaddr_reg:x3; val_offset:83328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83328*FLEN/8, x4, x1, x2) - -inst_27777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa80003f; valaddr_reg:x3; val_offset:83331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83331*FLEN/8, x4, x1, x2) - -inst_27778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa80007f; valaddr_reg:x3; val_offset:83334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83334*FLEN/8, x4, x1, x2) - -inst_27779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa8000ff; valaddr_reg:x3; val_offset:83337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83337*FLEN/8, x4, x1, x2) - -inst_27780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa8001ff; valaddr_reg:x3; val_offset:83340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83340*FLEN/8, x4, x1, x2) - -inst_27781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa8003ff; valaddr_reg:x3; val_offset:83343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83343*FLEN/8, x4, x1, x2) - -inst_27782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa8007ff; valaddr_reg:x3; val_offset:83346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83346*FLEN/8, x4, x1, x2) - -inst_27783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa800fff; valaddr_reg:x3; val_offset:83349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83349*FLEN/8, x4, x1, x2) - -inst_27784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa801fff; valaddr_reg:x3; val_offset:83352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83352*FLEN/8, x4, x1, x2) - -inst_27785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa803fff; valaddr_reg:x3; val_offset:83355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83355*FLEN/8, x4, x1, x2) - -inst_27786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa807fff; valaddr_reg:x3; val_offset:83358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83358*FLEN/8, x4, x1, x2) - -inst_27787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa80ffff; valaddr_reg:x3; val_offset:83361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83361*FLEN/8, x4, x1, x2) - -inst_27788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa81ffff; valaddr_reg:x3; val_offset:83364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83364*FLEN/8, x4, x1, x2) - -inst_27789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa83ffff; valaddr_reg:x3; val_offset:83367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83367*FLEN/8, x4, x1, x2) - -inst_27790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa87ffff; valaddr_reg:x3; val_offset:83370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83370*FLEN/8, x4, x1, x2) - -inst_27791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa8fffff; valaddr_reg:x3; val_offset:83373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83373*FLEN/8, x4, x1, x2) - -inst_27792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaa9fffff; valaddr_reg:x3; val_offset:83376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83376*FLEN/8, x4, x1, x2) - -inst_27793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaabfffff; valaddr_reg:x3; val_offset:83379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83379*FLEN/8, x4, x1, x2) - -inst_27794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaac00000; valaddr_reg:x3; val_offset:83382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83382*FLEN/8, x4, x1, x2) - -inst_27795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaae00000; valaddr_reg:x3; val_offset:83385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83385*FLEN/8, x4, x1, x2) - -inst_27796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaf00000; valaddr_reg:x3; val_offset:83388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83388*FLEN/8, x4, x1, x2) - -inst_27797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaf80000; valaddr_reg:x3; val_offset:83391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83391*FLEN/8, x4, x1, x2) - -inst_27798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafc0000; valaddr_reg:x3; val_offset:83394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83394*FLEN/8, x4, x1, x2) - -inst_27799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafe0000; valaddr_reg:x3; val_offset:83397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83397*FLEN/8, x4, x1, x2) - -inst_27800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaff0000; valaddr_reg:x3; val_offset:83400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83400*FLEN/8, x4, x1, x2) - -inst_27801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaff8000; valaddr_reg:x3; val_offset:83403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83403*FLEN/8, x4, x1, x2) - -inst_27802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaffc000; valaddr_reg:x3; val_offset:83406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83406*FLEN/8, x4, x1, x2) - -inst_27803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaffe000; valaddr_reg:x3; val_offset:83409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83409*FLEN/8, x4, x1, x2) - -inst_27804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafff000; valaddr_reg:x3; val_offset:83412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83412*FLEN/8, x4, x1, x2) - -inst_27805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafff800; valaddr_reg:x3; val_offset:83415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83415*FLEN/8, x4, x1, x2) - -inst_27806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafffc00; valaddr_reg:x3; val_offset:83418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83418*FLEN/8, x4, x1, x2) - -inst_27807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafffe00; valaddr_reg:x3; val_offset:83421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83421*FLEN/8, x4, x1, x2) - -inst_27808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaffff00; valaddr_reg:x3; val_offset:83424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83424*FLEN/8, x4, x1, x2) - -inst_27809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaffff80; valaddr_reg:x3; val_offset:83427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83427*FLEN/8, x4, x1, x2) - -inst_27810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaffffc0; valaddr_reg:x3; val_offset:83430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83430*FLEN/8, x4, x1, x2) - -inst_27811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaffffe0; valaddr_reg:x3; val_offset:83433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83433*FLEN/8, x4, x1, x2) - -inst_27812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafffff0; valaddr_reg:x3; val_offset:83436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83436*FLEN/8, x4, x1, x2) - -inst_27813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafffff8; valaddr_reg:x3; val_offset:83439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83439*FLEN/8, x4, x1, x2) - -inst_27814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafffffc; valaddr_reg:x3; val_offset:83442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83442*FLEN/8, x4, x1, x2) - -inst_27815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaafffffe; valaddr_reg:x3; val_offset:83445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83445*FLEN/8, x4, x1, x2) - -inst_27816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xaaffffff; valaddr_reg:x3; val_offset:83448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83448*FLEN/8, x4, x1, x2) - -inst_27817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbf800001; valaddr_reg:x3; val_offset:83451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83451*FLEN/8, x4, x1, x2) - -inst_27818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbf800003; valaddr_reg:x3; val_offset:83454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83454*FLEN/8, x4, x1, x2) - -inst_27819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbf800007; valaddr_reg:x3; val_offset:83457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83457*FLEN/8, x4, x1, x2) - -inst_27820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbf999999; valaddr_reg:x3; val_offset:83460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83460*FLEN/8, x4, x1, x2) - -inst_27821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:83463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83463*FLEN/8, x4, x1, x2) - -inst_27822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:83466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83466*FLEN/8, x4, x1, x2) - -inst_27823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:83469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83469*FLEN/8, x4, x1, x2) - -inst_27824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:83472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83472*FLEN/8, x4, x1, x2) - -inst_27825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:83475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83475*FLEN/8, x4, x1, x2) - -inst_27826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:83478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83478*FLEN/8, x4, x1, x2) - -inst_27827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:83481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83481*FLEN/8, x4, x1, x2) - -inst_27828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:83484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83484*FLEN/8, x4, x1, x2) - -inst_27829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:83487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83487*FLEN/8, x4, x1, x2) - -inst_27830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:83490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83490*FLEN/8, x4, x1, x2) - -inst_27831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:83493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83493*FLEN/8, x4, x1, x2) - -inst_27832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:83496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83496*FLEN/8, x4, x1, x2) - -inst_27833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7000000; valaddr_reg:x3; val_offset:83499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83499*FLEN/8, x4, x1, x2) - -inst_27834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7000001; valaddr_reg:x3; val_offset:83502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83502*FLEN/8, x4, x1, x2) - -inst_27835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7000003; valaddr_reg:x3; val_offset:83505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83505*FLEN/8, x4, x1, x2) - -inst_27836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7000007; valaddr_reg:x3; val_offset:83508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83508*FLEN/8, x4, x1, x2) - -inst_27837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa700000f; valaddr_reg:x3; val_offset:83511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83511*FLEN/8, x4, x1, x2) - -inst_27838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa700001f; valaddr_reg:x3; val_offset:83514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83514*FLEN/8, x4, x1, x2) - -inst_27839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa700003f; valaddr_reg:x3; val_offset:83517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83517*FLEN/8, x4, x1, x2) - -inst_27840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa700007f; valaddr_reg:x3; val_offset:83520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83520*FLEN/8, x4, x1, x2) - -inst_27841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa70000ff; valaddr_reg:x3; val_offset:83523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83523*FLEN/8, x4, x1, x2) - -inst_27842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa70001ff; valaddr_reg:x3; val_offset:83526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83526*FLEN/8, x4, x1, x2) - -inst_27843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa70003ff; valaddr_reg:x3; val_offset:83529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83529*FLEN/8, x4, x1, x2) - -inst_27844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa70007ff; valaddr_reg:x3; val_offset:83532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83532*FLEN/8, x4, x1, x2) - -inst_27845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7000fff; valaddr_reg:x3; val_offset:83535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83535*FLEN/8, x4, x1, x2) - -inst_27846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7001fff; valaddr_reg:x3; val_offset:83538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83538*FLEN/8, x4, x1, x2) - -inst_27847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7003fff; valaddr_reg:x3; val_offset:83541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83541*FLEN/8, x4, x1, x2) - -inst_27848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7007fff; valaddr_reg:x3; val_offset:83544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83544*FLEN/8, x4, x1, x2) - -inst_27849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa700ffff; valaddr_reg:x3; val_offset:83547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83547*FLEN/8, x4, x1, x2) - -inst_27850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa701ffff; valaddr_reg:x3; val_offset:83550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83550*FLEN/8, x4, x1, x2) - -inst_27851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa703ffff; valaddr_reg:x3; val_offset:83553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83553*FLEN/8, x4, x1, x2) - -inst_27852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa707ffff; valaddr_reg:x3; val_offset:83556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83556*FLEN/8, x4, x1, x2) - -inst_27853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa70fffff; valaddr_reg:x3; val_offset:83559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83559*FLEN/8, x4, x1, x2) - -inst_27854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa71fffff; valaddr_reg:x3; val_offset:83562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83562*FLEN/8, x4, x1, x2) - -inst_27855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa73fffff; valaddr_reg:x3; val_offset:83565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83565*FLEN/8, x4, x1, x2) - -inst_27856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7400000; valaddr_reg:x3; val_offset:83568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83568*FLEN/8, x4, x1, x2) - -inst_27857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7600000; valaddr_reg:x3; val_offset:83571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83571*FLEN/8, x4, x1, x2) - -inst_27858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7700000; valaddr_reg:x3; val_offset:83574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83574*FLEN/8, x4, x1, x2) - -inst_27859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa7780000; valaddr_reg:x3; val_offset:83577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83577*FLEN/8, x4, x1, x2) - -inst_27860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77c0000; valaddr_reg:x3; val_offset:83580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83580*FLEN/8, x4, x1, x2) - -inst_27861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77e0000; valaddr_reg:x3; val_offset:83583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83583*FLEN/8, x4, x1, x2) - -inst_27862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77f0000; valaddr_reg:x3; val_offset:83586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83586*FLEN/8, x4, x1, x2) - -inst_27863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77f8000; valaddr_reg:x3; val_offset:83589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83589*FLEN/8, x4, x1, x2) - -inst_27864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77fc000; valaddr_reg:x3; val_offset:83592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83592*FLEN/8, x4, x1, x2) - -inst_27865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77fe000; valaddr_reg:x3; val_offset:83595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83595*FLEN/8, x4, x1, x2) - -inst_27866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77ff000; valaddr_reg:x3; val_offset:83598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83598*FLEN/8, x4, x1, x2) - -inst_27867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77ff800; valaddr_reg:x3; val_offset:83601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83601*FLEN/8, x4, x1, x2) - -inst_27868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77ffc00; valaddr_reg:x3; val_offset:83604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83604*FLEN/8, x4, x1, x2) - -inst_27869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77ffe00; valaddr_reg:x3; val_offset:83607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83607*FLEN/8, x4, x1, x2) - -inst_27870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77fff00; valaddr_reg:x3; val_offset:83610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83610*FLEN/8, x4, x1, x2) - -inst_27871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77fff80; valaddr_reg:x3; val_offset:83613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83613*FLEN/8, x4, x1, x2) - -inst_27872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77fffc0; valaddr_reg:x3; val_offset:83616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83616*FLEN/8, x4, x1, x2) - -inst_27873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77fffe0; valaddr_reg:x3; val_offset:83619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83619*FLEN/8, x4, x1, x2) - -inst_27874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77ffff0; valaddr_reg:x3; val_offset:83622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83622*FLEN/8, x4, x1, x2) - -inst_27875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77ffff8; valaddr_reg:x3; val_offset:83625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83625*FLEN/8, x4, x1, x2) - -inst_27876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77ffffc; valaddr_reg:x3; val_offset:83628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83628*FLEN/8, x4, x1, x2) - -inst_27877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77ffffe; valaddr_reg:x3; val_offset:83631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83631*FLEN/8, x4, x1, x2) - -inst_27878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xa77fffff; valaddr_reg:x3; val_offset:83634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83634*FLEN/8, x4, x1, x2) - -inst_27879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbf800001; valaddr_reg:x3; val_offset:83637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83637*FLEN/8, x4, x1, x2) - -inst_27880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbf800003; valaddr_reg:x3; val_offset:83640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83640*FLEN/8, x4, x1, x2) - -inst_27881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbf800007; valaddr_reg:x3; val_offset:83643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83643*FLEN/8, x4, x1, x2) - -inst_27882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbf999999; valaddr_reg:x3; val_offset:83646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83646*FLEN/8, x4, x1, x2) - -inst_27883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:83649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83649*FLEN/8, x4, x1, x2) - -inst_27884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:83652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83652*FLEN/8, x4, x1, x2) - -inst_27885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:83655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83655*FLEN/8, x4, x1, x2) - -inst_27886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:83658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83658*FLEN/8, x4, x1, x2) - -inst_27887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:83661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83661*FLEN/8, x4, x1, x2) - -inst_27888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:83664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83664*FLEN/8, x4, x1, x2) - -inst_27889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:83667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83667*FLEN/8, x4, x1, x2) - -inst_27890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:83670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83670*FLEN/8, x4, x1, x2) - -inst_27891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:83673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83673*FLEN/8, x4, x1, x2) - -inst_27892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:83676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83676*FLEN/8, x4, x1, x2) - -inst_27893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:83679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83679*FLEN/8, x4, x1, x2) - -inst_27894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:83682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83682*FLEN/8, x4, x1, x2) - -inst_27895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:83685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83685*FLEN/8, x4, x1, x2) - -inst_27896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:83688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83688*FLEN/8, x4, x1, x2) - -inst_27897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:83691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83691*FLEN/8, x4, x1, x2) - -inst_27898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:83694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83694*FLEN/8, x4, x1, x2) - -inst_27899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:83697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83697*FLEN/8, x4, x1, x2) - -inst_27900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:83700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83700*FLEN/8, x4, x1, x2) - -inst_27901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:83703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83703*FLEN/8, x4, x1, x2) - -inst_27902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:83706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83706*FLEN/8, x4, x1, x2) - -inst_27903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:83709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83709*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_219) - -inst_27904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:83712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83712*FLEN/8, x4, x1, x2) - -inst_27905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:83715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83715*FLEN/8, x4, x1, x2) - -inst_27906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:83718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83718*FLEN/8, x4, x1, x2) - -inst_27907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:83721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83721*FLEN/8, x4, x1, x2) - -inst_27908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:83724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83724*FLEN/8, x4, x1, x2) - -inst_27909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:83727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83727*FLEN/8, x4, x1, x2) - -inst_27910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:83730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83730*FLEN/8, x4, x1, x2) - -inst_27911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82000000; valaddr_reg:x3; val_offset:83733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83733*FLEN/8, x4, x1, x2) - -inst_27912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82000001; valaddr_reg:x3; val_offset:83736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83736*FLEN/8, x4, x1, x2) - -inst_27913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82000003; valaddr_reg:x3; val_offset:83739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83739*FLEN/8, x4, x1, x2) - -inst_27914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82000007; valaddr_reg:x3; val_offset:83742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83742*FLEN/8, x4, x1, x2) - -inst_27915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8200000f; valaddr_reg:x3; val_offset:83745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83745*FLEN/8, x4, x1, x2) - -inst_27916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8200001f; valaddr_reg:x3; val_offset:83748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83748*FLEN/8, x4, x1, x2) - -inst_27917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8200003f; valaddr_reg:x3; val_offset:83751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83751*FLEN/8, x4, x1, x2) - -inst_27918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8200007f; valaddr_reg:x3; val_offset:83754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83754*FLEN/8, x4, x1, x2) - -inst_27919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x820000ff; valaddr_reg:x3; val_offset:83757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83757*FLEN/8, x4, x1, x2) - -inst_27920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x820001ff; valaddr_reg:x3; val_offset:83760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83760*FLEN/8, x4, x1, x2) - -inst_27921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x820003ff; valaddr_reg:x3; val_offset:83763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83763*FLEN/8, x4, x1, x2) - -inst_27922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x820007ff; valaddr_reg:x3; val_offset:83766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83766*FLEN/8, x4, x1, x2) - -inst_27923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82000fff; valaddr_reg:x3; val_offset:83769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83769*FLEN/8, x4, x1, x2) - -inst_27924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82001fff; valaddr_reg:x3; val_offset:83772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83772*FLEN/8, x4, x1, x2) - -inst_27925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82003fff; valaddr_reg:x3; val_offset:83775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83775*FLEN/8, x4, x1, x2) - -inst_27926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82007fff; valaddr_reg:x3; val_offset:83778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83778*FLEN/8, x4, x1, x2) - -inst_27927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8200ffff; valaddr_reg:x3; val_offset:83781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83781*FLEN/8, x4, x1, x2) - -inst_27928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8201ffff; valaddr_reg:x3; val_offset:83784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83784*FLEN/8, x4, x1, x2) - -inst_27929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8203ffff; valaddr_reg:x3; val_offset:83787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83787*FLEN/8, x4, x1, x2) - -inst_27930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x8207ffff; valaddr_reg:x3; val_offset:83790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83790*FLEN/8, x4, x1, x2) - -inst_27931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x820fffff; valaddr_reg:x3; val_offset:83793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83793*FLEN/8, x4, x1, x2) - -inst_27932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x821fffff; valaddr_reg:x3; val_offset:83796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83796*FLEN/8, x4, x1, x2) - -inst_27933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x823fffff; valaddr_reg:x3; val_offset:83799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83799*FLEN/8, x4, x1, x2) - -inst_27934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82400000; valaddr_reg:x3; val_offset:83802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83802*FLEN/8, x4, x1, x2) - -inst_27935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82600000; valaddr_reg:x3; val_offset:83805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83805*FLEN/8, x4, x1, x2) - -inst_27936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82700000; valaddr_reg:x3; val_offset:83808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83808*FLEN/8, x4, x1, x2) - -inst_27937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x82780000; valaddr_reg:x3; val_offset:83811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83811*FLEN/8, x4, x1, x2) - -inst_27938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827c0000; valaddr_reg:x3; val_offset:83814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83814*FLEN/8, x4, x1, x2) - -inst_27939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827e0000; valaddr_reg:x3; val_offset:83817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83817*FLEN/8, x4, x1, x2) - -inst_27940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827f0000; valaddr_reg:x3; val_offset:83820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83820*FLEN/8, x4, x1, x2) - -inst_27941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827f8000; valaddr_reg:x3; val_offset:83823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83823*FLEN/8, x4, x1, x2) - -inst_27942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827fc000; valaddr_reg:x3; val_offset:83826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83826*FLEN/8, x4, x1, x2) - -inst_27943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827fe000; valaddr_reg:x3; val_offset:83829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83829*FLEN/8, x4, x1, x2) - -inst_27944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827ff000; valaddr_reg:x3; val_offset:83832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83832*FLEN/8, x4, x1, x2) - -inst_27945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827ff800; valaddr_reg:x3; val_offset:83835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83835*FLEN/8, x4, x1, x2) - -inst_27946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827ffc00; valaddr_reg:x3; val_offset:83838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83838*FLEN/8, x4, x1, x2) - -inst_27947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827ffe00; valaddr_reg:x3; val_offset:83841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83841*FLEN/8, x4, x1, x2) - -inst_27948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827fff00; valaddr_reg:x3; val_offset:83844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83844*FLEN/8, x4, x1, x2) - -inst_27949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827fff80; valaddr_reg:x3; val_offset:83847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83847*FLEN/8, x4, x1, x2) - -inst_27950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827fffc0; valaddr_reg:x3; val_offset:83850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83850*FLEN/8, x4, x1, x2) - -inst_27951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827fffe0; valaddr_reg:x3; val_offset:83853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83853*FLEN/8, x4, x1, x2) - -inst_27952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827ffff0; valaddr_reg:x3; val_offset:83856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83856*FLEN/8, x4, x1, x2) - -inst_27953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827ffff8; valaddr_reg:x3; val_offset:83859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83859*FLEN/8, x4, x1, x2) - -inst_27954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827ffffc; valaddr_reg:x3; val_offset:83862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83862*FLEN/8, x4, x1, x2) - -inst_27955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827ffffe; valaddr_reg:x3; val_offset:83865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83865*FLEN/8, x4, x1, x2) - -inst_27956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; -op3val:0x827fffff; valaddr_reg:x3; val_offset:83868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83868*FLEN/8, x4, x1, x2) - -inst_27957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:83871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83871*FLEN/8, x4, x1, x2) - -inst_27958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:83874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83874*FLEN/8, x4, x1, x2) - -inst_27959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:83877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83877*FLEN/8, x4, x1, x2) - -inst_27960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:83880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83880*FLEN/8, x4, x1, x2) - -inst_27961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:83883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83883*FLEN/8, x4, x1, x2) - -inst_27962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:83886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83886*FLEN/8, x4, x1, x2) - -inst_27963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:83889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83889*FLEN/8, x4, x1, x2) - -inst_27964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:83892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83892*FLEN/8, x4, x1, x2) - -inst_27965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:83895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83895*FLEN/8, x4, x1, x2) - -inst_27966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:83898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83898*FLEN/8, x4, x1, x2) - -inst_27967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:83901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83901*FLEN/8, x4, x1, x2) - -inst_27968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:83904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83904*FLEN/8, x4, x1, x2) - -inst_27969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:83907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83907*FLEN/8, x4, x1, x2) - -inst_27970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:83910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83910*FLEN/8, x4, x1, x2) - -inst_27971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:83913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83913*FLEN/8, x4, x1, x2) - -inst_27972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:83916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83916*FLEN/8, x4, x1, x2) - -inst_27973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2000000; valaddr_reg:x3; val_offset:83919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83919*FLEN/8, x4, x1, x2) - -inst_27974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2000001; valaddr_reg:x3; val_offset:83922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83922*FLEN/8, x4, x1, x2) - -inst_27975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2000003; valaddr_reg:x3; val_offset:83925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83925*FLEN/8, x4, x1, x2) - -inst_27976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2000007; valaddr_reg:x3; val_offset:83928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83928*FLEN/8, x4, x1, x2) - -inst_27977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x200000f; valaddr_reg:x3; val_offset:83931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83931*FLEN/8, x4, x1, x2) - -inst_27978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x200001f; valaddr_reg:x3; val_offset:83934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83934*FLEN/8, x4, x1, x2) - -inst_27979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x200003f; valaddr_reg:x3; val_offset:83937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83937*FLEN/8, x4, x1, x2) - -inst_27980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x200007f; valaddr_reg:x3; val_offset:83940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83940*FLEN/8, x4, x1, x2) - -inst_27981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x20000ff; valaddr_reg:x3; val_offset:83943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83943*FLEN/8, x4, x1, x2) - -inst_27982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x20001ff; valaddr_reg:x3; val_offset:83946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83946*FLEN/8, x4, x1, x2) - -inst_27983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x20003ff; valaddr_reg:x3; val_offset:83949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83949*FLEN/8, x4, x1, x2) - -inst_27984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x20007ff; valaddr_reg:x3; val_offset:83952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83952*FLEN/8, x4, x1, x2) - -inst_27985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2000fff; valaddr_reg:x3; val_offset:83955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83955*FLEN/8, x4, x1, x2) - -inst_27986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2001fff; valaddr_reg:x3; val_offset:83958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83958*FLEN/8, x4, x1, x2) - -inst_27987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2003fff; valaddr_reg:x3; val_offset:83961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83961*FLEN/8, x4, x1, x2) - -inst_27988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2007fff; valaddr_reg:x3; val_offset:83964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83964*FLEN/8, x4, x1, x2) - -inst_27989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x200ffff; valaddr_reg:x3; val_offset:83967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83967*FLEN/8, x4, x1, x2) - -inst_27990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x201ffff; valaddr_reg:x3; val_offset:83970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83970*FLEN/8, x4, x1, x2) - -inst_27991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x203ffff; valaddr_reg:x3; val_offset:83973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83973*FLEN/8, x4, x1, x2) - -inst_27992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x207ffff; valaddr_reg:x3; val_offset:83976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83976*FLEN/8, x4, x1, x2) - -inst_27993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x20fffff; valaddr_reg:x3; val_offset:83979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83979*FLEN/8, x4, x1, x2) - -inst_27994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x21fffff; valaddr_reg:x3; val_offset:83982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83982*FLEN/8, x4, x1, x2) - -inst_27995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x23fffff; valaddr_reg:x3; val_offset:83985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83985*FLEN/8, x4, x1, x2) - -inst_27996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2400000; valaddr_reg:x3; val_offset:83988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83988*FLEN/8, x4, x1, x2) - -inst_27997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2600000; valaddr_reg:x3; val_offset:83991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83991*FLEN/8, x4, x1, x2) - -inst_27998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2700000; valaddr_reg:x3; val_offset:83994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83994*FLEN/8, x4, x1, x2) - -inst_27999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x2780000; valaddr_reg:x3; val_offset:83997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83997*FLEN/8, x4, x1, x2) - -inst_28000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27c0000; valaddr_reg:x3; val_offset:84000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84000*FLEN/8, x4, x1, x2) - -inst_28001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27e0000; valaddr_reg:x3; val_offset:84003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84003*FLEN/8, x4, x1, x2) - -inst_28002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27f0000; valaddr_reg:x3; val_offset:84006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84006*FLEN/8, x4, x1, x2) - -inst_28003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27f8000; valaddr_reg:x3; val_offset:84009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84009*FLEN/8, x4, x1, x2) - -inst_28004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27fc000; valaddr_reg:x3; val_offset:84012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84012*FLEN/8, x4, x1, x2) - -inst_28005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27fe000; valaddr_reg:x3; val_offset:84015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84015*FLEN/8, x4, x1, x2) - -inst_28006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27ff000; valaddr_reg:x3; val_offset:84018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84018*FLEN/8, x4, x1, x2) - -inst_28007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27ff800; valaddr_reg:x3; val_offset:84021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84021*FLEN/8, x4, x1, x2) - -inst_28008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27ffc00; valaddr_reg:x3; val_offset:84024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84024*FLEN/8, x4, x1, x2) - -inst_28009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27ffe00; valaddr_reg:x3; val_offset:84027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84027*FLEN/8, x4, x1, x2) - -inst_28010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27fff00; valaddr_reg:x3; val_offset:84030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84030*FLEN/8, x4, x1, x2) - -inst_28011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27fff80; valaddr_reg:x3; val_offset:84033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84033*FLEN/8, x4, x1, x2) - -inst_28012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27fffc0; valaddr_reg:x3; val_offset:84036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84036*FLEN/8, x4, x1, x2) - -inst_28013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27fffe0; valaddr_reg:x3; val_offset:84039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84039*FLEN/8, x4, x1, x2) - -inst_28014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27ffff0; valaddr_reg:x3; val_offset:84042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84042*FLEN/8, x4, x1, x2) - -inst_28015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27ffff8; valaddr_reg:x3; val_offset:84045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84045*FLEN/8, x4, x1, x2) - -inst_28016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27ffffc; valaddr_reg:x3; val_offset:84048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84048*FLEN/8, x4, x1, x2) - -inst_28017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27ffffe; valaddr_reg:x3; val_offset:84051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84051*FLEN/8, x4, x1, x2) - -inst_28018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; -op3val:0x27fffff; valaddr_reg:x3; val_offset:84054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84054*FLEN/8, x4, x1, x2) - -inst_28019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39800000; valaddr_reg:x3; val_offset:84057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84057*FLEN/8, x4, x1, x2) - -inst_28020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39800001; valaddr_reg:x3; val_offset:84060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84060*FLEN/8, x4, x1, x2) - -inst_28021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39800003; valaddr_reg:x3; val_offset:84063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84063*FLEN/8, x4, x1, x2) - -inst_28022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39800007; valaddr_reg:x3; val_offset:84066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84066*FLEN/8, x4, x1, x2) - -inst_28023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3980000f; valaddr_reg:x3; val_offset:84069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84069*FLEN/8, x4, x1, x2) - -inst_28024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3980001f; valaddr_reg:x3; val_offset:84072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84072*FLEN/8, x4, x1, x2) - -inst_28025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3980003f; valaddr_reg:x3; val_offset:84075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84075*FLEN/8, x4, x1, x2) - -inst_28026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3980007f; valaddr_reg:x3; val_offset:84078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84078*FLEN/8, x4, x1, x2) - -inst_28027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x398000ff; valaddr_reg:x3; val_offset:84081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84081*FLEN/8, x4, x1, x2) - -inst_28028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x398001ff; valaddr_reg:x3; val_offset:84084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84084*FLEN/8, x4, x1, x2) - -inst_28029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x398003ff; valaddr_reg:x3; val_offset:84087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84087*FLEN/8, x4, x1, x2) - -inst_28030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x398007ff; valaddr_reg:x3; val_offset:84090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84090*FLEN/8, x4, x1, x2) - -inst_28031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39800fff; valaddr_reg:x3; val_offset:84093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84093*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_220) - -inst_28032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39801fff; valaddr_reg:x3; val_offset:84096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84096*FLEN/8, x4, x1, x2) - -inst_28033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39803fff; valaddr_reg:x3; val_offset:84099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84099*FLEN/8, x4, x1, x2) - -inst_28034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39807fff; valaddr_reg:x3; val_offset:84102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84102*FLEN/8, x4, x1, x2) - -inst_28035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3980ffff; valaddr_reg:x3; val_offset:84105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84105*FLEN/8, x4, x1, x2) - -inst_28036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3981ffff; valaddr_reg:x3; val_offset:84108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84108*FLEN/8, x4, x1, x2) - -inst_28037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3983ffff; valaddr_reg:x3; val_offset:84111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84111*FLEN/8, x4, x1, x2) - -inst_28038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3987ffff; valaddr_reg:x3; val_offset:84114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84114*FLEN/8, x4, x1, x2) - -inst_28039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x398fffff; valaddr_reg:x3; val_offset:84117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84117*FLEN/8, x4, x1, x2) - -inst_28040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x399fffff; valaddr_reg:x3; val_offset:84120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84120*FLEN/8, x4, x1, x2) - -inst_28041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39bfffff; valaddr_reg:x3; val_offset:84123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84123*FLEN/8, x4, x1, x2) - -inst_28042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39c00000; valaddr_reg:x3; val_offset:84126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84126*FLEN/8, x4, x1, x2) - -inst_28043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39e00000; valaddr_reg:x3; val_offset:84129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84129*FLEN/8, x4, x1, x2) - -inst_28044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39f00000; valaddr_reg:x3; val_offset:84132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84132*FLEN/8, x4, x1, x2) - -inst_28045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39f80000; valaddr_reg:x3; val_offset:84135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84135*FLEN/8, x4, x1, x2) - -inst_28046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fc0000; valaddr_reg:x3; val_offset:84138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84138*FLEN/8, x4, x1, x2) - -inst_28047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fe0000; valaddr_reg:x3; val_offset:84141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84141*FLEN/8, x4, x1, x2) - -inst_28048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ff0000; valaddr_reg:x3; val_offset:84144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84144*FLEN/8, x4, x1, x2) - -inst_28049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ff8000; valaddr_reg:x3; val_offset:84147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84147*FLEN/8, x4, x1, x2) - -inst_28050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ffc000; valaddr_reg:x3; val_offset:84150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84150*FLEN/8, x4, x1, x2) - -inst_28051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ffe000; valaddr_reg:x3; val_offset:84153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84153*FLEN/8, x4, x1, x2) - -inst_28052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fff000; valaddr_reg:x3; val_offset:84156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84156*FLEN/8, x4, x1, x2) - -inst_28053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fff800; valaddr_reg:x3; val_offset:84159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84159*FLEN/8, x4, x1, x2) - -inst_28054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fffc00; valaddr_reg:x3; val_offset:84162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84162*FLEN/8, x4, x1, x2) - -inst_28055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fffe00; valaddr_reg:x3; val_offset:84165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84165*FLEN/8, x4, x1, x2) - -inst_28056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ffff00; valaddr_reg:x3; val_offset:84168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84168*FLEN/8, x4, x1, x2) - -inst_28057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ffff80; valaddr_reg:x3; val_offset:84171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84171*FLEN/8, x4, x1, x2) - -inst_28058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ffffc0; valaddr_reg:x3; val_offset:84174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84174*FLEN/8, x4, x1, x2) - -inst_28059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ffffe0; valaddr_reg:x3; val_offset:84177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84177*FLEN/8, x4, x1, x2) - -inst_28060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fffff0; valaddr_reg:x3; val_offset:84180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84180*FLEN/8, x4, x1, x2) - -inst_28061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fffff8; valaddr_reg:x3; val_offset:84183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84183*FLEN/8, x4, x1, x2) - -inst_28062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fffffc; valaddr_reg:x3; val_offset:84186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84186*FLEN/8, x4, x1, x2) - -inst_28063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39fffffe; valaddr_reg:x3; val_offset:84189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84189*FLEN/8, x4, x1, x2) - -inst_28064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x39ffffff; valaddr_reg:x3; val_offset:84192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84192*FLEN/8, x4, x1, x2) - -inst_28065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3f800001; valaddr_reg:x3; val_offset:84195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84195*FLEN/8, x4, x1, x2) - -inst_28066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3f800003; valaddr_reg:x3; val_offset:84198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84198*FLEN/8, x4, x1, x2) - -inst_28067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3f800007; valaddr_reg:x3; val_offset:84201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84201*FLEN/8, x4, x1, x2) - -inst_28068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3f999999; valaddr_reg:x3; val_offset:84204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84204*FLEN/8, x4, x1, x2) - -inst_28069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:84207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84207*FLEN/8, x4, x1, x2) - -inst_28070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:84210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84210*FLEN/8, x4, x1, x2) - -inst_28071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:84213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84213*FLEN/8, x4, x1, x2) - -inst_28072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:84216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84216*FLEN/8, x4, x1, x2) - -inst_28073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:84219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84219*FLEN/8, x4, x1, x2) - -inst_28074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:84222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84222*FLEN/8, x4, x1, x2) - -inst_28075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:84225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84225*FLEN/8, x4, x1, x2) - -inst_28076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:84228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84228*FLEN/8, x4, x1, x2) - -inst_28077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:84231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84231*FLEN/8, x4, x1, x2) - -inst_28078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:84234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84234*FLEN/8, x4, x1, x2) - -inst_28079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:84237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84237*FLEN/8, x4, x1, x2) - -inst_28080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:84240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84240*FLEN/8, x4, x1, x2) - -inst_28081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:84243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84243*FLEN/8, x4, x1, x2) - -inst_28082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:84246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84246*FLEN/8, x4, x1, x2) - -inst_28083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:84249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84249*FLEN/8, x4, x1, x2) - -inst_28084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:84252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84252*FLEN/8, x4, x1, x2) - -inst_28085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:84255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84255*FLEN/8, x4, x1, x2) - -inst_28086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:84258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84258*FLEN/8, x4, x1, x2) - -inst_28087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:84261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84261*FLEN/8, x4, x1, x2) - -inst_28088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:84264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84264*FLEN/8, x4, x1, x2) - -inst_28089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:84267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84267*FLEN/8, x4, x1, x2) - -inst_28090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:84270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84270*FLEN/8, x4, x1, x2) - -inst_28091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:84273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84273*FLEN/8, x4, x1, x2) - -inst_28092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:84276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84276*FLEN/8, x4, x1, x2) - -inst_28093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:84279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84279*FLEN/8, x4, x1, x2) - -inst_28094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:84282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84282*FLEN/8, x4, x1, x2) - -inst_28095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:84285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84285*FLEN/8, x4, x1, x2) - -inst_28096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:84288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84288*FLEN/8, x4, x1, x2) - -inst_28097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9800000; valaddr_reg:x3; val_offset:84291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84291*FLEN/8, x4, x1, x2) - -inst_28098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9800001; valaddr_reg:x3; val_offset:84294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84294*FLEN/8, x4, x1, x2) - -inst_28099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9800003; valaddr_reg:x3; val_offset:84297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84297*FLEN/8, x4, x1, x2) - -inst_28100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9800007; valaddr_reg:x3; val_offset:84300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84300*FLEN/8, x4, x1, x2) - -inst_28101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x980000f; valaddr_reg:x3; val_offset:84303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84303*FLEN/8, x4, x1, x2) - -inst_28102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x980001f; valaddr_reg:x3; val_offset:84306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84306*FLEN/8, x4, x1, x2) - -inst_28103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x980003f; valaddr_reg:x3; val_offset:84309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84309*FLEN/8, x4, x1, x2) - -inst_28104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x980007f; valaddr_reg:x3; val_offset:84312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84312*FLEN/8, x4, x1, x2) - -inst_28105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x98000ff; valaddr_reg:x3; val_offset:84315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84315*FLEN/8, x4, x1, x2) - -inst_28106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x98001ff; valaddr_reg:x3; val_offset:84318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84318*FLEN/8, x4, x1, x2) - -inst_28107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x98003ff; valaddr_reg:x3; val_offset:84321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84321*FLEN/8, x4, x1, x2) - -inst_28108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x98007ff; valaddr_reg:x3; val_offset:84324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84324*FLEN/8, x4, x1, x2) - -inst_28109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9800fff; valaddr_reg:x3; val_offset:84327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84327*FLEN/8, x4, x1, x2) - -inst_28110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9801fff; valaddr_reg:x3; val_offset:84330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84330*FLEN/8, x4, x1, x2) - -inst_28111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9803fff; valaddr_reg:x3; val_offset:84333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84333*FLEN/8, x4, x1, x2) - -inst_28112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9807fff; valaddr_reg:x3; val_offset:84336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84336*FLEN/8, x4, x1, x2) - -inst_28113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x980ffff; valaddr_reg:x3; val_offset:84339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84339*FLEN/8, x4, x1, x2) - -inst_28114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x981ffff; valaddr_reg:x3; val_offset:84342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84342*FLEN/8, x4, x1, x2) - -inst_28115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x983ffff; valaddr_reg:x3; val_offset:84345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84345*FLEN/8, x4, x1, x2) - -inst_28116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x987ffff; valaddr_reg:x3; val_offset:84348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84348*FLEN/8, x4, x1, x2) - -inst_28117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x98fffff; valaddr_reg:x3; val_offset:84351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84351*FLEN/8, x4, x1, x2) - -inst_28118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x99fffff; valaddr_reg:x3; val_offset:84354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84354*FLEN/8, x4, x1, x2) - -inst_28119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9bfffff; valaddr_reg:x3; val_offset:84357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84357*FLEN/8, x4, x1, x2) - -inst_28120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9c00000; valaddr_reg:x3; val_offset:84360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84360*FLEN/8, x4, x1, x2) - -inst_28121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9e00000; valaddr_reg:x3; val_offset:84363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84363*FLEN/8, x4, x1, x2) - -inst_28122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9f00000; valaddr_reg:x3; val_offset:84366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84366*FLEN/8, x4, x1, x2) - -inst_28123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9f80000; valaddr_reg:x3; val_offset:84369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84369*FLEN/8, x4, x1, x2) - -inst_28124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fc0000; valaddr_reg:x3; val_offset:84372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84372*FLEN/8, x4, x1, x2) - -inst_28125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fe0000; valaddr_reg:x3; val_offset:84375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84375*FLEN/8, x4, x1, x2) - -inst_28126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ff0000; valaddr_reg:x3; val_offset:84378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84378*FLEN/8, x4, x1, x2) - -inst_28127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ff8000; valaddr_reg:x3; val_offset:84381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84381*FLEN/8, x4, x1, x2) - -inst_28128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ffc000; valaddr_reg:x3; val_offset:84384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84384*FLEN/8, x4, x1, x2) - -inst_28129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ffe000; valaddr_reg:x3; val_offset:84387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84387*FLEN/8, x4, x1, x2) - -inst_28130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fff000; valaddr_reg:x3; val_offset:84390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84390*FLEN/8, x4, x1, x2) - -inst_28131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fff800; valaddr_reg:x3; val_offset:84393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84393*FLEN/8, x4, x1, x2) - -inst_28132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fffc00; valaddr_reg:x3; val_offset:84396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84396*FLEN/8, x4, x1, x2) - -inst_28133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fffe00; valaddr_reg:x3; val_offset:84399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84399*FLEN/8, x4, x1, x2) - -inst_28134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ffff00; valaddr_reg:x3; val_offset:84402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84402*FLEN/8, x4, x1, x2) - -inst_28135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ffff80; valaddr_reg:x3; val_offset:84405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84405*FLEN/8, x4, x1, x2) - -inst_28136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ffffc0; valaddr_reg:x3; val_offset:84408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84408*FLEN/8, x4, x1, x2) - -inst_28137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ffffe0; valaddr_reg:x3; val_offset:84411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84411*FLEN/8, x4, x1, x2) - -inst_28138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fffff0; valaddr_reg:x3; val_offset:84414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84414*FLEN/8, x4, x1, x2) - -inst_28139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fffff8; valaddr_reg:x3; val_offset:84417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84417*FLEN/8, x4, x1, x2) - -inst_28140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fffffc; valaddr_reg:x3; val_offset:84420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84420*FLEN/8, x4, x1, x2) - -inst_28141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9fffffe; valaddr_reg:x3; val_offset:84423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84423*FLEN/8, x4, x1, x2) - -inst_28142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; -op3val:0x9ffffff; valaddr_reg:x3; val_offset:84426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84426*FLEN/8, x4, x1, x2) - -inst_28143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a800000; valaddr_reg:x3; val_offset:84429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84429*FLEN/8, x4, x1, x2) - -inst_28144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a800001; valaddr_reg:x3; val_offset:84432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84432*FLEN/8, x4, x1, x2) - -inst_28145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a800003; valaddr_reg:x3; val_offset:84435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84435*FLEN/8, x4, x1, x2) - -inst_28146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a800007; valaddr_reg:x3; val_offset:84438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84438*FLEN/8, x4, x1, x2) - -inst_28147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a80000f; valaddr_reg:x3; val_offset:84441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84441*FLEN/8, x4, x1, x2) - -inst_28148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a80001f; valaddr_reg:x3; val_offset:84444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84444*FLEN/8, x4, x1, x2) - -inst_28149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a80003f; valaddr_reg:x3; val_offset:84447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84447*FLEN/8, x4, x1, x2) - -inst_28150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a80007f; valaddr_reg:x3; val_offset:84450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84450*FLEN/8, x4, x1, x2) - -inst_28151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a8000ff; valaddr_reg:x3; val_offset:84453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84453*FLEN/8, x4, x1, x2) - -inst_28152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a8001ff; valaddr_reg:x3; val_offset:84456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84456*FLEN/8, x4, x1, x2) - -inst_28153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a8003ff; valaddr_reg:x3; val_offset:84459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84459*FLEN/8, x4, x1, x2) - -inst_28154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a8007ff; valaddr_reg:x3; val_offset:84462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84462*FLEN/8, x4, x1, x2) - -inst_28155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a800fff; valaddr_reg:x3; val_offset:84465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84465*FLEN/8, x4, x1, x2) - -inst_28156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a801fff; valaddr_reg:x3; val_offset:84468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84468*FLEN/8, x4, x1, x2) - -inst_28157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a803fff; valaddr_reg:x3; val_offset:84471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84471*FLEN/8, x4, x1, x2) - -inst_28158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a807fff; valaddr_reg:x3; val_offset:84474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84474*FLEN/8, x4, x1, x2) - -inst_28159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a80ffff; valaddr_reg:x3; val_offset:84477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84477*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_221) - -inst_28160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a81ffff; valaddr_reg:x3; val_offset:84480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84480*FLEN/8, x4, x1, x2) - -inst_28161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a83ffff; valaddr_reg:x3; val_offset:84483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84483*FLEN/8, x4, x1, x2) - -inst_28162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a87ffff; valaddr_reg:x3; val_offset:84486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84486*FLEN/8, x4, x1, x2) - -inst_28163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a8fffff; valaddr_reg:x3; val_offset:84489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84489*FLEN/8, x4, x1, x2) - -inst_28164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3a9fffff; valaddr_reg:x3; val_offset:84492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84492*FLEN/8, x4, x1, x2) - -inst_28165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3abfffff; valaddr_reg:x3; val_offset:84495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84495*FLEN/8, x4, x1, x2) - -inst_28166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3ac00000; valaddr_reg:x3; val_offset:84498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84498*FLEN/8, x4, x1, x2) - -inst_28167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3ae00000; valaddr_reg:x3; val_offset:84501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84501*FLEN/8, x4, x1, x2) - -inst_28168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3af00000; valaddr_reg:x3; val_offset:84504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84504*FLEN/8, x4, x1, x2) - -inst_28169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3af80000; valaddr_reg:x3; val_offset:84507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84507*FLEN/8, x4, x1, x2) - -inst_28170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afc0000; valaddr_reg:x3; val_offset:84510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84510*FLEN/8, x4, x1, x2) - -inst_28171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afe0000; valaddr_reg:x3; val_offset:84513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84513*FLEN/8, x4, x1, x2) - -inst_28172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3aff0000; valaddr_reg:x3; val_offset:84516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84516*FLEN/8, x4, x1, x2) - -inst_28173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3aff8000; valaddr_reg:x3; val_offset:84519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84519*FLEN/8, x4, x1, x2) - -inst_28174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3affc000; valaddr_reg:x3; val_offset:84522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84522*FLEN/8, x4, x1, x2) - -inst_28175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3affe000; valaddr_reg:x3; val_offset:84525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84525*FLEN/8, x4, x1, x2) - -inst_28176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afff000; valaddr_reg:x3; val_offset:84528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84528*FLEN/8, x4, x1, x2) - -inst_28177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afff800; valaddr_reg:x3; val_offset:84531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84531*FLEN/8, x4, x1, x2) - -inst_28178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afffc00; valaddr_reg:x3; val_offset:84534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84534*FLEN/8, x4, x1, x2) - -inst_28179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afffe00; valaddr_reg:x3; val_offset:84537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84537*FLEN/8, x4, x1, x2) - -inst_28180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3affff00; valaddr_reg:x3; val_offset:84540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84540*FLEN/8, x4, x1, x2) - -inst_28181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3affff80; valaddr_reg:x3; val_offset:84543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84543*FLEN/8, x4, x1, x2) - -inst_28182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3affffc0; valaddr_reg:x3; val_offset:84546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84546*FLEN/8, x4, x1, x2) - -inst_28183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3affffe0; valaddr_reg:x3; val_offset:84549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84549*FLEN/8, x4, x1, x2) - -inst_28184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afffff0; valaddr_reg:x3; val_offset:84552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84552*FLEN/8, x4, x1, x2) - -inst_28185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afffff8; valaddr_reg:x3; val_offset:84555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84555*FLEN/8, x4, x1, x2) - -inst_28186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afffffc; valaddr_reg:x3; val_offset:84558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84558*FLEN/8, x4, x1, x2) - -inst_28187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3afffffe; valaddr_reg:x3; val_offset:84561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84561*FLEN/8, x4, x1, x2) - -inst_28188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3affffff; valaddr_reg:x3; val_offset:84564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84564*FLEN/8, x4, x1, x2) - -inst_28189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3f800001; valaddr_reg:x3; val_offset:84567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84567*FLEN/8, x4, x1, x2) - -inst_28190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3f800003; valaddr_reg:x3; val_offset:84570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84570*FLEN/8, x4, x1, x2) - -inst_28191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3f800007; valaddr_reg:x3; val_offset:84573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84573*FLEN/8, x4, x1, x2) - -inst_28192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3f999999; valaddr_reg:x3; val_offset:84576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84576*FLEN/8, x4, x1, x2) - -inst_28193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:84579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84579*FLEN/8, x4, x1, x2) - -inst_28194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:84582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84582*FLEN/8, x4, x1, x2) - -inst_28195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:84585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84585*FLEN/8, x4, x1, x2) - -inst_28196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:84588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84588*FLEN/8, x4, x1, x2) - -inst_28197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:84591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84591*FLEN/8, x4, x1, x2) - -inst_28198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:84594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84594*FLEN/8, x4, x1, x2) - -inst_28199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:84597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84597*FLEN/8, x4, x1, x2) - -inst_28200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:84600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84600*FLEN/8, x4, x1, x2) - -inst_28201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:84603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84603*FLEN/8, x4, x1, x2) - -inst_28202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:84606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84606*FLEN/8, x4, x1, x2) - -inst_28203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:84609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84609*FLEN/8, x4, x1, x2) - -inst_28204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:84612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84612*FLEN/8, x4, x1, x2) - -inst_28205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde800000; valaddr_reg:x3; val_offset:84615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84615*FLEN/8, x4, x1, x2) - -inst_28206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde800001; valaddr_reg:x3; val_offset:84618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84618*FLEN/8, x4, x1, x2) - -inst_28207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde800003; valaddr_reg:x3; val_offset:84621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84621*FLEN/8, x4, x1, x2) - -inst_28208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde800007; valaddr_reg:x3; val_offset:84624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84624*FLEN/8, x4, x1, x2) - -inst_28209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde80000f; valaddr_reg:x3; val_offset:84627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84627*FLEN/8, x4, x1, x2) - -inst_28210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde80001f; valaddr_reg:x3; val_offset:84630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84630*FLEN/8, x4, x1, x2) - -inst_28211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde80003f; valaddr_reg:x3; val_offset:84633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84633*FLEN/8, x4, x1, x2) - -inst_28212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde80007f; valaddr_reg:x3; val_offset:84636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84636*FLEN/8, x4, x1, x2) - -inst_28213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde8000ff; valaddr_reg:x3; val_offset:84639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84639*FLEN/8, x4, x1, x2) - -inst_28214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde8001ff; valaddr_reg:x3; val_offset:84642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84642*FLEN/8, x4, x1, x2) - -inst_28215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde8003ff; valaddr_reg:x3; val_offset:84645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84645*FLEN/8, x4, x1, x2) - -inst_28216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde8007ff; valaddr_reg:x3; val_offset:84648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84648*FLEN/8, x4, x1, x2) - -inst_28217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde800fff; valaddr_reg:x3; val_offset:84651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84651*FLEN/8, x4, x1, x2) - -inst_28218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde801fff; valaddr_reg:x3; val_offset:84654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84654*FLEN/8, x4, x1, x2) - -inst_28219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde803fff; valaddr_reg:x3; val_offset:84657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84657*FLEN/8, x4, x1, x2) - -inst_28220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde807fff; valaddr_reg:x3; val_offset:84660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84660*FLEN/8, x4, x1, x2) - -inst_28221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde80ffff; valaddr_reg:x3; val_offset:84663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84663*FLEN/8, x4, x1, x2) - -inst_28222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde81ffff; valaddr_reg:x3; val_offset:84666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84666*FLEN/8, x4, x1, x2) - -inst_28223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde83ffff; valaddr_reg:x3; val_offset:84669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84669*FLEN/8, x4, x1, x2) - -inst_28224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde87ffff; valaddr_reg:x3; val_offset:84672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84672*FLEN/8, x4, x1, x2) - -inst_28225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde8fffff; valaddr_reg:x3; val_offset:84675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84675*FLEN/8, x4, x1, x2) - -inst_28226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xde9fffff; valaddr_reg:x3; val_offset:84678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84678*FLEN/8, x4, x1, x2) - -inst_28227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdebfffff; valaddr_reg:x3; val_offset:84681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84681*FLEN/8, x4, x1, x2) - -inst_28228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdec00000; valaddr_reg:x3; val_offset:84684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84684*FLEN/8, x4, x1, x2) - -inst_28229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdee00000; valaddr_reg:x3; val_offset:84687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84687*FLEN/8, x4, x1, x2) - -inst_28230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdef00000; valaddr_reg:x3; val_offset:84690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84690*FLEN/8, x4, x1, x2) - -inst_28231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdef80000; valaddr_reg:x3; val_offset:84693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84693*FLEN/8, x4, x1, x2) - -inst_28232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefc0000; valaddr_reg:x3; val_offset:84696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84696*FLEN/8, x4, x1, x2) - -inst_28233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefe0000; valaddr_reg:x3; val_offset:84699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84699*FLEN/8, x4, x1, x2) - -inst_28234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeff0000; valaddr_reg:x3; val_offset:84702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84702*FLEN/8, x4, x1, x2) - -inst_28235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeff8000; valaddr_reg:x3; val_offset:84705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84705*FLEN/8, x4, x1, x2) - -inst_28236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeffc000; valaddr_reg:x3; val_offset:84708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84708*FLEN/8, x4, x1, x2) - -inst_28237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeffe000; valaddr_reg:x3; val_offset:84711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84711*FLEN/8, x4, x1, x2) - -inst_28238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefff000; valaddr_reg:x3; val_offset:84714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84714*FLEN/8, x4, x1, x2) - -inst_28239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefff800; valaddr_reg:x3; val_offset:84717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84717*FLEN/8, x4, x1, x2) - -inst_28240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefffc00; valaddr_reg:x3; val_offset:84720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84720*FLEN/8, x4, x1, x2) - -inst_28241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefffe00; valaddr_reg:x3; val_offset:84723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84723*FLEN/8, x4, x1, x2) - -inst_28242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeffff00; valaddr_reg:x3; val_offset:84726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84726*FLEN/8, x4, x1, x2) - -inst_28243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeffff80; valaddr_reg:x3; val_offset:84729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84729*FLEN/8, x4, x1, x2) - -inst_28244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeffffc0; valaddr_reg:x3; val_offset:84732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84732*FLEN/8, x4, x1, x2) - -inst_28245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeffffe0; valaddr_reg:x3; val_offset:84735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84735*FLEN/8, x4, x1, x2) - -inst_28246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefffff0; valaddr_reg:x3; val_offset:84738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84738*FLEN/8, x4, x1, x2) - -inst_28247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefffff8; valaddr_reg:x3; val_offset:84741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84741*FLEN/8, x4, x1, x2) - -inst_28248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefffffc; valaddr_reg:x3; val_offset:84744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84744*FLEN/8, x4, x1, x2) - -inst_28249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdefffffe; valaddr_reg:x3; val_offset:84747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84747*FLEN/8, x4, x1, x2) - -inst_28250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xdeffffff; valaddr_reg:x3; val_offset:84750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84750*FLEN/8, x4, x1, x2) - -inst_28251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff000001; valaddr_reg:x3; val_offset:84753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84753*FLEN/8, x4, x1, x2) - -inst_28252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff000003; valaddr_reg:x3; val_offset:84756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84756*FLEN/8, x4, x1, x2) - -inst_28253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff000007; valaddr_reg:x3; val_offset:84759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84759*FLEN/8, x4, x1, x2) - -inst_28254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff199999; valaddr_reg:x3; val_offset:84762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84762*FLEN/8, x4, x1, x2) - -inst_28255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff249249; valaddr_reg:x3; val_offset:84765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84765*FLEN/8, x4, x1, x2) - -inst_28256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff333333; valaddr_reg:x3; val_offset:84768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84768*FLEN/8, x4, x1, x2) - -inst_28257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:84771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84771*FLEN/8, x4, x1, x2) - -inst_28258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:84774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84774*FLEN/8, x4, x1, x2) - -inst_28259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff444444; valaddr_reg:x3; val_offset:84777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84777*FLEN/8, x4, x1, x2) - -inst_28260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:84780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84780*FLEN/8, x4, x1, x2) - -inst_28261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:84783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84783*FLEN/8, x4, x1, x2) - -inst_28262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff666666; valaddr_reg:x3; val_offset:84786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84786*FLEN/8, x4, x1, x2) - -inst_28263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:84789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84789*FLEN/8, x4, x1, x2) - -inst_28264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:84792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84792*FLEN/8, x4, x1, x2) - -inst_28265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:84795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84795*FLEN/8, x4, x1, x2) - -inst_28266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:84798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84798*FLEN/8, x4, x1, x2) - -inst_28267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x0; valaddr_reg:x3; val_offset:84801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84801*FLEN/8, x4, x1, x2) - -inst_28268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:84804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84804*FLEN/8, x4, x1, x2) - -inst_28269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:84807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84807*FLEN/8, x4, x1, x2) - -inst_28270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:84810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84810*FLEN/8, x4, x1, x2) - -inst_28271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xf; valaddr_reg:x3; val_offset:84813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84813*FLEN/8, x4, x1, x2) - -inst_28272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x1f; valaddr_reg:x3; val_offset:84816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84816*FLEN/8, x4, x1, x2) - -inst_28273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x3f; valaddr_reg:x3; val_offset:84819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84819*FLEN/8, x4, x1, x2) - -inst_28274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7f; valaddr_reg:x3; val_offset:84822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84822*FLEN/8, x4, x1, x2) - -inst_28275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xff; valaddr_reg:x3; val_offset:84825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84825*FLEN/8, x4, x1, x2) - -inst_28276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x1ff; valaddr_reg:x3; val_offset:84828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84828*FLEN/8, x4, x1, x2) - -inst_28277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x3ff; valaddr_reg:x3; val_offset:84831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84831*FLEN/8, x4, x1, x2) - -inst_28278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ff; valaddr_reg:x3; val_offset:84834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84834*FLEN/8, x4, x1, x2) - -inst_28279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xfff; valaddr_reg:x3; val_offset:84837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84837*FLEN/8, x4, x1, x2) - -inst_28280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x1fff; valaddr_reg:x3; val_offset:84840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84840*FLEN/8, x4, x1, x2) - -inst_28281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x3fff; valaddr_reg:x3; val_offset:84843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84843*FLEN/8, x4, x1, x2) - -inst_28282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7fff; valaddr_reg:x3; val_offset:84846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84846*FLEN/8, x4, x1, x2) - -inst_28283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xffff; valaddr_reg:x3; val_offset:84849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84849*FLEN/8, x4, x1, x2) - -inst_28284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x1ffff; valaddr_reg:x3; val_offset:84852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84852*FLEN/8, x4, x1, x2) - -inst_28285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x3ffff; valaddr_reg:x3; val_offset:84855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84855*FLEN/8, x4, x1, x2) - -inst_28286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ffff; valaddr_reg:x3; val_offset:84858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84858*FLEN/8, x4, x1, x2) - -inst_28287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xfffff; valaddr_reg:x3; val_offset:84861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84861*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_222) - -inst_28288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x1fffff; valaddr_reg:x3; val_offset:84864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84864*FLEN/8, x4, x1, x2) - -inst_28289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x3fffff; valaddr_reg:x3; val_offset:84867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84867*FLEN/8, x4, x1, x2) - -inst_28290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x400000; valaddr_reg:x3; val_offset:84870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84870*FLEN/8, x4, x1, x2) - -inst_28291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x600000; valaddr_reg:x3; val_offset:84873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84873*FLEN/8, x4, x1, x2) - -inst_28292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x700000; valaddr_reg:x3; val_offset:84876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84876*FLEN/8, x4, x1, x2) - -inst_28293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x780000; valaddr_reg:x3; val_offset:84879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84879*FLEN/8, x4, x1, x2) - -inst_28294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7c0000; valaddr_reg:x3; val_offset:84882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84882*FLEN/8, x4, x1, x2) - -inst_28295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7e0000; valaddr_reg:x3; val_offset:84885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84885*FLEN/8, x4, x1, x2) - -inst_28296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7f0000; valaddr_reg:x3; val_offset:84888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84888*FLEN/8, x4, x1, x2) - -inst_28297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7f8000; valaddr_reg:x3; val_offset:84891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84891*FLEN/8, x4, x1, x2) - -inst_28298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7fc000; valaddr_reg:x3; val_offset:84894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84894*FLEN/8, x4, x1, x2) - -inst_28299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7fe000; valaddr_reg:x3; val_offset:84897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84897*FLEN/8, x4, x1, x2) - -inst_28300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ff000; valaddr_reg:x3; val_offset:84900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84900*FLEN/8, x4, x1, x2) - -inst_28301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ff800; valaddr_reg:x3; val_offset:84903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84903*FLEN/8, x4, x1, x2) - -inst_28302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ffc00; valaddr_reg:x3; val_offset:84906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84906*FLEN/8, x4, x1, x2) - -inst_28303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ffe00; valaddr_reg:x3; val_offset:84909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84909*FLEN/8, x4, x1, x2) - -inst_28304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7fff00; valaddr_reg:x3; val_offset:84912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84912*FLEN/8, x4, x1, x2) - -inst_28305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7fff80; valaddr_reg:x3; val_offset:84915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84915*FLEN/8, x4, x1, x2) - -inst_28306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7fffc0; valaddr_reg:x3; val_offset:84918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84918*FLEN/8, x4, x1, x2) - -inst_28307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7fffe0; valaddr_reg:x3; val_offset:84921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84921*FLEN/8, x4, x1, x2) - -inst_28308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ffff0; valaddr_reg:x3; val_offset:84924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84924*FLEN/8, x4, x1, x2) - -inst_28309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:84927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84927*FLEN/8, x4, x1, x2) - -inst_28310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:84930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84930*FLEN/8, x4, x1, x2) - -inst_28311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:84933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84933*FLEN/8, x4, x1, x2) - -inst_28312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x7fffff; valaddr_reg:x3; val_offset:84936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84936*FLEN/8, x4, x1, x2) - -inst_28313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:84939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84939*FLEN/8, x4, x1, x2) - -inst_28314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:84942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84942*FLEN/8, x4, x1, x2) - -inst_28315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:84945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84945*FLEN/8, x4, x1, x2) - -inst_28316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:84948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84948*FLEN/8, x4, x1, x2) - -inst_28317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:84951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84951*FLEN/8, x4, x1, x2) - -inst_28318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:84954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84954*FLEN/8, x4, x1, x2) - -inst_28319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:84957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84957*FLEN/8, x4, x1, x2) - -inst_28320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:84960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84960*FLEN/8, x4, x1, x2) - -inst_28321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:84963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84963*FLEN/8, x4, x1, x2) - -inst_28322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:84966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84966*FLEN/8, x4, x1, x2) - -inst_28323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:84969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84969*FLEN/8, x4, x1, x2) - -inst_28324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:84972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84972*FLEN/8, x4, x1, x2) - -inst_28325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:84975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84975*FLEN/8, x4, x1, x2) - -inst_28326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:84978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84978*FLEN/8, x4, x1, x2) - -inst_28327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:84981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84981*FLEN/8, x4, x1, x2) - -inst_28328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:84984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84984*FLEN/8, x4, x1, x2) - -inst_28329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67800000; valaddr_reg:x3; val_offset:84987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84987*FLEN/8, x4, x1, x2) - -inst_28330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67800001; valaddr_reg:x3; val_offset:84990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84990*FLEN/8, x4, x1, x2) - -inst_28331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67800003; valaddr_reg:x3; val_offset:84993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84993*FLEN/8, x4, x1, x2) - -inst_28332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67800007; valaddr_reg:x3; val_offset:84996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84996*FLEN/8, x4, x1, x2) - -inst_28333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x6780000f; valaddr_reg:x3; val_offset:84999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84999*FLEN/8, x4, x1, x2) - -inst_28334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x6780001f; valaddr_reg:x3; val_offset:85002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85002*FLEN/8, x4, x1, x2) - -inst_28335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x6780003f; valaddr_reg:x3; val_offset:85005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85005*FLEN/8, x4, x1, x2) - -inst_28336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x6780007f; valaddr_reg:x3; val_offset:85008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85008*FLEN/8, x4, x1, x2) - -inst_28337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x678000ff; valaddr_reg:x3; val_offset:85011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85011*FLEN/8, x4, x1, x2) - -inst_28338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x678001ff; valaddr_reg:x3; val_offset:85014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85014*FLEN/8, x4, x1, x2) - -inst_28339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x678003ff; valaddr_reg:x3; val_offset:85017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85017*FLEN/8, x4, x1, x2) - -inst_28340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x678007ff; valaddr_reg:x3; val_offset:85020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85020*FLEN/8, x4, x1, x2) - -inst_28341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67800fff; valaddr_reg:x3; val_offset:85023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85023*FLEN/8, x4, x1, x2) - -inst_28342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67801fff; valaddr_reg:x3; val_offset:85026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85026*FLEN/8, x4, x1, x2) - -inst_28343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67803fff; valaddr_reg:x3; val_offset:85029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85029*FLEN/8, x4, x1, x2) - -inst_28344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67807fff; valaddr_reg:x3; val_offset:85032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85032*FLEN/8, x4, x1, x2) - -inst_28345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x6780ffff; valaddr_reg:x3; val_offset:85035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85035*FLEN/8, x4, x1, x2) - -inst_28346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x6781ffff; valaddr_reg:x3; val_offset:85038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85038*FLEN/8, x4, x1, x2) - -inst_28347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x6783ffff; valaddr_reg:x3; val_offset:85041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85041*FLEN/8, x4, x1, x2) - -inst_28348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x6787ffff; valaddr_reg:x3; val_offset:85044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85044*FLEN/8, x4, x1, x2) - -inst_28349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x678fffff; valaddr_reg:x3; val_offset:85047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85047*FLEN/8, x4, x1, x2) - -inst_28350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x679fffff; valaddr_reg:x3; val_offset:85050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85050*FLEN/8, x4, x1, x2) - -inst_28351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67bfffff; valaddr_reg:x3; val_offset:85053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85053*FLEN/8, x4, x1, x2) - -inst_28352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67c00000; valaddr_reg:x3; val_offset:85056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85056*FLEN/8, x4, x1, x2) - -inst_28353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67e00000; valaddr_reg:x3; val_offset:85059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85059*FLEN/8, x4, x1, x2) - -inst_28354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67f00000; valaddr_reg:x3; val_offset:85062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85062*FLEN/8, x4, x1, x2) - -inst_28355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67f80000; valaddr_reg:x3; val_offset:85065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85065*FLEN/8, x4, x1, x2) - -inst_28356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fc0000; valaddr_reg:x3; val_offset:85068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85068*FLEN/8, x4, x1, x2) - -inst_28357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fe0000; valaddr_reg:x3; val_offset:85071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85071*FLEN/8, x4, x1, x2) - -inst_28358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ff0000; valaddr_reg:x3; val_offset:85074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85074*FLEN/8, x4, x1, x2) - -inst_28359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ff8000; valaddr_reg:x3; val_offset:85077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85077*FLEN/8, x4, x1, x2) - -inst_28360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ffc000; valaddr_reg:x3; val_offset:85080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85080*FLEN/8, x4, x1, x2) - -inst_28361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ffe000; valaddr_reg:x3; val_offset:85083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85083*FLEN/8, x4, x1, x2) - -inst_28362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fff000; valaddr_reg:x3; val_offset:85086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85086*FLEN/8, x4, x1, x2) - -inst_28363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fff800; valaddr_reg:x3; val_offset:85089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85089*FLEN/8, x4, x1, x2) - -inst_28364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fffc00; valaddr_reg:x3; val_offset:85092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85092*FLEN/8, x4, x1, x2) - -inst_28365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fffe00; valaddr_reg:x3; val_offset:85095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85095*FLEN/8, x4, x1, x2) - -inst_28366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ffff00; valaddr_reg:x3; val_offset:85098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85098*FLEN/8, x4, x1, x2) - -inst_28367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ffff80; valaddr_reg:x3; val_offset:85101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85101*FLEN/8, x4, x1, x2) - -inst_28368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ffffc0; valaddr_reg:x3; val_offset:85104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85104*FLEN/8, x4, x1, x2) - -inst_28369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ffffe0; valaddr_reg:x3; val_offset:85107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85107*FLEN/8, x4, x1, x2) - -inst_28370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fffff0; valaddr_reg:x3; val_offset:85110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85110*FLEN/8, x4, x1, x2) - -inst_28371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fffff8; valaddr_reg:x3; val_offset:85113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85113*FLEN/8, x4, x1, x2) - -inst_28372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fffffc; valaddr_reg:x3; val_offset:85116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85116*FLEN/8, x4, x1, x2) - -inst_28373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67fffffe; valaddr_reg:x3; val_offset:85119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85119*FLEN/8, x4, x1, x2) - -inst_28374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x67ffffff; valaddr_reg:x3; val_offset:85122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85122*FLEN/8, x4, x1, x2) - -inst_28375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f000001; valaddr_reg:x3; val_offset:85125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85125*FLEN/8, x4, x1, x2) - -inst_28376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f000003; valaddr_reg:x3; val_offset:85128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85128*FLEN/8, x4, x1, x2) - -inst_28377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f000007; valaddr_reg:x3; val_offset:85131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85131*FLEN/8, x4, x1, x2) - -inst_28378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f199999; valaddr_reg:x3; val_offset:85134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85134*FLEN/8, x4, x1, x2) - -inst_28379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f249249; valaddr_reg:x3; val_offset:85137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85137*FLEN/8, x4, x1, x2) - -inst_28380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f333333; valaddr_reg:x3; val_offset:85140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85140*FLEN/8, x4, x1, x2) - -inst_28381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:85143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85143*FLEN/8, x4, x1, x2) - -inst_28382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:85146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85146*FLEN/8, x4, x1, x2) - -inst_28383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f444444; valaddr_reg:x3; val_offset:85149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85149*FLEN/8, x4, x1, x2) - -inst_28384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:85152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85152*FLEN/8, x4, x1, x2) - -inst_28385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:85155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85155*FLEN/8, x4, x1, x2) - -inst_28386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f666666; valaddr_reg:x3; val_offset:85158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85158*FLEN/8, x4, x1, x2) - -inst_28387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:85161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85161*FLEN/8, x4, x1, x2) - -inst_28388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:85164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85164*FLEN/8, x4, x1, x2) - -inst_28389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:85167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85167*FLEN/8, x4, x1, x2) - -inst_28390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:85170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85170*FLEN/8, x4, x1, x2) - -inst_28391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:85173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85173*FLEN/8, x4, x1, x2) - -inst_28392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:85176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85176*FLEN/8, x4, x1, x2) - -inst_28393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:85179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85179*FLEN/8, x4, x1, x2) - -inst_28394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:85182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85182*FLEN/8, x4, x1, x2) - -inst_28395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:85185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85185*FLEN/8, x4, x1, x2) - -inst_28396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:85188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85188*FLEN/8, x4, x1, x2) - -inst_28397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:85191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85191*FLEN/8, x4, x1, x2) - -inst_28398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:85194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85194*FLEN/8, x4, x1, x2) - -inst_28399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:85197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85197*FLEN/8, x4, x1, x2) - -inst_28400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:85200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85200*FLEN/8, x4, x1, x2) - -inst_28401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:85203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85203*FLEN/8, x4, x1, x2) - -inst_28402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:85206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85206*FLEN/8, x4, x1, x2) - -inst_28403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:85209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85209*FLEN/8, x4, x1, x2) - -inst_28404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:85212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85212*FLEN/8, x4, x1, x2) - -inst_28405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:85215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85215*FLEN/8, x4, x1, x2) - -inst_28406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:85218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85218*FLEN/8, x4, x1, x2) - -inst_28407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb800000; valaddr_reg:x3; val_offset:85221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85221*FLEN/8, x4, x1, x2) - -inst_28408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb800001; valaddr_reg:x3; val_offset:85224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85224*FLEN/8, x4, x1, x2) - -inst_28409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb800003; valaddr_reg:x3; val_offset:85227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85227*FLEN/8, x4, x1, x2) - -inst_28410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb800007; valaddr_reg:x3; val_offset:85230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85230*FLEN/8, x4, x1, x2) - -inst_28411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb80000f; valaddr_reg:x3; val_offset:85233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85233*FLEN/8, x4, x1, x2) - -inst_28412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb80001f; valaddr_reg:x3; val_offset:85236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85236*FLEN/8, x4, x1, x2) - -inst_28413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb80003f; valaddr_reg:x3; val_offset:85239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85239*FLEN/8, x4, x1, x2) - -inst_28414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb80007f; valaddr_reg:x3; val_offset:85242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85242*FLEN/8, x4, x1, x2) - -inst_28415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb8000ff; valaddr_reg:x3; val_offset:85245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85245*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_223) - -inst_28416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb8001ff; valaddr_reg:x3; val_offset:85248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85248*FLEN/8, x4, x1, x2) - -inst_28417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb8003ff; valaddr_reg:x3; val_offset:85251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85251*FLEN/8, x4, x1, x2) - -inst_28418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb8007ff; valaddr_reg:x3; val_offset:85254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85254*FLEN/8, x4, x1, x2) - -inst_28419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb800fff; valaddr_reg:x3; val_offset:85257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85257*FLEN/8, x4, x1, x2) - -inst_28420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb801fff; valaddr_reg:x3; val_offset:85260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85260*FLEN/8, x4, x1, x2) - -inst_28421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb803fff; valaddr_reg:x3; val_offset:85263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85263*FLEN/8, x4, x1, x2) - -inst_28422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb807fff; valaddr_reg:x3; val_offset:85266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85266*FLEN/8, x4, x1, x2) - -inst_28423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb80ffff; valaddr_reg:x3; val_offset:85269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85269*FLEN/8, x4, x1, x2) - -inst_28424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb81ffff; valaddr_reg:x3; val_offset:85272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85272*FLEN/8, x4, x1, x2) - -inst_28425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb83ffff; valaddr_reg:x3; val_offset:85275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85275*FLEN/8, x4, x1, x2) - -inst_28426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb87ffff; valaddr_reg:x3; val_offset:85278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85278*FLEN/8, x4, x1, x2) - -inst_28427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb8fffff; valaddr_reg:x3; val_offset:85281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85281*FLEN/8, x4, x1, x2) - -inst_28428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xb9fffff; valaddr_reg:x3; val_offset:85284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85284*FLEN/8, x4, x1, x2) - -inst_28429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbbfffff; valaddr_reg:x3; val_offset:85287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85287*FLEN/8, x4, x1, x2) - -inst_28430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbc00000; valaddr_reg:x3; val_offset:85290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85290*FLEN/8, x4, x1, x2) - -inst_28431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbe00000; valaddr_reg:x3; val_offset:85293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85293*FLEN/8, x4, x1, x2) - -inst_28432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbf00000; valaddr_reg:x3; val_offset:85296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85296*FLEN/8, x4, x1, x2) - -inst_28433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbf80000; valaddr_reg:x3; val_offset:85299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85299*FLEN/8, x4, x1, x2) - -inst_28434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfc0000; valaddr_reg:x3; val_offset:85302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85302*FLEN/8, x4, x1, x2) - -inst_28435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfe0000; valaddr_reg:x3; val_offset:85305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85305*FLEN/8, x4, x1, x2) - -inst_28436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbff0000; valaddr_reg:x3; val_offset:85308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85308*FLEN/8, x4, x1, x2) - -inst_28437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbff8000; valaddr_reg:x3; val_offset:85311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85311*FLEN/8, x4, x1, x2) - -inst_28438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbffc000; valaddr_reg:x3; val_offset:85314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85314*FLEN/8, x4, x1, x2) - -inst_28439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbffe000; valaddr_reg:x3; val_offset:85317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85317*FLEN/8, x4, x1, x2) - -inst_28440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfff000; valaddr_reg:x3; val_offset:85320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85320*FLEN/8, x4, x1, x2) - -inst_28441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfff800; valaddr_reg:x3; val_offset:85323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85323*FLEN/8, x4, x1, x2) - -inst_28442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfffc00; valaddr_reg:x3; val_offset:85326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85326*FLEN/8, x4, x1, x2) - -inst_28443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfffe00; valaddr_reg:x3; val_offset:85329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85329*FLEN/8, x4, x1, x2) - -inst_28444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbffff00; valaddr_reg:x3; val_offset:85332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85332*FLEN/8, x4, x1, x2) - -inst_28445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbffff80; valaddr_reg:x3; val_offset:85335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85335*FLEN/8, x4, x1, x2) - -inst_28446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbffffc0; valaddr_reg:x3; val_offset:85338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85338*FLEN/8, x4, x1, x2) - -inst_28447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbffffe0; valaddr_reg:x3; val_offset:85341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85341*FLEN/8, x4, x1, x2) - -inst_28448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfffff0; valaddr_reg:x3; val_offset:85344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85344*FLEN/8, x4, x1, x2) - -inst_28449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfffff8; valaddr_reg:x3; val_offset:85347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85347*FLEN/8, x4, x1, x2) - -inst_28450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfffffc; valaddr_reg:x3; val_offset:85350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85350*FLEN/8, x4, x1, x2) - -inst_28451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbfffffe; valaddr_reg:x3; val_offset:85353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85353*FLEN/8, x4, x1, x2) - -inst_28452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; -op3val:0xbffffff; valaddr_reg:x3; val_offset:85356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85356*FLEN/8, x4, x1, x2) - -inst_28453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3f800001; valaddr_reg:x3; val_offset:85359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85359*FLEN/8, x4, x1, x2) - -inst_28454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3f800003; valaddr_reg:x3; val_offset:85362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85362*FLEN/8, x4, x1, x2) - -inst_28455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3f800007; valaddr_reg:x3; val_offset:85365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85365*FLEN/8, x4, x1, x2) - -inst_28456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3f999999; valaddr_reg:x3; val_offset:85368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85368*FLEN/8, x4, x1, x2) - -inst_28457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:85371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85371*FLEN/8, x4, x1, x2) - -inst_28458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:85374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85374*FLEN/8, x4, x1, x2) - -inst_28459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:85377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85377*FLEN/8, x4, x1, x2) - -inst_28460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:85380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85380*FLEN/8, x4, x1, x2) - -inst_28461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:85383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85383*FLEN/8, x4, x1, x2) - -inst_28462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:85386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85386*FLEN/8, x4, x1, x2) - -inst_28463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:85389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85389*FLEN/8, x4, x1, x2) - -inst_28464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:85392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85392*FLEN/8, x4, x1, x2) - -inst_28465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:85395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85395*FLEN/8, x4, x1, x2) - -inst_28466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:85398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85398*FLEN/8, x4, x1, x2) - -inst_28467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:85401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85401*FLEN/8, x4, x1, x2) - -inst_28468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:85404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85404*FLEN/8, x4, x1, x2) - -inst_28469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f800000; valaddr_reg:x3; val_offset:85407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85407*FLEN/8, x4, x1, x2) - -inst_28470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f800001; valaddr_reg:x3; val_offset:85410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85410*FLEN/8, x4, x1, x2) - -inst_28471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f800003; valaddr_reg:x3; val_offset:85413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85413*FLEN/8, x4, x1, x2) - -inst_28472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f800007; valaddr_reg:x3; val_offset:85416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85416*FLEN/8, x4, x1, x2) - -inst_28473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f80000f; valaddr_reg:x3; val_offset:85419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85419*FLEN/8, x4, x1, x2) - -inst_28474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f80001f; valaddr_reg:x3; val_offset:85422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85422*FLEN/8, x4, x1, x2) - -inst_28475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f80003f; valaddr_reg:x3; val_offset:85425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85425*FLEN/8, x4, x1, x2) - -inst_28476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f80007f; valaddr_reg:x3; val_offset:85428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85428*FLEN/8, x4, x1, x2) - -inst_28477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f8000ff; valaddr_reg:x3; val_offset:85431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85431*FLEN/8, x4, x1, x2) - -inst_28478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f8001ff; valaddr_reg:x3; val_offset:85434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85434*FLEN/8, x4, x1, x2) - -inst_28479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f8003ff; valaddr_reg:x3; val_offset:85437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85437*FLEN/8, x4, x1, x2) - -inst_28480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f8007ff; valaddr_reg:x3; val_offset:85440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85440*FLEN/8, x4, x1, x2) - -inst_28481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f800fff; valaddr_reg:x3; val_offset:85443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85443*FLEN/8, x4, x1, x2) - -inst_28482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f801fff; valaddr_reg:x3; val_offset:85446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85446*FLEN/8, x4, x1, x2) - -inst_28483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f803fff; valaddr_reg:x3; val_offset:85449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85449*FLEN/8, x4, x1, x2) - -inst_28484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f807fff; valaddr_reg:x3; val_offset:85452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85452*FLEN/8, x4, x1, x2) - -inst_28485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f80ffff; valaddr_reg:x3; val_offset:85455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85455*FLEN/8, x4, x1, x2) - -inst_28486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f81ffff; valaddr_reg:x3; val_offset:85458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85458*FLEN/8, x4, x1, x2) - -inst_28487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f83ffff; valaddr_reg:x3; val_offset:85461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85461*FLEN/8, x4, x1, x2) - -inst_28488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f87ffff; valaddr_reg:x3; val_offset:85464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85464*FLEN/8, x4, x1, x2) - -inst_28489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f8fffff; valaddr_reg:x3; val_offset:85467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85467*FLEN/8, x4, x1, x2) - -inst_28490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4f9fffff; valaddr_reg:x3; val_offset:85470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85470*FLEN/8, x4, x1, x2) - -inst_28491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fbfffff; valaddr_reg:x3; val_offset:85473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85473*FLEN/8, x4, x1, x2) - -inst_28492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fc00000; valaddr_reg:x3; val_offset:85476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85476*FLEN/8, x4, x1, x2) - -inst_28493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fe00000; valaddr_reg:x3; val_offset:85479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85479*FLEN/8, x4, x1, x2) - -inst_28494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ff00000; valaddr_reg:x3; val_offset:85482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85482*FLEN/8, x4, x1, x2) - -inst_28495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ff80000; valaddr_reg:x3; val_offset:85485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85485*FLEN/8, x4, x1, x2) - -inst_28496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffc0000; valaddr_reg:x3; val_offset:85488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85488*FLEN/8, x4, x1, x2) - -inst_28497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffe0000; valaddr_reg:x3; val_offset:85491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85491*FLEN/8, x4, x1, x2) - -inst_28498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fff0000; valaddr_reg:x3; val_offset:85494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85494*FLEN/8, x4, x1, x2) - -inst_28499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fff8000; valaddr_reg:x3; val_offset:85497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85497*FLEN/8, x4, x1, x2) - -inst_28500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fffc000; valaddr_reg:x3; val_offset:85500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85500*FLEN/8, x4, x1, x2) - -inst_28501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fffe000; valaddr_reg:x3; val_offset:85503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85503*FLEN/8, x4, x1, x2) - -inst_28502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffff000; valaddr_reg:x3; val_offset:85506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85506*FLEN/8, x4, x1, x2) - -inst_28503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffff800; valaddr_reg:x3; val_offset:85509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85509*FLEN/8, x4, x1, x2) - -inst_28504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffffc00; valaddr_reg:x3; val_offset:85512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85512*FLEN/8, x4, x1, x2) - -inst_28505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffffe00; valaddr_reg:x3; val_offset:85515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85515*FLEN/8, x4, x1, x2) - -inst_28506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fffff00; valaddr_reg:x3; val_offset:85518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85518*FLEN/8, x4, x1, x2) - -inst_28507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fffff80; valaddr_reg:x3; val_offset:85521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85521*FLEN/8, x4, x1, x2) - -inst_28508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fffffc0; valaddr_reg:x3; val_offset:85524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85524*FLEN/8, x4, x1, x2) - -inst_28509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fffffe0; valaddr_reg:x3; val_offset:85527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85527*FLEN/8, x4, x1, x2) - -inst_28510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffffff0; valaddr_reg:x3; val_offset:85530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85530*FLEN/8, x4, x1, x2) - -inst_28511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffffff8; valaddr_reg:x3; val_offset:85533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85533*FLEN/8, x4, x1, x2) - -inst_28512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffffffc; valaddr_reg:x3; val_offset:85536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85536*FLEN/8, x4, x1, x2) - -inst_28513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4ffffffe; valaddr_reg:x3; val_offset:85539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85539*FLEN/8, x4, x1, x2) - -inst_28514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; -op3val:0x4fffffff; valaddr_reg:x3; val_offset:85542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85542*FLEN/8, x4, x1, x2) - -inst_28515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:85545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85545*FLEN/8, x4, x1, x2) - -inst_28516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:85548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85548*FLEN/8, x4, x1, x2) - -inst_28517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:85551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85551*FLEN/8, x4, x1, x2) - -inst_28518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:85554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85554*FLEN/8, x4, x1, x2) - -inst_28519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:85557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85557*FLEN/8, x4, x1, x2) - -inst_28520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:85560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85560*FLEN/8, x4, x1, x2) - -inst_28521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:85563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85563*FLEN/8, x4, x1, x2) - -inst_28522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:85566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85566*FLEN/8, x4, x1, x2) - -inst_28523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:85569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85569*FLEN/8, x4, x1, x2) - -inst_28524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:85572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85572*FLEN/8, x4, x1, x2) - -inst_28525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:85575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85575*FLEN/8, x4, x1, x2) - -inst_28526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:85578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85578*FLEN/8, x4, x1, x2) - -inst_28527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:85581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85581*FLEN/8, x4, x1, x2) - -inst_28528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:85584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85584*FLEN/8, x4, x1, x2) - -inst_28529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:85587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85587*FLEN/8, x4, x1, x2) - -inst_28530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:85590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85590*FLEN/8, x4, x1, x2) - -inst_28531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a000000; valaddr_reg:x3; val_offset:85593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85593*FLEN/8, x4, x1, x2) - -inst_28532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a000001; valaddr_reg:x3; val_offset:85596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85596*FLEN/8, x4, x1, x2) - -inst_28533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a000003; valaddr_reg:x3; val_offset:85599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85599*FLEN/8, x4, x1, x2) - -inst_28534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a000007; valaddr_reg:x3; val_offset:85602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85602*FLEN/8, x4, x1, x2) - -inst_28535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a00000f; valaddr_reg:x3; val_offset:85605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85605*FLEN/8, x4, x1, x2) - -inst_28536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a00001f; valaddr_reg:x3; val_offset:85608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85608*FLEN/8, x4, x1, x2) - -inst_28537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a00003f; valaddr_reg:x3; val_offset:85611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85611*FLEN/8, x4, x1, x2) - -inst_28538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a00007f; valaddr_reg:x3; val_offset:85614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85614*FLEN/8, x4, x1, x2) - -inst_28539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a0000ff; valaddr_reg:x3; val_offset:85617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85617*FLEN/8, x4, x1, x2) - -inst_28540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a0001ff; valaddr_reg:x3; val_offset:85620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85620*FLEN/8, x4, x1, x2) - -inst_28541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a0003ff; valaddr_reg:x3; val_offset:85623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85623*FLEN/8, x4, x1, x2) - -inst_28542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a0007ff; valaddr_reg:x3; val_offset:85626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85626*FLEN/8, x4, x1, x2) - -inst_28543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a000fff; valaddr_reg:x3; val_offset:85629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85629*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_224) - -inst_28544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a001fff; valaddr_reg:x3; val_offset:85632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85632*FLEN/8, x4, x1, x2) - -inst_28545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a003fff; valaddr_reg:x3; val_offset:85635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85635*FLEN/8, x4, x1, x2) - -inst_28546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a007fff; valaddr_reg:x3; val_offset:85638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85638*FLEN/8, x4, x1, x2) - -inst_28547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a00ffff; valaddr_reg:x3; val_offset:85641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85641*FLEN/8, x4, x1, x2) - -inst_28548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a01ffff; valaddr_reg:x3; val_offset:85644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85644*FLEN/8, x4, x1, x2) - -inst_28549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a03ffff; valaddr_reg:x3; val_offset:85647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85647*FLEN/8, x4, x1, x2) - -inst_28550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a07ffff; valaddr_reg:x3; val_offset:85650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85650*FLEN/8, x4, x1, x2) - -inst_28551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a0fffff; valaddr_reg:x3; val_offset:85653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85653*FLEN/8, x4, x1, x2) - -inst_28552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a1fffff; valaddr_reg:x3; val_offset:85656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85656*FLEN/8, x4, x1, x2) - -inst_28553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a3fffff; valaddr_reg:x3; val_offset:85659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85659*FLEN/8, x4, x1, x2) - -inst_28554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a400000; valaddr_reg:x3; val_offset:85662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85662*FLEN/8, x4, x1, x2) - -inst_28555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a600000; valaddr_reg:x3; val_offset:85665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85665*FLEN/8, x4, x1, x2) - -inst_28556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a700000; valaddr_reg:x3; val_offset:85668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85668*FLEN/8, x4, x1, x2) - -inst_28557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a780000; valaddr_reg:x3; val_offset:85671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85671*FLEN/8, x4, x1, x2) - -inst_28558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7c0000; valaddr_reg:x3; val_offset:85674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85674*FLEN/8, x4, x1, x2) - -inst_28559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7e0000; valaddr_reg:x3; val_offset:85677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85677*FLEN/8, x4, x1, x2) - -inst_28560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7f0000; valaddr_reg:x3; val_offset:85680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85680*FLEN/8, x4, x1, x2) - -inst_28561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7f8000; valaddr_reg:x3; val_offset:85683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85683*FLEN/8, x4, x1, x2) - -inst_28562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7fc000; valaddr_reg:x3; val_offset:85686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85686*FLEN/8, x4, x1, x2) - -inst_28563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7fe000; valaddr_reg:x3; val_offset:85689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85689*FLEN/8, x4, x1, x2) - -inst_28564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7ff000; valaddr_reg:x3; val_offset:85692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85692*FLEN/8, x4, x1, x2) - -inst_28565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7ff800; valaddr_reg:x3; val_offset:85695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85695*FLEN/8, x4, x1, x2) - -inst_28566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:85698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85698*FLEN/8, x4, x1, x2) - -inst_28567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:85701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85701*FLEN/8, x4, x1, x2) - -inst_28568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7fff00; valaddr_reg:x3; val_offset:85704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85704*FLEN/8, x4, x1, x2) - -inst_28569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7fff80; valaddr_reg:x3; val_offset:85707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85707*FLEN/8, x4, x1, x2) - -inst_28570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:85710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85710*FLEN/8, x4, x1, x2) - -inst_28571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:85713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85713*FLEN/8, x4, x1, x2) - -inst_28572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:85716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85716*FLEN/8, x4, x1, x2) - -inst_28573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:85719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85719*FLEN/8, x4, x1, x2) - -inst_28574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:85722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85722*FLEN/8, x4, x1, x2) - -inst_28575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:85725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85725*FLEN/8, x4, x1, x2) - -inst_28576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; -op3val:0x8a7fffff; valaddr_reg:x3; val_offset:85728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85728*FLEN/8, x4, x1, x2) - -inst_28577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68800000; valaddr_reg:x3; val_offset:85731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85731*FLEN/8, x4, x1, x2) - -inst_28578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68800001; valaddr_reg:x3; val_offset:85734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85734*FLEN/8, x4, x1, x2) - -inst_28579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68800003; valaddr_reg:x3; val_offset:85737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85737*FLEN/8, x4, x1, x2) - -inst_28580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68800007; valaddr_reg:x3; val_offset:85740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85740*FLEN/8, x4, x1, x2) - -inst_28581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x6880000f; valaddr_reg:x3; val_offset:85743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85743*FLEN/8, x4, x1, x2) - -inst_28582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x6880001f; valaddr_reg:x3; val_offset:85746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85746*FLEN/8, x4, x1, x2) - -inst_28583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x6880003f; valaddr_reg:x3; val_offset:85749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85749*FLEN/8, x4, x1, x2) - -inst_28584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x6880007f; valaddr_reg:x3; val_offset:85752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85752*FLEN/8, x4, x1, x2) - -inst_28585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x688000ff; valaddr_reg:x3; val_offset:85755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85755*FLEN/8, x4, x1, x2) - -inst_28586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x688001ff; valaddr_reg:x3; val_offset:85758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85758*FLEN/8, x4, x1, x2) - -inst_28587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x688003ff; valaddr_reg:x3; val_offset:85761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85761*FLEN/8, x4, x1, x2) - -inst_28588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x688007ff; valaddr_reg:x3; val_offset:85764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85764*FLEN/8, x4, x1, x2) - -inst_28589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68800fff; valaddr_reg:x3; val_offset:85767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85767*FLEN/8, x4, x1, x2) - -inst_28590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68801fff; valaddr_reg:x3; val_offset:85770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85770*FLEN/8, x4, x1, x2) - -inst_28591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68803fff; valaddr_reg:x3; val_offset:85773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85773*FLEN/8, x4, x1, x2) - -inst_28592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68807fff; valaddr_reg:x3; val_offset:85776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85776*FLEN/8, x4, x1, x2) - -inst_28593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x6880ffff; valaddr_reg:x3; val_offset:85779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85779*FLEN/8, x4, x1, x2) - -inst_28594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x6881ffff; valaddr_reg:x3; val_offset:85782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85782*FLEN/8, x4, x1, x2) - -inst_28595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x6883ffff; valaddr_reg:x3; val_offset:85785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85785*FLEN/8, x4, x1, x2) - -inst_28596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x6887ffff; valaddr_reg:x3; val_offset:85788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85788*FLEN/8, x4, x1, x2) - -inst_28597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x688fffff; valaddr_reg:x3; val_offset:85791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85791*FLEN/8, x4, x1, x2) - -inst_28598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x689fffff; valaddr_reg:x3; val_offset:85794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85794*FLEN/8, x4, x1, x2) - -inst_28599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68bfffff; valaddr_reg:x3; val_offset:85797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85797*FLEN/8, x4, x1, x2) - -inst_28600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68c00000; valaddr_reg:x3; val_offset:85800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85800*FLEN/8, x4, x1, x2) - -inst_28601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68e00000; valaddr_reg:x3; val_offset:85803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85803*FLEN/8, x4, x1, x2) - -inst_28602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68f00000; valaddr_reg:x3; val_offset:85806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85806*FLEN/8, x4, x1, x2) - -inst_28603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68f80000; valaddr_reg:x3; val_offset:85809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85809*FLEN/8, x4, x1, x2) - -inst_28604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fc0000; valaddr_reg:x3; val_offset:85812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85812*FLEN/8, x4, x1, x2) - -inst_28605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fe0000; valaddr_reg:x3; val_offset:85815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85815*FLEN/8, x4, x1, x2) - -inst_28606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ff0000; valaddr_reg:x3; val_offset:85818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85818*FLEN/8, x4, x1, x2) - -inst_28607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ff8000; valaddr_reg:x3; val_offset:85821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85821*FLEN/8, x4, x1, x2) - -inst_28608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ffc000; valaddr_reg:x3; val_offset:85824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85824*FLEN/8, x4, x1, x2) - -inst_28609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ffe000; valaddr_reg:x3; val_offset:85827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85827*FLEN/8, x4, x1, x2) - -inst_28610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fff000; valaddr_reg:x3; val_offset:85830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85830*FLEN/8, x4, x1, x2) - -inst_28611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fff800; valaddr_reg:x3; val_offset:85833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85833*FLEN/8, x4, x1, x2) - -inst_28612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fffc00; valaddr_reg:x3; val_offset:85836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85836*FLEN/8, x4, x1, x2) - -inst_28613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fffe00; valaddr_reg:x3; val_offset:85839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85839*FLEN/8, x4, x1, x2) - -inst_28614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ffff00; valaddr_reg:x3; val_offset:85842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85842*FLEN/8, x4, x1, x2) - -inst_28615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ffff80; valaddr_reg:x3; val_offset:85845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85845*FLEN/8, x4, x1, x2) - -inst_28616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ffffc0; valaddr_reg:x3; val_offset:85848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85848*FLEN/8, x4, x1, x2) - -inst_28617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ffffe0; valaddr_reg:x3; val_offset:85851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85851*FLEN/8, x4, x1, x2) - -inst_28618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fffff0; valaddr_reg:x3; val_offset:85854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85854*FLEN/8, x4, x1, x2) - -inst_28619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fffff8; valaddr_reg:x3; val_offset:85857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85857*FLEN/8, x4, x1, x2) - -inst_28620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fffffc; valaddr_reg:x3; val_offset:85860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85860*FLEN/8, x4, x1, x2) - -inst_28621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68fffffe; valaddr_reg:x3; val_offset:85863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85863*FLEN/8, x4, x1, x2) - -inst_28622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x68ffffff; valaddr_reg:x3; val_offset:85866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85866*FLEN/8, x4, x1, x2) - -inst_28623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f000001; valaddr_reg:x3; val_offset:85869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85869*FLEN/8, x4, x1, x2) - -inst_28624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f000003; valaddr_reg:x3; val_offset:85872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85872*FLEN/8, x4, x1, x2) - -inst_28625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f000007; valaddr_reg:x3; val_offset:85875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85875*FLEN/8, x4, x1, x2) - -inst_28626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f199999; valaddr_reg:x3; val_offset:85878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85878*FLEN/8, x4, x1, x2) - -inst_28627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f249249; valaddr_reg:x3; val_offset:85881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85881*FLEN/8, x4, x1, x2) - -inst_28628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f333333; valaddr_reg:x3; val_offset:85884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85884*FLEN/8, x4, x1, x2) - -inst_28629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:85887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85887*FLEN/8, x4, x1, x2) - -inst_28630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:85890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85890*FLEN/8, x4, x1, x2) - -inst_28631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f444444; valaddr_reg:x3; val_offset:85893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85893*FLEN/8, x4, x1, x2) - -inst_28632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:85896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85896*FLEN/8, x4, x1, x2) - -inst_28633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:85899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85899*FLEN/8, x4, x1, x2) - -inst_28634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f666666; valaddr_reg:x3; val_offset:85902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85902*FLEN/8, x4, x1, x2) - -inst_28635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:85905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85905*FLEN/8, x4, x1, x2) - -inst_28636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:85908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85908*FLEN/8, x4, x1, x2) - -inst_28637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:85911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85911*FLEN/8, x4, x1, x2) - -inst_28638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:85914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85914*FLEN/8, x4, x1, x2) - -inst_28639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3000000; valaddr_reg:x3; val_offset:85917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85917*FLEN/8, x4, x1, x2) - -inst_28640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3000001; valaddr_reg:x3; val_offset:85920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85920*FLEN/8, x4, x1, x2) - -inst_28641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3000003; valaddr_reg:x3; val_offset:85923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85923*FLEN/8, x4, x1, x2) - -inst_28642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3000007; valaddr_reg:x3; val_offset:85926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85926*FLEN/8, x4, x1, x2) - -inst_28643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa300000f; valaddr_reg:x3; val_offset:85929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85929*FLEN/8, x4, x1, x2) - -inst_28644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa300001f; valaddr_reg:x3; val_offset:85932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85932*FLEN/8, x4, x1, x2) - -inst_28645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa300003f; valaddr_reg:x3; val_offset:85935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85935*FLEN/8, x4, x1, x2) - -inst_28646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa300007f; valaddr_reg:x3; val_offset:85938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85938*FLEN/8, x4, x1, x2) - -inst_28647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa30000ff; valaddr_reg:x3; val_offset:85941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85941*FLEN/8, x4, x1, x2) - -inst_28648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa30001ff; valaddr_reg:x3; val_offset:85944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85944*FLEN/8, x4, x1, x2) - -inst_28649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa30003ff; valaddr_reg:x3; val_offset:85947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85947*FLEN/8, x4, x1, x2) - -inst_28650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa30007ff; valaddr_reg:x3; val_offset:85950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85950*FLEN/8, x4, x1, x2) - -inst_28651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3000fff; valaddr_reg:x3; val_offset:85953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85953*FLEN/8, x4, x1, x2) - -inst_28652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3001fff; valaddr_reg:x3; val_offset:85956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85956*FLEN/8, x4, x1, x2) - -inst_28653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3003fff; valaddr_reg:x3; val_offset:85959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85959*FLEN/8, x4, x1, x2) - -inst_28654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3007fff; valaddr_reg:x3; val_offset:85962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85962*FLEN/8, x4, x1, x2) - -inst_28655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa300ffff; valaddr_reg:x3; val_offset:85965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85965*FLEN/8, x4, x1, x2) - -inst_28656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa301ffff; valaddr_reg:x3; val_offset:85968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85968*FLEN/8, x4, x1, x2) - -inst_28657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa303ffff; valaddr_reg:x3; val_offset:85971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85971*FLEN/8, x4, x1, x2) - -inst_28658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa307ffff; valaddr_reg:x3; val_offset:85974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85974*FLEN/8, x4, x1, x2) - -inst_28659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa30fffff; valaddr_reg:x3; val_offset:85977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85977*FLEN/8, x4, x1, x2) - -inst_28660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa31fffff; valaddr_reg:x3; val_offset:85980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85980*FLEN/8, x4, x1, x2) - -inst_28661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa33fffff; valaddr_reg:x3; val_offset:85983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85983*FLEN/8, x4, x1, x2) - -inst_28662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3400000; valaddr_reg:x3; val_offset:85986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85986*FLEN/8, x4, x1, x2) - -inst_28663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3600000; valaddr_reg:x3; val_offset:85989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85989*FLEN/8, x4, x1, x2) - -inst_28664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3700000; valaddr_reg:x3; val_offset:85992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85992*FLEN/8, x4, x1, x2) - -inst_28665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa3780000; valaddr_reg:x3; val_offset:85995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85995*FLEN/8, x4, x1, x2) - -inst_28666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37c0000; valaddr_reg:x3; val_offset:85998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85998*FLEN/8, x4, x1, x2) - -inst_28667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37e0000; valaddr_reg:x3; val_offset:86001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86001*FLEN/8, x4, x1, x2) - -inst_28668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37f0000; valaddr_reg:x3; val_offset:86004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86004*FLEN/8, x4, x1, x2) - -inst_28669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37f8000; valaddr_reg:x3; val_offset:86007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86007*FLEN/8, x4, x1, x2) - -inst_28670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37fc000; valaddr_reg:x3; val_offset:86010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86010*FLEN/8, x4, x1, x2) - -inst_28671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37fe000; valaddr_reg:x3; val_offset:86013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86013*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_225) - -inst_28672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37ff000; valaddr_reg:x3; val_offset:86016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86016*FLEN/8, x4, x1, x2) - -inst_28673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37ff800; valaddr_reg:x3; val_offset:86019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86019*FLEN/8, x4, x1, x2) - -inst_28674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37ffc00; valaddr_reg:x3; val_offset:86022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86022*FLEN/8, x4, x1, x2) - -inst_28675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37ffe00; valaddr_reg:x3; val_offset:86025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86025*FLEN/8, x4, x1, x2) - -inst_28676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37fff00; valaddr_reg:x3; val_offset:86028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86028*FLEN/8, x4, x1, x2) - -inst_28677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37fff80; valaddr_reg:x3; val_offset:86031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86031*FLEN/8, x4, x1, x2) - -inst_28678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37fffc0; valaddr_reg:x3; val_offset:86034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86034*FLEN/8, x4, x1, x2) - -inst_28679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37fffe0; valaddr_reg:x3; val_offset:86037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86037*FLEN/8, x4, x1, x2) - -inst_28680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37ffff0; valaddr_reg:x3; val_offset:86040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86040*FLEN/8, x4, x1, x2) - -inst_28681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37ffff8; valaddr_reg:x3; val_offset:86043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86043*FLEN/8, x4, x1, x2) - -inst_28682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37ffffc; valaddr_reg:x3; val_offset:86046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86046*FLEN/8, x4, x1, x2) - -inst_28683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37ffffe; valaddr_reg:x3; val_offset:86049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86049*FLEN/8, x4, x1, x2) - -inst_28684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xa37fffff; valaddr_reg:x3; val_offset:86052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86052*FLEN/8, x4, x1, x2) - -inst_28685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbf800001; valaddr_reg:x3; val_offset:86055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86055*FLEN/8, x4, x1, x2) - -inst_28686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbf800003; valaddr_reg:x3; val_offset:86058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86058*FLEN/8, x4, x1, x2) - -inst_28687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbf800007; valaddr_reg:x3; val_offset:86061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86061*FLEN/8, x4, x1, x2) - -inst_28688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbf999999; valaddr_reg:x3; val_offset:86064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86064*FLEN/8, x4, x1, x2) - -inst_28689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:86067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86067*FLEN/8, x4, x1, x2) - -inst_28690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:86070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86070*FLEN/8, x4, x1, x2) - -inst_28691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:86073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86073*FLEN/8, x4, x1, x2) - -inst_28692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:86076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86076*FLEN/8, x4, x1, x2) - -inst_28693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:86079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86079*FLEN/8, x4, x1, x2) - -inst_28694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:86082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86082*FLEN/8, x4, x1, x2) - -inst_28695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:86085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86085*FLEN/8, x4, x1, x2) - -inst_28696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:86088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86088*FLEN/8, x4, x1, x2) - -inst_28697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:86091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86091*FLEN/8, x4, x1, x2) - -inst_28698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:86094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86094*FLEN/8, x4, x1, x2) - -inst_28699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:86097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86097*FLEN/8, x4, x1, x2) - -inst_28700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:86100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86100*FLEN/8, x4, x1, x2) - -inst_28701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:86103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86103*FLEN/8, x4, x1, x2) - -inst_28702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:86106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86106*FLEN/8, x4, x1, x2) - -inst_28703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:86109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86109*FLEN/8, x4, x1, x2) - -inst_28704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:86112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86112*FLEN/8, x4, x1, x2) - -inst_28705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:86115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86115*FLEN/8, x4, x1, x2) - -inst_28706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:86118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86118*FLEN/8, x4, x1, x2) - -inst_28707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:86121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86121*FLEN/8, x4, x1, x2) - -inst_28708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:86124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86124*FLEN/8, x4, x1, x2) - -inst_28709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:86127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86127*FLEN/8, x4, x1, x2) - -inst_28710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:86130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86130*FLEN/8, x4, x1, x2) - -inst_28711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:86133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86133*FLEN/8, x4, x1, x2) - -inst_28712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:86136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86136*FLEN/8, x4, x1, x2) - -inst_28713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:86139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86139*FLEN/8, x4, x1, x2) - -inst_28714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:86142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86142*FLEN/8, x4, x1, x2) - -inst_28715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:86145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86145*FLEN/8, x4, x1, x2) - -inst_28716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:86148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86148*FLEN/8, x4, x1, x2) - -inst_28717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10000000; valaddr_reg:x3; val_offset:86151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86151*FLEN/8, x4, x1, x2) - -inst_28718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10000001; valaddr_reg:x3; val_offset:86154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86154*FLEN/8, x4, x1, x2) - -inst_28719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10000003; valaddr_reg:x3; val_offset:86157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86157*FLEN/8, x4, x1, x2) - -inst_28720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10000007; valaddr_reg:x3; val_offset:86160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86160*FLEN/8, x4, x1, x2) - -inst_28721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1000000f; valaddr_reg:x3; val_offset:86163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86163*FLEN/8, x4, x1, x2) - -inst_28722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1000001f; valaddr_reg:x3; val_offset:86166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86166*FLEN/8, x4, x1, x2) - -inst_28723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1000003f; valaddr_reg:x3; val_offset:86169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86169*FLEN/8, x4, x1, x2) - -inst_28724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1000007f; valaddr_reg:x3; val_offset:86172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86172*FLEN/8, x4, x1, x2) - -inst_28725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x100000ff; valaddr_reg:x3; val_offset:86175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86175*FLEN/8, x4, x1, x2) - -inst_28726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x100001ff; valaddr_reg:x3; val_offset:86178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86178*FLEN/8, x4, x1, x2) - -inst_28727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x100003ff; valaddr_reg:x3; val_offset:86181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86181*FLEN/8, x4, x1, x2) - -inst_28728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x100007ff; valaddr_reg:x3; val_offset:86184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86184*FLEN/8, x4, x1, x2) - -inst_28729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10000fff; valaddr_reg:x3; val_offset:86187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86187*FLEN/8, x4, x1, x2) - -inst_28730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10001fff; valaddr_reg:x3; val_offset:86190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86190*FLEN/8, x4, x1, x2) - -inst_28731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10003fff; valaddr_reg:x3; val_offset:86193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86193*FLEN/8, x4, x1, x2) - -inst_28732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10007fff; valaddr_reg:x3; val_offset:86196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86196*FLEN/8, x4, x1, x2) - -inst_28733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1000ffff; valaddr_reg:x3; val_offset:86199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86199*FLEN/8, x4, x1, x2) - -inst_28734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1001ffff; valaddr_reg:x3; val_offset:86202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86202*FLEN/8, x4, x1, x2) - -inst_28735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1003ffff; valaddr_reg:x3; val_offset:86205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86205*FLEN/8, x4, x1, x2) - -inst_28736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x1007ffff; valaddr_reg:x3; val_offset:86208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86208*FLEN/8, x4, x1, x2) - -inst_28737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x100fffff; valaddr_reg:x3; val_offset:86211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86211*FLEN/8, x4, x1, x2) - -inst_28738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x101fffff; valaddr_reg:x3; val_offset:86214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86214*FLEN/8, x4, x1, x2) - -inst_28739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x103fffff; valaddr_reg:x3; val_offset:86217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86217*FLEN/8, x4, x1, x2) - -inst_28740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10400000; valaddr_reg:x3; val_offset:86220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86220*FLEN/8, x4, x1, x2) - -inst_28741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10600000; valaddr_reg:x3; val_offset:86223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86223*FLEN/8, x4, x1, x2) - -inst_28742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10700000; valaddr_reg:x3; val_offset:86226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86226*FLEN/8, x4, x1, x2) - -inst_28743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x10780000; valaddr_reg:x3; val_offset:86229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86229*FLEN/8, x4, x1, x2) - -inst_28744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107c0000; valaddr_reg:x3; val_offset:86232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86232*FLEN/8, x4, x1, x2) - -inst_28745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107e0000; valaddr_reg:x3; val_offset:86235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86235*FLEN/8, x4, x1, x2) - -inst_28746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107f0000; valaddr_reg:x3; val_offset:86238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86238*FLEN/8, x4, x1, x2) - -inst_28747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107f8000; valaddr_reg:x3; val_offset:86241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86241*FLEN/8, x4, x1, x2) - -inst_28748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107fc000; valaddr_reg:x3; val_offset:86244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86244*FLEN/8, x4, x1, x2) - -inst_28749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107fe000; valaddr_reg:x3; val_offset:86247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86247*FLEN/8, x4, x1, x2) - -inst_28750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107ff000; valaddr_reg:x3; val_offset:86250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86250*FLEN/8, x4, x1, x2) - -inst_28751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107ff800; valaddr_reg:x3; val_offset:86253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86253*FLEN/8, x4, x1, x2) - -inst_28752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107ffc00; valaddr_reg:x3; val_offset:86256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86256*FLEN/8, x4, x1, x2) - -inst_28753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107ffe00; valaddr_reg:x3; val_offset:86259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86259*FLEN/8, x4, x1, x2) - -inst_28754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107fff00; valaddr_reg:x3; val_offset:86262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86262*FLEN/8, x4, x1, x2) - -inst_28755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107fff80; valaddr_reg:x3; val_offset:86265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86265*FLEN/8, x4, x1, x2) - -inst_28756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107fffc0; valaddr_reg:x3; val_offset:86268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86268*FLEN/8, x4, x1, x2) - -inst_28757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107fffe0; valaddr_reg:x3; val_offset:86271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86271*FLEN/8, x4, x1, x2) - -inst_28758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107ffff0; valaddr_reg:x3; val_offset:86274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86274*FLEN/8, x4, x1, x2) - -inst_28759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107ffff8; valaddr_reg:x3; val_offset:86277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86277*FLEN/8, x4, x1, x2) - -inst_28760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107ffffc; valaddr_reg:x3; val_offset:86280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86280*FLEN/8, x4, x1, x2) - -inst_28761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107ffffe; valaddr_reg:x3; val_offset:86283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86283*FLEN/8, x4, x1, x2) - -inst_28762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; -op3val:0x107fffff; valaddr_reg:x3; val_offset:86286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86286*FLEN/8, x4, x1, x2) - -inst_28763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:86289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86289*FLEN/8, x4, x1, x2) - -inst_28764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:86292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86292*FLEN/8, x4, x1, x2) - -inst_28765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:86295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86295*FLEN/8, x4, x1, x2) - -inst_28766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:86298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86298*FLEN/8, x4, x1, x2) - -inst_28767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:86301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86301*FLEN/8, x4, x1, x2) - -inst_28768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:86304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86304*FLEN/8, x4, x1, x2) - -inst_28769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:86307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86307*FLEN/8, x4, x1, x2) - -inst_28770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:86310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86310*FLEN/8, x4, x1, x2) - -inst_28771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:86313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86313*FLEN/8, x4, x1, x2) - -inst_28772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:86316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86316*FLEN/8, x4, x1, x2) - -inst_28773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:86319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86319*FLEN/8, x4, x1, x2) - -inst_28774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:86322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86322*FLEN/8, x4, x1, x2) - -inst_28775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:86325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86325*FLEN/8, x4, x1, x2) - -inst_28776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:86328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86328*FLEN/8, x4, x1, x2) - -inst_28777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:86331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86331*FLEN/8, x4, x1, x2) - -inst_28778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:86334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86334*FLEN/8, x4, x1, x2) - -inst_28779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88800000; valaddr_reg:x3; val_offset:86337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86337*FLEN/8, x4, x1, x2) - -inst_28780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88800001; valaddr_reg:x3; val_offset:86340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86340*FLEN/8, x4, x1, x2) - -inst_28781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88800003; valaddr_reg:x3; val_offset:86343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86343*FLEN/8, x4, x1, x2) - -inst_28782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88800007; valaddr_reg:x3; val_offset:86346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86346*FLEN/8, x4, x1, x2) - -inst_28783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8880000f; valaddr_reg:x3; val_offset:86349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86349*FLEN/8, x4, x1, x2) - -inst_28784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8880001f; valaddr_reg:x3; val_offset:86352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86352*FLEN/8, x4, x1, x2) - -inst_28785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8880003f; valaddr_reg:x3; val_offset:86355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86355*FLEN/8, x4, x1, x2) - -inst_28786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8880007f; valaddr_reg:x3; val_offset:86358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86358*FLEN/8, x4, x1, x2) - -inst_28787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x888000ff; valaddr_reg:x3; val_offset:86361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86361*FLEN/8, x4, x1, x2) - -inst_28788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x888001ff; valaddr_reg:x3; val_offset:86364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86364*FLEN/8, x4, x1, x2) - -inst_28789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x888003ff; valaddr_reg:x3; val_offset:86367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86367*FLEN/8, x4, x1, x2) - -inst_28790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x888007ff; valaddr_reg:x3; val_offset:86370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86370*FLEN/8, x4, x1, x2) - -inst_28791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88800fff; valaddr_reg:x3; val_offset:86373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86373*FLEN/8, x4, x1, x2) - -inst_28792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88801fff; valaddr_reg:x3; val_offset:86376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86376*FLEN/8, x4, x1, x2) - -inst_28793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88803fff; valaddr_reg:x3; val_offset:86379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86379*FLEN/8, x4, x1, x2) - -inst_28794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88807fff; valaddr_reg:x3; val_offset:86382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86382*FLEN/8, x4, x1, x2) - -inst_28795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8880ffff; valaddr_reg:x3; val_offset:86385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86385*FLEN/8, x4, x1, x2) - -inst_28796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8881ffff; valaddr_reg:x3; val_offset:86388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86388*FLEN/8, x4, x1, x2) - -inst_28797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8883ffff; valaddr_reg:x3; val_offset:86391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86391*FLEN/8, x4, x1, x2) - -inst_28798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x8887ffff; valaddr_reg:x3; val_offset:86394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86394*FLEN/8, x4, x1, x2) - -inst_28799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x888fffff; valaddr_reg:x3; val_offset:86397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86397*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_226) - -inst_28800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x889fffff; valaddr_reg:x3; val_offset:86400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86400*FLEN/8, x4, x1, x2) - -inst_28801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88bfffff; valaddr_reg:x3; val_offset:86403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86403*FLEN/8, x4, x1, x2) - -inst_28802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88c00000; valaddr_reg:x3; val_offset:86406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86406*FLEN/8, x4, x1, x2) - -inst_28803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88e00000; valaddr_reg:x3; val_offset:86409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86409*FLEN/8, x4, x1, x2) - -inst_28804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88f00000; valaddr_reg:x3; val_offset:86412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86412*FLEN/8, x4, x1, x2) - -inst_28805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88f80000; valaddr_reg:x3; val_offset:86415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86415*FLEN/8, x4, x1, x2) - -inst_28806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fc0000; valaddr_reg:x3; val_offset:86418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86418*FLEN/8, x4, x1, x2) - -inst_28807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fe0000; valaddr_reg:x3; val_offset:86421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86421*FLEN/8, x4, x1, x2) - -inst_28808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ff0000; valaddr_reg:x3; val_offset:86424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86424*FLEN/8, x4, x1, x2) - -inst_28809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ff8000; valaddr_reg:x3; val_offset:86427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86427*FLEN/8, x4, x1, x2) - -inst_28810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ffc000; valaddr_reg:x3; val_offset:86430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86430*FLEN/8, x4, x1, x2) - -inst_28811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ffe000; valaddr_reg:x3; val_offset:86433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86433*FLEN/8, x4, x1, x2) - -inst_28812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fff000; valaddr_reg:x3; val_offset:86436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86436*FLEN/8, x4, x1, x2) - -inst_28813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fff800; valaddr_reg:x3; val_offset:86439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86439*FLEN/8, x4, x1, x2) - -inst_28814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fffc00; valaddr_reg:x3; val_offset:86442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86442*FLEN/8, x4, x1, x2) - -inst_28815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fffe00; valaddr_reg:x3; val_offset:86445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86445*FLEN/8, x4, x1, x2) - -inst_28816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ffff00; valaddr_reg:x3; val_offset:86448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86448*FLEN/8, x4, x1, x2) - -inst_28817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ffff80; valaddr_reg:x3; val_offset:86451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86451*FLEN/8, x4, x1, x2) - -inst_28818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ffffc0; valaddr_reg:x3; val_offset:86454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86454*FLEN/8, x4, x1, x2) - -inst_28819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ffffe0; valaddr_reg:x3; val_offset:86457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86457*FLEN/8, x4, x1, x2) - -inst_28820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fffff0; valaddr_reg:x3; val_offset:86460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86460*FLEN/8, x4, x1, x2) - -inst_28821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fffff8; valaddr_reg:x3; val_offset:86463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86463*FLEN/8, x4, x1, x2) - -inst_28822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fffffc; valaddr_reg:x3; val_offset:86466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86466*FLEN/8, x4, x1, x2) - -inst_28823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88fffffe; valaddr_reg:x3; val_offset:86469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86469*FLEN/8, x4, x1, x2) - -inst_28824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; -op3val:0x88ffffff; valaddr_reg:x3; val_offset:86472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86472*FLEN/8, x4, x1, x2) - -inst_28825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:86475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86475*FLEN/8, x4, x1, x2) - -inst_28826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:86478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86478*FLEN/8, x4, x1, x2) - -inst_28827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:86481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86481*FLEN/8, x4, x1, x2) - -inst_28828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:86484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86484*FLEN/8, x4, x1, x2) - -inst_28829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:86487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86487*FLEN/8, x4, x1, x2) - -inst_28830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:86490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86490*FLEN/8, x4, x1, x2) - -inst_28831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:86493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86493*FLEN/8, x4, x1, x2) - -inst_28832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:86496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86496*FLEN/8, x4, x1, x2) - -inst_28833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:86499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86499*FLEN/8, x4, x1, x2) - -inst_28834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:86502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86502*FLEN/8, x4, x1, x2) - -inst_28835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:86505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86505*FLEN/8, x4, x1, x2) - -inst_28836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:86508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86508*FLEN/8, x4, x1, x2) - -inst_28837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:86511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86511*FLEN/8, x4, x1, x2) - -inst_28838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:86514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86514*FLEN/8, x4, x1, x2) - -inst_28839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:86517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86517*FLEN/8, x4, x1, x2) - -inst_28840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:86520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86520*FLEN/8, x4, x1, x2) - -inst_28841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84000000; valaddr_reg:x3; val_offset:86523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86523*FLEN/8, x4, x1, x2) - -inst_28842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84000001; valaddr_reg:x3; val_offset:86526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86526*FLEN/8, x4, x1, x2) - -inst_28843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84000003; valaddr_reg:x3; val_offset:86529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86529*FLEN/8, x4, x1, x2) - -inst_28844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84000007; valaddr_reg:x3; val_offset:86532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86532*FLEN/8, x4, x1, x2) - -inst_28845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8400000f; valaddr_reg:x3; val_offset:86535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86535*FLEN/8, x4, x1, x2) - -inst_28846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8400001f; valaddr_reg:x3; val_offset:86538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86538*FLEN/8, x4, x1, x2) - -inst_28847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8400003f; valaddr_reg:x3; val_offset:86541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86541*FLEN/8, x4, x1, x2) - -inst_28848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8400007f; valaddr_reg:x3; val_offset:86544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86544*FLEN/8, x4, x1, x2) - -inst_28849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x840000ff; valaddr_reg:x3; val_offset:86547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86547*FLEN/8, x4, x1, x2) - -inst_28850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x840001ff; valaddr_reg:x3; val_offset:86550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86550*FLEN/8, x4, x1, x2) - -inst_28851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x840003ff; valaddr_reg:x3; val_offset:86553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86553*FLEN/8, x4, x1, x2) - -inst_28852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x840007ff; valaddr_reg:x3; val_offset:86556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86556*FLEN/8, x4, x1, x2) - -inst_28853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84000fff; valaddr_reg:x3; val_offset:86559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86559*FLEN/8, x4, x1, x2) - -inst_28854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84001fff; valaddr_reg:x3; val_offset:86562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86562*FLEN/8, x4, x1, x2) - -inst_28855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84003fff; valaddr_reg:x3; val_offset:86565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86565*FLEN/8, x4, x1, x2) - -inst_28856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84007fff; valaddr_reg:x3; val_offset:86568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86568*FLEN/8, x4, x1, x2) - -inst_28857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8400ffff; valaddr_reg:x3; val_offset:86571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86571*FLEN/8, x4, x1, x2) - -inst_28858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8401ffff; valaddr_reg:x3; val_offset:86574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86574*FLEN/8, x4, x1, x2) - -inst_28859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8403ffff; valaddr_reg:x3; val_offset:86577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86577*FLEN/8, x4, x1, x2) - -inst_28860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x8407ffff; valaddr_reg:x3; val_offset:86580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86580*FLEN/8, x4, x1, x2) - -inst_28861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x840fffff; valaddr_reg:x3; val_offset:86583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86583*FLEN/8, x4, x1, x2) - -inst_28862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x841fffff; valaddr_reg:x3; val_offset:86586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86586*FLEN/8, x4, x1, x2) - -inst_28863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x843fffff; valaddr_reg:x3; val_offset:86589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86589*FLEN/8, x4, x1, x2) - -inst_28864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84400000; valaddr_reg:x3; val_offset:86592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86592*FLEN/8, x4, x1, x2) - -inst_28865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84600000; valaddr_reg:x3; val_offset:86595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86595*FLEN/8, x4, x1, x2) - -inst_28866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84700000; valaddr_reg:x3; val_offset:86598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86598*FLEN/8, x4, x1, x2) - -inst_28867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x84780000; valaddr_reg:x3; val_offset:86601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86601*FLEN/8, x4, x1, x2) - -inst_28868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847c0000; valaddr_reg:x3; val_offset:86604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86604*FLEN/8, x4, x1, x2) - -inst_28869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847e0000; valaddr_reg:x3; val_offset:86607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86607*FLEN/8, x4, x1, x2) - -inst_28870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847f0000; valaddr_reg:x3; val_offset:86610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86610*FLEN/8, x4, x1, x2) - -inst_28871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847f8000; valaddr_reg:x3; val_offset:86613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86613*FLEN/8, x4, x1, x2) - -inst_28872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847fc000; valaddr_reg:x3; val_offset:86616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86616*FLEN/8, x4, x1, x2) - -inst_28873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847fe000; valaddr_reg:x3; val_offset:86619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86619*FLEN/8, x4, x1, x2) - -inst_28874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847ff000; valaddr_reg:x3; val_offset:86622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86622*FLEN/8, x4, x1, x2) - -inst_28875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847ff800; valaddr_reg:x3; val_offset:86625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86625*FLEN/8, x4, x1, x2) - -inst_28876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847ffc00; valaddr_reg:x3; val_offset:86628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86628*FLEN/8, x4, x1, x2) - -inst_28877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847ffe00; valaddr_reg:x3; val_offset:86631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86631*FLEN/8, x4, x1, x2) - -inst_28878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847fff00; valaddr_reg:x3; val_offset:86634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86634*FLEN/8, x4, x1, x2) - -inst_28879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847fff80; valaddr_reg:x3; val_offset:86637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86637*FLEN/8, x4, x1, x2) - -inst_28880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847fffc0; valaddr_reg:x3; val_offset:86640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86640*FLEN/8, x4, x1, x2) - -inst_28881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847fffe0; valaddr_reg:x3; val_offset:86643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86643*FLEN/8, x4, x1, x2) - -inst_28882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847ffff0; valaddr_reg:x3; val_offset:86646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86646*FLEN/8, x4, x1, x2) - -inst_28883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847ffff8; valaddr_reg:x3; val_offset:86649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86649*FLEN/8, x4, x1, x2) - -inst_28884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847ffffc; valaddr_reg:x3; val_offset:86652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86652*FLEN/8, x4, x1, x2) - -inst_28885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847ffffe; valaddr_reg:x3; val_offset:86655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86655*FLEN/8, x4, x1, x2) - -inst_28886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; -op3val:0x847fffff; valaddr_reg:x3; val_offset:86658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86658*FLEN/8, x4, x1, x2) - -inst_28887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7800000; valaddr_reg:x3; val_offset:86661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86661*FLEN/8, x4, x1, x2) - -inst_28888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7800001; valaddr_reg:x3; val_offset:86664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86664*FLEN/8, x4, x1, x2) - -inst_28889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7800003; valaddr_reg:x3; val_offset:86667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86667*FLEN/8, x4, x1, x2) - -inst_28890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7800007; valaddr_reg:x3; val_offset:86670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86670*FLEN/8, x4, x1, x2) - -inst_28891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb780000f; valaddr_reg:x3; val_offset:86673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86673*FLEN/8, x4, x1, x2) - -inst_28892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb780001f; valaddr_reg:x3; val_offset:86676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86676*FLEN/8, x4, x1, x2) - -inst_28893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb780003f; valaddr_reg:x3; val_offset:86679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86679*FLEN/8, x4, x1, x2) - -inst_28894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb780007f; valaddr_reg:x3; val_offset:86682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86682*FLEN/8, x4, x1, x2) - -inst_28895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb78000ff; valaddr_reg:x3; val_offset:86685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86685*FLEN/8, x4, x1, x2) - -inst_28896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb78001ff; valaddr_reg:x3; val_offset:86688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86688*FLEN/8, x4, x1, x2) - -inst_28897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb78003ff; valaddr_reg:x3; val_offset:86691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86691*FLEN/8, x4, x1, x2) - -inst_28898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb78007ff; valaddr_reg:x3; val_offset:86694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86694*FLEN/8, x4, x1, x2) - -inst_28899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7800fff; valaddr_reg:x3; val_offset:86697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86697*FLEN/8, x4, x1, x2) - -inst_28900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7801fff; valaddr_reg:x3; val_offset:86700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86700*FLEN/8, x4, x1, x2) - -inst_28901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7803fff; valaddr_reg:x3; val_offset:86703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86703*FLEN/8, x4, x1, x2) - -inst_28902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7807fff; valaddr_reg:x3; val_offset:86706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86706*FLEN/8, x4, x1, x2) - -inst_28903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb780ffff; valaddr_reg:x3; val_offset:86709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86709*FLEN/8, x4, x1, x2) - -inst_28904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb781ffff; valaddr_reg:x3; val_offset:86712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86712*FLEN/8, x4, x1, x2) - -inst_28905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb783ffff; valaddr_reg:x3; val_offset:86715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86715*FLEN/8, x4, x1, x2) - -inst_28906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb787ffff; valaddr_reg:x3; val_offset:86718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86718*FLEN/8, x4, x1, x2) - -inst_28907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb78fffff; valaddr_reg:x3; val_offset:86721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86721*FLEN/8, x4, x1, x2) - -inst_28908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb79fffff; valaddr_reg:x3; val_offset:86724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86724*FLEN/8, x4, x1, x2) - -inst_28909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7bfffff; valaddr_reg:x3; val_offset:86727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86727*FLEN/8, x4, x1, x2) - -inst_28910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7c00000; valaddr_reg:x3; val_offset:86730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86730*FLEN/8, x4, x1, x2) - -inst_28911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7e00000; valaddr_reg:x3; val_offset:86733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86733*FLEN/8, x4, x1, x2) - -inst_28912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7f00000; valaddr_reg:x3; val_offset:86736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86736*FLEN/8, x4, x1, x2) - -inst_28913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7f80000; valaddr_reg:x3; val_offset:86739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86739*FLEN/8, x4, x1, x2) - -inst_28914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fc0000; valaddr_reg:x3; val_offset:86742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86742*FLEN/8, x4, x1, x2) - -inst_28915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fe0000; valaddr_reg:x3; val_offset:86745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86745*FLEN/8, x4, x1, x2) - -inst_28916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ff0000; valaddr_reg:x3; val_offset:86748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86748*FLEN/8, x4, x1, x2) - -inst_28917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ff8000; valaddr_reg:x3; val_offset:86751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86751*FLEN/8, x4, x1, x2) - -inst_28918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ffc000; valaddr_reg:x3; val_offset:86754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86754*FLEN/8, x4, x1, x2) - -inst_28919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ffe000; valaddr_reg:x3; val_offset:86757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86757*FLEN/8, x4, x1, x2) - -inst_28920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fff000; valaddr_reg:x3; val_offset:86760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86760*FLEN/8, x4, x1, x2) - -inst_28921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fff800; valaddr_reg:x3; val_offset:86763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86763*FLEN/8, x4, x1, x2) - -inst_28922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fffc00; valaddr_reg:x3; val_offset:86766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86766*FLEN/8, x4, x1, x2) - -inst_28923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fffe00; valaddr_reg:x3; val_offset:86769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86769*FLEN/8, x4, x1, x2) - -inst_28924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ffff00; valaddr_reg:x3; val_offset:86772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86772*FLEN/8, x4, x1, x2) - -inst_28925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ffff80; valaddr_reg:x3; val_offset:86775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86775*FLEN/8, x4, x1, x2) - -inst_28926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ffffc0; valaddr_reg:x3; val_offset:86778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86778*FLEN/8, x4, x1, x2) - -inst_28927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ffffe0; valaddr_reg:x3; val_offset:86781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86781*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_227) - -inst_28928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fffff0; valaddr_reg:x3; val_offset:86784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86784*FLEN/8, x4, x1, x2) - -inst_28929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fffff8; valaddr_reg:x3; val_offset:86787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86787*FLEN/8, x4, x1, x2) - -inst_28930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fffffc; valaddr_reg:x3; val_offset:86790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86790*FLEN/8, x4, x1, x2) - -inst_28931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7fffffe; valaddr_reg:x3; val_offset:86793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86793*FLEN/8, x4, x1, x2) - -inst_28932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xb7ffffff; valaddr_reg:x3; val_offset:86796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86796*FLEN/8, x4, x1, x2) - -inst_28933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbf800001; valaddr_reg:x3; val_offset:86799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86799*FLEN/8, x4, x1, x2) - -inst_28934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbf800003; valaddr_reg:x3; val_offset:86802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86802*FLEN/8, x4, x1, x2) - -inst_28935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbf800007; valaddr_reg:x3; val_offset:86805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86805*FLEN/8, x4, x1, x2) - -inst_28936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbf999999; valaddr_reg:x3; val_offset:86808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86808*FLEN/8, x4, x1, x2) - -inst_28937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:86811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86811*FLEN/8, x4, x1, x2) - -inst_28938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:86814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86814*FLEN/8, x4, x1, x2) - -inst_28939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:86817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86817*FLEN/8, x4, x1, x2) - -inst_28940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:86820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86820*FLEN/8, x4, x1, x2) - -inst_28941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:86823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86823*FLEN/8, x4, x1, x2) - -inst_28942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:86826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86826*FLEN/8, x4, x1, x2) - -inst_28943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:86829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86829*FLEN/8, x4, x1, x2) - -inst_28944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:86832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86832*FLEN/8, x4, x1, x2) - -inst_28945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:86835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86835*FLEN/8, x4, x1, x2) - -inst_28946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:86838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86838*FLEN/8, x4, x1, x2) - -inst_28947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:86841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86841*FLEN/8, x4, x1, x2) - -inst_28948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:86844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86844*FLEN/8, x4, x1, x2) - -inst_28949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7800000; valaddr_reg:x3; val_offset:86847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86847*FLEN/8, x4, x1, x2) - -inst_28950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7800001; valaddr_reg:x3; val_offset:86850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86850*FLEN/8, x4, x1, x2) - -inst_28951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7800003; valaddr_reg:x3; val_offset:86853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86853*FLEN/8, x4, x1, x2) - -inst_28952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7800007; valaddr_reg:x3; val_offset:86856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86856*FLEN/8, x4, x1, x2) - -inst_28953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf780000f; valaddr_reg:x3; val_offset:86859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86859*FLEN/8, x4, x1, x2) - -inst_28954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf780001f; valaddr_reg:x3; val_offset:86862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86862*FLEN/8, x4, x1, x2) - -inst_28955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf780003f; valaddr_reg:x3; val_offset:86865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86865*FLEN/8, x4, x1, x2) - -inst_28956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf780007f; valaddr_reg:x3; val_offset:86868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86868*FLEN/8, x4, x1, x2) - -inst_28957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf78000ff; valaddr_reg:x3; val_offset:86871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86871*FLEN/8, x4, x1, x2) - -inst_28958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf78001ff; valaddr_reg:x3; val_offset:86874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86874*FLEN/8, x4, x1, x2) - -inst_28959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf78003ff; valaddr_reg:x3; val_offset:86877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86877*FLEN/8, x4, x1, x2) - -inst_28960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf78007ff; valaddr_reg:x3; val_offset:86880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86880*FLEN/8, x4, x1, x2) - -inst_28961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7800fff; valaddr_reg:x3; val_offset:86883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86883*FLEN/8, x4, x1, x2) - -inst_28962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7801fff; valaddr_reg:x3; val_offset:86886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86886*FLEN/8, x4, x1, x2) - -inst_28963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7803fff; valaddr_reg:x3; val_offset:86889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86889*FLEN/8, x4, x1, x2) - -inst_28964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7807fff; valaddr_reg:x3; val_offset:86892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86892*FLEN/8, x4, x1, x2) - -inst_28965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf780ffff; valaddr_reg:x3; val_offset:86895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86895*FLEN/8, x4, x1, x2) - -inst_28966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf781ffff; valaddr_reg:x3; val_offset:86898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86898*FLEN/8, x4, x1, x2) - -inst_28967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf783ffff; valaddr_reg:x3; val_offset:86901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86901*FLEN/8, x4, x1, x2) - -inst_28968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf787ffff; valaddr_reg:x3; val_offset:86904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86904*FLEN/8, x4, x1, x2) - -inst_28969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf78fffff; valaddr_reg:x3; val_offset:86907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86907*FLEN/8, x4, x1, x2) - -inst_28970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf79fffff; valaddr_reg:x3; val_offset:86910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86910*FLEN/8, x4, x1, x2) - -inst_28971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7bfffff; valaddr_reg:x3; val_offset:86913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86913*FLEN/8, x4, x1, x2) - -inst_28972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7c00000; valaddr_reg:x3; val_offset:86916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86916*FLEN/8, x4, x1, x2) - -inst_28973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7e00000; valaddr_reg:x3; val_offset:86919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86919*FLEN/8, x4, x1, x2) - -inst_28974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7f00000; valaddr_reg:x3; val_offset:86922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86922*FLEN/8, x4, x1, x2) - -inst_28975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7f80000; valaddr_reg:x3; val_offset:86925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86925*FLEN/8, x4, x1, x2) - -inst_28976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fc0000; valaddr_reg:x3; val_offset:86928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86928*FLEN/8, x4, x1, x2) - -inst_28977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fe0000; valaddr_reg:x3; val_offset:86931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86931*FLEN/8, x4, x1, x2) - -inst_28978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ff0000; valaddr_reg:x3; val_offset:86934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86934*FLEN/8, x4, x1, x2) - -inst_28979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ff8000; valaddr_reg:x3; val_offset:86937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86937*FLEN/8, x4, x1, x2) - -inst_28980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ffc000; valaddr_reg:x3; val_offset:86940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86940*FLEN/8, x4, x1, x2) - -inst_28981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ffe000; valaddr_reg:x3; val_offset:86943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86943*FLEN/8, x4, x1, x2) - -inst_28982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fff000; valaddr_reg:x3; val_offset:86946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86946*FLEN/8, x4, x1, x2) - -inst_28983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fff800; valaddr_reg:x3; val_offset:86949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86949*FLEN/8, x4, x1, x2) - -inst_28984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fffc00; valaddr_reg:x3; val_offset:86952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86952*FLEN/8, x4, x1, x2) - -inst_28985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fffe00; valaddr_reg:x3; val_offset:86955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86955*FLEN/8, x4, x1, x2) - -inst_28986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ffff00; valaddr_reg:x3; val_offset:86958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86958*FLEN/8, x4, x1, x2) - -inst_28987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ffff80; valaddr_reg:x3; val_offset:86961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86961*FLEN/8, x4, x1, x2) - -inst_28988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ffffc0; valaddr_reg:x3; val_offset:86964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86964*FLEN/8, x4, x1, x2) - -inst_28989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ffffe0; valaddr_reg:x3; val_offset:86967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86967*FLEN/8, x4, x1, x2) - -inst_28990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fffff0; valaddr_reg:x3; val_offset:86970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86970*FLEN/8, x4, x1, x2) - -inst_28991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fffff8; valaddr_reg:x3; val_offset:86973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86973*FLEN/8, x4, x1, x2) - -inst_28992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fffffc; valaddr_reg:x3; val_offset:86976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86976*FLEN/8, x4, x1, x2) - -inst_28993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7fffffe; valaddr_reg:x3; val_offset:86979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86979*FLEN/8, x4, x1, x2) - -inst_28994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xf7ffffff; valaddr_reg:x3; val_offset:86982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86982*FLEN/8, x4, x1, x2) - -inst_28995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff000001; valaddr_reg:x3; val_offset:86985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86985*FLEN/8, x4, x1, x2) - -inst_28996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff000003; valaddr_reg:x3; val_offset:86988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86988*FLEN/8, x4, x1, x2) - -inst_28997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff000007; valaddr_reg:x3; val_offset:86991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86991*FLEN/8, x4, x1, x2) - -inst_28998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff199999; valaddr_reg:x3; val_offset:86994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86994*FLEN/8, x4, x1, x2) - -inst_28999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff249249; valaddr_reg:x3; val_offset:86997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86997*FLEN/8, x4, x1, x2) - -inst_29000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff333333; valaddr_reg:x3; val_offset:87000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87000*FLEN/8, x4, x1, x2) - -inst_29001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:87003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87003*FLEN/8, x4, x1, x2) - -inst_29002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:87006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87006*FLEN/8, x4, x1, x2) - -inst_29003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff444444; valaddr_reg:x3; val_offset:87009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87009*FLEN/8, x4, x1, x2) - -inst_29004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:87012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87012*FLEN/8, x4, x1, x2) - -inst_29005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:87015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87015*FLEN/8, x4, x1, x2) - -inst_29006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff666666; valaddr_reg:x3; val_offset:87018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87018*FLEN/8, x4, x1, x2) - -inst_29007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:87021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87021*FLEN/8, x4, x1, x2) - -inst_29008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:87024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87024*FLEN/8, x4, x1, x2) - -inst_29009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:87027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87027*FLEN/8, x4, x1, x2) - -inst_29010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:87030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87030*FLEN/8, x4, x1, x2) - -inst_29011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:87033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87033*FLEN/8, x4, x1, x2) - -inst_29012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:87036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87036*FLEN/8, x4, x1, x2) - -inst_29013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:87039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87039*FLEN/8, x4, x1, x2) - -inst_29014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:87042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87042*FLEN/8, x4, x1, x2) - -inst_29015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:87045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87045*FLEN/8, x4, x1, x2) - -inst_29016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:87048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87048*FLEN/8, x4, x1, x2) - -inst_29017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:87051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87051*FLEN/8, x4, x1, x2) - -inst_29018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:87054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87054*FLEN/8, x4, x1, x2) - -inst_29019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:87057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87057*FLEN/8, x4, x1, x2) - -inst_29020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:87060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87060*FLEN/8, x4, x1, x2) - -inst_29021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:87063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87063*FLEN/8, x4, x1, x2) - -inst_29022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:87066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87066*FLEN/8, x4, x1, x2) - -inst_29023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:87069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87069*FLEN/8, x4, x1, x2) - -inst_29024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:87072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87072*FLEN/8, x4, x1, x2) - -inst_29025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:87075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87075*FLEN/8, x4, x1, x2) - -inst_29026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:87078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87078*FLEN/8, x4, x1, x2) - -inst_29027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83800000; valaddr_reg:x3; val_offset:87081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87081*FLEN/8, x4, x1, x2) - -inst_29028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83800001; valaddr_reg:x3; val_offset:87084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87084*FLEN/8, x4, x1, x2) - -inst_29029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83800003; valaddr_reg:x3; val_offset:87087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87087*FLEN/8, x4, x1, x2) - -inst_29030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83800007; valaddr_reg:x3; val_offset:87090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87090*FLEN/8, x4, x1, x2) - -inst_29031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x8380000f; valaddr_reg:x3; val_offset:87093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87093*FLEN/8, x4, x1, x2) - -inst_29032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x8380001f; valaddr_reg:x3; val_offset:87096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87096*FLEN/8, x4, x1, x2) - -inst_29033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x8380003f; valaddr_reg:x3; val_offset:87099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87099*FLEN/8, x4, x1, x2) - -inst_29034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x8380007f; valaddr_reg:x3; val_offset:87102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87102*FLEN/8, x4, x1, x2) - -inst_29035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x838000ff; valaddr_reg:x3; val_offset:87105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87105*FLEN/8, x4, x1, x2) - -inst_29036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x838001ff; valaddr_reg:x3; val_offset:87108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87108*FLEN/8, x4, x1, x2) - -inst_29037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x838003ff; valaddr_reg:x3; val_offset:87111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87111*FLEN/8, x4, x1, x2) - -inst_29038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x838007ff; valaddr_reg:x3; val_offset:87114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87114*FLEN/8, x4, x1, x2) - -inst_29039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83800fff; valaddr_reg:x3; val_offset:87117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87117*FLEN/8, x4, x1, x2) - -inst_29040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83801fff; valaddr_reg:x3; val_offset:87120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87120*FLEN/8, x4, x1, x2) - -inst_29041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83803fff; valaddr_reg:x3; val_offset:87123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87123*FLEN/8, x4, x1, x2) - -inst_29042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83807fff; valaddr_reg:x3; val_offset:87126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87126*FLEN/8, x4, x1, x2) - -inst_29043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x8380ffff; valaddr_reg:x3; val_offset:87129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87129*FLEN/8, x4, x1, x2) - -inst_29044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x8381ffff; valaddr_reg:x3; val_offset:87132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87132*FLEN/8, x4, x1, x2) - -inst_29045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x8383ffff; valaddr_reg:x3; val_offset:87135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87135*FLEN/8, x4, x1, x2) - -inst_29046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x8387ffff; valaddr_reg:x3; val_offset:87138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87138*FLEN/8, x4, x1, x2) - -inst_29047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x838fffff; valaddr_reg:x3; val_offset:87141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87141*FLEN/8, x4, x1, x2) - -inst_29048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x839fffff; valaddr_reg:x3; val_offset:87144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87144*FLEN/8, x4, x1, x2) - -inst_29049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83bfffff; valaddr_reg:x3; val_offset:87147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87147*FLEN/8, x4, x1, x2) - -inst_29050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83c00000; valaddr_reg:x3; val_offset:87150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87150*FLEN/8, x4, x1, x2) - -inst_29051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83e00000; valaddr_reg:x3; val_offset:87153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87153*FLEN/8, x4, x1, x2) - -inst_29052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83f00000; valaddr_reg:x3; val_offset:87156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87156*FLEN/8, x4, x1, x2) - -inst_29053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83f80000; valaddr_reg:x3; val_offset:87159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87159*FLEN/8, x4, x1, x2) - -inst_29054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fc0000; valaddr_reg:x3; val_offset:87162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87162*FLEN/8, x4, x1, x2) - -inst_29055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fe0000; valaddr_reg:x3; val_offset:87165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87165*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_228) - -inst_29056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ff0000; valaddr_reg:x3; val_offset:87168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87168*FLEN/8, x4, x1, x2) - -inst_29057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ff8000; valaddr_reg:x3; val_offset:87171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87171*FLEN/8, x4, x1, x2) - -inst_29058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ffc000; valaddr_reg:x3; val_offset:87174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87174*FLEN/8, x4, x1, x2) - -inst_29059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ffe000; valaddr_reg:x3; val_offset:87177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87177*FLEN/8, x4, x1, x2) - -inst_29060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fff000; valaddr_reg:x3; val_offset:87180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87180*FLEN/8, x4, x1, x2) - -inst_29061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fff800; valaddr_reg:x3; val_offset:87183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87183*FLEN/8, x4, x1, x2) - -inst_29062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fffc00; valaddr_reg:x3; val_offset:87186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87186*FLEN/8, x4, x1, x2) - -inst_29063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fffe00; valaddr_reg:x3; val_offset:87189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87189*FLEN/8, x4, x1, x2) - -inst_29064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ffff00; valaddr_reg:x3; val_offset:87192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87192*FLEN/8, x4, x1, x2) - -inst_29065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ffff80; valaddr_reg:x3; val_offset:87195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87195*FLEN/8, x4, x1, x2) - -inst_29066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ffffc0; valaddr_reg:x3; val_offset:87198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87198*FLEN/8, x4, x1, x2) - -inst_29067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ffffe0; valaddr_reg:x3; val_offset:87201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87201*FLEN/8, x4, x1, x2) - -inst_29068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fffff0; valaddr_reg:x3; val_offset:87204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87204*FLEN/8, x4, x1, x2) - -inst_29069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fffff8; valaddr_reg:x3; val_offset:87207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87207*FLEN/8, x4, x1, x2) - -inst_29070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fffffc; valaddr_reg:x3; val_offset:87210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87210*FLEN/8, x4, x1, x2) - -inst_29071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83fffffe; valaddr_reg:x3; val_offset:87213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87213*FLEN/8, x4, x1, x2) - -inst_29072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; -op3val:0x83ffffff; valaddr_reg:x3; val_offset:87216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87216*FLEN/8, x4, x1, x2) - -inst_29073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0000000; valaddr_reg:x3; val_offset:87219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87219*FLEN/8, x4, x1, x2) - -inst_29074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0000001; valaddr_reg:x3; val_offset:87222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87222*FLEN/8, x4, x1, x2) - -inst_29075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0000003; valaddr_reg:x3; val_offset:87225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87225*FLEN/8, x4, x1, x2) - -inst_29076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0000007; valaddr_reg:x3; val_offset:87228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87228*FLEN/8, x4, x1, x2) - -inst_29077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf000000f; valaddr_reg:x3; val_offset:87231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87231*FLEN/8, x4, x1, x2) - -inst_29078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf000001f; valaddr_reg:x3; val_offset:87234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87234*FLEN/8, x4, x1, x2) - -inst_29079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf000003f; valaddr_reg:x3; val_offset:87237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87237*FLEN/8, x4, x1, x2) - -inst_29080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf000007f; valaddr_reg:x3; val_offset:87240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87240*FLEN/8, x4, x1, x2) - -inst_29081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf00000ff; valaddr_reg:x3; val_offset:87243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87243*FLEN/8, x4, x1, x2) - -inst_29082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf00001ff; valaddr_reg:x3; val_offset:87246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87246*FLEN/8, x4, x1, x2) - -inst_29083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf00003ff; valaddr_reg:x3; val_offset:87249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87249*FLEN/8, x4, x1, x2) - -inst_29084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf00007ff; valaddr_reg:x3; val_offset:87252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87252*FLEN/8, x4, x1, x2) - -inst_29085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0000fff; valaddr_reg:x3; val_offset:87255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87255*FLEN/8, x4, x1, x2) - -inst_29086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0001fff; valaddr_reg:x3; val_offset:87258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87258*FLEN/8, x4, x1, x2) - -inst_29087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0003fff; valaddr_reg:x3; val_offset:87261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87261*FLEN/8, x4, x1, x2) - -inst_29088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0007fff; valaddr_reg:x3; val_offset:87264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87264*FLEN/8, x4, x1, x2) - -inst_29089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf000ffff; valaddr_reg:x3; val_offset:87267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87267*FLEN/8, x4, x1, x2) - -inst_29090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf001ffff; valaddr_reg:x3; val_offset:87270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87270*FLEN/8, x4, x1, x2) - -inst_29091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf003ffff; valaddr_reg:x3; val_offset:87273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87273*FLEN/8, x4, x1, x2) - -inst_29092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf007ffff; valaddr_reg:x3; val_offset:87276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87276*FLEN/8, x4, x1, x2) - -inst_29093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf00fffff; valaddr_reg:x3; val_offset:87279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87279*FLEN/8, x4, x1, x2) - -inst_29094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf01fffff; valaddr_reg:x3; val_offset:87282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87282*FLEN/8, x4, x1, x2) - -inst_29095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf03fffff; valaddr_reg:x3; val_offset:87285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87285*FLEN/8, x4, x1, x2) - -inst_29096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0400000; valaddr_reg:x3; val_offset:87288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87288*FLEN/8, x4, x1, x2) - -inst_29097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0600000; valaddr_reg:x3; val_offset:87291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87291*FLEN/8, x4, x1, x2) - -inst_29098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0700000; valaddr_reg:x3; val_offset:87294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87294*FLEN/8, x4, x1, x2) - -inst_29099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf0780000; valaddr_reg:x3; val_offset:87297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87297*FLEN/8, x4, x1, x2) - -inst_29100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07c0000; valaddr_reg:x3; val_offset:87300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87300*FLEN/8, x4, x1, x2) - -inst_29101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07e0000; valaddr_reg:x3; val_offset:87303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87303*FLEN/8, x4, x1, x2) - -inst_29102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07f0000; valaddr_reg:x3; val_offset:87306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87306*FLEN/8, x4, x1, x2) - -inst_29103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07f8000; valaddr_reg:x3; val_offset:87309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87309*FLEN/8, x4, x1, x2) - -inst_29104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07fc000; valaddr_reg:x3; val_offset:87312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87312*FLEN/8, x4, x1, x2) - -inst_29105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07fe000; valaddr_reg:x3; val_offset:87315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87315*FLEN/8, x4, x1, x2) - -inst_29106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07ff000; valaddr_reg:x3; val_offset:87318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87318*FLEN/8, x4, x1, x2) - -inst_29107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07ff800; valaddr_reg:x3; val_offset:87321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87321*FLEN/8, x4, x1, x2) - -inst_29108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07ffc00; valaddr_reg:x3; val_offset:87324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87324*FLEN/8, x4, x1, x2) - -inst_29109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07ffe00; valaddr_reg:x3; val_offset:87327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87327*FLEN/8, x4, x1, x2) - -inst_29110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07fff00; valaddr_reg:x3; val_offset:87330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87330*FLEN/8, x4, x1, x2) - -inst_29111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07fff80; valaddr_reg:x3; val_offset:87333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87333*FLEN/8, x4, x1, x2) - -inst_29112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07fffc0; valaddr_reg:x3; val_offset:87336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87336*FLEN/8, x4, x1, x2) - -inst_29113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07fffe0; valaddr_reg:x3; val_offset:87339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87339*FLEN/8, x4, x1, x2) - -inst_29114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07ffff0; valaddr_reg:x3; val_offset:87342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87342*FLEN/8, x4, x1, x2) - -inst_29115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07ffff8; valaddr_reg:x3; val_offset:87345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87345*FLEN/8, x4, x1, x2) - -inst_29116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07ffffc; valaddr_reg:x3; val_offset:87348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87348*FLEN/8, x4, x1, x2) - -inst_29117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07ffffe; valaddr_reg:x3; val_offset:87351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87351*FLEN/8, x4, x1, x2) - -inst_29118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xf07fffff; valaddr_reg:x3; val_offset:87354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87354*FLEN/8, x4, x1, x2) - -inst_29119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff000001; valaddr_reg:x3; val_offset:87357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87357*FLEN/8, x4, x1, x2) - -inst_29120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff000003; valaddr_reg:x3; val_offset:87360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87360*FLEN/8, x4, x1, x2) - -inst_29121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff000007; valaddr_reg:x3; val_offset:87363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87363*FLEN/8, x4, x1, x2) - -inst_29122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff199999; valaddr_reg:x3; val_offset:87366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87366*FLEN/8, x4, x1, x2) - -inst_29123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff249249; valaddr_reg:x3; val_offset:87369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87369*FLEN/8, x4, x1, x2) - -inst_29124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff333333; valaddr_reg:x3; val_offset:87372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87372*FLEN/8, x4, x1, x2) - -inst_29125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:87375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87375*FLEN/8, x4, x1, x2) - -inst_29126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:87378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87378*FLEN/8, x4, x1, x2) - -inst_29127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff444444; valaddr_reg:x3; val_offset:87381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87381*FLEN/8, x4, x1, x2) - -inst_29128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:87384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87384*FLEN/8, x4, x1, x2) - -inst_29129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:87387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87387*FLEN/8, x4, x1, x2) - -inst_29130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff666666; valaddr_reg:x3; val_offset:87390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87390*FLEN/8, x4, x1, x2) - -inst_29131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:87393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87393*FLEN/8, x4, x1, x2) - -inst_29132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:87396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87396*FLEN/8, x4, x1, x2) - -inst_29133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:87399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87399*FLEN/8, x4, x1, x2) - -inst_29134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:87402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87402*FLEN/8, x4, x1, x2) - -inst_29135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1000000; valaddr_reg:x3; val_offset:87405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87405*FLEN/8, x4, x1, x2) - -inst_29136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1000001; valaddr_reg:x3; val_offset:87408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87408*FLEN/8, x4, x1, x2) - -inst_29137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1000003; valaddr_reg:x3; val_offset:87411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87411*FLEN/8, x4, x1, x2) - -inst_29138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1000007; valaddr_reg:x3; val_offset:87414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87414*FLEN/8, x4, x1, x2) - -inst_29139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf100000f; valaddr_reg:x3; val_offset:87417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87417*FLEN/8, x4, x1, x2) - -inst_29140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf100001f; valaddr_reg:x3; val_offset:87420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87420*FLEN/8, x4, x1, x2) - -inst_29141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf100003f; valaddr_reg:x3; val_offset:87423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87423*FLEN/8, x4, x1, x2) - -inst_29142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf100007f; valaddr_reg:x3; val_offset:87426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87426*FLEN/8, x4, x1, x2) - -inst_29143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf10000ff; valaddr_reg:x3; val_offset:87429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87429*FLEN/8, x4, x1, x2) - -inst_29144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf10001ff; valaddr_reg:x3; val_offset:87432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87432*FLEN/8, x4, x1, x2) - -inst_29145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf10003ff; valaddr_reg:x3; val_offset:87435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87435*FLEN/8, x4, x1, x2) - -inst_29146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf10007ff; valaddr_reg:x3; val_offset:87438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87438*FLEN/8, x4, x1, x2) - -inst_29147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1000fff; valaddr_reg:x3; val_offset:87441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87441*FLEN/8, x4, x1, x2) - -inst_29148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1001fff; valaddr_reg:x3; val_offset:87444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87444*FLEN/8, x4, x1, x2) - -inst_29149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1003fff; valaddr_reg:x3; val_offset:87447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87447*FLEN/8, x4, x1, x2) - -inst_29150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1007fff; valaddr_reg:x3; val_offset:87450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87450*FLEN/8, x4, x1, x2) - -inst_29151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf100ffff; valaddr_reg:x3; val_offset:87453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87453*FLEN/8, x4, x1, x2) - -inst_29152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf101ffff; valaddr_reg:x3; val_offset:87456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87456*FLEN/8, x4, x1, x2) - -inst_29153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf103ffff; valaddr_reg:x3; val_offset:87459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87459*FLEN/8, x4, x1, x2) - -inst_29154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf107ffff; valaddr_reg:x3; val_offset:87462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87462*FLEN/8, x4, x1, x2) - -inst_29155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf10fffff; valaddr_reg:x3; val_offset:87465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87465*FLEN/8, x4, x1, x2) - -inst_29156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf11fffff; valaddr_reg:x3; val_offset:87468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87468*FLEN/8, x4, x1, x2) - -inst_29157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf13fffff; valaddr_reg:x3; val_offset:87471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87471*FLEN/8, x4, x1, x2) - -inst_29158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1400000; valaddr_reg:x3; val_offset:87474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87474*FLEN/8, x4, x1, x2) - -inst_29159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1600000; valaddr_reg:x3; val_offset:87477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87477*FLEN/8, x4, x1, x2) - -inst_29160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1700000; valaddr_reg:x3; val_offset:87480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87480*FLEN/8, x4, x1, x2) - -inst_29161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf1780000; valaddr_reg:x3; val_offset:87483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87483*FLEN/8, x4, x1, x2) - -inst_29162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17c0000; valaddr_reg:x3; val_offset:87486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87486*FLEN/8, x4, x1, x2) - -inst_29163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17e0000; valaddr_reg:x3; val_offset:87489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87489*FLEN/8, x4, x1, x2) - -inst_29164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17f0000; valaddr_reg:x3; val_offset:87492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87492*FLEN/8, x4, x1, x2) - -inst_29165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17f8000; valaddr_reg:x3; val_offset:87495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87495*FLEN/8, x4, x1, x2) - -inst_29166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17fc000; valaddr_reg:x3; val_offset:87498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87498*FLEN/8, x4, x1, x2) - -inst_29167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17fe000; valaddr_reg:x3; val_offset:87501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87501*FLEN/8, x4, x1, x2) - -inst_29168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17ff000; valaddr_reg:x3; val_offset:87504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87504*FLEN/8, x4, x1, x2) - -inst_29169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17ff800; valaddr_reg:x3; val_offset:87507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87507*FLEN/8, x4, x1, x2) - -inst_29170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17ffc00; valaddr_reg:x3; val_offset:87510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87510*FLEN/8, x4, x1, x2) - -inst_29171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17ffe00; valaddr_reg:x3; val_offset:87513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87513*FLEN/8, x4, x1, x2) - -inst_29172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17fff00; valaddr_reg:x3; val_offset:87516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87516*FLEN/8, x4, x1, x2) - -inst_29173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17fff80; valaddr_reg:x3; val_offset:87519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87519*FLEN/8, x4, x1, x2) - -inst_29174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17fffc0; valaddr_reg:x3; val_offset:87522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87522*FLEN/8, x4, x1, x2) - -inst_29175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17fffe0; valaddr_reg:x3; val_offset:87525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87525*FLEN/8, x4, x1, x2) - -inst_29176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17ffff0; valaddr_reg:x3; val_offset:87528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87528*FLEN/8, x4, x1, x2) - -inst_29177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17ffff8; valaddr_reg:x3; val_offset:87531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87531*FLEN/8, x4, x1, x2) - -inst_29178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17ffffc; valaddr_reg:x3; val_offset:87534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87534*FLEN/8, x4, x1, x2) - -inst_29179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17ffffe; valaddr_reg:x3; val_offset:87537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87537*FLEN/8, x4, x1, x2) - -inst_29180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xf17fffff; valaddr_reg:x3; val_offset:87540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87540*FLEN/8, x4, x1, x2) - -inst_29181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff000001; valaddr_reg:x3; val_offset:87543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87543*FLEN/8, x4, x1, x2) - -inst_29182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff000003; valaddr_reg:x3; val_offset:87546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87546*FLEN/8, x4, x1, x2) - -inst_29183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff000007; valaddr_reg:x3; val_offset:87549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87549*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_229) - -inst_29184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff199999; valaddr_reg:x3; val_offset:87552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87552*FLEN/8, x4, x1, x2) - -inst_29185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff249249; valaddr_reg:x3; val_offset:87555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87555*FLEN/8, x4, x1, x2) - -inst_29186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff333333; valaddr_reg:x3; val_offset:87558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87558*FLEN/8, x4, x1, x2) - -inst_29187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:87561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87561*FLEN/8, x4, x1, x2) - -inst_29188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:87564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87564*FLEN/8, x4, x1, x2) - -inst_29189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff444444; valaddr_reg:x3; val_offset:87567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87567*FLEN/8, x4, x1, x2) - -inst_29190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:87570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87570*FLEN/8, x4, x1, x2) - -inst_29191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:87573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87573*FLEN/8, x4, x1, x2) - -inst_29192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff666666; valaddr_reg:x3; val_offset:87576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87576*FLEN/8, x4, x1, x2) - -inst_29193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:87579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87579*FLEN/8, x4, x1, x2) - -inst_29194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:87582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87582*FLEN/8, x4, x1, x2) - -inst_29195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:87585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87585*FLEN/8, x4, x1, x2) - -inst_29196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:87588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87588*FLEN/8, x4, x1, x2) - -inst_29197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbf800001; valaddr_reg:x3; val_offset:87591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87591*FLEN/8, x4, x1, x2) - -inst_29198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbf800003; valaddr_reg:x3; val_offset:87594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87594*FLEN/8, x4, x1, x2) - -inst_29199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbf800007; valaddr_reg:x3; val_offset:87597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87597*FLEN/8, x4, x1, x2) - -inst_29200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbf999999; valaddr_reg:x3; val_offset:87600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87600*FLEN/8, x4, x1, x2) - -inst_29201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:87603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87603*FLEN/8, x4, x1, x2) - -inst_29202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:87606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87606*FLEN/8, x4, x1, x2) - -inst_29203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:87609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87609*FLEN/8, x4, x1, x2) - -inst_29204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:87612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87612*FLEN/8, x4, x1, x2) - -inst_29205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:87615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87615*FLEN/8, x4, x1, x2) - -inst_29206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:87618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87618*FLEN/8, x4, x1, x2) - -inst_29207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:87621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87621*FLEN/8, x4, x1, x2) - -inst_29208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:87624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87624*FLEN/8, x4, x1, x2) - -inst_29209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:87627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87627*FLEN/8, x4, x1, x2) - -inst_29210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:87630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87630*FLEN/8, x4, x1, x2) - -inst_29211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:87633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87633*FLEN/8, x4, x1, x2) - -inst_29212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:87636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87636*FLEN/8, x4, x1, x2) - -inst_29213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf000000; valaddr_reg:x3; val_offset:87639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87639*FLEN/8, x4, x1, x2) - -inst_29214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf000001; valaddr_reg:x3; val_offset:87642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87642*FLEN/8, x4, x1, x2) - -inst_29215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf000003; valaddr_reg:x3; val_offset:87645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87645*FLEN/8, x4, x1, x2) - -inst_29216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf000007; valaddr_reg:x3; val_offset:87648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87648*FLEN/8, x4, x1, x2) - -inst_29217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf00000f; valaddr_reg:x3; val_offset:87651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87651*FLEN/8, x4, x1, x2) - -inst_29218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf00001f; valaddr_reg:x3; val_offset:87654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87654*FLEN/8, x4, x1, x2) - -inst_29219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf00003f; valaddr_reg:x3; val_offset:87657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87657*FLEN/8, x4, x1, x2) - -inst_29220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf00007f; valaddr_reg:x3; val_offset:87660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87660*FLEN/8, x4, x1, x2) - -inst_29221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf0000ff; valaddr_reg:x3; val_offset:87663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87663*FLEN/8, x4, x1, x2) - -inst_29222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf0001ff; valaddr_reg:x3; val_offset:87666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87666*FLEN/8, x4, x1, x2) - -inst_29223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf0003ff; valaddr_reg:x3; val_offset:87669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87669*FLEN/8, x4, x1, x2) - -inst_29224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf0007ff; valaddr_reg:x3; val_offset:87672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87672*FLEN/8, x4, x1, x2) - -inst_29225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf000fff; valaddr_reg:x3; val_offset:87675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87675*FLEN/8, x4, x1, x2) - -inst_29226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf001fff; valaddr_reg:x3; val_offset:87678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87678*FLEN/8, x4, x1, x2) - -inst_29227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf003fff; valaddr_reg:x3; val_offset:87681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87681*FLEN/8, x4, x1, x2) - -inst_29228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf007fff; valaddr_reg:x3; val_offset:87684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87684*FLEN/8, x4, x1, x2) - -inst_29229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf00ffff; valaddr_reg:x3; val_offset:87687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87687*FLEN/8, x4, x1, x2) - -inst_29230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf01ffff; valaddr_reg:x3; val_offset:87690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87690*FLEN/8, x4, x1, x2) - -inst_29231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf03ffff; valaddr_reg:x3; val_offset:87693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87693*FLEN/8, x4, x1, x2) - -inst_29232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf07ffff; valaddr_reg:x3; val_offset:87696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87696*FLEN/8, x4, x1, x2) - -inst_29233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf0fffff; valaddr_reg:x3; val_offset:87699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87699*FLEN/8, x4, x1, x2) - -inst_29234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf1fffff; valaddr_reg:x3; val_offset:87702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87702*FLEN/8, x4, x1, x2) - -inst_29235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf3fffff; valaddr_reg:x3; val_offset:87705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87705*FLEN/8, x4, x1, x2) - -inst_29236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf400000; valaddr_reg:x3; val_offset:87708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87708*FLEN/8, x4, x1, x2) - -inst_29237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf600000; valaddr_reg:x3; val_offset:87711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87711*FLEN/8, x4, x1, x2) - -inst_29238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf700000; valaddr_reg:x3; val_offset:87714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87714*FLEN/8, x4, x1, x2) - -inst_29239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf780000; valaddr_reg:x3; val_offset:87717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87717*FLEN/8, x4, x1, x2) - -inst_29240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7c0000; valaddr_reg:x3; val_offset:87720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87720*FLEN/8, x4, x1, x2) - -inst_29241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7e0000; valaddr_reg:x3; val_offset:87723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87723*FLEN/8, x4, x1, x2) - -inst_29242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7f0000; valaddr_reg:x3; val_offset:87726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87726*FLEN/8, x4, x1, x2) - -inst_29243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7f8000; valaddr_reg:x3; val_offset:87729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87729*FLEN/8, x4, x1, x2) - -inst_29244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7fc000; valaddr_reg:x3; val_offset:87732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87732*FLEN/8, x4, x1, x2) - -inst_29245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7fe000; valaddr_reg:x3; val_offset:87735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87735*FLEN/8, x4, x1, x2) - -inst_29246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7ff000; valaddr_reg:x3; val_offset:87738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87738*FLEN/8, x4, x1, x2) - -inst_29247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7ff800; valaddr_reg:x3; val_offset:87741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87741*FLEN/8, x4, x1, x2) - -inst_29248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7ffc00; valaddr_reg:x3; val_offset:87744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87744*FLEN/8, x4, x1, x2) - -inst_29249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7ffe00; valaddr_reg:x3; val_offset:87747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87747*FLEN/8, x4, x1, x2) - -inst_29250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7fff00; valaddr_reg:x3; val_offset:87750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87750*FLEN/8, x4, x1, x2) - -inst_29251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7fff80; valaddr_reg:x3; val_offset:87753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87753*FLEN/8, x4, x1, x2) - -inst_29252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7fffc0; valaddr_reg:x3; val_offset:87756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87756*FLEN/8, x4, x1, x2) - -inst_29253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7fffe0; valaddr_reg:x3; val_offset:87759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87759*FLEN/8, x4, x1, x2) - -inst_29254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7ffff0; valaddr_reg:x3; val_offset:87762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87762*FLEN/8, x4, x1, x2) - -inst_29255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7ffff8; valaddr_reg:x3; val_offset:87765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87765*FLEN/8, x4, x1, x2) - -inst_29256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7ffffc; valaddr_reg:x3; val_offset:87768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87768*FLEN/8, x4, x1, x2) - -inst_29257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7ffffe; valaddr_reg:x3; val_offset:87771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87771*FLEN/8, x4, x1, x2) - -inst_29258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; -op3val:0xdf7fffff; valaddr_reg:x3; val_offset:87774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87774*FLEN/8, x4, x1, x2) - -inst_29259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3f800001; valaddr_reg:x3; val_offset:87777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87777*FLEN/8, x4, x1, x2) - -inst_29260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3f800003; valaddr_reg:x3; val_offset:87780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87780*FLEN/8, x4, x1, x2) - -inst_29261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3f800007; valaddr_reg:x3; val_offset:87783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87783*FLEN/8, x4, x1, x2) - -inst_29262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3f999999; valaddr_reg:x3; val_offset:87786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87786*FLEN/8, x4, x1, x2) - -inst_29263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:87789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87789*FLEN/8, x4, x1, x2) - -inst_29264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:87792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87792*FLEN/8, x4, x1, x2) - -inst_29265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:87795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87795*FLEN/8, x4, x1, x2) - -inst_29266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:87798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87798*FLEN/8, x4, x1, x2) - -inst_29267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:87801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87801*FLEN/8, x4, x1, x2) - -inst_29268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:87804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87804*FLEN/8, x4, x1, x2) - -inst_29269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:87807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87807*FLEN/8, x4, x1, x2) - -inst_29270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:87810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87810*FLEN/8, x4, x1, x2) - -inst_29271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:87813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87813*FLEN/8, x4, x1, x2) - -inst_29272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:87816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87816*FLEN/8, x4, x1, x2) - -inst_29273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:87819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87819*FLEN/8, x4, x1, x2) - -inst_29274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:87822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87822*FLEN/8, x4, x1, x2) - -inst_29275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45800000; valaddr_reg:x3; val_offset:87825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87825*FLEN/8, x4, x1, x2) - -inst_29276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45800001; valaddr_reg:x3; val_offset:87828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87828*FLEN/8, x4, x1, x2) - -inst_29277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45800003; valaddr_reg:x3; val_offset:87831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87831*FLEN/8, x4, x1, x2) - -inst_29278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45800007; valaddr_reg:x3; val_offset:87834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87834*FLEN/8, x4, x1, x2) - -inst_29279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x4580000f; valaddr_reg:x3; val_offset:87837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87837*FLEN/8, x4, x1, x2) - -inst_29280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x4580001f; valaddr_reg:x3; val_offset:87840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87840*FLEN/8, x4, x1, x2) - -inst_29281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x4580003f; valaddr_reg:x3; val_offset:87843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87843*FLEN/8, x4, x1, x2) - -inst_29282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x4580007f; valaddr_reg:x3; val_offset:87846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87846*FLEN/8, x4, x1, x2) - -inst_29283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x458000ff; valaddr_reg:x3; val_offset:87849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87849*FLEN/8, x4, x1, x2) - -inst_29284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x458001ff; valaddr_reg:x3; val_offset:87852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87852*FLEN/8, x4, x1, x2) - -inst_29285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x458003ff; valaddr_reg:x3; val_offset:87855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87855*FLEN/8, x4, x1, x2) - -inst_29286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x458007ff; valaddr_reg:x3; val_offset:87858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87858*FLEN/8, x4, x1, x2) - -inst_29287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45800fff; valaddr_reg:x3; val_offset:87861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87861*FLEN/8, x4, x1, x2) - -inst_29288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45801fff; valaddr_reg:x3; val_offset:87864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87864*FLEN/8, x4, x1, x2) - -inst_29289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45803fff; valaddr_reg:x3; val_offset:87867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87867*FLEN/8, x4, x1, x2) - -inst_29290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45807fff; valaddr_reg:x3; val_offset:87870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87870*FLEN/8, x4, x1, x2) - -inst_29291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x4580ffff; valaddr_reg:x3; val_offset:87873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87873*FLEN/8, x4, x1, x2) - -inst_29292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x4581ffff; valaddr_reg:x3; val_offset:87876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87876*FLEN/8, x4, x1, x2) - -inst_29293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x4583ffff; valaddr_reg:x3; val_offset:87879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87879*FLEN/8, x4, x1, x2) - -inst_29294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x4587ffff; valaddr_reg:x3; val_offset:87882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87882*FLEN/8, x4, x1, x2) - -inst_29295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x458fffff; valaddr_reg:x3; val_offset:87885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87885*FLEN/8, x4, x1, x2) - -inst_29296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x459fffff; valaddr_reg:x3; val_offset:87888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87888*FLEN/8, x4, x1, x2) - -inst_29297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45bfffff; valaddr_reg:x3; val_offset:87891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87891*FLEN/8, x4, x1, x2) - -inst_29298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45c00000; valaddr_reg:x3; val_offset:87894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87894*FLEN/8, x4, x1, x2) - -inst_29299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45e00000; valaddr_reg:x3; val_offset:87897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87897*FLEN/8, x4, x1, x2) - -inst_29300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45f00000; valaddr_reg:x3; val_offset:87900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87900*FLEN/8, x4, x1, x2) - -inst_29301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45f80000; valaddr_reg:x3; val_offset:87903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87903*FLEN/8, x4, x1, x2) - -inst_29302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fc0000; valaddr_reg:x3; val_offset:87906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87906*FLEN/8, x4, x1, x2) - -inst_29303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fe0000; valaddr_reg:x3; val_offset:87909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87909*FLEN/8, x4, x1, x2) - -inst_29304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ff0000; valaddr_reg:x3; val_offset:87912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87912*FLEN/8, x4, x1, x2) - -inst_29305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ff8000; valaddr_reg:x3; val_offset:87915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87915*FLEN/8, x4, x1, x2) - -inst_29306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ffc000; valaddr_reg:x3; val_offset:87918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87918*FLEN/8, x4, x1, x2) - -inst_29307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ffe000; valaddr_reg:x3; val_offset:87921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87921*FLEN/8, x4, x1, x2) - -inst_29308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fff000; valaddr_reg:x3; val_offset:87924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87924*FLEN/8, x4, x1, x2) - -inst_29309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fff800; valaddr_reg:x3; val_offset:87927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87927*FLEN/8, x4, x1, x2) - -inst_29310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fffc00; valaddr_reg:x3; val_offset:87930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87930*FLEN/8, x4, x1, x2) - -inst_29311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fffe00; valaddr_reg:x3; val_offset:87933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87933*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_230) - -inst_29312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ffff00; valaddr_reg:x3; val_offset:87936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87936*FLEN/8, x4, x1, x2) - -inst_29313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ffff80; valaddr_reg:x3; val_offset:87939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87939*FLEN/8, x4, x1, x2) - -inst_29314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ffffc0; valaddr_reg:x3; val_offset:87942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87942*FLEN/8, x4, x1, x2) - -inst_29315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ffffe0; valaddr_reg:x3; val_offset:87945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87945*FLEN/8, x4, x1, x2) - -inst_29316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fffff0; valaddr_reg:x3; val_offset:87948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87948*FLEN/8, x4, x1, x2) - -inst_29317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fffff8; valaddr_reg:x3; val_offset:87951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87951*FLEN/8, x4, x1, x2) - -inst_29318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fffffc; valaddr_reg:x3; val_offset:87954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87954*FLEN/8, x4, x1, x2) - -inst_29319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45fffffe; valaddr_reg:x3; val_offset:87957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87957*FLEN/8, x4, x1, x2) - -inst_29320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; -op3val:0x45ffffff; valaddr_reg:x3; val_offset:87960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87960*FLEN/8, x4, x1, x2) - -inst_29321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5000000; valaddr_reg:x3; val_offset:87963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87963*FLEN/8, x4, x1, x2) - -inst_29322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5000001; valaddr_reg:x3; val_offset:87966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87966*FLEN/8, x4, x1, x2) - -inst_29323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5000003; valaddr_reg:x3; val_offset:87969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87969*FLEN/8, x4, x1, x2) - -inst_29324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5000007; valaddr_reg:x3; val_offset:87972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87972*FLEN/8, x4, x1, x2) - -inst_29325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe500000f; valaddr_reg:x3; val_offset:87975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87975*FLEN/8, x4, x1, x2) - -inst_29326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe500001f; valaddr_reg:x3; val_offset:87978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87978*FLEN/8, x4, x1, x2) - -inst_29327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe500003f; valaddr_reg:x3; val_offset:87981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87981*FLEN/8, x4, x1, x2) - -inst_29328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe500007f; valaddr_reg:x3; val_offset:87984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87984*FLEN/8, x4, x1, x2) - -inst_29329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe50000ff; valaddr_reg:x3; val_offset:87987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87987*FLEN/8, x4, x1, x2) - -inst_29330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe50001ff; valaddr_reg:x3; val_offset:87990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87990*FLEN/8, x4, x1, x2) - -inst_29331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe50003ff; valaddr_reg:x3; val_offset:87993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87993*FLEN/8, x4, x1, x2) - -inst_29332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe50007ff; valaddr_reg:x3; val_offset:87996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87996*FLEN/8, x4, x1, x2) - -inst_29333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5000fff; valaddr_reg:x3; val_offset:87999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87999*FLEN/8, x4, x1, x2) - -inst_29334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5001fff; valaddr_reg:x3; val_offset:88002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88002*FLEN/8, x4, x1, x2) - -inst_29335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5003fff; valaddr_reg:x3; val_offset:88005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88005*FLEN/8, x4, x1, x2) - -inst_29336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5007fff; valaddr_reg:x3; val_offset:88008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88008*FLEN/8, x4, x1, x2) - -inst_29337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe500ffff; valaddr_reg:x3; val_offset:88011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88011*FLEN/8, x4, x1, x2) - -inst_29338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe501ffff; valaddr_reg:x3; val_offset:88014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88014*FLEN/8, x4, x1, x2) - -inst_29339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe503ffff; valaddr_reg:x3; val_offset:88017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88017*FLEN/8, x4, x1, x2) - -inst_29340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe507ffff; valaddr_reg:x3; val_offset:88020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88020*FLEN/8, x4, x1, x2) - -inst_29341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe50fffff; valaddr_reg:x3; val_offset:88023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88023*FLEN/8, x4, x1, x2) - -inst_29342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe51fffff; valaddr_reg:x3; val_offset:88026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88026*FLEN/8, x4, x1, x2) - -inst_29343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe53fffff; valaddr_reg:x3; val_offset:88029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88029*FLEN/8, x4, x1, x2) - -inst_29344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5400000; valaddr_reg:x3; val_offset:88032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88032*FLEN/8, x4, x1, x2) - -inst_29345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5600000; valaddr_reg:x3; val_offset:88035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88035*FLEN/8, x4, x1, x2) - -inst_29346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5700000; valaddr_reg:x3; val_offset:88038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88038*FLEN/8, x4, x1, x2) - -inst_29347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe5780000; valaddr_reg:x3; val_offset:88041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88041*FLEN/8, x4, x1, x2) - -inst_29348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57c0000; valaddr_reg:x3; val_offset:88044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88044*FLEN/8, x4, x1, x2) - -inst_29349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57e0000; valaddr_reg:x3; val_offset:88047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88047*FLEN/8, x4, x1, x2) - -inst_29350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57f0000; valaddr_reg:x3; val_offset:88050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88050*FLEN/8, x4, x1, x2) - -inst_29351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57f8000; valaddr_reg:x3; val_offset:88053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88053*FLEN/8, x4, x1, x2) - -inst_29352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57fc000; valaddr_reg:x3; val_offset:88056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88056*FLEN/8, x4, x1, x2) - -inst_29353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57fe000; valaddr_reg:x3; val_offset:88059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88059*FLEN/8, x4, x1, x2) - -inst_29354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57ff000; valaddr_reg:x3; val_offset:88062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88062*FLEN/8, x4, x1, x2) - -inst_29355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57ff800; valaddr_reg:x3; val_offset:88065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88065*FLEN/8, x4, x1, x2) - -inst_29356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57ffc00; valaddr_reg:x3; val_offset:88068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88068*FLEN/8, x4, x1, x2) - -inst_29357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57ffe00; valaddr_reg:x3; val_offset:88071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88071*FLEN/8, x4, x1, x2) - -inst_29358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57fff00; valaddr_reg:x3; val_offset:88074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88074*FLEN/8, x4, x1, x2) - -inst_29359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57fff80; valaddr_reg:x3; val_offset:88077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88077*FLEN/8, x4, x1, x2) - -inst_29360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57fffc0; valaddr_reg:x3; val_offset:88080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88080*FLEN/8, x4, x1, x2) - -inst_29361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57fffe0; valaddr_reg:x3; val_offset:88083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88083*FLEN/8, x4, x1, x2) - -inst_29362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57ffff0; valaddr_reg:x3; val_offset:88086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88086*FLEN/8, x4, x1, x2) - -inst_29363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57ffff8; valaddr_reg:x3; val_offset:88089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88089*FLEN/8, x4, x1, x2) - -inst_29364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57ffffc; valaddr_reg:x3; val_offset:88092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88092*FLEN/8, x4, x1, x2) - -inst_29365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57ffffe; valaddr_reg:x3; val_offset:88095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88095*FLEN/8, x4, x1, x2) - -inst_29366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xe57fffff; valaddr_reg:x3; val_offset:88098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88098*FLEN/8, x4, x1, x2) - -inst_29367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff000001; valaddr_reg:x3; val_offset:88101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88101*FLEN/8, x4, x1, x2) - -inst_29368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff000003; valaddr_reg:x3; val_offset:88104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88104*FLEN/8, x4, x1, x2) - -inst_29369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff000007; valaddr_reg:x3; val_offset:88107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88107*FLEN/8, x4, x1, x2) - -inst_29370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff199999; valaddr_reg:x3; val_offset:88110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88110*FLEN/8, x4, x1, x2) - -inst_29371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff249249; valaddr_reg:x3; val_offset:88113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88113*FLEN/8, x4, x1, x2) - -inst_29372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff333333; valaddr_reg:x3; val_offset:88116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88116*FLEN/8, x4, x1, x2) - -inst_29373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:88119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88119*FLEN/8, x4, x1, x2) - -inst_29374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:88122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88122*FLEN/8, x4, x1, x2) - -inst_29375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff444444; valaddr_reg:x3; val_offset:88125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88125*FLEN/8, x4, x1, x2) - -inst_29376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:88128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88128*FLEN/8, x4, x1, x2) - -inst_29377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:88131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88131*FLEN/8, x4, x1, x2) - -inst_29378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff666666; valaddr_reg:x3; val_offset:88134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88134*FLEN/8, x4, x1, x2) - -inst_29379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:88137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88137*FLEN/8, x4, x1, x2) - -inst_29380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:88140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88140*FLEN/8, x4, x1, x2) - -inst_29381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:88143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88143*FLEN/8, x4, x1, x2) - -inst_29382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:88146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88146*FLEN/8, x4, x1, x2) - -inst_29383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec800000; valaddr_reg:x3; val_offset:88149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88149*FLEN/8, x4, x1, x2) - -inst_29384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec800001; valaddr_reg:x3; val_offset:88152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88152*FLEN/8, x4, x1, x2) - -inst_29385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec800003; valaddr_reg:x3; val_offset:88155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88155*FLEN/8, x4, x1, x2) - -inst_29386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec800007; valaddr_reg:x3; val_offset:88158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88158*FLEN/8, x4, x1, x2) - -inst_29387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec80000f; valaddr_reg:x3; val_offset:88161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88161*FLEN/8, x4, x1, x2) - -inst_29388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec80001f; valaddr_reg:x3; val_offset:88164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88164*FLEN/8, x4, x1, x2) - -inst_29389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec80003f; valaddr_reg:x3; val_offset:88167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88167*FLEN/8, x4, x1, x2) - -inst_29390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec80007f; valaddr_reg:x3; val_offset:88170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88170*FLEN/8, x4, x1, x2) - -inst_29391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec8000ff; valaddr_reg:x3; val_offset:88173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88173*FLEN/8, x4, x1, x2) - -inst_29392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec8001ff; valaddr_reg:x3; val_offset:88176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88176*FLEN/8, x4, x1, x2) - -inst_29393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec8003ff; valaddr_reg:x3; val_offset:88179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88179*FLEN/8, x4, x1, x2) - -inst_29394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec8007ff; valaddr_reg:x3; val_offset:88182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88182*FLEN/8, x4, x1, x2) - -inst_29395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec800fff; valaddr_reg:x3; val_offset:88185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88185*FLEN/8, x4, x1, x2) - -inst_29396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec801fff; valaddr_reg:x3; val_offset:88188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88188*FLEN/8, x4, x1, x2) - -inst_29397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec803fff; valaddr_reg:x3; val_offset:88191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88191*FLEN/8, x4, x1, x2) - -inst_29398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec807fff; valaddr_reg:x3; val_offset:88194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88194*FLEN/8, x4, x1, x2) - -inst_29399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec80ffff; valaddr_reg:x3; val_offset:88197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88197*FLEN/8, x4, x1, x2) - -inst_29400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec81ffff; valaddr_reg:x3; val_offset:88200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88200*FLEN/8, x4, x1, x2) - -inst_29401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec83ffff; valaddr_reg:x3; val_offset:88203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88203*FLEN/8, x4, x1, x2) - -inst_29402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec87ffff; valaddr_reg:x3; val_offset:88206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88206*FLEN/8, x4, x1, x2) - -inst_29403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec8fffff; valaddr_reg:x3; val_offset:88209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88209*FLEN/8, x4, x1, x2) - -inst_29404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xec9fffff; valaddr_reg:x3; val_offset:88212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88212*FLEN/8, x4, x1, x2) - -inst_29405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecbfffff; valaddr_reg:x3; val_offset:88215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88215*FLEN/8, x4, x1, x2) - -inst_29406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecc00000; valaddr_reg:x3; val_offset:88218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88218*FLEN/8, x4, x1, x2) - -inst_29407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xece00000; valaddr_reg:x3; val_offset:88221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88221*FLEN/8, x4, x1, x2) - -inst_29408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecf00000; valaddr_reg:x3; val_offset:88224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88224*FLEN/8, x4, x1, x2) - -inst_29409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecf80000; valaddr_reg:x3; val_offset:88227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88227*FLEN/8, x4, x1, x2) - -inst_29410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfc0000; valaddr_reg:x3; val_offset:88230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88230*FLEN/8, x4, x1, x2) - -inst_29411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfe0000; valaddr_reg:x3; val_offset:88233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88233*FLEN/8, x4, x1, x2) - -inst_29412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecff0000; valaddr_reg:x3; val_offset:88236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88236*FLEN/8, x4, x1, x2) - -inst_29413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecff8000; valaddr_reg:x3; val_offset:88239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88239*FLEN/8, x4, x1, x2) - -inst_29414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecffc000; valaddr_reg:x3; val_offset:88242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88242*FLEN/8, x4, x1, x2) - -inst_29415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecffe000; valaddr_reg:x3; val_offset:88245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88245*FLEN/8, x4, x1, x2) - -inst_29416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfff000; valaddr_reg:x3; val_offset:88248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88248*FLEN/8, x4, x1, x2) - -inst_29417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfff800; valaddr_reg:x3; val_offset:88251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88251*FLEN/8, x4, x1, x2) - -inst_29418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfffc00; valaddr_reg:x3; val_offset:88254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88254*FLEN/8, x4, x1, x2) - -inst_29419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfffe00; valaddr_reg:x3; val_offset:88257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88257*FLEN/8, x4, x1, x2) - -inst_29420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecffff00; valaddr_reg:x3; val_offset:88260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88260*FLEN/8, x4, x1, x2) - -inst_29421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecffff80; valaddr_reg:x3; val_offset:88263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88263*FLEN/8, x4, x1, x2) - -inst_29422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecffffc0; valaddr_reg:x3; val_offset:88266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88266*FLEN/8, x4, x1, x2) - -inst_29423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecffffe0; valaddr_reg:x3; val_offset:88269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88269*FLEN/8, x4, x1, x2) - -inst_29424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfffff0; valaddr_reg:x3; val_offset:88272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88272*FLEN/8, x4, x1, x2) - -inst_29425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfffff8; valaddr_reg:x3; val_offset:88275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88275*FLEN/8, x4, x1, x2) - -inst_29426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfffffc; valaddr_reg:x3; val_offset:88278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88278*FLEN/8, x4, x1, x2) - -inst_29427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecfffffe; valaddr_reg:x3; val_offset:88281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88281*FLEN/8, x4, x1, x2) - -inst_29428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xecffffff; valaddr_reg:x3; val_offset:88284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88284*FLEN/8, x4, x1, x2) - -inst_29429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff000001; valaddr_reg:x3; val_offset:88287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88287*FLEN/8, x4, x1, x2) - -inst_29430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff000003; valaddr_reg:x3; val_offset:88290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88290*FLEN/8, x4, x1, x2) - -inst_29431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff000007; valaddr_reg:x3; val_offset:88293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88293*FLEN/8, x4, x1, x2) - -inst_29432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff199999; valaddr_reg:x3; val_offset:88296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88296*FLEN/8, x4, x1, x2) - -inst_29433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff249249; valaddr_reg:x3; val_offset:88299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88299*FLEN/8, x4, x1, x2) - -inst_29434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff333333; valaddr_reg:x3; val_offset:88302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88302*FLEN/8, x4, x1, x2) - -inst_29435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:88305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88305*FLEN/8, x4, x1, x2) - -inst_29436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:88308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88308*FLEN/8, x4, x1, x2) - -inst_29437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff444444; valaddr_reg:x3; val_offset:88311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88311*FLEN/8, x4, x1, x2) - -inst_29438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:88314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88314*FLEN/8, x4, x1, x2) - -inst_29439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:88317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88317*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_231) - -inst_29440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff666666; valaddr_reg:x3; val_offset:88320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88320*FLEN/8, x4, x1, x2) - -inst_29441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:88323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88323*FLEN/8, x4, x1, x2) - -inst_29442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:88326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88326*FLEN/8, x4, x1, x2) - -inst_29443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:88329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88329*FLEN/8, x4, x1, x2) - -inst_29444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:88332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88332*FLEN/8, x4, x1, x2) - -inst_29445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa000000; valaddr_reg:x3; val_offset:88335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88335*FLEN/8, x4, x1, x2) - -inst_29446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa000001; valaddr_reg:x3; val_offset:88338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88338*FLEN/8, x4, x1, x2) - -inst_29447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa000003; valaddr_reg:x3; val_offset:88341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88341*FLEN/8, x4, x1, x2) - -inst_29448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa000007; valaddr_reg:x3; val_offset:88344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88344*FLEN/8, x4, x1, x2) - -inst_29449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa00000f; valaddr_reg:x3; val_offset:88347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88347*FLEN/8, x4, x1, x2) - -inst_29450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa00001f; valaddr_reg:x3; val_offset:88350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88350*FLEN/8, x4, x1, x2) - -inst_29451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa00003f; valaddr_reg:x3; val_offset:88353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88353*FLEN/8, x4, x1, x2) - -inst_29452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa00007f; valaddr_reg:x3; val_offset:88356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88356*FLEN/8, x4, x1, x2) - -inst_29453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa0000ff; valaddr_reg:x3; val_offset:88359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88359*FLEN/8, x4, x1, x2) - -inst_29454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa0001ff; valaddr_reg:x3; val_offset:88362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88362*FLEN/8, x4, x1, x2) - -inst_29455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa0003ff; valaddr_reg:x3; val_offset:88365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88365*FLEN/8, x4, x1, x2) - -inst_29456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa0007ff; valaddr_reg:x3; val_offset:88368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88368*FLEN/8, x4, x1, x2) - -inst_29457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa000fff; valaddr_reg:x3; val_offset:88371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88371*FLEN/8, x4, x1, x2) - -inst_29458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa001fff; valaddr_reg:x3; val_offset:88374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88374*FLEN/8, x4, x1, x2) - -inst_29459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa003fff; valaddr_reg:x3; val_offset:88377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88377*FLEN/8, x4, x1, x2) - -inst_29460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa007fff; valaddr_reg:x3; val_offset:88380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88380*FLEN/8, x4, x1, x2) - -inst_29461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa00ffff; valaddr_reg:x3; val_offset:88383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88383*FLEN/8, x4, x1, x2) - -inst_29462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa01ffff; valaddr_reg:x3; val_offset:88386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88386*FLEN/8, x4, x1, x2) - -inst_29463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa03ffff; valaddr_reg:x3; val_offset:88389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88389*FLEN/8, x4, x1, x2) - -inst_29464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa07ffff; valaddr_reg:x3; val_offset:88392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88392*FLEN/8, x4, x1, x2) - -inst_29465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa0fffff; valaddr_reg:x3; val_offset:88395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88395*FLEN/8, x4, x1, x2) - -inst_29466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa1fffff; valaddr_reg:x3; val_offset:88398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88398*FLEN/8, x4, x1, x2) - -inst_29467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa3fffff; valaddr_reg:x3; val_offset:88401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88401*FLEN/8, x4, x1, x2) - -inst_29468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa400000; valaddr_reg:x3; val_offset:88404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88404*FLEN/8, x4, x1, x2) - -inst_29469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa600000; valaddr_reg:x3; val_offset:88407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88407*FLEN/8, x4, x1, x2) - -inst_29470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa700000; valaddr_reg:x3; val_offset:88410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88410*FLEN/8, x4, x1, x2) - -inst_29471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa780000; valaddr_reg:x3; val_offset:88413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88413*FLEN/8, x4, x1, x2) - -inst_29472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7c0000; valaddr_reg:x3; val_offset:88416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88416*FLEN/8, x4, x1, x2) - -inst_29473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7e0000; valaddr_reg:x3; val_offset:88419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88419*FLEN/8, x4, x1, x2) - -inst_29474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7f0000; valaddr_reg:x3; val_offset:88422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88422*FLEN/8, x4, x1, x2) - -inst_29475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7f8000; valaddr_reg:x3; val_offset:88425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88425*FLEN/8, x4, x1, x2) - -inst_29476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7fc000; valaddr_reg:x3; val_offset:88428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88428*FLEN/8, x4, x1, x2) - -inst_29477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7fe000; valaddr_reg:x3; val_offset:88431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88431*FLEN/8, x4, x1, x2) - -inst_29478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7ff000; valaddr_reg:x3; val_offset:88434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88434*FLEN/8, x4, x1, x2) - -inst_29479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7ff800; valaddr_reg:x3; val_offset:88437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88437*FLEN/8, x4, x1, x2) - -inst_29480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7ffc00; valaddr_reg:x3; val_offset:88440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88440*FLEN/8, x4, x1, x2) - -inst_29481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7ffe00; valaddr_reg:x3; val_offset:88443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88443*FLEN/8, x4, x1, x2) - -inst_29482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7fff00; valaddr_reg:x3; val_offset:88446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88446*FLEN/8, x4, x1, x2) - -inst_29483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7fff80; valaddr_reg:x3; val_offset:88449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88449*FLEN/8, x4, x1, x2) - -inst_29484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7fffc0; valaddr_reg:x3; val_offset:88452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88452*FLEN/8, x4, x1, x2) - -inst_29485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7fffe0; valaddr_reg:x3; val_offset:88455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88455*FLEN/8, x4, x1, x2) - -inst_29486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7ffff0; valaddr_reg:x3; val_offset:88458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88458*FLEN/8, x4, x1, x2) - -inst_29487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7ffff8; valaddr_reg:x3; val_offset:88461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88461*FLEN/8, x4, x1, x2) - -inst_29488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7ffffc; valaddr_reg:x3; val_offset:88464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88464*FLEN/8, x4, x1, x2) - -inst_29489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7ffffe; valaddr_reg:x3; val_offset:88467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88467*FLEN/8, x4, x1, x2) - -inst_29490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xaa7fffff; valaddr_reg:x3; val_offset:88470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88470*FLEN/8, x4, x1, x2) - -inst_29491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbf800001; valaddr_reg:x3; val_offset:88473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88473*FLEN/8, x4, x1, x2) - -inst_29492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbf800003; valaddr_reg:x3; val_offset:88476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88476*FLEN/8, x4, x1, x2) - -inst_29493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbf800007; valaddr_reg:x3; val_offset:88479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88479*FLEN/8, x4, x1, x2) - -inst_29494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbf999999; valaddr_reg:x3; val_offset:88482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88482*FLEN/8, x4, x1, x2) - -inst_29495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:88485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88485*FLEN/8, x4, x1, x2) - -inst_29496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:88488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88488*FLEN/8, x4, x1, x2) - -inst_29497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:88491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88491*FLEN/8, x4, x1, x2) - -inst_29498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:88494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88494*FLEN/8, x4, x1, x2) - -inst_29499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:88497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88497*FLEN/8, x4, x1, x2) - -inst_29500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:88500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88500*FLEN/8, x4, x1, x2) - -inst_29501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:88503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88503*FLEN/8, x4, x1, x2) - -inst_29502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:88506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88506*FLEN/8, x4, x1, x2) - -inst_29503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:88509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88509*FLEN/8, x4, x1, x2) - -inst_29504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:88512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88512*FLEN/8, x4, x1, x2) - -inst_29505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:88515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88515*FLEN/8, x4, x1, x2) - -inst_29506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:88518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88518*FLEN/8, x4, x1, x2) - -inst_29507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:88521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88521*FLEN/8, x4, x1, x2) - -inst_29508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:88524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88524*FLEN/8, x4, x1, x2) - -inst_29509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:88527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88527*FLEN/8, x4, x1, x2) - -inst_29510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:88530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88530*FLEN/8, x4, x1, x2) - -inst_29511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:88533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88533*FLEN/8, x4, x1, x2) - -inst_29512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:88536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88536*FLEN/8, x4, x1, x2) - -inst_29513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:88539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88539*FLEN/8, x4, x1, x2) - -inst_29514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:88542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88542*FLEN/8, x4, x1, x2) - -inst_29515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:88545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88545*FLEN/8, x4, x1, x2) - -inst_29516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:88548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88548*FLEN/8, x4, x1, x2) - -inst_29517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:88551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88551*FLEN/8, x4, x1, x2) - -inst_29518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:88554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88554*FLEN/8, x4, x1, x2) - -inst_29519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:88557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88557*FLEN/8, x4, x1, x2) - -inst_29520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:88560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88560*FLEN/8, x4, x1, x2) - -inst_29521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:88563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88563*FLEN/8, x4, x1, x2) - -inst_29522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:88566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88566*FLEN/8, x4, x1, x2) - -inst_29523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d800000; valaddr_reg:x3; val_offset:88569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88569*FLEN/8, x4, x1, x2) - -inst_29524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d800001; valaddr_reg:x3; val_offset:88572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88572*FLEN/8, x4, x1, x2) - -inst_29525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d800003; valaddr_reg:x3; val_offset:88575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88575*FLEN/8, x4, x1, x2) - -inst_29526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d800007; valaddr_reg:x3; val_offset:88578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88578*FLEN/8, x4, x1, x2) - -inst_29527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d80000f; valaddr_reg:x3; val_offset:88581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88581*FLEN/8, x4, x1, x2) - -inst_29528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d80001f; valaddr_reg:x3; val_offset:88584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88584*FLEN/8, x4, x1, x2) - -inst_29529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d80003f; valaddr_reg:x3; val_offset:88587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88587*FLEN/8, x4, x1, x2) - -inst_29530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d80007f; valaddr_reg:x3; val_offset:88590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88590*FLEN/8, x4, x1, x2) - -inst_29531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d8000ff; valaddr_reg:x3; val_offset:88593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88593*FLEN/8, x4, x1, x2) - -inst_29532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d8001ff; valaddr_reg:x3; val_offset:88596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88596*FLEN/8, x4, x1, x2) - -inst_29533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d8003ff; valaddr_reg:x3; val_offset:88599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88599*FLEN/8, x4, x1, x2) - -inst_29534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d8007ff; valaddr_reg:x3; val_offset:88602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88602*FLEN/8, x4, x1, x2) - -inst_29535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d800fff; valaddr_reg:x3; val_offset:88605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88605*FLEN/8, x4, x1, x2) - -inst_29536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d801fff; valaddr_reg:x3; val_offset:88608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88608*FLEN/8, x4, x1, x2) - -inst_29537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d803fff; valaddr_reg:x3; val_offset:88611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88611*FLEN/8, x4, x1, x2) - -inst_29538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d807fff; valaddr_reg:x3; val_offset:88614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88614*FLEN/8, x4, x1, x2) - -inst_29539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d80ffff; valaddr_reg:x3; val_offset:88617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88617*FLEN/8, x4, x1, x2) - -inst_29540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d81ffff; valaddr_reg:x3; val_offset:88620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88620*FLEN/8, x4, x1, x2) - -inst_29541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d83ffff; valaddr_reg:x3; val_offset:88623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88623*FLEN/8, x4, x1, x2) - -inst_29542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d87ffff; valaddr_reg:x3; val_offset:88626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88626*FLEN/8, x4, x1, x2) - -inst_29543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d8fffff; valaddr_reg:x3; val_offset:88629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88629*FLEN/8, x4, x1, x2) - -inst_29544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8d9fffff; valaddr_reg:x3; val_offset:88632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88632*FLEN/8, x4, x1, x2) - -inst_29545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dbfffff; valaddr_reg:x3; val_offset:88635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88635*FLEN/8, x4, x1, x2) - -inst_29546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dc00000; valaddr_reg:x3; val_offset:88638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88638*FLEN/8, x4, x1, x2) - -inst_29547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8de00000; valaddr_reg:x3; val_offset:88641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88641*FLEN/8, x4, x1, x2) - -inst_29548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8df00000; valaddr_reg:x3; val_offset:88644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88644*FLEN/8, x4, x1, x2) - -inst_29549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8df80000; valaddr_reg:x3; val_offset:88647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88647*FLEN/8, x4, x1, x2) - -inst_29550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfc0000; valaddr_reg:x3; val_offset:88650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88650*FLEN/8, x4, x1, x2) - -inst_29551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfe0000; valaddr_reg:x3; val_offset:88653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88653*FLEN/8, x4, x1, x2) - -inst_29552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dff0000; valaddr_reg:x3; val_offset:88656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88656*FLEN/8, x4, x1, x2) - -inst_29553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dff8000; valaddr_reg:x3; val_offset:88659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88659*FLEN/8, x4, x1, x2) - -inst_29554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dffc000; valaddr_reg:x3; val_offset:88662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88662*FLEN/8, x4, x1, x2) - -inst_29555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dffe000; valaddr_reg:x3; val_offset:88665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88665*FLEN/8, x4, x1, x2) - -inst_29556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfff000; valaddr_reg:x3; val_offset:88668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88668*FLEN/8, x4, x1, x2) - -inst_29557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfff800; valaddr_reg:x3; val_offset:88671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88671*FLEN/8, x4, x1, x2) - -inst_29558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfffc00; valaddr_reg:x3; val_offset:88674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88674*FLEN/8, x4, x1, x2) - -inst_29559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfffe00; valaddr_reg:x3; val_offset:88677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88677*FLEN/8, x4, x1, x2) - -inst_29560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dffff00; valaddr_reg:x3; val_offset:88680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88680*FLEN/8, x4, x1, x2) - -inst_29561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dffff80; valaddr_reg:x3; val_offset:88683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88683*FLEN/8, x4, x1, x2) - -inst_29562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dffffc0; valaddr_reg:x3; val_offset:88686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88686*FLEN/8, x4, x1, x2) - -inst_29563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dffffe0; valaddr_reg:x3; val_offset:88689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88689*FLEN/8, x4, x1, x2) - -inst_29564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfffff0; valaddr_reg:x3; val_offset:88692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88692*FLEN/8, x4, x1, x2) - -inst_29565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfffff8; valaddr_reg:x3; val_offset:88695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88695*FLEN/8, x4, x1, x2) - -inst_29566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfffffc; valaddr_reg:x3; val_offset:88698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88698*FLEN/8, x4, x1, x2) - -inst_29567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dfffffe; valaddr_reg:x3; val_offset:88701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88701*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_232) - -inst_29568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; -op3val:0x8dffffff; valaddr_reg:x3; val_offset:88704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88704*FLEN/8, x4, x1, x2) - -inst_29569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:88707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88707*FLEN/8, x4, x1, x2) - -inst_29570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:88710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88710*FLEN/8, x4, x1, x2) - -inst_29571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:88713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88713*FLEN/8, x4, x1, x2) - -inst_29572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:88716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88716*FLEN/8, x4, x1, x2) - -inst_29573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:88719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88719*FLEN/8, x4, x1, x2) - -inst_29574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:88722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88722*FLEN/8, x4, x1, x2) - -inst_29575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:88725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88725*FLEN/8, x4, x1, x2) - -inst_29576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:88728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88728*FLEN/8, x4, x1, x2) - -inst_29577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:88731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88731*FLEN/8, x4, x1, x2) - -inst_29578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:88734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88734*FLEN/8, x4, x1, x2) - -inst_29579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:88737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88737*FLEN/8, x4, x1, x2) - -inst_29580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:88740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88740*FLEN/8, x4, x1, x2) - -inst_29581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:88743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88743*FLEN/8, x4, x1, x2) - -inst_29582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:88746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88746*FLEN/8, x4, x1, x2) - -inst_29583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:88749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88749*FLEN/8, x4, x1, x2) - -inst_29584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:88752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88752*FLEN/8, x4, x1, x2) - -inst_29585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90800000; valaddr_reg:x3; val_offset:88755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88755*FLEN/8, x4, x1, x2) - -inst_29586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90800001; valaddr_reg:x3; val_offset:88758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88758*FLEN/8, x4, x1, x2) - -inst_29587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90800003; valaddr_reg:x3; val_offset:88761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88761*FLEN/8, x4, x1, x2) - -inst_29588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90800007; valaddr_reg:x3; val_offset:88764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88764*FLEN/8, x4, x1, x2) - -inst_29589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x9080000f; valaddr_reg:x3; val_offset:88767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88767*FLEN/8, x4, x1, x2) - -inst_29590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x9080001f; valaddr_reg:x3; val_offset:88770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88770*FLEN/8, x4, x1, x2) - -inst_29591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x9080003f; valaddr_reg:x3; val_offset:88773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88773*FLEN/8, x4, x1, x2) - -inst_29592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x9080007f; valaddr_reg:x3; val_offset:88776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88776*FLEN/8, x4, x1, x2) - -inst_29593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x908000ff; valaddr_reg:x3; val_offset:88779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88779*FLEN/8, x4, x1, x2) - -inst_29594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x908001ff; valaddr_reg:x3; val_offset:88782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88782*FLEN/8, x4, x1, x2) - -inst_29595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x908003ff; valaddr_reg:x3; val_offset:88785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88785*FLEN/8, x4, x1, x2) - -inst_29596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x908007ff; valaddr_reg:x3; val_offset:88788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88788*FLEN/8, x4, x1, x2) - -inst_29597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90800fff; valaddr_reg:x3; val_offset:88791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88791*FLEN/8, x4, x1, x2) - -inst_29598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90801fff; valaddr_reg:x3; val_offset:88794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88794*FLEN/8, x4, x1, x2) - -inst_29599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90803fff; valaddr_reg:x3; val_offset:88797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88797*FLEN/8, x4, x1, x2) - -inst_29600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90807fff; valaddr_reg:x3; val_offset:88800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88800*FLEN/8, x4, x1, x2) - -inst_29601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x9080ffff; valaddr_reg:x3; val_offset:88803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88803*FLEN/8, x4, x1, x2) - -inst_29602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x9081ffff; valaddr_reg:x3; val_offset:88806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88806*FLEN/8, x4, x1, x2) - -inst_29603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x9083ffff; valaddr_reg:x3; val_offset:88809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88809*FLEN/8, x4, x1, x2) - -inst_29604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x9087ffff; valaddr_reg:x3; val_offset:88812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88812*FLEN/8, x4, x1, x2) - -inst_29605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x908fffff; valaddr_reg:x3; val_offset:88815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88815*FLEN/8, x4, x1, x2) - -inst_29606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x909fffff; valaddr_reg:x3; val_offset:88818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88818*FLEN/8, x4, x1, x2) - -inst_29607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90bfffff; valaddr_reg:x3; val_offset:88821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88821*FLEN/8, x4, x1, x2) - -inst_29608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90c00000; valaddr_reg:x3; val_offset:88824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88824*FLEN/8, x4, x1, x2) - -inst_29609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90e00000; valaddr_reg:x3; val_offset:88827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88827*FLEN/8, x4, x1, x2) - -inst_29610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90f00000; valaddr_reg:x3; val_offset:88830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88830*FLEN/8, x4, x1, x2) - -inst_29611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90f80000; valaddr_reg:x3; val_offset:88833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88833*FLEN/8, x4, x1, x2) - -inst_29612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fc0000; valaddr_reg:x3; val_offset:88836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88836*FLEN/8, x4, x1, x2) - -inst_29613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fe0000; valaddr_reg:x3; val_offset:88839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88839*FLEN/8, x4, x1, x2) - -inst_29614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ff0000; valaddr_reg:x3; val_offset:88842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88842*FLEN/8, x4, x1, x2) - -inst_29615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ff8000; valaddr_reg:x3; val_offset:88845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88845*FLEN/8, x4, x1, x2) - -inst_29616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ffc000; valaddr_reg:x3; val_offset:88848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88848*FLEN/8, x4, x1, x2) - -inst_29617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ffe000; valaddr_reg:x3; val_offset:88851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88851*FLEN/8, x4, x1, x2) - -inst_29618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fff000; valaddr_reg:x3; val_offset:88854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88854*FLEN/8, x4, x1, x2) - -inst_29619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fff800; valaddr_reg:x3; val_offset:88857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88857*FLEN/8, x4, x1, x2) - -inst_29620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fffc00; valaddr_reg:x3; val_offset:88860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88860*FLEN/8, x4, x1, x2) - -inst_29621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fffe00; valaddr_reg:x3; val_offset:88863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88863*FLEN/8, x4, x1, x2) - -inst_29622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ffff00; valaddr_reg:x3; val_offset:88866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88866*FLEN/8, x4, x1, x2) - -inst_29623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ffff80; valaddr_reg:x3; val_offset:88869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88869*FLEN/8, x4, x1, x2) - -inst_29624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ffffc0; valaddr_reg:x3; val_offset:88872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88872*FLEN/8, x4, x1, x2) - -inst_29625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ffffe0; valaddr_reg:x3; val_offset:88875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88875*FLEN/8, x4, x1, x2) - -inst_29626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fffff0; valaddr_reg:x3; val_offset:88878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88878*FLEN/8, x4, x1, x2) - -inst_29627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fffff8; valaddr_reg:x3; val_offset:88881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88881*FLEN/8, x4, x1, x2) - -inst_29628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fffffc; valaddr_reg:x3; val_offset:88884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88884*FLEN/8, x4, x1, x2) - -inst_29629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90fffffe; valaddr_reg:x3; val_offset:88887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88887*FLEN/8, x4, x1, x2) - -inst_29630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; -op3val:0x90ffffff; valaddr_reg:x3; val_offset:88890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88890*FLEN/8, x4, x1, x2) - -inst_29631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:88893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88893*FLEN/8, x4, x1, x2) - -inst_29632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:88896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88896*FLEN/8, x4, x1, x2) - -inst_29633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:88899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88899*FLEN/8, x4, x1, x2) - -inst_29634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:88902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88902*FLEN/8, x4, x1, x2) - -inst_29635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:88905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88905*FLEN/8, x4, x1, x2) - -inst_29636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:88908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88908*FLEN/8, x4, x1, x2) - -inst_29637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:88911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88911*FLEN/8, x4, x1, x2) - -inst_29638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:88914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88914*FLEN/8, x4, x1, x2) - -inst_29639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:88917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88917*FLEN/8, x4, x1, x2) - -inst_29640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:88920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88920*FLEN/8, x4, x1, x2) - -inst_29641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:88923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88923*FLEN/8, x4, x1, x2) - -inst_29642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:88926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88926*FLEN/8, x4, x1, x2) - -inst_29643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:88929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88929*FLEN/8, x4, x1, x2) - -inst_29644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:88932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88932*FLEN/8, x4, x1, x2) - -inst_29645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:88935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88935*FLEN/8, x4, x1, x2) - -inst_29646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:88938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88938*FLEN/8, x4, x1, x2) - -inst_29647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa800000; valaddr_reg:x3; val_offset:88941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88941*FLEN/8, x4, x1, x2) - -inst_29648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa800001; valaddr_reg:x3; val_offset:88944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88944*FLEN/8, x4, x1, x2) - -inst_29649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa800003; valaddr_reg:x3; val_offset:88947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88947*FLEN/8, x4, x1, x2) - -inst_29650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa800007; valaddr_reg:x3; val_offset:88950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88950*FLEN/8, x4, x1, x2) - -inst_29651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa80000f; valaddr_reg:x3; val_offset:88953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88953*FLEN/8, x4, x1, x2) - -inst_29652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa80001f; valaddr_reg:x3; val_offset:88956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88956*FLEN/8, x4, x1, x2) - -inst_29653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa80003f; valaddr_reg:x3; val_offset:88959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88959*FLEN/8, x4, x1, x2) - -inst_29654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa80007f; valaddr_reg:x3; val_offset:88962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88962*FLEN/8, x4, x1, x2) - -inst_29655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa8000ff; valaddr_reg:x3; val_offset:88965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88965*FLEN/8, x4, x1, x2) - -inst_29656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa8001ff; valaddr_reg:x3; val_offset:88968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88968*FLEN/8, x4, x1, x2) - -inst_29657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa8003ff; valaddr_reg:x3; val_offset:88971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88971*FLEN/8, x4, x1, x2) - -inst_29658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa8007ff; valaddr_reg:x3; val_offset:88974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88974*FLEN/8, x4, x1, x2) - -inst_29659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa800fff; valaddr_reg:x3; val_offset:88977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88977*FLEN/8, x4, x1, x2) - -inst_29660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa801fff; valaddr_reg:x3; val_offset:88980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88980*FLEN/8, x4, x1, x2) - -inst_29661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa803fff; valaddr_reg:x3; val_offset:88983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88983*FLEN/8, x4, x1, x2) - -inst_29662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa807fff; valaddr_reg:x3; val_offset:88986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88986*FLEN/8, x4, x1, x2) - -inst_29663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa80ffff; valaddr_reg:x3; val_offset:88989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88989*FLEN/8, x4, x1, x2) - -inst_29664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa81ffff; valaddr_reg:x3; val_offset:88992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88992*FLEN/8, x4, x1, x2) - -inst_29665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa83ffff; valaddr_reg:x3; val_offset:88995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88995*FLEN/8, x4, x1, x2) - -inst_29666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa87ffff; valaddr_reg:x3; val_offset:88998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88998*FLEN/8, x4, x1, x2) - -inst_29667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa8fffff; valaddr_reg:x3; val_offset:89001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89001*FLEN/8, x4, x1, x2) - -inst_29668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xa9fffff; valaddr_reg:x3; val_offset:89004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89004*FLEN/8, x4, x1, x2) - -inst_29669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xabfffff; valaddr_reg:x3; val_offset:89007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89007*FLEN/8, x4, x1, x2) - -inst_29670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xac00000; valaddr_reg:x3; val_offset:89010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89010*FLEN/8, x4, x1, x2) - -inst_29671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xae00000; valaddr_reg:x3; val_offset:89013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89013*FLEN/8, x4, x1, x2) - -inst_29672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaf00000; valaddr_reg:x3; val_offset:89016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89016*FLEN/8, x4, x1, x2) - -inst_29673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaf80000; valaddr_reg:x3; val_offset:89019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89019*FLEN/8, x4, x1, x2) - -inst_29674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafc0000; valaddr_reg:x3; val_offset:89022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89022*FLEN/8, x4, x1, x2) - -inst_29675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafe0000; valaddr_reg:x3; val_offset:89025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89025*FLEN/8, x4, x1, x2) - -inst_29676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaff0000; valaddr_reg:x3; val_offset:89028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89028*FLEN/8, x4, x1, x2) - -inst_29677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaff8000; valaddr_reg:x3; val_offset:89031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89031*FLEN/8, x4, x1, x2) - -inst_29678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaffc000; valaddr_reg:x3; val_offset:89034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89034*FLEN/8, x4, x1, x2) - -inst_29679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaffe000; valaddr_reg:x3; val_offset:89037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89037*FLEN/8, x4, x1, x2) - -inst_29680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafff000; valaddr_reg:x3; val_offset:89040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89040*FLEN/8, x4, x1, x2) - -inst_29681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafff800; valaddr_reg:x3; val_offset:89043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89043*FLEN/8, x4, x1, x2) - -inst_29682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafffc00; valaddr_reg:x3; val_offset:89046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89046*FLEN/8, x4, x1, x2) - -inst_29683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafffe00; valaddr_reg:x3; val_offset:89049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89049*FLEN/8, x4, x1, x2) - -inst_29684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaffff00; valaddr_reg:x3; val_offset:89052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89052*FLEN/8, x4, x1, x2) - -inst_29685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaffff80; valaddr_reg:x3; val_offset:89055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89055*FLEN/8, x4, x1, x2) - -inst_29686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaffffc0; valaddr_reg:x3; val_offset:89058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89058*FLEN/8, x4, x1, x2) - -inst_29687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaffffe0; valaddr_reg:x3; val_offset:89061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89061*FLEN/8, x4, x1, x2) - -inst_29688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafffff0; valaddr_reg:x3; val_offset:89064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89064*FLEN/8, x4, x1, x2) - -inst_29689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafffff8; valaddr_reg:x3; val_offset:89067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89067*FLEN/8, x4, x1, x2) - -inst_29690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafffffc; valaddr_reg:x3; val_offset:89070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89070*FLEN/8, x4, x1, x2) - -inst_29691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xafffffe; valaddr_reg:x3; val_offset:89073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89073*FLEN/8, x4, x1, x2) - -inst_29692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; -op3val:0xaffffff; valaddr_reg:x3; val_offset:89076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89076*FLEN/8, x4, x1, x2) - -inst_29693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:89079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89079*FLEN/8, x4, x1, x2) - -inst_29694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:89082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89082*FLEN/8, x4, x1, x2) - -inst_29695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:89085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89085*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_233) - -inst_29696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:89088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89088*FLEN/8, x4, x1, x2) - -inst_29697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:89091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89091*FLEN/8, x4, x1, x2) - -inst_29698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:89094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89094*FLEN/8, x4, x1, x2) - -inst_29699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:89097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89097*FLEN/8, x4, x1, x2) - -inst_29700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:89100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89100*FLEN/8, x4, x1, x2) - -inst_29701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:89103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89103*FLEN/8, x4, x1, x2) - -inst_29702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:89106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89106*FLEN/8, x4, x1, x2) - -inst_29703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:89109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89109*FLEN/8, x4, x1, x2) - -inst_29704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:89112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89112*FLEN/8, x4, x1, x2) - -inst_29705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:89115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89115*FLEN/8, x4, x1, x2) - -inst_29706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:89118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89118*FLEN/8, x4, x1, x2) - -inst_29707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:89121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89121*FLEN/8, x4, x1, x2) - -inst_29708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:89124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89124*FLEN/8, x4, x1, x2) - -inst_29709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b000000; valaddr_reg:x3; val_offset:89127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89127*FLEN/8, x4, x1, x2) - -inst_29710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b000001; valaddr_reg:x3; val_offset:89130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89130*FLEN/8, x4, x1, x2) - -inst_29711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b000003; valaddr_reg:x3; val_offset:89133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89133*FLEN/8, x4, x1, x2) - -inst_29712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b000007; valaddr_reg:x3; val_offset:89136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89136*FLEN/8, x4, x1, x2) - -inst_29713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b00000f; valaddr_reg:x3; val_offset:89139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89139*FLEN/8, x4, x1, x2) - -inst_29714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b00001f; valaddr_reg:x3; val_offset:89142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89142*FLEN/8, x4, x1, x2) - -inst_29715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b00003f; valaddr_reg:x3; val_offset:89145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89145*FLEN/8, x4, x1, x2) - -inst_29716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b00007f; valaddr_reg:x3; val_offset:89148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89148*FLEN/8, x4, x1, x2) - -inst_29717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b0000ff; valaddr_reg:x3; val_offset:89151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89151*FLEN/8, x4, x1, x2) - -inst_29718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b0001ff; valaddr_reg:x3; val_offset:89154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89154*FLEN/8, x4, x1, x2) - -inst_29719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b0003ff; valaddr_reg:x3; val_offset:89157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89157*FLEN/8, x4, x1, x2) - -inst_29720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b0007ff; valaddr_reg:x3; val_offset:89160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89160*FLEN/8, x4, x1, x2) - -inst_29721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b000fff; valaddr_reg:x3; val_offset:89163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89163*FLEN/8, x4, x1, x2) - -inst_29722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b001fff; valaddr_reg:x3; val_offset:89166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89166*FLEN/8, x4, x1, x2) - -inst_29723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b003fff; valaddr_reg:x3; val_offset:89169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89169*FLEN/8, x4, x1, x2) - -inst_29724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b007fff; valaddr_reg:x3; val_offset:89172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89172*FLEN/8, x4, x1, x2) - -inst_29725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b00ffff; valaddr_reg:x3; val_offset:89175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89175*FLEN/8, x4, x1, x2) - -inst_29726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b01ffff; valaddr_reg:x3; val_offset:89178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89178*FLEN/8, x4, x1, x2) - -inst_29727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b03ffff; valaddr_reg:x3; val_offset:89181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89181*FLEN/8, x4, x1, x2) - -inst_29728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b07ffff; valaddr_reg:x3; val_offset:89184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89184*FLEN/8, x4, x1, x2) - -inst_29729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b0fffff; valaddr_reg:x3; val_offset:89187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89187*FLEN/8, x4, x1, x2) - -inst_29730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b1fffff; valaddr_reg:x3; val_offset:89190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89190*FLEN/8, x4, x1, x2) - -inst_29731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b3fffff; valaddr_reg:x3; val_offset:89193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89193*FLEN/8, x4, x1, x2) - -inst_29732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b400000; valaddr_reg:x3; val_offset:89196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89196*FLEN/8, x4, x1, x2) - -inst_29733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b600000; valaddr_reg:x3; val_offset:89199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89199*FLEN/8, x4, x1, x2) - -inst_29734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b700000; valaddr_reg:x3; val_offset:89202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89202*FLEN/8, x4, x1, x2) - -inst_29735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b780000; valaddr_reg:x3; val_offset:89205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89205*FLEN/8, x4, x1, x2) - -inst_29736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7c0000; valaddr_reg:x3; val_offset:89208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89208*FLEN/8, x4, x1, x2) - -inst_29737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7e0000; valaddr_reg:x3; val_offset:89211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89211*FLEN/8, x4, x1, x2) - -inst_29738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7f0000; valaddr_reg:x3; val_offset:89214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89214*FLEN/8, x4, x1, x2) - -inst_29739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7f8000; valaddr_reg:x3; val_offset:89217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89217*FLEN/8, x4, x1, x2) - -inst_29740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7fc000; valaddr_reg:x3; val_offset:89220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89220*FLEN/8, x4, x1, x2) - -inst_29741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7fe000; valaddr_reg:x3; val_offset:89223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89223*FLEN/8, x4, x1, x2) - -inst_29742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7ff000; valaddr_reg:x3; val_offset:89226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89226*FLEN/8, x4, x1, x2) - -inst_29743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7ff800; valaddr_reg:x3; val_offset:89229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89229*FLEN/8, x4, x1, x2) - -inst_29744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:89232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89232*FLEN/8, x4, x1, x2) - -inst_29745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:89235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89235*FLEN/8, x4, x1, x2) - -inst_29746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7fff00; valaddr_reg:x3; val_offset:89238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89238*FLEN/8, x4, x1, x2) - -inst_29747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7fff80; valaddr_reg:x3; val_offset:89241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89241*FLEN/8, x4, x1, x2) - -inst_29748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:89244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89244*FLEN/8, x4, x1, x2) - -inst_29749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:89247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89247*FLEN/8, x4, x1, x2) - -inst_29750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:89250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89250*FLEN/8, x4, x1, x2) - -inst_29751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:89253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89253*FLEN/8, x4, x1, x2) - -inst_29752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:89256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89256*FLEN/8, x4, x1, x2) - -inst_29753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:89259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89259*FLEN/8, x4, x1, x2) - -inst_29754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; -op3val:0x8b7fffff; valaddr_reg:x3; val_offset:89262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89262*FLEN/8, x4, x1, x2) - -inst_29755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbf800001; valaddr_reg:x3; val_offset:89265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89265*FLEN/8, x4, x1, x2) - -inst_29756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbf800003; valaddr_reg:x3; val_offset:89268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89268*FLEN/8, x4, x1, x2) - -inst_29757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbf800007; valaddr_reg:x3; val_offset:89271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89271*FLEN/8, x4, x1, x2) - -inst_29758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbf999999; valaddr_reg:x3; val_offset:89274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89274*FLEN/8, x4, x1, x2) - -inst_29759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:89277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89277*FLEN/8, x4, x1, x2) - -inst_29760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:89280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89280*FLEN/8, x4, x1, x2) - -inst_29761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:89283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89283*FLEN/8, x4, x1, x2) - -inst_29762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:89286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89286*FLEN/8, x4, x1, x2) - -inst_29763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:89289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89289*FLEN/8, x4, x1, x2) - -inst_29764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:89292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89292*FLEN/8, x4, x1, x2) - -inst_29765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:89295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89295*FLEN/8, x4, x1, x2) - -inst_29766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:89298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89298*FLEN/8, x4, x1, x2) - -inst_29767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:89301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89301*FLEN/8, x4, x1, x2) - -inst_29768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:89304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89304*FLEN/8, x4, x1, x2) - -inst_29769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:89307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89307*FLEN/8, x4, x1, x2) - -inst_29770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:89310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89310*FLEN/8, x4, x1, x2) - -inst_29771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf000000; valaddr_reg:x3; val_offset:89313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89313*FLEN/8, x4, x1, x2) - -inst_29772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf000001; valaddr_reg:x3; val_offset:89316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89316*FLEN/8, x4, x1, x2) - -inst_29773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf000003; valaddr_reg:x3; val_offset:89319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89319*FLEN/8, x4, x1, x2) - -inst_29774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf000007; valaddr_reg:x3; val_offset:89322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89322*FLEN/8, x4, x1, x2) - -inst_29775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf00000f; valaddr_reg:x3; val_offset:89325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89325*FLEN/8, x4, x1, x2) - -inst_29776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf00001f; valaddr_reg:x3; val_offset:89328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89328*FLEN/8, x4, x1, x2) - -inst_29777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf00003f; valaddr_reg:x3; val_offset:89331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89331*FLEN/8, x4, x1, x2) - -inst_29778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf00007f; valaddr_reg:x3; val_offset:89334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89334*FLEN/8, x4, x1, x2) - -inst_29779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf0000ff; valaddr_reg:x3; val_offset:89337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89337*FLEN/8, x4, x1, x2) - -inst_29780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf0001ff; valaddr_reg:x3; val_offset:89340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89340*FLEN/8, x4, x1, x2) - -inst_29781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf0003ff; valaddr_reg:x3; val_offset:89343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89343*FLEN/8, x4, x1, x2) - -inst_29782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf0007ff; valaddr_reg:x3; val_offset:89346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89346*FLEN/8, x4, x1, x2) - -inst_29783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf000fff; valaddr_reg:x3; val_offset:89349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89349*FLEN/8, x4, x1, x2) - -inst_29784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf001fff; valaddr_reg:x3; val_offset:89352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89352*FLEN/8, x4, x1, x2) - -inst_29785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf003fff; valaddr_reg:x3; val_offset:89355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89355*FLEN/8, x4, x1, x2) - -inst_29786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf007fff; valaddr_reg:x3; val_offset:89358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89358*FLEN/8, x4, x1, x2) - -inst_29787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf00ffff; valaddr_reg:x3; val_offset:89361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89361*FLEN/8, x4, x1, x2) - -inst_29788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf01ffff; valaddr_reg:x3; val_offset:89364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89364*FLEN/8, x4, x1, x2) - -inst_29789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf03ffff; valaddr_reg:x3; val_offset:89367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89367*FLEN/8, x4, x1, x2) - -inst_29790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf07ffff; valaddr_reg:x3; val_offset:89370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89370*FLEN/8, x4, x1, x2) - -inst_29791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf0fffff; valaddr_reg:x3; val_offset:89373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89373*FLEN/8, x4, x1, x2) - -inst_29792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf1fffff; valaddr_reg:x3; val_offset:89376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89376*FLEN/8, x4, x1, x2) - -inst_29793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf3fffff; valaddr_reg:x3; val_offset:89379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89379*FLEN/8, x4, x1, x2) - -inst_29794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf400000; valaddr_reg:x3; val_offset:89382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89382*FLEN/8, x4, x1, x2) - -inst_29795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf600000; valaddr_reg:x3; val_offset:89385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89385*FLEN/8, x4, x1, x2) - -inst_29796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf700000; valaddr_reg:x3; val_offset:89388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89388*FLEN/8, x4, x1, x2) - -inst_29797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf780000; valaddr_reg:x3; val_offset:89391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89391*FLEN/8, x4, x1, x2) - -inst_29798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7c0000; valaddr_reg:x3; val_offset:89394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89394*FLEN/8, x4, x1, x2) - -inst_29799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7e0000; valaddr_reg:x3; val_offset:89397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89397*FLEN/8, x4, x1, x2) - -inst_29800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7f0000; valaddr_reg:x3; val_offset:89400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89400*FLEN/8, x4, x1, x2) - -inst_29801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7f8000; valaddr_reg:x3; val_offset:89403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89403*FLEN/8, x4, x1, x2) - -inst_29802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7fc000; valaddr_reg:x3; val_offset:89406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89406*FLEN/8, x4, x1, x2) - -inst_29803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7fe000; valaddr_reg:x3; val_offset:89409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89409*FLEN/8, x4, x1, x2) - -inst_29804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7ff000; valaddr_reg:x3; val_offset:89412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89412*FLEN/8, x4, x1, x2) - -inst_29805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7ff800; valaddr_reg:x3; val_offset:89415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89415*FLEN/8, x4, x1, x2) - -inst_29806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7ffc00; valaddr_reg:x3; val_offset:89418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89418*FLEN/8, x4, x1, x2) - -inst_29807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7ffe00; valaddr_reg:x3; val_offset:89421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89421*FLEN/8, x4, x1, x2) - -inst_29808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7fff00; valaddr_reg:x3; val_offset:89424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89424*FLEN/8, x4, x1, x2) - -inst_29809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7fff80; valaddr_reg:x3; val_offset:89427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89427*FLEN/8, x4, x1, x2) - -inst_29810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7fffc0; valaddr_reg:x3; val_offset:89430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89430*FLEN/8, x4, x1, x2) - -inst_29811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7fffe0; valaddr_reg:x3; val_offset:89433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89433*FLEN/8, x4, x1, x2) - -inst_29812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7ffff0; valaddr_reg:x3; val_offset:89436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89436*FLEN/8, x4, x1, x2) - -inst_29813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7ffff8; valaddr_reg:x3; val_offset:89439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89439*FLEN/8, x4, x1, x2) - -inst_29814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7ffffc; valaddr_reg:x3; val_offset:89442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89442*FLEN/8, x4, x1, x2) - -inst_29815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7ffffe; valaddr_reg:x3; val_offset:89445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89445*FLEN/8, x4, x1, x2) - -inst_29816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; -op3val:0xcf7fffff; valaddr_reg:x3; val_offset:89448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89448*FLEN/8, x4, x1, x2) - -inst_29817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:89451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89451*FLEN/8, x4, x1, x2) - -inst_29818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:89454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89454*FLEN/8, x4, x1, x2) - -inst_29819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:89457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89457*FLEN/8, x4, x1, x2) - -inst_29820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:89460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89460*FLEN/8, x4, x1, x2) - -inst_29821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:89463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89463*FLEN/8, x4, x1, x2) - -inst_29822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:89466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89466*FLEN/8, x4, x1, x2) - -inst_29823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:89469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89469*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_234) - -inst_29824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:89472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89472*FLEN/8, x4, x1, x2) - -inst_29825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:89475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89475*FLEN/8, x4, x1, x2) - -inst_29826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:89478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89478*FLEN/8, x4, x1, x2) - -inst_29827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:89481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89481*FLEN/8, x4, x1, x2) - -inst_29828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:89484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89484*FLEN/8, x4, x1, x2) - -inst_29829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:89487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89487*FLEN/8, x4, x1, x2) - -inst_29830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:89490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89490*FLEN/8, x4, x1, x2) - -inst_29831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:89493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89493*FLEN/8, x4, x1, x2) - -inst_29832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:89496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89496*FLEN/8, x4, x1, x2) - -inst_29833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82800000; valaddr_reg:x3; val_offset:89499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89499*FLEN/8, x4, x1, x2) - -inst_29834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82800001; valaddr_reg:x3; val_offset:89502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89502*FLEN/8, x4, x1, x2) - -inst_29835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82800003; valaddr_reg:x3; val_offset:89505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89505*FLEN/8, x4, x1, x2) - -inst_29836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82800007; valaddr_reg:x3; val_offset:89508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89508*FLEN/8, x4, x1, x2) - -inst_29837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x8280000f; valaddr_reg:x3; val_offset:89511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89511*FLEN/8, x4, x1, x2) - -inst_29838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x8280001f; valaddr_reg:x3; val_offset:89514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89514*FLEN/8, x4, x1, x2) - -inst_29839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x8280003f; valaddr_reg:x3; val_offset:89517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89517*FLEN/8, x4, x1, x2) - -inst_29840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x8280007f; valaddr_reg:x3; val_offset:89520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89520*FLEN/8, x4, x1, x2) - -inst_29841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x828000ff; valaddr_reg:x3; val_offset:89523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89523*FLEN/8, x4, x1, x2) - -inst_29842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x828001ff; valaddr_reg:x3; val_offset:89526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89526*FLEN/8, x4, x1, x2) - -inst_29843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x828003ff; valaddr_reg:x3; val_offset:89529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89529*FLEN/8, x4, x1, x2) - -inst_29844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x828007ff; valaddr_reg:x3; val_offset:89532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89532*FLEN/8, x4, x1, x2) - -inst_29845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82800fff; valaddr_reg:x3; val_offset:89535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89535*FLEN/8, x4, x1, x2) - -inst_29846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82801fff; valaddr_reg:x3; val_offset:89538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89538*FLEN/8, x4, x1, x2) - -inst_29847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82803fff; valaddr_reg:x3; val_offset:89541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89541*FLEN/8, x4, x1, x2) - -inst_29848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82807fff; valaddr_reg:x3; val_offset:89544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89544*FLEN/8, x4, x1, x2) - -inst_29849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x8280ffff; valaddr_reg:x3; val_offset:89547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89547*FLEN/8, x4, x1, x2) - -inst_29850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x8281ffff; valaddr_reg:x3; val_offset:89550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89550*FLEN/8, x4, x1, x2) - -inst_29851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x8283ffff; valaddr_reg:x3; val_offset:89553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89553*FLEN/8, x4, x1, x2) - -inst_29852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x8287ffff; valaddr_reg:x3; val_offset:89556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89556*FLEN/8, x4, x1, x2) - -inst_29853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x828fffff; valaddr_reg:x3; val_offset:89559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89559*FLEN/8, x4, x1, x2) - -inst_29854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x829fffff; valaddr_reg:x3; val_offset:89562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89562*FLEN/8, x4, x1, x2) - -inst_29855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82bfffff; valaddr_reg:x3; val_offset:89565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89565*FLEN/8, x4, x1, x2) - -inst_29856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82c00000; valaddr_reg:x3; val_offset:89568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89568*FLEN/8, x4, x1, x2) - -inst_29857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82e00000; valaddr_reg:x3; val_offset:89571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89571*FLEN/8, x4, x1, x2) - -inst_29858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82f00000; valaddr_reg:x3; val_offset:89574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89574*FLEN/8, x4, x1, x2) - -inst_29859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82f80000; valaddr_reg:x3; val_offset:89577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89577*FLEN/8, x4, x1, x2) - -inst_29860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fc0000; valaddr_reg:x3; val_offset:89580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89580*FLEN/8, x4, x1, x2) - -inst_29861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fe0000; valaddr_reg:x3; val_offset:89583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89583*FLEN/8, x4, x1, x2) - -inst_29862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ff0000; valaddr_reg:x3; val_offset:89586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89586*FLEN/8, x4, x1, x2) - -inst_29863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ff8000; valaddr_reg:x3; val_offset:89589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89589*FLEN/8, x4, x1, x2) - -inst_29864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ffc000; valaddr_reg:x3; val_offset:89592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89592*FLEN/8, x4, x1, x2) - -inst_29865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ffe000; valaddr_reg:x3; val_offset:89595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89595*FLEN/8, x4, x1, x2) - -inst_29866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fff000; valaddr_reg:x3; val_offset:89598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89598*FLEN/8, x4, x1, x2) - -inst_29867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fff800; valaddr_reg:x3; val_offset:89601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89601*FLEN/8, x4, x1, x2) - -inst_29868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fffc00; valaddr_reg:x3; val_offset:89604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89604*FLEN/8, x4, x1, x2) - -inst_29869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fffe00; valaddr_reg:x3; val_offset:89607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89607*FLEN/8, x4, x1, x2) - -inst_29870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ffff00; valaddr_reg:x3; val_offset:89610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89610*FLEN/8, x4, x1, x2) - -inst_29871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ffff80; valaddr_reg:x3; val_offset:89613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89613*FLEN/8, x4, x1, x2) - -inst_29872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ffffc0; valaddr_reg:x3; val_offset:89616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89616*FLEN/8, x4, x1, x2) - -inst_29873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ffffe0; valaddr_reg:x3; val_offset:89619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89619*FLEN/8, x4, x1, x2) - -inst_29874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fffff0; valaddr_reg:x3; val_offset:89622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89622*FLEN/8, x4, x1, x2) - -inst_29875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fffff8; valaddr_reg:x3; val_offset:89625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89625*FLEN/8, x4, x1, x2) - -inst_29876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fffffc; valaddr_reg:x3; val_offset:89628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89628*FLEN/8, x4, x1, x2) - -inst_29877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82fffffe; valaddr_reg:x3; val_offset:89631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89631*FLEN/8, x4, x1, x2) - -inst_29878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; -op3val:0x82ffffff; valaddr_reg:x3; val_offset:89634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89634*FLEN/8, x4, x1, x2) - -inst_29879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30800000; valaddr_reg:x3; val_offset:89637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89637*FLEN/8, x4, x1, x2) - -inst_29880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30800001; valaddr_reg:x3; val_offset:89640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89640*FLEN/8, x4, x1, x2) - -inst_29881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30800003; valaddr_reg:x3; val_offset:89643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89643*FLEN/8, x4, x1, x2) - -inst_29882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30800007; valaddr_reg:x3; val_offset:89646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89646*FLEN/8, x4, x1, x2) - -inst_29883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3080000f; valaddr_reg:x3; val_offset:89649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89649*FLEN/8, x4, x1, x2) - -inst_29884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3080001f; valaddr_reg:x3; val_offset:89652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89652*FLEN/8, x4, x1, x2) - -inst_29885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3080003f; valaddr_reg:x3; val_offset:89655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89655*FLEN/8, x4, x1, x2) - -inst_29886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3080007f; valaddr_reg:x3; val_offset:89658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89658*FLEN/8, x4, x1, x2) - -inst_29887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x308000ff; valaddr_reg:x3; val_offset:89661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89661*FLEN/8, x4, x1, x2) - -inst_29888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x308001ff; valaddr_reg:x3; val_offset:89664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89664*FLEN/8, x4, x1, x2) - -inst_29889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x308003ff; valaddr_reg:x3; val_offset:89667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89667*FLEN/8, x4, x1, x2) - -inst_29890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x308007ff; valaddr_reg:x3; val_offset:89670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89670*FLEN/8, x4, x1, x2) - -inst_29891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30800fff; valaddr_reg:x3; val_offset:89673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89673*FLEN/8, x4, x1, x2) - -inst_29892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30801fff; valaddr_reg:x3; val_offset:89676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89676*FLEN/8, x4, x1, x2) - -inst_29893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30803fff; valaddr_reg:x3; val_offset:89679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89679*FLEN/8, x4, x1, x2) - -inst_29894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30807fff; valaddr_reg:x3; val_offset:89682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89682*FLEN/8, x4, x1, x2) - -inst_29895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3080ffff; valaddr_reg:x3; val_offset:89685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89685*FLEN/8, x4, x1, x2) - -inst_29896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3081ffff; valaddr_reg:x3; val_offset:89688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89688*FLEN/8, x4, x1, x2) - -inst_29897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3083ffff; valaddr_reg:x3; val_offset:89691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89691*FLEN/8, x4, x1, x2) - -inst_29898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3087ffff; valaddr_reg:x3; val_offset:89694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89694*FLEN/8, x4, x1, x2) - -inst_29899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x308fffff; valaddr_reg:x3; val_offset:89697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89697*FLEN/8, x4, x1, x2) - -inst_29900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x309fffff; valaddr_reg:x3; val_offset:89700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89700*FLEN/8, x4, x1, x2) - -inst_29901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30bfffff; valaddr_reg:x3; val_offset:89703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89703*FLEN/8, x4, x1, x2) - -inst_29902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30c00000; valaddr_reg:x3; val_offset:89706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89706*FLEN/8, x4, x1, x2) - -inst_29903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30e00000; valaddr_reg:x3; val_offset:89709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89709*FLEN/8, x4, x1, x2) - -inst_29904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30f00000; valaddr_reg:x3; val_offset:89712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89712*FLEN/8, x4, x1, x2) - -inst_29905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30f80000; valaddr_reg:x3; val_offset:89715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89715*FLEN/8, x4, x1, x2) - -inst_29906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fc0000; valaddr_reg:x3; val_offset:89718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89718*FLEN/8, x4, x1, x2) - -inst_29907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fe0000; valaddr_reg:x3; val_offset:89721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89721*FLEN/8, x4, x1, x2) - -inst_29908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ff0000; valaddr_reg:x3; val_offset:89724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89724*FLEN/8, x4, x1, x2) - -inst_29909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ff8000; valaddr_reg:x3; val_offset:89727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89727*FLEN/8, x4, x1, x2) - -inst_29910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ffc000; valaddr_reg:x3; val_offset:89730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89730*FLEN/8, x4, x1, x2) - -inst_29911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ffe000; valaddr_reg:x3; val_offset:89733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89733*FLEN/8, x4, x1, x2) - -inst_29912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fff000; valaddr_reg:x3; val_offset:89736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89736*FLEN/8, x4, x1, x2) - -inst_29913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fff800; valaddr_reg:x3; val_offset:89739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89739*FLEN/8, x4, x1, x2) - -inst_29914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fffc00; valaddr_reg:x3; val_offset:89742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89742*FLEN/8, x4, x1, x2) - -inst_29915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fffe00; valaddr_reg:x3; val_offset:89745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89745*FLEN/8, x4, x1, x2) - -inst_29916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ffff00; valaddr_reg:x3; val_offset:89748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89748*FLEN/8, x4, x1, x2) - -inst_29917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ffff80; valaddr_reg:x3; val_offset:89751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89751*FLEN/8, x4, x1, x2) - -inst_29918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ffffc0; valaddr_reg:x3; val_offset:89754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89754*FLEN/8, x4, x1, x2) - -inst_29919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ffffe0; valaddr_reg:x3; val_offset:89757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89757*FLEN/8, x4, x1, x2) - -inst_29920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fffff0; valaddr_reg:x3; val_offset:89760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89760*FLEN/8, x4, x1, x2) - -inst_29921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fffff8; valaddr_reg:x3; val_offset:89763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89763*FLEN/8, x4, x1, x2) - -inst_29922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fffffc; valaddr_reg:x3; val_offset:89766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89766*FLEN/8, x4, x1, x2) - -inst_29923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30fffffe; valaddr_reg:x3; val_offset:89769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89769*FLEN/8, x4, x1, x2) - -inst_29924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x30ffffff; valaddr_reg:x3; val_offset:89772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89772*FLEN/8, x4, x1, x2) - -inst_29925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3f800001; valaddr_reg:x3; val_offset:89775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89775*FLEN/8, x4, x1, x2) - -inst_29926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3f800003; valaddr_reg:x3; val_offset:89778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89778*FLEN/8, x4, x1, x2) - -inst_29927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3f800007; valaddr_reg:x3; val_offset:89781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89781*FLEN/8, x4, x1, x2) - -inst_29928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3f999999; valaddr_reg:x3; val_offset:89784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89784*FLEN/8, x4, x1, x2) - -inst_29929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:89787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89787*FLEN/8, x4, x1, x2) - -inst_29930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:89790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89790*FLEN/8, x4, x1, x2) - -inst_29931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:89793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89793*FLEN/8, x4, x1, x2) - -inst_29932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:89796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89796*FLEN/8, x4, x1, x2) - -inst_29933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:89799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89799*FLEN/8, x4, x1, x2) - -inst_29934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:89802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89802*FLEN/8, x4, x1, x2) - -inst_29935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:89805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89805*FLEN/8, x4, x1, x2) - -inst_29936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:89808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89808*FLEN/8, x4, x1, x2) - -inst_29937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:89811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89811*FLEN/8, x4, x1, x2) - -inst_29938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:89814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89814*FLEN/8, x4, x1, x2) - -inst_29939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:89817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89817*FLEN/8, x4, x1, x2) - -inst_29940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:89820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89820*FLEN/8, x4, x1, x2) - -inst_29941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:89823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89823*FLEN/8, x4, x1, x2) - -inst_29942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:89826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89826*FLEN/8, x4, x1, x2) - -inst_29943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:89829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89829*FLEN/8, x4, x1, x2) - -inst_29944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:89832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89832*FLEN/8, x4, x1, x2) - -inst_29945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:89835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89835*FLEN/8, x4, x1, x2) - -inst_29946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:89838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89838*FLEN/8, x4, x1, x2) - -inst_29947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:89841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89841*FLEN/8, x4, x1, x2) - -inst_29948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:89844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89844*FLEN/8, x4, x1, x2) - -inst_29949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:89847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89847*FLEN/8, x4, x1, x2) - -inst_29950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:89850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89850*FLEN/8, x4, x1, x2) - -inst_29951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:89853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89853*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_235) - -inst_29952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:89856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89856*FLEN/8, x4, x1, x2) - -inst_29953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:89859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89859*FLEN/8, x4, x1, x2) - -inst_29954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:89862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89862*FLEN/8, x4, x1, x2) - -inst_29955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:89865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89865*FLEN/8, x4, x1, x2) - -inst_29956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:89868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89868*FLEN/8, x4, x1, x2) - -inst_29957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8000000; valaddr_reg:x3; val_offset:89871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89871*FLEN/8, x4, x1, x2) - -inst_29958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8000001; valaddr_reg:x3; val_offset:89874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89874*FLEN/8, x4, x1, x2) - -inst_29959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8000003; valaddr_reg:x3; val_offset:89877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89877*FLEN/8, x4, x1, x2) - -inst_29960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8000007; valaddr_reg:x3; val_offset:89880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89880*FLEN/8, x4, x1, x2) - -inst_29961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x800000f; valaddr_reg:x3; val_offset:89883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89883*FLEN/8, x4, x1, x2) - -inst_29962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x800001f; valaddr_reg:x3; val_offset:89886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89886*FLEN/8, x4, x1, x2) - -inst_29963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x800003f; valaddr_reg:x3; val_offset:89889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89889*FLEN/8, x4, x1, x2) - -inst_29964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x800007f; valaddr_reg:x3; val_offset:89892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89892*FLEN/8, x4, x1, x2) - -inst_29965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x80000ff; valaddr_reg:x3; val_offset:89895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89895*FLEN/8, x4, x1, x2) - -inst_29966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x80001ff; valaddr_reg:x3; val_offset:89898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89898*FLEN/8, x4, x1, x2) - -inst_29967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x80003ff; valaddr_reg:x3; val_offset:89901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89901*FLEN/8, x4, x1, x2) - -inst_29968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x80007ff; valaddr_reg:x3; val_offset:89904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89904*FLEN/8, x4, x1, x2) - -inst_29969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8000fff; valaddr_reg:x3; val_offset:89907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89907*FLEN/8, x4, x1, x2) - -inst_29970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8001fff; valaddr_reg:x3; val_offset:89910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89910*FLEN/8, x4, x1, x2) - -inst_29971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8003fff; valaddr_reg:x3; val_offset:89913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89913*FLEN/8, x4, x1, x2) - -inst_29972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8007fff; valaddr_reg:x3; val_offset:89916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89916*FLEN/8, x4, x1, x2) - -inst_29973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x800ffff; valaddr_reg:x3; val_offset:89919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89919*FLEN/8, x4, x1, x2) - -inst_29974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x801ffff; valaddr_reg:x3; val_offset:89922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89922*FLEN/8, x4, x1, x2) - -inst_29975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x803ffff; valaddr_reg:x3; val_offset:89925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89925*FLEN/8, x4, x1, x2) - -inst_29976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x807ffff; valaddr_reg:x3; val_offset:89928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89928*FLEN/8, x4, x1, x2) - -inst_29977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x80fffff; valaddr_reg:x3; val_offset:89931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89931*FLEN/8, x4, x1, x2) - -inst_29978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x81fffff; valaddr_reg:x3; val_offset:89934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89934*FLEN/8, x4, x1, x2) - -inst_29979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x83fffff; valaddr_reg:x3; val_offset:89937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89937*FLEN/8, x4, x1, x2) - -inst_29980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8400000; valaddr_reg:x3; val_offset:89940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89940*FLEN/8, x4, x1, x2) - -inst_29981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8600000; valaddr_reg:x3; val_offset:89943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89943*FLEN/8, x4, x1, x2) - -inst_29982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8700000; valaddr_reg:x3; val_offset:89946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89946*FLEN/8, x4, x1, x2) - -inst_29983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x8780000; valaddr_reg:x3; val_offset:89949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89949*FLEN/8, x4, x1, x2) - -inst_29984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87c0000; valaddr_reg:x3; val_offset:89952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89952*FLEN/8, x4, x1, x2) - -inst_29985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87e0000; valaddr_reg:x3; val_offset:89955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89955*FLEN/8, x4, x1, x2) - -inst_29986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87f0000; valaddr_reg:x3; val_offset:89958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89958*FLEN/8, x4, x1, x2) - -inst_29987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87f8000; valaddr_reg:x3; val_offset:89961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89961*FLEN/8, x4, x1, x2) - -inst_29988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87fc000; valaddr_reg:x3; val_offset:89964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89964*FLEN/8, x4, x1, x2) - -inst_29989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87fe000; valaddr_reg:x3; val_offset:89967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89967*FLEN/8, x4, x1, x2) - -inst_29990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87ff000; valaddr_reg:x3; val_offset:89970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89970*FLEN/8, x4, x1, x2) - -inst_29991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87ff800; valaddr_reg:x3; val_offset:89973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89973*FLEN/8, x4, x1, x2) - -inst_29992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87ffc00; valaddr_reg:x3; val_offset:89976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89976*FLEN/8, x4, x1, x2) - -inst_29993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87ffe00; valaddr_reg:x3; val_offset:89979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89979*FLEN/8, x4, x1, x2) - -inst_29994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87fff00; valaddr_reg:x3; val_offset:89982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89982*FLEN/8, x4, x1, x2) - -inst_29995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87fff80; valaddr_reg:x3; val_offset:89985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89985*FLEN/8, x4, x1, x2) - -inst_29996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87fffc0; valaddr_reg:x3; val_offset:89988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89988*FLEN/8, x4, x1, x2) - -inst_29997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87fffe0; valaddr_reg:x3; val_offset:89991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89991*FLEN/8, x4, x1, x2) - -inst_29998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87ffff0; valaddr_reg:x3; val_offset:89994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89994*FLEN/8, x4, x1, x2) - -inst_29999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87ffff8; valaddr_reg:x3; val_offset:89997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89997*FLEN/8, x4, x1, x2) - -inst_30000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87ffffc; valaddr_reg:x3; val_offset:90000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90000*FLEN/8, x4, x1, x2) - -inst_30001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87ffffe; valaddr_reg:x3; val_offset:90003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90003*FLEN/8, x4, x1, x2) - -inst_30002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; -op3val:0x87fffff; valaddr_reg:x3; val_offset:90006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90006*FLEN/8, x4, x1, x2) - -inst_30003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:90009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90009*FLEN/8, x4, x1, x2) - -inst_30004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:90012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90012*FLEN/8, x4, x1, x2) - -inst_30005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:90015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90015*FLEN/8, x4, x1, x2) - -inst_30006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:90018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90018*FLEN/8, x4, x1, x2) - -inst_30007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:90021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90021*FLEN/8, x4, x1, x2) - -inst_30008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:90024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90024*FLEN/8, x4, x1, x2) - -inst_30009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:90027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90027*FLEN/8, x4, x1, x2) - -inst_30010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:90030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90030*FLEN/8, x4, x1, x2) - -inst_30011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:90033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90033*FLEN/8, x4, x1, x2) - -inst_30012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:90036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90036*FLEN/8, x4, x1, x2) - -inst_30013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:90039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90039*FLEN/8, x4, x1, x2) - -inst_30014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:90042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90042*FLEN/8, x4, x1, x2) - -inst_30015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:90045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90045*FLEN/8, x4, x1, x2) - -inst_30016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:90048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90048*FLEN/8, x4, x1, x2) - -inst_30017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:90051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90051*FLEN/8, x4, x1, x2) - -inst_30018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:90054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90054*FLEN/8, x4, x1, x2) - -inst_30019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81800000; valaddr_reg:x3; val_offset:90057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90057*FLEN/8, x4, x1, x2) - -inst_30020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81800001; valaddr_reg:x3; val_offset:90060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90060*FLEN/8, x4, x1, x2) - -inst_30021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81800003; valaddr_reg:x3; val_offset:90063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90063*FLEN/8, x4, x1, x2) - -inst_30022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81800007; valaddr_reg:x3; val_offset:90066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90066*FLEN/8, x4, x1, x2) - -inst_30023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x8180000f; valaddr_reg:x3; val_offset:90069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90069*FLEN/8, x4, x1, x2) - -inst_30024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x8180001f; valaddr_reg:x3; val_offset:90072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90072*FLEN/8, x4, x1, x2) - -inst_30025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x8180003f; valaddr_reg:x3; val_offset:90075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90075*FLEN/8, x4, x1, x2) - -inst_30026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x8180007f; valaddr_reg:x3; val_offset:90078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90078*FLEN/8, x4, x1, x2) - -inst_30027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x818000ff; valaddr_reg:x3; val_offset:90081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90081*FLEN/8, x4, x1, x2) - -inst_30028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x818001ff; valaddr_reg:x3; val_offset:90084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90084*FLEN/8, x4, x1, x2) - -inst_30029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x818003ff; valaddr_reg:x3; val_offset:90087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90087*FLEN/8, x4, x1, x2) - -inst_30030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x818007ff; valaddr_reg:x3; val_offset:90090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90090*FLEN/8, x4, x1, x2) - -inst_30031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81800fff; valaddr_reg:x3; val_offset:90093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90093*FLEN/8, x4, x1, x2) - -inst_30032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81801fff; valaddr_reg:x3; val_offset:90096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90096*FLEN/8, x4, x1, x2) - -inst_30033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81803fff; valaddr_reg:x3; val_offset:90099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90099*FLEN/8, x4, x1, x2) - -inst_30034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81807fff; valaddr_reg:x3; val_offset:90102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90102*FLEN/8, x4, x1, x2) - -inst_30035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x8180ffff; valaddr_reg:x3; val_offset:90105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90105*FLEN/8, x4, x1, x2) - -inst_30036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x8181ffff; valaddr_reg:x3; val_offset:90108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90108*FLEN/8, x4, x1, x2) - -inst_30037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x8183ffff; valaddr_reg:x3; val_offset:90111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90111*FLEN/8, x4, x1, x2) - -inst_30038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x8187ffff; valaddr_reg:x3; val_offset:90114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90114*FLEN/8, x4, x1, x2) - -inst_30039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x818fffff; valaddr_reg:x3; val_offset:90117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90117*FLEN/8, x4, x1, x2) - -inst_30040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x819fffff; valaddr_reg:x3; val_offset:90120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90120*FLEN/8, x4, x1, x2) - -inst_30041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81bfffff; valaddr_reg:x3; val_offset:90123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90123*FLEN/8, x4, x1, x2) - -inst_30042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81c00000; valaddr_reg:x3; val_offset:90126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90126*FLEN/8, x4, x1, x2) - -inst_30043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81e00000; valaddr_reg:x3; val_offset:90129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90129*FLEN/8, x4, x1, x2) - -inst_30044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81f00000; valaddr_reg:x3; val_offset:90132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90132*FLEN/8, x4, x1, x2) - -inst_30045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81f80000; valaddr_reg:x3; val_offset:90135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90135*FLEN/8, x4, x1, x2) - -inst_30046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fc0000; valaddr_reg:x3; val_offset:90138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90138*FLEN/8, x4, x1, x2) - -inst_30047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fe0000; valaddr_reg:x3; val_offset:90141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90141*FLEN/8, x4, x1, x2) - -inst_30048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ff0000; valaddr_reg:x3; val_offset:90144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90144*FLEN/8, x4, x1, x2) - -inst_30049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ff8000; valaddr_reg:x3; val_offset:90147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90147*FLEN/8, x4, x1, x2) - -inst_30050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ffc000; valaddr_reg:x3; val_offset:90150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90150*FLEN/8, x4, x1, x2) - -inst_30051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ffe000; valaddr_reg:x3; val_offset:90153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90153*FLEN/8, x4, x1, x2) - -inst_30052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fff000; valaddr_reg:x3; val_offset:90156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90156*FLEN/8, x4, x1, x2) - -inst_30053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fff800; valaddr_reg:x3; val_offset:90159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90159*FLEN/8, x4, x1, x2) - -inst_30054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fffc00; valaddr_reg:x3; val_offset:90162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90162*FLEN/8, x4, x1, x2) - -inst_30055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fffe00; valaddr_reg:x3; val_offset:90165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90165*FLEN/8, x4, x1, x2) - -inst_30056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ffff00; valaddr_reg:x3; val_offset:90168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90168*FLEN/8, x4, x1, x2) - -inst_30057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ffff80; valaddr_reg:x3; val_offset:90171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90171*FLEN/8, x4, x1, x2) - -inst_30058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ffffc0; valaddr_reg:x3; val_offset:90174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90174*FLEN/8, x4, x1, x2) - -inst_30059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ffffe0; valaddr_reg:x3; val_offset:90177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90177*FLEN/8, x4, x1, x2) - -inst_30060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fffff0; valaddr_reg:x3; val_offset:90180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90180*FLEN/8, x4, x1, x2) - -inst_30061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fffff8; valaddr_reg:x3; val_offset:90183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90183*FLEN/8, x4, x1, x2) - -inst_30062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fffffc; valaddr_reg:x3; val_offset:90186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90186*FLEN/8, x4, x1, x2) - -inst_30063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81fffffe; valaddr_reg:x3; val_offset:90189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90189*FLEN/8, x4, x1, x2) - -inst_30064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; -op3val:0x81ffffff; valaddr_reg:x3; val_offset:90192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90192*FLEN/8, x4, x1, x2) - -inst_30065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:90195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90195*FLEN/8, x4, x1, x2) - -inst_30066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:90198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90198*FLEN/8, x4, x1, x2) - -inst_30067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:90201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90201*FLEN/8, x4, x1, x2) - -inst_30068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:90204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90204*FLEN/8, x4, x1, x2) - -inst_30069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:90207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90207*FLEN/8, x4, x1, x2) - -inst_30070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:90210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90210*FLEN/8, x4, x1, x2) - -inst_30071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:90213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90213*FLEN/8, x4, x1, x2) - -inst_30072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:90216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90216*FLEN/8, x4, x1, x2) - -inst_30073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:90219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90219*FLEN/8, x4, x1, x2) - -inst_30074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:90222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90222*FLEN/8, x4, x1, x2) - -inst_30075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:90225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90225*FLEN/8, x4, x1, x2) - -inst_30076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:90228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90228*FLEN/8, x4, x1, x2) - -inst_30077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:90231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90231*FLEN/8, x4, x1, x2) - -inst_30078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:90234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90234*FLEN/8, x4, x1, x2) - -inst_30079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:90237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90237*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_236) - -inst_30080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:90240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90240*FLEN/8, x4, x1, x2) - -inst_30081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81800000; valaddr_reg:x3; val_offset:90243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90243*FLEN/8, x4, x1, x2) - -inst_30082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81800001; valaddr_reg:x3; val_offset:90246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90246*FLEN/8, x4, x1, x2) - -inst_30083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81800003; valaddr_reg:x3; val_offset:90249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90249*FLEN/8, x4, x1, x2) - -inst_30084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81800007; valaddr_reg:x3; val_offset:90252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90252*FLEN/8, x4, x1, x2) - -inst_30085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8180000f; valaddr_reg:x3; val_offset:90255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90255*FLEN/8, x4, x1, x2) - -inst_30086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8180001f; valaddr_reg:x3; val_offset:90258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90258*FLEN/8, x4, x1, x2) - -inst_30087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8180003f; valaddr_reg:x3; val_offset:90261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90261*FLEN/8, x4, x1, x2) - -inst_30088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8180007f; valaddr_reg:x3; val_offset:90264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90264*FLEN/8, x4, x1, x2) - -inst_30089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x818000ff; valaddr_reg:x3; val_offset:90267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90267*FLEN/8, x4, x1, x2) - -inst_30090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x818001ff; valaddr_reg:x3; val_offset:90270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90270*FLEN/8, x4, x1, x2) - -inst_30091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x818003ff; valaddr_reg:x3; val_offset:90273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90273*FLEN/8, x4, x1, x2) - -inst_30092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x818007ff; valaddr_reg:x3; val_offset:90276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90276*FLEN/8, x4, x1, x2) - -inst_30093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81800fff; valaddr_reg:x3; val_offset:90279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90279*FLEN/8, x4, x1, x2) - -inst_30094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81801fff; valaddr_reg:x3; val_offset:90282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90282*FLEN/8, x4, x1, x2) - -inst_30095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81803fff; valaddr_reg:x3; val_offset:90285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90285*FLEN/8, x4, x1, x2) - -inst_30096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81807fff; valaddr_reg:x3; val_offset:90288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90288*FLEN/8, x4, x1, x2) - -inst_30097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8180ffff; valaddr_reg:x3; val_offset:90291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90291*FLEN/8, x4, x1, x2) - -inst_30098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8181ffff; valaddr_reg:x3; val_offset:90294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90294*FLEN/8, x4, x1, x2) - -inst_30099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8183ffff; valaddr_reg:x3; val_offset:90297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90297*FLEN/8, x4, x1, x2) - -inst_30100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x8187ffff; valaddr_reg:x3; val_offset:90300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90300*FLEN/8, x4, x1, x2) - -inst_30101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x818fffff; valaddr_reg:x3; val_offset:90303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90303*FLEN/8, x4, x1, x2) - -inst_30102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x819fffff; valaddr_reg:x3; val_offset:90306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90306*FLEN/8, x4, x1, x2) - -inst_30103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81bfffff; valaddr_reg:x3; val_offset:90309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90309*FLEN/8, x4, x1, x2) - -inst_30104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81c00000; valaddr_reg:x3; val_offset:90312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90312*FLEN/8, x4, x1, x2) - -inst_30105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81e00000; valaddr_reg:x3; val_offset:90315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90315*FLEN/8, x4, x1, x2) - -inst_30106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81f00000; valaddr_reg:x3; val_offset:90318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90318*FLEN/8, x4, x1, x2) - -inst_30107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81f80000; valaddr_reg:x3; val_offset:90321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90321*FLEN/8, x4, x1, x2) - -inst_30108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fc0000; valaddr_reg:x3; val_offset:90324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90324*FLEN/8, x4, x1, x2) - -inst_30109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fe0000; valaddr_reg:x3; val_offset:90327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90327*FLEN/8, x4, x1, x2) - -inst_30110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ff0000; valaddr_reg:x3; val_offset:90330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90330*FLEN/8, x4, x1, x2) - -inst_30111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ff8000; valaddr_reg:x3; val_offset:90333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90333*FLEN/8, x4, x1, x2) - -inst_30112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ffc000; valaddr_reg:x3; val_offset:90336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90336*FLEN/8, x4, x1, x2) - -inst_30113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ffe000; valaddr_reg:x3; val_offset:90339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90339*FLEN/8, x4, x1, x2) - -inst_30114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fff000; valaddr_reg:x3; val_offset:90342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90342*FLEN/8, x4, x1, x2) - -inst_30115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fff800; valaddr_reg:x3; val_offset:90345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90345*FLEN/8, x4, x1, x2) - -inst_30116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fffc00; valaddr_reg:x3; val_offset:90348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90348*FLEN/8, x4, x1, x2) - -inst_30117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fffe00; valaddr_reg:x3; val_offset:90351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90351*FLEN/8, x4, x1, x2) - -inst_30118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ffff00; valaddr_reg:x3; val_offset:90354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90354*FLEN/8, x4, x1, x2) - -inst_30119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ffff80; valaddr_reg:x3; val_offset:90357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90357*FLEN/8, x4, x1, x2) - -inst_30120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ffffc0; valaddr_reg:x3; val_offset:90360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90360*FLEN/8, x4, x1, x2) - -inst_30121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ffffe0; valaddr_reg:x3; val_offset:90363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90363*FLEN/8, x4, x1, x2) - -inst_30122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fffff0; valaddr_reg:x3; val_offset:90366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90366*FLEN/8, x4, x1, x2) - -inst_30123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fffff8; valaddr_reg:x3; val_offset:90369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90369*FLEN/8, x4, x1, x2) - -inst_30124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fffffc; valaddr_reg:x3; val_offset:90372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90372*FLEN/8, x4, x1, x2) - -inst_30125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81fffffe; valaddr_reg:x3; val_offset:90375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90375*FLEN/8, x4, x1, x2) - -inst_30126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; -op3val:0x81ffffff; valaddr_reg:x3; val_offset:90378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90378*FLEN/8, x4, x1, x2) - -inst_30127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:90381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90381*FLEN/8, x4, x1, x2) - -inst_30128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:90384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90384*FLEN/8, x4, x1, x2) - -inst_30129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:90387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90387*FLEN/8, x4, x1, x2) - -inst_30130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:90390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90390*FLEN/8, x4, x1, x2) - -inst_30131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:90393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90393*FLEN/8, x4, x1, x2) - -inst_30132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:90396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90396*FLEN/8, x4, x1, x2) - -inst_30133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:90399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90399*FLEN/8, x4, x1, x2) - -inst_30134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:90402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90402*FLEN/8, x4, x1, x2) - -inst_30135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:90405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90405*FLEN/8, x4, x1, x2) - -inst_30136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:90408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90408*FLEN/8, x4, x1, x2) - -inst_30137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:90411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90411*FLEN/8, x4, x1, x2) - -inst_30138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:90414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90414*FLEN/8, x4, x1, x2) - -inst_30139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:90417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90417*FLEN/8, x4, x1, x2) - -inst_30140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:90420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90420*FLEN/8, x4, x1, x2) - -inst_30141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:90423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90423*FLEN/8, x4, x1, x2) - -inst_30142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:90426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90426*FLEN/8, x4, x1, x2) - -inst_30143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf800000; valaddr_reg:x3; val_offset:90429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90429*FLEN/8, x4, x1, x2) - -inst_30144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf800001; valaddr_reg:x3; val_offset:90432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90432*FLEN/8, x4, x1, x2) - -inst_30145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf800003; valaddr_reg:x3; val_offset:90435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90435*FLEN/8, x4, x1, x2) - -inst_30146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf800007; valaddr_reg:x3; val_offset:90438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90438*FLEN/8, x4, x1, x2) - -inst_30147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf80000f; valaddr_reg:x3; val_offset:90441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90441*FLEN/8, x4, x1, x2) - -inst_30148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf80001f; valaddr_reg:x3; val_offset:90444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90444*FLEN/8, x4, x1, x2) - -inst_30149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf80003f; valaddr_reg:x3; val_offset:90447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90447*FLEN/8, x4, x1, x2) - -inst_30150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf80007f; valaddr_reg:x3; val_offset:90450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90450*FLEN/8, x4, x1, x2) - -inst_30151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf8000ff; valaddr_reg:x3; val_offset:90453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90453*FLEN/8, x4, x1, x2) - -inst_30152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf8001ff; valaddr_reg:x3; val_offset:90456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90456*FLEN/8, x4, x1, x2) - -inst_30153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf8003ff; valaddr_reg:x3; val_offset:90459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90459*FLEN/8, x4, x1, x2) - -inst_30154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf8007ff; valaddr_reg:x3; val_offset:90462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90462*FLEN/8, x4, x1, x2) - -inst_30155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf800fff; valaddr_reg:x3; val_offset:90465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90465*FLEN/8, x4, x1, x2) - -inst_30156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf801fff; valaddr_reg:x3; val_offset:90468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90468*FLEN/8, x4, x1, x2) - -inst_30157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf803fff; valaddr_reg:x3; val_offset:90471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90471*FLEN/8, x4, x1, x2) - -inst_30158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf807fff; valaddr_reg:x3; val_offset:90474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90474*FLEN/8, x4, x1, x2) - -inst_30159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf80ffff; valaddr_reg:x3; val_offset:90477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90477*FLEN/8, x4, x1, x2) - -inst_30160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf81ffff; valaddr_reg:x3; val_offset:90480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90480*FLEN/8, x4, x1, x2) - -inst_30161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf83ffff; valaddr_reg:x3; val_offset:90483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90483*FLEN/8, x4, x1, x2) - -inst_30162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf87ffff; valaddr_reg:x3; val_offset:90486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90486*FLEN/8, x4, x1, x2) - -inst_30163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf8fffff; valaddr_reg:x3; val_offset:90489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90489*FLEN/8, x4, x1, x2) - -inst_30164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xf9fffff; valaddr_reg:x3; val_offset:90492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90492*FLEN/8, x4, x1, x2) - -inst_30165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfbfffff; valaddr_reg:x3; val_offset:90495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90495*FLEN/8, x4, x1, x2) - -inst_30166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfc00000; valaddr_reg:x3; val_offset:90498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90498*FLEN/8, x4, x1, x2) - -inst_30167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfe00000; valaddr_reg:x3; val_offset:90501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90501*FLEN/8, x4, x1, x2) - -inst_30168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xff00000; valaddr_reg:x3; val_offset:90504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90504*FLEN/8, x4, x1, x2) - -inst_30169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xff80000; valaddr_reg:x3; val_offset:90507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90507*FLEN/8, x4, x1, x2) - -inst_30170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffc0000; valaddr_reg:x3; val_offset:90510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90510*FLEN/8, x4, x1, x2) - -inst_30171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffe0000; valaddr_reg:x3; val_offset:90513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90513*FLEN/8, x4, x1, x2) - -inst_30172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfff0000; valaddr_reg:x3; val_offset:90516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90516*FLEN/8, x4, x1, x2) - -inst_30173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfff8000; valaddr_reg:x3; val_offset:90519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90519*FLEN/8, x4, x1, x2) - -inst_30174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffc000; valaddr_reg:x3; val_offset:90522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90522*FLEN/8, x4, x1, x2) - -inst_30175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffe000; valaddr_reg:x3; val_offset:90525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90525*FLEN/8, x4, x1, x2) - -inst_30176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffff000; valaddr_reg:x3; val_offset:90528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90528*FLEN/8, x4, x1, x2) - -inst_30177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffff800; valaddr_reg:x3; val_offset:90531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90531*FLEN/8, x4, x1, x2) - -inst_30178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffffc00; valaddr_reg:x3; val_offset:90534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90534*FLEN/8, x4, x1, x2) - -inst_30179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffffe00; valaddr_reg:x3; val_offset:90537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90537*FLEN/8, x4, x1, x2) - -inst_30180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffff00; valaddr_reg:x3; val_offset:90540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90540*FLEN/8, x4, x1, x2) - -inst_30181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffff80; valaddr_reg:x3; val_offset:90543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90543*FLEN/8, x4, x1, x2) - -inst_30182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffffc0; valaddr_reg:x3; val_offset:90546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90546*FLEN/8, x4, x1, x2) - -inst_30183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffffe0; valaddr_reg:x3; val_offset:90549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90549*FLEN/8, x4, x1, x2) - -inst_30184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffffff0; valaddr_reg:x3; val_offset:90552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90552*FLEN/8, x4, x1, x2) - -inst_30185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffffff8; valaddr_reg:x3; val_offset:90555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90555*FLEN/8, x4, x1, x2) - -inst_30186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffffffc; valaddr_reg:x3; val_offset:90558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90558*FLEN/8, x4, x1, x2) - -inst_30187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xffffffe; valaddr_reg:x3; val_offset:90561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90561*FLEN/8, x4, x1, x2) - -inst_30188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; -op3val:0xfffffff; valaddr_reg:x3; val_offset:90564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90564*FLEN/8, x4, x1, x2) - -inst_30189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3f800001; valaddr_reg:x3; val_offset:90567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90567*FLEN/8, x4, x1, x2) - -inst_30190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3f800003; valaddr_reg:x3; val_offset:90570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90570*FLEN/8, x4, x1, x2) - -inst_30191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3f800007; valaddr_reg:x3; val_offset:90573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90573*FLEN/8, x4, x1, x2) - -inst_30192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3f999999; valaddr_reg:x3; val_offset:90576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90576*FLEN/8, x4, x1, x2) - -inst_30193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:90579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90579*FLEN/8, x4, x1, x2) - -inst_30194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:90582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90582*FLEN/8, x4, x1, x2) - -inst_30195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:90585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90585*FLEN/8, x4, x1, x2) - -inst_30196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:90588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90588*FLEN/8, x4, x1, x2) - -inst_30197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:90591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90591*FLEN/8, x4, x1, x2) - -inst_30198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:90594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90594*FLEN/8, x4, x1, x2) - -inst_30199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:90597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90597*FLEN/8, x4, x1, x2) - -inst_30200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:90600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90600*FLEN/8, x4, x1, x2) - -inst_30201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:90603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90603*FLEN/8, x4, x1, x2) - -inst_30202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:90606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90606*FLEN/8, x4, x1, x2) - -inst_30203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:90609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90609*FLEN/8, x4, x1, x2) - -inst_30204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:90612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90612*FLEN/8, x4, x1, x2) - -inst_30205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46000000; valaddr_reg:x3; val_offset:90615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90615*FLEN/8, x4, x1, x2) - -inst_30206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46000001; valaddr_reg:x3; val_offset:90618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90618*FLEN/8, x4, x1, x2) - -inst_30207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46000003; valaddr_reg:x3; val_offset:90621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90621*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_237) - -inst_30208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46000007; valaddr_reg:x3; val_offset:90624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90624*FLEN/8, x4, x1, x2) - -inst_30209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x4600000f; valaddr_reg:x3; val_offset:90627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90627*FLEN/8, x4, x1, x2) - -inst_30210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x4600001f; valaddr_reg:x3; val_offset:90630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90630*FLEN/8, x4, x1, x2) - -inst_30211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x4600003f; valaddr_reg:x3; val_offset:90633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90633*FLEN/8, x4, x1, x2) - -inst_30212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x4600007f; valaddr_reg:x3; val_offset:90636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90636*FLEN/8, x4, x1, x2) - -inst_30213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x460000ff; valaddr_reg:x3; val_offset:90639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90639*FLEN/8, x4, x1, x2) - -inst_30214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x460001ff; valaddr_reg:x3; val_offset:90642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90642*FLEN/8, x4, x1, x2) - -inst_30215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x460003ff; valaddr_reg:x3; val_offset:90645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90645*FLEN/8, x4, x1, x2) - -inst_30216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x460007ff; valaddr_reg:x3; val_offset:90648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90648*FLEN/8, x4, x1, x2) - -inst_30217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46000fff; valaddr_reg:x3; val_offset:90651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90651*FLEN/8, x4, x1, x2) - -inst_30218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46001fff; valaddr_reg:x3; val_offset:90654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90654*FLEN/8, x4, x1, x2) - -inst_30219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46003fff; valaddr_reg:x3; val_offset:90657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90657*FLEN/8, x4, x1, x2) - -inst_30220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46007fff; valaddr_reg:x3; val_offset:90660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90660*FLEN/8, x4, x1, x2) - -inst_30221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x4600ffff; valaddr_reg:x3; val_offset:90663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90663*FLEN/8, x4, x1, x2) - -inst_30222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x4601ffff; valaddr_reg:x3; val_offset:90666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90666*FLEN/8, x4, x1, x2) - -inst_30223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x4603ffff; valaddr_reg:x3; val_offset:90669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90669*FLEN/8, x4, x1, x2) - -inst_30224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x4607ffff; valaddr_reg:x3; val_offset:90672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90672*FLEN/8, x4, x1, x2) - -inst_30225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x460fffff; valaddr_reg:x3; val_offset:90675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90675*FLEN/8, x4, x1, x2) - -inst_30226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x461fffff; valaddr_reg:x3; val_offset:90678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90678*FLEN/8, x4, x1, x2) - -inst_30227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x463fffff; valaddr_reg:x3; val_offset:90681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90681*FLEN/8, x4, x1, x2) - -inst_30228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46400000; valaddr_reg:x3; val_offset:90684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90684*FLEN/8, x4, x1, x2) - -inst_30229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46600000; valaddr_reg:x3; val_offset:90687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90687*FLEN/8, x4, x1, x2) - -inst_30230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46700000; valaddr_reg:x3; val_offset:90690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90690*FLEN/8, x4, x1, x2) - -inst_30231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x46780000; valaddr_reg:x3; val_offset:90693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90693*FLEN/8, x4, x1, x2) - -inst_30232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467c0000; valaddr_reg:x3; val_offset:90696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90696*FLEN/8, x4, x1, x2) - -inst_30233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467e0000; valaddr_reg:x3; val_offset:90699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90699*FLEN/8, x4, x1, x2) - -inst_30234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467f0000; valaddr_reg:x3; val_offset:90702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90702*FLEN/8, x4, x1, x2) - -inst_30235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467f8000; valaddr_reg:x3; val_offset:90705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90705*FLEN/8, x4, x1, x2) - -inst_30236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467fc000; valaddr_reg:x3; val_offset:90708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90708*FLEN/8, x4, x1, x2) - -inst_30237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467fe000; valaddr_reg:x3; val_offset:90711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90711*FLEN/8, x4, x1, x2) - -inst_30238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467ff000; valaddr_reg:x3; val_offset:90714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90714*FLEN/8, x4, x1, x2) - -inst_30239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467ff800; valaddr_reg:x3; val_offset:90717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90717*FLEN/8, x4, x1, x2) - -inst_30240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467ffc00; valaddr_reg:x3; val_offset:90720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90720*FLEN/8, x4, x1, x2) - -inst_30241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467ffe00; valaddr_reg:x3; val_offset:90723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90723*FLEN/8, x4, x1, x2) - -inst_30242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467fff00; valaddr_reg:x3; val_offset:90726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90726*FLEN/8, x4, x1, x2) - -inst_30243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467fff80; valaddr_reg:x3; val_offset:90729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90729*FLEN/8, x4, x1, x2) - -inst_30244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467fffc0; valaddr_reg:x3; val_offset:90732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90732*FLEN/8, x4, x1, x2) - -inst_30245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467fffe0; valaddr_reg:x3; val_offset:90735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90735*FLEN/8, x4, x1, x2) - -inst_30246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467ffff0; valaddr_reg:x3; val_offset:90738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90738*FLEN/8, x4, x1, x2) - -inst_30247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467ffff8; valaddr_reg:x3; val_offset:90741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90741*FLEN/8, x4, x1, x2) - -inst_30248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467ffffc; valaddr_reg:x3; val_offset:90744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90744*FLEN/8, x4, x1, x2) - -inst_30249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467ffffe; valaddr_reg:x3; val_offset:90747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90747*FLEN/8, x4, x1, x2) - -inst_30250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; -op3val:0x467fffff; valaddr_reg:x3; val_offset:90750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90750*FLEN/8, x4, x1, x2) - -inst_30251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:90753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90753*FLEN/8, x4, x1, x2) - -inst_30252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:90756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90756*FLEN/8, x4, x1, x2) - -inst_30253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:90759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90759*FLEN/8, x4, x1, x2) - -inst_30254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:90762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90762*FLEN/8, x4, x1, x2) - -inst_30255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:90765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90765*FLEN/8, x4, x1, x2) - -inst_30256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:90768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90768*FLEN/8, x4, x1, x2) - -inst_30257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:90771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90771*FLEN/8, x4, x1, x2) - -inst_30258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:90774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90774*FLEN/8, x4, x1, x2) - -inst_30259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:90777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90777*FLEN/8, x4, x1, x2) - -inst_30260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:90780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90780*FLEN/8, x4, x1, x2) - -inst_30261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:90783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90783*FLEN/8, x4, x1, x2) - -inst_30262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:90786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90786*FLEN/8, x4, x1, x2) - -inst_30263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:90789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90789*FLEN/8, x4, x1, x2) - -inst_30264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:90792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90792*FLEN/8, x4, x1, x2) - -inst_30265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:90795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90795*FLEN/8, x4, x1, x2) - -inst_30266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:90798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90798*FLEN/8, x4, x1, x2) - -inst_30267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84800000; valaddr_reg:x3; val_offset:90801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90801*FLEN/8, x4, x1, x2) - -inst_30268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84800001; valaddr_reg:x3; val_offset:90804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90804*FLEN/8, x4, x1, x2) - -inst_30269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84800003; valaddr_reg:x3; val_offset:90807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90807*FLEN/8, x4, x1, x2) - -inst_30270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84800007; valaddr_reg:x3; val_offset:90810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90810*FLEN/8, x4, x1, x2) - -inst_30271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x8480000f; valaddr_reg:x3; val_offset:90813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90813*FLEN/8, x4, x1, x2) - -inst_30272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x8480001f; valaddr_reg:x3; val_offset:90816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90816*FLEN/8, x4, x1, x2) - -inst_30273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x8480003f; valaddr_reg:x3; val_offset:90819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90819*FLEN/8, x4, x1, x2) - -inst_30274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x8480007f; valaddr_reg:x3; val_offset:90822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90822*FLEN/8, x4, x1, x2) - -inst_30275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x848000ff; valaddr_reg:x3; val_offset:90825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90825*FLEN/8, x4, x1, x2) - -inst_30276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x848001ff; valaddr_reg:x3; val_offset:90828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90828*FLEN/8, x4, x1, x2) - -inst_30277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x848003ff; valaddr_reg:x3; val_offset:90831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90831*FLEN/8, x4, x1, x2) - -inst_30278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x848007ff; valaddr_reg:x3; val_offset:90834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90834*FLEN/8, x4, x1, x2) - -inst_30279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84800fff; valaddr_reg:x3; val_offset:90837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90837*FLEN/8, x4, x1, x2) - -inst_30280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84801fff; valaddr_reg:x3; val_offset:90840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90840*FLEN/8, x4, x1, x2) - -inst_30281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84803fff; valaddr_reg:x3; val_offset:90843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90843*FLEN/8, x4, x1, x2) - -inst_30282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84807fff; valaddr_reg:x3; val_offset:90846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90846*FLEN/8, x4, x1, x2) - -inst_30283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x8480ffff; valaddr_reg:x3; val_offset:90849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90849*FLEN/8, x4, x1, x2) - -inst_30284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x8481ffff; valaddr_reg:x3; val_offset:90852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90852*FLEN/8, x4, x1, x2) - -inst_30285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x8483ffff; valaddr_reg:x3; val_offset:90855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90855*FLEN/8, x4, x1, x2) - -inst_30286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x8487ffff; valaddr_reg:x3; val_offset:90858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90858*FLEN/8, x4, x1, x2) - -inst_30287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x848fffff; valaddr_reg:x3; val_offset:90861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90861*FLEN/8, x4, x1, x2) - -inst_30288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x849fffff; valaddr_reg:x3; val_offset:90864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90864*FLEN/8, x4, x1, x2) - -inst_30289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84bfffff; valaddr_reg:x3; val_offset:90867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90867*FLEN/8, x4, x1, x2) - -inst_30290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84c00000; valaddr_reg:x3; val_offset:90870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90870*FLEN/8, x4, x1, x2) - -inst_30291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84e00000; valaddr_reg:x3; val_offset:90873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90873*FLEN/8, x4, x1, x2) - -inst_30292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84f00000; valaddr_reg:x3; val_offset:90876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90876*FLEN/8, x4, x1, x2) - -inst_30293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84f80000; valaddr_reg:x3; val_offset:90879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90879*FLEN/8, x4, x1, x2) - -inst_30294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fc0000; valaddr_reg:x3; val_offset:90882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90882*FLEN/8, x4, x1, x2) - -inst_30295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fe0000; valaddr_reg:x3; val_offset:90885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90885*FLEN/8, x4, x1, x2) - -inst_30296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ff0000; valaddr_reg:x3; val_offset:90888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90888*FLEN/8, x4, x1, x2) - -inst_30297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ff8000; valaddr_reg:x3; val_offset:90891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90891*FLEN/8, x4, x1, x2) - -inst_30298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ffc000; valaddr_reg:x3; val_offset:90894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90894*FLEN/8, x4, x1, x2) - -inst_30299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ffe000; valaddr_reg:x3; val_offset:90897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90897*FLEN/8, x4, x1, x2) - -inst_30300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fff000; valaddr_reg:x3; val_offset:90900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90900*FLEN/8, x4, x1, x2) - -inst_30301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fff800; valaddr_reg:x3; val_offset:90903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90903*FLEN/8, x4, x1, x2) - -inst_30302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fffc00; valaddr_reg:x3; val_offset:90906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90906*FLEN/8, x4, x1, x2) - -inst_30303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fffe00; valaddr_reg:x3; val_offset:90909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90909*FLEN/8, x4, x1, x2) - -inst_30304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ffff00; valaddr_reg:x3; val_offset:90912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90912*FLEN/8, x4, x1, x2) - -inst_30305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ffff80; valaddr_reg:x3; val_offset:90915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90915*FLEN/8, x4, x1, x2) - -inst_30306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ffffc0; valaddr_reg:x3; val_offset:90918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90918*FLEN/8, x4, x1, x2) - -inst_30307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ffffe0; valaddr_reg:x3; val_offset:90921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90921*FLEN/8, x4, x1, x2) - -inst_30308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fffff0; valaddr_reg:x3; val_offset:90924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90924*FLEN/8, x4, x1, x2) - -inst_30309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fffff8; valaddr_reg:x3; val_offset:90927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90927*FLEN/8, x4, x1, x2) - -inst_30310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fffffc; valaddr_reg:x3; val_offset:90930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90930*FLEN/8, x4, x1, x2) - -inst_30311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84fffffe; valaddr_reg:x3; val_offset:90933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90933*FLEN/8, x4, x1, x2) - -inst_30312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; -op3val:0x84ffffff; valaddr_reg:x3; val_offset:90936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90936*FLEN/8, x4, x1, x2) - -inst_30313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f000001; valaddr_reg:x3; val_offset:90939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90939*FLEN/8, x4, x1, x2) - -inst_30314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f000003; valaddr_reg:x3; val_offset:90942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90942*FLEN/8, x4, x1, x2) - -inst_30315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f000007; valaddr_reg:x3; val_offset:90945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90945*FLEN/8, x4, x1, x2) - -inst_30316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f199999; valaddr_reg:x3; val_offset:90948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90948*FLEN/8, x4, x1, x2) - -inst_30317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f249249; valaddr_reg:x3; val_offset:90951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90951*FLEN/8, x4, x1, x2) - -inst_30318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f333333; valaddr_reg:x3; val_offset:90954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90954*FLEN/8, x4, x1, x2) - -inst_30319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:90957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90957*FLEN/8, x4, x1, x2) - -inst_30320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:90960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90960*FLEN/8, x4, x1, x2) - -inst_30321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f444444; valaddr_reg:x3; val_offset:90963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90963*FLEN/8, x4, x1, x2) - -inst_30322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:90966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90966*FLEN/8, x4, x1, x2) - -inst_30323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:90969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90969*FLEN/8, x4, x1, x2) - -inst_30324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f666666; valaddr_reg:x3; val_offset:90972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90972*FLEN/8, x4, x1, x2) - -inst_30325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:90975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90975*FLEN/8, x4, x1, x2) - -inst_30326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:90978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90978*FLEN/8, x4, x1, x2) - -inst_30327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:90981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90981*FLEN/8, x4, x1, x2) - -inst_30328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:90984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90984*FLEN/8, x4, x1, x2) - -inst_30329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; -op3val:0x7f7fffff; valaddr_reg:x3; val_offset:90987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90987*FLEN/8, x4, x1, x2) - -inst_30330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9800000; valaddr_reg:x3; val_offset:90990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90990*FLEN/8, x4, x1, x2) - -inst_30331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9800001; valaddr_reg:x3; val_offset:90993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90993*FLEN/8, x4, x1, x2) - -inst_30332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9800003; valaddr_reg:x3; val_offset:90996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90996*FLEN/8, x4, x1, x2) - -inst_30333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9800007; valaddr_reg:x3; val_offset:90999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90999*FLEN/8, x4, x1, x2) - -inst_30334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf980000f; valaddr_reg:x3; val_offset:91002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91002*FLEN/8, x4, x1, x2) - -inst_30335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf980001f; valaddr_reg:x3; val_offset:91005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91005*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_238) - -inst_30336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf980003f; valaddr_reg:x3; val_offset:91008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91008*FLEN/8, x4, x1, x2) - -inst_30337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf980007f; valaddr_reg:x3; val_offset:91011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91011*FLEN/8, x4, x1, x2) - -inst_30338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf98000ff; valaddr_reg:x3; val_offset:91014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91014*FLEN/8, x4, x1, x2) - -inst_30339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf98001ff; valaddr_reg:x3; val_offset:91017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91017*FLEN/8, x4, x1, x2) - -inst_30340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf98003ff; valaddr_reg:x3; val_offset:91020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91020*FLEN/8, x4, x1, x2) - -inst_30341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf98007ff; valaddr_reg:x3; val_offset:91023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91023*FLEN/8, x4, x1, x2) - -inst_30342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9800fff; valaddr_reg:x3; val_offset:91026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91026*FLEN/8, x4, x1, x2) - -inst_30343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9801fff; valaddr_reg:x3; val_offset:91029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91029*FLEN/8, x4, x1, x2) - -inst_30344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9803fff; valaddr_reg:x3; val_offset:91032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91032*FLEN/8, x4, x1, x2) - -inst_30345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9807fff; valaddr_reg:x3; val_offset:91035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91035*FLEN/8, x4, x1, x2) - -inst_30346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf980ffff; valaddr_reg:x3; val_offset:91038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91038*FLEN/8, x4, x1, x2) - -inst_30347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf981ffff; valaddr_reg:x3; val_offset:91041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91041*FLEN/8, x4, x1, x2) - -inst_30348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf983ffff; valaddr_reg:x3; val_offset:91044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91044*FLEN/8, x4, x1, x2) - -inst_30349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf987ffff; valaddr_reg:x3; val_offset:91047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91047*FLEN/8, x4, x1, x2) - -inst_30350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf98fffff; valaddr_reg:x3; val_offset:91050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91050*FLEN/8, x4, x1, x2) - -inst_30351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf99fffff; valaddr_reg:x3; val_offset:91053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91053*FLEN/8, x4, x1, x2) - -inst_30352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9bfffff; valaddr_reg:x3; val_offset:91056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91056*FLEN/8, x4, x1, x2) - -inst_30353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9c00000; valaddr_reg:x3; val_offset:91059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91059*FLEN/8, x4, x1, x2) - -inst_30354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9e00000; valaddr_reg:x3; val_offset:91062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91062*FLEN/8, x4, x1, x2) - -inst_30355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9f00000; valaddr_reg:x3; val_offset:91065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91065*FLEN/8, x4, x1, x2) - -inst_30356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9f80000; valaddr_reg:x3; val_offset:91068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91068*FLEN/8, x4, x1, x2) - -inst_30357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fc0000; valaddr_reg:x3; val_offset:91071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91071*FLEN/8, x4, x1, x2) - -inst_30358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fe0000; valaddr_reg:x3; val_offset:91074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91074*FLEN/8, x4, x1, x2) - -inst_30359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ff0000; valaddr_reg:x3; val_offset:91077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91077*FLEN/8, x4, x1, x2) - -inst_30360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ff8000; valaddr_reg:x3; val_offset:91080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91080*FLEN/8, x4, x1, x2) - -inst_30361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ffc000; valaddr_reg:x3; val_offset:91083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91083*FLEN/8, x4, x1, x2) - -inst_30362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ffe000; valaddr_reg:x3; val_offset:91086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91086*FLEN/8, x4, x1, x2) - -inst_30363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fff000; valaddr_reg:x3; val_offset:91089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91089*FLEN/8, x4, x1, x2) - -inst_30364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fff800; valaddr_reg:x3; val_offset:91092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91092*FLEN/8, x4, x1, x2) - -inst_30365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fffc00; valaddr_reg:x3; val_offset:91095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91095*FLEN/8, x4, x1, x2) - -inst_30366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fffe00; valaddr_reg:x3; val_offset:91098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91098*FLEN/8, x4, x1, x2) - -inst_30367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ffff00; valaddr_reg:x3; val_offset:91101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91101*FLEN/8, x4, x1, x2) - -inst_30368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ffff80; valaddr_reg:x3; val_offset:91104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91104*FLEN/8, x4, x1, x2) - -inst_30369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ffffc0; valaddr_reg:x3; val_offset:91107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91107*FLEN/8, x4, x1, x2) - -inst_30370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ffffe0; valaddr_reg:x3; val_offset:91110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91110*FLEN/8, x4, x1, x2) - -inst_30371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fffff0; valaddr_reg:x3; val_offset:91113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91113*FLEN/8, x4, x1, x2) - -inst_30372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fffff8; valaddr_reg:x3; val_offset:91116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91116*FLEN/8, x4, x1, x2) - -inst_30373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fffffc; valaddr_reg:x3; val_offset:91119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91119*FLEN/8, x4, x1, x2) - -inst_30374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9fffffe; valaddr_reg:x3; val_offset:91122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91122*FLEN/8, x4, x1, x2) - -inst_30375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xf9ffffff; valaddr_reg:x3; val_offset:91125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91125*FLEN/8, x4, x1, x2) - -inst_30376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff000001; valaddr_reg:x3; val_offset:91128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91128*FLEN/8, x4, x1, x2) - -inst_30377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff000003; valaddr_reg:x3; val_offset:91131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91131*FLEN/8, x4, x1, x2) - -inst_30378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff000007; valaddr_reg:x3; val_offset:91134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91134*FLEN/8, x4, x1, x2) - -inst_30379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff199999; valaddr_reg:x3; val_offset:91137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91137*FLEN/8, x4, x1, x2) - -inst_30380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff249249; valaddr_reg:x3; val_offset:91140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91140*FLEN/8, x4, x1, x2) - -inst_30381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff333333; valaddr_reg:x3; val_offset:91143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91143*FLEN/8, x4, x1, x2) - -inst_30382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:91146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91146*FLEN/8, x4, x1, x2) - -inst_30383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:91149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91149*FLEN/8, x4, x1, x2) - -inst_30384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff444444; valaddr_reg:x3; val_offset:91152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91152*FLEN/8, x4, x1, x2) - -inst_30385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:91155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91155*FLEN/8, x4, x1, x2) - -inst_30386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:91158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91158*FLEN/8, x4, x1, x2) - -inst_30387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff666666; valaddr_reg:x3; val_offset:91161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91161*FLEN/8, x4, x1, x2) - -inst_30388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:91164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91164*FLEN/8, x4, x1, x2) - -inst_30389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:91167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91167*FLEN/8, x4, x1, x2) - -inst_30390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:91170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91170*FLEN/8, x4, x1, x2) - -inst_30391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:91173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91173*FLEN/8, x4, x1, x2) - -inst_30392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:91176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91176*FLEN/8, x4, x1, x2) - -inst_30393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:91179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91179*FLEN/8, x4, x1, x2) - -inst_30394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:91182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91182*FLEN/8, x4, x1, x2) - -inst_30395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:91185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91185*FLEN/8, x4, x1, x2) - -inst_30396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:91188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91188*FLEN/8, x4, x1, x2) - -inst_30397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:91191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91191*FLEN/8, x4, x1, x2) - -inst_30398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:91194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91194*FLEN/8, x4, x1, x2) - -inst_30399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:91197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91197*FLEN/8, x4, x1, x2) - -inst_30400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:91200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91200*FLEN/8, x4, x1, x2) - -inst_30401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:91203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91203*FLEN/8, x4, x1, x2) - -inst_30402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:91206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91206*FLEN/8, x4, x1, x2) - -inst_30403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:91209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91209*FLEN/8, x4, x1, x2) - -inst_30404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:91212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91212*FLEN/8, x4, x1, x2) - -inst_30405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:91215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91215*FLEN/8, x4, x1, x2) - -inst_30406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:91218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91218*FLEN/8, x4, x1, x2) - -inst_30407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:91221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91221*FLEN/8, x4, x1, x2) - -inst_30408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81800000; valaddr_reg:x3; val_offset:91224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91224*FLEN/8, x4, x1, x2) - -inst_30409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81800001; valaddr_reg:x3; val_offset:91227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91227*FLEN/8, x4, x1, x2) - -inst_30410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81800003; valaddr_reg:x3; val_offset:91230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91230*FLEN/8, x4, x1, x2) - -inst_30411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81800007; valaddr_reg:x3; val_offset:91233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91233*FLEN/8, x4, x1, x2) - -inst_30412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8180000f; valaddr_reg:x3; val_offset:91236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91236*FLEN/8, x4, x1, x2) - -inst_30413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8180001f; valaddr_reg:x3; val_offset:91239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91239*FLEN/8, x4, x1, x2) - -inst_30414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8180003f; valaddr_reg:x3; val_offset:91242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91242*FLEN/8, x4, x1, x2) - -inst_30415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8180007f; valaddr_reg:x3; val_offset:91245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91245*FLEN/8, x4, x1, x2) - -inst_30416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x818000ff; valaddr_reg:x3; val_offset:91248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91248*FLEN/8, x4, x1, x2) - -inst_30417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x818001ff; valaddr_reg:x3; val_offset:91251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91251*FLEN/8, x4, x1, x2) - -inst_30418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x818003ff; valaddr_reg:x3; val_offset:91254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91254*FLEN/8, x4, x1, x2) - -inst_30419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x818007ff; valaddr_reg:x3; val_offset:91257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91257*FLEN/8, x4, x1, x2) - -inst_30420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81800fff; valaddr_reg:x3; val_offset:91260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91260*FLEN/8, x4, x1, x2) - -inst_30421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81801fff; valaddr_reg:x3; val_offset:91263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91263*FLEN/8, x4, x1, x2) - -inst_30422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81803fff; valaddr_reg:x3; val_offset:91266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91266*FLEN/8, x4, x1, x2) - -inst_30423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81807fff; valaddr_reg:x3; val_offset:91269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91269*FLEN/8, x4, x1, x2) - -inst_30424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8180ffff; valaddr_reg:x3; val_offset:91272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91272*FLEN/8, x4, x1, x2) - -inst_30425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8181ffff; valaddr_reg:x3; val_offset:91275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91275*FLEN/8, x4, x1, x2) - -inst_30426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8183ffff; valaddr_reg:x3; val_offset:91278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91278*FLEN/8, x4, x1, x2) - -inst_30427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x8187ffff; valaddr_reg:x3; val_offset:91281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91281*FLEN/8, x4, x1, x2) - -inst_30428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x818fffff; valaddr_reg:x3; val_offset:91284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91284*FLEN/8, x4, x1, x2) - -inst_30429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x819fffff; valaddr_reg:x3; val_offset:91287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91287*FLEN/8, x4, x1, x2) - -inst_30430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81bfffff; valaddr_reg:x3; val_offset:91290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91290*FLEN/8, x4, x1, x2) - -inst_30431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81c00000; valaddr_reg:x3; val_offset:91293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91293*FLEN/8, x4, x1, x2) - -inst_30432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81e00000; valaddr_reg:x3; val_offset:91296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91296*FLEN/8, x4, x1, x2) - -inst_30433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81f00000; valaddr_reg:x3; val_offset:91299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91299*FLEN/8, x4, x1, x2) - -inst_30434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81f80000; valaddr_reg:x3; val_offset:91302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91302*FLEN/8, x4, x1, x2) - -inst_30435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fc0000; valaddr_reg:x3; val_offset:91305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91305*FLEN/8, x4, x1, x2) - -inst_30436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fe0000; valaddr_reg:x3; val_offset:91308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91308*FLEN/8, x4, x1, x2) - -inst_30437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ff0000; valaddr_reg:x3; val_offset:91311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91311*FLEN/8, x4, x1, x2) - -inst_30438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ff8000; valaddr_reg:x3; val_offset:91314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91314*FLEN/8, x4, x1, x2) - -inst_30439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ffc000; valaddr_reg:x3; val_offset:91317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91317*FLEN/8, x4, x1, x2) - -inst_30440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ffe000; valaddr_reg:x3; val_offset:91320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91320*FLEN/8, x4, x1, x2) - -inst_30441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fff000; valaddr_reg:x3; val_offset:91323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91323*FLEN/8, x4, x1, x2) - -inst_30442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fff800; valaddr_reg:x3; val_offset:91326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91326*FLEN/8, x4, x1, x2) - -inst_30443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fffc00; valaddr_reg:x3; val_offset:91329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91329*FLEN/8, x4, x1, x2) - -inst_30444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fffe00; valaddr_reg:x3; val_offset:91332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91332*FLEN/8, x4, x1, x2) - -inst_30445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ffff00; valaddr_reg:x3; val_offset:91335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91335*FLEN/8, x4, x1, x2) - -inst_30446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ffff80; valaddr_reg:x3; val_offset:91338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91338*FLEN/8, x4, x1, x2) - -inst_30447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ffffc0; valaddr_reg:x3; val_offset:91341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91341*FLEN/8, x4, x1, x2) - -inst_30448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ffffe0; valaddr_reg:x3; val_offset:91344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91344*FLEN/8, x4, x1, x2) - -inst_30449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fffff0; valaddr_reg:x3; val_offset:91347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91347*FLEN/8, x4, x1, x2) - -inst_30450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fffff8; valaddr_reg:x3; val_offset:91350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91350*FLEN/8, x4, x1, x2) - -inst_30451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fffffc; valaddr_reg:x3; val_offset:91353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91353*FLEN/8, x4, x1, x2) - -inst_30452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81fffffe; valaddr_reg:x3; val_offset:91356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91356*FLEN/8, x4, x1, x2) - -inst_30453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; -op3val:0x81ffffff; valaddr_reg:x3; val_offset:91359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91359*FLEN/8, x4, x1, x2) - -inst_30454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3800000; valaddr_reg:x3; val_offset:91362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91362*FLEN/8, x4, x1, x2) - -inst_30455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3800001; valaddr_reg:x3; val_offset:91365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91365*FLEN/8, x4, x1, x2) - -inst_30456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3800003; valaddr_reg:x3; val_offset:91368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91368*FLEN/8, x4, x1, x2) - -inst_30457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3800007; valaddr_reg:x3; val_offset:91371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91371*FLEN/8, x4, x1, x2) - -inst_30458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe380000f; valaddr_reg:x3; val_offset:91374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91374*FLEN/8, x4, x1, x2) - -inst_30459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe380001f; valaddr_reg:x3; val_offset:91377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91377*FLEN/8, x4, x1, x2) - -inst_30460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe380003f; valaddr_reg:x3; val_offset:91380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91380*FLEN/8, x4, x1, x2) - -inst_30461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe380007f; valaddr_reg:x3; val_offset:91383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91383*FLEN/8, x4, x1, x2) - -inst_30462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe38000ff; valaddr_reg:x3; val_offset:91386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91386*FLEN/8, x4, x1, x2) - -inst_30463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe38001ff; valaddr_reg:x3; val_offset:91389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91389*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_239) - -inst_30464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe38003ff; valaddr_reg:x3; val_offset:91392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91392*FLEN/8, x4, x1, x2) - -inst_30465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe38007ff; valaddr_reg:x3; val_offset:91395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91395*FLEN/8, x4, x1, x2) - -inst_30466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3800fff; valaddr_reg:x3; val_offset:91398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91398*FLEN/8, x4, x1, x2) - -inst_30467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3801fff; valaddr_reg:x3; val_offset:91401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91401*FLEN/8, x4, x1, x2) - -inst_30468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3803fff; valaddr_reg:x3; val_offset:91404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91404*FLEN/8, x4, x1, x2) - -inst_30469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3807fff; valaddr_reg:x3; val_offset:91407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91407*FLEN/8, x4, x1, x2) - -inst_30470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe380ffff; valaddr_reg:x3; val_offset:91410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91410*FLEN/8, x4, x1, x2) - -inst_30471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe381ffff; valaddr_reg:x3; val_offset:91413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91413*FLEN/8, x4, x1, x2) - -inst_30472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe383ffff; valaddr_reg:x3; val_offset:91416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91416*FLEN/8, x4, x1, x2) - -inst_30473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe387ffff; valaddr_reg:x3; val_offset:91419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91419*FLEN/8, x4, x1, x2) - -inst_30474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe38fffff; valaddr_reg:x3; val_offset:91422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91422*FLEN/8, x4, x1, x2) - -inst_30475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe39fffff; valaddr_reg:x3; val_offset:91425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91425*FLEN/8, x4, x1, x2) - -inst_30476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3bfffff; valaddr_reg:x3; val_offset:91428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91428*FLEN/8, x4, x1, x2) - -inst_30477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3c00000; valaddr_reg:x3; val_offset:91431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91431*FLEN/8, x4, x1, x2) - -inst_30478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3e00000; valaddr_reg:x3; val_offset:91434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91434*FLEN/8, x4, x1, x2) - -inst_30479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3f00000; valaddr_reg:x3; val_offset:91437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91437*FLEN/8, x4, x1, x2) - -inst_30480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3f80000; valaddr_reg:x3; val_offset:91440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91440*FLEN/8, x4, x1, x2) - -inst_30481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fc0000; valaddr_reg:x3; val_offset:91443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91443*FLEN/8, x4, x1, x2) - -inst_30482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fe0000; valaddr_reg:x3; val_offset:91446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91446*FLEN/8, x4, x1, x2) - -inst_30483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ff0000; valaddr_reg:x3; val_offset:91449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91449*FLEN/8, x4, x1, x2) - -inst_30484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ff8000; valaddr_reg:x3; val_offset:91452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91452*FLEN/8, x4, x1, x2) - -inst_30485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ffc000; valaddr_reg:x3; val_offset:91455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91455*FLEN/8, x4, x1, x2) - -inst_30486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ffe000; valaddr_reg:x3; val_offset:91458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91458*FLEN/8, x4, x1, x2) - -inst_30487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fff000; valaddr_reg:x3; val_offset:91461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91461*FLEN/8, x4, x1, x2) - -inst_30488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fff800; valaddr_reg:x3; val_offset:91464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91464*FLEN/8, x4, x1, x2) - -inst_30489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fffc00; valaddr_reg:x3; val_offset:91467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91467*FLEN/8, x4, x1, x2) - -inst_30490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fffe00; valaddr_reg:x3; val_offset:91470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91470*FLEN/8, x4, x1, x2) - -inst_30491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ffff00; valaddr_reg:x3; val_offset:91473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91473*FLEN/8, x4, x1, x2) - -inst_30492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ffff80; valaddr_reg:x3; val_offset:91476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91476*FLEN/8, x4, x1, x2) - -inst_30493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ffffc0; valaddr_reg:x3; val_offset:91479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91479*FLEN/8, x4, x1, x2) - -inst_30494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ffffe0; valaddr_reg:x3; val_offset:91482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91482*FLEN/8, x4, x1, x2) - -inst_30495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fffff0; valaddr_reg:x3; val_offset:91485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91485*FLEN/8, x4, x1, x2) - -inst_30496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fffff8; valaddr_reg:x3; val_offset:91488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91488*FLEN/8, x4, x1, x2) - -inst_30497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fffffc; valaddr_reg:x3; val_offset:91491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91491*FLEN/8, x4, x1, x2) - -inst_30498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3fffffe; valaddr_reg:x3; val_offset:91494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91494*FLEN/8, x4, x1, x2) - -inst_30499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xe3ffffff; valaddr_reg:x3; val_offset:91497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91497*FLEN/8, x4, x1, x2) - -inst_30500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff000001; valaddr_reg:x3; val_offset:91500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91500*FLEN/8, x4, x1, x2) - -inst_30501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff000003; valaddr_reg:x3; val_offset:91503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91503*FLEN/8, x4, x1, x2) - -inst_30502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff000007; valaddr_reg:x3; val_offset:91506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91506*FLEN/8, x4, x1, x2) - -inst_30503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff199999; valaddr_reg:x3; val_offset:91509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91509*FLEN/8, x4, x1, x2) - -inst_30504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff249249; valaddr_reg:x3; val_offset:91512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91512*FLEN/8, x4, x1, x2) - -inst_30505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff333333; valaddr_reg:x3; val_offset:91515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91515*FLEN/8, x4, x1, x2) - -inst_30506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:91518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91518*FLEN/8, x4, x1, x2) - -inst_30507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:91521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91521*FLEN/8, x4, x1, x2) - -inst_30508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff444444; valaddr_reg:x3; val_offset:91524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91524*FLEN/8, x4, x1, x2) - -inst_30509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:91527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91527*FLEN/8, x4, x1, x2) - -inst_30510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:91530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91530*FLEN/8, x4, x1, x2) - -inst_30511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff666666; valaddr_reg:x3; val_offset:91533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91533*FLEN/8, x4, x1, x2) - -inst_30512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:91536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91536*FLEN/8, x4, x1, x2) - -inst_30513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:91539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91539*FLEN/8, x4, x1, x2) - -inst_30514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:91542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91542*FLEN/8, x4, x1, x2) - -inst_30515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:91545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91545*FLEN/8, x4, x1, x2) - -inst_30516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1800000; valaddr_reg:x3; val_offset:91548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91548*FLEN/8, x4, x1, x2) - -inst_30517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1800001; valaddr_reg:x3; val_offset:91551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91551*FLEN/8, x4, x1, x2) - -inst_30518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1800003; valaddr_reg:x3; val_offset:91554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91554*FLEN/8, x4, x1, x2) - -inst_30519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1800007; valaddr_reg:x3; val_offset:91557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91557*FLEN/8, x4, x1, x2) - -inst_30520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe180000f; valaddr_reg:x3; val_offset:91560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91560*FLEN/8, x4, x1, x2) - -inst_30521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe180001f; valaddr_reg:x3; val_offset:91563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91563*FLEN/8, x4, x1, x2) - -inst_30522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe180003f; valaddr_reg:x3; val_offset:91566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91566*FLEN/8, x4, x1, x2) - -inst_30523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe180007f; valaddr_reg:x3; val_offset:91569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91569*FLEN/8, x4, x1, x2) - -inst_30524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe18000ff; valaddr_reg:x3; val_offset:91572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91572*FLEN/8, x4, x1, x2) - -inst_30525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe18001ff; valaddr_reg:x3; val_offset:91575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91575*FLEN/8, x4, x1, x2) - -inst_30526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe18003ff; valaddr_reg:x3; val_offset:91578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91578*FLEN/8, x4, x1, x2) - -inst_30527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe18007ff; valaddr_reg:x3; val_offset:91581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91581*FLEN/8, x4, x1, x2) - -inst_30528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1800fff; valaddr_reg:x3; val_offset:91584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91584*FLEN/8, x4, x1, x2) - -inst_30529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1801fff; valaddr_reg:x3; val_offset:91587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91587*FLEN/8, x4, x1, x2) - -inst_30530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1803fff; valaddr_reg:x3; val_offset:91590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91590*FLEN/8, x4, x1, x2) - -inst_30531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1807fff; valaddr_reg:x3; val_offset:91593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91593*FLEN/8, x4, x1, x2) - -inst_30532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe180ffff; valaddr_reg:x3; val_offset:91596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91596*FLEN/8, x4, x1, x2) - -inst_30533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe181ffff; valaddr_reg:x3; val_offset:91599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91599*FLEN/8, x4, x1, x2) - -inst_30534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe183ffff; valaddr_reg:x3; val_offset:91602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91602*FLEN/8, x4, x1, x2) - -inst_30535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe187ffff; valaddr_reg:x3; val_offset:91605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91605*FLEN/8, x4, x1, x2) - -inst_30536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe18fffff; valaddr_reg:x3; val_offset:91608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91608*FLEN/8, x4, x1, x2) - -inst_30537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe19fffff; valaddr_reg:x3; val_offset:91611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91611*FLEN/8, x4, x1, x2) - -inst_30538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1bfffff; valaddr_reg:x3; val_offset:91614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91614*FLEN/8, x4, x1, x2) - -inst_30539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1c00000; valaddr_reg:x3; val_offset:91617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91617*FLEN/8, x4, x1, x2) - -inst_30540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1e00000; valaddr_reg:x3; val_offset:91620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91620*FLEN/8, x4, x1, x2) - -inst_30541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1f00000; valaddr_reg:x3; val_offset:91623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91623*FLEN/8, x4, x1, x2) - -inst_30542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1f80000; valaddr_reg:x3; val_offset:91626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91626*FLEN/8, x4, x1, x2) - -inst_30543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fc0000; valaddr_reg:x3; val_offset:91629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91629*FLEN/8, x4, x1, x2) - -inst_30544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fe0000; valaddr_reg:x3; val_offset:91632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91632*FLEN/8, x4, x1, x2) - -inst_30545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ff0000; valaddr_reg:x3; val_offset:91635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91635*FLEN/8, x4, x1, x2) - -inst_30546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ff8000; valaddr_reg:x3; val_offset:91638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91638*FLEN/8, x4, x1, x2) - -inst_30547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ffc000; valaddr_reg:x3; val_offset:91641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91641*FLEN/8, x4, x1, x2) - -inst_30548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ffe000; valaddr_reg:x3; val_offset:91644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91644*FLEN/8, x4, x1, x2) - -inst_30549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fff000; valaddr_reg:x3; val_offset:91647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91647*FLEN/8, x4, x1, x2) - -inst_30550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fff800; valaddr_reg:x3; val_offset:91650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91650*FLEN/8, x4, x1, x2) - -inst_30551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fffc00; valaddr_reg:x3; val_offset:91653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91653*FLEN/8, x4, x1, x2) - -inst_30552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fffe00; valaddr_reg:x3; val_offset:91656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91656*FLEN/8, x4, x1, x2) - -inst_30553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ffff00; valaddr_reg:x3; val_offset:91659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91659*FLEN/8, x4, x1, x2) - -inst_30554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ffff80; valaddr_reg:x3; val_offset:91662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91662*FLEN/8, x4, x1, x2) - -inst_30555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ffffc0; valaddr_reg:x3; val_offset:91665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91665*FLEN/8, x4, x1, x2) - -inst_30556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ffffe0; valaddr_reg:x3; val_offset:91668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91668*FLEN/8, x4, x1, x2) - -inst_30557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fffff0; valaddr_reg:x3; val_offset:91671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91671*FLEN/8, x4, x1, x2) - -inst_30558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fffff8; valaddr_reg:x3; val_offset:91674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91674*FLEN/8, x4, x1, x2) - -inst_30559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fffffc; valaddr_reg:x3; val_offset:91677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91677*FLEN/8, x4, x1, x2) - -inst_30560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1fffffe; valaddr_reg:x3; val_offset:91680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91680*FLEN/8, x4, x1, x2) - -inst_30561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xe1ffffff; valaddr_reg:x3; val_offset:91683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91683*FLEN/8, x4, x1, x2) - -inst_30562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff000001; valaddr_reg:x3; val_offset:91686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91686*FLEN/8, x4, x1, x2) - -inst_30563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff000003; valaddr_reg:x3; val_offset:91689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91689*FLEN/8, x4, x1, x2) - -inst_30564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff000007; valaddr_reg:x3; val_offset:91692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91692*FLEN/8, x4, x1, x2) - -inst_30565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff199999; valaddr_reg:x3; val_offset:91695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91695*FLEN/8, x4, x1, x2) - -inst_30566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff249249; valaddr_reg:x3; val_offset:91698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91698*FLEN/8, x4, x1, x2) - -inst_30567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff333333; valaddr_reg:x3; val_offset:91701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91701*FLEN/8, x4, x1, x2) - -inst_30568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:91704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91704*FLEN/8, x4, x1, x2) - -inst_30569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:91707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91707*FLEN/8, x4, x1, x2) - -inst_30570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff444444; valaddr_reg:x3; val_offset:91710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91710*FLEN/8, x4, x1, x2) - -inst_30571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:91713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91713*FLEN/8, x4, x1, x2) - -inst_30572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:91716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91716*FLEN/8, x4, x1, x2) - -inst_30573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff666666; valaddr_reg:x3; val_offset:91719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91719*FLEN/8, x4, x1, x2) - -inst_30574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:91722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91722*FLEN/8, x4, x1, x2) - -inst_30575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:91725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91725*FLEN/8, x4, x1, x2) - -inst_30576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:91728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91728*FLEN/8, x4, x1, x2) - -inst_30577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:91731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91731*FLEN/8, x4, x1, x2) - -inst_30578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:91734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91734*FLEN/8, x4, x1, x2) - -inst_30579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:91737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91737*FLEN/8, x4, x1, x2) - -inst_30580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:91740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91740*FLEN/8, x4, x1, x2) - -inst_30581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:91743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91743*FLEN/8, x4, x1, x2) - -inst_30582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:91746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91746*FLEN/8, x4, x1, x2) - -inst_30583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:91749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91749*FLEN/8, x4, x1, x2) - -inst_30584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:91752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91752*FLEN/8, x4, x1, x2) - -inst_30585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:91755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91755*FLEN/8, x4, x1, x2) - -inst_30586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:91758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91758*FLEN/8, x4, x1, x2) - -inst_30587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:91761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91761*FLEN/8, x4, x1, x2) - -inst_30588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:91764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91764*FLEN/8, x4, x1, x2) - -inst_30589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:91767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91767*FLEN/8, x4, x1, x2) - -inst_30590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:91770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91770*FLEN/8, x4, x1, x2) - -inst_30591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:91773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91773*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_240) - -inst_30592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:91776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91776*FLEN/8, x4, x1, x2) - -inst_30593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:91779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91779*FLEN/8, x4, x1, x2) - -inst_30594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b800000; valaddr_reg:x3; val_offset:91782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91782*FLEN/8, x4, x1, x2) - -inst_30595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b800001; valaddr_reg:x3; val_offset:91785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91785*FLEN/8, x4, x1, x2) - -inst_30596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b800003; valaddr_reg:x3; val_offset:91788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91788*FLEN/8, x4, x1, x2) - -inst_30597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b800007; valaddr_reg:x3; val_offset:91791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91791*FLEN/8, x4, x1, x2) - -inst_30598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b80000f; valaddr_reg:x3; val_offset:91794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91794*FLEN/8, x4, x1, x2) - -inst_30599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b80001f; valaddr_reg:x3; val_offset:91797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91797*FLEN/8, x4, x1, x2) - -inst_30600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b80003f; valaddr_reg:x3; val_offset:91800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91800*FLEN/8, x4, x1, x2) - -inst_30601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b80007f; valaddr_reg:x3; val_offset:91803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91803*FLEN/8, x4, x1, x2) - -inst_30602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b8000ff; valaddr_reg:x3; val_offset:91806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91806*FLEN/8, x4, x1, x2) - -inst_30603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b8001ff; valaddr_reg:x3; val_offset:91809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91809*FLEN/8, x4, x1, x2) - -inst_30604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b8003ff; valaddr_reg:x3; val_offset:91812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91812*FLEN/8, x4, x1, x2) - -inst_30605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b8007ff; valaddr_reg:x3; val_offset:91815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91815*FLEN/8, x4, x1, x2) - -inst_30606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b800fff; valaddr_reg:x3; val_offset:91818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91818*FLEN/8, x4, x1, x2) - -inst_30607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b801fff; valaddr_reg:x3; val_offset:91821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91821*FLEN/8, x4, x1, x2) - -inst_30608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b803fff; valaddr_reg:x3; val_offset:91824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91824*FLEN/8, x4, x1, x2) - -inst_30609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b807fff; valaddr_reg:x3; val_offset:91827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91827*FLEN/8, x4, x1, x2) - -inst_30610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b80ffff; valaddr_reg:x3; val_offset:91830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91830*FLEN/8, x4, x1, x2) - -inst_30611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b81ffff; valaddr_reg:x3; val_offset:91833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91833*FLEN/8, x4, x1, x2) - -inst_30612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b83ffff; valaddr_reg:x3; val_offset:91836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91836*FLEN/8, x4, x1, x2) - -inst_30613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b87ffff; valaddr_reg:x3; val_offset:91839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91839*FLEN/8, x4, x1, x2) - -inst_30614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b8fffff; valaddr_reg:x3; val_offset:91842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91842*FLEN/8, x4, x1, x2) - -inst_30615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8b9fffff; valaddr_reg:x3; val_offset:91845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91845*FLEN/8, x4, x1, x2) - -inst_30616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bbfffff; valaddr_reg:x3; val_offset:91848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91848*FLEN/8, x4, x1, x2) - -inst_30617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bc00000; valaddr_reg:x3; val_offset:91851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91851*FLEN/8, x4, x1, x2) - -inst_30618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8be00000; valaddr_reg:x3; val_offset:91854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91854*FLEN/8, x4, x1, x2) - -inst_30619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bf00000; valaddr_reg:x3; val_offset:91857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91857*FLEN/8, x4, x1, x2) - -inst_30620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bf80000; valaddr_reg:x3; val_offset:91860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91860*FLEN/8, x4, x1, x2) - -inst_30621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfc0000; valaddr_reg:x3; val_offset:91863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91863*FLEN/8, x4, x1, x2) - -inst_30622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfe0000; valaddr_reg:x3; val_offset:91866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91866*FLEN/8, x4, x1, x2) - -inst_30623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bff0000; valaddr_reg:x3; val_offset:91869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91869*FLEN/8, x4, x1, x2) - -inst_30624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bff8000; valaddr_reg:x3; val_offset:91872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91872*FLEN/8, x4, x1, x2) - -inst_30625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bffc000; valaddr_reg:x3; val_offset:91875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91875*FLEN/8, x4, x1, x2) - -inst_30626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bffe000; valaddr_reg:x3; val_offset:91878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91878*FLEN/8, x4, x1, x2) - -inst_30627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfff000; valaddr_reg:x3; val_offset:91881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91881*FLEN/8, x4, x1, x2) - -inst_30628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfff800; valaddr_reg:x3; val_offset:91884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91884*FLEN/8, x4, x1, x2) - -inst_30629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfffc00; valaddr_reg:x3; val_offset:91887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91887*FLEN/8, x4, x1, x2) - -inst_30630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfffe00; valaddr_reg:x3; val_offset:91890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91890*FLEN/8, x4, x1, x2) - -inst_30631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bffff00; valaddr_reg:x3; val_offset:91893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91893*FLEN/8, x4, x1, x2) - -inst_30632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bffff80; valaddr_reg:x3; val_offset:91896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91896*FLEN/8, x4, x1, x2) - -inst_30633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bffffc0; valaddr_reg:x3; val_offset:91899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91899*FLEN/8, x4, x1, x2) - -inst_30634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bffffe0; valaddr_reg:x3; val_offset:91902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91902*FLEN/8, x4, x1, x2) - -inst_30635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfffff0; valaddr_reg:x3; val_offset:91905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91905*FLEN/8, x4, x1, x2) - -inst_30636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfffff8; valaddr_reg:x3; val_offset:91908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91908*FLEN/8, x4, x1, x2) - -inst_30637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfffffc; valaddr_reg:x3; val_offset:91911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91911*FLEN/8, x4, x1, x2) - -inst_30638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bfffffe; valaddr_reg:x3; val_offset:91914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91914*FLEN/8, x4, x1, x2) - -inst_30639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; -op3val:0x8bffffff; valaddr_reg:x3; val_offset:91917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91917*FLEN/8, x4, x1, x2) - -inst_30640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80000000; valaddr_reg:x3; val_offset:91920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91920*FLEN/8, x4, x1, x2) - -inst_30641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:91923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91923*FLEN/8, x4, x1, x2) - -inst_30642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:91926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91926*FLEN/8, x4, x1, x2) - -inst_30643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:91929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91929*FLEN/8, x4, x1, x2) - -inst_30644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x8000000f; valaddr_reg:x3; val_offset:91932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91932*FLEN/8, x4, x1, x2) - -inst_30645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x8000001f; valaddr_reg:x3; val_offset:91935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91935*FLEN/8, x4, x1, x2) - -inst_30646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x8000003f; valaddr_reg:x3; val_offset:91938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91938*FLEN/8, x4, x1, x2) - -inst_30647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x8000007f; valaddr_reg:x3; val_offset:91941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91941*FLEN/8, x4, x1, x2) - -inst_30648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x800000ff; valaddr_reg:x3; val_offset:91944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91944*FLEN/8, x4, x1, x2) - -inst_30649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x800001ff; valaddr_reg:x3; val_offset:91947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91947*FLEN/8, x4, x1, x2) - -inst_30650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x800003ff; valaddr_reg:x3; val_offset:91950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91950*FLEN/8, x4, x1, x2) - -inst_30651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x800007ff; valaddr_reg:x3; val_offset:91953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91953*FLEN/8, x4, x1, x2) - -inst_30652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80000fff; valaddr_reg:x3; val_offset:91956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91956*FLEN/8, x4, x1, x2) - -inst_30653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80001fff; valaddr_reg:x3; val_offset:91959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91959*FLEN/8, x4, x1, x2) - -inst_30654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80003fff; valaddr_reg:x3; val_offset:91962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91962*FLEN/8, x4, x1, x2) - -inst_30655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80007fff; valaddr_reg:x3; val_offset:91965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91965*FLEN/8, x4, x1, x2) - -inst_30656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x8000ffff; valaddr_reg:x3; val_offset:91968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91968*FLEN/8, x4, x1, x2) - -inst_30657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x8001ffff; valaddr_reg:x3; val_offset:91971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91971*FLEN/8, x4, x1, x2) - -inst_30658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x8003ffff; valaddr_reg:x3; val_offset:91974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91974*FLEN/8, x4, x1, x2) - -inst_30659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x8007ffff; valaddr_reg:x3; val_offset:91977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91977*FLEN/8, x4, x1, x2) - -inst_30660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x800fffff; valaddr_reg:x3; val_offset:91980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91980*FLEN/8, x4, x1, x2) - -inst_30661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x801fffff; valaddr_reg:x3; val_offset:91983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91983*FLEN/8, x4, x1, x2) - -inst_30662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x803fffff; valaddr_reg:x3; val_offset:91986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91986*FLEN/8, x4, x1, x2) - -inst_30663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80400000; valaddr_reg:x3; val_offset:91989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91989*FLEN/8, x4, x1, x2) - -inst_30664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80600000; valaddr_reg:x3; val_offset:91992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91992*FLEN/8, x4, x1, x2) - -inst_30665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80700000; valaddr_reg:x3; val_offset:91995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91995*FLEN/8, x4, x1, x2) - -inst_30666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80780000; valaddr_reg:x3; val_offset:91998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91998*FLEN/8, x4, x1, x2) - -inst_30667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807c0000; valaddr_reg:x3; val_offset:92001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92001*FLEN/8, x4, x1, x2) - -inst_30668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807e0000; valaddr_reg:x3; val_offset:92004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92004*FLEN/8, x4, x1, x2) - -inst_30669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807f0000; valaddr_reg:x3; val_offset:92007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92007*FLEN/8, x4, x1, x2) - -inst_30670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807f8000; valaddr_reg:x3; val_offset:92010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92010*FLEN/8, x4, x1, x2) - -inst_30671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807fc000; valaddr_reg:x3; val_offset:92013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92013*FLEN/8, x4, x1, x2) - -inst_30672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807fe000; valaddr_reg:x3; val_offset:92016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92016*FLEN/8, x4, x1, x2) - -inst_30673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807ff000; valaddr_reg:x3; val_offset:92019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92019*FLEN/8, x4, x1, x2) - -inst_30674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807ff800; valaddr_reg:x3; val_offset:92022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92022*FLEN/8, x4, x1, x2) - -inst_30675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807ffc00; valaddr_reg:x3; val_offset:92025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92025*FLEN/8, x4, x1, x2) - -inst_30676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807ffe00; valaddr_reg:x3; val_offset:92028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92028*FLEN/8, x4, x1, x2) - -inst_30677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807fff00; valaddr_reg:x3; val_offset:92031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92031*FLEN/8, x4, x1, x2) - -inst_30678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807fff80; valaddr_reg:x3; val_offset:92034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92034*FLEN/8, x4, x1, x2) - -inst_30679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807fffc0; valaddr_reg:x3; val_offset:92037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92037*FLEN/8, x4, x1, x2) - -inst_30680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807fffe0; valaddr_reg:x3; val_offset:92040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92040*FLEN/8, x4, x1, x2) - -inst_30681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807ffff0; valaddr_reg:x3; val_offset:92043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92043*FLEN/8, x4, x1, x2) - -inst_30682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:92046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92046*FLEN/8, x4, x1, x2) - -inst_30683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:92049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92049*FLEN/8, x4, x1, x2) - -inst_30684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:92052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92052*FLEN/8, x4, x1, x2) - -inst_30685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x807fffff; valaddr_reg:x3; val_offset:92055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92055*FLEN/8, x4, x1, x2) - -inst_30686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:92058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92058*FLEN/8, x4, x1, x2) - -inst_30687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:92061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92061*FLEN/8, x4, x1, x2) - -inst_30688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:92064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92064*FLEN/8, x4, x1, x2) - -inst_30689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:92067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92067*FLEN/8, x4, x1, x2) - -inst_30690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:92070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92070*FLEN/8, x4, x1, x2) - -inst_30691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:92073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92073*FLEN/8, x4, x1, x2) - -inst_30692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:92076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92076*FLEN/8, x4, x1, x2) - -inst_30693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:92079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92079*FLEN/8, x4, x1, x2) - -inst_30694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:92082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92082*FLEN/8, x4, x1, x2) - -inst_30695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:92085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92085*FLEN/8, x4, x1, x2) - -inst_30696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:92088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92088*FLEN/8, x4, x1, x2) - -inst_30697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:92091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92091*FLEN/8, x4, x1, x2) - -inst_30698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:92094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92094*FLEN/8, x4, x1, x2) - -inst_30699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:92097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92097*FLEN/8, x4, x1, x2) - -inst_30700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:92100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92100*FLEN/8, x4, x1, x2) - -inst_30701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:92103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92103*FLEN/8, x4, x1, x2) - -inst_30702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:92106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92106*FLEN/8, x4, x1, x2) - -inst_30703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:92109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92109*FLEN/8, x4, x1, x2) - -inst_30704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:92112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92112*FLEN/8, x4, x1, x2) - -inst_30705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:92115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92115*FLEN/8, x4, x1, x2) - -inst_30706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:92118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92118*FLEN/8, x4, x1, x2) - -inst_30707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:92121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92121*FLEN/8, x4, x1, x2) - -inst_30708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:92124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92124*FLEN/8, x4, x1, x2) - -inst_30709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:92127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92127*FLEN/8, x4, x1, x2) - -inst_30710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:92130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92130*FLEN/8, x4, x1, x2) - -inst_30711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:92133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92133*FLEN/8, x4, x1, x2) - -inst_30712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:92136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92136*FLEN/8, x4, x1, x2) - -inst_30713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:92139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92139*FLEN/8, x4, x1, x2) - -inst_30714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:92142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92142*FLEN/8, x4, x1, x2) - -inst_30715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:92145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92145*FLEN/8, x4, x1, x2) - -inst_30716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:92148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92148*FLEN/8, x4, x1, x2) - -inst_30717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:92151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92151*FLEN/8, x4, x1, x2) - -inst_30718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6000000; valaddr_reg:x3; val_offset:92154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92154*FLEN/8, x4, x1, x2) - -inst_30719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6000001; valaddr_reg:x3; val_offset:92157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92157*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_241) - -inst_30720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6000003; valaddr_reg:x3; val_offset:92160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92160*FLEN/8, x4, x1, x2) - -inst_30721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6000007; valaddr_reg:x3; val_offset:92163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92163*FLEN/8, x4, x1, x2) - -inst_30722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x600000f; valaddr_reg:x3; val_offset:92166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92166*FLEN/8, x4, x1, x2) - -inst_30723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x600001f; valaddr_reg:x3; val_offset:92169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92169*FLEN/8, x4, x1, x2) - -inst_30724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x600003f; valaddr_reg:x3; val_offset:92172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92172*FLEN/8, x4, x1, x2) - -inst_30725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x600007f; valaddr_reg:x3; val_offset:92175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92175*FLEN/8, x4, x1, x2) - -inst_30726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x60000ff; valaddr_reg:x3; val_offset:92178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92178*FLEN/8, x4, x1, x2) - -inst_30727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x60001ff; valaddr_reg:x3; val_offset:92181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92181*FLEN/8, x4, x1, x2) - -inst_30728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x60003ff; valaddr_reg:x3; val_offset:92184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92184*FLEN/8, x4, x1, x2) - -inst_30729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x60007ff; valaddr_reg:x3; val_offset:92187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92187*FLEN/8, x4, x1, x2) - -inst_30730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6000fff; valaddr_reg:x3; val_offset:92190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92190*FLEN/8, x4, x1, x2) - -inst_30731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6001fff; valaddr_reg:x3; val_offset:92193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92193*FLEN/8, x4, x1, x2) - -inst_30732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6003fff; valaddr_reg:x3; val_offset:92196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92196*FLEN/8, x4, x1, x2) - -inst_30733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6007fff; valaddr_reg:x3; val_offset:92199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92199*FLEN/8, x4, x1, x2) - -inst_30734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x600ffff; valaddr_reg:x3; val_offset:92202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92202*FLEN/8, x4, x1, x2) - -inst_30735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x601ffff; valaddr_reg:x3; val_offset:92205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92205*FLEN/8, x4, x1, x2) - -inst_30736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x603ffff; valaddr_reg:x3; val_offset:92208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92208*FLEN/8, x4, x1, x2) - -inst_30737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x607ffff; valaddr_reg:x3; val_offset:92211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92211*FLEN/8, x4, x1, x2) - -inst_30738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x60fffff; valaddr_reg:x3; val_offset:92214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92214*FLEN/8, x4, x1, x2) - -inst_30739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x61fffff; valaddr_reg:x3; val_offset:92217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92217*FLEN/8, x4, x1, x2) - -inst_30740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x63fffff; valaddr_reg:x3; val_offset:92220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92220*FLEN/8, x4, x1, x2) - -inst_30741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6400000; valaddr_reg:x3; val_offset:92223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92223*FLEN/8, x4, x1, x2) - -inst_30742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6600000; valaddr_reg:x3; val_offset:92226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92226*FLEN/8, x4, x1, x2) - -inst_30743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6700000; valaddr_reg:x3; val_offset:92229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92229*FLEN/8, x4, x1, x2) - -inst_30744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x6780000; valaddr_reg:x3; val_offset:92232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92232*FLEN/8, x4, x1, x2) - -inst_30745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67c0000; valaddr_reg:x3; val_offset:92235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92235*FLEN/8, x4, x1, x2) - -inst_30746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67e0000; valaddr_reg:x3; val_offset:92238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92238*FLEN/8, x4, x1, x2) - -inst_30747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67f0000; valaddr_reg:x3; val_offset:92241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92241*FLEN/8, x4, x1, x2) - -inst_30748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67f8000; valaddr_reg:x3; val_offset:92244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92244*FLEN/8, x4, x1, x2) - -inst_30749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67fc000; valaddr_reg:x3; val_offset:92247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92247*FLEN/8, x4, x1, x2) - -inst_30750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67fe000; valaddr_reg:x3; val_offset:92250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92250*FLEN/8, x4, x1, x2) - -inst_30751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67ff000; valaddr_reg:x3; val_offset:92253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92253*FLEN/8, x4, x1, x2) - -inst_30752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67ff800; valaddr_reg:x3; val_offset:92256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92256*FLEN/8, x4, x1, x2) - -inst_30753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67ffc00; valaddr_reg:x3; val_offset:92259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92259*FLEN/8, x4, x1, x2) - -inst_30754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67ffe00; valaddr_reg:x3; val_offset:92262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92262*FLEN/8, x4, x1, x2) - -inst_30755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67fff00; valaddr_reg:x3; val_offset:92265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92265*FLEN/8, x4, x1, x2) - -inst_30756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67fff80; valaddr_reg:x3; val_offset:92268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92268*FLEN/8, x4, x1, x2) - -inst_30757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67fffc0; valaddr_reg:x3; val_offset:92271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92271*FLEN/8, x4, x1, x2) - -inst_30758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67fffe0; valaddr_reg:x3; val_offset:92274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92274*FLEN/8, x4, x1, x2) - -inst_30759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67ffff0; valaddr_reg:x3; val_offset:92277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92277*FLEN/8, x4, x1, x2) - -inst_30760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67ffff8; valaddr_reg:x3; val_offset:92280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92280*FLEN/8, x4, x1, x2) - -inst_30761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67ffffc; valaddr_reg:x3; val_offset:92283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92283*FLEN/8, x4, x1, x2) - -inst_30762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67ffffe; valaddr_reg:x3; val_offset:92286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92286*FLEN/8, x4, x1, x2) - -inst_30763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; -op3val:0x67fffff; valaddr_reg:x3; val_offset:92289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92289*FLEN/8, x4, x1, x2) - -inst_30764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf000000; valaddr_reg:x3; val_offset:92292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92292*FLEN/8, x4, x1, x2) - -inst_30765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf000001; valaddr_reg:x3; val_offset:92295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92295*FLEN/8, x4, x1, x2) - -inst_30766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf000003; valaddr_reg:x3; val_offset:92298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92298*FLEN/8, x4, x1, x2) - -inst_30767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf000007; valaddr_reg:x3; val_offset:92301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92301*FLEN/8, x4, x1, x2) - -inst_30768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf00000f; valaddr_reg:x3; val_offset:92304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92304*FLEN/8, x4, x1, x2) - -inst_30769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf00001f; valaddr_reg:x3; val_offset:92307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92307*FLEN/8, x4, x1, x2) - -inst_30770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf00003f; valaddr_reg:x3; val_offset:92310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92310*FLEN/8, x4, x1, x2) - -inst_30771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf00007f; valaddr_reg:x3; val_offset:92313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92313*FLEN/8, x4, x1, x2) - -inst_30772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf0000ff; valaddr_reg:x3; val_offset:92316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92316*FLEN/8, x4, x1, x2) - -inst_30773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf0001ff; valaddr_reg:x3; val_offset:92319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92319*FLEN/8, x4, x1, x2) - -inst_30774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf0003ff; valaddr_reg:x3; val_offset:92322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92322*FLEN/8, x4, x1, x2) - -inst_30775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf0007ff; valaddr_reg:x3; val_offset:92325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92325*FLEN/8, x4, x1, x2) - -inst_30776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf000fff; valaddr_reg:x3; val_offset:92328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92328*FLEN/8, x4, x1, x2) - -inst_30777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf001fff; valaddr_reg:x3; val_offset:92331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92331*FLEN/8, x4, x1, x2) - -inst_30778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf003fff; valaddr_reg:x3; val_offset:92334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92334*FLEN/8, x4, x1, x2) - -inst_30779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf007fff; valaddr_reg:x3; val_offset:92337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92337*FLEN/8, x4, x1, x2) - -inst_30780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf00ffff; valaddr_reg:x3; val_offset:92340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92340*FLEN/8, x4, x1, x2) - -inst_30781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf01ffff; valaddr_reg:x3; val_offset:92343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92343*FLEN/8, x4, x1, x2) - -inst_30782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf03ffff; valaddr_reg:x3; val_offset:92346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92346*FLEN/8, x4, x1, x2) - -inst_30783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf07ffff; valaddr_reg:x3; val_offset:92349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92349*FLEN/8, x4, x1, x2) - -inst_30784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf0fffff; valaddr_reg:x3; val_offset:92352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92352*FLEN/8, x4, x1, x2) - -inst_30785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf1fffff; valaddr_reg:x3; val_offset:92355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92355*FLEN/8, x4, x1, x2) - -inst_30786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf3fffff; valaddr_reg:x3; val_offset:92358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92358*FLEN/8, x4, x1, x2) - -inst_30787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf400000; valaddr_reg:x3; val_offset:92361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92361*FLEN/8, x4, x1, x2) - -inst_30788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf600000; valaddr_reg:x3; val_offset:92364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92364*FLEN/8, x4, x1, x2) - -inst_30789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf700000; valaddr_reg:x3; val_offset:92367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92367*FLEN/8, x4, x1, x2) - -inst_30790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf780000; valaddr_reg:x3; val_offset:92370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92370*FLEN/8, x4, x1, x2) - -inst_30791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7c0000; valaddr_reg:x3; val_offset:92373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92373*FLEN/8, x4, x1, x2) - -inst_30792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7e0000; valaddr_reg:x3; val_offset:92376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92376*FLEN/8, x4, x1, x2) - -inst_30793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7f0000; valaddr_reg:x3; val_offset:92379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92379*FLEN/8, x4, x1, x2) - -inst_30794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7f8000; valaddr_reg:x3; val_offset:92382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92382*FLEN/8, x4, x1, x2) - -inst_30795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7fc000; valaddr_reg:x3; val_offset:92385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92385*FLEN/8, x4, x1, x2) - -inst_30796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7fe000; valaddr_reg:x3; val_offset:92388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92388*FLEN/8, x4, x1, x2) - -inst_30797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7ff000; valaddr_reg:x3; val_offset:92391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92391*FLEN/8, x4, x1, x2) - -inst_30798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7ff800; valaddr_reg:x3; val_offset:92394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92394*FLEN/8, x4, x1, x2) - -inst_30799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7ffc00; valaddr_reg:x3; val_offset:92397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92397*FLEN/8, x4, x1, x2) - -inst_30800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7ffe00; valaddr_reg:x3; val_offset:92400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92400*FLEN/8, x4, x1, x2) - -inst_30801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7fff00; valaddr_reg:x3; val_offset:92403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92403*FLEN/8, x4, x1, x2) - -inst_30802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7fff80; valaddr_reg:x3; val_offset:92406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92406*FLEN/8, x4, x1, x2) - -inst_30803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7fffc0; valaddr_reg:x3; val_offset:92409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92409*FLEN/8, x4, x1, x2) - -inst_30804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7fffe0; valaddr_reg:x3; val_offset:92412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92412*FLEN/8, x4, x1, x2) - -inst_30805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7ffff0; valaddr_reg:x3; val_offset:92415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92415*FLEN/8, x4, x1, x2) - -inst_30806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7ffff8; valaddr_reg:x3; val_offset:92418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92418*FLEN/8, x4, x1, x2) - -inst_30807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7ffffc; valaddr_reg:x3; val_offset:92421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92421*FLEN/8, x4, x1, x2) - -inst_30808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7ffffe; valaddr_reg:x3; val_offset:92424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92424*FLEN/8, x4, x1, x2) - -inst_30809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf7fffff; valaddr_reg:x3; val_offset:92427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92427*FLEN/8, x4, x1, x2) - -inst_30810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf800001; valaddr_reg:x3; val_offset:92430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92430*FLEN/8, x4, x1, x2) - -inst_30811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf800003; valaddr_reg:x3; val_offset:92433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92433*FLEN/8, x4, x1, x2) - -inst_30812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf800007; valaddr_reg:x3; val_offset:92436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92436*FLEN/8, x4, x1, x2) - -inst_30813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbf999999; valaddr_reg:x3; val_offset:92439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92439*FLEN/8, x4, x1, x2) - -inst_30814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:92442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92442*FLEN/8, x4, x1, x2) - -inst_30815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:92445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92445*FLEN/8, x4, x1, x2) - -inst_30816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:92448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92448*FLEN/8, x4, x1, x2) - -inst_30817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:92451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92451*FLEN/8, x4, x1, x2) - -inst_30818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:92454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92454*FLEN/8, x4, x1, x2) - -inst_30819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:92457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92457*FLEN/8, x4, x1, x2) - -inst_30820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:92460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92460*FLEN/8, x4, x1, x2) - -inst_30821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:92463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92463*FLEN/8, x4, x1, x2) - -inst_30822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:92466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92466*FLEN/8, x4, x1, x2) - -inst_30823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:92469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92469*FLEN/8, x4, x1, x2) - -inst_30824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:92472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92472*FLEN/8, x4, x1, x2) - -inst_30825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:92475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92475*FLEN/8, x4, x1, x2) - -inst_30826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:92478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92478*FLEN/8, x4, x1, x2) - -inst_30827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:92481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92481*FLEN/8, x4, x1, x2) - -inst_30828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:92484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92484*FLEN/8, x4, x1, x2) - -inst_30829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:92487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92487*FLEN/8, x4, x1, x2) - -inst_30830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:92490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92490*FLEN/8, x4, x1, x2) - -inst_30831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:92493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92493*FLEN/8, x4, x1, x2) - -inst_30832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:92496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92496*FLEN/8, x4, x1, x2) - -inst_30833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:92499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92499*FLEN/8, x4, x1, x2) - -inst_30834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:92502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92502*FLEN/8, x4, x1, x2) - -inst_30835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:92505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92505*FLEN/8, x4, x1, x2) - -inst_30836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:92508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92508*FLEN/8, x4, x1, x2) - -inst_30837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:92511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92511*FLEN/8, x4, x1, x2) - -inst_30838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:92514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92514*FLEN/8, x4, x1, x2) - -inst_30839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:92517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92517*FLEN/8, x4, x1, x2) - -inst_30840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:92520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92520*FLEN/8, x4, x1, x2) - -inst_30841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:92523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92523*FLEN/8, x4, x1, x2) - -inst_30842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86000000; valaddr_reg:x3; val_offset:92526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92526*FLEN/8, x4, x1, x2) - -inst_30843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86000001; valaddr_reg:x3; val_offset:92529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92529*FLEN/8, x4, x1, x2) - -inst_30844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86000003; valaddr_reg:x3; val_offset:92532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92532*FLEN/8, x4, x1, x2) - -inst_30845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86000007; valaddr_reg:x3; val_offset:92535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92535*FLEN/8, x4, x1, x2) - -inst_30846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8600000f; valaddr_reg:x3; val_offset:92538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92538*FLEN/8, x4, x1, x2) - -inst_30847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8600001f; valaddr_reg:x3; val_offset:92541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92541*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_242) - -inst_30848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8600003f; valaddr_reg:x3; val_offset:92544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92544*FLEN/8, x4, x1, x2) - -inst_30849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8600007f; valaddr_reg:x3; val_offset:92547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92547*FLEN/8, x4, x1, x2) - -inst_30850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x860000ff; valaddr_reg:x3; val_offset:92550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92550*FLEN/8, x4, x1, x2) - -inst_30851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x860001ff; valaddr_reg:x3; val_offset:92553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92553*FLEN/8, x4, x1, x2) - -inst_30852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x860003ff; valaddr_reg:x3; val_offset:92556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92556*FLEN/8, x4, x1, x2) - -inst_30853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x860007ff; valaddr_reg:x3; val_offset:92559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92559*FLEN/8, x4, x1, x2) - -inst_30854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86000fff; valaddr_reg:x3; val_offset:92562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92562*FLEN/8, x4, x1, x2) - -inst_30855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86001fff; valaddr_reg:x3; val_offset:92565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92565*FLEN/8, x4, x1, x2) - -inst_30856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86003fff; valaddr_reg:x3; val_offset:92568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92568*FLEN/8, x4, x1, x2) - -inst_30857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86007fff; valaddr_reg:x3; val_offset:92571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92571*FLEN/8, x4, x1, x2) - -inst_30858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8600ffff; valaddr_reg:x3; val_offset:92574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92574*FLEN/8, x4, x1, x2) - -inst_30859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8601ffff; valaddr_reg:x3; val_offset:92577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92577*FLEN/8, x4, x1, x2) - -inst_30860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8603ffff; valaddr_reg:x3; val_offset:92580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92580*FLEN/8, x4, x1, x2) - -inst_30861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x8607ffff; valaddr_reg:x3; val_offset:92583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92583*FLEN/8, x4, x1, x2) - -inst_30862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x860fffff; valaddr_reg:x3; val_offset:92586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92586*FLEN/8, x4, x1, x2) - -inst_30863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x861fffff; valaddr_reg:x3; val_offset:92589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92589*FLEN/8, x4, x1, x2) - -inst_30864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x863fffff; valaddr_reg:x3; val_offset:92592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92592*FLEN/8, x4, x1, x2) - -inst_30865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86400000; valaddr_reg:x3; val_offset:92595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92595*FLEN/8, x4, x1, x2) - -inst_30866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86600000; valaddr_reg:x3; val_offset:92598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92598*FLEN/8, x4, x1, x2) - -inst_30867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86700000; valaddr_reg:x3; val_offset:92601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92601*FLEN/8, x4, x1, x2) - -inst_30868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x86780000; valaddr_reg:x3; val_offset:92604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92604*FLEN/8, x4, x1, x2) - -inst_30869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867c0000; valaddr_reg:x3; val_offset:92607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92607*FLEN/8, x4, x1, x2) - -inst_30870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867e0000; valaddr_reg:x3; val_offset:92610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92610*FLEN/8, x4, x1, x2) - -inst_30871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867f0000; valaddr_reg:x3; val_offset:92613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92613*FLEN/8, x4, x1, x2) - -inst_30872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867f8000; valaddr_reg:x3; val_offset:92616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92616*FLEN/8, x4, x1, x2) - -inst_30873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867fc000; valaddr_reg:x3; val_offset:92619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92619*FLEN/8, x4, x1, x2) - -inst_30874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867fe000; valaddr_reg:x3; val_offset:92622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92622*FLEN/8, x4, x1, x2) - -inst_30875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867ff000; valaddr_reg:x3; val_offset:92625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92625*FLEN/8, x4, x1, x2) - -inst_30876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867ff800; valaddr_reg:x3; val_offset:92628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92628*FLEN/8, x4, x1, x2) - -inst_30877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867ffc00; valaddr_reg:x3; val_offset:92631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92631*FLEN/8, x4, x1, x2) - -inst_30878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867ffe00; valaddr_reg:x3; val_offset:92634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92634*FLEN/8, x4, x1, x2) - -inst_30879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867fff00; valaddr_reg:x3; val_offset:92637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92637*FLEN/8, x4, x1, x2) - -inst_30880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867fff80; valaddr_reg:x3; val_offset:92640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92640*FLEN/8, x4, x1, x2) - -inst_30881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867fffc0; valaddr_reg:x3; val_offset:92643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92643*FLEN/8, x4, x1, x2) - -inst_30882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867fffe0; valaddr_reg:x3; val_offset:92646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92646*FLEN/8, x4, x1, x2) - -inst_30883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867ffff0; valaddr_reg:x3; val_offset:92649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92649*FLEN/8, x4, x1, x2) - -inst_30884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867ffff8; valaddr_reg:x3; val_offset:92652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92652*FLEN/8, x4, x1, x2) - -inst_30885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867ffffc; valaddr_reg:x3; val_offset:92655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92655*FLEN/8, x4, x1, x2) - -inst_30886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867ffffe; valaddr_reg:x3; val_offset:92658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92658*FLEN/8, x4, x1, x2) - -inst_30887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; -op3val:0x867fffff; valaddr_reg:x3; val_offset:92661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92661*FLEN/8, x4, x1, x2) - -inst_30888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:92664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92664*FLEN/8, x4, x1, x2) - -inst_30889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:92667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92667*FLEN/8, x4, x1, x2) - -inst_30890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:92670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92670*FLEN/8, x4, x1, x2) - -inst_30891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:92673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92673*FLEN/8, x4, x1, x2) - -inst_30892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:92676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92676*FLEN/8, x4, x1, x2) - -inst_30893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:92679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92679*FLEN/8, x4, x1, x2) - -inst_30894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:92682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92682*FLEN/8, x4, x1, x2) - -inst_30895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:92685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92685*FLEN/8, x4, x1, x2) - -inst_30896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:92688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92688*FLEN/8, x4, x1, x2) - -inst_30897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:92691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92691*FLEN/8, x4, x1, x2) - -inst_30898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:92694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92694*FLEN/8, x4, x1, x2) - -inst_30899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:92697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92697*FLEN/8, x4, x1, x2) - -inst_30900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:92700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92700*FLEN/8, x4, x1, x2) - -inst_30901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:92703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92703*FLEN/8, x4, x1, x2) - -inst_30902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:92706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92706*FLEN/8, x4, x1, x2) - -inst_30903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:92709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92709*FLEN/8, x4, x1, x2) - -inst_30904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa000000; valaddr_reg:x3; val_offset:92712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92712*FLEN/8, x4, x1, x2) - -inst_30905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa000001; valaddr_reg:x3; val_offset:92715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92715*FLEN/8, x4, x1, x2) - -inst_30906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa000003; valaddr_reg:x3; val_offset:92718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92718*FLEN/8, x4, x1, x2) - -inst_30907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa000007; valaddr_reg:x3; val_offset:92721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92721*FLEN/8, x4, x1, x2) - -inst_30908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa00000f; valaddr_reg:x3; val_offset:92724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92724*FLEN/8, x4, x1, x2) - -inst_30909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa00001f; valaddr_reg:x3; val_offset:92727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92727*FLEN/8, x4, x1, x2) - -inst_30910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa00003f; valaddr_reg:x3; val_offset:92730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92730*FLEN/8, x4, x1, x2) - -inst_30911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa00007f; valaddr_reg:x3; val_offset:92733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92733*FLEN/8, x4, x1, x2) - -inst_30912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa0000ff; valaddr_reg:x3; val_offset:92736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92736*FLEN/8, x4, x1, x2) - -inst_30913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa0001ff; valaddr_reg:x3; val_offset:92739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92739*FLEN/8, x4, x1, x2) - -inst_30914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa0003ff; valaddr_reg:x3; val_offset:92742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92742*FLEN/8, x4, x1, x2) - -inst_30915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa0007ff; valaddr_reg:x3; val_offset:92745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92745*FLEN/8, x4, x1, x2) - -inst_30916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa000fff; valaddr_reg:x3; val_offset:92748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92748*FLEN/8, x4, x1, x2) - -inst_30917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa001fff; valaddr_reg:x3; val_offset:92751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92751*FLEN/8, x4, x1, x2) - -inst_30918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa003fff; valaddr_reg:x3; val_offset:92754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92754*FLEN/8, x4, x1, x2) - -inst_30919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa007fff; valaddr_reg:x3; val_offset:92757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92757*FLEN/8, x4, x1, x2) - -inst_30920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa00ffff; valaddr_reg:x3; val_offset:92760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92760*FLEN/8, x4, x1, x2) - -inst_30921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa01ffff; valaddr_reg:x3; val_offset:92763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92763*FLEN/8, x4, x1, x2) - -inst_30922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa03ffff; valaddr_reg:x3; val_offset:92766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92766*FLEN/8, x4, x1, x2) - -inst_30923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa07ffff; valaddr_reg:x3; val_offset:92769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92769*FLEN/8, x4, x1, x2) - -inst_30924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa0fffff; valaddr_reg:x3; val_offset:92772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92772*FLEN/8, x4, x1, x2) - -inst_30925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa1fffff; valaddr_reg:x3; val_offset:92775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92775*FLEN/8, x4, x1, x2) - -inst_30926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa3fffff; valaddr_reg:x3; val_offset:92778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92778*FLEN/8, x4, x1, x2) - -inst_30927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa400000; valaddr_reg:x3; val_offset:92781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92781*FLEN/8, x4, x1, x2) - -inst_30928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa600000; valaddr_reg:x3; val_offset:92784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92784*FLEN/8, x4, x1, x2) - -inst_30929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa700000; valaddr_reg:x3; val_offset:92787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92787*FLEN/8, x4, x1, x2) - -inst_30930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa780000; valaddr_reg:x3; val_offset:92790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92790*FLEN/8, x4, x1, x2) - -inst_30931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7c0000; valaddr_reg:x3; val_offset:92793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92793*FLEN/8, x4, x1, x2) - -inst_30932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7e0000; valaddr_reg:x3; val_offset:92796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92796*FLEN/8, x4, x1, x2) - -inst_30933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7f0000; valaddr_reg:x3; val_offset:92799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92799*FLEN/8, x4, x1, x2) - -inst_30934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7f8000; valaddr_reg:x3; val_offset:92802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92802*FLEN/8, x4, x1, x2) - -inst_30935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7fc000; valaddr_reg:x3; val_offset:92805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92805*FLEN/8, x4, x1, x2) - -inst_30936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7fe000; valaddr_reg:x3; val_offset:92808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92808*FLEN/8, x4, x1, x2) - -inst_30937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7ff000; valaddr_reg:x3; val_offset:92811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92811*FLEN/8, x4, x1, x2) - -inst_30938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7ff800; valaddr_reg:x3; val_offset:92814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92814*FLEN/8, x4, x1, x2) - -inst_30939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7ffc00; valaddr_reg:x3; val_offset:92817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92817*FLEN/8, x4, x1, x2) - -inst_30940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7ffe00; valaddr_reg:x3; val_offset:92820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92820*FLEN/8, x4, x1, x2) - -inst_30941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7fff00; valaddr_reg:x3; val_offset:92823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92823*FLEN/8, x4, x1, x2) - -inst_30942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7fff80; valaddr_reg:x3; val_offset:92826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92826*FLEN/8, x4, x1, x2) - -inst_30943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7fffc0; valaddr_reg:x3; val_offset:92829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92829*FLEN/8, x4, x1, x2) - -inst_30944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7fffe0; valaddr_reg:x3; val_offset:92832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92832*FLEN/8, x4, x1, x2) - -inst_30945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7ffff0; valaddr_reg:x3; val_offset:92835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92835*FLEN/8, x4, x1, x2) - -inst_30946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7ffff8; valaddr_reg:x3; val_offset:92838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92838*FLEN/8, x4, x1, x2) - -inst_30947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7ffffc; valaddr_reg:x3; val_offset:92841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92841*FLEN/8, x4, x1, x2) - -inst_30948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7ffffe; valaddr_reg:x3; val_offset:92844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92844*FLEN/8, x4, x1, x2) - -inst_30949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; -op3val:0xa7fffff; valaddr_reg:x3; val_offset:92847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92847*FLEN/8, x4, x1, x2) - -inst_30950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80800000; valaddr_reg:x3; val_offset:92850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92850*FLEN/8, x4, x1, x2) - -inst_30951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:92853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92853*FLEN/8, x4, x1, x2) - -inst_30952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:92856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92856*FLEN/8, x4, x1, x2) - -inst_30953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:92859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92859*FLEN/8, x4, x1, x2) - -inst_30954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x8080000f; valaddr_reg:x3; val_offset:92862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92862*FLEN/8, x4, x1, x2) - -inst_30955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x8080001f; valaddr_reg:x3; val_offset:92865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92865*FLEN/8, x4, x1, x2) - -inst_30956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x8080003f; valaddr_reg:x3; val_offset:92868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92868*FLEN/8, x4, x1, x2) - -inst_30957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x8080007f; valaddr_reg:x3; val_offset:92871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92871*FLEN/8, x4, x1, x2) - -inst_30958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x808000ff; valaddr_reg:x3; val_offset:92874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92874*FLEN/8, x4, x1, x2) - -inst_30959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x808001ff; valaddr_reg:x3; val_offset:92877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92877*FLEN/8, x4, x1, x2) - -inst_30960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x808003ff; valaddr_reg:x3; val_offset:92880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92880*FLEN/8, x4, x1, x2) - -inst_30961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x808007ff; valaddr_reg:x3; val_offset:92883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92883*FLEN/8, x4, x1, x2) - -inst_30962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80800fff; valaddr_reg:x3; val_offset:92886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92886*FLEN/8, x4, x1, x2) - -inst_30963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80801fff; valaddr_reg:x3; val_offset:92889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92889*FLEN/8, x4, x1, x2) - -inst_30964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80803fff; valaddr_reg:x3; val_offset:92892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92892*FLEN/8, x4, x1, x2) - -inst_30965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80807fff; valaddr_reg:x3; val_offset:92895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92895*FLEN/8, x4, x1, x2) - -inst_30966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x8080ffff; valaddr_reg:x3; val_offset:92898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92898*FLEN/8, x4, x1, x2) - -inst_30967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x8081ffff; valaddr_reg:x3; val_offset:92901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92901*FLEN/8, x4, x1, x2) - -inst_30968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x8083ffff; valaddr_reg:x3; val_offset:92904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92904*FLEN/8, x4, x1, x2) - -inst_30969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x8087ffff; valaddr_reg:x3; val_offset:92907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92907*FLEN/8, x4, x1, x2) - -inst_30970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x808fffff; valaddr_reg:x3; val_offset:92910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92910*FLEN/8, x4, x1, x2) - -inst_30971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:92913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92913*FLEN/8, x4, x1, x2) - -inst_30972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x809fffff; valaddr_reg:x3; val_offset:92916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92916*FLEN/8, x4, x1, x2) - -inst_30973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:92919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92919*FLEN/8, x4, x1, x2) - -inst_30974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:92922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92922*FLEN/8, x4, x1, x2) - -inst_30975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:92925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92925*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_243) - -inst_30976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:92928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92928*FLEN/8, x4, x1, x2) - -inst_30977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80bfffff; valaddr_reg:x3; val_offset:92931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92931*FLEN/8, x4, x1, x2) - -inst_30978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80c00000; valaddr_reg:x3; val_offset:92934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92934*FLEN/8, x4, x1, x2) - -inst_30979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:92937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92937*FLEN/8, x4, x1, x2) - -inst_30980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:92940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92940*FLEN/8, x4, x1, x2) - -inst_30981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:92943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92943*FLEN/8, x4, x1, x2) - -inst_30982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80e00000; valaddr_reg:x3; val_offset:92946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92946*FLEN/8, x4, x1, x2) - -inst_30983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:92949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92949*FLEN/8, x4, x1, x2) - -inst_30984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:92952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92952*FLEN/8, x4, x1, x2) - -inst_30985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80f00000; valaddr_reg:x3; val_offset:92955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92955*FLEN/8, x4, x1, x2) - -inst_30986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80f80000; valaddr_reg:x3; val_offset:92958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92958*FLEN/8, x4, x1, x2) - -inst_30987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fc0000; valaddr_reg:x3; val_offset:92961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92961*FLEN/8, x4, x1, x2) - -inst_30988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fe0000; valaddr_reg:x3; val_offset:92964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92964*FLEN/8, x4, x1, x2) - -inst_30989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ff0000; valaddr_reg:x3; val_offset:92967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92967*FLEN/8, x4, x1, x2) - -inst_30990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ff8000; valaddr_reg:x3; val_offset:92970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92970*FLEN/8, x4, x1, x2) - -inst_30991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ffc000; valaddr_reg:x3; val_offset:92973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92973*FLEN/8, x4, x1, x2) - -inst_30992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ffe000; valaddr_reg:x3; val_offset:92976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92976*FLEN/8, x4, x1, x2) - -inst_30993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fff000; valaddr_reg:x3; val_offset:92979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92979*FLEN/8, x4, x1, x2) - -inst_30994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fff800; valaddr_reg:x3; val_offset:92982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92982*FLEN/8, x4, x1, x2) - -inst_30995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fffc00; valaddr_reg:x3; val_offset:92985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92985*FLEN/8, x4, x1, x2) - -inst_30996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fffe00; valaddr_reg:x3; val_offset:92988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92988*FLEN/8, x4, x1, x2) - -inst_30997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ffff00; valaddr_reg:x3; val_offset:92991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92991*FLEN/8, x4, x1, x2) - -inst_30998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ffff80; valaddr_reg:x3; val_offset:92994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92994*FLEN/8, x4, x1, x2) - -inst_30999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ffffc0; valaddr_reg:x3; val_offset:92997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92997*FLEN/8, x4, x1, x2) - -inst_31000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ffffe0; valaddr_reg:x3; val_offset:93000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93000*FLEN/8, x4, x1, x2) - -inst_31001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fffff0; valaddr_reg:x3; val_offset:93003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93003*FLEN/8, x4, x1, x2) - -inst_31002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:93006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93006*FLEN/8, x4, x1, x2) - -inst_31003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:93009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93009*FLEN/8, x4, x1, x2) - -inst_31004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:93012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93012*FLEN/8, x4, x1, x2) - -inst_31005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; -op3val:0x80ffffff; valaddr_reg:x3; val_offset:93015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93015*FLEN/8, x4, x1, x2) - -inst_31006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:93018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93018*FLEN/8, x4, x1, x2) - -inst_31007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:93021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93021*FLEN/8, x4, x1, x2) - -inst_31008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:93024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93024*FLEN/8, x4, x1, x2) - -inst_31009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:93027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93027*FLEN/8, x4, x1, x2) - -inst_31010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:93030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93030*FLEN/8, x4, x1, x2) - -inst_31011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:93033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93033*FLEN/8, x4, x1, x2) - -inst_31012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:93036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93036*FLEN/8, x4, x1, x2) - -inst_31013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:93039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93039*FLEN/8, x4, x1, x2) - -inst_31014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:93042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93042*FLEN/8, x4, x1, x2) - -inst_31015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:93045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93045*FLEN/8, x4, x1, x2) - -inst_31016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:93048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93048*FLEN/8, x4, x1, x2) - -inst_31017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:93051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93051*FLEN/8, x4, x1, x2) - -inst_31018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:93054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93054*FLEN/8, x4, x1, x2) - -inst_31019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:93057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93057*FLEN/8, x4, x1, x2) - -inst_31020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:93060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93060*FLEN/8, x4, x1, x2) - -inst_31021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:93063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93063*FLEN/8, x4, x1, x2) - -inst_31022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b000000; valaddr_reg:x3; val_offset:93066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93066*FLEN/8, x4, x1, x2) - -inst_31023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b000001; valaddr_reg:x3; val_offset:93069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93069*FLEN/8, x4, x1, x2) - -inst_31024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b000003; valaddr_reg:x3; val_offset:93072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93072*FLEN/8, x4, x1, x2) - -inst_31025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b000007; valaddr_reg:x3; val_offset:93075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93075*FLEN/8, x4, x1, x2) - -inst_31026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b00000f; valaddr_reg:x3; val_offset:93078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93078*FLEN/8, x4, x1, x2) - -inst_31027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b00001f; valaddr_reg:x3; val_offset:93081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93081*FLEN/8, x4, x1, x2) - -inst_31028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b00003f; valaddr_reg:x3; val_offset:93084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93084*FLEN/8, x4, x1, x2) - -inst_31029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b00007f; valaddr_reg:x3; val_offset:93087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93087*FLEN/8, x4, x1, x2) - -inst_31030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b0000ff; valaddr_reg:x3; val_offset:93090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93090*FLEN/8, x4, x1, x2) - -inst_31031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b0001ff; valaddr_reg:x3; val_offset:93093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93093*FLEN/8, x4, x1, x2) - -inst_31032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b0003ff; valaddr_reg:x3; val_offset:93096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93096*FLEN/8, x4, x1, x2) - -inst_31033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b0007ff; valaddr_reg:x3; val_offset:93099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93099*FLEN/8, x4, x1, x2) - -inst_31034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b000fff; valaddr_reg:x3; val_offset:93102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93102*FLEN/8, x4, x1, x2) - -inst_31035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b001fff; valaddr_reg:x3; val_offset:93105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93105*FLEN/8, x4, x1, x2) - -inst_31036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b003fff; valaddr_reg:x3; val_offset:93108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93108*FLEN/8, x4, x1, x2) - -inst_31037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b007fff; valaddr_reg:x3; val_offset:93111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93111*FLEN/8, x4, x1, x2) - -inst_31038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b00ffff; valaddr_reg:x3; val_offset:93114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93114*FLEN/8, x4, x1, x2) - -inst_31039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b01ffff; valaddr_reg:x3; val_offset:93117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93117*FLEN/8, x4, x1, x2) - -inst_31040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b03ffff; valaddr_reg:x3; val_offset:93120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93120*FLEN/8, x4, x1, x2) - -inst_31041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b07ffff; valaddr_reg:x3; val_offset:93123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93123*FLEN/8, x4, x1, x2) - -inst_31042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b0fffff; valaddr_reg:x3; val_offset:93126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93126*FLEN/8, x4, x1, x2) - -inst_31043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b1fffff; valaddr_reg:x3; val_offset:93129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93129*FLEN/8, x4, x1, x2) - -inst_31044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b3fffff; valaddr_reg:x3; val_offset:93132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93132*FLEN/8, x4, x1, x2) - -inst_31045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b400000; valaddr_reg:x3; val_offset:93135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93135*FLEN/8, x4, x1, x2) - -inst_31046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b600000; valaddr_reg:x3; val_offset:93138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93138*FLEN/8, x4, x1, x2) - -inst_31047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b700000; valaddr_reg:x3; val_offset:93141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93141*FLEN/8, x4, x1, x2) - -inst_31048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b780000; valaddr_reg:x3; val_offset:93144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93144*FLEN/8, x4, x1, x2) - -inst_31049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7c0000; valaddr_reg:x3; val_offset:93147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93147*FLEN/8, x4, x1, x2) - -inst_31050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7e0000; valaddr_reg:x3; val_offset:93150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93150*FLEN/8, x4, x1, x2) - -inst_31051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7f0000; valaddr_reg:x3; val_offset:93153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93153*FLEN/8, x4, x1, x2) - -inst_31052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7f8000; valaddr_reg:x3; val_offset:93156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93156*FLEN/8, x4, x1, x2) - -inst_31053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7fc000; valaddr_reg:x3; val_offset:93159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93159*FLEN/8, x4, x1, x2) - -inst_31054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7fe000; valaddr_reg:x3; val_offset:93162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93162*FLEN/8, x4, x1, x2) - -inst_31055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7ff000; valaddr_reg:x3; val_offset:93165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93165*FLEN/8, x4, x1, x2) - -inst_31056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7ff800; valaddr_reg:x3; val_offset:93168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93168*FLEN/8, x4, x1, x2) - -inst_31057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:93171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93171*FLEN/8, x4, x1, x2) - -inst_31058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:93174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93174*FLEN/8, x4, x1, x2) - -inst_31059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7fff00; valaddr_reg:x3; val_offset:93177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93177*FLEN/8, x4, x1, x2) - -inst_31060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7fff80; valaddr_reg:x3; val_offset:93180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93180*FLEN/8, x4, x1, x2) - -inst_31061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:93183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93183*FLEN/8, x4, x1, x2) - -inst_31062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:93186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93186*FLEN/8, x4, x1, x2) - -inst_31063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:93189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93189*FLEN/8, x4, x1, x2) - -inst_31064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:93192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93192*FLEN/8, x4, x1, x2) - -inst_31065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:93195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93195*FLEN/8, x4, x1, x2) - -inst_31066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:93198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93198*FLEN/8, x4, x1, x2) - -inst_31067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; -op3val:0x8b7fffff; valaddr_reg:x3; val_offset:93201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93201*FLEN/8, x4, x1, x2) - -inst_31068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32000000; valaddr_reg:x3; val_offset:93204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93204*FLEN/8, x4, x1, x2) - -inst_31069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32000001; valaddr_reg:x3; val_offset:93207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93207*FLEN/8, x4, x1, x2) - -inst_31070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32000003; valaddr_reg:x3; val_offset:93210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93210*FLEN/8, x4, x1, x2) - -inst_31071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32000007; valaddr_reg:x3; val_offset:93213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93213*FLEN/8, x4, x1, x2) - -inst_31072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3200000f; valaddr_reg:x3; val_offset:93216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93216*FLEN/8, x4, x1, x2) - -inst_31073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3200001f; valaddr_reg:x3; val_offset:93219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93219*FLEN/8, x4, x1, x2) - -inst_31074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3200003f; valaddr_reg:x3; val_offset:93222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93222*FLEN/8, x4, x1, x2) - -inst_31075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3200007f; valaddr_reg:x3; val_offset:93225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93225*FLEN/8, x4, x1, x2) - -inst_31076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x320000ff; valaddr_reg:x3; val_offset:93228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93228*FLEN/8, x4, x1, x2) - -inst_31077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x320001ff; valaddr_reg:x3; val_offset:93231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93231*FLEN/8, x4, x1, x2) - -inst_31078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x320003ff; valaddr_reg:x3; val_offset:93234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93234*FLEN/8, x4, x1, x2) - -inst_31079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x320007ff; valaddr_reg:x3; val_offset:93237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93237*FLEN/8, x4, x1, x2) - -inst_31080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32000fff; valaddr_reg:x3; val_offset:93240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93240*FLEN/8, x4, x1, x2) - -inst_31081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32001fff; valaddr_reg:x3; val_offset:93243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93243*FLEN/8, x4, x1, x2) - -inst_31082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32003fff; valaddr_reg:x3; val_offset:93246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93246*FLEN/8, x4, x1, x2) - -inst_31083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32007fff; valaddr_reg:x3; val_offset:93249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93249*FLEN/8, x4, x1, x2) - -inst_31084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3200ffff; valaddr_reg:x3; val_offset:93252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93252*FLEN/8, x4, x1, x2) - -inst_31085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3201ffff; valaddr_reg:x3; val_offset:93255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93255*FLEN/8, x4, x1, x2) - -inst_31086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3203ffff; valaddr_reg:x3; val_offset:93258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93258*FLEN/8, x4, x1, x2) - -inst_31087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3207ffff; valaddr_reg:x3; val_offset:93261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93261*FLEN/8, x4, x1, x2) - -inst_31088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x320fffff; valaddr_reg:x3; val_offset:93264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93264*FLEN/8, x4, x1, x2) - -inst_31089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x321fffff; valaddr_reg:x3; val_offset:93267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93267*FLEN/8, x4, x1, x2) - -inst_31090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x323fffff; valaddr_reg:x3; val_offset:93270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93270*FLEN/8, x4, x1, x2) - -inst_31091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32400000; valaddr_reg:x3; val_offset:93273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93273*FLEN/8, x4, x1, x2) - -inst_31092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32600000; valaddr_reg:x3; val_offset:93276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93276*FLEN/8, x4, x1, x2) - -inst_31093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32700000; valaddr_reg:x3; val_offset:93279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93279*FLEN/8, x4, x1, x2) - -inst_31094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x32780000; valaddr_reg:x3; val_offset:93282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93282*FLEN/8, x4, x1, x2) - -inst_31095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327c0000; valaddr_reg:x3; val_offset:93285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93285*FLEN/8, x4, x1, x2) - -inst_31096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327e0000; valaddr_reg:x3; val_offset:93288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93288*FLEN/8, x4, x1, x2) - -inst_31097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327f0000; valaddr_reg:x3; val_offset:93291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93291*FLEN/8, x4, x1, x2) - -inst_31098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327f8000; valaddr_reg:x3; val_offset:93294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93294*FLEN/8, x4, x1, x2) - -inst_31099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327fc000; valaddr_reg:x3; val_offset:93297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93297*FLEN/8, x4, x1, x2) - -inst_31100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327fe000; valaddr_reg:x3; val_offset:93300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93300*FLEN/8, x4, x1, x2) - -inst_31101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327ff000; valaddr_reg:x3; val_offset:93303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93303*FLEN/8, x4, x1, x2) - -inst_31102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327ff800; valaddr_reg:x3; val_offset:93306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93306*FLEN/8, x4, x1, x2) - -inst_31103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327ffc00; valaddr_reg:x3; val_offset:93309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93309*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_244) - -inst_31104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327ffe00; valaddr_reg:x3; val_offset:93312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93312*FLEN/8, x4, x1, x2) - -inst_31105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327fff00; valaddr_reg:x3; val_offset:93315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93315*FLEN/8, x4, x1, x2) - -inst_31106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327fff80; valaddr_reg:x3; val_offset:93318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93318*FLEN/8, x4, x1, x2) - -inst_31107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327fffc0; valaddr_reg:x3; val_offset:93321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93321*FLEN/8, x4, x1, x2) - -inst_31108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327fffe0; valaddr_reg:x3; val_offset:93324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93324*FLEN/8, x4, x1, x2) - -inst_31109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327ffff0; valaddr_reg:x3; val_offset:93327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93327*FLEN/8, x4, x1, x2) - -inst_31110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327ffff8; valaddr_reg:x3; val_offset:93330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93330*FLEN/8, x4, x1, x2) - -inst_31111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327ffffc; valaddr_reg:x3; val_offset:93333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93333*FLEN/8, x4, x1, x2) - -inst_31112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327ffffe; valaddr_reg:x3; val_offset:93336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93336*FLEN/8, x4, x1, x2) - -inst_31113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x327fffff; valaddr_reg:x3; val_offset:93339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93339*FLEN/8, x4, x1, x2) - -inst_31114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3f800001; valaddr_reg:x3; val_offset:93342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93342*FLEN/8, x4, x1, x2) - -inst_31115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3f800003; valaddr_reg:x3; val_offset:93345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93345*FLEN/8, x4, x1, x2) - -inst_31116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3f800007; valaddr_reg:x3; val_offset:93348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93348*FLEN/8, x4, x1, x2) - -inst_31117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3f999999; valaddr_reg:x3; val_offset:93351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93351*FLEN/8, x4, x1, x2) - -inst_31118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:93354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93354*FLEN/8, x4, x1, x2) - -inst_31119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:93357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93357*FLEN/8, x4, x1, x2) - -inst_31120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:93360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93360*FLEN/8, x4, x1, x2) - -inst_31121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:93363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93363*FLEN/8, x4, x1, x2) - -inst_31122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:93366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93366*FLEN/8, x4, x1, x2) - -inst_31123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:93369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93369*FLEN/8, x4, x1, x2) - -inst_31124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:93372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93372*FLEN/8, x4, x1, x2) - -inst_31125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:93375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93375*FLEN/8, x4, x1, x2) - -inst_31126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:93378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93378*FLEN/8, x4, x1, x2) - -inst_31127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:93381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93381*FLEN/8, x4, x1, x2) - -inst_31128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:93384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93384*FLEN/8, x4, x1, x2) - -inst_31129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:93387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93387*FLEN/8, x4, x1, x2) - -inst_31130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbf800001; valaddr_reg:x3; val_offset:93390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93390*FLEN/8, x4, x1, x2) - -inst_31131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbf800003; valaddr_reg:x3; val_offset:93393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93393*FLEN/8, x4, x1, x2) - -inst_31132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbf800007; valaddr_reg:x3; val_offset:93396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93396*FLEN/8, x4, x1, x2) - -inst_31133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbf999999; valaddr_reg:x3; val_offset:93399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93399*FLEN/8, x4, x1, x2) - -inst_31134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:93402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93402*FLEN/8, x4, x1, x2) - -inst_31135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:93405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93405*FLEN/8, x4, x1, x2) - -inst_31136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:93408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93408*FLEN/8, x4, x1, x2) - -inst_31137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:93411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93411*FLEN/8, x4, x1, x2) - -inst_31138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:93414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93414*FLEN/8, x4, x1, x2) - -inst_31139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:93417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93417*FLEN/8, x4, x1, x2) - -inst_31140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:93420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93420*FLEN/8, x4, x1, x2) - -inst_31141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:93423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93423*FLEN/8, x4, x1, x2) - -inst_31142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:93426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93426*FLEN/8, x4, x1, x2) - -inst_31143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:93429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93429*FLEN/8, x4, x1, x2) - -inst_31144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:93432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93432*FLEN/8, x4, x1, x2) - -inst_31145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:93435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93435*FLEN/8, x4, x1, x2) - -inst_31146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1000000; valaddr_reg:x3; val_offset:93438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93438*FLEN/8, x4, x1, x2) - -inst_31147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1000001; valaddr_reg:x3; val_offset:93441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93441*FLEN/8, x4, x1, x2) - -inst_31148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1000003; valaddr_reg:x3; val_offset:93444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93444*FLEN/8, x4, x1, x2) - -inst_31149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1000007; valaddr_reg:x3; val_offset:93447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93447*FLEN/8, x4, x1, x2) - -inst_31150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc100000f; valaddr_reg:x3; val_offset:93450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93450*FLEN/8, x4, x1, x2) - -inst_31151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc100001f; valaddr_reg:x3; val_offset:93453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93453*FLEN/8, x4, x1, x2) - -inst_31152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc100003f; valaddr_reg:x3; val_offset:93456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93456*FLEN/8, x4, x1, x2) - -inst_31153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc100007f; valaddr_reg:x3; val_offset:93459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93459*FLEN/8, x4, x1, x2) - -inst_31154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc10000ff; valaddr_reg:x3; val_offset:93462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93462*FLEN/8, x4, x1, x2) - -inst_31155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc10001ff; valaddr_reg:x3; val_offset:93465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93465*FLEN/8, x4, x1, x2) - -inst_31156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc10003ff; valaddr_reg:x3; val_offset:93468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93468*FLEN/8, x4, x1, x2) - -inst_31157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc10007ff; valaddr_reg:x3; val_offset:93471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93471*FLEN/8, x4, x1, x2) - -inst_31158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1000fff; valaddr_reg:x3; val_offset:93474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93474*FLEN/8, x4, x1, x2) - -inst_31159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1001fff; valaddr_reg:x3; val_offset:93477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93477*FLEN/8, x4, x1, x2) - -inst_31160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1003fff; valaddr_reg:x3; val_offset:93480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93480*FLEN/8, x4, x1, x2) - -inst_31161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1007fff; valaddr_reg:x3; val_offset:93483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93483*FLEN/8, x4, x1, x2) - -inst_31162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc100ffff; valaddr_reg:x3; val_offset:93486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93486*FLEN/8, x4, x1, x2) - -inst_31163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc101ffff; valaddr_reg:x3; val_offset:93489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93489*FLEN/8, x4, x1, x2) - -inst_31164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc103ffff; valaddr_reg:x3; val_offset:93492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93492*FLEN/8, x4, x1, x2) - -inst_31165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc107ffff; valaddr_reg:x3; val_offset:93495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93495*FLEN/8, x4, x1, x2) - -inst_31166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc10fffff; valaddr_reg:x3; val_offset:93498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93498*FLEN/8, x4, x1, x2) - -inst_31167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc11fffff; valaddr_reg:x3; val_offset:93501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93501*FLEN/8, x4, x1, x2) - -inst_31168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc13fffff; valaddr_reg:x3; val_offset:93504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93504*FLEN/8, x4, x1, x2) - -inst_31169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1400000; valaddr_reg:x3; val_offset:93507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93507*FLEN/8, x4, x1, x2) - -inst_31170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1600000; valaddr_reg:x3; val_offset:93510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93510*FLEN/8, x4, x1, x2) - -inst_31171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1700000; valaddr_reg:x3; val_offset:93513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93513*FLEN/8, x4, x1, x2) - -inst_31172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc1780000; valaddr_reg:x3; val_offset:93516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93516*FLEN/8, x4, x1, x2) - -inst_31173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17c0000; valaddr_reg:x3; val_offset:93519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93519*FLEN/8, x4, x1, x2) - -inst_31174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17e0000; valaddr_reg:x3; val_offset:93522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93522*FLEN/8, x4, x1, x2) - -inst_31175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17f0000; valaddr_reg:x3; val_offset:93525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93525*FLEN/8, x4, x1, x2) - -inst_31176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17f8000; valaddr_reg:x3; val_offset:93528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93528*FLEN/8, x4, x1, x2) - -inst_31177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17fc000; valaddr_reg:x3; val_offset:93531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93531*FLEN/8, x4, x1, x2) - -inst_31178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17fe000; valaddr_reg:x3; val_offset:93534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93534*FLEN/8, x4, x1, x2) - -inst_31179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17ff000; valaddr_reg:x3; val_offset:93537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93537*FLEN/8, x4, x1, x2) - -inst_31180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17ff800; valaddr_reg:x3; val_offset:93540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93540*FLEN/8, x4, x1, x2) - -inst_31181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17ffc00; valaddr_reg:x3; val_offset:93543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93543*FLEN/8, x4, x1, x2) - -inst_31182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17ffe00; valaddr_reg:x3; val_offset:93546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93546*FLEN/8, x4, x1, x2) - -inst_31183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17fff00; valaddr_reg:x3; val_offset:93549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93549*FLEN/8, x4, x1, x2) - -inst_31184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17fff80; valaddr_reg:x3; val_offset:93552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93552*FLEN/8, x4, x1, x2) - -inst_31185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17fffc0; valaddr_reg:x3; val_offset:93555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93555*FLEN/8, x4, x1, x2) - -inst_31186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17fffe0; valaddr_reg:x3; val_offset:93558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93558*FLEN/8, x4, x1, x2) - -inst_31187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17ffff0; valaddr_reg:x3; val_offset:93561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93561*FLEN/8, x4, x1, x2) - -inst_31188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17ffff8; valaddr_reg:x3; val_offset:93564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93564*FLEN/8, x4, x1, x2) - -inst_31189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17ffffc; valaddr_reg:x3; val_offset:93567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93567*FLEN/8, x4, x1, x2) - -inst_31190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17ffffe; valaddr_reg:x3; val_offset:93570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93570*FLEN/8, x4, x1, x2) - -inst_31191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; -op3val:0xc17fffff; valaddr_reg:x3; val_offset:93573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93573*FLEN/8, x4, x1, x2) - -inst_31192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:93576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93576*FLEN/8, x4, x1, x2) - -inst_31193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:93579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93579*FLEN/8, x4, x1, x2) - -inst_31194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:93582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93582*FLEN/8, x4, x1, x2) - -inst_31195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:93585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93585*FLEN/8, x4, x1, x2) - -inst_31196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:93588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93588*FLEN/8, x4, x1, x2) - -inst_31197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:93591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93591*FLEN/8, x4, x1, x2) - -inst_31198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:93594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93594*FLEN/8, x4, x1, x2) - -inst_31199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:93597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93597*FLEN/8, x4, x1, x2) - -inst_31200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:93600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93600*FLEN/8, x4, x1, x2) - -inst_31201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:93603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93603*FLEN/8, x4, x1, x2) - -inst_31202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:93606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93606*FLEN/8, x4, x1, x2) - -inst_31203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:93609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93609*FLEN/8, x4, x1, x2) - -inst_31204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:93612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93612*FLEN/8, x4, x1, x2) - -inst_31205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:93615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93615*FLEN/8, x4, x1, x2) - -inst_31206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:93618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93618*FLEN/8, x4, x1, x2) - -inst_31207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:93621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93621*FLEN/8, x4, x1, x2) - -inst_31208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6000000; valaddr_reg:x3; val_offset:93624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93624*FLEN/8, x4, x1, x2) - -inst_31209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6000001; valaddr_reg:x3; val_offset:93627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93627*FLEN/8, x4, x1, x2) - -inst_31210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6000003; valaddr_reg:x3; val_offset:93630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93630*FLEN/8, x4, x1, x2) - -inst_31211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6000007; valaddr_reg:x3; val_offset:93633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93633*FLEN/8, x4, x1, x2) - -inst_31212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x600000f; valaddr_reg:x3; val_offset:93636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93636*FLEN/8, x4, x1, x2) - -inst_31213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x600001f; valaddr_reg:x3; val_offset:93639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93639*FLEN/8, x4, x1, x2) - -inst_31214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x600003f; valaddr_reg:x3; val_offset:93642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93642*FLEN/8, x4, x1, x2) - -inst_31215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x600007f; valaddr_reg:x3; val_offset:93645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93645*FLEN/8, x4, x1, x2) - -inst_31216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x60000ff; valaddr_reg:x3; val_offset:93648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93648*FLEN/8, x4, x1, x2) - -inst_31217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x60001ff; valaddr_reg:x3; val_offset:93651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93651*FLEN/8, x4, x1, x2) - -inst_31218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x60003ff; valaddr_reg:x3; val_offset:93654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93654*FLEN/8, x4, x1, x2) - -inst_31219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x60007ff; valaddr_reg:x3; val_offset:93657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93657*FLEN/8, x4, x1, x2) - -inst_31220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6000fff; valaddr_reg:x3; val_offset:93660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93660*FLEN/8, x4, x1, x2) - -inst_31221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6001fff; valaddr_reg:x3; val_offset:93663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93663*FLEN/8, x4, x1, x2) - -inst_31222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6003fff; valaddr_reg:x3; val_offset:93666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93666*FLEN/8, x4, x1, x2) - -inst_31223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6007fff; valaddr_reg:x3; val_offset:93669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93669*FLEN/8, x4, x1, x2) - -inst_31224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x600ffff; valaddr_reg:x3; val_offset:93672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93672*FLEN/8, x4, x1, x2) - -inst_31225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x601ffff; valaddr_reg:x3; val_offset:93675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93675*FLEN/8, x4, x1, x2) - -inst_31226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x603ffff; valaddr_reg:x3; val_offset:93678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93678*FLEN/8, x4, x1, x2) - -inst_31227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x607ffff; valaddr_reg:x3; val_offset:93681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93681*FLEN/8, x4, x1, x2) - -inst_31228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x60fffff; valaddr_reg:x3; val_offset:93684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93684*FLEN/8, x4, x1, x2) - -inst_31229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x61fffff; valaddr_reg:x3; val_offset:93687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93687*FLEN/8, x4, x1, x2) - -inst_31230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x63fffff; valaddr_reg:x3; val_offset:93690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93690*FLEN/8, x4, x1, x2) - -inst_31231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6400000; valaddr_reg:x3; val_offset:93693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93693*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_245) - -inst_31232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6600000; valaddr_reg:x3; val_offset:93696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93696*FLEN/8, x4, x1, x2) - -inst_31233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6700000; valaddr_reg:x3; val_offset:93699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93699*FLEN/8, x4, x1, x2) - -inst_31234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x6780000; valaddr_reg:x3; val_offset:93702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93702*FLEN/8, x4, x1, x2) - -inst_31235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67c0000; valaddr_reg:x3; val_offset:93705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93705*FLEN/8, x4, x1, x2) - -inst_31236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67e0000; valaddr_reg:x3; val_offset:93708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93708*FLEN/8, x4, x1, x2) - -inst_31237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67f0000; valaddr_reg:x3; val_offset:93711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93711*FLEN/8, x4, x1, x2) - -inst_31238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67f8000; valaddr_reg:x3; val_offset:93714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93714*FLEN/8, x4, x1, x2) - -inst_31239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67fc000; valaddr_reg:x3; val_offset:93717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93717*FLEN/8, x4, x1, x2) - -inst_31240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67fe000; valaddr_reg:x3; val_offset:93720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93720*FLEN/8, x4, x1, x2) - -inst_31241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67ff000; valaddr_reg:x3; val_offset:93723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93723*FLEN/8, x4, x1, x2) - -inst_31242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67ff800; valaddr_reg:x3; val_offset:93726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93726*FLEN/8, x4, x1, x2) - -inst_31243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67ffc00; valaddr_reg:x3; val_offset:93729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93729*FLEN/8, x4, x1, x2) - -inst_31244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67ffe00; valaddr_reg:x3; val_offset:93732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93732*FLEN/8, x4, x1, x2) - -inst_31245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67fff00; valaddr_reg:x3; val_offset:93735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93735*FLEN/8, x4, x1, x2) - -inst_31246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67fff80; valaddr_reg:x3; val_offset:93738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93738*FLEN/8, x4, x1, x2) - -inst_31247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67fffc0; valaddr_reg:x3; val_offset:93741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93741*FLEN/8, x4, x1, x2) - -inst_31248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67fffe0; valaddr_reg:x3; val_offset:93744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93744*FLEN/8, x4, x1, x2) - -inst_31249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67ffff0; valaddr_reg:x3; val_offset:93747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93747*FLEN/8, x4, x1, x2) - -inst_31250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67ffff8; valaddr_reg:x3; val_offset:93750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93750*FLEN/8, x4, x1, x2) - -inst_31251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67ffffc; valaddr_reg:x3; val_offset:93753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93753*FLEN/8, x4, x1, x2) - -inst_31252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67ffffe; valaddr_reg:x3; val_offset:93756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93756*FLEN/8, x4, x1, x2) - -inst_31253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; -op3val:0x67fffff; valaddr_reg:x3; val_offset:93759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93759*FLEN/8, x4, x1, x2) - -inst_31254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:93762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93762*FLEN/8, x4, x1, x2) - -inst_31255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:93765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93765*FLEN/8, x4, x1, x2) - -inst_31256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:93768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93768*FLEN/8, x4, x1, x2) - -inst_31257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:93771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93771*FLEN/8, x4, x1, x2) - -inst_31258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:93774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93774*FLEN/8, x4, x1, x2) - -inst_31259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:93777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93777*FLEN/8, x4, x1, x2) - -inst_31260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:93780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93780*FLEN/8, x4, x1, x2) - -inst_31261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:93783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93783*FLEN/8, x4, x1, x2) - -inst_31262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:93786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93786*FLEN/8, x4, x1, x2) - -inst_31263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:93789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93789*FLEN/8, x4, x1, x2) - -inst_31264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:93792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93792*FLEN/8, x4, x1, x2) - -inst_31265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:93795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93795*FLEN/8, x4, x1, x2) - -inst_31266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:93798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93798*FLEN/8, x4, x1, x2) - -inst_31267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:93801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93801*FLEN/8, x4, x1, x2) - -inst_31268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:93804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93804*FLEN/8, x4, x1, x2) - -inst_31269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:93807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93807*FLEN/8, x4, x1, x2) - -inst_31270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a000000; valaddr_reg:x3; val_offset:93810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93810*FLEN/8, x4, x1, x2) - -inst_31271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a000001; valaddr_reg:x3; val_offset:93813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93813*FLEN/8, x4, x1, x2) - -inst_31272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a000003; valaddr_reg:x3; val_offset:93816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93816*FLEN/8, x4, x1, x2) - -inst_31273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a000007; valaddr_reg:x3; val_offset:93819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93819*FLEN/8, x4, x1, x2) - -inst_31274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a00000f; valaddr_reg:x3; val_offset:93822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93822*FLEN/8, x4, x1, x2) - -inst_31275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a00001f; valaddr_reg:x3; val_offset:93825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93825*FLEN/8, x4, x1, x2) - -inst_31276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a00003f; valaddr_reg:x3; val_offset:93828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93828*FLEN/8, x4, x1, x2) - -inst_31277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a00007f; valaddr_reg:x3; val_offset:93831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93831*FLEN/8, x4, x1, x2) - -inst_31278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a0000ff; valaddr_reg:x3; val_offset:93834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93834*FLEN/8, x4, x1, x2) - -inst_31279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a0001ff; valaddr_reg:x3; val_offset:93837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93837*FLEN/8, x4, x1, x2) - -inst_31280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a0003ff; valaddr_reg:x3; val_offset:93840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93840*FLEN/8, x4, x1, x2) - -inst_31281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a0007ff; valaddr_reg:x3; val_offset:93843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93843*FLEN/8, x4, x1, x2) - -inst_31282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a000fff; valaddr_reg:x3; val_offset:93846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93846*FLEN/8, x4, x1, x2) - -inst_31283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a001fff; valaddr_reg:x3; val_offset:93849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93849*FLEN/8, x4, x1, x2) - -inst_31284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a003fff; valaddr_reg:x3; val_offset:93852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93852*FLEN/8, x4, x1, x2) - -inst_31285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a007fff; valaddr_reg:x3; val_offset:93855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93855*FLEN/8, x4, x1, x2) - -inst_31286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a00ffff; valaddr_reg:x3; val_offset:93858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93858*FLEN/8, x4, x1, x2) - -inst_31287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a01ffff; valaddr_reg:x3; val_offset:93861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93861*FLEN/8, x4, x1, x2) - -inst_31288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a03ffff; valaddr_reg:x3; val_offset:93864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93864*FLEN/8, x4, x1, x2) - -inst_31289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a07ffff; valaddr_reg:x3; val_offset:93867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93867*FLEN/8, x4, x1, x2) - -inst_31290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a0fffff; valaddr_reg:x3; val_offset:93870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93870*FLEN/8, x4, x1, x2) - -inst_31291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a1fffff; valaddr_reg:x3; val_offset:93873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93873*FLEN/8, x4, x1, x2) - -inst_31292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a3fffff; valaddr_reg:x3; val_offset:93876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93876*FLEN/8, x4, x1, x2) - -inst_31293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a400000; valaddr_reg:x3; val_offset:93879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93879*FLEN/8, x4, x1, x2) - -inst_31294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a600000; valaddr_reg:x3; val_offset:93882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93882*FLEN/8, x4, x1, x2) - -inst_31295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a700000; valaddr_reg:x3; val_offset:93885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93885*FLEN/8, x4, x1, x2) - -inst_31296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a780000; valaddr_reg:x3; val_offset:93888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93888*FLEN/8, x4, x1, x2) - -inst_31297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7c0000; valaddr_reg:x3; val_offset:93891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93891*FLEN/8, x4, x1, x2) - -inst_31298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7e0000; valaddr_reg:x3; val_offset:93894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93894*FLEN/8, x4, x1, x2) - -inst_31299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7f0000; valaddr_reg:x3; val_offset:93897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93897*FLEN/8, x4, x1, x2) - -inst_31300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7f8000; valaddr_reg:x3; val_offset:93900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93900*FLEN/8, x4, x1, x2) - -inst_31301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7fc000; valaddr_reg:x3; val_offset:93903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93903*FLEN/8, x4, x1, x2) - -inst_31302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7fe000; valaddr_reg:x3; val_offset:93906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93906*FLEN/8, x4, x1, x2) - -inst_31303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7ff000; valaddr_reg:x3; val_offset:93909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93909*FLEN/8, x4, x1, x2) - -inst_31304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7ff800; valaddr_reg:x3; val_offset:93912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93912*FLEN/8, x4, x1, x2) - -inst_31305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:93915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93915*FLEN/8, x4, x1, x2) - -inst_31306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:93918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93918*FLEN/8, x4, x1, x2) - -inst_31307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7fff00; valaddr_reg:x3; val_offset:93921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93921*FLEN/8, x4, x1, x2) - -inst_31308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7fff80; valaddr_reg:x3; val_offset:93924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93924*FLEN/8, x4, x1, x2) - -inst_31309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:93927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93927*FLEN/8, x4, x1, x2) - -inst_31310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:93930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93930*FLEN/8, x4, x1, x2) - -inst_31311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:93933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93933*FLEN/8, x4, x1, x2) - -inst_31312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:93936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93936*FLEN/8, x4, x1, x2) - -inst_31313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:93939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93939*FLEN/8, x4, x1, x2) - -inst_31314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:93942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93942*FLEN/8, x4, x1, x2) - -inst_31315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; -op3val:0x8a7fffff; valaddr_reg:x3; val_offset:93945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93945*FLEN/8, x4, x1, x2) - -inst_31316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:93948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93948*FLEN/8, x4, x1, x2) - -inst_31317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:93951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93951*FLEN/8, x4, x1, x2) - -inst_31318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:93954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93954*FLEN/8, x4, x1, x2) - -inst_31319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:93957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93957*FLEN/8, x4, x1, x2) - -inst_31320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:93960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93960*FLEN/8, x4, x1, x2) - -inst_31321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:93963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93963*FLEN/8, x4, x1, x2) - -inst_31322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:93966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93966*FLEN/8, x4, x1, x2) - -inst_31323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:93969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93969*FLEN/8, x4, x1, x2) - -inst_31324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:93972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93972*FLEN/8, x4, x1, x2) - -inst_31325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:93975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93975*FLEN/8, x4, x1, x2) - -inst_31326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:93978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93978*FLEN/8, x4, x1, x2) - -inst_31327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:93981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93981*FLEN/8, x4, x1, x2) - -inst_31328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:93984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93984*FLEN/8, x4, x1, x2) - -inst_31329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:93987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93987*FLEN/8, x4, x1, x2) - -inst_31330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:93990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93990*FLEN/8, x4, x1, x2) - -inst_31331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:93993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93993*FLEN/8, x4, x1, x2) - -inst_31332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86800000; valaddr_reg:x3; val_offset:93996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93996*FLEN/8, x4, x1, x2) - -inst_31333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86800001; valaddr_reg:x3; val_offset:93999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93999*FLEN/8, x4, x1, x2) - -inst_31334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86800003; valaddr_reg:x3; val_offset:94002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94002*FLEN/8, x4, x1, x2) - -inst_31335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86800007; valaddr_reg:x3; val_offset:94005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94005*FLEN/8, x4, x1, x2) - -inst_31336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8680000f; valaddr_reg:x3; val_offset:94008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94008*FLEN/8, x4, x1, x2) - -inst_31337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8680001f; valaddr_reg:x3; val_offset:94011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94011*FLEN/8, x4, x1, x2) - -inst_31338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8680003f; valaddr_reg:x3; val_offset:94014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94014*FLEN/8, x4, x1, x2) - -inst_31339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8680007f; valaddr_reg:x3; val_offset:94017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94017*FLEN/8, x4, x1, x2) - -inst_31340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x868000ff; valaddr_reg:x3; val_offset:94020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94020*FLEN/8, x4, x1, x2) - -inst_31341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x868001ff; valaddr_reg:x3; val_offset:94023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94023*FLEN/8, x4, x1, x2) - -inst_31342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x868003ff; valaddr_reg:x3; val_offset:94026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94026*FLEN/8, x4, x1, x2) - -inst_31343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x868007ff; valaddr_reg:x3; val_offset:94029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94029*FLEN/8, x4, x1, x2) - -inst_31344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86800fff; valaddr_reg:x3; val_offset:94032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94032*FLEN/8, x4, x1, x2) - -inst_31345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86801fff; valaddr_reg:x3; val_offset:94035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94035*FLEN/8, x4, x1, x2) - -inst_31346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86803fff; valaddr_reg:x3; val_offset:94038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94038*FLEN/8, x4, x1, x2) - -inst_31347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86807fff; valaddr_reg:x3; val_offset:94041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94041*FLEN/8, x4, x1, x2) - -inst_31348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8680ffff; valaddr_reg:x3; val_offset:94044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94044*FLEN/8, x4, x1, x2) - -inst_31349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8681ffff; valaddr_reg:x3; val_offset:94047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94047*FLEN/8, x4, x1, x2) - -inst_31350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8683ffff; valaddr_reg:x3; val_offset:94050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94050*FLEN/8, x4, x1, x2) - -inst_31351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x8687ffff; valaddr_reg:x3; val_offset:94053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94053*FLEN/8, x4, x1, x2) - -inst_31352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x868fffff; valaddr_reg:x3; val_offset:94056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94056*FLEN/8, x4, x1, x2) - -inst_31353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x869fffff; valaddr_reg:x3; val_offset:94059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94059*FLEN/8, x4, x1, x2) - -inst_31354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86bfffff; valaddr_reg:x3; val_offset:94062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94062*FLEN/8, x4, x1, x2) - -inst_31355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86c00000; valaddr_reg:x3; val_offset:94065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94065*FLEN/8, x4, x1, x2) - -inst_31356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86e00000; valaddr_reg:x3; val_offset:94068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94068*FLEN/8, x4, x1, x2) - -inst_31357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86f00000; valaddr_reg:x3; val_offset:94071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94071*FLEN/8, x4, x1, x2) - -inst_31358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86f80000; valaddr_reg:x3; val_offset:94074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94074*FLEN/8, x4, x1, x2) - -inst_31359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fc0000; valaddr_reg:x3; val_offset:94077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94077*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_246) - -inst_31360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fe0000; valaddr_reg:x3; val_offset:94080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94080*FLEN/8, x4, x1, x2) - -inst_31361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ff0000; valaddr_reg:x3; val_offset:94083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94083*FLEN/8, x4, x1, x2) - -inst_31362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ff8000; valaddr_reg:x3; val_offset:94086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94086*FLEN/8, x4, x1, x2) - -inst_31363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ffc000; valaddr_reg:x3; val_offset:94089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94089*FLEN/8, x4, x1, x2) - -inst_31364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ffe000; valaddr_reg:x3; val_offset:94092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94092*FLEN/8, x4, x1, x2) - -inst_31365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fff000; valaddr_reg:x3; val_offset:94095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94095*FLEN/8, x4, x1, x2) - -inst_31366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fff800; valaddr_reg:x3; val_offset:94098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94098*FLEN/8, x4, x1, x2) - -inst_31367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fffc00; valaddr_reg:x3; val_offset:94101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94101*FLEN/8, x4, x1, x2) - -inst_31368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fffe00; valaddr_reg:x3; val_offset:94104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94104*FLEN/8, x4, x1, x2) - -inst_31369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ffff00; valaddr_reg:x3; val_offset:94107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94107*FLEN/8, x4, x1, x2) - -inst_31370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ffff80; valaddr_reg:x3; val_offset:94110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94110*FLEN/8, x4, x1, x2) - -inst_31371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ffffc0; valaddr_reg:x3; val_offset:94113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94113*FLEN/8, x4, x1, x2) - -inst_31372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ffffe0; valaddr_reg:x3; val_offset:94116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94116*FLEN/8, x4, x1, x2) - -inst_31373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fffff0; valaddr_reg:x3; val_offset:94119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94119*FLEN/8, x4, x1, x2) - -inst_31374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fffff8; valaddr_reg:x3; val_offset:94122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94122*FLEN/8, x4, x1, x2) - -inst_31375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fffffc; valaddr_reg:x3; val_offset:94125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94125*FLEN/8, x4, x1, x2) - -inst_31376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86fffffe; valaddr_reg:x3; val_offset:94128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94128*FLEN/8, x4, x1, x2) - -inst_31377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; -op3val:0x86ffffff; valaddr_reg:x3; val_offset:94131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94131*FLEN/8, x4, x1, x2) - -inst_31378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1000000; valaddr_reg:x3; val_offset:94134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94134*FLEN/8, x4, x1, x2) - -inst_31379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1000001; valaddr_reg:x3; val_offset:94137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94137*FLEN/8, x4, x1, x2) - -inst_31380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1000003; valaddr_reg:x3; val_offset:94140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94140*FLEN/8, x4, x1, x2) - -inst_31381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1000007; valaddr_reg:x3; val_offset:94143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94143*FLEN/8, x4, x1, x2) - -inst_31382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb100000f; valaddr_reg:x3; val_offset:94146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94146*FLEN/8, x4, x1, x2) - -inst_31383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb100001f; valaddr_reg:x3; val_offset:94149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94149*FLEN/8, x4, x1, x2) - -inst_31384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb100003f; valaddr_reg:x3; val_offset:94152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94152*FLEN/8, x4, x1, x2) - -inst_31385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb100007f; valaddr_reg:x3; val_offset:94155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94155*FLEN/8, x4, x1, x2) - -inst_31386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb10000ff; valaddr_reg:x3; val_offset:94158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94158*FLEN/8, x4, x1, x2) - -inst_31387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb10001ff; valaddr_reg:x3; val_offset:94161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94161*FLEN/8, x4, x1, x2) - -inst_31388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb10003ff; valaddr_reg:x3; val_offset:94164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94164*FLEN/8, x4, x1, x2) - -inst_31389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb10007ff; valaddr_reg:x3; val_offset:94167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94167*FLEN/8, x4, x1, x2) - -inst_31390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1000fff; valaddr_reg:x3; val_offset:94170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94170*FLEN/8, x4, x1, x2) - -inst_31391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1001fff; valaddr_reg:x3; val_offset:94173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94173*FLEN/8, x4, x1, x2) - -inst_31392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1003fff; valaddr_reg:x3; val_offset:94176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94176*FLEN/8, x4, x1, x2) - -inst_31393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1007fff; valaddr_reg:x3; val_offset:94179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94179*FLEN/8, x4, x1, x2) - -inst_31394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb100ffff; valaddr_reg:x3; val_offset:94182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94182*FLEN/8, x4, x1, x2) - -inst_31395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb101ffff; valaddr_reg:x3; val_offset:94185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94185*FLEN/8, x4, x1, x2) - -inst_31396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb103ffff; valaddr_reg:x3; val_offset:94188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94188*FLEN/8, x4, x1, x2) - -inst_31397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb107ffff; valaddr_reg:x3; val_offset:94191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94191*FLEN/8, x4, x1, x2) - -inst_31398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb10fffff; valaddr_reg:x3; val_offset:94194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94194*FLEN/8, x4, x1, x2) - -inst_31399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb11fffff; valaddr_reg:x3; val_offset:94197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94197*FLEN/8, x4, x1, x2) - -inst_31400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb13fffff; valaddr_reg:x3; val_offset:94200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94200*FLEN/8, x4, x1, x2) - -inst_31401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1400000; valaddr_reg:x3; val_offset:94203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94203*FLEN/8, x4, x1, x2) - -inst_31402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1600000; valaddr_reg:x3; val_offset:94206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94206*FLEN/8, x4, x1, x2) - -inst_31403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1700000; valaddr_reg:x3; val_offset:94209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94209*FLEN/8, x4, x1, x2) - -inst_31404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb1780000; valaddr_reg:x3; val_offset:94212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94212*FLEN/8, x4, x1, x2) - -inst_31405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17c0000; valaddr_reg:x3; val_offset:94215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94215*FLEN/8, x4, x1, x2) - -inst_31406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17e0000; valaddr_reg:x3; val_offset:94218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94218*FLEN/8, x4, x1, x2) - -inst_31407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17f0000; valaddr_reg:x3; val_offset:94221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94221*FLEN/8, x4, x1, x2) - -inst_31408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17f8000; valaddr_reg:x3; val_offset:94224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94224*FLEN/8, x4, x1, x2) - -inst_31409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17fc000; valaddr_reg:x3; val_offset:94227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94227*FLEN/8, x4, x1, x2) - -inst_31410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17fe000; valaddr_reg:x3; val_offset:94230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94230*FLEN/8, x4, x1, x2) - -inst_31411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17ff000; valaddr_reg:x3; val_offset:94233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94233*FLEN/8, x4, x1, x2) - -inst_31412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17ff800; valaddr_reg:x3; val_offset:94236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94236*FLEN/8, x4, x1, x2) - -inst_31413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17ffc00; valaddr_reg:x3; val_offset:94239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94239*FLEN/8, x4, x1, x2) - -inst_31414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17ffe00; valaddr_reg:x3; val_offset:94242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94242*FLEN/8, x4, x1, x2) - -inst_31415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17fff00; valaddr_reg:x3; val_offset:94245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94245*FLEN/8, x4, x1, x2) - -inst_31416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17fff80; valaddr_reg:x3; val_offset:94248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94248*FLEN/8, x4, x1, x2) - -inst_31417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17fffc0; valaddr_reg:x3; val_offset:94251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94251*FLEN/8, x4, x1, x2) - -inst_31418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17fffe0; valaddr_reg:x3; val_offset:94254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94254*FLEN/8, x4, x1, x2) - -inst_31419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17ffff0; valaddr_reg:x3; val_offset:94257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94257*FLEN/8, x4, x1, x2) - -inst_31420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17ffff8; valaddr_reg:x3; val_offset:94260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94260*FLEN/8, x4, x1, x2) - -inst_31421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17ffffc; valaddr_reg:x3; val_offset:94263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94263*FLEN/8, x4, x1, x2) - -inst_31422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17ffffe; valaddr_reg:x3; val_offset:94266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94266*FLEN/8, x4, x1, x2) - -inst_31423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xb17fffff; valaddr_reg:x3; val_offset:94269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94269*FLEN/8, x4, x1, x2) - -inst_31424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbf800001; valaddr_reg:x3; val_offset:94272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94272*FLEN/8, x4, x1, x2) - -inst_31425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbf800003; valaddr_reg:x3; val_offset:94275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94275*FLEN/8, x4, x1, x2) - -inst_31426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbf800007; valaddr_reg:x3; val_offset:94278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94278*FLEN/8, x4, x1, x2) - -inst_31427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbf999999; valaddr_reg:x3; val_offset:94281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94281*FLEN/8, x4, x1, x2) - -inst_31428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:94284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94284*FLEN/8, x4, x1, x2) - -inst_31429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:94287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94287*FLEN/8, x4, x1, x2) - -inst_31430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:94290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94290*FLEN/8, x4, x1, x2) - -inst_31431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:94293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94293*FLEN/8, x4, x1, x2) - -inst_31432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:94296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94296*FLEN/8, x4, x1, x2) - -inst_31433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:94299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94299*FLEN/8, x4, x1, x2) - -inst_31434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:94302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94302*FLEN/8, x4, x1, x2) - -inst_31435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:94305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94305*FLEN/8, x4, x1, x2) - -inst_31436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:94308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94308*FLEN/8, x4, x1, x2) - -inst_31437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:94311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94311*FLEN/8, x4, x1, x2) - -inst_31438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:94314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94314*FLEN/8, x4, x1, x2) - -inst_31439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:94317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94317*FLEN/8, x4, x1, x2) - -inst_31440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80000000; valaddr_reg:x3; val_offset:94320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94320*FLEN/8, x4, x1, x2) - -inst_31441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:94323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94323*FLEN/8, x4, x1, x2) - -inst_31442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:94326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94326*FLEN/8, x4, x1, x2) - -inst_31443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:94329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94329*FLEN/8, x4, x1, x2) - -inst_31444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8000000f; valaddr_reg:x3; val_offset:94332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94332*FLEN/8, x4, x1, x2) - -inst_31445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8000001f; valaddr_reg:x3; val_offset:94335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94335*FLEN/8, x4, x1, x2) - -inst_31446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8000003f; valaddr_reg:x3; val_offset:94338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94338*FLEN/8, x4, x1, x2) - -inst_31447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8000007f; valaddr_reg:x3; val_offset:94341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94341*FLEN/8, x4, x1, x2) - -inst_31448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x800000ff; valaddr_reg:x3; val_offset:94344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94344*FLEN/8, x4, x1, x2) - -inst_31449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x800001ff; valaddr_reg:x3; val_offset:94347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94347*FLEN/8, x4, x1, x2) - -inst_31450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x800003ff; valaddr_reg:x3; val_offset:94350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94350*FLEN/8, x4, x1, x2) - -inst_31451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x800007ff; valaddr_reg:x3; val_offset:94353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94353*FLEN/8, x4, x1, x2) - -inst_31452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80000fff; valaddr_reg:x3; val_offset:94356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94356*FLEN/8, x4, x1, x2) - -inst_31453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80001fff; valaddr_reg:x3; val_offset:94359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94359*FLEN/8, x4, x1, x2) - -inst_31454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80003fff; valaddr_reg:x3; val_offset:94362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94362*FLEN/8, x4, x1, x2) - -inst_31455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80007fff; valaddr_reg:x3; val_offset:94365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94365*FLEN/8, x4, x1, x2) - -inst_31456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8000ffff; valaddr_reg:x3; val_offset:94368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94368*FLEN/8, x4, x1, x2) - -inst_31457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8001ffff; valaddr_reg:x3; val_offset:94371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94371*FLEN/8, x4, x1, x2) - -inst_31458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8003ffff; valaddr_reg:x3; val_offset:94374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94374*FLEN/8, x4, x1, x2) - -inst_31459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8007ffff; valaddr_reg:x3; val_offset:94377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94377*FLEN/8, x4, x1, x2) - -inst_31460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x800fffff; valaddr_reg:x3; val_offset:94380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94380*FLEN/8, x4, x1, x2) - -inst_31461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:94383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94383*FLEN/8, x4, x1, x2) - -inst_31462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x801fffff; valaddr_reg:x3; val_offset:94386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94386*FLEN/8, x4, x1, x2) - -inst_31463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:94389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94389*FLEN/8, x4, x1, x2) - -inst_31464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:94392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94392*FLEN/8, x4, x1, x2) - -inst_31465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:94395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94395*FLEN/8, x4, x1, x2) - -inst_31466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:94398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94398*FLEN/8, x4, x1, x2) - -inst_31467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x803fffff; valaddr_reg:x3; val_offset:94401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94401*FLEN/8, x4, x1, x2) - -inst_31468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80400000; valaddr_reg:x3; val_offset:94404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94404*FLEN/8, x4, x1, x2) - -inst_31469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:94407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94407*FLEN/8, x4, x1, x2) - -inst_31470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:94410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94410*FLEN/8, x4, x1, x2) - -inst_31471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:94413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94413*FLEN/8, x4, x1, x2) - -inst_31472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80600000; valaddr_reg:x3; val_offset:94416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94416*FLEN/8, x4, x1, x2) - -inst_31473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:94419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94419*FLEN/8, x4, x1, x2) - -inst_31474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:94422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94422*FLEN/8, x4, x1, x2) - -inst_31475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80700000; valaddr_reg:x3; val_offset:94425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94425*FLEN/8, x4, x1, x2) - -inst_31476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x80780000; valaddr_reg:x3; val_offset:94428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94428*FLEN/8, x4, x1, x2) - -inst_31477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807c0000; valaddr_reg:x3; val_offset:94431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94431*FLEN/8, x4, x1, x2) - -inst_31478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807e0000; valaddr_reg:x3; val_offset:94434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94434*FLEN/8, x4, x1, x2) - -inst_31479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807f0000; valaddr_reg:x3; val_offset:94437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94437*FLEN/8, x4, x1, x2) - -inst_31480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807f8000; valaddr_reg:x3; val_offset:94440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94440*FLEN/8, x4, x1, x2) - -inst_31481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807fc000; valaddr_reg:x3; val_offset:94443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94443*FLEN/8, x4, x1, x2) - -inst_31482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807fe000; valaddr_reg:x3; val_offset:94446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94446*FLEN/8, x4, x1, x2) - -inst_31483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807ff000; valaddr_reg:x3; val_offset:94449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94449*FLEN/8, x4, x1, x2) - -inst_31484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807ff800; valaddr_reg:x3; val_offset:94452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94452*FLEN/8, x4, x1, x2) - -inst_31485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807ffc00; valaddr_reg:x3; val_offset:94455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94455*FLEN/8, x4, x1, x2) - -inst_31486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807ffe00; valaddr_reg:x3; val_offset:94458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94458*FLEN/8, x4, x1, x2) - -inst_31487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807fff00; valaddr_reg:x3; val_offset:94461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94461*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_247) - -inst_31488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807fff80; valaddr_reg:x3; val_offset:94464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94464*FLEN/8, x4, x1, x2) - -inst_31489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807fffc0; valaddr_reg:x3; val_offset:94467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94467*FLEN/8, x4, x1, x2) - -inst_31490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807fffe0; valaddr_reg:x3; val_offset:94470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94470*FLEN/8, x4, x1, x2) - -inst_31491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807ffff0; valaddr_reg:x3; val_offset:94473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94473*FLEN/8, x4, x1, x2) - -inst_31492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:94476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94476*FLEN/8, x4, x1, x2) - -inst_31493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:94479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94479*FLEN/8, x4, x1, x2) - -inst_31494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:94482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94482*FLEN/8, x4, x1, x2) - -inst_31495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; -op3val:0x807fffff; valaddr_reg:x3; val_offset:94485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94485*FLEN/8, x4, x1, x2) - -inst_31496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:94488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94488*FLEN/8, x4, x1, x2) - -inst_31497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:94491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94491*FLEN/8, x4, x1, x2) - -inst_31498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:94494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94494*FLEN/8, x4, x1, x2) - -inst_31499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:94497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94497*FLEN/8, x4, x1, x2) - -inst_31500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:94500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94500*FLEN/8, x4, x1, x2) - -inst_31501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:94503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94503*FLEN/8, x4, x1, x2) - -inst_31502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:94506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94506*FLEN/8, x4, x1, x2) - -inst_31503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:94509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94509*FLEN/8, x4, x1, x2) - -inst_31504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:94512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94512*FLEN/8, x4, x1, x2) - -inst_31505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:94515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94515*FLEN/8, x4, x1, x2) - -inst_31506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:94518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94518*FLEN/8, x4, x1, x2) - -inst_31507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:94521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94521*FLEN/8, x4, x1, x2) - -inst_31508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:94524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94524*FLEN/8, x4, x1, x2) - -inst_31509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:94527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94527*FLEN/8, x4, x1, x2) - -inst_31510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:94530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94530*FLEN/8, x4, x1, x2) - -inst_31511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:94533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94533*FLEN/8, x4, x1, x2) - -inst_31512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d000000; valaddr_reg:x3; val_offset:94536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94536*FLEN/8, x4, x1, x2) - -inst_31513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d000001; valaddr_reg:x3; val_offset:94539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94539*FLEN/8, x4, x1, x2) - -inst_31514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d000003; valaddr_reg:x3; val_offset:94542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94542*FLEN/8, x4, x1, x2) - -inst_31515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d000007; valaddr_reg:x3; val_offset:94545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94545*FLEN/8, x4, x1, x2) - -inst_31516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d00000f; valaddr_reg:x3; val_offset:94548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94548*FLEN/8, x4, x1, x2) - -inst_31517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d00001f; valaddr_reg:x3; val_offset:94551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94551*FLEN/8, x4, x1, x2) - -inst_31518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d00003f; valaddr_reg:x3; val_offset:94554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94554*FLEN/8, x4, x1, x2) - -inst_31519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d00007f; valaddr_reg:x3; val_offset:94557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94557*FLEN/8, x4, x1, x2) - -inst_31520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d0000ff; valaddr_reg:x3; val_offset:94560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94560*FLEN/8, x4, x1, x2) - -inst_31521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d0001ff; valaddr_reg:x3; val_offset:94563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94563*FLEN/8, x4, x1, x2) - -inst_31522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d0003ff; valaddr_reg:x3; val_offset:94566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94566*FLEN/8, x4, x1, x2) - -inst_31523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d0007ff; valaddr_reg:x3; val_offset:94569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94569*FLEN/8, x4, x1, x2) - -inst_31524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d000fff; valaddr_reg:x3; val_offset:94572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94572*FLEN/8, x4, x1, x2) - -inst_31525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d001fff; valaddr_reg:x3; val_offset:94575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94575*FLEN/8, x4, x1, x2) - -inst_31526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d003fff; valaddr_reg:x3; val_offset:94578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94578*FLEN/8, x4, x1, x2) - -inst_31527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d007fff; valaddr_reg:x3; val_offset:94581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94581*FLEN/8, x4, x1, x2) - -inst_31528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d00ffff; valaddr_reg:x3; val_offset:94584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94584*FLEN/8, x4, x1, x2) - -inst_31529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d01ffff; valaddr_reg:x3; val_offset:94587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94587*FLEN/8, x4, x1, x2) - -inst_31530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d03ffff; valaddr_reg:x3; val_offset:94590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94590*FLEN/8, x4, x1, x2) - -inst_31531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d07ffff; valaddr_reg:x3; val_offset:94593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94593*FLEN/8, x4, x1, x2) - -inst_31532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d0fffff; valaddr_reg:x3; val_offset:94596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94596*FLEN/8, x4, x1, x2) - -inst_31533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d1fffff; valaddr_reg:x3; val_offset:94599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94599*FLEN/8, x4, x1, x2) - -inst_31534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d3fffff; valaddr_reg:x3; val_offset:94602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94602*FLEN/8, x4, x1, x2) - -inst_31535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d400000; valaddr_reg:x3; val_offset:94605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94605*FLEN/8, x4, x1, x2) - -inst_31536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d600000; valaddr_reg:x3; val_offset:94608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94608*FLEN/8, x4, x1, x2) - -inst_31537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d700000; valaddr_reg:x3; val_offset:94611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94611*FLEN/8, x4, x1, x2) - -inst_31538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d780000; valaddr_reg:x3; val_offset:94614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94614*FLEN/8, x4, x1, x2) - -inst_31539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7c0000; valaddr_reg:x3; val_offset:94617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94617*FLEN/8, x4, x1, x2) - -inst_31540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7e0000; valaddr_reg:x3; val_offset:94620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94620*FLEN/8, x4, x1, x2) - -inst_31541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7f0000; valaddr_reg:x3; val_offset:94623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94623*FLEN/8, x4, x1, x2) - -inst_31542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7f8000; valaddr_reg:x3; val_offset:94626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94626*FLEN/8, x4, x1, x2) - -inst_31543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7fc000; valaddr_reg:x3; val_offset:94629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94629*FLEN/8, x4, x1, x2) - -inst_31544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7fe000; valaddr_reg:x3; val_offset:94632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94632*FLEN/8, x4, x1, x2) - -inst_31545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7ff000; valaddr_reg:x3; val_offset:94635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94635*FLEN/8, x4, x1, x2) - -inst_31546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7ff800; valaddr_reg:x3; val_offset:94638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94638*FLEN/8, x4, x1, x2) - -inst_31547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:94641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94641*FLEN/8, x4, x1, x2) - -inst_31548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:94644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94644*FLEN/8, x4, x1, x2) - -inst_31549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7fff00; valaddr_reg:x3; val_offset:94647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94647*FLEN/8, x4, x1, x2) - -inst_31550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7fff80; valaddr_reg:x3; val_offset:94650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94650*FLEN/8, x4, x1, x2) - -inst_31551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:94653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94653*FLEN/8, x4, x1, x2) - -inst_31552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:94656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94656*FLEN/8, x4, x1, x2) - -inst_31553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:94659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94659*FLEN/8, x4, x1, x2) - -inst_31554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:94662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94662*FLEN/8, x4, x1, x2) - -inst_31555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:94665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94665*FLEN/8, x4, x1, x2) - -inst_31556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:94668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94668*FLEN/8, x4, x1, x2) - -inst_31557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; -op3val:0x8d7fffff; valaddr_reg:x3; val_offset:94671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94671*FLEN/8, x4, x1, x2) - -inst_31558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26800000; valaddr_reg:x3; val_offset:94674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94674*FLEN/8, x4, x1, x2) - -inst_31559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26800001; valaddr_reg:x3; val_offset:94677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94677*FLEN/8, x4, x1, x2) - -inst_31560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26800003; valaddr_reg:x3; val_offset:94680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94680*FLEN/8, x4, x1, x2) - -inst_31561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26800007; valaddr_reg:x3; val_offset:94683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94683*FLEN/8, x4, x1, x2) - -inst_31562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x2680000f; valaddr_reg:x3; val_offset:94686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94686*FLEN/8, x4, x1, x2) - -inst_31563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x2680001f; valaddr_reg:x3; val_offset:94689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94689*FLEN/8, x4, x1, x2) - -inst_31564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x2680003f; valaddr_reg:x3; val_offset:94692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94692*FLEN/8, x4, x1, x2) - -inst_31565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x2680007f; valaddr_reg:x3; val_offset:94695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94695*FLEN/8, x4, x1, x2) - -inst_31566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x268000ff; valaddr_reg:x3; val_offset:94698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94698*FLEN/8, x4, x1, x2) - -inst_31567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x268001ff; valaddr_reg:x3; val_offset:94701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94701*FLEN/8, x4, x1, x2) - -inst_31568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x268003ff; valaddr_reg:x3; val_offset:94704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94704*FLEN/8, x4, x1, x2) - -inst_31569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x268007ff; valaddr_reg:x3; val_offset:94707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94707*FLEN/8, x4, x1, x2) - -inst_31570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26800fff; valaddr_reg:x3; val_offset:94710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94710*FLEN/8, x4, x1, x2) - -inst_31571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26801fff; valaddr_reg:x3; val_offset:94713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94713*FLEN/8, x4, x1, x2) - -inst_31572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26803fff; valaddr_reg:x3; val_offset:94716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94716*FLEN/8, x4, x1, x2) - -inst_31573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26807fff; valaddr_reg:x3; val_offset:94719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94719*FLEN/8, x4, x1, x2) - -inst_31574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x2680ffff; valaddr_reg:x3; val_offset:94722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94722*FLEN/8, x4, x1, x2) - -inst_31575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x2681ffff; valaddr_reg:x3; val_offset:94725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94725*FLEN/8, x4, x1, x2) - -inst_31576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x2683ffff; valaddr_reg:x3; val_offset:94728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94728*FLEN/8, x4, x1, x2) - -inst_31577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x2687ffff; valaddr_reg:x3; val_offset:94731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94731*FLEN/8, x4, x1, x2) - -inst_31578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x268fffff; valaddr_reg:x3; val_offset:94734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94734*FLEN/8, x4, x1, x2) - -inst_31579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x269fffff; valaddr_reg:x3; val_offset:94737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94737*FLEN/8, x4, x1, x2) - -inst_31580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26bfffff; valaddr_reg:x3; val_offset:94740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94740*FLEN/8, x4, x1, x2) - -inst_31581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26c00000; valaddr_reg:x3; val_offset:94743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94743*FLEN/8, x4, x1, x2) - -inst_31582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26e00000; valaddr_reg:x3; val_offset:94746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94746*FLEN/8, x4, x1, x2) - -inst_31583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26f00000; valaddr_reg:x3; val_offset:94749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94749*FLEN/8, x4, x1, x2) - -inst_31584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26f80000; valaddr_reg:x3; val_offset:94752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94752*FLEN/8, x4, x1, x2) - -inst_31585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fc0000; valaddr_reg:x3; val_offset:94755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94755*FLEN/8, x4, x1, x2) - -inst_31586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fe0000; valaddr_reg:x3; val_offset:94758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94758*FLEN/8, x4, x1, x2) - -inst_31587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ff0000; valaddr_reg:x3; val_offset:94761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94761*FLEN/8, x4, x1, x2) - -inst_31588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ff8000; valaddr_reg:x3; val_offset:94764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94764*FLEN/8, x4, x1, x2) - -inst_31589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ffc000; valaddr_reg:x3; val_offset:94767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94767*FLEN/8, x4, x1, x2) - -inst_31590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ffe000; valaddr_reg:x3; val_offset:94770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94770*FLEN/8, x4, x1, x2) - -inst_31591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fff000; valaddr_reg:x3; val_offset:94773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94773*FLEN/8, x4, x1, x2) - -inst_31592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fff800; valaddr_reg:x3; val_offset:94776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94776*FLEN/8, x4, x1, x2) - -inst_31593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fffc00; valaddr_reg:x3; val_offset:94779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94779*FLEN/8, x4, x1, x2) - -inst_31594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fffe00; valaddr_reg:x3; val_offset:94782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94782*FLEN/8, x4, x1, x2) - -inst_31595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ffff00; valaddr_reg:x3; val_offset:94785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94785*FLEN/8, x4, x1, x2) - -inst_31596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ffff80; valaddr_reg:x3; val_offset:94788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94788*FLEN/8, x4, x1, x2) - -inst_31597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ffffc0; valaddr_reg:x3; val_offset:94791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94791*FLEN/8, x4, x1, x2) - -inst_31598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ffffe0; valaddr_reg:x3; val_offset:94794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94794*FLEN/8, x4, x1, x2) - -inst_31599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fffff0; valaddr_reg:x3; val_offset:94797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94797*FLEN/8, x4, x1, x2) - -inst_31600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fffff8; valaddr_reg:x3; val_offset:94800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94800*FLEN/8, x4, x1, x2) - -inst_31601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fffffc; valaddr_reg:x3; val_offset:94803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94803*FLEN/8, x4, x1, x2) - -inst_31602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26fffffe; valaddr_reg:x3; val_offset:94806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94806*FLEN/8, x4, x1, x2) - -inst_31603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x26ffffff; valaddr_reg:x3; val_offset:94809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94809*FLEN/8, x4, x1, x2) - -inst_31604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3f800001; valaddr_reg:x3; val_offset:94812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94812*FLEN/8, x4, x1, x2) - -inst_31605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3f800003; valaddr_reg:x3; val_offset:94815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94815*FLEN/8, x4, x1, x2) - -inst_31606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3f800007; valaddr_reg:x3; val_offset:94818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94818*FLEN/8, x4, x1, x2) - -inst_31607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3f999999; valaddr_reg:x3; val_offset:94821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94821*FLEN/8, x4, x1, x2) - -inst_31608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:94824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94824*FLEN/8, x4, x1, x2) - -inst_31609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:94827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94827*FLEN/8, x4, x1, x2) - -inst_31610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:94830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94830*FLEN/8, x4, x1, x2) - -inst_31611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:94833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94833*FLEN/8, x4, x1, x2) - -inst_31612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:94836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94836*FLEN/8, x4, x1, x2) - -inst_31613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:94839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94839*FLEN/8, x4, x1, x2) - -inst_31614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:94842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94842*FLEN/8, x4, x1, x2) - -inst_31615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:94845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94845*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_248) - -inst_31616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:94848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94848*FLEN/8, x4, x1, x2) - -inst_31617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:94851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94851*FLEN/8, x4, x1, x2) - -inst_31618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:94854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94854*FLEN/8, x4, x1, x2) - -inst_31619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:94857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94857*FLEN/8, x4, x1, x2) - -inst_31620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:94860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94860*FLEN/8, x4, x1, x2) - -inst_31621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:94863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94863*FLEN/8, x4, x1, x2) - -inst_31622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:94866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94866*FLEN/8, x4, x1, x2) - -inst_31623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:94869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94869*FLEN/8, x4, x1, x2) - -inst_31624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:94872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94872*FLEN/8, x4, x1, x2) - -inst_31625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:94875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94875*FLEN/8, x4, x1, x2) - -inst_31626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:94878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94878*FLEN/8, x4, x1, x2) - -inst_31627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:94881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94881*FLEN/8, x4, x1, x2) - -inst_31628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:94884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94884*FLEN/8, x4, x1, x2) - -inst_31629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:94887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94887*FLEN/8, x4, x1, x2) - -inst_31630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:94890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94890*FLEN/8, x4, x1, x2) - -inst_31631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:94893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94893*FLEN/8, x4, x1, x2) - -inst_31632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:94896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94896*FLEN/8, x4, x1, x2) - -inst_31633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:94899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94899*FLEN/8, x4, x1, x2) - -inst_31634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:94902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94902*FLEN/8, x4, x1, x2) - -inst_31635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:94905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94905*FLEN/8, x4, x1, x2) - -inst_31636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e000000; valaddr_reg:x3; val_offset:94908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94908*FLEN/8, x4, x1, x2) - -inst_31637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e000001; valaddr_reg:x3; val_offset:94911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94911*FLEN/8, x4, x1, x2) - -inst_31638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e000003; valaddr_reg:x3; val_offset:94914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94914*FLEN/8, x4, x1, x2) - -inst_31639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e000007; valaddr_reg:x3; val_offset:94917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94917*FLEN/8, x4, x1, x2) - -inst_31640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e00000f; valaddr_reg:x3; val_offset:94920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94920*FLEN/8, x4, x1, x2) - -inst_31641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e00001f; valaddr_reg:x3; val_offset:94923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94923*FLEN/8, x4, x1, x2) - -inst_31642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e00003f; valaddr_reg:x3; val_offset:94926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94926*FLEN/8, x4, x1, x2) - -inst_31643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e00007f; valaddr_reg:x3; val_offset:94929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94929*FLEN/8, x4, x1, x2) - -inst_31644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e0000ff; valaddr_reg:x3; val_offset:94932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94932*FLEN/8, x4, x1, x2) - -inst_31645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e0001ff; valaddr_reg:x3; val_offset:94935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94935*FLEN/8, x4, x1, x2) - -inst_31646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e0003ff; valaddr_reg:x3; val_offset:94938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94938*FLEN/8, x4, x1, x2) - -inst_31647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e0007ff; valaddr_reg:x3; val_offset:94941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94941*FLEN/8, x4, x1, x2) - -inst_31648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e000fff; valaddr_reg:x3; val_offset:94944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94944*FLEN/8, x4, x1, x2) - -inst_31649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e001fff; valaddr_reg:x3; val_offset:94947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94947*FLEN/8, x4, x1, x2) - -inst_31650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e003fff; valaddr_reg:x3; val_offset:94950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94950*FLEN/8, x4, x1, x2) - -inst_31651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e007fff; valaddr_reg:x3; val_offset:94953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94953*FLEN/8, x4, x1, x2) - -inst_31652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e00ffff; valaddr_reg:x3; val_offset:94956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94956*FLEN/8, x4, x1, x2) - -inst_31653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e01ffff; valaddr_reg:x3; val_offset:94959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94959*FLEN/8, x4, x1, x2) - -inst_31654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e03ffff; valaddr_reg:x3; val_offset:94962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94962*FLEN/8, x4, x1, x2) - -inst_31655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e07ffff; valaddr_reg:x3; val_offset:94965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94965*FLEN/8, x4, x1, x2) - -inst_31656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e0fffff; valaddr_reg:x3; val_offset:94968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94968*FLEN/8, x4, x1, x2) - -inst_31657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e1fffff; valaddr_reg:x3; val_offset:94971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94971*FLEN/8, x4, x1, x2) - -inst_31658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e3fffff; valaddr_reg:x3; val_offset:94974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94974*FLEN/8, x4, x1, x2) - -inst_31659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e400000; valaddr_reg:x3; val_offset:94977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94977*FLEN/8, x4, x1, x2) - -inst_31660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e600000; valaddr_reg:x3; val_offset:94980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94980*FLEN/8, x4, x1, x2) - -inst_31661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e700000; valaddr_reg:x3; val_offset:94983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94983*FLEN/8, x4, x1, x2) - -inst_31662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e780000; valaddr_reg:x3; val_offset:94986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94986*FLEN/8, x4, x1, x2) - -inst_31663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7c0000; valaddr_reg:x3; val_offset:94989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94989*FLEN/8, x4, x1, x2) - -inst_31664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7e0000; valaddr_reg:x3; val_offset:94992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94992*FLEN/8, x4, x1, x2) - -inst_31665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7f0000; valaddr_reg:x3; val_offset:94995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94995*FLEN/8, x4, x1, x2) - -inst_31666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7f8000; valaddr_reg:x3; val_offset:94998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94998*FLEN/8, x4, x1, x2) - -inst_31667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7fc000; valaddr_reg:x3; val_offset:95001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95001*FLEN/8, x4, x1, x2) - -inst_31668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7fe000; valaddr_reg:x3; val_offset:95004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95004*FLEN/8, x4, x1, x2) - -inst_31669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7ff000; valaddr_reg:x3; val_offset:95007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95007*FLEN/8, x4, x1, x2) - -inst_31670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7ff800; valaddr_reg:x3; val_offset:95010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95010*FLEN/8, x4, x1, x2) - -inst_31671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:95013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95013*FLEN/8, x4, x1, x2) - -inst_31672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:95016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95016*FLEN/8, x4, x1, x2) - -inst_31673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7fff00; valaddr_reg:x3; val_offset:95019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95019*FLEN/8, x4, x1, x2) - -inst_31674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7fff80; valaddr_reg:x3; val_offset:95022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95022*FLEN/8, x4, x1, x2) - -inst_31675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:95025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95025*FLEN/8, x4, x1, x2) - -inst_31676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:95028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95028*FLEN/8, x4, x1, x2) - -inst_31677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:95031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95031*FLEN/8, x4, x1, x2) - -inst_31678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:95034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95034*FLEN/8, x4, x1, x2) - -inst_31679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:95037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95037*FLEN/8, x4, x1, x2) - -inst_31680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:95040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95040*FLEN/8, x4, x1, x2) - -inst_31681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; -op3val:0x8e7fffff; valaddr_reg:x3; val_offset:95043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95043*FLEN/8, x4, x1, x2) - -inst_31682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3800000; valaddr_reg:x3; val_offset:95046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95046*FLEN/8, x4, x1, x2) - -inst_31683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3800001; valaddr_reg:x3; val_offset:95049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95049*FLEN/8, x4, x1, x2) - -inst_31684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3800003; valaddr_reg:x3; val_offset:95052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95052*FLEN/8, x4, x1, x2) - -inst_31685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3800007; valaddr_reg:x3; val_offset:95055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95055*FLEN/8, x4, x1, x2) - -inst_31686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa380000f; valaddr_reg:x3; val_offset:95058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95058*FLEN/8, x4, x1, x2) - -inst_31687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa380001f; valaddr_reg:x3; val_offset:95061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95061*FLEN/8, x4, x1, x2) - -inst_31688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa380003f; valaddr_reg:x3; val_offset:95064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95064*FLEN/8, x4, x1, x2) - -inst_31689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa380007f; valaddr_reg:x3; val_offset:95067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95067*FLEN/8, x4, x1, x2) - -inst_31690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa38000ff; valaddr_reg:x3; val_offset:95070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95070*FLEN/8, x4, x1, x2) - -inst_31691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa38001ff; valaddr_reg:x3; val_offset:95073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95073*FLEN/8, x4, x1, x2) - -inst_31692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa38003ff; valaddr_reg:x3; val_offset:95076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95076*FLEN/8, x4, x1, x2) - -inst_31693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa38007ff; valaddr_reg:x3; val_offset:95079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95079*FLEN/8, x4, x1, x2) - -inst_31694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3800fff; valaddr_reg:x3; val_offset:95082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95082*FLEN/8, x4, x1, x2) - -inst_31695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3801fff; valaddr_reg:x3; val_offset:95085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95085*FLEN/8, x4, x1, x2) - -inst_31696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3803fff; valaddr_reg:x3; val_offset:95088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95088*FLEN/8, x4, x1, x2) - -inst_31697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3807fff; valaddr_reg:x3; val_offset:95091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95091*FLEN/8, x4, x1, x2) - -inst_31698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa380ffff; valaddr_reg:x3; val_offset:95094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95094*FLEN/8, x4, x1, x2) - -inst_31699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa381ffff; valaddr_reg:x3; val_offset:95097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95097*FLEN/8, x4, x1, x2) - -inst_31700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa383ffff; valaddr_reg:x3; val_offset:95100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95100*FLEN/8, x4, x1, x2) - -inst_31701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa387ffff; valaddr_reg:x3; val_offset:95103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95103*FLEN/8, x4, x1, x2) - -inst_31702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa38fffff; valaddr_reg:x3; val_offset:95106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95106*FLEN/8, x4, x1, x2) - -inst_31703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa39fffff; valaddr_reg:x3; val_offset:95109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95109*FLEN/8, x4, x1, x2) - -inst_31704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3bfffff; valaddr_reg:x3; val_offset:95112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95112*FLEN/8, x4, x1, x2) - -inst_31705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3c00000; valaddr_reg:x3; val_offset:95115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95115*FLEN/8, x4, x1, x2) - -inst_31706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3e00000; valaddr_reg:x3; val_offset:95118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95118*FLEN/8, x4, x1, x2) - -inst_31707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3f00000; valaddr_reg:x3; val_offset:95121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95121*FLEN/8, x4, x1, x2) - -inst_31708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3f80000; valaddr_reg:x3; val_offset:95124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95124*FLEN/8, x4, x1, x2) - -inst_31709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fc0000; valaddr_reg:x3; val_offset:95127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95127*FLEN/8, x4, x1, x2) - -inst_31710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fe0000; valaddr_reg:x3; val_offset:95130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95130*FLEN/8, x4, x1, x2) - -inst_31711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ff0000; valaddr_reg:x3; val_offset:95133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95133*FLEN/8, x4, x1, x2) - -inst_31712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ff8000; valaddr_reg:x3; val_offset:95136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95136*FLEN/8, x4, x1, x2) - -inst_31713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ffc000; valaddr_reg:x3; val_offset:95139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95139*FLEN/8, x4, x1, x2) - -inst_31714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ffe000; valaddr_reg:x3; val_offset:95142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95142*FLEN/8, x4, x1, x2) - -inst_31715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fff000; valaddr_reg:x3; val_offset:95145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95145*FLEN/8, x4, x1, x2) - -inst_31716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fff800; valaddr_reg:x3; val_offset:95148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95148*FLEN/8, x4, x1, x2) - -inst_31717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fffc00; valaddr_reg:x3; val_offset:95151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95151*FLEN/8, x4, x1, x2) - -inst_31718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fffe00; valaddr_reg:x3; val_offset:95154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95154*FLEN/8, x4, x1, x2) - -inst_31719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ffff00; valaddr_reg:x3; val_offset:95157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95157*FLEN/8, x4, x1, x2) - -inst_31720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ffff80; valaddr_reg:x3; val_offset:95160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95160*FLEN/8, x4, x1, x2) - -inst_31721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ffffc0; valaddr_reg:x3; val_offset:95163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95163*FLEN/8, x4, x1, x2) - -inst_31722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ffffe0; valaddr_reg:x3; val_offset:95166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95166*FLEN/8, x4, x1, x2) - -inst_31723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fffff0; valaddr_reg:x3; val_offset:95169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95169*FLEN/8, x4, x1, x2) - -inst_31724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fffff8; valaddr_reg:x3; val_offset:95172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95172*FLEN/8, x4, x1, x2) - -inst_31725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fffffc; valaddr_reg:x3; val_offset:95175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95175*FLEN/8, x4, x1, x2) - -inst_31726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3fffffe; valaddr_reg:x3; val_offset:95178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95178*FLEN/8, x4, x1, x2) - -inst_31727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xa3ffffff; valaddr_reg:x3; val_offset:95181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95181*FLEN/8, x4, x1, x2) - -inst_31728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbf800001; valaddr_reg:x3; val_offset:95184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95184*FLEN/8, x4, x1, x2) - -inst_31729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbf800003; valaddr_reg:x3; val_offset:95187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95187*FLEN/8, x4, x1, x2) - -inst_31730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbf800007; valaddr_reg:x3; val_offset:95190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95190*FLEN/8, x4, x1, x2) - -inst_31731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbf999999; valaddr_reg:x3; val_offset:95193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95193*FLEN/8, x4, x1, x2) - -inst_31732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:95196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95196*FLEN/8, x4, x1, x2) - -inst_31733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:95199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95199*FLEN/8, x4, x1, x2) - -inst_31734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:95202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95202*FLEN/8, x4, x1, x2) - -inst_31735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:95205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95205*FLEN/8, x4, x1, x2) - -inst_31736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:95208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95208*FLEN/8, x4, x1, x2) - -inst_31737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:95211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95211*FLEN/8, x4, x1, x2) - -inst_31738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:95214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95214*FLEN/8, x4, x1, x2) - -inst_31739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:95217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95217*FLEN/8, x4, x1, x2) - -inst_31740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:95220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95220*FLEN/8, x4, x1, x2) - -inst_31741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:95223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95223*FLEN/8, x4, x1, x2) - -inst_31742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:95226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95226*FLEN/8, x4, x1, x2) - -inst_31743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:95229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95229*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_249) - -inst_31744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22800000; valaddr_reg:x3; val_offset:95232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95232*FLEN/8, x4, x1, x2) - -inst_31745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22800001; valaddr_reg:x3; val_offset:95235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95235*FLEN/8, x4, x1, x2) - -inst_31746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22800003; valaddr_reg:x3; val_offset:95238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95238*FLEN/8, x4, x1, x2) - -inst_31747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22800007; valaddr_reg:x3; val_offset:95241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95241*FLEN/8, x4, x1, x2) - -inst_31748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x2280000f; valaddr_reg:x3; val_offset:95244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95244*FLEN/8, x4, x1, x2) - -inst_31749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x2280001f; valaddr_reg:x3; val_offset:95247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95247*FLEN/8, x4, x1, x2) - -inst_31750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x2280003f; valaddr_reg:x3; val_offset:95250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95250*FLEN/8, x4, x1, x2) - -inst_31751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x2280007f; valaddr_reg:x3; val_offset:95253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95253*FLEN/8, x4, x1, x2) - -inst_31752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x228000ff; valaddr_reg:x3; val_offset:95256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95256*FLEN/8, x4, x1, x2) - -inst_31753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x228001ff; valaddr_reg:x3; val_offset:95259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95259*FLEN/8, x4, x1, x2) - -inst_31754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x228003ff; valaddr_reg:x3; val_offset:95262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95262*FLEN/8, x4, x1, x2) - -inst_31755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x228007ff; valaddr_reg:x3; val_offset:95265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95265*FLEN/8, x4, x1, x2) - -inst_31756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22800fff; valaddr_reg:x3; val_offset:95268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95268*FLEN/8, x4, x1, x2) - -inst_31757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22801fff; valaddr_reg:x3; val_offset:95271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95271*FLEN/8, x4, x1, x2) - -inst_31758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22803fff; valaddr_reg:x3; val_offset:95274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95274*FLEN/8, x4, x1, x2) - -inst_31759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22807fff; valaddr_reg:x3; val_offset:95277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95277*FLEN/8, x4, x1, x2) - -inst_31760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x2280ffff; valaddr_reg:x3; val_offset:95280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95280*FLEN/8, x4, x1, x2) - -inst_31761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x2281ffff; valaddr_reg:x3; val_offset:95283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95283*FLEN/8, x4, x1, x2) - -inst_31762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x2283ffff; valaddr_reg:x3; val_offset:95286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95286*FLEN/8, x4, x1, x2) - -inst_31763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x2287ffff; valaddr_reg:x3; val_offset:95289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95289*FLEN/8, x4, x1, x2) - -inst_31764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x228fffff; valaddr_reg:x3; val_offset:95292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95292*FLEN/8, x4, x1, x2) - -inst_31765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x229fffff; valaddr_reg:x3; val_offset:95295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95295*FLEN/8, x4, x1, x2) - -inst_31766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22bfffff; valaddr_reg:x3; val_offset:95298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95298*FLEN/8, x4, x1, x2) - -inst_31767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22c00000; valaddr_reg:x3; val_offset:95301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95301*FLEN/8, x4, x1, x2) - -inst_31768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22e00000; valaddr_reg:x3; val_offset:95304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95304*FLEN/8, x4, x1, x2) - -inst_31769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22f00000; valaddr_reg:x3; val_offset:95307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95307*FLEN/8, x4, x1, x2) - -inst_31770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22f80000; valaddr_reg:x3; val_offset:95310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95310*FLEN/8, x4, x1, x2) - -inst_31771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fc0000; valaddr_reg:x3; val_offset:95313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95313*FLEN/8, x4, x1, x2) - -inst_31772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fe0000; valaddr_reg:x3; val_offset:95316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95316*FLEN/8, x4, x1, x2) - -inst_31773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ff0000; valaddr_reg:x3; val_offset:95319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95319*FLEN/8, x4, x1, x2) - -inst_31774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ff8000; valaddr_reg:x3; val_offset:95322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95322*FLEN/8, x4, x1, x2) - -inst_31775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ffc000; valaddr_reg:x3; val_offset:95325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95325*FLEN/8, x4, x1, x2) - -inst_31776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ffe000; valaddr_reg:x3; val_offset:95328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95328*FLEN/8, x4, x1, x2) - -inst_31777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fff000; valaddr_reg:x3; val_offset:95331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95331*FLEN/8, x4, x1, x2) - -inst_31778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fff800; valaddr_reg:x3; val_offset:95334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95334*FLEN/8, x4, x1, x2) - -inst_31779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fffc00; valaddr_reg:x3; val_offset:95337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95337*FLEN/8, x4, x1, x2) - -inst_31780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fffe00; valaddr_reg:x3; val_offset:95340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95340*FLEN/8, x4, x1, x2) - -inst_31781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ffff00; valaddr_reg:x3; val_offset:95343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95343*FLEN/8, x4, x1, x2) - -inst_31782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ffff80; valaddr_reg:x3; val_offset:95346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95346*FLEN/8, x4, x1, x2) - -inst_31783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ffffc0; valaddr_reg:x3; val_offset:95349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95349*FLEN/8, x4, x1, x2) - -inst_31784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ffffe0; valaddr_reg:x3; val_offset:95352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95352*FLEN/8, x4, x1, x2) - -inst_31785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fffff0; valaddr_reg:x3; val_offset:95355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95355*FLEN/8, x4, x1, x2) - -inst_31786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fffff8; valaddr_reg:x3; val_offset:95358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95358*FLEN/8, x4, x1, x2) - -inst_31787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fffffc; valaddr_reg:x3; val_offset:95361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95361*FLEN/8, x4, x1, x2) - -inst_31788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22fffffe; valaddr_reg:x3; val_offset:95364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95364*FLEN/8, x4, x1, x2) - -inst_31789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x22ffffff; valaddr_reg:x3; val_offset:95367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95367*FLEN/8, x4, x1, x2) - -inst_31790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3f800001; valaddr_reg:x3; val_offset:95370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95370*FLEN/8, x4, x1, x2) - -inst_31791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3f800003; valaddr_reg:x3; val_offset:95373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95373*FLEN/8, x4, x1, x2) - -inst_31792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3f800007; valaddr_reg:x3; val_offset:95376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95376*FLEN/8, x4, x1, x2) - -inst_31793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3f999999; valaddr_reg:x3; val_offset:95379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95379*FLEN/8, x4, x1, x2) - -inst_31794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:95382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95382*FLEN/8, x4, x1, x2) - -inst_31795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:95385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95385*FLEN/8, x4, x1, x2) - -inst_31796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:95388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95388*FLEN/8, x4, x1, x2) - -inst_31797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:95391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95391*FLEN/8, x4, x1, x2) - -inst_31798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:95394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95394*FLEN/8, x4, x1, x2) - -inst_31799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:95397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95397*FLEN/8, x4, x1, x2) - -inst_31800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:95400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95400*FLEN/8, x4, x1, x2) - -inst_31801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:95403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95403*FLEN/8, x4, x1, x2) - -inst_31802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:95406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95406*FLEN/8, x4, x1, x2) - -inst_31803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:95409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95409*FLEN/8, x4, x1, x2) - -inst_31804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:95412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95412*FLEN/8, x4, x1, x2) - -inst_31805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:95415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95415*FLEN/8, x4, x1, x2) - -inst_31806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:95418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95418*FLEN/8, x4, x1, x2) - -inst_31807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:95421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95421*FLEN/8, x4, x1, x2) - -inst_31808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:95424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95424*FLEN/8, x4, x1, x2) - -inst_31809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:95427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95427*FLEN/8, x4, x1, x2) - -inst_31810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:95430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95430*FLEN/8, x4, x1, x2) - -inst_31811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:95433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95433*FLEN/8, x4, x1, x2) - -inst_31812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:95436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95436*FLEN/8, x4, x1, x2) - -inst_31813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:95439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95439*FLEN/8, x4, x1, x2) - -inst_31814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:95442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95442*FLEN/8, x4, x1, x2) - -inst_31815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:95445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95445*FLEN/8, x4, x1, x2) - -inst_31816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:95448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95448*FLEN/8, x4, x1, x2) - -inst_31817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:95451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95451*FLEN/8, x4, x1, x2) - -inst_31818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:95454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95454*FLEN/8, x4, x1, x2) - -inst_31819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:95457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95457*FLEN/8, x4, x1, x2) - -inst_31820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:95460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95460*FLEN/8, x4, x1, x2) - -inst_31821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:95463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95463*FLEN/8, x4, x1, x2) - -inst_31822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2000000; valaddr_reg:x3; val_offset:95466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95466*FLEN/8, x4, x1, x2) - -inst_31823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2000001; valaddr_reg:x3; val_offset:95469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95469*FLEN/8, x4, x1, x2) - -inst_31824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2000003; valaddr_reg:x3; val_offset:95472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95472*FLEN/8, x4, x1, x2) - -inst_31825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2000007; valaddr_reg:x3; val_offset:95475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95475*FLEN/8, x4, x1, x2) - -inst_31826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x200000f; valaddr_reg:x3; val_offset:95478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95478*FLEN/8, x4, x1, x2) - -inst_31827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x200001f; valaddr_reg:x3; val_offset:95481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95481*FLEN/8, x4, x1, x2) - -inst_31828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x200003f; valaddr_reg:x3; val_offset:95484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95484*FLEN/8, x4, x1, x2) - -inst_31829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x200007f; valaddr_reg:x3; val_offset:95487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95487*FLEN/8, x4, x1, x2) - -inst_31830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x20000ff; valaddr_reg:x3; val_offset:95490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95490*FLEN/8, x4, x1, x2) - -inst_31831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x20001ff; valaddr_reg:x3; val_offset:95493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95493*FLEN/8, x4, x1, x2) - -inst_31832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x20003ff; valaddr_reg:x3; val_offset:95496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95496*FLEN/8, x4, x1, x2) - -inst_31833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x20007ff; valaddr_reg:x3; val_offset:95499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95499*FLEN/8, x4, x1, x2) - -inst_31834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2000fff; valaddr_reg:x3; val_offset:95502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95502*FLEN/8, x4, x1, x2) - -inst_31835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2001fff; valaddr_reg:x3; val_offset:95505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95505*FLEN/8, x4, x1, x2) - -inst_31836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2003fff; valaddr_reg:x3; val_offset:95508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95508*FLEN/8, x4, x1, x2) - -inst_31837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2007fff; valaddr_reg:x3; val_offset:95511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95511*FLEN/8, x4, x1, x2) - -inst_31838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x200ffff; valaddr_reg:x3; val_offset:95514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95514*FLEN/8, x4, x1, x2) - -inst_31839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x201ffff; valaddr_reg:x3; val_offset:95517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95517*FLEN/8, x4, x1, x2) - -inst_31840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x203ffff; valaddr_reg:x3; val_offset:95520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95520*FLEN/8, x4, x1, x2) - -inst_31841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x207ffff; valaddr_reg:x3; val_offset:95523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95523*FLEN/8, x4, x1, x2) - -inst_31842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x20fffff; valaddr_reg:x3; val_offset:95526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95526*FLEN/8, x4, x1, x2) - -inst_31843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x21fffff; valaddr_reg:x3; val_offset:95529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95529*FLEN/8, x4, x1, x2) - -inst_31844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x23fffff; valaddr_reg:x3; val_offset:95532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95532*FLEN/8, x4, x1, x2) - -inst_31845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2400000; valaddr_reg:x3; val_offset:95535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95535*FLEN/8, x4, x1, x2) - -inst_31846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2600000; valaddr_reg:x3; val_offset:95538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95538*FLEN/8, x4, x1, x2) - -inst_31847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2700000; valaddr_reg:x3; val_offset:95541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95541*FLEN/8, x4, x1, x2) - -inst_31848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x2780000; valaddr_reg:x3; val_offset:95544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95544*FLEN/8, x4, x1, x2) - -inst_31849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27c0000; valaddr_reg:x3; val_offset:95547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95547*FLEN/8, x4, x1, x2) - -inst_31850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27e0000; valaddr_reg:x3; val_offset:95550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95550*FLEN/8, x4, x1, x2) - -inst_31851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27f0000; valaddr_reg:x3; val_offset:95553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95553*FLEN/8, x4, x1, x2) - -inst_31852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27f8000; valaddr_reg:x3; val_offset:95556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95556*FLEN/8, x4, x1, x2) - -inst_31853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27fc000; valaddr_reg:x3; val_offset:95559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95559*FLEN/8, x4, x1, x2) - -inst_31854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27fe000; valaddr_reg:x3; val_offset:95562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95562*FLEN/8, x4, x1, x2) - -inst_31855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27ff000; valaddr_reg:x3; val_offset:95565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95565*FLEN/8, x4, x1, x2) - -inst_31856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27ff800; valaddr_reg:x3; val_offset:95568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95568*FLEN/8, x4, x1, x2) - -inst_31857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27ffc00; valaddr_reg:x3; val_offset:95571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95571*FLEN/8, x4, x1, x2) - -inst_31858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27ffe00; valaddr_reg:x3; val_offset:95574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95574*FLEN/8, x4, x1, x2) - -inst_31859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27fff00; valaddr_reg:x3; val_offset:95577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95577*FLEN/8, x4, x1, x2) - -inst_31860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27fff80; valaddr_reg:x3; val_offset:95580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95580*FLEN/8, x4, x1, x2) - -inst_31861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27fffc0; valaddr_reg:x3; val_offset:95583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95583*FLEN/8, x4, x1, x2) - -inst_31862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27fffe0; valaddr_reg:x3; val_offset:95586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95586*FLEN/8, x4, x1, x2) - -inst_31863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27ffff0; valaddr_reg:x3; val_offset:95589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95589*FLEN/8, x4, x1, x2) - -inst_31864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27ffff8; valaddr_reg:x3; val_offset:95592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95592*FLEN/8, x4, x1, x2) - -inst_31865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27ffffc; valaddr_reg:x3; val_offset:95595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95595*FLEN/8, x4, x1, x2) - -inst_31866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27ffffe; valaddr_reg:x3; val_offset:95598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95598*FLEN/8, x4, x1, x2) - -inst_31867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; -op3val:0x27fffff; valaddr_reg:x3; val_offset:95601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95601*FLEN/8, x4, x1, x2) - -inst_31868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35800000; valaddr_reg:x3; val_offset:95604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95604*FLEN/8, x4, x1, x2) - -inst_31869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35800001; valaddr_reg:x3; val_offset:95607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95607*FLEN/8, x4, x1, x2) - -inst_31870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35800003; valaddr_reg:x3; val_offset:95610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95610*FLEN/8, x4, x1, x2) - -inst_31871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35800007; valaddr_reg:x3; val_offset:95613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95613*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_250) - -inst_31872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3580000f; valaddr_reg:x3; val_offset:95616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95616*FLEN/8, x4, x1, x2) - -inst_31873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3580001f; valaddr_reg:x3; val_offset:95619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95619*FLEN/8, x4, x1, x2) - -inst_31874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3580003f; valaddr_reg:x3; val_offset:95622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95622*FLEN/8, x4, x1, x2) - -inst_31875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3580007f; valaddr_reg:x3; val_offset:95625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95625*FLEN/8, x4, x1, x2) - -inst_31876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x358000ff; valaddr_reg:x3; val_offset:95628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95628*FLEN/8, x4, x1, x2) - -inst_31877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x358001ff; valaddr_reg:x3; val_offset:95631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95631*FLEN/8, x4, x1, x2) - -inst_31878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x358003ff; valaddr_reg:x3; val_offset:95634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95634*FLEN/8, x4, x1, x2) - -inst_31879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x358007ff; valaddr_reg:x3; val_offset:95637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95637*FLEN/8, x4, x1, x2) - -inst_31880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35800fff; valaddr_reg:x3; val_offset:95640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95640*FLEN/8, x4, x1, x2) - -inst_31881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35801fff; valaddr_reg:x3; val_offset:95643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95643*FLEN/8, x4, x1, x2) - -inst_31882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35803fff; valaddr_reg:x3; val_offset:95646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95646*FLEN/8, x4, x1, x2) - -inst_31883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35807fff; valaddr_reg:x3; val_offset:95649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95649*FLEN/8, x4, x1, x2) - -inst_31884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3580ffff; valaddr_reg:x3; val_offset:95652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95652*FLEN/8, x4, x1, x2) - -inst_31885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3581ffff; valaddr_reg:x3; val_offset:95655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95655*FLEN/8, x4, x1, x2) - -inst_31886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3583ffff; valaddr_reg:x3; val_offset:95658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95658*FLEN/8, x4, x1, x2) - -inst_31887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3587ffff; valaddr_reg:x3; val_offset:95661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95661*FLEN/8, x4, x1, x2) - -inst_31888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x358fffff; valaddr_reg:x3; val_offset:95664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95664*FLEN/8, x4, x1, x2) - -inst_31889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x359fffff; valaddr_reg:x3; val_offset:95667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95667*FLEN/8, x4, x1, x2) - -inst_31890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35bfffff; valaddr_reg:x3; val_offset:95670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95670*FLEN/8, x4, x1, x2) - -inst_31891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35c00000; valaddr_reg:x3; val_offset:95673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95673*FLEN/8, x4, x1, x2) - -inst_31892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35e00000; valaddr_reg:x3; val_offset:95676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95676*FLEN/8, x4, x1, x2) - -inst_31893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35f00000; valaddr_reg:x3; val_offset:95679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95679*FLEN/8, x4, x1, x2) - -inst_31894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35f80000; valaddr_reg:x3; val_offset:95682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95682*FLEN/8, x4, x1, x2) - -inst_31895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fc0000; valaddr_reg:x3; val_offset:95685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95685*FLEN/8, x4, x1, x2) - -inst_31896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fe0000; valaddr_reg:x3; val_offset:95688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95688*FLEN/8, x4, x1, x2) - -inst_31897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ff0000; valaddr_reg:x3; val_offset:95691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95691*FLEN/8, x4, x1, x2) - -inst_31898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ff8000; valaddr_reg:x3; val_offset:95694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95694*FLEN/8, x4, x1, x2) - -inst_31899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ffc000; valaddr_reg:x3; val_offset:95697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95697*FLEN/8, x4, x1, x2) - -inst_31900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ffe000; valaddr_reg:x3; val_offset:95700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95700*FLEN/8, x4, x1, x2) - -inst_31901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fff000; valaddr_reg:x3; val_offset:95703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95703*FLEN/8, x4, x1, x2) - -inst_31902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fff800; valaddr_reg:x3; val_offset:95706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95706*FLEN/8, x4, x1, x2) - -inst_31903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fffc00; valaddr_reg:x3; val_offset:95709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95709*FLEN/8, x4, x1, x2) - -inst_31904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fffe00; valaddr_reg:x3; val_offset:95712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95712*FLEN/8, x4, x1, x2) - -inst_31905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ffff00; valaddr_reg:x3; val_offset:95715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95715*FLEN/8, x4, x1, x2) - -inst_31906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ffff80; valaddr_reg:x3; val_offset:95718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95718*FLEN/8, x4, x1, x2) - -inst_31907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ffffc0; valaddr_reg:x3; val_offset:95721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95721*FLEN/8, x4, x1, x2) - -inst_31908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ffffe0; valaddr_reg:x3; val_offset:95724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95724*FLEN/8, x4, x1, x2) - -inst_31909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fffff0; valaddr_reg:x3; val_offset:95727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95727*FLEN/8, x4, x1, x2) - -inst_31910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fffff8; valaddr_reg:x3; val_offset:95730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95730*FLEN/8, x4, x1, x2) - -inst_31911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fffffc; valaddr_reg:x3; val_offset:95733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95733*FLEN/8, x4, x1, x2) - -inst_31912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35fffffe; valaddr_reg:x3; val_offset:95736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95736*FLEN/8, x4, x1, x2) - -inst_31913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x35ffffff; valaddr_reg:x3; val_offset:95739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95739*FLEN/8, x4, x1, x2) - -inst_31914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3f800001; valaddr_reg:x3; val_offset:95742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95742*FLEN/8, x4, x1, x2) - -inst_31915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3f800003; valaddr_reg:x3; val_offset:95745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95745*FLEN/8, x4, x1, x2) - -inst_31916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3f800007; valaddr_reg:x3; val_offset:95748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95748*FLEN/8, x4, x1, x2) - -inst_31917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3f999999; valaddr_reg:x3; val_offset:95751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95751*FLEN/8, x4, x1, x2) - -inst_31918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:95754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95754*FLEN/8, x4, x1, x2) - -inst_31919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:95757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95757*FLEN/8, x4, x1, x2) - -inst_31920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:95760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95760*FLEN/8, x4, x1, x2) - -inst_31921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:95763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95763*FLEN/8, x4, x1, x2) - -inst_31922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:95766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95766*FLEN/8, x4, x1, x2) - -inst_31923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:95769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95769*FLEN/8, x4, x1, x2) - -inst_31924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:95772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95772*FLEN/8, x4, x1, x2) - -inst_31925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:95775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95775*FLEN/8, x4, x1, x2) - -inst_31926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:95778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95778*FLEN/8, x4, x1, x2) - -inst_31927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:95781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95781*FLEN/8, x4, x1, x2) - -inst_31928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:95784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95784*FLEN/8, x4, x1, x2) - -inst_31929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:95787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95787*FLEN/8, x4, x1, x2) - -inst_31930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64000000; valaddr_reg:x3; val_offset:95790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95790*FLEN/8, x4, x1, x2) - -inst_31931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64000001; valaddr_reg:x3; val_offset:95793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95793*FLEN/8, x4, x1, x2) - -inst_31932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64000003; valaddr_reg:x3; val_offset:95796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95796*FLEN/8, x4, x1, x2) - -inst_31933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64000007; valaddr_reg:x3; val_offset:95799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95799*FLEN/8, x4, x1, x2) - -inst_31934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x6400000f; valaddr_reg:x3; val_offset:95802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95802*FLEN/8, x4, x1, x2) - -inst_31935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x6400001f; valaddr_reg:x3; val_offset:95805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95805*FLEN/8, x4, x1, x2) - -inst_31936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x6400003f; valaddr_reg:x3; val_offset:95808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95808*FLEN/8, x4, x1, x2) - -inst_31937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x6400007f; valaddr_reg:x3; val_offset:95811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95811*FLEN/8, x4, x1, x2) - -inst_31938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x640000ff; valaddr_reg:x3; val_offset:95814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95814*FLEN/8, x4, x1, x2) - -inst_31939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x640001ff; valaddr_reg:x3; val_offset:95817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95817*FLEN/8, x4, x1, x2) - -inst_31940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x640003ff; valaddr_reg:x3; val_offset:95820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95820*FLEN/8, x4, x1, x2) - -inst_31941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x640007ff; valaddr_reg:x3; val_offset:95823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95823*FLEN/8, x4, x1, x2) - -inst_31942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64000fff; valaddr_reg:x3; val_offset:95826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95826*FLEN/8, x4, x1, x2) - -inst_31943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64001fff; valaddr_reg:x3; val_offset:95829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95829*FLEN/8, x4, x1, x2) - -inst_31944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64003fff; valaddr_reg:x3; val_offset:95832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95832*FLEN/8, x4, x1, x2) - -inst_31945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64007fff; valaddr_reg:x3; val_offset:95835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95835*FLEN/8, x4, x1, x2) - -inst_31946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x6400ffff; valaddr_reg:x3; val_offset:95838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95838*FLEN/8, x4, x1, x2) - -inst_31947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x6401ffff; valaddr_reg:x3; val_offset:95841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95841*FLEN/8, x4, x1, x2) - -inst_31948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x6403ffff; valaddr_reg:x3; val_offset:95844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95844*FLEN/8, x4, x1, x2) - -inst_31949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x6407ffff; valaddr_reg:x3; val_offset:95847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95847*FLEN/8, x4, x1, x2) - -inst_31950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x640fffff; valaddr_reg:x3; val_offset:95850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95850*FLEN/8, x4, x1, x2) - -inst_31951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x641fffff; valaddr_reg:x3; val_offset:95853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95853*FLEN/8, x4, x1, x2) - -inst_31952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x643fffff; valaddr_reg:x3; val_offset:95856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95856*FLEN/8, x4, x1, x2) - -inst_31953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64400000; valaddr_reg:x3; val_offset:95859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95859*FLEN/8, x4, x1, x2) - -inst_31954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64600000; valaddr_reg:x3; val_offset:95862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95862*FLEN/8, x4, x1, x2) - -inst_31955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64700000; valaddr_reg:x3; val_offset:95865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95865*FLEN/8, x4, x1, x2) - -inst_31956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x64780000; valaddr_reg:x3; val_offset:95868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95868*FLEN/8, x4, x1, x2) - -inst_31957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647c0000; valaddr_reg:x3; val_offset:95871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95871*FLEN/8, x4, x1, x2) - -inst_31958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647e0000; valaddr_reg:x3; val_offset:95874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95874*FLEN/8, x4, x1, x2) - -inst_31959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647f0000; valaddr_reg:x3; val_offset:95877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95877*FLEN/8, x4, x1, x2) - -inst_31960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647f8000; valaddr_reg:x3; val_offset:95880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95880*FLEN/8, x4, x1, x2) - -inst_31961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647fc000; valaddr_reg:x3; val_offset:95883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95883*FLEN/8, x4, x1, x2) - -inst_31962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647fe000; valaddr_reg:x3; val_offset:95886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95886*FLEN/8, x4, x1, x2) - -inst_31963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647ff000; valaddr_reg:x3; val_offset:95889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95889*FLEN/8, x4, x1, x2) - -inst_31964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647ff800; valaddr_reg:x3; val_offset:95892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95892*FLEN/8, x4, x1, x2) - -inst_31965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647ffc00; valaddr_reg:x3; val_offset:95895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95895*FLEN/8, x4, x1, x2) - -inst_31966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647ffe00; valaddr_reg:x3; val_offset:95898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95898*FLEN/8, x4, x1, x2) - -inst_31967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647fff00; valaddr_reg:x3; val_offset:95901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95901*FLEN/8, x4, x1, x2) - -inst_31968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647fff80; valaddr_reg:x3; val_offset:95904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95904*FLEN/8, x4, x1, x2) - -inst_31969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647fffc0; valaddr_reg:x3; val_offset:95907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95907*FLEN/8, x4, x1, x2) - -inst_31970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647fffe0; valaddr_reg:x3; val_offset:95910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95910*FLEN/8, x4, x1, x2) - -inst_31971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647ffff0; valaddr_reg:x3; val_offset:95913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95913*FLEN/8, x4, x1, x2) - -inst_31972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647ffff8; valaddr_reg:x3; val_offset:95916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95916*FLEN/8, x4, x1, x2) - -inst_31973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647ffffc; valaddr_reg:x3; val_offset:95919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95919*FLEN/8, x4, x1, x2) - -inst_31974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647ffffe; valaddr_reg:x3; val_offset:95922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95922*FLEN/8, x4, x1, x2) - -inst_31975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x647fffff; valaddr_reg:x3; val_offset:95925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95925*FLEN/8, x4, x1, x2) - -inst_31976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f000001; valaddr_reg:x3; val_offset:95928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95928*FLEN/8, x4, x1, x2) - -inst_31977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f000003; valaddr_reg:x3; val_offset:95931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95931*FLEN/8, x4, x1, x2) - -inst_31978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f000007; valaddr_reg:x3; val_offset:95934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95934*FLEN/8, x4, x1, x2) - -inst_31979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f199999; valaddr_reg:x3; val_offset:95937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95937*FLEN/8, x4, x1, x2) - -inst_31980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f249249; valaddr_reg:x3; val_offset:95940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95940*FLEN/8, x4, x1, x2) - -inst_31981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f333333; valaddr_reg:x3; val_offset:95943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95943*FLEN/8, x4, x1, x2) - -inst_31982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:95946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95946*FLEN/8, x4, x1, x2) - -inst_31983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:95949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95949*FLEN/8, x4, x1, x2) - -inst_31984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f444444; valaddr_reg:x3; val_offset:95952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95952*FLEN/8, x4, x1, x2) - -inst_31985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:95955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95955*FLEN/8, x4, x1, x2) - -inst_31986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:95958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95958*FLEN/8, x4, x1, x2) - -inst_31987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f666666; valaddr_reg:x3; val_offset:95961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95961*FLEN/8, x4, x1, x2) - -inst_31988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:95964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95964*FLEN/8, x4, x1, x2) - -inst_31989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:95967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95967*FLEN/8, x4, x1, x2) - -inst_31990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:95970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95970*FLEN/8, x4, x1, x2) - -inst_31991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:95973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95973*FLEN/8, x4, x1, x2) - -inst_31992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37000000; valaddr_reg:x3; val_offset:95976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95976*FLEN/8, x4, x1, x2) - -inst_31993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37000001; valaddr_reg:x3; val_offset:95979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95979*FLEN/8, x4, x1, x2) - -inst_31994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37000003; valaddr_reg:x3; val_offset:95982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95982*FLEN/8, x4, x1, x2) - -inst_31995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37000007; valaddr_reg:x3; val_offset:95985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95985*FLEN/8, x4, x1, x2) - -inst_31996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3700000f; valaddr_reg:x3; val_offset:95988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95988*FLEN/8, x4, x1, x2) - -inst_31997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3700001f; valaddr_reg:x3; val_offset:95991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95991*FLEN/8, x4, x1, x2) - -inst_31998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3700003f; valaddr_reg:x3; val_offset:95994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95994*FLEN/8, x4, x1, x2) - -inst_31999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3700007f; valaddr_reg:x3; val_offset:95997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95997*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_251) - -inst_32000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x370000ff; valaddr_reg:x3; val_offset:96000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96000*FLEN/8, x4, x1, x2) - -inst_32001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x370001ff; valaddr_reg:x3; val_offset:96003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96003*FLEN/8, x4, x1, x2) - -inst_32002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x370003ff; valaddr_reg:x3; val_offset:96006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96006*FLEN/8, x4, x1, x2) - -inst_32003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x370007ff; valaddr_reg:x3; val_offset:96009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96009*FLEN/8, x4, x1, x2) - -inst_32004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37000fff; valaddr_reg:x3; val_offset:96012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96012*FLEN/8, x4, x1, x2) - -inst_32005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37001fff; valaddr_reg:x3; val_offset:96015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96015*FLEN/8, x4, x1, x2) - -inst_32006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37003fff; valaddr_reg:x3; val_offset:96018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96018*FLEN/8, x4, x1, x2) - -inst_32007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37007fff; valaddr_reg:x3; val_offset:96021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96021*FLEN/8, x4, x1, x2) - -inst_32008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3700ffff; valaddr_reg:x3; val_offset:96024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96024*FLEN/8, x4, x1, x2) - -inst_32009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3701ffff; valaddr_reg:x3; val_offset:96027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96027*FLEN/8, x4, x1, x2) - -inst_32010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3703ffff; valaddr_reg:x3; val_offset:96030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96030*FLEN/8, x4, x1, x2) - -inst_32011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3707ffff; valaddr_reg:x3; val_offset:96033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96033*FLEN/8, x4, x1, x2) - -inst_32012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x370fffff; valaddr_reg:x3; val_offset:96036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96036*FLEN/8, x4, x1, x2) - -inst_32013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x371fffff; valaddr_reg:x3; val_offset:96039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96039*FLEN/8, x4, x1, x2) - -inst_32014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x373fffff; valaddr_reg:x3; val_offset:96042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96042*FLEN/8, x4, x1, x2) - -inst_32015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37400000; valaddr_reg:x3; val_offset:96045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96045*FLEN/8, x4, x1, x2) - -inst_32016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37600000; valaddr_reg:x3; val_offset:96048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96048*FLEN/8, x4, x1, x2) - -inst_32017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37700000; valaddr_reg:x3; val_offset:96051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96051*FLEN/8, x4, x1, x2) - -inst_32018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x37780000; valaddr_reg:x3; val_offset:96054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96054*FLEN/8, x4, x1, x2) - -inst_32019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377c0000; valaddr_reg:x3; val_offset:96057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96057*FLEN/8, x4, x1, x2) - -inst_32020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377e0000; valaddr_reg:x3; val_offset:96060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96060*FLEN/8, x4, x1, x2) - -inst_32021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377f0000; valaddr_reg:x3; val_offset:96063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96063*FLEN/8, x4, x1, x2) - -inst_32022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377f8000; valaddr_reg:x3; val_offset:96066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96066*FLEN/8, x4, x1, x2) - -inst_32023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377fc000; valaddr_reg:x3; val_offset:96069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96069*FLEN/8, x4, x1, x2) - -inst_32024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377fe000; valaddr_reg:x3; val_offset:96072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96072*FLEN/8, x4, x1, x2) - -inst_32025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377ff000; valaddr_reg:x3; val_offset:96075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96075*FLEN/8, x4, x1, x2) - -inst_32026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377ff800; valaddr_reg:x3; val_offset:96078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96078*FLEN/8, x4, x1, x2) - -inst_32027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377ffc00; valaddr_reg:x3; val_offset:96081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96081*FLEN/8, x4, x1, x2) - -inst_32028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377ffe00; valaddr_reg:x3; val_offset:96084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96084*FLEN/8, x4, x1, x2) - -inst_32029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377fff00; valaddr_reg:x3; val_offset:96087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96087*FLEN/8, x4, x1, x2) - -inst_32030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377fff80; valaddr_reg:x3; val_offset:96090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96090*FLEN/8, x4, x1, x2) - -inst_32031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377fffc0; valaddr_reg:x3; val_offset:96093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96093*FLEN/8, x4, x1, x2) - -inst_32032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377fffe0; valaddr_reg:x3; val_offset:96096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96096*FLEN/8, x4, x1, x2) - -inst_32033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377ffff0; valaddr_reg:x3; val_offset:96099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96099*FLEN/8, x4, x1, x2) - -inst_32034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377ffff8; valaddr_reg:x3; val_offset:96102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96102*FLEN/8, x4, x1, x2) - -inst_32035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377ffffc; valaddr_reg:x3; val_offset:96105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96105*FLEN/8, x4, x1, x2) - -inst_32036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377ffffe; valaddr_reg:x3; val_offset:96108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96108*FLEN/8, x4, x1, x2) - -inst_32037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x377fffff; valaddr_reg:x3; val_offset:96111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96111*FLEN/8, x4, x1, x2) - -inst_32038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3f800001; valaddr_reg:x3; val_offset:96114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96114*FLEN/8, x4, x1, x2) - -inst_32039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3f800003; valaddr_reg:x3; val_offset:96117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96117*FLEN/8, x4, x1, x2) - -inst_32040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3f800007; valaddr_reg:x3; val_offset:96120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96120*FLEN/8, x4, x1, x2) - -inst_32041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3f999999; valaddr_reg:x3; val_offset:96123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96123*FLEN/8, x4, x1, x2) - -inst_32042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:96126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96126*FLEN/8, x4, x1, x2) - -inst_32043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:96129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96129*FLEN/8, x4, x1, x2) - -inst_32044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:96132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96132*FLEN/8, x4, x1, x2) - -inst_32045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:96135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96135*FLEN/8, x4, x1, x2) - -inst_32046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:96138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96138*FLEN/8, x4, x1, x2) - -inst_32047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:96141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96141*FLEN/8, x4, x1, x2) - -inst_32048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:96144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96144*FLEN/8, x4, x1, x2) - -inst_32049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:96147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96147*FLEN/8, x4, x1, x2) - -inst_32050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:96150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96150*FLEN/8, x4, x1, x2) - -inst_32051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:96153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96153*FLEN/8, x4, x1, x2) - -inst_32052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:96156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96156*FLEN/8, x4, x1, x2) - -inst_32053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:96159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96159*FLEN/8, x4, x1, x2) - -inst_32054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d000000; valaddr_reg:x3; val_offset:96162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96162*FLEN/8, x4, x1, x2) - -inst_32055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d000001; valaddr_reg:x3; val_offset:96165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96165*FLEN/8, x4, x1, x2) - -inst_32056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d000003; valaddr_reg:x3; val_offset:96168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96168*FLEN/8, x4, x1, x2) - -inst_32057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d000007; valaddr_reg:x3; val_offset:96171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96171*FLEN/8, x4, x1, x2) - -inst_32058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d00000f; valaddr_reg:x3; val_offset:96174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96174*FLEN/8, x4, x1, x2) - -inst_32059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d00001f; valaddr_reg:x3; val_offset:96177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96177*FLEN/8, x4, x1, x2) - -inst_32060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d00003f; valaddr_reg:x3; val_offset:96180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96180*FLEN/8, x4, x1, x2) - -inst_32061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d00007f; valaddr_reg:x3; val_offset:96183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96183*FLEN/8, x4, x1, x2) - -inst_32062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d0000ff; valaddr_reg:x3; val_offset:96186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96186*FLEN/8, x4, x1, x2) - -inst_32063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d0001ff; valaddr_reg:x3; val_offset:96189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96189*FLEN/8, x4, x1, x2) - -inst_32064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d0003ff; valaddr_reg:x3; val_offset:96192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96192*FLEN/8, x4, x1, x2) - -inst_32065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d0007ff; valaddr_reg:x3; val_offset:96195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96195*FLEN/8, x4, x1, x2) - -inst_32066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d000fff; valaddr_reg:x3; val_offset:96198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96198*FLEN/8, x4, x1, x2) - -inst_32067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d001fff; valaddr_reg:x3; val_offset:96201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96201*FLEN/8, x4, x1, x2) - -inst_32068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d003fff; valaddr_reg:x3; val_offset:96204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96204*FLEN/8, x4, x1, x2) - -inst_32069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d007fff; valaddr_reg:x3; val_offset:96207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96207*FLEN/8, x4, x1, x2) - -inst_32070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d00ffff; valaddr_reg:x3; val_offset:96210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96210*FLEN/8, x4, x1, x2) - -inst_32071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d01ffff; valaddr_reg:x3; val_offset:96213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96213*FLEN/8, x4, x1, x2) - -inst_32072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d03ffff; valaddr_reg:x3; val_offset:96216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96216*FLEN/8, x4, x1, x2) - -inst_32073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d07ffff; valaddr_reg:x3; val_offset:96219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96219*FLEN/8, x4, x1, x2) - -inst_32074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d0fffff; valaddr_reg:x3; val_offset:96222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96222*FLEN/8, x4, x1, x2) - -inst_32075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d1fffff; valaddr_reg:x3; val_offset:96225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96225*FLEN/8, x4, x1, x2) - -inst_32076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d3fffff; valaddr_reg:x3; val_offset:96228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96228*FLEN/8, x4, x1, x2) - -inst_32077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d400000; valaddr_reg:x3; val_offset:96231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96231*FLEN/8, x4, x1, x2) - -inst_32078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d600000; valaddr_reg:x3; val_offset:96234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96234*FLEN/8, x4, x1, x2) - -inst_32079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d700000; valaddr_reg:x3; val_offset:96237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96237*FLEN/8, x4, x1, x2) - -inst_32080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d780000; valaddr_reg:x3; val_offset:96240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96240*FLEN/8, x4, x1, x2) - -inst_32081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7c0000; valaddr_reg:x3; val_offset:96243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96243*FLEN/8, x4, x1, x2) - -inst_32082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7e0000; valaddr_reg:x3; val_offset:96246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96246*FLEN/8, x4, x1, x2) - -inst_32083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7f0000; valaddr_reg:x3; val_offset:96249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96249*FLEN/8, x4, x1, x2) - -inst_32084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7f8000; valaddr_reg:x3; val_offset:96252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96252*FLEN/8, x4, x1, x2) - -inst_32085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7fc000; valaddr_reg:x3; val_offset:96255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96255*FLEN/8, x4, x1, x2) - -inst_32086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7fe000; valaddr_reg:x3; val_offset:96258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96258*FLEN/8, x4, x1, x2) - -inst_32087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7ff000; valaddr_reg:x3; val_offset:96261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96261*FLEN/8, x4, x1, x2) - -inst_32088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7ff800; valaddr_reg:x3; val_offset:96264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96264*FLEN/8, x4, x1, x2) - -inst_32089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7ffc00; valaddr_reg:x3; val_offset:96267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96267*FLEN/8, x4, x1, x2) - -inst_32090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7ffe00; valaddr_reg:x3; val_offset:96270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96270*FLEN/8, x4, x1, x2) - -inst_32091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7fff00; valaddr_reg:x3; val_offset:96273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96273*FLEN/8, x4, x1, x2) - -inst_32092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7fff80; valaddr_reg:x3; val_offset:96276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96276*FLEN/8, x4, x1, x2) - -inst_32093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7fffc0; valaddr_reg:x3; val_offset:96279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96279*FLEN/8, x4, x1, x2) - -inst_32094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7fffe0; valaddr_reg:x3; val_offset:96282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96282*FLEN/8, x4, x1, x2) - -inst_32095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7ffff0; valaddr_reg:x3; val_offset:96285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96285*FLEN/8, x4, x1, x2) - -inst_32096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7ffff8; valaddr_reg:x3; val_offset:96288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96288*FLEN/8, x4, x1, x2) - -inst_32097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7ffffc; valaddr_reg:x3; val_offset:96291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96291*FLEN/8, x4, x1, x2) - -inst_32098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7ffffe; valaddr_reg:x3; val_offset:96294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96294*FLEN/8, x4, x1, x2) - -inst_32099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3d7fffff; valaddr_reg:x3; val_offset:96297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96297*FLEN/8, x4, x1, x2) - -inst_32100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3f800001; valaddr_reg:x3; val_offset:96300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96300*FLEN/8, x4, x1, x2) - -inst_32101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3f800003; valaddr_reg:x3; val_offset:96303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96303*FLEN/8, x4, x1, x2) - -inst_32102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3f800007; valaddr_reg:x3; val_offset:96306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96306*FLEN/8, x4, x1, x2) - -inst_32103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3f999999; valaddr_reg:x3; val_offset:96309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96309*FLEN/8, x4, x1, x2) - -inst_32104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:96312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96312*FLEN/8, x4, x1, x2) - -inst_32105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:96315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96315*FLEN/8, x4, x1, x2) - -inst_32106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:96318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96318*FLEN/8, x4, x1, x2) - -inst_32107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:96321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96321*FLEN/8, x4, x1, x2) - -inst_32108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:96324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96324*FLEN/8, x4, x1, x2) - -inst_32109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:96327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96327*FLEN/8, x4, x1, x2) - -inst_32110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:96330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96330*FLEN/8, x4, x1, x2) - -inst_32111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:96333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96333*FLEN/8, x4, x1, x2) - -inst_32112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:96336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96336*FLEN/8, x4, x1, x2) - -inst_32113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:96339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96339*FLEN/8, x4, x1, x2) - -inst_32114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:96342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96342*FLEN/8, x4, x1, x2) - -inst_32115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:96345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96345*FLEN/8, x4, x1, x2) - -inst_32116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4000000; valaddr_reg:x3; val_offset:96348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96348*FLEN/8, x4, x1, x2) - -inst_32117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4000001; valaddr_reg:x3; val_offset:96351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96351*FLEN/8, x4, x1, x2) - -inst_32118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4000003; valaddr_reg:x3; val_offset:96354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96354*FLEN/8, x4, x1, x2) - -inst_32119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4000007; valaddr_reg:x3; val_offset:96357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96357*FLEN/8, x4, x1, x2) - -inst_32120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb400000f; valaddr_reg:x3; val_offset:96360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96360*FLEN/8, x4, x1, x2) - -inst_32121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb400001f; valaddr_reg:x3; val_offset:96363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96363*FLEN/8, x4, x1, x2) - -inst_32122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb400003f; valaddr_reg:x3; val_offset:96366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96366*FLEN/8, x4, x1, x2) - -inst_32123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb400007f; valaddr_reg:x3; val_offset:96369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96369*FLEN/8, x4, x1, x2) - -inst_32124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb40000ff; valaddr_reg:x3; val_offset:96372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96372*FLEN/8, x4, x1, x2) - -inst_32125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb40001ff; valaddr_reg:x3; val_offset:96375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96375*FLEN/8, x4, x1, x2) - -inst_32126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb40003ff; valaddr_reg:x3; val_offset:96378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96378*FLEN/8, x4, x1, x2) - -inst_32127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb40007ff; valaddr_reg:x3; val_offset:96381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96381*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_252) - -inst_32128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4000fff; valaddr_reg:x3; val_offset:96384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96384*FLEN/8, x4, x1, x2) - -inst_32129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4001fff; valaddr_reg:x3; val_offset:96387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96387*FLEN/8, x4, x1, x2) - -inst_32130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4003fff; valaddr_reg:x3; val_offset:96390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96390*FLEN/8, x4, x1, x2) - -inst_32131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4007fff; valaddr_reg:x3; val_offset:96393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96393*FLEN/8, x4, x1, x2) - -inst_32132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb400ffff; valaddr_reg:x3; val_offset:96396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96396*FLEN/8, x4, x1, x2) - -inst_32133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb401ffff; valaddr_reg:x3; val_offset:96399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96399*FLEN/8, x4, x1, x2) - -inst_32134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb403ffff; valaddr_reg:x3; val_offset:96402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96402*FLEN/8, x4, x1, x2) - -inst_32135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb407ffff; valaddr_reg:x3; val_offset:96405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96405*FLEN/8, x4, x1, x2) - -inst_32136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb40fffff; valaddr_reg:x3; val_offset:96408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96408*FLEN/8, x4, x1, x2) - -inst_32137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb41fffff; valaddr_reg:x3; val_offset:96411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96411*FLEN/8, x4, x1, x2) - -inst_32138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb43fffff; valaddr_reg:x3; val_offset:96414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96414*FLEN/8, x4, x1, x2) - -inst_32139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4400000; valaddr_reg:x3; val_offset:96417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96417*FLEN/8, x4, x1, x2) - -inst_32140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4600000; valaddr_reg:x3; val_offset:96420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96420*FLEN/8, x4, x1, x2) - -inst_32141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4700000; valaddr_reg:x3; val_offset:96423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96423*FLEN/8, x4, x1, x2) - -inst_32142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb4780000; valaddr_reg:x3; val_offset:96426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96426*FLEN/8, x4, x1, x2) - -inst_32143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47c0000; valaddr_reg:x3; val_offset:96429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96429*FLEN/8, x4, x1, x2) - -inst_32144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47e0000; valaddr_reg:x3; val_offset:96432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96432*FLEN/8, x4, x1, x2) - -inst_32145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47f0000; valaddr_reg:x3; val_offset:96435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96435*FLEN/8, x4, x1, x2) - -inst_32146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47f8000; valaddr_reg:x3; val_offset:96438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96438*FLEN/8, x4, x1, x2) - -inst_32147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47fc000; valaddr_reg:x3; val_offset:96441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96441*FLEN/8, x4, x1, x2) - -inst_32148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47fe000; valaddr_reg:x3; val_offset:96444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96444*FLEN/8, x4, x1, x2) - -inst_32149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47ff000; valaddr_reg:x3; val_offset:96447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96447*FLEN/8, x4, x1, x2) - -inst_32150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47ff800; valaddr_reg:x3; val_offset:96450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96450*FLEN/8, x4, x1, x2) - -inst_32151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47ffc00; valaddr_reg:x3; val_offset:96453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96453*FLEN/8, x4, x1, x2) - -inst_32152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47ffe00; valaddr_reg:x3; val_offset:96456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96456*FLEN/8, x4, x1, x2) - -inst_32153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47fff00; valaddr_reg:x3; val_offset:96459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96459*FLEN/8, x4, x1, x2) - -inst_32154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47fff80; valaddr_reg:x3; val_offset:96462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96462*FLEN/8, x4, x1, x2) - -inst_32155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47fffc0; valaddr_reg:x3; val_offset:96465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96465*FLEN/8, x4, x1, x2) - -inst_32156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47fffe0; valaddr_reg:x3; val_offset:96468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96468*FLEN/8, x4, x1, x2) - -inst_32157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47ffff0; valaddr_reg:x3; val_offset:96471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96471*FLEN/8, x4, x1, x2) - -inst_32158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47ffff8; valaddr_reg:x3; val_offset:96474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96474*FLEN/8, x4, x1, x2) - -inst_32159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47ffffc; valaddr_reg:x3; val_offset:96477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96477*FLEN/8, x4, x1, x2) - -inst_32160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47ffffe; valaddr_reg:x3; val_offset:96480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96480*FLEN/8, x4, x1, x2) - -inst_32161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xb47fffff; valaddr_reg:x3; val_offset:96483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96483*FLEN/8, x4, x1, x2) - -inst_32162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbf800001; valaddr_reg:x3; val_offset:96486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96486*FLEN/8, x4, x1, x2) - -inst_32163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbf800003; valaddr_reg:x3; val_offset:96489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96489*FLEN/8, x4, x1, x2) - -inst_32164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbf800007; valaddr_reg:x3; val_offset:96492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96492*FLEN/8, x4, x1, x2) - -inst_32165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbf999999; valaddr_reg:x3; val_offset:96495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96495*FLEN/8, x4, x1, x2) - -inst_32166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:96498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96498*FLEN/8, x4, x1, x2) - -inst_32167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:96501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96501*FLEN/8, x4, x1, x2) - -inst_32168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:96504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96504*FLEN/8, x4, x1, x2) - -inst_32169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:96507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96507*FLEN/8, x4, x1, x2) - -inst_32170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:96510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96510*FLEN/8, x4, x1, x2) - -inst_32171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:96513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96513*FLEN/8, x4, x1, x2) - -inst_32172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:96516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96516*FLEN/8, x4, x1, x2) - -inst_32173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:96519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96519*FLEN/8, x4, x1, x2) - -inst_32174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:96522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96522*FLEN/8, x4, x1, x2) - -inst_32175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:96525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96525*FLEN/8, x4, x1, x2) - -inst_32176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:96528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96528*FLEN/8, x4, x1, x2) - -inst_32177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:96531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96531*FLEN/8, x4, x1, x2) - -inst_32178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0000000; valaddr_reg:x3; val_offset:96534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96534*FLEN/8, x4, x1, x2) - -inst_32179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0000001; valaddr_reg:x3; val_offset:96537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96537*FLEN/8, x4, x1, x2) - -inst_32180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0000003; valaddr_reg:x3; val_offset:96540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96540*FLEN/8, x4, x1, x2) - -inst_32181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0000007; valaddr_reg:x3; val_offset:96543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96543*FLEN/8, x4, x1, x2) - -inst_32182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb000000f; valaddr_reg:x3; val_offset:96546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96546*FLEN/8, x4, x1, x2) - -inst_32183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb000001f; valaddr_reg:x3; val_offset:96549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96549*FLEN/8, x4, x1, x2) - -inst_32184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb000003f; valaddr_reg:x3; val_offset:96552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96552*FLEN/8, x4, x1, x2) - -inst_32185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb000007f; valaddr_reg:x3; val_offset:96555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96555*FLEN/8, x4, x1, x2) - -inst_32186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb00000ff; valaddr_reg:x3; val_offset:96558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96558*FLEN/8, x4, x1, x2) - -inst_32187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb00001ff; valaddr_reg:x3; val_offset:96561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96561*FLEN/8, x4, x1, x2) - -inst_32188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb00003ff; valaddr_reg:x3; val_offset:96564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96564*FLEN/8, x4, x1, x2) - -inst_32189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb00007ff; valaddr_reg:x3; val_offset:96567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96567*FLEN/8, x4, x1, x2) - -inst_32190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0000fff; valaddr_reg:x3; val_offset:96570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96570*FLEN/8, x4, x1, x2) - -inst_32191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0001fff; valaddr_reg:x3; val_offset:96573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96573*FLEN/8, x4, x1, x2) - -inst_32192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0003fff; valaddr_reg:x3; val_offset:96576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96576*FLEN/8, x4, x1, x2) - -inst_32193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0007fff; valaddr_reg:x3; val_offset:96579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96579*FLEN/8, x4, x1, x2) - -inst_32194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb000ffff; valaddr_reg:x3; val_offset:96582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96582*FLEN/8, x4, x1, x2) - -inst_32195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb001ffff; valaddr_reg:x3; val_offset:96585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96585*FLEN/8, x4, x1, x2) - -inst_32196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb003ffff; valaddr_reg:x3; val_offset:96588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96588*FLEN/8, x4, x1, x2) - -inst_32197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb007ffff; valaddr_reg:x3; val_offset:96591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96591*FLEN/8, x4, x1, x2) - -inst_32198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb00fffff; valaddr_reg:x3; val_offset:96594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96594*FLEN/8, x4, x1, x2) - -inst_32199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb01fffff; valaddr_reg:x3; val_offset:96597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96597*FLEN/8, x4, x1, x2) - -inst_32200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb03fffff; valaddr_reg:x3; val_offset:96600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96600*FLEN/8, x4, x1, x2) - -inst_32201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0400000; valaddr_reg:x3; val_offset:96603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96603*FLEN/8, x4, x1, x2) - -inst_32202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0600000; valaddr_reg:x3; val_offset:96606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96606*FLEN/8, x4, x1, x2) - -inst_32203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0700000; valaddr_reg:x3; val_offset:96609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96609*FLEN/8, x4, x1, x2) - -inst_32204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb0780000; valaddr_reg:x3; val_offset:96612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96612*FLEN/8, x4, x1, x2) - -inst_32205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07c0000; valaddr_reg:x3; val_offset:96615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96615*FLEN/8, x4, x1, x2) - -inst_32206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07e0000; valaddr_reg:x3; val_offset:96618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96618*FLEN/8, x4, x1, x2) - -inst_32207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07f0000; valaddr_reg:x3; val_offset:96621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96621*FLEN/8, x4, x1, x2) - -inst_32208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07f8000; valaddr_reg:x3; val_offset:96624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96624*FLEN/8, x4, x1, x2) - -inst_32209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07fc000; valaddr_reg:x3; val_offset:96627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96627*FLEN/8, x4, x1, x2) - -inst_32210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07fe000; valaddr_reg:x3; val_offset:96630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96630*FLEN/8, x4, x1, x2) - -inst_32211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07ff000; valaddr_reg:x3; val_offset:96633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96633*FLEN/8, x4, x1, x2) - -inst_32212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07ff800; valaddr_reg:x3; val_offset:96636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96636*FLEN/8, x4, x1, x2) - -inst_32213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07ffc00; valaddr_reg:x3; val_offset:96639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96639*FLEN/8, x4, x1, x2) - -inst_32214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07ffe00; valaddr_reg:x3; val_offset:96642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96642*FLEN/8, x4, x1, x2) - -inst_32215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07fff00; valaddr_reg:x3; val_offset:96645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96645*FLEN/8, x4, x1, x2) - -inst_32216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07fff80; valaddr_reg:x3; val_offset:96648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96648*FLEN/8, x4, x1, x2) - -inst_32217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07fffc0; valaddr_reg:x3; val_offset:96651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96651*FLEN/8, x4, x1, x2) - -inst_32218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07fffe0; valaddr_reg:x3; val_offset:96654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96654*FLEN/8, x4, x1, x2) - -inst_32219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07ffff0; valaddr_reg:x3; val_offset:96657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96657*FLEN/8, x4, x1, x2) - -inst_32220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07ffff8; valaddr_reg:x3; val_offset:96660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96660*FLEN/8, x4, x1, x2) - -inst_32221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07ffffc; valaddr_reg:x3; val_offset:96663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96663*FLEN/8, x4, x1, x2) - -inst_32222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07ffffe; valaddr_reg:x3; val_offset:96666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96666*FLEN/8, x4, x1, x2) - -inst_32223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xb07fffff; valaddr_reg:x3; val_offset:96669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96669*FLEN/8, x4, x1, x2) - -inst_32224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbf800001; valaddr_reg:x3; val_offset:96672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96672*FLEN/8, x4, x1, x2) - -inst_32225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbf800003; valaddr_reg:x3; val_offset:96675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96675*FLEN/8, x4, x1, x2) - -inst_32226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbf800007; valaddr_reg:x3; val_offset:96678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96678*FLEN/8, x4, x1, x2) - -inst_32227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbf999999; valaddr_reg:x3; val_offset:96681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96681*FLEN/8, x4, x1, x2) - -inst_32228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:96684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96684*FLEN/8, x4, x1, x2) - -inst_32229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:96687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96687*FLEN/8, x4, x1, x2) - -inst_32230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:96690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96690*FLEN/8, x4, x1, x2) - -inst_32231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:96693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96693*FLEN/8, x4, x1, x2) - -inst_32232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:96696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96696*FLEN/8, x4, x1, x2) - -inst_32233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:96699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96699*FLEN/8, x4, x1, x2) - -inst_32234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:96702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96702*FLEN/8, x4, x1, x2) - -inst_32235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:96705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96705*FLEN/8, x4, x1, x2) - -inst_32236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:96708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96708*FLEN/8, x4, x1, x2) - -inst_32237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:96711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96711*FLEN/8, x4, x1, x2) - -inst_32238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:96714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96714*FLEN/8, x4, x1, x2) - -inst_32239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:96717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96717*FLEN/8, x4, x1, x2) - -inst_32240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23800000; valaddr_reg:x3; val_offset:96720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96720*FLEN/8, x4, x1, x2) - -inst_32241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23800001; valaddr_reg:x3; val_offset:96723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96723*FLEN/8, x4, x1, x2) - -inst_32242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23800003; valaddr_reg:x3; val_offset:96726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96726*FLEN/8, x4, x1, x2) - -inst_32243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23800007; valaddr_reg:x3; val_offset:96729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96729*FLEN/8, x4, x1, x2) - -inst_32244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x2380000f; valaddr_reg:x3; val_offset:96732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96732*FLEN/8, x4, x1, x2) - -inst_32245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x2380001f; valaddr_reg:x3; val_offset:96735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96735*FLEN/8, x4, x1, x2) - -inst_32246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x2380003f; valaddr_reg:x3; val_offset:96738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96738*FLEN/8, x4, x1, x2) - -inst_32247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x2380007f; valaddr_reg:x3; val_offset:96741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96741*FLEN/8, x4, x1, x2) - -inst_32248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x238000ff; valaddr_reg:x3; val_offset:96744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96744*FLEN/8, x4, x1, x2) - -inst_32249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x238001ff; valaddr_reg:x3; val_offset:96747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96747*FLEN/8, x4, x1, x2) - -inst_32250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x238003ff; valaddr_reg:x3; val_offset:96750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96750*FLEN/8, x4, x1, x2) - -inst_32251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x238007ff; valaddr_reg:x3; val_offset:96753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96753*FLEN/8, x4, x1, x2) - -inst_32252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23800fff; valaddr_reg:x3; val_offset:96756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96756*FLEN/8, x4, x1, x2) - -inst_32253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23801fff; valaddr_reg:x3; val_offset:96759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96759*FLEN/8, x4, x1, x2) - -inst_32254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23803fff; valaddr_reg:x3; val_offset:96762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96762*FLEN/8, x4, x1, x2) - -inst_32255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23807fff; valaddr_reg:x3; val_offset:96765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96765*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_253) - -inst_32256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x2380ffff; valaddr_reg:x3; val_offset:96768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96768*FLEN/8, x4, x1, x2) - -inst_32257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x2381ffff; valaddr_reg:x3; val_offset:96771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96771*FLEN/8, x4, x1, x2) - -inst_32258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x2383ffff; valaddr_reg:x3; val_offset:96774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96774*FLEN/8, x4, x1, x2) - -inst_32259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x2387ffff; valaddr_reg:x3; val_offset:96777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96777*FLEN/8, x4, x1, x2) - -inst_32260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x238fffff; valaddr_reg:x3; val_offset:96780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96780*FLEN/8, x4, x1, x2) - -inst_32261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x239fffff; valaddr_reg:x3; val_offset:96783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96783*FLEN/8, x4, x1, x2) - -inst_32262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23bfffff; valaddr_reg:x3; val_offset:96786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96786*FLEN/8, x4, x1, x2) - -inst_32263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23c00000; valaddr_reg:x3; val_offset:96789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96789*FLEN/8, x4, x1, x2) - -inst_32264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23e00000; valaddr_reg:x3; val_offset:96792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96792*FLEN/8, x4, x1, x2) - -inst_32265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23f00000; valaddr_reg:x3; val_offset:96795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96795*FLEN/8, x4, x1, x2) - -inst_32266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23f80000; valaddr_reg:x3; val_offset:96798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96798*FLEN/8, x4, x1, x2) - -inst_32267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fc0000; valaddr_reg:x3; val_offset:96801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96801*FLEN/8, x4, x1, x2) - -inst_32268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fe0000; valaddr_reg:x3; val_offset:96804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96804*FLEN/8, x4, x1, x2) - -inst_32269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ff0000; valaddr_reg:x3; val_offset:96807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96807*FLEN/8, x4, x1, x2) - -inst_32270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ff8000; valaddr_reg:x3; val_offset:96810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96810*FLEN/8, x4, x1, x2) - -inst_32271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ffc000; valaddr_reg:x3; val_offset:96813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96813*FLEN/8, x4, x1, x2) - -inst_32272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ffe000; valaddr_reg:x3; val_offset:96816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96816*FLEN/8, x4, x1, x2) - -inst_32273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fff000; valaddr_reg:x3; val_offset:96819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96819*FLEN/8, x4, x1, x2) - -inst_32274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fff800; valaddr_reg:x3; val_offset:96822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96822*FLEN/8, x4, x1, x2) - -inst_32275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fffc00; valaddr_reg:x3; val_offset:96825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96825*FLEN/8, x4, x1, x2) - -inst_32276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fffe00; valaddr_reg:x3; val_offset:96828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96828*FLEN/8, x4, x1, x2) - -inst_32277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ffff00; valaddr_reg:x3; val_offset:96831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96831*FLEN/8, x4, x1, x2) - -inst_32278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ffff80; valaddr_reg:x3; val_offset:96834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96834*FLEN/8, x4, x1, x2) - -inst_32279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ffffc0; valaddr_reg:x3; val_offset:96837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96837*FLEN/8, x4, x1, x2) - -inst_32280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ffffe0; valaddr_reg:x3; val_offset:96840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96840*FLEN/8, x4, x1, x2) - -inst_32281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fffff0; valaddr_reg:x3; val_offset:96843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96843*FLEN/8, x4, x1, x2) - -inst_32282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fffff8; valaddr_reg:x3; val_offset:96846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96846*FLEN/8, x4, x1, x2) - -inst_32283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fffffc; valaddr_reg:x3; val_offset:96849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96849*FLEN/8, x4, x1, x2) - -inst_32284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23fffffe; valaddr_reg:x3; val_offset:96852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96852*FLEN/8, x4, x1, x2) - -inst_32285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x23ffffff; valaddr_reg:x3; val_offset:96855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96855*FLEN/8, x4, x1, x2) - -inst_32286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3f800001; valaddr_reg:x3; val_offset:96858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96858*FLEN/8, x4, x1, x2) - -inst_32287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3f800003; valaddr_reg:x3; val_offset:96861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96861*FLEN/8, x4, x1, x2) - -inst_32288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3f800007; valaddr_reg:x3; val_offset:96864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96864*FLEN/8, x4, x1, x2) - -inst_32289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3f999999; valaddr_reg:x3; val_offset:96867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96867*FLEN/8, x4, x1, x2) - -inst_32290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:96870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96870*FLEN/8, x4, x1, x2) - -inst_32291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:96873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96873*FLEN/8, x4, x1, x2) - -inst_32292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:96876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96876*FLEN/8, x4, x1, x2) - -inst_32293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:96879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96879*FLEN/8, x4, x1, x2) - -inst_32294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:96882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96882*FLEN/8, x4, x1, x2) - -inst_32295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:96885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96885*FLEN/8, x4, x1, x2) - -inst_32296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:96888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96888*FLEN/8, x4, x1, x2) - -inst_32297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:96891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96891*FLEN/8, x4, x1, x2) - -inst_32298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:96894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96894*FLEN/8, x4, x1, x2) - -inst_32299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:96897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96897*FLEN/8, x4, x1, x2) - -inst_32300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:96900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96900*FLEN/8, x4, x1, x2) - -inst_32301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:96903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96903*FLEN/8, x4, x1, x2) - -inst_32302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:96906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96906*FLEN/8, x4, x1, x2) - -inst_32303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:96909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96909*FLEN/8, x4, x1, x2) - -inst_32304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:96912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96912*FLEN/8, x4, x1, x2) - -inst_32305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:96915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96915*FLEN/8, x4, x1, x2) - -inst_32306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:96918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96918*FLEN/8, x4, x1, x2) - -inst_32307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:96921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96921*FLEN/8, x4, x1, x2) - -inst_32308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:96924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96924*FLEN/8, x4, x1, x2) - -inst_32309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:96927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96927*FLEN/8, x4, x1, x2) - -inst_32310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:96930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96930*FLEN/8, x4, x1, x2) - -inst_32311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:96933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96933*FLEN/8, x4, x1, x2) - -inst_32312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:96936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96936*FLEN/8, x4, x1, x2) - -inst_32313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:96939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96939*FLEN/8, x4, x1, x2) - -inst_32314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:96942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96942*FLEN/8, x4, x1, x2) - -inst_32315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:96945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96945*FLEN/8, x4, x1, x2) - -inst_32316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:96948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96948*FLEN/8, x4, x1, x2) - -inst_32317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:96951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96951*FLEN/8, x4, x1, x2) - -inst_32318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8000000; valaddr_reg:x3; val_offset:96954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96954*FLEN/8, x4, x1, x2) - -inst_32319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8000001; valaddr_reg:x3; val_offset:96957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96957*FLEN/8, x4, x1, x2) - -inst_32320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8000003; valaddr_reg:x3; val_offset:96960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96960*FLEN/8, x4, x1, x2) - -inst_32321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8000007; valaddr_reg:x3; val_offset:96963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96963*FLEN/8, x4, x1, x2) - -inst_32322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x800000f; valaddr_reg:x3; val_offset:96966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96966*FLEN/8, x4, x1, x2) - -inst_32323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x800001f; valaddr_reg:x3; val_offset:96969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96969*FLEN/8, x4, x1, x2) - -inst_32324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x800003f; valaddr_reg:x3; val_offset:96972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96972*FLEN/8, x4, x1, x2) - -inst_32325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x800007f; valaddr_reg:x3; val_offset:96975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96975*FLEN/8, x4, x1, x2) - -inst_32326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x80000ff; valaddr_reg:x3; val_offset:96978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96978*FLEN/8, x4, x1, x2) - -inst_32327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x80001ff; valaddr_reg:x3; val_offset:96981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96981*FLEN/8, x4, x1, x2) - -inst_32328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x80003ff; valaddr_reg:x3; val_offset:96984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96984*FLEN/8, x4, x1, x2) - -inst_32329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x80007ff; valaddr_reg:x3; val_offset:96987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96987*FLEN/8, x4, x1, x2) - -inst_32330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8000fff; valaddr_reg:x3; val_offset:96990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96990*FLEN/8, x4, x1, x2) - -inst_32331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8001fff; valaddr_reg:x3; val_offset:96993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96993*FLEN/8, x4, x1, x2) - -inst_32332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8003fff; valaddr_reg:x3; val_offset:96996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96996*FLEN/8, x4, x1, x2) - -inst_32333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8007fff; valaddr_reg:x3; val_offset:96999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96999*FLEN/8, x4, x1, x2) - -inst_32334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x800ffff; valaddr_reg:x3; val_offset:97002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97002*FLEN/8, x4, x1, x2) - -inst_32335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x801ffff; valaddr_reg:x3; val_offset:97005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97005*FLEN/8, x4, x1, x2) - -inst_32336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x803ffff; valaddr_reg:x3; val_offset:97008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97008*FLEN/8, x4, x1, x2) - -inst_32337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x807ffff; valaddr_reg:x3; val_offset:97011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97011*FLEN/8, x4, x1, x2) - -inst_32338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x80fffff; valaddr_reg:x3; val_offset:97014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97014*FLEN/8, x4, x1, x2) - -inst_32339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x81fffff; valaddr_reg:x3; val_offset:97017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97017*FLEN/8, x4, x1, x2) - -inst_32340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x83fffff; valaddr_reg:x3; val_offset:97020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97020*FLEN/8, x4, x1, x2) - -inst_32341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8400000; valaddr_reg:x3; val_offset:97023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97023*FLEN/8, x4, x1, x2) - -inst_32342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8600000; valaddr_reg:x3; val_offset:97026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97026*FLEN/8, x4, x1, x2) - -inst_32343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8700000; valaddr_reg:x3; val_offset:97029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97029*FLEN/8, x4, x1, x2) - -inst_32344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x8780000; valaddr_reg:x3; val_offset:97032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97032*FLEN/8, x4, x1, x2) - -inst_32345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87c0000; valaddr_reg:x3; val_offset:97035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97035*FLEN/8, x4, x1, x2) - -inst_32346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87e0000; valaddr_reg:x3; val_offset:97038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97038*FLEN/8, x4, x1, x2) - -inst_32347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87f0000; valaddr_reg:x3; val_offset:97041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97041*FLEN/8, x4, x1, x2) - -inst_32348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87f8000; valaddr_reg:x3; val_offset:97044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97044*FLEN/8, x4, x1, x2) - -inst_32349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87fc000; valaddr_reg:x3; val_offset:97047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97047*FLEN/8, x4, x1, x2) - -inst_32350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87fe000; valaddr_reg:x3; val_offset:97050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97050*FLEN/8, x4, x1, x2) - -inst_32351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87ff000; valaddr_reg:x3; val_offset:97053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97053*FLEN/8, x4, x1, x2) - -inst_32352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87ff800; valaddr_reg:x3; val_offset:97056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97056*FLEN/8, x4, x1, x2) - -inst_32353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87ffc00; valaddr_reg:x3; val_offset:97059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97059*FLEN/8, x4, x1, x2) - -inst_32354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87ffe00; valaddr_reg:x3; val_offset:97062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97062*FLEN/8, x4, x1, x2) - -inst_32355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87fff00; valaddr_reg:x3; val_offset:97065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97065*FLEN/8, x4, x1, x2) - -inst_32356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87fff80; valaddr_reg:x3; val_offset:97068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97068*FLEN/8, x4, x1, x2) - -inst_32357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87fffc0; valaddr_reg:x3; val_offset:97071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97071*FLEN/8, x4, x1, x2) - -inst_32358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87fffe0; valaddr_reg:x3; val_offset:97074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97074*FLEN/8, x4, x1, x2) - -inst_32359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87ffff0; valaddr_reg:x3; val_offset:97077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97077*FLEN/8, x4, x1, x2) - -inst_32360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87ffff8; valaddr_reg:x3; val_offset:97080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97080*FLEN/8, x4, x1, x2) - -inst_32361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87ffffc; valaddr_reg:x3; val_offset:97083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97083*FLEN/8, x4, x1, x2) - -inst_32362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87ffffe; valaddr_reg:x3; val_offset:97086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97086*FLEN/8, x4, x1, x2) - -inst_32363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; -op3val:0x87fffff; valaddr_reg:x3; val_offset:97089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97089*FLEN/8, x4, x1, x2) - -inst_32364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:97092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97092*FLEN/8, x4, x1, x2) - -inst_32365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:97095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97095*FLEN/8, x4, x1, x2) - -inst_32366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:97098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97098*FLEN/8, x4, x1, x2) - -inst_32367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:97101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97101*FLEN/8, x4, x1, x2) - -inst_32368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:97104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97104*FLEN/8, x4, x1, x2) - -inst_32369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:97107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97107*FLEN/8, x4, x1, x2) - -inst_32370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:97110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97110*FLEN/8, x4, x1, x2) - -inst_32371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:97113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97113*FLEN/8, x4, x1, x2) - -inst_32372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:97116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97116*FLEN/8, x4, x1, x2) - -inst_32373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:97119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97119*FLEN/8, x4, x1, x2) - -inst_32374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:97122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97122*FLEN/8, x4, x1, x2) - -inst_32375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:97125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97125*FLEN/8, x4, x1, x2) - -inst_32376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:97128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97128*FLEN/8, x4, x1, x2) - -inst_32377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:97131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97131*FLEN/8, x4, x1, x2) - -inst_32378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:97134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97134*FLEN/8, x4, x1, x2) - -inst_32379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:97137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97137*FLEN/8, x4, x1, x2) - -inst_32380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8800000; valaddr_reg:x3; val_offset:97140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97140*FLEN/8, x4, x1, x2) - -inst_32381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8800001; valaddr_reg:x3; val_offset:97143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97143*FLEN/8, x4, x1, x2) - -inst_32382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8800003; valaddr_reg:x3; val_offset:97146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97146*FLEN/8, x4, x1, x2) - -inst_32383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8800007; valaddr_reg:x3; val_offset:97149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97149*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_254) - -inst_32384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x880000f; valaddr_reg:x3; val_offset:97152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97152*FLEN/8, x4, x1, x2) - -inst_32385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x880001f; valaddr_reg:x3; val_offset:97155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97155*FLEN/8, x4, x1, x2) - -inst_32386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x880003f; valaddr_reg:x3; val_offset:97158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97158*FLEN/8, x4, x1, x2) - -inst_32387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x880007f; valaddr_reg:x3; val_offset:97161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97161*FLEN/8, x4, x1, x2) - -inst_32388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x88000ff; valaddr_reg:x3; val_offset:97164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97164*FLEN/8, x4, x1, x2) - -inst_32389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x88001ff; valaddr_reg:x3; val_offset:97167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97167*FLEN/8, x4, x1, x2) - -inst_32390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x88003ff; valaddr_reg:x3; val_offset:97170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97170*FLEN/8, x4, x1, x2) - -inst_32391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x88007ff; valaddr_reg:x3; val_offset:97173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97173*FLEN/8, x4, x1, x2) - -inst_32392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8800fff; valaddr_reg:x3; val_offset:97176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97176*FLEN/8, x4, x1, x2) - -inst_32393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8801fff; valaddr_reg:x3; val_offset:97179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97179*FLEN/8, x4, x1, x2) - -inst_32394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8803fff; valaddr_reg:x3; val_offset:97182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97182*FLEN/8, x4, x1, x2) - -inst_32395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8807fff; valaddr_reg:x3; val_offset:97185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97185*FLEN/8, x4, x1, x2) - -inst_32396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x880ffff; valaddr_reg:x3; val_offset:97188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97188*FLEN/8, x4, x1, x2) - -inst_32397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x881ffff; valaddr_reg:x3; val_offset:97191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97191*FLEN/8, x4, x1, x2) - -inst_32398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x883ffff; valaddr_reg:x3; val_offset:97194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97194*FLEN/8, x4, x1, x2) - -inst_32399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x887ffff; valaddr_reg:x3; val_offset:97197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97197*FLEN/8, x4, x1, x2) - -inst_32400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x88fffff; valaddr_reg:x3; val_offset:97200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97200*FLEN/8, x4, x1, x2) - -inst_32401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x89fffff; valaddr_reg:x3; val_offset:97203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97203*FLEN/8, x4, x1, x2) - -inst_32402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8bfffff; valaddr_reg:x3; val_offset:97206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97206*FLEN/8, x4, x1, x2) - -inst_32403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8c00000; valaddr_reg:x3; val_offset:97209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97209*FLEN/8, x4, x1, x2) - -inst_32404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8e00000; valaddr_reg:x3; val_offset:97212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97212*FLEN/8, x4, x1, x2) - -inst_32405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8f00000; valaddr_reg:x3; val_offset:97215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97215*FLEN/8, x4, x1, x2) - -inst_32406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8f80000; valaddr_reg:x3; val_offset:97218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97218*FLEN/8, x4, x1, x2) - -inst_32407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fc0000; valaddr_reg:x3; val_offset:97221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97221*FLEN/8, x4, x1, x2) - -inst_32408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fe0000; valaddr_reg:x3; val_offset:97224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97224*FLEN/8, x4, x1, x2) - -inst_32409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ff0000; valaddr_reg:x3; val_offset:97227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97227*FLEN/8, x4, x1, x2) - -inst_32410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ff8000; valaddr_reg:x3; val_offset:97230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97230*FLEN/8, x4, x1, x2) - -inst_32411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ffc000; valaddr_reg:x3; val_offset:97233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97233*FLEN/8, x4, x1, x2) - -inst_32412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ffe000; valaddr_reg:x3; val_offset:97236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97236*FLEN/8, x4, x1, x2) - -inst_32413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fff000; valaddr_reg:x3; val_offset:97239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97239*FLEN/8, x4, x1, x2) - -inst_32414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fff800; valaddr_reg:x3; val_offset:97242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97242*FLEN/8, x4, x1, x2) - -inst_32415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fffc00; valaddr_reg:x3; val_offset:97245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97245*FLEN/8, x4, x1, x2) - -inst_32416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fffe00; valaddr_reg:x3; val_offset:97248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97248*FLEN/8, x4, x1, x2) - -inst_32417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ffff00; valaddr_reg:x3; val_offset:97251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97251*FLEN/8, x4, x1, x2) - -inst_32418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ffff80; valaddr_reg:x3; val_offset:97254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97254*FLEN/8, x4, x1, x2) - -inst_32419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ffffc0; valaddr_reg:x3; val_offset:97257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97257*FLEN/8, x4, x1, x2) - -inst_32420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ffffe0; valaddr_reg:x3; val_offset:97260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97260*FLEN/8, x4, x1, x2) - -inst_32421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fffff0; valaddr_reg:x3; val_offset:97263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97263*FLEN/8, x4, x1, x2) - -inst_32422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fffff8; valaddr_reg:x3; val_offset:97266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97266*FLEN/8, x4, x1, x2) - -inst_32423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fffffc; valaddr_reg:x3; val_offset:97269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97269*FLEN/8, x4, x1, x2) - -inst_32424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8fffffe; valaddr_reg:x3; val_offset:97272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97272*FLEN/8, x4, x1, x2) - -inst_32425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; -op3val:0x8ffffff; valaddr_reg:x3; val_offset:97275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97275*FLEN/8, x4, x1, x2) - -inst_32426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:97278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97278*FLEN/8, x4, x1, x2) - -inst_32427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:97281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97281*FLEN/8, x4, x1, x2) - -inst_32428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:97284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97284*FLEN/8, x4, x1, x2) - -inst_32429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:97287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97287*FLEN/8, x4, x1, x2) - -inst_32430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:97290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97290*FLEN/8, x4, x1, x2) - -inst_32431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:97293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97293*FLEN/8, x4, x1, x2) - -inst_32432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:97296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97296*FLEN/8, x4, x1, x2) - -inst_32433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:97299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97299*FLEN/8, x4, x1, x2) - -inst_32434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:97302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97302*FLEN/8, x4, x1, x2) - -inst_32435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:97305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97305*FLEN/8, x4, x1, x2) - -inst_32436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:97308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97308*FLEN/8, x4, x1, x2) - -inst_32437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:97311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97311*FLEN/8, x4, x1, x2) - -inst_32438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:97314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97314*FLEN/8, x4, x1, x2) - -inst_32439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:97317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97317*FLEN/8, x4, x1, x2) - -inst_32440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:97320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97320*FLEN/8, x4, x1, x2) - -inst_32441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:97323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97323*FLEN/8, x4, x1, x2) - -inst_32442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe000000; valaddr_reg:x3; val_offset:97326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97326*FLEN/8, x4, x1, x2) - -inst_32443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe000001; valaddr_reg:x3; val_offset:97329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97329*FLEN/8, x4, x1, x2) - -inst_32444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe000003; valaddr_reg:x3; val_offset:97332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97332*FLEN/8, x4, x1, x2) - -inst_32445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe000007; valaddr_reg:x3; val_offset:97335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97335*FLEN/8, x4, x1, x2) - -inst_32446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe00000f; valaddr_reg:x3; val_offset:97338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97338*FLEN/8, x4, x1, x2) - -inst_32447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe00001f; valaddr_reg:x3; val_offset:97341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97341*FLEN/8, x4, x1, x2) - -inst_32448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe00003f; valaddr_reg:x3; val_offset:97344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97344*FLEN/8, x4, x1, x2) - -inst_32449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe00007f; valaddr_reg:x3; val_offset:97347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97347*FLEN/8, x4, x1, x2) - -inst_32450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe0000ff; valaddr_reg:x3; val_offset:97350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97350*FLEN/8, x4, x1, x2) - -inst_32451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe0001ff; valaddr_reg:x3; val_offset:97353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97353*FLEN/8, x4, x1, x2) - -inst_32452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe0003ff; valaddr_reg:x3; val_offset:97356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97356*FLEN/8, x4, x1, x2) - -inst_32453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe0007ff; valaddr_reg:x3; val_offset:97359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97359*FLEN/8, x4, x1, x2) - -inst_32454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe000fff; valaddr_reg:x3; val_offset:97362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97362*FLEN/8, x4, x1, x2) - -inst_32455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe001fff; valaddr_reg:x3; val_offset:97365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97365*FLEN/8, x4, x1, x2) - -inst_32456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe003fff; valaddr_reg:x3; val_offset:97368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97368*FLEN/8, x4, x1, x2) - -inst_32457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe007fff; valaddr_reg:x3; val_offset:97371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97371*FLEN/8, x4, x1, x2) - -inst_32458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe00ffff; valaddr_reg:x3; val_offset:97374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97374*FLEN/8, x4, x1, x2) - -inst_32459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe01ffff; valaddr_reg:x3; val_offset:97377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97377*FLEN/8, x4, x1, x2) - -inst_32460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe03ffff; valaddr_reg:x3; val_offset:97380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97380*FLEN/8, x4, x1, x2) - -inst_32461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe07ffff; valaddr_reg:x3; val_offset:97383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97383*FLEN/8, x4, x1, x2) - -inst_32462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe0fffff; valaddr_reg:x3; val_offset:97386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97386*FLEN/8, x4, x1, x2) - -inst_32463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe1fffff; valaddr_reg:x3; val_offset:97389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97389*FLEN/8, x4, x1, x2) - -inst_32464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe3fffff; valaddr_reg:x3; val_offset:97392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97392*FLEN/8, x4, x1, x2) - -inst_32465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe400000; valaddr_reg:x3; val_offset:97395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97395*FLEN/8, x4, x1, x2) - -inst_32466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe600000; valaddr_reg:x3; val_offset:97398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97398*FLEN/8, x4, x1, x2) - -inst_32467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe700000; valaddr_reg:x3; val_offset:97401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97401*FLEN/8, x4, x1, x2) - -inst_32468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe780000; valaddr_reg:x3; val_offset:97404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97404*FLEN/8, x4, x1, x2) - -inst_32469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7c0000; valaddr_reg:x3; val_offset:97407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97407*FLEN/8, x4, x1, x2) - -inst_32470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7e0000; valaddr_reg:x3; val_offset:97410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97410*FLEN/8, x4, x1, x2) - -inst_32471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7f0000; valaddr_reg:x3; val_offset:97413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97413*FLEN/8, x4, x1, x2) - -inst_32472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7f8000; valaddr_reg:x3; val_offset:97416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97416*FLEN/8, x4, x1, x2) - -inst_32473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7fc000; valaddr_reg:x3; val_offset:97419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97419*FLEN/8, x4, x1, x2) - -inst_32474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7fe000; valaddr_reg:x3; val_offset:97422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97422*FLEN/8, x4, x1, x2) - -inst_32475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7ff000; valaddr_reg:x3; val_offset:97425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97425*FLEN/8, x4, x1, x2) - -inst_32476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7ff800; valaddr_reg:x3; val_offset:97428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97428*FLEN/8, x4, x1, x2) - -inst_32477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7ffc00; valaddr_reg:x3; val_offset:97431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97431*FLEN/8, x4, x1, x2) - -inst_32478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7ffe00; valaddr_reg:x3; val_offset:97434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97434*FLEN/8, x4, x1, x2) - -inst_32479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7fff00; valaddr_reg:x3; val_offset:97437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97437*FLEN/8, x4, x1, x2) - -inst_32480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7fff80; valaddr_reg:x3; val_offset:97440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97440*FLEN/8, x4, x1, x2) - -inst_32481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7fffc0; valaddr_reg:x3; val_offset:97443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97443*FLEN/8, x4, x1, x2) - -inst_32482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7fffe0; valaddr_reg:x3; val_offset:97446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97446*FLEN/8, x4, x1, x2) - -inst_32483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7ffff0; valaddr_reg:x3; val_offset:97449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97449*FLEN/8, x4, x1, x2) - -inst_32484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7ffff8; valaddr_reg:x3; val_offset:97452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97452*FLEN/8, x4, x1, x2) - -inst_32485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7ffffc; valaddr_reg:x3; val_offset:97455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97455*FLEN/8, x4, x1, x2) - -inst_32486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7ffffe; valaddr_reg:x3; val_offset:97458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97458*FLEN/8, x4, x1, x2) - -inst_32487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; -op3val:0xe7fffff; valaddr_reg:x3; val_offset:97461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97461*FLEN/8, x4, x1, x2) - -inst_32488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x0; valaddr_reg:x3; val_offset:97464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97464*FLEN/8, x4, x1, x2) - -inst_32489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:97467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97467*FLEN/8, x4, x1, x2) - -inst_32490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:97470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97470*FLEN/8, x4, x1, x2) - -inst_32491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:97473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97473*FLEN/8, x4, x1, x2) - -inst_32492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0xf; valaddr_reg:x3; val_offset:97476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97476*FLEN/8, x4, x1, x2) - -inst_32493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x1f; valaddr_reg:x3; val_offset:97479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97479*FLEN/8, x4, x1, x2) - -inst_32494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x3f; valaddr_reg:x3; val_offset:97482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97482*FLEN/8, x4, x1, x2) - -inst_32495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7f; valaddr_reg:x3; val_offset:97485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97485*FLEN/8, x4, x1, x2) - -inst_32496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0xff; valaddr_reg:x3; val_offset:97488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97488*FLEN/8, x4, x1, x2) - -inst_32497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x1ff; valaddr_reg:x3; val_offset:97491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97491*FLEN/8, x4, x1, x2) - -inst_32498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x3ff; valaddr_reg:x3; val_offset:97494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97494*FLEN/8, x4, x1, x2) - -inst_32499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ff; valaddr_reg:x3; val_offset:97497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97497*FLEN/8, x4, x1, x2) - -inst_32500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0xfff; valaddr_reg:x3; val_offset:97500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97500*FLEN/8, x4, x1, x2) - -inst_32501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x1fff; valaddr_reg:x3; val_offset:97503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97503*FLEN/8, x4, x1, x2) - -inst_32502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x3fff; valaddr_reg:x3; val_offset:97506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97506*FLEN/8, x4, x1, x2) - -inst_32503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7fff; valaddr_reg:x3; val_offset:97509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97509*FLEN/8, x4, x1, x2) - -inst_32504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0xffff; valaddr_reg:x3; val_offset:97512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97512*FLEN/8, x4, x1, x2) - -inst_32505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x1ffff; valaddr_reg:x3; val_offset:97515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97515*FLEN/8, x4, x1, x2) - -inst_32506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x3ffff; valaddr_reg:x3; val_offset:97518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97518*FLEN/8, x4, x1, x2) - -inst_32507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ffff; valaddr_reg:x3; val_offset:97521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97521*FLEN/8, x4, x1, x2) - -inst_32508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0xfffff; valaddr_reg:x3; val_offset:97524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97524*FLEN/8, x4, x1, x2) - -inst_32509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:97527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97527*FLEN/8, x4, x1, x2) - -inst_32510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x1fffff; valaddr_reg:x3; val_offset:97530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97530*FLEN/8, x4, x1, x2) - -inst_32511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:97533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97533*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_255) - -inst_32512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:97536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97536*FLEN/8, x4, x1, x2) - -inst_32513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:97539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97539*FLEN/8, x4, x1, x2) - -inst_32514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:97542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97542*FLEN/8, x4, x1, x2) - -inst_32515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x3fffff; valaddr_reg:x3; val_offset:97545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97545*FLEN/8, x4, x1, x2) - -inst_32516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x400000; valaddr_reg:x3; val_offset:97548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97548*FLEN/8, x4, x1, x2) - -inst_32517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:97551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97551*FLEN/8, x4, x1, x2) - -inst_32518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:97554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97554*FLEN/8, x4, x1, x2) - -inst_32519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:97557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97557*FLEN/8, x4, x1, x2) - -inst_32520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x600000; valaddr_reg:x3; val_offset:97560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97560*FLEN/8, x4, x1, x2) - -inst_32521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:97563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97563*FLEN/8, x4, x1, x2) - -inst_32522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:97566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97566*FLEN/8, x4, x1, x2) - -inst_32523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x700000; valaddr_reg:x3; val_offset:97569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97569*FLEN/8, x4, x1, x2) - -inst_32524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x780000; valaddr_reg:x3; val_offset:97572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97572*FLEN/8, x4, x1, x2) - -inst_32525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7c0000; valaddr_reg:x3; val_offset:97575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97575*FLEN/8, x4, x1, x2) - -inst_32526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7e0000; valaddr_reg:x3; val_offset:97578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97578*FLEN/8, x4, x1, x2) - -inst_32527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7f0000; valaddr_reg:x3; val_offset:97581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97581*FLEN/8, x4, x1, x2) - -inst_32528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7f8000; valaddr_reg:x3; val_offset:97584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97584*FLEN/8, x4, x1, x2) - -inst_32529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7fc000; valaddr_reg:x3; val_offset:97587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97587*FLEN/8, x4, x1, x2) - -inst_32530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7fe000; valaddr_reg:x3; val_offset:97590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97590*FLEN/8, x4, x1, x2) - -inst_32531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ff000; valaddr_reg:x3; val_offset:97593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97593*FLEN/8, x4, x1, x2) - -inst_32532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ff800; valaddr_reg:x3; val_offset:97596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97596*FLEN/8, x4, x1, x2) - -inst_32533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ffc00; valaddr_reg:x3; val_offset:97599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97599*FLEN/8, x4, x1, x2) - -inst_32534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ffe00; valaddr_reg:x3; val_offset:97602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97602*FLEN/8, x4, x1, x2) - -inst_32535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7fff00; valaddr_reg:x3; val_offset:97605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97605*FLEN/8, x4, x1, x2) - -inst_32536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7fff80; valaddr_reg:x3; val_offset:97608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97608*FLEN/8, x4, x1, x2) - -inst_32537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7fffc0; valaddr_reg:x3; val_offset:97611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97611*FLEN/8, x4, x1, x2) - -inst_32538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7fffe0; valaddr_reg:x3; val_offset:97614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97614*FLEN/8, x4, x1, x2) - -inst_32539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ffff0; valaddr_reg:x3; val_offset:97617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97617*FLEN/8, x4, x1, x2) - -inst_32540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:97620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97620*FLEN/8, x4, x1, x2) - -inst_32541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:97623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97623*FLEN/8, x4, x1, x2) - -inst_32542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:97626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97626*FLEN/8, x4, x1, x2) - -inst_32543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; -op3val:0x7fffff; valaddr_reg:x3; val_offset:97629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97629*FLEN/8, x4, x1, x2) - -inst_32544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:97632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97632*FLEN/8, x4, x1, x2) - -inst_32545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:97635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97635*FLEN/8, x4, x1, x2) - -inst_32546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:97638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97638*FLEN/8, x4, x1, x2) - -inst_32547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:97641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97641*FLEN/8, x4, x1, x2) - -inst_32548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:97644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97644*FLEN/8, x4, x1, x2) - -inst_32549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:97647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97647*FLEN/8, x4, x1, x2) - -inst_32550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:97650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97650*FLEN/8, x4, x1, x2) - -inst_32551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:97653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97653*FLEN/8, x4, x1, x2) - -inst_32552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:97656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97656*FLEN/8, x4, x1, x2) - -inst_32553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:97659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97659*FLEN/8, x4, x1, x2) - -inst_32554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:97662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97662*FLEN/8, x4, x1, x2) - -inst_32555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:97665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97665*FLEN/8, x4, x1, x2) - -inst_32556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:97668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97668*FLEN/8, x4, x1, x2) - -inst_32557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:97671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97671*FLEN/8, x4, x1, x2) - -inst_32558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:97674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97674*FLEN/8, x4, x1, x2) - -inst_32559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:97677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97677*FLEN/8, x4, x1, x2) - -inst_32560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86800000; valaddr_reg:x3; val_offset:97680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97680*FLEN/8, x4, x1, x2) - -inst_32561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86800001; valaddr_reg:x3; val_offset:97683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97683*FLEN/8, x4, x1, x2) - -inst_32562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86800003; valaddr_reg:x3; val_offset:97686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97686*FLEN/8, x4, x1, x2) - -inst_32563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86800007; valaddr_reg:x3; val_offset:97689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97689*FLEN/8, x4, x1, x2) - -inst_32564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8680000f; valaddr_reg:x3; val_offset:97692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97692*FLEN/8, x4, x1, x2) - -inst_32565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8680001f; valaddr_reg:x3; val_offset:97695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97695*FLEN/8, x4, x1, x2) - -inst_32566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8680003f; valaddr_reg:x3; val_offset:97698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97698*FLEN/8, x4, x1, x2) - -inst_32567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8680007f; valaddr_reg:x3; val_offset:97701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97701*FLEN/8, x4, x1, x2) - -inst_32568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x868000ff; valaddr_reg:x3; val_offset:97704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97704*FLEN/8, x4, x1, x2) - -inst_32569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x868001ff; valaddr_reg:x3; val_offset:97707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97707*FLEN/8, x4, x1, x2) - -inst_32570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x868003ff; valaddr_reg:x3; val_offset:97710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97710*FLEN/8, x4, x1, x2) - -inst_32571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x868007ff; valaddr_reg:x3; val_offset:97713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97713*FLEN/8, x4, x1, x2) - -inst_32572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86800fff; valaddr_reg:x3; val_offset:97716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97716*FLEN/8, x4, x1, x2) - -inst_32573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86801fff; valaddr_reg:x3; val_offset:97719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97719*FLEN/8, x4, x1, x2) - -inst_32574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86803fff; valaddr_reg:x3; val_offset:97722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97722*FLEN/8, x4, x1, x2) - -inst_32575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86807fff; valaddr_reg:x3; val_offset:97725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97725*FLEN/8, x4, x1, x2) - -inst_32576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8680ffff; valaddr_reg:x3; val_offset:97728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97728*FLEN/8, x4, x1, x2) - -inst_32577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8681ffff; valaddr_reg:x3; val_offset:97731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97731*FLEN/8, x4, x1, x2) - -inst_32578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8683ffff; valaddr_reg:x3; val_offset:97734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97734*FLEN/8, x4, x1, x2) - -inst_32579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x8687ffff; valaddr_reg:x3; val_offset:97737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97737*FLEN/8, x4, x1, x2) - -inst_32580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x868fffff; valaddr_reg:x3; val_offset:97740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97740*FLEN/8, x4, x1, x2) - -inst_32581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x869fffff; valaddr_reg:x3; val_offset:97743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97743*FLEN/8, x4, x1, x2) - -inst_32582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86bfffff; valaddr_reg:x3; val_offset:97746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97746*FLEN/8, x4, x1, x2) - -inst_32583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86c00000; valaddr_reg:x3; val_offset:97749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97749*FLEN/8, x4, x1, x2) - -inst_32584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86e00000; valaddr_reg:x3; val_offset:97752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97752*FLEN/8, x4, x1, x2) - -inst_32585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86f00000; valaddr_reg:x3; val_offset:97755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97755*FLEN/8, x4, x1, x2) - -inst_32586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86f80000; valaddr_reg:x3; val_offset:97758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97758*FLEN/8, x4, x1, x2) - -inst_32587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fc0000; valaddr_reg:x3; val_offset:97761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97761*FLEN/8, x4, x1, x2) - -inst_32588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fe0000; valaddr_reg:x3; val_offset:97764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97764*FLEN/8, x4, x1, x2) - -inst_32589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ff0000; valaddr_reg:x3; val_offset:97767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97767*FLEN/8, x4, x1, x2) - -inst_32590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ff8000; valaddr_reg:x3; val_offset:97770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97770*FLEN/8, x4, x1, x2) - -inst_32591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ffc000; valaddr_reg:x3; val_offset:97773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97773*FLEN/8, x4, x1, x2) - -inst_32592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ffe000; valaddr_reg:x3; val_offset:97776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97776*FLEN/8, x4, x1, x2) - -inst_32593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fff000; valaddr_reg:x3; val_offset:97779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97779*FLEN/8, x4, x1, x2) - -inst_32594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fff800; valaddr_reg:x3; val_offset:97782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97782*FLEN/8, x4, x1, x2) - -inst_32595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fffc00; valaddr_reg:x3; val_offset:97785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97785*FLEN/8, x4, x1, x2) - -inst_32596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fffe00; valaddr_reg:x3; val_offset:97788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97788*FLEN/8, x4, x1, x2) - -inst_32597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ffff00; valaddr_reg:x3; val_offset:97791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97791*FLEN/8, x4, x1, x2) - -inst_32598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ffff80; valaddr_reg:x3; val_offset:97794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97794*FLEN/8, x4, x1, x2) - -inst_32599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ffffc0; valaddr_reg:x3; val_offset:97797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97797*FLEN/8, x4, x1, x2) - -inst_32600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ffffe0; valaddr_reg:x3; val_offset:97800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97800*FLEN/8, x4, x1, x2) - -inst_32601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fffff0; valaddr_reg:x3; val_offset:97803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97803*FLEN/8, x4, x1, x2) - -inst_32602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fffff8; valaddr_reg:x3; val_offset:97806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97806*FLEN/8, x4, x1, x2) - -inst_32603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fffffc; valaddr_reg:x3; val_offset:97809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97809*FLEN/8, x4, x1, x2) - -inst_32604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86fffffe; valaddr_reg:x3; val_offset:97812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97812*FLEN/8, x4, x1, x2) - -inst_32605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; -op3val:0x86ffffff; valaddr_reg:x3; val_offset:97815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97815*FLEN/8, x4, x1, x2) - -inst_32606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbf800001; valaddr_reg:x3; val_offset:97818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97818*FLEN/8, x4, x1, x2) - -inst_32607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbf800003; valaddr_reg:x3; val_offset:97821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97821*FLEN/8, x4, x1, x2) - -inst_32608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbf800007; valaddr_reg:x3; val_offset:97824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97824*FLEN/8, x4, x1, x2) - -inst_32609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbf999999; valaddr_reg:x3; val_offset:97827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97827*FLEN/8, x4, x1, x2) - -inst_32610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:97830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97830*FLEN/8, x4, x1, x2) - -inst_32611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:97833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97833*FLEN/8, x4, x1, x2) - -inst_32612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:97836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97836*FLEN/8, x4, x1, x2) - -inst_32613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:97839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97839*FLEN/8, x4, x1, x2) - -inst_32614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:97842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97842*FLEN/8, x4, x1, x2) - -inst_32615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:97845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97845*FLEN/8, x4, x1, x2) - -inst_32616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:97848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97848*FLEN/8, x4, x1, x2) - -inst_32617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:97851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97851*FLEN/8, x4, x1, x2) - -inst_32618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:97854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97854*FLEN/8, x4, x1, x2) - -inst_32619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:97857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97857*FLEN/8, x4, x1, x2) - -inst_32620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:97860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97860*FLEN/8, x4, x1, x2) - -inst_32621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:97863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97863*FLEN/8, x4, x1, x2) - -inst_32622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7000000; valaddr_reg:x3; val_offset:97866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97866*FLEN/8, x4, x1, x2) - -inst_32623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7000001; valaddr_reg:x3; val_offset:97869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97869*FLEN/8, x4, x1, x2) - -inst_32624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7000003; valaddr_reg:x3; val_offset:97872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97872*FLEN/8, x4, x1, x2) - -inst_32625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7000007; valaddr_reg:x3; val_offset:97875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97875*FLEN/8, x4, x1, x2) - -inst_32626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc700000f; valaddr_reg:x3; val_offset:97878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97878*FLEN/8, x4, x1, x2) - -inst_32627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc700001f; valaddr_reg:x3; val_offset:97881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97881*FLEN/8, x4, x1, x2) - -inst_32628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc700003f; valaddr_reg:x3; val_offset:97884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97884*FLEN/8, x4, x1, x2) - -inst_32629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc700007f; valaddr_reg:x3; val_offset:97887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97887*FLEN/8, x4, x1, x2) - -inst_32630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc70000ff; valaddr_reg:x3; val_offset:97890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97890*FLEN/8, x4, x1, x2) - -inst_32631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc70001ff; valaddr_reg:x3; val_offset:97893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97893*FLEN/8, x4, x1, x2) - -inst_32632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc70003ff; valaddr_reg:x3; val_offset:97896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97896*FLEN/8, x4, x1, x2) - -inst_32633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc70007ff; valaddr_reg:x3; val_offset:97899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97899*FLEN/8, x4, x1, x2) - -inst_32634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7000fff; valaddr_reg:x3; val_offset:97902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97902*FLEN/8, x4, x1, x2) - -inst_32635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7001fff; valaddr_reg:x3; val_offset:97905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97905*FLEN/8, x4, x1, x2) - -inst_32636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7003fff; valaddr_reg:x3; val_offset:97908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97908*FLEN/8, x4, x1, x2) - -inst_32637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7007fff; valaddr_reg:x3; val_offset:97911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97911*FLEN/8, x4, x1, x2) - -inst_32638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc700ffff; valaddr_reg:x3; val_offset:97914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97914*FLEN/8, x4, x1, x2) - -inst_32639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc701ffff; valaddr_reg:x3; val_offset:97917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97917*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_256) - -inst_32640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc703ffff; valaddr_reg:x3; val_offset:97920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97920*FLEN/8, x4, x1, x2) - -inst_32641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc707ffff; valaddr_reg:x3; val_offset:97923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97923*FLEN/8, x4, x1, x2) - -inst_32642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc70fffff; valaddr_reg:x3; val_offset:97926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97926*FLEN/8, x4, x1, x2) - -inst_32643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc71fffff; valaddr_reg:x3; val_offset:97929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97929*FLEN/8, x4, x1, x2) - -inst_32644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc73fffff; valaddr_reg:x3; val_offset:97932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97932*FLEN/8, x4, x1, x2) - -inst_32645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7400000; valaddr_reg:x3; val_offset:97935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97935*FLEN/8, x4, x1, x2) - -inst_32646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7600000; valaddr_reg:x3; val_offset:97938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97938*FLEN/8, x4, x1, x2) - -inst_32647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7700000; valaddr_reg:x3; val_offset:97941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97941*FLEN/8, x4, x1, x2) - -inst_32648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc7780000; valaddr_reg:x3; val_offset:97944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97944*FLEN/8, x4, x1, x2) - -inst_32649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77c0000; valaddr_reg:x3; val_offset:97947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97947*FLEN/8, x4, x1, x2) - -inst_32650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77e0000; valaddr_reg:x3; val_offset:97950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97950*FLEN/8, x4, x1, x2) - -inst_32651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77f0000; valaddr_reg:x3; val_offset:97953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97953*FLEN/8, x4, x1, x2) - -inst_32652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77f8000; valaddr_reg:x3; val_offset:97956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97956*FLEN/8, x4, x1, x2) - -inst_32653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77fc000; valaddr_reg:x3; val_offset:97959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97959*FLEN/8, x4, x1, x2) - -inst_32654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77fe000; valaddr_reg:x3; val_offset:97962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97962*FLEN/8, x4, x1, x2) - -inst_32655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77ff000; valaddr_reg:x3; val_offset:97965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97965*FLEN/8, x4, x1, x2) - -inst_32656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77ff800; valaddr_reg:x3; val_offset:97968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97968*FLEN/8, x4, x1, x2) - -inst_32657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77ffc00; valaddr_reg:x3; val_offset:97971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97971*FLEN/8, x4, x1, x2) - -inst_32658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77ffe00; valaddr_reg:x3; val_offset:97974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97974*FLEN/8, x4, x1, x2) - -inst_32659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77fff00; valaddr_reg:x3; val_offset:97977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97977*FLEN/8, x4, x1, x2) - -inst_32660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77fff80; valaddr_reg:x3; val_offset:97980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97980*FLEN/8, x4, x1, x2) - -inst_32661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77fffc0; valaddr_reg:x3; val_offset:97983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97983*FLEN/8, x4, x1, x2) - -inst_32662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77fffe0; valaddr_reg:x3; val_offset:97986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97986*FLEN/8, x4, x1, x2) - -inst_32663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77ffff0; valaddr_reg:x3; val_offset:97989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97989*FLEN/8, x4, x1, x2) - -inst_32664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77ffff8; valaddr_reg:x3; val_offset:97992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97992*FLEN/8, x4, x1, x2) - -inst_32665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77ffffc; valaddr_reg:x3; val_offset:97995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97995*FLEN/8, x4, x1, x2) - -inst_32666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77ffffe; valaddr_reg:x3; val_offset:97998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97998*FLEN/8, x4, x1, x2) - -inst_32667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; -op3val:0xc77fffff; valaddr_reg:x3; val_offset:98001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98001*FLEN/8, x4, x1, x2) - -inst_32668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbf800001; valaddr_reg:x3; val_offset:98004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98004*FLEN/8, x4, x1, x2) - -inst_32669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbf800003; valaddr_reg:x3; val_offset:98007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98007*FLEN/8, x4, x1, x2) - -inst_32670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbf800007; valaddr_reg:x3; val_offset:98010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98010*FLEN/8, x4, x1, x2) - -inst_32671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbf999999; valaddr_reg:x3; val_offset:98013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98013*FLEN/8, x4, x1, x2) - -inst_32672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:98016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98016*FLEN/8, x4, x1, x2) - -inst_32673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:98019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98019*FLEN/8, x4, x1, x2) - -inst_32674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:98022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98022*FLEN/8, x4, x1, x2) - -inst_32675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:98025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98025*FLEN/8, x4, x1, x2) - -inst_32676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:98028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98028*FLEN/8, x4, x1, x2) - -inst_32677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:98031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98031*FLEN/8, x4, x1, x2) - -inst_32678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:98034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98034*FLEN/8, x4, x1, x2) - -inst_32679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:98037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98037*FLEN/8, x4, x1, x2) - -inst_32680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:98040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98040*FLEN/8, x4, x1, x2) - -inst_32681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:98043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98043*FLEN/8, x4, x1, x2) - -inst_32682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:98046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98046*FLEN/8, x4, x1, x2) - -inst_32683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:98049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98049*FLEN/8, x4, x1, x2) - -inst_32684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6800000; valaddr_reg:x3; val_offset:98052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98052*FLEN/8, x4, x1, x2) - -inst_32685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6800001; valaddr_reg:x3; val_offset:98055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98055*FLEN/8, x4, x1, x2) - -inst_32686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6800003; valaddr_reg:x3; val_offset:98058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98058*FLEN/8, x4, x1, x2) - -inst_32687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6800007; valaddr_reg:x3; val_offset:98061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98061*FLEN/8, x4, x1, x2) - -inst_32688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc680000f; valaddr_reg:x3; val_offset:98064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98064*FLEN/8, x4, x1, x2) - -inst_32689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc680001f; valaddr_reg:x3; val_offset:98067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98067*FLEN/8, x4, x1, x2) - -inst_32690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc680003f; valaddr_reg:x3; val_offset:98070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98070*FLEN/8, x4, x1, x2) - -inst_32691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc680007f; valaddr_reg:x3; val_offset:98073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98073*FLEN/8, x4, x1, x2) - -inst_32692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc68000ff; valaddr_reg:x3; val_offset:98076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98076*FLEN/8, x4, x1, x2) - -inst_32693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc68001ff; valaddr_reg:x3; val_offset:98079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98079*FLEN/8, x4, x1, x2) - -inst_32694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc68003ff; valaddr_reg:x3; val_offset:98082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98082*FLEN/8, x4, x1, x2) - -inst_32695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc68007ff; valaddr_reg:x3; val_offset:98085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98085*FLEN/8, x4, x1, x2) - -inst_32696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6800fff; valaddr_reg:x3; val_offset:98088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98088*FLEN/8, x4, x1, x2) - -inst_32697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6801fff; valaddr_reg:x3; val_offset:98091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98091*FLEN/8, x4, x1, x2) - -inst_32698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6803fff; valaddr_reg:x3; val_offset:98094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98094*FLEN/8, x4, x1, x2) - -inst_32699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6807fff; valaddr_reg:x3; val_offset:98097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98097*FLEN/8, x4, x1, x2) - -inst_32700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc680ffff; valaddr_reg:x3; val_offset:98100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98100*FLEN/8, x4, x1, x2) - -inst_32701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc681ffff; valaddr_reg:x3; val_offset:98103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98103*FLEN/8, x4, x1, x2) - -inst_32702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc683ffff; valaddr_reg:x3; val_offset:98106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98106*FLEN/8, x4, x1, x2) - -inst_32703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc687ffff; valaddr_reg:x3; val_offset:98109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98109*FLEN/8, x4, x1, x2) - -inst_32704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc68fffff; valaddr_reg:x3; val_offset:98112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98112*FLEN/8, x4, x1, x2) - -inst_32705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc69fffff; valaddr_reg:x3; val_offset:98115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98115*FLEN/8, x4, x1, x2) - -inst_32706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6bfffff; valaddr_reg:x3; val_offset:98118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98118*FLEN/8, x4, x1, x2) - -inst_32707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6c00000; valaddr_reg:x3; val_offset:98121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98121*FLEN/8, x4, x1, x2) - -inst_32708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6e00000; valaddr_reg:x3; val_offset:98124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98124*FLEN/8, x4, x1, x2) - -inst_32709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6f00000; valaddr_reg:x3; val_offset:98127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98127*FLEN/8, x4, x1, x2) - -inst_32710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6f80000; valaddr_reg:x3; val_offset:98130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98130*FLEN/8, x4, x1, x2) - -inst_32711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fc0000; valaddr_reg:x3; val_offset:98133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98133*FLEN/8, x4, x1, x2) - -inst_32712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fe0000; valaddr_reg:x3; val_offset:98136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98136*FLEN/8, x4, x1, x2) - -inst_32713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ff0000; valaddr_reg:x3; val_offset:98139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98139*FLEN/8, x4, x1, x2) - -inst_32714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ff8000; valaddr_reg:x3; val_offset:98142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98142*FLEN/8, x4, x1, x2) - -inst_32715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ffc000; valaddr_reg:x3; val_offset:98145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98145*FLEN/8, x4, x1, x2) - -inst_32716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ffe000; valaddr_reg:x3; val_offset:98148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98148*FLEN/8, x4, x1, x2) - -inst_32717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fff000; valaddr_reg:x3; val_offset:98151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98151*FLEN/8, x4, x1, x2) - -inst_32718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fff800; valaddr_reg:x3; val_offset:98154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98154*FLEN/8, x4, x1, x2) - -inst_32719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fffc00; valaddr_reg:x3; val_offset:98157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98157*FLEN/8, x4, x1, x2) - -inst_32720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fffe00; valaddr_reg:x3; val_offset:98160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98160*FLEN/8, x4, x1, x2) - -inst_32721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ffff00; valaddr_reg:x3; val_offset:98163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98163*FLEN/8, x4, x1, x2) - -inst_32722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ffff80; valaddr_reg:x3; val_offset:98166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98166*FLEN/8, x4, x1, x2) - -inst_32723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ffffc0; valaddr_reg:x3; val_offset:98169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98169*FLEN/8, x4, x1, x2) - -inst_32724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ffffe0; valaddr_reg:x3; val_offset:98172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98172*FLEN/8, x4, x1, x2) - -inst_32725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fffff0; valaddr_reg:x3; val_offset:98175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98175*FLEN/8, x4, x1, x2) - -inst_32726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fffff8; valaddr_reg:x3; val_offset:98178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98178*FLEN/8, x4, x1, x2) - -inst_32727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fffffc; valaddr_reg:x3; val_offset:98181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98181*FLEN/8, x4, x1, x2) - -inst_32728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6fffffe; valaddr_reg:x3; val_offset:98184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98184*FLEN/8, x4, x1, x2) - -inst_32729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; -op3val:0xc6ffffff; valaddr_reg:x3; val_offset:98187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98187*FLEN/8, x4, x1, x2) - -inst_32730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:98190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98190*FLEN/8, x4, x1, x2) - -inst_32731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:98193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98193*FLEN/8, x4, x1, x2) - -inst_32732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:98196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98196*FLEN/8, x4, x1, x2) - -inst_32733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:98199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98199*FLEN/8, x4, x1, x2) - -inst_32734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:98202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98202*FLEN/8, x4, x1, x2) - -inst_32735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:98205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98205*FLEN/8, x4, x1, x2) - -inst_32736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:98208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98208*FLEN/8, x4, x1, x2) - -inst_32737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:98211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98211*FLEN/8, x4, x1, x2) - -inst_32738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:98214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98214*FLEN/8, x4, x1, x2) - -inst_32739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:98217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98217*FLEN/8, x4, x1, x2) - -inst_32740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:98220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98220*FLEN/8, x4, x1, x2) - -inst_32741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:98223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98223*FLEN/8, x4, x1, x2) - -inst_32742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:98226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98226*FLEN/8, x4, x1, x2) - -inst_32743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:98229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98229*FLEN/8, x4, x1, x2) - -inst_32744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:98232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98232*FLEN/8, x4, x1, x2) - -inst_32745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:98235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98235*FLEN/8, x4, x1, x2) - -inst_32746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa000000; valaddr_reg:x3; val_offset:98238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98238*FLEN/8, x4, x1, x2) - -inst_32747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa000001; valaddr_reg:x3; val_offset:98241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98241*FLEN/8, x4, x1, x2) - -inst_32748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa000003; valaddr_reg:x3; val_offset:98244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98244*FLEN/8, x4, x1, x2) - -inst_32749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa000007; valaddr_reg:x3; val_offset:98247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98247*FLEN/8, x4, x1, x2) - -inst_32750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa00000f; valaddr_reg:x3; val_offset:98250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98250*FLEN/8, x4, x1, x2) - -inst_32751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa00001f; valaddr_reg:x3; val_offset:98253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98253*FLEN/8, x4, x1, x2) - -inst_32752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa00003f; valaddr_reg:x3; val_offset:98256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98256*FLEN/8, x4, x1, x2) - -inst_32753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa00007f; valaddr_reg:x3; val_offset:98259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98259*FLEN/8, x4, x1, x2) - -inst_32754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa0000ff; valaddr_reg:x3; val_offset:98262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98262*FLEN/8, x4, x1, x2) - -inst_32755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa0001ff; valaddr_reg:x3; val_offset:98265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98265*FLEN/8, x4, x1, x2) - -inst_32756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa0003ff; valaddr_reg:x3; val_offset:98268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98268*FLEN/8, x4, x1, x2) - -inst_32757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa0007ff; valaddr_reg:x3; val_offset:98271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98271*FLEN/8, x4, x1, x2) - -inst_32758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa000fff; valaddr_reg:x3; val_offset:98274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98274*FLEN/8, x4, x1, x2) - -inst_32759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa001fff; valaddr_reg:x3; val_offset:98277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98277*FLEN/8, x4, x1, x2) - -inst_32760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa003fff; valaddr_reg:x3; val_offset:98280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98280*FLEN/8, x4, x1, x2) - -inst_32761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa007fff; valaddr_reg:x3; val_offset:98283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98283*FLEN/8, x4, x1, x2) - -inst_32762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa00ffff; valaddr_reg:x3; val_offset:98286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98286*FLEN/8, x4, x1, x2) - -inst_32763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa01ffff; valaddr_reg:x3; val_offset:98289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98289*FLEN/8, x4, x1, x2) - -inst_32764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa03ffff; valaddr_reg:x3; val_offset:98292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98292*FLEN/8, x4, x1, x2) - -inst_32765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa07ffff; valaddr_reg:x3; val_offset:98295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98295*FLEN/8, x4, x1, x2) - -inst_32766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa0fffff; valaddr_reg:x3; val_offset:98298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98298*FLEN/8, x4, x1, x2) - -inst_32767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa1fffff; valaddr_reg:x3; val_offset:98301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98301*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_257) - -inst_32768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa3fffff; valaddr_reg:x3; val_offset:98304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98304*FLEN/8, x4, x1, x2) - -inst_32769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa400000; valaddr_reg:x3; val_offset:98307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98307*FLEN/8, x4, x1, x2) - -inst_32770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa600000; valaddr_reg:x3; val_offset:98310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98310*FLEN/8, x4, x1, x2) - -inst_32771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa700000; valaddr_reg:x3; val_offset:98313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98313*FLEN/8, x4, x1, x2) - -inst_32772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa780000; valaddr_reg:x3; val_offset:98316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98316*FLEN/8, x4, x1, x2) - -inst_32773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7c0000; valaddr_reg:x3; val_offset:98319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98319*FLEN/8, x4, x1, x2) - -inst_32774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7e0000; valaddr_reg:x3; val_offset:98322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98322*FLEN/8, x4, x1, x2) - -inst_32775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7f0000; valaddr_reg:x3; val_offset:98325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98325*FLEN/8, x4, x1, x2) - -inst_32776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7f8000; valaddr_reg:x3; val_offset:98328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98328*FLEN/8, x4, x1, x2) - -inst_32777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7fc000; valaddr_reg:x3; val_offset:98331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98331*FLEN/8, x4, x1, x2) - -inst_32778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7fe000; valaddr_reg:x3; val_offset:98334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98334*FLEN/8, x4, x1, x2) - -inst_32779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7ff000; valaddr_reg:x3; val_offset:98337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98337*FLEN/8, x4, x1, x2) - -inst_32780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7ff800; valaddr_reg:x3; val_offset:98340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98340*FLEN/8, x4, x1, x2) - -inst_32781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7ffc00; valaddr_reg:x3; val_offset:98343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98343*FLEN/8, x4, x1, x2) - -inst_32782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7ffe00; valaddr_reg:x3; val_offset:98346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98346*FLEN/8, x4, x1, x2) - -inst_32783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7fff00; valaddr_reg:x3; val_offset:98349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98349*FLEN/8, x4, x1, x2) - -inst_32784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7fff80; valaddr_reg:x3; val_offset:98352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98352*FLEN/8, x4, x1, x2) - -inst_32785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7fffc0; valaddr_reg:x3; val_offset:98355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98355*FLEN/8, x4, x1, x2) - -inst_32786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7fffe0; valaddr_reg:x3; val_offset:98358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98358*FLEN/8, x4, x1, x2) - -inst_32787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7ffff0; valaddr_reg:x3; val_offset:98361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98361*FLEN/8, x4, x1, x2) - -inst_32788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7ffff8; valaddr_reg:x3; val_offset:98364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98364*FLEN/8, x4, x1, x2) - -inst_32789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7ffffc; valaddr_reg:x3; val_offset:98367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98367*FLEN/8, x4, x1, x2) - -inst_32790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7ffffe; valaddr_reg:x3; val_offset:98370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98370*FLEN/8, x4, x1, x2) - -inst_32791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; -op3val:0xa7fffff; valaddr_reg:x3; val_offset:98373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98373*FLEN/8, x4, x1, x2) - -inst_32792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbf800001; valaddr_reg:x3; val_offset:98376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98376*FLEN/8, x4, x1, x2) - -inst_32793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbf800003; valaddr_reg:x3; val_offset:98379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98379*FLEN/8, x4, x1, x2) - -inst_32794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbf800007; valaddr_reg:x3; val_offset:98382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98382*FLEN/8, x4, x1, x2) - -inst_32795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbf999999; valaddr_reg:x3; val_offset:98385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98385*FLEN/8, x4, x1, x2) - -inst_32796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:98388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98388*FLEN/8, x4, x1, x2) - -inst_32797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:98391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98391*FLEN/8, x4, x1, x2) - -inst_32798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:98394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98394*FLEN/8, x4, x1, x2) - -inst_32799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:98397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98397*FLEN/8, x4, x1, x2) - -inst_32800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:98400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98400*FLEN/8, x4, x1, x2) - -inst_32801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:98403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98403*FLEN/8, x4, x1, x2) - -inst_32802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:98406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98406*FLEN/8, x4, x1, x2) - -inst_32803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:98409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98409*FLEN/8, x4, x1, x2) - -inst_32804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:98412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98412*FLEN/8, x4, x1, x2) - -inst_32805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:98415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98415*FLEN/8, x4, x1, x2) - -inst_32806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:98418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98418*FLEN/8, x4, x1, x2) - -inst_32807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:98421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98421*FLEN/8, x4, x1, x2) - -inst_32808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3000000; valaddr_reg:x3; val_offset:98424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98424*FLEN/8, x4, x1, x2) - -inst_32809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3000001; valaddr_reg:x3; val_offset:98427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98427*FLEN/8, x4, x1, x2) - -inst_32810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3000003; valaddr_reg:x3; val_offset:98430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98430*FLEN/8, x4, x1, x2) - -inst_32811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3000007; valaddr_reg:x3; val_offset:98433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98433*FLEN/8, x4, x1, x2) - -inst_32812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc300000f; valaddr_reg:x3; val_offset:98436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98436*FLEN/8, x4, x1, x2) - -inst_32813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc300001f; valaddr_reg:x3; val_offset:98439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98439*FLEN/8, x4, x1, x2) - -inst_32814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc300003f; valaddr_reg:x3; val_offset:98442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98442*FLEN/8, x4, x1, x2) - -inst_32815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc300007f; valaddr_reg:x3; val_offset:98445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98445*FLEN/8, x4, x1, x2) - -inst_32816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc30000ff; valaddr_reg:x3; val_offset:98448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98448*FLEN/8, x4, x1, x2) - -inst_32817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc30001ff; valaddr_reg:x3; val_offset:98451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98451*FLEN/8, x4, x1, x2) - -inst_32818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc30003ff; valaddr_reg:x3; val_offset:98454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98454*FLEN/8, x4, x1, x2) - -inst_32819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc30007ff; valaddr_reg:x3; val_offset:98457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98457*FLEN/8, x4, x1, x2) - -inst_32820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3000fff; valaddr_reg:x3; val_offset:98460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98460*FLEN/8, x4, x1, x2) - -inst_32821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3001fff; valaddr_reg:x3; val_offset:98463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98463*FLEN/8, x4, x1, x2) - -inst_32822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3003fff; valaddr_reg:x3; val_offset:98466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98466*FLEN/8, x4, x1, x2) - -inst_32823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3007fff; valaddr_reg:x3; val_offset:98469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98469*FLEN/8, x4, x1, x2) - -inst_32824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc300ffff; valaddr_reg:x3; val_offset:98472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98472*FLEN/8, x4, x1, x2) - -inst_32825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc301ffff; valaddr_reg:x3; val_offset:98475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98475*FLEN/8, x4, x1, x2) - -inst_32826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc303ffff; valaddr_reg:x3; val_offset:98478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98478*FLEN/8, x4, x1, x2) - -inst_32827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc307ffff; valaddr_reg:x3; val_offset:98481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98481*FLEN/8, x4, x1, x2) - -inst_32828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc30fffff; valaddr_reg:x3; val_offset:98484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98484*FLEN/8, x4, x1, x2) - -inst_32829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc31fffff; valaddr_reg:x3; val_offset:98487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98487*FLEN/8, x4, x1, x2) - -inst_32830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc33fffff; valaddr_reg:x3; val_offset:98490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98490*FLEN/8, x4, x1, x2) - -inst_32831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3400000; valaddr_reg:x3; val_offset:98493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98493*FLEN/8, x4, x1, x2) - -inst_32832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3600000; valaddr_reg:x3; val_offset:98496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98496*FLEN/8, x4, x1, x2) - -inst_32833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3700000; valaddr_reg:x3; val_offset:98499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98499*FLEN/8, x4, x1, x2) - -inst_32834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc3780000; valaddr_reg:x3; val_offset:98502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98502*FLEN/8, x4, x1, x2) - -inst_32835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37c0000; valaddr_reg:x3; val_offset:98505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98505*FLEN/8, x4, x1, x2) - -inst_32836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37e0000; valaddr_reg:x3; val_offset:98508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98508*FLEN/8, x4, x1, x2) - -inst_32837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37f0000; valaddr_reg:x3; val_offset:98511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98511*FLEN/8, x4, x1, x2) - -inst_32838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37f8000; valaddr_reg:x3; val_offset:98514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98514*FLEN/8, x4, x1, x2) - -inst_32839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37fc000; valaddr_reg:x3; val_offset:98517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98517*FLEN/8, x4, x1, x2) - -inst_32840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37fe000; valaddr_reg:x3; val_offset:98520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98520*FLEN/8, x4, x1, x2) - -inst_32841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37ff000; valaddr_reg:x3; val_offset:98523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98523*FLEN/8, x4, x1, x2) - -inst_32842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37ff800; valaddr_reg:x3; val_offset:98526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98526*FLEN/8, x4, x1, x2) - -inst_32843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37ffc00; valaddr_reg:x3; val_offset:98529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98529*FLEN/8, x4, x1, x2) - -inst_32844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37ffe00; valaddr_reg:x3; val_offset:98532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98532*FLEN/8, x4, x1, x2) - -inst_32845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37fff00; valaddr_reg:x3; val_offset:98535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98535*FLEN/8, x4, x1, x2) - -inst_32846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37fff80; valaddr_reg:x3; val_offset:98538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98538*FLEN/8, x4, x1, x2) - -inst_32847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37fffc0; valaddr_reg:x3; val_offset:98541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98541*FLEN/8, x4, x1, x2) - -inst_32848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37fffe0; valaddr_reg:x3; val_offset:98544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98544*FLEN/8, x4, x1, x2) - -inst_32849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37ffff0; valaddr_reg:x3; val_offset:98547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98547*FLEN/8, x4, x1, x2) - -inst_32850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37ffff8; valaddr_reg:x3; val_offset:98550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98550*FLEN/8, x4, x1, x2) - -inst_32851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37ffffc; valaddr_reg:x3; val_offset:98553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98553*FLEN/8, x4, x1, x2) - -inst_32852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37ffffe; valaddr_reg:x3; val_offset:98556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98556*FLEN/8, x4, x1, x2) - -inst_32853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; -op3val:0xc37fffff; valaddr_reg:x3; val_offset:98559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98559*FLEN/8, x4, x1, x2) - -inst_32854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:98562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98562*FLEN/8, x4, x1, x2) - -inst_32855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:98565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98565*FLEN/8, x4, x1, x2) - -inst_32856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:98568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98568*FLEN/8, x4, x1, x2) - -inst_32857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:98571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98571*FLEN/8, x4, x1, x2) - -inst_32858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:98574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98574*FLEN/8, x4, x1, x2) - -inst_32859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:98577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98577*FLEN/8, x4, x1, x2) - -inst_32860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:98580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98580*FLEN/8, x4, x1, x2) - -inst_32861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:98583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98583*FLEN/8, x4, x1, x2) - -inst_32862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:98586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98586*FLEN/8, x4, x1, x2) - -inst_32863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:98589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98589*FLEN/8, x4, x1, x2) - -inst_32864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:98592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98592*FLEN/8, x4, x1, x2) - -inst_32865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:98595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98595*FLEN/8, x4, x1, x2) - -inst_32866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:98598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98598*FLEN/8, x4, x1, x2) - -inst_32867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:98601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98601*FLEN/8, x4, x1, x2) - -inst_32868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:98604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98604*FLEN/8, x4, x1, x2) - -inst_32869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:98607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98607*FLEN/8, x4, x1, x2) - -inst_32870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87000000; valaddr_reg:x3; val_offset:98610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98610*FLEN/8, x4, x1, x2) - -inst_32871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87000001; valaddr_reg:x3; val_offset:98613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98613*FLEN/8, x4, x1, x2) - -inst_32872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87000003; valaddr_reg:x3; val_offset:98616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98616*FLEN/8, x4, x1, x2) - -inst_32873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87000007; valaddr_reg:x3; val_offset:98619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98619*FLEN/8, x4, x1, x2) - -inst_32874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8700000f; valaddr_reg:x3; val_offset:98622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98622*FLEN/8, x4, x1, x2) - -inst_32875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8700001f; valaddr_reg:x3; val_offset:98625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98625*FLEN/8, x4, x1, x2) - -inst_32876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8700003f; valaddr_reg:x3; val_offset:98628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98628*FLEN/8, x4, x1, x2) - -inst_32877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8700007f; valaddr_reg:x3; val_offset:98631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98631*FLEN/8, x4, x1, x2) - -inst_32878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x870000ff; valaddr_reg:x3; val_offset:98634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98634*FLEN/8, x4, x1, x2) - -inst_32879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x870001ff; valaddr_reg:x3; val_offset:98637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98637*FLEN/8, x4, x1, x2) - -inst_32880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x870003ff; valaddr_reg:x3; val_offset:98640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98640*FLEN/8, x4, x1, x2) - -inst_32881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x870007ff; valaddr_reg:x3; val_offset:98643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98643*FLEN/8, x4, x1, x2) - -inst_32882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87000fff; valaddr_reg:x3; val_offset:98646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98646*FLEN/8, x4, x1, x2) - -inst_32883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87001fff; valaddr_reg:x3; val_offset:98649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98649*FLEN/8, x4, x1, x2) - -inst_32884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87003fff; valaddr_reg:x3; val_offset:98652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98652*FLEN/8, x4, x1, x2) - -inst_32885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87007fff; valaddr_reg:x3; val_offset:98655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98655*FLEN/8, x4, x1, x2) - -inst_32886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8700ffff; valaddr_reg:x3; val_offset:98658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98658*FLEN/8, x4, x1, x2) - -inst_32887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8701ffff; valaddr_reg:x3; val_offset:98661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98661*FLEN/8, x4, x1, x2) - -inst_32888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8703ffff; valaddr_reg:x3; val_offset:98664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98664*FLEN/8, x4, x1, x2) - -inst_32889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x8707ffff; valaddr_reg:x3; val_offset:98667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98667*FLEN/8, x4, x1, x2) - -inst_32890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x870fffff; valaddr_reg:x3; val_offset:98670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98670*FLEN/8, x4, x1, x2) - -inst_32891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x871fffff; valaddr_reg:x3; val_offset:98673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98673*FLEN/8, x4, x1, x2) - -inst_32892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x873fffff; valaddr_reg:x3; val_offset:98676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98676*FLEN/8, x4, x1, x2) - -inst_32893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87400000; valaddr_reg:x3; val_offset:98679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98679*FLEN/8, x4, x1, x2) - -inst_32894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87600000; valaddr_reg:x3; val_offset:98682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98682*FLEN/8, x4, x1, x2) - -inst_32895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87700000; valaddr_reg:x3; val_offset:98685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98685*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_258) - -inst_32896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x87780000; valaddr_reg:x3; val_offset:98688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98688*FLEN/8, x4, x1, x2) - -inst_32897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877c0000; valaddr_reg:x3; val_offset:98691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98691*FLEN/8, x4, x1, x2) - -inst_32898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877e0000; valaddr_reg:x3; val_offset:98694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98694*FLEN/8, x4, x1, x2) - -inst_32899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877f0000; valaddr_reg:x3; val_offset:98697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98697*FLEN/8, x4, x1, x2) - -inst_32900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877f8000; valaddr_reg:x3; val_offset:98700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98700*FLEN/8, x4, x1, x2) - -inst_32901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877fc000; valaddr_reg:x3; val_offset:98703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98703*FLEN/8, x4, x1, x2) - -inst_32902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877fe000; valaddr_reg:x3; val_offset:98706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98706*FLEN/8, x4, x1, x2) - -inst_32903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877ff000; valaddr_reg:x3; val_offset:98709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98709*FLEN/8, x4, x1, x2) - -inst_32904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877ff800; valaddr_reg:x3; val_offset:98712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98712*FLEN/8, x4, x1, x2) - -inst_32905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877ffc00; valaddr_reg:x3; val_offset:98715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98715*FLEN/8, x4, x1, x2) - -inst_32906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877ffe00; valaddr_reg:x3; val_offset:98718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98718*FLEN/8, x4, x1, x2) - -inst_32907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877fff00; valaddr_reg:x3; val_offset:98721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98721*FLEN/8, x4, x1, x2) - -inst_32908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877fff80; valaddr_reg:x3; val_offset:98724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98724*FLEN/8, x4, x1, x2) - -inst_32909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877fffc0; valaddr_reg:x3; val_offset:98727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98727*FLEN/8, x4, x1, x2) - -inst_32910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877fffe0; valaddr_reg:x3; val_offset:98730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98730*FLEN/8, x4, x1, x2) - -inst_32911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877ffff0; valaddr_reg:x3; val_offset:98733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98733*FLEN/8, x4, x1, x2) - -inst_32912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877ffff8; valaddr_reg:x3; val_offset:98736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98736*FLEN/8, x4, x1, x2) - -inst_32913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877ffffc; valaddr_reg:x3; val_offset:98739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98739*FLEN/8, x4, x1, x2) - -inst_32914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877ffffe; valaddr_reg:x3; val_offset:98742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98742*FLEN/8, x4, x1, x2) - -inst_32915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; -op3val:0x877fffff; valaddr_reg:x3; val_offset:98745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98745*FLEN/8, x4, x1, x2) - -inst_32916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1800000; valaddr_reg:x3; val_offset:98748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98748*FLEN/8, x4, x1, x2) - -inst_32917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1800001; valaddr_reg:x3; val_offset:98751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98751*FLEN/8, x4, x1, x2) - -inst_32918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1800003; valaddr_reg:x3; val_offset:98754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98754*FLEN/8, x4, x1, x2) - -inst_32919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1800007; valaddr_reg:x3; val_offset:98757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98757*FLEN/8, x4, x1, x2) - -inst_32920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa180000f; valaddr_reg:x3; val_offset:98760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98760*FLEN/8, x4, x1, x2) - -inst_32921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa180001f; valaddr_reg:x3; val_offset:98763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98763*FLEN/8, x4, x1, x2) - -inst_32922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa180003f; valaddr_reg:x3; val_offset:98766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98766*FLEN/8, x4, x1, x2) - -inst_32923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa180007f; valaddr_reg:x3; val_offset:98769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98769*FLEN/8, x4, x1, x2) - -inst_32924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa18000ff; valaddr_reg:x3; val_offset:98772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98772*FLEN/8, x4, x1, x2) - -inst_32925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa18001ff; valaddr_reg:x3; val_offset:98775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98775*FLEN/8, x4, x1, x2) - -inst_32926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa18003ff; valaddr_reg:x3; val_offset:98778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98778*FLEN/8, x4, x1, x2) - -inst_32927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa18007ff; valaddr_reg:x3; val_offset:98781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98781*FLEN/8, x4, x1, x2) - -inst_32928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1800fff; valaddr_reg:x3; val_offset:98784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98784*FLEN/8, x4, x1, x2) - -inst_32929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1801fff; valaddr_reg:x3; val_offset:98787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98787*FLEN/8, x4, x1, x2) - -inst_32930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1803fff; valaddr_reg:x3; val_offset:98790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98790*FLEN/8, x4, x1, x2) - -inst_32931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1807fff; valaddr_reg:x3; val_offset:98793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98793*FLEN/8, x4, x1, x2) - -inst_32932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa180ffff; valaddr_reg:x3; val_offset:98796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98796*FLEN/8, x4, x1, x2) - -inst_32933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa181ffff; valaddr_reg:x3; val_offset:98799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98799*FLEN/8, x4, x1, x2) - -inst_32934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa183ffff; valaddr_reg:x3; val_offset:98802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98802*FLEN/8, x4, x1, x2) - -inst_32935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa187ffff; valaddr_reg:x3; val_offset:98805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98805*FLEN/8, x4, x1, x2) - -inst_32936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa18fffff; valaddr_reg:x3; val_offset:98808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98808*FLEN/8, x4, x1, x2) - -inst_32937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa19fffff; valaddr_reg:x3; val_offset:98811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98811*FLEN/8, x4, x1, x2) - -inst_32938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1bfffff; valaddr_reg:x3; val_offset:98814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98814*FLEN/8, x4, x1, x2) - -inst_32939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1c00000; valaddr_reg:x3; val_offset:98817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98817*FLEN/8, x4, x1, x2) - -inst_32940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1e00000; valaddr_reg:x3; val_offset:98820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98820*FLEN/8, x4, x1, x2) - -inst_32941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1f00000; valaddr_reg:x3; val_offset:98823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98823*FLEN/8, x4, x1, x2) - -inst_32942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1f80000; valaddr_reg:x3; val_offset:98826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98826*FLEN/8, x4, x1, x2) - -inst_32943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fc0000; valaddr_reg:x3; val_offset:98829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98829*FLEN/8, x4, x1, x2) - -inst_32944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fe0000; valaddr_reg:x3; val_offset:98832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98832*FLEN/8, x4, x1, x2) - -inst_32945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ff0000; valaddr_reg:x3; val_offset:98835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98835*FLEN/8, x4, x1, x2) - -inst_32946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ff8000; valaddr_reg:x3; val_offset:98838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98838*FLEN/8, x4, x1, x2) - -inst_32947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ffc000; valaddr_reg:x3; val_offset:98841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98841*FLEN/8, x4, x1, x2) - -inst_32948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ffe000; valaddr_reg:x3; val_offset:98844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98844*FLEN/8, x4, x1, x2) - -inst_32949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fff000; valaddr_reg:x3; val_offset:98847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98847*FLEN/8, x4, x1, x2) - -inst_32950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fff800; valaddr_reg:x3; val_offset:98850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98850*FLEN/8, x4, x1, x2) - -inst_32951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fffc00; valaddr_reg:x3; val_offset:98853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98853*FLEN/8, x4, x1, x2) - -inst_32952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fffe00; valaddr_reg:x3; val_offset:98856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98856*FLEN/8, x4, x1, x2) - -inst_32953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ffff00; valaddr_reg:x3; val_offset:98859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98859*FLEN/8, x4, x1, x2) - -inst_32954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ffff80; valaddr_reg:x3; val_offset:98862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98862*FLEN/8, x4, x1, x2) - -inst_32955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ffffc0; valaddr_reg:x3; val_offset:98865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98865*FLEN/8, x4, x1, x2) - -inst_32956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ffffe0; valaddr_reg:x3; val_offset:98868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98868*FLEN/8, x4, x1, x2) - -inst_32957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fffff0; valaddr_reg:x3; val_offset:98871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98871*FLEN/8, x4, x1, x2) - -inst_32958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fffff8; valaddr_reg:x3; val_offset:98874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98874*FLEN/8, x4, x1, x2) - -inst_32959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fffffc; valaddr_reg:x3; val_offset:98877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98877*FLEN/8, x4, x1, x2) - -inst_32960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1fffffe; valaddr_reg:x3; val_offset:98880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98880*FLEN/8, x4, x1, x2) - -inst_32961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xa1ffffff; valaddr_reg:x3; val_offset:98883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98883*FLEN/8, x4, x1, x2) - -inst_32962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbf800001; valaddr_reg:x3; val_offset:98886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98886*FLEN/8, x4, x1, x2) - -inst_32963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbf800003; valaddr_reg:x3; val_offset:98889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98889*FLEN/8, x4, x1, x2) - -inst_32964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbf800007; valaddr_reg:x3; val_offset:98892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98892*FLEN/8, x4, x1, x2) - -inst_32965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbf999999; valaddr_reg:x3; val_offset:98895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98895*FLEN/8, x4, x1, x2) - -inst_32966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:98898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98898*FLEN/8, x4, x1, x2) - -inst_32967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:98901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98901*FLEN/8, x4, x1, x2) - -inst_32968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:98904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98904*FLEN/8, x4, x1, x2) - -inst_32969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:98907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98907*FLEN/8, x4, x1, x2) - -inst_32970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:98910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98910*FLEN/8, x4, x1, x2) - -inst_32971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:98913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98913*FLEN/8, x4, x1, x2) - -inst_32972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:98916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98916*FLEN/8, x4, x1, x2) - -inst_32973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:98919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98919*FLEN/8, x4, x1, x2) - -inst_32974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:98922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98922*FLEN/8, x4, x1, x2) - -inst_32975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:98925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98925*FLEN/8, x4, x1, x2) - -inst_32976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:98928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98928*FLEN/8, x4, x1, x2) - -inst_32977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:98931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98931*FLEN/8, x4, x1, x2) - -inst_32978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31000000; valaddr_reg:x3; val_offset:98934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98934*FLEN/8, x4, x1, x2) - -inst_32979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31000001; valaddr_reg:x3; val_offset:98937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98937*FLEN/8, x4, x1, x2) - -inst_32980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31000003; valaddr_reg:x3; val_offset:98940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98940*FLEN/8, x4, x1, x2) - -inst_32981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31000007; valaddr_reg:x3; val_offset:98943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98943*FLEN/8, x4, x1, x2) - -inst_32982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3100000f; valaddr_reg:x3; val_offset:98946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98946*FLEN/8, x4, x1, x2) - -inst_32983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3100001f; valaddr_reg:x3; val_offset:98949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98949*FLEN/8, x4, x1, x2) - -inst_32984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3100003f; valaddr_reg:x3; val_offset:98952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98952*FLEN/8, x4, x1, x2) - -inst_32985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3100007f; valaddr_reg:x3; val_offset:98955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98955*FLEN/8, x4, x1, x2) - -inst_32986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x310000ff; valaddr_reg:x3; val_offset:98958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98958*FLEN/8, x4, x1, x2) - -inst_32987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x310001ff; valaddr_reg:x3; val_offset:98961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98961*FLEN/8, x4, x1, x2) - -inst_32988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x310003ff; valaddr_reg:x3; val_offset:98964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98964*FLEN/8, x4, x1, x2) - -inst_32989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x310007ff; valaddr_reg:x3; val_offset:98967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98967*FLEN/8, x4, x1, x2) - -inst_32990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31000fff; valaddr_reg:x3; val_offset:98970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98970*FLEN/8, x4, x1, x2) - -inst_32991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31001fff; valaddr_reg:x3; val_offset:98973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98973*FLEN/8, x4, x1, x2) - -inst_32992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31003fff; valaddr_reg:x3; val_offset:98976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98976*FLEN/8, x4, x1, x2) - -inst_32993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31007fff; valaddr_reg:x3; val_offset:98979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98979*FLEN/8, x4, x1, x2) - -inst_32994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3100ffff; valaddr_reg:x3; val_offset:98982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98982*FLEN/8, x4, x1, x2) - -inst_32995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3101ffff; valaddr_reg:x3; val_offset:98985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98985*FLEN/8, x4, x1, x2) - -inst_32996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3103ffff; valaddr_reg:x3; val_offset:98988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98988*FLEN/8, x4, x1, x2) - -inst_32997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3107ffff; valaddr_reg:x3; val_offset:98991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98991*FLEN/8, x4, x1, x2) - -inst_32998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x310fffff; valaddr_reg:x3; val_offset:98994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98994*FLEN/8, x4, x1, x2) - -inst_32999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x311fffff; valaddr_reg:x3; val_offset:98997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98997*FLEN/8, x4, x1, x2) - -inst_33000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x313fffff; valaddr_reg:x3; val_offset:99000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99000*FLEN/8, x4, x1, x2) - -inst_33001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31400000; valaddr_reg:x3; val_offset:99003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99003*FLEN/8, x4, x1, x2) - -inst_33002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31600000; valaddr_reg:x3; val_offset:99006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99006*FLEN/8, x4, x1, x2) - -inst_33003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31700000; valaddr_reg:x3; val_offset:99009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99009*FLEN/8, x4, x1, x2) - -inst_33004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x31780000; valaddr_reg:x3; val_offset:99012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99012*FLEN/8, x4, x1, x2) - -inst_33005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317c0000; valaddr_reg:x3; val_offset:99015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99015*FLEN/8, x4, x1, x2) - -inst_33006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317e0000; valaddr_reg:x3; val_offset:99018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99018*FLEN/8, x4, x1, x2) - -inst_33007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317f0000; valaddr_reg:x3; val_offset:99021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99021*FLEN/8, x4, x1, x2) - -inst_33008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317f8000; valaddr_reg:x3; val_offset:99024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99024*FLEN/8, x4, x1, x2) - -inst_33009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317fc000; valaddr_reg:x3; val_offset:99027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99027*FLEN/8, x4, x1, x2) - -inst_33010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317fe000; valaddr_reg:x3; val_offset:99030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99030*FLEN/8, x4, x1, x2) - -inst_33011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317ff000; valaddr_reg:x3; val_offset:99033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99033*FLEN/8, x4, x1, x2) - -inst_33012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317ff800; valaddr_reg:x3; val_offset:99036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99036*FLEN/8, x4, x1, x2) - -inst_33013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317ffc00; valaddr_reg:x3; val_offset:99039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99039*FLEN/8, x4, x1, x2) - -inst_33014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317ffe00; valaddr_reg:x3; val_offset:99042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99042*FLEN/8, x4, x1, x2) - -inst_33015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317fff00; valaddr_reg:x3; val_offset:99045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99045*FLEN/8, x4, x1, x2) - -inst_33016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317fff80; valaddr_reg:x3; val_offset:99048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99048*FLEN/8, x4, x1, x2) - -inst_33017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317fffc0; valaddr_reg:x3; val_offset:99051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99051*FLEN/8, x4, x1, x2) - -inst_33018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317fffe0; valaddr_reg:x3; val_offset:99054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99054*FLEN/8, x4, x1, x2) - -inst_33019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317ffff0; valaddr_reg:x3; val_offset:99057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99057*FLEN/8, x4, x1, x2) - -inst_33020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317ffff8; valaddr_reg:x3; val_offset:99060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99060*FLEN/8, x4, x1, x2) - -inst_33021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317ffffc; valaddr_reg:x3; val_offset:99063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99063*FLEN/8, x4, x1, x2) - -inst_33022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317ffffe; valaddr_reg:x3; val_offset:99066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99066*FLEN/8, x4, x1, x2) - -inst_33023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x317fffff; valaddr_reg:x3; val_offset:99069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99069*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_259) - -inst_33024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3f800001; valaddr_reg:x3; val_offset:99072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99072*FLEN/8, x4, x1, x2) - -inst_33025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3f800003; valaddr_reg:x3; val_offset:99075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99075*FLEN/8, x4, x1, x2) - -inst_33026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3f800007; valaddr_reg:x3; val_offset:99078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99078*FLEN/8, x4, x1, x2) - -inst_33027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3f999999; valaddr_reg:x3; val_offset:99081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99081*FLEN/8, x4, x1, x2) - -inst_33028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:99084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99084*FLEN/8, x4, x1, x2) - -inst_33029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:99087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99087*FLEN/8, x4, x1, x2) - -inst_33030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:99090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99090*FLEN/8, x4, x1, x2) - -inst_33031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:99093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99093*FLEN/8, x4, x1, x2) - -inst_33032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:99096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99096*FLEN/8, x4, x1, x2) - -inst_33033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:99099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99099*FLEN/8, x4, x1, x2) - -inst_33034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:99102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99102*FLEN/8, x4, x1, x2) - -inst_33035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:99105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99105*FLEN/8, x4, x1, x2) - -inst_33036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:99108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99108*FLEN/8, x4, x1, x2) - -inst_33037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:99111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99111*FLEN/8, x4, x1, x2) - -inst_33038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:99114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99114*FLEN/8, x4, x1, x2) - -inst_33039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:99117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99117*FLEN/8, x4, x1, x2) - -inst_33040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78000000; valaddr_reg:x3; val_offset:99120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99120*FLEN/8, x4, x1, x2) - -inst_33041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78000001; valaddr_reg:x3; val_offset:99123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99123*FLEN/8, x4, x1, x2) - -inst_33042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78000003; valaddr_reg:x3; val_offset:99126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99126*FLEN/8, x4, x1, x2) - -inst_33043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78000007; valaddr_reg:x3; val_offset:99129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99129*FLEN/8, x4, x1, x2) - -inst_33044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7800000f; valaddr_reg:x3; val_offset:99132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99132*FLEN/8, x4, x1, x2) - -inst_33045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7800001f; valaddr_reg:x3; val_offset:99135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99135*FLEN/8, x4, x1, x2) - -inst_33046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7800003f; valaddr_reg:x3; val_offset:99138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99138*FLEN/8, x4, x1, x2) - -inst_33047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7800007f; valaddr_reg:x3; val_offset:99141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99141*FLEN/8, x4, x1, x2) - -inst_33048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x780000ff; valaddr_reg:x3; val_offset:99144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99144*FLEN/8, x4, x1, x2) - -inst_33049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x780001ff; valaddr_reg:x3; val_offset:99147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99147*FLEN/8, x4, x1, x2) - -inst_33050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x780003ff; valaddr_reg:x3; val_offset:99150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99150*FLEN/8, x4, x1, x2) - -inst_33051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x780007ff; valaddr_reg:x3; val_offset:99153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99153*FLEN/8, x4, x1, x2) - -inst_33052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78000fff; valaddr_reg:x3; val_offset:99156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99156*FLEN/8, x4, x1, x2) - -inst_33053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78001fff; valaddr_reg:x3; val_offset:99159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99159*FLEN/8, x4, x1, x2) - -inst_33054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78003fff; valaddr_reg:x3; val_offset:99162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99162*FLEN/8, x4, x1, x2) - -inst_33055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78007fff; valaddr_reg:x3; val_offset:99165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99165*FLEN/8, x4, x1, x2) - -inst_33056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7800ffff; valaddr_reg:x3; val_offset:99168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99168*FLEN/8, x4, x1, x2) - -inst_33057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7801ffff; valaddr_reg:x3; val_offset:99171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99171*FLEN/8, x4, x1, x2) - -inst_33058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7803ffff; valaddr_reg:x3; val_offset:99174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99174*FLEN/8, x4, x1, x2) - -inst_33059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7807ffff; valaddr_reg:x3; val_offset:99177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99177*FLEN/8, x4, x1, x2) - -inst_33060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x780fffff; valaddr_reg:x3; val_offset:99180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99180*FLEN/8, x4, x1, x2) - -inst_33061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x781fffff; valaddr_reg:x3; val_offset:99183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99183*FLEN/8, x4, x1, x2) - -inst_33062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x783fffff; valaddr_reg:x3; val_offset:99186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99186*FLEN/8, x4, x1, x2) - -inst_33063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78400000; valaddr_reg:x3; val_offset:99189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99189*FLEN/8, x4, x1, x2) - -inst_33064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78600000; valaddr_reg:x3; val_offset:99192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99192*FLEN/8, x4, x1, x2) - -inst_33065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78700000; valaddr_reg:x3; val_offset:99195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99195*FLEN/8, x4, x1, x2) - -inst_33066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x78780000; valaddr_reg:x3; val_offset:99198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99198*FLEN/8, x4, x1, x2) - -inst_33067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787c0000; valaddr_reg:x3; val_offset:99201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99201*FLEN/8, x4, x1, x2) - -inst_33068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787e0000; valaddr_reg:x3; val_offset:99204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99204*FLEN/8, x4, x1, x2) - -inst_33069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787f0000; valaddr_reg:x3; val_offset:99207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99207*FLEN/8, x4, x1, x2) - -inst_33070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787f8000; valaddr_reg:x3; val_offset:99210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99210*FLEN/8, x4, x1, x2) - -inst_33071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787fc000; valaddr_reg:x3; val_offset:99213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99213*FLEN/8, x4, x1, x2) - -inst_33072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787fe000; valaddr_reg:x3; val_offset:99216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99216*FLEN/8, x4, x1, x2) - -inst_33073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787ff000; valaddr_reg:x3; val_offset:99219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99219*FLEN/8, x4, x1, x2) - -inst_33074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787ff800; valaddr_reg:x3; val_offset:99222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99222*FLEN/8, x4, x1, x2) - -inst_33075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787ffc00; valaddr_reg:x3; val_offset:99225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99225*FLEN/8, x4, x1, x2) - -inst_33076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787ffe00; valaddr_reg:x3; val_offset:99228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99228*FLEN/8, x4, x1, x2) - -inst_33077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787fff00; valaddr_reg:x3; val_offset:99231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99231*FLEN/8, x4, x1, x2) - -inst_33078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787fff80; valaddr_reg:x3; val_offset:99234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99234*FLEN/8, x4, x1, x2) - -inst_33079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787fffc0; valaddr_reg:x3; val_offset:99237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99237*FLEN/8, x4, x1, x2) - -inst_33080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787fffe0; valaddr_reg:x3; val_offset:99240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99240*FLEN/8, x4, x1, x2) - -inst_33081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787ffff0; valaddr_reg:x3; val_offset:99243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99243*FLEN/8, x4, x1, x2) - -inst_33082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787ffff8; valaddr_reg:x3; val_offset:99246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99246*FLEN/8, x4, x1, x2) - -inst_33083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787ffffc; valaddr_reg:x3; val_offset:99249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99249*FLEN/8, x4, x1, x2) - -inst_33084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787ffffe; valaddr_reg:x3; val_offset:99252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99252*FLEN/8, x4, x1, x2) - -inst_33085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x787fffff; valaddr_reg:x3; val_offset:99255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99255*FLEN/8, x4, x1, x2) - -inst_33086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f000001; valaddr_reg:x3; val_offset:99258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99258*FLEN/8, x4, x1, x2) - -inst_33087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f000003; valaddr_reg:x3; val_offset:99261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99261*FLEN/8, x4, x1, x2) - -inst_33088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f000007; valaddr_reg:x3; val_offset:99264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99264*FLEN/8, x4, x1, x2) - -inst_33089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f199999; valaddr_reg:x3; val_offset:99267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99267*FLEN/8, x4, x1, x2) - -inst_33090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f249249; valaddr_reg:x3; val_offset:99270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99270*FLEN/8, x4, x1, x2) - -inst_33091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f333333; valaddr_reg:x3; val_offset:99273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99273*FLEN/8, x4, x1, x2) - -inst_33092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:99276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99276*FLEN/8, x4, x1, x2) - -inst_33093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:99279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99279*FLEN/8, x4, x1, x2) - -inst_33094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f444444; valaddr_reg:x3; val_offset:99282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99282*FLEN/8, x4, x1, x2) - -inst_33095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:99285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99285*FLEN/8, x4, x1, x2) - -inst_33096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:99288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99288*FLEN/8, x4, x1, x2) - -inst_33097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f666666; valaddr_reg:x3; val_offset:99291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99291*FLEN/8, x4, x1, x2) - -inst_33098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:99294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99294*FLEN/8, x4, x1, x2) - -inst_33099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:99297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99297*FLEN/8, x4, x1, x2) - -inst_33100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:99300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99300*FLEN/8, x4, x1, x2) - -inst_33101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:99303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99303*FLEN/8, x4, x1, x2) - -inst_33102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:99306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99306*FLEN/8, x4, x1, x2) - -inst_33103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:99309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99309*FLEN/8, x4, x1, x2) - -inst_33104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:99312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99312*FLEN/8, x4, x1, x2) - -inst_33105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:99315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99315*FLEN/8, x4, x1, x2) - -inst_33106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:99318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99318*FLEN/8, x4, x1, x2) - -inst_33107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:99321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99321*FLEN/8, x4, x1, x2) - -inst_33108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:99324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99324*FLEN/8, x4, x1, x2) - -inst_33109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:99327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99327*FLEN/8, x4, x1, x2) - -inst_33110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:99330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99330*FLEN/8, x4, x1, x2) - -inst_33111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:99333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99333*FLEN/8, x4, x1, x2) - -inst_33112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:99336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99336*FLEN/8, x4, x1, x2) - -inst_33113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:99339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99339*FLEN/8, x4, x1, x2) - -inst_33114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:99342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99342*FLEN/8, x4, x1, x2) - -inst_33115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:99345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99345*FLEN/8, x4, x1, x2) - -inst_33116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:99348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99348*FLEN/8, x4, x1, x2) - -inst_33117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:99351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99351*FLEN/8, x4, x1, x2) - -inst_33118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1800000; valaddr_reg:x3; val_offset:99354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99354*FLEN/8, x4, x1, x2) - -inst_33119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1800001; valaddr_reg:x3; val_offset:99357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99357*FLEN/8, x4, x1, x2) - -inst_33120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1800003; valaddr_reg:x3; val_offset:99360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99360*FLEN/8, x4, x1, x2) - -inst_33121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1800007; valaddr_reg:x3; val_offset:99363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99363*FLEN/8, x4, x1, x2) - -inst_33122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x180000f; valaddr_reg:x3; val_offset:99366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99366*FLEN/8, x4, x1, x2) - -inst_33123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x180001f; valaddr_reg:x3; val_offset:99369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99369*FLEN/8, x4, x1, x2) - -inst_33124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x180003f; valaddr_reg:x3; val_offset:99372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99372*FLEN/8, x4, x1, x2) - -inst_33125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x180007f; valaddr_reg:x3; val_offset:99375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99375*FLEN/8, x4, x1, x2) - -inst_33126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x18000ff; valaddr_reg:x3; val_offset:99378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99378*FLEN/8, x4, x1, x2) - -inst_33127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x18001ff; valaddr_reg:x3; val_offset:99381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99381*FLEN/8, x4, x1, x2) - -inst_33128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x18003ff; valaddr_reg:x3; val_offset:99384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99384*FLEN/8, x4, x1, x2) - -inst_33129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x18007ff; valaddr_reg:x3; val_offset:99387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99387*FLEN/8, x4, x1, x2) - -inst_33130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1800fff; valaddr_reg:x3; val_offset:99390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99390*FLEN/8, x4, x1, x2) - -inst_33131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1801fff; valaddr_reg:x3; val_offset:99393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99393*FLEN/8, x4, x1, x2) - -inst_33132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1803fff; valaddr_reg:x3; val_offset:99396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99396*FLEN/8, x4, x1, x2) - -inst_33133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1807fff; valaddr_reg:x3; val_offset:99399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99399*FLEN/8, x4, x1, x2) - -inst_33134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x180ffff; valaddr_reg:x3; val_offset:99402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99402*FLEN/8, x4, x1, x2) - -inst_33135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x181ffff; valaddr_reg:x3; val_offset:99405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99405*FLEN/8, x4, x1, x2) - -inst_33136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x183ffff; valaddr_reg:x3; val_offset:99408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99408*FLEN/8, x4, x1, x2) - -inst_33137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x187ffff; valaddr_reg:x3; val_offset:99411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99411*FLEN/8, x4, x1, x2) - -inst_33138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x18fffff; valaddr_reg:x3; val_offset:99414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99414*FLEN/8, x4, x1, x2) - -inst_33139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x19fffff; valaddr_reg:x3; val_offset:99417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99417*FLEN/8, x4, x1, x2) - -inst_33140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1bfffff; valaddr_reg:x3; val_offset:99420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99420*FLEN/8, x4, x1, x2) - -inst_33141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1c00000; valaddr_reg:x3; val_offset:99423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99423*FLEN/8, x4, x1, x2) - -inst_33142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1e00000; valaddr_reg:x3; val_offset:99426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99426*FLEN/8, x4, x1, x2) - -inst_33143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1f00000; valaddr_reg:x3; val_offset:99429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99429*FLEN/8, x4, x1, x2) - -inst_33144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1f80000; valaddr_reg:x3; val_offset:99432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99432*FLEN/8, x4, x1, x2) - -inst_33145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fc0000; valaddr_reg:x3; val_offset:99435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99435*FLEN/8, x4, x1, x2) - -inst_33146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fe0000; valaddr_reg:x3; val_offset:99438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99438*FLEN/8, x4, x1, x2) - -inst_33147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ff0000; valaddr_reg:x3; val_offset:99441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99441*FLEN/8, x4, x1, x2) - -inst_33148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ff8000; valaddr_reg:x3; val_offset:99444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99444*FLEN/8, x4, x1, x2) - -inst_33149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ffc000; valaddr_reg:x3; val_offset:99447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99447*FLEN/8, x4, x1, x2) - -inst_33150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ffe000; valaddr_reg:x3; val_offset:99450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99450*FLEN/8, x4, x1, x2) - -inst_33151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fff000; valaddr_reg:x3; val_offset:99453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99453*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_260) - -inst_33152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fff800; valaddr_reg:x3; val_offset:99456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99456*FLEN/8, x4, x1, x2) - -inst_33153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fffc00; valaddr_reg:x3; val_offset:99459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99459*FLEN/8, x4, x1, x2) - -inst_33154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fffe00; valaddr_reg:x3; val_offset:99462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99462*FLEN/8, x4, x1, x2) - -inst_33155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ffff00; valaddr_reg:x3; val_offset:99465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99465*FLEN/8, x4, x1, x2) - -inst_33156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ffff80; valaddr_reg:x3; val_offset:99468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99468*FLEN/8, x4, x1, x2) - -inst_33157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ffffc0; valaddr_reg:x3; val_offset:99471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99471*FLEN/8, x4, x1, x2) - -inst_33158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ffffe0; valaddr_reg:x3; val_offset:99474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99474*FLEN/8, x4, x1, x2) - -inst_33159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fffff0; valaddr_reg:x3; val_offset:99477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99477*FLEN/8, x4, x1, x2) - -inst_33160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fffff8; valaddr_reg:x3; val_offset:99480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99480*FLEN/8, x4, x1, x2) - -inst_33161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fffffc; valaddr_reg:x3; val_offset:99483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99483*FLEN/8, x4, x1, x2) - -inst_33162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1fffffe; valaddr_reg:x3; val_offset:99486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99486*FLEN/8, x4, x1, x2) - -inst_33163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; -op3val:0x1ffffff; valaddr_reg:x3; val_offset:99489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99489*FLEN/8, x4, x1, x2) - -inst_33164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60000000; valaddr_reg:x3; val_offset:99492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99492*FLEN/8, x4, x1, x2) - -inst_33165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60000001; valaddr_reg:x3; val_offset:99495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99495*FLEN/8, x4, x1, x2) - -inst_33166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60000003; valaddr_reg:x3; val_offset:99498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99498*FLEN/8, x4, x1, x2) - -inst_33167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60000007; valaddr_reg:x3; val_offset:99501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99501*FLEN/8, x4, x1, x2) - -inst_33168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x6000000f; valaddr_reg:x3; val_offset:99504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99504*FLEN/8, x4, x1, x2) - -inst_33169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x6000001f; valaddr_reg:x3; val_offset:99507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99507*FLEN/8, x4, x1, x2) - -inst_33170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x6000003f; valaddr_reg:x3; val_offset:99510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99510*FLEN/8, x4, x1, x2) - -inst_33171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x6000007f; valaddr_reg:x3; val_offset:99513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99513*FLEN/8, x4, x1, x2) - -inst_33172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x600000ff; valaddr_reg:x3; val_offset:99516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99516*FLEN/8, x4, x1, x2) - -inst_33173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x600001ff; valaddr_reg:x3; val_offset:99519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99519*FLEN/8, x4, x1, x2) - -inst_33174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x600003ff; valaddr_reg:x3; val_offset:99522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99522*FLEN/8, x4, x1, x2) - -inst_33175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x600007ff; valaddr_reg:x3; val_offset:99525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99525*FLEN/8, x4, x1, x2) - -inst_33176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60000fff; valaddr_reg:x3; val_offset:99528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99528*FLEN/8, x4, x1, x2) - -inst_33177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60001fff; valaddr_reg:x3; val_offset:99531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99531*FLEN/8, x4, x1, x2) - -inst_33178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60003fff; valaddr_reg:x3; val_offset:99534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99534*FLEN/8, x4, x1, x2) - -inst_33179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60007fff; valaddr_reg:x3; val_offset:99537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99537*FLEN/8, x4, x1, x2) - -inst_33180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x6000ffff; valaddr_reg:x3; val_offset:99540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99540*FLEN/8, x4, x1, x2) - -inst_33181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x6001ffff; valaddr_reg:x3; val_offset:99543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99543*FLEN/8, x4, x1, x2) - -inst_33182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x6003ffff; valaddr_reg:x3; val_offset:99546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99546*FLEN/8, x4, x1, x2) - -inst_33183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x6007ffff; valaddr_reg:x3; val_offset:99549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99549*FLEN/8, x4, x1, x2) - -inst_33184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x600fffff; valaddr_reg:x3; val_offset:99552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99552*FLEN/8, x4, x1, x2) - -inst_33185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x601fffff; valaddr_reg:x3; val_offset:99555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99555*FLEN/8, x4, x1, x2) - -inst_33186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x603fffff; valaddr_reg:x3; val_offset:99558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99558*FLEN/8, x4, x1, x2) - -inst_33187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60400000; valaddr_reg:x3; val_offset:99561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99561*FLEN/8, x4, x1, x2) - -inst_33188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60600000; valaddr_reg:x3; val_offset:99564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99564*FLEN/8, x4, x1, x2) - -inst_33189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60700000; valaddr_reg:x3; val_offset:99567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99567*FLEN/8, x4, x1, x2) - -inst_33190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x60780000; valaddr_reg:x3; val_offset:99570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99570*FLEN/8, x4, x1, x2) - -inst_33191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607c0000; valaddr_reg:x3; val_offset:99573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99573*FLEN/8, x4, x1, x2) - -inst_33192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607e0000; valaddr_reg:x3; val_offset:99576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99576*FLEN/8, x4, x1, x2) - -inst_33193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607f0000; valaddr_reg:x3; val_offset:99579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99579*FLEN/8, x4, x1, x2) - -inst_33194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607f8000; valaddr_reg:x3; val_offset:99582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99582*FLEN/8, x4, x1, x2) - -inst_33195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607fc000; valaddr_reg:x3; val_offset:99585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99585*FLEN/8, x4, x1, x2) - -inst_33196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607fe000; valaddr_reg:x3; val_offset:99588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99588*FLEN/8, x4, x1, x2) - -inst_33197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607ff000; valaddr_reg:x3; val_offset:99591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99591*FLEN/8, x4, x1, x2) - -inst_33198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607ff800; valaddr_reg:x3; val_offset:99594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99594*FLEN/8, x4, x1, x2) - -inst_33199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607ffc00; valaddr_reg:x3; val_offset:99597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99597*FLEN/8, x4, x1, x2) - -inst_33200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607ffe00; valaddr_reg:x3; val_offset:99600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99600*FLEN/8, x4, x1, x2) - -inst_33201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607fff00; valaddr_reg:x3; val_offset:99603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99603*FLEN/8, x4, x1, x2) - -inst_33202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607fff80; valaddr_reg:x3; val_offset:99606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99606*FLEN/8, x4, x1, x2) - -inst_33203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607fffc0; valaddr_reg:x3; val_offset:99609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99609*FLEN/8, x4, x1, x2) - -inst_33204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607fffe0; valaddr_reg:x3; val_offset:99612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99612*FLEN/8, x4, x1, x2) - -inst_33205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607ffff0; valaddr_reg:x3; val_offset:99615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99615*FLEN/8, x4, x1, x2) - -inst_33206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607ffff8; valaddr_reg:x3; val_offset:99618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99618*FLEN/8, x4, x1, x2) - -inst_33207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607ffffc; valaddr_reg:x3; val_offset:99621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99621*FLEN/8, x4, x1, x2) - -inst_33208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607ffffe; valaddr_reg:x3; val_offset:99624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99624*FLEN/8, x4, x1, x2) - -inst_33209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x607fffff; valaddr_reg:x3; val_offset:99627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99627*FLEN/8, x4, x1, x2) - -inst_33210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f000001; valaddr_reg:x3; val_offset:99630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99630*FLEN/8, x4, x1, x2) - -inst_33211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f000003; valaddr_reg:x3; val_offset:99633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99633*FLEN/8, x4, x1, x2) - -inst_33212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f000007; valaddr_reg:x3; val_offset:99636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99636*FLEN/8, x4, x1, x2) - -inst_33213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f199999; valaddr_reg:x3; val_offset:99639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99639*FLEN/8, x4, x1, x2) - -inst_33214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f249249; valaddr_reg:x3; val_offset:99642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99642*FLEN/8, x4, x1, x2) - -inst_33215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f333333; valaddr_reg:x3; val_offset:99645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99645*FLEN/8, x4, x1, x2) - -inst_33216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:99648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99648*FLEN/8, x4, x1, x2) - -inst_33217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:99651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99651*FLEN/8, x4, x1, x2) - -inst_33218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f444444; valaddr_reg:x3; val_offset:99654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99654*FLEN/8, x4, x1, x2) - -inst_33219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:99657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99657*FLEN/8, x4, x1, x2) - -inst_33220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:99660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99660*FLEN/8, x4, x1, x2) - -inst_33221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f666666; valaddr_reg:x3; val_offset:99663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99663*FLEN/8, x4, x1, x2) - -inst_33222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:99666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99666*FLEN/8, x4, x1, x2) - -inst_33223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:99669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99669*FLEN/8, x4, x1, x2) - -inst_33224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:99672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99672*FLEN/8, x4, x1, x2) - -inst_33225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:99675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99675*FLEN/8, x4, x1, x2) - -inst_33226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:99678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99678*FLEN/8, x4, x1, x2) - -inst_33227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:99681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99681*FLEN/8, x4, x1, x2) - -inst_33228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:99684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99684*FLEN/8, x4, x1, x2) - -inst_33229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:99687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99687*FLEN/8, x4, x1, x2) - -inst_33230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:99690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99690*FLEN/8, x4, x1, x2) - -inst_33231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:99693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99693*FLEN/8, x4, x1, x2) - -inst_33232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:99696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99696*FLEN/8, x4, x1, x2) - -inst_33233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:99699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99699*FLEN/8, x4, x1, x2) - -inst_33234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:99702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99702*FLEN/8, x4, x1, x2) - -inst_33235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:99705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99705*FLEN/8, x4, x1, x2) - -inst_33236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:99708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99708*FLEN/8, x4, x1, x2) - -inst_33237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:99711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99711*FLEN/8, x4, x1, x2) - -inst_33238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:99714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99714*FLEN/8, x4, x1, x2) - -inst_33239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:99717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99717*FLEN/8, x4, x1, x2) - -inst_33240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:99720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99720*FLEN/8, x4, x1, x2) - -inst_33241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:99723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99723*FLEN/8, x4, x1, x2) - -inst_33242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88800000; valaddr_reg:x3; val_offset:99726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99726*FLEN/8, x4, x1, x2) - -inst_33243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88800001; valaddr_reg:x3; val_offset:99729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99729*FLEN/8, x4, x1, x2) - -inst_33244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88800003; valaddr_reg:x3; val_offset:99732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99732*FLEN/8, x4, x1, x2) - -inst_33245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88800007; valaddr_reg:x3; val_offset:99735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99735*FLEN/8, x4, x1, x2) - -inst_33246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8880000f; valaddr_reg:x3; val_offset:99738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99738*FLEN/8, x4, x1, x2) - -inst_33247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8880001f; valaddr_reg:x3; val_offset:99741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99741*FLEN/8, x4, x1, x2) - -inst_33248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8880003f; valaddr_reg:x3; val_offset:99744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99744*FLEN/8, x4, x1, x2) - -inst_33249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8880007f; valaddr_reg:x3; val_offset:99747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99747*FLEN/8, x4, x1, x2) - -inst_33250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x888000ff; valaddr_reg:x3; val_offset:99750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99750*FLEN/8, x4, x1, x2) - -inst_33251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x888001ff; valaddr_reg:x3; val_offset:99753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99753*FLEN/8, x4, x1, x2) - -inst_33252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x888003ff; valaddr_reg:x3; val_offset:99756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99756*FLEN/8, x4, x1, x2) - -inst_33253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x888007ff; valaddr_reg:x3; val_offset:99759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99759*FLEN/8, x4, x1, x2) - -inst_33254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88800fff; valaddr_reg:x3; val_offset:99762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99762*FLEN/8, x4, x1, x2) - -inst_33255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88801fff; valaddr_reg:x3; val_offset:99765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99765*FLEN/8, x4, x1, x2) - -inst_33256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88803fff; valaddr_reg:x3; val_offset:99768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99768*FLEN/8, x4, x1, x2) - -inst_33257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88807fff; valaddr_reg:x3; val_offset:99771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99771*FLEN/8, x4, x1, x2) - -inst_33258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8880ffff; valaddr_reg:x3; val_offset:99774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99774*FLEN/8, x4, x1, x2) - -inst_33259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8881ffff; valaddr_reg:x3; val_offset:99777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99777*FLEN/8, x4, x1, x2) - -inst_33260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8883ffff; valaddr_reg:x3; val_offset:99780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99780*FLEN/8, x4, x1, x2) - -inst_33261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x8887ffff; valaddr_reg:x3; val_offset:99783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99783*FLEN/8, x4, x1, x2) - -inst_33262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x888fffff; valaddr_reg:x3; val_offset:99786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99786*FLEN/8, x4, x1, x2) - -inst_33263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x889fffff; valaddr_reg:x3; val_offset:99789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99789*FLEN/8, x4, x1, x2) - -inst_33264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88bfffff; valaddr_reg:x3; val_offset:99792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99792*FLEN/8, x4, x1, x2) - -inst_33265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88c00000; valaddr_reg:x3; val_offset:99795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99795*FLEN/8, x4, x1, x2) - -inst_33266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88e00000; valaddr_reg:x3; val_offset:99798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99798*FLEN/8, x4, x1, x2) - -inst_33267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88f00000; valaddr_reg:x3; val_offset:99801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99801*FLEN/8, x4, x1, x2) - -inst_33268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88f80000; valaddr_reg:x3; val_offset:99804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99804*FLEN/8, x4, x1, x2) - -inst_33269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fc0000; valaddr_reg:x3; val_offset:99807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99807*FLEN/8, x4, x1, x2) - -inst_33270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fe0000; valaddr_reg:x3; val_offset:99810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99810*FLEN/8, x4, x1, x2) - -inst_33271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ff0000; valaddr_reg:x3; val_offset:99813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99813*FLEN/8, x4, x1, x2) - -inst_33272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ff8000; valaddr_reg:x3; val_offset:99816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99816*FLEN/8, x4, x1, x2) - -inst_33273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ffc000; valaddr_reg:x3; val_offset:99819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99819*FLEN/8, x4, x1, x2) - -inst_33274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ffe000; valaddr_reg:x3; val_offset:99822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99822*FLEN/8, x4, x1, x2) - -inst_33275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fff000; valaddr_reg:x3; val_offset:99825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99825*FLEN/8, x4, x1, x2) - -inst_33276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fff800; valaddr_reg:x3; val_offset:99828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99828*FLEN/8, x4, x1, x2) - -inst_33277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fffc00; valaddr_reg:x3; val_offset:99831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99831*FLEN/8, x4, x1, x2) - -inst_33278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fffe00; valaddr_reg:x3; val_offset:99834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99834*FLEN/8, x4, x1, x2) - -inst_33279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ffff00; valaddr_reg:x3; val_offset:99837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99837*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_261) - -inst_33280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ffff80; valaddr_reg:x3; val_offset:99840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99840*FLEN/8, x4, x1, x2) - -inst_33281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ffffc0; valaddr_reg:x3; val_offset:99843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99843*FLEN/8, x4, x1, x2) - -inst_33282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ffffe0; valaddr_reg:x3; val_offset:99846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99846*FLEN/8, x4, x1, x2) - -inst_33283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fffff0; valaddr_reg:x3; val_offset:99849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99849*FLEN/8, x4, x1, x2) - -inst_33284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fffff8; valaddr_reg:x3; val_offset:99852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99852*FLEN/8, x4, x1, x2) - -inst_33285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fffffc; valaddr_reg:x3; val_offset:99855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99855*FLEN/8, x4, x1, x2) - -inst_33286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88fffffe; valaddr_reg:x3; val_offset:99858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99858*FLEN/8, x4, x1, x2) - -inst_33287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; -op3val:0x88ffffff; valaddr_reg:x3; val_offset:99861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99861*FLEN/8, x4, x1, x2) - -inst_33288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:99864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99864*FLEN/8, x4, x1, x2) - -inst_33289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:99867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99867*FLEN/8, x4, x1, x2) - -inst_33290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:99870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99870*FLEN/8, x4, x1, x2) - -inst_33291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:99873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99873*FLEN/8, x4, x1, x2) - -inst_33292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:99876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99876*FLEN/8, x4, x1, x2) - -inst_33293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:99879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99879*FLEN/8, x4, x1, x2) - -inst_33294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:99882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99882*FLEN/8, x4, x1, x2) - -inst_33295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:99885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99885*FLEN/8, x4, x1, x2) - -inst_33296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:99888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99888*FLEN/8, x4, x1, x2) - -inst_33297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:99891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99891*FLEN/8, x4, x1, x2) - -inst_33298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:99894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99894*FLEN/8, x4, x1, x2) - -inst_33299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:99897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99897*FLEN/8, x4, x1, x2) - -inst_33300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:99900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99900*FLEN/8, x4, x1, x2) - -inst_33301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:99903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99903*FLEN/8, x4, x1, x2) - -inst_33302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:99906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99906*FLEN/8, x4, x1, x2) - -inst_33303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:99909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99909*FLEN/8, x4, x1, x2) - -inst_33304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82000000; valaddr_reg:x3; val_offset:99912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99912*FLEN/8, x4, x1, x2) - -inst_33305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82000001; valaddr_reg:x3; val_offset:99915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99915*FLEN/8, x4, x1, x2) - -inst_33306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82000003; valaddr_reg:x3; val_offset:99918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99918*FLEN/8, x4, x1, x2) - -inst_33307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82000007; valaddr_reg:x3; val_offset:99921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99921*FLEN/8, x4, x1, x2) - -inst_33308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8200000f; valaddr_reg:x3; val_offset:99924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99924*FLEN/8, x4, x1, x2) - -inst_33309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8200001f; valaddr_reg:x3; val_offset:99927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99927*FLEN/8, x4, x1, x2) - -inst_33310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8200003f; valaddr_reg:x3; val_offset:99930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99930*FLEN/8, x4, x1, x2) - -inst_33311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8200007f; valaddr_reg:x3; val_offset:99933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99933*FLEN/8, x4, x1, x2) - -inst_33312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x820000ff; valaddr_reg:x3; val_offset:99936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99936*FLEN/8, x4, x1, x2) - -inst_33313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x820001ff; valaddr_reg:x3; val_offset:99939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99939*FLEN/8, x4, x1, x2) - -inst_33314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x820003ff; valaddr_reg:x3; val_offset:99942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99942*FLEN/8, x4, x1, x2) - -inst_33315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x820007ff; valaddr_reg:x3; val_offset:99945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99945*FLEN/8, x4, x1, x2) - -inst_33316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82000fff; valaddr_reg:x3; val_offset:99948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99948*FLEN/8, x4, x1, x2) - -inst_33317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82001fff; valaddr_reg:x3; val_offset:99951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99951*FLEN/8, x4, x1, x2) - -inst_33318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82003fff; valaddr_reg:x3; val_offset:99954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99954*FLEN/8, x4, x1, x2) - -inst_33319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82007fff; valaddr_reg:x3; val_offset:99957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99957*FLEN/8, x4, x1, x2) - -inst_33320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8200ffff; valaddr_reg:x3; val_offset:99960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99960*FLEN/8, x4, x1, x2) - -inst_33321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8201ffff; valaddr_reg:x3; val_offset:99963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99963*FLEN/8, x4, x1, x2) - -inst_33322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8203ffff; valaddr_reg:x3; val_offset:99966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99966*FLEN/8, x4, x1, x2) - -inst_33323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x8207ffff; valaddr_reg:x3; val_offset:99969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99969*FLEN/8, x4, x1, x2) - -inst_33324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x820fffff; valaddr_reg:x3; val_offset:99972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99972*FLEN/8, x4, x1, x2) - -inst_33325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x821fffff; valaddr_reg:x3; val_offset:99975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99975*FLEN/8, x4, x1, x2) - -inst_33326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x823fffff; valaddr_reg:x3; val_offset:99978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99978*FLEN/8, x4, x1, x2) - -inst_33327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82400000; valaddr_reg:x3; val_offset:99981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99981*FLEN/8, x4, x1, x2) - -inst_33328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82600000; valaddr_reg:x3; val_offset:99984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99984*FLEN/8, x4, x1, x2) - -inst_33329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82700000; valaddr_reg:x3; val_offset:99987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99987*FLEN/8, x4, x1, x2) - -inst_33330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x82780000; valaddr_reg:x3; val_offset:99990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99990*FLEN/8, x4, x1, x2) - -inst_33331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827c0000; valaddr_reg:x3; val_offset:99993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99993*FLEN/8, x4, x1, x2) - -inst_33332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827e0000; valaddr_reg:x3; val_offset:99996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99996*FLEN/8, x4, x1, x2) - -inst_33333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827f0000; valaddr_reg:x3; val_offset:99999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99999*FLEN/8, x4, x1, x2) - -inst_33334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827f8000; valaddr_reg:x3; val_offset:100002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100002*FLEN/8, x4, x1, x2) - -inst_33335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827fc000; valaddr_reg:x3; val_offset:100005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100005*FLEN/8, x4, x1, x2) - -inst_33336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827fe000; valaddr_reg:x3; val_offset:100008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100008*FLEN/8, x4, x1, x2) - -inst_33337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827ff000; valaddr_reg:x3; val_offset:100011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100011*FLEN/8, x4, x1, x2) - -inst_33338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827ff800; valaddr_reg:x3; val_offset:100014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100014*FLEN/8, x4, x1, x2) - -inst_33339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827ffc00; valaddr_reg:x3; val_offset:100017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100017*FLEN/8, x4, x1, x2) - -inst_33340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827ffe00; valaddr_reg:x3; val_offset:100020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100020*FLEN/8, x4, x1, x2) - -inst_33341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827fff00; valaddr_reg:x3; val_offset:100023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100023*FLEN/8, x4, x1, x2) - -inst_33342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827fff80; valaddr_reg:x3; val_offset:100026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100026*FLEN/8, x4, x1, x2) - -inst_33343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827fffc0; valaddr_reg:x3; val_offset:100029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100029*FLEN/8, x4, x1, x2) - -inst_33344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827fffe0; valaddr_reg:x3; val_offset:100032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100032*FLEN/8, x4, x1, x2) - -inst_33345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827ffff0; valaddr_reg:x3; val_offset:100035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100035*FLEN/8, x4, x1, x2) - -inst_33346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827ffff8; valaddr_reg:x3; val_offset:100038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100038*FLEN/8, x4, x1, x2) - -inst_33347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827ffffc; valaddr_reg:x3; val_offset:100041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100041*FLEN/8, x4, x1, x2) - -inst_33348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827ffffe; valaddr_reg:x3; val_offset:100044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100044*FLEN/8, x4, x1, x2) - -inst_33349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; -op3val:0x827fffff; valaddr_reg:x3; val_offset:100047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100047*FLEN/8, x4, x1, x2) - -inst_33350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:100050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100050*FLEN/8, x4, x1, x2) - -inst_33351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:100053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100053*FLEN/8, x4, x1, x2) - -inst_33352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:100056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100056*FLEN/8, x4, x1, x2) - -inst_33353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:100059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100059*FLEN/8, x4, x1, x2) - -inst_33354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:100062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100062*FLEN/8, x4, x1, x2) - -inst_33355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:100065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100065*FLEN/8, x4, x1, x2) - -inst_33356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:100068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100068*FLEN/8, x4, x1, x2) - -inst_33357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:100071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100071*FLEN/8, x4, x1, x2) - -inst_33358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:100074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100074*FLEN/8, x4, x1, x2) - -inst_33359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:100077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100077*FLEN/8, x4, x1, x2) - -inst_33360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:100080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100080*FLEN/8, x4, x1, x2) - -inst_33361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:100083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100083*FLEN/8, x4, x1, x2) - -inst_33362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:100086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100086*FLEN/8, x4, x1, x2) - -inst_33363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:100089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100089*FLEN/8, x4, x1, x2) - -inst_33364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:100092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100092*FLEN/8, x4, x1, x2) - -inst_33365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:100095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100095*FLEN/8, x4, x1, x2) - -inst_33366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb800000; valaddr_reg:x3; val_offset:100098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100098*FLEN/8, x4, x1, x2) - -inst_33367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb800001; valaddr_reg:x3; val_offset:100101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100101*FLEN/8, x4, x1, x2) - -inst_33368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb800003; valaddr_reg:x3; val_offset:100104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100104*FLEN/8, x4, x1, x2) - -inst_33369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb800007; valaddr_reg:x3; val_offset:100107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100107*FLEN/8, x4, x1, x2) - -inst_33370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb80000f; valaddr_reg:x3; val_offset:100110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100110*FLEN/8, x4, x1, x2) - -inst_33371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb80001f; valaddr_reg:x3; val_offset:100113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100113*FLEN/8, x4, x1, x2) - -inst_33372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb80003f; valaddr_reg:x3; val_offset:100116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100116*FLEN/8, x4, x1, x2) - -inst_33373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb80007f; valaddr_reg:x3; val_offset:100119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100119*FLEN/8, x4, x1, x2) - -inst_33374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb8000ff; valaddr_reg:x3; val_offset:100122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100122*FLEN/8, x4, x1, x2) - -inst_33375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb8001ff; valaddr_reg:x3; val_offset:100125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100125*FLEN/8, x4, x1, x2) - -inst_33376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb8003ff; valaddr_reg:x3; val_offset:100128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100128*FLEN/8, x4, x1, x2) - -inst_33377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb8007ff; valaddr_reg:x3; val_offset:100131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100131*FLEN/8, x4, x1, x2) - -inst_33378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb800fff; valaddr_reg:x3; val_offset:100134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100134*FLEN/8, x4, x1, x2) - -inst_33379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb801fff; valaddr_reg:x3; val_offset:100137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100137*FLEN/8, x4, x1, x2) - -inst_33380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb803fff; valaddr_reg:x3; val_offset:100140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100140*FLEN/8, x4, x1, x2) - -inst_33381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb807fff; valaddr_reg:x3; val_offset:100143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100143*FLEN/8, x4, x1, x2) - -inst_33382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb80ffff; valaddr_reg:x3; val_offset:100146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100146*FLEN/8, x4, x1, x2) - -inst_33383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb81ffff; valaddr_reg:x3; val_offset:100149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100149*FLEN/8, x4, x1, x2) - -inst_33384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb83ffff; valaddr_reg:x3; val_offset:100152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100152*FLEN/8, x4, x1, x2) - -inst_33385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb87ffff; valaddr_reg:x3; val_offset:100155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100155*FLEN/8, x4, x1, x2) - -inst_33386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb8fffff; valaddr_reg:x3; val_offset:100158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100158*FLEN/8, x4, x1, x2) - -inst_33387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xb9fffff; valaddr_reg:x3; val_offset:100161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100161*FLEN/8, x4, x1, x2) - -inst_33388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbbfffff; valaddr_reg:x3; val_offset:100164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100164*FLEN/8, x4, x1, x2) - -inst_33389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbc00000; valaddr_reg:x3; val_offset:100167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100167*FLEN/8, x4, x1, x2) - -inst_33390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbe00000; valaddr_reg:x3; val_offset:100170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100170*FLEN/8, x4, x1, x2) - -inst_33391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbf00000; valaddr_reg:x3; val_offset:100173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100173*FLEN/8, x4, x1, x2) - -inst_33392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbf80000; valaddr_reg:x3; val_offset:100176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100176*FLEN/8, x4, x1, x2) - -inst_33393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfc0000; valaddr_reg:x3; val_offset:100179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100179*FLEN/8, x4, x1, x2) - -inst_33394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfe0000; valaddr_reg:x3; val_offset:100182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100182*FLEN/8, x4, x1, x2) - -inst_33395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbff0000; valaddr_reg:x3; val_offset:100185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100185*FLEN/8, x4, x1, x2) - -inst_33396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbff8000; valaddr_reg:x3; val_offset:100188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100188*FLEN/8, x4, x1, x2) - -inst_33397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbffc000; valaddr_reg:x3; val_offset:100191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100191*FLEN/8, x4, x1, x2) - -inst_33398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbffe000; valaddr_reg:x3; val_offset:100194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100194*FLEN/8, x4, x1, x2) - -inst_33399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfff000; valaddr_reg:x3; val_offset:100197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100197*FLEN/8, x4, x1, x2) - -inst_33400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfff800; valaddr_reg:x3; val_offset:100200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100200*FLEN/8, x4, x1, x2) - -inst_33401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfffc00; valaddr_reg:x3; val_offset:100203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100203*FLEN/8, x4, x1, x2) - -inst_33402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfffe00; valaddr_reg:x3; val_offset:100206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100206*FLEN/8, x4, x1, x2) - -inst_33403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbffff00; valaddr_reg:x3; val_offset:100209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100209*FLEN/8, x4, x1, x2) - -inst_33404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbffff80; valaddr_reg:x3; val_offset:100212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100212*FLEN/8, x4, x1, x2) - -inst_33405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbffffc0; valaddr_reg:x3; val_offset:100215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100215*FLEN/8, x4, x1, x2) - -inst_33406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbffffe0; valaddr_reg:x3; val_offset:100218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100218*FLEN/8, x4, x1, x2) - -inst_33407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfffff0; valaddr_reg:x3; val_offset:100221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100221*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_262) - -inst_33408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfffff8; valaddr_reg:x3; val_offset:100224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100224*FLEN/8, x4, x1, x2) - -inst_33409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfffffc; valaddr_reg:x3; val_offset:100227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100227*FLEN/8, x4, x1, x2) - -inst_33410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbfffffe; valaddr_reg:x3; val_offset:100230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100230*FLEN/8, x4, x1, x2) - -inst_33411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; -op3val:0xbffffff; valaddr_reg:x3; val_offset:100233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100233*FLEN/8, x4, x1, x2) - -inst_33412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:100236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100236*FLEN/8, x4, x1, x2) - -inst_33413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:100239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100239*FLEN/8, x4, x1, x2) - -inst_33414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:100242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100242*FLEN/8, x4, x1, x2) - -inst_33415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:100245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100245*FLEN/8, x4, x1, x2) - -inst_33416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:100248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100248*FLEN/8, x4, x1, x2) - -inst_33417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:100251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100251*FLEN/8, x4, x1, x2) - -inst_33418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:100254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100254*FLEN/8, x4, x1, x2) - -inst_33419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:100257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100257*FLEN/8, x4, x1, x2) - -inst_33420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:100260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100260*FLEN/8, x4, x1, x2) - -inst_33421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:100263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100263*FLEN/8, x4, x1, x2) - -inst_33422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:100266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100266*FLEN/8, x4, x1, x2) - -inst_33423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:100269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100269*FLEN/8, x4, x1, x2) - -inst_33424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:100272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100272*FLEN/8, x4, x1, x2) - -inst_33425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:100275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100275*FLEN/8, x4, x1, x2) - -inst_33426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:100278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100278*FLEN/8, x4, x1, x2) - -inst_33427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:100281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100281*FLEN/8, x4, x1, x2) - -inst_33428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83800000; valaddr_reg:x3; val_offset:100284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100284*FLEN/8, x4, x1, x2) - -inst_33429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83800001; valaddr_reg:x3; val_offset:100287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100287*FLEN/8, x4, x1, x2) - -inst_33430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83800003; valaddr_reg:x3; val_offset:100290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100290*FLEN/8, x4, x1, x2) - -inst_33431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83800007; valaddr_reg:x3; val_offset:100293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100293*FLEN/8, x4, x1, x2) - -inst_33432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8380000f; valaddr_reg:x3; val_offset:100296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100296*FLEN/8, x4, x1, x2) - -inst_33433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8380001f; valaddr_reg:x3; val_offset:100299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100299*FLEN/8, x4, x1, x2) - -inst_33434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8380003f; valaddr_reg:x3; val_offset:100302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100302*FLEN/8, x4, x1, x2) - -inst_33435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8380007f; valaddr_reg:x3; val_offset:100305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100305*FLEN/8, x4, x1, x2) - -inst_33436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x838000ff; valaddr_reg:x3; val_offset:100308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100308*FLEN/8, x4, x1, x2) - -inst_33437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x838001ff; valaddr_reg:x3; val_offset:100311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100311*FLEN/8, x4, x1, x2) - -inst_33438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x838003ff; valaddr_reg:x3; val_offset:100314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100314*FLEN/8, x4, x1, x2) - -inst_33439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x838007ff; valaddr_reg:x3; val_offset:100317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100317*FLEN/8, x4, x1, x2) - -inst_33440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83800fff; valaddr_reg:x3; val_offset:100320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100320*FLEN/8, x4, x1, x2) - -inst_33441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83801fff; valaddr_reg:x3; val_offset:100323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100323*FLEN/8, x4, x1, x2) - -inst_33442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83803fff; valaddr_reg:x3; val_offset:100326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100326*FLEN/8, x4, x1, x2) - -inst_33443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83807fff; valaddr_reg:x3; val_offset:100329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100329*FLEN/8, x4, x1, x2) - -inst_33444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8380ffff; valaddr_reg:x3; val_offset:100332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100332*FLEN/8, x4, x1, x2) - -inst_33445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8381ffff; valaddr_reg:x3; val_offset:100335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100335*FLEN/8, x4, x1, x2) - -inst_33446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8383ffff; valaddr_reg:x3; val_offset:100338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100338*FLEN/8, x4, x1, x2) - -inst_33447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x8387ffff; valaddr_reg:x3; val_offset:100341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100341*FLEN/8, x4, x1, x2) - -inst_33448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x838fffff; valaddr_reg:x3; val_offset:100344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100344*FLEN/8, x4, x1, x2) - -inst_33449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x839fffff; valaddr_reg:x3; val_offset:100347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100347*FLEN/8, x4, x1, x2) - -inst_33450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83bfffff; valaddr_reg:x3; val_offset:100350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100350*FLEN/8, x4, x1, x2) - -inst_33451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83c00000; valaddr_reg:x3; val_offset:100353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100353*FLEN/8, x4, x1, x2) - -inst_33452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83e00000; valaddr_reg:x3; val_offset:100356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100356*FLEN/8, x4, x1, x2) - -inst_33453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83f00000; valaddr_reg:x3; val_offset:100359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100359*FLEN/8, x4, x1, x2) - -inst_33454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83f80000; valaddr_reg:x3; val_offset:100362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100362*FLEN/8, x4, x1, x2) - -inst_33455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fc0000; valaddr_reg:x3; val_offset:100365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100365*FLEN/8, x4, x1, x2) - -inst_33456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fe0000; valaddr_reg:x3; val_offset:100368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100368*FLEN/8, x4, x1, x2) - -inst_33457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ff0000; valaddr_reg:x3; val_offset:100371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100371*FLEN/8, x4, x1, x2) - -inst_33458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ff8000; valaddr_reg:x3; val_offset:100374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100374*FLEN/8, x4, x1, x2) - -inst_33459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ffc000; valaddr_reg:x3; val_offset:100377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100377*FLEN/8, x4, x1, x2) - -inst_33460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ffe000; valaddr_reg:x3; val_offset:100380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100380*FLEN/8, x4, x1, x2) - -inst_33461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fff000; valaddr_reg:x3; val_offset:100383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100383*FLEN/8, x4, x1, x2) - -inst_33462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fff800; valaddr_reg:x3; val_offset:100386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100386*FLEN/8, x4, x1, x2) - -inst_33463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fffc00; valaddr_reg:x3; val_offset:100389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100389*FLEN/8, x4, x1, x2) - -inst_33464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fffe00; valaddr_reg:x3; val_offset:100392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100392*FLEN/8, x4, x1, x2) - -inst_33465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ffff00; valaddr_reg:x3; val_offset:100395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100395*FLEN/8, x4, x1, x2) - -inst_33466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ffff80; valaddr_reg:x3; val_offset:100398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100398*FLEN/8, x4, x1, x2) - -inst_33467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ffffc0; valaddr_reg:x3; val_offset:100401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100401*FLEN/8, x4, x1, x2) - -inst_33468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ffffe0; valaddr_reg:x3; val_offset:100404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100404*FLEN/8, x4, x1, x2) - -inst_33469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fffff0; valaddr_reg:x3; val_offset:100407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100407*FLEN/8, x4, x1, x2) - -inst_33470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fffff8; valaddr_reg:x3; val_offset:100410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100410*FLEN/8, x4, x1, x2) - -inst_33471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fffffc; valaddr_reg:x3; val_offset:100413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100413*FLEN/8, x4, x1, x2) - -inst_33472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83fffffe; valaddr_reg:x3; val_offset:100416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100416*FLEN/8, x4, x1, x2) - -inst_33473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; -op3val:0x83ffffff; valaddr_reg:x3; val_offset:100419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100419*FLEN/8, x4, x1, x2) - -inst_33474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbf800001; valaddr_reg:x3; val_offset:100422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100422*FLEN/8, x4, x1, x2) - -inst_33475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbf800003; valaddr_reg:x3; val_offset:100425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100425*FLEN/8, x4, x1, x2) - -inst_33476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbf800007; valaddr_reg:x3; val_offset:100428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100428*FLEN/8, x4, x1, x2) - -inst_33477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbf999999; valaddr_reg:x3; val_offset:100431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100431*FLEN/8, x4, x1, x2) - -inst_33478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:100434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100434*FLEN/8, x4, x1, x2) - -inst_33479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:100437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100437*FLEN/8, x4, x1, x2) - -inst_33480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:100440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100440*FLEN/8, x4, x1, x2) - -inst_33481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:100443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100443*FLEN/8, x4, x1, x2) - -inst_33482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:100446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100446*FLEN/8, x4, x1, x2) - -inst_33483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:100449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100449*FLEN/8, x4, x1, x2) - -inst_33484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:100452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100452*FLEN/8, x4, x1, x2) - -inst_33485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:100455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100455*FLEN/8, x4, x1, x2) - -inst_33486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:100458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100458*FLEN/8, x4, x1, x2) - -inst_33487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:100461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100461*FLEN/8, x4, x1, x2) - -inst_33488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:100464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100464*FLEN/8, x4, x1, x2) - -inst_33489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:100467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100467*FLEN/8, x4, x1, x2) - -inst_33490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca800000; valaddr_reg:x3; val_offset:100470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100470*FLEN/8, x4, x1, x2) - -inst_33491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca800001; valaddr_reg:x3; val_offset:100473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100473*FLEN/8, x4, x1, x2) - -inst_33492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca800003; valaddr_reg:x3; val_offset:100476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100476*FLEN/8, x4, x1, x2) - -inst_33493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca800007; valaddr_reg:x3; val_offset:100479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100479*FLEN/8, x4, x1, x2) - -inst_33494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca80000f; valaddr_reg:x3; val_offset:100482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100482*FLEN/8, x4, x1, x2) - -inst_33495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca80001f; valaddr_reg:x3; val_offset:100485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100485*FLEN/8, x4, x1, x2) - -inst_33496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca80003f; valaddr_reg:x3; val_offset:100488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100488*FLEN/8, x4, x1, x2) - -inst_33497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca80007f; valaddr_reg:x3; val_offset:100491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100491*FLEN/8, x4, x1, x2) - -inst_33498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca8000ff; valaddr_reg:x3; val_offset:100494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100494*FLEN/8, x4, x1, x2) - -inst_33499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca8001ff; valaddr_reg:x3; val_offset:100497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100497*FLEN/8, x4, x1, x2) - -inst_33500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca8003ff; valaddr_reg:x3; val_offset:100500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100500*FLEN/8, x4, x1, x2) - -inst_33501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca8007ff; valaddr_reg:x3; val_offset:100503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100503*FLEN/8, x4, x1, x2) - -inst_33502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca800fff; valaddr_reg:x3; val_offset:100506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100506*FLEN/8, x4, x1, x2) - -inst_33503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca801fff; valaddr_reg:x3; val_offset:100509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100509*FLEN/8, x4, x1, x2) - -inst_33504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca803fff; valaddr_reg:x3; val_offset:100512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100512*FLEN/8, x4, x1, x2) - -inst_33505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca807fff; valaddr_reg:x3; val_offset:100515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100515*FLEN/8, x4, x1, x2) - -inst_33506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca80ffff; valaddr_reg:x3; val_offset:100518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100518*FLEN/8, x4, x1, x2) - -inst_33507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca81ffff; valaddr_reg:x3; val_offset:100521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100521*FLEN/8, x4, x1, x2) - -inst_33508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca83ffff; valaddr_reg:x3; val_offset:100524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100524*FLEN/8, x4, x1, x2) - -inst_33509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca87ffff; valaddr_reg:x3; val_offset:100527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100527*FLEN/8, x4, x1, x2) - -inst_33510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca8fffff; valaddr_reg:x3; val_offset:100530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100530*FLEN/8, x4, x1, x2) - -inst_33511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xca9fffff; valaddr_reg:x3; val_offset:100533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100533*FLEN/8, x4, x1, x2) - -inst_33512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcabfffff; valaddr_reg:x3; val_offset:100536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100536*FLEN/8, x4, x1, x2) - -inst_33513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcac00000; valaddr_reg:x3; val_offset:100539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100539*FLEN/8, x4, x1, x2) - -inst_33514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcae00000; valaddr_reg:x3; val_offset:100542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100542*FLEN/8, x4, x1, x2) - -inst_33515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaf00000; valaddr_reg:x3; val_offset:100545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100545*FLEN/8, x4, x1, x2) - -inst_33516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaf80000; valaddr_reg:x3; val_offset:100548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100548*FLEN/8, x4, x1, x2) - -inst_33517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafc0000; valaddr_reg:x3; val_offset:100551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100551*FLEN/8, x4, x1, x2) - -inst_33518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafe0000; valaddr_reg:x3; val_offset:100554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100554*FLEN/8, x4, x1, x2) - -inst_33519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaff0000; valaddr_reg:x3; val_offset:100557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100557*FLEN/8, x4, x1, x2) - -inst_33520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaff8000; valaddr_reg:x3; val_offset:100560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100560*FLEN/8, x4, x1, x2) - -inst_33521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaffc000; valaddr_reg:x3; val_offset:100563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100563*FLEN/8, x4, x1, x2) - -inst_33522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaffe000; valaddr_reg:x3; val_offset:100566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100566*FLEN/8, x4, x1, x2) - -inst_33523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafff000; valaddr_reg:x3; val_offset:100569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100569*FLEN/8, x4, x1, x2) - -inst_33524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafff800; valaddr_reg:x3; val_offset:100572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100572*FLEN/8, x4, x1, x2) - -inst_33525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafffc00; valaddr_reg:x3; val_offset:100575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100575*FLEN/8, x4, x1, x2) - -inst_33526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafffe00; valaddr_reg:x3; val_offset:100578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100578*FLEN/8, x4, x1, x2) - -inst_33527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaffff00; valaddr_reg:x3; val_offset:100581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100581*FLEN/8, x4, x1, x2) - -inst_33528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaffff80; valaddr_reg:x3; val_offset:100584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100584*FLEN/8, x4, x1, x2) - -inst_33529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaffffc0; valaddr_reg:x3; val_offset:100587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100587*FLEN/8, x4, x1, x2) - -inst_33530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaffffe0; valaddr_reg:x3; val_offset:100590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100590*FLEN/8, x4, x1, x2) - -inst_33531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafffff0; valaddr_reg:x3; val_offset:100593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100593*FLEN/8, x4, x1, x2) - -inst_33532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafffff8; valaddr_reg:x3; val_offset:100596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100596*FLEN/8, x4, x1, x2) - -inst_33533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafffffc; valaddr_reg:x3; val_offset:100599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100599*FLEN/8, x4, x1, x2) - -inst_33534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcafffffe; valaddr_reg:x3; val_offset:100602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100602*FLEN/8, x4, x1, x2) - -inst_33535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; -op3val:0xcaffffff; valaddr_reg:x3; val_offset:100605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100605*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_263) - -inst_33536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9000000; valaddr_reg:x3; val_offset:100608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100608*FLEN/8, x4, x1, x2) - -inst_33537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9000001; valaddr_reg:x3; val_offset:100611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100611*FLEN/8, x4, x1, x2) - -inst_33538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9000003; valaddr_reg:x3; val_offset:100614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100614*FLEN/8, x4, x1, x2) - -inst_33539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9000007; valaddr_reg:x3; val_offset:100617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100617*FLEN/8, x4, x1, x2) - -inst_33540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa900000f; valaddr_reg:x3; val_offset:100620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100620*FLEN/8, x4, x1, x2) - -inst_33541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa900001f; valaddr_reg:x3; val_offset:100623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100623*FLEN/8, x4, x1, x2) - -inst_33542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa900003f; valaddr_reg:x3; val_offset:100626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100626*FLEN/8, x4, x1, x2) - -inst_33543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa900007f; valaddr_reg:x3; val_offset:100629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100629*FLEN/8, x4, x1, x2) - -inst_33544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa90000ff; valaddr_reg:x3; val_offset:100632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100632*FLEN/8, x4, x1, x2) - -inst_33545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa90001ff; valaddr_reg:x3; val_offset:100635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100635*FLEN/8, x4, x1, x2) - -inst_33546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa90003ff; valaddr_reg:x3; val_offset:100638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100638*FLEN/8, x4, x1, x2) - -inst_33547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa90007ff; valaddr_reg:x3; val_offset:100641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100641*FLEN/8, x4, x1, x2) - -inst_33548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9000fff; valaddr_reg:x3; val_offset:100644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100644*FLEN/8, x4, x1, x2) - -inst_33549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9001fff; valaddr_reg:x3; val_offset:100647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100647*FLEN/8, x4, x1, x2) - -inst_33550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9003fff; valaddr_reg:x3; val_offset:100650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100650*FLEN/8, x4, x1, x2) - -inst_33551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9007fff; valaddr_reg:x3; val_offset:100653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100653*FLEN/8, x4, x1, x2) - -inst_33552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa900ffff; valaddr_reg:x3; val_offset:100656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100656*FLEN/8, x4, x1, x2) - -inst_33553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa901ffff; valaddr_reg:x3; val_offset:100659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100659*FLEN/8, x4, x1, x2) - -inst_33554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa903ffff; valaddr_reg:x3; val_offset:100662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100662*FLEN/8, x4, x1, x2) - -inst_33555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa907ffff; valaddr_reg:x3; val_offset:100665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100665*FLEN/8, x4, x1, x2) - -inst_33556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa90fffff; valaddr_reg:x3; val_offset:100668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100668*FLEN/8, x4, x1, x2) - -inst_33557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa91fffff; valaddr_reg:x3; val_offset:100671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100671*FLEN/8, x4, x1, x2) - -inst_33558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa93fffff; valaddr_reg:x3; val_offset:100674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100674*FLEN/8, x4, x1, x2) - -inst_33559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9400000; valaddr_reg:x3; val_offset:100677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100677*FLEN/8, x4, x1, x2) - -inst_33560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9600000; valaddr_reg:x3; val_offset:100680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100680*FLEN/8, x4, x1, x2) - -inst_33561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9700000; valaddr_reg:x3; val_offset:100683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100683*FLEN/8, x4, x1, x2) - -inst_33562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa9780000; valaddr_reg:x3; val_offset:100686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100686*FLEN/8, x4, x1, x2) - -inst_33563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97c0000; valaddr_reg:x3; val_offset:100689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100689*FLEN/8, x4, x1, x2) - -inst_33564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97e0000; valaddr_reg:x3; val_offset:100692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100692*FLEN/8, x4, x1, x2) - -inst_33565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97f0000; valaddr_reg:x3; val_offset:100695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100695*FLEN/8, x4, x1, x2) - -inst_33566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97f8000; valaddr_reg:x3; val_offset:100698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100698*FLEN/8, x4, x1, x2) - -inst_33567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97fc000; valaddr_reg:x3; val_offset:100701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100701*FLEN/8, x4, x1, x2) - -inst_33568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97fe000; valaddr_reg:x3; val_offset:100704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100704*FLEN/8, x4, x1, x2) - -inst_33569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97ff000; valaddr_reg:x3; val_offset:100707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100707*FLEN/8, x4, x1, x2) - -inst_33570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97ff800; valaddr_reg:x3; val_offset:100710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100710*FLEN/8, x4, x1, x2) - -inst_33571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97ffc00; valaddr_reg:x3; val_offset:100713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100713*FLEN/8, x4, x1, x2) - -inst_33572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97ffe00; valaddr_reg:x3; val_offset:100716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100716*FLEN/8, x4, x1, x2) - -inst_33573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97fff00; valaddr_reg:x3; val_offset:100719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100719*FLEN/8, x4, x1, x2) - -inst_33574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97fff80; valaddr_reg:x3; val_offset:100722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100722*FLEN/8, x4, x1, x2) - -inst_33575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97fffc0; valaddr_reg:x3; val_offset:100725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100725*FLEN/8, x4, x1, x2) - -inst_33576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97fffe0; valaddr_reg:x3; val_offset:100728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100728*FLEN/8, x4, x1, x2) - -inst_33577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97ffff0; valaddr_reg:x3; val_offset:100731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100731*FLEN/8, x4, x1, x2) - -inst_33578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97ffff8; valaddr_reg:x3; val_offset:100734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100734*FLEN/8, x4, x1, x2) - -inst_33579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97ffffc; valaddr_reg:x3; val_offset:100737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100737*FLEN/8, x4, x1, x2) - -inst_33580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97ffffe; valaddr_reg:x3; val_offset:100740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100740*FLEN/8, x4, x1, x2) - -inst_33581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xa97fffff; valaddr_reg:x3; val_offset:100743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100743*FLEN/8, x4, x1, x2) - -inst_33582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbf800001; valaddr_reg:x3; val_offset:100746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100746*FLEN/8, x4, x1, x2) - -inst_33583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbf800003; valaddr_reg:x3; val_offset:100749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100749*FLEN/8, x4, x1, x2) - -inst_33584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbf800007; valaddr_reg:x3; val_offset:100752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100752*FLEN/8, x4, x1, x2) - -inst_33585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbf999999; valaddr_reg:x3; val_offset:100755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100755*FLEN/8, x4, x1, x2) - -inst_33586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:100758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100758*FLEN/8, x4, x1, x2) - -inst_33587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:100761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100761*FLEN/8, x4, x1, x2) - -inst_33588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:100764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100764*FLEN/8, x4, x1, x2) - -inst_33589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:100767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100767*FLEN/8, x4, x1, x2) - -inst_33590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:100770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100770*FLEN/8, x4, x1, x2) - -inst_33591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:100773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100773*FLEN/8, x4, x1, x2) - -inst_33592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:100776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100776*FLEN/8, x4, x1, x2) - -inst_33593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:100779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100779*FLEN/8, x4, x1, x2) - -inst_33594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:100782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100782*FLEN/8, x4, x1, x2) - -inst_33595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:100785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100785*FLEN/8, x4, x1, x2) - -inst_33596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:100788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100788*FLEN/8, x4, x1, x2) - -inst_33597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:100791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100791*FLEN/8, x4, x1, x2) - -inst_33598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:100794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100794*FLEN/8, x4, x1, x2) - -inst_33599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:100797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100797*FLEN/8, x4, x1, x2) - -inst_33600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:100800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100800*FLEN/8, x4, x1, x2) - -inst_33601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:100803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100803*FLEN/8, x4, x1, x2) - -inst_33602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:100806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100806*FLEN/8, x4, x1, x2) - -inst_33603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:100809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100809*FLEN/8, x4, x1, x2) - -inst_33604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:100812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100812*FLEN/8, x4, x1, x2) - -inst_33605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:100815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100815*FLEN/8, x4, x1, x2) - -inst_33606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:100818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100818*FLEN/8, x4, x1, x2) - -inst_33607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:100821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100821*FLEN/8, x4, x1, x2) - -inst_33608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:100824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100824*FLEN/8, x4, x1, x2) - -inst_33609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:100827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100827*FLEN/8, x4, x1, x2) - -inst_33610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:100830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100830*FLEN/8, x4, x1, x2) - -inst_33611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:100833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100833*FLEN/8, x4, x1, x2) - -inst_33612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:100836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100836*FLEN/8, x4, x1, x2) - -inst_33613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:100839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100839*FLEN/8, x4, x1, x2) - -inst_33614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0000000; valaddr_reg:x3; val_offset:100842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100842*FLEN/8, x4, x1, x2) - -inst_33615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0000001; valaddr_reg:x3; val_offset:100845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100845*FLEN/8, x4, x1, x2) - -inst_33616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0000003; valaddr_reg:x3; val_offset:100848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100848*FLEN/8, x4, x1, x2) - -inst_33617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0000007; valaddr_reg:x3; val_offset:100851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100851*FLEN/8, x4, x1, x2) - -inst_33618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf000000f; valaddr_reg:x3; val_offset:100854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100854*FLEN/8, x4, x1, x2) - -inst_33619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf000001f; valaddr_reg:x3; val_offset:100857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100857*FLEN/8, x4, x1, x2) - -inst_33620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf000003f; valaddr_reg:x3; val_offset:100860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100860*FLEN/8, x4, x1, x2) - -inst_33621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf000007f; valaddr_reg:x3; val_offset:100863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100863*FLEN/8, x4, x1, x2) - -inst_33622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf00000ff; valaddr_reg:x3; val_offset:100866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100866*FLEN/8, x4, x1, x2) - -inst_33623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf00001ff; valaddr_reg:x3; val_offset:100869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100869*FLEN/8, x4, x1, x2) - -inst_33624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf00003ff; valaddr_reg:x3; val_offset:100872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100872*FLEN/8, x4, x1, x2) - -inst_33625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf00007ff; valaddr_reg:x3; val_offset:100875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100875*FLEN/8, x4, x1, x2) - -inst_33626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0000fff; valaddr_reg:x3; val_offset:100878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100878*FLEN/8, x4, x1, x2) - -inst_33627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0001fff; valaddr_reg:x3; val_offset:100881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100881*FLEN/8, x4, x1, x2) - -inst_33628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0003fff; valaddr_reg:x3; val_offset:100884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100884*FLEN/8, x4, x1, x2) - -inst_33629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0007fff; valaddr_reg:x3; val_offset:100887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100887*FLEN/8, x4, x1, x2) - -inst_33630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf000ffff; valaddr_reg:x3; val_offset:100890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100890*FLEN/8, x4, x1, x2) - -inst_33631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf001ffff; valaddr_reg:x3; val_offset:100893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100893*FLEN/8, x4, x1, x2) - -inst_33632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf003ffff; valaddr_reg:x3; val_offset:100896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100896*FLEN/8, x4, x1, x2) - -inst_33633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf007ffff; valaddr_reg:x3; val_offset:100899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100899*FLEN/8, x4, x1, x2) - -inst_33634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf00fffff; valaddr_reg:x3; val_offset:100902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100902*FLEN/8, x4, x1, x2) - -inst_33635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf01fffff; valaddr_reg:x3; val_offset:100905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100905*FLEN/8, x4, x1, x2) - -inst_33636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf03fffff; valaddr_reg:x3; val_offset:100908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100908*FLEN/8, x4, x1, x2) - -inst_33637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0400000; valaddr_reg:x3; val_offset:100911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100911*FLEN/8, x4, x1, x2) - -inst_33638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0600000; valaddr_reg:x3; val_offset:100914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100914*FLEN/8, x4, x1, x2) - -inst_33639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0700000; valaddr_reg:x3; val_offset:100917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100917*FLEN/8, x4, x1, x2) - -inst_33640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf0780000; valaddr_reg:x3; val_offset:100920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100920*FLEN/8, x4, x1, x2) - -inst_33641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07c0000; valaddr_reg:x3; val_offset:100923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100923*FLEN/8, x4, x1, x2) - -inst_33642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07e0000; valaddr_reg:x3; val_offset:100926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100926*FLEN/8, x4, x1, x2) - -inst_33643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07f0000; valaddr_reg:x3; val_offset:100929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100929*FLEN/8, x4, x1, x2) - -inst_33644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07f8000; valaddr_reg:x3; val_offset:100932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100932*FLEN/8, x4, x1, x2) - -inst_33645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07fc000; valaddr_reg:x3; val_offset:100935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100935*FLEN/8, x4, x1, x2) - -inst_33646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07fe000; valaddr_reg:x3; val_offset:100938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100938*FLEN/8, x4, x1, x2) - -inst_33647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07ff000; valaddr_reg:x3; val_offset:100941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100941*FLEN/8, x4, x1, x2) - -inst_33648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07ff800; valaddr_reg:x3; val_offset:100944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100944*FLEN/8, x4, x1, x2) - -inst_33649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07ffc00; valaddr_reg:x3; val_offset:100947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100947*FLEN/8, x4, x1, x2) - -inst_33650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07ffe00; valaddr_reg:x3; val_offset:100950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100950*FLEN/8, x4, x1, x2) - -inst_33651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07fff00; valaddr_reg:x3; val_offset:100953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100953*FLEN/8, x4, x1, x2) - -inst_33652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07fff80; valaddr_reg:x3; val_offset:100956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100956*FLEN/8, x4, x1, x2) - -inst_33653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07fffc0; valaddr_reg:x3; val_offset:100959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100959*FLEN/8, x4, x1, x2) - -inst_33654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07fffe0; valaddr_reg:x3; val_offset:100962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100962*FLEN/8, x4, x1, x2) - -inst_33655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07ffff0; valaddr_reg:x3; val_offset:100965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100965*FLEN/8, x4, x1, x2) - -inst_33656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07ffff8; valaddr_reg:x3; val_offset:100968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100968*FLEN/8, x4, x1, x2) - -inst_33657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07ffffc; valaddr_reg:x3; val_offset:100971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100971*FLEN/8, x4, x1, x2) - -inst_33658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07ffffe; valaddr_reg:x3; val_offset:100974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100974*FLEN/8, x4, x1, x2) - -inst_33659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; -op3val:0xf07fffff; valaddr_reg:x3; val_offset:100977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100977*FLEN/8, x4, x1, x2) - -inst_33660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8000000; valaddr_reg:x3; val_offset:100980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100980*FLEN/8, x4, x1, x2) - -inst_33661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8000001; valaddr_reg:x3; val_offset:100983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100983*FLEN/8, x4, x1, x2) - -inst_33662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8000003; valaddr_reg:x3; val_offset:100986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100986*FLEN/8, x4, x1, x2) - -inst_33663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8000007; valaddr_reg:x3; val_offset:100989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100989*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_264) - -inst_33664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa800000f; valaddr_reg:x3; val_offset:100992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100992*FLEN/8, x4, x1, x2) - -inst_33665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa800001f; valaddr_reg:x3; val_offset:100995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100995*FLEN/8, x4, x1, x2) - -inst_33666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa800003f; valaddr_reg:x3; val_offset:100998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100998*FLEN/8, x4, x1, x2) - -inst_33667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa800007f; valaddr_reg:x3; val_offset:101001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101001*FLEN/8, x4, x1, x2) - -inst_33668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa80000ff; valaddr_reg:x3; val_offset:101004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101004*FLEN/8, x4, x1, x2) - -inst_33669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa80001ff; valaddr_reg:x3; val_offset:101007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101007*FLEN/8, x4, x1, x2) - -inst_33670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa80003ff; valaddr_reg:x3; val_offset:101010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101010*FLEN/8, x4, x1, x2) - -inst_33671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa80007ff; valaddr_reg:x3; val_offset:101013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101013*FLEN/8, x4, x1, x2) - -inst_33672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8000fff; valaddr_reg:x3; val_offset:101016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101016*FLEN/8, x4, x1, x2) - -inst_33673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8001fff; valaddr_reg:x3; val_offset:101019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101019*FLEN/8, x4, x1, x2) - -inst_33674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8003fff; valaddr_reg:x3; val_offset:101022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101022*FLEN/8, x4, x1, x2) - -inst_33675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8007fff; valaddr_reg:x3; val_offset:101025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101025*FLEN/8, x4, x1, x2) - -inst_33676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa800ffff; valaddr_reg:x3; val_offset:101028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101028*FLEN/8, x4, x1, x2) - -inst_33677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa801ffff; valaddr_reg:x3; val_offset:101031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101031*FLEN/8, x4, x1, x2) - -inst_33678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa803ffff; valaddr_reg:x3; val_offset:101034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101034*FLEN/8, x4, x1, x2) - -inst_33679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa807ffff; valaddr_reg:x3; val_offset:101037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101037*FLEN/8, x4, x1, x2) - -inst_33680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa80fffff; valaddr_reg:x3; val_offset:101040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101040*FLEN/8, x4, x1, x2) - -inst_33681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa81fffff; valaddr_reg:x3; val_offset:101043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101043*FLEN/8, x4, x1, x2) - -inst_33682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa83fffff; valaddr_reg:x3; val_offset:101046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101046*FLEN/8, x4, x1, x2) - -inst_33683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8400000; valaddr_reg:x3; val_offset:101049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101049*FLEN/8, x4, x1, x2) - -inst_33684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8600000; valaddr_reg:x3; val_offset:101052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101052*FLEN/8, x4, x1, x2) - -inst_33685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8700000; valaddr_reg:x3; val_offset:101055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101055*FLEN/8, x4, x1, x2) - -inst_33686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa8780000; valaddr_reg:x3; val_offset:101058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101058*FLEN/8, x4, x1, x2) - -inst_33687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87c0000; valaddr_reg:x3; val_offset:101061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101061*FLEN/8, x4, x1, x2) - -inst_33688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87e0000; valaddr_reg:x3; val_offset:101064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101064*FLEN/8, x4, x1, x2) - -inst_33689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87f0000; valaddr_reg:x3; val_offset:101067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101067*FLEN/8, x4, x1, x2) - -inst_33690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87f8000; valaddr_reg:x3; val_offset:101070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101070*FLEN/8, x4, x1, x2) - -inst_33691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87fc000; valaddr_reg:x3; val_offset:101073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101073*FLEN/8, x4, x1, x2) - -inst_33692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87fe000; valaddr_reg:x3; val_offset:101076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101076*FLEN/8, x4, x1, x2) - -inst_33693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87ff000; valaddr_reg:x3; val_offset:101079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101079*FLEN/8, x4, x1, x2) - -inst_33694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87ff800; valaddr_reg:x3; val_offset:101082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101082*FLEN/8, x4, x1, x2) - -inst_33695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87ffc00; valaddr_reg:x3; val_offset:101085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101085*FLEN/8, x4, x1, x2) - -inst_33696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87ffe00; valaddr_reg:x3; val_offset:101088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101088*FLEN/8, x4, x1, x2) - -inst_33697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87fff00; valaddr_reg:x3; val_offset:101091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101091*FLEN/8, x4, x1, x2) - -inst_33698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87fff80; valaddr_reg:x3; val_offset:101094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101094*FLEN/8, x4, x1, x2) - -inst_33699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87fffc0; valaddr_reg:x3; val_offset:101097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101097*FLEN/8, x4, x1, x2) - -inst_33700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87fffe0; valaddr_reg:x3; val_offset:101100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101100*FLEN/8, x4, x1, x2) - -inst_33701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87ffff0; valaddr_reg:x3; val_offset:101103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101103*FLEN/8, x4, x1, x2) - -inst_33702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87ffff8; valaddr_reg:x3; val_offset:101106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101106*FLEN/8, x4, x1, x2) - -inst_33703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87ffffc; valaddr_reg:x3; val_offset:101109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101109*FLEN/8, x4, x1, x2) - -inst_33704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87ffffe; valaddr_reg:x3; val_offset:101112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101112*FLEN/8, x4, x1, x2) - -inst_33705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xa87fffff; valaddr_reg:x3; val_offset:101115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101115*FLEN/8, x4, x1, x2) - -inst_33706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbf800001; valaddr_reg:x3; val_offset:101118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101118*FLEN/8, x4, x1, x2) - -inst_33707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbf800003; valaddr_reg:x3; val_offset:101121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101121*FLEN/8, x4, x1, x2) - -inst_33708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbf800007; valaddr_reg:x3; val_offset:101124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101124*FLEN/8, x4, x1, x2) - -inst_33709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbf999999; valaddr_reg:x3; val_offset:101127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101127*FLEN/8, x4, x1, x2) - -inst_33710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:101130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101130*FLEN/8, x4, x1, x2) - -inst_33711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:101133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101133*FLEN/8, x4, x1, x2) - -inst_33712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:101136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101136*FLEN/8, x4, x1, x2) - -inst_33713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:101139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101139*FLEN/8, x4, x1, x2) - -inst_33714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:101142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101142*FLEN/8, x4, x1, x2) - -inst_33715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:101145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101145*FLEN/8, x4, x1, x2) - -inst_33716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:101148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101148*FLEN/8, x4, x1, x2) - -inst_33717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:101151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101151*FLEN/8, x4, x1, x2) - -inst_33718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:101154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101154*FLEN/8, x4, x1, x2) - -inst_33719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:101157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101157*FLEN/8, x4, x1, x2) - -inst_33720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:101160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101160*FLEN/8, x4, x1, x2) - -inst_33721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:101163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101163*FLEN/8, x4, x1, x2) - -inst_33722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3f800001; valaddr_reg:x3; val_offset:101166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101166*FLEN/8, x4, x1, x2) - -inst_33723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3f800003; valaddr_reg:x3; val_offset:101169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101169*FLEN/8, x4, x1, x2) - -inst_33724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3f800007; valaddr_reg:x3; val_offset:101172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101172*FLEN/8, x4, x1, x2) - -inst_33725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3f999999; valaddr_reg:x3; val_offset:101175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101175*FLEN/8, x4, x1, x2) - -inst_33726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:101178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101178*FLEN/8, x4, x1, x2) - -inst_33727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:101181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101181*FLEN/8, x4, x1, x2) - -inst_33728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:101184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101184*FLEN/8, x4, x1, x2) - -inst_33729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:101187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101187*FLEN/8, x4, x1, x2) - -inst_33730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:101190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101190*FLEN/8, x4, x1, x2) - -inst_33731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:101193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101193*FLEN/8, x4, x1, x2) - -inst_33732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:101196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101196*FLEN/8, x4, x1, x2) - -inst_33733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:101199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101199*FLEN/8, x4, x1, x2) - -inst_33734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:101202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101202*FLEN/8, x4, x1, x2) - -inst_33735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:101205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101205*FLEN/8, x4, x1, x2) - -inst_33736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:101208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101208*FLEN/8, x4, x1, x2) - -inst_33737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:101211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101211*FLEN/8, x4, x1, x2) - -inst_33738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b000000; valaddr_reg:x3; val_offset:101214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101214*FLEN/8, x4, x1, x2) - -inst_33739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b000001; valaddr_reg:x3; val_offset:101217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101217*FLEN/8, x4, x1, x2) - -inst_33740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b000003; valaddr_reg:x3; val_offset:101220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101220*FLEN/8, x4, x1, x2) - -inst_33741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b000007; valaddr_reg:x3; val_offset:101223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101223*FLEN/8, x4, x1, x2) - -inst_33742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b00000f; valaddr_reg:x3; val_offset:101226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101226*FLEN/8, x4, x1, x2) - -inst_33743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b00001f; valaddr_reg:x3; val_offset:101229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101229*FLEN/8, x4, x1, x2) - -inst_33744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b00003f; valaddr_reg:x3; val_offset:101232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101232*FLEN/8, x4, x1, x2) - -inst_33745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b00007f; valaddr_reg:x3; val_offset:101235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101235*FLEN/8, x4, x1, x2) - -inst_33746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b0000ff; valaddr_reg:x3; val_offset:101238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101238*FLEN/8, x4, x1, x2) - -inst_33747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b0001ff; valaddr_reg:x3; val_offset:101241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101241*FLEN/8, x4, x1, x2) - -inst_33748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b0003ff; valaddr_reg:x3; val_offset:101244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101244*FLEN/8, x4, x1, x2) - -inst_33749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b0007ff; valaddr_reg:x3; val_offset:101247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101247*FLEN/8, x4, x1, x2) - -inst_33750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b000fff; valaddr_reg:x3; val_offset:101250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101250*FLEN/8, x4, x1, x2) - -inst_33751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b001fff; valaddr_reg:x3; val_offset:101253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101253*FLEN/8, x4, x1, x2) - -inst_33752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b003fff; valaddr_reg:x3; val_offset:101256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101256*FLEN/8, x4, x1, x2) - -inst_33753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b007fff; valaddr_reg:x3; val_offset:101259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101259*FLEN/8, x4, x1, x2) - -inst_33754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b00ffff; valaddr_reg:x3; val_offset:101262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101262*FLEN/8, x4, x1, x2) - -inst_33755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b01ffff; valaddr_reg:x3; val_offset:101265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101265*FLEN/8, x4, x1, x2) - -inst_33756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b03ffff; valaddr_reg:x3; val_offset:101268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101268*FLEN/8, x4, x1, x2) - -inst_33757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b07ffff; valaddr_reg:x3; val_offset:101271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101271*FLEN/8, x4, x1, x2) - -inst_33758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b0fffff; valaddr_reg:x3; val_offset:101274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101274*FLEN/8, x4, x1, x2) - -inst_33759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b1fffff; valaddr_reg:x3; val_offset:101277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101277*FLEN/8, x4, x1, x2) - -inst_33760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b3fffff; valaddr_reg:x3; val_offset:101280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101280*FLEN/8, x4, x1, x2) - -inst_33761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b400000; valaddr_reg:x3; val_offset:101283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101283*FLEN/8, x4, x1, x2) - -inst_33762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b600000; valaddr_reg:x3; val_offset:101286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101286*FLEN/8, x4, x1, x2) - -inst_33763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b700000; valaddr_reg:x3; val_offset:101289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101289*FLEN/8, x4, x1, x2) - -inst_33764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b780000; valaddr_reg:x3; val_offset:101292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101292*FLEN/8, x4, x1, x2) - -inst_33765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7c0000; valaddr_reg:x3; val_offset:101295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101295*FLEN/8, x4, x1, x2) - -inst_33766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7e0000; valaddr_reg:x3; val_offset:101298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101298*FLEN/8, x4, x1, x2) - -inst_33767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7f0000; valaddr_reg:x3; val_offset:101301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101301*FLEN/8, x4, x1, x2) - -inst_33768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7f8000; valaddr_reg:x3; val_offset:101304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101304*FLEN/8, x4, x1, x2) - -inst_33769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7fc000; valaddr_reg:x3; val_offset:101307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101307*FLEN/8, x4, x1, x2) - -inst_33770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7fe000; valaddr_reg:x3; val_offset:101310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101310*FLEN/8, x4, x1, x2) - -inst_33771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7ff000; valaddr_reg:x3; val_offset:101313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101313*FLEN/8, x4, x1, x2) - -inst_33772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7ff800; valaddr_reg:x3; val_offset:101316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101316*FLEN/8, x4, x1, x2) - -inst_33773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7ffc00; valaddr_reg:x3; val_offset:101319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101319*FLEN/8, x4, x1, x2) - -inst_33774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7ffe00; valaddr_reg:x3; val_offset:101322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101322*FLEN/8, x4, x1, x2) - -inst_33775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7fff00; valaddr_reg:x3; val_offset:101325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101325*FLEN/8, x4, x1, x2) - -inst_33776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7fff80; valaddr_reg:x3; val_offset:101328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101328*FLEN/8, x4, x1, x2) - -inst_33777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7fffc0; valaddr_reg:x3; val_offset:101331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101331*FLEN/8, x4, x1, x2) - -inst_33778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7fffe0; valaddr_reg:x3; val_offset:101334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101334*FLEN/8, x4, x1, x2) - -inst_33779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7ffff0; valaddr_reg:x3; val_offset:101337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101337*FLEN/8, x4, x1, x2) - -inst_33780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7ffff8; valaddr_reg:x3; val_offset:101340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101340*FLEN/8, x4, x1, x2) - -inst_33781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7ffffc; valaddr_reg:x3; val_offset:101343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101343*FLEN/8, x4, x1, x2) - -inst_33782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7ffffe; valaddr_reg:x3; val_offset:101346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101346*FLEN/8, x4, x1, x2) - -inst_33783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; -op3val:0x4b7fffff; valaddr_reg:x3; val_offset:101349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101349*FLEN/8, x4, x1, x2) - -inst_33784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:101352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101352*FLEN/8, x4, x1, x2) - -inst_33785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:101355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101355*FLEN/8, x4, x1, x2) - -inst_33786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:101358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101358*FLEN/8, x4, x1, x2) - -inst_33787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:101361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101361*FLEN/8, x4, x1, x2) - -inst_33788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:101364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101364*FLEN/8, x4, x1, x2) - -inst_33789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:101367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101367*FLEN/8, x4, x1, x2) - -inst_33790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:101370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101370*FLEN/8, x4, x1, x2) - -inst_33791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:101373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101373*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_265) - -inst_33792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:101376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101376*FLEN/8, x4, x1, x2) - -inst_33793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:101379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101379*FLEN/8, x4, x1, x2) - -inst_33794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:101382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101382*FLEN/8, x4, x1, x2) - -inst_33795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:101385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101385*FLEN/8, x4, x1, x2) - -inst_33796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:101388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101388*FLEN/8, x4, x1, x2) - -inst_33797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:101391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101391*FLEN/8, x4, x1, x2) - -inst_33798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:101394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101394*FLEN/8, x4, x1, x2) - -inst_33799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:101397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101397*FLEN/8, x4, x1, x2) - -inst_33800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46800000; valaddr_reg:x3; val_offset:101400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101400*FLEN/8, x4, x1, x2) - -inst_33801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46800001; valaddr_reg:x3; val_offset:101403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101403*FLEN/8, x4, x1, x2) - -inst_33802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46800003; valaddr_reg:x3; val_offset:101406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101406*FLEN/8, x4, x1, x2) - -inst_33803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46800007; valaddr_reg:x3; val_offset:101409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101409*FLEN/8, x4, x1, x2) - -inst_33804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4680000f; valaddr_reg:x3; val_offset:101412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101412*FLEN/8, x4, x1, x2) - -inst_33805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4680001f; valaddr_reg:x3; val_offset:101415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101415*FLEN/8, x4, x1, x2) - -inst_33806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4680003f; valaddr_reg:x3; val_offset:101418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101418*FLEN/8, x4, x1, x2) - -inst_33807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4680007f; valaddr_reg:x3; val_offset:101421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101421*FLEN/8, x4, x1, x2) - -inst_33808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x468000ff; valaddr_reg:x3; val_offset:101424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101424*FLEN/8, x4, x1, x2) - -inst_33809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x468001ff; valaddr_reg:x3; val_offset:101427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101427*FLEN/8, x4, x1, x2) - -inst_33810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x468003ff; valaddr_reg:x3; val_offset:101430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101430*FLEN/8, x4, x1, x2) - -inst_33811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x468007ff; valaddr_reg:x3; val_offset:101433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101433*FLEN/8, x4, x1, x2) - -inst_33812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46800fff; valaddr_reg:x3; val_offset:101436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101436*FLEN/8, x4, x1, x2) - -inst_33813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46801fff; valaddr_reg:x3; val_offset:101439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101439*FLEN/8, x4, x1, x2) - -inst_33814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46803fff; valaddr_reg:x3; val_offset:101442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101442*FLEN/8, x4, x1, x2) - -inst_33815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46807fff; valaddr_reg:x3; val_offset:101445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101445*FLEN/8, x4, x1, x2) - -inst_33816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4680ffff; valaddr_reg:x3; val_offset:101448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101448*FLEN/8, x4, x1, x2) - -inst_33817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4681ffff; valaddr_reg:x3; val_offset:101451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101451*FLEN/8, x4, x1, x2) - -inst_33818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4683ffff; valaddr_reg:x3; val_offset:101454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101454*FLEN/8, x4, x1, x2) - -inst_33819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x4687ffff; valaddr_reg:x3; val_offset:101457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101457*FLEN/8, x4, x1, x2) - -inst_33820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x468fffff; valaddr_reg:x3; val_offset:101460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101460*FLEN/8, x4, x1, x2) - -inst_33821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x469fffff; valaddr_reg:x3; val_offset:101463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101463*FLEN/8, x4, x1, x2) - -inst_33822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46bfffff; valaddr_reg:x3; val_offset:101466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101466*FLEN/8, x4, x1, x2) - -inst_33823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46c00000; valaddr_reg:x3; val_offset:101469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101469*FLEN/8, x4, x1, x2) - -inst_33824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46e00000; valaddr_reg:x3; val_offset:101472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101472*FLEN/8, x4, x1, x2) - -inst_33825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46f00000; valaddr_reg:x3; val_offset:101475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101475*FLEN/8, x4, x1, x2) - -inst_33826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46f80000; valaddr_reg:x3; val_offset:101478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101478*FLEN/8, x4, x1, x2) - -inst_33827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fc0000; valaddr_reg:x3; val_offset:101481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101481*FLEN/8, x4, x1, x2) - -inst_33828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fe0000; valaddr_reg:x3; val_offset:101484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101484*FLEN/8, x4, x1, x2) - -inst_33829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ff0000; valaddr_reg:x3; val_offset:101487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101487*FLEN/8, x4, x1, x2) - -inst_33830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ff8000; valaddr_reg:x3; val_offset:101490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101490*FLEN/8, x4, x1, x2) - -inst_33831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ffc000; valaddr_reg:x3; val_offset:101493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101493*FLEN/8, x4, x1, x2) - -inst_33832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ffe000; valaddr_reg:x3; val_offset:101496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101496*FLEN/8, x4, x1, x2) - -inst_33833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fff000; valaddr_reg:x3; val_offset:101499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101499*FLEN/8, x4, x1, x2) - -inst_33834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fff800; valaddr_reg:x3; val_offset:101502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101502*FLEN/8, x4, x1, x2) - -inst_33835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fffc00; valaddr_reg:x3; val_offset:101505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101505*FLEN/8, x4, x1, x2) - -inst_33836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fffe00; valaddr_reg:x3; val_offset:101508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101508*FLEN/8, x4, x1, x2) - -inst_33837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ffff00; valaddr_reg:x3; val_offset:101511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101511*FLEN/8, x4, x1, x2) - -inst_33838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ffff80; valaddr_reg:x3; val_offset:101514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101514*FLEN/8, x4, x1, x2) - -inst_33839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ffffc0; valaddr_reg:x3; val_offset:101517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101517*FLEN/8, x4, x1, x2) - -inst_33840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ffffe0; valaddr_reg:x3; val_offset:101520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101520*FLEN/8, x4, x1, x2) - -inst_33841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fffff0; valaddr_reg:x3; val_offset:101523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101523*FLEN/8, x4, x1, x2) - -inst_33842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fffff8; valaddr_reg:x3; val_offset:101526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101526*FLEN/8, x4, x1, x2) - -inst_33843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fffffc; valaddr_reg:x3; val_offset:101529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101529*FLEN/8, x4, x1, x2) - -inst_33844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46fffffe; valaddr_reg:x3; val_offset:101532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101532*FLEN/8, x4, x1, x2) - -inst_33845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; -op3val:0x46ffffff; valaddr_reg:x3; val_offset:101535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101535*FLEN/8, x4, x1, x2) - -inst_33846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70000000; valaddr_reg:x3; val_offset:101538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101538*FLEN/8, x4, x1, x2) - -inst_33847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70000001; valaddr_reg:x3; val_offset:101541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101541*FLEN/8, x4, x1, x2) - -inst_33848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70000003; valaddr_reg:x3; val_offset:101544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101544*FLEN/8, x4, x1, x2) - -inst_33849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70000007; valaddr_reg:x3; val_offset:101547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101547*FLEN/8, x4, x1, x2) - -inst_33850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7000000f; valaddr_reg:x3; val_offset:101550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101550*FLEN/8, x4, x1, x2) - -inst_33851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7000001f; valaddr_reg:x3; val_offset:101553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101553*FLEN/8, x4, x1, x2) - -inst_33852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7000003f; valaddr_reg:x3; val_offset:101556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101556*FLEN/8, x4, x1, x2) - -inst_33853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7000007f; valaddr_reg:x3; val_offset:101559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101559*FLEN/8, x4, x1, x2) - -inst_33854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x700000ff; valaddr_reg:x3; val_offset:101562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101562*FLEN/8, x4, x1, x2) - -inst_33855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x700001ff; valaddr_reg:x3; val_offset:101565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101565*FLEN/8, x4, x1, x2) - -inst_33856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x700003ff; valaddr_reg:x3; val_offset:101568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101568*FLEN/8, x4, x1, x2) - -inst_33857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x700007ff; valaddr_reg:x3; val_offset:101571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101571*FLEN/8, x4, x1, x2) - -inst_33858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70000fff; valaddr_reg:x3; val_offset:101574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101574*FLEN/8, x4, x1, x2) - -inst_33859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70001fff; valaddr_reg:x3; val_offset:101577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101577*FLEN/8, x4, x1, x2) - -inst_33860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70003fff; valaddr_reg:x3; val_offset:101580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101580*FLEN/8, x4, x1, x2) - -inst_33861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70007fff; valaddr_reg:x3; val_offset:101583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101583*FLEN/8, x4, x1, x2) - -inst_33862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7000ffff; valaddr_reg:x3; val_offset:101586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101586*FLEN/8, x4, x1, x2) - -inst_33863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7001ffff; valaddr_reg:x3; val_offset:101589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101589*FLEN/8, x4, x1, x2) - -inst_33864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7003ffff; valaddr_reg:x3; val_offset:101592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101592*FLEN/8, x4, x1, x2) - -inst_33865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7007ffff; valaddr_reg:x3; val_offset:101595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101595*FLEN/8, x4, x1, x2) - -inst_33866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x700fffff; valaddr_reg:x3; val_offset:101598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101598*FLEN/8, x4, x1, x2) - -inst_33867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x701fffff; valaddr_reg:x3; val_offset:101601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101601*FLEN/8, x4, x1, x2) - -inst_33868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x703fffff; valaddr_reg:x3; val_offset:101604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101604*FLEN/8, x4, x1, x2) - -inst_33869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70400000; valaddr_reg:x3; val_offset:101607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101607*FLEN/8, x4, x1, x2) - -inst_33870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70600000; valaddr_reg:x3; val_offset:101610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101610*FLEN/8, x4, x1, x2) - -inst_33871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70700000; valaddr_reg:x3; val_offset:101613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101613*FLEN/8, x4, x1, x2) - -inst_33872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x70780000; valaddr_reg:x3; val_offset:101616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101616*FLEN/8, x4, x1, x2) - -inst_33873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707c0000; valaddr_reg:x3; val_offset:101619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101619*FLEN/8, x4, x1, x2) - -inst_33874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707e0000; valaddr_reg:x3; val_offset:101622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101622*FLEN/8, x4, x1, x2) - -inst_33875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707f0000; valaddr_reg:x3; val_offset:101625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101625*FLEN/8, x4, x1, x2) - -inst_33876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707f8000; valaddr_reg:x3; val_offset:101628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101628*FLEN/8, x4, x1, x2) - -inst_33877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707fc000; valaddr_reg:x3; val_offset:101631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101631*FLEN/8, x4, x1, x2) - -inst_33878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707fe000; valaddr_reg:x3; val_offset:101634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101634*FLEN/8, x4, x1, x2) - -inst_33879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707ff000; valaddr_reg:x3; val_offset:101637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101637*FLEN/8, x4, x1, x2) - -inst_33880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707ff800; valaddr_reg:x3; val_offset:101640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101640*FLEN/8, x4, x1, x2) - -inst_33881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707ffc00; valaddr_reg:x3; val_offset:101643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101643*FLEN/8, x4, x1, x2) - -inst_33882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707ffe00; valaddr_reg:x3; val_offset:101646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101646*FLEN/8, x4, x1, x2) - -inst_33883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707fff00; valaddr_reg:x3; val_offset:101649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101649*FLEN/8, x4, x1, x2) - -inst_33884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707fff80; valaddr_reg:x3; val_offset:101652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101652*FLEN/8, x4, x1, x2) - -inst_33885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707fffc0; valaddr_reg:x3; val_offset:101655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101655*FLEN/8, x4, x1, x2) - -inst_33886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707fffe0; valaddr_reg:x3; val_offset:101658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101658*FLEN/8, x4, x1, x2) - -inst_33887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707ffff0; valaddr_reg:x3; val_offset:101661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101661*FLEN/8, x4, x1, x2) - -inst_33888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707ffff8; valaddr_reg:x3; val_offset:101664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101664*FLEN/8, x4, x1, x2) - -inst_33889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707ffffc; valaddr_reg:x3; val_offset:101667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101667*FLEN/8, x4, x1, x2) - -inst_33890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707ffffe; valaddr_reg:x3; val_offset:101670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101670*FLEN/8, x4, x1, x2) - -inst_33891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x707fffff; valaddr_reg:x3; val_offset:101673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101673*FLEN/8, x4, x1, x2) - -inst_33892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f000001; valaddr_reg:x3; val_offset:101676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101676*FLEN/8, x4, x1, x2) - -inst_33893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f000003; valaddr_reg:x3; val_offset:101679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101679*FLEN/8, x4, x1, x2) - -inst_33894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f000007; valaddr_reg:x3; val_offset:101682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101682*FLEN/8, x4, x1, x2) - -inst_33895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f199999; valaddr_reg:x3; val_offset:101685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101685*FLEN/8, x4, x1, x2) - -inst_33896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f249249; valaddr_reg:x3; val_offset:101688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101688*FLEN/8, x4, x1, x2) - -inst_33897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f333333; valaddr_reg:x3; val_offset:101691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101691*FLEN/8, x4, x1, x2) - -inst_33898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:101694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101694*FLEN/8, x4, x1, x2) - -inst_33899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:101697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101697*FLEN/8, x4, x1, x2) - -inst_33900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f444444; valaddr_reg:x3; val_offset:101700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101700*FLEN/8, x4, x1, x2) - -inst_33901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:101703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101703*FLEN/8, x4, x1, x2) - -inst_33902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:101706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101706*FLEN/8, x4, x1, x2) - -inst_33903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f666666; valaddr_reg:x3; val_offset:101709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101709*FLEN/8, x4, x1, x2) - -inst_33904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:101712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101712*FLEN/8, x4, x1, x2) - -inst_33905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:101715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101715*FLEN/8, x4, x1, x2) - -inst_33906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:101718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101718*FLEN/8, x4, x1, x2) - -inst_33907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:101721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101721*FLEN/8, x4, x1, x2) - -inst_33908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:101724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101724*FLEN/8, x4, x1, x2) - -inst_33909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:101727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101727*FLEN/8, x4, x1, x2) - -inst_33910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:101730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101730*FLEN/8, x4, x1, x2) - -inst_33911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:101733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101733*FLEN/8, x4, x1, x2) - -inst_33912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:101736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101736*FLEN/8, x4, x1, x2) - -inst_33913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:101739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101739*FLEN/8, x4, x1, x2) - -inst_33914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:101742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101742*FLEN/8, x4, x1, x2) - -inst_33915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:101745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101745*FLEN/8, x4, x1, x2) - -inst_33916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:101748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101748*FLEN/8, x4, x1, x2) - -inst_33917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:101751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101751*FLEN/8, x4, x1, x2) - -inst_33918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:101754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101754*FLEN/8, x4, x1, x2) - -inst_33919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:101757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101757*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_266) - -inst_33920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:101760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101760*FLEN/8, x4, x1, x2) - -inst_33921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:101763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101763*FLEN/8, x4, x1, x2) - -inst_33922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:101766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101766*FLEN/8, x4, x1, x2) - -inst_33923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:101769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101769*FLEN/8, x4, x1, x2) - -inst_33924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb800000; valaddr_reg:x3; val_offset:101772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101772*FLEN/8, x4, x1, x2) - -inst_33925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb800001; valaddr_reg:x3; val_offset:101775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101775*FLEN/8, x4, x1, x2) - -inst_33926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb800003; valaddr_reg:x3; val_offset:101778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101778*FLEN/8, x4, x1, x2) - -inst_33927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb800007; valaddr_reg:x3; val_offset:101781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101781*FLEN/8, x4, x1, x2) - -inst_33928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb80000f; valaddr_reg:x3; val_offset:101784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101784*FLEN/8, x4, x1, x2) - -inst_33929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb80001f; valaddr_reg:x3; val_offset:101787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101787*FLEN/8, x4, x1, x2) - -inst_33930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb80003f; valaddr_reg:x3; val_offset:101790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101790*FLEN/8, x4, x1, x2) - -inst_33931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb80007f; valaddr_reg:x3; val_offset:101793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101793*FLEN/8, x4, x1, x2) - -inst_33932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb8000ff; valaddr_reg:x3; val_offset:101796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101796*FLEN/8, x4, x1, x2) - -inst_33933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb8001ff; valaddr_reg:x3; val_offset:101799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101799*FLEN/8, x4, x1, x2) - -inst_33934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb8003ff; valaddr_reg:x3; val_offset:101802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101802*FLEN/8, x4, x1, x2) - -inst_33935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb8007ff; valaddr_reg:x3; val_offset:101805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101805*FLEN/8, x4, x1, x2) - -inst_33936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb800fff; valaddr_reg:x3; val_offset:101808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101808*FLEN/8, x4, x1, x2) - -inst_33937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb801fff; valaddr_reg:x3; val_offset:101811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101811*FLEN/8, x4, x1, x2) - -inst_33938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb803fff; valaddr_reg:x3; val_offset:101814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101814*FLEN/8, x4, x1, x2) - -inst_33939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb807fff; valaddr_reg:x3; val_offset:101817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101817*FLEN/8, x4, x1, x2) - -inst_33940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb80ffff; valaddr_reg:x3; val_offset:101820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101820*FLEN/8, x4, x1, x2) - -inst_33941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb81ffff; valaddr_reg:x3; val_offset:101823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101823*FLEN/8, x4, x1, x2) - -inst_33942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb83ffff; valaddr_reg:x3; val_offset:101826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101826*FLEN/8, x4, x1, x2) - -inst_33943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb87ffff; valaddr_reg:x3; val_offset:101829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101829*FLEN/8, x4, x1, x2) - -inst_33944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb8fffff; valaddr_reg:x3; val_offset:101832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101832*FLEN/8, x4, x1, x2) - -inst_33945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xb9fffff; valaddr_reg:x3; val_offset:101835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101835*FLEN/8, x4, x1, x2) - -inst_33946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbbfffff; valaddr_reg:x3; val_offset:101838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101838*FLEN/8, x4, x1, x2) - -inst_33947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbc00000; valaddr_reg:x3; val_offset:101841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101841*FLEN/8, x4, x1, x2) - -inst_33948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbe00000; valaddr_reg:x3; val_offset:101844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101844*FLEN/8, x4, x1, x2) - -inst_33949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbf00000; valaddr_reg:x3; val_offset:101847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101847*FLEN/8, x4, x1, x2) - -inst_33950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbf80000; valaddr_reg:x3; val_offset:101850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101850*FLEN/8, x4, x1, x2) - -inst_33951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfc0000; valaddr_reg:x3; val_offset:101853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101853*FLEN/8, x4, x1, x2) - -inst_33952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfe0000; valaddr_reg:x3; val_offset:101856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101856*FLEN/8, x4, x1, x2) - -inst_33953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbff0000; valaddr_reg:x3; val_offset:101859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101859*FLEN/8, x4, x1, x2) - -inst_33954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbff8000; valaddr_reg:x3; val_offset:101862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101862*FLEN/8, x4, x1, x2) - -inst_33955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbffc000; valaddr_reg:x3; val_offset:101865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101865*FLEN/8, x4, x1, x2) - -inst_33956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbffe000; valaddr_reg:x3; val_offset:101868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101868*FLEN/8, x4, x1, x2) - -inst_33957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfff000; valaddr_reg:x3; val_offset:101871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101871*FLEN/8, x4, x1, x2) - -inst_33958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfff800; valaddr_reg:x3; val_offset:101874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101874*FLEN/8, x4, x1, x2) - -inst_33959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfffc00; valaddr_reg:x3; val_offset:101877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101877*FLEN/8, x4, x1, x2) - -inst_33960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfffe00; valaddr_reg:x3; val_offset:101880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101880*FLEN/8, x4, x1, x2) - -inst_33961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbffff00; valaddr_reg:x3; val_offset:101883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101883*FLEN/8, x4, x1, x2) - -inst_33962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbffff80; valaddr_reg:x3; val_offset:101886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101886*FLEN/8, x4, x1, x2) - -inst_33963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbffffc0; valaddr_reg:x3; val_offset:101889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101889*FLEN/8, x4, x1, x2) - -inst_33964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbffffe0; valaddr_reg:x3; val_offset:101892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101892*FLEN/8, x4, x1, x2) - -inst_33965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfffff0; valaddr_reg:x3; val_offset:101895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101895*FLEN/8, x4, x1, x2) - -inst_33966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfffff8; valaddr_reg:x3; val_offset:101898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101898*FLEN/8, x4, x1, x2) - -inst_33967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfffffc; valaddr_reg:x3; val_offset:101901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101901*FLEN/8, x4, x1, x2) - -inst_33968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbfffffe; valaddr_reg:x3; val_offset:101904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101904*FLEN/8, x4, x1, x2) - -inst_33969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; -op3val:0xbffffff; valaddr_reg:x3; val_offset:101907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101907*FLEN/8, x4, x1, x2) - -inst_33970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3000000; valaddr_reg:x3; val_offset:101910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101910*FLEN/8, x4, x1, x2) - -inst_33971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3000001; valaddr_reg:x3; val_offset:101913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101913*FLEN/8, x4, x1, x2) - -inst_33972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3000003; valaddr_reg:x3; val_offset:101916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101916*FLEN/8, x4, x1, x2) - -inst_33973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3000007; valaddr_reg:x3; val_offset:101919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101919*FLEN/8, x4, x1, x2) - -inst_33974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf300000f; valaddr_reg:x3; val_offset:101922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101922*FLEN/8, x4, x1, x2) - -inst_33975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf300001f; valaddr_reg:x3; val_offset:101925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101925*FLEN/8, x4, x1, x2) - -inst_33976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf300003f; valaddr_reg:x3; val_offset:101928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101928*FLEN/8, x4, x1, x2) - -inst_33977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf300007f; valaddr_reg:x3; val_offset:101931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101931*FLEN/8, x4, x1, x2) - -inst_33978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf30000ff; valaddr_reg:x3; val_offset:101934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101934*FLEN/8, x4, x1, x2) - -inst_33979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf30001ff; valaddr_reg:x3; val_offset:101937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101937*FLEN/8, x4, x1, x2) - -inst_33980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf30003ff; valaddr_reg:x3; val_offset:101940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101940*FLEN/8, x4, x1, x2) - -inst_33981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf30007ff; valaddr_reg:x3; val_offset:101943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101943*FLEN/8, x4, x1, x2) - -inst_33982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3000fff; valaddr_reg:x3; val_offset:101946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101946*FLEN/8, x4, x1, x2) - -inst_33983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3001fff; valaddr_reg:x3; val_offset:101949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101949*FLEN/8, x4, x1, x2) - -inst_33984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3003fff; valaddr_reg:x3; val_offset:101952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101952*FLEN/8, x4, x1, x2) - -inst_33985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3007fff; valaddr_reg:x3; val_offset:101955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101955*FLEN/8, x4, x1, x2) - -inst_33986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf300ffff; valaddr_reg:x3; val_offset:101958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101958*FLEN/8, x4, x1, x2) - -inst_33987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf301ffff; valaddr_reg:x3; val_offset:101961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101961*FLEN/8, x4, x1, x2) - -inst_33988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf303ffff; valaddr_reg:x3; val_offset:101964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101964*FLEN/8, x4, x1, x2) - -inst_33989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf307ffff; valaddr_reg:x3; val_offset:101967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101967*FLEN/8, x4, x1, x2) - -inst_33990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf30fffff; valaddr_reg:x3; val_offset:101970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101970*FLEN/8, x4, x1, x2) - -inst_33991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf31fffff; valaddr_reg:x3; val_offset:101973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101973*FLEN/8, x4, x1, x2) - -inst_33992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf33fffff; valaddr_reg:x3; val_offset:101976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101976*FLEN/8, x4, x1, x2) - -inst_33993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3400000; valaddr_reg:x3; val_offset:101979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101979*FLEN/8, x4, x1, x2) - -inst_33994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3600000; valaddr_reg:x3; val_offset:101982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101982*FLEN/8, x4, x1, x2) - -inst_33995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3700000; valaddr_reg:x3; val_offset:101985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101985*FLEN/8, x4, x1, x2) - -inst_33996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf3780000; valaddr_reg:x3; val_offset:101988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101988*FLEN/8, x4, x1, x2) - -inst_33997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37c0000; valaddr_reg:x3; val_offset:101991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101991*FLEN/8, x4, x1, x2) - -inst_33998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37e0000; valaddr_reg:x3; val_offset:101994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101994*FLEN/8, x4, x1, x2) - -inst_33999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37f0000; valaddr_reg:x3; val_offset:101997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101997*FLEN/8, x4, x1, x2) - -inst_34000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37f8000; valaddr_reg:x3; val_offset:102000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102000*FLEN/8, x4, x1, x2) - -inst_34001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37fc000; valaddr_reg:x3; val_offset:102003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102003*FLEN/8, x4, x1, x2) - -inst_34002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37fe000; valaddr_reg:x3; val_offset:102006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102006*FLEN/8, x4, x1, x2) - -inst_34003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37ff000; valaddr_reg:x3; val_offset:102009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102009*FLEN/8, x4, x1, x2) - -inst_34004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37ff800; valaddr_reg:x3; val_offset:102012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102012*FLEN/8, x4, x1, x2) - -inst_34005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37ffc00; valaddr_reg:x3; val_offset:102015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102015*FLEN/8, x4, x1, x2) - -inst_34006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37ffe00; valaddr_reg:x3; val_offset:102018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102018*FLEN/8, x4, x1, x2) - -inst_34007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37fff00; valaddr_reg:x3; val_offset:102021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102021*FLEN/8, x4, x1, x2) - -inst_34008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37fff80; valaddr_reg:x3; val_offset:102024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102024*FLEN/8, x4, x1, x2) - -inst_34009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37fffc0; valaddr_reg:x3; val_offset:102027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102027*FLEN/8, x4, x1, x2) - -inst_34010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37fffe0; valaddr_reg:x3; val_offset:102030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102030*FLEN/8, x4, x1, x2) - -inst_34011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37ffff0; valaddr_reg:x3; val_offset:102033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102033*FLEN/8, x4, x1, x2) - -inst_34012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37ffff8; valaddr_reg:x3; val_offset:102036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102036*FLEN/8, x4, x1, x2) - -inst_34013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37ffffc; valaddr_reg:x3; val_offset:102039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102039*FLEN/8, x4, x1, x2) - -inst_34014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37ffffe; valaddr_reg:x3; val_offset:102042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102042*FLEN/8, x4, x1, x2) - -inst_34015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xf37fffff; valaddr_reg:x3; val_offset:102045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102045*FLEN/8, x4, x1, x2) - -inst_34016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff000001; valaddr_reg:x3; val_offset:102048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102048*FLEN/8, x4, x1, x2) - -inst_34017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff000003; valaddr_reg:x3; val_offset:102051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102051*FLEN/8, x4, x1, x2) - -inst_34018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff000007; valaddr_reg:x3; val_offset:102054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102054*FLEN/8, x4, x1, x2) - -inst_34019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff199999; valaddr_reg:x3; val_offset:102057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102057*FLEN/8, x4, x1, x2) - -inst_34020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff249249; valaddr_reg:x3; val_offset:102060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102060*FLEN/8, x4, x1, x2) - -inst_34021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff333333; valaddr_reg:x3; val_offset:102063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102063*FLEN/8, x4, x1, x2) - -inst_34022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:102066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102066*FLEN/8, x4, x1, x2) - -inst_34023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:102069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102069*FLEN/8, x4, x1, x2) - -inst_34024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff444444; valaddr_reg:x3; val_offset:102072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102072*FLEN/8, x4, x1, x2) - -inst_34025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:102075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102075*FLEN/8, x4, x1, x2) - -inst_34026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:102078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102078*FLEN/8, x4, x1, x2) - -inst_34027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff666666; valaddr_reg:x3; val_offset:102081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102081*FLEN/8, x4, x1, x2) - -inst_34028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:102084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102084*FLEN/8, x4, x1, x2) - -inst_34029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:102087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102087*FLEN/8, x4, x1, x2) - -inst_34030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:102090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102090*FLEN/8, x4, x1, x2) - -inst_34031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:102093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102093*FLEN/8, x4, x1, x2) - -inst_34032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad000000; valaddr_reg:x3; val_offset:102096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102096*FLEN/8, x4, x1, x2) - -inst_34033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad000001; valaddr_reg:x3; val_offset:102099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102099*FLEN/8, x4, x1, x2) - -inst_34034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad000003; valaddr_reg:x3; val_offset:102102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102102*FLEN/8, x4, x1, x2) - -inst_34035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad000007; valaddr_reg:x3; val_offset:102105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102105*FLEN/8, x4, x1, x2) - -inst_34036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad00000f; valaddr_reg:x3; val_offset:102108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102108*FLEN/8, x4, x1, x2) - -inst_34037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad00001f; valaddr_reg:x3; val_offset:102111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102111*FLEN/8, x4, x1, x2) - -inst_34038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad00003f; valaddr_reg:x3; val_offset:102114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102114*FLEN/8, x4, x1, x2) - -inst_34039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad00007f; valaddr_reg:x3; val_offset:102117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102117*FLEN/8, x4, x1, x2) - -inst_34040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad0000ff; valaddr_reg:x3; val_offset:102120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102120*FLEN/8, x4, x1, x2) - -inst_34041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad0001ff; valaddr_reg:x3; val_offset:102123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102123*FLEN/8, x4, x1, x2) - -inst_34042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad0003ff; valaddr_reg:x3; val_offset:102126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102126*FLEN/8, x4, x1, x2) - -inst_34043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad0007ff; valaddr_reg:x3; val_offset:102129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102129*FLEN/8, x4, x1, x2) - -inst_34044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad000fff; valaddr_reg:x3; val_offset:102132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102132*FLEN/8, x4, x1, x2) - -inst_34045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad001fff; valaddr_reg:x3; val_offset:102135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102135*FLEN/8, x4, x1, x2) - -inst_34046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad003fff; valaddr_reg:x3; val_offset:102138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102138*FLEN/8, x4, x1, x2) - -inst_34047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad007fff; valaddr_reg:x3; val_offset:102141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102141*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_267) - -inst_34048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad00ffff; valaddr_reg:x3; val_offset:102144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102144*FLEN/8, x4, x1, x2) - -inst_34049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad01ffff; valaddr_reg:x3; val_offset:102147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102147*FLEN/8, x4, x1, x2) - -inst_34050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad03ffff; valaddr_reg:x3; val_offset:102150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102150*FLEN/8, x4, x1, x2) - -inst_34051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad07ffff; valaddr_reg:x3; val_offset:102153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102153*FLEN/8, x4, x1, x2) - -inst_34052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad0fffff; valaddr_reg:x3; val_offset:102156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102156*FLEN/8, x4, x1, x2) - -inst_34053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad1fffff; valaddr_reg:x3; val_offset:102159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102159*FLEN/8, x4, x1, x2) - -inst_34054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad3fffff; valaddr_reg:x3; val_offset:102162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102162*FLEN/8, x4, x1, x2) - -inst_34055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad400000; valaddr_reg:x3; val_offset:102165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102165*FLEN/8, x4, x1, x2) - -inst_34056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad600000; valaddr_reg:x3; val_offset:102168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102168*FLEN/8, x4, x1, x2) - -inst_34057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad700000; valaddr_reg:x3; val_offset:102171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102171*FLEN/8, x4, x1, x2) - -inst_34058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad780000; valaddr_reg:x3; val_offset:102174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102174*FLEN/8, x4, x1, x2) - -inst_34059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7c0000; valaddr_reg:x3; val_offset:102177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102177*FLEN/8, x4, x1, x2) - -inst_34060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7e0000; valaddr_reg:x3; val_offset:102180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102180*FLEN/8, x4, x1, x2) - -inst_34061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7f0000; valaddr_reg:x3; val_offset:102183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102183*FLEN/8, x4, x1, x2) - -inst_34062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7f8000; valaddr_reg:x3; val_offset:102186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102186*FLEN/8, x4, x1, x2) - -inst_34063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7fc000; valaddr_reg:x3; val_offset:102189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102189*FLEN/8, x4, x1, x2) - -inst_34064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7fe000; valaddr_reg:x3; val_offset:102192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102192*FLEN/8, x4, x1, x2) - -inst_34065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7ff000; valaddr_reg:x3; val_offset:102195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102195*FLEN/8, x4, x1, x2) - -inst_34066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7ff800; valaddr_reg:x3; val_offset:102198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102198*FLEN/8, x4, x1, x2) - -inst_34067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7ffc00; valaddr_reg:x3; val_offset:102201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102201*FLEN/8, x4, x1, x2) - -inst_34068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7ffe00; valaddr_reg:x3; val_offset:102204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102204*FLEN/8, x4, x1, x2) - -inst_34069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7fff00; valaddr_reg:x3; val_offset:102207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102207*FLEN/8, x4, x1, x2) - -inst_34070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7fff80; valaddr_reg:x3; val_offset:102210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102210*FLEN/8, x4, x1, x2) - -inst_34071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7fffc0; valaddr_reg:x3; val_offset:102213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102213*FLEN/8, x4, x1, x2) - -inst_34072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7fffe0; valaddr_reg:x3; val_offset:102216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102216*FLEN/8, x4, x1, x2) - -inst_34073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7ffff0; valaddr_reg:x3; val_offset:102219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102219*FLEN/8, x4, x1, x2) - -inst_34074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7ffff8; valaddr_reg:x3; val_offset:102222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102222*FLEN/8, x4, x1, x2) - -inst_34075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7ffffc; valaddr_reg:x3; val_offset:102225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102225*FLEN/8, x4, x1, x2) - -inst_34076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7ffffe; valaddr_reg:x3; val_offset:102228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102228*FLEN/8, x4, x1, x2) - -inst_34077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xad7fffff; valaddr_reg:x3; val_offset:102231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102231*FLEN/8, x4, x1, x2) - -inst_34078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbf800001; valaddr_reg:x3; val_offset:102234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102234*FLEN/8, x4, x1, x2) - -inst_34079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbf800003; valaddr_reg:x3; val_offset:102237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102237*FLEN/8, x4, x1, x2) - -inst_34080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbf800007; valaddr_reg:x3; val_offset:102240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102240*FLEN/8, x4, x1, x2) - -inst_34081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbf999999; valaddr_reg:x3; val_offset:102243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102243*FLEN/8, x4, x1, x2) - -inst_34082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:102246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102246*FLEN/8, x4, x1, x2) - -inst_34083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:102249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102249*FLEN/8, x4, x1, x2) - -inst_34084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:102252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102252*FLEN/8, x4, x1, x2) - -inst_34085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:102255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102255*FLEN/8, x4, x1, x2) - -inst_34086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:102258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102258*FLEN/8, x4, x1, x2) - -inst_34087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:102261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102261*FLEN/8, x4, x1, x2) - -inst_34088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:102264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102264*FLEN/8, x4, x1, x2) - -inst_34089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:102267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102267*FLEN/8, x4, x1, x2) - -inst_34090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:102270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102270*FLEN/8, x4, x1, x2) - -inst_34091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:102273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102273*FLEN/8, x4, x1, x2) - -inst_34092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:102276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102276*FLEN/8, x4, x1, x2) - -inst_34093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:102279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102279*FLEN/8, x4, x1, x2) - -inst_34094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:102282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102282*FLEN/8, x4, x1, x2) - -inst_34095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:102285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102285*FLEN/8, x4, x1, x2) - -inst_34096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:102288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102288*FLEN/8, x4, x1, x2) - -inst_34097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:102291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102291*FLEN/8, x4, x1, x2) - -inst_34098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:102294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102294*FLEN/8, x4, x1, x2) - -inst_34099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:102297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102297*FLEN/8, x4, x1, x2) - -inst_34100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:102300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102300*FLEN/8, x4, x1, x2) - -inst_34101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:102303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102303*FLEN/8, x4, x1, x2) - -inst_34102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:102306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102306*FLEN/8, x4, x1, x2) - -inst_34103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:102309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102309*FLEN/8, x4, x1, x2) - -inst_34104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:102312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102312*FLEN/8, x4, x1, x2) - -inst_34105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:102315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102315*FLEN/8, x4, x1, x2) - -inst_34106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:102318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102318*FLEN/8, x4, x1, x2) - -inst_34107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:102321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102321*FLEN/8, x4, x1, x2) - -inst_34108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:102324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102324*FLEN/8, x4, x1, x2) - -inst_34109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:102327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102327*FLEN/8, x4, x1, x2) - -inst_34110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89800000; valaddr_reg:x3; val_offset:102330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102330*FLEN/8, x4, x1, x2) - -inst_34111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89800001; valaddr_reg:x3; val_offset:102333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102333*FLEN/8, x4, x1, x2) - -inst_34112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89800003; valaddr_reg:x3; val_offset:102336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102336*FLEN/8, x4, x1, x2) - -inst_34113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89800007; valaddr_reg:x3; val_offset:102339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102339*FLEN/8, x4, x1, x2) - -inst_34114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8980000f; valaddr_reg:x3; val_offset:102342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102342*FLEN/8, x4, x1, x2) - -inst_34115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8980001f; valaddr_reg:x3; val_offset:102345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102345*FLEN/8, x4, x1, x2) - -inst_34116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8980003f; valaddr_reg:x3; val_offset:102348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102348*FLEN/8, x4, x1, x2) - -inst_34117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8980007f; valaddr_reg:x3; val_offset:102351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102351*FLEN/8, x4, x1, x2) - -inst_34118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x898000ff; valaddr_reg:x3; val_offset:102354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102354*FLEN/8, x4, x1, x2) - -inst_34119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x898001ff; valaddr_reg:x3; val_offset:102357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102357*FLEN/8, x4, x1, x2) - -inst_34120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x898003ff; valaddr_reg:x3; val_offset:102360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102360*FLEN/8, x4, x1, x2) - -inst_34121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x898007ff; valaddr_reg:x3; val_offset:102363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102363*FLEN/8, x4, x1, x2) - -inst_34122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89800fff; valaddr_reg:x3; val_offset:102366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102366*FLEN/8, x4, x1, x2) - -inst_34123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89801fff; valaddr_reg:x3; val_offset:102369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102369*FLEN/8, x4, x1, x2) - -inst_34124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89803fff; valaddr_reg:x3; val_offset:102372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102372*FLEN/8, x4, x1, x2) - -inst_34125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89807fff; valaddr_reg:x3; val_offset:102375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102375*FLEN/8, x4, x1, x2) - -inst_34126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8980ffff; valaddr_reg:x3; val_offset:102378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102378*FLEN/8, x4, x1, x2) - -inst_34127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8981ffff; valaddr_reg:x3; val_offset:102381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102381*FLEN/8, x4, x1, x2) - -inst_34128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8983ffff; valaddr_reg:x3; val_offset:102384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102384*FLEN/8, x4, x1, x2) - -inst_34129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x8987ffff; valaddr_reg:x3; val_offset:102387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102387*FLEN/8, x4, x1, x2) - -inst_34130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x898fffff; valaddr_reg:x3; val_offset:102390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102390*FLEN/8, x4, x1, x2) - -inst_34131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x899fffff; valaddr_reg:x3; val_offset:102393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102393*FLEN/8, x4, x1, x2) - -inst_34132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89bfffff; valaddr_reg:x3; val_offset:102396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102396*FLEN/8, x4, x1, x2) - -inst_34133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89c00000; valaddr_reg:x3; val_offset:102399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102399*FLEN/8, x4, x1, x2) - -inst_34134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89e00000; valaddr_reg:x3; val_offset:102402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102402*FLEN/8, x4, x1, x2) - -inst_34135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89f00000; valaddr_reg:x3; val_offset:102405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102405*FLEN/8, x4, x1, x2) - -inst_34136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89f80000; valaddr_reg:x3; val_offset:102408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102408*FLEN/8, x4, x1, x2) - -inst_34137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fc0000; valaddr_reg:x3; val_offset:102411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102411*FLEN/8, x4, x1, x2) - -inst_34138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fe0000; valaddr_reg:x3; val_offset:102414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102414*FLEN/8, x4, x1, x2) - -inst_34139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ff0000; valaddr_reg:x3; val_offset:102417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102417*FLEN/8, x4, x1, x2) - -inst_34140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ff8000; valaddr_reg:x3; val_offset:102420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102420*FLEN/8, x4, x1, x2) - -inst_34141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ffc000; valaddr_reg:x3; val_offset:102423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102423*FLEN/8, x4, x1, x2) - -inst_34142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ffe000; valaddr_reg:x3; val_offset:102426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102426*FLEN/8, x4, x1, x2) - -inst_34143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fff000; valaddr_reg:x3; val_offset:102429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102429*FLEN/8, x4, x1, x2) - -inst_34144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fff800; valaddr_reg:x3; val_offset:102432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102432*FLEN/8, x4, x1, x2) - -inst_34145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fffc00; valaddr_reg:x3; val_offset:102435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102435*FLEN/8, x4, x1, x2) - -inst_34146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fffe00; valaddr_reg:x3; val_offset:102438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102438*FLEN/8, x4, x1, x2) - -inst_34147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ffff00; valaddr_reg:x3; val_offset:102441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102441*FLEN/8, x4, x1, x2) - -inst_34148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ffff80; valaddr_reg:x3; val_offset:102444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102444*FLEN/8, x4, x1, x2) - -inst_34149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ffffc0; valaddr_reg:x3; val_offset:102447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102447*FLEN/8, x4, x1, x2) - -inst_34150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ffffe0; valaddr_reg:x3; val_offset:102450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102450*FLEN/8, x4, x1, x2) - -inst_34151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fffff0; valaddr_reg:x3; val_offset:102453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102453*FLEN/8, x4, x1, x2) - -inst_34152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fffff8; valaddr_reg:x3; val_offset:102456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102456*FLEN/8, x4, x1, x2) - -inst_34153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fffffc; valaddr_reg:x3; val_offset:102459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102459*FLEN/8, x4, x1, x2) - -inst_34154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89fffffe; valaddr_reg:x3; val_offset:102462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102462*FLEN/8, x4, x1, x2) - -inst_34155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; -op3val:0x89ffffff; valaddr_reg:x3; val_offset:102465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102465*FLEN/8, x4, x1, x2) - -inst_34156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:102468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102468*FLEN/8, x4, x1, x2) - -inst_34157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:102471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102471*FLEN/8, x4, x1, x2) - -inst_34158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:102474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102474*FLEN/8, x4, x1, x2) - -inst_34159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:102477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102477*FLEN/8, x4, x1, x2) - -inst_34160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:102480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102480*FLEN/8, x4, x1, x2) - -inst_34161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:102483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102483*FLEN/8, x4, x1, x2) - -inst_34162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:102486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102486*FLEN/8, x4, x1, x2) - -inst_34163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:102489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102489*FLEN/8, x4, x1, x2) - -inst_34164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:102492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102492*FLEN/8, x4, x1, x2) - -inst_34165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:102495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102495*FLEN/8, x4, x1, x2) - -inst_34166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:102498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102498*FLEN/8, x4, x1, x2) - -inst_34167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:102501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102501*FLEN/8, x4, x1, x2) - -inst_34168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:102504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102504*FLEN/8, x4, x1, x2) - -inst_34169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:102507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102507*FLEN/8, x4, x1, x2) - -inst_34170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:102510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102510*FLEN/8, x4, x1, x2) - -inst_34171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:102513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102513*FLEN/8, x4, x1, x2) - -inst_34172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a800000; valaddr_reg:x3; val_offset:102516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102516*FLEN/8, x4, x1, x2) - -inst_34173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a800001; valaddr_reg:x3; val_offset:102519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102519*FLEN/8, x4, x1, x2) - -inst_34174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a800003; valaddr_reg:x3; val_offset:102522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102522*FLEN/8, x4, x1, x2) - -inst_34175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a800007; valaddr_reg:x3; val_offset:102525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102525*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_268) - -inst_34176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a80000f; valaddr_reg:x3; val_offset:102528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102528*FLEN/8, x4, x1, x2) - -inst_34177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a80001f; valaddr_reg:x3; val_offset:102531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102531*FLEN/8, x4, x1, x2) - -inst_34178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a80003f; valaddr_reg:x3; val_offset:102534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102534*FLEN/8, x4, x1, x2) - -inst_34179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a80007f; valaddr_reg:x3; val_offset:102537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102537*FLEN/8, x4, x1, x2) - -inst_34180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a8000ff; valaddr_reg:x3; val_offset:102540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102540*FLEN/8, x4, x1, x2) - -inst_34181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a8001ff; valaddr_reg:x3; val_offset:102543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102543*FLEN/8, x4, x1, x2) - -inst_34182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a8003ff; valaddr_reg:x3; val_offset:102546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102546*FLEN/8, x4, x1, x2) - -inst_34183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a8007ff; valaddr_reg:x3; val_offset:102549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102549*FLEN/8, x4, x1, x2) - -inst_34184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a800fff; valaddr_reg:x3; val_offset:102552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102552*FLEN/8, x4, x1, x2) - -inst_34185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a801fff; valaddr_reg:x3; val_offset:102555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102555*FLEN/8, x4, x1, x2) - -inst_34186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a803fff; valaddr_reg:x3; val_offset:102558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102558*FLEN/8, x4, x1, x2) - -inst_34187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a807fff; valaddr_reg:x3; val_offset:102561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102561*FLEN/8, x4, x1, x2) - -inst_34188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a80ffff; valaddr_reg:x3; val_offset:102564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102564*FLEN/8, x4, x1, x2) - -inst_34189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a81ffff; valaddr_reg:x3; val_offset:102567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102567*FLEN/8, x4, x1, x2) - -inst_34190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a83ffff; valaddr_reg:x3; val_offset:102570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102570*FLEN/8, x4, x1, x2) - -inst_34191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a87ffff; valaddr_reg:x3; val_offset:102573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102573*FLEN/8, x4, x1, x2) - -inst_34192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a8fffff; valaddr_reg:x3; val_offset:102576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102576*FLEN/8, x4, x1, x2) - -inst_34193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8a9fffff; valaddr_reg:x3; val_offset:102579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102579*FLEN/8, x4, x1, x2) - -inst_34194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8abfffff; valaddr_reg:x3; val_offset:102582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102582*FLEN/8, x4, x1, x2) - -inst_34195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8ac00000; valaddr_reg:x3; val_offset:102585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102585*FLEN/8, x4, x1, x2) - -inst_34196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8ae00000; valaddr_reg:x3; val_offset:102588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102588*FLEN/8, x4, x1, x2) - -inst_34197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8af00000; valaddr_reg:x3; val_offset:102591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102591*FLEN/8, x4, x1, x2) - -inst_34198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8af80000; valaddr_reg:x3; val_offset:102594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102594*FLEN/8, x4, x1, x2) - -inst_34199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afc0000; valaddr_reg:x3; val_offset:102597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102597*FLEN/8, x4, x1, x2) - -inst_34200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afe0000; valaddr_reg:x3; val_offset:102600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102600*FLEN/8, x4, x1, x2) - -inst_34201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8aff0000; valaddr_reg:x3; val_offset:102603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102603*FLEN/8, x4, x1, x2) - -inst_34202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8aff8000; valaddr_reg:x3; val_offset:102606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102606*FLEN/8, x4, x1, x2) - -inst_34203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8affc000; valaddr_reg:x3; val_offset:102609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102609*FLEN/8, x4, x1, x2) - -inst_34204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8affe000; valaddr_reg:x3; val_offset:102612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102612*FLEN/8, x4, x1, x2) - -inst_34205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afff000; valaddr_reg:x3; val_offset:102615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102615*FLEN/8, x4, x1, x2) - -inst_34206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afff800; valaddr_reg:x3; val_offset:102618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102618*FLEN/8, x4, x1, x2) - -inst_34207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afffc00; valaddr_reg:x3; val_offset:102621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102621*FLEN/8, x4, x1, x2) - -inst_34208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afffe00; valaddr_reg:x3; val_offset:102624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102624*FLEN/8, x4, x1, x2) - -inst_34209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8affff00; valaddr_reg:x3; val_offset:102627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102627*FLEN/8, x4, x1, x2) - -inst_34210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8affff80; valaddr_reg:x3; val_offset:102630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102630*FLEN/8, x4, x1, x2) - -inst_34211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8affffc0; valaddr_reg:x3; val_offset:102633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102633*FLEN/8, x4, x1, x2) - -inst_34212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8affffe0; valaddr_reg:x3; val_offset:102636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102636*FLEN/8, x4, x1, x2) - -inst_34213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afffff0; valaddr_reg:x3; val_offset:102639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102639*FLEN/8, x4, x1, x2) - -inst_34214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afffff8; valaddr_reg:x3; val_offset:102642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102642*FLEN/8, x4, x1, x2) - -inst_34215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afffffc; valaddr_reg:x3; val_offset:102645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102645*FLEN/8, x4, x1, x2) - -inst_34216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8afffffe; valaddr_reg:x3; val_offset:102648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102648*FLEN/8, x4, x1, x2) - -inst_34217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; -op3val:0x8affffff; valaddr_reg:x3; val_offset:102651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102651*FLEN/8, x4, x1, x2) - -inst_34218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:102654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102654*FLEN/8, x4, x1, x2) - -inst_34219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:102657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102657*FLEN/8, x4, x1, x2) - -inst_34220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:102660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102660*FLEN/8, x4, x1, x2) - -inst_34221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:102663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102663*FLEN/8, x4, x1, x2) - -inst_34222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:102666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102666*FLEN/8, x4, x1, x2) - -inst_34223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:102669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102669*FLEN/8, x4, x1, x2) - -inst_34224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:102672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102672*FLEN/8, x4, x1, x2) - -inst_34225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:102675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102675*FLEN/8, x4, x1, x2) - -inst_34226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:102678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102678*FLEN/8, x4, x1, x2) - -inst_34227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:102681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102681*FLEN/8, x4, x1, x2) - -inst_34228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:102684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102684*FLEN/8, x4, x1, x2) - -inst_34229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:102687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102687*FLEN/8, x4, x1, x2) - -inst_34230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:102690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102690*FLEN/8, x4, x1, x2) - -inst_34231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:102693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102693*FLEN/8, x4, x1, x2) - -inst_34232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:102696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102696*FLEN/8, x4, x1, x2) - -inst_34233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:102699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102699*FLEN/8, x4, x1, x2) - -inst_34234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71800000; valaddr_reg:x3; val_offset:102702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102702*FLEN/8, x4, x1, x2) - -inst_34235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71800001; valaddr_reg:x3; val_offset:102705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102705*FLEN/8, x4, x1, x2) - -inst_34236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71800003; valaddr_reg:x3; val_offset:102708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102708*FLEN/8, x4, x1, x2) - -inst_34237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71800007; valaddr_reg:x3; val_offset:102711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102711*FLEN/8, x4, x1, x2) - -inst_34238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7180000f; valaddr_reg:x3; val_offset:102714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102714*FLEN/8, x4, x1, x2) - -inst_34239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7180001f; valaddr_reg:x3; val_offset:102717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102717*FLEN/8, x4, x1, x2) - -inst_34240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7180003f; valaddr_reg:x3; val_offset:102720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102720*FLEN/8, x4, x1, x2) - -inst_34241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7180007f; valaddr_reg:x3; val_offset:102723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102723*FLEN/8, x4, x1, x2) - -inst_34242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x718000ff; valaddr_reg:x3; val_offset:102726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102726*FLEN/8, x4, x1, x2) - -inst_34243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x718001ff; valaddr_reg:x3; val_offset:102729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102729*FLEN/8, x4, x1, x2) - -inst_34244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x718003ff; valaddr_reg:x3; val_offset:102732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102732*FLEN/8, x4, x1, x2) - -inst_34245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x718007ff; valaddr_reg:x3; val_offset:102735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102735*FLEN/8, x4, x1, x2) - -inst_34246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71800fff; valaddr_reg:x3; val_offset:102738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102738*FLEN/8, x4, x1, x2) - -inst_34247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71801fff; valaddr_reg:x3; val_offset:102741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102741*FLEN/8, x4, x1, x2) - -inst_34248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71803fff; valaddr_reg:x3; val_offset:102744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102744*FLEN/8, x4, x1, x2) - -inst_34249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71807fff; valaddr_reg:x3; val_offset:102747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102747*FLEN/8, x4, x1, x2) - -inst_34250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7180ffff; valaddr_reg:x3; val_offset:102750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102750*FLEN/8, x4, x1, x2) - -inst_34251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7181ffff; valaddr_reg:x3; val_offset:102753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102753*FLEN/8, x4, x1, x2) - -inst_34252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7183ffff; valaddr_reg:x3; val_offset:102756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102756*FLEN/8, x4, x1, x2) - -inst_34253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x7187ffff; valaddr_reg:x3; val_offset:102759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102759*FLEN/8, x4, x1, x2) - -inst_34254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x718fffff; valaddr_reg:x3; val_offset:102762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102762*FLEN/8, x4, x1, x2) - -inst_34255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x719fffff; valaddr_reg:x3; val_offset:102765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102765*FLEN/8, x4, x1, x2) - -inst_34256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71bfffff; valaddr_reg:x3; val_offset:102768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102768*FLEN/8, x4, x1, x2) - -inst_34257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71c00000; valaddr_reg:x3; val_offset:102771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102771*FLEN/8, x4, x1, x2) - -inst_34258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71e00000; valaddr_reg:x3; val_offset:102774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102774*FLEN/8, x4, x1, x2) - -inst_34259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71f00000; valaddr_reg:x3; val_offset:102777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102777*FLEN/8, x4, x1, x2) - -inst_34260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71f80000; valaddr_reg:x3; val_offset:102780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102780*FLEN/8, x4, x1, x2) - -inst_34261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fc0000; valaddr_reg:x3; val_offset:102783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102783*FLEN/8, x4, x1, x2) - -inst_34262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fe0000; valaddr_reg:x3; val_offset:102786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102786*FLEN/8, x4, x1, x2) - -inst_34263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ff0000; valaddr_reg:x3; val_offset:102789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102789*FLEN/8, x4, x1, x2) - -inst_34264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ff8000; valaddr_reg:x3; val_offset:102792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102792*FLEN/8, x4, x1, x2) - -inst_34265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ffc000; valaddr_reg:x3; val_offset:102795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102795*FLEN/8, x4, x1, x2) - -inst_34266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ffe000; valaddr_reg:x3; val_offset:102798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102798*FLEN/8, x4, x1, x2) - -inst_34267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fff000; valaddr_reg:x3; val_offset:102801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102801*FLEN/8, x4, x1, x2) - -inst_34268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fff800; valaddr_reg:x3; val_offset:102804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102804*FLEN/8, x4, x1, x2) - -inst_34269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fffc00; valaddr_reg:x3; val_offset:102807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102807*FLEN/8, x4, x1, x2) - -inst_34270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fffe00; valaddr_reg:x3; val_offset:102810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102810*FLEN/8, x4, x1, x2) - -inst_34271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ffff00; valaddr_reg:x3; val_offset:102813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102813*FLEN/8, x4, x1, x2) - -inst_34272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ffff80; valaddr_reg:x3; val_offset:102816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102816*FLEN/8, x4, x1, x2) - -inst_34273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ffffc0; valaddr_reg:x3; val_offset:102819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102819*FLEN/8, x4, x1, x2) - -inst_34274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ffffe0; valaddr_reg:x3; val_offset:102822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102822*FLEN/8, x4, x1, x2) - -inst_34275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fffff0; valaddr_reg:x3; val_offset:102825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102825*FLEN/8, x4, x1, x2) - -inst_34276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fffff8; valaddr_reg:x3; val_offset:102828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102828*FLEN/8, x4, x1, x2) - -inst_34277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fffffc; valaddr_reg:x3; val_offset:102831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102831*FLEN/8, x4, x1, x2) - -inst_34278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71fffffe; valaddr_reg:x3; val_offset:102834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102834*FLEN/8, x4, x1, x2) - -inst_34279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; -op3val:0x71ffffff; valaddr_reg:x3; val_offset:102837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102837*FLEN/8, x4, x1, x2) - -inst_34280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:102840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102840*FLEN/8, x4, x1, x2) - -inst_34281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:102843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102843*FLEN/8, x4, x1, x2) - -inst_34282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:102846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102846*FLEN/8, x4, x1, x2) - -inst_34283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:102849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102849*FLEN/8, x4, x1, x2) - -inst_34284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:102852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102852*FLEN/8, x4, x1, x2) - -inst_34285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:102855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102855*FLEN/8, x4, x1, x2) - -inst_34286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:102858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102858*FLEN/8, x4, x1, x2) - -inst_34287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:102861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102861*FLEN/8, x4, x1, x2) - -inst_34288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:102864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102864*FLEN/8, x4, x1, x2) - -inst_34289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:102867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102867*FLEN/8, x4, x1, x2) - -inst_34290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:102870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102870*FLEN/8, x4, x1, x2) - -inst_34291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:102873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102873*FLEN/8, x4, x1, x2) - -inst_34292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:102876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102876*FLEN/8, x4, x1, x2) - -inst_34293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:102879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102879*FLEN/8, x4, x1, x2) - -inst_34294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:102882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102882*FLEN/8, x4, x1, x2) - -inst_34295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:102885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102885*FLEN/8, x4, x1, x2) - -inst_34296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3800000; valaddr_reg:x3; val_offset:102888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102888*FLEN/8, x4, x1, x2) - -inst_34297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3800001; valaddr_reg:x3; val_offset:102891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102891*FLEN/8, x4, x1, x2) - -inst_34298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3800003; valaddr_reg:x3; val_offset:102894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102894*FLEN/8, x4, x1, x2) - -inst_34299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3800007; valaddr_reg:x3; val_offset:102897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102897*FLEN/8, x4, x1, x2) - -inst_34300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x380000f; valaddr_reg:x3; val_offset:102900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102900*FLEN/8, x4, x1, x2) - -inst_34301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x380001f; valaddr_reg:x3; val_offset:102903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102903*FLEN/8, x4, x1, x2) - -inst_34302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x380003f; valaddr_reg:x3; val_offset:102906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102906*FLEN/8, x4, x1, x2) - -inst_34303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x380007f; valaddr_reg:x3; val_offset:102909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102909*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_269) - -inst_34304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x38000ff; valaddr_reg:x3; val_offset:102912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102912*FLEN/8, x4, x1, x2) - -inst_34305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x38001ff; valaddr_reg:x3; val_offset:102915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102915*FLEN/8, x4, x1, x2) - -inst_34306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x38003ff; valaddr_reg:x3; val_offset:102918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102918*FLEN/8, x4, x1, x2) - -inst_34307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x38007ff; valaddr_reg:x3; val_offset:102921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102921*FLEN/8, x4, x1, x2) - -inst_34308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3800fff; valaddr_reg:x3; val_offset:102924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102924*FLEN/8, x4, x1, x2) - -inst_34309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3801fff; valaddr_reg:x3; val_offset:102927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102927*FLEN/8, x4, x1, x2) - -inst_34310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3803fff; valaddr_reg:x3; val_offset:102930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102930*FLEN/8, x4, x1, x2) - -inst_34311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3807fff; valaddr_reg:x3; val_offset:102933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102933*FLEN/8, x4, x1, x2) - -inst_34312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x380ffff; valaddr_reg:x3; val_offset:102936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102936*FLEN/8, x4, x1, x2) - -inst_34313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x381ffff; valaddr_reg:x3; val_offset:102939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102939*FLEN/8, x4, x1, x2) - -inst_34314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x383ffff; valaddr_reg:x3; val_offset:102942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102942*FLEN/8, x4, x1, x2) - -inst_34315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x387ffff; valaddr_reg:x3; val_offset:102945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102945*FLEN/8, x4, x1, x2) - -inst_34316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x38fffff; valaddr_reg:x3; val_offset:102948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102948*FLEN/8, x4, x1, x2) - -inst_34317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x39fffff; valaddr_reg:x3; val_offset:102951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102951*FLEN/8, x4, x1, x2) - -inst_34318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3bfffff; valaddr_reg:x3; val_offset:102954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102954*FLEN/8, x4, x1, x2) - -inst_34319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3c00000; valaddr_reg:x3; val_offset:102957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102957*FLEN/8, x4, x1, x2) - -inst_34320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3e00000; valaddr_reg:x3; val_offset:102960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102960*FLEN/8, x4, x1, x2) - -inst_34321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3f00000; valaddr_reg:x3; val_offset:102963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102963*FLEN/8, x4, x1, x2) - -inst_34322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3f80000; valaddr_reg:x3; val_offset:102966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102966*FLEN/8, x4, x1, x2) - -inst_34323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fc0000; valaddr_reg:x3; val_offset:102969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102969*FLEN/8, x4, x1, x2) - -inst_34324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fe0000; valaddr_reg:x3; val_offset:102972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102972*FLEN/8, x4, x1, x2) - -inst_34325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ff0000; valaddr_reg:x3; val_offset:102975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102975*FLEN/8, x4, x1, x2) - -inst_34326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ff8000; valaddr_reg:x3; val_offset:102978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102978*FLEN/8, x4, x1, x2) - -inst_34327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ffc000; valaddr_reg:x3; val_offset:102981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102981*FLEN/8, x4, x1, x2) - -inst_34328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ffe000; valaddr_reg:x3; val_offset:102984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102984*FLEN/8, x4, x1, x2) - -inst_34329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fff000; valaddr_reg:x3; val_offset:102987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102987*FLEN/8, x4, x1, x2) - -inst_34330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fff800; valaddr_reg:x3; val_offset:102990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102990*FLEN/8, x4, x1, x2) - -inst_34331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fffc00; valaddr_reg:x3; val_offset:102993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102993*FLEN/8, x4, x1, x2) - -inst_34332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fffe00; valaddr_reg:x3; val_offset:102996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102996*FLEN/8, x4, x1, x2) - -inst_34333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ffff00; valaddr_reg:x3; val_offset:102999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102999*FLEN/8, x4, x1, x2) - -inst_34334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ffff80; valaddr_reg:x3; val_offset:103002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103002*FLEN/8, x4, x1, x2) - -inst_34335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ffffc0; valaddr_reg:x3; val_offset:103005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103005*FLEN/8, x4, x1, x2) - -inst_34336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ffffe0; valaddr_reg:x3; val_offset:103008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103008*FLEN/8, x4, x1, x2) - -inst_34337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fffff0; valaddr_reg:x3; val_offset:103011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103011*FLEN/8, x4, x1, x2) - -inst_34338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fffff8; valaddr_reg:x3; val_offset:103014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103014*FLEN/8, x4, x1, x2) - -inst_34339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fffffc; valaddr_reg:x3; val_offset:103017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103017*FLEN/8, x4, x1, x2) - -inst_34340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3fffffe; valaddr_reg:x3; val_offset:103020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103020*FLEN/8, x4, x1, x2) - -inst_34341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; -op3val:0x3ffffff; valaddr_reg:x3; val_offset:103023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103023*FLEN/8, x4, x1, x2) - -inst_34342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1000000; valaddr_reg:x3; val_offset:103026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103026*FLEN/8, x4, x1, x2) - -inst_34343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1000001; valaddr_reg:x3; val_offset:103029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103029*FLEN/8, x4, x1, x2) - -inst_34344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1000003; valaddr_reg:x3; val_offset:103032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103032*FLEN/8, x4, x1, x2) - -inst_34345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1000007; valaddr_reg:x3; val_offset:103035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103035*FLEN/8, x4, x1, x2) - -inst_34346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa100000f; valaddr_reg:x3; val_offset:103038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103038*FLEN/8, x4, x1, x2) - -inst_34347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa100001f; valaddr_reg:x3; val_offset:103041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103041*FLEN/8, x4, x1, x2) - -inst_34348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa100003f; valaddr_reg:x3; val_offset:103044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103044*FLEN/8, x4, x1, x2) - -inst_34349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa100007f; valaddr_reg:x3; val_offset:103047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103047*FLEN/8, x4, x1, x2) - -inst_34350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa10000ff; valaddr_reg:x3; val_offset:103050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103050*FLEN/8, x4, x1, x2) - -inst_34351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa10001ff; valaddr_reg:x3; val_offset:103053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103053*FLEN/8, x4, x1, x2) - -inst_34352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa10003ff; valaddr_reg:x3; val_offset:103056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103056*FLEN/8, x4, x1, x2) - -inst_34353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa10007ff; valaddr_reg:x3; val_offset:103059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103059*FLEN/8, x4, x1, x2) - -inst_34354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1000fff; valaddr_reg:x3; val_offset:103062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103062*FLEN/8, x4, x1, x2) - -inst_34355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1001fff; valaddr_reg:x3; val_offset:103065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103065*FLEN/8, x4, x1, x2) - -inst_34356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1003fff; valaddr_reg:x3; val_offset:103068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103068*FLEN/8, x4, x1, x2) - -inst_34357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1007fff; valaddr_reg:x3; val_offset:103071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103071*FLEN/8, x4, x1, x2) - -inst_34358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa100ffff; valaddr_reg:x3; val_offset:103074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103074*FLEN/8, x4, x1, x2) - -inst_34359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa101ffff; valaddr_reg:x3; val_offset:103077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103077*FLEN/8, x4, x1, x2) - -inst_34360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa103ffff; valaddr_reg:x3; val_offset:103080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103080*FLEN/8, x4, x1, x2) - -inst_34361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa107ffff; valaddr_reg:x3; val_offset:103083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103083*FLEN/8, x4, x1, x2) - -inst_34362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa10fffff; valaddr_reg:x3; val_offset:103086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103086*FLEN/8, x4, x1, x2) - -inst_34363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa11fffff; valaddr_reg:x3; val_offset:103089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103089*FLEN/8, x4, x1, x2) - -inst_34364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa13fffff; valaddr_reg:x3; val_offset:103092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103092*FLEN/8, x4, x1, x2) - -inst_34365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1400000; valaddr_reg:x3; val_offset:103095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103095*FLEN/8, x4, x1, x2) - -inst_34366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1600000; valaddr_reg:x3; val_offset:103098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103098*FLEN/8, x4, x1, x2) - -inst_34367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1700000; valaddr_reg:x3; val_offset:103101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103101*FLEN/8, x4, x1, x2) - -inst_34368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa1780000; valaddr_reg:x3; val_offset:103104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103104*FLEN/8, x4, x1, x2) - -inst_34369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17c0000; valaddr_reg:x3; val_offset:103107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103107*FLEN/8, x4, x1, x2) - -inst_34370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17e0000; valaddr_reg:x3; val_offset:103110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103110*FLEN/8, x4, x1, x2) - -inst_34371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17f0000; valaddr_reg:x3; val_offset:103113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103113*FLEN/8, x4, x1, x2) - -inst_34372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17f8000; valaddr_reg:x3; val_offset:103116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103116*FLEN/8, x4, x1, x2) - -inst_34373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17fc000; valaddr_reg:x3; val_offset:103119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103119*FLEN/8, x4, x1, x2) - -inst_34374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17fe000; valaddr_reg:x3; val_offset:103122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103122*FLEN/8, x4, x1, x2) - -inst_34375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17ff000; valaddr_reg:x3; val_offset:103125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103125*FLEN/8, x4, x1, x2) - -inst_34376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17ff800; valaddr_reg:x3; val_offset:103128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103128*FLEN/8, x4, x1, x2) - -inst_34377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17ffc00; valaddr_reg:x3; val_offset:103131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103131*FLEN/8, x4, x1, x2) - -inst_34378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17ffe00; valaddr_reg:x3; val_offset:103134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103134*FLEN/8, x4, x1, x2) - -inst_34379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17fff00; valaddr_reg:x3; val_offset:103137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103137*FLEN/8, x4, x1, x2) - -inst_34380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17fff80; valaddr_reg:x3; val_offset:103140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103140*FLEN/8, x4, x1, x2) - -inst_34381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17fffc0; valaddr_reg:x3; val_offset:103143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103143*FLEN/8, x4, x1, x2) - -inst_34382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17fffe0; valaddr_reg:x3; val_offset:103146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103146*FLEN/8, x4, x1, x2) - -inst_34383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17ffff0; valaddr_reg:x3; val_offset:103149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103149*FLEN/8, x4, x1, x2) - -inst_34384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17ffff8; valaddr_reg:x3; val_offset:103152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103152*FLEN/8, x4, x1, x2) - -inst_34385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17ffffc; valaddr_reg:x3; val_offset:103155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103155*FLEN/8, x4, x1, x2) - -inst_34386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17ffffe; valaddr_reg:x3; val_offset:103158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103158*FLEN/8, x4, x1, x2) - -inst_34387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xa17fffff; valaddr_reg:x3; val_offset:103161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103161*FLEN/8, x4, x1, x2) - -inst_34388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbf800001; valaddr_reg:x3; val_offset:103164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103164*FLEN/8, x4, x1, x2) - -inst_34389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbf800003; valaddr_reg:x3; val_offset:103167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103167*FLEN/8, x4, x1, x2) - -inst_34390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbf800007; valaddr_reg:x3; val_offset:103170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103170*FLEN/8, x4, x1, x2) - -inst_34391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbf999999; valaddr_reg:x3; val_offset:103173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103173*FLEN/8, x4, x1, x2) - -inst_34392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:103176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103176*FLEN/8, x4, x1, x2) - -inst_34393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:103179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103179*FLEN/8, x4, x1, x2) - -inst_34394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:103182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103182*FLEN/8, x4, x1, x2) - -inst_34395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:103185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103185*FLEN/8, x4, x1, x2) - -inst_34396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:103188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103188*FLEN/8, x4, x1, x2) - -inst_34397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:103191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103191*FLEN/8, x4, x1, x2) - -inst_34398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:103194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103194*FLEN/8, x4, x1, x2) - -inst_34399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:103197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103197*FLEN/8, x4, x1, x2) - -inst_34400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:103200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103200*FLEN/8, x4, x1, x2) - -inst_34401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:103203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103203*FLEN/8, x4, x1, x2) - -inst_34402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:103206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103206*FLEN/8, x4, x1, x2) - -inst_34403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:103209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103209*FLEN/8, x4, x1, x2) - -inst_34404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:103212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103212*FLEN/8, x4, x1, x2) - -inst_34405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:103215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103215*FLEN/8, x4, x1, x2) - -inst_34406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:103218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103218*FLEN/8, x4, x1, x2) - -inst_34407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:103221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103221*FLEN/8, x4, x1, x2) - -inst_34408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:103224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103224*FLEN/8, x4, x1, x2) - -inst_34409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:103227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103227*FLEN/8, x4, x1, x2) - -inst_34410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:103230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103230*FLEN/8, x4, x1, x2) - -inst_34411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:103233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103233*FLEN/8, x4, x1, x2) - -inst_34412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:103236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103236*FLEN/8, x4, x1, x2) - -inst_34413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:103239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103239*FLEN/8, x4, x1, x2) - -inst_34414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:103242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103242*FLEN/8, x4, x1, x2) - -inst_34415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:103245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103245*FLEN/8, x4, x1, x2) - -inst_34416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:103248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103248*FLEN/8, x4, x1, x2) - -inst_34417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:103251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103251*FLEN/8, x4, x1, x2) - -inst_34418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:103254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103254*FLEN/8, x4, x1, x2) - -inst_34419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:103257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103257*FLEN/8, x4, x1, x2) - -inst_34420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc000000; valaddr_reg:x3; val_offset:103260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103260*FLEN/8, x4, x1, x2) - -inst_34421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc000001; valaddr_reg:x3; val_offset:103263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103263*FLEN/8, x4, x1, x2) - -inst_34422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc000003; valaddr_reg:x3; val_offset:103266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103266*FLEN/8, x4, x1, x2) - -inst_34423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc000007; valaddr_reg:x3; val_offset:103269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103269*FLEN/8, x4, x1, x2) - -inst_34424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc00000f; valaddr_reg:x3; val_offset:103272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103272*FLEN/8, x4, x1, x2) - -inst_34425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc00001f; valaddr_reg:x3; val_offset:103275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103275*FLEN/8, x4, x1, x2) - -inst_34426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc00003f; valaddr_reg:x3; val_offset:103278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103278*FLEN/8, x4, x1, x2) - -inst_34427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc00007f; valaddr_reg:x3; val_offset:103281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103281*FLEN/8, x4, x1, x2) - -inst_34428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc0000ff; valaddr_reg:x3; val_offset:103284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103284*FLEN/8, x4, x1, x2) - -inst_34429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc0001ff; valaddr_reg:x3; val_offset:103287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103287*FLEN/8, x4, x1, x2) - -inst_34430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc0003ff; valaddr_reg:x3; val_offset:103290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103290*FLEN/8, x4, x1, x2) - -inst_34431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc0007ff; valaddr_reg:x3; val_offset:103293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103293*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_270) - -inst_34432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc000fff; valaddr_reg:x3; val_offset:103296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103296*FLEN/8, x4, x1, x2) - -inst_34433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc001fff; valaddr_reg:x3; val_offset:103299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103299*FLEN/8, x4, x1, x2) - -inst_34434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc003fff; valaddr_reg:x3; val_offset:103302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103302*FLEN/8, x4, x1, x2) - -inst_34435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc007fff; valaddr_reg:x3; val_offset:103305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103305*FLEN/8, x4, x1, x2) - -inst_34436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc00ffff; valaddr_reg:x3; val_offset:103308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103308*FLEN/8, x4, x1, x2) - -inst_34437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc01ffff; valaddr_reg:x3; val_offset:103311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103311*FLEN/8, x4, x1, x2) - -inst_34438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc03ffff; valaddr_reg:x3; val_offset:103314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103314*FLEN/8, x4, x1, x2) - -inst_34439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc07ffff; valaddr_reg:x3; val_offset:103317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103317*FLEN/8, x4, x1, x2) - -inst_34440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc0fffff; valaddr_reg:x3; val_offset:103320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103320*FLEN/8, x4, x1, x2) - -inst_34441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc1fffff; valaddr_reg:x3; val_offset:103323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103323*FLEN/8, x4, x1, x2) - -inst_34442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc3fffff; valaddr_reg:x3; val_offset:103326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103326*FLEN/8, x4, x1, x2) - -inst_34443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc400000; valaddr_reg:x3; val_offset:103329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103329*FLEN/8, x4, x1, x2) - -inst_34444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc600000; valaddr_reg:x3; val_offset:103332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103332*FLEN/8, x4, x1, x2) - -inst_34445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc700000; valaddr_reg:x3; val_offset:103335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103335*FLEN/8, x4, x1, x2) - -inst_34446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc780000; valaddr_reg:x3; val_offset:103338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103338*FLEN/8, x4, x1, x2) - -inst_34447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7c0000; valaddr_reg:x3; val_offset:103341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103341*FLEN/8, x4, x1, x2) - -inst_34448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7e0000; valaddr_reg:x3; val_offset:103344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103344*FLEN/8, x4, x1, x2) - -inst_34449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7f0000; valaddr_reg:x3; val_offset:103347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103347*FLEN/8, x4, x1, x2) - -inst_34450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7f8000; valaddr_reg:x3; val_offset:103350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103350*FLEN/8, x4, x1, x2) - -inst_34451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7fc000; valaddr_reg:x3; val_offset:103353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103353*FLEN/8, x4, x1, x2) - -inst_34452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7fe000; valaddr_reg:x3; val_offset:103356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103356*FLEN/8, x4, x1, x2) - -inst_34453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7ff000; valaddr_reg:x3; val_offset:103359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103359*FLEN/8, x4, x1, x2) - -inst_34454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7ff800; valaddr_reg:x3; val_offset:103362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103362*FLEN/8, x4, x1, x2) - -inst_34455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7ffc00; valaddr_reg:x3; val_offset:103365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103365*FLEN/8, x4, x1, x2) - -inst_34456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7ffe00; valaddr_reg:x3; val_offset:103368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103368*FLEN/8, x4, x1, x2) - -inst_34457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7fff00; valaddr_reg:x3; val_offset:103371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103371*FLEN/8, x4, x1, x2) - -inst_34458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7fff80; valaddr_reg:x3; val_offset:103374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103374*FLEN/8, x4, x1, x2) - -inst_34459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7fffc0; valaddr_reg:x3; val_offset:103377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103377*FLEN/8, x4, x1, x2) - -inst_34460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7fffe0; valaddr_reg:x3; val_offset:103380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103380*FLEN/8, x4, x1, x2) - -inst_34461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7ffff0; valaddr_reg:x3; val_offset:103383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103383*FLEN/8, x4, x1, x2) - -inst_34462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7ffff8; valaddr_reg:x3; val_offset:103386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103386*FLEN/8, x4, x1, x2) - -inst_34463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7ffffc; valaddr_reg:x3; val_offset:103389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103389*FLEN/8, x4, x1, x2) - -inst_34464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7ffffe; valaddr_reg:x3; val_offset:103392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103392*FLEN/8, x4, x1, x2) - -inst_34465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; -op3val:0xc7fffff; valaddr_reg:x3; val_offset:103395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103395*FLEN/8, x4, x1, x2) - -inst_34466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:103398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103398*FLEN/8, x4, x1, x2) - -inst_34467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:103401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103401*FLEN/8, x4, x1, x2) - -inst_34468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:103404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103404*FLEN/8, x4, x1, x2) - -inst_34469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:103407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103407*FLEN/8, x4, x1, x2) - -inst_34470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:103410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103410*FLEN/8, x4, x1, x2) - -inst_34471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:103413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103413*FLEN/8, x4, x1, x2) - -inst_34472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:103416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103416*FLEN/8, x4, x1, x2) - -inst_34473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:103419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103419*FLEN/8, x4, x1, x2) - -inst_34474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:103422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103422*FLEN/8, x4, x1, x2) - -inst_34475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:103425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103425*FLEN/8, x4, x1, x2) - -inst_34476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:103428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103428*FLEN/8, x4, x1, x2) - -inst_34477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:103431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103431*FLEN/8, x4, x1, x2) - -inst_34478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:103434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103434*FLEN/8, x4, x1, x2) - -inst_34479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:103437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103437*FLEN/8, x4, x1, x2) - -inst_34480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:103440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103440*FLEN/8, x4, x1, x2) - -inst_34481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:103443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103443*FLEN/8, x4, x1, x2) - -inst_34482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5800000; valaddr_reg:x3; val_offset:103446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103446*FLEN/8, x4, x1, x2) - -inst_34483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5800001; valaddr_reg:x3; val_offset:103449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103449*FLEN/8, x4, x1, x2) - -inst_34484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5800003; valaddr_reg:x3; val_offset:103452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103452*FLEN/8, x4, x1, x2) - -inst_34485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5800007; valaddr_reg:x3; val_offset:103455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103455*FLEN/8, x4, x1, x2) - -inst_34486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x580000f; valaddr_reg:x3; val_offset:103458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103458*FLEN/8, x4, x1, x2) - -inst_34487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x580001f; valaddr_reg:x3; val_offset:103461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103461*FLEN/8, x4, x1, x2) - -inst_34488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x580003f; valaddr_reg:x3; val_offset:103464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103464*FLEN/8, x4, x1, x2) - -inst_34489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x580007f; valaddr_reg:x3; val_offset:103467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103467*FLEN/8, x4, x1, x2) - -inst_34490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x58000ff; valaddr_reg:x3; val_offset:103470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103470*FLEN/8, x4, x1, x2) - -inst_34491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x58001ff; valaddr_reg:x3; val_offset:103473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103473*FLEN/8, x4, x1, x2) - -inst_34492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x58003ff; valaddr_reg:x3; val_offset:103476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103476*FLEN/8, x4, x1, x2) - -inst_34493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x58007ff; valaddr_reg:x3; val_offset:103479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103479*FLEN/8, x4, x1, x2) - -inst_34494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5800fff; valaddr_reg:x3; val_offset:103482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103482*FLEN/8, x4, x1, x2) - -inst_34495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5801fff; valaddr_reg:x3; val_offset:103485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103485*FLEN/8, x4, x1, x2) - -inst_34496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5803fff; valaddr_reg:x3; val_offset:103488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103488*FLEN/8, x4, x1, x2) - -inst_34497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5807fff; valaddr_reg:x3; val_offset:103491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103491*FLEN/8, x4, x1, x2) - -inst_34498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x580ffff; valaddr_reg:x3; val_offset:103494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103494*FLEN/8, x4, x1, x2) - -inst_34499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x581ffff; valaddr_reg:x3; val_offset:103497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103497*FLEN/8, x4, x1, x2) - -inst_34500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x583ffff; valaddr_reg:x3; val_offset:103500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103500*FLEN/8, x4, x1, x2) - -inst_34501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x587ffff; valaddr_reg:x3; val_offset:103503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103503*FLEN/8, x4, x1, x2) - -inst_34502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x58fffff; valaddr_reg:x3; val_offset:103506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103506*FLEN/8, x4, x1, x2) - -inst_34503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x59fffff; valaddr_reg:x3; val_offset:103509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103509*FLEN/8, x4, x1, x2) - -inst_34504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5bfffff; valaddr_reg:x3; val_offset:103512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103512*FLEN/8, x4, x1, x2) - -inst_34505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5c00000; valaddr_reg:x3; val_offset:103515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103515*FLEN/8, x4, x1, x2) - -inst_34506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5e00000; valaddr_reg:x3; val_offset:103518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103518*FLEN/8, x4, x1, x2) - -inst_34507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5f00000; valaddr_reg:x3; val_offset:103521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103521*FLEN/8, x4, x1, x2) - -inst_34508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5f80000; valaddr_reg:x3; val_offset:103524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103524*FLEN/8, x4, x1, x2) - -inst_34509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fc0000; valaddr_reg:x3; val_offset:103527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103527*FLEN/8, x4, x1, x2) - -inst_34510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fe0000; valaddr_reg:x3; val_offset:103530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103530*FLEN/8, x4, x1, x2) - -inst_34511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ff0000; valaddr_reg:x3; val_offset:103533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103533*FLEN/8, x4, x1, x2) - -inst_34512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ff8000; valaddr_reg:x3; val_offset:103536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103536*FLEN/8, x4, x1, x2) - -inst_34513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ffc000; valaddr_reg:x3; val_offset:103539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103539*FLEN/8, x4, x1, x2) - -inst_34514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ffe000; valaddr_reg:x3; val_offset:103542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103542*FLEN/8, x4, x1, x2) - -inst_34515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fff000; valaddr_reg:x3; val_offset:103545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103545*FLEN/8, x4, x1, x2) - -inst_34516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fff800; valaddr_reg:x3; val_offset:103548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103548*FLEN/8, x4, x1, x2) - -inst_34517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fffc00; valaddr_reg:x3; val_offset:103551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103551*FLEN/8, x4, x1, x2) - -inst_34518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fffe00; valaddr_reg:x3; val_offset:103554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103554*FLEN/8, x4, x1, x2) - -inst_34519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ffff00; valaddr_reg:x3; val_offset:103557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103557*FLEN/8, x4, x1, x2) - -inst_34520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ffff80; valaddr_reg:x3; val_offset:103560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103560*FLEN/8, x4, x1, x2) - -inst_34521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ffffc0; valaddr_reg:x3; val_offset:103563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103563*FLEN/8, x4, x1, x2) - -inst_34522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ffffe0; valaddr_reg:x3; val_offset:103566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103566*FLEN/8, x4, x1, x2) - -inst_34523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fffff0; valaddr_reg:x3; val_offset:103569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103569*FLEN/8, x4, x1, x2) - -inst_34524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fffff8; valaddr_reg:x3; val_offset:103572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103572*FLEN/8, x4, x1, x2) - -inst_34525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fffffc; valaddr_reg:x3; val_offset:103575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103575*FLEN/8, x4, x1, x2) - -inst_34526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5fffffe; valaddr_reg:x3; val_offset:103578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103578*FLEN/8, x4, x1, x2) - -inst_34527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; -op3val:0x5ffffff; valaddr_reg:x3; val_offset:103581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103581*FLEN/8, x4, x1, x2) - -inst_34528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3f800001; valaddr_reg:x3; val_offset:103584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103584*FLEN/8, x4, x1, x2) - -inst_34529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3f800003; valaddr_reg:x3; val_offset:103587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103587*FLEN/8, x4, x1, x2) - -inst_34530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3f800007; valaddr_reg:x3; val_offset:103590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103590*FLEN/8, x4, x1, x2) - -inst_34531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3f999999; valaddr_reg:x3; val_offset:103593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103593*FLEN/8, x4, x1, x2) - -inst_34532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:103596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103596*FLEN/8, x4, x1, x2) - -inst_34533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:103599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103599*FLEN/8, x4, x1, x2) - -inst_34534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:103602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103602*FLEN/8, x4, x1, x2) - -inst_34535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:103605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103605*FLEN/8, x4, x1, x2) - -inst_34536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:103608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103608*FLEN/8, x4, x1, x2) - -inst_34537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:103611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103611*FLEN/8, x4, x1, x2) - -inst_34538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:103614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103614*FLEN/8, x4, x1, x2) - -inst_34539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:103617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103617*FLEN/8, x4, x1, x2) - -inst_34540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:103620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103620*FLEN/8, x4, x1, x2) - -inst_34541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:103623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103623*FLEN/8, x4, x1, x2) - -inst_34542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:103626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103626*FLEN/8, x4, x1, x2) - -inst_34543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:103629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103629*FLEN/8, x4, x1, x2) - -inst_34544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a800000; valaddr_reg:x3; val_offset:103632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103632*FLEN/8, x4, x1, x2) - -inst_34545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a800001; valaddr_reg:x3; val_offset:103635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103635*FLEN/8, x4, x1, x2) - -inst_34546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a800003; valaddr_reg:x3; val_offset:103638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103638*FLEN/8, x4, x1, x2) - -inst_34547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a800007; valaddr_reg:x3; val_offset:103641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103641*FLEN/8, x4, x1, x2) - -inst_34548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a80000f; valaddr_reg:x3; val_offset:103644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103644*FLEN/8, x4, x1, x2) - -inst_34549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a80001f; valaddr_reg:x3; val_offset:103647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103647*FLEN/8, x4, x1, x2) - -inst_34550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a80003f; valaddr_reg:x3; val_offset:103650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103650*FLEN/8, x4, x1, x2) - -inst_34551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a80007f; valaddr_reg:x3; val_offset:103653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103653*FLEN/8, x4, x1, x2) - -inst_34552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a8000ff; valaddr_reg:x3; val_offset:103656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103656*FLEN/8, x4, x1, x2) - -inst_34553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a8001ff; valaddr_reg:x3; val_offset:103659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103659*FLEN/8, x4, x1, x2) - -inst_34554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a8003ff; valaddr_reg:x3; val_offset:103662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103662*FLEN/8, x4, x1, x2) - -inst_34555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a8007ff; valaddr_reg:x3; val_offset:103665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103665*FLEN/8, x4, x1, x2) - -inst_34556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a800fff; valaddr_reg:x3; val_offset:103668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103668*FLEN/8, x4, x1, x2) - -inst_34557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a801fff; valaddr_reg:x3; val_offset:103671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103671*FLEN/8, x4, x1, x2) - -inst_34558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a803fff; valaddr_reg:x3; val_offset:103674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103674*FLEN/8, x4, x1, x2) - -inst_34559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a807fff; valaddr_reg:x3; val_offset:103677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103677*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_271) - -inst_34560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a80ffff; valaddr_reg:x3; val_offset:103680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103680*FLEN/8, x4, x1, x2) - -inst_34561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a81ffff; valaddr_reg:x3; val_offset:103683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103683*FLEN/8, x4, x1, x2) - -inst_34562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a83ffff; valaddr_reg:x3; val_offset:103686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103686*FLEN/8, x4, x1, x2) - -inst_34563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a87ffff; valaddr_reg:x3; val_offset:103689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103689*FLEN/8, x4, x1, x2) - -inst_34564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a8fffff; valaddr_reg:x3; val_offset:103692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103692*FLEN/8, x4, x1, x2) - -inst_34565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4a9fffff; valaddr_reg:x3; val_offset:103695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103695*FLEN/8, x4, x1, x2) - -inst_34566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4abfffff; valaddr_reg:x3; val_offset:103698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103698*FLEN/8, x4, x1, x2) - -inst_34567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4ac00000; valaddr_reg:x3; val_offset:103701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103701*FLEN/8, x4, x1, x2) - -inst_34568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4ae00000; valaddr_reg:x3; val_offset:103704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103704*FLEN/8, x4, x1, x2) - -inst_34569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4af00000; valaddr_reg:x3; val_offset:103707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103707*FLEN/8, x4, x1, x2) - -inst_34570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4af80000; valaddr_reg:x3; val_offset:103710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103710*FLEN/8, x4, x1, x2) - -inst_34571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afc0000; valaddr_reg:x3; val_offset:103713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103713*FLEN/8, x4, x1, x2) - -inst_34572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afe0000; valaddr_reg:x3; val_offset:103716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103716*FLEN/8, x4, x1, x2) - -inst_34573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4aff0000; valaddr_reg:x3; val_offset:103719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103719*FLEN/8, x4, x1, x2) - -inst_34574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4aff8000; valaddr_reg:x3; val_offset:103722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103722*FLEN/8, x4, x1, x2) - -inst_34575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4affc000; valaddr_reg:x3; val_offset:103725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103725*FLEN/8, x4, x1, x2) - -inst_34576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4affe000; valaddr_reg:x3; val_offset:103728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103728*FLEN/8, x4, x1, x2) - -inst_34577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afff000; valaddr_reg:x3; val_offset:103731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103731*FLEN/8, x4, x1, x2) - -inst_34578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afff800; valaddr_reg:x3; val_offset:103734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103734*FLEN/8, x4, x1, x2) - -inst_34579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afffc00; valaddr_reg:x3; val_offset:103737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103737*FLEN/8, x4, x1, x2) - -inst_34580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afffe00; valaddr_reg:x3; val_offset:103740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103740*FLEN/8, x4, x1, x2) - -inst_34581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4affff00; valaddr_reg:x3; val_offset:103743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103743*FLEN/8, x4, x1, x2) - -inst_34582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4affff80; valaddr_reg:x3; val_offset:103746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103746*FLEN/8, x4, x1, x2) - -inst_34583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4affffc0; valaddr_reg:x3; val_offset:103749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103749*FLEN/8, x4, x1, x2) - -inst_34584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4affffe0; valaddr_reg:x3; val_offset:103752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103752*FLEN/8, x4, x1, x2) - -inst_34585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afffff0; valaddr_reg:x3; val_offset:103755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103755*FLEN/8, x4, x1, x2) - -inst_34586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afffff8; valaddr_reg:x3; val_offset:103758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103758*FLEN/8, x4, x1, x2) - -inst_34587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afffffc; valaddr_reg:x3; val_offset:103761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103761*FLEN/8, x4, x1, x2) - -inst_34588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4afffffe; valaddr_reg:x3; val_offset:103764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103764*FLEN/8, x4, x1, x2) - -inst_34589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; -op3val:0x4affffff; valaddr_reg:x3; val_offset:103767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103767*FLEN/8, x4, x1, x2) - -inst_34590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68000000; valaddr_reg:x3; val_offset:103770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103770*FLEN/8, x4, x1, x2) - -inst_34591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68000001; valaddr_reg:x3; val_offset:103773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103773*FLEN/8, x4, x1, x2) - -inst_34592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68000003; valaddr_reg:x3; val_offset:103776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103776*FLEN/8, x4, x1, x2) - -inst_34593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68000007; valaddr_reg:x3; val_offset:103779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103779*FLEN/8, x4, x1, x2) - -inst_34594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x6800000f; valaddr_reg:x3; val_offset:103782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103782*FLEN/8, x4, x1, x2) - -inst_34595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x6800001f; valaddr_reg:x3; val_offset:103785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103785*FLEN/8, x4, x1, x2) - -inst_34596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x6800003f; valaddr_reg:x3; val_offset:103788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103788*FLEN/8, x4, x1, x2) - -inst_34597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x6800007f; valaddr_reg:x3; val_offset:103791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103791*FLEN/8, x4, x1, x2) - -inst_34598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x680000ff; valaddr_reg:x3; val_offset:103794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103794*FLEN/8, x4, x1, x2) - -inst_34599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x680001ff; valaddr_reg:x3; val_offset:103797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103797*FLEN/8, x4, x1, x2) - -inst_34600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x680003ff; valaddr_reg:x3; val_offset:103800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103800*FLEN/8, x4, x1, x2) - -inst_34601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x680007ff; valaddr_reg:x3; val_offset:103803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103803*FLEN/8, x4, x1, x2) - -inst_34602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68000fff; valaddr_reg:x3; val_offset:103806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103806*FLEN/8, x4, x1, x2) - -inst_34603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68001fff; valaddr_reg:x3; val_offset:103809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103809*FLEN/8, x4, x1, x2) - -inst_34604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68003fff; valaddr_reg:x3; val_offset:103812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103812*FLEN/8, x4, x1, x2) - -inst_34605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68007fff; valaddr_reg:x3; val_offset:103815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103815*FLEN/8, x4, x1, x2) - -inst_34606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x6800ffff; valaddr_reg:x3; val_offset:103818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103818*FLEN/8, x4, x1, x2) - -inst_34607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x6801ffff; valaddr_reg:x3; val_offset:103821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103821*FLEN/8, x4, x1, x2) - -inst_34608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x6803ffff; valaddr_reg:x3; val_offset:103824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103824*FLEN/8, x4, x1, x2) - -inst_34609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x6807ffff; valaddr_reg:x3; val_offset:103827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103827*FLEN/8, x4, x1, x2) - -inst_34610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x680fffff; valaddr_reg:x3; val_offset:103830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103830*FLEN/8, x4, x1, x2) - -inst_34611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x681fffff; valaddr_reg:x3; val_offset:103833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103833*FLEN/8, x4, x1, x2) - -inst_34612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x683fffff; valaddr_reg:x3; val_offset:103836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103836*FLEN/8, x4, x1, x2) - -inst_34613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68400000; valaddr_reg:x3; val_offset:103839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103839*FLEN/8, x4, x1, x2) - -inst_34614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68600000; valaddr_reg:x3; val_offset:103842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103842*FLEN/8, x4, x1, x2) - -inst_34615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68700000; valaddr_reg:x3; val_offset:103845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103845*FLEN/8, x4, x1, x2) - -inst_34616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x68780000; valaddr_reg:x3; val_offset:103848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103848*FLEN/8, x4, x1, x2) - -inst_34617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687c0000; valaddr_reg:x3; val_offset:103851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103851*FLEN/8, x4, x1, x2) - -inst_34618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687e0000; valaddr_reg:x3; val_offset:103854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103854*FLEN/8, x4, x1, x2) - -inst_34619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687f0000; valaddr_reg:x3; val_offset:103857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103857*FLEN/8, x4, x1, x2) - -inst_34620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687f8000; valaddr_reg:x3; val_offset:103860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103860*FLEN/8, x4, x1, x2) - -inst_34621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687fc000; valaddr_reg:x3; val_offset:103863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103863*FLEN/8, x4, x1, x2) - -inst_34622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687fe000; valaddr_reg:x3; val_offset:103866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103866*FLEN/8, x4, x1, x2) - -inst_34623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687ff000; valaddr_reg:x3; val_offset:103869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103869*FLEN/8, x4, x1, x2) - -inst_34624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687ff800; valaddr_reg:x3; val_offset:103872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103872*FLEN/8, x4, x1, x2) - -inst_34625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687ffc00; valaddr_reg:x3; val_offset:103875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103875*FLEN/8, x4, x1, x2) - -inst_34626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687ffe00; valaddr_reg:x3; val_offset:103878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103878*FLEN/8, x4, x1, x2) - -inst_34627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687fff00; valaddr_reg:x3; val_offset:103881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103881*FLEN/8, x4, x1, x2) - -inst_34628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687fff80; valaddr_reg:x3; val_offset:103884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103884*FLEN/8, x4, x1, x2) - -inst_34629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687fffc0; valaddr_reg:x3; val_offset:103887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103887*FLEN/8, x4, x1, x2) - -inst_34630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687fffe0; valaddr_reg:x3; val_offset:103890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103890*FLEN/8, x4, x1, x2) - -inst_34631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687ffff0; valaddr_reg:x3; val_offset:103893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103893*FLEN/8, x4, x1, x2) - -inst_34632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687ffff8; valaddr_reg:x3; val_offset:103896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103896*FLEN/8, x4, x1, x2) - -inst_34633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687ffffc; valaddr_reg:x3; val_offset:103899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103899*FLEN/8, x4, x1, x2) - -inst_34634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687ffffe; valaddr_reg:x3; val_offset:103902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103902*FLEN/8, x4, x1, x2) - -inst_34635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x687fffff; valaddr_reg:x3; val_offset:103905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103905*FLEN/8, x4, x1, x2) - -inst_34636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f000001; valaddr_reg:x3; val_offset:103908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103908*FLEN/8, x4, x1, x2) - -inst_34637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f000003; valaddr_reg:x3; val_offset:103911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103911*FLEN/8, x4, x1, x2) - -inst_34638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f000007; valaddr_reg:x3; val_offset:103914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103914*FLEN/8, x4, x1, x2) - -inst_34639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f199999; valaddr_reg:x3; val_offset:103917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103917*FLEN/8, x4, x1, x2) - -inst_34640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f249249; valaddr_reg:x3; val_offset:103920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103920*FLEN/8, x4, x1, x2) - -inst_34641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f333333; valaddr_reg:x3; val_offset:103923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103923*FLEN/8, x4, x1, x2) - -inst_34642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:103926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103926*FLEN/8, x4, x1, x2) - -inst_34643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:103929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103929*FLEN/8, x4, x1, x2) - -inst_34644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f444444; valaddr_reg:x3; val_offset:103932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103932*FLEN/8, x4, x1, x2) - -inst_34645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:103935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103935*FLEN/8, x4, x1, x2) - -inst_34646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:103938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103938*FLEN/8, x4, x1, x2) - -inst_34647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f666666; valaddr_reg:x3; val_offset:103941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103941*FLEN/8, x4, x1, x2) - -inst_34648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:103944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103944*FLEN/8, x4, x1, x2) - -inst_34649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:103947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103947*FLEN/8, x4, x1, x2) - -inst_34650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:103950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103950*FLEN/8, x4, x1, x2) - -inst_34651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:103953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103953*FLEN/8, x4, x1, x2) - -inst_34652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:103956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103956*FLEN/8, x4, x1, x2) - -inst_34653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:103959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103959*FLEN/8, x4, x1, x2) - -inst_34654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:103962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103962*FLEN/8, x4, x1, x2) - -inst_34655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:103965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103965*FLEN/8, x4, x1, x2) - -inst_34656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:103968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103968*FLEN/8, x4, x1, x2) - -inst_34657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:103971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103971*FLEN/8, x4, x1, x2) - -inst_34658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:103974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103974*FLEN/8, x4, x1, x2) - -inst_34659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:103977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103977*FLEN/8, x4, x1, x2) - -inst_34660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:103980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103980*FLEN/8, x4, x1, x2) - -inst_34661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:103983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103983*FLEN/8, x4, x1, x2) - -inst_34662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:103986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103986*FLEN/8, x4, x1, x2) - -inst_34663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:103989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103989*FLEN/8, x4, x1, x2) - -inst_34664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:103992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103992*FLEN/8, x4, x1, x2) - -inst_34665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:103995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103995*FLEN/8, x4, x1, x2) - -inst_34666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:103998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103998*FLEN/8, x4, x1, x2) - -inst_34667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:104001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104001*FLEN/8, x4, x1, x2) - -inst_34668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87000000; valaddr_reg:x3; val_offset:104004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104004*FLEN/8, x4, x1, x2) - -inst_34669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87000001; valaddr_reg:x3; val_offset:104007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104007*FLEN/8, x4, x1, x2) - -inst_34670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87000003; valaddr_reg:x3; val_offset:104010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104010*FLEN/8, x4, x1, x2) - -inst_34671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87000007; valaddr_reg:x3; val_offset:104013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104013*FLEN/8, x4, x1, x2) - -inst_34672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x8700000f; valaddr_reg:x3; val_offset:104016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104016*FLEN/8, x4, x1, x2) - -inst_34673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x8700001f; valaddr_reg:x3; val_offset:104019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104019*FLEN/8, x4, x1, x2) - -inst_34674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x8700003f; valaddr_reg:x3; val_offset:104022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104022*FLEN/8, x4, x1, x2) - -inst_34675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x8700007f; valaddr_reg:x3; val_offset:104025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104025*FLEN/8, x4, x1, x2) - -inst_34676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x870000ff; valaddr_reg:x3; val_offset:104028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104028*FLEN/8, x4, x1, x2) - -inst_34677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x870001ff; valaddr_reg:x3; val_offset:104031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104031*FLEN/8, x4, x1, x2) - -inst_34678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x870003ff; valaddr_reg:x3; val_offset:104034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104034*FLEN/8, x4, x1, x2) - -inst_34679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x870007ff; valaddr_reg:x3; val_offset:104037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104037*FLEN/8, x4, x1, x2) - -inst_34680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87000fff; valaddr_reg:x3; val_offset:104040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104040*FLEN/8, x4, x1, x2) - -inst_34681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87001fff; valaddr_reg:x3; val_offset:104043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104043*FLEN/8, x4, x1, x2) - -inst_34682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87003fff; valaddr_reg:x3; val_offset:104046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104046*FLEN/8, x4, x1, x2) - -inst_34683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87007fff; valaddr_reg:x3; val_offset:104049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104049*FLEN/8, x4, x1, x2) - -inst_34684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x8700ffff; valaddr_reg:x3; val_offset:104052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104052*FLEN/8, x4, x1, x2) - -inst_34685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x8701ffff; valaddr_reg:x3; val_offset:104055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104055*FLEN/8, x4, x1, x2) - -inst_34686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x8703ffff; valaddr_reg:x3; val_offset:104058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104058*FLEN/8, x4, x1, x2) - -inst_34687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x8707ffff; valaddr_reg:x3; val_offset:104061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104061*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_272) - -inst_34688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x870fffff; valaddr_reg:x3; val_offset:104064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104064*FLEN/8, x4, x1, x2) - -inst_34689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x871fffff; valaddr_reg:x3; val_offset:104067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104067*FLEN/8, x4, x1, x2) - -inst_34690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x873fffff; valaddr_reg:x3; val_offset:104070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104070*FLEN/8, x4, x1, x2) - -inst_34691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87400000; valaddr_reg:x3; val_offset:104073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104073*FLEN/8, x4, x1, x2) - -inst_34692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87600000; valaddr_reg:x3; val_offset:104076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104076*FLEN/8, x4, x1, x2) - -inst_34693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87700000; valaddr_reg:x3; val_offset:104079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104079*FLEN/8, x4, x1, x2) - -inst_34694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x87780000; valaddr_reg:x3; val_offset:104082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104082*FLEN/8, x4, x1, x2) - -inst_34695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877c0000; valaddr_reg:x3; val_offset:104085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104085*FLEN/8, x4, x1, x2) - -inst_34696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877e0000; valaddr_reg:x3; val_offset:104088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104088*FLEN/8, x4, x1, x2) - -inst_34697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877f0000; valaddr_reg:x3; val_offset:104091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104091*FLEN/8, x4, x1, x2) - -inst_34698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877f8000; valaddr_reg:x3; val_offset:104094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104094*FLEN/8, x4, x1, x2) - -inst_34699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877fc000; valaddr_reg:x3; val_offset:104097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104097*FLEN/8, x4, x1, x2) - -inst_34700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877fe000; valaddr_reg:x3; val_offset:104100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104100*FLEN/8, x4, x1, x2) - -inst_34701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877ff000; valaddr_reg:x3; val_offset:104103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104103*FLEN/8, x4, x1, x2) - -inst_34702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877ff800; valaddr_reg:x3; val_offset:104106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104106*FLEN/8, x4, x1, x2) - -inst_34703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877ffc00; valaddr_reg:x3; val_offset:104109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104109*FLEN/8, x4, x1, x2) - -inst_34704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877ffe00; valaddr_reg:x3; val_offset:104112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104112*FLEN/8, x4, x1, x2) - -inst_34705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877fff00; valaddr_reg:x3; val_offset:104115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104115*FLEN/8, x4, x1, x2) - -inst_34706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877fff80; valaddr_reg:x3; val_offset:104118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104118*FLEN/8, x4, x1, x2) - -inst_34707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877fffc0; valaddr_reg:x3; val_offset:104121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104121*FLEN/8, x4, x1, x2) - -inst_34708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877fffe0; valaddr_reg:x3; val_offset:104124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104124*FLEN/8, x4, x1, x2) - -inst_34709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877ffff0; valaddr_reg:x3; val_offset:104127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104127*FLEN/8, x4, x1, x2) - -inst_34710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877ffff8; valaddr_reg:x3; val_offset:104130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104130*FLEN/8, x4, x1, x2) - -inst_34711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877ffffc; valaddr_reg:x3; val_offset:104133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104133*FLEN/8, x4, x1, x2) - -inst_34712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877ffffe; valaddr_reg:x3; val_offset:104136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104136*FLEN/8, x4, x1, x2) - -inst_34713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; -op3val:0x877fffff; valaddr_reg:x3; val_offset:104139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104139*FLEN/8, x4, x1, x2) - -inst_34714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:104142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104142*FLEN/8, x4, x1, x2) - -inst_34715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:104145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104145*FLEN/8, x4, x1, x2) - -inst_34716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:104148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104148*FLEN/8, x4, x1, x2) - -inst_34717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:104151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104151*FLEN/8, x4, x1, x2) - -inst_34718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:104154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104154*FLEN/8, x4, x1, x2) - -inst_34719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:104157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104157*FLEN/8, x4, x1, x2) - -inst_34720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:104160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104160*FLEN/8, x4, x1, x2) - -inst_34721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:104163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104163*FLEN/8, x4, x1, x2) - -inst_34722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:104166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104166*FLEN/8, x4, x1, x2) - -inst_34723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:104169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104169*FLEN/8, x4, x1, x2) - -inst_34724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:104172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104172*FLEN/8, x4, x1, x2) - -inst_34725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:104175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104175*FLEN/8, x4, x1, x2) - -inst_34726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:104178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104178*FLEN/8, x4, x1, x2) - -inst_34727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:104181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104181*FLEN/8, x4, x1, x2) - -inst_34728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:104184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104184*FLEN/8, x4, x1, x2) - -inst_34729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:104187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104187*FLEN/8, x4, x1, x2) - -inst_34730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85000000; valaddr_reg:x3; val_offset:104190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104190*FLEN/8, x4, x1, x2) - -inst_34731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85000001; valaddr_reg:x3; val_offset:104193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104193*FLEN/8, x4, x1, x2) - -inst_34732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85000003; valaddr_reg:x3; val_offset:104196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104196*FLEN/8, x4, x1, x2) - -inst_34733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85000007; valaddr_reg:x3; val_offset:104199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104199*FLEN/8, x4, x1, x2) - -inst_34734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8500000f; valaddr_reg:x3; val_offset:104202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104202*FLEN/8, x4, x1, x2) - -inst_34735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8500001f; valaddr_reg:x3; val_offset:104205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104205*FLEN/8, x4, x1, x2) - -inst_34736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8500003f; valaddr_reg:x3; val_offset:104208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104208*FLEN/8, x4, x1, x2) - -inst_34737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8500007f; valaddr_reg:x3; val_offset:104211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104211*FLEN/8, x4, x1, x2) - -inst_34738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x850000ff; valaddr_reg:x3; val_offset:104214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104214*FLEN/8, x4, x1, x2) - -inst_34739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x850001ff; valaddr_reg:x3; val_offset:104217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104217*FLEN/8, x4, x1, x2) - -inst_34740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x850003ff; valaddr_reg:x3; val_offset:104220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104220*FLEN/8, x4, x1, x2) - -inst_34741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x850007ff; valaddr_reg:x3; val_offset:104223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104223*FLEN/8, x4, x1, x2) - -inst_34742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85000fff; valaddr_reg:x3; val_offset:104226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104226*FLEN/8, x4, x1, x2) - -inst_34743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85001fff; valaddr_reg:x3; val_offset:104229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104229*FLEN/8, x4, x1, x2) - -inst_34744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85003fff; valaddr_reg:x3; val_offset:104232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104232*FLEN/8, x4, x1, x2) - -inst_34745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85007fff; valaddr_reg:x3; val_offset:104235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104235*FLEN/8, x4, x1, x2) - -inst_34746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8500ffff; valaddr_reg:x3; val_offset:104238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104238*FLEN/8, x4, x1, x2) - -inst_34747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8501ffff; valaddr_reg:x3; val_offset:104241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104241*FLEN/8, x4, x1, x2) - -inst_34748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8503ffff; valaddr_reg:x3; val_offset:104244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104244*FLEN/8, x4, x1, x2) - -inst_34749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x8507ffff; valaddr_reg:x3; val_offset:104247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104247*FLEN/8, x4, x1, x2) - -inst_34750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x850fffff; valaddr_reg:x3; val_offset:104250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104250*FLEN/8, x4, x1, x2) - -inst_34751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x851fffff; valaddr_reg:x3; val_offset:104253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104253*FLEN/8, x4, x1, x2) - -inst_34752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x853fffff; valaddr_reg:x3; val_offset:104256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104256*FLEN/8, x4, x1, x2) - -inst_34753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85400000; valaddr_reg:x3; val_offset:104259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104259*FLEN/8, x4, x1, x2) - -inst_34754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85600000; valaddr_reg:x3; val_offset:104262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104262*FLEN/8, x4, x1, x2) - -inst_34755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85700000; valaddr_reg:x3; val_offset:104265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104265*FLEN/8, x4, x1, x2) - -inst_34756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x85780000; valaddr_reg:x3; val_offset:104268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104268*FLEN/8, x4, x1, x2) - -inst_34757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857c0000; valaddr_reg:x3; val_offset:104271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104271*FLEN/8, x4, x1, x2) - -inst_34758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857e0000; valaddr_reg:x3; val_offset:104274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104274*FLEN/8, x4, x1, x2) - -inst_34759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857f0000; valaddr_reg:x3; val_offset:104277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104277*FLEN/8, x4, x1, x2) - -inst_34760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857f8000; valaddr_reg:x3; val_offset:104280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104280*FLEN/8, x4, x1, x2) - -inst_34761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857fc000; valaddr_reg:x3; val_offset:104283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104283*FLEN/8, x4, x1, x2) - -inst_34762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857fe000; valaddr_reg:x3; val_offset:104286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104286*FLEN/8, x4, x1, x2) - -inst_34763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857ff000; valaddr_reg:x3; val_offset:104289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104289*FLEN/8, x4, x1, x2) - -inst_34764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857ff800; valaddr_reg:x3; val_offset:104292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104292*FLEN/8, x4, x1, x2) - -inst_34765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857ffc00; valaddr_reg:x3; val_offset:104295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104295*FLEN/8, x4, x1, x2) - -inst_34766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857ffe00; valaddr_reg:x3; val_offset:104298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104298*FLEN/8, x4, x1, x2) - -inst_34767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857fff00; valaddr_reg:x3; val_offset:104301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104301*FLEN/8, x4, x1, x2) - -inst_34768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857fff80; valaddr_reg:x3; val_offset:104304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104304*FLEN/8, x4, x1, x2) - -inst_34769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857fffc0; valaddr_reg:x3; val_offset:104307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104307*FLEN/8, x4, x1, x2) - -inst_34770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857fffe0; valaddr_reg:x3; val_offset:104310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104310*FLEN/8, x4, x1, x2) - -inst_34771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857ffff0; valaddr_reg:x3; val_offset:104313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104313*FLEN/8, x4, x1, x2) - -inst_34772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857ffff8; valaddr_reg:x3; val_offset:104316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104316*FLEN/8, x4, x1, x2) - -inst_34773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857ffffc; valaddr_reg:x3; val_offset:104319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104319*FLEN/8, x4, x1, x2) - -inst_34774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857ffffe; valaddr_reg:x3; val_offset:104322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104322*FLEN/8, x4, x1, x2) - -inst_34775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; -op3val:0x857fffff; valaddr_reg:x3; val_offset:104325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104325*FLEN/8, x4, x1, x2) - -inst_34776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3f800001; valaddr_reg:x3; val_offset:104328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104328*FLEN/8, x4, x1, x2) - -inst_34777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3f800003; valaddr_reg:x3; val_offset:104331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104331*FLEN/8, x4, x1, x2) - -inst_34778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3f800007; valaddr_reg:x3; val_offset:104334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104334*FLEN/8, x4, x1, x2) - -inst_34779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3f999999; valaddr_reg:x3; val_offset:104337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104337*FLEN/8, x4, x1, x2) - -inst_34780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:104340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104340*FLEN/8, x4, x1, x2) - -inst_34781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:104343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104343*FLEN/8, x4, x1, x2) - -inst_34782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:104346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104346*FLEN/8, x4, x1, x2) - -inst_34783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:104349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104349*FLEN/8, x4, x1, x2) - -inst_34784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:104352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104352*FLEN/8, x4, x1, x2) - -inst_34785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:104355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104355*FLEN/8, x4, x1, x2) - -inst_34786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:104358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104358*FLEN/8, x4, x1, x2) - -inst_34787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:104361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104361*FLEN/8, x4, x1, x2) - -inst_34788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:104364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104364*FLEN/8, x4, x1, x2) - -inst_34789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:104367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104367*FLEN/8, x4, x1, x2) - -inst_34790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:104370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104370*FLEN/8, x4, x1, x2) - -inst_34791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:104373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104373*FLEN/8, x4, x1, x2) - -inst_34792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43800000; valaddr_reg:x3; val_offset:104376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104376*FLEN/8, x4, x1, x2) - -inst_34793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43800001; valaddr_reg:x3; val_offset:104379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104379*FLEN/8, x4, x1, x2) - -inst_34794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43800003; valaddr_reg:x3; val_offset:104382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104382*FLEN/8, x4, x1, x2) - -inst_34795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43800007; valaddr_reg:x3; val_offset:104385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104385*FLEN/8, x4, x1, x2) - -inst_34796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x4380000f; valaddr_reg:x3; val_offset:104388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104388*FLEN/8, x4, x1, x2) - -inst_34797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x4380001f; valaddr_reg:x3; val_offset:104391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104391*FLEN/8, x4, x1, x2) - -inst_34798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x4380003f; valaddr_reg:x3; val_offset:104394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104394*FLEN/8, x4, x1, x2) - -inst_34799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x4380007f; valaddr_reg:x3; val_offset:104397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104397*FLEN/8, x4, x1, x2) - -inst_34800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x438000ff; valaddr_reg:x3; val_offset:104400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104400*FLEN/8, x4, x1, x2) - -inst_34801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x438001ff; valaddr_reg:x3; val_offset:104403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104403*FLEN/8, x4, x1, x2) - -inst_34802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x438003ff; valaddr_reg:x3; val_offset:104406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104406*FLEN/8, x4, x1, x2) - -inst_34803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x438007ff; valaddr_reg:x3; val_offset:104409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104409*FLEN/8, x4, x1, x2) - -inst_34804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43800fff; valaddr_reg:x3; val_offset:104412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104412*FLEN/8, x4, x1, x2) - -inst_34805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43801fff; valaddr_reg:x3; val_offset:104415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104415*FLEN/8, x4, x1, x2) - -inst_34806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43803fff; valaddr_reg:x3; val_offset:104418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104418*FLEN/8, x4, x1, x2) - -inst_34807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43807fff; valaddr_reg:x3; val_offset:104421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104421*FLEN/8, x4, x1, x2) - -inst_34808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x4380ffff; valaddr_reg:x3; val_offset:104424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104424*FLEN/8, x4, x1, x2) - -inst_34809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x4381ffff; valaddr_reg:x3; val_offset:104427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104427*FLEN/8, x4, x1, x2) - -inst_34810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x4383ffff; valaddr_reg:x3; val_offset:104430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104430*FLEN/8, x4, x1, x2) - -inst_34811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x4387ffff; valaddr_reg:x3; val_offset:104433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104433*FLEN/8, x4, x1, x2) - -inst_34812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x438fffff; valaddr_reg:x3; val_offset:104436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104436*FLEN/8, x4, x1, x2) - -inst_34813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x439fffff; valaddr_reg:x3; val_offset:104439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104439*FLEN/8, x4, x1, x2) - -inst_34814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43bfffff; valaddr_reg:x3; val_offset:104442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104442*FLEN/8, x4, x1, x2) - -inst_34815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43c00000; valaddr_reg:x3; val_offset:104445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104445*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_273) - -inst_34816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43e00000; valaddr_reg:x3; val_offset:104448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104448*FLEN/8, x4, x1, x2) - -inst_34817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43f00000; valaddr_reg:x3; val_offset:104451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104451*FLEN/8, x4, x1, x2) - -inst_34818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43f80000; valaddr_reg:x3; val_offset:104454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104454*FLEN/8, x4, x1, x2) - -inst_34819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fc0000; valaddr_reg:x3; val_offset:104457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104457*FLEN/8, x4, x1, x2) - -inst_34820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fe0000; valaddr_reg:x3; val_offset:104460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104460*FLEN/8, x4, x1, x2) - -inst_34821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ff0000; valaddr_reg:x3; val_offset:104463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104463*FLEN/8, x4, x1, x2) - -inst_34822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ff8000; valaddr_reg:x3; val_offset:104466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104466*FLEN/8, x4, x1, x2) - -inst_34823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ffc000; valaddr_reg:x3; val_offset:104469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104469*FLEN/8, x4, x1, x2) - -inst_34824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ffe000; valaddr_reg:x3; val_offset:104472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104472*FLEN/8, x4, x1, x2) - -inst_34825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fff000; valaddr_reg:x3; val_offset:104475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104475*FLEN/8, x4, x1, x2) - -inst_34826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fff800; valaddr_reg:x3; val_offset:104478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104478*FLEN/8, x4, x1, x2) - -inst_34827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fffc00; valaddr_reg:x3; val_offset:104481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104481*FLEN/8, x4, x1, x2) - -inst_34828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fffe00; valaddr_reg:x3; val_offset:104484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104484*FLEN/8, x4, x1, x2) - -inst_34829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ffff00; valaddr_reg:x3; val_offset:104487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104487*FLEN/8, x4, x1, x2) - -inst_34830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ffff80; valaddr_reg:x3; val_offset:104490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104490*FLEN/8, x4, x1, x2) - -inst_34831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ffffc0; valaddr_reg:x3; val_offset:104493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104493*FLEN/8, x4, x1, x2) - -inst_34832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ffffe0; valaddr_reg:x3; val_offset:104496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104496*FLEN/8, x4, x1, x2) - -inst_34833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fffff0; valaddr_reg:x3; val_offset:104499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104499*FLEN/8, x4, x1, x2) - -inst_34834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fffff8; valaddr_reg:x3; val_offset:104502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104502*FLEN/8, x4, x1, x2) - -inst_34835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fffffc; valaddr_reg:x3; val_offset:104505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104505*FLEN/8, x4, x1, x2) - -inst_34836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43fffffe; valaddr_reg:x3; val_offset:104508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104508*FLEN/8, x4, x1, x2) - -inst_34837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; -op3val:0x43ffffff; valaddr_reg:x3; val_offset:104511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104511*FLEN/8, x4, x1, x2) - -inst_34838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3f800001; valaddr_reg:x3; val_offset:104514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104514*FLEN/8, x4, x1, x2) - -inst_34839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3f800003; valaddr_reg:x3; val_offset:104517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104517*FLEN/8, x4, x1, x2) - -inst_34840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3f800007; valaddr_reg:x3; val_offset:104520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104520*FLEN/8, x4, x1, x2) - -inst_34841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3f999999; valaddr_reg:x3; val_offset:104523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104523*FLEN/8, x4, x1, x2) - -inst_34842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:104526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104526*FLEN/8, x4, x1, x2) - -inst_34843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:104529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104529*FLEN/8, x4, x1, x2) - -inst_34844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:104532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104532*FLEN/8, x4, x1, x2) - -inst_34845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:104535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104535*FLEN/8, x4, x1, x2) - -inst_34846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:104538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104538*FLEN/8, x4, x1, x2) - -inst_34847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:104541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104541*FLEN/8, x4, x1, x2) - -inst_34848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:104544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104544*FLEN/8, x4, x1, x2) - -inst_34849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:104547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104547*FLEN/8, x4, x1, x2) - -inst_34850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:104550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104550*FLEN/8, x4, x1, x2) - -inst_34851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:104553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104553*FLEN/8, x4, x1, x2) - -inst_34852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:104556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104556*FLEN/8, x4, x1, x2) - -inst_34853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:104559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104559*FLEN/8, x4, x1, x2) - -inst_34854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42800000; valaddr_reg:x3; val_offset:104562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104562*FLEN/8, x4, x1, x2) - -inst_34855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42800001; valaddr_reg:x3; val_offset:104565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104565*FLEN/8, x4, x1, x2) - -inst_34856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42800003; valaddr_reg:x3; val_offset:104568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104568*FLEN/8, x4, x1, x2) - -inst_34857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42800007; valaddr_reg:x3; val_offset:104571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104571*FLEN/8, x4, x1, x2) - -inst_34858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x4280000f; valaddr_reg:x3; val_offset:104574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104574*FLEN/8, x4, x1, x2) - -inst_34859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x4280001f; valaddr_reg:x3; val_offset:104577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104577*FLEN/8, x4, x1, x2) - -inst_34860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x4280003f; valaddr_reg:x3; val_offset:104580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104580*FLEN/8, x4, x1, x2) - -inst_34861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x4280007f; valaddr_reg:x3; val_offset:104583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104583*FLEN/8, x4, x1, x2) - -inst_34862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x428000ff; valaddr_reg:x3; val_offset:104586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104586*FLEN/8, x4, x1, x2) - -inst_34863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x428001ff; valaddr_reg:x3; val_offset:104589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104589*FLEN/8, x4, x1, x2) - -inst_34864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x428003ff; valaddr_reg:x3; val_offset:104592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104592*FLEN/8, x4, x1, x2) - -inst_34865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x428007ff; valaddr_reg:x3; val_offset:104595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104595*FLEN/8, x4, x1, x2) - -inst_34866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42800fff; valaddr_reg:x3; val_offset:104598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104598*FLEN/8, x4, x1, x2) - -inst_34867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42801fff; valaddr_reg:x3; val_offset:104601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104601*FLEN/8, x4, x1, x2) - -inst_34868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42803fff; valaddr_reg:x3; val_offset:104604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104604*FLEN/8, x4, x1, x2) - -inst_34869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42807fff; valaddr_reg:x3; val_offset:104607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104607*FLEN/8, x4, x1, x2) - -inst_34870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x4280ffff; valaddr_reg:x3; val_offset:104610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104610*FLEN/8, x4, x1, x2) - -inst_34871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x4281ffff; valaddr_reg:x3; val_offset:104613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104613*FLEN/8, x4, x1, x2) - -inst_34872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x4283ffff; valaddr_reg:x3; val_offset:104616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104616*FLEN/8, x4, x1, x2) - -inst_34873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x4287ffff; valaddr_reg:x3; val_offset:104619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104619*FLEN/8, x4, x1, x2) - -inst_34874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x428fffff; valaddr_reg:x3; val_offset:104622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104622*FLEN/8, x4, x1, x2) - -inst_34875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x429fffff; valaddr_reg:x3; val_offset:104625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104625*FLEN/8, x4, x1, x2) - -inst_34876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42bfffff; valaddr_reg:x3; val_offset:104628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104628*FLEN/8, x4, x1, x2) - -inst_34877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42c00000; valaddr_reg:x3; val_offset:104631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104631*FLEN/8, x4, x1, x2) - -inst_34878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42e00000; valaddr_reg:x3; val_offset:104634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104634*FLEN/8, x4, x1, x2) - -inst_34879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42f00000; valaddr_reg:x3; val_offset:104637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104637*FLEN/8, x4, x1, x2) - -inst_34880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42f80000; valaddr_reg:x3; val_offset:104640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104640*FLEN/8, x4, x1, x2) - -inst_34881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fc0000; valaddr_reg:x3; val_offset:104643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104643*FLEN/8, x4, x1, x2) - -inst_34882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fe0000; valaddr_reg:x3; val_offset:104646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104646*FLEN/8, x4, x1, x2) - -inst_34883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ff0000; valaddr_reg:x3; val_offset:104649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104649*FLEN/8, x4, x1, x2) - -inst_34884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ff8000; valaddr_reg:x3; val_offset:104652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104652*FLEN/8, x4, x1, x2) - -inst_34885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ffc000; valaddr_reg:x3; val_offset:104655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104655*FLEN/8, x4, x1, x2) - -inst_34886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ffe000; valaddr_reg:x3; val_offset:104658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104658*FLEN/8, x4, x1, x2) - -inst_34887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fff000; valaddr_reg:x3; val_offset:104661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104661*FLEN/8, x4, x1, x2) - -inst_34888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fff800; valaddr_reg:x3; val_offset:104664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104664*FLEN/8, x4, x1, x2) - -inst_34889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fffc00; valaddr_reg:x3; val_offset:104667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104667*FLEN/8, x4, x1, x2) - -inst_34890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fffe00; valaddr_reg:x3; val_offset:104670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104670*FLEN/8, x4, x1, x2) - -inst_34891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ffff00; valaddr_reg:x3; val_offset:104673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104673*FLEN/8, x4, x1, x2) - -inst_34892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ffff80; valaddr_reg:x3; val_offset:104676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104676*FLEN/8, x4, x1, x2) - -inst_34893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ffffc0; valaddr_reg:x3; val_offset:104679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104679*FLEN/8, x4, x1, x2) - -inst_34894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ffffe0; valaddr_reg:x3; val_offset:104682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104682*FLEN/8, x4, x1, x2) - -inst_34895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fffff0; valaddr_reg:x3; val_offset:104685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104685*FLEN/8, x4, x1, x2) - -inst_34896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fffff8; valaddr_reg:x3; val_offset:104688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104688*FLEN/8, x4, x1, x2) - -inst_34897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fffffc; valaddr_reg:x3; val_offset:104691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104691*FLEN/8, x4, x1, x2) - -inst_34898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42fffffe; valaddr_reg:x3; val_offset:104694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104694*FLEN/8, x4, x1, x2) - -inst_34899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; -op3val:0x42ffffff; valaddr_reg:x3; val_offset:104697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104697*FLEN/8, x4, x1, x2) - -inst_34900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad800000; valaddr_reg:x3; val_offset:104700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104700*FLEN/8, x4, x1, x2) - -inst_34901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad800001; valaddr_reg:x3; val_offset:104703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104703*FLEN/8, x4, x1, x2) - -inst_34902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad800003; valaddr_reg:x3; val_offset:104706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104706*FLEN/8, x4, x1, x2) - -inst_34903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad800007; valaddr_reg:x3; val_offset:104709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104709*FLEN/8, x4, x1, x2) - -inst_34904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad80000f; valaddr_reg:x3; val_offset:104712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104712*FLEN/8, x4, x1, x2) - -inst_34905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad80001f; valaddr_reg:x3; val_offset:104715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104715*FLEN/8, x4, x1, x2) - -inst_34906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad80003f; valaddr_reg:x3; val_offset:104718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104718*FLEN/8, x4, x1, x2) - -inst_34907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad80007f; valaddr_reg:x3; val_offset:104721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104721*FLEN/8, x4, x1, x2) - -inst_34908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad8000ff; valaddr_reg:x3; val_offset:104724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104724*FLEN/8, x4, x1, x2) - -inst_34909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad8001ff; valaddr_reg:x3; val_offset:104727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104727*FLEN/8, x4, x1, x2) - -inst_34910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad8003ff; valaddr_reg:x3; val_offset:104730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104730*FLEN/8, x4, x1, x2) - -inst_34911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad8007ff; valaddr_reg:x3; val_offset:104733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104733*FLEN/8, x4, x1, x2) - -inst_34912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad800fff; valaddr_reg:x3; val_offset:104736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104736*FLEN/8, x4, x1, x2) - -inst_34913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad801fff; valaddr_reg:x3; val_offset:104739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104739*FLEN/8, x4, x1, x2) - -inst_34914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad803fff; valaddr_reg:x3; val_offset:104742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104742*FLEN/8, x4, x1, x2) - -inst_34915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad807fff; valaddr_reg:x3; val_offset:104745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104745*FLEN/8, x4, x1, x2) - -inst_34916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad80ffff; valaddr_reg:x3; val_offset:104748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104748*FLEN/8, x4, x1, x2) - -inst_34917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad81ffff; valaddr_reg:x3; val_offset:104751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104751*FLEN/8, x4, x1, x2) - -inst_34918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad83ffff; valaddr_reg:x3; val_offset:104754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104754*FLEN/8, x4, x1, x2) - -inst_34919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad87ffff; valaddr_reg:x3; val_offset:104757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104757*FLEN/8, x4, x1, x2) - -inst_34920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad8fffff; valaddr_reg:x3; val_offset:104760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104760*FLEN/8, x4, x1, x2) - -inst_34921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xad9fffff; valaddr_reg:x3; val_offset:104763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104763*FLEN/8, x4, x1, x2) - -inst_34922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadbfffff; valaddr_reg:x3; val_offset:104766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104766*FLEN/8, x4, x1, x2) - -inst_34923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadc00000; valaddr_reg:x3; val_offset:104769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104769*FLEN/8, x4, x1, x2) - -inst_34924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xade00000; valaddr_reg:x3; val_offset:104772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104772*FLEN/8, x4, x1, x2) - -inst_34925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadf00000; valaddr_reg:x3; val_offset:104775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104775*FLEN/8, x4, x1, x2) - -inst_34926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadf80000; valaddr_reg:x3; val_offset:104778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104778*FLEN/8, x4, x1, x2) - -inst_34927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfc0000; valaddr_reg:x3; val_offset:104781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104781*FLEN/8, x4, x1, x2) - -inst_34928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfe0000; valaddr_reg:x3; val_offset:104784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104784*FLEN/8, x4, x1, x2) - -inst_34929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadff0000; valaddr_reg:x3; val_offset:104787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104787*FLEN/8, x4, x1, x2) - -inst_34930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadff8000; valaddr_reg:x3; val_offset:104790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104790*FLEN/8, x4, x1, x2) - -inst_34931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadffc000; valaddr_reg:x3; val_offset:104793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104793*FLEN/8, x4, x1, x2) - -inst_34932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadffe000; valaddr_reg:x3; val_offset:104796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104796*FLEN/8, x4, x1, x2) - -inst_34933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfff000; valaddr_reg:x3; val_offset:104799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104799*FLEN/8, x4, x1, x2) - -inst_34934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfff800; valaddr_reg:x3; val_offset:104802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104802*FLEN/8, x4, x1, x2) - -inst_34935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfffc00; valaddr_reg:x3; val_offset:104805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104805*FLEN/8, x4, x1, x2) - -inst_34936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfffe00; valaddr_reg:x3; val_offset:104808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104808*FLEN/8, x4, x1, x2) - -inst_34937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadffff00; valaddr_reg:x3; val_offset:104811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104811*FLEN/8, x4, x1, x2) - -inst_34938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadffff80; valaddr_reg:x3; val_offset:104814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104814*FLEN/8, x4, x1, x2) - -inst_34939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadffffc0; valaddr_reg:x3; val_offset:104817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104817*FLEN/8, x4, x1, x2) - -inst_34940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadffffe0; valaddr_reg:x3; val_offset:104820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104820*FLEN/8, x4, x1, x2) - -inst_34941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfffff0; valaddr_reg:x3; val_offset:104823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104823*FLEN/8, x4, x1, x2) - -inst_34942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfffff8; valaddr_reg:x3; val_offset:104826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104826*FLEN/8, x4, x1, x2) - -inst_34943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfffffc; valaddr_reg:x3; val_offset:104829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104829*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_274) - -inst_34944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadfffffe; valaddr_reg:x3; val_offset:104832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104832*FLEN/8, x4, x1, x2) - -inst_34945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xadffffff; valaddr_reg:x3; val_offset:104835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104835*FLEN/8, x4, x1, x2) - -inst_34946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbf800001; valaddr_reg:x3; val_offset:104838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104838*FLEN/8, x4, x1, x2) - -inst_34947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbf800003; valaddr_reg:x3; val_offset:104841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104841*FLEN/8, x4, x1, x2) - -inst_34948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbf800007; valaddr_reg:x3; val_offset:104844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104844*FLEN/8, x4, x1, x2) - -inst_34949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbf999999; valaddr_reg:x3; val_offset:104847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104847*FLEN/8, x4, x1, x2) - -inst_34950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:104850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104850*FLEN/8, x4, x1, x2) - -inst_34951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:104853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104853*FLEN/8, x4, x1, x2) - -inst_34952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:104856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104856*FLEN/8, x4, x1, x2) - -inst_34953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:104859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104859*FLEN/8, x4, x1, x2) - -inst_34954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:104862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104862*FLEN/8, x4, x1, x2) - -inst_34955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:104865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104865*FLEN/8, x4, x1, x2) - -inst_34956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:104868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104868*FLEN/8, x4, x1, x2) - -inst_34957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:104871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104871*FLEN/8, x4, x1, x2) - -inst_34958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:104874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104874*FLEN/8, x4, x1, x2) - -inst_34959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:104877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104877*FLEN/8, x4, x1, x2) - -inst_34960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:104880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104880*FLEN/8, x4, x1, x2) - -inst_34961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:104883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104883*FLEN/8, x4, x1, x2) - -inst_34962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:104886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104886*FLEN/8, x4, x1, x2) - -inst_34963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:104889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104889*FLEN/8, x4, x1, x2) - -inst_34964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:104892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104892*FLEN/8, x4, x1, x2) - -inst_34965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:104895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104895*FLEN/8, x4, x1, x2) - -inst_34966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:104898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104898*FLEN/8, x4, x1, x2) - -inst_34967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:104901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104901*FLEN/8, x4, x1, x2) - -inst_34968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:104904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104904*FLEN/8, x4, x1, x2) - -inst_34969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:104907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104907*FLEN/8, x4, x1, x2) - -inst_34970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:104910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104910*FLEN/8, x4, x1, x2) - -inst_34971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:104913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104913*FLEN/8, x4, x1, x2) - -inst_34972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:104916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104916*FLEN/8, x4, x1, x2) - -inst_34973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:104919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104919*FLEN/8, x4, x1, x2) - -inst_34974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:104922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104922*FLEN/8, x4, x1, x2) - -inst_34975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:104925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104925*FLEN/8, x4, x1, x2) - -inst_34976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:104928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104928*FLEN/8, x4, x1, x2) - -inst_34977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:104931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104931*FLEN/8, x4, x1, x2) - -inst_34978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7000000; valaddr_reg:x3; val_offset:104934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104934*FLEN/8, x4, x1, x2) - -inst_34979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7000001; valaddr_reg:x3; val_offset:104937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104937*FLEN/8, x4, x1, x2) - -inst_34980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7000003; valaddr_reg:x3; val_offset:104940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104940*FLEN/8, x4, x1, x2) - -inst_34981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7000007; valaddr_reg:x3; val_offset:104943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104943*FLEN/8, x4, x1, x2) - -inst_34982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x700000f; valaddr_reg:x3; val_offset:104946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104946*FLEN/8, x4, x1, x2) - -inst_34983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x700001f; valaddr_reg:x3; val_offset:104949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104949*FLEN/8, x4, x1, x2) - -inst_34984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x700003f; valaddr_reg:x3; val_offset:104952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104952*FLEN/8, x4, x1, x2) - -inst_34985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x700007f; valaddr_reg:x3; val_offset:104955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104955*FLEN/8, x4, x1, x2) - -inst_34986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x70000ff; valaddr_reg:x3; val_offset:104958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104958*FLEN/8, x4, x1, x2) - -inst_34987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x70001ff; valaddr_reg:x3; val_offset:104961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104961*FLEN/8, x4, x1, x2) - -inst_34988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x70003ff; valaddr_reg:x3; val_offset:104964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104964*FLEN/8, x4, x1, x2) - -inst_34989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x70007ff; valaddr_reg:x3; val_offset:104967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104967*FLEN/8, x4, x1, x2) - -inst_34990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7000fff; valaddr_reg:x3; val_offset:104970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104970*FLEN/8, x4, x1, x2) - -inst_34991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7001fff; valaddr_reg:x3; val_offset:104973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104973*FLEN/8, x4, x1, x2) - -inst_34992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7003fff; valaddr_reg:x3; val_offset:104976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104976*FLEN/8, x4, x1, x2) - -inst_34993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7007fff; valaddr_reg:x3; val_offset:104979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104979*FLEN/8, x4, x1, x2) - -inst_34994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x700ffff; valaddr_reg:x3; val_offset:104982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104982*FLEN/8, x4, x1, x2) - -inst_34995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x701ffff; valaddr_reg:x3; val_offset:104985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104985*FLEN/8, x4, x1, x2) - -inst_34996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x703ffff; valaddr_reg:x3; val_offset:104988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104988*FLEN/8, x4, x1, x2) - -inst_34997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x707ffff; valaddr_reg:x3; val_offset:104991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104991*FLEN/8, x4, x1, x2) - -inst_34998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x70fffff; valaddr_reg:x3; val_offset:104994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104994*FLEN/8, x4, x1, x2) - -inst_34999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x71fffff; valaddr_reg:x3; val_offset:104997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104997*FLEN/8, x4, x1, x2) - -inst_35000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x73fffff; valaddr_reg:x3; val_offset:105000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105000*FLEN/8, x4, x1, x2) - -inst_35001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7400000; valaddr_reg:x3; val_offset:105003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105003*FLEN/8, x4, x1, x2) - -inst_35002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7600000; valaddr_reg:x3; val_offset:105006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105006*FLEN/8, x4, x1, x2) - -inst_35003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7700000; valaddr_reg:x3; val_offset:105009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105009*FLEN/8, x4, x1, x2) - -inst_35004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x7780000; valaddr_reg:x3; val_offset:105012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105012*FLEN/8, x4, x1, x2) - -inst_35005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77c0000; valaddr_reg:x3; val_offset:105015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105015*FLEN/8, x4, x1, x2) - -inst_35006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77e0000; valaddr_reg:x3; val_offset:105018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105018*FLEN/8, x4, x1, x2) - -inst_35007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77f0000; valaddr_reg:x3; val_offset:105021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105021*FLEN/8, x4, x1, x2) - -inst_35008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77f8000; valaddr_reg:x3; val_offset:105024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105024*FLEN/8, x4, x1, x2) - -inst_35009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77fc000; valaddr_reg:x3; val_offset:105027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105027*FLEN/8, x4, x1, x2) - -inst_35010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77fe000; valaddr_reg:x3; val_offset:105030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105030*FLEN/8, x4, x1, x2) - -inst_35011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77ff000; valaddr_reg:x3; val_offset:105033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105033*FLEN/8, x4, x1, x2) - -inst_35012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77ff800; valaddr_reg:x3; val_offset:105036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105036*FLEN/8, x4, x1, x2) - -inst_35013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77ffc00; valaddr_reg:x3; val_offset:105039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105039*FLEN/8, x4, x1, x2) - -inst_35014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77ffe00; valaddr_reg:x3; val_offset:105042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105042*FLEN/8, x4, x1, x2) - -inst_35015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77fff00; valaddr_reg:x3; val_offset:105045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105045*FLEN/8, x4, x1, x2) - -inst_35016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77fff80; valaddr_reg:x3; val_offset:105048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105048*FLEN/8, x4, x1, x2) - -inst_35017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77fffc0; valaddr_reg:x3; val_offset:105051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105051*FLEN/8, x4, x1, x2) - -inst_35018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77fffe0; valaddr_reg:x3; val_offset:105054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105054*FLEN/8, x4, x1, x2) - -inst_35019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77ffff0; valaddr_reg:x3; val_offset:105057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105057*FLEN/8, x4, x1, x2) - -inst_35020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77ffff8; valaddr_reg:x3; val_offset:105060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105060*FLEN/8, x4, x1, x2) - -inst_35021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77ffffc; valaddr_reg:x3; val_offset:105063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105063*FLEN/8, x4, x1, x2) - -inst_35022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77ffffe; valaddr_reg:x3; val_offset:105066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105066*FLEN/8, x4, x1, x2) - -inst_35023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; -op3val:0x77fffff; valaddr_reg:x3; val_offset:105069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105069*FLEN/8, x4, x1, x2) - -inst_35024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8000000; valaddr_reg:x3; val_offset:105072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105072*FLEN/8, x4, x1, x2) - -inst_35025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8000001; valaddr_reg:x3; val_offset:105075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105075*FLEN/8, x4, x1, x2) - -inst_35026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8000003; valaddr_reg:x3; val_offset:105078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105078*FLEN/8, x4, x1, x2) - -inst_35027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8000007; valaddr_reg:x3; val_offset:105081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105081*FLEN/8, x4, x1, x2) - -inst_35028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf800000f; valaddr_reg:x3; val_offset:105084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105084*FLEN/8, x4, x1, x2) - -inst_35029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf800001f; valaddr_reg:x3; val_offset:105087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105087*FLEN/8, x4, x1, x2) - -inst_35030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf800003f; valaddr_reg:x3; val_offset:105090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105090*FLEN/8, x4, x1, x2) - -inst_35031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf800007f; valaddr_reg:x3; val_offset:105093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105093*FLEN/8, x4, x1, x2) - -inst_35032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf80000ff; valaddr_reg:x3; val_offset:105096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105096*FLEN/8, x4, x1, x2) - -inst_35033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf80001ff; valaddr_reg:x3; val_offset:105099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105099*FLEN/8, x4, x1, x2) - -inst_35034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf80003ff; valaddr_reg:x3; val_offset:105102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105102*FLEN/8, x4, x1, x2) - -inst_35035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf80007ff; valaddr_reg:x3; val_offset:105105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105105*FLEN/8, x4, x1, x2) - -inst_35036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8000fff; valaddr_reg:x3; val_offset:105108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105108*FLEN/8, x4, x1, x2) - -inst_35037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8001fff; valaddr_reg:x3; val_offset:105111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105111*FLEN/8, x4, x1, x2) - -inst_35038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8003fff; valaddr_reg:x3; val_offset:105114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105114*FLEN/8, x4, x1, x2) - -inst_35039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8007fff; valaddr_reg:x3; val_offset:105117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105117*FLEN/8, x4, x1, x2) - -inst_35040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf800ffff; valaddr_reg:x3; val_offset:105120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105120*FLEN/8, x4, x1, x2) - -inst_35041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf801ffff; valaddr_reg:x3; val_offset:105123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105123*FLEN/8, x4, x1, x2) - -inst_35042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf803ffff; valaddr_reg:x3; val_offset:105126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105126*FLEN/8, x4, x1, x2) - -inst_35043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf807ffff; valaddr_reg:x3; val_offset:105129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105129*FLEN/8, x4, x1, x2) - -inst_35044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf80fffff; valaddr_reg:x3; val_offset:105132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105132*FLEN/8, x4, x1, x2) - -inst_35045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf81fffff; valaddr_reg:x3; val_offset:105135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105135*FLEN/8, x4, x1, x2) - -inst_35046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf83fffff; valaddr_reg:x3; val_offset:105138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105138*FLEN/8, x4, x1, x2) - -inst_35047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8400000; valaddr_reg:x3; val_offset:105141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105141*FLEN/8, x4, x1, x2) - -inst_35048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8600000; valaddr_reg:x3; val_offset:105144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105144*FLEN/8, x4, x1, x2) - -inst_35049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8700000; valaddr_reg:x3; val_offset:105147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105147*FLEN/8, x4, x1, x2) - -inst_35050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf8780000; valaddr_reg:x3; val_offset:105150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105150*FLEN/8, x4, x1, x2) - -inst_35051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87c0000; valaddr_reg:x3; val_offset:105153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105153*FLEN/8, x4, x1, x2) - -inst_35052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87e0000; valaddr_reg:x3; val_offset:105156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105156*FLEN/8, x4, x1, x2) - -inst_35053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87f0000; valaddr_reg:x3; val_offset:105159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105159*FLEN/8, x4, x1, x2) - -inst_35054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87f8000; valaddr_reg:x3; val_offset:105162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105162*FLEN/8, x4, x1, x2) - -inst_35055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87fc000; valaddr_reg:x3; val_offset:105165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105165*FLEN/8, x4, x1, x2) - -inst_35056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87fe000; valaddr_reg:x3; val_offset:105168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105168*FLEN/8, x4, x1, x2) - -inst_35057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87ff000; valaddr_reg:x3; val_offset:105171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105171*FLEN/8, x4, x1, x2) - -inst_35058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87ff800; valaddr_reg:x3; val_offset:105174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105174*FLEN/8, x4, x1, x2) - -inst_35059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87ffc00; valaddr_reg:x3; val_offset:105177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105177*FLEN/8, x4, x1, x2) - -inst_35060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87ffe00; valaddr_reg:x3; val_offset:105180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105180*FLEN/8, x4, x1, x2) - -inst_35061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87fff00; valaddr_reg:x3; val_offset:105183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105183*FLEN/8, x4, x1, x2) - -inst_35062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87fff80; valaddr_reg:x3; val_offset:105186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105186*FLEN/8, x4, x1, x2) - -inst_35063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87fffc0; valaddr_reg:x3; val_offset:105189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105189*FLEN/8, x4, x1, x2) - -inst_35064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87fffe0; valaddr_reg:x3; val_offset:105192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105192*FLEN/8, x4, x1, x2) - -inst_35065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87ffff0; valaddr_reg:x3; val_offset:105195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105195*FLEN/8, x4, x1, x2) - -inst_35066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87ffff8; valaddr_reg:x3; val_offset:105198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105198*FLEN/8, x4, x1, x2) - -inst_35067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87ffffc; valaddr_reg:x3; val_offset:105201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105201*FLEN/8, x4, x1, x2) - -inst_35068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87ffffe; valaddr_reg:x3; val_offset:105204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105204*FLEN/8, x4, x1, x2) - -inst_35069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xf87fffff; valaddr_reg:x3; val_offset:105207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105207*FLEN/8, x4, x1, x2) - -inst_35070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff000001; valaddr_reg:x3; val_offset:105210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105210*FLEN/8, x4, x1, x2) - -inst_35071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff000003; valaddr_reg:x3; val_offset:105213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105213*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_275) - -inst_35072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff000007; valaddr_reg:x3; val_offset:105216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105216*FLEN/8, x4, x1, x2) - -inst_35073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff199999; valaddr_reg:x3; val_offset:105219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105219*FLEN/8, x4, x1, x2) - -inst_35074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff249249; valaddr_reg:x3; val_offset:105222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105222*FLEN/8, x4, x1, x2) - -inst_35075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff333333; valaddr_reg:x3; val_offset:105225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105225*FLEN/8, x4, x1, x2) - -inst_35076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:105228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105228*FLEN/8, x4, x1, x2) - -inst_35077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:105231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105231*FLEN/8, x4, x1, x2) - -inst_35078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff444444; valaddr_reg:x3; val_offset:105234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105234*FLEN/8, x4, x1, x2) - -inst_35079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:105237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105237*FLEN/8, x4, x1, x2) - -inst_35080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:105240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105240*FLEN/8, x4, x1, x2) - -inst_35081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff666666; valaddr_reg:x3; val_offset:105243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105243*FLEN/8, x4, x1, x2) - -inst_35082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:105246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105246*FLEN/8, x4, x1, x2) - -inst_35083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:105249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105249*FLEN/8, x4, x1, x2) - -inst_35084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:105252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105252*FLEN/8, x4, x1, x2) - -inst_35085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:105255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105255*FLEN/8, x4, x1, x2) - -inst_35086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:105258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105258*FLEN/8, x4, x1, x2) - -inst_35087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:105261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105261*FLEN/8, x4, x1, x2) - -inst_35088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:105264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105264*FLEN/8, x4, x1, x2) - -inst_35089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:105267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105267*FLEN/8, x4, x1, x2) - -inst_35090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:105270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105270*FLEN/8, x4, x1, x2) - -inst_35091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:105273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105273*FLEN/8, x4, x1, x2) - -inst_35092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:105276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105276*FLEN/8, x4, x1, x2) - -inst_35093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:105279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105279*FLEN/8, x4, x1, x2) - -inst_35094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:105282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105282*FLEN/8, x4, x1, x2) - -inst_35095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:105285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105285*FLEN/8, x4, x1, x2) - -inst_35096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:105288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105288*FLEN/8, x4, x1, x2) - -inst_35097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:105291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105291*FLEN/8, x4, x1, x2) - -inst_35098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:105294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105294*FLEN/8, x4, x1, x2) - -inst_35099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:105297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105297*FLEN/8, x4, x1, x2) - -inst_35100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:105300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105300*FLEN/8, x4, x1, x2) - -inst_35101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:105303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105303*FLEN/8, x4, x1, x2) - -inst_35102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10800000; valaddr_reg:x3; val_offset:105306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105306*FLEN/8, x4, x1, x2) - -inst_35103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10800001; valaddr_reg:x3; val_offset:105309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105309*FLEN/8, x4, x1, x2) - -inst_35104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10800003; valaddr_reg:x3; val_offset:105312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105312*FLEN/8, x4, x1, x2) - -inst_35105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10800007; valaddr_reg:x3; val_offset:105315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105315*FLEN/8, x4, x1, x2) - -inst_35106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x1080000f; valaddr_reg:x3; val_offset:105318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105318*FLEN/8, x4, x1, x2) - -inst_35107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x1080001f; valaddr_reg:x3; val_offset:105321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105321*FLEN/8, x4, x1, x2) - -inst_35108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x1080003f; valaddr_reg:x3; val_offset:105324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105324*FLEN/8, x4, x1, x2) - -inst_35109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x1080007f; valaddr_reg:x3; val_offset:105327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105327*FLEN/8, x4, x1, x2) - -inst_35110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x108000ff; valaddr_reg:x3; val_offset:105330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105330*FLEN/8, x4, x1, x2) - -inst_35111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x108001ff; valaddr_reg:x3; val_offset:105333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105333*FLEN/8, x4, x1, x2) - -inst_35112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x108003ff; valaddr_reg:x3; val_offset:105336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105336*FLEN/8, x4, x1, x2) - -inst_35113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x108007ff; valaddr_reg:x3; val_offset:105339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105339*FLEN/8, x4, x1, x2) - -inst_35114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10800fff; valaddr_reg:x3; val_offset:105342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105342*FLEN/8, x4, x1, x2) - -inst_35115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10801fff; valaddr_reg:x3; val_offset:105345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105345*FLEN/8, x4, x1, x2) - -inst_35116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10803fff; valaddr_reg:x3; val_offset:105348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105348*FLEN/8, x4, x1, x2) - -inst_35117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10807fff; valaddr_reg:x3; val_offset:105351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105351*FLEN/8, x4, x1, x2) - -inst_35118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x1080ffff; valaddr_reg:x3; val_offset:105354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105354*FLEN/8, x4, x1, x2) - -inst_35119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x1081ffff; valaddr_reg:x3; val_offset:105357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105357*FLEN/8, x4, x1, x2) - -inst_35120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x1083ffff; valaddr_reg:x3; val_offset:105360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105360*FLEN/8, x4, x1, x2) - -inst_35121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x1087ffff; valaddr_reg:x3; val_offset:105363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105363*FLEN/8, x4, x1, x2) - -inst_35122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x108fffff; valaddr_reg:x3; val_offset:105366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105366*FLEN/8, x4, x1, x2) - -inst_35123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x109fffff; valaddr_reg:x3; val_offset:105369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105369*FLEN/8, x4, x1, x2) - -inst_35124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10bfffff; valaddr_reg:x3; val_offset:105372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105372*FLEN/8, x4, x1, x2) - -inst_35125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10c00000; valaddr_reg:x3; val_offset:105375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105375*FLEN/8, x4, x1, x2) - -inst_35126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10e00000; valaddr_reg:x3; val_offset:105378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105378*FLEN/8, x4, x1, x2) - -inst_35127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10f00000; valaddr_reg:x3; val_offset:105381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105381*FLEN/8, x4, x1, x2) - -inst_35128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10f80000; valaddr_reg:x3; val_offset:105384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105384*FLEN/8, x4, x1, x2) - -inst_35129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fc0000; valaddr_reg:x3; val_offset:105387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105387*FLEN/8, x4, x1, x2) - -inst_35130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fe0000; valaddr_reg:x3; val_offset:105390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105390*FLEN/8, x4, x1, x2) - -inst_35131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ff0000; valaddr_reg:x3; val_offset:105393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105393*FLEN/8, x4, x1, x2) - -inst_35132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ff8000; valaddr_reg:x3; val_offset:105396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105396*FLEN/8, x4, x1, x2) - -inst_35133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ffc000; valaddr_reg:x3; val_offset:105399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105399*FLEN/8, x4, x1, x2) - -inst_35134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ffe000; valaddr_reg:x3; val_offset:105402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105402*FLEN/8, x4, x1, x2) - -inst_35135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fff000; valaddr_reg:x3; val_offset:105405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105405*FLEN/8, x4, x1, x2) - -inst_35136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fff800; valaddr_reg:x3; val_offset:105408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105408*FLEN/8, x4, x1, x2) - -inst_35137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fffc00; valaddr_reg:x3; val_offset:105411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105411*FLEN/8, x4, x1, x2) - -inst_35138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fffe00; valaddr_reg:x3; val_offset:105414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105414*FLEN/8, x4, x1, x2) - -inst_35139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ffff00; valaddr_reg:x3; val_offset:105417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105417*FLEN/8, x4, x1, x2) - -inst_35140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ffff80; valaddr_reg:x3; val_offset:105420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105420*FLEN/8, x4, x1, x2) - -inst_35141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ffffc0; valaddr_reg:x3; val_offset:105423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105423*FLEN/8, x4, x1, x2) - -inst_35142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ffffe0; valaddr_reg:x3; val_offset:105426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105426*FLEN/8, x4, x1, x2) - -inst_35143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fffff0; valaddr_reg:x3; val_offset:105429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105429*FLEN/8, x4, x1, x2) - -inst_35144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fffff8; valaddr_reg:x3; val_offset:105432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105432*FLEN/8, x4, x1, x2) - -inst_35145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fffffc; valaddr_reg:x3; val_offset:105435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105435*FLEN/8, x4, x1, x2) - -inst_35146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10fffffe; valaddr_reg:x3; val_offset:105438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105438*FLEN/8, x4, x1, x2) - -inst_35147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; -op3val:0x10ffffff; valaddr_reg:x3; val_offset:105441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105441*FLEN/8, x4, x1, x2) - -inst_35148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe800000; valaddr_reg:x3; val_offset:105444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105444*FLEN/8, x4, x1, x2) - -inst_35149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe800001; valaddr_reg:x3; val_offset:105447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105447*FLEN/8, x4, x1, x2) - -inst_35150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe800003; valaddr_reg:x3; val_offset:105450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105450*FLEN/8, x4, x1, x2) - -inst_35151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe800007; valaddr_reg:x3; val_offset:105453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105453*FLEN/8, x4, x1, x2) - -inst_35152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe80000f; valaddr_reg:x3; val_offset:105456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105456*FLEN/8, x4, x1, x2) - -inst_35153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe80001f; valaddr_reg:x3; val_offset:105459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105459*FLEN/8, x4, x1, x2) - -inst_35154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe80003f; valaddr_reg:x3; val_offset:105462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105462*FLEN/8, x4, x1, x2) - -inst_35155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe80007f; valaddr_reg:x3; val_offset:105465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105465*FLEN/8, x4, x1, x2) - -inst_35156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe8000ff; valaddr_reg:x3; val_offset:105468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105468*FLEN/8, x4, x1, x2) - -inst_35157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe8001ff; valaddr_reg:x3; val_offset:105471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105471*FLEN/8, x4, x1, x2) - -inst_35158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe8003ff; valaddr_reg:x3; val_offset:105474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105474*FLEN/8, x4, x1, x2) - -inst_35159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe8007ff; valaddr_reg:x3; val_offset:105477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105477*FLEN/8, x4, x1, x2) - -inst_35160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe800fff; valaddr_reg:x3; val_offset:105480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105480*FLEN/8, x4, x1, x2) - -inst_35161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe801fff; valaddr_reg:x3; val_offset:105483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105483*FLEN/8, x4, x1, x2) - -inst_35162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe803fff; valaddr_reg:x3; val_offset:105486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105486*FLEN/8, x4, x1, x2) - -inst_35163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe807fff; valaddr_reg:x3; val_offset:105489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105489*FLEN/8, x4, x1, x2) - -inst_35164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe80ffff; valaddr_reg:x3; val_offset:105492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105492*FLEN/8, x4, x1, x2) - -inst_35165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe81ffff; valaddr_reg:x3; val_offset:105495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105495*FLEN/8, x4, x1, x2) - -inst_35166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe83ffff; valaddr_reg:x3; val_offset:105498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105498*FLEN/8, x4, x1, x2) - -inst_35167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe87ffff; valaddr_reg:x3; val_offset:105501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105501*FLEN/8, x4, x1, x2) - -inst_35168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe8fffff; valaddr_reg:x3; val_offset:105504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105504*FLEN/8, x4, x1, x2) - -inst_35169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbe9fffff; valaddr_reg:x3; val_offset:105507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105507*FLEN/8, x4, x1, x2) - -inst_35170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbebfffff; valaddr_reg:x3; val_offset:105510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105510*FLEN/8, x4, x1, x2) - -inst_35171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbec00000; valaddr_reg:x3; val_offset:105513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105513*FLEN/8, x4, x1, x2) - -inst_35172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbee00000; valaddr_reg:x3; val_offset:105516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105516*FLEN/8, x4, x1, x2) - -inst_35173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbef00000; valaddr_reg:x3; val_offset:105519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105519*FLEN/8, x4, x1, x2) - -inst_35174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbef80000; valaddr_reg:x3; val_offset:105522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105522*FLEN/8, x4, x1, x2) - -inst_35175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefc0000; valaddr_reg:x3; val_offset:105525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105525*FLEN/8, x4, x1, x2) - -inst_35176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefe0000; valaddr_reg:x3; val_offset:105528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105528*FLEN/8, x4, x1, x2) - -inst_35177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeff0000; valaddr_reg:x3; val_offset:105531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105531*FLEN/8, x4, x1, x2) - -inst_35178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeff8000; valaddr_reg:x3; val_offset:105534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105534*FLEN/8, x4, x1, x2) - -inst_35179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeffc000; valaddr_reg:x3; val_offset:105537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105537*FLEN/8, x4, x1, x2) - -inst_35180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeffe000; valaddr_reg:x3; val_offset:105540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105540*FLEN/8, x4, x1, x2) - -inst_35181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefff000; valaddr_reg:x3; val_offset:105543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105543*FLEN/8, x4, x1, x2) - -inst_35182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefff800; valaddr_reg:x3; val_offset:105546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105546*FLEN/8, x4, x1, x2) - -inst_35183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefffc00; valaddr_reg:x3; val_offset:105549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105549*FLEN/8, x4, x1, x2) - -inst_35184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefffe00; valaddr_reg:x3; val_offset:105552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105552*FLEN/8, x4, x1, x2) - -inst_35185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeffff00; valaddr_reg:x3; val_offset:105555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105555*FLEN/8, x4, x1, x2) - -inst_35186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeffff80; valaddr_reg:x3; val_offset:105558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105558*FLEN/8, x4, x1, x2) - -inst_35187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeffffc0; valaddr_reg:x3; val_offset:105561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105561*FLEN/8, x4, x1, x2) - -inst_35188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeffffe0; valaddr_reg:x3; val_offset:105564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105564*FLEN/8, x4, x1, x2) - -inst_35189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefffff0; valaddr_reg:x3; val_offset:105567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105567*FLEN/8, x4, x1, x2) - -inst_35190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefffff8; valaddr_reg:x3; val_offset:105570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105570*FLEN/8, x4, x1, x2) - -inst_35191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefffffc; valaddr_reg:x3; val_offset:105573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105573*FLEN/8, x4, x1, x2) - -inst_35192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbefffffe; valaddr_reg:x3; val_offset:105576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105576*FLEN/8, x4, x1, x2) - -inst_35193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbeffffff; valaddr_reg:x3; val_offset:105579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105579*FLEN/8, x4, x1, x2) - -inst_35194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbf800001; valaddr_reg:x3; val_offset:105582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105582*FLEN/8, x4, x1, x2) - -inst_35195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbf800003; valaddr_reg:x3; val_offset:105585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105585*FLEN/8, x4, x1, x2) - -inst_35196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbf800007; valaddr_reg:x3; val_offset:105588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105588*FLEN/8, x4, x1, x2) - -inst_35197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbf999999; valaddr_reg:x3; val_offset:105591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105591*FLEN/8, x4, x1, x2) - -inst_35198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:105594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105594*FLEN/8, x4, x1, x2) - -inst_35199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:105597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105597*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_276) - -inst_35200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:105600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105600*FLEN/8, x4, x1, x2) - -inst_35201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:105603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105603*FLEN/8, x4, x1, x2) - -inst_35202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:105606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105606*FLEN/8, x4, x1, x2) - -inst_35203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:105609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105609*FLEN/8, x4, x1, x2) - -inst_35204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:105612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105612*FLEN/8, x4, x1, x2) - -inst_35205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:105615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105615*FLEN/8, x4, x1, x2) - -inst_35206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:105618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105618*FLEN/8, x4, x1, x2) - -inst_35207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:105621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105621*FLEN/8, x4, x1, x2) - -inst_35208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:105624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105624*FLEN/8, x4, x1, x2) - -inst_35209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:105627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105627*FLEN/8, x4, x1, x2) - -inst_35210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:105630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105630*FLEN/8, x4, x1, x2) - -inst_35211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:105633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105633*FLEN/8, x4, x1, x2) - -inst_35212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:105636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105636*FLEN/8, x4, x1, x2) - -inst_35213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:105639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105639*FLEN/8, x4, x1, x2) - -inst_35214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:105642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105642*FLEN/8, x4, x1, x2) - -inst_35215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:105645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105645*FLEN/8, x4, x1, x2) - -inst_35216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:105648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105648*FLEN/8, x4, x1, x2) - -inst_35217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:105651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105651*FLEN/8, x4, x1, x2) - -inst_35218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:105654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105654*FLEN/8, x4, x1, x2) - -inst_35219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:105657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105657*FLEN/8, x4, x1, x2) - -inst_35220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:105660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105660*FLEN/8, x4, x1, x2) - -inst_35221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:105663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105663*FLEN/8, x4, x1, x2) - -inst_35222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:105666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105666*FLEN/8, x4, x1, x2) - -inst_35223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:105669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105669*FLEN/8, x4, x1, x2) - -inst_35224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:105672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105672*FLEN/8, x4, x1, x2) - -inst_35225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:105675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105675*FLEN/8, x4, x1, x2) - -inst_35226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10000000; valaddr_reg:x3; val_offset:105678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105678*FLEN/8, x4, x1, x2) - -inst_35227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10000001; valaddr_reg:x3; val_offset:105681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105681*FLEN/8, x4, x1, x2) - -inst_35228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10000003; valaddr_reg:x3; val_offset:105684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105684*FLEN/8, x4, x1, x2) - -inst_35229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10000007; valaddr_reg:x3; val_offset:105687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105687*FLEN/8, x4, x1, x2) - -inst_35230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1000000f; valaddr_reg:x3; val_offset:105690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105690*FLEN/8, x4, x1, x2) - -inst_35231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1000001f; valaddr_reg:x3; val_offset:105693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105693*FLEN/8, x4, x1, x2) - -inst_35232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1000003f; valaddr_reg:x3; val_offset:105696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105696*FLEN/8, x4, x1, x2) - -inst_35233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1000007f; valaddr_reg:x3; val_offset:105699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105699*FLEN/8, x4, x1, x2) - -inst_35234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x100000ff; valaddr_reg:x3; val_offset:105702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105702*FLEN/8, x4, x1, x2) - -inst_35235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x100001ff; valaddr_reg:x3; val_offset:105705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105705*FLEN/8, x4, x1, x2) - -inst_35236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x100003ff; valaddr_reg:x3; val_offset:105708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105708*FLEN/8, x4, x1, x2) - -inst_35237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x100007ff; valaddr_reg:x3; val_offset:105711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105711*FLEN/8, x4, x1, x2) - -inst_35238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10000fff; valaddr_reg:x3; val_offset:105714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105714*FLEN/8, x4, x1, x2) - -inst_35239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10001fff; valaddr_reg:x3; val_offset:105717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105717*FLEN/8, x4, x1, x2) - -inst_35240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10003fff; valaddr_reg:x3; val_offset:105720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105720*FLEN/8, x4, x1, x2) - -inst_35241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10007fff; valaddr_reg:x3; val_offset:105723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105723*FLEN/8, x4, x1, x2) - -inst_35242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1000ffff; valaddr_reg:x3; val_offset:105726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105726*FLEN/8, x4, x1, x2) - -inst_35243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1001ffff; valaddr_reg:x3; val_offset:105729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105729*FLEN/8, x4, x1, x2) - -inst_35244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1003ffff; valaddr_reg:x3; val_offset:105732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105732*FLEN/8, x4, x1, x2) - -inst_35245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x1007ffff; valaddr_reg:x3; val_offset:105735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105735*FLEN/8, x4, x1, x2) - -inst_35246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x100fffff; valaddr_reg:x3; val_offset:105738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105738*FLEN/8, x4, x1, x2) - -inst_35247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x101fffff; valaddr_reg:x3; val_offset:105741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105741*FLEN/8, x4, x1, x2) - -inst_35248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x103fffff; valaddr_reg:x3; val_offset:105744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105744*FLEN/8, x4, x1, x2) - -inst_35249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10400000; valaddr_reg:x3; val_offset:105747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105747*FLEN/8, x4, x1, x2) - -inst_35250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10600000; valaddr_reg:x3; val_offset:105750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105750*FLEN/8, x4, x1, x2) - -inst_35251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10700000; valaddr_reg:x3; val_offset:105753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105753*FLEN/8, x4, x1, x2) - -inst_35252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x10780000; valaddr_reg:x3; val_offset:105756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105756*FLEN/8, x4, x1, x2) - -inst_35253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107c0000; valaddr_reg:x3; val_offset:105759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105759*FLEN/8, x4, x1, x2) - -inst_35254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107e0000; valaddr_reg:x3; val_offset:105762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105762*FLEN/8, x4, x1, x2) - -inst_35255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107f0000; valaddr_reg:x3; val_offset:105765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105765*FLEN/8, x4, x1, x2) - -inst_35256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107f8000; valaddr_reg:x3; val_offset:105768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105768*FLEN/8, x4, x1, x2) - -inst_35257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107fc000; valaddr_reg:x3; val_offset:105771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105771*FLEN/8, x4, x1, x2) - -inst_35258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107fe000; valaddr_reg:x3; val_offset:105774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105774*FLEN/8, x4, x1, x2) - -inst_35259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107ff000; valaddr_reg:x3; val_offset:105777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105777*FLEN/8, x4, x1, x2) - -inst_35260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107ff800; valaddr_reg:x3; val_offset:105780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105780*FLEN/8, x4, x1, x2) - -inst_35261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107ffc00; valaddr_reg:x3; val_offset:105783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105783*FLEN/8, x4, x1, x2) - -inst_35262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107ffe00; valaddr_reg:x3; val_offset:105786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105786*FLEN/8, x4, x1, x2) - -inst_35263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107fff00; valaddr_reg:x3; val_offset:105789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105789*FLEN/8, x4, x1, x2) - -inst_35264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107fff80; valaddr_reg:x3; val_offset:105792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105792*FLEN/8, x4, x1, x2) - -inst_35265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107fffc0; valaddr_reg:x3; val_offset:105795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105795*FLEN/8, x4, x1, x2) - -inst_35266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107fffe0; valaddr_reg:x3; val_offset:105798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105798*FLEN/8, x4, x1, x2) - -inst_35267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107ffff0; valaddr_reg:x3; val_offset:105801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105801*FLEN/8, x4, x1, x2) - -inst_35268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107ffff8; valaddr_reg:x3; val_offset:105804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105804*FLEN/8, x4, x1, x2) - -inst_35269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107ffffc; valaddr_reg:x3; val_offset:105807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105807*FLEN/8, x4, x1, x2) - -inst_35270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107ffffe; valaddr_reg:x3; val_offset:105810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105810*FLEN/8, x4, x1, x2) - -inst_35271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; -op3val:0x107fffff; valaddr_reg:x3; val_offset:105813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105813*FLEN/8, x4, x1, x2) - -inst_35272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:105816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105816*FLEN/8, x4, x1, x2) - -inst_35273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:105819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105819*FLEN/8, x4, x1, x2) - -inst_35274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:105822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105822*FLEN/8, x4, x1, x2) - -inst_35275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:105825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105825*FLEN/8, x4, x1, x2) - -inst_35276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:105828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105828*FLEN/8, x4, x1, x2) - -inst_35277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:105831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105831*FLEN/8, x4, x1, x2) - -inst_35278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:105834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105834*FLEN/8, x4, x1, x2) - -inst_35279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:105837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105837*FLEN/8, x4, x1, x2) - -inst_35280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:105840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105840*FLEN/8, x4, x1, x2) - -inst_35281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:105843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105843*FLEN/8, x4, x1, x2) - -inst_35282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:105846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105846*FLEN/8, x4, x1, x2) - -inst_35283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:105849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105849*FLEN/8, x4, x1, x2) - -inst_35284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:105852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105852*FLEN/8, x4, x1, x2) - -inst_35285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:105855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105855*FLEN/8, x4, x1, x2) - -inst_35286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:105858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105858*FLEN/8, x4, x1, x2) - -inst_35287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:105861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105861*FLEN/8, x4, x1, x2) - -inst_35288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x800000; valaddr_reg:x3; val_offset:105864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105864*FLEN/8, x4, x1, x2) - -inst_35289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:105867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105867*FLEN/8, x4, x1, x2) - -inst_35290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:105870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105870*FLEN/8, x4, x1, x2) - -inst_35291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:105873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105873*FLEN/8, x4, x1, x2) - -inst_35292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x80000f; valaddr_reg:x3; val_offset:105876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105876*FLEN/8, x4, x1, x2) - -inst_35293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x80001f; valaddr_reg:x3; val_offset:105879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105879*FLEN/8, x4, x1, x2) - -inst_35294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x80003f; valaddr_reg:x3; val_offset:105882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105882*FLEN/8, x4, x1, x2) - -inst_35295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x80007f; valaddr_reg:x3; val_offset:105885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105885*FLEN/8, x4, x1, x2) - -inst_35296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x8000ff; valaddr_reg:x3; val_offset:105888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105888*FLEN/8, x4, x1, x2) - -inst_35297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x8001ff; valaddr_reg:x3; val_offset:105891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105891*FLEN/8, x4, x1, x2) - -inst_35298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x8003ff; valaddr_reg:x3; val_offset:105894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105894*FLEN/8, x4, x1, x2) - -inst_35299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x8007ff; valaddr_reg:x3; val_offset:105897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105897*FLEN/8, x4, x1, x2) - -inst_35300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x800fff; valaddr_reg:x3; val_offset:105900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105900*FLEN/8, x4, x1, x2) - -inst_35301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x801fff; valaddr_reg:x3; val_offset:105903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105903*FLEN/8, x4, x1, x2) - -inst_35302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x803fff; valaddr_reg:x3; val_offset:105906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105906*FLEN/8, x4, x1, x2) - -inst_35303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x807fff; valaddr_reg:x3; val_offset:105909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105909*FLEN/8, x4, x1, x2) - -inst_35304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x80ffff; valaddr_reg:x3; val_offset:105912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105912*FLEN/8, x4, x1, x2) - -inst_35305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x81ffff; valaddr_reg:x3; val_offset:105915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105915*FLEN/8, x4, x1, x2) - -inst_35306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x83ffff; valaddr_reg:x3; val_offset:105918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105918*FLEN/8, x4, x1, x2) - -inst_35307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x87ffff; valaddr_reg:x3; val_offset:105921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105921*FLEN/8, x4, x1, x2) - -inst_35308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x8fffff; valaddr_reg:x3; val_offset:105924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105924*FLEN/8, x4, x1, x2) - -inst_35309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0x9fffff; valaddr_reg:x3; val_offset:105927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105927*FLEN/8, x4, x1, x2) - -inst_35310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xbfffff; valaddr_reg:x3; val_offset:105930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105930*FLEN/8, x4, x1, x2) - -inst_35311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xc00000; valaddr_reg:x3; val_offset:105933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105933*FLEN/8, x4, x1, x2) - -inst_35312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xe00000; valaddr_reg:x3; val_offset:105936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105936*FLEN/8, x4, x1, x2) - -inst_35313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xf00000; valaddr_reg:x3; val_offset:105939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105939*FLEN/8, x4, x1, x2) - -inst_35314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xf80000; valaddr_reg:x3; val_offset:105942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105942*FLEN/8, x4, x1, x2) - -inst_35315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfc0000; valaddr_reg:x3; val_offset:105945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105945*FLEN/8, x4, x1, x2) - -inst_35316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfe0000; valaddr_reg:x3; val_offset:105948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105948*FLEN/8, x4, x1, x2) - -inst_35317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xff0000; valaddr_reg:x3; val_offset:105951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105951*FLEN/8, x4, x1, x2) - -inst_35318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xff8000; valaddr_reg:x3; val_offset:105954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105954*FLEN/8, x4, x1, x2) - -inst_35319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xffc000; valaddr_reg:x3; val_offset:105957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105957*FLEN/8, x4, x1, x2) - -inst_35320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xffe000; valaddr_reg:x3; val_offset:105960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105960*FLEN/8, x4, x1, x2) - -inst_35321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfff000; valaddr_reg:x3; val_offset:105963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105963*FLEN/8, x4, x1, x2) - -inst_35322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfff800; valaddr_reg:x3; val_offset:105966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105966*FLEN/8, x4, x1, x2) - -inst_35323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfffc00; valaddr_reg:x3; val_offset:105969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105969*FLEN/8, x4, x1, x2) - -inst_35324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfffe00; valaddr_reg:x3; val_offset:105972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105972*FLEN/8, x4, x1, x2) - -inst_35325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xffff00; valaddr_reg:x3; val_offset:105975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105975*FLEN/8, x4, x1, x2) - -inst_35326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xffff80; valaddr_reg:x3; val_offset:105978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105978*FLEN/8, x4, x1, x2) - -inst_35327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xffffc0; valaddr_reg:x3; val_offset:105981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105981*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_277) - -inst_35328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xffffe0; valaddr_reg:x3; val_offset:105984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105984*FLEN/8, x4, x1, x2) - -inst_35329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfffff0; valaddr_reg:x3; val_offset:105987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105987*FLEN/8, x4, x1, x2) - -inst_35330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:105990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105990*FLEN/8, x4, x1, x2) - -inst_35331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:105993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105993*FLEN/8, x4, x1, x2) - -inst_35332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:105996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105996*FLEN/8, x4, x1, x2) - -inst_35333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; -op3val:0xffffff; valaddr_reg:x3; val_offset:105999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105999*FLEN/8, x4, x1, x2) - -inst_35334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3f800001; valaddr_reg:x3; val_offset:106002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106002*FLEN/8, x4, x1, x2) - -inst_35335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3f800003; valaddr_reg:x3; val_offset:106005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106005*FLEN/8, x4, x1, x2) - -inst_35336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3f800007; valaddr_reg:x3; val_offset:106008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106008*FLEN/8, x4, x1, x2) - -inst_35337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3f999999; valaddr_reg:x3; val_offset:106011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106011*FLEN/8, x4, x1, x2) - -inst_35338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:106014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106014*FLEN/8, x4, x1, x2) - -inst_35339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:106017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106017*FLEN/8, x4, x1, x2) - -inst_35340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:106020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106020*FLEN/8, x4, x1, x2) - -inst_35341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:106023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106023*FLEN/8, x4, x1, x2) - -inst_35342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:106026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106026*FLEN/8, x4, x1, x2) - -inst_35343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:106029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106029*FLEN/8, x4, x1, x2) - -inst_35344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:106032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106032*FLEN/8, x4, x1, x2) - -inst_35345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:106035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106035*FLEN/8, x4, x1, x2) - -inst_35346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:106038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106038*FLEN/8, x4, x1, x2) - -inst_35347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:106041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106041*FLEN/8, x4, x1, x2) - -inst_35348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:106044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106044*FLEN/8, x4, x1, x2) - -inst_35349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:106047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106047*FLEN/8, x4, x1, x2) - -inst_35350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b800000; valaddr_reg:x3; val_offset:106050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106050*FLEN/8, x4, x1, x2) - -inst_35351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b800001; valaddr_reg:x3; val_offset:106053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106053*FLEN/8, x4, x1, x2) - -inst_35352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b800003; valaddr_reg:x3; val_offset:106056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106056*FLEN/8, x4, x1, x2) - -inst_35353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b800007; valaddr_reg:x3; val_offset:106059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106059*FLEN/8, x4, x1, x2) - -inst_35354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b80000f; valaddr_reg:x3; val_offset:106062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106062*FLEN/8, x4, x1, x2) - -inst_35355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b80001f; valaddr_reg:x3; val_offset:106065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106065*FLEN/8, x4, x1, x2) - -inst_35356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b80003f; valaddr_reg:x3; val_offset:106068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106068*FLEN/8, x4, x1, x2) - -inst_35357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b80007f; valaddr_reg:x3; val_offset:106071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106071*FLEN/8, x4, x1, x2) - -inst_35358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b8000ff; valaddr_reg:x3; val_offset:106074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106074*FLEN/8, x4, x1, x2) - -inst_35359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b8001ff; valaddr_reg:x3; val_offset:106077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106077*FLEN/8, x4, x1, x2) - -inst_35360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b8003ff; valaddr_reg:x3; val_offset:106080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106080*FLEN/8, x4, x1, x2) - -inst_35361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b8007ff; valaddr_reg:x3; val_offset:106083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106083*FLEN/8, x4, x1, x2) - -inst_35362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b800fff; valaddr_reg:x3; val_offset:106086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106086*FLEN/8, x4, x1, x2) - -inst_35363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b801fff; valaddr_reg:x3; val_offset:106089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106089*FLEN/8, x4, x1, x2) - -inst_35364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b803fff; valaddr_reg:x3; val_offset:106092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106092*FLEN/8, x4, x1, x2) - -inst_35365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b807fff; valaddr_reg:x3; val_offset:106095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106095*FLEN/8, x4, x1, x2) - -inst_35366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b80ffff; valaddr_reg:x3; val_offset:106098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106098*FLEN/8, x4, x1, x2) - -inst_35367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b81ffff; valaddr_reg:x3; val_offset:106101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106101*FLEN/8, x4, x1, x2) - -inst_35368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b83ffff; valaddr_reg:x3; val_offset:106104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106104*FLEN/8, x4, x1, x2) - -inst_35369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b87ffff; valaddr_reg:x3; val_offset:106107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106107*FLEN/8, x4, x1, x2) - -inst_35370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b8fffff; valaddr_reg:x3; val_offset:106110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106110*FLEN/8, x4, x1, x2) - -inst_35371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4b9fffff; valaddr_reg:x3; val_offset:106113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106113*FLEN/8, x4, x1, x2) - -inst_35372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bbfffff; valaddr_reg:x3; val_offset:106116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106116*FLEN/8, x4, x1, x2) - -inst_35373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bc00000; valaddr_reg:x3; val_offset:106119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106119*FLEN/8, x4, x1, x2) - -inst_35374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4be00000; valaddr_reg:x3; val_offset:106122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106122*FLEN/8, x4, x1, x2) - -inst_35375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bf00000; valaddr_reg:x3; val_offset:106125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106125*FLEN/8, x4, x1, x2) - -inst_35376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bf80000; valaddr_reg:x3; val_offset:106128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106128*FLEN/8, x4, x1, x2) - -inst_35377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfc0000; valaddr_reg:x3; val_offset:106131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106131*FLEN/8, x4, x1, x2) - -inst_35378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfe0000; valaddr_reg:x3; val_offset:106134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106134*FLEN/8, x4, x1, x2) - -inst_35379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bff0000; valaddr_reg:x3; val_offset:106137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106137*FLEN/8, x4, x1, x2) - -inst_35380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bff8000; valaddr_reg:x3; val_offset:106140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106140*FLEN/8, x4, x1, x2) - -inst_35381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bffc000; valaddr_reg:x3; val_offset:106143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106143*FLEN/8, x4, x1, x2) - -inst_35382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bffe000; valaddr_reg:x3; val_offset:106146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106146*FLEN/8, x4, x1, x2) - -inst_35383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfff000; valaddr_reg:x3; val_offset:106149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106149*FLEN/8, x4, x1, x2) - -inst_35384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfff800; valaddr_reg:x3; val_offset:106152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106152*FLEN/8, x4, x1, x2) - -inst_35385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfffc00; valaddr_reg:x3; val_offset:106155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106155*FLEN/8, x4, x1, x2) - -inst_35386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfffe00; valaddr_reg:x3; val_offset:106158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106158*FLEN/8, x4, x1, x2) - -inst_35387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bffff00; valaddr_reg:x3; val_offset:106161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106161*FLEN/8, x4, x1, x2) - -inst_35388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bffff80; valaddr_reg:x3; val_offset:106164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106164*FLEN/8, x4, x1, x2) - -inst_35389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bffffc0; valaddr_reg:x3; val_offset:106167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106167*FLEN/8, x4, x1, x2) - -inst_35390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bffffe0; valaddr_reg:x3; val_offset:106170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106170*FLEN/8, x4, x1, x2) - -inst_35391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfffff0; valaddr_reg:x3; val_offset:106173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106173*FLEN/8, x4, x1, x2) - -inst_35392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfffff8; valaddr_reg:x3; val_offset:106176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106176*FLEN/8, x4, x1, x2) - -inst_35393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfffffc; valaddr_reg:x3; val_offset:106179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106179*FLEN/8, x4, x1, x2) - -inst_35394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bfffffe; valaddr_reg:x3; val_offset:106182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106182*FLEN/8, x4, x1, x2) - -inst_35395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; -op3val:0x4bffffff; valaddr_reg:x3; val_offset:106185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106185*FLEN/8, x4, x1, x2) - -inst_35396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:106188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106188*FLEN/8, x4, x1, x2) - -inst_35397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:106191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106191*FLEN/8, x4, x1, x2) - -inst_35398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:106194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106194*FLEN/8, x4, x1, x2) - -inst_35399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:106197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106197*FLEN/8, x4, x1, x2) - -inst_35400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:106200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106200*FLEN/8, x4, x1, x2) - -inst_35401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:106203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106203*FLEN/8, x4, x1, x2) - -inst_35402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:106206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106206*FLEN/8, x4, x1, x2) - -inst_35403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:106209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106209*FLEN/8, x4, x1, x2) - -inst_35404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:106212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106212*FLEN/8, x4, x1, x2) - -inst_35405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:106215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106215*FLEN/8, x4, x1, x2) - -inst_35406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:106218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106218*FLEN/8, x4, x1, x2) - -inst_35407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:106221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106221*FLEN/8, x4, x1, x2) - -inst_35408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:106224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106224*FLEN/8, x4, x1, x2) - -inst_35409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:106227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106227*FLEN/8, x4, x1, x2) - -inst_35410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:106230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106230*FLEN/8, x4, x1, x2) - -inst_35411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:106233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106233*FLEN/8, x4, x1, x2) - -inst_35412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1800000; valaddr_reg:x3; val_offset:106236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106236*FLEN/8, x4, x1, x2) - -inst_35413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1800001; valaddr_reg:x3; val_offset:106239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106239*FLEN/8, x4, x1, x2) - -inst_35414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1800003; valaddr_reg:x3; val_offset:106242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106242*FLEN/8, x4, x1, x2) - -inst_35415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1800007; valaddr_reg:x3; val_offset:106245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106245*FLEN/8, x4, x1, x2) - -inst_35416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x180000f; valaddr_reg:x3; val_offset:106248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106248*FLEN/8, x4, x1, x2) - -inst_35417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x180001f; valaddr_reg:x3; val_offset:106251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106251*FLEN/8, x4, x1, x2) - -inst_35418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x180003f; valaddr_reg:x3; val_offset:106254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106254*FLEN/8, x4, x1, x2) - -inst_35419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x180007f; valaddr_reg:x3; val_offset:106257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106257*FLEN/8, x4, x1, x2) - -inst_35420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x18000ff; valaddr_reg:x3; val_offset:106260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106260*FLEN/8, x4, x1, x2) - -inst_35421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x18001ff; valaddr_reg:x3; val_offset:106263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106263*FLEN/8, x4, x1, x2) - -inst_35422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x18003ff; valaddr_reg:x3; val_offset:106266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106266*FLEN/8, x4, x1, x2) - -inst_35423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x18007ff; valaddr_reg:x3; val_offset:106269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106269*FLEN/8, x4, x1, x2) - -inst_35424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1800fff; valaddr_reg:x3; val_offset:106272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106272*FLEN/8, x4, x1, x2) - -inst_35425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1801fff; valaddr_reg:x3; val_offset:106275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106275*FLEN/8, x4, x1, x2) - -inst_35426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1803fff; valaddr_reg:x3; val_offset:106278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106278*FLEN/8, x4, x1, x2) - -inst_35427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1807fff; valaddr_reg:x3; val_offset:106281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106281*FLEN/8, x4, x1, x2) - -inst_35428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x180ffff; valaddr_reg:x3; val_offset:106284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106284*FLEN/8, x4, x1, x2) - -inst_35429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x181ffff; valaddr_reg:x3; val_offset:106287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106287*FLEN/8, x4, x1, x2) - -inst_35430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x183ffff; valaddr_reg:x3; val_offset:106290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106290*FLEN/8, x4, x1, x2) - -inst_35431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x187ffff; valaddr_reg:x3; val_offset:106293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106293*FLEN/8, x4, x1, x2) - -inst_35432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x18fffff; valaddr_reg:x3; val_offset:106296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106296*FLEN/8, x4, x1, x2) - -inst_35433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x19fffff; valaddr_reg:x3; val_offset:106299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106299*FLEN/8, x4, x1, x2) - -inst_35434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1bfffff; valaddr_reg:x3; val_offset:106302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106302*FLEN/8, x4, x1, x2) - -inst_35435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1c00000; valaddr_reg:x3; val_offset:106305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106305*FLEN/8, x4, x1, x2) - -inst_35436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1e00000; valaddr_reg:x3; val_offset:106308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106308*FLEN/8, x4, x1, x2) - -inst_35437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1f00000; valaddr_reg:x3; val_offset:106311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106311*FLEN/8, x4, x1, x2) - -inst_35438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1f80000; valaddr_reg:x3; val_offset:106314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106314*FLEN/8, x4, x1, x2) - -inst_35439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fc0000; valaddr_reg:x3; val_offset:106317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106317*FLEN/8, x4, x1, x2) - -inst_35440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fe0000; valaddr_reg:x3; val_offset:106320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106320*FLEN/8, x4, x1, x2) - -inst_35441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ff0000; valaddr_reg:x3; val_offset:106323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106323*FLEN/8, x4, x1, x2) - -inst_35442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ff8000; valaddr_reg:x3; val_offset:106326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106326*FLEN/8, x4, x1, x2) - -inst_35443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ffc000; valaddr_reg:x3; val_offset:106329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106329*FLEN/8, x4, x1, x2) - -inst_35444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ffe000; valaddr_reg:x3; val_offset:106332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106332*FLEN/8, x4, x1, x2) - -inst_35445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fff000; valaddr_reg:x3; val_offset:106335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106335*FLEN/8, x4, x1, x2) - -inst_35446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fff800; valaddr_reg:x3; val_offset:106338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106338*FLEN/8, x4, x1, x2) - -inst_35447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fffc00; valaddr_reg:x3; val_offset:106341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106341*FLEN/8, x4, x1, x2) - -inst_35448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fffe00; valaddr_reg:x3; val_offset:106344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106344*FLEN/8, x4, x1, x2) - -inst_35449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ffff00; valaddr_reg:x3; val_offset:106347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106347*FLEN/8, x4, x1, x2) - -inst_35450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ffff80; valaddr_reg:x3; val_offset:106350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106350*FLEN/8, x4, x1, x2) - -inst_35451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ffffc0; valaddr_reg:x3; val_offset:106353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106353*FLEN/8, x4, x1, x2) - -inst_35452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ffffe0; valaddr_reg:x3; val_offset:106356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106356*FLEN/8, x4, x1, x2) - -inst_35453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fffff0; valaddr_reg:x3; val_offset:106359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106359*FLEN/8, x4, x1, x2) - -inst_35454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fffff8; valaddr_reg:x3; val_offset:106362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106362*FLEN/8, x4, x1, x2) - -inst_35455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fffffc; valaddr_reg:x3; val_offset:106365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106365*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_278) - -inst_35456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1fffffe; valaddr_reg:x3; val_offset:106368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106368*FLEN/8, x4, x1, x2) - -inst_35457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; -op3val:0x1ffffff; valaddr_reg:x3; val_offset:106371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106371*FLEN/8, x4, x1, x2) - -inst_35458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:106374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106374*FLEN/8, x4, x1, x2) - -inst_35459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:106377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106377*FLEN/8, x4, x1, x2) - -inst_35460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:106380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106380*FLEN/8, x4, x1, x2) - -inst_35461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:106383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106383*FLEN/8, x4, x1, x2) - -inst_35462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:106386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106386*FLEN/8, x4, x1, x2) - -inst_35463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:106389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106389*FLEN/8, x4, x1, x2) - -inst_35464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:106392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106392*FLEN/8, x4, x1, x2) - -inst_35465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:106395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106395*FLEN/8, x4, x1, x2) - -inst_35466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:106398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106398*FLEN/8, x4, x1, x2) - -inst_35467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:106401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106401*FLEN/8, x4, x1, x2) - -inst_35468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:106404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106404*FLEN/8, x4, x1, x2) - -inst_35469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:106407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106407*FLEN/8, x4, x1, x2) - -inst_35470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:106410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106410*FLEN/8, x4, x1, x2) - -inst_35471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:106413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106413*FLEN/8, x4, x1, x2) - -inst_35472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:106416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106416*FLEN/8, x4, x1, x2) - -inst_35473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:106419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106419*FLEN/8, x4, x1, x2) - -inst_35474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf800000; valaddr_reg:x3; val_offset:106422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106422*FLEN/8, x4, x1, x2) - -inst_35475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf800001; valaddr_reg:x3; val_offset:106425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106425*FLEN/8, x4, x1, x2) - -inst_35476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf800003; valaddr_reg:x3; val_offset:106428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106428*FLEN/8, x4, x1, x2) - -inst_35477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf800007; valaddr_reg:x3; val_offset:106431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106431*FLEN/8, x4, x1, x2) - -inst_35478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf80000f; valaddr_reg:x3; val_offset:106434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106434*FLEN/8, x4, x1, x2) - -inst_35479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf80001f; valaddr_reg:x3; val_offset:106437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106437*FLEN/8, x4, x1, x2) - -inst_35480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf80003f; valaddr_reg:x3; val_offset:106440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106440*FLEN/8, x4, x1, x2) - -inst_35481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf80007f; valaddr_reg:x3; val_offset:106443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106443*FLEN/8, x4, x1, x2) - -inst_35482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf8000ff; valaddr_reg:x3; val_offset:106446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106446*FLEN/8, x4, x1, x2) - -inst_35483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf8001ff; valaddr_reg:x3; val_offset:106449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106449*FLEN/8, x4, x1, x2) - -inst_35484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf8003ff; valaddr_reg:x3; val_offset:106452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106452*FLEN/8, x4, x1, x2) - -inst_35485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf8007ff; valaddr_reg:x3; val_offset:106455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106455*FLEN/8, x4, x1, x2) - -inst_35486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf800fff; valaddr_reg:x3; val_offset:106458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106458*FLEN/8, x4, x1, x2) - -inst_35487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf801fff; valaddr_reg:x3; val_offset:106461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106461*FLEN/8, x4, x1, x2) - -inst_35488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf803fff; valaddr_reg:x3; val_offset:106464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106464*FLEN/8, x4, x1, x2) - -inst_35489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf807fff; valaddr_reg:x3; val_offset:106467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106467*FLEN/8, x4, x1, x2) - -inst_35490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf80ffff; valaddr_reg:x3; val_offset:106470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106470*FLEN/8, x4, x1, x2) - -inst_35491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf81ffff; valaddr_reg:x3; val_offset:106473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106473*FLEN/8, x4, x1, x2) - -inst_35492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf83ffff; valaddr_reg:x3; val_offset:106476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106476*FLEN/8, x4, x1, x2) - -inst_35493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf87ffff; valaddr_reg:x3; val_offset:106479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106479*FLEN/8, x4, x1, x2) - -inst_35494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf8fffff; valaddr_reg:x3; val_offset:106482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106482*FLEN/8, x4, x1, x2) - -inst_35495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xf9fffff; valaddr_reg:x3; val_offset:106485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106485*FLEN/8, x4, x1, x2) - -inst_35496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfbfffff; valaddr_reg:x3; val_offset:106488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106488*FLEN/8, x4, x1, x2) - -inst_35497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfc00000; valaddr_reg:x3; val_offset:106491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106491*FLEN/8, x4, x1, x2) - -inst_35498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfe00000; valaddr_reg:x3; val_offset:106494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106494*FLEN/8, x4, x1, x2) - -inst_35499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xff00000; valaddr_reg:x3; val_offset:106497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106497*FLEN/8, x4, x1, x2) - -inst_35500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xff80000; valaddr_reg:x3; val_offset:106500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106500*FLEN/8, x4, x1, x2) - -inst_35501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffc0000; valaddr_reg:x3; val_offset:106503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106503*FLEN/8, x4, x1, x2) - -inst_35502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffe0000; valaddr_reg:x3; val_offset:106506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106506*FLEN/8, x4, x1, x2) - -inst_35503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfff0000; valaddr_reg:x3; val_offset:106509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106509*FLEN/8, x4, x1, x2) - -inst_35504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfff8000; valaddr_reg:x3; val_offset:106512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106512*FLEN/8, x4, x1, x2) - -inst_35505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfffc000; valaddr_reg:x3; val_offset:106515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106515*FLEN/8, x4, x1, x2) - -inst_35506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfffe000; valaddr_reg:x3; val_offset:106518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106518*FLEN/8, x4, x1, x2) - -inst_35507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffff000; valaddr_reg:x3; val_offset:106521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106521*FLEN/8, x4, x1, x2) - -inst_35508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffff800; valaddr_reg:x3; val_offset:106524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106524*FLEN/8, x4, x1, x2) - -inst_35509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffffc00; valaddr_reg:x3; val_offset:106527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106527*FLEN/8, x4, x1, x2) - -inst_35510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffffe00; valaddr_reg:x3; val_offset:106530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106530*FLEN/8, x4, x1, x2) - -inst_35511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfffff00; valaddr_reg:x3; val_offset:106533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106533*FLEN/8, x4, x1, x2) - -inst_35512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfffff80; valaddr_reg:x3; val_offset:106536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106536*FLEN/8, x4, x1, x2) - -inst_35513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfffffc0; valaddr_reg:x3; val_offset:106539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106539*FLEN/8, x4, x1, x2) - -inst_35514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfffffe0; valaddr_reg:x3; val_offset:106542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106542*FLEN/8, x4, x1, x2) - -inst_35515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffffff0; valaddr_reg:x3; val_offset:106545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106545*FLEN/8, x4, x1, x2) - -inst_35516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffffff8; valaddr_reg:x3; val_offset:106548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106548*FLEN/8, x4, x1, x2) - -inst_35517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffffffc; valaddr_reg:x3; val_offset:106551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106551*FLEN/8, x4, x1, x2) - -inst_35518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xffffffe; valaddr_reg:x3; val_offset:106554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106554*FLEN/8, x4, x1, x2) - -inst_35519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; -op3val:0xfffffff; valaddr_reg:x3; val_offset:106557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106557*FLEN/8, x4, x1, x2) - -inst_35520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:106560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106560*FLEN/8, x4, x1, x2) - -inst_35521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:106563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106563*FLEN/8, x4, x1, x2) - -inst_35522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:106566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106566*FLEN/8, x4, x1, x2) - -inst_35523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:106569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106569*FLEN/8, x4, x1, x2) - -inst_35524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:106572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106572*FLEN/8, x4, x1, x2) - -inst_35525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:106575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106575*FLEN/8, x4, x1, x2) - -inst_35526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:106578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106578*FLEN/8, x4, x1, x2) - -inst_35527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:106581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106581*FLEN/8, x4, x1, x2) - -inst_35528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:106584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106584*FLEN/8, x4, x1, x2) - -inst_35529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:106587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106587*FLEN/8, x4, x1, x2) - -inst_35530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:106590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106590*FLEN/8, x4, x1, x2) - -inst_35531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:106593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106593*FLEN/8, x4, x1, x2) - -inst_35532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:106596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106596*FLEN/8, x4, x1, x2) - -inst_35533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:106599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106599*FLEN/8, x4, x1, x2) - -inst_35534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:106602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106602*FLEN/8, x4, x1, x2) - -inst_35535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:106605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106605*FLEN/8, x4, x1, x2) - -inst_35536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc800000; valaddr_reg:x3; val_offset:106608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106608*FLEN/8, x4, x1, x2) - -inst_35537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc800001; valaddr_reg:x3; val_offset:106611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106611*FLEN/8, x4, x1, x2) - -inst_35538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc800003; valaddr_reg:x3; val_offset:106614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106614*FLEN/8, x4, x1, x2) - -inst_35539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc800007; valaddr_reg:x3; val_offset:106617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106617*FLEN/8, x4, x1, x2) - -inst_35540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc80000f; valaddr_reg:x3; val_offset:106620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106620*FLEN/8, x4, x1, x2) - -inst_35541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc80001f; valaddr_reg:x3; val_offset:106623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106623*FLEN/8, x4, x1, x2) - -inst_35542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc80003f; valaddr_reg:x3; val_offset:106626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106626*FLEN/8, x4, x1, x2) - -inst_35543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc80007f; valaddr_reg:x3; val_offset:106629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106629*FLEN/8, x4, x1, x2) - -inst_35544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc8000ff; valaddr_reg:x3; val_offset:106632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106632*FLEN/8, x4, x1, x2) - -inst_35545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc8001ff; valaddr_reg:x3; val_offset:106635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106635*FLEN/8, x4, x1, x2) - -inst_35546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc8003ff; valaddr_reg:x3; val_offset:106638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106638*FLEN/8, x4, x1, x2) - -inst_35547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc8007ff; valaddr_reg:x3; val_offset:106641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106641*FLEN/8, x4, x1, x2) - -inst_35548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc800fff; valaddr_reg:x3; val_offset:106644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106644*FLEN/8, x4, x1, x2) - -inst_35549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc801fff; valaddr_reg:x3; val_offset:106647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106647*FLEN/8, x4, x1, x2) - -inst_35550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc803fff; valaddr_reg:x3; val_offset:106650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106650*FLEN/8, x4, x1, x2) - -inst_35551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc807fff; valaddr_reg:x3; val_offset:106653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106653*FLEN/8, x4, x1, x2) - -inst_35552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc80ffff; valaddr_reg:x3; val_offset:106656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106656*FLEN/8, x4, x1, x2) - -inst_35553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc81ffff; valaddr_reg:x3; val_offset:106659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106659*FLEN/8, x4, x1, x2) - -inst_35554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc83ffff; valaddr_reg:x3; val_offset:106662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106662*FLEN/8, x4, x1, x2) - -inst_35555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc87ffff; valaddr_reg:x3; val_offset:106665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106665*FLEN/8, x4, x1, x2) - -inst_35556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc8fffff; valaddr_reg:x3; val_offset:106668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106668*FLEN/8, x4, x1, x2) - -inst_35557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xc9fffff; valaddr_reg:x3; val_offset:106671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106671*FLEN/8, x4, x1, x2) - -inst_35558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcbfffff; valaddr_reg:x3; val_offset:106674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106674*FLEN/8, x4, x1, x2) - -inst_35559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcc00000; valaddr_reg:x3; val_offset:106677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106677*FLEN/8, x4, x1, x2) - -inst_35560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xce00000; valaddr_reg:x3; val_offset:106680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106680*FLEN/8, x4, x1, x2) - -inst_35561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcf00000; valaddr_reg:x3; val_offset:106683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106683*FLEN/8, x4, x1, x2) - -inst_35562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcf80000; valaddr_reg:x3; val_offset:106686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106686*FLEN/8, x4, x1, x2) - -inst_35563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfc0000; valaddr_reg:x3; val_offset:106689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106689*FLEN/8, x4, x1, x2) - -inst_35564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfe0000; valaddr_reg:x3; val_offset:106692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106692*FLEN/8, x4, x1, x2) - -inst_35565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcff0000; valaddr_reg:x3; val_offset:106695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106695*FLEN/8, x4, x1, x2) - -inst_35566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcff8000; valaddr_reg:x3; val_offset:106698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106698*FLEN/8, x4, x1, x2) - -inst_35567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcffc000; valaddr_reg:x3; val_offset:106701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106701*FLEN/8, x4, x1, x2) - -inst_35568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcffe000; valaddr_reg:x3; val_offset:106704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106704*FLEN/8, x4, x1, x2) - -inst_35569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfff000; valaddr_reg:x3; val_offset:106707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106707*FLEN/8, x4, x1, x2) - -inst_35570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfff800; valaddr_reg:x3; val_offset:106710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106710*FLEN/8, x4, x1, x2) - -inst_35571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfffc00; valaddr_reg:x3; val_offset:106713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106713*FLEN/8, x4, x1, x2) - -inst_35572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfffe00; valaddr_reg:x3; val_offset:106716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106716*FLEN/8, x4, x1, x2) - -inst_35573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcffff00; valaddr_reg:x3; val_offset:106719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106719*FLEN/8, x4, x1, x2) - -inst_35574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcffff80; valaddr_reg:x3; val_offset:106722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106722*FLEN/8, x4, x1, x2) - -inst_35575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcffffc0; valaddr_reg:x3; val_offset:106725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106725*FLEN/8, x4, x1, x2) - -inst_35576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcffffe0; valaddr_reg:x3; val_offset:106728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106728*FLEN/8, x4, x1, x2) - -inst_35577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfffff0; valaddr_reg:x3; val_offset:106731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106731*FLEN/8, x4, x1, x2) - -inst_35578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfffff8; valaddr_reg:x3; val_offset:106734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106734*FLEN/8, x4, x1, x2) - -inst_35579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfffffc; valaddr_reg:x3; val_offset:106737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106737*FLEN/8, x4, x1, x2) - -inst_35580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcfffffe; valaddr_reg:x3; val_offset:106740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106740*FLEN/8, x4, x1, x2) - -inst_35581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; -op3val:0xcffffff; valaddr_reg:x3; val_offset:106743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106743*FLEN/8, x4, x1, x2) - -inst_35582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc000000; valaddr_reg:x3; val_offset:106746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106746*FLEN/8, x4, x1, x2) - -inst_35583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc000001; valaddr_reg:x3; val_offset:106749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106749*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_279) - -inst_35584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc000003; valaddr_reg:x3; val_offset:106752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106752*FLEN/8, x4, x1, x2) - -inst_35585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc000007; valaddr_reg:x3; val_offset:106755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106755*FLEN/8, x4, x1, x2) - -inst_35586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc00000f; valaddr_reg:x3; val_offset:106758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106758*FLEN/8, x4, x1, x2) - -inst_35587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc00001f; valaddr_reg:x3; val_offset:106761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106761*FLEN/8, x4, x1, x2) - -inst_35588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc00003f; valaddr_reg:x3; val_offset:106764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106764*FLEN/8, x4, x1, x2) - -inst_35589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc00007f; valaddr_reg:x3; val_offset:106767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106767*FLEN/8, x4, x1, x2) - -inst_35590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc0000ff; valaddr_reg:x3; val_offset:106770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106770*FLEN/8, x4, x1, x2) - -inst_35591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc0001ff; valaddr_reg:x3; val_offset:106773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106773*FLEN/8, x4, x1, x2) - -inst_35592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc0003ff; valaddr_reg:x3; val_offset:106776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106776*FLEN/8, x4, x1, x2) - -inst_35593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc0007ff; valaddr_reg:x3; val_offset:106779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106779*FLEN/8, x4, x1, x2) - -inst_35594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc000fff; valaddr_reg:x3; val_offset:106782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106782*FLEN/8, x4, x1, x2) - -inst_35595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc001fff; valaddr_reg:x3; val_offset:106785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106785*FLEN/8, x4, x1, x2) - -inst_35596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc003fff; valaddr_reg:x3; val_offset:106788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106788*FLEN/8, x4, x1, x2) - -inst_35597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc007fff; valaddr_reg:x3; val_offset:106791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106791*FLEN/8, x4, x1, x2) - -inst_35598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc00ffff; valaddr_reg:x3; val_offset:106794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106794*FLEN/8, x4, x1, x2) - -inst_35599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc01ffff; valaddr_reg:x3; val_offset:106797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106797*FLEN/8, x4, x1, x2) - -inst_35600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc03ffff; valaddr_reg:x3; val_offset:106800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106800*FLEN/8, x4, x1, x2) - -inst_35601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc07ffff; valaddr_reg:x3; val_offset:106803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106803*FLEN/8, x4, x1, x2) - -inst_35602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc0fffff; valaddr_reg:x3; val_offset:106806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106806*FLEN/8, x4, x1, x2) - -inst_35603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc1fffff; valaddr_reg:x3; val_offset:106809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106809*FLEN/8, x4, x1, x2) - -inst_35604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc3fffff; valaddr_reg:x3; val_offset:106812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106812*FLEN/8, x4, x1, x2) - -inst_35605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc400000; valaddr_reg:x3; val_offset:106815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106815*FLEN/8, x4, x1, x2) - -inst_35606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc600000; valaddr_reg:x3; val_offset:106818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106818*FLEN/8, x4, x1, x2) - -inst_35607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc700000; valaddr_reg:x3; val_offset:106821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106821*FLEN/8, x4, x1, x2) - -inst_35608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc780000; valaddr_reg:x3; val_offset:106824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106824*FLEN/8, x4, x1, x2) - -inst_35609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7c0000; valaddr_reg:x3; val_offset:106827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106827*FLEN/8, x4, x1, x2) - -inst_35610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7e0000; valaddr_reg:x3; val_offset:106830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106830*FLEN/8, x4, x1, x2) - -inst_35611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7f0000; valaddr_reg:x3; val_offset:106833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106833*FLEN/8, x4, x1, x2) - -inst_35612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7f8000; valaddr_reg:x3; val_offset:106836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106836*FLEN/8, x4, x1, x2) - -inst_35613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7fc000; valaddr_reg:x3; val_offset:106839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106839*FLEN/8, x4, x1, x2) - -inst_35614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7fe000; valaddr_reg:x3; val_offset:106842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106842*FLEN/8, x4, x1, x2) - -inst_35615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7ff000; valaddr_reg:x3; val_offset:106845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106845*FLEN/8, x4, x1, x2) - -inst_35616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7ff800; valaddr_reg:x3; val_offset:106848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106848*FLEN/8, x4, x1, x2) - -inst_35617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7ffc00; valaddr_reg:x3; val_offset:106851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106851*FLEN/8, x4, x1, x2) - -inst_35618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7ffe00; valaddr_reg:x3; val_offset:106854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106854*FLEN/8, x4, x1, x2) - -inst_35619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7fff00; valaddr_reg:x3; val_offset:106857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106857*FLEN/8, x4, x1, x2) - -inst_35620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7fff80; valaddr_reg:x3; val_offset:106860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106860*FLEN/8, x4, x1, x2) - -inst_35621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7fffc0; valaddr_reg:x3; val_offset:106863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106863*FLEN/8, x4, x1, x2) - -inst_35622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7fffe0; valaddr_reg:x3; val_offset:106866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106866*FLEN/8, x4, x1, x2) - -inst_35623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7ffff0; valaddr_reg:x3; val_offset:106869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106869*FLEN/8, x4, x1, x2) - -inst_35624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7ffff8; valaddr_reg:x3; val_offset:106872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106872*FLEN/8, x4, x1, x2) - -inst_35625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7ffffc; valaddr_reg:x3; val_offset:106875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106875*FLEN/8, x4, x1, x2) - -inst_35626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7ffffe; valaddr_reg:x3; val_offset:106878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106878*FLEN/8, x4, x1, x2) - -inst_35627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xfc7fffff; valaddr_reg:x3; val_offset:106881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106881*FLEN/8, x4, x1, x2) - -inst_35628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff000001; valaddr_reg:x3; val_offset:106884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106884*FLEN/8, x4, x1, x2) - -inst_35629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff000003; valaddr_reg:x3; val_offset:106887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106887*FLEN/8, x4, x1, x2) - -inst_35630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff000007; valaddr_reg:x3; val_offset:106890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106890*FLEN/8, x4, x1, x2) - -inst_35631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff199999; valaddr_reg:x3; val_offset:106893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106893*FLEN/8, x4, x1, x2) - -inst_35632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff249249; valaddr_reg:x3; val_offset:106896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106896*FLEN/8, x4, x1, x2) - -inst_35633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff333333; valaddr_reg:x3; val_offset:106899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106899*FLEN/8, x4, x1, x2) - -inst_35634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:106902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106902*FLEN/8, x4, x1, x2) - -inst_35635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:106905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106905*FLEN/8, x4, x1, x2) - -inst_35636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff444444; valaddr_reg:x3; val_offset:106908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106908*FLEN/8, x4, x1, x2) - -inst_35637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:106911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106911*FLEN/8, x4, x1, x2) - -inst_35638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:106914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106914*FLEN/8, x4, x1, x2) - -inst_35639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff666666; valaddr_reg:x3; val_offset:106917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106917*FLEN/8, x4, x1, x2) - -inst_35640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:106920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106920*FLEN/8, x4, x1, x2) - -inst_35641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:106923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106923*FLEN/8, x4, x1, x2) - -inst_35642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:106926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106926*FLEN/8, x4, x1, x2) - -inst_35643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:106929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106929*FLEN/8, x4, x1, x2) - -inst_35644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:106932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106932*FLEN/8, x4, x1, x2) - -inst_35645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:106935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106935*FLEN/8, x4, x1, x2) - -inst_35646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:106938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106938*FLEN/8, x4, x1, x2) - -inst_35647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:106941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106941*FLEN/8, x4, x1, x2) - -inst_35648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:106944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106944*FLEN/8, x4, x1, x2) - -inst_35649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:106947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106947*FLEN/8, x4, x1, x2) - -inst_35650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:106950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106950*FLEN/8, x4, x1, x2) - -inst_35651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:106953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106953*FLEN/8, x4, x1, x2) - -inst_35652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:106956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106956*FLEN/8, x4, x1, x2) - -inst_35653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:106959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106959*FLEN/8, x4, x1, x2) - -inst_35654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:106962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106962*FLEN/8, x4, x1, x2) - -inst_35655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:106965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106965*FLEN/8, x4, x1, x2) - -inst_35656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:106968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106968*FLEN/8, x4, x1, x2) - -inst_35657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:106971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106971*FLEN/8, x4, x1, x2) - -inst_35658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:106974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106974*FLEN/8, x4, x1, x2) - -inst_35659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:106977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106977*FLEN/8, x4, x1, x2) - -inst_35660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81000000; valaddr_reg:x3; val_offset:106980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106980*FLEN/8, x4, x1, x2) - -inst_35661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81000001; valaddr_reg:x3; val_offset:106983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106983*FLEN/8, x4, x1, x2) - -inst_35662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81000003; valaddr_reg:x3; val_offset:106986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106986*FLEN/8, x4, x1, x2) - -inst_35663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81000007; valaddr_reg:x3; val_offset:106989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106989*FLEN/8, x4, x1, x2) - -inst_35664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8100000f; valaddr_reg:x3; val_offset:106992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106992*FLEN/8, x4, x1, x2) - -inst_35665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8100001f; valaddr_reg:x3; val_offset:106995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106995*FLEN/8, x4, x1, x2) - -inst_35666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8100003f; valaddr_reg:x3; val_offset:106998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106998*FLEN/8, x4, x1, x2) - -inst_35667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8100007f; valaddr_reg:x3; val_offset:107001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107001*FLEN/8, x4, x1, x2) - -inst_35668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x810000ff; valaddr_reg:x3; val_offset:107004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107004*FLEN/8, x4, x1, x2) - -inst_35669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x810001ff; valaddr_reg:x3; val_offset:107007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107007*FLEN/8, x4, x1, x2) - -inst_35670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x810003ff; valaddr_reg:x3; val_offset:107010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107010*FLEN/8, x4, x1, x2) - -inst_35671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x810007ff; valaddr_reg:x3; val_offset:107013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107013*FLEN/8, x4, x1, x2) - -inst_35672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81000fff; valaddr_reg:x3; val_offset:107016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107016*FLEN/8, x4, x1, x2) - -inst_35673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81001fff; valaddr_reg:x3; val_offset:107019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107019*FLEN/8, x4, x1, x2) - -inst_35674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81003fff; valaddr_reg:x3; val_offset:107022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107022*FLEN/8, x4, x1, x2) - -inst_35675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81007fff; valaddr_reg:x3; val_offset:107025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107025*FLEN/8, x4, x1, x2) - -inst_35676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8100ffff; valaddr_reg:x3; val_offset:107028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107028*FLEN/8, x4, x1, x2) - -inst_35677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8101ffff; valaddr_reg:x3; val_offset:107031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107031*FLEN/8, x4, x1, x2) - -inst_35678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8103ffff; valaddr_reg:x3; val_offset:107034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107034*FLEN/8, x4, x1, x2) - -inst_35679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x8107ffff; valaddr_reg:x3; val_offset:107037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107037*FLEN/8, x4, x1, x2) - -inst_35680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x810fffff; valaddr_reg:x3; val_offset:107040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107040*FLEN/8, x4, x1, x2) - -inst_35681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x811fffff; valaddr_reg:x3; val_offset:107043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107043*FLEN/8, x4, x1, x2) - -inst_35682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x813fffff; valaddr_reg:x3; val_offset:107046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107046*FLEN/8, x4, x1, x2) - -inst_35683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81400000; valaddr_reg:x3; val_offset:107049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107049*FLEN/8, x4, x1, x2) - -inst_35684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81600000; valaddr_reg:x3; val_offset:107052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107052*FLEN/8, x4, x1, x2) - -inst_35685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81700000; valaddr_reg:x3; val_offset:107055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107055*FLEN/8, x4, x1, x2) - -inst_35686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x81780000; valaddr_reg:x3; val_offset:107058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107058*FLEN/8, x4, x1, x2) - -inst_35687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817c0000; valaddr_reg:x3; val_offset:107061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107061*FLEN/8, x4, x1, x2) - -inst_35688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817e0000; valaddr_reg:x3; val_offset:107064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107064*FLEN/8, x4, x1, x2) - -inst_35689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817f0000; valaddr_reg:x3; val_offset:107067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107067*FLEN/8, x4, x1, x2) - -inst_35690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817f8000; valaddr_reg:x3; val_offset:107070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107070*FLEN/8, x4, x1, x2) - -inst_35691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817fc000; valaddr_reg:x3; val_offset:107073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107073*FLEN/8, x4, x1, x2) - -inst_35692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817fe000; valaddr_reg:x3; val_offset:107076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107076*FLEN/8, x4, x1, x2) - -inst_35693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817ff000; valaddr_reg:x3; val_offset:107079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107079*FLEN/8, x4, x1, x2) - -inst_35694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817ff800; valaddr_reg:x3; val_offset:107082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107082*FLEN/8, x4, x1, x2) - -inst_35695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817ffc00; valaddr_reg:x3; val_offset:107085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107085*FLEN/8, x4, x1, x2) - -inst_35696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817ffe00; valaddr_reg:x3; val_offset:107088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107088*FLEN/8, x4, x1, x2) - -inst_35697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817fff00; valaddr_reg:x3; val_offset:107091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107091*FLEN/8, x4, x1, x2) - -inst_35698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817fff80; valaddr_reg:x3; val_offset:107094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107094*FLEN/8, x4, x1, x2) - -inst_35699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817fffc0; valaddr_reg:x3; val_offset:107097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107097*FLEN/8, x4, x1, x2) - -inst_35700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817fffe0; valaddr_reg:x3; val_offset:107100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107100*FLEN/8, x4, x1, x2) - -inst_35701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817ffff0; valaddr_reg:x3; val_offset:107103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107103*FLEN/8, x4, x1, x2) - -inst_35702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817ffff8; valaddr_reg:x3; val_offset:107106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107106*FLEN/8, x4, x1, x2) - -inst_35703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817ffffc; valaddr_reg:x3; val_offset:107109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107109*FLEN/8, x4, x1, x2) - -inst_35704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817ffffe; valaddr_reg:x3; val_offset:107112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107112*FLEN/8, x4, x1, x2) - -inst_35705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; -op3val:0x817fffff; valaddr_reg:x3; val_offset:107115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107115*FLEN/8, x4, x1, x2) - -inst_35706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3f800001; valaddr_reg:x3; val_offset:107118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107118*FLEN/8, x4, x1, x2) - -inst_35707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3f800003; valaddr_reg:x3; val_offset:107121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107121*FLEN/8, x4, x1, x2) - -inst_35708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3f800007; valaddr_reg:x3; val_offset:107124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107124*FLEN/8, x4, x1, x2) - -inst_35709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3f999999; valaddr_reg:x3; val_offset:107127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107127*FLEN/8, x4, x1, x2) - -inst_35710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:107130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107130*FLEN/8, x4, x1, x2) - -inst_35711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:107133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107133*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_280) - -inst_35712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:107136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107136*FLEN/8, x4, x1, x2) - -inst_35713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:107139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107139*FLEN/8, x4, x1, x2) - -inst_35714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:107142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107142*FLEN/8, x4, x1, x2) - -inst_35715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:107145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107145*FLEN/8, x4, x1, x2) - -inst_35716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:107148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107148*FLEN/8, x4, x1, x2) - -inst_35717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:107151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107151*FLEN/8, x4, x1, x2) - -inst_35718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:107154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107154*FLEN/8, x4, x1, x2) - -inst_35719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:107157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107157*FLEN/8, x4, x1, x2) - -inst_35720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:107160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107160*FLEN/8, x4, x1, x2) - -inst_35721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:107163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107163*FLEN/8, x4, x1, x2) - -inst_35722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48800000; valaddr_reg:x3; val_offset:107166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107166*FLEN/8, x4, x1, x2) - -inst_35723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48800001; valaddr_reg:x3; val_offset:107169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107169*FLEN/8, x4, x1, x2) - -inst_35724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48800003; valaddr_reg:x3; val_offset:107172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107172*FLEN/8, x4, x1, x2) - -inst_35725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48800007; valaddr_reg:x3; val_offset:107175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107175*FLEN/8, x4, x1, x2) - -inst_35726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x4880000f; valaddr_reg:x3; val_offset:107178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107178*FLEN/8, x4, x1, x2) - -inst_35727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x4880001f; valaddr_reg:x3; val_offset:107181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107181*FLEN/8, x4, x1, x2) - -inst_35728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x4880003f; valaddr_reg:x3; val_offset:107184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107184*FLEN/8, x4, x1, x2) - -inst_35729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x4880007f; valaddr_reg:x3; val_offset:107187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107187*FLEN/8, x4, x1, x2) - -inst_35730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x488000ff; valaddr_reg:x3; val_offset:107190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107190*FLEN/8, x4, x1, x2) - -inst_35731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x488001ff; valaddr_reg:x3; val_offset:107193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107193*FLEN/8, x4, x1, x2) - -inst_35732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x488003ff; valaddr_reg:x3; val_offset:107196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107196*FLEN/8, x4, x1, x2) - -inst_35733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x488007ff; valaddr_reg:x3; val_offset:107199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107199*FLEN/8, x4, x1, x2) - -inst_35734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48800fff; valaddr_reg:x3; val_offset:107202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107202*FLEN/8, x4, x1, x2) - -inst_35735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48801fff; valaddr_reg:x3; val_offset:107205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107205*FLEN/8, x4, x1, x2) - -inst_35736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48803fff; valaddr_reg:x3; val_offset:107208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107208*FLEN/8, x4, x1, x2) - -inst_35737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48807fff; valaddr_reg:x3; val_offset:107211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107211*FLEN/8, x4, x1, x2) - -inst_35738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x4880ffff; valaddr_reg:x3; val_offset:107214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107214*FLEN/8, x4, x1, x2) - -inst_35739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x4881ffff; valaddr_reg:x3; val_offset:107217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107217*FLEN/8, x4, x1, x2) - -inst_35740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x4883ffff; valaddr_reg:x3; val_offset:107220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107220*FLEN/8, x4, x1, x2) - -inst_35741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x4887ffff; valaddr_reg:x3; val_offset:107223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107223*FLEN/8, x4, x1, x2) - -inst_35742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x488fffff; valaddr_reg:x3; val_offset:107226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107226*FLEN/8, x4, x1, x2) - -inst_35743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x489fffff; valaddr_reg:x3; val_offset:107229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107229*FLEN/8, x4, x1, x2) - -inst_35744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48bfffff; valaddr_reg:x3; val_offset:107232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107232*FLEN/8, x4, x1, x2) - -inst_35745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48c00000; valaddr_reg:x3; val_offset:107235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107235*FLEN/8, x4, x1, x2) - -inst_35746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48e00000; valaddr_reg:x3; val_offset:107238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107238*FLEN/8, x4, x1, x2) - -inst_35747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48f00000; valaddr_reg:x3; val_offset:107241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107241*FLEN/8, x4, x1, x2) - -inst_35748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48f80000; valaddr_reg:x3; val_offset:107244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107244*FLEN/8, x4, x1, x2) - -inst_35749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fc0000; valaddr_reg:x3; val_offset:107247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107247*FLEN/8, x4, x1, x2) - -inst_35750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fe0000; valaddr_reg:x3; val_offset:107250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107250*FLEN/8, x4, x1, x2) - -inst_35751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ff0000; valaddr_reg:x3; val_offset:107253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107253*FLEN/8, x4, x1, x2) - -inst_35752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ff8000; valaddr_reg:x3; val_offset:107256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107256*FLEN/8, x4, x1, x2) - -inst_35753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ffc000; valaddr_reg:x3; val_offset:107259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107259*FLEN/8, x4, x1, x2) - -inst_35754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ffe000; valaddr_reg:x3; val_offset:107262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107262*FLEN/8, x4, x1, x2) - -inst_35755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fff000; valaddr_reg:x3; val_offset:107265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107265*FLEN/8, x4, x1, x2) - -inst_35756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fff800; valaddr_reg:x3; val_offset:107268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107268*FLEN/8, x4, x1, x2) - -inst_35757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fffc00; valaddr_reg:x3; val_offset:107271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107271*FLEN/8, x4, x1, x2) - -inst_35758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fffe00; valaddr_reg:x3; val_offset:107274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107274*FLEN/8, x4, x1, x2) - -inst_35759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ffff00; valaddr_reg:x3; val_offset:107277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107277*FLEN/8, x4, x1, x2) - -inst_35760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ffff80; valaddr_reg:x3; val_offset:107280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107280*FLEN/8, x4, x1, x2) - -inst_35761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ffffc0; valaddr_reg:x3; val_offset:107283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107283*FLEN/8, x4, x1, x2) - -inst_35762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ffffe0; valaddr_reg:x3; val_offset:107286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107286*FLEN/8, x4, x1, x2) - -inst_35763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fffff0; valaddr_reg:x3; val_offset:107289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107289*FLEN/8, x4, x1, x2) - -inst_35764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fffff8; valaddr_reg:x3; val_offset:107292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107292*FLEN/8, x4, x1, x2) - -inst_35765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fffffc; valaddr_reg:x3; val_offset:107295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107295*FLEN/8, x4, x1, x2) - -inst_35766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48fffffe; valaddr_reg:x3; val_offset:107298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107298*FLEN/8, x4, x1, x2) - -inst_35767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; -op3val:0x48ffffff; valaddr_reg:x3; val_offset:107301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107301*FLEN/8, x4, x1, x2) - -inst_35768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd000000; valaddr_reg:x3; val_offset:107304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107304*FLEN/8, x4, x1, x2) - -inst_35769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd000001; valaddr_reg:x3; val_offset:107307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107307*FLEN/8, x4, x1, x2) - -inst_35770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd000003; valaddr_reg:x3; val_offset:107310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107310*FLEN/8, x4, x1, x2) - -inst_35771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd000007; valaddr_reg:x3; val_offset:107313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107313*FLEN/8, x4, x1, x2) - -inst_35772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd00000f; valaddr_reg:x3; val_offset:107316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107316*FLEN/8, x4, x1, x2) - -inst_35773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd00001f; valaddr_reg:x3; val_offset:107319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107319*FLEN/8, x4, x1, x2) - -inst_35774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd00003f; valaddr_reg:x3; val_offset:107322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107322*FLEN/8, x4, x1, x2) - -inst_35775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd00007f; valaddr_reg:x3; val_offset:107325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107325*FLEN/8, x4, x1, x2) - -inst_35776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd0000ff; valaddr_reg:x3; val_offset:107328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107328*FLEN/8, x4, x1, x2) - -inst_35777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd0001ff; valaddr_reg:x3; val_offset:107331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107331*FLEN/8, x4, x1, x2) - -inst_35778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd0003ff; valaddr_reg:x3; val_offset:107334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107334*FLEN/8, x4, x1, x2) - -inst_35779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd0007ff; valaddr_reg:x3; val_offset:107337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107337*FLEN/8, x4, x1, x2) - -inst_35780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd000fff; valaddr_reg:x3; val_offset:107340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107340*FLEN/8, x4, x1, x2) - -inst_35781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd001fff; valaddr_reg:x3; val_offset:107343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107343*FLEN/8, x4, x1, x2) - -inst_35782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd003fff; valaddr_reg:x3; val_offset:107346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107346*FLEN/8, x4, x1, x2) - -inst_35783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd007fff; valaddr_reg:x3; val_offset:107349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107349*FLEN/8, x4, x1, x2) - -inst_35784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd00ffff; valaddr_reg:x3; val_offset:107352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107352*FLEN/8, x4, x1, x2) - -inst_35785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd01ffff; valaddr_reg:x3; val_offset:107355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107355*FLEN/8, x4, x1, x2) - -inst_35786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd03ffff; valaddr_reg:x3; val_offset:107358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107358*FLEN/8, x4, x1, x2) - -inst_35787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd07ffff; valaddr_reg:x3; val_offset:107361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107361*FLEN/8, x4, x1, x2) - -inst_35788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd0fffff; valaddr_reg:x3; val_offset:107364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107364*FLEN/8, x4, x1, x2) - -inst_35789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd1fffff; valaddr_reg:x3; val_offset:107367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107367*FLEN/8, x4, x1, x2) - -inst_35790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd3fffff; valaddr_reg:x3; val_offset:107370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107370*FLEN/8, x4, x1, x2) - -inst_35791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd400000; valaddr_reg:x3; val_offset:107373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107373*FLEN/8, x4, x1, x2) - -inst_35792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd600000; valaddr_reg:x3; val_offset:107376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107376*FLEN/8, x4, x1, x2) - -inst_35793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd700000; valaddr_reg:x3; val_offset:107379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107379*FLEN/8, x4, x1, x2) - -inst_35794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd780000; valaddr_reg:x3; val_offset:107382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107382*FLEN/8, x4, x1, x2) - -inst_35795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7c0000; valaddr_reg:x3; val_offset:107385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107385*FLEN/8, x4, x1, x2) - -inst_35796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7e0000; valaddr_reg:x3; val_offset:107388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107388*FLEN/8, x4, x1, x2) - -inst_35797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7f0000; valaddr_reg:x3; val_offset:107391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107391*FLEN/8, x4, x1, x2) - -inst_35798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7f8000; valaddr_reg:x3; val_offset:107394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107394*FLEN/8, x4, x1, x2) - -inst_35799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7fc000; valaddr_reg:x3; val_offset:107397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107397*FLEN/8, x4, x1, x2) - -inst_35800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7fe000; valaddr_reg:x3; val_offset:107400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107400*FLEN/8, x4, x1, x2) - -inst_35801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7ff000; valaddr_reg:x3; val_offset:107403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107403*FLEN/8, x4, x1, x2) - -inst_35802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7ff800; valaddr_reg:x3; val_offset:107406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107406*FLEN/8, x4, x1, x2) - -inst_35803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7ffc00; valaddr_reg:x3; val_offset:107409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107409*FLEN/8, x4, x1, x2) - -inst_35804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7ffe00; valaddr_reg:x3; val_offset:107412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107412*FLEN/8, x4, x1, x2) - -inst_35805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7fff00; valaddr_reg:x3; val_offset:107415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107415*FLEN/8, x4, x1, x2) - -inst_35806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7fff80; valaddr_reg:x3; val_offset:107418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107418*FLEN/8, x4, x1, x2) - -inst_35807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7fffc0; valaddr_reg:x3; val_offset:107421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107421*FLEN/8, x4, x1, x2) - -inst_35808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7fffe0; valaddr_reg:x3; val_offset:107424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107424*FLEN/8, x4, x1, x2) - -inst_35809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7ffff0; valaddr_reg:x3; val_offset:107427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107427*FLEN/8, x4, x1, x2) - -inst_35810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7ffff8; valaddr_reg:x3; val_offset:107430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107430*FLEN/8, x4, x1, x2) - -inst_35811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7ffffc; valaddr_reg:x3; val_offset:107433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107433*FLEN/8, x4, x1, x2) - -inst_35812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7ffffe; valaddr_reg:x3; val_offset:107436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107436*FLEN/8, x4, x1, x2) - -inst_35813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbd7fffff; valaddr_reg:x3; val_offset:107439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107439*FLEN/8, x4, x1, x2) - -inst_35814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbf800001; valaddr_reg:x3; val_offset:107442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107442*FLEN/8, x4, x1, x2) - -inst_35815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbf800003; valaddr_reg:x3; val_offset:107445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107445*FLEN/8, x4, x1, x2) - -inst_35816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbf800007; valaddr_reg:x3; val_offset:107448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107448*FLEN/8, x4, x1, x2) - -inst_35817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbf999999; valaddr_reg:x3; val_offset:107451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107451*FLEN/8, x4, x1, x2) - -inst_35818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:107454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107454*FLEN/8, x4, x1, x2) - -inst_35819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:107457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107457*FLEN/8, x4, x1, x2) - -inst_35820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:107460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107460*FLEN/8, x4, x1, x2) - -inst_35821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:107463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107463*FLEN/8, x4, x1, x2) - -inst_35822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:107466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107466*FLEN/8, x4, x1, x2) - -inst_35823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:107469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107469*FLEN/8, x4, x1, x2) - -inst_35824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:107472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107472*FLEN/8, x4, x1, x2) - -inst_35825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:107475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107475*FLEN/8, x4, x1, x2) - -inst_35826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:107478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107478*FLEN/8, x4, x1, x2) - -inst_35827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:107481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107481*FLEN/8, x4, x1, x2) - -inst_35828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:107484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107484*FLEN/8, x4, x1, x2) - -inst_35829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:107487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107487*FLEN/8, x4, x1, x2) - -inst_35830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:107490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107490*FLEN/8, x4, x1, x2) - -inst_35831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:107493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107493*FLEN/8, x4, x1, x2) - -inst_35832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:107496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107496*FLEN/8, x4, x1, x2) - -inst_35833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:107499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107499*FLEN/8, x4, x1, x2) - -inst_35834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:107502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107502*FLEN/8, x4, x1, x2) - -inst_35835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:107505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107505*FLEN/8, x4, x1, x2) - -inst_35836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:107508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107508*FLEN/8, x4, x1, x2) - -inst_35837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:107511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107511*FLEN/8, x4, x1, x2) - -inst_35838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:107514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107514*FLEN/8, x4, x1, x2) - -inst_35839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:107517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107517*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_281) - -inst_35840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:107520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107520*FLEN/8, x4, x1, x2) - -inst_35841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:107523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107523*FLEN/8, x4, x1, x2) - -inst_35842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:107526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107526*FLEN/8, x4, x1, x2) - -inst_35843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:107529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107529*FLEN/8, x4, x1, x2) - -inst_35844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:107532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107532*FLEN/8, x4, x1, x2) - -inst_35845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:107535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107535*FLEN/8, x4, x1, x2) - -inst_35846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e800000; valaddr_reg:x3; val_offset:107538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107538*FLEN/8, x4, x1, x2) - -inst_35847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e800001; valaddr_reg:x3; val_offset:107541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107541*FLEN/8, x4, x1, x2) - -inst_35848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e800003; valaddr_reg:x3; val_offset:107544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107544*FLEN/8, x4, x1, x2) - -inst_35849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e800007; valaddr_reg:x3; val_offset:107547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107547*FLEN/8, x4, x1, x2) - -inst_35850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e80000f; valaddr_reg:x3; val_offset:107550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107550*FLEN/8, x4, x1, x2) - -inst_35851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e80001f; valaddr_reg:x3; val_offset:107553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107553*FLEN/8, x4, x1, x2) - -inst_35852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e80003f; valaddr_reg:x3; val_offset:107556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107556*FLEN/8, x4, x1, x2) - -inst_35853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e80007f; valaddr_reg:x3; val_offset:107559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107559*FLEN/8, x4, x1, x2) - -inst_35854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e8000ff; valaddr_reg:x3; val_offset:107562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107562*FLEN/8, x4, x1, x2) - -inst_35855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e8001ff; valaddr_reg:x3; val_offset:107565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107565*FLEN/8, x4, x1, x2) - -inst_35856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e8003ff; valaddr_reg:x3; val_offset:107568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107568*FLEN/8, x4, x1, x2) - -inst_35857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e8007ff; valaddr_reg:x3; val_offset:107571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107571*FLEN/8, x4, x1, x2) - -inst_35858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e800fff; valaddr_reg:x3; val_offset:107574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107574*FLEN/8, x4, x1, x2) - -inst_35859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e801fff; valaddr_reg:x3; val_offset:107577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107577*FLEN/8, x4, x1, x2) - -inst_35860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e803fff; valaddr_reg:x3; val_offset:107580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107580*FLEN/8, x4, x1, x2) - -inst_35861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e807fff; valaddr_reg:x3; val_offset:107583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107583*FLEN/8, x4, x1, x2) - -inst_35862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e80ffff; valaddr_reg:x3; val_offset:107586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107586*FLEN/8, x4, x1, x2) - -inst_35863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e81ffff; valaddr_reg:x3; val_offset:107589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107589*FLEN/8, x4, x1, x2) - -inst_35864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e83ffff; valaddr_reg:x3; val_offset:107592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107592*FLEN/8, x4, x1, x2) - -inst_35865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e87ffff; valaddr_reg:x3; val_offset:107595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107595*FLEN/8, x4, x1, x2) - -inst_35866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e8fffff; valaddr_reg:x3; val_offset:107598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107598*FLEN/8, x4, x1, x2) - -inst_35867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8e9fffff; valaddr_reg:x3; val_offset:107601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107601*FLEN/8, x4, x1, x2) - -inst_35868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8ebfffff; valaddr_reg:x3; val_offset:107604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107604*FLEN/8, x4, x1, x2) - -inst_35869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8ec00000; valaddr_reg:x3; val_offset:107607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107607*FLEN/8, x4, x1, x2) - -inst_35870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8ee00000; valaddr_reg:x3; val_offset:107610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107610*FLEN/8, x4, x1, x2) - -inst_35871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8ef00000; valaddr_reg:x3; val_offset:107613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107613*FLEN/8, x4, x1, x2) - -inst_35872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8ef80000; valaddr_reg:x3; val_offset:107616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107616*FLEN/8, x4, x1, x2) - -inst_35873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efc0000; valaddr_reg:x3; val_offset:107619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107619*FLEN/8, x4, x1, x2) - -inst_35874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efe0000; valaddr_reg:x3; val_offset:107622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107622*FLEN/8, x4, x1, x2) - -inst_35875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8eff0000; valaddr_reg:x3; val_offset:107625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107625*FLEN/8, x4, x1, x2) - -inst_35876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8eff8000; valaddr_reg:x3; val_offset:107628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107628*FLEN/8, x4, x1, x2) - -inst_35877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8effc000; valaddr_reg:x3; val_offset:107631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107631*FLEN/8, x4, x1, x2) - -inst_35878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8effe000; valaddr_reg:x3; val_offset:107634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107634*FLEN/8, x4, x1, x2) - -inst_35879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efff000; valaddr_reg:x3; val_offset:107637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107637*FLEN/8, x4, x1, x2) - -inst_35880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efff800; valaddr_reg:x3; val_offset:107640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107640*FLEN/8, x4, x1, x2) - -inst_35881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efffc00; valaddr_reg:x3; val_offset:107643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107643*FLEN/8, x4, x1, x2) - -inst_35882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efffe00; valaddr_reg:x3; val_offset:107646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107646*FLEN/8, x4, x1, x2) - -inst_35883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8effff00; valaddr_reg:x3; val_offset:107649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107649*FLEN/8, x4, x1, x2) - -inst_35884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8effff80; valaddr_reg:x3; val_offset:107652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107652*FLEN/8, x4, x1, x2) - -inst_35885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8effffc0; valaddr_reg:x3; val_offset:107655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107655*FLEN/8, x4, x1, x2) - -inst_35886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8effffe0; valaddr_reg:x3; val_offset:107658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107658*FLEN/8, x4, x1, x2) - -inst_35887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efffff0; valaddr_reg:x3; val_offset:107661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107661*FLEN/8, x4, x1, x2) - -inst_35888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efffff8; valaddr_reg:x3; val_offset:107664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107664*FLEN/8, x4, x1, x2) - -inst_35889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efffffc; valaddr_reg:x3; val_offset:107667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107667*FLEN/8, x4, x1, x2) - -inst_35890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8efffffe; valaddr_reg:x3; val_offset:107670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107670*FLEN/8, x4, x1, x2) - -inst_35891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; -op3val:0x8effffff; valaddr_reg:x3; val_offset:107673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107673*FLEN/8, x4, x1, x2) - -inst_35892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b800000; valaddr_reg:x3; val_offset:107676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107676*FLEN/8, x4, x1, x2) - -inst_35893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b800001; valaddr_reg:x3; val_offset:107679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107679*FLEN/8, x4, x1, x2) - -inst_35894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b800003; valaddr_reg:x3; val_offset:107682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107682*FLEN/8, x4, x1, x2) - -inst_35895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b800007; valaddr_reg:x3; val_offset:107685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107685*FLEN/8, x4, x1, x2) - -inst_35896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b80000f; valaddr_reg:x3; val_offset:107688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107688*FLEN/8, x4, x1, x2) - -inst_35897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b80001f; valaddr_reg:x3; val_offset:107691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107691*FLEN/8, x4, x1, x2) - -inst_35898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b80003f; valaddr_reg:x3; val_offset:107694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107694*FLEN/8, x4, x1, x2) - -inst_35899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b80007f; valaddr_reg:x3; val_offset:107697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107697*FLEN/8, x4, x1, x2) - -inst_35900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b8000ff; valaddr_reg:x3; val_offset:107700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107700*FLEN/8, x4, x1, x2) - -inst_35901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b8001ff; valaddr_reg:x3; val_offset:107703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107703*FLEN/8, x4, x1, x2) - -inst_35902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b8003ff; valaddr_reg:x3; val_offset:107706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107706*FLEN/8, x4, x1, x2) - -inst_35903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b8007ff; valaddr_reg:x3; val_offset:107709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107709*FLEN/8, x4, x1, x2) - -inst_35904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b800fff; valaddr_reg:x3; val_offset:107712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107712*FLEN/8, x4, x1, x2) - -inst_35905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b801fff; valaddr_reg:x3; val_offset:107715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107715*FLEN/8, x4, x1, x2) - -inst_35906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b803fff; valaddr_reg:x3; val_offset:107718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107718*FLEN/8, x4, x1, x2) - -inst_35907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b807fff; valaddr_reg:x3; val_offset:107721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107721*FLEN/8, x4, x1, x2) - -inst_35908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b80ffff; valaddr_reg:x3; val_offset:107724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107724*FLEN/8, x4, x1, x2) - -inst_35909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b81ffff; valaddr_reg:x3; val_offset:107727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107727*FLEN/8, x4, x1, x2) - -inst_35910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b83ffff; valaddr_reg:x3; val_offset:107730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107730*FLEN/8, x4, x1, x2) - -inst_35911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b87ffff; valaddr_reg:x3; val_offset:107733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107733*FLEN/8, x4, x1, x2) - -inst_35912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b8fffff; valaddr_reg:x3; val_offset:107736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107736*FLEN/8, x4, x1, x2) - -inst_35913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7b9fffff; valaddr_reg:x3; val_offset:107739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107739*FLEN/8, x4, x1, x2) - -inst_35914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bbfffff; valaddr_reg:x3; val_offset:107742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107742*FLEN/8, x4, x1, x2) - -inst_35915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bc00000; valaddr_reg:x3; val_offset:107745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107745*FLEN/8, x4, x1, x2) - -inst_35916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7be00000; valaddr_reg:x3; val_offset:107748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107748*FLEN/8, x4, x1, x2) - -inst_35917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bf00000; valaddr_reg:x3; val_offset:107751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107751*FLEN/8, x4, x1, x2) - -inst_35918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bf80000; valaddr_reg:x3; val_offset:107754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107754*FLEN/8, x4, x1, x2) - -inst_35919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfc0000; valaddr_reg:x3; val_offset:107757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107757*FLEN/8, x4, x1, x2) - -inst_35920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfe0000; valaddr_reg:x3; val_offset:107760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107760*FLEN/8, x4, x1, x2) - -inst_35921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bff0000; valaddr_reg:x3; val_offset:107763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107763*FLEN/8, x4, x1, x2) - -inst_35922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bff8000; valaddr_reg:x3; val_offset:107766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107766*FLEN/8, x4, x1, x2) - -inst_35923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bffc000; valaddr_reg:x3; val_offset:107769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107769*FLEN/8, x4, x1, x2) - -inst_35924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bffe000; valaddr_reg:x3; val_offset:107772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107772*FLEN/8, x4, x1, x2) - -inst_35925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfff000; valaddr_reg:x3; val_offset:107775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107775*FLEN/8, x4, x1, x2) - -inst_35926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfff800; valaddr_reg:x3; val_offset:107778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107778*FLEN/8, x4, x1, x2) - -inst_35927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfffc00; valaddr_reg:x3; val_offset:107781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107781*FLEN/8, x4, x1, x2) - -inst_35928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfffe00; valaddr_reg:x3; val_offset:107784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107784*FLEN/8, x4, x1, x2) - -inst_35929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bffff00; valaddr_reg:x3; val_offset:107787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107787*FLEN/8, x4, x1, x2) - -inst_35930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bffff80; valaddr_reg:x3; val_offset:107790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107790*FLEN/8, x4, x1, x2) - -inst_35931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bffffc0; valaddr_reg:x3; val_offset:107793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107793*FLEN/8, x4, x1, x2) - -inst_35932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bffffe0; valaddr_reg:x3; val_offset:107796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107796*FLEN/8, x4, x1, x2) - -inst_35933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfffff0; valaddr_reg:x3; val_offset:107799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107799*FLEN/8, x4, x1, x2) - -inst_35934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfffff8; valaddr_reg:x3; val_offset:107802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107802*FLEN/8, x4, x1, x2) - -inst_35935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfffffc; valaddr_reg:x3; val_offset:107805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107805*FLEN/8, x4, x1, x2) - -inst_35936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bfffffe; valaddr_reg:x3; val_offset:107808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107808*FLEN/8, x4, x1, x2) - -inst_35937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7bffffff; valaddr_reg:x3; val_offset:107811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107811*FLEN/8, x4, x1, x2) - -inst_35938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f000001; valaddr_reg:x3; val_offset:107814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107814*FLEN/8, x4, x1, x2) - -inst_35939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f000003; valaddr_reg:x3; val_offset:107817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107817*FLEN/8, x4, x1, x2) - -inst_35940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f000007; valaddr_reg:x3; val_offset:107820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107820*FLEN/8, x4, x1, x2) - -inst_35941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f199999; valaddr_reg:x3; val_offset:107823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107823*FLEN/8, x4, x1, x2) - -inst_35942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f249249; valaddr_reg:x3; val_offset:107826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107826*FLEN/8, x4, x1, x2) - -inst_35943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f333333; valaddr_reg:x3; val_offset:107829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107829*FLEN/8, x4, x1, x2) - -inst_35944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:107832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107832*FLEN/8, x4, x1, x2) - -inst_35945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:107835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107835*FLEN/8, x4, x1, x2) - -inst_35946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f444444; valaddr_reg:x3; val_offset:107838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107838*FLEN/8, x4, x1, x2) - -inst_35947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:107841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107841*FLEN/8, x4, x1, x2) - -inst_35948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:107844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107844*FLEN/8, x4, x1, x2) - -inst_35949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f666666; valaddr_reg:x3; val_offset:107847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107847*FLEN/8, x4, x1, x2) - -inst_35950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:107850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107850*FLEN/8, x4, x1, x2) - -inst_35951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:107853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107853*FLEN/8, x4, x1, x2) - -inst_35952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:107856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107856*FLEN/8, x4, x1, x2) - -inst_35953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:107859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107859*FLEN/8, x4, x1, x2) - -inst_35954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a000000; valaddr_reg:x3; val_offset:107862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107862*FLEN/8, x4, x1, x2) - -inst_35955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a000001; valaddr_reg:x3; val_offset:107865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107865*FLEN/8, x4, x1, x2) - -inst_35956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a000003; valaddr_reg:x3; val_offset:107868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107868*FLEN/8, x4, x1, x2) - -inst_35957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a000007; valaddr_reg:x3; val_offset:107871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107871*FLEN/8, x4, x1, x2) - -inst_35958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a00000f; valaddr_reg:x3; val_offset:107874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107874*FLEN/8, x4, x1, x2) - -inst_35959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a00001f; valaddr_reg:x3; val_offset:107877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107877*FLEN/8, x4, x1, x2) - -inst_35960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a00003f; valaddr_reg:x3; val_offset:107880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107880*FLEN/8, x4, x1, x2) - -inst_35961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a00007f; valaddr_reg:x3; val_offset:107883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107883*FLEN/8, x4, x1, x2) - -inst_35962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a0000ff; valaddr_reg:x3; val_offset:107886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107886*FLEN/8, x4, x1, x2) - -inst_35963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a0001ff; valaddr_reg:x3; val_offset:107889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107889*FLEN/8, x4, x1, x2) - -inst_35964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a0003ff; valaddr_reg:x3; val_offset:107892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107892*FLEN/8, x4, x1, x2) - -inst_35965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a0007ff; valaddr_reg:x3; val_offset:107895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107895*FLEN/8, x4, x1, x2) - -inst_35966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a000fff; valaddr_reg:x3; val_offset:107898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107898*FLEN/8, x4, x1, x2) - -inst_35967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a001fff; valaddr_reg:x3; val_offset:107901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107901*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_282) - -inst_35968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a003fff; valaddr_reg:x3; val_offset:107904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107904*FLEN/8, x4, x1, x2) - -inst_35969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a007fff; valaddr_reg:x3; val_offset:107907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107907*FLEN/8, x4, x1, x2) - -inst_35970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a00ffff; valaddr_reg:x3; val_offset:107910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107910*FLEN/8, x4, x1, x2) - -inst_35971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a01ffff; valaddr_reg:x3; val_offset:107913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107913*FLEN/8, x4, x1, x2) - -inst_35972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a03ffff; valaddr_reg:x3; val_offset:107916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107916*FLEN/8, x4, x1, x2) - -inst_35973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a07ffff; valaddr_reg:x3; val_offset:107919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107919*FLEN/8, x4, x1, x2) - -inst_35974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a0fffff; valaddr_reg:x3; val_offset:107922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107922*FLEN/8, x4, x1, x2) - -inst_35975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a1fffff; valaddr_reg:x3; val_offset:107925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107925*FLEN/8, x4, x1, x2) - -inst_35976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a3fffff; valaddr_reg:x3; val_offset:107928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107928*FLEN/8, x4, x1, x2) - -inst_35977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a400000; valaddr_reg:x3; val_offset:107931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107931*FLEN/8, x4, x1, x2) - -inst_35978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a600000; valaddr_reg:x3; val_offset:107934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107934*FLEN/8, x4, x1, x2) - -inst_35979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a700000; valaddr_reg:x3; val_offset:107937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107937*FLEN/8, x4, x1, x2) - -inst_35980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a780000; valaddr_reg:x3; val_offset:107940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107940*FLEN/8, x4, x1, x2) - -inst_35981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7c0000; valaddr_reg:x3; val_offset:107943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107943*FLEN/8, x4, x1, x2) - -inst_35982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7e0000; valaddr_reg:x3; val_offset:107946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107946*FLEN/8, x4, x1, x2) - -inst_35983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7f0000; valaddr_reg:x3; val_offset:107949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107949*FLEN/8, x4, x1, x2) - -inst_35984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7f8000; valaddr_reg:x3; val_offset:107952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107952*FLEN/8, x4, x1, x2) - -inst_35985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7fc000; valaddr_reg:x3; val_offset:107955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107955*FLEN/8, x4, x1, x2) - -inst_35986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7fe000; valaddr_reg:x3; val_offset:107958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107958*FLEN/8, x4, x1, x2) - -inst_35987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7ff000; valaddr_reg:x3; val_offset:107961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107961*FLEN/8, x4, x1, x2) - -inst_35988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7ff800; valaddr_reg:x3; val_offset:107964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107964*FLEN/8, x4, x1, x2) - -inst_35989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7ffc00; valaddr_reg:x3; val_offset:107967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107967*FLEN/8, x4, x1, x2) - -inst_35990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7ffe00; valaddr_reg:x3; val_offset:107970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107970*FLEN/8, x4, x1, x2) - -inst_35991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7fff00; valaddr_reg:x3; val_offset:107973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107973*FLEN/8, x4, x1, x2) - -inst_35992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7fff80; valaddr_reg:x3; val_offset:107976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107976*FLEN/8, x4, x1, x2) - -inst_35993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7fffc0; valaddr_reg:x3; val_offset:107979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107979*FLEN/8, x4, x1, x2) - -inst_35994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7fffe0; valaddr_reg:x3; val_offset:107982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107982*FLEN/8, x4, x1, x2) - -inst_35995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7ffff0; valaddr_reg:x3; val_offset:107985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107985*FLEN/8, x4, x1, x2) - -inst_35996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7ffff8; valaddr_reg:x3; val_offset:107988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107988*FLEN/8, x4, x1, x2) - -inst_35997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7ffffc; valaddr_reg:x3; val_offset:107991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107991*FLEN/8, x4, x1, x2) - -inst_35998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7ffffe; valaddr_reg:x3; val_offset:107994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107994*FLEN/8, x4, x1, x2) - -inst_35999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x6a7fffff; valaddr_reg:x3; val_offset:107997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107997*FLEN/8, x4, x1, x2) - -inst_36000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f000001; valaddr_reg:x3; val_offset:108000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108000*FLEN/8, x4, x1, x2) - -inst_36001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f000003; valaddr_reg:x3; val_offset:108003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108003*FLEN/8, x4, x1, x2) - -inst_36002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f000007; valaddr_reg:x3; val_offset:108006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108006*FLEN/8, x4, x1, x2) - -inst_36003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f199999; valaddr_reg:x3; val_offset:108009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108009*FLEN/8, x4, x1, x2) - -inst_36004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f249249; valaddr_reg:x3; val_offset:108012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108012*FLEN/8, x4, x1, x2) - -inst_36005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f333333; valaddr_reg:x3; val_offset:108015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108015*FLEN/8, x4, x1, x2) - -inst_36006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:108018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108018*FLEN/8, x4, x1, x2) - -inst_36007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:108021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108021*FLEN/8, x4, x1, x2) - -inst_36008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f444444; valaddr_reg:x3; val_offset:108024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108024*FLEN/8, x4, x1, x2) - -inst_36009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:108027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108027*FLEN/8, x4, x1, x2) - -inst_36010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:108030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108030*FLEN/8, x4, x1, x2) - -inst_36011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f666666; valaddr_reg:x3; val_offset:108033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108033*FLEN/8, x4, x1, x2) - -inst_36012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:108036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108036*FLEN/8, x4, x1, x2) - -inst_36013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:108039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108039*FLEN/8, x4, x1, x2) - -inst_36014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:108042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108042*FLEN/8, x4, x1, x2) - -inst_36015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:108045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108045*FLEN/8, x4, x1, x2) - -inst_36016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:108048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108048*FLEN/8, x4, x1, x2) - -inst_36017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:108051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108051*FLEN/8, x4, x1, x2) - -inst_36018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:108054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108054*FLEN/8, x4, x1, x2) - -inst_36019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:108057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108057*FLEN/8, x4, x1, x2) - -inst_36020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:108060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108060*FLEN/8, x4, x1, x2) - -inst_36021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:108063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108063*FLEN/8, x4, x1, x2) - -inst_36022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:108066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108066*FLEN/8, x4, x1, x2) - -inst_36023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:108069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108069*FLEN/8, x4, x1, x2) - -inst_36024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:108072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108072*FLEN/8, x4, x1, x2) - -inst_36025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:108075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108075*FLEN/8, x4, x1, x2) - -inst_36026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:108078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108078*FLEN/8, x4, x1, x2) - -inst_36027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:108081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108081*FLEN/8, x4, x1, x2) - -inst_36028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:108084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108084*FLEN/8, x4, x1, x2) - -inst_36029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:108087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108087*FLEN/8, x4, x1, x2) - -inst_36030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:108090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108090*FLEN/8, x4, x1, x2) - -inst_36031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:108093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108093*FLEN/8, x4, x1, x2) - -inst_36032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88800000; valaddr_reg:x3; val_offset:108096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108096*FLEN/8, x4, x1, x2) - -inst_36033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88800001; valaddr_reg:x3; val_offset:108099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108099*FLEN/8, x4, x1, x2) - -inst_36034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88800003; valaddr_reg:x3; val_offset:108102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108102*FLEN/8, x4, x1, x2) - -inst_36035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88800007; valaddr_reg:x3; val_offset:108105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108105*FLEN/8, x4, x1, x2) - -inst_36036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8880000f; valaddr_reg:x3; val_offset:108108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108108*FLEN/8, x4, x1, x2) - -inst_36037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8880001f; valaddr_reg:x3; val_offset:108111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108111*FLEN/8, x4, x1, x2) - -inst_36038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8880003f; valaddr_reg:x3; val_offset:108114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108114*FLEN/8, x4, x1, x2) - -inst_36039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8880007f; valaddr_reg:x3; val_offset:108117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108117*FLEN/8, x4, x1, x2) - -inst_36040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x888000ff; valaddr_reg:x3; val_offset:108120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108120*FLEN/8, x4, x1, x2) - -inst_36041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x888001ff; valaddr_reg:x3; val_offset:108123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108123*FLEN/8, x4, x1, x2) - -inst_36042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x888003ff; valaddr_reg:x3; val_offset:108126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108126*FLEN/8, x4, x1, x2) - -inst_36043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x888007ff; valaddr_reg:x3; val_offset:108129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108129*FLEN/8, x4, x1, x2) - -inst_36044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88800fff; valaddr_reg:x3; val_offset:108132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108132*FLEN/8, x4, x1, x2) - -inst_36045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88801fff; valaddr_reg:x3; val_offset:108135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108135*FLEN/8, x4, x1, x2) - -inst_36046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88803fff; valaddr_reg:x3; val_offset:108138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108138*FLEN/8, x4, x1, x2) - -inst_36047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88807fff; valaddr_reg:x3; val_offset:108141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108141*FLEN/8, x4, x1, x2) - -inst_36048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8880ffff; valaddr_reg:x3; val_offset:108144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108144*FLEN/8, x4, x1, x2) - -inst_36049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8881ffff; valaddr_reg:x3; val_offset:108147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108147*FLEN/8, x4, x1, x2) - -inst_36050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8883ffff; valaddr_reg:x3; val_offset:108150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108150*FLEN/8, x4, x1, x2) - -inst_36051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x8887ffff; valaddr_reg:x3; val_offset:108153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108153*FLEN/8, x4, x1, x2) - -inst_36052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x888fffff; valaddr_reg:x3; val_offset:108156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108156*FLEN/8, x4, x1, x2) - -inst_36053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x889fffff; valaddr_reg:x3; val_offset:108159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108159*FLEN/8, x4, x1, x2) - -inst_36054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88bfffff; valaddr_reg:x3; val_offset:108162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108162*FLEN/8, x4, x1, x2) - -inst_36055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88c00000; valaddr_reg:x3; val_offset:108165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108165*FLEN/8, x4, x1, x2) - -inst_36056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88e00000; valaddr_reg:x3; val_offset:108168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108168*FLEN/8, x4, x1, x2) - -inst_36057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88f00000; valaddr_reg:x3; val_offset:108171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108171*FLEN/8, x4, x1, x2) - -inst_36058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88f80000; valaddr_reg:x3; val_offset:108174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108174*FLEN/8, x4, x1, x2) - -inst_36059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fc0000; valaddr_reg:x3; val_offset:108177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108177*FLEN/8, x4, x1, x2) - -inst_36060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fe0000; valaddr_reg:x3; val_offset:108180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108180*FLEN/8, x4, x1, x2) - -inst_36061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ff0000; valaddr_reg:x3; val_offset:108183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108183*FLEN/8, x4, x1, x2) - -inst_36062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ff8000; valaddr_reg:x3; val_offset:108186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108186*FLEN/8, x4, x1, x2) - -inst_36063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ffc000; valaddr_reg:x3; val_offset:108189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108189*FLEN/8, x4, x1, x2) - -inst_36064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ffe000; valaddr_reg:x3; val_offset:108192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108192*FLEN/8, x4, x1, x2) - -inst_36065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fff000; valaddr_reg:x3; val_offset:108195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108195*FLEN/8, x4, x1, x2) - -inst_36066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fff800; valaddr_reg:x3; val_offset:108198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108198*FLEN/8, x4, x1, x2) - -inst_36067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fffc00; valaddr_reg:x3; val_offset:108201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108201*FLEN/8, x4, x1, x2) - -inst_36068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fffe00; valaddr_reg:x3; val_offset:108204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108204*FLEN/8, x4, x1, x2) - -inst_36069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ffff00; valaddr_reg:x3; val_offset:108207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108207*FLEN/8, x4, x1, x2) - -inst_36070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ffff80; valaddr_reg:x3; val_offset:108210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108210*FLEN/8, x4, x1, x2) - -inst_36071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ffffc0; valaddr_reg:x3; val_offset:108213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108213*FLEN/8, x4, x1, x2) - -inst_36072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ffffe0; valaddr_reg:x3; val_offset:108216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108216*FLEN/8, x4, x1, x2) - -inst_36073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fffff0; valaddr_reg:x3; val_offset:108219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108219*FLEN/8, x4, x1, x2) - -inst_36074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fffff8; valaddr_reg:x3; val_offset:108222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108222*FLEN/8, x4, x1, x2) - -inst_36075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fffffc; valaddr_reg:x3; val_offset:108225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108225*FLEN/8, x4, x1, x2) - -inst_36076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88fffffe; valaddr_reg:x3; val_offset:108228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108228*FLEN/8, x4, x1, x2) - -inst_36077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; -op3val:0x88ffffff; valaddr_reg:x3; val_offset:108231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108231*FLEN/8, x4, x1, x2) - -inst_36078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:108234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108234*FLEN/8, x4, x1, x2) - -inst_36079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:108237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108237*FLEN/8, x4, x1, x2) - -inst_36080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:108240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108240*FLEN/8, x4, x1, x2) - -inst_36081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:108243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108243*FLEN/8, x4, x1, x2) - -inst_36082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:108246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108246*FLEN/8, x4, x1, x2) - -inst_36083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:108249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108249*FLEN/8, x4, x1, x2) - -inst_36084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:108252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108252*FLEN/8, x4, x1, x2) - -inst_36085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:108255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108255*FLEN/8, x4, x1, x2) - -inst_36086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:108258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108258*FLEN/8, x4, x1, x2) - -inst_36087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:108261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108261*FLEN/8, x4, x1, x2) - -inst_36088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:108264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108264*FLEN/8, x4, x1, x2) - -inst_36089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:108267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108267*FLEN/8, x4, x1, x2) - -inst_36090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:108270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108270*FLEN/8, x4, x1, x2) - -inst_36091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:108273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108273*FLEN/8, x4, x1, x2) - -inst_36092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:108276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108276*FLEN/8, x4, x1, x2) - -inst_36093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:108279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108279*FLEN/8, x4, x1, x2) - -inst_36094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86000000; valaddr_reg:x3; val_offset:108282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108282*FLEN/8, x4, x1, x2) - -inst_36095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86000001; valaddr_reg:x3; val_offset:108285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108285*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_283) - -inst_36096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86000003; valaddr_reg:x3; val_offset:108288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108288*FLEN/8, x4, x1, x2) - -inst_36097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86000007; valaddr_reg:x3; val_offset:108291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108291*FLEN/8, x4, x1, x2) - -inst_36098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x8600000f; valaddr_reg:x3; val_offset:108294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108294*FLEN/8, x4, x1, x2) - -inst_36099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x8600001f; valaddr_reg:x3; val_offset:108297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108297*FLEN/8, x4, x1, x2) - -inst_36100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x8600003f; valaddr_reg:x3; val_offset:108300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108300*FLEN/8, x4, x1, x2) - -inst_36101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x8600007f; valaddr_reg:x3; val_offset:108303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108303*FLEN/8, x4, x1, x2) - -inst_36102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x860000ff; valaddr_reg:x3; val_offset:108306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108306*FLEN/8, x4, x1, x2) - -inst_36103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x860001ff; valaddr_reg:x3; val_offset:108309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108309*FLEN/8, x4, x1, x2) - -inst_36104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x860003ff; valaddr_reg:x3; val_offset:108312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108312*FLEN/8, x4, x1, x2) - -inst_36105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x860007ff; valaddr_reg:x3; val_offset:108315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108315*FLEN/8, x4, x1, x2) - -inst_36106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86000fff; valaddr_reg:x3; val_offset:108318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108318*FLEN/8, x4, x1, x2) - -inst_36107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86001fff; valaddr_reg:x3; val_offset:108321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108321*FLEN/8, x4, x1, x2) - -inst_36108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86003fff; valaddr_reg:x3; val_offset:108324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108324*FLEN/8, x4, x1, x2) - -inst_36109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86007fff; valaddr_reg:x3; val_offset:108327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108327*FLEN/8, x4, x1, x2) - -inst_36110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x8600ffff; valaddr_reg:x3; val_offset:108330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108330*FLEN/8, x4, x1, x2) - -inst_36111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x8601ffff; valaddr_reg:x3; val_offset:108333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108333*FLEN/8, x4, x1, x2) - -inst_36112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x8603ffff; valaddr_reg:x3; val_offset:108336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108336*FLEN/8, x4, x1, x2) - -inst_36113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x8607ffff; valaddr_reg:x3; val_offset:108339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108339*FLEN/8, x4, x1, x2) - -inst_36114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x860fffff; valaddr_reg:x3; val_offset:108342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108342*FLEN/8, x4, x1, x2) - -inst_36115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x861fffff; valaddr_reg:x3; val_offset:108345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108345*FLEN/8, x4, x1, x2) - -inst_36116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x863fffff; valaddr_reg:x3; val_offset:108348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108348*FLEN/8, x4, x1, x2) - -inst_36117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86400000; valaddr_reg:x3; val_offset:108351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108351*FLEN/8, x4, x1, x2) - -inst_36118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86600000; valaddr_reg:x3; val_offset:108354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108354*FLEN/8, x4, x1, x2) - -inst_36119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86700000; valaddr_reg:x3; val_offset:108357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108357*FLEN/8, x4, x1, x2) - -inst_36120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x86780000; valaddr_reg:x3; val_offset:108360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108360*FLEN/8, x4, x1, x2) - -inst_36121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867c0000; valaddr_reg:x3; val_offset:108363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108363*FLEN/8, x4, x1, x2) - -inst_36122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867e0000; valaddr_reg:x3; val_offset:108366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108366*FLEN/8, x4, x1, x2) - -inst_36123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867f0000; valaddr_reg:x3; val_offset:108369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108369*FLEN/8, x4, x1, x2) - -inst_36124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867f8000; valaddr_reg:x3; val_offset:108372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108372*FLEN/8, x4, x1, x2) - -inst_36125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867fc000; valaddr_reg:x3; val_offset:108375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108375*FLEN/8, x4, x1, x2) - -inst_36126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867fe000; valaddr_reg:x3; val_offset:108378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108378*FLEN/8, x4, x1, x2) - -inst_36127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867ff000; valaddr_reg:x3; val_offset:108381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108381*FLEN/8, x4, x1, x2) - -inst_36128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867ff800; valaddr_reg:x3; val_offset:108384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108384*FLEN/8, x4, x1, x2) - -inst_36129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867ffc00; valaddr_reg:x3; val_offset:108387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108387*FLEN/8, x4, x1, x2) - -inst_36130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867ffe00; valaddr_reg:x3; val_offset:108390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108390*FLEN/8, x4, x1, x2) - -inst_36131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867fff00; valaddr_reg:x3; val_offset:108393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108393*FLEN/8, x4, x1, x2) - -inst_36132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867fff80; valaddr_reg:x3; val_offset:108396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108396*FLEN/8, x4, x1, x2) - -inst_36133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867fffc0; valaddr_reg:x3; val_offset:108399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108399*FLEN/8, x4, x1, x2) - -inst_36134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867fffe0; valaddr_reg:x3; val_offset:108402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108402*FLEN/8, x4, x1, x2) - -inst_36135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867ffff0; valaddr_reg:x3; val_offset:108405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108405*FLEN/8, x4, x1, x2) - -inst_36136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867ffff8; valaddr_reg:x3; val_offset:108408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108408*FLEN/8, x4, x1, x2) - -inst_36137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867ffffc; valaddr_reg:x3; val_offset:108411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108411*FLEN/8, x4, x1, x2) - -inst_36138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867ffffe; valaddr_reg:x3; val_offset:108414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108414*FLEN/8, x4, x1, x2) - -inst_36139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; -op3val:0x867fffff; valaddr_reg:x3; val_offset:108417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108417*FLEN/8, x4, x1, x2) - -inst_36140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:108420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108420*FLEN/8, x4, x1, x2) - -inst_36141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:108423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108423*FLEN/8, x4, x1, x2) - -inst_36142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:108426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108426*FLEN/8, x4, x1, x2) - -inst_36143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:108429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108429*FLEN/8, x4, x1, x2) - -inst_36144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:108432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108432*FLEN/8, x4, x1, x2) - -inst_36145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:108435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108435*FLEN/8, x4, x1, x2) - -inst_36146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:108438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108438*FLEN/8, x4, x1, x2) - -inst_36147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:108441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108441*FLEN/8, x4, x1, x2) - -inst_36148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:108444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108444*FLEN/8, x4, x1, x2) - -inst_36149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:108447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108447*FLEN/8, x4, x1, x2) - -inst_36150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:108450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108450*FLEN/8, x4, x1, x2) - -inst_36151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:108453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108453*FLEN/8, x4, x1, x2) - -inst_36152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:108456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108456*FLEN/8, x4, x1, x2) - -inst_36153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:108459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108459*FLEN/8, x4, x1, x2) - -inst_36154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:108462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108462*FLEN/8, x4, x1, x2) - -inst_36155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:108465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108465*FLEN/8, x4, x1, x2) - -inst_36156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f800000; valaddr_reg:x3; val_offset:108468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108468*FLEN/8, x4, x1, x2) - -inst_36157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f800001; valaddr_reg:x3; val_offset:108471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108471*FLEN/8, x4, x1, x2) - -inst_36158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f800003; valaddr_reg:x3; val_offset:108474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108474*FLEN/8, x4, x1, x2) - -inst_36159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f800007; valaddr_reg:x3; val_offset:108477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108477*FLEN/8, x4, x1, x2) - -inst_36160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f80000f; valaddr_reg:x3; val_offset:108480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108480*FLEN/8, x4, x1, x2) - -inst_36161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f80001f; valaddr_reg:x3; val_offset:108483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108483*FLEN/8, x4, x1, x2) - -inst_36162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f80003f; valaddr_reg:x3; val_offset:108486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108486*FLEN/8, x4, x1, x2) - -inst_36163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f80007f; valaddr_reg:x3; val_offset:108489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108489*FLEN/8, x4, x1, x2) - -inst_36164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f8000ff; valaddr_reg:x3; val_offset:108492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108492*FLEN/8, x4, x1, x2) - -inst_36165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f8001ff; valaddr_reg:x3; val_offset:108495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108495*FLEN/8, x4, x1, x2) - -inst_36166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f8003ff; valaddr_reg:x3; val_offset:108498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108498*FLEN/8, x4, x1, x2) - -inst_36167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f8007ff; valaddr_reg:x3; val_offset:108501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108501*FLEN/8, x4, x1, x2) - -inst_36168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f800fff; valaddr_reg:x3; val_offset:108504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108504*FLEN/8, x4, x1, x2) - -inst_36169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f801fff; valaddr_reg:x3; val_offset:108507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108507*FLEN/8, x4, x1, x2) - -inst_36170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f803fff; valaddr_reg:x3; val_offset:108510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108510*FLEN/8, x4, x1, x2) - -inst_36171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f807fff; valaddr_reg:x3; val_offset:108513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108513*FLEN/8, x4, x1, x2) - -inst_36172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f80ffff; valaddr_reg:x3; val_offset:108516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108516*FLEN/8, x4, x1, x2) - -inst_36173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f81ffff; valaddr_reg:x3; val_offset:108519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108519*FLEN/8, x4, x1, x2) - -inst_36174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f83ffff; valaddr_reg:x3; val_offset:108522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108522*FLEN/8, x4, x1, x2) - -inst_36175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f87ffff; valaddr_reg:x3; val_offset:108525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108525*FLEN/8, x4, x1, x2) - -inst_36176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f8fffff; valaddr_reg:x3; val_offset:108528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108528*FLEN/8, x4, x1, x2) - -inst_36177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8f9fffff; valaddr_reg:x3; val_offset:108531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108531*FLEN/8, x4, x1, x2) - -inst_36178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fbfffff; valaddr_reg:x3; val_offset:108534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108534*FLEN/8, x4, x1, x2) - -inst_36179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fc00000; valaddr_reg:x3; val_offset:108537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108537*FLEN/8, x4, x1, x2) - -inst_36180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fe00000; valaddr_reg:x3; val_offset:108540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108540*FLEN/8, x4, x1, x2) - -inst_36181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ff00000; valaddr_reg:x3; val_offset:108543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108543*FLEN/8, x4, x1, x2) - -inst_36182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ff80000; valaddr_reg:x3; val_offset:108546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108546*FLEN/8, x4, x1, x2) - -inst_36183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffc0000; valaddr_reg:x3; val_offset:108549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108549*FLEN/8, x4, x1, x2) - -inst_36184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffe0000; valaddr_reg:x3; val_offset:108552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108552*FLEN/8, x4, x1, x2) - -inst_36185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fff0000; valaddr_reg:x3; val_offset:108555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108555*FLEN/8, x4, x1, x2) - -inst_36186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fff8000; valaddr_reg:x3; val_offset:108558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108558*FLEN/8, x4, x1, x2) - -inst_36187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fffc000; valaddr_reg:x3; val_offset:108561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108561*FLEN/8, x4, x1, x2) - -inst_36188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fffe000; valaddr_reg:x3; val_offset:108564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108564*FLEN/8, x4, x1, x2) - -inst_36189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffff000; valaddr_reg:x3; val_offset:108567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108567*FLEN/8, x4, x1, x2) - -inst_36190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffff800; valaddr_reg:x3; val_offset:108570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108570*FLEN/8, x4, x1, x2) - -inst_36191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffffc00; valaddr_reg:x3; val_offset:108573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108573*FLEN/8, x4, x1, x2) - -inst_36192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffffe00; valaddr_reg:x3; val_offset:108576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108576*FLEN/8, x4, x1, x2) - -inst_36193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fffff00; valaddr_reg:x3; val_offset:108579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108579*FLEN/8, x4, x1, x2) - -inst_36194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fffff80; valaddr_reg:x3; val_offset:108582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108582*FLEN/8, x4, x1, x2) - -inst_36195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fffffc0; valaddr_reg:x3; val_offset:108585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108585*FLEN/8, x4, x1, x2) - -inst_36196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fffffe0; valaddr_reg:x3; val_offset:108588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108588*FLEN/8, x4, x1, x2) - -inst_36197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffffff0; valaddr_reg:x3; val_offset:108591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108591*FLEN/8, x4, x1, x2) - -inst_36198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffffff8; valaddr_reg:x3; val_offset:108594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108594*FLEN/8, x4, x1, x2) - -inst_36199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffffffc; valaddr_reg:x3; val_offset:108597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108597*FLEN/8, x4, x1, x2) - -inst_36200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8ffffffe; valaddr_reg:x3; val_offset:108600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108600*FLEN/8, x4, x1, x2) - -inst_36201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; -op3val:0x8fffffff; valaddr_reg:x3; val_offset:108603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108603*FLEN/8, x4, x1, x2) - -inst_36202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:108606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108606*FLEN/8, x4, x1, x2) - -inst_36203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:108609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108609*FLEN/8, x4, x1, x2) - -inst_36204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:108612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108612*FLEN/8, x4, x1, x2) - -inst_36205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:108615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108615*FLEN/8, x4, x1, x2) - -inst_36206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:108618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108618*FLEN/8, x4, x1, x2) - -inst_36207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:108621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108621*FLEN/8, x4, x1, x2) - -inst_36208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:108624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108624*FLEN/8, x4, x1, x2) - -inst_36209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:108627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108627*FLEN/8, x4, x1, x2) - -inst_36210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:108630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108630*FLEN/8, x4, x1, x2) - -inst_36211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:108633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108633*FLEN/8, x4, x1, x2) - -inst_36212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:108636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108636*FLEN/8, x4, x1, x2) - -inst_36213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:108639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108639*FLEN/8, x4, x1, x2) - -inst_36214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:108642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108642*FLEN/8, x4, x1, x2) - -inst_36215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:108645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108645*FLEN/8, x4, x1, x2) - -inst_36216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:108648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108648*FLEN/8, x4, x1, x2) - -inst_36217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:108651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108651*FLEN/8, x4, x1, x2) - -inst_36218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f000000; valaddr_reg:x3; val_offset:108654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108654*FLEN/8, x4, x1, x2) - -inst_36219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f000001; valaddr_reg:x3; val_offset:108657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108657*FLEN/8, x4, x1, x2) - -inst_36220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f000003; valaddr_reg:x3; val_offset:108660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108660*FLEN/8, x4, x1, x2) - -inst_36221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f000007; valaddr_reg:x3; val_offset:108663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108663*FLEN/8, x4, x1, x2) - -inst_36222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f00000f; valaddr_reg:x3; val_offset:108666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108666*FLEN/8, x4, x1, x2) - -inst_36223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f00001f; valaddr_reg:x3; val_offset:108669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108669*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_284) - -inst_36224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f00003f; valaddr_reg:x3; val_offset:108672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108672*FLEN/8, x4, x1, x2) - -inst_36225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f00007f; valaddr_reg:x3; val_offset:108675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108675*FLEN/8, x4, x1, x2) - -inst_36226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f0000ff; valaddr_reg:x3; val_offset:108678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108678*FLEN/8, x4, x1, x2) - -inst_36227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f0001ff; valaddr_reg:x3; val_offset:108681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108681*FLEN/8, x4, x1, x2) - -inst_36228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f0003ff; valaddr_reg:x3; val_offset:108684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108684*FLEN/8, x4, x1, x2) - -inst_36229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f0007ff; valaddr_reg:x3; val_offset:108687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108687*FLEN/8, x4, x1, x2) - -inst_36230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f000fff; valaddr_reg:x3; val_offset:108690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108690*FLEN/8, x4, x1, x2) - -inst_36231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f001fff; valaddr_reg:x3; val_offset:108693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108693*FLEN/8, x4, x1, x2) - -inst_36232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f003fff; valaddr_reg:x3; val_offset:108696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108696*FLEN/8, x4, x1, x2) - -inst_36233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f007fff; valaddr_reg:x3; val_offset:108699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108699*FLEN/8, x4, x1, x2) - -inst_36234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f00ffff; valaddr_reg:x3; val_offset:108702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108702*FLEN/8, x4, x1, x2) - -inst_36235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f01ffff; valaddr_reg:x3; val_offset:108705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108705*FLEN/8, x4, x1, x2) - -inst_36236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f03ffff; valaddr_reg:x3; val_offset:108708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108708*FLEN/8, x4, x1, x2) - -inst_36237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f07ffff; valaddr_reg:x3; val_offset:108711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108711*FLEN/8, x4, x1, x2) - -inst_36238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f0fffff; valaddr_reg:x3; val_offset:108714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108714*FLEN/8, x4, x1, x2) - -inst_36239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f1fffff; valaddr_reg:x3; val_offset:108717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108717*FLEN/8, x4, x1, x2) - -inst_36240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f3fffff; valaddr_reg:x3; val_offset:108720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108720*FLEN/8, x4, x1, x2) - -inst_36241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f400000; valaddr_reg:x3; val_offset:108723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108723*FLEN/8, x4, x1, x2) - -inst_36242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f600000; valaddr_reg:x3; val_offset:108726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108726*FLEN/8, x4, x1, x2) - -inst_36243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f700000; valaddr_reg:x3; val_offset:108729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108729*FLEN/8, x4, x1, x2) - -inst_36244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f780000; valaddr_reg:x3; val_offset:108732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108732*FLEN/8, x4, x1, x2) - -inst_36245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7c0000; valaddr_reg:x3; val_offset:108735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108735*FLEN/8, x4, x1, x2) - -inst_36246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7e0000; valaddr_reg:x3; val_offset:108738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108738*FLEN/8, x4, x1, x2) - -inst_36247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7f0000; valaddr_reg:x3; val_offset:108741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108741*FLEN/8, x4, x1, x2) - -inst_36248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7f8000; valaddr_reg:x3; val_offset:108744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108744*FLEN/8, x4, x1, x2) - -inst_36249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7fc000; valaddr_reg:x3; val_offset:108747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108747*FLEN/8, x4, x1, x2) - -inst_36250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7fe000; valaddr_reg:x3; val_offset:108750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108750*FLEN/8, x4, x1, x2) - -inst_36251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7ff000; valaddr_reg:x3; val_offset:108753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108753*FLEN/8, x4, x1, x2) - -inst_36252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7ff800; valaddr_reg:x3; val_offset:108756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108756*FLEN/8, x4, x1, x2) - -inst_36253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:108759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108759*FLEN/8, x4, x1, x2) - -inst_36254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:108762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108762*FLEN/8, x4, x1, x2) - -inst_36255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7fff00; valaddr_reg:x3; val_offset:108765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108765*FLEN/8, x4, x1, x2) - -inst_36256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7fff80; valaddr_reg:x3; val_offset:108768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108768*FLEN/8, x4, x1, x2) - -inst_36257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:108771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108771*FLEN/8, x4, x1, x2) - -inst_36258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:108774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108774*FLEN/8, x4, x1, x2) - -inst_36259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:108777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108777*FLEN/8, x4, x1, x2) - -inst_36260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:108780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108780*FLEN/8, x4, x1, x2) - -inst_36261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:108783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108783*FLEN/8, x4, x1, x2) - -inst_36262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:108786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108786*FLEN/8, x4, x1, x2) - -inst_36263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; -op3val:0x8f7fffff; valaddr_reg:x3; val_offset:108789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108789*FLEN/8, x4, x1, x2) - -inst_36264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33000000; valaddr_reg:x3; val_offset:108792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108792*FLEN/8, x4, x1, x2) - -inst_36265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33000001; valaddr_reg:x3; val_offset:108795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108795*FLEN/8, x4, x1, x2) - -inst_36266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33000003; valaddr_reg:x3; val_offset:108798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108798*FLEN/8, x4, x1, x2) - -inst_36267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33000007; valaddr_reg:x3; val_offset:108801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108801*FLEN/8, x4, x1, x2) - -inst_36268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3300000f; valaddr_reg:x3; val_offset:108804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108804*FLEN/8, x4, x1, x2) - -inst_36269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3300001f; valaddr_reg:x3; val_offset:108807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108807*FLEN/8, x4, x1, x2) - -inst_36270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3300003f; valaddr_reg:x3; val_offset:108810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108810*FLEN/8, x4, x1, x2) - -inst_36271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3300007f; valaddr_reg:x3; val_offset:108813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108813*FLEN/8, x4, x1, x2) - -inst_36272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x330000ff; valaddr_reg:x3; val_offset:108816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108816*FLEN/8, x4, x1, x2) - -inst_36273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x330001ff; valaddr_reg:x3; val_offset:108819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108819*FLEN/8, x4, x1, x2) - -inst_36274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x330003ff; valaddr_reg:x3; val_offset:108822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108822*FLEN/8, x4, x1, x2) - -inst_36275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x330007ff; valaddr_reg:x3; val_offset:108825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108825*FLEN/8, x4, x1, x2) - -inst_36276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33000fff; valaddr_reg:x3; val_offset:108828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108828*FLEN/8, x4, x1, x2) - -inst_36277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33001fff; valaddr_reg:x3; val_offset:108831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108831*FLEN/8, x4, x1, x2) - -inst_36278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33003fff; valaddr_reg:x3; val_offset:108834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108834*FLEN/8, x4, x1, x2) - -inst_36279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33007fff; valaddr_reg:x3; val_offset:108837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108837*FLEN/8, x4, x1, x2) - -inst_36280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3300ffff; valaddr_reg:x3; val_offset:108840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108840*FLEN/8, x4, x1, x2) - -inst_36281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3301ffff; valaddr_reg:x3; val_offset:108843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108843*FLEN/8, x4, x1, x2) - -inst_36282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3303ffff; valaddr_reg:x3; val_offset:108846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108846*FLEN/8, x4, x1, x2) - -inst_36283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3307ffff; valaddr_reg:x3; val_offset:108849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108849*FLEN/8, x4, x1, x2) - -inst_36284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x330fffff; valaddr_reg:x3; val_offset:108852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108852*FLEN/8, x4, x1, x2) - -inst_36285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x331fffff; valaddr_reg:x3; val_offset:108855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108855*FLEN/8, x4, x1, x2) - -inst_36286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x333fffff; valaddr_reg:x3; val_offset:108858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108858*FLEN/8, x4, x1, x2) - -inst_36287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33400000; valaddr_reg:x3; val_offset:108861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108861*FLEN/8, x4, x1, x2) - -inst_36288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33600000; valaddr_reg:x3; val_offset:108864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108864*FLEN/8, x4, x1, x2) - -inst_36289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33700000; valaddr_reg:x3; val_offset:108867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108867*FLEN/8, x4, x1, x2) - -inst_36290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x33780000; valaddr_reg:x3; val_offset:108870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108870*FLEN/8, x4, x1, x2) - -inst_36291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337c0000; valaddr_reg:x3; val_offset:108873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108873*FLEN/8, x4, x1, x2) - -inst_36292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337e0000; valaddr_reg:x3; val_offset:108876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108876*FLEN/8, x4, x1, x2) - -inst_36293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337f0000; valaddr_reg:x3; val_offset:108879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108879*FLEN/8, x4, x1, x2) - -inst_36294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337f8000; valaddr_reg:x3; val_offset:108882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108882*FLEN/8, x4, x1, x2) - -inst_36295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337fc000; valaddr_reg:x3; val_offset:108885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108885*FLEN/8, x4, x1, x2) - -inst_36296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337fe000; valaddr_reg:x3; val_offset:108888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108888*FLEN/8, x4, x1, x2) - -inst_36297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337ff000; valaddr_reg:x3; val_offset:108891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108891*FLEN/8, x4, x1, x2) - -inst_36298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337ff800; valaddr_reg:x3; val_offset:108894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108894*FLEN/8, x4, x1, x2) - -inst_36299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337ffc00; valaddr_reg:x3; val_offset:108897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108897*FLEN/8, x4, x1, x2) - -inst_36300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337ffe00; valaddr_reg:x3; val_offset:108900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108900*FLEN/8, x4, x1, x2) - -inst_36301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337fff00; valaddr_reg:x3; val_offset:108903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108903*FLEN/8, x4, x1, x2) - -inst_36302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337fff80; valaddr_reg:x3; val_offset:108906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108906*FLEN/8, x4, x1, x2) - -inst_36303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337fffc0; valaddr_reg:x3; val_offset:108909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108909*FLEN/8, x4, x1, x2) - -inst_36304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337fffe0; valaddr_reg:x3; val_offset:108912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108912*FLEN/8, x4, x1, x2) - -inst_36305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337ffff0; valaddr_reg:x3; val_offset:108915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108915*FLEN/8, x4, x1, x2) - -inst_36306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337ffff8; valaddr_reg:x3; val_offset:108918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108918*FLEN/8, x4, x1, x2) - -inst_36307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337ffffc; valaddr_reg:x3; val_offset:108921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108921*FLEN/8, x4, x1, x2) - -inst_36308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337ffffe; valaddr_reg:x3; val_offset:108924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108924*FLEN/8, x4, x1, x2) - -inst_36309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x337fffff; valaddr_reg:x3; val_offset:108927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108927*FLEN/8, x4, x1, x2) - -inst_36310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3f800001; valaddr_reg:x3; val_offset:108930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108930*FLEN/8, x4, x1, x2) - -inst_36311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3f800003; valaddr_reg:x3; val_offset:108933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108933*FLEN/8, x4, x1, x2) - -inst_36312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3f800007; valaddr_reg:x3; val_offset:108936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108936*FLEN/8, x4, x1, x2) - -inst_36313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3f999999; valaddr_reg:x3; val_offset:108939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108939*FLEN/8, x4, x1, x2) - -inst_36314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:108942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108942*FLEN/8, x4, x1, x2) - -inst_36315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:108945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108945*FLEN/8, x4, x1, x2) - -inst_36316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:108948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108948*FLEN/8, x4, x1, x2) - -inst_36317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:108951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108951*FLEN/8, x4, x1, x2) - -inst_36318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:108954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108954*FLEN/8, x4, x1, x2) - -inst_36319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:108957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108957*FLEN/8, x4, x1, x2) - -inst_36320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:108960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108960*FLEN/8, x4, x1, x2) - -inst_36321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:108963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108963*FLEN/8, x4, x1, x2) - -inst_36322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:108966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108966*FLEN/8, x4, x1, x2) - -inst_36323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:108969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108969*FLEN/8, x4, x1, x2) - -inst_36324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:108972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108972*FLEN/8, x4, x1, x2) - -inst_36325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:108975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108975*FLEN/8, x4, x1, x2) - -inst_36326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7000000; valaddr_reg:x3; val_offset:108978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108978*FLEN/8, x4, x1, x2) - -inst_36327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7000001; valaddr_reg:x3; val_offset:108981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108981*FLEN/8, x4, x1, x2) - -inst_36328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7000003; valaddr_reg:x3; val_offset:108984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108984*FLEN/8, x4, x1, x2) - -inst_36329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7000007; valaddr_reg:x3; val_offset:108987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108987*FLEN/8, x4, x1, x2) - -inst_36330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe700000f; valaddr_reg:x3; val_offset:108990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108990*FLEN/8, x4, x1, x2) - -inst_36331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe700001f; valaddr_reg:x3; val_offset:108993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108993*FLEN/8, x4, x1, x2) - -inst_36332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe700003f; valaddr_reg:x3; val_offset:108996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108996*FLEN/8, x4, x1, x2) - -inst_36333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe700007f; valaddr_reg:x3; val_offset:108999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108999*FLEN/8, x4, x1, x2) - -inst_36334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe70000ff; valaddr_reg:x3; val_offset:109002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109002*FLEN/8, x4, x1, x2) - -inst_36335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe70001ff; valaddr_reg:x3; val_offset:109005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109005*FLEN/8, x4, x1, x2) - -inst_36336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe70003ff; valaddr_reg:x3; val_offset:109008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109008*FLEN/8, x4, x1, x2) - -inst_36337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe70007ff; valaddr_reg:x3; val_offset:109011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109011*FLEN/8, x4, x1, x2) - -inst_36338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7000fff; valaddr_reg:x3; val_offset:109014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109014*FLEN/8, x4, x1, x2) - -inst_36339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7001fff; valaddr_reg:x3; val_offset:109017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109017*FLEN/8, x4, x1, x2) - -inst_36340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7003fff; valaddr_reg:x3; val_offset:109020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109020*FLEN/8, x4, x1, x2) - -inst_36341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7007fff; valaddr_reg:x3; val_offset:109023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109023*FLEN/8, x4, x1, x2) - -inst_36342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe700ffff; valaddr_reg:x3; val_offset:109026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109026*FLEN/8, x4, x1, x2) - -inst_36343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe701ffff; valaddr_reg:x3; val_offset:109029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109029*FLEN/8, x4, x1, x2) - -inst_36344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe703ffff; valaddr_reg:x3; val_offset:109032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109032*FLEN/8, x4, x1, x2) - -inst_36345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe707ffff; valaddr_reg:x3; val_offset:109035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109035*FLEN/8, x4, x1, x2) - -inst_36346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe70fffff; valaddr_reg:x3; val_offset:109038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109038*FLEN/8, x4, x1, x2) - -inst_36347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe71fffff; valaddr_reg:x3; val_offset:109041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109041*FLEN/8, x4, x1, x2) - -inst_36348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe73fffff; valaddr_reg:x3; val_offset:109044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109044*FLEN/8, x4, x1, x2) - -inst_36349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7400000; valaddr_reg:x3; val_offset:109047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109047*FLEN/8, x4, x1, x2) - -inst_36350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7600000; valaddr_reg:x3; val_offset:109050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109050*FLEN/8, x4, x1, x2) - -inst_36351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7700000; valaddr_reg:x3; val_offset:109053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109053*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_285) - -inst_36352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe7780000; valaddr_reg:x3; val_offset:109056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109056*FLEN/8, x4, x1, x2) - -inst_36353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77c0000; valaddr_reg:x3; val_offset:109059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109059*FLEN/8, x4, x1, x2) - -inst_36354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77e0000; valaddr_reg:x3; val_offset:109062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109062*FLEN/8, x4, x1, x2) - -inst_36355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77f0000; valaddr_reg:x3; val_offset:109065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109065*FLEN/8, x4, x1, x2) - -inst_36356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77f8000; valaddr_reg:x3; val_offset:109068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109068*FLEN/8, x4, x1, x2) - -inst_36357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77fc000; valaddr_reg:x3; val_offset:109071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109071*FLEN/8, x4, x1, x2) - -inst_36358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77fe000; valaddr_reg:x3; val_offset:109074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109074*FLEN/8, x4, x1, x2) - -inst_36359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77ff000; valaddr_reg:x3; val_offset:109077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109077*FLEN/8, x4, x1, x2) - -inst_36360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77ff800; valaddr_reg:x3; val_offset:109080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109080*FLEN/8, x4, x1, x2) - -inst_36361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77ffc00; valaddr_reg:x3; val_offset:109083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109083*FLEN/8, x4, x1, x2) - -inst_36362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77ffe00; valaddr_reg:x3; val_offset:109086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109086*FLEN/8, x4, x1, x2) - -inst_36363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77fff00; valaddr_reg:x3; val_offset:109089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109089*FLEN/8, x4, x1, x2) - -inst_36364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77fff80; valaddr_reg:x3; val_offset:109092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109092*FLEN/8, x4, x1, x2) - -inst_36365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77fffc0; valaddr_reg:x3; val_offset:109095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109095*FLEN/8, x4, x1, x2) - -inst_36366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77fffe0; valaddr_reg:x3; val_offset:109098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109098*FLEN/8, x4, x1, x2) - -inst_36367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77ffff0; valaddr_reg:x3; val_offset:109101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109101*FLEN/8, x4, x1, x2) - -inst_36368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77ffff8; valaddr_reg:x3; val_offset:109104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109104*FLEN/8, x4, x1, x2) - -inst_36369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77ffffc; valaddr_reg:x3; val_offset:109107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109107*FLEN/8, x4, x1, x2) - -inst_36370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77ffffe; valaddr_reg:x3; val_offset:109110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109110*FLEN/8, x4, x1, x2) - -inst_36371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xe77fffff; valaddr_reg:x3; val_offset:109113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109113*FLEN/8, x4, x1, x2) - -inst_36372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff000001; valaddr_reg:x3; val_offset:109116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109116*FLEN/8, x4, x1, x2) - -inst_36373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff000003; valaddr_reg:x3; val_offset:109119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109119*FLEN/8, x4, x1, x2) - -inst_36374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff000007; valaddr_reg:x3; val_offset:109122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109122*FLEN/8, x4, x1, x2) - -inst_36375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff199999; valaddr_reg:x3; val_offset:109125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109125*FLEN/8, x4, x1, x2) - -inst_36376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff249249; valaddr_reg:x3; val_offset:109128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109128*FLEN/8, x4, x1, x2) - -inst_36377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff333333; valaddr_reg:x3; val_offset:109131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109131*FLEN/8, x4, x1, x2) - -inst_36378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:109134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109134*FLEN/8, x4, x1, x2) - -inst_36379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:109137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109137*FLEN/8, x4, x1, x2) - -inst_36380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff444444; valaddr_reg:x3; val_offset:109140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109140*FLEN/8, x4, x1, x2) - -inst_36381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:109143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109143*FLEN/8, x4, x1, x2) - -inst_36382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:109146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109146*FLEN/8, x4, x1, x2) - -inst_36383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff666666; valaddr_reg:x3; val_offset:109149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109149*FLEN/8, x4, x1, x2) - -inst_36384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:109152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109152*FLEN/8, x4, x1, x2) - -inst_36385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:109155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109155*FLEN/8, x4, x1, x2) - -inst_36386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:109158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109158*FLEN/8, x4, x1, x2) - -inst_36387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:109161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109161*FLEN/8, x4, x1, x2) - -inst_36388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80800001; valaddr_reg:x3; val_offset:109164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109164*FLEN/8, x4, x1, x2) - -inst_36389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80800003; valaddr_reg:x3; val_offset:109167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109167*FLEN/8, x4, x1, x2) - -inst_36390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80800007; valaddr_reg:x3; val_offset:109170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109170*FLEN/8, x4, x1, x2) - -inst_36391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80999999; valaddr_reg:x3; val_offset:109173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109173*FLEN/8, x4, x1, x2) - -inst_36392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80a49249; valaddr_reg:x3; val_offset:109176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109176*FLEN/8, x4, x1, x2) - -inst_36393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80b33333; valaddr_reg:x3; val_offset:109179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109179*FLEN/8, x4, x1, x2) - -inst_36394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80b6db6d; valaddr_reg:x3; val_offset:109182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109182*FLEN/8, x4, x1, x2) - -inst_36395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:109185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109185*FLEN/8, x4, x1, x2) - -inst_36396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80c44444; valaddr_reg:x3; val_offset:109188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109188*FLEN/8, x4, x1, x2) - -inst_36397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80cccccc; valaddr_reg:x3; val_offset:109191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109191*FLEN/8, x4, x1, x2) - -inst_36398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80db6db6; valaddr_reg:x3; val_offset:109194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109194*FLEN/8, x4, x1, x2) - -inst_36399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80e66666; valaddr_reg:x3; val_offset:109197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109197*FLEN/8, x4, x1, x2) - -inst_36400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80edb6db; valaddr_reg:x3; val_offset:109200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109200*FLEN/8, x4, x1, x2) - -inst_36401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80fffff8; valaddr_reg:x3; val_offset:109203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109203*FLEN/8, x4, x1, x2) - -inst_36402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80fffffc; valaddr_reg:x3; val_offset:109206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109206*FLEN/8, x4, x1, x2) - -inst_36403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x80fffffe; valaddr_reg:x3; val_offset:109209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109209*FLEN/8, x4, x1, x2) - -inst_36404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87800000; valaddr_reg:x3; val_offset:109212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109212*FLEN/8, x4, x1, x2) - -inst_36405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87800001; valaddr_reg:x3; val_offset:109215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109215*FLEN/8, x4, x1, x2) - -inst_36406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87800003; valaddr_reg:x3; val_offset:109218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109218*FLEN/8, x4, x1, x2) - -inst_36407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87800007; valaddr_reg:x3; val_offset:109221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109221*FLEN/8, x4, x1, x2) - -inst_36408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x8780000f; valaddr_reg:x3; val_offset:109224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109224*FLEN/8, x4, x1, x2) - -inst_36409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x8780001f; valaddr_reg:x3; val_offset:109227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109227*FLEN/8, x4, x1, x2) - -inst_36410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x8780003f; valaddr_reg:x3; val_offset:109230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109230*FLEN/8, x4, x1, x2) - -inst_36411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x8780007f; valaddr_reg:x3; val_offset:109233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109233*FLEN/8, x4, x1, x2) - -inst_36412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x878000ff; valaddr_reg:x3; val_offset:109236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109236*FLEN/8, x4, x1, x2) - -inst_36413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x878001ff; valaddr_reg:x3; val_offset:109239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109239*FLEN/8, x4, x1, x2) - -inst_36414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x878003ff; valaddr_reg:x3; val_offset:109242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109242*FLEN/8, x4, x1, x2) - -inst_36415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x878007ff; valaddr_reg:x3; val_offset:109245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109245*FLEN/8, x4, x1, x2) - -inst_36416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87800fff; valaddr_reg:x3; val_offset:109248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109248*FLEN/8, x4, x1, x2) - -inst_36417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87801fff; valaddr_reg:x3; val_offset:109251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109251*FLEN/8, x4, x1, x2) - -inst_36418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87803fff; valaddr_reg:x3; val_offset:109254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109254*FLEN/8, x4, x1, x2) - -inst_36419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87807fff; valaddr_reg:x3; val_offset:109257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109257*FLEN/8, x4, x1, x2) - -inst_36420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x8780ffff; valaddr_reg:x3; val_offset:109260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109260*FLEN/8, x4, x1, x2) - -inst_36421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x8781ffff; valaddr_reg:x3; val_offset:109263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109263*FLEN/8, x4, x1, x2) - -inst_36422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x8783ffff; valaddr_reg:x3; val_offset:109266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109266*FLEN/8, x4, x1, x2) - -inst_36423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x8787ffff; valaddr_reg:x3; val_offset:109269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109269*FLEN/8, x4, x1, x2) - -inst_36424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x878fffff; valaddr_reg:x3; val_offset:109272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109272*FLEN/8, x4, x1, x2) - -inst_36425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x879fffff; valaddr_reg:x3; val_offset:109275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109275*FLEN/8, x4, x1, x2) - -inst_36426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87bfffff; valaddr_reg:x3; val_offset:109278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109278*FLEN/8, x4, x1, x2) - -inst_36427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87c00000; valaddr_reg:x3; val_offset:109281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109281*FLEN/8, x4, x1, x2) - -inst_36428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87e00000; valaddr_reg:x3; val_offset:109284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109284*FLEN/8, x4, x1, x2) - -inst_36429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87f00000; valaddr_reg:x3; val_offset:109287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109287*FLEN/8, x4, x1, x2) - -inst_36430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87f80000; valaddr_reg:x3; val_offset:109290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109290*FLEN/8, x4, x1, x2) - -inst_36431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fc0000; valaddr_reg:x3; val_offset:109293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109293*FLEN/8, x4, x1, x2) - -inst_36432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fe0000; valaddr_reg:x3; val_offset:109296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109296*FLEN/8, x4, x1, x2) - -inst_36433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ff0000; valaddr_reg:x3; val_offset:109299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109299*FLEN/8, x4, x1, x2) - -inst_36434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ff8000; valaddr_reg:x3; val_offset:109302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109302*FLEN/8, x4, x1, x2) - -inst_36435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ffc000; valaddr_reg:x3; val_offset:109305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109305*FLEN/8, x4, x1, x2) - -inst_36436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ffe000; valaddr_reg:x3; val_offset:109308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109308*FLEN/8, x4, x1, x2) - -inst_36437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fff000; valaddr_reg:x3; val_offset:109311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109311*FLEN/8, x4, x1, x2) - -inst_36438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fff800; valaddr_reg:x3; val_offset:109314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109314*FLEN/8, x4, x1, x2) - -inst_36439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fffc00; valaddr_reg:x3; val_offset:109317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109317*FLEN/8, x4, x1, x2) - -inst_36440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fffe00; valaddr_reg:x3; val_offset:109320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109320*FLEN/8, x4, x1, x2) - -inst_36441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ffff00; valaddr_reg:x3; val_offset:109323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109323*FLEN/8, x4, x1, x2) - -inst_36442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ffff80; valaddr_reg:x3; val_offset:109326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109326*FLEN/8, x4, x1, x2) - -inst_36443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ffffc0; valaddr_reg:x3; val_offset:109329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109329*FLEN/8, x4, x1, x2) - -inst_36444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ffffe0; valaddr_reg:x3; val_offset:109332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109332*FLEN/8, x4, x1, x2) - -inst_36445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fffff0; valaddr_reg:x3; val_offset:109335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109335*FLEN/8, x4, x1, x2) - -inst_36446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fffff8; valaddr_reg:x3; val_offset:109338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109338*FLEN/8, x4, x1, x2) - -inst_36447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fffffc; valaddr_reg:x3; val_offset:109341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109341*FLEN/8, x4, x1, x2) - -inst_36448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87fffffe; valaddr_reg:x3; val_offset:109344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109344*FLEN/8, x4, x1, x2) - -inst_36449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; -op3val:0x87ffffff; valaddr_reg:x3; val_offset:109347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109347*FLEN/8, x4, x1, x2) - -inst_36450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5800000; valaddr_reg:x3; val_offset:109350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109350*FLEN/8, x4, x1, x2) - -inst_36451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5800001; valaddr_reg:x3; val_offset:109353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109353*FLEN/8, x4, x1, x2) - -inst_36452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5800003; valaddr_reg:x3; val_offset:109356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109356*FLEN/8, x4, x1, x2) - -inst_36453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5800007; valaddr_reg:x3; val_offset:109359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109359*FLEN/8, x4, x1, x2) - -inst_36454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb580000f; valaddr_reg:x3; val_offset:109362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109362*FLEN/8, x4, x1, x2) - -inst_36455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb580001f; valaddr_reg:x3; val_offset:109365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109365*FLEN/8, x4, x1, x2) - -inst_36456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb580003f; valaddr_reg:x3; val_offset:109368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109368*FLEN/8, x4, x1, x2) - -inst_36457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb580007f; valaddr_reg:x3; val_offset:109371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109371*FLEN/8, x4, x1, x2) - -inst_36458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb58000ff; valaddr_reg:x3; val_offset:109374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109374*FLEN/8, x4, x1, x2) - -inst_36459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb58001ff; valaddr_reg:x3; val_offset:109377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109377*FLEN/8, x4, x1, x2) - -inst_36460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb58003ff; valaddr_reg:x3; val_offset:109380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109380*FLEN/8, x4, x1, x2) - -inst_36461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb58007ff; valaddr_reg:x3; val_offset:109383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109383*FLEN/8, x4, x1, x2) - -inst_36462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5800fff; valaddr_reg:x3; val_offset:109386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109386*FLEN/8, x4, x1, x2) - -inst_36463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5801fff; valaddr_reg:x3; val_offset:109389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109389*FLEN/8, x4, x1, x2) - -inst_36464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5803fff; valaddr_reg:x3; val_offset:109392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109392*FLEN/8, x4, x1, x2) - -inst_36465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5807fff; valaddr_reg:x3; val_offset:109395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109395*FLEN/8, x4, x1, x2) - -inst_36466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb580ffff; valaddr_reg:x3; val_offset:109398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109398*FLEN/8, x4, x1, x2) - -inst_36467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb581ffff; valaddr_reg:x3; val_offset:109401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109401*FLEN/8, x4, x1, x2) - -inst_36468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb583ffff; valaddr_reg:x3; val_offset:109404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109404*FLEN/8, x4, x1, x2) - -inst_36469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb587ffff; valaddr_reg:x3; val_offset:109407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109407*FLEN/8, x4, x1, x2) - -inst_36470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb58fffff; valaddr_reg:x3; val_offset:109410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109410*FLEN/8, x4, x1, x2) - -inst_36471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb59fffff; valaddr_reg:x3; val_offset:109413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109413*FLEN/8, x4, x1, x2) - -inst_36472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5bfffff; valaddr_reg:x3; val_offset:109416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109416*FLEN/8, x4, x1, x2) - -inst_36473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5c00000; valaddr_reg:x3; val_offset:109419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109419*FLEN/8, x4, x1, x2) - -inst_36474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5e00000; valaddr_reg:x3; val_offset:109422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109422*FLEN/8, x4, x1, x2) - -inst_36475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5f00000; valaddr_reg:x3; val_offset:109425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109425*FLEN/8, x4, x1, x2) - -inst_36476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5f80000; valaddr_reg:x3; val_offset:109428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109428*FLEN/8, x4, x1, x2) - -inst_36477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fc0000; valaddr_reg:x3; val_offset:109431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109431*FLEN/8, x4, x1, x2) - -inst_36478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fe0000; valaddr_reg:x3; val_offset:109434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109434*FLEN/8, x4, x1, x2) - -inst_36479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ff0000; valaddr_reg:x3; val_offset:109437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109437*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_286) - -inst_36480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ff8000; valaddr_reg:x3; val_offset:109440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109440*FLEN/8, x4, x1, x2) - -inst_36481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ffc000; valaddr_reg:x3; val_offset:109443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109443*FLEN/8, x4, x1, x2) - -inst_36482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ffe000; valaddr_reg:x3; val_offset:109446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109446*FLEN/8, x4, x1, x2) - -inst_36483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fff000; valaddr_reg:x3; val_offset:109449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109449*FLEN/8, x4, x1, x2) - -inst_36484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fff800; valaddr_reg:x3; val_offset:109452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109452*FLEN/8, x4, x1, x2) - -inst_36485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fffc00; valaddr_reg:x3; val_offset:109455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109455*FLEN/8, x4, x1, x2) - -inst_36486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fffe00; valaddr_reg:x3; val_offset:109458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109458*FLEN/8, x4, x1, x2) - -inst_36487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ffff00; valaddr_reg:x3; val_offset:109461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109461*FLEN/8, x4, x1, x2) - -inst_36488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ffff80; valaddr_reg:x3; val_offset:109464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109464*FLEN/8, x4, x1, x2) - -inst_36489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ffffc0; valaddr_reg:x3; val_offset:109467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109467*FLEN/8, x4, x1, x2) - -inst_36490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ffffe0; valaddr_reg:x3; val_offset:109470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109470*FLEN/8, x4, x1, x2) - -inst_36491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fffff0; valaddr_reg:x3; val_offset:109473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109473*FLEN/8, x4, x1, x2) - -inst_36492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fffff8; valaddr_reg:x3; val_offset:109476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109476*FLEN/8, x4, x1, x2) - -inst_36493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fffffc; valaddr_reg:x3; val_offset:109479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109479*FLEN/8, x4, x1, x2) - -inst_36494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5fffffe; valaddr_reg:x3; val_offset:109482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109482*FLEN/8, x4, x1, x2) - -inst_36495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xb5ffffff; valaddr_reg:x3; val_offset:109485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109485*FLEN/8, x4, x1, x2) - -inst_36496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbf800001; valaddr_reg:x3; val_offset:109488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109488*FLEN/8, x4, x1, x2) - -inst_36497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbf800003; valaddr_reg:x3; val_offset:109491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109491*FLEN/8, x4, x1, x2) - -inst_36498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbf800007; valaddr_reg:x3; val_offset:109494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109494*FLEN/8, x4, x1, x2) - -inst_36499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbf999999; valaddr_reg:x3; val_offset:109497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109497*FLEN/8, x4, x1, x2) - -inst_36500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:109500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109500*FLEN/8, x4, x1, x2) - -inst_36501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:109503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109503*FLEN/8, x4, x1, x2) - -inst_36502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:109506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109506*FLEN/8, x4, x1, x2) - -inst_36503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:109509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109509*FLEN/8, x4, x1, x2) - -inst_36504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:109512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109512*FLEN/8, x4, x1, x2) - -inst_36505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:109515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109515*FLEN/8, x4, x1, x2) - -inst_36506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:109518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109518*FLEN/8, x4, x1, x2) - -inst_36507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:109521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109521*FLEN/8, x4, x1, x2) - -inst_36508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:109524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109524*FLEN/8, x4, x1, x2) - -inst_36509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:109527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109527*FLEN/8, x4, x1, x2) - -inst_36510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:109530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109530*FLEN/8, x4, x1, x2) - -inst_36511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:109533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109533*FLEN/8, x4, x1, x2) - -inst_36512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1000000; valaddr_reg:x3; val_offset:109536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109536*FLEN/8, x4, x1, x2) - -inst_36513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1000001; valaddr_reg:x3; val_offset:109539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109539*FLEN/8, x4, x1, x2) - -inst_36514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1000003; valaddr_reg:x3; val_offset:109542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109542*FLEN/8, x4, x1, x2) - -inst_36515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1000007; valaddr_reg:x3; val_offset:109545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109545*FLEN/8, x4, x1, x2) - -inst_36516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe100000f; valaddr_reg:x3; val_offset:109548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109548*FLEN/8, x4, x1, x2) - -inst_36517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe100001f; valaddr_reg:x3; val_offset:109551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109551*FLEN/8, x4, x1, x2) - -inst_36518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe100003f; valaddr_reg:x3; val_offset:109554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109554*FLEN/8, x4, x1, x2) - -inst_36519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe100007f; valaddr_reg:x3; val_offset:109557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109557*FLEN/8, x4, x1, x2) - -inst_36520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe10000ff; valaddr_reg:x3; val_offset:109560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109560*FLEN/8, x4, x1, x2) - -inst_36521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe10001ff; valaddr_reg:x3; val_offset:109563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109563*FLEN/8, x4, x1, x2) - -inst_36522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe10003ff; valaddr_reg:x3; val_offset:109566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109566*FLEN/8, x4, x1, x2) - -inst_36523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe10007ff; valaddr_reg:x3; val_offset:109569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109569*FLEN/8, x4, x1, x2) - -inst_36524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1000fff; valaddr_reg:x3; val_offset:109572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109572*FLEN/8, x4, x1, x2) - -inst_36525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1001fff; valaddr_reg:x3; val_offset:109575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109575*FLEN/8, x4, x1, x2) - -inst_36526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1003fff; valaddr_reg:x3; val_offset:109578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109578*FLEN/8, x4, x1, x2) - -inst_36527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1007fff; valaddr_reg:x3; val_offset:109581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109581*FLEN/8, x4, x1, x2) - -inst_36528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe100ffff; valaddr_reg:x3; val_offset:109584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109584*FLEN/8, x4, x1, x2) - -inst_36529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe101ffff; valaddr_reg:x3; val_offset:109587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109587*FLEN/8, x4, x1, x2) - -inst_36530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe103ffff; valaddr_reg:x3; val_offset:109590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109590*FLEN/8, x4, x1, x2) - -inst_36531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe107ffff; valaddr_reg:x3; val_offset:109593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109593*FLEN/8, x4, x1, x2) - -inst_36532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe10fffff; valaddr_reg:x3; val_offset:109596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109596*FLEN/8, x4, x1, x2) - -inst_36533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe11fffff; valaddr_reg:x3; val_offset:109599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109599*FLEN/8, x4, x1, x2) - -inst_36534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe13fffff; valaddr_reg:x3; val_offset:109602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109602*FLEN/8, x4, x1, x2) - -inst_36535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1400000; valaddr_reg:x3; val_offset:109605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109605*FLEN/8, x4, x1, x2) - -inst_36536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1600000; valaddr_reg:x3; val_offset:109608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109608*FLEN/8, x4, x1, x2) - -inst_36537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1700000; valaddr_reg:x3; val_offset:109611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109611*FLEN/8, x4, x1, x2) - -inst_36538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe1780000; valaddr_reg:x3; val_offset:109614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109614*FLEN/8, x4, x1, x2) - -inst_36539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17c0000; valaddr_reg:x3; val_offset:109617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109617*FLEN/8, x4, x1, x2) - -inst_36540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17e0000; valaddr_reg:x3; val_offset:109620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109620*FLEN/8, x4, x1, x2) - -inst_36541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17f0000; valaddr_reg:x3; val_offset:109623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109623*FLEN/8, x4, x1, x2) - -inst_36542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17f8000; valaddr_reg:x3; val_offset:109626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109626*FLEN/8, x4, x1, x2) - -inst_36543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17fc000; valaddr_reg:x3; val_offset:109629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109629*FLEN/8, x4, x1, x2) - -inst_36544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17fe000; valaddr_reg:x3; val_offset:109632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109632*FLEN/8, x4, x1, x2) - -inst_36545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17ff000; valaddr_reg:x3; val_offset:109635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109635*FLEN/8, x4, x1, x2) - -inst_36546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17ff800; valaddr_reg:x3; val_offset:109638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109638*FLEN/8, x4, x1, x2) - -inst_36547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17ffc00; valaddr_reg:x3; val_offset:109641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109641*FLEN/8, x4, x1, x2) - -inst_36548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17ffe00; valaddr_reg:x3; val_offset:109644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109644*FLEN/8, x4, x1, x2) - -inst_36549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17fff00; valaddr_reg:x3; val_offset:109647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109647*FLEN/8, x4, x1, x2) - -inst_36550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17fff80; valaddr_reg:x3; val_offset:109650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109650*FLEN/8, x4, x1, x2) - -inst_36551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17fffc0; valaddr_reg:x3; val_offset:109653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109653*FLEN/8, x4, x1, x2) - -inst_36552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17fffe0; valaddr_reg:x3; val_offset:109656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109656*FLEN/8, x4, x1, x2) - -inst_36553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17ffff0; valaddr_reg:x3; val_offset:109659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109659*FLEN/8, x4, x1, x2) - -inst_36554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17ffff8; valaddr_reg:x3; val_offset:109662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109662*FLEN/8, x4, x1, x2) - -inst_36555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17ffffc; valaddr_reg:x3; val_offset:109665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109665*FLEN/8, x4, x1, x2) - -inst_36556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17ffffe; valaddr_reg:x3; val_offset:109668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109668*FLEN/8, x4, x1, x2) - -inst_36557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xe17fffff; valaddr_reg:x3; val_offset:109671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109671*FLEN/8, x4, x1, x2) - -inst_36558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff000001; valaddr_reg:x3; val_offset:109674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109674*FLEN/8, x4, x1, x2) - -inst_36559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff000003; valaddr_reg:x3; val_offset:109677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109677*FLEN/8, x4, x1, x2) - -inst_36560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff000007; valaddr_reg:x3; val_offset:109680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109680*FLEN/8, x4, x1, x2) - -inst_36561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff199999; valaddr_reg:x3; val_offset:109683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109683*FLEN/8, x4, x1, x2) - -inst_36562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff249249; valaddr_reg:x3; val_offset:109686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109686*FLEN/8, x4, x1, x2) - -inst_36563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff333333; valaddr_reg:x3; val_offset:109689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109689*FLEN/8, x4, x1, x2) - -inst_36564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:109692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109692*FLEN/8, x4, x1, x2) - -inst_36565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:109695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109695*FLEN/8, x4, x1, x2) - -inst_36566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff444444; valaddr_reg:x3; val_offset:109698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109698*FLEN/8, x4, x1, x2) - -inst_36567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:109701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109701*FLEN/8, x4, x1, x2) - -inst_36568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:109704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109704*FLEN/8, x4, x1, x2) - -inst_36569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff666666; valaddr_reg:x3; val_offset:109707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109707*FLEN/8, x4, x1, x2) - -inst_36570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:109710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109710*FLEN/8, x4, x1, x2) - -inst_36571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:109713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109713*FLEN/8, x4, x1, x2) - -inst_36572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:109716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109716*FLEN/8, x4, x1, x2) - -inst_36573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:109719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109719*FLEN/8, x4, x1, x2) - -inst_36574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d800000; valaddr_reg:x3; val_offset:109722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109722*FLEN/8, x4, x1, x2) - -inst_36575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d800001; valaddr_reg:x3; val_offset:109725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109725*FLEN/8, x4, x1, x2) - -inst_36576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d800003; valaddr_reg:x3; val_offset:109728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109728*FLEN/8, x4, x1, x2) - -inst_36577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d800007; valaddr_reg:x3; val_offset:109731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109731*FLEN/8, x4, x1, x2) - -inst_36578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d80000f; valaddr_reg:x3; val_offset:109734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109734*FLEN/8, x4, x1, x2) - -inst_36579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d80001f; valaddr_reg:x3; val_offset:109737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109737*FLEN/8, x4, x1, x2) - -inst_36580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d80003f; valaddr_reg:x3; val_offset:109740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109740*FLEN/8, x4, x1, x2) - -inst_36581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d80007f; valaddr_reg:x3; val_offset:109743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109743*FLEN/8, x4, x1, x2) - -inst_36582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d8000ff; valaddr_reg:x3; val_offset:109746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109746*FLEN/8, x4, x1, x2) - -inst_36583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d8001ff; valaddr_reg:x3; val_offset:109749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109749*FLEN/8, x4, x1, x2) - -inst_36584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d8003ff; valaddr_reg:x3; val_offset:109752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109752*FLEN/8, x4, x1, x2) - -inst_36585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d8007ff; valaddr_reg:x3; val_offset:109755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109755*FLEN/8, x4, x1, x2) - -inst_36586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d800fff; valaddr_reg:x3; val_offset:109758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109758*FLEN/8, x4, x1, x2) - -inst_36587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d801fff; valaddr_reg:x3; val_offset:109761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109761*FLEN/8, x4, x1, x2) - -inst_36588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d803fff; valaddr_reg:x3; val_offset:109764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109764*FLEN/8, x4, x1, x2) - -inst_36589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d807fff; valaddr_reg:x3; val_offset:109767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109767*FLEN/8, x4, x1, x2) - -inst_36590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d80ffff; valaddr_reg:x3; val_offset:109770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109770*FLEN/8, x4, x1, x2) - -inst_36591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d81ffff; valaddr_reg:x3; val_offset:109773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109773*FLEN/8, x4, x1, x2) - -inst_36592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d83ffff; valaddr_reg:x3; val_offset:109776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109776*FLEN/8, x4, x1, x2) - -inst_36593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d87ffff; valaddr_reg:x3; val_offset:109779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109779*FLEN/8, x4, x1, x2) - -inst_36594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d8fffff; valaddr_reg:x3; val_offset:109782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109782*FLEN/8, x4, x1, x2) - -inst_36595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5d9fffff; valaddr_reg:x3; val_offset:109785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109785*FLEN/8, x4, x1, x2) - -inst_36596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dbfffff; valaddr_reg:x3; val_offset:109788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109788*FLEN/8, x4, x1, x2) - -inst_36597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dc00000; valaddr_reg:x3; val_offset:109791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109791*FLEN/8, x4, x1, x2) - -inst_36598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5de00000; valaddr_reg:x3; val_offset:109794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109794*FLEN/8, x4, x1, x2) - -inst_36599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5df00000; valaddr_reg:x3; val_offset:109797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109797*FLEN/8, x4, x1, x2) - -inst_36600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5df80000; valaddr_reg:x3; val_offset:109800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109800*FLEN/8, x4, x1, x2) - -inst_36601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfc0000; valaddr_reg:x3; val_offset:109803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109803*FLEN/8, x4, x1, x2) - -inst_36602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfe0000; valaddr_reg:x3; val_offset:109806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109806*FLEN/8, x4, x1, x2) - -inst_36603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dff0000; valaddr_reg:x3; val_offset:109809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109809*FLEN/8, x4, x1, x2) - -inst_36604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dff8000; valaddr_reg:x3; val_offset:109812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109812*FLEN/8, x4, x1, x2) - -inst_36605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dffc000; valaddr_reg:x3; val_offset:109815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109815*FLEN/8, x4, x1, x2) - -inst_36606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dffe000; valaddr_reg:x3; val_offset:109818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109818*FLEN/8, x4, x1, x2) - -inst_36607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfff000; valaddr_reg:x3; val_offset:109821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109821*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_287) - -inst_36608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfff800; valaddr_reg:x3; val_offset:109824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109824*FLEN/8, x4, x1, x2) - -inst_36609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfffc00; valaddr_reg:x3; val_offset:109827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109827*FLEN/8, x4, x1, x2) - -inst_36610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfffe00; valaddr_reg:x3; val_offset:109830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109830*FLEN/8, x4, x1, x2) - -inst_36611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dffff00; valaddr_reg:x3; val_offset:109833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109833*FLEN/8, x4, x1, x2) - -inst_36612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dffff80; valaddr_reg:x3; val_offset:109836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109836*FLEN/8, x4, x1, x2) - -inst_36613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dffffc0; valaddr_reg:x3; val_offset:109839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109839*FLEN/8, x4, x1, x2) - -inst_36614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dffffe0; valaddr_reg:x3; val_offset:109842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109842*FLEN/8, x4, x1, x2) - -inst_36615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfffff0; valaddr_reg:x3; val_offset:109845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109845*FLEN/8, x4, x1, x2) - -inst_36616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfffff8; valaddr_reg:x3; val_offset:109848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109848*FLEN/8, x4, x1, x2) - -inst_36617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfffffc; valaddr_reg:x3; val_offset:109851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109851*FLEN/8, x4, x1, x2) - -inst_36618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dfffffe; valaddr_reg:x3; val_offset:109854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109854*FLEN/8, x4, x1, x2) - -inst_36619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x5dffffff; valaddr_reg:x3; val_offset:109857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109857*FLEN/8, x4, x1, x2) - -inst_36620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f000001; valaddr_reg:x3; val_offset:109860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109860*FLEN/8, x4, x1, x2) - -inst_36621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f000003; valaddr_reg:x3; val_offset:109863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109863*FLEN/8, x4, x1, x2) - -inst_36622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f000007; valaddr_reg:x3; val_offset:109866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109866*FLEN/8, x4, x1, x2) - -inst_36623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f199999; valaddr_reg:x3; val_offset:109869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109869*FLEN/8, x4, x1, x2) - -inst_36624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f249249; valaddr_reg:x3; val_offset:109872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109872*FLEN/8, x4, x1, x2) - -inst_36625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f333333; valaddr_reg:x3; val_offset:109875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109875*FLEN/8, x4, x1, x2) - -inst_36626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:109878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109878*FLEN/8, x4, x1, x2) - -inst_36627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:109881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109881*FLEN/8, x4, x1, x2) - -inst_36628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f444444; valaddr_reg:x3; val_offset:109884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109884*FLEN/8, x4, x1, x2) - -inst_36629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:109887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109887*FLEN/8, x4, x1, x2) - -inst_36630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:109890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109890*FLEN/8, x4, x1, x2) - -inst_36631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f666666; valaddr_reg:x3; val_offset:109893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109893*FLEN/8, x4, x1, x2) - -inst_36632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:109896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109896*FLEN/8, x4, x1, x2) - -inst_36633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:109899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109899*FLEN/8, x4, x1, x2) - -inst_36634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:109902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109902*FLEN/8, x4, x1, x2) - -inst_36635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:109905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109905*FLEN/8, x4, x1, x2) - -inst_36636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f000000; valaddr_reg:x3; val_offset:109908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109908*FLEN/8, x4, x1, x2) - -inst_36637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f000001; valaddr_reg:x3; val_offset:109911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109911*FLEN/8, x4, x1, x2) - -inst_36638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f000003; valaddr_reg:x3; val_offset:109914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109914*FLEN/8, x4, x1, x2) - -inst_36639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f000007; valaddr_reg:x3; val_offset:109917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109917*FLEN/8, x4, x1, x2) - -inst_36640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f00000f; valaddr_reg:x3; val_offset:109920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109920*FLEN/8, x4, x1, x2) - -inst_36641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f00001f; valaddr_reg:x3; val_offset:109923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109923*FLEN/8, x4, x1, x2) - -inst_36642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f00003f; valaddr_reg:x3; val_offset:109926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109926*FLEN/8, x4, x1, x2) - -inst_36643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f00007f; valaddr_reg:x3; val_offset:109929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109929*FLEN/8, x4, x1, x2) - -inst_36644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f0000ff; valaddr_reg:x3; val_offset:109932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109932*FLEN/8, x4, x1, x2) - -inst_36645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f0001ff; valaddr_reg:x3; val_offset:109935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109935*FLEN/8, x4, x1, x2) - -inst_36646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f0003ff; valaddr_reg:x3; val_offset:109938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109938*FLEN/8, x4, x1, x2) - -inst_36647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f0007ff; valaddr_reg:x3; val_offset:109941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109941*FLEN/8, x4, x1, x2) - -inst_36648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f000fff; valaddr_reg:x3; val_offset:109944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109944*FLEN/8, x4, x1, x2) - -inst_36649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f001fff; valaddr_reg:x3; val_offset:109947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109947*FLEN/8, x4, x1, x2) - -inst_36650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f003fff; valaddr_reg:x3; val_offset:109950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109950*FLEN/8, x4, x1, x2) - -inst_36651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f007fff; valaddr_reg:x3; val_offset:109953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109953*FLEN/8, x4, x1, x2) - -inst_36652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f00ffff; valaddr_reg:x3; val_offset:109956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109956*FLEN/8, x4, x1, x2) - -inst_36653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f01ffff; valaddr_reg:x3; val_offset:109959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109959*FLEN/8, x4, x1, x2) - -inst_36654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f03ffff; valaddr_reg:x3; val_offset:109962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109962*FLEN/8, x4, x1, x2) - -inst_36655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f07ffff; valaddr_reg:x3; val_offset:109965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109965*FLEN/8, x4, x1, x2) - -inst_36656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f0fffff; valaddr_reg:x3; val_offset:109968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109968*FLEN/8, x4, x1, x2) - -inst_36657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f1fffff; valaddr_reg:x3; val_offset:109971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109971*FLEN/8, x4, x1, x2) - -inst_36658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f3fffff; valaddr_reg:x3; val_offset:109974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109974*FLEN/8, x4, x1, x2) - -inst_36659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f400000; valaddr_reg:x3; val_offset:109977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109977*FLEN/8, x4, x1, x2) - -inst_36660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f600000; valaddr_reg:x3; val_offset:109980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109980*FLEN/8, x4, x1, x2) - -inst_36661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f700000; valaddr_reg:x3; val_offset:109983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109983*FLEN/8, x4, x1, x2) - -inst_36662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f780000; valaddr_reg:x3; val_offset:109986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109986*FLEN/8, x4, x1, x2) - -inst_36663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7c0000; valaddr_reg:x3; val_offset:109989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109989*FLEN/8, x4, x1, x2) - -inst_36664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7e0000; valaddr_reg:x3; val_offset:109992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109992*FLEN/8, x4, x1, x2) - -inst_36665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7f0000; valaddr_reg:x3; val_offset:109995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109995*FLEN/8, x4, x1, x2) - -inst_36666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7f8000; valaddr_reg:x3; val_offset:109998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109998*FLEN/8, x4, x1, x2) - -inst_36667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7fc000; valaddr_reg:x3; val_offset:110001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110001*FLEN/8, x4, x1, x2) - -inst_36668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7fe000; valaddr_reg:x3; val_offset:110004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110004*FLEN/8, x4, x1, x2) - -inst_36669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7ff000; valaddr_reg:x3; val_offset:110007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110007*FLEN/8, x4, x1, x2) - -inst_36670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7ff800; valaddr_reg:x3; val_offset:110010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110010*FLEN/8, x4, x1, x2) - -inst_36671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7ffc00; valaddr_reg:x3; val_offset:110013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110013*FLEN/8, x4, x1, x2) - -inst_36672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7ffe00; valaddr_reg:x3; val_offset:110016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110016*FLEN/8, x4, x1, x2) - -inst_36673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7fff00; valaddr_reg:x3; val_offset:110019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110019*FLEN/8, x4, x1, x2) - -inst_36674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7fff80; valaddr_reg:x3; val_offset:110022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110022*FLEN/8, x4, x1, x2) - -inst_36675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7fffc0; valaddr_reg:x3; val_offset:110025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110025*FLEN/8, x4, x1, x2) - -inst_36676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7fffe0; valaddr_reg:x3; val_offset:110028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110028*FLEN/8, x4, x1, x2) - -inst_36677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7ffff0; valaddr_reg:x3; val_offset:110031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110031*FLEN/8, x4, x1, x2) - -inst_36678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7ffff8; valaddr_reg:x3; val_offset:110034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110034*FLEN/8, x4, x1, x2) - -inst_36679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7ffffc; valaddr_reg:x3; val_offset:110037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110037*FLEN/8, x4, x1, x2) - -inst_36680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7ffffe; valaddr_reg:x3; val_offset:110040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110040*FLEN/8, x4, x1, x2) - -inst_36681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x6f7fffff; valaddr_reg:x3; val_offset:110043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110043*FLEN/8, x4, x1, x2) - -inst_36682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f000001; valaddr_reg:x3; val_offset:110046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110046*FLEN/8, x4, x1, x2) - -inst_36683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f000003; valaddr_reg:x3; val_offset:110049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110049*FLEN/8, x4, x1, x2) - -inst_36684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f000007; valaddr_reg:x3; val_offset:110052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110052*FLEN/8, x4, x1, x2) - -inst_36685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f199999; valaddr_reg:x3; val_offset:110055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110055*FLEN/8, x4, x1, x2) - -inst_36686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f249249; valaddr_reg:x3; val_offset:110058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110058*FLEN/8, x4, x1, x2) - -inst_36687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f333333; valaddr_reg:x3; val_offset:110061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110061*FLEN/8, x4, x1, x2) - -inst_36688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f36db6d; valaddr_reg:x3; val_offset:110064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110064*FLEN/8, x4, x1, x2) - -inst_36689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:110067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110067*FLEN/8, x4, x1, x2) - -inst_36690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f444444; valaddr_reg:x3; val_offset:110070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110070*FLEN/8, x4, x1, x2) - -inst_36691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:110073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110073*FLEN/8, x4, x1, x2) - -inst_36692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:110076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110076*FLEN/8, x4, x1, x2) - -inst_36693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f666666; valaddr_reg:x3; val_offset:110079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110079*FLEN/8, x4, x1, x2) - -inst_36694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f6db6db; valaddr_reg:x3; val_offset:110082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110082*FLEN/8, x4, x1, x2) - -inst_36695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:110085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110085*FLEN/8, x4, x1, x2) - -inst_36696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:110088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110088*FLEN/8, x4, x1, x2) - -inst_36697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; -op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:110091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110091*FLEN/8, x4, x1, x2) - -inst_36698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbf800001; valaddr_reg:x3; val_offset:110094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110094*FLEN/8, x4, x1, x2) - -inst_36699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbf800003; valaddr_reg:x3; val_offset:110097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110097*FLEN/8, x4, x1, x2) - -inst_36700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbf800007; valaddr_reg:x3; val_offset:110100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110100*FLEN/8, x4, x1, x2) - -inst_36701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbf999999; valaddr_reg:x3; val_offset:110103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110103*FLEN/8, x4, x1, x2) - -inst_36702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:110106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110106*FLEN/8, x4, x1, x2) - -inst_36703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:110109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110109*FLEN/8, x4, x1, x2) - -inst_36704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:110112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110112*FLEN/8, x4, x1, x2) - -inst_36705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:110115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110115*FLEN/8, x4, x1, x2) - -inst_36706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:110118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110118*FLEN/8, x4, x1, x2) - -inst_36707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:110121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110121*FLEN/8, x4, x1, x2) - -inst_36708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:110124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110124*FLEN/8, x4, x1, x2) - -inst_36709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:110127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110127*FLEN/8, x4, x1, x2) - -inst_36710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:110130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110130*FLEN/8, x4, x1, x2) - -inst_36711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:110133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110133*FLEN/8, x4, x1, x2) - -inst_36712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:110136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110136*FLEN/8, x4, x1, x2) - -inst_36713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:110139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110139*FLEN/8, x4, x1, x2) - -inst_36714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7800000; valaddr_reg:x3; val_offset:110142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110142*FLEN/8, x4, x1, x2) - -inst_36715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7800001; valaddr_reg:x3; val_offset:110145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110145*FLEN/8, x4, x1, x2) - -inst_36716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7800003; valaddr_reg:x3; val_offset:110148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110148*FLEN/8, x4, x1, x2) - -inst_36717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7800007; valaddr_reg:x3; val_offset:110151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110151*FLEN/8, x4, x1, x2) - -inst_36718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc780000f; valaddr_reg:x3; val_offset:110154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110154*FLEN/8, x4, x1, x2) - -inst_36719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc780001f; valaddr_reg:x3; val_offset:110157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110157*FLEN/8, x4, x1, x2) - -inst_36720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc780003f; valaddr_reg:x3; val_offset:110160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110160*FLEN/8, x4, x1, x2) - -inst_36721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc780007f; valaddr_reg:x3; val_offset:110163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110163*FLEN/8, x4, x1, x2) - -inst_36722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc78000ff; valaddr_reg:x3; val_offset:110166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110166*FLEN/8, x4, x1, x2) - -inst_36723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc78001ff; valaddr_reg:x3; val_offset:110169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110169*FLEN/8, x4, x1, x2) - -inst_36724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc78003ff; valaddr_reg:x3; val_offset:110172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110172*FLEN/8, x4, x1, x2) - -inst_36725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc78007ff; valaddr_reg:x3; val_offset:110175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110175*FLEN/8, x4, x1, x2) - -inst_36726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7800fff; valaddr_reg:x3; val_offset:110178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110178*FLEN/8, x4, x1, x2) - -inst_36727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7801fff; valaddr_reg:x3; val_offset:110181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110181*FLEN/8, x4, x1, x2) - -inst_36728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7803fff; valaddr_reg:x3; val_offset:110184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110184*FLEN/8, x4, x1, x2) - -inst_36729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7807fff; valaddr_reg:x3; val_offset:110187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110187*FLEN/8, x4, x1, x2) - -inst_36730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc780ffff; valaddr_reg:x3; val_offset:110190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110190*FLEN/8, x4, x1, x2) - -inst_36731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc781ffff; valaddr_reg:x3; val_offset:110193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110193*FLEN/8, x4, x1, x2) - -inst_36732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc783ffff; valaddr_reg:x3; val_offset:110196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110196*FLEN/8, x4, x1, x2) - -inst_36733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc787ffff; valaddr_reg:x3; val_offset:110199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110199*FLEN/8, x4, x1, x2) - -inst_36734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc78fffff; valaddr_reg:x3; val_offset:110202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110202*FLEN/8, x4, x1, x2) - -inst_36735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc79fffff; valaddr_reg:x3; val_offset:110205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110205*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_288) - -inst_36736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7bfffff; valaddr_reg:x3; val_offset:110208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110208*FLEN/8, x4, x1, x2) - -inst_36737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7c00000; valaddr_reg:x3; val_offset:110211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110211*FLEN/8, x4, x1, x2) - -inst_36738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7e00000; valaddr_reg:x3; val_offset:110214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110214*FLEN/8, x4, x1, x2) - -inst_36739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7f00000; valaddr_reg:x3; val_offset:110217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110217*FLEN/8, x4, x1, x2) - -inst_36740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7f80000; valaddr_reg:x3; val_offset:110220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110220*FLEN/8, x4, x1, x2) - -inst_36741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fc0000; valaddr_reg:x3; val_offset:110223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110223*FLEN/8, x4, x1, x2) - -inst_36742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fe0000; valaddr_reg:x3; val_offset:110226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110226*FLEN/8, x4, x1, x2) - -inst_36743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ff0000; valaddr_reg:x3; val_offset:110229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110229*FLEN/8, x4, x1, x2) - -inst_36744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ff8000; valaddr_reg:x3; val_offset:110232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110232*FLEN/8, x4, x1, x2) - -inst_36745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ffc000; valaddr_reg:x3; val_offset:110235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110235*FLEN/8, x4, x1, x2) - -inst_36746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ffe000; valaddr_reg:x3; val_offset:110238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110238*FLEN/8, x4, x1, x2) - -inst_36747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fff000; valaddr_reg:x3; val_offset:110241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110241*FLEN/8, x4, x1, x2) - -inst_36748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fff800; valaddr_reg:x3; val_offset:110244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110244*FLEN/8, x4, x1, x2) - -inst_36749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fffc00; valaddr_reg:x3; val_offset:110247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110247*FLEN/8, x4, x1, x2) - -inst_36750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fffe00; valaddr_reg:x3; val_offset:110250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110250*FLEN/8, x4, x1, x2) - -inst_36751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ffff00; valaddr_reg:x3; val_offset:110253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110253*FLEN/8, x4, x1, x2) - -inst_36752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ffff80; valaddr_reg:x3; val_offset:110256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110256*FLEN/8, x4, x1, x2) - -inst_36753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ffffc0; valaddr_reg:x3; val_offset:110259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110259*FLEN/8, x4, x1, x2) - -inst_36754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ffffe0; valaddr_reg:x3; val_offset:110262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110262*FLEN/8, x4, x1, x2) - -inst_36755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fffff0; valaddr_reg:x3; val_offset:110265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110265*FLEN/8, x4, x1, x2) - -inst_36756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fffff8; valaddr_reg:x3; val_offset:110268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110268*FLEN/8, x4, x1, x2) - -inst_36757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fffffc; valaddr_reg:x3; val_offset:110271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110271*FLEN/8, x4, x1, x2) - -inst_36758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7fffffe; valaddr_reg:x3; val_offset:110274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110274*FLEN/8, x4, x1, x2) - -inst_36759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; -op3val:0xc7ffffff; valaddr_reg:x3; val_offset:110277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110277*FLEN/8, x4, x1, x2) - -inst_36760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:110280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110280*FLEN/8, x4, x1, x2) - -inst_36761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:110283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110283*FLEN/8, x4, x1, x2) - -inst_36762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:110286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110286*FLEN/8, x4, x1, x2) - -inst_36763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:110289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110289*FLEN/8, x4, x1, x2) - -inst_36764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:110292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110292*FLEN/8, x4, x1, x2) - -inst_36765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:110295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110295*FLEN/8, x4, x1, x2) - -inst_36766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:110298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110298*FLEN/8, x4, x1, x2) - -inst_36767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:110301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110301*FLEN/8, x4, x1, x2) - -inst_36768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:110304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110304*FLEN/8, x4, x1, x2) - -inst_36769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:110307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110307*FLEN/8, x4, x1, x2) - -inst_36770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:110310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110310*FLEN/8, x4, x1, x2) - -inst_36771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:110313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110313*FLEN/8, x4, x1, x2) - -inst_36772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:110316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110316*FLEN/8, x4, x1, x2) - -inst_36773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:110319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110319*FLEN/8, x4, x1, x2) - -inst_36774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:110322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110322*FLEN/8, x4, x1, x2) - -inst_36775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:110325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110325*FLEN/8, x4, x1, x2) - -inst_36776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5000000; valaddr_reg:x3; val_offset:110328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110328*FLEN/8, x4, x1, x2) - -inst_36777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5000001; valaddr_reg:x3; val_offset:110331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110331*FLEN/8, x4, x1, x2) - -inst_36778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5000003; valaddr_reg:x3; val_offset:110334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110334*FLEN/8, x4, x1, x2) - -inst_36779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5000007; valaddr_reg:x3; val_offset:110337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110337*FLEN/8, x4, x1, x2) - -inst_36780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x500000f; valaddr_reg:x3; val_offset:110340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110340*FLEN/8, x4, x1, x2) - -inst_36781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x500001f; valaddr_reg:x3; val_offset:110343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110343*FLEN/8, x4, x1, x2) - -inst_36782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x500003f; valaddr_reg:x3; val_offset:110346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110346*FLEN/8, x4, x1, x2) - -inst_36783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x500007f; valaddr_reg:x3; val_offset:110349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110349*FLEN/8, x4, x1, x2) - -inst_36784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x50000ff; valaddr_reg:x3; val_offset:110352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110352*FLEN/8, x4, x1, x2) - -inst_36785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x50001ff; valaddr_reg:x3; val_offset:110355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110355*FLEN/8, x4, x1, x2) - -inst_36786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x50003ff; valaddr_reg:x3; val_offset:110358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110358*FLEN/8, x4, x1, x2) - -inst_36787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x50007ff; valaddr_reg:x3; val_offset:110361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110361*FLEN/8, x4, x1, x2) - -inst_36788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5000fff; valaddr_reg:x3; val_offset:110364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110364*FLEN/8, x4, x1, x2) - -inst_36789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5001fff; valaddr_reg:x3; val_offset:110367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110367*FLEN/8, x4, x1, x2) - -inst_36790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5003fff; valaddr_reg:x3; val_offset:110370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110370*FLEN/8, x4, x1, x2) - -inst_36791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5007fff; valaddr_reg:x3; val_offset:110373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110373*FLEN/8, x4, x1, x2) - -inst_36792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x500ffff; valaddr_reg:x3; val_offset:110376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110376*FLEN/8, x4, x1, x2) - -inst_36793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x501ffff; valaddr_reg:x3; val_offset:110379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110379*FLEN/8, x4, x1, x2) - -inst_36794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x503ffff; valaddr_reg:x3; val_offset:110382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110382*FLEN/8, x4, x1, x2) - -inst_36795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x507ffff; valaddr_reg:x3; val_offset:110385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110385*FLEN/8, x4, x1, x2) - -inst_36796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x50fffff; valaddr_reg:x3; val_offset:110388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110388*FLEN/8, x4, x1, x2) - -inst_36797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x51fffff; valaddr_reg:x3; val_offset:110391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110391*FLEN/8, x4, x1, x2) - -inst_36798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x53fffff; valaddr_reg:x3; val_offset:110394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110394*FLEN/8, x4, x1, x2) - -inst_36799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5400000; valaddr_reg:x3; val_offset:110397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110397*FLEN/8, x4, x1, x2) - -inst_36800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5600000; valaddr_reg:x3; val_offset:110400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110400*FLEN/8, x4, x1, x2) - -inst_36801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5700000; valaddr_reg:x3; val_offset:110403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110403*FLEN/8, x4, x1, x2) - -inst_36802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x5780000; valaddr_reg:x3; val_offset:110406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110406*FLEN/8, x4, x1, x2) - -inst_36803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57c0000; valaddr_reg:x3; val_offset:110409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110409*FLEN/8, x4, x1, x2) - -inst_36804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57e0000; valaddr_reg:x3; val_offset:110412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110412*FLEN/8, x4, x1, x2) - -inst_36805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57f0000; valaddr_reg:x3; val_offset:110415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110415*FLEN/8, x4, x1, x2) - -inst_36806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57f8000; valaddr_reg:x3; val_offset:110418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110418*FLEN/8, x4, x1, x2) - -inst_36807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57fc000; valaddr_reg:x3; val_offset:110421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110421*FLEN/8, x4, x1, x2) - -inst_36808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57fe000; valaddr_reg:x3; val_offset:110424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110424*FLEN/8, x4, x1, x2) - -inst_36809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57ff000; valaddr_reg:x3; val_offset:110427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110427*FLEN/8, x4, x1, x2) - -inst_36810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57ff800; valaddr_reg:x3; val_offset:110430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110430*FLEN/8, x4, x1, x2) - -inst_36811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57ffc00; valaddr_reg:x3; val_offset:110433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110433*FLEN/8, x4, x1, x2) - -inst_36812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57ffe00; valaddr_reg:x3; val_offset:110436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110436*FLEN/8, x4, x1, x2) - -inst_36813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57fff00; valaddr_reg:x3; val_offset:110439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110439*FLEN/8, x4, x1, x2) - -inst_36814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57fff80; valaddr_reg:x3; val_offset:110442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110442*FLEN/8, x4, x1, x2) - -inst_36815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57fffc0; valaddr_reg:x3; val_offset:110445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110445*FLEN/8, x4, x1, x2) - -inst_36816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57fffe0; valaddr_reg:x3; val_offset:110448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110448*FLEN/8, x4, x1, x2) - -inst_36817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57ffff0; valaddr_reg:x3; val_offset:110451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110451*FLEN/8, x4, x1, x2) - -inst_36818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57ffff8; valaddr_reg:x3; val_offset:110454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110454*FLEN/8, x4, x1, x2) - -inst_36819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57ffffc; valaddr_reg:x3; val_offset:110457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110457*FLEN/8, x4, x1, x2) - -inst_36820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57ffffe; valaddr_reg:x3; val_offset:110460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110460*FLEN/8, x4, x1, x2) - -inst_36821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; -op3val:0x57fffff; valaddr_reg:x3; val_offset:110463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110463*FLEN/8, x4, x1, x2) - -inst_36822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3000000; valaddr_reg:x3; val_offset:110466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110466*FLEN/8, x4, x1, x2) - -inst_36823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3000001; valaddr_reg:x3; val_offset:110469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110469*FLEN/8, x4, x1, x2) - -inst_36824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3000003; valaddr_reg:x3; val_offset:110472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110472*FLEN/8, x4, x1, x2) - -inst_36825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3000007; valaddr_reg:x3; val_offset:110475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110475*FLEN/8, x4, x1, x2) - -inst_36826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb300000f; valaddr_reg:x3; val_offset:110478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110478*FLEN/8, x4, x1, x2) - -inst_36827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb300001f; valaddr_reg:x3; val_offset:110481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110481*FLEN/8, x4, x1, x2) - -inst_36828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb300003f; valaddr_reg:x3; val_offset:110484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110484*FLEN/8, x4, x1, x2) - -inst_36829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb300007f; valaddr_reg:x3; val_offset:110487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110487*FLEN/8, x4, x1, x2) - -inst_36830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb30000ff; valaddr_reg:x3; val_offset:110490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110490*FLEN/8, x4, x1, x2) - -inst_36831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb30001ff; valaddr_reg:x3; val_offset:110493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110493*FLEN/8, x4, x1, x2) - -inst_36832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb30003ff; valaddr_reg:x3; val_offset:110496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110496*FLEN/8, x4, x1, x2) - -inst_36833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb30007ff; valaddr_reg:x3; val_offset:110499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110499*FLEN/8, x4, x1, x2) - -inst_36834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3000fff; valaddr_reg:x3; val_offset:110502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110502*FLEN/8, x4, x1, x2) - -inst_36835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3001fff; valaddr_reg:x3; val_offset:110505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110505*FLEN/8, x4, x1, x2) - -inst_36836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3003fff; valaddr_reg:x3; val_offset:110508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110508*FLEN/8, x4, x1, x2) - -inst_36837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3007fff; valaddr_reg:x3; val_offset:110511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110511*FLEN/8, x4, x1, x2) - -inst_36838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb300ffff; valaddr_reg:x3; val_offset:110514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110514*FLEN/8, x4, x1, x2) - -inst_36839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb301ffff; valaddr_reg:x3; val_offset:110517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110517*FLEN/8, x4, x1, x2) - -inst_36840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb303ffff; valaddr_reg:x3; val_offset:110520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110520*FLEN/8, x4, x1, x2) - -inst_36841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb307ffff; valaddr_reg:x3; val_offset:110523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110523*FLEN/8, x4, x1, x2) - -inst_36842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb30fffff; valaddr_reg:x3; val_offset:110526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110526*FLEN/8, x4, x1, x2) - -inst_36843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb31fffff; valaddr_reg:x3; val_offset:110529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110529*FLEN/8, x4, x1, x2) - -inst_36844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb33fffff; valaddr_reg:x3; val_offset:110532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110532*FLEN/8, x4, x1, x2) - -inst_36845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3400000; valaddr_reg:x3; val_offset:110535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110535*FLEN/8, x4, x1, x2) - -inst_36846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3600000; valaddr_reg:x3; val_offset:110538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110538*FLEN/8, x4, x1, x2) - -inst_36847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3700000; valaddr_reg:x3; val_offset:110541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110541*FLEN/8, x4, x1, x2) - -inst_36848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb3780000; valaddr_reg:x3; val_offset:110544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110544*FLEN/8, x4, x1, x2) - -inst_36849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37c0000; valaddr_reg:x3; val_offset:110547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110547*FLEN/8, x4, x1, x2) - -inst_36850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37e0000; valaddr_reg:x3; val_offset:110550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110550*FLEN/8, x4, x1, x2) - -inst_36851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37f0000; valaddr_reg:x3; val_offset:110553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110553*FLEN/8, x4, x1, x2) - -inst_36852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37f8000; valaddr_reg:x3; val_offset:110556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110556*FLEN/8, x4, x1, x2) - -inst_36853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37fc000; valaddr_reg:x3; val_offset:110559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110559*FLEN/8, x4, x1, x2) - -inst_36854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37fe000; valaddr_reg:x3; val_offset:110562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110562*FLEN/8, x4, x1, x2) - -inst_36855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37ff000; valaddr_reg:x3; val_offset:110565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110565*FLEN/8, x4, x1, x2) - -inst_36856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37ff800; valaddr_reg:x3; val_offset:110568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110568*FLEN/8, x4, x1, x2) - -inst_36857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37ffc00; valaddr_reg:x3; val_offset:110571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110571*FLEN/8, x4, x1, x2) - -inst_36858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37ffe00; valaddr_reg:x3; val_offset:110574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110574*FLEN/8, x4, x1, x2) - -inst_36859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37fff00; valaddr_reg:x3; val_offset:110577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110577*FLEN/8, x4, x1, x2) - -inst_36860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37fff80; valaddr_reg:x3; val_offset:110580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110580*FLEN/8, x4, x1, x2) - -inst_36861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37fffc0; valaddr_reg:x3; val_offset:110583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110583*FLEN/8, x4, x1, x2) - -inst_36862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37fffe0; valaddr_reg:x3; val_offset:110586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110586*FLEN/8, x4, x1, x2) - -inst_36863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37ffff0; valaddr_reg:x3; val_offset:110589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110589*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_289) - -inst_36864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37ffff8; valaddr_reg:x3; val_offset:110592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110592*FLEN/8, x4, x1, x2) - -inst_36865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37ffffc; valaddr_reg:x3; val_offset:110595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110595*FLEN/8, x4, x1, x2) - -inst_36866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37ffffe; valaddr_reg:x3; val_offset:110598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110598*FLEN/8, x4, x1, x2) - -inst_36867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xb37fffff; valaddr_reg:x3; val_offset:110601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110601*FLEN/8, x4, x1, x2) - -inst_36868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbf800001; valaddr_reg:x3; val_offset:110604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110604*FLEN/8, x4, x1, x2) - -inst_36869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbf800003; valaddr_reg:x3; val_offset:110607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110607*FLEN/8, x4, x1, x2) - -inst_36870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbf800007; valaddr_reg:x3; val_offset:110610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110610*FLEN/8, x4, x1, x2) - -inst_36871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbf999999; valaddr_reg:x3; val_offset:110613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110613*FLEN/8, x4, x1, x2) - -inst_36872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:110616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110616*FLEN/8, x4, x1, x2) - -inst_36873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:110619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110619*FLEN/8, x4, x1, x2) - -inst_36874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:110622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110622*FLEN/8, x4, x1, x2) - -inst_36875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:110625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110625*FLEN/8, x4, x1, x2) - -inst_36876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:110628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110628*FLEN/8, x4, x1, x2) - -inst_36877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:110631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110631*FLEN/8, x4, x1, x2) - -inst_36878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:110634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110634*FLEN/8, x4, x1, x2) - -inst_36879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:110637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110637*FLEN/8, x4, x1, x2) - -inst_36880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:110640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110640*FLEN/8, x4, x1, x2) - -inst_36881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:110643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110643*FLEN/8, x4, x1, x2) - -inst_36882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:110646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110646*FLEN/8, x4, x1, x2) - -inst_36883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:110649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110649*FLEN/8, x4, x1, x2) - -inst_36884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:110652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110652*FLEN/8, x4, x1, x2) - -inst_36885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:110655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110655*FLEN/8, x4, x1, x2) - -inst_36886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:110658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110658*FLEN/8, x4, x1, x2) - -inst_36887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:110661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110661*FLEN/8, x4, x1, x2) - -inst_36888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:110664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110664*FLEN/8, x4, x1, x2) - -inst_36889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:110667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110667*FLEN/8, x4, x1, x2) - -inst_36890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:110670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110670*FLEN/8, x4, x1, x2) - -inst_36891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:110673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110673*FLEN/8, x4, x1, x2) - -inst_36892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:110676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110676*FLEN/8, x4, x1, x2) - -inst_36893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:110679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110679*FLEN/8, x4, x1, x2) - -inst_36894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:110682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110682*FLEN/8, x4, x1, x2) - -inst_36895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:110685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110685*FLEN/8, x4, x1, x2) - -inst_36896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:110688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110688*FLEN/8, x4, x1, x2) - -inst_36897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:110691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110691*FLEN/8, x4, x1, x2) - -inst_36898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:110694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110694*FLEN/8, x4, x1, x2) - -inst_36899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:110697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110697*FLEN/8, x4, x1, x2) - -inst_36900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c000000; valaddr_reg:x3; val_offset:110700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110700*FLEN/8, x4, x1, x2) - -inst_36901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c000001; valaddr_reg:x3; val_offset:110703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110703*FLEN/8, x4, x1, x2) - -inst_36902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c000003; valaddr_reg:x3; val_offset:110706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110706*FLEN/8, x4, x1, x2) - -inst_36903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c000007; valaddr_reg:x3; val_offset:110709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110709*FLEN/8, x4, x1, x2) - -inst_36904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c00000f; valaddr_reg:x3; val_offset:110712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110712*FLEN/8, x4, x1, x2) - -inst_36905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c00001f; valaddr_reg:x3; val_offset:110715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110715*FLEN/8, x4, x1, x2) - -inst_36906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c00003f; valaddr_reg:x3; val_offset:110718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110718*FLEN/8, x4, x1, x2) - -inst_36907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c00007f; valaddr_reg:x3; val_offset:110721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110721*FLEN/8, x4, x1, x2) - -inst_36908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c0000ff; valaddr_reg:x3; val_offset:110724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110724*FLEN/8, x4, x1, x2) - -inst_36909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c0001ff; valaddr_reg:x3; val_offset:110727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110727*FLEN/8, x4, x1, x2) - -inst_36910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c0003ff; valaddr_reg:x3; val_offset:110730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110730*FLEN/8, x4, x1, x2) - -inst_36911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c0007ff; valaddr_reg:x3; val_offset:110733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110733*FLEN/8, x4, x1, x2) - -inst_36912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c000fff; valaddr_reg:x3; val_offset:110736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110736*FLEN/8, x4, x1, x2) - -inst_36913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c001fff; valaddr_reg:x3; val_offset:110739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110739*FLEN/8, x4, x1, x2) - -inst_36914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c003fff; valaddr_reg:x3; val_offset:110742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110742*FLEN/8, x4, x1, x2) - -inst_36915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c007fff; valaddr_reg:x3; val_offset:110745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110745*FLEN/8, x4, x1, x2) - -inst_36916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c00ffff; valaddr_reg:x3; val_offset:110748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110748*FLEN/8, x4, x1, x2) - -inst_36917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c01ffff; valaddr_reg:x3; val_offset:110751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110751*FLEN/8, x4, x1, x2) - -inst_36918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c03ffff; valaddr_reg:x3; val_offset:110754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110754*FLEN/8, x4, x1, x2) - -inst_36919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c07ffff; valaddr_reg:x3; val_offset:110757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110757*FLEN/8, x4, x1, x2) - -inst_36920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c0fffff; valaddr_reg:x3; val_offset:110760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110760*FLEN/8, x4, x1, x2) - -inst_36921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c1fffff; valaddr_reg:x3; val_offset:110763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110763*FLEN/8, x4, x1, x2) - -inst_36922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c3fffff; valaddr_reg:x3; val_offset:110766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110766*FLEN/8, x4, x1, x2) - -inst_36923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c400000; valaddr_reg:x3; val_offset:110769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110769*FLEN/8, x4, x1, x2) - -inst_36924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c600000; valaddr_reg:x3; val_offset:110772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110772*FLEN/8, x4, x1, x2) - -inst_36925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c700000; valaddr_reg:x3; val_offset:110775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110775*FLEN/8, x4, x1, x2) - -inst_36926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c780000; valaddr_reg:x3; val_offset:110778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110778*FLEN/8, x4, x1, x2) - -inst_36927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7c0000; valaddr_reg:x3; val_offset:110781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110781*FLEN/8, x4, x1, x2) - -inst_36928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7e0000; valaddr_reg:x3; val_offset:110784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110784*FLEN/8, x4, x1, x2) - -inst_36929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7f0000; valaddr_reg:x3; val_offset:110787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110787*FLEN/8, x4, x1, x2) - -inst_36930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7f8000; valaddr_reg:x3; val_offset:110790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110790*FLEN/8, x4, x1, x2) - -inst_36931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7fc000; valaddr_reg:x3; val_offset:110793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110793*FLEN/8, x4, x1, x2) - -inst_36932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7fe000; valaddr_reg:x3; val_offset:110796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110796*FLEN/8, x4, x1, x2) - -inst_36933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7ff000; valaddr_reg:x3; val_offset:110799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110799*FLEN/8, x4, x1, x2) - -inst_36934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7ff800; valaddr_reg:x3; val_offset:110802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110802*FLEN/8, x4, x1, x2) - -inst_36935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7ffc00; valaddr_reg:x3; val_offset:110805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110805*FLEN/8, x4, x1, x2) - -inst_36936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7ffe00; valaddr_reg:x3; val_offset:110808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110808*FLEN/8, x4, x1, x2) - -inst_36937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7fff00; valaddr_reg:x3; val_offset:110811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110811*FLEN/8, x4, x1, x2) - -inst_36938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7fff80; valaddr_reg:x3; val_offset:110814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110814*FLEN/8, x4, x1, x2) - -inst_36939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7fffc0; valaddr_reg:x3; val_offset:110817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110817*FLEN/8, x4, x1, x2) - -inst_36940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7fffe0; valaddr_reg:x3; val_offset:110820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110820*FLEN/8, x4, x1, x2) - -inst_36941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7ffff0; valaddr_reg:x3; val_offset:110823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110823*FLEN/8, x4, x1, x2) - -inst_36942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7ffff8; valaddr_reg:x3; val_offset:110826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110826*FLEN/8, x4, x1, x2) - -inst_36943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7ffffc; valaddr_reg:x3; val_offset:110829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110829*FLEN/8, x4, x1, x2) - -inst_36944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7ffffe; valaddr_reg:x3; val_offset:110832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110832*FLEN/8, x4, x1, x2) - -inst_36945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; -op3val:0x8c7fffff; valaddr_reg:x3; val_offset:110835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110835*FLEN/8, x4, x1, x2) - -inst_36946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:110838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110838*FLEN/8, x4, x1, x2) - -inst_36947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:110841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110841*FLEN/8, x4, x1, x2) - -inst_36948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:110844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110844*FLEN/8, x4, x1, x2) - -inst_36949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:110847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110847*FLEN/8, x4, x1, x2) - -inst_36950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:110850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110850*FLEN/8, x4, x1, x2) - -inst_36951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:110853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110853*FLEN/8, x4, x1, x2) - -inst_36952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:110856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110856*FLEN/8, x4, x1, x2) - -inst_36953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:110859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110859*FLEN/8, x4, x1, x2) - -inst_36954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:110862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110862*FLEN/8, x4, x1, x2) - -inst_36955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:110865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110865*FLEN/8, x4, x1, x2) - -inst_36956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:110868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110868*FLEN/8, x4, x1, x2) - -inst_36957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:110871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110871*FLEN/8, x4, x1, x2) - -inst_36958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:110874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110874*FLEN/8, x4, x1, x2) - -inst_36959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:110877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110877*FLEN/8, x4, x1, x2) - -inst_36960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:110880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110880*FLEN/8, x4, x1, x2) - -inst_36961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:110883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110883*FLEN/8, x4, x1, x2) - -inst_36962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x800000; valaddr_reg:x3; val_offset:110886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110886*FLEN/8, x4, x1, x2) - -inst_36963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:110889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110889*FLEN/8, x4, x1, x2) - -inst_36964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:110892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110892*FLEN/8, x4, x1, x2) - -inst_36965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:110895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110895*FLEN/8, x4, x1, x2) - -inst_36966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x80000f; valaddr_reg:x3; val_offset:110898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110898*FLEN/8, x4, x1, x2) - -inst_36967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x80001f; valaddr_reg:x3; val_offset:110901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110901*FLEN/8, x4, x1, x2) - -inst_36968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x80003f; valaddr_reg:x3; val_offset:110904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110904*FLEN/8, x4, x1, x2) - -inst_36969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x80007f; valaddr_reg:x3; val_offset:110907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110907*FLEN/8, x4, x1, x2) - -inst_36970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x8000ff; valaddr_reg:x3; val_offset:110910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110910*FLEN/8, x4, x1, x2) - -inst_36971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x8001ff; valaddr_reg:x3; val_offset:110913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110913*FLEN/8, x4, x1, x2) - -inst_36972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x8003ff; valaddr_reg:x3; val_offset:110916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110916*FLEN/8, x4, x1, x2) - -inst_36973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x8007ff; valaddr_reg:x3; val_offset:110919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110919*FLEN/8, x4, x1, x2) - -inst_36974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x800fff; valaddr_reg:x3; val_offset:110922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110922*FLEN/8, x4, x1, x2) - -inst_36975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x801fff; valaddr_reg:x3; val_offset:110925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110925*FLEN/8, x4, x1, x2) - -inst_36976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x803fff; valaddr_reg:x3; val_offset:110928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110928*FLEN/8, x4, x1, x2) - -inst_36977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x807fff; valaddr_reg:x3; val_offset:110931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110931*FLEN/8, x4, x1, x2) - -inst_36978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x80ffff; valaddr_reg:x3; val_offset:110934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110934*FLEN/8, x4, x1, x2) - -inst_36979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x81ffff; valaddr_reg:x3; val_offset:110937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110937*FLEN/8, x4, x1, x2) - -inst_36980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x83ffff; valaddr_reg:x3; val_offset:110940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110940*FLEN/8, x4, x1, x2) - -inst_36981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x87ffff; valaddr_reg:x3; val_offset:110943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110943*FLEN/8, x4, x1, x2) - -inst_36982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x8fffff; valaddr_reg:x3; val_offset:110946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110946*FLEN/8, x4, x1, x2) - -inst_36983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0x9fffff; valaddr_reg:x3; val_offset:110949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110949*FLEN/8, x4, x1, x2) - -inst_36984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xbfffff; valaddr_reg:x3; val_offset:110952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110952*FLEN/8, x4, x1, x2) - -inst_36985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xc00000; valaddr_reg:x3; val_offset:110955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110955*FLEN/8, x4, x1, x2) - -inst_36986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xe00000; valaddr_reg:x3; val_offset:110958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110958*FLEN/8, x4, x1, x2) - -inst_36987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xf00000; valaddr_reg:x3; val_offset:110961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110961*FLEN/8, x4, x1, x2) - -inst_36988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xf80000; valaddr_reg:x3; val_offset:110964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110964*FLEN/8, x4, x1, x2) - -inst_36989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfc0000; valaddr_reg:x3; val_offset:110967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110967*FLEN/8, x4, x1, x2) - -inst_36990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfe0000; valaddr_reg:x3; val_offset:110970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110970*FLEN/8, x4, x1, x2) - -inst_36991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xff0000; valaddr_reg:x3; val_offset:110973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110973*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_290) - -inst_36992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xff8000; valaddr_reg:x3; val_offset:110976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110976*FLEN/8, x4, x1, x2) - -inst_36993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xffc000; valaddr_reg:x3; val_offset:110979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110979*FLEN/8, x4, x1, x2) - -inst_36994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xffe000; valaddr_reg:x3; val_offset:110982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110982*FLEN/8, x4, x1, x2) - -inst_36995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfff000; valaddr_reg:x3; val_offset:110985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110985*FLEN/8, x4, x1, x2) - -inst_36996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfff800; valaddr_reg:x3; val_offset:110988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110988*FLEN/8, x4, x1, x2) - -inst_36997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfffc00; valaddr_reg:x3; val_offset:110991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110991*FLEN/8, x4, x1, x2) - -inst_36998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfffe00; valaddr_reg:x3; val_offset:110994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110994*FLEN/8, x4, x1, x2) - -inst_36999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xffff00; valaddr_reg:x3; val_offset:110997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110997*FLEN/8, x4, x1, x2) - -inst_37000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xffff80; valaddr_reg:x3; val_offset:111000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111000*FLEN/8, x4, x1, x2) - -inst_37001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xffffc0; valaddr_reg:x3; val_offset:111003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111003*FLEN/8, x4, x1, x2) - -inst_37002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xffffe0; valaddr_reg:x3; val_offset:111006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111006*FLEN/8, x4, x1, x2) - -inst_37003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfffff0; valaddr_reg:x3; val_offset:111009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111009*FLEN/8, x4, x1, x2) - -inst_37004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:111012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111012*FLEN/8, x4, x1, x2) - -inst_37005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:111015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111015*FLEN/8, x4, x1, x2) - -inst_37006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:111018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111018*FLEN/8, x4, x1, x2) - -inst_37007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; -op3val:0xffffff; valaddr_reg:x3; val_offset:111021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111021*FLEN/8, x4, x1, x2) - -inst_37008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:111024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111024*FLEN/8, x4, x1, x2) - -inst_37009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:111027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111027*FLEN/8, x4, x1, x2) - -inst_37010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:111030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111030*FLEN/8, x4, x1, x2) - -inst_37011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:111033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111033*FLEN/8, x4, x1, x2) - -inst_37012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:111036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111036*FLEN/8, x4, x1, x2) - -inst_37013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:111039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111039*FLEN/8, x4, x1, x2) - -inst_37014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:111042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111042*FLEN/8, x4, x1, x2) - -inst_37015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:111045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111045*FLEN/8, x4, x1, x2) - -inst_37016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:111048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111048*FLEN/8, x4, x1, x2) - -inst_37017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:111051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111051*FLEN/8, x4, x1, x2) - -inst_37018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:111054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111054*FLEN/8, x4, x1, x2) - -inst_37019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:111057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111057*FLEN/8, x4, x1, x2) - -inst_37020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:111060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111060*FLEN/8, x4, x1, x2) - -inst_37021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:111063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111063*FLEN/8, x4, x1, x2) - -inst_37022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:111066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111066*FLEN/8, x4, x1, x2) - -inst_37023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:111069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111069*FLEN/8, x4, x1, x2) - -inst_37024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85800000; valaddr_reg:x3; val_offset:111072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111072*FLEN/8, x4, x1, x2) - -inst_37025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85800001; valaddr_reg:x3; val_offset:111075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111075*FLEN/8, x4, x1, x2) - -inst_37026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85800003; valaddr_reg:x3; val_offset:111078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111078*FLEN/8, x4, x1, x2) - -inst_37027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85800007; valaddr_reg:x3; val_offset:111081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111081*FLEN/8, x4, x1, x2) - -inst_37028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8580000f; valaddr_reg:x3; val_offset:111084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111084*FLEN/8, x4, x1, x2) - -inst_37029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8580001f; valaddr_reg:x3; val_offset:111087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111087*FLEN/8, x4, x1, x2) - -inst_37030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8580003f; valaddr_reg:x3; val_offset:111090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111090*FLEN/8, x4, x1, x2) - -inst_37031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8580007f; valaddr_reg:x3; val_offset:111093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111093*FLEN/8, x4, x1, x2) - -inst_37032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x858000ff; valaddr_reg:x3; val_offset:111096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111096*FLEN/8, x4, x1, x2) - -inst_37033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x858001ff; valaddr_reg:x3; val_offset:111099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111099*FLEN/8, x4, x1, x2) - -inst_37034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x858003ff; valaddr_reg:x3; val_offset:111102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111102*FLEN/8, x4, x1, x2) - -inst_37035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x858007ff; valaddr_reg:x3; val_offset:111105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111105*FLEN/8, x4, x1, x2) - -inst_37036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85800fff; valaddr_reg:x3; val_offset:111108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111108*FLEN/8, x4, x1, x2) - -inst_37037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85801fff; valaddr_reg:x3; val_offset:111111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111111*FLEN/8, x4, x1, x2) - -inst_37038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85803fff; valaddr_reg:x3; val_offset:111114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111114*FLEN/8, x4, x1, x2) - -inst_37039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85807fff; valaddr_reg:x3; val_offset:111117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111117*FLEN/8, x4, x1, x2) - -inst_37040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8580ffff; valaddr_reg:x3; val_offset:111120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111120*FLEN/8, x4, x1, x2) - -inst_37041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8581ffff; valaddr_reg:x3; val_offset:111123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111123*FLEN/8, x4, x1, x2) - -inst_37042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8583ffff; valaddr_reg:x3; val_offset:111126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111126*FLEN/8, x4, x1, x2) - -inst_37043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x8587ffff; valaddr_reg:x3; val_offset:111129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111129*FLEN/8, x4, x1, x2) - -inst_37044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x858fffff; valaddr_reg:x3; val_offset:111132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111132*FLEN/8, x4, x1, x2) - -inst_37045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x859fffff; valaddr_reg:x3; val_offset:111135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111135*FLEN/8, x4, x1, x2) - -inst_37046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85bfffff; valaddr_reg:x3; val_offset:111138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111138*FLEN/8, x4, x1, x2) - -inst_37047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85c00000; valaddr_reg:x3; val_offset:111141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111141*FLEN/8, x4, x1, x2) - -inst_37048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85e00000; valaddr_reg:x3; val_offset:111144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111144*FLEN/8, x4, x1, x2) - -inst_37049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85f00000; valaddr_reg:x3; val_offset:111147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111147*FLEN/8, x4, x1, x2) - -inst_37050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85f80000; valaddr_reg:x3; val_offset:111150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111150*FLEN/8, x4, x1, x2) - -inst_37051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fc0000; valaddr_reg:x3; val_offset:111153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111153*FLEN/8, x4, x1, x2) - -inst_37052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fe0000; valaddr_reg:x3; val_offset:111156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111156*FLEN/8, x4, x1, x2) - -inst_37053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ff0000; valaddr_reg:x3; val_offset:111159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111159*FLEN/8, x4, x1, x2) - -inst_37054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ff8000; valaddr_reg:x3; val_offset:111162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111162*FLEN/8, x4, x1, x2) - -inst_37055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ffc000; valaddr_reg:x3; val_offset:111165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111165*FLEN/8, x4, x1, x2) - -inst_37056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ffe000; valaddr_reg:x3; val_offset:111168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111168*FLEN/8, x4, x1, x2) - -inst_37057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fff000; valaddr_reg:x3; val_offset:111171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111171*FLEN/8, x4, x1, x2) - -inst_37058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fff800; valaddr_reg:x3; val_offset:111174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111174*FLEN/8, x4, x1, x2) - -inst_37059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fffc00; valaddr_reg:x3; val_offset:111177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111177*FLEN/8, x4, x1, x2) - -inst_37060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fffe00; valaddr_reg:x3; val_offset:111180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111180*FLEN/8, x4, x1, x2) - -inst_37061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ffff00; valaddr_reg:x3; val_offset:111183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111183*FLEN/8, x4, x1, x2) - -inst_37062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ffff80; valaddr_reg:x3; val_offset:111186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111186*FLEN/8, x4, x1, x2) - -inst_37063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ffffc0; valaddr_reg:x3; val_offset:111189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111189*FLEN/8, x4, x1, x2) - -inst_37064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ffffe0; valaddr_reg:x3; val_offset:111192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111192*FLEN/8, x4, x1, x2) - -inst_37065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fffff0; valaddr_reg:x3; val_offset:111195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111195*FLEN/8, x4, x1, x2) - -inst_37066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fffff8; valaddr_reg:x3; val_offset:111198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111198*FLEN/8, x4, x1, x2) - -inst_37067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fffffc; valaddr_reg:x3; val_offset:111201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111201*FLEN/8, x4, x1, x2) - -inst_37068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85fffffe; valaddr_reg:x3; val_offset:111204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111204*FLEN/8, x4, x1, x2) - -inst_37069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; -op3val:0x85ffffff; valaddr_reg:x3; val_offset:111207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111207*FLEN/8, x4, x1, x2) - -inst_37070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:111210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111210*FLEN/8, x4, x1, x2) - -inst_37071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:111213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111213*FLEN/8, x4, x1, x2) - -inst_37072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:111216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111216*FLEN/8, x4, x1, x2) - -inst_37073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:111219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111219*FLEN/8, x4, x1, x2) - -inst_37074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:111222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111222*FLEN/8, x4, x1, x2) - -inst_37075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:111225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111225*FLEN/8, x4, x1, x2) - -inst_37076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:111228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111228*FLEN/8, x4, x1, x2) - -inst_37077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:111231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111231*FLEN/8, x4, x1, x2) - -inst_37078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:111234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111234*FLEN/8, x4, x1, x2) - -inst_37079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:111237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111237*FLEN/8, x4, x1, x2) - -inst_37080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:111240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111240*FLEN/8, x4, x1, x2) - -inst_37081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:111243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111243*FLEN/8, x4, x1, x2) - -inst_37082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:111246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111246*FLEN/8, x4, x1, x2) - -inst_37083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:111249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111249*FLEN/8, x4, x1, x2) - -inst_37084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:111252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111252*FLEN/8, x4, x1, x2) - -inst_37085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:111255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111255*FLEN/8, x4, x1, x2) - -inst_37086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2800000; valaddr_reg:x3; val_offset:111258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111258*FLEN/8, x4, x1, x2) - -inst_37087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2800001; valaddr_reg:x3; val_offset:111261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111261*FLEN/8, x4, x1, x2) - -inst_37088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2800003; valaddr_reg:x3; val_offset:111264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111264*FLEN/8, x4, x1, x2) - -inst_37089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2800007; valaddr_reg:x3; val_offset:111267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111267*FLEN/8, x4, x1, x2) - -inst_37090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x280000f; valaddr_reg:x3; val_offset:111270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111270*FLEN/8, x4, x1, x2) - -inst_37091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x280001f; valaddr_reg:x3; val_offset:111273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111273*FLEN/8, x4, x1, x2) - -inst_37092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x280003f; valaddr_reg:x3; val_offset:111276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111276*FLEN/8, x4, x1, x2) - -inst_37093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x280007f; valaddr_reg:x3; val_offset:111279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111279*FLEN/8, x4, x1, x2) - -inst_37094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x28000ff; valaddr_reg:x3; val_offset:111282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111282*FLEN/8, x4, x1, x2) - -inst_37095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x28001ff; valaddr_reg:x3; val_offset:111285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111285*FLEN/8, x4, x1, x2) - -inst_37096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x28003ff; valaddr_reg:x3; val_offset:111288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111288*FLEN/8, x4, x1, x2) - -inst_37097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x28007ff; valaddr_reg:x3; val_offset:111291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111291*FLEN/8, x4, x1, x2) - -inst_37098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2800fff; valaddr_reg:x3; val_offset:111294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111294*FLEN/8, x4, x1, x2) - -inst_37099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2801fff; valaddr_reg:x3; val_offset:111297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111297*FLEN/8, x4, x1, x2) - -inst_37100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2803fff; valaddr_reg:x3; val_offset:111300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111300*FLEN/8, x4, x1, x2) - -inst_37101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2807fff; valaddr_reg:x3; val_offset:111303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111303*FLEN/8, x4, x1, x2) - -inst_37102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x280ffff; valaddr_reg:x3; val_offset:111306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111306*FLEN/8, x4, x1, x2) - -inst_37103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x281ffff; valaddr_reg:x3; val_offset:111309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111309*FLEN/8, x4, x1, x2) - -inst_37104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x283ffff; valaddr_reg:x3; val_offset:111312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111312*FLEN/8, x4, x1, x2) - -inst_37105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x287ffff; valaddr_reg:x3; val_offset:111315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111315*FLEN/8, x4, x1, x2) - -inst_37106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x28fffff; valaddr_reg:x3; val_offset:111318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111318*FLEN/8, x4, x1, x2) - -inst_37107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x29fffff; valaddr_reg:x3; val_offset:111321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111321*FLEN/8, x4, x1, x2) - -inst_37108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2bfffff; valaddr_reg:x3; val_offset:111324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111324*FLEN/8, x4, x1, x2) - -inst_37109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2c00000; valaddr_reg:x3; val_offset:111327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111327*FLEN/8, x4, x1, x2) - -inst_37110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2e00000; valaddr_reg:x3; val_offset:111330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111330*FLEN/8, x4, x1, x2) - -inst_37111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2f00000; valaddr_reg:x3; val_offset:111333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111333*FLEN/8, x4, x1, x2) - -inst_37112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2f80000; valaddr_reg:x3; val_offset:111336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111336*FLEN/8, x4, x1, x2) - -inst_37113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fc0000; valaddr_reg:x3; val_offset:111339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111339*FLEN/8, x4, x1, x2) - -inst_37114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fe0000; valaddr_reg:x3; val_offset:111342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111342*FLEN/8, x4, x1, x2) - -inst_37115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ff0000; valaddr_reg:x3; val_offset:111345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111345*FLEN/8, x4, x1, x2) - -inst_37116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ff8000; valaddr_reg:x3; val_offset:111348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111348*FLEN/8, x4, x1, x2) - -inst_37117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ffc000; valaddr_reg:x3; val_offset:111351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111351*FLEN/8, x4, x1, x2) - -inst_37118: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ffe000; valaddr_reg:x3; val_offset:111354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111354*FLEN/8, x4, x1, x2) - -inst_37119: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fff000; valaddr_reg:x3; val_offset:111357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111357*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_291) - -inst_37120: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fff800; valaddr_reg:x3; val_offset:111360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111360*FLEN/8, x4, x1, x2) - -inst_37121: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fffc00; valaddr_reg:x3; val_offset:111363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111363*FLEN/8, x4, x1, x2) - -inst_37122: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fffe00; valaddr_reg:x3; val_offset:111366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111366*FLEN/8, x4, x1, x2) - -inst_37123: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ffff00; valaddr_reg:x3; val_offset:111369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111369*FLEN/8, x4, x1, x2) - -inst_37124: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ffff80; valaddr_reg:x3; val_offset:111372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111372*FLEN/8, x4, x1, x2) - -inst_37125: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ffffc0; valaddr_reg:x3; val_offset:111375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111375*FLEN/8, x4, x1, x2) - -inst_37126: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ffffe0; valaddr_reg:x3; val_offset:111378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111378*FLEN/8, x4, x1, x2) - -inst_37127: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fffff0; valaddr_reg:x3; val_offset:111381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111381*FLEN/8, x4, x1, x2) - -inst_37128: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fffff8; valaddr_reg:x3; val_offset:111384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111384*FLEN/8, x4, x1, x2) - -inst_37129: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fffffc; valaddr_reg:x3; val_offset:111387*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111387*FLEN/8, x4, x1, x2) - -inst_37130: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2fffffe; valaddr_reg:x3; val_offset:111390*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111390*FLEN/8, x4, x1, x2) - -inst_37131: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; -op3val:0x2ffffff; valaddr_reg:x3; val_offset:111393*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111393*FLEN/8, x4, x1, x2) - -inst_37132: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80000000; valaddr_reg:x3; val_offset:111396*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111396*FLEN/8, x4, x1, x2) - -inst_37133: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:111399*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111399*FLEN/8, x4, x1, x2) - -inst_37134: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:111402*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111402*FLEN/8, x4, x1, x2) - -inst_37135: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:111405*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111405*FLEN/8, x4, x1, x2) - -inst_37136: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8000000f; valaddr_reg:x3; val_offset:111408*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111408*FLEN/8, x4, x1, x2) - -inst_37137: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8000001f; valaddr_reg:x3; val_offset:111411*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111411*FLEN/8, x4, x1, x2) - -inst_37138: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8000003f; valaddr_reg:x3; val_offset:111414*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111414*FLEN/8, x4, x1, x2) - -inst_37139: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8000007f; valaddr_reg:x3; val_offset:111417*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111417*FLEN/8, x4, x1, x2) - -inst_37140: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x800000ff; valaddr_reg:x3; val_offset:111420*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111420*FLEN/8, x4, x1, x2) - -inst_37141: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x800001ff; valaddr_reg:x3; val_offset:111423*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111423*FLEN/8, x4, x1, x2) - -inst_37142: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x800003ff; valaddr_reg:x3; val_offset:111426*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111426*FLEN/8, x4, x1, x2) - -inst_37143: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x800007ff; valaddr_reg:x3; val_offset:111429*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111429*FLEN/8, x4, x1, x2) - -inst_37144: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80000fff; valaddr_reg:x3; val_offset:111432*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111432*FLEN/8, x4, x1, x2) - -inst_37145: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80001fff; valaddr_reg:x3; val_offset:111435*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111435*FLEN/8, x4, x1, x2) - -inst_37146: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80003fff; valaddr_reg:x3; val_offset:111438*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111438*FLEN/8, x4, x1, x2) - -inst_37147: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80007fff; valaddr_reg:x3; val_offset:111441*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111441*FLEN/8, x4, x1, x2) - -inst_37148: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8000ffff; valaddr_reg:x3; val_offset:111444*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111444*FLEN/8, x4, x1, x2) - -inst_37149: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8001ffff; valaddr_reg:x3; val_offset:111447*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111447*FLEN/8, x4, x1, x2) - -inst_37150: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8003ffff; valaddr_reg:x3; val_offset:111450*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111450*FLEN/8, x4, x1, x2) - -inst_37151: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8007ffff; valaddr_reg:x3; val_offset:111453*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111453*FLEN/8, x4, x1, x2) - -inst_37152: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x800fffff; valaddr_reg:x3; val_offset:111456*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111456*FLEN/8, x4, x1, x2) - -inst_37153: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:111459*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111459*FLEN/8, x4, x1, x2) - -inst_37154: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x801fffff; valaddr_reg:x3; val_offset:111462*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111462*FLEN/8, x4, x1, x2) - -inst_37155: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:111465*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111465*FLEN/8, x4, x1, x2) - -inst_37156: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:111468*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111468*FLEN/8, x4, x1, x2) - -inst_37157: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:111471*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111471*FLEN/8, x4, x1, x2) - -inst_37158: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:111474*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111474*FLEN/8, x4, x1, x2) - -inst_37159: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x803fffff; valaddr_reg:x3; val_offset:111477*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111477*FLEN/8, x4, x1, x2) - -inst_37160: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80400000; valaddr_reg:x3; val_offset:111480*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111480*FLEN/8, x4, x1, x2) - -inst_37161: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:111483*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111483*FLEN/8, x4, x1, x2) - -inst_37162: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:111486*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111486*FLEN/8, x4, x1, x2) - -inst_37163: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:111489*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111489*FLEN/8, x4, x1, x2) - -inst_37164: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80600000; valaddr_reg:x3; val_offset:111492*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111492*FLEN/8, x4, x1, x2) - -inst_37165: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:111495*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111495*FLEN/8, x4, x1, x2) - -inst_37166: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:111498*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111498*FLEN/8, x4, x1, x2) - -inst_37167: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80700000; valaddr_reg:x3; val_offset:111501*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111501*FLEN/8, x4, x1, x2) - -inst_37168: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x80780000; valaddr_reg:x3; val_offset:111504*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111504*FLEN/8, x4, x1, x2) - -inst_37169: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807c0000; valaddr_reg:x3; val_offset:111507*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111507*FLEN/8, x4, x1, x2) - -inst_37170: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807e0000; valaddr_reg:x3; val_offset:111510*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111510*FLEN/8, x4, x1, x2) - -inst_37171: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807f0000; valaddr_reg:x3; val_offset:111513*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111513*FLEN/8, x4, x1, x2) - -inst_37172: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807f8000; valaddr_reg:x3; val_offset:111516*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111516*FLEN/8, x4, x1, x2) - -inst_37173: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807fc000; valaddr_reg:x3; val_offset:111519*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111519*FLEN/8, x4, x1, x2) - -inst_37174: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807fe000; valaddr_reg:x3; val_offset:111522*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111522*FLEN/8, x4, x1, x2) - -inst_37175: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807ff000; valaddr_reg:x3; val_offset:111525*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111525*FLEN/8, x4, x1, x2) - -inst_37176: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807ff800; valaddr_reg:x3; val_offset:111528*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111528*FLEN/8, x4, x1, x2) - -inst_37177: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807ffc00; valaddr_reg:x3; val_offset:111531*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111531*FLEN/8, x4, x1, x2) - -inst_37178: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807ffe00; valaddr_reg:x3; val_offset:111534*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111534*FLEN/8, x4, x1, x2) - -inst_37179: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807fff00; valaddr_reg:x3; val_offset:111537*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111537*FLEN/8, x4, x1, x2) - -inst_37180: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807fff80; valaddr_reg:x3; val_offset:111540*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111540*FLEN/8, x4, x1, x2) - -inst_37181: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807fffc0; valaddr_reg:x3; val_offset:111543*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111543*FLEN/8, x4, x1, x2) - -inst_37182: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807fffe0; valaddr_reg:x3; val_offset:111546*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111546*FLEN/8, x4, x1, x2) - -inst_37183: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807ffff0; valaddr_reg:x3; val_offset:111549*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111549*FLEN/8, x4, x1, x2) - -inst_37184: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:111552*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111552*FLEN/8, x4, x1, x2) - -inst_37185: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:111555*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111555*FLEN/8, x4, x1, x2) - -inst_37186: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:111558*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111558*FLEN/8, x4, x1, x2) - -inst_37187: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; -op3val:0x807fffff; valaddr_reg:x3; val_offset:111561*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111561*FLEN/8, x4, x1, x2) - -inst_37188: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39000000; valaddr_reg:x3; val_offset:111564*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111564*FLEN/8, x4, x1, x2) - -inst_37189: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39000001; valaddr_reg:x3; val_offset:111567*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111567*FLEN/8, x4, x1, x2) - -inst_37190: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39000003; valaddr_reg:x3; val_offset:111570*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111570*FLEN/8, x4, x1, x2) - -inst_37191: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39000007; valaddr_reg:x3; val_offset:111573*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111573*FLEN/8, x4, x1, x2) - -inst_37192: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3900000f; valaddr_reg:x3; val_offset:111576*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111576*FLEN/8, x4, x1, x2) - -inst_37193: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3900001f; valaddr_reg:x3; val_offset:111579*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111579*FLEN/8, x4, x1, x2) - -inst_37194: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3900003f; valaddr_reg:x3; val_offset:111582*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111582*FLEN/8, x4, x1, x2) - -inst_37195: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3900007f; valaddr_reg:x3; val_offset:111585*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111585*FLEN/8, x4, x1, x2) - -inst_37196: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x390000ff; valaddr_reg:x3; val_offset:111588*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111588*FLEN/8, x4, x1, x2) - -inst_37197: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x390001ff; valaddr_reg:x3; val_offset:111591*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111591*FLEN/8, x4, x1, x2) - -inst_37198: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x390003ff; valaddr_reg:x3; val_offset:111594*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111594*FLEN/8, x4, x1, x2) - -inst_37199: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x390007ff; valaddr_reg:x3; val_offset:111597*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111597*FLEN/8, x4, x1, x2) - -inst_37200: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39000fff; valaddr_reg:x3; val_offset:111600*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111600*FLEN/8, x4, x1, x2) - -inst_37201: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39001fff; valaddr_reg:x3; val_offset:111603*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111603*FLEN/8, x4, x1, x2) - -inst_37202: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39003fff; valaddr_reg:x3; val_offset:111606*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111606*FLEN/8, x4, x1, x2) - -inst_37203: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39007fff; valaddr_reg:x3; val_offset:111609*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111609*FLEN/8, x4, x1, x2) - -inst_37204: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3900ffff; valaddr_reg:x3; val_offset:111612*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111612*FLEN/8, x4, x1, x2) - -inst_37205: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3901ffff; valaddr_reg:x3; val_offset:111615*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111615*FLEN/8, x4, x1, x2) - -inst_37206: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3903ffff; valaddr_reg:x3; val_offset:111618*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111618*FLEN/8, x4, x1, x2) - -inst_37207: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3907ffff; valaddr_reg:x3; val_offset:111621*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111621*FLEN/8, x4, x1, x2) - -inst_37208: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x390fffff; valaddr_reg:x3; val_offset:111624*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111624*FLEN/8, x4, x1, x2) - -inst_37209: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x391fffff; valaddr_reg:x3; val_offset:111627*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111627*FLEN/8, x4, x1, x2) - -inst_37210: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x393fffff; valaddr_reg:x3; val_offset:111630*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111630*FLEN/8, x4, x1, x2) - -inst_37211: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39400000; valaddr_reg:x3; val_offset:111633*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111633*FLEN/8, x4, x1, x2) - -inst_37212: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39600000; valaddr_reg:x3; val_offset:111636*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111636*FLEN/8, x4, x1, x2) - -inst_37213: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39700000; valaddr_reg:x3; val_offset:111639*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111639*FLEN/8, x4, x1, x2) - -inst_37214: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x39780000; valaddr_reg:x3; val_offset:111642*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111642*FLEN/8, x4, x1, x2) - -inst_37215: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397c0000; valaddr_reg:x3; val_offset:111645*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111645*FLEN/8, x4, x1, x2) - -inst_37216: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397e0000; valaddr_reg:x3; val_offset:111648*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111648*FLEN/8, x4, x1, x2) - -inst_37217: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397f0000; valaddr_reg:x3; val_offset:111651*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111651*FLEN/8, x4, x1, x2) - -inst_37218: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397f8000; valaddr_reg:x3; val_offset:111654*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111654*FLEN/8, x4, x1, x2) - -inst_37219: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397fc000; valaddr_reg:x3; val_offset:111657*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111657*FLEN/8, x4, x1, x2) - -inst_37220: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397fe000; valaddr_reg:x3; val_offset:111660*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111660*FLEN/8, x4, x1, x2) - -inst_37221: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397ff000; valaddr_reg:x3; val_offset:111663*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111663*FLEN/8, x4, x1, x2) - -inst_37222: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397ff800; valaddr_reg:x3; val_offset:111666*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111666*FLEN/8, x4, x1, x2) - -inst_37223: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397ffc00; valaddr_reg:x3; val_offset:111669*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111669*FLEN/8, x4, x1, x2) - -inst_37224: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397ffe00; valaddr_reg:x3; val_offset:111672*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111672*FLEN/8, x4, x1, x2) - -inst_37225: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397fff00; valaddr_reg:x3; val_offset:111675*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111675*FLEN/8, x4, x1, x2) - -inst_37226: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397fff80; valaddr_reg:x3; val_offset:111678*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111678*FLEN/8, x4, x1, x2) - -inst_37227: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397fffc0; valaddr_reg:x3; val_offset:111681*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111681*FLEN/8, x4, x1, x2) - -inst_37228: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397fffe0; valaddr_reg:x3; val_offset:111684*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111684*FLEN/8, x4, x1, x2) - -inst_37229: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397ffff0; valaddr_reg:x3; val_offset:111687*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111687*FLEN/8, x4, x1, x2) - -inst_37230: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397ffff8; valaddr_reg:x3; val_offset:111690*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111690*FLEN/8, x4, x1, x2) - -inst_37231: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397ffffc; valaddr_reg:x3; val_offset:111693*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111693*FLEN/8, x4, x1, x2) - -inst_37232: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397ffffe; valaddr_reg:x3; val_offset:111696*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111696*FLEN/8, x4, x1, x2) - -inst_37233: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x397fffff; valaddr_reg:x3; val_offset:111699*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111699*FLEN/8, x4, x1, x2) - -inst_37234: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3f800001; valaddr_reg:x3; val_offset:111702*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111702*FLEN/8, x4, x1, x2) - -inst_37235: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3f800003; valaddr_reg:x3; val_offset:111705*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111705*FLEN/8, x4, x1, x2) - -inst_37236: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3f800007; valaddr_reg:x3; val_offset:111708*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111708*FLEN/8, x4, x1, x2) - -inst_37237: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3f999999; valaddr_reg:x3; val_offset:111711*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111711*FLEN/8, x4, x1, x2) - -inst_37238: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:111714*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111714*FLEN/8, x4, x1, x2) - -inst_37239: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:111717*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111717*FLEN/8, x4, x1, x2) - -inst_37240: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:111720*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111720*FLEN/8, x4, x1, x2) - -inst_37241: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:111723*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111723*FLEN/8, x4, x1, x2) - -inst_37242: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:111726*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111726*FLEN/8, x4, x1, x2) - -inst_37243: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:111729*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111729*FLEN/8, x4, x1, x2) - -inst_37244: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:111732*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111732*FLEN/8, x4, x1, x2) - -inst_37245: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:111735*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111735*FLEN/8, x4, x1, x2) - -inst_37246: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:111738*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111738*FLEN/8, x4, x1, x2) - -inst_37247: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:111741*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111741*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_292) - -inst_37248: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:111744*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111744*FLEN/8, x4, x1, x2) - -inst_37249: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:111747*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111747*FLEN/8, x4, x1, x2) - -inst_37250: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:111750*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111750*FLEN/8, x4, x1, x2) - -inst_37251: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:111753*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111753*FLEN/8, x4, x1, x2) - -inst_37252: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:111756*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111756*FLEN/8, x4, x1, x2) - -inst_37253: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:111759*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111759*FLEN/8, x4, x1, x2) - -inst_37254: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:111762*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111762*FLEN/8, x4, x1, x2) - -inst_37255: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:111765*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111765*FLEN/8, x4, x1, x2) - -inst_37256: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:111768*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111768*FLEN/8, x4, x1, x2) - -inst_37257: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:111771*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111771*FLEN/8, x4, x1, x2) - -inst_37258: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:111774*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111774*FLEN/8, x4, x1, x2) - -inst_37259: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:111777*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111777*FLEN/8, x4, x1, x2) - -inst_37260: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:111780*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111780*FLEN/8, x4, x1, x2) - -inst_37261: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:111783*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111783*FLEN/8, x4, x1, x2) - -inst_37262: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:111786*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111786*FLEN/8, x4, x1, x2) - -inst_37263: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:111789*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111789*FLEN/8, x4, x1, x2) - -inst_37264: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:111792*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111792*FLEN/8, x4, x1, x2) - -inst_37265: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:111795*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111795*FLEN/8, x4, x1, x2) - -inst_37266: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87000000; valaddr_reg:x3; val_offset:111798*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111798*FLEN/8, x4, x1, x2) - -inst_37267: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87000001; valaddr_reg:x3; val_offset:111801*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111801*FLEN/8, x4, x1, x2) - -inst_37268: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87000003; valaddr_reg:x3; val_offset:111804*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111804*FLEN/8, x4, x1, x2) - -inst_37269: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87000007; valaddr_reg:x3; val_offset:111807*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111807*FLEN/8, x4, x1, x2) - -inst_37270: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8700000f; valaddr_reg:x3; val_offset:111810*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111810*FLEN/8, x4, x1, x2) - -inst_37271: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8700001f; valaddr_reg:x3; val_offset:111813*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111813*FLEN/8, x4, x1, x2) - -inst_37272: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8700003f; valaddr_reg:x3; val_offset:111816*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111816*FLEN/8, x4, x1, x2) - -inst_37273: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8700007f; valaddr_reg:x3; val_offset:111819*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111819*FLEN/8, x4, x1, x2) - -inst_37274: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x870000ff; valaddr_reg:x3; val_offset:111822*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111822*FLEN/8, x4, x1, x2) - -inst_37275: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x870001ff; valaddr_reg:x3; val_offset:111825*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111825*FLEN/8, x4, x1, x2) - -inst_37276: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x870003ff; valaddr_reg:x3; val_offset:111828*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111828*FLEN/8, x4, x1, x2) - -inst_37277: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x870007ff; valaddr_reg:x3; val_offset:111831*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111831*FLEN/8, x4, x1, x2) - -inst_37278: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87000fff; valaddr_reg:x3; val_offset:111834*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111834*FLEN/8, x4, x1, x2) - -inst_37279: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87001fff; valaddr_reg:x3; val_offset:111837*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111837*FLEN/8, x4, x1, x2) - -inst_37280: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87003fff; valaddr_reg:x3; val_offset:111840*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111840*FLEN/8, x4, x1, x2) - -inst_37281: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87007fff; valaddr_reg:x3; val_offset:111843*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111843*FLEN/8, x4, x1, x2) - -inst_37282: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8700ffff; valaddr_reg:x3; val_offset:111846*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111846*FLEN/8, x4, x1, x2) - -inst_37283: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8701ffff; valaddr_reg:x3; val_offset:111849*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111849*FLEN/8, x4, x1, x2) - -inst_37284: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8703ffff; valaddr_reg:x3; val_offset:111852*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111852*FLEN/8, x4, x1, x2) - -inst_37285: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x8707ffff; valaddr_reg:x3; val_offset:111855*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111855*FLEN/8, x4, x1, x2) - -inst_37286: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x870fffff; valaddr_reg:x3; val_offset:111858*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111858*FLEN/8, x4, x1, x2) - -inst_37287: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x871fffff; valaddr_reg:x3; val_offset:111861*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111861*FLEN/8, x4, x1, x2) - -inst_37288: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x873fffff; valaddr_reg:x3; val_offset:111864*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111864*FLEN/8, x4, x1, x2) - -inst_37289: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87400000; valaddr_reg:x3; val_offset:111867*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111867*FLEN/8, x4, x1, x2) - -inst_37290: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87600000; valaddr_reg:x3; val_offset:111870*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111870*FLEN/8, x4, x1, x2) - -inst_37291: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87700000; valaddr_reg:x3; val_offset:111873*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111873*FLEN/8, x4, x1, x2) - -inst_37292: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x87780000; valaddr_reg:x3; val_offset:111876*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111876*FLEN/8, x4, x1, x2) - -inst_37293: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877c0000; valaddr_reg:x3; val_offset:111879*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111879*FLEN/8, x4, x1, x2) - -inst_37294: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877e0000; valaddr_reg:x3; val_offset:111882*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111882*FLEN/8, x4, x1, x2) - -inst_37295: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877f0000; valaddr_reg:x3; val_offset:111885*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111885*FLEN/8, x4, x1, x2) - -inst_37296: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877f8000; valaddr_reg:x3; val_offset:111888*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111888*FLEN/8, x4, x1, x2) - -inst_37297: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877fc000; valaddr_reg:x3; val_offset:111891*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111891*FLEN/8, x4, x1, x2) - -inst_37298: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877fe000; valaddr_reg:x3; val_offset:111894*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111894*FLEN/8, x4, x1, x2) - -inst_37299: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877ff000; valaddr_reg:x3; val_offset:111897*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111897*FLEN/8, x4, x1, x2) - -inst_37300: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877ff800; valaddr_reg:x3; val_offset:111900*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111900*FLEN/8, x4, x1, x2) - -inst_37301: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877ffc00; valaddr_reg:x3; val_offset:111903*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111903*FLEN/8, x4, x1, x2) - -inst_37302: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877ffe00; valaddr_reg:x3; val_offset:111906*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111906*FLEN/8, x4, x1, x2) - -inst_37303: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877fff00; valaddr_reg:x3; val_offset:111909*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111909*FLEN/8, x4, x1, x2) - -inst_37304: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877fff80; valaddr_reg:x3; val_offset:111912*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111912*FLEN/8, x4, x1, x2) - -inst_37305: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877fffc0; valaddr_reg:x3; val_offset:111915*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111915*FLEN/8, x4, x1, x2) - -inst_37306: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877fffe0; valaddr_reg:x3; val_offset:111918*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111918*FLEN/8, x4, x1, x2) - -inst_37307: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877ffff0; valaddr_reg:x3; val_offset:111921*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111921*FLEN/8, x4, x1, x2) - -inst_37308: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877ffff8; valaddr_reg:x3; val_offset:111924*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111924*FLEN/8, x4, x1, x2) - -inst_37309: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877ffffc; valaddr_reg:x3; val_offset:111927*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111927*FLEN/8, x4, x1, x2) - -inst_37310: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877ffffe; valaddr_reg:x3; val_offset:111930*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111930*FLEN/8, x4, x1, x2) - -inst_37311: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; -op3val:0x877fffff; valaddr_reg:x3; val_offset:111933*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111933*FLEN/8, x4, x1, x2) - -inst_37312: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:111936*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111936*FLEN/8, x4, x1, x2) - -inst_37313: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:111939*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111939*FLEN/8, x4, x1, x2) - -inst_37314: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:111942*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111942*FLEN/8, x4, x1, x2) - -inst_37315: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:111945*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111945*FLEN/8, x4, x1, x2) - -inst_37316: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:111948*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111948*FLEN/8, x4, x1, x2) - -inst_37317: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:111951*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111951*FLEN/8, x4, x1, x2) - -inst_37318: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:111954*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111954*FLEN/8, x4, x1, x2) - -inst_37319: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:111957*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111957*FLEN/8, x4, x1, x2) - -inst_37320: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:111960*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111960*FLEN/8, x4, x1, x2) - -inst_37321: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:111963*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111963*FLEN/8, x4, x1, x2) - -inst_37322: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:111966*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111966*FLEN/8, x4, x1, x2) - -inst_37323: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:111969*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111969*FLEN/8, x4, x1, x2) - -inst_37324: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:111972*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111972*FLEN/8, x4, x1, x2) - -inst_37325: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:111975*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111975*FLEN/8, x4, x1, x2) - -inst_37326: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:111978*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111978*FLEN/8, x4, x1, x2) - -inst_37327: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:111981*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111981*FLEN/8, x4, x1, x2) - -inst_37328: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86000000; valaddr_reg:x3; val_offset:111984*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111984*FLEN/8, x4, x1, x2) - -inst_37329: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86000001; valaddr_reg:x3; val_offset:111987*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111987*FLEN/8, x4, x1, x2) - -inst_37330: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86000003; valaddr_reg:x3; val_offset:111990*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111990*FLEN/8, x4, x1, x2) - -inst_37331: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86000007; valaddr_reg:x3; val_offset:111993*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111993*FLEN/8, x4, x1, x2) - -inst_37332: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8600000f; valaddr_reg:x3; val_offset:111996*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111996*FLEN/8, x4, x1, x2) - -inst_37333: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8600001f; valaddr_reg:x3; val_offset:111999*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111999*FLEN/8, x4, x1, x2) - -inst_37334: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8600003f; valaddr_reg:x3; val_offset:112002*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112002*FLEN/8, x4, x1, x2) - -inst_37335: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8600007f; valaddr_reg:x3; val_offset:112005*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112005*FLEN/8, x4, x1, x2) - -inst_37336: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x860000ff; valaddr_reg:x3; val_offset:112008*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112008*FLEN/8, x4, x1, x2) - -inst_37337: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x860001ff; valaddr_reg:x3; val_offset:112011*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112011*FLEN/8, x4, x1, x2) - -inst_37338: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x860003ff; valaddr_reg:x3; val_offset:112014*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112014*FLEN/8, x4, x1, x2) - -inst_37339: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x860007ff; valaddr_reg:x3; val_offset:112017*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112017*FLEN/8, x4, x1, x2) - -inst_37340: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86000fff; valaddr_reg:x3; val_offset:112020*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112020*FLEN/8, x4, x1, x2) - -inst_37341: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86001fff; valaddr_reg:x3; val_offset:112023*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112023*FLEN/8, x4, x1, x2) - -inst_37342: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86003fff; valaddr_reg:x3; val_offset:112026*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112026*FLEN/8, x4, x1, x2) - -inst_37343: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86007fff; valaddr_reg:x3; val_offset:112029*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112029*FLEN/8, x4, x1, x2) - -inst_37344: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8600ffff; valaddr_reg:x3; val_offset:112032*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112032*FLEN/8, x4, x1, x2) - -inst_37345: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8601ffff; valaddr_reg:x3; val_offset:112035*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112035*FLEN/8, x4, x1, x2) - -inst_37346: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8603ffff; valaddr_reg:x3; val_offset:112038*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112038*FLEN/8, x4, x1, x2) - -inst_37347: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x8607ffff; valaddr_reg:x3; val_offset:112041*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112041*FLEN/8, x4, x1, x2) - -inst_37348: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x860fffff; valaddr_reg:x3; val_offset:112044*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112044*FLEN/8, x4, x1, x2) - -inst_37349: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x861fffff; valaddr_reg:x3; val_offset:112047*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112047*FLEN/8, x4, x1, x2) - -inst_37350: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x863fffff; valaddr_reg:x3; val_offset:112050*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112050*FLEN/8, x4, x1, x2) - -inst_37351: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86400000; valaddr_reg:x3; val_offset:112053*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112053*FLEN/8, x4, x1, x2) - -inst_37352: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86600000; valaddr_reg:x3; val_offset:112056*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112056*FLEN/8, x4, x1, x2) - -inst_37353: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86700000; valaddr_reg:x3; val_offset:112059*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112059*FLEN/8, x4, x1, x2) - -inst_37354: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x86780000; valaddr_reg:x3; val_offset:112062*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112062*FLEN/8, x4, x1, x2) - -inst_37355: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867c0000; valaddr_reg:x3; val_offset:112065*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112065*FLEN/8, x4, x1, x2) - -inst_37356: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867e0000; valaddr_reg:x3; val_offset:112068*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112068*FLEN/8, x4, x1, x2) - -inst_37357: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867f0000; valaddr_reg:x3; val_offset:112071*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112071*FLEN/8, x4, x1, x2) - -inst_37358: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867f8000; valaddr_reg:x3; val_offset:112074*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112074*FLEN/8, x4, x1, x2) - -inst_37359: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867fc000; valaddr_reg:x3; val_offset:112077*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112077*FLEN/8, x4, x1, x2) - -inst_37360: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867fe000; valaddr_reg:x3; val_offset:112080*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112080*FLEN/8, x4, x1, x2) - -inst_37361: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867ff000; valaddr_reg:x3; val_offset:112083*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112083*FLEN/8, x4, x1, x2) - -inst_37362: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867ff800; valaddr_reg:x3; val_offset:112086*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112086*FLEN/8, x4, x1, x2) - -inst_37363: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867ffc00; valaddr_reg:x3; val_offset:112089*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112089*FLEN/8, x4, x1, x2) - -inst_37364: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867ffe00; valaddr_reg:x3; val_offset:112092*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112092*FLEN/8, x4, x1, x2) - -inst_37365: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867fff00; valaddr_reg:x3; val_offset:112095*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112095*FLEN/8, x4, x1, x2) - -inst_37366: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867fff80; valaddr_reg:x3; val_offset:112098*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112098*FLEN/8, x4, x1, x2) - -inst_37367: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867fffc0; valaddr_reg:x3; val_offset:112101*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112101*FLEN/8, x4, x1, x2) - -inst_37368: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867fffe0; valaddr_reg:x3; val_offset:112104*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112104*FLEN/8, x4, x1, x2) - -inst_37369: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867ffff0; valaddr_reg:x3; val_offset:112107*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112107*FLEN/8, x4, x1, x2) - -inst_37370: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867ffff8; valaddr_reg:x3; val_offset:112110*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112110*FLEN/8, x4, x1, x2) - -inst_37371: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867ffffc; valaddr_reg:x3; val_offset:112113*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112113*FLEN/8, x4, x1, x2) - -inst_37372: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867ffffe; valaddr_reg:x3; val_offset:112116*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112116*FLEN/8, x4, x1, x2) - -inst_37373: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; -op3val:0x867fffff; valaddr_reg:x3; val_offset:112119*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112119*FLEN/8, x4, x1, x2) - -inst_37374: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1800000; valaddr_reg:x3; val_offset:112122*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112122*FLEN/8, x4, x1, x2) - -inst_37375: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1800001; valaddr_reg:x3; val_offset:112125*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112125*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_293) - -inst_37376: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1800003; valaddr_reg:x3; val_offset:112128*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112128*FLEN/8, x4, x1, x2) - -inst_37377: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1800007; valaddr_reg:x3; val_offset:112131*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112131*FLEN/8, x4, x1, x2) - -inst_37378: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb180000f; valaddr_reg:x3; val_offset:112134*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112134*FLEN/8, x4, x1, x2) - -inst_37379: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb180001f; valaddr_reg:x3; val_offset:112137*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112137*FLEN/8, x4, x1, x2) - -inst_37380: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb180003f; valaddr_reg:x3; val_offset:112140*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112140*FLEN/8, x4, x1, x2) - -inst_37381: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb180007f; valaddr_reg:x3; val_offset:112143*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112143*FLEN/8, x4, x1, x2) - -inst_37382: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb18000ff; valaddr_reg:x3; val_offset:112146*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112146*FLEN/8, x4, x1, x2) - -inst_37383: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb18001ff; valaddr_reg:x3; val_offset:112149*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112149*FLEN/8, x4, x1, x2) - -inst_37384: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb18003ff; valaddr_reg:x3; val_offset:112152*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112152*FLEN/8, x4, x1, x2) - -inst_37385: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb18007ff; valaddr_reg:x3; val_offset:112155*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112155*FLEN/8, x4, x1, x2) - -inst_37386: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1800fff; valaddr_reg:x3; val_offset:112158*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112158*FLEN/8, x4, x1, x2) - -inst_37387: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1801fff; valaddr_reg:x3; val_offset:112161*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112161*FLEN/8, x4, x1, x2) - -inst_37388: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1803fff; valaddr_reg:x3; val_offset:112164*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112164*FLEN/8, x4, x1, x2) - -inst_37389: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1807fff; valaddr_reg:x3; val_offset:112167*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112167*FLEN/8, x4, x1, x2) - -inst_37390: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb180ffff; valaddr_reg:x3; val_offset:112170*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112170*FLEN/8, x4, x1, x2) - -inst_37391: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb181ffff; valaddr_reg:x3; val_offset:112173*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112173*FLEN/8, x4, x1, x2) - -inst_37392: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb183ffff; valaddr_reg:x3; val_offset:112176*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112176*FLEN/8, x4, x1, x2) - -inst_37393: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb187ffff; valaddr_reg:x3; val_offset:112179*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112179*FLEN/8, x4, x1, x2) - -inst_37394: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb18fffff; valaddr_reg:x3; val_offset:112182*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112182*FLEN/8, x4, x1, x2) - -inst_37395: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb19fffff; valaddr_reg:x3; val_offset:112185*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112185*FLEN/8, x4, x1, x2) - -inst_37396: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1bfffff; valaddr_reg:x3; val_offset:112188*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112188*FLEN/8, x4, x1, x2) - -inst_37397: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1c00000; valaddr_reg:x3; val_offset:112191*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112191*FLEN/8, x4, x1, x2) - -inst_37398: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1e00000; valaddr_reg:x3; val_offset:112194*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112194*FLEN/8, x4, x1, x2) - -inst_37399: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1f00000; valaddr_reg:x3; val_offset:112197*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112197*FLEN/8, x4, x1, x2) - -inst_37400: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1f80000; valaddr_reg:x3; val_offset:112200*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112200*FLEN/8, x4, x1, x2) - -inst_37401: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fc0000; valaddr_reg:x3; val_offset:112203*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112203*FLEN/8, x4, x1, x2) - -inst_37402: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fe0000; valaddr_reg:x3; val_offset:112206*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112206*FLEN/8, x4, x1, x2) - -inst_37403: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ff0000; valaddr_reg:x3; val_offset:112209*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112209*FLEN/8, x4, x1, x2) - -inst_37404: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ff8000; valaddr_reg:x3; val_offset:112212*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112212*FLEN/8, x4, x1, x2) - -inst_37405: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ffc000; valaddr_reg:x3; val_offset:112215*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112215*FLEN/8, x4, x1, x2) - -inst_37406: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ffe000; valaddr_reg:x3; val_offset:112218*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112218*FLEN/8, x4, x1, x2) - -inst_37407: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fff000; valaddr_reg:x3; val_offset:112221*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112221*FLEN/8, x4, x1, x2) - -inst_37408: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fff800; valaddr_reg:x3; val_offset:112224*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112224*FLEN/8, x4, x1, x2) - -inst_37409: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fffc00; valaddr_reg:x3; val_offset:112227*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112227*FLEN/8, x4, x1, x2) - -inst_37410: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fffe00; valaddr_reg:x3; val_offset:112230*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112230*FLEN/8, x4, x1, x2) - -inst_37411: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ffff00; valaddr_reg:x3; val_offset:112233*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112233*FLEN/8, x4, x1, x2) - -inst_37412: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ffff80; valaddr_reg:x3; val_offset:112236*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112236*FLEN/8, x4, x1, x2) - -inst_37413: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ffffc0; valaddr_reg:x3; val_offset:112239*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112239*FLEN/8, x4, x1, x2) - -inst_37414: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ffffe0; valaddr_reg:x3; val_offset:112242*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112242*FLEN/8, x4, x1, x2) - -inst_37415: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fffff0; valaddr_reg:x3; val_offset:112245*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112245*FLEN/8, x4, x1, x2) - -inst_37416: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fffff8; valaddr_reg:x3; val_offset:112248*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112248*FLEN/8, x4, x1, x2) - -inst_37417: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fffffc; valaddr_reg:x3; val_offset:112251*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112251*FLEN/8, x4, x1, x2) - -inst_37418: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1fffffe; valaddr_reg:x3; val_offset:112254*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112254*FLEN/8, x4, x1, x2) - -inst_37419: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xb1ffffff; valaddr_reg:x3; val_offset:112257*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112257*FLEN/8, x4, x1, x2) - -inst_37420: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbf800001; valaddr_reg:x3; val_offset:112260*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112260*FLEN/8, x4, x1, x2) - -inst_37421: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbf800003; valaddr_reg:x3; val_offset:112263*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112263*FLEN/8, x4, x1, x2) - -inst_37422: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbf800007; valaddr_reg:x3; val_offset:112266*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112266*FLEN/8, x4, x1, x2) - -inst_37423: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbf999999; valaddr_reg:x3; val_offset:112269*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112269*FLEN/8, x4, x1, x2) - -inst_37424: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:112272*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112272*FLEN/8, x4, x1, x2) - -inst_37425: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:112275*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112275*FLEN/8, x4, x1, x2) - -inst_37426: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:112278*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112278*FLEN/8, x4, x1, x2) - -inst_37427: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:112281*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112281*FLEN/8, x4, x1, x2) - -inst_37428: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:112284*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112284*FLEN/8, x4, x1, x2) - -inst_37429: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:112287*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112287*FLEN/8, x4, x1, x2) - -inst_37430: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:112290*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112290*FLEN/8, x4, x1, x2) - -inst_37431: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:112293*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112293*FLEN/8, x4, x1, x2) - -inst_37432: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:112296*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112296*FLEN/8, x4, x1, x2) - -inst_37433: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:112299*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112299*FLEN/8, x4, x1, x2) - -inst_37434: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:112302*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112302*FLEN/8, x4, x1, x2) - -inst_37435: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:112305*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112305*FLEN/8, x4, x1, x2) - -inst_37436: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:112308*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112308*FLEN/8, x4, x1, x2) - -inst_37437: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:112311*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112311*FLEN/8, x4, x1, x2) - -inst_37438: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:112314*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112314*FLEN/8, x4, x1, x2) - -inst_37439: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:112317*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112317*FLEN/8, x4, x1, x2) - -inst_37440: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:112320*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112320*FLEN/8, x4, x1, x2) - -inst_37441: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:112323*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112323*FLEN/8, x4, x1, x2) - -inst_37442: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:112326*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112326*FLEN/8, x4, x1, x2) - -inst_37443: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:112329*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112329*FLEN/8, x4, x1, x2) - -inst_37444: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:112332*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112332*FLEN/8, x4, x1, x2) - -inst_37445: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:112335*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112335*FLEN/8, x4, x1, x2) - -inst_37446: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:112338*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112338*FLEN/8, x4, x1, x2) - -inst_37447: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:112341*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112341*FLEN/8, x4, x1, x2) - -inst_37448: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:112344*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112344*FLEN/8, x4, x1, x2) - -inst_37449: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:112347*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112347*FLEN/8, x4, x1, x2) - -inst_37450: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:112350*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112350*FLEN/8, x4, x1, x2) - -inst_37451: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:112353*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112353*FLEN/8, x4, x1, x2) - -inst_37452: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe000000; valaddr_reg:x3; val_offset:112356*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112356*FLEN/8, x4, x1, x2) - -inst_37453: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe000001; valaddr_reg:x3; val_offset:112359*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112359*FLEN/8, x4, x1, x2) - -inst_37454: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe000003; valaddr_reg:x3; val_offset:112362*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112362*FLEN/8, x4, x1, x2) - -inst_37455: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe000007; valaddr_reg:x3; val_offset:112365*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112365*FLEN/8, x4, x1, x2) - -inst_37456: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe00000f; valaddr_reg:x3; val_offset:112368*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112368*FLEN/8, x4, x1, x2) - -inst_37457: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe00001f; valaddr_reg:x3; val_offset:112371*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112371*FLEN/8, x4, x1, x2) - -inst_37458: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe00003f; valaddr_reg:x3; val_offset:112374*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112374*FLEN/8, x4, x1, x2) - -inst_37459: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe00007f; valaddr_reg:x3; val_offset:112377*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112377*FLEN/8, x4, x1, x2) - -inst_37460: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe0000ff; valaddr_reg:x3; val_offset:112380*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112380*FLEN/8, x4, x1, x2) - -inst_37461: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe0001ff; valaddr_reg:x3; val_offset:112383*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112383*FLEN/8, x4, x1, x2) - -inst_37462: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe0003ff; valaddr_reg:x3; val_offset:112386*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112386*FLEN/8, x4, x1, x2) - -inst_37463: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe0007ff; valaddr_reg:x3; val_offset:112389*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112389*FLEN/8, x4, x1, x2) - -inst_37464: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe000fff; valaddr_reg:x3; val_offset:112392*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112392*FLEN/8, x4, x1, x2) - -inst_37465: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe001fff; valaddr_reg:x3; val_offset:112395*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112395*FLEN/8, x4, x1, x2) - -inst_37466: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe003fff; valaddr_reg:x3; val_offset:112398*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112398*FLEN/8, x4, x1, x2) - -inst_37467: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe007fff; valaddr_reg:x3; val_offset:112401*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112401*FLEN/8, x4, x1, x2) - -inst_37468: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe00ffff; valaddr_reg:x3; val_offset:112404*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112404*FLEN/8, x4, x1, x2) - -inst_37469: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe01ffff; valaddr_reg:x3; val_offset:112407*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112407*FLEN/8, x4, x1, x2) - -inst_37470: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe03ffff; valaddr_reg:x3; val_offset:112410*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112410*FLEN/8, x4, x1, x2) - -inst_37471: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe07ffff; valaddr_reg:x3; val_offset:112413*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112413*FLEN/8, x4, x1, x2) - -inst_37472: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe0fffff; valaddr_reg:x3; val_offset:112416*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112416*FLEN/8, x4, x1, x2) - -inst_37473: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe1fffff; valaddr_reg:x3; val_offset:112419*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112419*FLEN/8, x4, x1, x2) - -inst_37474: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe3fffff; valaddr_reg:x3; val_offset:112422*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112422*FLEN/8, x4, x1, x2) - -inst_37475: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe400000; valaddr_reg:x3; val_offset:112425*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112425*FLEN/8, x4, x1, x2) - -inst_37476: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe600000; valaddr_reg:x3; val_offset:112428*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112428*FLEN/8, x4, x1, x2) - -inst_37477: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe700000; valaddr_reg:x3; val_offset:112431*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112431*FLEN/8, x4, x1, x2) - -inst_37478: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe780000; valaddr_reg:x3; val_offset:112434*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112434*FLEN/8, x4, x1, x2) - -inst_37479: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7c0000; valaddr_reg:x3; val_offset:112437*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112437*FLEN/8, x4, x1, x2) - -inst_37480: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7e0000; valaddr_reg:x3; val_offset:112440*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112440*FLEN/8, x4, x1, x2) - -inst_37481: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7f0000; valaddr_reg:x3; val_offset:112443*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112443*FLEN/8, x4, x1, x2) - -inst_37482: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7f8000; valaddr_reg:x3; val_offset:112446*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112446*FLEN/8, x4, x1, x2) - -inst_37483: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7fc000; valaddr_reg:x3; val_offset:112449*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112449*FLEN/8, x4, x1, x2) - -inst_37484: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7fe000; valaddr_reg:x3; val_offset:112452*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112452*FLEN/8, x4, x1, x2) - -inst_37485: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7ff000; valaddr_reg:x3; val_offset:112455*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112455*FLEN/8, x4, x1, x2) - -inst_37486: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7ff800; valaddr_reg:x3; val_offset:112458*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112458*FLEN/8, x4, x1, x2) - -inst_37487: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7ffc00; valaddr_reg:x3; val_offset:112461*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112461*FLEN/8, x4, x1, x2) - -inst_37488: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7ffe00; valaddr_reg:x3; val_offset:112464*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112464*FLEN/8, x4, x1, x2) - -inst_37489: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7fff00; valaddr_reg:x3; val_offset:112467*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112467*FLEN/8, x4, x1, x2) - -inst_37490: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7fff80; valaddr_reg:x3; val_offset:112470*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112470*FLEN/8, x4, x1, x2) - -inst_37491: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7fffc0; valaddr_reg:x3; val_offset:112473*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112473*FLEN/8, x4, x1, x2) - -inst_37492: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7fffe0; valaddr_reg:x3; val_offset:112476*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112476*FLEN/8, x4, x1, x2) - -inst_37493: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7ffff0; valaddr_reg:x3; val_offset:112479*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112479*FLEN/8, x4, x1, x2) - -inst_37494: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7ffff8; valaddr_reg:x3; val_offset:112482*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112482*FLEN/8, x4, x1, x2) - -inst_37495: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7ffffc; valaddr_reg:x3; val_offset:112485*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112485*FLEN/8, x4, x1, x2) - -inst_37496: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7ffffe; valaddr_reg:x3; val_offset:112488*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112488*FLEN/8, x4, x1, x2) - -inst_37497: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; -op3val:0xe7fffff; valaddr_reg:x3; val_offset:112491*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112491*FLEN/8, x4, x1, x2) - -inst_37498: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:112494*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112494*FLEN/8, x4, x1, x2) - -inst_37499: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:112497*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112497*FLEN/8, x4, x1, x2) - -inst_37500: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:112500*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112500*FLEN/8, x4, x1, x2) - -inst_37501: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:112503*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112503*FLEN/8, x4, x1, x2) - -inst_37502: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:112506*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112506*FLEN/8, x4, x1, x2) - -inst_37503: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:112509*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112509*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_294) - -inst_37504: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:112512*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112512*FLEN/8, x4, x1, x2) - -inst_37505: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:112515*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112515*FLEN/8, x4, x1, x2) - -inst_37506: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:112518*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112518*FLEN/8, x4, x1, x2) - -inst_37507: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:112521*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112521*FLEN/8, x4, x1, x2) - -inst_37508: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:112524*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112524*FLEN/8, x4, x1, x2) - -inst_37509: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:112527*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112527*FLEN/8, x4, x1, x2) - -inst_37510: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:112530*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112530*FLEN/8, x4, x1, x2) - -inst_37511: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:112533*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112533*FLEN/8, x4, x1, x2) - -inst_37512: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:112536*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112536*FLEN/8, x4, x1, x2) - -inst_37513: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:112539*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112539*FLEN/8, x4, x1, x2) - -inst_37514: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8800000; valaddr_reg:x3; val_offset:112542*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112542*FLEN/8, x4, x1, x2) - -inst_37515: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8800001; valaddr_reg:x3; val_offset:112545*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112545*FLEN/8, x4, x1, x2) - -inst_37516: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8800003; valaddr_reg:x3; val_offset:112548*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112548*FLEN/8, x4, x1, x2) - -inst_37517: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8800007; valaddr_reg:x3; val_offset:112551*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112551*FLEN/8, x4, x1, x2) - -inst_37518: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x880000f; valaddr_reg:x3; val_offset:112554*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112554*FLEN/8, x4, x1, x2) - -inst_37519: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x880001f; valaddr_reg:x3; val_offset:112557*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112557*FLEN/8, x4, x1, x2) - -inst_37520: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x880003f; valaddr_reg:x3; val_offset:112560*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112560*FLEN/8, x4, x1, x2) - -inst_37521: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x880007f; valaddr_reg:x3; val_offset:112563*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112563*FLEN/8, x4, x1, x2) - -inst_37522: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x88000ff; valaddr_reg:x3; val_offset:112566*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112566*FLEN/8, x4, x1, x2) - -inst_37523: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x88001ff; valaddr_reg:x3; val_offset:112569*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112569*FLEN/8, x4, x1, x2) - -inst_37524: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x88003ff; valaddr_reg:x3; val_offset:112572*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112572*FLEN/8, x4, x1, x2) - -inst_37525: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x88007ff; valaddr_reg:x3; val_offset:112575*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112575*FLEN/8, x4, x1, x2) - -inst_37526: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8800fff; valaddr_reg:x3; val_offset:112578*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112578*FLEN/8, x4, x1, x2) - -inst_37527: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8801fff; valaddr_reg:x3; val_offset:112581*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112581*FLEN/8, x4, x1, x2) - -inst_37528: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8803fff; valaddr_reg:x3; val_offset:112584*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112584*FLEN/8, x4, x1, x2) - -inst_37529: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8807fff; valaddr_reg:x3; val_offset:112587*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112587*FLEN/8, x4, x1, x2) - -inst_37530: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x880ffff; valaddr_reg:x3; val_offset:112590*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112590*FLEN/8, x4, x1, x2) - -inst_37531: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x881ffff; valaddr_reg:x3; val_offset:112593*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112593*FLEN/8, x4, x1, x2) - -inst_37532: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x883ffff; valaddr_reg:x3; val_offset:112596*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112596*FLEN/8, x4, x1, x2) - -inst_37533: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x887ffff; valaddr_reg:x3; val_offset:112599*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112599*FLEN/8, x4, x1, x2) - -inst_37534: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x88fffff; valaddr_reg:x3; val_offset:112602*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112602*FLEN/8, x4, x1, x2) - -inst_37535: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x89fffff; valaddr_reg:x3; val_offset:112605*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112605*FLEN/8, x4, x1, x2) - -inst_37536: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8bfffff; valaddr_reg:x3; val_offset:112608*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112608*FLEN/8, x4, x1, x2) - -inst_37537: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8c00000; valaddr_reg:x3; val_offset:112611*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112611*FLEN/8, x4, x1, x2) - -inst_37538: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8e00000; valaddr_reg:x3; val_offset:112614*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112614*FLEN/8, x4, x1, x2) - -inst_37539: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8f00000; valaddr_reg:x3; val_offset:112617*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112617*FLEN/8, x4, x1, x2) - -inst_37540: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8f80000; valaddr_reg:x3; val_offset:112620*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112620*FLEN/8, x4, x1, x2) - -inst_37541: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fc0000; valaddr_reg:x3; val_offset:112623*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112623*FLEN/8, x4, x1, x2) - -inst_37542: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fe0000; valaddr_reg:x3; val_offset:112626*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112626*FLEN/8, x4, x1, x2) - -inst_37543: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ff0000; valaddr_reg:x3; val_offset:112629*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112629*FLEN/8, x4, x1, x2) - -inst_37544: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ff8000; valaddr_reg:x3; val_offset:112632*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112632*FLEN/8, x4, x1, x2) - -inst_37545: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ffc000; valaddr_reg:x3; val_offset:112635*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112635*FLEN/8, x4, x1, x2) - -inst_37546: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ffe000; valaddr_reg:x3; val_offset:112638*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112638*FLEN/8, x4, x1, x2) - -inst_37547: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fff000; valaddr_reg:x3; val_offset:112641*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112641*FLEN/8, x4, x1, x2) - -inst_37548: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fff800; valaddr_reg:x3; val_offset:112644*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112644*FLEN/8, x4, x1, x2) - -inst_37549: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fffc00; valaddr_reg:x3; val_offset:112647*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112647*FLEN/8, x4, x1, x2) - -inst_37550: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fffe00; valaddr_reg:x3; val_offset:112650*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112650*FLEN/8, x4, x1, x2) - -inst_37551: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ffff00; valaddr_reg:x3; val_offset:112653*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112653*FLEN/8, x4, x1, x2) - -inst_37552: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ffff80; valaddr_reg:x3; val_offset:112656*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112656*FLEN/8, x4, x1, x2) - -inst_37553: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ffffc0; valaddr_reg:x3; val_offset:112659*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112659*FLEN/8, x4, x1, x2) - -inst_37554: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ffffe0; valaddr_reg:x3; val_offset:112662*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112662*FLEN/8, x4, x1, x2) - -inst_37555: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fffff0; valaddr_reg:x3; val_offset:112665*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112665*FLEN/8, x4, x1, x2) - -inst_37556: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fffff8; valaddr_reg:x3; val_offset:112668*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112668*FLEN/8, x4, x1, x2) - -inst_37557: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fffffc; valaddr_reg:x3; val_offset:112671*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112671*FLEN/8, x4, x1, x2) - -inst_37558: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8fffffe; valaddr_reg:x3; val_offset:112674*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112674*FLEN/8, x4, x1, x2) - -inst_37559: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; -op3val:0x8ffffff; valaddr_reg:x3; val_offset:112677*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112677*FLEN/8, x4, x1, x2) - -inst_37560: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3800000; valaddr_reg:x3; val_offset:112680*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112680*FLEN/8, x4, x1, x2) - -inst_37561: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3800001; valaddr_reg:x3; val_offset:112683*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112683*FLEN/8, x4, x1, x2) - -inst_37562: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3800003; valaddr_reg:x3; val_offset:112686*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112686*FLEN/8, x4, x1, x2) - -inst_37563: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3800007; valaddr_reg:x3; val_offset:112689*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112689*FLEN/8, x4, x1, x2) - -inst_37564: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb380000f; valaddr_reg:x3; val_offset:112692*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112692*FLEN/8, x4, x1, x2) - -inst_37565: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb380001f; valaddr_reg:x3; val_offset:112695*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112695*FLEN/8, x4, x1, x2) - -inst_37566: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb380003f; valaddr_reg:x3; val_offset:112698*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112698*FLEN/8, x4, x1, x2) - -inst_37567: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb380007f; valaddr_reg:x3; val_offset:112701*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112701*FLEN/8, x4, x1, x2) - -inst_37568: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb38000ff; valaddr_reg:x3; val_offset:112704*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112704*FLEN/8, x4, x1, x2) - -inst_37569: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb38001ff; valaddr_reg:x3; val_offset:112707*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112707*FLEN/8, x4, x1, x2) - -inst_37570: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb38003ff; valaddr_reg:x3; val_offset:112710*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112710*FLEN/8, x4, x1, x2) - -inst_37571: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb38007ff; valaddr_reg:x3; val_offset:112713*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112713*FLEN/8, x4, x1, x2) - -inst_37572: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3800fff; valaddr_reg:x3; val_offset:112716*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112716*FLEN/8, x4, x1, x2) - -inst_37573: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3801fff; valaddr_reg:x3; val_offset:112719*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112719*FLEN/8, x4, x1, x2) - -inst_37574: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3803fff; valaddr_reg:x3; val_offset:112722*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112722*FLEN/8, x4, x1, x2) - -inst_37575: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3807fff; valaddr_reg:x3; val_offset:112725*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112725*FLEN/8, x4, x1, x2) - -inst_37576: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb380ffff; valaddr_reg:x3; val_offset:112728*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112728*FLEN/8, x4, x1, x2) - -inst_37577: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb381ffff; valaddr_reg:x3; val_offset:112731*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112731*FLEN/8, x4, x1, x2) - -inst_37578: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb383ffff; valaddr_reg:x3; val_offset:112734*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112734*FLEN/8, x4, x1, x2) - -inst_37579: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb387ffff; valaddr_reg:x3; val_offset:112737*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112737*FLEN/8, x4, x1, x2) - -inst_37580: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb38fffff; valaddr_reg:x3; val_offset:112740*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112740*FLEN/8, x4, x1, x2) - -inst_37581: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb39fffff; valaddr_reg:x3; val_offset:112743*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112743*FLEN/8, x4, x1, x2) - -inst_37582: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3bfffff; valaddr_reg:x3; val_offset:112746*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112746*FLEN/8, x4, x1, x2) - -inst_37583: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3c00000; valaddr_reg:x3; val_offset:112749*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112749*FLEN/8, x4, x1, x2) - -inst_37584: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3e00000; valaddr_reg:x3; val_offset:112752*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112752*FLEN/8, x4, x1, x2) - -inst_37585: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3f00000; valaddr_reg:x3; val_offset:112755*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112755*FLEN/8, x4, x1, x2) - -inst_37586: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3f80000; valaddr_reg:x3; val_offset:112758*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112758*FLEN/8, x4, x1, x2) - -inst_37587: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fc0000; valaddr_reg:x3; val_offset:112761*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112761*FLEN/8, x4, x1, x2) - -inst_37588: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fe0000; valaddr_reg:x3; val_offset:112764*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112764*FLEN/8, x4, x1, x2) - -inst_37589: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ff0000; valaddr_reg:x3; val_offset:112767*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112767*FLEN/8, x4, x1, x2) - -inst_37590: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ff8000; valaddr_reg:x3; val_offset:112770*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112770*FLEN/8, x4, x1, x2) - -inst_37591: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ffc000; valaddr_reg:x3; val_offset:112773*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112773*FLEN/8, x4, x1, x2) - -inst_37592: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ffe000; valaddr_reg:x3; val_offset:112776*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112776*FLEN/8, x4, x1, x2) - -inst_37593: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fff000; valaddr_reg:x3; val_offset:112779*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112779*FLEN/8, x4, x1, x2) - -inst_37594: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fff800; valaddr_reg:x3; val_offset:112782*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112782*FLEN/8, x4, x1, x2) - -inst_37595: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fffc00; valaddr_reg:x3; val_offset:112785*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112785*FLEN/8, x4, x1, x2) - -inst_37596: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fffe00; valaddr_reg:x3; val_offset:112788*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112788*FLEN/8, x4, x1, x2) - -inst_37597: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ffff00; valaddr_reg:x3; val_offset:112791*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112791*FLEN/8, x4, x1, x2) - -inst_37598: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ffff80; valaddr_reg:x3; val_offset:112794*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112794*FLEN/8, x4, x1, x2) - -inst_37599: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ffffc0; valaddr_reg:x3; val_offset:112797*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112797*FLEN/8, x4, x1, x2) - -inst_37600: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ffffe0; valaddr_reg:x3; val_offset:112800*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112800*FLEN/8, x4, x1, x2) - -inst_37601: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fffff0; valaddr_reg:x3; val_offset:112803*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112803*FLEN/8, x4, x1, x2) - -inst_37602: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fffff8; valaddr_reg:x3; val_offset:112806*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112806*FLEN/8, x4, x1, x2) - -inst_37603: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fffffc; valaddr_reg:x3; val_offset:112809*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112809*FLEN/8, x4, x1, x2) - -inst_37604: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3fffffe; valaddr_reg:x3; val_offset:112812*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112812*FLEN/8, x4, x1, x2) - -inst_37605: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xb3ffffff; valaddr_reg:x3; val_offset:112815*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112815*FLEN/8, x4, x1, x2) - -inst_37606: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbf800001; valaddr_reg:x3; val_offset:112818*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112818*FLEN/8, x4, x1, x2) - -inst_37607: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbf800003; valaddr_reg:x3; val_offset:112821*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112821*FLEN/8, x4, x1, x2) - -inst_37608: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbf800007; valaddr_reg:x3; val_offset:112824*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112824*FLEN/8, x4, x1, x2) - -inst_37609: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbf999999; valaddr_reg:x3; val_offset:112827*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112827*FLEN/8, x4, x1, x2) - -inst_37610: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:112830*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112830*FLEN/8, x4, x1, x2) - -inst_37611: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:112833*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112833*FLEN/8, x4, x1, x2) - -inst_37612: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:112836*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112836*FLEN/8, x4, x1, x2) - -inst_37613: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:112839*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112839*FLEN/8, x4, x1, x2) - -inst_37614: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:112842*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112842*FLEN/8, x4, x1, x2) - -inst_37615: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:112845*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112845*FLEN/8, x4, x1, x2) - -inst_37616: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:112848*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112848*FLEN/8, x4, x1, x2) - -inst_37617: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:112851*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112851*FLEN/8, x4, x1, x2) - -inst_37618: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:112854*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112854*FLEN/8, x4, x1, x2) - -inst_37619: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:112857*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112857*FLEN/8, x4, x1, x2) - -inst_37620: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:112860*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112860*FLEN/8, x4, x1, x2) - -inst_37621: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:112863*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112863*FLEN/8, x4, x1, x2) - -inst_37622: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8000000; valaddr_reg:x3; val_offset:112866*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112866*FLEN/8, x4, x1, x2) - -inst_37623: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8000001; valaddr_reg:x3; val_offset:112869*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112869*FLEN/8, x4, x1, x2) - -inst_37624: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8000003; valaddr_reg:x3; val_offset:112872*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112872*FLEN/8, x4, x1, x2) - -inst_37625: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8000007; valaddr_reg:x3; val_offset:112875*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112875*FLEN/8, x4, x1, x2) - -inst_37626: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb800000f; valaddr_reg:x3; val_offset:112878*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112878*FLEN/8, x4, x1, x2) - -inst_37627: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb800001f; valaddr_reg:x3; val_offset:112881*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112881*FLEN/8, x4, x1, x2) - -inst_37628: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb800003f; valaddr_reg:x3; val_offset:112884*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112884*FLEN/8, x4, x1, x2) - -inst_37629: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb800007f; valaddr_reg:x3; val_offset:112887*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112887*FLEN/8, x4, x1, x2) - -inst_37630: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb80000ff; valaddr_reg:x3; val_offset:112890*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112890*FLEN/8, x4, x1, x2) - -inst_37631: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb80001ff; valaddr_reg:x3; val_offset:112893*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112893*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_295) - -inst_37632: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb80003ff; valaddr_reg:x3; val_offset:112896*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112896*FLEN/8, x4, x1, x2) - -inst_37633: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb80007ff; valaddr_reg:x3; val_offset:112899*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112899*FLEN/8, x4, x1, x2) - -inst_37634: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8000fff; valaddr_reg:x3; val_offset:112902*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112902*FLEN/8, x4, x1, x2) - -inst_37635: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8001fff; valaddr_reg:x3; val_offset:112905*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112905*FLEN/8, x4, x1, x2) - -inst_37636: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8003fff; valaddr_reg:x3; val_offset:112908*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112908*FLEN/8, x4, x1, x2) - -inst_37637: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8007fff; valaddr_reg:x3; val_offset:112911*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112911*FLEN/8, x4, x1, x2) - -inst_37638: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb800ffff; valaddr_reg:x3; val_offset:112914*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112914*FLEN/8, x4, x1, x2) - -inst_37639: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb801ffff; valaddr_reg:x3; val_offset:112917*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112917*FLEN/8, x4, x1, x2) - -inst_37640: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb803ffff; valaddr_reg:x3; val_offset:112920*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112920*FLEN/8, x4, x1, x2) - -inst_37641: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb807ffff; valaddr_reg:x3; val_offset:112923*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112923*FLEN/8, x4, x1, x2) - -inst_37642: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb80fffff; valaddr_reg:x3; val_offset:112926*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112926*FLEN/8, x4, x1, x2) - -inst_37643: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb81fffff; valaddr_reg:x3; val_offset:112929*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112929*FLEN/8, x4, x1, x2) - -inst_37644: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb83fffff; valaddr_reg:x3; val_offset:112932*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112932*FLEN/8, x4, x1, x2) - -inst_37645: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8400000; valaddr_reg:x3; val_offset:112935*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112935*FLEN/8, x4, x1, x2) - -inst_37646: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8600000; valaddr_reg:x3; val_offset:112938*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112938*FLEN/8, x4, x1, x2) - -inst_37647: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8700000; valaddr_reg:x3; val_offset:112941*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112941*FLEN/8, x4, x1, x2) - -inst_37648: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb8780000; valaddr_reg:x3; val_offset:112944*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112944*FLEN/8, x4, x1, x2) - -inst_37649: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87c0000; valaddr_reg:x3; val_offset:112947*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112947*FLEN/8, x4, x1, x2) - -inst_37650: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87e0000; valaddr_reg:x3; val_offset:112950*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112950*FLEN/8, x4, x1, x2) - -inst_37651: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87f0000; valaddr_reg:x3; val_offset:112953*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112953*FLEN/8, x4, x1, x2) - -inst_37652: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87f8000; valaddr_reg:x3; val_offset:112956*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112956*FLEN/8, x4, x1, x2) - -inst_37653: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87fc000; valaddr_reg:x3; val_offset:112959*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112959*FLEN/8, x4, x1, x2) - -inst_37654: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87fe000; valaddr_reg:x3; val_offset:112962*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112962*FLEN/8, x4, x1, x2) - -inst_37655: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87ff000; valaddr_reg:x3; val_offset:112965*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112965*FLEN/8, x4, x1, x2) - -inst_37656: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87ff800; valaddr_reg:x3; val_offset:112968*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112968*FLEN/8, x4, x1, x2) - -inst_37657: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87ffc00; valaddr_reg:x3; val_offset:112971*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112971*FLEN/8, x4, x1, x2) - -inst_37658: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87ffe00; valaddr_reg:x3; val_offset:112974*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112974*FLEN/8, x4, x1, x2) - -inst_37659: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87fff00; valaddr_reg:x3; val_offset:112977*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112977*FLEN/8, x4, x1, x2) - -inst_37660: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87fff80; valaddr_reg:x3; val_offset:112980*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112980*FLEN/8, x4, x1, x2) - -inst_37661: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87fffc0; valaddr_reg:x3; val_offset:112983*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112983*FLEN/8, x4, x1, x2) - -inst_37662: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87fffe0; valaddr_reg:x3; val_offset:112986*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112986*FLEN/8, x4, x1, x2) - -inst_37663: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87ffff0; valaddr_reg:x3; val_offset:112989*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112989*FLEN/8, x4, x1, x2) - -inst_37664: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87ffff8; valaddr_reg:x3; val_offset:112992*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112992*FLEN/8, x4, x1, x2) - -inst_37665: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87ffffc; valaddr_reg:x3; val_offset:112995*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112995*FLEN/8, x4, x1, x2) - -inst_37666: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87ffffe; valaddr_reg:x3; val_offset:112998*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112998*FLEN/8, x4, x1, x2) - -inst_37667: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xb87fffff; valaddr_reg:x3; val_offset:113001*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113001*FLEN/8, x4, x1, x2) - -inst_37668: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbf800001; valaddr_reg:x3; val_offset:113004*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113004*FLEN/8, x4, x1, x2) - -inst_37669: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbf800003; valaddr_reg:x3; val_offset:113007*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113007*FLEN/8, x4, x1, x2) - -inst_37670: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbf800007; valaddr_reg:x3; val_offset:113010*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113010*FLEN/8, x4, x1, x2) - -inst_37671: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbf999999; valaddr_reg:x3; val_offset:113013*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113013*FLEN/8, x4, x1, x2) - -inst_37672: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfa49249; valaddr_reg:x3; val_offset:113016*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113016*FLEN/8, x4, x1, x2) - -inst_37673: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfb33333; valaddr_reg:x3; val_offset:113019*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113019*FLEN/8, x4, x1, x2) - -inst_37674: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:113022*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113022*FLEN/8, x4, x1, x2) - -inst_37675: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:113025*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113025*FLEN/8, x4, x1, x2) - -inst_37676: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfc44444; valaddr_reg:x3; val_offset:113028*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113028*FLEN/8, x4, x1, x2) - -inst_37677: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfcccccc; valaddr_reg:x3; val_offset:113031*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113031*FLEN/8, x4, x1, x2) - -inst_37678: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:113034*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113034*FLEN/8, x4, x1, x2) - -inst_37679: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfe66666; valaddr_reg:x3; val_offset:113037*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113037*FLEN/8, x4, x1, x2) - -inst_37680: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbfedb6db; valaddr_reg:x3; val_offset:113040*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113040*FLEN/8, x4, x1, x2) - -inst_37681: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbffffff8; valaddr_reg:x3; val_offset:113043*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113043*FLEN/8, x4, x1, x2) - -inst_37682: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbffffffc; valaddr_reg:x3; val_offset:113046*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113046*FLEN/8, x4, x1, x2) - -inst_37683: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; -op3val:0xbffffffe; valaddr_reg:x3; val_offset:113049*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113049*FLEN/8, x4, x1, x2) - -inst_37684: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:113052*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113052*FLEN/8, x4, x1, x2) - -inst_37685: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:113055*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113055*FLEN/8, x4, x1, x2) - -inst_37686: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:113058*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113058*FLEN/8, x4, x1, x2) - -inst_37687: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:113061*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113061*FLEN/8, x4, x1, x2) - -inst_37688: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:113064*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113064*FLEN/8, x4, x1, x2) - -inst_37689: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:113067*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113067*FLEN/8, x4, x1, x2) - -inst_37690: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:113070*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113070*FLEN/8, x4, x1, x2) - -inst_37691: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:113073*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113073*FLEN/8, x4, x1, x2) - -inst_37692: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:113076*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113076*FLEN/8, x4, x1, x2) - -inst_37693: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:113079*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113079*FLEN/8, x4, x1, x2) - -inst_37694: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:113082*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113082*FLEN/8, x4, x1, x2) - -inst_37695: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:113085*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113085*FLEN/8, x4, x1, x2) - -inst_37696: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:113088*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113088*FLEN/8, x4, x1, x2) - -inst_37697: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:113091*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113091*FLEN/8, x4, x1, x2) - -inst_37698: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:113094*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113094*FLEN/8, x4, x1, x2) - -inst_37699: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:113097*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113097*FLEN/8, x4, x1, x2) - -inst_37700: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23800000; valaddr_reg:x3; val_offset:113100*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113100*FLEN/8, x4, x1, x2) - -inst_37701: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23800001; valaddr_reg:x3; val_offset:113103*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113103*FLEN/8, x4, x1, x2) - -inst_37702: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23800003; valaddr_reg:x3; val_offset:113106*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113106*FLEN/8, x4, x1, x2) - -inst_37703: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23800007; valaddr_reg:x3; val_offset:113109*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113109*FLEN/8, x4, x1, x2) - -inst_37704: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x2380000f; valaddr_reg:x3; val_offset:113112*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113112*FLEN/8, x4, x1, x2) - -inst_37705: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x2380001f; valaddr_reg:x3; val_offset:113115*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113115*FLEN/8, x4, x1, x2) - -inst_37706: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x2380003f; valaddr_reg:x3; val_offset:113118*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113118*FLEN/8, x4, x1, x2) - -inst_37707: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x2380007f; valaddr_reg:x3; val_offset:113121*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113121*FLEN/8, x4, x1, x2) - -inst_37708: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x238000ff; valaddr_reg:x3; val_offset:113124*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113124*FLEN/8, x4, x1, x2) - -inst_37709: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x238001ff; valaddr_reg:x3; val_offset:113127*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113127*FLEN/8, x4, x1, x2) - -inst_37710: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x238003ff; valaddr_reg:x3; val_offset:113130*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113130*FLEN/8, x4, x1, x2) - -inst_37711: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x238007ff; valaddr_reg:x3; val_offset:113133*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113133*FLEN/8, x4, x1, x2) - -inst_37712: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23800fff; valaddr_reg:x3; val_offset:113136*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113136*FLEN/8, x4, x1, x2) - -inst_37713: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23801fff; valaddr_reg:x3; val_offset:113139*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113139*FLEN/8, x4, x1, x2) - -inst_37714: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23803fff; valaddr_reg:x3; val_offset:113142*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113142*FLEN/8, x4, x1, x2) - -inst_37715: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23807fff; valaddr_reg:x3; val_offset:113145*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113145*FLEN/8, x4, x1, x2) - -inst_37716: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x2380ffff; valaddr_reg:x3; val_offset:113148*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113148*FLEN/8, x4, x1, x2) - -inst_37717: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x2381ffff; valaddr_reg:x3; val_offset:113151*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113151*FLEN/8, x4, x1, x2) - -inst_37718: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x2383ffff; valaddr_reg:x3; val_offset:113154*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113154*FLEN/8, x4, x1, x2) - -inst_37719: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x2387ffff; valaddr_reg:x3; val_offset:113157*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113157*FLEN/8, x4, x1, x2) - -inst_37720: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x238fffff; valaddr_reg:x3; val_offset:113160*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113160*FLEN/8, x4, x1, x2) - -inst_37721: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x239fffff; valaddr_reg:x3; val_offset:113163*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113163*FLEN/8, x4, x1, x2) - -inst_37722: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23bfffff; valaddr_reg:x3; val_offset:113166*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113166*FLEN/8, x4, x1, x2) - -inst_37723: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23c00000; valaddr_reg:x3; val_offset:113169*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113169*FLEN/8, x4, x1, x2) - -inst_37724: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23e00000; valaddr_reg:x3; val_offset:113172*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113172*FLEN/8, x4, x1, x2) - -inst_37725: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23f00000; valaddr_reg:x3; val_offset:113175*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113175*FLEN/8, x4, x1, x2) - -inst_37726: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23f80000; valaddr_reg:x3; val_offset:113178*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113178*FLEN/8, x4, x1, x2) - -inst_37727: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fc0000; valaddr_reg:x3; val_offset:113181*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113181*FLEN/8, x4, x1, x2) - -inst_37728: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fe0000; valaddr_reg:x3; val_offset:113184*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113184*FLEN/8, x4, x1, x2) - -inst_37729: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ff0000; valaddr_reg:x3; val_offset:113187*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113187*FLEN/8, x4, x1, x2) - -inst_37730: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ff8000; valaddr_reg:x3; val_offset:113190*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113190*FLEN/8, x4, x1, x2) - -inst_37731: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ffc000; valaddr_reg:x3; val_offset:113193*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113193*FLEN/8, x4, x1, x2) - -inst_37732: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ffe000; valaddr_reg:x3; val_offset:113196*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113196*FLEN/8, x4, x1, x2) - -inst_37733: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fff000; valaddr_reg:x3; val_offset:113199*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113199*FLEN/8, x4, x1, x2) - -inst_37734: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fff800; valaddr_reg:x3; val_offset:113202*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113202*FLEN/8, x4, x1, x2) - -inst_37735: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fffc00; valaddr_reg:x3; val_offset:113205*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113205*FLEN/8, x4, x1, x2) - -inst_37736: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fffe00; valaddr_reg:x3; val_offset:113208*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113208*FLEN/8, x4, x1, x2) - -inst_37737: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ffff00; valaddr_reg:x3; val_offset:113211*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113211*FLEN/8, x4, x1, x2) - -inst_37738: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ffff80; valaddr_reg:x3; val_offset:113214*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113214*FLEN/8, x4, x1, x2) - -inst_37739: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ffffc0; valaddr_reg:x3; val_offset:113217*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113217*FLEN/8, x4, x1, x2) - -inst_37740: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ffffe0; valaddr_reg:x3; val_offset:113220*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113220*FLEN/8, x4, x1, x2) - -inst_37741: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fffff0; valaddr_reg:x3; val_offset:113223*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113223*FLEN/8, x4, x1, x2) - -inst_37742: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fffff8; valaddr_reg:x3; val_offset:113226*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113226*FLEN/8, x4, x1, x2) - -inst_37743: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fffffc; valaddr_reg:x3; val_offset:113229*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113229*FLEN/8, x4, x1, x2) - -inst_37744: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23fffffe; valaddr_reg:x3; val_offset:113232*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113232*FLEN/8, x4, x1, x2) - -inst_37745: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; -op3val:0x23ffffff; valaddr_reg:x3; val_offset:113235*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113235*FLEN/8, x4, x1, x2) - -inst_37746: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29800000; valaddr_reg:x3; val_offset:113238*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113238*FLEN/8, x4, x1, x2) - -inst_37747: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29800001; valaddr_reg:x3; val_offset:113241*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113241*FLEN/8, x4, x1, x2) - -inst_37748: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29800003; valaddr_reg:x3; val_offset:113244*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113244*FLEN/8, x4, x1, x2) - -inst_37749: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29800007; valaddr_reg:x3; val_offset:113247*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113247*FLEN/8, x4, x1, x2) - -inst_37750: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x2980000f; valaddr_reg:x3; val_offset:113250*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113250*FLEN/8, x4, x1, x2) - -inst_37751: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x2980001f; valaddr_reg:x3; val_offset:113253*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113253*FLEN/8, x4, x1, x2) - -inst_37752: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x2980003f; valaddr_reg:x3; val_offset:113256*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113256*FLEN/8, x4, x1, x2) - -inst_37753: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x2980007f; valaddr_reg:x3; val_offset:113259*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113259*FLEN/8, x4, x1, x2) - -inst_37754: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x298000ff; valaddr_reg:x3; val_offset:113262*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113262*FLEN/8, x4, x1, x2) - -inst_37755: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x298001ff; valaddr_reg:x3; val_offset:113265*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113265*FLEN/8, x4, x1, x2) - -inst_37756: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x298003ff; valaddr_reg:x3; val_offset:113268*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113268*FLEN/8, x4, x1, x2) - -inst_37757: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x298007ff; valaddr_reg:x3; val_offset:113271*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113271*FLEN/8, x4, x1, x2) - -inst_37758: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29800fff; valaddr_reg:x3; val_offset:113274*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113274*FLEN/8, x4, x1, x2) - -inst_37759: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29801fff; valaddr_reg:x3; val_offset:113277*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113277*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_296) - -inst_37760: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29803fff; valaddr_reg:x3; val_offset:113280*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113280*FLEN/8, x4, x1, x2) - -inst_37761: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29807fff; valaddr_reg:x3; val_offset:113283*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113283*FLEN/8, x4, x1, x2) - -inst_37762: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x2980ffff; valaddr_reg:x3; val_offset:113286*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113286*FLEN/8, x4, x1, x2) - -inst_37763: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x2981ffff; valaddr_reg:x3; val_offset:113289*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113289*FLEN/8, x4, x1, x2) - -inst_37764: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x2983ffff; valaddr_reg:x3; val_offset:113292*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113292*FLEN/8, x4, x1, x2) - -inst_37765: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x2987ffff; valaddr_reg:x3; val_offset:113295*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113295*FLEN/8, x4, x1, x2) - -inst_37766: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x298fffff; valaddr_reg:x3; val_offset:113298*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113298*FLEN/8, x4, x1, x2) - -inst_37767: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x299fffff; valaddr_reg:x3; val_offset:113301*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113301*FLEN/8, x4, x1, x2) - -inst_37768: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29bfffff; valaddr_reg:x3; val_offset:113304*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113304*FLEN/8, x4, x1, x2) - -inst_37769: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29c00000; valaddr_reg:x3; val_offset:113307*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113307*FLEN/8, x4, x1, x2) - -inst_37770: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29e00000; valaddr_reg:x3; val_offset:113310*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113310*FLEN/8, x4, x1, x2) - -inst_37771: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29f00000; valaddr_reg:x3; val_offset:113313*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113313*FLEN/8, x4, x1, x2) - -inst_37772: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29f80000; valaddr_reg:x3; val_offset:113316*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113316*FLEN/8, x4, x1, x2) - -inst_37773: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fc0000; valaddr_reg:x3; val_offset:113319*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113319*FLEN/8, x4, x1, x2) - -inst_37774: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fe0000; valaddr_reg:x3; val_offset:113322*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113322*FLEN/8, x4, x1, x2) - -inst_37775: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ff0000; valaddr_reg:x3; val_offset:113325*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113325*FLEN/8, x4, x1, x2) - -inst_37776: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ff8000; valaddr_reg:x3; val_offset:113328*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113328*FLEN/8, x4, x1, x2) - -inst_37777: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ffc000; valaddr_reg:x3; val_offset:113331*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113331*FLEN/8, x4, x1, x2) - -inst_37778: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ffe000; valaddr_reg:x3; val_offset:113334*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113334*FLEN/8, x4, x1, x2) - -inst_37779: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fff000; valaddr_reg:x3; val_offset:113337*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113337*FLEN/8, x4, x1, x2) - -inst_37780: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fff800; valaddr_reg:x3; val_offset:113340*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113340*FLEN/8, x4, x1, x2) - -inst_37781: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fffc00; valaddr_reg:x3; val_offset:113343*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113343*FLEN/8, x4, x1, x2) - -inst_37782: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fffe00; valaddr_reg:x3; val_offset:113346*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113346*FLEN/8, x4, x1, x2) - -inst_37783: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ffff00; valaddr_reg:x3; val_offset:113349*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113349*FLEN/8, x4, x1, x2) - -inst_37784: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ffff80; valaddr_reg:x3; val_offset:113352*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113352*FLEN/8, x4, x1, x2) - -inst_37785: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ffffc0; valaddr_reg:x3; val_offset:113355*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113355*FLEN/8, x4, x1, x2) - -inst_37786: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ffffe0; valaddr_reg:x3; val_offset:113358*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113358*FLEN/8, x4, x1, x2) - -inst_37787: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fffff0; valaddr_reg:x3; val_offset:113361*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113361*FLEN/8, x4, x1, x2) - -inst_37788: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fffff8; valaddr_reg:x3; val_offset:113364*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113364*FLEN/8, x4, x1, x2) - -inst_37789: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fffffc; valaddr_reg:x3; val_offset:113367*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113367*FLEN/8, x4, x1, x2) - -inst_37790: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29fffffe; valaddr_reg:x3; val_offset:113370*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113370*FLEN/8, x4, x1, x2) - -inst_37791: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x29ffffff; valaddr_reg:x3; val_offset:113373*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113373*FLEN/8, x4, x1, x2) - -inst_37792: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3f800001; valaddr_reg:x3; val_offset:113376*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113376*FLEN/8, x4, x1, x2) - -inst_37793: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3f800003; valaddr_reg:x3; val_offset:113379*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113379*FLEN/8, x4, x1, x2) - -inst_37794: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3f800007; valaddr_reg:x3; val_offset:113382*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113382*FLEN/8, x4, x1, x2) - -inst_37795: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3f999999; valaddr_reg:x3; val_offset:113385*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113385*FLEN/8, x4, x1, x2) - -inst_37796: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fa49249; valaddr_reg:x3; val_offset:113388*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113388*FLEN/8, x4, x1, x2) - -inst_37797: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fb33333; valaddr_reg:x3; val_offset:113391*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113391*FLEN/8, x4, x1, x2) - -inst_37798: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:113394*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113394*FLEN/8, x4, x1, x2) - -inst_37799: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:113397*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113397*FLEN/8, x4, x1, x2) - -inst_37800: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fc44444; valaddr_reg:x3; val_offset:113400*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113400*FLEN/8, x4, x1, x2) - -inst_37801: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fcccccc; valaddr_reg:x3; val_offset:113403*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113403*FLEN/8, x4, x1, x2) - -inst_37802: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:113406*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113406*FLEN/8, x4, x1, x2) - -inst_37803: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fe66666; valaddr_reg:x3; val_offset:113409*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113409*FLEN/8, x4, x1, x2) - -inst_37804: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3fedb6db; valaddr_reg:x3; val_offset:113412*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113412*FLEN/8, x4, x1, x2) - -inst_37805: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3ffffff8; valaddr_reg:x3; val_offset:113415*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113415*FLEN/8, x4, x1, x2) - -inst_37806: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3ffffffc; valaddr_reg:x3; val_offset:113418*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113418*FLEN/8, x4, x1, x2) - -inst_37807: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; -op3val:0x3ffffffe; valaddr_reg:x3; val_offset:113421*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113421*FLEN/8, x4, x1, x2) - -inst_37808: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2000000; valaddr_reg:x3; val_offset:113424*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113424*FLEN/8, x4, x1, x2) - -inst_37809: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2000001; valaddr_reg:x3; val_offset:113427*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113427*FLEN/8, x4, x1, x2) - -inst_37810: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2000003; valaddr_reg:x3; val_offset:113430*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113430*FLEN/8, x4, x1, x2) - -inst_37811: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2000007; valaddr_reg:x3; val_offset:113433*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113433*FLEN/8, x4, x1, x2) - -inst_37812: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf200000f; valaddr_reg:x3; val_offset:113436*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113436*FLEN/8, x4, x1, x2) - -inst_37813: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf200001f; valaddr_reg:x3; val_offset:113439*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113439*FLEN/8, x4, x1, x2) - -inst_37814: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf200003f; valaddr_reg:x3; val_offset:113442*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113442*FLEN/8, x4, x1, x2) - -inst_37815: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf200007f; valaddr_reg:x3; val_offset:113445*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113445*FLEN/8, x4, x1, x2) - -inst_37816: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf20000ff; valaddr_reg:x3; val_offset:113448*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113448*FLEN/8, x4, x1, x2) - -inst_37817: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf20001ff; valaddr_reg:x3; val_offset:113451*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113451*FLEN/8, x4, x1, x2) - -inst_37818: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf20003ff; valaddr_reg:x3; val_offset:113454*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113454*FLEN/8, x4, x1, x2) - -inst_37819: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf20007ff; valaddr_reg:x3; val_offset:113457*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113457*FLEN/8, x4, x1, x2) - -inst_37820: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2000fff; valaddr_reg:x3; val_offset:113460*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113460*FLEN/8, x4, x1, x2) - -inst_37821: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2001fff; valaddr_reg:x3; val_offset:113463*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113463*FLEN/8, x4, x1, x2) - -inst_37822: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2003fff; valaddr_reg:x3; val_offset:113466*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113466*FLEN/8, x4, x1, x2) - -inst_37823: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2007fff; valaddr_reg:x3; val_offset:113469*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113469*FLEN/8, x4, x1, x2) - -inst_37824: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf200ffff; valaddr_reg:x3; val_offset:113472*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113472*FLEN/8, x4, x1, x2) - -inst_37825: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf201ffff; valaddr_reg:x3; val_offset:113475*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113475*FLEN/8, x4, x1, x2) - -inst_37826: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf203ffff; valaddr_reg:x3; val_offset:113478*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113478*FLEN/8, x4, x1, x2) - -inst_37827: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf207ffff; valaddr_reg:x3; val_offset:113481*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113481*FLEN/8, x4, x1, x2) - -inst_37828: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf20fffff; valaddr_reg:x3; val_offset:113484*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113484*FLEN/8, x4, x1, x2) - -inst_37829: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf21fffff; valaddr_reg:x3; val_offset:113487*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113487*FLEN/8, x4, x1, x2) - -inst_37830: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf23fffff; valaddr_reg:x3; val_offset:113490*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113490*FLEN/8, x4, x1, x2) - -inst_37831: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2400000; valaddr_reg:x3; val_offset:113493*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113493*FLEN/8, x4, x1, x2) - -inst_37832: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2600000; valaddr_reg:x3; val_offset:113496*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113496*FLEN/8, x4, x1, x2) - -inst_37833: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2700000; valaddr_reg:x3; val_offset:113499*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113499*FLEN/8, x4, x1, x2) - -inst_37834: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf2780000; valaddr_reg:x3; val_offset:113502*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113502*FLEN/8, x4, x1, x2) - -inst_37835: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27c0000; valaddr_reg:x3; val_offset:113505*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113505*FLEN/8, x4, x1, x2) - -inst_37836: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27e0000; valaddr_reg:x3; val_offset:113508*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113508*FLEN/8, x4, x1, x2) - -inst_37837: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27f0000; valaddr_reg:x3; val_offset:113511*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113511*FLEN/8, x4, x1, x2) - -inst_37838: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27f8000; valaddr_reg:x3; val_offset:113514*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113514*FLEN/8, x4, x1, x2) - -inst_37839: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27fc000; valaddr_reg:x3; val_offset:113517*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113517*FLEN/8, x4, x1, x2) - -inst_37840: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27fe000; valaddr_reg:x3; val_offset:113520*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113520*FLEN/8, x4, x1, x2) - -inst_37841: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27ff000; valaddr_reg:x3; val_offset:113523*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113523*FLEN/8, x4, x1, x2) - -inst_37842: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27ff800; valaddr_reg:x3; val_offset:113526*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113526*FLEN/8, x4, x1, x2) - -inst_37843: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27ffc00; valaddr_reg:x3; val_offset:113529*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113529*FLEN/8, x4, x1, x2) - -inst_37844: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27ffe00; valaddr_reg:x3; val_offset:113532*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113532*FLEN/8, x4, x1, x2) - -inst_37845: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27fff00; valaddr_reg:x3; val_offset:113535*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113535*FLEN/8, x4, x1, x2) - -inst_37846: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27fff80; valaddr_reg:x3; val_offset:113538*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113538*FLEN/8, x4, x1, x2) - -inst_37847: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27fffc0; valaddr_reg:x3; val_offset:113541*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113541*FLEN/8, x4, x1, x2) - -inst_37848: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27fffe0; valaddr_reg:x3; val_offset:113544*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113544*FLEN/8, x4, x1, x2) - -inst_37849: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27ffff0; valaddr_reg:x3; val_offset:113547*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113547*FLEN/8, x4, x1, x2) - -inst_37850: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27ffff8; valaddr_reg:x3; val_offset:113550*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113550*FLEN/8, x4, x1, x2) - -inst_37851: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27ffffc; valaddr_reg:x3; val_offset:113553*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113553*FLEN/8, x4, x1, x2) - -inst_37852: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27ffffe; valaddr_reg:x3; val_offset:113556*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113556*FLEN/8, x4, x1, x2) - -inst_37853: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xf27fffff; valaddr_reg:x3; val_offset:113559*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113559*FLEN/8, x4, x1, x2) - -inst_37854: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff000001; valaddr_reg:x3; val_offset:113562*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113562*FLEN/8, x4, x1, x2) - -inst_37855: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff000003; valaddr_reg:x3; val_offset:113565*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113565*FLEN/8, x4, x1, x2) - -inst_37856: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff000007; valaddr_reg:x3; val_offset:113568*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113568*FLEN/8, x4, x1, x2) - -inst_37857: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff199999; valaddr_reg:x3; val_offset:113571*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113571*FLEN/8, x4, x1, x2) - -inst_37858: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff249249; valaddr_reg:x3; val_offset:113574*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113574*FLEN/8, x4, x1, x2) - -inst_37859: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff333333; valaddr_reg:x3; val_offset:113577*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113577*FLEN/8, x4, x1, x2) - -inst_37860: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff36db6d; valaddr_reg:x3; val_offset:113580*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113580*FLEN/8, x4, x1, x2) - -inst_37861: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:113583*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113583*FLEN/8, x4, x1, x2) - -inst_37862: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff444444; valaddr_reg:x3; val_offset:113586*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113586*FLEN/8, x4, x1, x2) - -inst_37863: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff4ccccc; valaddr_reg:x3; val_offset:113589*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113589*FLEN/8, x4, x1, x2) - -inst_37864: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff5b6db6; valaddr_reg:x3; val_offset:113592*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113592*FLEN/8, x4, x1, x2) - -inst_37865: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff666666; valaddr_reg:x3; val_offset:113595*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113595*FLEN/8, x4, x1, x2) - -inst_37866: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff6db6db; valaddr_reg:x3; val_offset:113598*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113598*FLEN/8, x4, x1, x2) - -inst_37867: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff7ffff8; valaddr_reg:x3; val_offset:113601*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113601*FLEN/8, x4, x1, x2) - -inst_37868: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff7ffffc; valaddr_reg:x3; val_offset:113604*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113604*FLEN/8, x4, x1, x2) - -inst_37869: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; -op3val:0xff7ffffe; valaddr_reg:x3; val_offset:113607*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113607*FLEN/8, x4, x1, x2) - -inst_37870: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x800001; valaddr_reg:x3; val_offset:113610*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113610*FLEN/8, x4, x1, x2) - -inst_37871: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x800003; valaddr_reg:x3; val_offset:113613*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113613*FLEN/8, x4, x1, x2) - -inst_37872: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x800007; valaddr_reg:x3; val_offset:113616*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113616*FLEN/8, x4, x1, x2) - -inst_37873: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x999999; valaddr_reg:x3; val_offset:113619*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113619*FLEN/8, x4, x1, x2) - -inst_37874: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xa49249; valaddr_reg:x3; val_offset:113622*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113622*FLEN/8, x4, x1, x2) - -inst_37875: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xb33333; valaddr_reg:x3; val_offset:113625*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113625*FLEN/8, x4, x1, x2) - -inst_37876: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xb6db6d; valaddr_reg:x3; val_offset:113628*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113628*FLEN/8, x4, x1, x2) - -inst_37877: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xbbbbbb; valaddr_reg:x3; val_offset:113631*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113631*FLEN/8, x4, x1, x2) - -inst_37878: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xc44444; valaddr_reg:x3; val_offset:113634*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113634*FLEN/8, x4, x1, x2) - -inst_37879: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xcccccc; valaddr_reg:x3; val_offset:113637*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113637*FLEN/8, x4, x1, x2) - -inst_37880: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xdb6db6; valaddr_reg:x3; val_offset:113640*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113640*FLEN/8, x4, x1, x2) - -inst_37881: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xe66666; valaddr_reg:x3; val_offset:113643*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113643*FLEN/8, x4, x1, x2) - -inst_37882: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xedb6db; valaddr_reg:x3; val_offset:113646*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113646*FLEN/8, x4, x1, x2) - -inst_37883: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xfffff8; valaddr_reg:x3; val_offset:113649*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113649*FLEN/8, x4, x1, x2) - -inst_37884: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xfffffc; valaddr_reg:x3; val_offset:113652*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113652*FLEN/8, x4, x1, x2) - -inst_37885: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0xfffffe; valaddr_reg:x3; val_offset:113655*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113655*FLEN/8, x4, x1, x2) - -inst_37886: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3800000; valaddr_reg:x3; val_offset:113658*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113658*FLEN/8, x4, x1, x2) - -inst_37887: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3800001; valaddr_reg:x3; val_offset:113661*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113661*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_297) - -inst_37888: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3800003; valaddr_reg:x3; val_offset:113664*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113664*FLEN/8, x4, x1, x2) - -inst_37889: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3800007; valaddr_reg:x3; val_offset:113667*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113667*FLEN/8, x4, x1, x2) - -inst_37890: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x380000f; valaddr_reg:x3; val_offset:113670*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113670*FLEN/8, x4, x1, x2) - -inst_37891: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x380001f; valaddr_reg:x3; val_offset:113673*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113673*FLEN/8, x4, x1, x2) - -inst_37892: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x380003f; valaddr_reg:x3; val_offset:113676*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113676*FLEN/8, x4, x1, x2) - -inst_37893: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x380007f; valaddr_reg:x3; val_offset:113679*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113679*FLEN/8, x4, x1, x2) - -inst_37894: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x38000ff; valaddr_reg:x3; val_offset:113682*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113682*FLEN/8, x4, x1, x2) - -inst_37895: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x38001ff; valaddr_reg:x3; val_offset:113685*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113685*FLEN/8, x4, x1, x2) - -inst_37896: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x38003ff; valaddr_reg:x3; val_offset:113688*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113688*FLEN/8, x4, x1, x2) - -inst_37897: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x38007ff; valaddr_reg:x3; val_offset:113691*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113691*FLEN/8, x4, x1, x2) - -inst_37898: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3800fff; valaddr_reg:x3; val_offset:113694*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113694*FLEN/8, x4, x1, x2) - -inst_37899: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3801fff; valaddr_reg:x3; val_offset:113697*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113697*FLEN/8, x4, x1, x2) - -inst_37900: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3803fff; valaddr_reg:x3; val_offset:113700*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113700*FLEN/8, x4, x1, x2) - -inst_37901: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3807fff; valaddr_reg:x3; val_offset:113703*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113703*FLEN/8, x4, x1, x2) - -inst_37902: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x380ffff; valaddr_reg:x3; val_offset:113706*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113706*FLEN/8, x4, x1, x2) - -inst_37903: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x381ffff; valaddr_reg:x3; val_offset:113709*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113709*FLEN/8, x4, x1, x2) - -inst_37904: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x383ffff; valaddr_reg:x3; val_offset:113712*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113712*FLEN/8, x4, x1, x2) - -inst_37905: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x387ffff; valaddr_reg:x3; val_offset:113715*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113715*FLEN/8, x4, x1, x2) - -inst_37906: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x38fffff; valaddr_reg:x3; val_offset:113718*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113718*FLEN/8, x4, x1, x2) - -inst_37907: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x39fffff; valaddr_reg:x3; val_offset:113721*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113721*FLEN/8, x4, x1, x2) - -inst_37908: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3bfffff; valaddr_reg:x3; val_offset:113724*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113724*FLEN/8, x4, x1, x2) - -inst_37909: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3c00000; valaddr_reg:x3; val_offset:113727*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113727*FLEN/8, x4, x1, x2) - -inst_37910: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3e00000; valaddr_reg:x3; val_offset:113730*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113730*FLEN/8, x4, x1, x2) - -inst_37911: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3f00000; valaddr_reg:x3; val_offset:113733*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113733*FLEN/8, x4, x1, x2) - -inst_37912: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3f80000; valaddr_reg:x3; val_offset:113736*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113736*FLEN/8, x4, x1, x2) - -inst_37913: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fc0000; valaddr_reg:x3; val_offset:113739*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113739*FLEN/8, x4, x1, x2) - -inst_37914: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fe0000; valaddr_reg:x3; val_offset:113742*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113742*FLEN/8, x4, x1, x2) - -inst_37915: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ff0000; valaddr_reg:x3; val_offset:113745*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113745*FLEN/8, x4, x1, x2) - -inst_37916: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ff8000; valaddr_reg:x3; val_offset:113748*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113748*FLEN/8, x4, x1, x2) - -inst_37917: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ffc000; valaddr_reg:x3; val_offset:113751*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113751*FLEN/8, x4, x1, x2) - -inst_37918: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ffe000; valaddr_reg:x3; val_offset:113754*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113754*FLEN/8, x4, x1, x2) - -inst_37919: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fff000; valaddr_reg:x3; val_offset:113757*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113757*FLEN/8, x4, x1, x2) - -inst_37920: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fff800; valaddr_reg:x3; val_offset:113760*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113760*FLEN/8, x4, x1, x2) - -inst_37921: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fffc00; valaddr_reg:x3; val_offset:113763*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113763*FLEN/8, x4, x1, x2) - -inst_37922: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fffe00; valaddr_reg:x3; val_offset:113766*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113766*FLEN/8, x4, x1, x2) - -inst_37923: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ffff00; valaddr_reg:x3; val_offset:113769*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113769*FLEN/8, x4, x1, x2) - -inst_37924: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ffff80; valaddr_reg:x3; val_offset:113772*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113772*FLEN/8, x4, x1, x2) - -inst_37925: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ffffc0; valaddr_reg:x3; val_offset:113775*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113775*FLEN/8, x4, x1, x2) - -inst_37926: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ffffe0; valaddr_reg:x3; val_offset:113778*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113778*FLEN/8, x4, x1, x2) - -inst_37927: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fffff0; valaddr_reg:x3; val_offset:113781*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113781*FLEN/8, x4, x1, x2) - -inst_37928: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fffff8; valaddr_reg:x3; val_offset:113784*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113784*FLEN/8, x4, x1, x2) - -inst_37929: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fffffc; valaddr_reg:x3; val_offset:113787*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113787*FLEN/8, x4, x1, x2) - -inst_37930: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3fffffe; valaddr_reg:x3; val_offset:113790*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113790*FLEN/8, x4, x1, x2) - -inst_37931: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; -op3val:0x3ffffff; valaddr_reg:x3; val_offset:113793*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113793*FLEN/8, x4, x1, x2) - -inst_37932: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x1; valaddr_reg:x3; val_offset:113796*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113796*FLEN/8, x4, x1, x2) - -inst_37933: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x3; valaddr_reg:x3; val_offset:113799*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113799*FLEN/8, x4, x1, x2) - -inst_37934: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x7; valaddr_reg:x3; val_offset:113802*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113802*FLEN/8, x4, x1, x2) - -inst_37935: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x199999; valaddr_reg:x3; val_offset:113805*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113805*FLEN/8, x4, x1, x2) - -inst_37936: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x249249; valaddr_reg:x3; val_offset:113808*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113808*FLEN/8, x4, x1, x2) - -inst_37937: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x333333; valaddr_reg:x3; val_offset:113811*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113811*FLEN/8, x4, x1, x2) - -inst_37938: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x36db6d; valaddr_reg:x3; val_offset:113814*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113814*FLEN/8, x4, x1, x2) - -inst_37939: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x3bbbbb; valaddr_reg:x3; val_offset:113817*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113817*FLEN/8, x4, x1, x2) - -inst_37940: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x444444; valaddr_reg:x3; val_offset:113820*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113820*FLEN/8, x4, x1, x2) - -inst_37941: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x4ccccc; valaddr_reg:x3; val_offset:113823*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113823*FLEN/8, x4, x1, x2) - -inst_37942: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x5b6db6; valaddr_reg:x3; val_offset:113826*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113826*FLEN/8, x4, x1, x2) - -inst_37943: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x666666; valaddr_reg:x3; val_offset:113829*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113829*FLEN/8, x4, x1, x2) - -inst_37944: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6db6db; valaddr_reg:x3; val_offset:113832*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113832*FLEN/8, x4, x1, x2) - -inst_37945: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x7ffff8; valaddr_reg:x3; val_offset:113835*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113835*FLEN/8, x4, x1, x2) - -inst_37946: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x7ffffc; valaddr_reg:x3; val_offset:113838*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113838*FLEN/8, x4, x1, x2) - -inst_37947: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x7ffffe; valaddr_reg:x3; val_offset:113841*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113841*FLEN/8, x4, x1, x2) - -inst_37948: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6800000; valaddr_reg:x3; val_offset:113844*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113844*FLEN/8, x4, x1, x2) - -inst_37949: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6800001; valaddr_reg:x3; val_offset:113847*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113847*FLEN/8, x4, x1, x2) - -inst_37950: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6800003; valaddr_reg:x3; val_offset:113850*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113850*FLEN/8, x4, x1, x2) - -inst_37951: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6800007; valaddr_reg:x3; val_offset:113853*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113853*FLEN/8, x4, x1, x2) - -inst_37952: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x680000f; valaddr_reg:x3; val_offset:113856*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113856*FLEN/8, x4, x1, x2) - -inst_37953: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x680001f; valaddr_reg:x3; val_offset:113859*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113859*FLEN/8, x4, x1, x2) - -inst_37954: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x680003f; valaddr_reg:x3; val_offset:113862*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113862*FLEN/8, x4, x1, x2) - -inst_37955: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x680007f; valaddr_reg:x3; val_offset:113865*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113865*FLEN/8, x4, x1, x2) - -inst_37956: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x68000ff; valaddr_reg:x3; val_offset:113868*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113868*FLEN/8, x4, x1, x2) - -inst_37957: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x68001ff; valaddr_reg:x3; val_offset:113871*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113871*FLEN/8, x4, x1, x2) - -inst_37958: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x68003ff; valaddr_reg:x3; val_offset:113874*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113874*FLEN/8, x4, x1, x2) - -inst_37959: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x68007ff; valaddr_reg:x3; val_offset:113877*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113877*FLEN/8, x4, x1, x2) - -inst_37960: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6800fff; valaddr_reg:x3; val_offset:113880*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113880*FLEN/8, x4, x1, x2) - -inst_37961: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6801fff; valaddr_reg:x3; val_offset:113883*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113883*FLEN/8, x4, x1, x2) - -inst_37962: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6803fff; valaddr_reg:x3; val_offset:113886*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113886*FLEN/8, x4, x1, x2) - -inst_37963: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6807fff; valaddr_reg:x3; val_offset:113889*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113889*FLEN/8, x4, x1, x2) - -inst_37964: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x680ffff; valaddr_reg:x3; val_offset:113892*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113892*FLEN/8, x4, x1, x2) - -inst_37965: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x681ffff; valaddr_reg:x3; val_offset:113895*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113895*FLEN/8, x4, x1, x2) - -inst_37966: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x683ffff; valaddr_reg:x3; val_offset:113898*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113898*FLEN/8, x4, x1, x2) - -inst_37967: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x687ffff; valaddr_reg:x3; val_offset:113901*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113901*FLEN/8, x4, x1, x2) - -inst_37968: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x68fffff; valaddr_reg:x3; val_offset:113904*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113904*FLEN/8, x4, x1, x2) - -inst_37969: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x69fffff; valaddr_reg:x3; val_offset:113907*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113907*FLEN/8, x4, x1, x2) - -inst_37970: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6bfffff; valaddr_reg:x3; val_offset:113910*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113910*FLEN/8, x4, x1, x2) - -inst_37971: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6c00000; valaddr_reg:x3; val_offset:113913*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113913*FLEN/8, x4, x1, x2) - -inst_37972: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6e00000; valaddr_reg:x3; val_offset:113916*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113916*FLEN/8, x4, x1, x2) - -inst_37973: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6f00000; valaddr_reg:x3; val_offset:113919*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113919*FLEN/8, x4, x1, x2) - -inst_37974: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6f80000; valaddr_reg:x3; val_offset:113922*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113922*FLEN/8, x4, x1, x2) - -inst_37975: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fc0000; valaddr_reg:x3; val_offset:113925*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113925*FLEN/8, x4, x1, x2) - -inst_37976: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fe0000; valaddr_reg:x3; val_offset:113928*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113928*FLEN/8, x4, x1, x2) - -inst_37977: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ff0000; valaddr_reg:x3; val_offset:113931*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113931*FLEN/8, x4, x1, x2) - -inst_37978: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ff8000; valaddr_reg:x3; val_offset:113934*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113934*FLEN/8, x4, x1, x2) - -inst_37979: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ffc000; valaddr_reg:x3; val_offset:113937*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113937*FLEN/8, x4, x1, x2) - -inst_37980: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ffe000; valaddr_reg:x3; val_offset:113940*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113940*FLEN/8, x4, x1, x2) - -inst_37981: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fff000; valaddr_reg:x3; val_offset:113943*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113943*FLEN/8, x4, x1, x2) - -inst_37982: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fff800; valaddr_reg:x3; val_offset:113946*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113946*FLEN/8, x4, x1, x2) - -inst_37983: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fffc00; valaddr_reg:x3; val_offset:113949*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113949*FLEN/8, x4, x1, x2) - -inst_37984: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fffe00; valaddr_reg:x3; val_offset:113952*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113952*FLEN/8, x4, x1, x2) - -inst_37985: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ffff00; valaddr_reg:x3; val_offset:113955*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113955*FLEN/8, x4, x1, x2) - -inst_37986: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ffff80; valaddr_reg:x3; val_offset:113958*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113958*FLEN/8, x4, x1, x2) - -inst_37987: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ffffc0; valaddr_reg:x3; val_offset:113961*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113961*FLEN/8, x4, x1, x2) - -inst_37988: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ffffe0; valaddr_reg:x3; val_offset:113964*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113964*FLEN/8, x4, x1, x2) - -inst_37989: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fffff0; valaddr_reg:x3; val_offset:113967*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113967*FLEN/8, x4, x1, x2) - -inst_37990: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fffff8; valaddr_reg:x3; val_offset:113970*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113970*FLEN/8, x4, x1, x2) - -inst_37991: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fffffc; valaddr_reg:x3; val_offset:113973*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113973*FLEN/8, x4, x1, x2) - -inst_37992: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6fffffe; valaddr_reg:x3; val_offset:113976*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113976*FLEN/8, x4, x1, x2) - -inst_37993: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; -op3val:0x6ffffff; valaddr_reg:x3; val_offset:113979*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113979*FLEN/8, x4, x1, x2) - -inst_37994: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:113982*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113982*FLEN/8, x4, x1, x2) - -inst_37995: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:113985*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113985*FLEN/8, x4, x1, x2) - -inst_37996: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:113988*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113988*FLEN/8, x4, x1, x2) - -inst_37997: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:113991*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113991*FLEN/8, x4, x1, x2) - -inst_37998: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:113994*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113994*FLEN/8, x4, x1, x2) - -inst_37999: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:113997*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113997*FLEN/8, x4, x1, x2) - -inst_38000: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:114000*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114000*FLEN/8, x4, x1, x2) - -inst_38001: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:114003*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114003*FLEN/8, x4, x1, x2) - -inst_38002: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:114006*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114006*FLEN/8, x4, x1, x2) - -inst_38003: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:114009*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114009*FLEN/8, x4, x1, x2) - -inst_38004: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:114012*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114012*FLEN/8, x4, x1, x2) - -inst_38005: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:114015*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114015*FLEN/8, x4, x1, x2) - -inst_38006: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:114018*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114018*FLEN/8, x4, x1, x2) - -inst_38007: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:114021*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114021*FLEN/8, x4, x1, x2) - -inst_38008: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:114024*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114024*FLEN/8, x4, x1, x2) - -inst_38009: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:114027*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114027*FLEN/8, x4, x1, x2) - -inst_38010: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b000000; valaddr_reg:x3; val_offset:114030*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114030*FLEN/8, x4, x1, x2) - -inst_38011: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b000001; valaddr_reg:x3; val_offset:114033*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114033*FLEN/8, x4, x1, x2) - -inst_38012: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b000003; valaddr_reg:x3; val_offset:114036*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114036*FLEN/8, x4, x1, x2) - -inst_38013: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b000007; valaddr_reg:x3; val_offset:114039*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114039*FLEN/8, x4, x1, x2) - -inst_38014: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b00000f; valaddr_reg:x3; val_offset:114042*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114042*FLEN/8, x4, x1, x2) - -inst_38015: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b00001f; valaddr_reg:x3; val_offset:114045*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114045*FLEN/8, x4, x1, x2) -RVTEST_SIGBASE(x1,signature_x1_298) - -inst_38016: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b00003f; valaddr_reg:x3; val_offset:114048*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114048*FLEN/8, x4, x1, x2) - -inst_38017: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b00007f; valaddr_reg:x3; val_offset:114051*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114051*FLEN/8, x4, x1, x2) - -inst_38018: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b0000ff; valaddr_reg:x3; val_offset:114054*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114054*FLEN/8, x4, x1, x2) - -inst_38019: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b0001ff; valaddr_reg:x3; val_offset:114057*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114057*FLEN/8, x4, x1, x2) - -inst_38020: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b0003ff; valaddr_reg:x3; val_offset:114060*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114060*FLEN/8, x4, x1, x2) - -inst_38021: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b0007ff; valaddr_reg:x3; val_offset:114063*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114063*FLEN/8, x4, x1, x2) - -inst_38022: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b000fff; valaddr_reg:x3; val_offset:114066*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114066*FLEN/8, x4, x1, x2) - -inst_38023: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b001fff; valaddr_reg:x3; val_offset:114069*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114069*FLEN/8, x4, x1, x2) - -inst_38024: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b003fff; valaddr_reg:x3; val_offset:114072*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114072*FLEN/8, x4, x1, x2) - -inst_38025: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b007fff; valaddr_reg:x3; val_offset:114075*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114075*FLEN/8, x4, x1, x2) - -inst_38026: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b00ffff; valaddr_reg:x3; val_offset:114078*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114078*FLEN/8, x4, x1, x2) - -inst_38027: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b01ffff; valaddr_reg:x3; val_offset:114081*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114081*FLEN/8, x4, x1, x2) - -inst_38028: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b03ffff; valaddr_reg:x3; val_offset:114084*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114084*FLEN/8, x4, x1, x2) - -inst_38029: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b07ffff; valaddr_reg:x3; val_offset:114087*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114087*FLEN/8, x4, x1, x2) - -inst_38030: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b0fffff; valaddr_reg:x3; val_offset:114090*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114090*FLEN/8, x4, x1, x2) - -inst_38031: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b1fffff; valaddr_reg:x3; val_offset:114093*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114093*FLEN/8, x4, x1, x2) - -inst_38032: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b3fffff; valaddr_reg:x3; val_offset:114096*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114096*FLEN/8, x4, x1, x2) - -inst_38033: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b400000; valaddr_reg:x3; val_offset:114099*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114099*FLEN/8, x4, x1, x2) - -inst_38034: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b600000; valaddr_reg:x3; val_offset:114102*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114102*FLEN/8, x4, x1, x2) - -inst_38035: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b700000; valaddr_reg:x3; val_offset:114105*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114105*FLEN/8, x4, x1, x2) - -inst_38036: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b780000; valaddr_reg:x3; val_offset:114108*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114108*FLEN/8, x4, x1, x2) - -inst_38037: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7c0000; valaddr_reg:x3; val_offset:114111*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114111*FLEN/8, x4, x1, x2) - -inst_38038: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7e0000; valaddr_reg:x3; val_offset:114114*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114114*FLEN/8, x4, x1, x2) - -inst_38039: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7f0000; valaddr_reg:x3; val_offset:114117*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114117*FLEN/8, x4, x1, x2) - -inst_38040: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7f8000; valaddr_reg:x3; val_offset:114120*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114120*FLEN/8, x4, x1, x2) - -inst_38041: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7fc000; valaddr_reg:x3; val_offset:114123*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114123*FLEN/8, x4, x1, x2) - -inst_38042: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7fe000; valaddr_reg:x3; val_offset:114126*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114126*FLEN/8, x4, x1, x2) - -inst_38043: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7ff000; valaddr_reg:x3; val_offset:114129*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114129*FLEN/8, x4, x1, x2) - -inst_38044: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7ff800; valaddr_reg:x3; val_offset:114132*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114132*FLEN/8, x4, x1, x2) - -inst_38045: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:114135*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114135*FLEN/8, x4, x1, x2) - -inst_38046: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:114138*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114138*FLEN/8, x4, x1, x2) - -inst_38047: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7fff00; valaddr_reg:x3; val_offset:114141*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114141*FLEN/8, x4, x1, x2) - -inst_38048: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7fff80; valaddr_reg:x3; val_offset:114144*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114144*FLEN/8, x4, x1, x2) - -inst_38049: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:114147*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114147*FLEN/8, x4, x1, x2) - -inst_38050: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:114150*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114150*FLEN/8, x4, x1, x2) - -inst_38051: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:114153*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114153*FLEN/8, x4, x1, x2) - -inst_38052: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:114156*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114156*FLEN/8, x4, x1, x2) - -inst_38053: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:114159*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114159*FLEN/8, x4, x1, x2) - -inst_38054: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:114162*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114162*FLEN/8, x4, x1, x2) - -inst_38055: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; -op3val:0x8b7fffff; valaddr_reg:x3; val_offset:114165*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114165*FLEN/8, x4, x1, x2) - -inst_38056: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x80000001; valaddr_reg:x3; val_offset:114168*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114168*FLEN/8, x4, x1, x2) - -inst_38057: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x80000003; valaddr_reg:x3; val_offset:114171*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114171*FLEN/8, x4, x1, x2) - -inst_38058: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x80000007; valaddr_reg:x3; val_offset:114174*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114174*FLEN/8, x4, x1, x2) - -inst_38059: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x80199999; valaddr_reg:x3; val_offset:114177*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114177*FLEN/8, x4, x1, x2) - -inst_38060: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x80249249; valaddr_reg:x3; val_offset:114180*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114180*FLEN/8, x4, x1, x2) - -inst_38061: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x80333333; valaddr_reg:x3; val_offset:114183*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114183*FLEN/8, x4, x1, x2) - -inst_38062: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8036db6d; valaddr_reg:x3; val_offset:114186*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114186*FLEN/8, x4, x1, x2) - -inst_38063: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x803bbbbb; valaddr_reg:x3; val_offset:114189*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114189*FLEN/8, x4, x1, x2) - -inst_38064: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x80444444; valaddr_reg:x3; val_offset:114192*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114192*FLEN/8, x4, x1, x2) - -inst_38065: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x804ccccc; valaddr_reg:x3; val_offset:114195*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114195*FLEN/8, x4, x1, x2) - -inst_38066: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x805b6db6; valaddr_reg:x3; val_offset:114198*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114198*FLEN/8, x4, x1, x2) - -inst_38067: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x80666666; valaddr_reg:x3; val_offset:114201*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114201*FLEN/8, x4, x1, x2) - -inst_38068: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x806db6db; valaddr_reg:x3; val_offset:114204*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114204*FLEN/8, x4, x1, x2) - -inst_38069: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x807ffff8; valaddr_reg:x3; val_offset:114207*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114207*FLEN/8, x4, x1, x2) - -inst_38070: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x807ffffc; valaddr_reg:x3; val_offset:114210*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114210*FLEN/8, x4, x1, x2) - -inst_38071: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x807ffffe; valaddr_reg:x3; val_offset:114213*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114213*FLEN/8, x4, x1, x2) - -inst_38072: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84000000; valaddr_reg:x3; val_offset:114216*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114216*FLEN/8, x4, x1, x2) - -inst_38073: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84000001; valaddr_reg:x3; val_offset:114219*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114219*FLEN/8, x4, x1, x2) - -inst_38074: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84000003; valaddr_reg:x3; val_offset:114222*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114222*FLEN/8, x4, x1, x2) - -inst_38075: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84000007; valaddr_reg:x3; val_offset:114225*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114225*FLEN/8, x4, x1, x2) - -inst_38076: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8400000f; valaddr_reg:x3; val_offset:114228*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114228*FLEN/8, x4, x1, x2) - -inst_38077: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8400001f; valaddr_reg:x3; val_offset:114231*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114231*FLEN/8, x4, x1, x2) - -inst_38078: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8400003f; valaddr_reg:x3; val_offset:114234*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114234*FLEN/8, x4, x1, x2) - -inst_38079: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8400007f; valaddr_reg:x3; val_offset:114237*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114237*FLEN/8, x4, x1, x2) - -inst_38080: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x840000ff; valaddr_reg:x3; val_offset:114240*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114240*FLEN/8, x4, x1, x2) - -inst_38081: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x840001ff; valaddr_reg:x3; val_offset:114243*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114243*FLEN/8, x4, x1, x2) - -inst_38082: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x840003ff; valaddr_reg:x3; val_offset:114246*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114246*FLEN/8, x4, x1, x2) - -inst_38083: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x840007ff; valaddr_reg:x3; val_offset:114249*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114249*FLEN/8, x4, x1, x2) - -inst_38084: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84000fff; valaddr_reg:x3; val_offset:114252*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114252*FLEN/8, x4, x1, x2) - -inst_38085: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84001fff; valaddr_reg:x3; val_offset:114255*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114255*FLEN/8, x4, x1, x2) - -inst_38086: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84003fff; valaddr_reg:x3; val_offset:114258*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114258*FLEN/8, x4, x1, x2) - -inst_38087: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84007fff; valaddr_reg:x3; val_offset:114261*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114261*FLEN/8, x4, x1, x2) - -inst_38088: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8400ffff; valaddr_reg:x3; val_offset:114264*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114264*FLEN/8, x4, x1, x2) - -inst_38089: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8401ffff; valaddr_reg:x3; val_offset:114267*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114267*FLEN/8, x4, x1, x2) - -inst_38090: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8403ffff; valaddr_reg:x3; val_offset:114270*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114270*FLEN/8, x4, x1, x2) - -inst_38091: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x8407ffff; valaddr_reg:x3; val_offset:114273*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114273*FLEN/8, x4, x1, x2) - -inst_38092: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x840fffff; valaddr_reg:x3; val_offset:114276*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114276*FLEN/8, x4, x1, x2) - -inst_38093: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x841fffff; valaddr_reg:x3; val_offset:114279*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114279*FLEN/8, x4, x1, x2) - -inst_38094: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x843fffff; valaddr_reg:x3; val_offset:114282*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114282*FLEN/8, x4, x1, x2) - -inst_38095: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84400000; valaddr_reg:x3; val_offset:114285*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114285*FLEN/8, x4, x1, x2) - -inst_38096: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84600000; valaddr_reg:x3; val_offset:114288*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114288*FLEN/8, x4, x1, x2) - -inst_38097: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84700000; valaddr_reg:x3; val_offset:114291*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114291*FLEN/8, x4, x1, x2) - -inst_38098: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x84780000; valaddr_reg:x3; val_offset:114294*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114294*FLEN/8, x4, x1, x2) - -inst_38099: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847c0000; valaddr_reg:x3; val_offset:114297*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114297*FLEN/8, x4, x1, x2) - -inst_38100: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847e0000; valaddr_reg:x3; val_offset:114300*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114300*FLEN/8, x4, x1, x2) - -inst_38101: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847f0000; valaddr_reg:x3; val_offset:114303*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114303*FLEN/8, x4, x1, x2) - -inst_38102: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847f8000; valaddr_reg:x3; val_offset:114306*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114306*FLEN/8, x4, x1, x2) - -inst_38103: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847fc000; valaddr_reg:x3; val_offset:114309*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114309*FLEN/8, x4, x1, x2) - -inst_38104: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847fe000; valaddr_reg:x3; val_offset:114312*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114312*FLEN/8, x4, x1, x2) - -inst_38105: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847ff000; valaddr_reg:x3; val_offset:114315*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114315*FLEN/8, x4, x1, x2) - -inst_38106: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847ff800; valaddr_reg:x3; val_offset:114318*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114318*FLEN/8, x4, x1, x2) - -inst_38107: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847ffc00; valaddr_reg:x3; val_offset:114321*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114321*FLEN/8, x4, x1, x2) - -inst_38108: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847ffe00; valaddr_reg:x3; val_offset:114324*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114324*FLEN/8, x4, x1, x2) - -inst_38109: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847fff00; valaddr_reg:x3; val_offset:114327*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114327*FLEN/8, x4, x1, x2) - -inst_38110: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847fff80; valaddr_reg:x3; val_offset:114330*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114330*FLEN/8, x4, x1, x2) - -inst_38111: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847fffc0; valaddr_reg:x3; val_offset:114333*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114333*FLEN/8, x4, x1, x2) - -inst_38112: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847fffe0; valaddr_reg:x3; val_offset:114336*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114336*FLEN/8, x4, x1, x2) - -inst_38113: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847ffff0; valaddr_reg:x3; val_offset:114339*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114339*FLEN/8, x4, x1, x2) - -inst_38114: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847ffff8; valaddr_reg:x3; val_offset:114342*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114342*FLEN/8, x4, x1, x2) - -inst_38115: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847ffffc; valaddr_reg:x3; val_offset:114345*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114345*FLEN/8, x4, x1, x2) - -inst_38116: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847ffffe; valaddr_reg:x3; val_offset:114348*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114348*FLEN/8, x4, x1, x2) - -inst_38117: -// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; -op3val:0x847fffff; valaddr_reg:x3; val_offset:114351*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114351*FLEN/8, x4, x1, x2) - -inst_38118: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae800000; valaddr_reg:x3; val_offset:114354*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114354*FLEN/8, x4, x1, x2) - -inst_38119: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae800001; valaddr_reg:x3; val_offset:114357*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114357*FLEN/8, x4, x1, x2) - -inst_38120: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae800003; valaddr_reg:x3; val_offset:114360*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114360*FLEN/8, x4, x1, x2) - -inst_38121: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae80000f; valaddr_reg:x3; val_offset:114363*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114363*FLEN/8, x4, x1, x2) - -inst_38122: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae80001f; valaddr_reg:x3; val_offset:114366*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114366*FLEN/8, x4, x1, x2) - -inst_38123: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae80003f; valaddr_reg:x3; val_offset:114369*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114369*FLEN/8, x4, x1, x2) - -inst_38124: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae80007f; valaddr_reg:x3; val_offset:114372*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114372*FLEN/8, x4, x1, x2) - -inst_38125: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae8000ff; valaddr_reg:x3; val_offset:114375*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114375*FLEN/8, x4, x1, x2) - -inst_38126: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae8001ff; valaddr_reg:x3; val_offset:114378*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114378*FLEN/8, x4, x1, x2) - -inst_38127: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae8003ff; valaddr_reg:x3; val_offset:114381*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114381*FLEN/8, x4, x1, x2) - -inst_38128: -// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 -/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; -op3val:0xae8007ff; valaddr_reg:x3; val_offset:114384*FLEN/8; rmval:dyn; -testreg:x2; fcsr_val:0 */ -TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114384*FLEN/8, x4, x1, x2) -#endif - - -RVTEST_CODE_END -RVMODEL_HALT - -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xbabecafe -.word 0xabecafeb -.word 0xbecafeba -.word 0xecafebab -test_dataset_0: -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624192,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2927624195,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624199,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624223,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2927624319,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927626239,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927628287,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927632383,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927640575,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927656959,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927689727,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927755263,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927886335,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2928148479,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2928672767,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2929721343,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2931818495,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2931818496,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2933915648,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2934964224,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2935488512,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2935750656,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2935881728,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2935947264,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2935980032,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2935996416,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936004608,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936008704,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936010752,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936011776,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012288,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012544,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012672,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012736,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012768,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012784,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012792,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012796,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012798,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2936012799,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260864,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260865,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260867,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260871,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260879,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260895,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260927,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260991,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261119,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261375,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261887,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164262911,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164264959,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164269055,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164277247,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164293631,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164326399,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164391935,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164523007,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164785151,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2165309439,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2166358015,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2168455167,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2168455168,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2170552320,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2171600896,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172125184,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172387328,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172518400,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172583936,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172616704,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172633088,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172641280,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172645376,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172647424,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172648448,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172648960,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649216,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649344,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649408,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649440,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649456,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649464,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649468,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649470,32,FLEN) -NAN_BOXED(2053156858,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649471,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868544,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868545,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868547,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868551,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868559,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868575,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868607,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868671,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925868799,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925869055,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925869567,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925870591,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925872639,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925876735,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925884927,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925901311,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925934079,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3925999615,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3926130687,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3926392831,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3926917119,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3927965695,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3930062847,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3930062848,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3932160000,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3933208576,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3933732864,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3933995008,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934126080,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934191616,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934224384,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934240768,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934248960,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934253056,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934255104,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934256128,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934256640,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934256896,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934257024,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934257088,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934257120,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934257136,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934257144,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934257148,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934257150,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(3934257151,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2058694823,32,FLEN) -NAN_BOXED(3291797832,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664640,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664641,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664643,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664647,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664655,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664671,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664703,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664767,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719664895,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719665151,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719665663,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719666687,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719668735,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719672831,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719681023,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719697407,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719730175,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719795711,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1719926783,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1720188927,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1720713215,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1721761791,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1723858943,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1723858944,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1725956096,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1727004672,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1727528960,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1727791104,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1727922176,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1727987712,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728020480,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728036864,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728045056,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728049152,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728051200,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728052224,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728052736,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728052992,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728053120,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728053184,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728053216,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728053232,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728053240,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728053244,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728053246,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(1728053247,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2065620284,32,FLEN) -NAN_BOXED(1137591202,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061841920,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061841921,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061841923,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061841927,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061841935,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061841951,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061841983,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061842047,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061842175,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061842431,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061842943,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061843967,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061846015,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061850111,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061858303,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061874687,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061907455,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3061972991,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3062104063,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3062366207,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3062890495,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3063939071,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3066036223,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3066036224,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3068133376,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3069181952,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3069706240,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3069968384,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070099456,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070164992,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070197760,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070214144,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070222336,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070226432,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070228480,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070229504,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230016,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230272,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230400,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230464,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230496,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230512,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230520,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230524,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230526,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3070230527,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2066137964,32,FLEN) -NAN_BOXED(2210692725,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034368,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034369,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034371,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034375,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034383,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034399,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034431,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034495,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034623,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951034879,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951035391,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951036415,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951038463,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951042559,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951050751,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951067135,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951099903,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951165439,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951296511,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3951558655,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3952082943,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3953131519,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3955228671,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3955228672,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3957325824,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3958374400,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3958898688,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959160832,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959291904,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959357440,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959390208,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959406592,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959414784,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959418880,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959420928,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959421952,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422464,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422720,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422848,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422912,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422944,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422960,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422968,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422972,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422974,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(3959422975,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2076122738,32,FLEN) -NAN_BOXED(3274404884,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125376,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125377,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125379,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125383,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125391,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125407,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125439,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125503,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125631,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233125887,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233126399,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233127423,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233129471,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233133567,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233141759,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233158143,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233190911,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233256447,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233387519,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1233649663,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1234173951,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1235222527,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1237319679,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1237319680,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1239416832,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1240465408,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1240989696,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241251840,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241382912,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241448448,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241481216,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241497600,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241505792,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241509888,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241511936,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241512960,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513472,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513728,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513856,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513920,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513952,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513968,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513976,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513980,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513982,32,FLEN) -NAN_BOXED(2082619246,32,FLEN) -NAN_BOXED(46790259,32,FLEN) -NAN_BOXED(1241513983,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230528,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230529,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230531,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230535,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230543,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230559,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230591,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230655,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070230783,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070231039,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070231551,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070232575,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070234623,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070238719,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070246911,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070263295,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070296063,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070361599,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070492671,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3070754815,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3071279103,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3072327679,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3074424831,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3074424832,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3076521984,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3077570560,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078094848,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078356992,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078488064,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078553600,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078586368,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078602752,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078610944,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078615040,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078617088,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078618112,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078618624,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078618880,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078619008,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078619072,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078619104,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078619120,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078619128,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078619132,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078619134,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3078619135,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2083495061,32,FLEN) -NAN_BOXED(2193266673,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676096,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676097,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676099,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676103,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676111,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676127,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676159,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676223,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676351,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036676607,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036677119,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036678143,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036680191,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036684287,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036692479,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036708863,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036741631,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036807167,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3036938239,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3037200383,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3037724671,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3038773247,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3040870399,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3040870400,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3042967552,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3044016128,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3044540416,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3044802560,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3044933632,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3044999168,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045031936,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045048320,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045056512,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045060608,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045062656,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045063680,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064192,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064448,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064576,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064640,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064672,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064688,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064696,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064700,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064702,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3045064703,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2083847763,32,FLEN) -NAN_BOXED(2192903058,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492416,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492417,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492419,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492423,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492431,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492447,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492479,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492543,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492671,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492927,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226493439,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226494463,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226496511,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226500607,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226508799,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226525183,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226557951,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226623487,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226754559,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(227016703,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(227540991,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(228589567,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(230686719,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(230686720,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(232783872,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(233832448,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234356736,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234618880,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234749952,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234815488,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234848256,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234864640,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234872832,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234876928,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234878976,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880000,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880512,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880768,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880896,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880960,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880992,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881008,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881016,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881020,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881022,32,FLEN) -NAN_BOXED(2084295396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881023,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974720,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974721,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974723,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974727,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974735,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974751,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974783,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974847,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754974975,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754975231,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754975743,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754976767,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754978815,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754982911,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(754991103,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(755007487,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(755040255,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(755105791,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(755236863,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(755499007,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(756023295,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(757071871,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(759169023,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(759169024,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(761266176,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(762314752,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(762839040,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763101184,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763232256,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763297792,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763330560,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763346944,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763355136,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763359232,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763361280,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763362304,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763362816,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363072,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363200,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363264,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363296,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363312,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363320,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363324,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363326,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(763363327,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2085039407,32,FLEN) -NAN_BOXED(44336243,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478592,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478593,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478595,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478599,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478607,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478623,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478655,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478719,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478847,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298479103,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298479615,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298480639,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298482687,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298486783,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298494975,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298511359,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298544127,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298609663,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298740735,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2299002879,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2299527167,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2300575743,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2302672895,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2302672896,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2304770048,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2305818624,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306342912,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306605056,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306736128,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306801664,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306834432,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306850816,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306859008,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306863104,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306865152,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866176,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866688,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866944,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867072,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867136,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867168,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867184,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867192,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867196,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867198,32,FLEN) -NAN_BOXED(2088480287,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867199,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671040,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671041,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671043,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671047,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671055,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671071,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671103,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671167,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671295,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187671551,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187672063,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187673087,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187675135,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187679231,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187687423,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187703807,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187736575,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187802111,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3187933183,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3188195327,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3188719615,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3189768191,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3191865343,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3191865344,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3193962496,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3195011072,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3195535360,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3195797504,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3195928576,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3195994112,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196026880,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196043264,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196051456,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196055552,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196057600,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196058624,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059136,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059392,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059520,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059584,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059616,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059632,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059640,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059644,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059646,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3196059647,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2089170943,32,FLEN) -NAN_BOXED(2188649351,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312768,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312769,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312771,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312775,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312783,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312799,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312831,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312895,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313023,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313279,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313791,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273314815,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273316863,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273320959,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273329151,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273345535,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273378303,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273443839,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273574911,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273837055,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2274361343,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2275409919,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2277507071,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2277507072,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2279604224,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2280652800,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281177088,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281439232,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281570304,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281635840,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281668608,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281684992,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281693184,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281697280,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281699328,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281700352,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281700864,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701120,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701248,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701312,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701344,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701360,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701368,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701372,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701374,32,FLEN) -NAN_BOXED(2091495642,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701375,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105152,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105153,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105155,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105159,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105167,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105183,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105215,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105279,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105407,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837105663,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837106175,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837107199,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837109247,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837113343,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837121535,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837137919,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837170687,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837236223,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837367295,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1837629439,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1838153727,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1839202303,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1841299455,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1841299456,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1843396608,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1844445184,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1844969472,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845231616,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845362688,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845428224,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845460992,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845477376,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845485568,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845489664,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845491712,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845492736,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493248,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493504,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493632,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493696,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493728,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493744,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493752,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493756,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493758,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(1845493759,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2091623400,32,FLEN) -NAN_BOXED(1111419184,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826960896,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826960897,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826960899,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826960903,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826960911,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826960927,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826960959,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826961023,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826961151,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826961407,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826961919,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826962943,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826964991,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826969087,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826977279,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2826993663,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2827026431,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2827091967,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2827223039,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2827485183,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2828009471,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2829058047,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2831155199,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2831155200,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2833252352,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2834300928,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2834825216,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835087360,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835218432,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835283968,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835316736,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835333120,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835341312,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835345408,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835347456,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835348480,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835348992,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349248,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349376,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349440,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349472,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349488,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349496,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349500,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349502,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(2835349503,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2093076670,32,FLEN) -NAN_BOXED(2183729517,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440512,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440513,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440515,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440519,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440527,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440543,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440575,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440639,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440767,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117441023,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117441535,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117442559,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117444607,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117448703,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117456895,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117473279,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117506047,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117571583,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117702655,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117964799,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(118489087,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(119537663,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(121634815,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(121634816,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(123731968,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(124780544,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125304832,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125566976,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125698048,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125763584,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125796352,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125812736,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125820928,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125825024,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125827072,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828096,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828608,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828864,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828992,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829056,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829088,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829104,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829112,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829116,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829118,32,FLEN) -NAN_BOXED(2093447105,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829119,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274688,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274689,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274691,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274695,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274703,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274719,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274751,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274815,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92274943,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92275199,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92275711,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92276735,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92278783,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92282879,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92291071,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92307455,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92340223,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92405759,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92536831,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(92798975,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(93323263,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(94371839,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(96468991,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(96468992,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(98566144,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(99614720,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100139008,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100401152,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100532224,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100597760,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100630528,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100646912,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100655104,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100659200,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100661248,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100662272,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100662784,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663040,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663168,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663232,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663264,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663280,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663288,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663292,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663294,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(100663295,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2093651231,32,FLEN) -NAN_BOXED(35766362,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872256,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872271,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872287,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872319,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872383,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872511,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872767,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155873279,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155874303,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155876351,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155880447,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155888639,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155905023,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155937791,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156003327,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156134399,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156396543,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156920831,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157969407,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160066559,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160066560,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162163712,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163212288,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163736576,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163998720,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164129792,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164195328,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164228096,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164244480,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164252672,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164256768,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164258816,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164259840,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260352,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260608,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260736,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260800,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260832,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260848,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2093911184,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260863,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177526784,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177526785,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177526787,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177526791,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177526799,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177526815,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177526847,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177526911,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177527039,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177527295,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177527807,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177528831,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177530879,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177534975,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177543167,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177559551,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177592319,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177657855,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4177788927,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4178051071,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4178575359,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4179623935,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4181721087,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4181721088,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4183818240,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4184866816,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185391104,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185653248,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185784320,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185849856,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185882624,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185899008,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185907200,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185911296,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185913344,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185914368,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185914880,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915136,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915264,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915328,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915360,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915376,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915384,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915388,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915390,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4185915391,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2094649227,32,FLEN) -NAN_BOXED(3256250698,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051904,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051905,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051907,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051911,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051919,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051935,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051967,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052031,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052159,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052415,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052927,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109053951,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109055999,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109060095,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109068287,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109084671,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109117439,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109182975,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109314047,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109576191,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(110100479,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(111149055,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(113246207,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(113246208,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(115343360,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(116391936,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(116916224,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117178368,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117309440,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117374976,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117407744,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117424128,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117432320,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117436416,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117438464,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117439488,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440000,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440256,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440384,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440448,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440480,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440496,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440504,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440508,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440510,32,FLEN) -NAN_BOXED(2094656192,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440511,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272320,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272321,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272323,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272327,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272335,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272351,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272383,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272447,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272575,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481272831,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481273343,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481274367,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481276415,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481280511,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481288703,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481305087,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481337855,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481403391,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481534463,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3481796607,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3482320895,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3483369471,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3485466623,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3485466624,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3487563776,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3488612352,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489136640,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489398784,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489529856,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489595392,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489628160,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489644544,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489652736,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489656832,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489658880,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489659904,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660416,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660672,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660800,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660864,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660896,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660912,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660920,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660924,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660926,32,FLEN) -NAN_BOXED(2094735597,32,FLEN) -NAN_BOXED(2182449577,32,FLEN) -NAN_BOXED(3489660927,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(63,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(511,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1023,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2047,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4095,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8191,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16383,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32767,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65535,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(131071,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(524287,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1048575,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2097151,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194303,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194304,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6291456,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7340032,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7864320,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8126464,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8257536,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8323072,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8355840,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8372224,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8380416,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8384512,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8386560,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8387584,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388096,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388352,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388480,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388544,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388576,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388592,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388607,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2094843655,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648128,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648129,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648131,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648135,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648143,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648159,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648191,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648255,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648383,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553648639,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553649151,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553650175,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553652223,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553656319,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553664511,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553680895,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553713663,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553779199,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(553910271,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(554172415,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(554696703,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(555745279,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(557842431,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(557842432,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(559939584,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(560988160,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(561512448,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(561774592,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(561905664,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(561971200,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562003968,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562020352,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562028544,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562032640,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562034688,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562035712,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036224,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036480,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036608,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036672,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036704,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036720,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036728,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036732,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036734,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(562036735,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2095933934,32,FLEN) -NAN_BOXED(34211143,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936012800,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936012801,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936012803,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936012807,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936012815,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936012831,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936012863,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936012927,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936013055,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936013311,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936013823,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936014847,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936016895,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936020991,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936029183,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936045567,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936078335,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936143871,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936274943,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2936537087,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2937061375,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2938109951,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2940207103,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2940207104,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2942304256,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2943352832,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2943877120,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944139264,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944270336,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944335872,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944368640,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944385024,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944393216,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944397312,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944399360,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944400384,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944400896,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401152,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401280,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401344,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401376,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401392,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401400,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401404,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401406,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(2944401407,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2096042092,32,FLEN) -NAN_BOXED(2181632347,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326592,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326593,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326595,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326599,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326607,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326623,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326655,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326719,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326847,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201327103,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201327615,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201328639,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201330687,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201334783,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201342975,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201359359,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201392127,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201457663,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201588735,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201850879,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(202375167,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(203423743,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(205520895,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(205520896,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(207618048,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(208666624,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209190912,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209453056,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209584128,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209649664,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209682432,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209698816,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209707008,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209711104,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209713152,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714176,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714688,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714944,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715072,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715136,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715168,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715184,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715192,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715196,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715198,32,FLEN) -NAN_BOXED(2096245692,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715199,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(63,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(511,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1023,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2047,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4095,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8191,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16383,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32767,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65535,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(131071,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(524287,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1048575,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2097151,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194303,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194304,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6291456,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7340032,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7864320,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8126464,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8257536,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8323072,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8355840,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8372224,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8380416,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8384512,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8386560,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8387584,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388096,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388352,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388480,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388544,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388576,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388592,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2096675947,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388607,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252096,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252097,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252099,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252103,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252111,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252127,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252159,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252223,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252351,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085252607,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085253119,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085254143,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085256191,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085260287,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085268479,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085284863,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085317631,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085383167,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085514239,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4085776383,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4086300671,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4087349247,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4089446399,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4089446400,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4091543552,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4092592128,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093116416,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093378560,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093509632,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093575168,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093607936,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093624320,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093632512,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093636608,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093638656,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093639680,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640192,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640448,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640576,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640640,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640672,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640688,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640696,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640700,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640702,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4093640703,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2096701212,32,FLEN) -NAN_BOXED(3255011520,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103808,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103809,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103811,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103815,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103823,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103839,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103871,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103935,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104063,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104319,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104831,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218105855,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218107903,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218111999,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218120191,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218136575,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218169343,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218234879,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218365951,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218628095,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(219152383,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(220200959,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(222298111,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(222298112,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(224395264,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(225443840,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(225968128,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226230272,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226361344,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226426880,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226459648,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226476032,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226484224,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226488320,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226490368,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226491392,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226491904,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492160,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492288,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492352,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492384,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492400,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492408,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492412,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492414,32,FLEN) -NAN_BOXED(2096735398,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492415,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945728,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945729,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945731,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945735,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945743,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945759,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945791,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945855,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279945983,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279946239,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279946751,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279947775,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279949823,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279953919,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279962111,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3279978495,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3280011263,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3280076799,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3280207871,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3280470015,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3280994303,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3282042879,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3284140031,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3284140032,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3286237184,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3287285760,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3287810048,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288072192,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288203264,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288268800,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288301568,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288317952,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288326144,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288330240,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288332288,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288333312,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288333824,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334080,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334208,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334272,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334304,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334320,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334328,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334332,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334334,32,FLEN) -NAN_BOXED(2097279023,32,FLEN) -NAN_BOXED(2180787822,32,FLEN) -NAN_BOXED(3288334335,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758336,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758337,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758339,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758343,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758351,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758367,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758399,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758463,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758591,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758847,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239759359,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239760383,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239762431,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239766527,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239774719,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239791103,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239823871,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239889407,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240020479,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240282623,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240806911,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2241855487,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2243952639,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2243952640,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2246049792,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247098368,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247622656,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247884800,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248015872,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248081408,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248114176,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248130560,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248138752,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248142848,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248144896,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248145920,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146432,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146688,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146816,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146880,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146912,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146928,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146936,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146940,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146942,32,FLEN) -NAN_BOXED(2097750792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146943,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274688,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274689,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274691,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274695,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274703,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274719,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274751,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274815,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274943,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92275199,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92275711,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92276735,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92278783,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92282879,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92291071,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92307455,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92340223,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92405759,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92536831,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92798975,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(93323263,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(94371839,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(96468991,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(96468992,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(98566144,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(99614720,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100139008,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100401152,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100532224,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100597760,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100630528,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100646912,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100655104,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100659200,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100661248,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100662272,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100662784,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663040,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663168,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663232,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663264,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663280,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663288,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663292,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663294,32,FLEN) -NAN_BOXED(2098232368,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663295,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331648,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331649,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331651,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331655,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331663,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331679,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331711,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331775,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331903,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50332159,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50332671,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50333695,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50335743,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50339839,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50348031,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50364415,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50397183,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50462719,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50593791,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50855935,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(51380223,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(52428799,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(54525951,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(54525952,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(56623104,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(57671680,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58195968,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58458112,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58589184,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58654720,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58687488,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58703872,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58712064,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58716160,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58718208,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58719232,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58719744,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720000,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720128,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720192,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720224,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720240,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720248,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720252,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720254,32,FLEN) -NAN_BOXED(2098478680,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720255,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178624,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178625,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178627,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178631,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178639,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178655,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178687,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178751,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961178879,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961179135,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961179647,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961180671,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961182719,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961186815,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961195007,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961211391,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961244159,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961309695,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961440767,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2961702911,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2962227199,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2963275775,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2965372927,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2965372928,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2967470080,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2968518656,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969042944,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969305088,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969436160,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969501696,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969534464,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969550848,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969559040,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969563136,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969565184,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969566208,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969566720,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969566976,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969567104,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969567168,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969567200,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969567216,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969567224,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969567228,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969567230,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(2969567231,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2098800930,32,FLEN) -NAN_BOXED(2178281979,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244352,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244353,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244355,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244359,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244367,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244383,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244415,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244479,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244607,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998244863,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998245375,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998246399,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998248447,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998252543,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998260735,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998277119,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998309887,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998375423,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998506495,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(998768639,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(999292927,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1000341503,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1002438655,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1002438656,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1004535808,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1005584384,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006108672,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006370816,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006501888,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006567424,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006600192,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006616576,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006624768,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006628864,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006630912,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006631936,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632448,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632704,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632832,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632896,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632928,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632944,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632952,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632956,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632958,32,FLEN) -NAN_BOXED(2099942462,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1006632959,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353216,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353231,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353247,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353279,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353343,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353471,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065353727,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065354239,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065355263,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065357311,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065361407,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065369599,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065385983,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065418751,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065484287,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065615359,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1065877503,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1066401791,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1067450367,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1069547519,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1069547520,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1071644672,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1072693248,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073217536,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073479680,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073610752,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073676288,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073709056,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073725440,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073733632,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073737728,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073739776,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073740800,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741312,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741568,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741696,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741760,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741792,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741808,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2101052857,32,FLEN) -NAN_BOXED(28229096,32,FLEN) -NAN_BOXED(1073741823,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855744,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855745,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855747,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855751,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855759,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855775,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855807,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855871,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989855999,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989856255,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989856767,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989857791,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989859839,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989863935,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989872127,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989888511,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989921279,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(989986815,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(990117887,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(990380031,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(990904319,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(991952895,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(994050047,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(994050048,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(996147200,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(997195776,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(997720064,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(997982208,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998113280,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998178816,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998211584,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998227968,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998236160,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998240256,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998242304,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998243328,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998243840,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244096,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244224,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244288,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244320,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244336,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244344,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244348,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244350,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(998244351,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2101061405,32,FLEN) -NAN_BOXED(28221136,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483663,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483679,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483711,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483775,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483903,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484159,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484671,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147485695,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147487743,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147491839,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147500031,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147516415,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147549183,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147614719,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147745791,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148007935,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148532223,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149580799,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677951,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677952,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153775104,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154823680,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155347968,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155610112,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155741184,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155806720,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155839488,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155855872,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155864064,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155868160,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155870208,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871232,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871744,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872000,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872128,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872192,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872224,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872240,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2101075752,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872255,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306368,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306369,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306371,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306375,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306383,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306399,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306431,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306495,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306623,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805306879,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805307391,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805308415,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805310463,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805314559,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805322751,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805339135,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805371903,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805437439,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805568511,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(805830655,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(806354943,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(807403519,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(809500671,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(809500672,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(811597824,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(812646400,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813170688,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813432832,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813563904,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813629440,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813662208,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813678592,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813686784,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813690880,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813692928,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813693952,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694464,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694720,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694848,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694912,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694944,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694960,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694968,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694972,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694974,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(813694975,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2101284386,32,FLEN) -NAN_BOXED(28017336,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658240,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658241,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658243,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658247,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658255,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658271,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658303,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658367,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658495,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658751,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251659263,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251660287,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251662335,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251666431,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251674623,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251691007,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251723775,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251789311,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251920383,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(252182527,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(252706815,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(253755391,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255852543,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255852544,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(257949696,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(258998272,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259522560,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259784704,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259915776,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259981312,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260014080,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260030464,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260038656,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260042752,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260044800,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260045824,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046336,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046592,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046720,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046784,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046816,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046832,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046840,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046844,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046846,32,FLEN) -NAN_BOXED(2101301928,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046847,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292544,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292545,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292547,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292551,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292559,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292575,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292607,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292671,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877292799,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877293055,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877293567,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877294591,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877296639,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877300735,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877308927,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877325311,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877358079,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877423615,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877554687,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2877816831,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2878341119,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2879389695,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2881486847,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2881486848,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2883584000,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2884632576,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885156864,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885419008,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885550080,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885615616,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885648384,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885664768,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885672960,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885677056,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885679104,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885680128,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885680640,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885680896,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885681024,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885681088,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885681120,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885681136,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885681144,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885681148,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885681150,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(2885681151,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2101625404,32,FLEN) -NAN_BOXED(2175202968,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658240,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658241,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658243,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658247,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658255,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658271,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658303,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658367,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658495,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658751,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251659263,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251660287,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251662335,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251666431,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251674623,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251691007,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251723775,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251789311,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251920383,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(252182527,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(252706815,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(253755391,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255852543,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255852544,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(257949696,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(258998272,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259522560,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259784704,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259915776,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259981312,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260014080,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260030464,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260038656,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260042752,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260044800,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260045824,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046336,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046592,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046720,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046784,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046816,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046832,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046840,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046844,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046846,32,FLEN) -NAN_BOXED(2102017662,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046847,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160768,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160769,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160771,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160775,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160783,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160799,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160831,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160895,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161023,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161279,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161791,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176162815,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176164863,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176168959,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176177151,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176193535,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176226303,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176291839,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176422911,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176685055,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(177209343,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(178257919,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(180355071,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(180355072,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(182452224,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(183500800,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184025088,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184287232,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184418304,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184483840,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184516608,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184532992,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184541184,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184545280,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184547328,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184548352,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184548864,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549120,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549248,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549312,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549344,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549360,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549368,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549372,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549374,32,FLEN) -NAN_BOXED(2102123249,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549375,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093696,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093697,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093699,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093703,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093711,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093727,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093759,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093823,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520093951,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520094207,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520094719,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520095743,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520097791,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520101887,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520110079,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520126463,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520159231,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520224767,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520355839,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(520617983,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(521142271,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(522190847,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(524287999,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(524288000,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(526385152,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(527433728,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(527958016,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528220160,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528351232,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528416768,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528449536,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528465920,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528474112,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528478208,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528480256,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528481280,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528481792,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482048,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482176,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482240,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482272,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482288,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482296,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482300,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482302,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(528482303,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2102672089,32,FLEN) -NAN_BOXED(26895884,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031798784,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031798785,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031798787,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031798791,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031798799,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031798815,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031798847,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031798911,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031799039,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031799295,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031799807,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031800831,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031802879,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031806975,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031815167,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031831551,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031864319,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1031929855,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1032060927,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1032323071,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1032847359,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1033895935,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1035993087,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1035993088,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1038090240,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1039138816,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1039663104,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1039925248,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040056320,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040121856,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040154624,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040171008,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040179200,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040183296,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040185344,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040186368,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040186880,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187136,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187264,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187328,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187360,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187376,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187384,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187388,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187390,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1040187391,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2102857118,32,FLEN) -NAN_BOXED(26763040,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497472,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497473,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497475,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497479,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497487,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497503,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497535,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497599,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497727,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497983,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75498495,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75499519,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75501567,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75505663,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75513855,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75530239,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75563007,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75628543,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75759615,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(76021759,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(76546047,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(77594623,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(79691775,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(79691776,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(81788928,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(82837504,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83361792,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83623936,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83755008,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83820544,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83853312,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83869696,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83877888,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83881984,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83884032,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885056,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885568,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885824,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885952,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886016,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886048,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886064,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886072,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886076,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886078,32,FLEN) -NAN_BOXED(2103029974,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886079,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187392,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187393,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187395,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187399,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187407,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187423,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187455,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187519,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187647,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040187903,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040188415,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040189439,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040191487,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040195583,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040203775,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040220159,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040252927,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040318463,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040449535,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1040711679,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1041235967,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1042284543,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1044381695,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1044381696,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1046478848,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1047527424,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048051712,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048313856,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048444928,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048510464,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048543232,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048559616,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048567808,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048571904,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048573952,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048574976,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575488,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575744,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575872,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575936,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575968,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575984,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575992,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575996,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575998,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1048575999,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2103253206,32,FLEN) -NAN_BOXED(26490072,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383552,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383553,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383555,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383559,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383567,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383583,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383615,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383679,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383807,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159384063,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159384575,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159385599,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159387647,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159391743,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159399935,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159416319,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159449087,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159514623,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159645695,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159907839,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(160432127,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(161480703,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(163577855,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(163577856,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(165675008,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(166723584,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167247872,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167510016,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167641088,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167706624,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167739392,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167755776,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167763968,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167768064,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167770112,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771136,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771648,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771904,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772032,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772096,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772128,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772144,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772152,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772156,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772158,32,FLEN) -NAN_BOXED(2103609704,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772159,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415232,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415233,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415235,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415239,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415247,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415263,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415295,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415359,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415487,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872415743,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872416255,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872417279,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872419327,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872423423,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872431615,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872447999,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872480767,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872546303,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872677375,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(872939519,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(873463807,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(874512383,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(876609535,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(876609536,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(878706688,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(879755264,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880279552,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880541696,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880672768,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880738304,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880771072,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880787456,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880795648,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880799744,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880801792,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880802816,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803328,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803584,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803712,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803776,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803808,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803824,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803832,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803836,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803838,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(880803839,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2103660933,32,FLEN) -NAN_BOXED(26224243,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369728,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369729,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369731,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369735,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369743,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369759,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369791,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369855,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369983,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231370239,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231370751,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231371775,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231373823,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231377919,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231386111,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231402495,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231435263,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231500799,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231631871,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231894015,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2232418303,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2233466879,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2235564031,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2235564032,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2237661184,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2238709760,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239234048,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239496192,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239627264,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239692800,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239725568,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239741952,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239750144,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239754240,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239756288,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239757312,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239757824,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758080,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758208,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758272,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758304,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758320,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758328,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758332,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758334,32,FLEN) -NAN_BOXED(2103931253,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758335,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815296,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815297,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815299,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815303,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815311,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815327,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815359,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815423,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815551,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815807,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197816319,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197817343,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197819391,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197823487,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197831679,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197848063,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197880831,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197946367,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198077439,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198339583,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198863871,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2199912447,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2202009599,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2202009600,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2204106752,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205155328,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205679616,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205941760,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206072832,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206138368,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206171136,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206187520,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206195712,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206199808,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206201856,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206202880,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203392,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203648,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203776,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203840,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203872,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203888,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203896,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203900,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203902,32,FLEN) -NAN_BOXED(2104136309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203903,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400064,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400065,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400067,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400071,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400079,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400095,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400127,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400191,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400319,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325400575,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325401087,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325402111,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325404159,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325408255,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325416447,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325432831,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325465599,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325531135,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325662207,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1325924351,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1326448639,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1327497215,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1329594367,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1329594368,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1331691520,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1332740096,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333264384,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333526528,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333657600,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333723136,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333755904,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333772288,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333780480,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333784576,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333786624,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333787648,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788160,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788416,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788544,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788608,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788640,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788656,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788664,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788668,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788670,32,FLEN) -NAN_BOXED(2104683047,32,FLEN) -NAN_BOXED(25617701,32,FLEN) -NAN_BOXED(1333788671,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036736,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036737,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036739,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036743,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036751,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036767,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036799,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036863,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562036991,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562037247,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562037759,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562038783,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562040831,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562044927,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562053119,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562069503,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562102271,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562167807,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562298879,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(562561023,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(563085311,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(564133887,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(566231039,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(566231040,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(568328192,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(569376768,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(569901056,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570163200,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570294272,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570359808,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570392576,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570408960,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570417152,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570421248,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570423296,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570424320,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570424832,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425088,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425216,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425280,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425312,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425328,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425336,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425340,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425342,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(570425343,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2104919511,32,FLEN) -NAN_BOXED(25488310,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924160,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924161,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924163,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924167,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924175,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924191,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924223,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924287,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924415,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924671,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264925183,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264926207,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264928255,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264932351,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264940543,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264956927,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264989695,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265055231,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265186303,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265448447,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265972735,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2267021311,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2269118463,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2269118464,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2271215616,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2272264192,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2272788480,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273050624,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273181696,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273247232,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273280000,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273296384,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273304576,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273308672,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273310720,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273311744,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312256,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312512,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312640,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312704,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312736,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312752,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312760,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312764,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312766,32,FLEN) -NAN_BOXED(2104959273,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312767,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463424,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463425,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463427,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463431,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463439,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463455,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463487,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463551,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463679,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751463935,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751464447,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751465471,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751467519,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751471615,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751479807,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751496191,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751528959,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751594495,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751725567,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2751987711,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2752511999,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2753560575,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2755657727,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2755657728,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2757754880,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2758803456,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759327744,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759589888,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759720960,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759786496,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759819264,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759835648,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759843840,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759847936,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759849984,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759851008,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759851520,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759851776,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759851904,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759851968,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759852000,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759852016,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759852024,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759852028,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759852030,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(2759852031,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2105015099,32,FLEN) -NAN_BOXED(2172920722,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602624,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602625,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602627,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602631,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602639,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602655,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602687,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602751,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912602879,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912603135,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912603647,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912604671,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912606719,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912610815,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912619007,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912635391,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912668159,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912733695,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1912864767,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1913126911,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1913651199,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1914699775,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1916796927,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1916796928,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1918894080,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1919942656,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920466944,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920729088,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920860160,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920925696,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920958464,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920974848,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920983040,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920987136,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920989184,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920990208,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920990720,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920990976,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920991104,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920991168,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920991200,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920991216,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920991224,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920991228,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920991230,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(1920991231,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2105032394,32,FLEN) -NAN_BOXED(1099169692,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815296,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815297,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815299,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815303,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815311,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815327,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815359,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815423,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815551,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815807,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197816319,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197817343,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197819391,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197823487,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197831679,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197848063,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197880831,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197946367,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198077439,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198339583,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198863871,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2199912447,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2202009599,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2202009600,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2204106752,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205155328,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205679616,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205941760,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206072832,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206138368,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206171136,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206187520,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206195712,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206199808,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206201856,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206202880,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203392,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203648,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203776,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203840,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203872,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203888,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203896,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203900,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203902,32,FLEN) -NAN_BOXED(2105573817,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203903,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549376,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549377,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549379,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549383,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549391,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549407,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549439,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549503,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549631,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549887,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184550399,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184551423,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184553471,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184557567,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184565759,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184582143,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184614911,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184680447,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184811519,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(185073663,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(185597951,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(186646527,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(188743679,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(188743680,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(190840832,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(191889408,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192413696,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192675840,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192806912,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192872448,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192905216,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192921600,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192929792,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192933888,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192935936,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192936960,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937472,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937728,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937856,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937920,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937952,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937968,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937976,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937980,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937982,32,FLEN) -NAN_BOXED(2105672456,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937983,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046848,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046849,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046851,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046855,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046863,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046879,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046911,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046975,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047103,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047359,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047871,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260048895,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260050943,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260055039,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260063231,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260079615,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260112383,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260177919,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260308991,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260571135,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(261095423,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143999,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(264241151,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(264241152,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(266338304,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(267386880,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(267911168,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268173312,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268304384,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268369920,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268402688,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268419072,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268427264,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268431360,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268433408,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268434432,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268434944,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435200,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435328,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435392,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435424,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435440,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435448,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435452,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435454,32,FLEN) -NAN_BOXED(2105675117,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435455,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260864,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260865,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260867,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260871,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260879,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260895,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260927,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260991,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261119,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261375,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261887,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164262911,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164264959,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164269055,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164277247,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164293631,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164326399,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164391935,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164523007,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164785151,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2165309439,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2166358015,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2168455167,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2168455168,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2170552320,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2171600896,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172125184,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172387328,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172518400,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172583936,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172616704,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172633088,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172641280,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172645376,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172647424,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172648448,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172648960,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649216,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649344,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649408,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649440,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649456,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649464,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649468,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649470,32,FLEN) -NAN_BOXED(2106276814,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649471,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358272,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358273,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358275,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358279,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358287,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358303,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358335,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358399,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358527,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914358783,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914359295,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914360319,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914362367,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914366463,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914374655,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914391039,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914423807,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914489343,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914620415,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(914882559,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(915406847,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(916455423,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(918552575,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(918552576,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(920649728,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(921698304,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922222592,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922484736,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922615808,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922681344,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922714112,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922730496,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922738688,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922742784,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922744832,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922745856,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746368,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746624,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746752,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746816,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746848,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746864,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746872,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746876,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746878,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(922746879,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2106365897,32,FLEN) -NAN_BOXED(23663087,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483663,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483679,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483711,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483775,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483903,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484159,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484671,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147485695,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147487743,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147491839,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147500031,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147516415,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147549183,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147614719,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147745791,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148007935,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148532223,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149580799,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677951,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677952,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153775104,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154823680,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155347968,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155610112,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155741184,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155806720,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155839488,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155855872,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155864064,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155868160,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155870208,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871232,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871744,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872000,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872128,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872192,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872224,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872240,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2106541052,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872255,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867200,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867201,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867203,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867207,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867215,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867231,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867263,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867327,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867455,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867711,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306868223,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306869247,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306871295,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306875391,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306883583,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306899967,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306932735,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306998271,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307129343,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307391487,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307915775,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2308964351,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2311061503,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2311061504,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2313158656,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314207232,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314731520,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314993664,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315124736,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315190272,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315223040,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315239424,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315247616,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315251712,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315253760,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315254784,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255296,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255552,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255680,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255744,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255776,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255792,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255800,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255804,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255806,32,FLEN) -NAN_BOXED(2106561623,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255807,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495104,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495105,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495107,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495111,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495119,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495135,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495167,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495231,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495359,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464495615,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464496127,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464497151,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464499199,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464503295,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464511487,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464527871,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464560639,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464626175,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3464757247,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3465019391,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3465543679,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3466592255,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3468689407,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3468689408,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3470786560,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3471835136,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472359424,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472621568,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472752640,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472818176,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472850944,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472867328,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472875520,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472879616,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472881664,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472882688,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883200,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883456,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883584,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883648,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883680,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883696,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883704,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883708,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883710,32,FLEN) -NAN_BOXED(2106584906,32,FLEN) -NAN_BOXED(2170792099,32,FLEN) -NAN_BOXED(3472883711,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274688,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274689,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274691,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274695,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274703,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274719,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274751,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274815,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274943,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92275199,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92275711,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92276735,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92278783,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92282879,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92291071,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92307455,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92340223,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92405759,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92536831,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92798975,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(93323263,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(94371839,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(96468991,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(96468992,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(98566144,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(99614720,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100139008,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100401152,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100532224,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100597760,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100630528,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100646912,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100655104,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100659200,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100661248,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100662272,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100662784,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663040,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663168,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663232,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663264,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663280,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663288,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663292,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663294,32,FLEN) -NAN_BOXED(2106697976,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663295,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441084928,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441084929,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441084931,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441084935,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441084943,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441084959,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441084991,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441085055,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441085183,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441085439,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441085951,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441086975,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441089023,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441093119,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441101311,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441117695,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441150463,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441215999,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441347071,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2441609215,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2442133503,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2443182079,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2445279231,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2445279232,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2447376384,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2448424960,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2448949248,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449211392,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449342464,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449408000,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449440768,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449457152,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449465344,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449469440,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449471488,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449472512,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473024,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473280,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473408,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473472,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473504,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473520,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473528,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473532,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473534,32,FLEN) -NAN_BOXED(2107024704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2449473535,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994944,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994945,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994947,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994951,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994959,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994975,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995007,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995071,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995199,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995455,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995967,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150996991,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150999039,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151003135,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151011327,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151027711,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151060479,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151126015,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151257087,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151519231,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(152043519,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(153092095,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(155189247,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(155189248,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(157286400,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(158334976,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(158859264,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159121408,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159252480,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159318016,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159350784,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159367168,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159375360,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159379456,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159381504,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159382528,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383040,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383296,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383424,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383488,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383520,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383536,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383544,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383548,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383550,32,FLEN) -NAN_BOXED(2107093843,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383551,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919104,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919105,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919107,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919111,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919119,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919135,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919167,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919231,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919359,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919615,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415920127,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415921151,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415923199,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415927295,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415935487,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415951871,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415984639,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416050175,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416181247,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416443391,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416967679,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2418016255,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2420113407,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2420113408,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2422210560,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2423259136,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2423783424,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424045568,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424176640,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424242176,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424274944,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424291328,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424299520,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424303616,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424305664,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424306688,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307200,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307456,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307584,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307648,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307680,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307696,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307704,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307708,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307710,32,FLEN) -NAN_BOXED(2107138904,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307711,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051904,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051905,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051907,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051911,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051919,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051935,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051967,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052031,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052159,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052415,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052927,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109053951,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109055999,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109060095,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109068287,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109084671,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109117439,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109182975,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109314047,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109576191,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(110100479,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(111149055,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(113246207,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(113246208,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(115343360,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(116391936,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(116916224,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117178368,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117309440,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117374976,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117407744,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117424128,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117432320,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117436416,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117438464,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117439488,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440000,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440256,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440384,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440448,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440480,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440496,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440504,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440508,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440510,32,FLEN) -NAN_BOXED(2107157965,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440511,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195136,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195137,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195139,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195143,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195151,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195167,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195199,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195263,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195391,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127195647,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127196159,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127197183,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127199231,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127203327,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127211519,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127227903,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127260671,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127326207,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127457279,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4127719423,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4128243711,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4129292287,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4131389439,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4131389440,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4133486592,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4134535168,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135059456,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135321600,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135452672,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135518208,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135550976,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135567360,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135575552,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135579648,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135581696,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135582720,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583232,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583488,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583616,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583680,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583712,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583728,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583736,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583740,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583742,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4135583743,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2107422849,32,FLEN) -NAN_BOXED(3243316693,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198848,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198849,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198851,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198855,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198863,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198879,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198911,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198975,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199103,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199359,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199871,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357200895,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357202943,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357207039,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357215231,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357231615,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357264383,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357329919,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357460991,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357723135,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2358247423,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2359295999,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2361393151,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2361393152,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2363490304,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2364538880,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365063168,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365325312,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365456384,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365521920,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365554688,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365571072,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365579264,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365583360,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365585408,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365586432,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365586944,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587200,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587328,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587392,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587424,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587440,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587448,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587452,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587454,32,FLEN) -NAN_BOXED(2107684368,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587455,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753280,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753281,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753283,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753287,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753295,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753311,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753343,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753407,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753535,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753791,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390754303,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390755327,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390757375,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390761471,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390769663,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390786047,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390818815,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390884351,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391015423,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391277567,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391801855,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2392850431,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2394947583,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2394947584,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2397044736,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398093312,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398617600,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398879744,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399010816,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399076352,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399109120,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399125504,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399133696,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399137792,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399139840,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399140864,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141376,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141632,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141760,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141824,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141856,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141872,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141880,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141884,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141886,32,FLEN) -NAN_BOXED(2107696105,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141887,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606336,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606337,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606339,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606343,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606351,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606367,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606399,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606463,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606591,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606847,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142607359,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142608383,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142610431,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142614527,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142622719,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142639103,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142671871,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142737407,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142868479,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(143130623,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(143654911,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(144703487,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(146800639,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(146800640,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(148897792,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(149946368,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150470656,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150732800,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150863872,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150929408,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150962176,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150978560,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150986752,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150990848,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150992896,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150993920,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994432,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994688,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994816,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994880,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994912,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994928,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994936,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994940,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994942,32,FLEN) -NAN_BOXED(2107751122,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994943,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478592,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478593,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478595,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478599,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478607,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478623,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478655,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478719,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478847,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298479103,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298479615,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298480639,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298482687,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298486783,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298494975,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298511359,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298544127,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298609663,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298740735,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2299002879,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2299527167,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2300575743,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2302672895,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2302672896,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2304770048,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2305818624,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306342912,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306605056,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306736128,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306801664,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306834432,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306850816,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306859008,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306863104,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306865152,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866176,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866688,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866944,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867072,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867136,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867168,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867184,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867192,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867196,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867198,32,FLEN) -NAN_BOXED(2108130121,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867199,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587456,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587457,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587459,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587463,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587471,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587487,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587519,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587583,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587711,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587967,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365588479,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365589503,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365591551,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365595647,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365603839,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365620223,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365652991,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365718527,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365849599,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2366111743,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2366636031,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2367684607,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2369781759,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2369781760,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2371878912,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2372927488,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373451776,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373713920,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373844992,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373910528,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373943296,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373959680,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373967872,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373971968,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373974016,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975040,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975552,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975808,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975936,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976000,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976032,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976048,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976056,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976060,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976062,32,FLEN) -NAN_BOXED(2108571736,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976063,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146944,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146945,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146947,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146951,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146959,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146975,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147007,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147071,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147199,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147455,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147967,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248148991,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248151039,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248155135,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248163327,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248179711,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248212479,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248278015,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248409087,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248671231,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2249195519,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2250244095,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2252341247,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2252341248,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2254438400,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2255486976,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256011264,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256273408,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256404480,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256470016,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256502784,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256519168,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256527360,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256531456,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256533504,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256534528,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535040,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535296,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535424,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535488,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535520,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535536,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535544,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535548,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535550,32,FLEN) -NAN_BOXED(2108729526,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535551,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254779904,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254779905,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254779907,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254779911,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254779919,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254779935,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254779967,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254780031,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254780159,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254780415,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254780927,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254781951,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254783999,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254788095,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254796287,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254812671,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254845439,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3254910975,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3255042047,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3255304191,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3255828479,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3256877055,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3258974207,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3258974208,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3261071360,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3262119936,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3262644224,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3262906368,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263037440,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263102976,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263135744,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263152128,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263160320,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263164416,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263166464,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263167488,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168000,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168256,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168384,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168448,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168480,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168496,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168504,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168508,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168510,32,FLEN) -NAN_BOXED(2108739285,32,FLEN) -NAN_BOXED(2168018110,32,FLEN) -NAN_BOXED(3263168511,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420288,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420289,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420291,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420295,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420303,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420319,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420351,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420415,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420543,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721420799,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721421311,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721422335,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721424383,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721428479,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721436671,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721453055,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721485823,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721551359,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721682431,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(721944575,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(722468863,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(723517439,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(725614591,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(725614592,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(727711744,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(728760320,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729284608,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729546752,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729677824,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729743360,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729776128,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729792512,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729800704,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729804800,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729806848,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729807872,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808384,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808640,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808768,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808832,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808864,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808880,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808888,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808892,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808894,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(729808895,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2108763484,32,FLEN) -NAN_BOXED(20509149,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212836864,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212836879,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212836895,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212836927,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212836991,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212837119,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212837375,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212837887,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212838911,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212840959,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212845055,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212853247,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212869631,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212902399,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3212967935,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3213099007,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3213361151,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3213885439,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3214934015,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3217031167,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3217031168,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3219128320,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3220176896,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3220701184,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3220963328,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221094400,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221159936,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221192704,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221209088,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221217280,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221221376,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221223424,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221224448,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221224960,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225216,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225344,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225408,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225440,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225456,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2108806735,32,FLEN) -NAN_BOXED(2167947818,32,FLEN) -NAN_BOXED(3221225471,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135488,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135489,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135491,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135495,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135503,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135519,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135551,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135615,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135743,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931135999,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931136511,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931137535,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931139583,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931143679,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931151871,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931168255,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931201023,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931266559,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931397631,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(931659775,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(932184063,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(933232639,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(935329791,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(935329792,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(937426944,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(938475520,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(938999808,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939261952,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939393024,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939458560,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939491328,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939507712,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939515904,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939520000,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939522048,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939523072,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939523584,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939523840,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939523968,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939524032,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939524064,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939524080,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939524088,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939524092,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939524094,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(939524095,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2108833586,32,FLEN) -NAN_BOXED(20436414,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959552,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959553,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959555,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959559,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959567,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959583,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959615,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959679,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207959807,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207960063,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207960575,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207961599,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207963647,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207967743,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207975935,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1207992319,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1208025087,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1208090623,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1208221695,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1208483839,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1209008127,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1210056703,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1212153855,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1212153856,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1214251008,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1215299584,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1215823872,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216086016,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216217088,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216282624,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216315392,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216331776,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216339968,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216344064,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216346112,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216347136,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216347648,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216347904,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216348032,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216348096,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216348128,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216348144,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216348152,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216348156,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216348158,32,FLEN) -NAN_BOXED(2108951030,32,FLEN) -NAN_BOXED(20316493,32,FLEN) -NAN_BOXED(1216348159,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969664,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969665,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969667,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969671,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969679,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969695,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969727,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969791,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905969919,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905970175,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905970687,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905971711,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905973759,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905977855,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(905986047,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(906002431,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(906035199,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(906100735,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(906231807,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(906493951,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(907018239,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(908066815,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(910163967,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(910163968,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(912261120,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(913309696,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(913833984,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914096128,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914227200,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914292736,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914325504,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914341888,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914350080,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914354176,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914356224,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914357248,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914357760,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358016,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358144,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358208,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358240,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358256,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358264,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358268,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358270,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(914358271,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2109200940,32,FLEN) -NAN_BOXED(20069094,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068474880,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068474881,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068474883,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068474887,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068474895,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068474911,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068474943,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068475007,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068475135,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068475391,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068475903,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068476927,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068478975,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068483071,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068491263,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068507647,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068540415,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068605951,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068737023,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4068999167,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4069523455,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4070572031,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4072669183,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4072669184,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4074766336,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4075814912,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076339200,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076601344,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076732416,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076797952,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076830720,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076847104,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076855296,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076859392,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076861440,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076862464,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076862976,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863232,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863360,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863424,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863456,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863472,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863480,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863484,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863486,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4076863487,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2109315307,32,FLEN) -NAN_BOXED(3241184738,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167168,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167169,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167171,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167175,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167183,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167199,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167231,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167295,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167423,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644167679,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644168191,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644169215,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644171263,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644175359,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644183551,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644199935,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644232703,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644298239,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644429311,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1644691455,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1645215743,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1646264319,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1648361471,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1648361472,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1650458624,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1651507200,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652031488,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652293632,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652424704,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652490240,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652523008,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652539392,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652547584,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652551680,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652553728,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652554752,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555264,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555520,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555648,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555712,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555744,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555760,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555768,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555772,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555774,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(1652555775,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2109370309,32,FLEN) -NAN_BOXED(1093649004,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881024,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881025,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881027,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881031,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881039,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881055,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881087,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881151,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881279,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881535,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234882047,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234883071,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234885119,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234889215,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234897407,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234913791,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234946559,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235012095,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235143167,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235405311,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235929599,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(236978175,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(239075327,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(239075328,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(241172480,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(242221056,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(242745344,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243007488,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243138560,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243204096,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243236864,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243253248,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243261440,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243265536,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243267584,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243268608,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269120,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269376,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269504,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269568,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269600,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269616,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269624,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269628,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269630,32,FLEN) -NAN_BOXED(2109666842,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269631,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880803840,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880803841,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880803843,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880803847,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880803855,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880803871,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880803903,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880803967,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880804095,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880804351,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880804863,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880805887,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880807935,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880812031,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880820223,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880836607,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880869375,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(880934911,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(881065983,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(881328127,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(881852415,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(882900991,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(884998143,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(884998144,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(887095296,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(888143872,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(888668160,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(888930304,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889061376,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889126912,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889159680,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889176064,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889184256,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889188352,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889190400,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889191424,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889191936,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192192,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192320,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192384,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192416,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192432,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192440,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192444,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192446,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(889192447,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2109678914,32,FLEN) -NAN_BOXED(19623416,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545664,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545665,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545667,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545671,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545679,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545695,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545727,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545791,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954545919,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954546175,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954546687,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954547711,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954549759,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954553855,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954562047,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954578431,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954611199,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954676735,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1954807807,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1955069951,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1955594239,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1956642815,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1958739967,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1958739968,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1960837120,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1961885696,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962409984,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962672128,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962803200,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962868736,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962901504,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962917888,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962926080,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962930176,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962932224,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962933248,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962933760,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934016,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934144,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934208,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934240,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934256,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934264,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934268,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934270,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(1962934271,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2109758667,32,FLEN) -NAN_BOXED(1093294165,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435456,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435457,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435459,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435463,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435471,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435487,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435519,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435583,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435711,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435967,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268436479,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268437503,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268439551,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268443647,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268451839,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268468223,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268500991,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268566527,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268697599,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268959743,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(269484031,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(270532607,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(272629759,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(272629760,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(274726912,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(275775488,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276299776,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276561920,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276692992,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276758528,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276791296,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276807680,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276815872,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276819968,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276822016,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823040,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823552,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823808,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823936,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824000,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824032,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824048,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824056,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824060,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824062,32,FLEN) -NAN_BOXED(2109947222,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824063,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536870912,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536870913,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536870915,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536870919,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536870927,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536870943,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536870975,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536871039,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536871167,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536871423,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536871935,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536872959,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536875007,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536879103,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536887295,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536903679,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(536936447,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(537001983,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(537133055,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(537395199,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(537919487,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(538968063,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(541065215,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(541065216,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(543162368,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(544210944,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(544735232,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(544997376,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545128448,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545193984,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545226752,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545243136,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545251328,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545255424,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545257472,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545258496,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259008,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259264,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259392,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259456,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259488,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259504,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259512,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259516,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259518,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(545259519,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2110260821,32,FLEN) -NAN_BOXED(19124697,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287488,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287489,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287491,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287495,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287503,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287519,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287551,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287615,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287743,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028287999,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028288511,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028289535,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028291583,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028295679,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028303871,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028320255,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028353023,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028418559,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028549631,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3028811775,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3029336063,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3030384639,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3032481791,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3032481792,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3034578944,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3035627520,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036151808,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036413952,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036545024,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036610560,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036643328,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036659712,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036667904,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036672000,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036674048,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036675072,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036675584,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036675840,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036675968,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036676032,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036676064,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036676080,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036676088,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036676092,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036676094,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3036676095,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2110290749,32,FLEN) -NAN_BOXED(2166583891,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820352,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820353,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820355,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820359,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820367,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820383,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820415,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820479,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820607,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046820863,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046821375,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046822399,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046824447,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046828543,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046836735,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046853119,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046885887,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2046951423,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2047082495,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2047344639,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2047868927,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2048917503,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2051014655,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2051014656,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2053111808,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2054160384,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2054684672,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2054946816,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055077888,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055143424,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055176192,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055192576,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055200768,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055204864,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055206912,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055207936,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208448,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208704,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208832,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208896,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208928,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208944,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208952,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208956,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208958,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2055208959,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2110441595,32,FLEN) -NAN_BOXED(1092720481,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717908992,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717908993,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717908995,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717908999,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717909007,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717909023,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717909055,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717909119,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717909247,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717909503,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717910015,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717911039,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717913087,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717917183,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717925375,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717941759,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2717974527,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2718040063,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2718171135,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2718433279,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2718957567,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2720006143,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2722103295,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2722103296,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2724200448,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2725249024,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2725773312,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726035456,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726166528,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726232064,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726264832,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726281216,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726289408,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726293504,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726295552,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726296576,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297088,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297344,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297472,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297536,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297568,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297584,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297592,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297596,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297598,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(2726297599,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2110474211,32,FLEN) -NAN_BOXED(2166436379,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940672,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940673,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940675,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940679,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940687,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940703,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940735,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940799,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430940927,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430941183,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430941695,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430942719,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430944767,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430948863,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430957055,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3430973439,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3431006207,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3431071743,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3431202815,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3431464959,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3431989247,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3433037823,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3435134975,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3435134976,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3437232128,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3438280704,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3438804992,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439067136,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439198208,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439263744,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439296512,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439312896,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439321088,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439325184,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439327232,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439328256,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439328768,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329024,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329152,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329216,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329248,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329264,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329272,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329276,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329278,32,FLEN) -NAN_BOXED(2111089532,32,FLEN) -NAN_BOXED(2165969989,32,FLEN) -NAN_BOXED(3439329279,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497472,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497473,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497475,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497479,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497487,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497503,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497535,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497599,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497727,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497983,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75498495,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75499519,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75501567,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75505663,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75513855,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75530239,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75563007,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75628543,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75759615,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(76021759,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(76546047,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(77594623,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(79691775,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(79691776,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(81788928,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(82837504,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83361792,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83623936,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83755008,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83820544,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83853312,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83869696,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83877888,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83881984,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83884032,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885056,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885568,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885824,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885952,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886016,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886048,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886064,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886072,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886076,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886078,32,FLEN) -NAN_BOXED(2111171749,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886079,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886080,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886081,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886083,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886087,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886095,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886111,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886143,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886207,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886335,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886591,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83887103,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83888127,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83890175,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83894271,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83902463,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83918847,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83951615,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84017151,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84148223,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84410367,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84934655,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(85983231,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(88080383,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(88080384,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(90177536,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(91226112,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(91750400,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92012544,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92143616,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92209152,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92241920,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92258304,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92266496,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92270592,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92272640,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92273664,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274176,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274432,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274560,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274624,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274656,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274672,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274680,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274684,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274686,32,FLEN) -NAN_BOXED(2111219270,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274687,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162112,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162113,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162115,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162119,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162127,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162143,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162175,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162239,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162367,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795162623,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795163135,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795164159,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795166207,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795170303,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795178495,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795194879,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795227647,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795293183,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795424255,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1795686399,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1796210687,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1797259263,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1799356415,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1799356416,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1801453568,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1802502144,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803026432,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803288576,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803419648,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803485184,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803517952,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803534336,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803542528,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803546624,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803548672,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803549696,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550208,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550464,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550592,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550656,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550688,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550704,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550712,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550716,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550718,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(1803550719,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2111434856,32,FLEN) -NAN_BOXED(1091984026,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925504,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925505,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925507,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925511,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925519,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925535,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925567,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925631,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883925759,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883926015,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883926527,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883927551,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883929599,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883933695,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883941887,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883958271,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3883991039,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3884056575,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3884187647,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3884449791,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3884974079,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3886022655,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3888119807,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3888119808,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3890216960,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3891265536,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3891789824,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892051968,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892183040,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892248576,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892281344,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892297728,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892305920,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892310016,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892312064,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892313088,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892313600,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892313856,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892313984,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892314048,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892314080,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892314096,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892314104,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892314108,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892314110,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(3892314111,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2111503312,32,FLEN) -NAN_BOXED(3239420672,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276032,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276033,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276035,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276039,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276047,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276063,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276095,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276159,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276287,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711276543,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711277055,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711278079,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711280127,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711284223,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711292415,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711308799,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711341567,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711407103,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711538175,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1711800319,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1712324607,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1713373183,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1715470335,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1715470336,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1717567488,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1718616064,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719140352,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719402496,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719533568,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719599104,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719631872,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719648256,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719656448,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719660544,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719662592,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719663616,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664128,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664384,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664512,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664576,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664608,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664624,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664632,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664636,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664638,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(1719664639,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2111576157,32,FLEN) -NAN_BOXED(1091887499,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157056,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157057,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157059,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157063,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157071,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157087,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157119,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157183,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157311,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946157567,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946158079,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946159103,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946161151,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946165247,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946173439,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946189823,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946222591,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946288127,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946419199,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1946681343,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1947205631,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1948254207,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1950351359,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1950351360,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1952448512,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1953497088,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954021376,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954283520,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954414592,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954480128,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954512896,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954529280,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954537472,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954541568,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954543616,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954544640,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545152,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545408,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545536,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545600,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545632,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545648,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545656,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545660,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545662,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(1954545663,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2111942141,32,FLEN) -NAN_BOXED(1091646059,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606336,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606337,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606339,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606343,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606351,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606367,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606399,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606463,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606591,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606847,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142607359,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142608383,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142610431,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142614527,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142622719,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142639103,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142671871,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142737407,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142868479,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(143130623,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(143654911,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(144703487,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(146800639,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(146800640,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(148897792,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(149946368,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150470656,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150732800,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150863872,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150929408,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150962176,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150978560,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150986752,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150990848,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150992896,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150993920,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994432,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994688,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994816,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994880,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994912,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994928,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994936,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994940,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994942,32,FLEN) -NAN_BOXED(2111945618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994943,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440512,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440513,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440515,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440519,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440527,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440543,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440575,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440639,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440767,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117441023,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117441535,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117442559,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117444607,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117448703,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117456895,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117473279,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117506047,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117571583,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117702655,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117964799,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(118489087,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(119537663,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(121634815,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(121634816,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(123731968,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(124780544,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125304832,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125566976,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125698048,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125763584,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125796352,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125812736,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125820928,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125825024,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125827072,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828096,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828608,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828864,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828992,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829056,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829088,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829104,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829112,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829116,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829118,32,FLEN) -NAN_BOXED(2112087098,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829119,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046848,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046849,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046851,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046855,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046863,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046879,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046911,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046975,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047103,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047359,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047871,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260048895,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260050943,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260055039,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260063231,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260079615,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260112383,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260177919,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260308991,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260571135,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(261095423,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143999,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(264241151,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(264241152,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(266338304,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(267386880,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(267911168,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268173312,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268304384,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268369920,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268402688,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268419072,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268427264,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268431360,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268433408,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268434432,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268434944,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435200,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435328,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435392,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435424,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435440,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435448,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435452,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435454,32,FLEN) -NAN_BOXED(2112132659,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435455,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259520,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259521,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259523,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259527,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259535,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259551,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259583,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259647,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545259775,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545260031,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545260543,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545261567,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545263615,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545267711,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545275903,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545292287,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545325055,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545390591,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545521663,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(545783807,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(546308095,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(547356671,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(549453823,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(549453824,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(551550976,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(552599552,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553123840,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553385984,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553517056,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553582592,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553615360,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553631744,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553639936,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553644032,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553646080,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553647104,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553647616,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553647872,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553648000,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553648064,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553648096,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553648112,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553648120,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553648124,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553648126,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(553648127,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2112206228,32,FLEN) -NAN_BOXED(17737309,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051904,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051905,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051907,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051911,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051919,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051935,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051967,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052031,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052159,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052415,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052927,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109053951,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109055999,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109060095,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109068287,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109084671,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109117439,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109182975,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109314047,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109576191,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(110100479,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(111149055,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(113246207,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(113246208,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(115343360,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(116391936,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(116916224,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117178368,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117309440,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117374976,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117407744,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117424128,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117432320,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117436416,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117438464,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117439488,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440000,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440256,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440384,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440448,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440480,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440496,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440504,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440508,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440510,32,FLEN) -NAN_BOXED(2112389176,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440511,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331648,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331649,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331651,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331655,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331663,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331679,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331711,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331775,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331903,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50332159,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50332671,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50333695,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50335743,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50339839,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50348031,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50364415,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50397183,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50462719,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50593791,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50855935,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(51380223,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(52428799,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(54525951,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(54525952,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(56623104,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(57671680,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58195968,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58458112,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58589184,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58654720,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58687488,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58703872,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58712064,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58716160,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58718208,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58719232,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58719744,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720000,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720128,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720192,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720224,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720240,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720248,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720252,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720254,32,FLEN) -NAN_BOXED(2112389782,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720255,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234240,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234241,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234243,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234247,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234255,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234271,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234303,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234367,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234495,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300234751,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300235263,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300236287,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300238335,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300242431,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300250623,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300267007,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300299775,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300365311,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300496383,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1300758527,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1301282815,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1302331391,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1304428543,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1304428544,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1306525696,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1307574272,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308098560,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308360704,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308491776,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308557312,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308590080,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308606464,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308614656,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308618752,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308620800,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308621824,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622336,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622592,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622720,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622784,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622816,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622832,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622840,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622844,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622846,32,FLEN) -NAN_BOXED(2112595034,32,FLEN) -NAN_BOXED(17501939,32,FLEN) -NAN_BOXED(1308622847,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168512,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168513,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168515,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168519,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168527,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168543,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168575,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168639,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263168767,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263169023,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263169535,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263170559,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263172607,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263176703,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263184895,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263201279,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263234047,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263299583,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263430655,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3263692799,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3264217087,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3265265663,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3267362815,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3267362816,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3269459968,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3270508544,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271032832,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271294976,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271426048,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271491584,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271524352,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271540736,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271548928,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271553024,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271555072,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271556096,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271556608,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271556864,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271556992,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271557056,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271557088,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271557104,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271557112,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271557116,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271557118,32,FLEN) -NAN_BOXED(2112698452,32,FLEN) -NAN_BOXED(2164924963,32,FLEN) -NAN_BOXED(3271557119,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977408,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977409,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977411,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977415,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977423,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977439,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977471,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977535,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977663,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992977919,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992978431,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992979455,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992981503,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992985599,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3992993791,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3993010175,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3993042943,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3993108479,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3993239551,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3993501695,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3994025983,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3995074559,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3997171711,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3997171712,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(3999268864,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4000317440,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4000841728,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001103872,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001234944,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001300480,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001333248,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001349632,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001357824,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001361920,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001363968,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001364992,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001365504,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001365760,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001365888,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001365952,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001365984,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001366000,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001366008,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001366012,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001366014,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4001366015,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2112877731,32,FLEN) -NAN_BOXED(3238563583,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793728,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793729,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793731,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793735,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793743,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793759,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793791,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793855,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182793983,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182794239,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182794751,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182795775,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182797823,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182801919,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182810111,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182826495,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182859263,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1182924799,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1183055871,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1183318015,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1183842303,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1184890879,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1186988031,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1186988032,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1189085184,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1190133760,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1190658048,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1190920192,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191051264,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191116800,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191149568,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191165952,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191174144,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191178240,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191180288,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191181312,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191181824,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182080,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182208,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182272,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182304,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182320,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182328,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182332,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182334,32,FLEN) -NAN_BOXED(2113077801,32,FLEN) -NAN_BOXED(17225682,32,FLEN) -NAN_BOXED(1191182335,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629248,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629249,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629251,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629255,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629263,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629279,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629311,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629375,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629503,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776629759,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776630271,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776631295,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776633343,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776637439,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776645631,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776662015,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776694783,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776760319,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2776891391,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2777153535,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2777677823,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2778726399,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2780823551,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2780823552,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2782920704,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2783969280,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2784493568,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2784755712,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2784886784,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2784952320,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2784985088,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785001472,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785009664,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785013760,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785015808,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785016832,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017344,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017600,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017728,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017792,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017824,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017840,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017848,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017852,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017854,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(2785017855,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2113266157,32,FLEN) -NAN_BOXED(2164606034,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658240,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658241,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658243,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658247,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658255,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658271,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658303,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658367,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658495,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658751,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251659263,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251660287,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251662335,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251666431,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251674623,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251691007,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251723775,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251789311,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251920383,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(252182527,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(252706815,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(253755391,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255852543,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255852544,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(257949696,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(258998272,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259522560,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259784704,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259915776,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259981312,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260014080,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260030464,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260038656,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260042752,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260044800,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260045824,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046336,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046592,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046720,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046784,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046816,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046832,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046840,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046844,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046846,32,FLEN) -NAN_BOXED(2113327590,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046847,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182336,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182337,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182339,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182343,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182351,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182367,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182399,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182463,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182591,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191182847,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191183359,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191184383,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191186431,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191190527,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191198719,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191215103,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191247871,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191313407,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191444479,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1191706623,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1192230911,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1193279487,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1195376639,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1195376640,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1197473792,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1198522368,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199046656,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199308800,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199439872,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199505408,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199538176,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199554560,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199562752,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199566848,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199568896,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199569920,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570432,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570688,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570816,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570880,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570912,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570928,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570936,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570940,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570942,32,FLEN) -NAN_BOXED(2113454829,32,FLEN) -NAN_BOXED(17021311,32,FLEN) -NAN_BOXED(1199570943,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247040,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247041,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247043,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247047,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247055,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247071,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247103,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247167,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247295,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236247551,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236248063,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236249087,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236251135,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236255231,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236263423,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236279807,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236312575,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236378111,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236509183,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4236771327,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4237295615,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4238344191,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4240441343,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4240441344,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4242538496,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4243587072,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244111360,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244373504,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244504576,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244570112,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244602880,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244619264,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244627456,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244631552,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244633600,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244634624,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635136,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635392,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635520,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635584,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635616,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635632,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635640,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635644,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635646,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4244635647,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2113615960,32,FLEN) -NAN_BOXED(3238162295,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141888,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141889,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141891,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141895,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141903,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141919,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141951,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142015,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142143,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142399,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142911,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399143935,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399145983,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399150079,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399158271,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399174655,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399207423,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399272959,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399404031,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399666175,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2400190463,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2401239039,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2403336191,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2403336192,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2405433344,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2406481920,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407006208,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407268352,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407399424,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407464960,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407497728,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407514112,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407522304,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407526400,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407528448,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407529472,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407529984,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530240,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530368,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530432,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530464,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530480,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530488,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530492,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530494,32,FLEN) -NAN_BOXED(2113640186,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530495,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868903936,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868903937,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868903939,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868903943,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868903951,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868903967,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868903999,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868904063,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868904191,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868904447,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868904959,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868905983,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868908031,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868912127,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868920319,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868936703,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2868969471,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2869035007,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2869166079,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2869428223,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2869952511,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2871001087,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2873098239,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2873098240,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2875195392,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2876243968,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2876768256,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877030400,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877161472,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877227008,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877259776,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877276160,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877284352,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877288448,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877290496,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877291520,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292032,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292288,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292416,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292480,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292512,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292528,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292536,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292540,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292542,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(2877292543,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2113829388,32,FLEN) -NAN_BOXED(2164311076,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369728,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369729,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369731,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369735,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369743,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369759,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369791,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369855,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369983,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231370239,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231370751,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231371775,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231373823,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231377919,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231386111,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231402495,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231435263,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231500799,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231631871,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231894015,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2232418303,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2233466879,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2235564031,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2235564032,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2237661184,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2238709760,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239234048,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239496192,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239627264,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239692800,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239725568,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239741952,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239750144,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239754240,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239756288,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239757312,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239757824,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758080,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758208,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758272,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758304,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758320,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758328,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758332,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758334,32,FLEN) -NAN_BOXED(2113920603,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758335,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529152,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529153,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529155,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529159,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529167,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529183,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529215,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529279,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529407,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788529663,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788530175,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788531199,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788533247,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788537343,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788545535,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788561919,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788594687,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788660223,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(788791295,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(789053439,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(789577727,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(790626303,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(792723455,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(792723456,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(794820608,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(795869184,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796393472,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796655616,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796786688,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796852224,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796884992,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796901376,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796909568,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796913664,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796915712,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796916736,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917248,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917504,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917632,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917696,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917728,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917744,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917752,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917756,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917758,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(796917759,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2114121236,32,FLEN) -NAN_BOXED(16401769,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669332992,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669332993,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669332995,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669332999,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669333007,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669333023,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669333055,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669333119,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669333247,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669333503,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669334015,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669335039,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669337087,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669341183,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669349375,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669365759,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669398527,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669464063,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669595135,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1669857279,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1670381567,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1671430143,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1673527295,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1673527296,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1675624448,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1676673024,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677197312,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677459456,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677590528,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677656064,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677688832,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677705216,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677713408,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677717504,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677719552,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677720576,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721088,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721344,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721472,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721536,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721568,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721584,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721592,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721596,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721598,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(1677721599,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2114494993,32,FLEN) -NAN_BOXED(1089458980,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405774848,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405774849,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405774851,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405774855,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405774863,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405774879,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405774911,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405774975,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405775103,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405775359,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405775871,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405776895,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405778943,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405783039,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405791231,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405807615,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405840383,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3405905919,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3406036991,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3406299135,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3406823423,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3407871999,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3409969151,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3409969152,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3412066304,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3413114880,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3413639168,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3413901312,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414032384,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414097920,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414130688,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414147072,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414155264,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414159360,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414161408,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414162432,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414162944,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163200,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163328,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163392,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163424,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163440,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163448,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163452,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163454,32,FLEN) -NAN_BOXED(2114514152,32,FLEN) -NAN_BOXED(2163167248,32,FLEN) -NAN_BOXED(3414163455,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720256,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720257,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720259,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720263,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720271,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720287,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720319,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720383,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720511,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720767,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58721279,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58722303,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58724351,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58728447,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58736639,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58753023,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58785791,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58851327,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58982399,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(59244543,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(59768831,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(60817407,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(62914559,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(62914560,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65011712,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66060288,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66584576,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66846720,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66977792,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67043328,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67076096,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67092480,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67100672,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67104768,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67106816,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67107840,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108352,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108608,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108736,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108800,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108832,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108848,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108856,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108860,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108862,32,FLEN) -NAN_BOXED(2114579509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108863,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116608,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116609,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116611,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116615,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116623,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116639,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116671,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116735,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154116863,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154117119,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154117631,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154118655,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154120703,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154124799,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154132991,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154149375,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154182143,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154247679,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154378751,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3154640895,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3155165183,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3156213759,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3158310911,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3158310912,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3160408064,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3161456640,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3161980928,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162243072,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162374144,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162439680,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162472448,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162488832,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162497024,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162501120,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162503168,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162504192,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162504704,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162504960,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162505088,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162505152,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162505184,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162505200,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162505208,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162505212,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162505214,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3162505215,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2114712098,32,FLEN) -NAN_BOXED(2162828753,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100096,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100097,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100099,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100103,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100111,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100127,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100159,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100223,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100351,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988100607,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988101119,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988102143,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988104191,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988108287,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988116479,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988132863,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988165631,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988231167,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988362239,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1988624383,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1989148671,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1990197247,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1992294399,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1992294400,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1994391552,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1995440128,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1995964416,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996226560,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996357632,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996423168,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996455936,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996472320,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996480512,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996484608,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996486656,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996487680,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488192,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488448,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488576,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488640,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488672,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488688,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488696,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488700,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488702,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(1996488703,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2114798833,32,FLEN) -NAN_BOXED(1088943169,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192448,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192449,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192451,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192455,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192463,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192479,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192511,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192575,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192703,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889192959,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889193471,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889194495,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889196543,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889200639,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889208831,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889225215,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889257983,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889323519,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889454591,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(889716735,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(890241023,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(891289599,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(893386751,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(893386752,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(895483904,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(896532480,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897056768,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897318912,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897449984,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897515520,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897548288,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897564672,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897572864,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897576960,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897579008,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897580032,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897580544,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897580800,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897580928,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897580992,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897581024,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897581040,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897581048,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897581052,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897581054,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(897581055,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2115029161,32,FLEN) -NAN_BOXED(14832344,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038080,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038081,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038083,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038087,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038095,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038111,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038143,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038207,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038335,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038591,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181039103,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181040127,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181042175,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181046271,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181054463,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181070847,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181103615,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181169151,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181300223,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181562367,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2182086655,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2183135231,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2185232383,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2185232384,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2187329536,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2188378112,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2188902400,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189164544,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189295616,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189361152,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189393920,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189410304,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189418496,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189422592,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189424640,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189425664,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426176,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426432,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426560,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426624,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426656,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426672,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426680,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426684,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426686,32,FLEN) -NAN_BOXED(2115059704,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426687,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919104,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919105,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919107,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919111,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919119,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919135,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919167,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919231,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919359,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919615,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415920127,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415921151,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415923199,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415927295,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415935487,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415951871,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415984639,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416050175,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416181247,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416443391,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416967679,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2418016255,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2420113407,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2420113408,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2422210560,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2423259136,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2423783424,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424045568,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424176640,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424242176,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424274944,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424291328,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424299520,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424303616,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424305664,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424306688,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307200,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307456,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307584,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307648,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307680,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307696,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307704,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307708,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307710,32,FLEN) -NAN_BOXED(2115072985,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307711,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586112,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586113,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586115,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586119,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586127,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586143,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586175,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586239,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586367,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746586623,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746587135,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746588159,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746590207,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746594303,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746602495,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746618879,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746651647,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746717183,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(746848255,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(747110399,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(747634687,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(748683263,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(750780415,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(750780416,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(752877568,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(753926144,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754450432,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754712576,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754843648,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754909184,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754941952,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754958336,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754966528,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754970624,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754972672,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754973696,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974208,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974464,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974592,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974656,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974688,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974704,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974712,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974716,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974718,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(754974719,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2115122688,32,FLEN) -NAN_BOXED(14687570,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173568,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173569,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173571,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173575,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173583,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173599,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173631,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173695,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112173823,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112174079,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112174591,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112175615,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112177663,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112181759,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112189951,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112206335,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112239103,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112304639,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112435711,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3112697855,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3113222143,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3114270719,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3116367871,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3116367872,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3118465024,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3119513600,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120037888,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120300032,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120431104,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120496640,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120529408,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120545792,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120553984,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120558080,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120560128,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120561152,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120561664,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120561920,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120562048,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120562112,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120562144,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120562160,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120562168,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120562172,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120562174,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3120562175,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2115126769,32,FLEN) -NAN_BOXED(2162164965,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592512,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592513,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592515,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592519,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592527,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592543,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592575,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592639,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592767,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214593023,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214593535,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214594559,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214596607,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214600703,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214608895,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214625279,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214658047,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214723583,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214854655,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2215116799,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2215641087,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2216689663,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2218786815,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2218786816,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2220883968,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2221932544,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222456832,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222718976,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222850048,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222915584,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222948352,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222964736,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222972928,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222977024,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222979072,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980096,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980608,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980864,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980992,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981056,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981088,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981104,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981112,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981116,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981118,32,FLEN) -NAN_BOXED(2115157329,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981119,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758336,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758337,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758339,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758343,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758351,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758367,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758399,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758463,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758591,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758847,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239759359,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239760383,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239762431,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239766527,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239774719,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239791103,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239823871,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239889407,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240020479,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240282623,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240806911,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2241855487,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2243952639,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2243952640,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2246049792,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247098368,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247622656,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247884800,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248015872,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248081408,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248114176,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248130560,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248138752,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248142848,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248144896,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248145920,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146432,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146688,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146816,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146880,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146912,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146928,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146936,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146940,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146942,32,FLEN) -NAN_BOXED(2115201516,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146943,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912704,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912705,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912707,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912711,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912719,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912735,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912767,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912831,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947912959,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947913215,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947913727,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947914751,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947916799,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947920895,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947929087,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947945471,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(947978239,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(948043775,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(948174847,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(948436991,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(948961279,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(950009855,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(952107007,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(952107008,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(954204160,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(955252736,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(955777024,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956039168,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956170240,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956235776,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956268544,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956284928,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956293120,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956297216,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956299264,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956300288,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956300800,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301056,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301184,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301248,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301280,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301296,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301304,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301308,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301310,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(956301311,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2115334691,32,FLEN) -NAN_BOXED(14369644,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128950784,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128950785,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128950787,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128950791,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128950799,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128950815,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128950847,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128950911,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128951039,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128951295,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128951807,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128952831,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128954879,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128958975,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128967167,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3128983551,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3129016319,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3129081855,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3129212927,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3129475071,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3129999359,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3131047935,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3133145087,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3133145088,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3135242240,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3136290816,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3136815104,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137077248,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137208320,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137273856,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137306624,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137323008,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137331200,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137335296,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137337344,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137338368,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137338880,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339136,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339264,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339328,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339360,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339376,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339384,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339388,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339390,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3137339391,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2115532263,32,FLEN) -NAN_BOXED(2161569149,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478592,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478593,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478595,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478599,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478607,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478623,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478655,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478719,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478847,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298479103,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298479615,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298480639,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298482687,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298486783,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298494975,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298511359,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298544127,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298609663,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298740735,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2299002879,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2299527167,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2300575743,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2302672895,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2302672896,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2304770048,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2305818624,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306342912,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306605056,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306736128,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306801664,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306834432,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306850816,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306859008,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306863104,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306865152,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866176,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866688,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866944,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867072,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867136,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867168,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867184,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867192,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867196,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867198,32,FLEN) -NAN_BOXED(2115691892,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867199,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331648,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331649,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331651,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331655,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331663,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331679,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331711,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331775,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331903,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50332159,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50332671,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50333695,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50335743,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50339839,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50348031,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50364415,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50397183,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50462719,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50593791,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50855935,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(51380223,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(52428799,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(54525951,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(54525952,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(56623104,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(57671680,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58195968,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58458112,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58589184,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58654720,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58687488,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58703872,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58712064,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58716160,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58718208,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58719232,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58719744,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720000,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720128,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720192,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720224,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720240,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720248,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720252,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720254,32,FLEN) -NAN_BOXED(2115707163,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720255,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157627904,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157627905,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157627907,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157627911,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157627919,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157627935,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157627967,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157628031,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157628159,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157628415,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157628927,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157629951,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157631999,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157636095,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157644287,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157660671,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157693439,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157758975,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1157890047,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1158152191,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1158676479,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1159725055,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1161822207,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1161822208,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1163919360,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1164967936,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1165492224,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1165754368,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1165885440,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1165950976,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1165983744,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166000128,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166008320,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166012416,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166014464,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166015488,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016000,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016256,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016384,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016448,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016480,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016496,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016504,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016508,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016510,32,FLEN) -NAN_BOXED(2115778803,32,FLEN) -NAN_BOXED(13746317,32,FLEN) -NAN_BOXED(1166016511,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917479936,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917479937,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917479939,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917479943,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917479951,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917479967,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917479999,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917480063,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917480191,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917480447,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917480959,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917481983,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917484031,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917488127,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917496319,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917512703,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917545471,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917611007,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3917742079,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3918004223,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3918528511,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3919577087,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3921674239,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3921674240,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3923771392,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3924819968,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925344256,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925606400,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925737472,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925803008,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925835776,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925852160,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925860352,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925864448,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925866496,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925867520,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868032,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868288,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868416,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868480,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868512,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868528,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868536,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868540,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868542,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(3925868543,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2115790139,32,FLEN) -NAN_BOXED(3234956585,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749707776,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749707777,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749707779,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749707783,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749707791,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749707807,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749707839,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749707903,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749708031,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749708287,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749708799,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749709823,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749711871,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749715967,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749724159,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749740543,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749773311,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749838847,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3749969919,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3750232063,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3750756351,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3751804927,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3753902079,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3753902080,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3755999232,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3757047808,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3757572096,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3757834240,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3757965312,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758030848,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758063616,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758080000,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758088192,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758092288,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758094336,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758095360,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758095872,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096128,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096256,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096320,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096352,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096368,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096376,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096380,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096382,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(3758096383,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2115807774,32,FLEN) -NAN_BOXED(3234933000,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103808,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103809,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103811,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103815,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103823,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103839,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103871,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103935,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104063,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104319,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104831,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218105855,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218107903,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218111999,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218120191,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218136575,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218169343,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218234879,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218365951,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218628095,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(219152383,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(220200959,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(222298111,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(222298112,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(224395264,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(225443840,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(225968128,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226230272,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226361344,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226426880,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226459648,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226476032,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226484224,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226488320,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226490368,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226491392,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226491904,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492160,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492288,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492352,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492384,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492400,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492408,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492412,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492414,32,FLEN) -NAN_BOXED(2115832309,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492415,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334336,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334337,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334339,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334343,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334351,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334367,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334399,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334463,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334591,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288334847,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288335359,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288336383,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288338431,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288342527,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288350719,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288367103,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288399871,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288465407,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288596479,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3288858623,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3289382911,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3290431487,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3292528639,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3292528640,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3294625792,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3295674368,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296198656,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296460800,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296591872,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296657408,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296690176,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296706560,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296714752,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296718848,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296720896,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296721920,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722432,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722688,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722816,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722880,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722912,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722928,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722936,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722940,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722942,32,FLEN) -NAN_BOXED(2115895626,32,FLEN) -NAN_BOXED(2161074882,32,FLEN) -NAN_BOXED(3296722943,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845493760,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845493761,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845493763,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845493767,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845493775,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845493791,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845493823,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845493887,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845494015,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845494271,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845494783,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845495807,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845497855,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845501951,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845510143,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845526527,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845559295,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845624831,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1845755903,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1846018047,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1846542335,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1847590911,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1849688063,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1849688064,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1851785216,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1852833792,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853358080,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853620224,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853751296,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853816832,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853849600,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853865984,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853874176,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853878272,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853880320,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853881344,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853881856,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882112,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882240,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882304,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882336,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882352,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882360,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882364,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882366,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(1853882367,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2116015636,32,FLEN) -NAN_BOXED(1087177346,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145600,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145601,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145603,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145607,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145615,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145631,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145663,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145727,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629145855,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629146111,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629146623,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629147647,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629149695,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629153791,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629161983,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629178367,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629211135,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629276671,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629407743,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(629669887,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(630194175,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(631242751,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(633339903,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(633339904,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(635437056,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(636485632,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637009920,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637272064,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637403136,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637468672,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637501440,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637517824,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637526016,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637530112,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637532160,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637533184,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637533696,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637533952,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637534080,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637534144,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637534176,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637534192,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637534200,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637534204,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637534206,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(637534207,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2116372043,32,FLEN) -NAN_BOXED(12993429,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478592,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478593,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478595,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478599,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478607,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478623,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478655,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478719,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478847,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298479103,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298479615,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298480639,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298482687,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298486783,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298494975,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298511359,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298544127,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298609663,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298740735,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2299002879,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2299527167,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2300575743,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2302672895,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2302672896,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2304770048,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2305818624,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306342912,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306605056,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306736128,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306801664,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306834432,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306850816,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306859008,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306863104,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306865152,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866176,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866688,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306866944,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867072,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867136,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867168,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867184,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867192,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867196,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867198,32,FLEN) -NAN_BOXED(2116411205,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867199,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426688,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426689,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426691,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426695,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426703,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426719,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426751,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426815,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426943,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189427199,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189427711,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189428735,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189430783,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189434879,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189443071,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189459455,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189492223,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189557759,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189688831,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189950975,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2190475263,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2191523839,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2193620991,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2193620992,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2195718144,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2196766720,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197291008,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197553152,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197684224,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197749760,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197782528,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197798912,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197807104,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197811200,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197813248,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197814272,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197814784,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815040,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815168,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815232,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815264,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815280,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815288,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815292,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815294,32,FLEN) -NAN_BOXED(2116475336,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815295,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108864,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108865,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108867,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108871,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108879,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108895,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108927,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108991,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109119,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109375,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109887,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67110911,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67112959,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67117055,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67125247,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67141631,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67174399,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67239935,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67371007,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67633151,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(68157439,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(69206015,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(71303167,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(71303168,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(73400320,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(74448896,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(74973184,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75235328,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75366400,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75431936,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75464704,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75481088,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75489280,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75493376,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75495424,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75496448,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75496960,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497216,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497344,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497408,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497440,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497456,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497464,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497468,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497470,32,FLEN) -NAN_BOXED(2116535190,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497471,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108864,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108865,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108867,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108871,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108879,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108895,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108927,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108991,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109119,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109375,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109887,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67110911,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67112959,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67117055,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67125247,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67141631,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67174399,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67239935,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67371007,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67633151,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(68157439,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(69206015,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(71303167,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(71303168,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(73400320,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(74448896,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(74973184,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75235328,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75366400,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75431936,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75464704,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75481088,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75489280,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75493376,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75495424,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75496448,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75496960,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497216,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497344,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497408,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497440,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497456,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497464,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497468,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497470,32,FLEN) -NAN_BOXED(2116551818,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497471,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472192,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472193,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472195,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472199,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472207,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472223,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472255,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472319,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472447,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830472703,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830473215,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830474239,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830476287,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830480383,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830488575,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830504959,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830537727,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830603263,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830734335,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(830996479,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(831520767,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(832569343,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(834666495,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(834666496,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(836763648,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(837812224,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838336512,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838598656,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838729728,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838795264,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838828032,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838844416,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838852608,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838856704,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838858752,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838859776,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860288,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860544,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860672,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860736,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860768,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860784,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860792,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860796,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860798,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(838860799,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2116551841,32,FLEN) -NAN_BOXED(12781264,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203904,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203905,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203907,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203911,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203919,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203935,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203967,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204031,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204159,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204415,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204927,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206205951,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206207999,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206212095,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206220287,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206236671,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206269439,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206334975,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206466047,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206728191,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2207252479,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2208301055,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2210398207,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2210398208,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2212495360,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2213543936,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214068224,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214330368,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214461440,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214526976,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214559744,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214576128,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214584320,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214588416,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214590464,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214591488,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592000,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592256,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592384,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592448,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592480,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592496,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592504,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592508,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592510,32,FLEN) -NAN_BOXED(2116620509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592511,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934272,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934273,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934275,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934279,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934287,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934303,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934335,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934399,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934527,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962934783,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962935295,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962936319,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962938367,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962942463,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962950655,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962967039,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1962999807,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1963065343,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1963196415,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1963458559,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1963982847,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1965031423,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1967128575,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1967128576,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1969225728,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1970274304,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1970798592,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971060736,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971191808,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971257344,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971290112,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971306496,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971314688,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971318784,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971320832,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971321856,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322368,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322624,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322752,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322816,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322848,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322864,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322872,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322876,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322878,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(1971322879,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2116755375,32,FLEN) -NAN_BOXED(1086291123,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785017856,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785017857,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785017859,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785017863,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785017871,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785017887,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785017919,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785017983,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785018111,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785018367,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785018879,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785019903,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785021951,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785026047,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785034239,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785050623,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785083391,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785148927,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785279999,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2785542143,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2786066431,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2787115007,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2789212159,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2789212160,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2791309312,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2792357888,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2792882176,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793144320,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793275392,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793340928,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793373696,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793390080,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793398272,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793402368,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793404416,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793405440,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793405952,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406208,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406336,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406400,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406432,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406448,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406456,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406460,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406462,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(2793406463,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2116769488,32,FLEN) -NAN_BOXED(2160017175,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715200,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715201,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715203,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715207,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715215,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715231,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715263,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715327,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715455,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715711,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209716223,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209717247,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209719295,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209723391,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209731583,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209747967,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209780735,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209846271,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209977343,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(210239487,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(210763775,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(211812351,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(213909503,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(213909504,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(216006656,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217055232,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217579520,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217841664,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217972736,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218038272,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218071040,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218087424,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218095616,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218099712,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218101760,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218102784,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103296,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103552,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103680,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103744,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103776,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103792,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103800,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103804,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103806,32,FLEN) -NAN_BOXED(2116869791,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103807,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110208,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110209,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110211,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110215,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110223,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110239,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110271,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110335,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110463,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686110719,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686111231,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686112255,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686114303,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686118399,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686126591,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686142975,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686175743,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686241279,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686372351,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1686634495,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1687158783,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1688207359,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1690304511,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1690304512,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1692401664,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1693450240,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1693974528,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694236672,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694367744,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694433280,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694466048,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694482432,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694490624,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694494720,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694496768,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694497792,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498304,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498560,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498688,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498752,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498784,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498800,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498808,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498812,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498814,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(1694498815,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2117141727,32,FLEN) -NAN_BOXED(1085873195,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920448,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920449,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920451,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920455,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920463,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920479,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920511,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920575,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920703,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034920959,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034921471,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034922495,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034924543,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034928639,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034936831,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034953215,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4034985983,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4035051519,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4035182591,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4035444735,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4035969023,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4037017599,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4039114751,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4039114752,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4041211904,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4042260480,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4042784768,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043046912,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043177984,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043243520,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043276288,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043292672,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043300864,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043304960,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043307008,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043308032,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043308544,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043308800,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043308928,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043308992,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043309024,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043309040,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043309048,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043309052,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043309054,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4043309055,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2117235806,32,FLEN) -NAN_BOXED(3233259255,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773504,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773505,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773507,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773511,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773519,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773535,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773567,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773631,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786773759,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786774015,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786774527,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786775551,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786777599,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786781695,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786789887,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786806271,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786839039,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1786904575,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1787035647,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1787297791,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1787822079,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1788870655,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1790967807,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1790967808,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1793064960,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1794113536,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1794637824,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1794899968,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795031040,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795096576,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795129344,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795145728,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795153920,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795158016,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795160064,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795161088,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795161600,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795161856,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795161984,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795162048,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795162080,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795162096,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795162104,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795162108,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795162110,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(1795162111,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2117260991,32,FLEN) -NAN_BOXED(1085749748,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701376,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701377,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701379,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701383,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701391,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701407,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701439,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701503,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701631,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701887,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281702399,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281703423,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281705471,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281709567,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281717759,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281734143,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281766911,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281832447,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281963519,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2282225663,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2282749951,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2283798527,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2285895679,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2285895680,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2287992832,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289041408,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289565696,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289827840,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289958912,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290024448,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290057216,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290073600,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290081792,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290085888,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290087936,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290088960,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089472,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089728,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089856,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089920,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089952,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089968,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089976,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089980,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089982,32,FLEN) -NAN_BOXED(2117296625,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089983,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620756992,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620756993,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620756995,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620756999,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620757007,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620757023,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620757055,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620757119,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620757247,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620757503,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620758015,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620759039,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620761087,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620765183,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620773375,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620789759,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620822527,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(620888063,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(621019135,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(621281279,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(621805567,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(622854143,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(624951295,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(624951296,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(627048448,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(628097024,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(628621312,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(628883456,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629014528,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629080064,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629112832,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629129216,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629137408,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629141504,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629143552,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629144576,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145088,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145344,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145472,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145536,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145568,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145584,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145592,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145596,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145598,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(629145599,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2117393797,32,FLEN) -NAN_BOXED(11873385,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711488,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711489,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711491,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711495,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711503,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711519,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711551,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711615,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711743,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979711999,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979712511,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979713535,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979715583,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979719679,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979727871,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979744255,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979777023,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979842559,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1979973631,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1980235775,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1980760063,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1981808639,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1983905791,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1983905792,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1986002944,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1987051520,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1987575808,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1987837952,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1987969024,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988034560,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988067328,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988083712,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988091904,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988096000,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988098048,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988099072,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988099584,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988099840,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988099968,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988100032,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988100064,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988100080,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988100088,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988100092,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988100094,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(1988100095,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2117451954,32,FLEN) -NAN_BOXED(1085557237,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369728,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369729,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369731,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369735,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369743,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369759,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369791,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369855,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369983,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231370239,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231370751,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231371775,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231373823,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231377919,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231386111,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231402495,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231435263,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231500799,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231631871,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231894015,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2232418303,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2233466879,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2235564031,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2235564032,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2237661184,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2238709760,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239234048,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239496192,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239627264,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239692800,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239725568,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239741952,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239750144,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239754240,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239756288,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239757312,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239757824,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758080,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758208,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758272,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758304,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758320,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758328,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758332,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758334,32,FLEN) -NAN_BOXED(2117550540,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758335,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919104,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919105,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919107,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919111,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919119,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919135,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919167,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919231,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919359,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919615,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415920127,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415921151,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415923199,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415927295,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415935487,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415951871,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415984639,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416050175,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416181247,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416443391,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416967679,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2418016255,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2420113407,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2420113408,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2422210560,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2423259136,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2423783424,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424045568,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424176640,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424242176,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424274944,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424291328,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424299520,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424303616,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424305664,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424306688,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307200,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307456,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307584,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307648,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307680,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307696,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307704,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307708,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307710,32,FLEN) -NAN_BOXED(2117567440,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307711,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943040,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943041,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943043,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943047,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943055,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943071,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943103,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943167,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943295,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943551,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41944063,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41945087,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41947135,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41951231,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41959423,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41975807,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42008575,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42074111,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42205183,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42467327,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42991615,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(44040191,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(46137343,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(46137344,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(48234496,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(49283072,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(49807360,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50069504,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50200576,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50266112,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50298880,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50315264,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50323456,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50327552,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50329600,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50330624,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331136,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331392,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331520,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331584,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331616,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331632,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331640,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331644,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331646,32,FLEN) -NAN_BOXED(2117605409,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331647,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426688,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426689,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426691,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426695,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426703,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426719,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426751,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426815,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426943,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189427199,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189427711,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189428735,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189430783,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189434879,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189443071,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189459455,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189492223,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189557759,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189688831,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189950975,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2190475263,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2191523839,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2193620991,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2193620992,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2195718144,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2196766720,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197291008,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197553152,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197684224,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197749760,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197782528,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197798912,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197807104,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197811200,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197813248,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197814272,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197814784,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815040,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815168,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815232,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815264,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815280,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815288,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815292,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815294,32,FLEN) -NAN_BOXED(2117817043,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815295,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759680,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759681,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759683,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759687,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759695,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759711,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759743,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759807,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858759935,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858760191,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858760703,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858761727,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858763775,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858767871,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858776063,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858792447,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858825215,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3858890751,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3859021823,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3859283967,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3859808255,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3860856831,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3862953983,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3862953984,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3865051136,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3866099712,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3866624000,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3866886144,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867017216,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867082752,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867115520,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867131904,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867140096,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867144192,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867146240,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867147264,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867147776,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148032,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148160,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148224,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148256,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148272,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148280,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148284,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148286,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(3867148287,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2118020725,32,FLEN) -NAN_BOXED(3232502407,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540608,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540609,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540611,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540615,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540623,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540639,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540671,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540735,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105540863,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105541119,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105541631,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105542655,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105544703,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105548799,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105556991,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105573375,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105606143,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105671679,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2105802751,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2106064895,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2106589183,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2107637759,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2109734911,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2109734912,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2111832064,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2112880640,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113404928,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113667072,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113798144,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113863680,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113896448,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113912832,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113921024,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113925120,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113927168,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113928192,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113928704,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113928960,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113929088,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113929152,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113929184,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113929200,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113929208,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113929212,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113929214,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2113929215,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2118025800,32,FLEN) -NAN_BOXED(1085014175,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219469824,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219469825,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219469827,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219469831,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219469839,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219469855,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219469887,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219469951,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219470079,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219470335,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219470847,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219471871,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219473919,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219478015,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219486207,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219502591,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219535359,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219600895,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219731967,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4219994111,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4220518399,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4221566975,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4223664127,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4223664128,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4225761280,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4226809856,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227334144,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227596288,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227727360,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227792896,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227825664,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227842048,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227850240,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227854336,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227856384,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227857408,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227857920,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858176,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858304,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858368,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858400,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858416,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858424,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858428,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858430,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4227858431,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2118075555,32,FLEN) -NAN_BOXED(3232453079,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627389952,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627389953,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627389955,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627389959,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627389967,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627389983,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627390015,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627390079,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627390207,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627390463,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627390975,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627391999,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627394047,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627398143,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627406335,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627422719,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627455487,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627521023,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627652095,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1627914239,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1628438527,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1629487103,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1631584255,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1631584256,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1633681408,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1634729984,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635254272,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635516416,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635647488,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635713024,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635745792,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635762176,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635770368,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635774464,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635776512,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635777536,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778048,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778304,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778432,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778496,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778528,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778544,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778552,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778556,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778558,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(1635778559,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2118253673,32,FLEN) -NAN_BOXED(1084812126,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583744,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583745,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583747,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583751,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583759,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583775,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583807,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583871,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135583999,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135584255,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135584767,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135585791,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135587839,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135591935,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135600127,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135616511,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135649279,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135714815,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4135845887,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4136108031,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4136632319,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4137680895,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4139778047,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4139778048,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4141875200,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4142923776,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143448064,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143710208,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143841280,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143906816,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143939584,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143955968,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143964160,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143968256,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143970304,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143971328,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143971840,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972096,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972224,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972288,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972320,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972336,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972344,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972348,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972350,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4143972351,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2118254788,32,FLEN) -NAN_BOXED(3232294803,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255808,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255809,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255811,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255815,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255823,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255839,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255871,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255935,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256063,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256319,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256831,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315257855,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315259903,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315263999,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315272191,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315288575,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315321343,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315386879,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315517951,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315780095,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2316304383,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2317352959,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2319450111,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2319450112,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2321547264,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2322595840,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323120128,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323382272,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323513344,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323578880,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323611648,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323628032,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323636224,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323640320,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323642368,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323643392,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323643904,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644160,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644288,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644352,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644384,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644400,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644408,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644412,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644414,32,FLEN) -NAN_BOXED(2118449652,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644415,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225472,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225473,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225475,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225479,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225487,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225503,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225535,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225599,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225727,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221225983,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221226495,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221227519,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221229567,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221233663,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221241855,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221258239,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221291007,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221356543,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221487615,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3221749759,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3222274047,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3223322623,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3225419775,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3225419776,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3227516928,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3228565504,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229089792,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229351936,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229483008,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229548544,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229581312,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229597696,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229605888,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229609984,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229612032,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229613056,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229613568,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229613824,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229613952,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229614016,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229614048,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229614064,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229614072,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229614076,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229614078,32,FLEN) -NAN_BOXED(2118450110,32,FLEN) -NAN_BOXED(2158385500,32,FLEN) -NAN_BOXED(3229614079,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640704,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640705,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640707,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640711,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640719,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640735,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640767,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640831,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093640959,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093641215,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093641727,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093642751,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093644799,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093648895,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093657087,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093673471,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093706239,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093771775,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4093902847,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4094164991,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4094689279,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4095737855,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4097835007,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4097835008,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4099932160,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4100980736,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4101505024,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4101767168,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4101898240,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4101963776,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4101996544,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102012928,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102021120,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102025216,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102027264,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102028288,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102028800,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029056,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029184,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029248,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029280,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029296,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029304,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029308,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029310,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4102029311,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2118454491,32,FLEN) -NAN_BOXED(3232123625,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829120,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829121,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829123,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829127,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829135,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829151,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829183,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829247,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829375,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829631,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125830143,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125831167,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125833215,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125837311,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125845503,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125861887,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125894655,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125960191,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126091263,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126353407,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126877695,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127926271,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(130023423,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(130023424,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(132120576,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133169152,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133693440,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133955584,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134086656,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134152192,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134184960,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134201344,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134209536,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134213632,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134215680,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134216704,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217216,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217472,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217600,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217664,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217696,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217712,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217720,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217724,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217726,32,FLEN) -NAN_BOXED(2118469897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217727,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716544,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716545,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716547,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716551,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716559,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716575,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716607,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716671,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828716799,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828717055,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828717567,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828718591,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828720639,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828724735,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828732927,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828749311,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828782079,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828847615,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1828978687,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1829240831,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1829765119,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1830813695,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1832910847,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1832910848,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1835008000,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1836056576,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1836580864,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1836843008,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1836974080,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837039616,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837072384,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837088768,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837096960,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837101056,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837103104,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837104128,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837104640,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837104896,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837105024,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837105088,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837105120,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837105136,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837105144,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837105148,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837105150,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(1837105151,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2118537187,32,FLEN) -NAN_BOXED(1084570633,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296722944,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296722945,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296722947,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296722951,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296722959,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296722975,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296723007,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296723071,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296723199,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296723455,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296723967,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296724991,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296727039,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296731135,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296739327,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296755711,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296788479,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296854015,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3296985087,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3297247231,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3297771519,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3298820095,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3300917247,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3300917248,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3303014400,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3304062976,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3304587264,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3304849408,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3304980480,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305046016,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305078784,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305095168,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305103360,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305107456,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305109504,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305110528,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111040,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111296,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111424,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111488,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111520,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111536,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111544,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111548,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111550,32,FLEN) -NAN_BOXED(2118610195,32,FLEN) -NAN_BOXED(2158251967,32,FLEN) -NAN_BOXED(3305111551,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820352,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820353,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820355,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820359,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820367,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820383,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820415,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820479,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820607,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046820863,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046821375,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046822399,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046824447,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046828543,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046836735,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046853119,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046885887,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2046951423,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2047082495,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2047344639,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2047868927,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2048917503,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2051014655,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2051014656,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2053111808,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2054160384,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2054684672,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2054946816,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055077888,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055143424,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055176192,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055192576,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055200768,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055204864,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055206912,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055207936,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208448,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208704,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208832,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208896,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208928,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208944,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208952,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208956,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208958,32,FLEN) -NAN_BOXED(2118629665,32,FLEN) -NAN_BOXED(10752301,32,FLEN) -NAN_BOXED(2055208959,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296256,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296257,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296259,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296263,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296271,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296287,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296319,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296383,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296511,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107296767,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107297279,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107298303,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107300351,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107304447,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107312639,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107329023,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107361791,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107427327,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107558399,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1107820543,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1108344831,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1109393407,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1111490559,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1111490560,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1113587712,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1114636288,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115160576,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115422720,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115553792,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115619328,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115652096,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115668480,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115676672,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115680768,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115682816,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115683840,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684352,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684608,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684736,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684800,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684832,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684848,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684856,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684860,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684862,32,FLEN) -NAN_BOXED(2118633542,32,FLEN) -NAN_BOXED(10749116,32,FLEN) -NAN_BOXED(1115684863,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198848,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198849,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198851,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198855,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198863,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198879,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198911,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198975,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199103,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199359,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199871,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357200895,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357202943,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357207039,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357215231,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357231615,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357264383,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357329919,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357460991,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357723135,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2358247423,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2359295999,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2361393151,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2361393152,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2363490304,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2364538880,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365063168,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365325312,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365456384,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365521920,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365554688,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365571072,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365579264,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365583360,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365585408,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365586432,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365586944,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587200,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587328,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587392,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587424,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587440,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587448,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587452,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587454,32,FLEN) -NAN_BOXED(2118727878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587455,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(63,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(511,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1023,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2047,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4095,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8191,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16383,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32767,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65535,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(131071,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(524287,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1048575,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2097151,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194303,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194304,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6291456,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7340032,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7864320,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8126464,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8257536,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8323072,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8355840,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8372224,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8380416,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8384512,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8386560,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8387584,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388096,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388352,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388480,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388544,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388576,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388592,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2119111134,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388607,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363328,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363329,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363331,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363335,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363343,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363359,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363391,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363455,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363583,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763363839,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763364351,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763365375,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763367423,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763371519,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763379711,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763396095,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763428863,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763494399,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763625471,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(763887615,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(764411903,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(765460479,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(767557631,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(767557632,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(769654784,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(770703360,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771227648,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771489792,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771620864,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771686400,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771719168,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771735552,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771743744,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771747840,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771749888,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771750912,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751424,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751680,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751808,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751872,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751904,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751920,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751928,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751932,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751934,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(771751935,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2119182394,32,FLEN) -NAN_BOXED(10316646,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329280,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329281,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329283,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329287,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329295,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329311,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329343,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329407,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329535,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439329791,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439330303,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439331327,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439333375,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439337471,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439345663,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439362047,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439394815,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439460351,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439591423,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3439853567,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3440377855,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3441426431,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3443523583,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3443523584,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3445620736,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3446669312,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447193600,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447455744,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447586816,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447652352,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447685120,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447701504,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447709696,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447713792,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447715840,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447716864,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717376,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717632,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717760,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717824,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717856,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717872,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717880,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717884,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717886,32,FLEN) -NAN_BOXED(2119199279,32,FLEN) -NAN_BOXED(2157787540,32,FLEN) -NAN_BOXED(3447717887,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700032,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700033,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700035,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700039,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700047,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700063,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700095,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700159,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700287,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662700543,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662701055,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662702079,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662704127,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662708223,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662716415,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662732799,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662765567,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662831103,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(662962175,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(663224319,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(663748607,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(664797183,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(666894335,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(666894336,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(668991488,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(670040064,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(670564352,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(670826496,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(670957568,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671023104,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671055872,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671072256,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671080448,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671084544,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671086592,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671087616,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088128,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088384,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088512,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088576,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088608,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088624,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088632,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088636,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088638,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(671088639,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2119392421,32,FLEN) -NAN_BOXED(10160221,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791650816,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791650817,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791650819,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791650823,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791650831,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791650847,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791650879,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791650943,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791651071,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791651327,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791651839,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791652863,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791654911,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791659007,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791667199,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791683583,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791716351,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791781887,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3791912959,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3792175103,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3792699391,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3793747967,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3795845119,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3795845120,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3797942272,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3798990848,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3799515136,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3799777280,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3799908352,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3799973888,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800006656,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800023040,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800031232,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800035328,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800037376,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800038400,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800038912,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039168,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039296,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039360,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039392,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039408,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039416,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039420,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039422,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(3800039423,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2119480976,32,FLEN) -NAN_BOXED(3231321150,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697664,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697665,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697667,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697671,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697679,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697695,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697727,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697791,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051697919,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051698175,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051698687,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051699711,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051701759,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051705855,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051714047,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051730431,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051763199,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051828735,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4051959807,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4052221951,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4052746239,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4053794815,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4055891967,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4055891968,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4057989120,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4059037696,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4059561984,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4059824128,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4059955200,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060020736,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060053504,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060069888,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060078080,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060082176,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060084224,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060085248,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060085760,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086016,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086144,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086208,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086240,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086256,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086264,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086268,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086270,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4060086271,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2119637917,32,FLEN) -NAN_BOXED(3231208758,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696320,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696321,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696323,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696327,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696335,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696351,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696383,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696447,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696575,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432696831,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432697343,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432698367,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432700415,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432704511,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432712703,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432729087,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432761855,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432827391,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2432958463,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2433220607,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2433744895,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2434793471,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2436890623,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2436890624,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2438987776,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2440036352,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2440560640,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2440822784,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2440953856,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441019392,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441052160,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441068544,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441076736,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441080832,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441082880,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441083904,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084416,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084672,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084800,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084864,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084896,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084912,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084920,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084924,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084926,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(2441084927,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2119677919,32,FLEN) -NAN_BOXED(2157438686,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972352,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972353,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972355,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972359,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972367,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972383,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972415,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972479,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972607,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143972863,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143973375,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143974399,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143976447,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143980543,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4143988735,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4144005119,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4144037887,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4144103423,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4144234495,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4144496639,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4145020927,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4146069503,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4148166655,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4148166656,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4150263808,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4151312384,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4151836672,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152098816,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152229888,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152295424,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152328192,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152344576,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152352768,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152356864,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152358912,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152359936,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360448,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360704,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360832,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360896,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360928,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360944,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360952,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360956,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360958,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4152360959,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2119804420,32,FLEN) -NAN_BOXED(3231092222,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(63,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(511,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1023,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2047,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4095,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8191,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16383,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32767,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65535,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(131071,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(524287,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1048575,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2097151,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194303,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194304,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6291456,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7340032,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7864320,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8126464,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8257536,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8323072,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8355840,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8372224,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8380416,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8384512,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8386560,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8387584,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388096,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388352,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388480,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388544,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388576,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388592,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2120113172,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388607,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981120,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981121,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981123,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981127,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981135,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981151,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981183,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981247,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981375,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981631,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222982143,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222983167,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222985215,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222989311,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222997503,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223013887,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223046655,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223112191,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223243263,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223505407,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2224029695,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2225078271,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2227175423,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2227175424,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2229272576,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2230321152,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2230845440,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231107584,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231238656,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231304192,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231336960,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231353344,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231361536,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231365632,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231367680,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231368704,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369216,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369472,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369600,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369664,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369696,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369712,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369720,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369724,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369726,32,FLEN) -NAN_BOXED(2120119880,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369727,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024256,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024257,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024259,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024263,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024271,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024287,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024319,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024383,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024511,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253024767,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253025279,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253026303,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253028351,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253032447,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253040639,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253057023,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253089791,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253155327,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253286399,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4253548543,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4254072831,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4255121407,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4257218559,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4257218560,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4259315712,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4260364288,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4260888576,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261150720,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261281792,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261347328,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261380096,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261396480,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261404672,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261408768,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261410816,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261411840,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412352,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412608,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412736,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412800,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412832,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412848,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412856,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412860,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412862,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4261412863,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2120121280,32,FLEN) -NAN_BOXED(3230877803,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872256,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872271,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872287,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872319,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872383,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872511,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872767,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155873279,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155874303,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155876351,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155880447,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155888639,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155905023,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155937791,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156003327,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156134399,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156396543,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156920831,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157969407,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160066559,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160066560,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162163712,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163212288,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163736576,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163998720,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164129792,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164195328,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164228096,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164244480,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164252672,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164256768,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164258816,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164259840,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260352,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260608,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260736,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260800,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260832,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260848,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2120127766,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260863,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530496,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530497,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530499,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530503,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530511,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530527,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530559,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530623,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530751,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407531007,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407531519,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407532543,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407534591,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407538687,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407546879,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407563263,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407596031,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407661567,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407792639,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2408054783,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2408579071,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2409627647,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2411724799,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2411724800,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2413821952,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2414870528,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415394816,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415656960,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415788032,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415853568,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415886336,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415902720,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415910912,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415915008,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415917056,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918080,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918592,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918848,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918976,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919040,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919072,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919088,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919096,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919100,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919102,32,FLEN) -NAN_BOXED(2120153369,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919103,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552064,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552065,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552067,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552071,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552079,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552095,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552127,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552191,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552319,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422552575,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422553087,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422554111,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422556159,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422560255,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422568447,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422584831,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422617599,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422683135,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3422814207,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3423076351,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3423600639,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3424649215,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3426746367,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3426746368,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3428843520,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3429892096,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430416384,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430678528,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430809600,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430875136,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430907904,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430924288,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430932480,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430936576,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430938624,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430939648,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940160,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940416,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940544,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940608,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940640,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940656,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940664,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940668,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940670,32,FLEN) -NAN_BOXED(2120188903,32,FLEN) -NAN_BOXED(2157091420,32,FLEN) -NAN_BOXED(3430940671,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607680,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607681,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607683,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607687,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607695,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607711,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607743,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607807,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761607935,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761608191,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761608703,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761609727,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761611775,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761615871,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761624063,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761640447,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761673215,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761738751,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1761869823,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1762131967,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1762656255,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1763704831,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1765801983,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1765801984,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1767899136,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1768947712,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769472000,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769734144,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769865216,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769930752,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769963520,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769979904,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769988096,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769992192,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769994240,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769995264,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769995776,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996032,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996160,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996224,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996256,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996272,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996280,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996284,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996286,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(1769996287,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2120301015,32,FLEN) -NAN_BOXED(1083276620,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096384,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096385,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096387,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096391,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096399,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096415,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096447,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096511,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096639,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758096895,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758097407,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758098431,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758100479,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758104575,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758112767,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758129151,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758161919,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758227455,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758358527,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3758620671,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3759144959,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3760193535,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3762290687,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3762290688,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3764387840,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3765436416,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3765960704,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766222848,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766353920,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766419456,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766452224,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766468608,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766476800,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766480896,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766482944,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766483968,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484480,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484736,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484864,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484928,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484960,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484976,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484984,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484988,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484990,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(3766484991,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2120303466,32,FLEN) -NAN_BOXED(3230758685,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165824,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165825,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165827,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165831,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165839,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165855,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165887,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165951,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166079,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166335,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166847,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25167871,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25169919,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25174015,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25182207,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25198591,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25231359,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25296895,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25427967,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25690111,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(26214399,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(27262975,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(29360127,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(29360128,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31457280,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32505856,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33030144,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33292288,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33423360,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33488896,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33521664,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33538048,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33546240,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33550336,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33552384,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33553408,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33553920,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554176,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554304,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554368,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554400,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554416,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554424,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554428,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554430,32,FLEN) -NAN_BOXED(2120308265,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554431,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659584,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659585,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659587,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659591,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659599,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659615,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659647,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659711,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870659839,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870660095,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870660607,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870661631,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870663679,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870667775,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870675967,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870692351,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870725119,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870790655,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1870921727,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1871183871,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1871708159,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1872756735,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1874853887,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1874853888,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1876951040,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1877999616,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1878523904,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1878786048,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1878917120,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1878982656,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879015424,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879031808,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879040000,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879044096,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879046144,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879047168,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879047680,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879047936,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879048064,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879048128,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879048160,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879048176,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879048184,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879048188,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879048190,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(1879048191,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2120456222,32,FLEN) -NAN_BOXED(1083177404,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763392,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763393,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763395,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763399,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763407,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763423,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763455,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763519,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763647,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088763903,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088764415,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088765439,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088767487,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088771583,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088779775,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088796159,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088828927,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2088894463,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2089025535,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2089287679,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2089811967,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2090860543,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2092957695,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2092957696,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2095054848,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2096103424,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2096627712,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2096889856,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097020928,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097086464,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097119232,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097135616,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097143808,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097147904,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097149952,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097150976,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151488,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151744,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151872,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151936,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151968,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151984,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151992,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151996,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151998,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2097151999,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2120540853,32,FLEN) -NAN_BOXED(1083124169,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959422976,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959422977,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959422979,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959422983,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959422991,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959423007,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959423039,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959423103,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959423231,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959423487,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959423999,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959425023,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959427071,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959431167,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959439359,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959455743,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959488511,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959554047,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959685119,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3959947263,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3960471551,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3961520127,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3963617279,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3963617280,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3965714432,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3966763008,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967287296,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967549440,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967680512,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967746048,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967778816,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967795200,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967803392,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967807488,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967809536,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967810560,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811072,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811328,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811456,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811520,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811552,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811568,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811576,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811580,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811582,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(3967811583,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2120567630,32,FLEN) -NAN_BOXED(3230591098,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055208960,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055208961,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055208963,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055208967,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055208975,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055208991,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055209023,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055209087,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055209215,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055209471,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055209983,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055211007,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055213055,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055217151,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055225343,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055241727,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055274495,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055340031,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055471103,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2055733247,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2056257535,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2057306111,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2059403263,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2059403264,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2061500416,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2062548992,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063073280,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063335424,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063466496,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063532032,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063564800,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063581184,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063589376,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063593472,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063595520,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063596544,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597056,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597312,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597440,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597504,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597536,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597552,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597560,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597564,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597566,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2063597567,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2120609231,32,FLEN) -NAN_BOXED(1083081594,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576000,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576001,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576003,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576007,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576015,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576031,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576063,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576127,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576255,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048576511,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048577023,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048578047,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048580095,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048584191,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048592383,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048608767,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048641535,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048707071,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1048838143,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1049100287,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1049624575,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1050673151,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1052770303,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1052770304,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1054867456,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1055916032,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056440320,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056702464,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056833536,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056899072,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056931840,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056948224,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056956416,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056960512,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056962560,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056963584,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964096,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964352,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964480,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964544,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964576,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964592,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964600,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964604,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964606,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1056964607,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2120693530,32,FLEN) -NAN_BOXED(9287811,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549376,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549377,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549379,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549383,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549391,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549407,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549439,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549503,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549631,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549887,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184550399,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184551423,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184553471,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184557567,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184565759,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184582143,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184614911,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184680447,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184811519,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(185073663,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(185597951,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(186646527,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(188743679,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(188743680,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(190840832,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(191889408,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192413696,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192675840,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192806912,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192872448,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192905216,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192921600,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192929792,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192933888,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192935936,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192936960,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937472,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937728,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937856,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937920,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937952,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937968,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937976,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937980,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937982,32,FLEN) -NAN_BOXED(2120735888,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937983,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339392,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339393,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339395,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339399,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339407,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339423,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339455,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339519,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339647,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137339903,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137340415,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137341439,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137343487,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137347583,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137355775,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137372159,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137404927,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137470463,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137601535,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3137863679,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3138387967,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3139436543,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3141533695,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3141533696,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3143630848,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3144679424,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145203712,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145465856,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145596928,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145662464,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145695232,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145711616,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145719808,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145723904,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145725952,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145726976,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727488,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727744,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727872,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727936,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727968,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727984,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727992,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727996,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727998,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3145727999,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2120761705,32,FLEN) -NAN_BOXED(2156729859,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644416,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644417,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644419,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644423,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644431,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644447,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644479,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644543,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644671,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644927,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323645439,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323646463,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323648511,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323652607,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323660799,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323677183,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323709951,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323775487,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323906559,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2324168703,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2324692991,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2325741567,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2327838719,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2327838720,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2329935872,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2330984448,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331508736,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331770880,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331901952,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331967488,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332000256,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332016640,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332024832,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332028928,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332030976,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032000,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032512,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032768,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032896,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032960,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032992,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033008,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033016,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033020,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033022,32,FLEN) -NAN_BOXED(2120763014,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033023,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198848,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198849,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198851,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198855,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198863,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198879,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198911,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198975,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199103,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199359,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199871,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357200895,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357202943,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357207039,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357215231,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357231615,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357264383,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357329919,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357460991,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357723135,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2358247423,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2359295999,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2361393151,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2361393152,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2363490304,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2364538880,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365063168,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365325312,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365456384,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365521920,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365554688,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365571072,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365579264,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365583360,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365585408,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365586432,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365586944,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587200,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587328,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587392,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587424,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587440,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587448,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587452,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587454,32,FLEN) -NAN_BOXED(2120907442,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587455,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304000,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304001,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304003,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304007,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304015,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304031,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304063,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304127,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304255,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194304511,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194305023,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194306047,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194308095,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194312191,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194320383,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194336767,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194369535,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194435071,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194566143,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4194828287,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4195352575,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4196401151,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4198498303,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4198498304,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4200595456,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4201644032,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202168320,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202430464,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202561536,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202627072,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202659840,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202676224,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202684416,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202688512,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202690560,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202691584,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692096,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692352,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692480,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692544,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692576,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692592,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692600,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692604,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692606,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4202692607,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2120922156,32,FLEN) -NAN_BOXED(3230375231,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929379840,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929379841,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929379843,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929379847,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929379855,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929379871,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929379903,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929379967,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929380095,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929380351,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929380863,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929381887,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929383935,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929388031,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929396223,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929412607,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929445375,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929510911,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929641983,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1929904127,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1930428415,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1931476991,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1933574143,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1933574144,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1935671296,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1936719872,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937244160,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937506304,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937637376,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937702912,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937735680,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937752064,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937760256,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937764352,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937766400,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937767424,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937767936,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768192,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768320,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768384,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768416,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768432,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768440,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768444,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768446,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(1937768447,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2121030801,32,FLEN) -NAN_BOXED(1082827409,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297600,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297601,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297603,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297607,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297615,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297631,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297663,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297727,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726297855,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726298111,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726298623,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726299647,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726301695,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726305791,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726313983,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726330367,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726363135,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726428671,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726559743,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2726821887,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2727346175,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2728394751,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2730491903,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2730491904,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2732589056,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2733637632,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734161920,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734424064,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734555136,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734620672,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734653440,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734669824,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734678016,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734682112,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734684160,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734685184,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734685696,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734685952,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734686080,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734686144,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734686176,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734686192,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734686200,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734686204,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734686206,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(2734686207,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2121158396,32,FLEN) -NAN_BOXED(2156495006,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111552,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111553,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111555,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111559,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111567,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111583,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111615,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111679,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305111807,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305112063,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305112575,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305113599,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305115647,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305119743,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305127935,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305144319,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305177087,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305242623,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305373695,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3305635839,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3306160127,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3307208703,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3309305855,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3309305856,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3311403008,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3312451584,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3312975872,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313238016,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313369088,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313434624,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313467392,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313483776,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313491968,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313496064,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313498112,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313499136,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313499648,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313499904,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313500032,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313500096,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313500128,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313500144,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313500152,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313500156,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313500158,32,FLEN) -NAN_BOXED(2121380642,32,FLEN) -NAN_BOXED(2156368570,32,FLEN) -NAN_BOXED(3313500159,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326592,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326593,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326595,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326599,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326607,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326623,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326655,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326719,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326847,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201327103,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201327615,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201328639,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201330687,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201334783,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201342975,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201359359,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201392127,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201457663,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201588735,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201850879,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(202375167,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(203423743,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(205520895,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(205520896,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(207618048,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(208666624,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209190912,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209453056,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209584128,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209649664,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209682432,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209698816,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209707008,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209711104,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209713152,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714176,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714688,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714944,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715072,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715136,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715168,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715184,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715192,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715196,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715198,32,FLEN) -NAN_BOXED(2121455308,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715199,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312768,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312769,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312771,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312775,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312783,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312799,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312831,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312895,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313023,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313279,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313791,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273314815,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273316863,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273320959,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273329151,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273345535,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273378303,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273443839,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273574911,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273837055,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2274361343,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2275409919,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2277507071,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2277507072,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2279604224,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2280652800,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281177088,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281439232,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281570304,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281635840,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281668608,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281684992,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281693184,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281697280,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281699328,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281700352,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281700864,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701120,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701248,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701312,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701344,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701360,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701368,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701372,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701374,32,FLEN) -NAN_BOXED(2121649483,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701375,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319168,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319169,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319171,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319175,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319183,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319199,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319231,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319295,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319423,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741319679,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741320191,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741321215,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741323263,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741327359,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741335551,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741351935,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741384703,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741450239,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741581311,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3741843455,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3742367743,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3743416319,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3745513471,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3745513472,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3747610624,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3748659200,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749183488,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749445632,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749576704,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749642240,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749675008,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749691392,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749699584,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749703680,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749705728,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749706752,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707264,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707520,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707648,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707712,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707744,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707760,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707768,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707772,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707774,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(3749707775,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2121680507,32,FLEN) -NAN_BOXED(3229945320,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777216,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777217,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777219,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777223,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777231,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777247,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777279,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777343,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777471,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777727,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16778239,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16779263,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16781311,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16785407,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16793599,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16809983,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16842751,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16908287,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17039359,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17301503,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17825791,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(18874367,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(20971519,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(20971520,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(23068672,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24117248,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24641536,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24903680,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25034752,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25100288,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25133056,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25149440,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25157632,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25161728,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25163776,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25164800,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165312,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165568,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165696,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165760,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165792,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165808,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165816,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165820,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165822,32,FLEN) -NAN_BOXED(2121770566,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165823,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031680,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031681,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031683,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031687,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031695,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031711,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031743,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031807,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713031935,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713032191,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713032703,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713033727,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713035775,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713039871,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713048063,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713064447,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713097215,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713162751,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713293823,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(713555967,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(714080255,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(715128831,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(717225983,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(717225984,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(719323136,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(720371712,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(720896000,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721158144,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721289216,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721354752,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721387520,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721403904,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721412096,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721416192,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721418240,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721419264,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721419776,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420032,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420160,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420224,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420256,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420272,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420280,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420284,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420286,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(721420287,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2121864411,32,FLEN) -NAN_BOXED(8621611,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001344,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001345,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001347,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001351,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001359,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001375,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001407,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001471,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001599,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619001855,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619002367,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619003391,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619005439,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619009535,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619017727,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619034111,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619066879,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619132415,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619263487,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1619525631,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1620049919,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1621098495,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1623195647,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1623195648,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1625292800,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1626341376,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1626865664,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627127808,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627258880,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627324416,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627357184,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627373568,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627381760,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627385856,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627387904,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627388928,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389440,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389696,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389824,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389888,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389920,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389936,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389944,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389948,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389950,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(1627389951,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2121873183,32,FLEN) -NAN_BOXED(1082358804,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815296,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815297,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815299,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815303,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815311,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815327,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815359,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815423,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815551,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815807,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197816319,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197817343,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197819391,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197823487,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197831679,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197848063,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197880831,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197946367,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198077439,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198339583,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198863871,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2199912447,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2202009599,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2202009600,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2204106752,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205155328,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205679616,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205941760,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206072832,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206138368,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206171136,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206187520,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206195712,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206199808,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206201856,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206202880,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203392,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203648,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203776,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203840,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203872,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203888,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203896,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203900,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203902,32,FLEN) -NAN_BOXED(2121908678,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203903,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401408,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401409,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401411,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401415,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401423,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401439,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401471,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401535,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401663,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944401919,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944402431,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944403455,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944405503,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944409599,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944417791,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944434175,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944466943,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944532479,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944663551,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2944925695,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2945449983,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2946498559,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2948595711,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2948595712,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2950692864,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2951741440,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952265728,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952527872,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952658944,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952724480,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952757248,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952773632,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952781824,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952785920,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952787968,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952788992,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952789504,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952789760,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952789888,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952789952,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952789984,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952790000,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952790008,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952790012,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952790014,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(2952790015,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2121945901,32,FLEN) -NAN_BOXED(2156062433,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825408,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825409,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825411,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825415,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825423,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825439,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825471,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825535,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825663,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895825919,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895826431,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895827455,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895829503,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895833599,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895841791,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895858175,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895890943,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1895956479,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1896087551,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1896349695,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1896873983,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1897922559,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1900019711,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1900019712,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1902116864,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1903165440,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1903689728,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1903951872,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904082944,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904148480,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904181248,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904197632,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904205824,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904209920,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904211968,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904212992,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904213504,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904213760,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904213888,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904213952,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904213984,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904214000,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904214008,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904214012,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904214014,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(1904214015,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2121998257,32,FLEN) -NAN_BOXED(1082293317,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274688,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274689,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274691,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274695,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274703,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274719,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274751,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274815,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274943,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92275199,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92275711,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92276735,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92278783,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92282879,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92291071,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92307455,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92340223,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92405759,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92536831,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92798975,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(93323263,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(94371839,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(96468991,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(96468992,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(98566144,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(99614720,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100139008,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100401152,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100532224,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100597760,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100630528,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100646912,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100655104,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100659200,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100661248,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100662272,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100662784,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663040,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663168,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663232,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663264,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663280,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663288,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663292,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663294,32,FLEN) -NAN_BOXED(2122075596,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663295,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160768,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160769,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160771,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160775,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160783,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160799,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160831,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160895,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161023,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161279,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161791,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176162815,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176164863,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176168959,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176177151,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176193535,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176226303,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176291839,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176422911,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176685055,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(177209343,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(178257919,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(180355071,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(180355072,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(182452224,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(183500800,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184025088,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184287232,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184418304,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184483840,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184516608,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184532992,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184541184,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184545280,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184547328,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184548352,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184548864,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549120,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549248,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549312,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549344,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549360,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549368,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549372,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549374,32,FLEN) -NAN_BOXED(2122159977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549375,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269632,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269633,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269635,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269639,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269647,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269663,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269695,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269759,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269887,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243270143,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243270655,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243271679,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243273727,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243277823,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243286015,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243302399,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243335167,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243400703,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243531775,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243793919,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(244318207,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(245366783,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(247463935,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(247463936,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(249561088,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(250609664,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251133952,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251396096,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251527168,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251592704,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251625472,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251641856,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251650048,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251654144,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251656192,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657216,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657728,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657984,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658112,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658176,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658208,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658224,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658232,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658236,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658238,32,FLEN) -NAN_BOXED(2122179966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658239,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421632,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421633,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421635,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421639,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421647,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421663,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421695,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421759,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421887,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340422143,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340422655,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340423679,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340425727,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340429823,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340438015,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340454399,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340487167,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340552703,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340683775,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340945919,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2341470207,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2342518783,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2344615935,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2344615936,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2346713088,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2347761664,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348285952,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348548096,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348679168,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348744704,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348777472,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348793856,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348802048,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348806144,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348808192,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809216,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809728,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809984,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810112,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810176,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810208,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810224,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810232,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810236,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810238,32,FLEN) -NAN_BOXED(2122285232,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810239,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882368,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882369,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882371,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882375,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882383,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882399,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882431,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882495,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882623,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853882879,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853883391,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853884415,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853886463,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853890559,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853898751,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853915135,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1853947903,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1854013439,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1854144511,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1854406655,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1854930943,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1855979519,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1858076671,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1858076672,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1860173824,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1861222400,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1861746688,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862008832,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862139904,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862205440,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862238208,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862254592,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862262784,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862266880,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862268928,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862269952,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270464,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270720,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270848,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270912,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270944,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270960,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270968,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270972,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270974,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(1862270975,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2122360097,32,FLEN) -NAN_BOXED(1082046307,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197504,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197505,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197507,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197511,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197519,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197535,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197567,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197631,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738197759,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738198015,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738198527,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738199551,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738201599,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738205695,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738213887,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738230271,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738263039,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738328575,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738459647,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(738721791,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(739246079,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(740294655,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(742391807,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(742391808,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(744488960,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(745537536,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746061824,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746323968,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746455040,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746520576,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746553344,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746569728,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746577920,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746582016,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746584064,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746585088,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746585600,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746585856,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746585984,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746586048,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746586080,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746586096,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746586104,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746586108,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746586110,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(746586111,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2122366573,32,FLEN) -NAN_BOXED(8340140,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447717888,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447717889,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447717891,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447717895,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447717903,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447717919,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447717951,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447718015,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447718143,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447718399,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447718911,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447719935,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447721983,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447726079,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447734271,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447750655,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447783423,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447848959,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3447980031,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3448242175,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3448766463,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3449815039,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3451912191,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3451912192,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3454009344,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3455057920,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3455582208,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3455844352,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3455975424,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456040960,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456073728,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456090112,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456098304,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456102400,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456104448,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456105472,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456105984,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106240,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106368,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106432,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106464,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106480,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106488,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106492,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106494,32,FLEN) -NAN_BOXED(2122422959,32,FLEN) -NAN_BOXED(2155768421,32,FLEN) -NAN_BOXED(3456106495,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492416,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492417,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492419,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492423,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492431,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492447,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492479,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492543,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492671,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492927,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226493439,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226494463,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226496511,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226500607,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226508799,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226525183,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226557951,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226623487,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226754559,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(227016703,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(227540991,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(228589567,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(230686719,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(230686720,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(232783872,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(233832448,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234356736,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234618880,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234749952,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234815488,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234848256,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234864640,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234872832,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234876928,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234878976,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880000,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880512,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880768,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880896,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880960,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880992,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881008,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881016,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881020,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881022,32,FLEN) -NAN_BOXED(2122431876,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881023,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692608,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692609,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692611,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692615,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692623,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692639,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692671,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692735,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202692863,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202693119,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202693631,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202694655,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202696703,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202700799,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202708991,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202725375,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202758143,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202823679,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4202954751,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4203216895,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4203741183,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4204789759,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4206886911,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4206886912,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4208984064,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4210032640,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4210556928,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4210819072,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4210950144,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211015680,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211048448,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211064832,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211073024,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211077120,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211079168,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211080192,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211080704,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211080960,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211081088,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211081152,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211081184,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211081200,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211081208,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211081212,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211081214,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4211081215,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2122482837,32,FLEN) -NAN_BOXED(3229290418,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497472,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497473,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497475,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497479,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497487,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497503,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497535,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497599,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497727,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497983,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75498495,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75499519,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75501567,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75505663,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75513855,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75530239,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75563007,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75628543,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75759615,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(76021759,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(76546047,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(77594623,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(79691775,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(79691776,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(81788928,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(82837504,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83361792,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83623936,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83755008,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83820544,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83853312,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83869696,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83877888,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83881984,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83884032,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885056,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885568,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885824,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885952,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886016,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886048,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886064,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886072,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886076,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886078,32,FLEN) -NAN_BOXED(2122491140,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886079,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994944,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994945,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994947,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994951,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994959,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994975,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995007,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995071,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995199,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995455,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995967,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150996991,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150999039,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151003135,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151011327,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151027711,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151060479,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151126015,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151257087,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151519231,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(152043519,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(153092095,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(155189247,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(155189248,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(157286400,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(158334976,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(158859264,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159121408,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159252480,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159318016,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159350784,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159367168,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159375360,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159379456,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159381504,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159382528,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383040,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383296,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383424,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383488,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383520,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383536,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383544,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383548,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383550,32,FLEN) -NAN_BOXED(2122577491,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383551,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944384,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944385,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944387,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944391,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944399,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944415,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944447,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944511,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944639,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660944895,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660945407,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660946431,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660948479,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660952575,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660960767,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1660977151,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1661009919,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1661075455,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1661206527,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1661468671,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1661992959,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1663041535,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1665138687,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1665138688,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1667235840,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1668284416,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1668808704,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669070848,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669201920,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669267456,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669300224,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669316608,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669324800,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669328896,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669330944,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669331968,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332480,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332736,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332864,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332928,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332960,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332976,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332984,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332988,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332990,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(1669332991,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2122622626,32,FLEN) -NAN_BOXED(1081542199,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383552,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383553,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383555,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383559,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383567,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383583,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383615,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383679,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383807,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159384063,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159384575,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159385599,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159387647,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159391743,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159399935,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159416319,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159449087,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159514623,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159645695,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159907839,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(160432127,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(161480703,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(163577855,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(163577856,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(165675008,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(166723584,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167247872,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167510016,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167641088,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167706624,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167739392,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167755776,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167763968,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167768064,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167770112,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771136,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771648,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771904,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772032,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772096,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772128,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772144,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772152,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772156,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772158,32,FLEN) -NAN_BOXED(2122653400,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772159,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778560,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778561,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778563,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778567,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778575,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778591,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778623,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778687,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635778815,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635779071,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635779583,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635780607,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635782655,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635786751,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635794943,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635811327,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635844095,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1635909631,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1636040703,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1636302847,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1636827135,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1637875711,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1639972863,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1639972864,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1642070016,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1643118592,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1643642880,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1643905024,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644036096,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644101632,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644134400,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644150784,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644158976,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644163072,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644165120,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644166144,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644166656,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644166912,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644167040,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644167104,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644167136,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644167152,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644167160,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644167164,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644167166,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(1644167167,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2122800244,32,FLEN) -NAN_BOXED(1081218059,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937984,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937985,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937987,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937991,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937999,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938015,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938047,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938111,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938239,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938495,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192939007,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192940031,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192942079,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192946175,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192954367,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192970751,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193003519,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193069055,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193200127,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193462271,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193986559,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(195035135,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(197132287,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(197132288,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(199229440,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(200278016,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(200802304,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201064448,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201195520,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201261056,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201293824,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201310208,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201318400,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201322496,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201324544,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201325568,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326080,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326336,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326464,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326528,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326560,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326576,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326584,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326588,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326590,32,FLEN) -NAN_BOXED(2122832665,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326591,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152000,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152001,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152003,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152007,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152015,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152031,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152063,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152127,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152255,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097152511,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097153023,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097154047,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097156095,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097160191,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097168383,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097184767,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097217535,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097283071,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097414143,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2097676287,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2098200575,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2099249151,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2101346303,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2101346304,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2103443456,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2104492032,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105016320,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105278464,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105409536,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105475072,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105507840,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105524224,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105532416,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105536512,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105538560,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105539584,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540096,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540352,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540480,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540544,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540576,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540592,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540600,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540604,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540606,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2105540607,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2122852113,32,FLEN) -NAN_BOXED(1081125836,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643072,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643073,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643075,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643079,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643087,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643103,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643135,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643199,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643327,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704643583,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704644095,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704645119,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704647167,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704651263,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704659455,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704675839,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704708607,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704774143,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(704905215,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(705167359,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(705691647,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(706740223,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(708837375,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(708837376,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(710934528,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(711983104,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(712507392,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(712769536,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(712900608,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(712966144,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(712998912,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713015296,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713023488,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713027584,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713029632,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713030656,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031168,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031424,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031552,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031616,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031648,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031664,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031672,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031676,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031678,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(713031679,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2122922664,32,FLEN) -NAN_BOXED(7824445,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331648,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331649,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331651,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331655,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331663,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331679,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331711,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331775,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331903,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50332159,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50332671,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50333695,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50335743,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50339839,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50348031,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50364415,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50397183,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50462719,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50593791,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50855935,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(51380223,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(52428799,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(54525951,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(54525952,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(56623104,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(57671680,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58195968,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58458112,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58589184,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58654720,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58687488,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58703872,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58712064,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58716160,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58718208,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58719232,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58719744,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720000,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720128,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720192,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720224,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720240,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720248,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720252,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720254,32,FLEN) -NAN_BOXED(2122939823,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720255,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976064,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976065,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976067,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976071,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976079,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976095,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976127,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976191,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976319,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976575,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373977087,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373978111,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373980159,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373984255,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373992447,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374008831,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374041599,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374107135,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374238207,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374500351,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2375024639,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2376073215,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2378170367,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2378170368,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2380267520,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2381316096,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2381840384,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382102528,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382233600,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382299136,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382331904,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382348288,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382356480,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382360576,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382362624,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382363648,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364160,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364416,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364544,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364608,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364640,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364656,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364664,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364668,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364670,32,FLEN) -NAN_BOXED(2123030236,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364671,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694498816,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694498817,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694498819,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694498823,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694498831,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694498847,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694498879,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694498943,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694499071,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694499327,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694499839,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694500863,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694502911,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694507007,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694515199,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694531583,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694564351,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694629887,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1694760959,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1695023103,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1695547391,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1696595967,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1698693119,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1698693120,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1700790272,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1701838848,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702363136,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702625280,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702756352,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702821888,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702854656,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702871040,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702879232,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702883328,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702885376,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702886400,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702886912,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887168,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887296,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887360,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887392,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887408,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887416,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887420,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887422,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(1702887423,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2123134936,32,FLEN) -NAN_BOXED(1080641262,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500160,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500161,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500163,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500167,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500175,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500191,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500223,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500287,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500415,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313500671,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313501183,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313502207,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313504255,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313508351,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313516543,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313532927,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313565695,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313631231,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3313762303,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3314024447,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3314548735,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3315597311,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3317694463,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3317694464,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3319791616,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3320840192,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321364480,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321626624,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321757696,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321823232,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321856000,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321872384,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321880576,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321884672,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321886720,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321887744,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888256,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888512,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888640,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888704,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888736,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888752,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888760,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888764,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888766,32,FLEN) -NAN_BOXED(2123162400,32,FLEN) -NAN_BOXED(2155104934,32,FLEN) -NAN_BOXED(3321888767,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106496,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106497,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106499,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106503,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106511,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106527,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106559,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106623,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456106751,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456107007,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456107519,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456108543,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456110591,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456114687,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456122879,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456139263,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456172031,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456237567,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456368639,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3456630783,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3457155071,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3458203647,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3460300799,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3460300800,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3462397952,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3463446528,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3463970816,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464232960,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464364032,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464429568,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464462336,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464478720,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464486912,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464491008,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464493056,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464494080,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464494592,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464494848,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464494976,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464495040,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464495072,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464495088,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464495096,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464495100,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464495102,32,FLEN) -NAN_BOXED(2123170143,32,FLEN) -NAN_BOXED(2155098548,32,FLEN) -NAN_BOXED(3464495103,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140544,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140545,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140547,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140551,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140559,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140575,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140607,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140671,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780140799,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780141055,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780141567,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780142591,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780144639,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780148735,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780156927,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780173311,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780206079,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780271615,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780402687,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(780664831,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(781189119,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(782237695,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(784334847,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(784334848,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(786432000,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(787480576,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788004864,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788267008,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788398080,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788463616,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788496384,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788512768,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788520960,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788525056,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788527104,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788528128,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788528640,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788528896,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788529024,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788529088,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788529120,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788529136,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788529144,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788529148,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788529150,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(788529151,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2123292416,32,FLEN) -NAN_BOXED(7515458,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488704,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488705,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488707,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488711,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488719,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488735,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488767,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488831,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996488959,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996489215,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996489727,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996490751,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996492799,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996496895,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996505087,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996521471,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996554239,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996619775,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1996750847,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1997012991,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1997537279,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(1998585855,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2000683007,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2000683008,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2002780160,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2003828736,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004353024,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004615168,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004746240,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004811776,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004844544,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004860928,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004869120,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004873216,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004875264,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004876288,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004876800,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877056,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877184,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877248,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877280,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877296,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877304,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877308,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877310,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2004877311,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2123302526,32,FLEN) -NAN_BOXED(1080367919,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492416,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492417,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492419,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492423,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492431,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492447,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492479,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492543,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492671,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492927,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226493439,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226494463,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226496511,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226500607,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226508799,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226525183,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226557951,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226623487,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226754559,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(227016703,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(227540991,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(228589567,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(230686719,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(230686720,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(232783872,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(233832448,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234356736,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234618880,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234749952,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234815488,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234848256,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234864640,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234872832,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234876928,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234878976,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880000,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880512,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880768,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880896,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880960,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880992,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881008,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881016,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881020,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881022,32,FLEN) -NAN_BOXED(2123380778,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881023,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163456,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163457,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163459,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163463,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163471,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163487,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163519,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163583,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163711,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414163967,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414164479,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414165503,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414167551,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414171647,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414179839,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414196223,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414228991,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414294527,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414425599,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3414687743,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3415212031,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3416260607,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3418357759,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3418357760,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3420454912,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3421503488,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422027776,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422289920,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422420992,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422486528,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422519296,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422535680,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422543872,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422547968,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422550016,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422551040,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422551552,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422551808,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422551936,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422552000,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422552032,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422552048,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422552056,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422552060,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422552062,32,FLEN) -NAN_BOXED(2123380968,32,FLEN) -NAN_BOXED(2154928695,32,FLEN) -NAN_BOXED(3422552063,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768448,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768449,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768451,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768455,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768463,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768479,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768511,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768575,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768703,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937768959,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937769471,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937770495,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937772543,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937776639,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937784831,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937801215,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937833983,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1937899519,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1938030591,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1938292735,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1938817023,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1939865599,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1941962751,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1941962752,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1944059904,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1945108480,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1945632768,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1945894912,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946025984,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946091520,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946124288,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946140672,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946148864,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946152960,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946155008,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946156032,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946156544,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946156800,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946156928,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946156992,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946157024,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946157040,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946157048,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946157052,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946157054,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(1946157055,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2123406386,32,FLEN) -NAN_BOXED(1080203374,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438144,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438145,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438147,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438151,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438159,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438175,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438207,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438271,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438399,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506438655,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506439167,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506440191,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506442239,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506446335,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506454527,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506470911,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506503679,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506569215,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506700287,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3506962431,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3507486719,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3508535295,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3510632447,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3510632448,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3512729600,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3513778176,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514302464,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514564608,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514695680,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514761216,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514793984,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514810368,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514818560,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514822656,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514824704,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514825728,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826240,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826496,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826624,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826688,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826720,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826736,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826744,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826748,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826750,32,FLEN) -NAN_BOXED(2123548412,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(3514826751,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772160,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772161,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772163,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772167,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772175,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772191,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772223,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772287,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772415,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772671,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167773183,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167774207,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167776255,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167780351,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167788543,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167804927,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167837695,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167903231,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168034303,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168296447,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168820735,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(169869311,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(171966463,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(171966464,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(174063616,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175112192,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175636480,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175898624,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176029696,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176095232,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176128000,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176144384,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176152576,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176156672,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176158720,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176159744,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160256,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160512,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160640,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160704,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160736,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160752,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160760,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160764,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160766,32,FLEN) -NAN_BOXED(2123578146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160767,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753280,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753281,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753283,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753287,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753295,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753311,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753343,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753407,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753535,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753791,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390754303,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390755327,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390757375,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390761471,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390769663,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390786047,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390818815,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390884351,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391015423,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391277567,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391801855,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2392850431,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2394947583,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2394947584,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2397044736,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398093312,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398617600,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398879744,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399010816,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399076352,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399109120,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399125504,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399133696,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399137792,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399139840,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399140864,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141376,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141632,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141760,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141824,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141856,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141872,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141880,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141884,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141886,32,FLEN) -NAN_BOXED(2123584824,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141887,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364672,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364673,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364675,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364679,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364687,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364703,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364735,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364799,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364927,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382365183,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382365695,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382366719,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382368767,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382372863,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382381055,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382397439,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382430207,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382495743,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382626815,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382888959,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2383413247,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2384461823,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2386558975,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2386558976,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2388656128,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2389704704,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390228992,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390491136,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390622208,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390687744,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390720512,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390736896,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390745088,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390749184,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390751232,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390752256,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390752768,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753024,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753152,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753216,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753248,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753264,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753272,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753276,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753278,32,FLEN) -NAN_BOXED(2123596911,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753279,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753280,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753281,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753283,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753287,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753295,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753311,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753343,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753407,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753535,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753791,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390754303,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390755327,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390757375,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390761471,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390769663,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390786047,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390818815,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390884351,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391015423,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391277567,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391801855,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2392850431,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2394947583,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2394947584,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2397044736,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398093312,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398617600,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398879744,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399010816,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399076352,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399109120,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399125504,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399133696,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399137792,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399139840,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399140864,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141376,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141632,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141760,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141824,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141856,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141872,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141880,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141884,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141886,32,FLEN) -NAN_BOXED(2123615570,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141887,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886080,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886081,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886083,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886087,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886095,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886111,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886143,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886207,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886335,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886591,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83887103,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83888127,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83890175,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83894271,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83902463,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83918847,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83951615,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84017151,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84148223,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84410367,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84934655,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(85983231,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(88080383,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(88080384,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(90177536,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(91226112,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(91750400,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92012544,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92143616,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92209152,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92241920,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92258304,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92266496,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92270592,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92272640,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92273664,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274176,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274432,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274560,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274624,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274656,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274672,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274680,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274684,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274686,32,FLEN) -NAN_BOXED(2123660412,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274687,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457024,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457025,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457027,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457031,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457039,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457055,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457087,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457151,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457279,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283457535,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283458047,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283459071,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283461119,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283465215,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283473407,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283489791,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283522559,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283588095,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283719167,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1283981311,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1284505599,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1285554175,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1287651327,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1287651328,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1289748480,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1290797056,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291321344,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291583488,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291714560,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291780096,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291812864,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291829248,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291837440,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291841536,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291843584,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291844608,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845120,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845376,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845504,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845568,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845600,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845616,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845624,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845628,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845630,32,FLEN) -NAN_BOXED(2123709717,32,FLEN) -NAN_BOXED(7194798,32,FLEN) -NAN_BOXED(1291845631,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907648,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907649,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907651,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907655,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907663,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907679,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907711,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907775,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098907903,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098908159,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098908671,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098909695,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098911743,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098915839,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098924031,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098940415,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1098973183,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1099038719,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1099169791,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1099431935,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1099956223,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1101004799,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1103101951,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1103101952,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1105199104,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1106247680,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1106771968,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107034112,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107165184,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107230720,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107263488,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107279872,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107288064,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107292160,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107294208,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107295232,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107295744,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296000,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296128,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296192,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296224,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296240,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296248,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296252,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296254,32,FLEN) -NAN_BOXED(2123776003,32,FLEN) -NAN_BOXED(7146365,32,FLEN) -NAN_BOXED(1107296255,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043136,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043137,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043139,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043143,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043151,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043167,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043199,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043263,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043391,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030043647,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030044159,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030045183,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030047231,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030051327,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030059519,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030075903,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030108671,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030174207,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030305279,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2030567423,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2031091711,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2032140287,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2034237439,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2034237440,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2036334592,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2037383168,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2037907456,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038169600,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038300672,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038366208,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038398976,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038415360,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038423552,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038427648,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038429696,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038430720,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431232,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431488,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431616,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431680,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431712,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431728,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431736,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431740,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431742,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2038431743,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2123839546,32,FLEN) -NAN_BOXED(1079554304,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388608,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388623,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388639,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388671,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388735,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388863,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8389119,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8389631,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8390655,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8392703,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8396799,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8404991,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8421375,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8454143,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8519679,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8650751,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8912895,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(9437183,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10485759,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12582911,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12582912,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14680064,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15728640,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16252928,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16515072,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16646144,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16711680,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16744448,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16760832,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16769024,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16773120,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16775168,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776192,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776704,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776960,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777088,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777152,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777184,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777200,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2123864481,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777215,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806528,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806529,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806531,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806535,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806543,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806559,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806591,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806655,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118806783,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118807039,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118807551,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118808575,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118810623,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118814719,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118822911,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118839295,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118872063,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4118937599,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4119068671,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4119330815,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4119855103,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4120903679,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4123000831,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4123000832,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4125097984,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4126146560,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4126670848,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4126932992,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127064064,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127129600,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127162368,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127178752,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127186944,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127191040,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127193088,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127194112,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127194624,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127194880,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127195008,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127195072,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127195104,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127195120,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127195128,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127195132,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127195134,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4127195135,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2123900795,32,FLEN) -NAN_BOXED(3226950724,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833593856,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833593857,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833593859,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833593863,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833593871,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833593887,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833593919,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833593983,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833594111,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833594367,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833594879,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833595903,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833597951,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833602047,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833610239,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833626623,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833659391,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833724927,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3833855999,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3834118143,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3834642431,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3835691007,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3837788159,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3837788160,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3839885312,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3840933888,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841458176,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841720320,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841851392,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841916928,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841949696,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841966080,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841974272,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841978368,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841980416,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841981440,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841981952,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982208,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982336,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982400,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982432,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982448,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982456,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982460,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982462,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(3841982463,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2123964765,32,FLEN) -NAN_BOXED(3226860758,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858432,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858433,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858435,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858439,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858447,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858463,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858495,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858559,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858687,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227858943,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227859455,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227860479,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227862527,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227866623,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227874815,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227891199,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227923967,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4227989503,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4228120575,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4228382719,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4228907007,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4229955583,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4232052735,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4232052736,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4234149888,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4235198464,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4235722752,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4235984896,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236115968,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236181504,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236214272,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236230656,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236238848,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236242944,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236244992,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236246016,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236246528,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236246784,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236246912,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236246976,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236247008,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236247024,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236247032,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236247036,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236247038,32,FLEN) -NAN_BOXED(2123965938,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4236247039,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886080,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886081,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886083,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886087,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886095,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886111,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886143,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886207,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886335,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886591,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83887103,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83888127,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83890175,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83894271,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83902463,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83918847,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83951615,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84017151,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84148223,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84410367,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84934655,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(85983231,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(88080383,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(88080384,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(90177536,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(91226112,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(91750400,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92012544,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92143616,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92209152,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92241920,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92258304,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92266496,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92270592,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92272640,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92273664,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274176,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274432,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274560,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274624,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274656,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274672,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274680,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274684,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274686,32,FLEN) -NAN_BOXED(2124075299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274687,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790016,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790017,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790019,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790023,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790031,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790047,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790079,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790143,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790271,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952790527,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952791039,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952792063,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952794111,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952798207,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952806399,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952822783,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952855551,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2952921087,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2953052159,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2953314303,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2953838591,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2954887167,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2956984319,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2956984320,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2959081472,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2960130048,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2960654336,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2960916480,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961047552,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961113088,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961145856,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961162240,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961170432,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961174528,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961176576,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961177600,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178112,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178368,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178496,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178560,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178592,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178608,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178616,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178620,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178622,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(2961178623,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2124212631,32,FLEN) -NAN_BOXED(3226522733,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108864,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108865,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108867,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108871,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108879,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108895,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108927,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108991,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109119,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109375,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109887,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67110911,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67112959,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67117055,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67125247,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67141631,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67174399,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67239935,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67371007,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67633151,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(68157439,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(69206015,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(71303167,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(71303168,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(73400320,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(74448896,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(74973184,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75235328,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75366400,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75431936,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75464704,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75481088,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75489280,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75493376,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75495424,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75496448,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75496960,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497216,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497344,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497408,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497440,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497456,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497464,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497468,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497470,32,FLEN) -NAN_BOXED(2124275897,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497471,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663296,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663297,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663299,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663303,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663311,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663327,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663359,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663423,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663551,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663807,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100664319,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100665343,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100667391,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100671487,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100679679,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100696063,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100728831,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100794367,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100925439,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(101187583,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(101711871,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(102760447,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(104857599,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(104857600,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(106954752,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108003328,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108527616,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108789760,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108920832,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108986368,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109019136,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109035520,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109043712,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109047808,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109049856,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109050880,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051392,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051648,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051776,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051840,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051872,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051888,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051896,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051900,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051902,32,FLEN) -NAN_BOXED(2124366026,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051903,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635648,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635649,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635651,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635655,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635663,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635679,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635711,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635775,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244635903,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244636159,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244636671,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244637695,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244639743,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244643839,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244652031,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244668415,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244701183,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244766719,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4244897791,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4245159935,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4245684223,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4246732799,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4248829951,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4248829952,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4250927104,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4251975680,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4252499968,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4252762112,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4252893184,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4252958720,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4252991488,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253007872,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253016064,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253020160,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253022208,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253023232,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253023744,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024000,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024128,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024192,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024224,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024240,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024248,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024252,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024254,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4253024255,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2124368764,32,FLEN) -NAN_BOXED(3226318048,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344448,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344449,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344451,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344455,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344463,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344479,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344511,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344575,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344703,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986344959,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986345471,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986346495,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986348543,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986352639,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986360831,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986377215,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986409983,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986475519,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986606591,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2986868735,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2987393023,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2988441599,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2990538751,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2990538752,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2992635904,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2993684480,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994208768,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994470912,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994601984,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994667520,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994700288,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994716672,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994724864,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994728960,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994731008,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994732032,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994732544,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994732800,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994732928,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994732992,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994733024,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994733040,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994733048,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994733052,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994733054,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(2994733055,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2124376490,32,FLEN) -NAN_BOXED(2154219255,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530496,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530497,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530499,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530503,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530511,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530527,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530559,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530623,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530751,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407531007,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407531519,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407532543,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407534591,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407538687,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407546879,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407563263,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407596031,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407661567,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407792639,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2408054783,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2408579071,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2409627647,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2411724799,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2411724800,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2413821952,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2414870528,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415394816,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415656960,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415788032,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415853568,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415886336,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415902720,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415910912,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415915008,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415917056,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918080,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918592,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918848,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918976,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919040,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919072,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919088,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919096,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919100,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919102,32,FLEN) -NAN_BOXED(2124389168,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919103,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597568,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597569,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597571,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597575,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597583,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597599,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597631,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597695,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063597823,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063598079,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063598591,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063599615,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063601663,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063605759,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063613951,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063630335,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063663103,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063728639,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2063859711,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2064121855,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2064646143,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2065694719,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2067791871,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2067791872,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2069889024,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2070937600,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071461888,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071724032,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071855104,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071920640,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071953408,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071969792,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071977984,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071982080,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071984128,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071985152,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071985664,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071985920,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071986048,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071986112,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071986144,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071986160,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071986168,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071986172,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071986174,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2071986175,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2124417055,32,FLEN) -NAN_BOXED(1078772326,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835520,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835521,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835523,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835527,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835535,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835551,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835583,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835647,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593835775,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593836031,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593836543,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593837567,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593839615,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593843711,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593851903,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593868287,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593901055,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1593966591,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1594097663,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1594359807,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1594884095,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1595932671,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1598029823,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1598029824,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1600126976,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1601175552,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1601699840,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1601961984,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602093056,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602158592,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602191360,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602207744,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602215936,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602220032,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602222080,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602223104,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602223616,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602223872,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602224000,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602224064,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602224096,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602224112,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602224120,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602224124,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602224126,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(1602224127,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2124423855,32,FLEN) -NAN_BOXED(1078763632,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2124429038,32,FLEN) -NAN_BOXED(3226240660,32,FLEN) -NAN_BOXED(4286578687,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453312,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453313,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453315,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453319,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453327,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453343,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453375,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453439,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453567,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053453823,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053454335,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053455359,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053457407,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053461503,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053469695,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053486079,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053518847,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053584383,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053715455,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3053977599,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3054501887,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3055550463,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3057647615,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3057647616,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3059744768,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3060793344,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061317632,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061579776,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061710848,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061776384,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061809152,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061825536,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061833728,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061837824,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061839872,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061840896,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841408,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841664,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841792,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841856,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841888,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841904,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841912,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841916,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841918,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3061841919,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2124435571,32,FLEN) -NAN_BOXED(2154181379,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758336,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758337,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758339,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758343,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758351,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758367,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758399,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758463,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758591,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758847,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239759359,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239760383,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239762431,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239766527,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239774719,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239791103,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239823871,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239889407,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240020479,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240282623,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240806911,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2241855487,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2243952639,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2243952640,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2246049792,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247098368,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247622656,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247884800,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248015872,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248081408,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248114176,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248130560,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248138752,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248142848,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248144896,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248145920,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146432,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146688,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146816,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146880,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146912,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146928,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146936,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146940,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146942,32,FLEN) -NAN_BOXED(2124444519,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146943,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388608,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388623,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388639,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388671,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388735,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388863,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8389119,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8389631,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8390655,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8392703,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8396799,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8404991,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8421375,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8454143,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8519679,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8650751,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8912895,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(9437183,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10485759,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12582911,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12582912,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14680064,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15728640,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16252928,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16515072,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16646144,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16711680,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16744448,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16760832,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16769024,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16773120,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16775168,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776192,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776704,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776960,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777088,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777152,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777184,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777200,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2124445158,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777215,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311424,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311425,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311427,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311431,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311439,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311455,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311487,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311551,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311679,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654311935,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654312447,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654313471,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654315519,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654319615,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654327807,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654344191,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654376959,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654442495,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654573567,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(654835711,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(655359999,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(656408575,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(658505727,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(658505728,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(660602880,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(661651456,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662175744,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662437888,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662568960,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662634496,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662667264,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662683648,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662691840,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662695936,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662697984,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662699008,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662699520,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662699776,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662699904,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662699968,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662700000,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662700016,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662700024,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662700028,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662700030,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(662700031,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2124484347,32,FLEN) -NAN_BOXED(6666780,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810240,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810241,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810243,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810247,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810255,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810271,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810303,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810367,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810495,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810751,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348811263,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348812287,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348814335,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348818431,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348826623,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348843007,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348875775,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348941311,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349072383,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349334527,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349858815,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2350907391,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2353004543,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2353004544,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2355101696,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356150272,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356674560,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356936704,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357067776,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357133312,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357166080,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357182464,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357190656,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357194752,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357196800,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357197824,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198336,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198592,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198720,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198784,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198816,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198832,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198840,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198844,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198846,32,FLEN) -NAN_BOXED(2124501657,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198847,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976064,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976065,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976067,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976071,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976079,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976095,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976127,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976191,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976319,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976575,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373977087,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373978111,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373980159,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373984255,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373992447,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374008831,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374041599,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374107135,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374238207,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374500351,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2375024639,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2376073215,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2378170367,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2378170368,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2380267520,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2381316096,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2381840384,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382102528,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382233600,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382299136,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382331904,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382348288,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382356480,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382360576,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382362624,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382363648,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364160,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364416,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364544,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364608,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364640,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364656,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364664,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364668,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364670,32,FLEN) -NAN_BOXED(2124649107,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364671,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796917760,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796917761,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796917763,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796917767,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796917775,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796917791,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796917823,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796917887,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796918015,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796918271,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796918783,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796919807,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796921855,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796925951,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796934143,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796950527,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(796983295,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(797048831,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(797179903,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(797442047,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(797966335,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(799014911,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(801112063,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(801112064,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(803209216,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(804257792,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(804782080,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805044224,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805175296,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805240832,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805273600,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805289984,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805298176,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805302272,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805304320,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805305344,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805305856,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306112,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306240,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306304,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306336,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306352,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306360,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306364,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306366,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(805306367,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2124653156,32,FLEN) -NAN_BOXED(6561836,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203904,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203905,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203907,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203911,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203919,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203935,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203967,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204031,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204159,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204415,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204927,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206205951,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206207999,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206212095,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206220287,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206236671,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206269439,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206334975,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206466047,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206728191,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2207252479,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2208301055,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2210398207,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2210398208,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2212495360,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2213543936,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214068224,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214330368,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214461440,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214526976,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214559744,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214576128,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214584320,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214588416,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214590464,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214591488,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592000,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592256,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592384,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592448,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592480,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592496,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592504,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592508,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592510,32,FLEN) -NAN_BOXED(2124659084,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592511,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160768,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160769,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160771,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160775,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160783,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160799,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160831,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160895,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161023,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161279,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161791,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176162815,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176164863,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176168959,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176177151,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176193535,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176226303,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176291839,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176422911,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176685055,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(177209343,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(178257919,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(180355071,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(180355072,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(182452224,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(183500800,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184025088,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184287232,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184418304,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184483840,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184516608,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184532992,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184541184,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184545280,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184547328,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184548352,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184548864,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549120,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549248,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549312,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549344,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549360,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549368,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549372,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549374,32,FLEN) -NAN_BOXED(2124663328,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549375,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585446912,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585446913,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585446915,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585446919,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585446927,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585446943,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585446975,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585447039,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585447167,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585447423,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585447935,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585448959,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585451007,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585455103,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585463295,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585479679,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585512447,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585577983,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585709055,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1585971199,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1586495487,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1587544063,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1589641215,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1589641216,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1591738368,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1592786944,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593311232,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593573376,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593704448,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593769984,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593802752,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593819136,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593827328,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593831424,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593833472,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593834496,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835008,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835264,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835392,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835456,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835488,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835504,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835512,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835516,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835518,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(1593835519,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2124777857,32,FLEN) -NAN_BOXED(1078326036,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371072,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371073,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371075,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371079,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371087,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371103,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371135,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371199,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371327,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850371583,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850372095,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850373119,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850375167,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850379263,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850387455,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850403839,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850436607,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850502143,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850633215,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3850895359,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3851419647,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3852468223,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3854565375,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3854565376,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3856662528,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3857711104,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858235392,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858497536,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858628608,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858694144,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858726912,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858743296,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858751488,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858755584,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858757632,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858758656,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759168,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759424,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759552,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759616,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759648,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759664,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759672,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759676,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759678,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(3858759679,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2124793716,32,FLEN) -NAN_BOXED(3225790747,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997632,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997633,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997635,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997639,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997647,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997663,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997695,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997759,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388997887,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388998143,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388998655,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3388999679,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3389001727,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3389005823,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3389014015,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3389030399,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3389063167,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3389128703,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3389259775,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3389521919,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3390046207,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3391094783,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3393191935,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3393191936,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3395289088,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3396337664,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3396861952,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397124096,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397255168,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397320704,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397353472,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397369856,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397378048,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397382144,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397384192,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397385216,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397385728,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397385984,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397386112,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397386176,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397386208,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397386224,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397386232,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397386236,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397386238,32,FLEN) -NAN_BOXED(2124887437,32,FLEN) -NAN_BOXED(2153905195,32,FLEN) -NAN_BOXED(3397386239,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964608,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964609,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964611,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964615,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964623,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964639,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964671,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964735,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056964863,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056965119,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056965631,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056966655,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056968703,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056972799,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056980991,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1056997375,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1057030143,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1057095679,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1057226751,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1057488895,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1058013183,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1059061759,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1061158911,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1061158912,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1063256064,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1064304640,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1064828928,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065091072,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065222144,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065287680,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065320448,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065336832,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065345024,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065349120,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065351168,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065352192,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065352704,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065352960,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353088,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353152,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353184,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353200,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353208,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353212,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353214,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353215,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2124903242,32,FLEN) -NAN_BOXED(6412299,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881024,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881025,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881027,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881031,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881039,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881055,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881087,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881151,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881279,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881535,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234882047,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234883071,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234885119,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234889215,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234897407,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234913791,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234946559,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235012095,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235143167,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235405311,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235929599,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(236978175,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(239075327,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(239075328,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(241172480,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(242221056,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(242745344,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243007488,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243138560,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243204096,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243236864,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243253248,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243261440,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243265536,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243267584,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243268608,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269120,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269376,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269504,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269568,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269600,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269616,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269624,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269628,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269630,32,FLEN) -NAN_BOXED(2125069958,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269631,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815296,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815297,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815299,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815303,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815311,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815327,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815359,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815423,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815551,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815807,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197816319,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197817343,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197819391,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197823487,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197831679,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197848063,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197880831,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197946367,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198077439,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198339583,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2198863871,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2199912447,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2202009599,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2202009600,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2204106752,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205155328,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205679616,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2205941760,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206072832,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206138368,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206171136,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206187520,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206195712,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206199808,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206201856,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206202880,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203392,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203648,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203776,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203840,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203872,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203888,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203896,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203900,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203902,32,FLEN) -NAN_BOXED(2125117427,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203903,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976064,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976065,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976067,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976071,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976079,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976095,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976127,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976191,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976319,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976575,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373977087,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373978111,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373980159,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373984255,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373992447,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374008831,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374041599,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374107135,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374238207,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374500351,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2375024639,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2376073215,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2378170367,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2378170368,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2380267520,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2381316096,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2381840384,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382102528,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382233600,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382299136,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382331904,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382348288,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382356480,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382360576,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382362624,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382363648,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364160,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364416,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364544,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364608,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364640,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364656,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364664,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364668,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364670,32,FLEN) -NAN_BOXED(2125127731,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364671,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205248,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205249,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205251,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205255,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205263,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205279,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205311,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205375,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205503,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825205759,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825206271,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825207295,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825209343,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825213439,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825221631,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825238015,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825270783,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825336319,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825467391,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3825729535,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3826253823,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3827302399,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3829399551,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3829399552,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3831496704,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3832545280,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833069568,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833331712,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833462784,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833528320,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833561088,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833577472,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833585664,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833589760,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833591808,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833592832,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593344,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593600,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593728,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593792,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593824,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593840,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593848,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593852,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593854,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(3833593855,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2125157309,32,FLEN) -NAN_BOXED(3225371269,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894069760,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894069761,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894069763,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894069767,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894069775,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894069791,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894069823,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894069887,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894070015,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894070271,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894070783,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894071807,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894073855,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894077951,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894086143,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894102527,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894135295,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894200831,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894331903,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2894594047,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2895118335,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2896166911,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2898264063,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2898264064,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2900361216,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2901409792,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2901934080,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902196224,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902327296,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902392832,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902425600,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902441984,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902450176,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902454272,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902456320,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902457344,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902457856,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458112,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458240,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458304,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458336,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458352,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458360,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458364,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458366,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(2902458367,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2125162351,32,FLEN) -NAN_BOXED(2153748038,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535552,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535553,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535555,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535559,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535567,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535583,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535615,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535679,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535807,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256536063,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256536575,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256537599,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256539647,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256543743,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256551935,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256568319,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256601087,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256666623,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256797695,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2257059839,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2257584127,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2258632703,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2260729855,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2260729856,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2262827008,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2263875584,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264399872,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264662016,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264793088,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264858624,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264891392,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264907776,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264915968,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264920064,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264922112,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923136,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923648,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923904,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924032,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924096,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924128,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924144,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924152,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924156,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924158,32,FLEN) -NAN_BOXED(2125202738,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924159,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406464,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406465,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406467,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406471,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406479,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406495,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406527,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406591,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406719,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793406975,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793407487,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793408511,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793410559,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793414655,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793422847,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793439231,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793471999,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793537535,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793668607,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2793930751,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2794455039,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2795503615,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2797600767,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2797600768,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2799697920,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2800746496,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801270784,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801532928,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801664000,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801729536,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801762304,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801778688,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801786880,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801790976,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801793024,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801794048,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801794560,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801794816,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801794944,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801795008,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801795040,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801795056,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801795064,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801795068,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801795070,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(2801795071,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2125206910,32,FLEN) -NAN_BOXED(2153723287,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148288,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148289,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148291,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148295,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148303,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148319,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148351,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148415,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148543,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867148799,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867149311,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867150335,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867152383,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867156479,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867164671,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867181055,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867213823,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867279359,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867410431,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3867672575,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3868196863,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3869245439,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3871342591,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3871342592,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3873439744,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3874488320,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875012608,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875274752,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875405824,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875471360,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875504128,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875520512,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875528704,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875532800,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875534848,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875535872,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536384,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536640,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536768,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536832,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536864,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536880,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536888,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536892,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536894,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(3875536895,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2125340583,32,FLEN) -NAN_BOXED(3225169958,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550720,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550721,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550723,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550727,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550735,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550751,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550783,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550847,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803550975,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803551231,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803551743,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803552767,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803554815,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803558911,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803567103,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803583487,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803616255,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803681791,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1803812863,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1804075007,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1804599295,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1805647871,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1807745023,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1807745024,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1809842176,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1810890752,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811415040,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811677184,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811808256,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811873792,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811906560,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811922944,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811931136,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811935232,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811937280,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811938304,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811938816,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939072,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939200,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939264,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939296,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939312,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939320,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939324,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939326,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(1811939327,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2125355709,32,FLEN) -NAN_BOXED(1077669985,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592512,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592513,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592515,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592519,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592527,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592543,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592575,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592639,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592767,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214593023,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214593535,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214594559,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214596607,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214600703,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214608895,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214625279,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214658047,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214723583,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214854655,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2215116799,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2215641087,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2216689663,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2218786815,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2218786816,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2220883968,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2221932544,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222456832,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222718976,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222850048,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222915584,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222948352,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222964736,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222972928,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222977024,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222979072,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980096,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980608,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980864,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980992,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981056,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981088,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981104,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981112,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981116,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981118,32,FLEN) -NAN_BOXED(2125391499,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981119,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011456,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011457,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011459,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011463,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011471,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011487,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011519,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011583,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011711,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317011967,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317012479,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317013503,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317015551,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317019647,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317027839,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317044223,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317076991,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317142527,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317273599,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1317535743,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1318060031,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1319108607,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1321205759,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1321205760,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1323302912,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1324351488,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1324875776,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325137920,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325268992,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325334528,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325367296,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325383680,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325391872,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325395968,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325398016,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325399040,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325399552,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325399808,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325399936,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325400000,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325400032,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325400048,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325400056,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325400060,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325400062,32,FLEN) -NAN_BOXED(2125454010,32,FLEN) -NAN_BOXED(6105856,32,FLEN) -NAN_BOXED(1325400063,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587456,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587457,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587459,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587463,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587471,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587487,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587519,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587583,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587711,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587967,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365588479,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365589503,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365591551,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365595647,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365603839,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365620223,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365652991,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365718527,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365849599,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2366111743,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2366636031,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2367684607,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2369781759,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2369781760,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2371878912,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2372927488,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373451776,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373713920,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373844992,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373910528,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373943296,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373959680,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373967872,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373971968,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373974016,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975040,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975552,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975808,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975936,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976000,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976032,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976048,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976056,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976060,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976062,32,FLEN) -NAN_BOXED(2125465431,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976063,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609024,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609025,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609027,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609031,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609039,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609055,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609087,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609151,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609279,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380609535,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380610047,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380611071,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380613119,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380617215,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380625407,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380641791,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380674559,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380740095,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3380871167,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3381133311,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3381657599,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3382706175,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3384803327,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3384803328,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3386900480,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3387949056,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388473344,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388735488,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388866560,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388932096,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388964864,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388981248,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388989440,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388993536,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388995584,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388996608,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997120,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997376,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997504,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997568,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997600,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997616,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997624,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997628,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997630,32,FLEN) -NAN_BOXED(2125471882,32,FLEN) -NAN_BOXED(2153580050,32,FLEN) -NAN_BOXED(3388997631,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314112,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314113,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314115,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314119,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314127,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314143,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314175,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314239,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314367,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892314623,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892315135,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892316159,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892318207,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892322303,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892330495,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892346879,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892379647,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892445183,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892576255,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3892838399,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3893362687,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3894411263,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3896508415,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3896508416,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3898605568,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3899654144,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900178432,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900440576,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900571648,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900637184,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900669952,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900686336,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900694528,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900698624,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900700672,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900701696,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702208,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702464,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702592,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702656,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702688,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702704,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702712,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702716,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702718,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(3900702719,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2125566782,32,FLEN) -NAN_BOXED(3224930241,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741824,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741825,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741827,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741831,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741839,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741855,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741887,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073741951,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073742079,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073742335,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073742847,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073743871,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073745919,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073750015,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073758207,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073774591,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073807359,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1073872895,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1074003967,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1074266111,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1074790399,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1075838975,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1077936127,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1077936128,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1080033280,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1081081856,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1081606144,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1081868288,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1081999360,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082064896,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082097664,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082114048,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082122240,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082126336,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082128384,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082129408,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082129920,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130176,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130304,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130368,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130400,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130416,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130424,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130428,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130430,32,FLEN) -NAN_BOXED(2125684957,32,FLEN) -NAN_BOXED(5985904,32,FLEN) -NAN_BOXED(1082130431,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715200,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715201,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715203,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715207,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715215,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715231,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715263,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715327,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715455,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715711,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209716223,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209717247,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209719295,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209723391,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209731583,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209747967,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209780735,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209846271,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209977343,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(210239487,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(210763775,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(211812351,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(213909503,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(213909504,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(216006656,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217055232,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217579520,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217841664,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217972736,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218038272,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218071040,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218087424,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218095616,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218099712,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218101760,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218102784,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103296,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103552,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103680,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103744,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103776,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103792,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103800,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103804,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103806,32,FLEN) -NAN_BOXED(2125686396,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103807,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073472,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073473,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073475,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073479,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073487,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073503,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073535,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073599,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073727,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124073983,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124074495,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124075519,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124077567,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124081663,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124089855,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124106239,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124139007,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124204543,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124335615,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1124597759,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1125122047,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1126170623,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1128267775,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1128267776,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1130364928,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1131413504,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1131937792,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132199936,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132331008,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132396544,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132429312,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132445696,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132453888,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132457984,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132460032,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132461056,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132461568,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132461824,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132461952,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132462016,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132462048,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132462064,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132462072,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132462076,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132462078,32,FLEN) -NAN_BOXED(2125762592,32,FLEN) -NAN_BOXED(5946632,32,FLEN) -NAN_BOXED(1132462079,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766484992,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766484993,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766484995,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766484999,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766485007,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766485023,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766485055,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766485119,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766485247,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766485503,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766486015,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766487039,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766489087,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766493183,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766501375,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766517759,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766550527,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766616063,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3766747135,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3767009279,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3767533567,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3768582143,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3770679295,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3770679296,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3772776448,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3773825024,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774349312,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774611456,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774742528,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774808064,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774840832,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774857216,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774865408,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774869504,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774871552,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774872576,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873088,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873344,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873472,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873536,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873568,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873584,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873592,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873596,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873598,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(3774873599,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2125779488,32,FLEN) -NAN_BOXED(3224713171,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663296,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663297,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663299,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663303,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663311,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663327,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663359,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663423,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663551,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663807,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100664319,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100665343,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100667391,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100671487,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100679679,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100696063,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100728831,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100794367,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100925439,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(101187583,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(101711871,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(102760447,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(104857599,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(104857600,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(106954752,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108003328,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108527616,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108789760,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108920832,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108986368,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109019136,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109035520,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109043712,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109047808,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109049856,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109050880,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051392,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051648,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051776,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051840,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051872,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051888,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051896,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051900,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051902,32,FLEN) -NAN_BOXED(2125779530,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051903,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754624,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754625,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754627,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754631,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754639,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754655,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754687,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754751,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009754879,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009755135,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009755647,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009756671,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009758719,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009762815,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009771007,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009787391,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009820159,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4009885695,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4010016767,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4010278911,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4010803199,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4011851775,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4013948927,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4013948928,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4016046080,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4017094656,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4017618944,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4017881088,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018012160,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018077696,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018110464,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018126848,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018135040,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018139136,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018141184,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018142208,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018142720,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018142976,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018143104,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018143168,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018143200,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018143216,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018143224,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018143228,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018143230,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4018143231,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2125793263,32,FLEN) -NAN_BOXED(3224699381,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829120,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829121,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829123,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829127,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829135,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829151,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829183,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829247,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829375,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829631,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125830143,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125831167,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125833215,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125837311,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125845503,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125861887,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125894655,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125960191,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126091263,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126353407,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126877695,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127926271,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(130023423,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(130023424,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(132120576,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133169152,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133693440,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133955584,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134086656,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134152192,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134184960,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134201344,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134209536,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134213632,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134215680,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134216704,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217216,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217472,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217600,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217664,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217696,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217712,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217720,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217724,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217726,32,FLEN) -NAN_BOXED(2125857933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217727,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505216,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505217,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505219,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505223,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505231,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505247,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505279,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505343,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505471,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162505727,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162506239,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162507263,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162509311,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162513407,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162521599,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162537983,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162570751,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162636287,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3162767359,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3163029503,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3163553791,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3164602367,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3166699519,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3166699520,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3168796672,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3169845248,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170369536,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170631680,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170762752,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170828288,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170861056,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170877440,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170885632,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170889728,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170891776,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170892800,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893312,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893568,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893696,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893760,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893792,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893808,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893816,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893820,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893822,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3170893823,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2125898219,32,FLEN) -NAN_BOXED(2153362896,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939328,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939329,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939331,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939335,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939343,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939359,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939391,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939455,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939583,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811939839,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811940351,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811941375,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811943423,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811947519,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811955711,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1811972095,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1812004863,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1812070399,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1812201471,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1812463615,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1812987903,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1814036479,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1816133631,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1816133632,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1818230784,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1819279360,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1819803648,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820065792,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820196864,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820262400,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820295168,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820311552,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820319744,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820323840,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820325888,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820326912,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327424,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327680,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327808,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327872,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327904,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327920,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327928,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327932,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327934,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(1820327935,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2125925610,32,FLEN) -NAN_BOXED(1077084864,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554432,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554433,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554435,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554439,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554447,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554463,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554495,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554559,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554687,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554943,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33555455,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33556479,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33558527,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33562623,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33570815,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33587199,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33619967,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33685503,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33816575,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(34078719,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(34603007,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(35651583,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(37748735,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(37748736,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(39845888,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(40894464,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41418752,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41680896,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41811968,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41877504,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41910272,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41926656,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41934848,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41938944,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41940992,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942016,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942528,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942784,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942912,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942976,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943008,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943024,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943032,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943036,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943038,32,FLEN) -NAN_BOXED(2125960106,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943039,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383552,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383553,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383555,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383559,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383567,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383583,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383615,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383679,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383807,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159384063,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159384575,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159385599,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159387647,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159391743,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159399935,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159416319,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159449087,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159514623,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159645695,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159907839,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(160432127,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(161480703,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(163577855,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(163577856,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(165675008,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(166723584,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167247872,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167510016,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167641088,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167706624,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167739392,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167755776,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167763968,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167768064,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167770112,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771136,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771648,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771904,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772032,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772096,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772128,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772144,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772152,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772156,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772158,32,FLEN) -NAN_BOXED(2125985822,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772159,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078528,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078529,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078531,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078535,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078543,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078559,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078591,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078655,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973078783,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973079039,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973079551,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973080575,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973082623,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973086719,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973094911,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973111295,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973144063,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973209599,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973340671,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(973602815,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(974127103,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(975175679,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(977272831,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(977272832,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(979369984,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(980418560,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(980942848,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981204992,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981336064,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981401600,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981434368,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981450752,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981458944,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981463040,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981465088,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981466112,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981466624,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981466880,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981467008,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981467072,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981467104,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981467120,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981467128,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981467132,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981467134,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(981467135,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2125989525,32,FLEN) -NAN_BOXED(5834737,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577344,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577345,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577347,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577351,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577359,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577375,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577407,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577471,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577599,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667577855,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667578367,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667579391,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667581439,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667585535,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667593727,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667610111,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667642879,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667708415,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2667839487,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2668101631,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2668625919,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2669674495,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2671771647,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2671771648,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2673868800,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2674917376,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675441664,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675703808,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675834880,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675900416,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675933184,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675949568,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675957760,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675961856,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675963904,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675964928,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965440,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965696,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965824,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965888,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965920,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965936,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965944,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965948,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965950,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(2675965951,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2126054791,32,FLEN) -NAN_BOXED(2153286980,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091328,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091329,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091331,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091335,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091343,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091359,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091391,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091455,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091583,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909091839,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909092351,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909093375,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909095423,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909099519,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909107711,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909124095,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909156863,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909222399,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909353471,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3909615615,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3910139903,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3911188479,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3913285631,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3913285632,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3915382784,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3916431360,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3916955648,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917217792,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917348864,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917414400,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917447168,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917463552,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917471744,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917475840,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917477888,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917478912,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479424,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479680,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479808,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479872,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479904,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479920,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479928,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479932,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479934,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(3917479935,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2126091555,32,FLEN) -NAN_BOXED(3224408443,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777216,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777217,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777219,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777223,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777231,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777247,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777279,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777343,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777471,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777727,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16778239,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16779263,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16781311,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16785407,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16793599,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16809983,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16842751,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16908287,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17039359,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17301503,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17825791,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(18874367,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(20971519,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(20971520,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(23068672,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24117248,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24641536,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24903680,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25034752,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25100288,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25133056,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25149440,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25157632,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25161728,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25163776,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25164800,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165312,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165568,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165696,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165760,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165792,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165808,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165816,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165820,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165822,32,FLEN) -NAN_BOXED(2126157986,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165823,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535552,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535553,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535555,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535559,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535567,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535583,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535615,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535679,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535807,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256536063,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256536575,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256537599,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256539647,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256543743,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256551935,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256568319,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256601087,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256666623,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256797695,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2257059839,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2257584127,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2258632703,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2260729855,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2260729856,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2262827008,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2263875584,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264399872,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264662016,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264793088,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264858624,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264891392,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264907776,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264915968,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264920064,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264922112,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923136,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923648,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923904,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924032,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924096,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924128,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924144,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924152,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924156,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924158,32,FLEN) -NAN_BOXED(2126163960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924159,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530496,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530497,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530499,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530503,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530511,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530527,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530559,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530623,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530751,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407531007,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407531519,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407532543,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407534591,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407538687,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407546879,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407563263,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407596031,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407661567,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407792639,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2408054783,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2408579071,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2409627647,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2411724799,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2411724800,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2413821952,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2414870528,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415394816,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415656960,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415788032,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415853568,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415886336,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415902720,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415910912,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415915008,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415917056,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918080,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918592,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918848,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918976,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919040,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919072,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919088,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919096,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919100,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919102,32,FLEN) -NAN_BOXED(2126207656,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919103,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549376,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549377,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549379,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549383,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549391,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549407,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549439,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549503,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549631,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549887,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184550399,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184551423,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184553471,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184557567,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184565759,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184582143,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184614911,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184680447,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184811519,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(185073663,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(185597951,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(186646527,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(188743679,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(188743680,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(190840832,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(191889408,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192413696,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192675840,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192806912,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192872448,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192905216,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192921600,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192929792,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192933888,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192935936,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192936960,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937472,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937728,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937856,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937920,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937952,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937968,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937976,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937980,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937982,32,FLEN) -NAN_BOXED(2126268514,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937983,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777216,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777217,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777219,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777223,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777231,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777247,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777279,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777343,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777471,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777727,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16778239,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16779263,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16781311,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16785407,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16793599,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16809983,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16842751,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16908287,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17039359,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17301503,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17825791,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(18874367,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(20971519,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(20971520,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(23068672,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24117248,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24641536,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24903680,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25034752,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25100288,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25133056,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25149440,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25157632,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25161728,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25163776,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25164800,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165312,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165568,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165696,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165760,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165792,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165808,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165816,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165820,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165822,32,FLEN) -NAN_BOXED(2126306546,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165823,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088640,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088641,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088643,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088647,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088655,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088671,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088703,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088767,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671088895,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671089151,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671089663,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671090687,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671092735,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671096831,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671105023,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671121407,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671154175,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671219711,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671350783,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(671612927,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(672137215,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(673185791,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(675282943,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(675282944,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(677380096,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(678428672,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(678952960,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679215104,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679346176,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679411712,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679444480,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679460864,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679469056,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679473152,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679475200,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679476224,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679476736,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679476992,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679477120,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679477184,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679477216,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679477232,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679477240,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679477244,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679477246,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(679477247,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2126327294,32,FLEN) -NAN_BOXED(5675778,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810240,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810241,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810243,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810247,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810255,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810271,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810303,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810367,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810495,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810751,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348811263,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348812287,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348814335,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348818431,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348826623,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348843007,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348875775,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348941311,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349072383,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349334527,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349858815,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2350907391,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2353004543,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2353004544,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2355101696,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356150272,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356674560,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356936704,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357067776,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357133312,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357166080,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357182464,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357190656,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357194752,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357196800,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357197824,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198336,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198592,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198720,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198784,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198816,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198832,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198840,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198844,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198846,32,FLEN) -NAN_BOXED(2126348801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198847,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649472,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649473,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649475,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649479,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649487,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649503,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649535,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649599,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649727,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649983,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172650495,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172651519,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172653567,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172657663,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172665855,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172682239,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172715007,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172780543,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172911615,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2173173759,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2173698047,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2174746623,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2176843775,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2176843776,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2178940928,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2179989504,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180513792,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180775936,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180907008,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180972544,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181005312,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181021696,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181029888,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181033984,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181036032,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037056,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037568,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037824,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037952,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038016,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038048,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038064,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038072,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038076,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038078,32,FLEN) -NAN_BOXED(2126350509,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038079,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363831808,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363831809,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363831811,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363831815,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363831823,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363831839,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363831871,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363831935,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363832063,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363832319,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363832831,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363833855,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363835903,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363839999,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363848191,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363864575,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363897343,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3363962879,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3364093951,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3364356095,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3364880383,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3365928959,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3368026111,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3368026112,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3370123264,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3371171840,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3371696128,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3371958272,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372089344,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372154880,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372187648,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372204032,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372212224,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372216320,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372218368,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372219392,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372219904,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220160,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220288,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220352,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220384,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220400,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220408,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220412,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220414,32,FLEN) -NAN_BOXED(2126373354,32,FLEN) -NAN_BOXED(2153138418,32,FLEN) -NAN_BOXED(3372220415,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(63,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(511,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1023,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2047,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4095,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8191,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16383,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32767,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65535,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(131071,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(524287,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1048575,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2097151,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194303,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194304,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6291456,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7340032,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7864320,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8126464,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8257536,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8323072,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8355840,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8372224,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8380416,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8384512,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8386560,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8387584,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388096,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388352,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388480,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388544,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388576,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388592,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2126396513,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388607,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224128,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224129,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224131,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224135,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224143,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224159,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224191,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224255,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224383,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602224639,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602225151,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602226175,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602228223,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602232319,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602240511,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602256895,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602289663,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602355199,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602486271,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1602748415,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1603272703,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1604321279,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1606418431,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1606418432,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1608515584,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1609564160,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610088448,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610350592,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610481664,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610547200,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610579968,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610596352,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610604544,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610608640,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610610688,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610611712,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612224,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612480,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612608,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612672,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612704,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612720,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612728,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612732,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612734,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(1610612735,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2126427187,32,FLEN) -NAN_BOXED(1076614042,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867200,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867201,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867203,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867207,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867215,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867231,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867263,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867327,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867455,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867711,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306868223,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306869247,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306871295,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306875391,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306883583,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306899967,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306932735,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306998271,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307129343,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307391487,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307915775,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2308964351,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2311061503,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2311061504,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2313158656,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314207232,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314731520,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314993664,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315124736,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315190272,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315223040,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315239424,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315247616,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315251712,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315253760,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315254784,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255296,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255552,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255680,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255744,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255776,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255792,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255800,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255804,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255806,32,FLEN) -NAN_BOXED(2126438831,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255807,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165824,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165825,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165827,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165831,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165839,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165855,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165887,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165951,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166079,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166335,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166847,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25167871,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25169919,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25174015,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25182207,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25198591,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25231359,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25296895,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25427967,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25690111,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(26214399,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(27262975,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(29360127,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(29360128,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31457280,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32505856,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33030144,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33292288,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33423360,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33488896,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33521664,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33538048,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33546240,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33550336,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33552384,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33553408,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33553920,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554176,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554304,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554368,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554400,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554416,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554424,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554428,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554430,32,FLEN) -NAN_BOXED(2126472891,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554431,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554432,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554433,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554435,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554439,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554447,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554463,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554495,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554559,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554687,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554943,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33555455,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33556479,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33558527,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33562623,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33570815,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33587199,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33619967,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33685503,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33816575,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(34078719,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(34603007,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(35651583,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(37748735,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(37748736,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(39845888,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(40894464,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41418752,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41680896,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41811968,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41877504,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41910272,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41926656,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41934848,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41938944,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41940992,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942016,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942528,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942784,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942912,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942976,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943008,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943024,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943032,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943036,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943038,32,FLEN) -NAN_BOXED(2126478067,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943039,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701376,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701377,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701379,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701383,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701391,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701407,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701439,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701503,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701631,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701887,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281702399,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281703423,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281705471,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281709567,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281717759,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281734143,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281766911,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281832447,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281963519,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2282225663,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2282749951,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2283798527,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2285895679,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2285895680,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2287992832,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289041408,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289565696,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289827840,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289958912,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290024448,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290057216,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290073600,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290081792,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290085888,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290087936,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290088960,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089472,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089728,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089856,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089920,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089952,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089968,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089976,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089980,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089982,32,FLEN) -NAN_BOXED(2126711960,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089983,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971322880,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971322881,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971322883,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971322887,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971322895,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971322911,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971322943,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971323007,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971323135,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971323391,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971323903,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971324927,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971326975,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971331071,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971339263,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971355647,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971388415,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971453951,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971585023,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1971847167,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1972371455,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1973420031,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1975517183,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1975517184,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1977614336,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1978662912,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979187200,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979449344,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979580416,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979645952,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979678720,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979695104,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979703296,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979707392,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979709440,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979710464,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979710976,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711232,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711360,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711424,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711456,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711472,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711480,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711484,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711486,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(1979711487,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2126721820,32,FLEN) -NAN_BOXED(1076354688,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038080,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038081,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038083,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038087,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038095,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038111,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038143,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038207,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038335,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038591,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181039103,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181040127,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181042175,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181046271,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181054463,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181070847,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181103615,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181169151,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181300223,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181562367,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2182086655,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2183135231,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2185232383,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2185232384,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2187329536,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2188378112,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2188902400,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189164544,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189295616,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189361152,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189393920,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189410304,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189418496,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189422592,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189424640,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189425664,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426176,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426432,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426560,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426624,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426656,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426672,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426680,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426684,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426686,32,FLEN) -NAN_BOXED(2126965070,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426687,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260864,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260865,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260867,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260871,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260879,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260895,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260927,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260991,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261119,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261375,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261887,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164262911,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164264959,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164269055,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164277247,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164293631,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164326399,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164391935,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164523007,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164785151,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2165309439,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2166358015,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2168455167,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2168455168,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2170552320,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2171600896,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172125184,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172387328,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172518400,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172583936,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172616704,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172633088,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172641280,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172645376,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172647424,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172648448,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172648960,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649216,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649344,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649408,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649440,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649456,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649464,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649468,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649470,32,FLEN) -NAN_BOXED(2126990462,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649471,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261412864,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261412865,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261412867,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261412871,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261412879,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261412895,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261412927,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261412991,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261413119,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261413375,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261413887,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261414911,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261416959,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261421055,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261429247,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261445631,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261478399,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261543935,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261675007,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4261937151,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4262461439,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4263510015,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4265607167,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4265607168,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4267704320,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4268752896,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269277184,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269539328,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269670400,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269735936,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269768704,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269785088,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269793280,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269797376,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269799424,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269800448,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269800960,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801216,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801344,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801408,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801440,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801456,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801464,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801468,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801470,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4269801471,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2127011269,32,FLEN) -NAN_BOXED(3223594921,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269632,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269633,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269635,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269639,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269647,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269663,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269695,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269759,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269887,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243270143,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243270655,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243271679,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243273727,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243277823,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243286015,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243302399,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243335167,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243400703,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243531775,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243793919,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(244318207,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(245366783,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(247463935,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(247463936,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(249561088,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(250609664,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251133952,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251396096,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251527168,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251592704,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251625472,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251641856,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251650048,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251654144,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251656192,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657216,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657728,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657984,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658112,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658176,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658208,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658224,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658232,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658236,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658238,32,FLEN) -NAN_BOXED(2127049509,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658239,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368384,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368385,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368387,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368391,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368399,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368415,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368447,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368511,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368639,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612368895,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612369407,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612370431,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612372479,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612376575,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612384767,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612401151,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612433919,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612499455,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612630527,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(612892671,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(613416959,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(614465535,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(616562687,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(616562688,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(618659840,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(619708416,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620232704,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620494848,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620625920,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620691456,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620724224,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620740608,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620748800,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620752896,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620754944,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620755968,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756480,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756736,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756864,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756928,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756960,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756976,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756984,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756988,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756990,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(620756991,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2127060493,32,FLEN) -NAN_BOXED(5358865,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108864,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108865,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108867,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108871,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108879,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108895,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108927,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108991,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109119,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109375,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67109887,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67110911,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67112959,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67117055,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67125247,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67141631,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67174399,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67239935,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67371007,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67633151,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(68157439,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(69206015,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(71303167,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(71303168,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(73400320,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(74448896,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(74973184,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75235328,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75366400,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75431936,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75464704,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75481088,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75489280,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75493376,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75495424,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75496448,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75496960,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497216,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497344,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497408,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497440,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497456,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497464,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497468,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497470,32,FLEN) -NAN_BOXED(2127092205,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497471,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603979776,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603979777,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603979779,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603979783,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603979791,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603979807,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603979839,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603979903,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603980031,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603980287,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603980799,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603981823,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603983871,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603987967,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(603996159,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(604012543,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(604045311,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(604110847,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(604241919,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(604504063,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(605028351,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(606076927,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(608174079,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(608174080,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(610271232,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(611319808,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(611844096,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612106240,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612237312,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612302848,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612335616,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612352000,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612360192,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612364288,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612366336,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612367360,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612367872,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368128,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368256,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368320,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368352,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368368,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368376,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368380,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368382,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(612368383,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2127130550,32,FLEN) -NAN_BOXED(5330426,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701376,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701377,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701379,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701383,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701391,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701407,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701439,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701503,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701631,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701887,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281702399,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281703423,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281705471,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281709567,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281717759,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281734143,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281766911,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281832447,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281963519,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2282225663,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2282749951,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2283798527,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2285895679,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2285895680,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2287992832,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289041408,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289565696,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289827840,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289958912,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290024448,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290057216,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290073600,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290081792,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290085888,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290087936,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290088960,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089472,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089728,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089856,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089920,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089952,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089968,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089976,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089980,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089982,32,FLEN) -NAN_BOXED(2127161801,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089983,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029312,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029313,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029315,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029319,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029327,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029343,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029375,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029439,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029567,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102029823,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102030335,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102031359,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102033407,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102037503,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102045695,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102062079,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102094847,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102160383,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102291455,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4102553599,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4103077887,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4104126463,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4106223615,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4106223616,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4108320768,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4109369344,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4109893632,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110155776,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110286848,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110352384,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110385152,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110401536,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110409728,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110413824,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110415872,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110416896,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417408,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417664,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417792,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417856,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417888,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417904,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417912,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417916,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417918,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4110417919,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2127169003,32,FLEN) -NAN_BOXED(3223466753,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706432,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706447,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706463,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706495,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706559,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706687,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130706943,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130707455,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130708479,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130710527,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130714623,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130722815,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130739199,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130771967,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130837503,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2130968575,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2131230719,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2131755007,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2132803583,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2134900735,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2134900736,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2136997888,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2138046464,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2138570752,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2138832896,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2138963968,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139029504,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139062272,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139078656,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139086848,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139090944,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139092992,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139094016,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139094528,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139094784,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139094912,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139094976,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139095008,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139095024,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2127247153,32,FLEN) -NAN_BOXED(1075920729,32,FLEN) -NAN_BOXED(2139095039,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199570944,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199570945,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199570947,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199570951,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199570959,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199570975,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199571007,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199571071,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199571199,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199571455,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199571967,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199572991,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199575039,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199579135,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199587327,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199603711,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199636479,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199702015,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1199833087,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1200095231,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1200619519,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1201668095,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1203765247,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1203765248,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1205862400,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1206910976,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207435264,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207697408,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207828480,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207894016,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207926784,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207943168,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207951360,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207955456,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207957504,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207958528,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959040,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959296,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959424,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959488,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959520,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959536,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959544,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959548,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959550,32,FLEN) -NAN_BOXED(2127253870,32,FLEN) -NAN_BOXED(5281093,32,FLEN) -NAN_BOXED(1207959551,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483663,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483679,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483711,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483775,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483903,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484159,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484671,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147485695,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147487743,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147491839,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147500031,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147516415,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147549183,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147614719,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147745791,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148007935,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148532223,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149580799,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677951,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677952,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153775104,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154823680,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155347968,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155610112,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155741184,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155806720,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155839488,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155855872,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155864064,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155868160,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155870208,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871232,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871744,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872000,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872128,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872192,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872224,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872240,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2127262261,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872255,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081216,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081217,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081219,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081223,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081231,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081247,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081279,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081343,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081471,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211081727,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211082239,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211083263,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211085311,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211089407,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211097599,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211113983,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211146751,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211212287,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211343359,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4211605503,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4212129791,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4213178367,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4215275519,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4215275520,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4217372672,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4218421248,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4218945536,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219207680,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219338752,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219404288,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219437056,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219453440,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219461632,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219465728,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219467776,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219468800,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469312,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469568,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469696,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469760,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469792,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469808,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469816,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469820,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469822,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4219469823,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2127271768,32,FLEN) -NAN_BOXED(3223384881,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440512,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440513,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440515,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440519,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440527,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440543,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440575,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440639,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440767,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117441023,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117441535,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117442559,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117444607,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117448703,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117456895,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117473279,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117506047,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117571583,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117702655,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117964799,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(118489087,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(119537663,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(121634815,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(121634816,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(123731968,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(124780544,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125304832,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125566976,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125698048,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125763584,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125796352,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125812736,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125820928,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125825024,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125827072,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828096,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828608,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828864,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828992,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829056,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829088,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829104,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829112,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829116,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829118,32,FLEN) -NAN_BOXED(2127331618,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829119,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991232,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991233,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991235,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991239,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991247,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991263,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991295,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991359,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991487,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920991743,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920992255,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920993279,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920995327,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1920999423,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1921007615,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1921023999,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1921056767,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1921122303,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1921253375,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1921515519,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1922039807,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1923088383,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1925185535,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1925185536,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1927282688,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1928331264,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1928855552,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929117696,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929248768,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929314304,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929347072,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929363456,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929371648,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929375744,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929377792,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929378816,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379328,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379584,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379712,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379776,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379808,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379824,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379832,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379836,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379838,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(1929379839,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2127348334,32,FLEN) -NAN_BOXED(1075841049,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421632,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421633,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421635,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421639,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421647,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421663,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421695,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421759,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421887,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340422143,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340422655,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340423679,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340425727,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340429823,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340438015,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340454399,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340487167,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340552703,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340683775,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340945919,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2341470207,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2342518783,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2344615935,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2344615936,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2346713088,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2347761664,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348285952,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348548096,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348679168,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348744704,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348777472,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348793856,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348802048,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348806144,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348808192,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809216,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809728,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809984,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810112,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810176,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810208,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810224,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810232,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810236,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810238,32,FLEN) -NAN_BOXED(2127525897,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810239,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006632960,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006632961,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006632963,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006632967,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006632975,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006632991,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006633023,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006633087,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006633215,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006633471,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006633983,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006635007,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006637055,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006641151,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006649343,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006665727,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006698495,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006764031,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1006895103,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1007157247,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1007681535,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1008730111,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1010827263,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1010827264,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1012924416,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1013972992,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1014497280,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1014759424,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1014890496,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1014956032,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1014988800,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015005184,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015013376,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015017472,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015019520,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015020544,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021056,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021312,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021440,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021504,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021536,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021552,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021560,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021564,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021566,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1015021567,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2127625348,32,FLEN) -NAN_BOXED(5137855,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984588800,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984588801,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984588803,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984588807,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984588815,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984588831,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984588863,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984588927,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984589055,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984589311,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984589823,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984590847,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984592895,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984596991,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984605183,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984621567,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984654335,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984719871,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3984850943,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3985113087,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3985637375,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3986685951,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3988783103,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3988783104,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3990880256,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3991928832,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992453120,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992715264,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992846336,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992911872,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992944640,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992961024,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992969216,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992973312,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992975360,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992976384,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992976896,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977152,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977280,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977344,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977376,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977392,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977400,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977404,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977406,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(3992977407,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2127649826,32,FLEN) -NAN_BOXED(3223094241,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644416,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644417,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644419,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644423,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644431,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644447,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644479,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644543,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644671,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644927,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323645439,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323646463,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323648511,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323652607,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323660799,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323677183,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323709951,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323775487,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323906559,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2324168703,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2324692991,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2325741567,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2327838719,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2327838720,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2329935872,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2330984448,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331508736,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331770880,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331901952,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331967488,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332000256,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332016640,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332024832,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332028928,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332030976,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032000,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032512,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032768,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032896,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032960,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032992,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033008,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033016,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033020,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033022,32,FLEN) -NAN_BOXED(2127706017,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033023,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777216,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777217,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777219,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777223,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777231,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777247,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777279,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777343,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777471,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777727,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16778239,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16779263,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16781311,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16785407,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16793599,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16809983,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16842751,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16908287,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17039359,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17301503,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(17825791,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(18874367,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(20971519,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(20971520,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(23068672,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24117248,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24641536,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(24903680,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25034752,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25100288,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25133056,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25149440,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25157632,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25161728,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25163776,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25164800,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165312,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165568,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165696,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165760,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165792,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165808,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165816,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165820,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165822,32,FLEN) -NAN_BOXED(2127732274,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165823,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733056,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733057,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733059,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733063,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733071,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733087,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733119,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733183,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733311,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994733567,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994734079,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994735103,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994737151,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994741247,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994749439,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994765823,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994798591,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994864127,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2994995199,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2995257343,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2995781631,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2996830207,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2998927359,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(2998927360,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3001024512,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3002073088,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3002597376,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3002859520,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3002990592,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003056128,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003088896,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003105280,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003113472,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003117568,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003119616,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003120640,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121152,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121408,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121536,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121600,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121632,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121648,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121656,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121660,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121662,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3003121663,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2127734231,32,FLEN) -NAN_BOXED(2152580979,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994944,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994945,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994947,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994951,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994959,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994975,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995007,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995071,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995199,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995455,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995967,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150996991,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150999039,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151003135,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151011327,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151027711,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151060479,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151126015,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151257087,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151519231,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(152043519,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(153092095,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(155189247,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(155189248,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(157286400,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(158334976,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(158859264,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159121408,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159252480,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159318016,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159350784,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159367168,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159375360,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159379456,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159381504,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159382528,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383040,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383296,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383424,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383488,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383520,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383536,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383544,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383548,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383550,32,FLEN) -NAN_BOXED(2127748870,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383551,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867200,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867201,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867203,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867207,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867215,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867231,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867263,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867327,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867455,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867711,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306868223,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306869247,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306871295,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306875391,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306883583,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306899967,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306932735,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306998271,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307129343,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307391487,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307915775,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2308964351,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2311061503,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2311061504,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2313158656,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314207232,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314731520,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314993664,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315124736,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315190272,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315223040,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315239424,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315247616,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315251712,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315253760,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315254784,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255296,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255552,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255680,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255744,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255776,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255792,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255800,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255804,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255806,32,FLEN) -NAN_BOXED(2127802309,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255807,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492416,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492417,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492419,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492423,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492431,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492447,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492479,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492543,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492671,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492927,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226493439,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226494463,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226496511,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226500607,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226508799,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226525183,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226557951,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226623487,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226754559,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(227016703,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(227540991,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(228589567,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(230686719,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(230686720,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(232783872,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(233832448,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234356736,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234618880,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234749952,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234815488,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234848256,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234864640,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234872832,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234876928,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234878976,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880000,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880512,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880768,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880896,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880960,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234880992,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881008,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881016,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881020,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881022,32,FLEN) -NAN_BOXED(2127833929,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881023,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887436800,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887436801,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887436803,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887436807,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887436815,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887436831,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887436863,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887436927,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887437055,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887437311,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887437823,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887438847,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887440895,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887444991,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887453183,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887469567,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887502335,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887567871,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887698943,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1887961087,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1888485375,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1889533951,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1891631103,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1891631104,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1893728256,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1894776832,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895301120,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895563264,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895694336,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895759872,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895792640,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895809024,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895817216,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895821312,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895823360,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895824384,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895824896,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825152,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825280,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825344,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825376,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825392,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825400,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825404,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825406,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(1895825407,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2127851063,32,FLEN) -NAN_BOXED(1075462325,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483663,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483679,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483711,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483775,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483903,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484159,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484671,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147485695,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147487743,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147491839,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147500031,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147516415,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147549183,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147614719,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147745791,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148007935,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148532223,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149580799,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677951,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677952,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153775104,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154823680,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155347968,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155610112,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155741184,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155806720,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155839488,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155855872,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155864064,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155868160,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155870208,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871232,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871744,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872000,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872128,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872192,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872224,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872240,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2127933357,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872255,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039424,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039425,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039427,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039431,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039439,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039455,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039487,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039551,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039679,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800039935,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800040447,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800041471,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800043519,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800047615,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800055807,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800072191,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800104959,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800170495,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800301567,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3800563711,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3801087999,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3802136575,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3804233727,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3804233728,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3806330880,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3807379456,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3807903744,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808165888,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808296960,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808362496,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808395264,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808411648,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808419840,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808423936,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808425984,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808427008,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808427520,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808427776,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808427904,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808427968,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808428000,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808428016,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808428024,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808428028,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808428030,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(3808428031,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2127976315,32,FLEN) -NAN_BOXED(3222855835,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549376,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549377,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549379,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549383,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549391,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549407,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549439,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549503,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549631,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549887,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184550399,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184551423,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184553471,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184557567,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184565759,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184582143,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184614911,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184680447,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184811519,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(185073663,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(185597951,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(186646527,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(188743679,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(188743680,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(190840832,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(191889408,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192413696,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192675840,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192806912,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192872448,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192905216,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192921600,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192929792,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192933888,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192935936,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192936960,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937472,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937728,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937856,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937920,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937952,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937968,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937976,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937980,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937982,32,FLEN) -NAN_BOXED(2128017387,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937983,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919104,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919105,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919107,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919111,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919119,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919135,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919167,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919231,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919359,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919615,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415920127,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415921151,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415923199,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415927295,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415935487,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415951871,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415984639,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416050175,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416181247,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416443391,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2416967679,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2418016255,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2420113407,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2420113408,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2422210560,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2423259136,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2423783424,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424045568,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424176640,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424242176,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424274944,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424291328,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424299520,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424303616,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424305664,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424306688,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307200,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307456,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307584,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307648,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307680,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307696,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307704,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307708,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307710,32,FLEN) -NAN_BOXED(2128120327,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307711,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364672,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364673,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364675,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364679,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364687,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364703,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364735,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364799,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364927,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382365183,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382365695,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382366719,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382368767,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382372863,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382381055,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382397439,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382430207,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382495743,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382626815,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382888959,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2383413247,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2384461823,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2386558975,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2386558976,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2388656128,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2389704704,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390228992,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390491136,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390622208,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390687744,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390720512,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390736896,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390745088,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390749184,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390751232,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390752256,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390752768,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753024,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753152,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753216,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753248,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753264,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753272,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753276,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753278,32,FLEN) -NAN_BOXED(2128173398,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753279,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321888768,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321888769,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321888771,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321888775,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321888783,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321888799,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321888831,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321888895,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321889023,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321889279,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321889791,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321890815,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321892863,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321896959,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321905151,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321921535,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3321954303,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3322019839,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3322150911,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3322413055,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3322937343,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3323985919,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3326083071,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3326083072,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3328180224,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3329228800,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3329753088,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330015232,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330146304,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330211840,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330244608,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330260992,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330269184,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330273280,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330275328,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330276352,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330276864,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277120,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277248,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277312,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277344,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277360,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277368,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277372,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277374,32,FLEN) -NAN_BOXED(2128210010,32,FLEN) -NAN_BOXED(2152411157,32,FLEN) -NAN_BOXED(3330277375,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738112,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738113,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738115,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738119,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738127,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738143,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738175,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738239,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738367,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843738623,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843739135,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843740159,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843742207,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843746303,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843754495,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843770879,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843803647,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2843869183,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2844000255,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2844262399,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2844786687,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2845835263,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2847932415,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2847932416,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2850029568,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2851078144,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2851602432,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2851864576,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2851995648,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852061184,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852093952,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852110336,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852118528,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852122624,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852124672,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852125696,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126208,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126464,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126592,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126656,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126688,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126704,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126712,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126716,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126718,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(2852126719,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2128210124,32,FLEN) -NAN_BOXED(2152411117,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981120,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981121,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981123,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981127,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981135,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981151,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981183,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981247,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981375,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981631,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222982143,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222983167,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222985215,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222989311,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222997503,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223013887,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223046655,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223112191,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223243263,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223505407,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2224029695,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2225078271,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2227175423,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2227175424,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2229272576,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2230321152,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2230845440,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231107584,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231238656,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231304192,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231336960,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231353344,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231361536,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231365632,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231367680,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231368704,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369216,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369472,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369600,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369664,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369696,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369712,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369720,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369724,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369726,32,FLEN) -NAN_BOXED(2128211090,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369727,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850688,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850689,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850691,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850695,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850703,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850719,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850751,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850815,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140850943,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140851199,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140851711,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140852735,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140854783,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140858879,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140867071,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140883455,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140916223,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1140981759,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1141112831,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1141374975,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1141899263,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1142947839,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1145044991,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1145044992,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1147142144,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1148190720,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1148715008,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1148977152,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149108224,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149173760,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149206528,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149222912,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149231104,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149235200,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149237248,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149238272,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149238784,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239040,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239168,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239232,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239264,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239280,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239288,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239292,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239294,32,FLEN) -NAN_BOXED(2128267910,32,FLEN) -NAN_BOXED(4907611,32,FLEN) -NAN_BOXED(1149239295,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033024,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033025,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033027,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033031,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033039,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033055,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033087,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033151,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033279,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033535,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332034047,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332035071,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332037119,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332041215,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332049407,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332065791,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332098559,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332164095,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332295167,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332557311,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2333081599,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2334130175,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2336227327,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2336227328,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2338324480,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2339373056,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2339897344,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340159488,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340290560,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340356096,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340388864,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340405248,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340413440,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340417536,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340419584,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340420608,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421120,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421376,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421504,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421568,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421600,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421616,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421624,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421628,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421630,32,FLEN) -NAN_BOXED(2128280445,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421631,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089984,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089985,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089987,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089991,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089999,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090015,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090047,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090111,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090239,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090495,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290091007,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290092031,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290094079,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290098175,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290106367,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290122751,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290155519,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290221055,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290352127,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290614271,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2291138559,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2292187135,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2294284287,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2294284288,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2296381440,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2297430016,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2297954304,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298216448,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298347520,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298413056,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298445824,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298462208,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298470400,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298474496,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298476544,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298477568,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478080,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478336,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478464,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478528,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478560,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478576,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478584,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478588,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478590,32,FLEN) -NAN_BOXED(2128318953,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478591,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801472,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801473,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801475,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801479,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801487,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801503,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801535,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801599,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801727,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269801983,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269802495,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269803519,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269805567,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269809663,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269817855,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269834239,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269867007,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4269932543,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4270063615,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4270325759,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4270850047,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4271898623,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4273995775,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4273995776,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4276092928,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4277141504,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4277665792,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4277927936,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278059008,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278124544,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278157312,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278173696,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278181888,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278185984,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278188032,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278189056,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278189568,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278189824,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278189952,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190016,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190048,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190064,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190072,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190076,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190078,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190079,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2128373940,32,FLEN) -NAN_BOXED(3222580039,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141888,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141889,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141891,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141895,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141903,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141919,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141951,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142015,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142143,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142399,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142911,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399143935,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399145983,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399150079,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399158271,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399174655,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399207423,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399272959,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399404031,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399666175,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2400190463,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2401239039,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2403336191,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2403336192,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2405433344,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2406481920,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407006208,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407268352,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407399424,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407464960,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407497728,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407514112,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407522304,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407526400,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407528448,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407529472,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407529984,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530240,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530368,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530432,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530464,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530480,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530488,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530492,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530494,32,FLEN) -NAN_BOXED(2128415947,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530495,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110417920,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110417921,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110417923,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110417927,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110417935,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110417951,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110417983,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110418047,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110418175,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110418431,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110418943,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110419967,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110422015,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110426111,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110434303,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110450687,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110483455,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110548991,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110680063,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4110942207,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4111466495,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4112515071,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4114612223,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4114612224,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4116709376,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4117757952,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118282240,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118544384,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118675456,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118740992,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118773760,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118790144,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118798336,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118802432,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118804480,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118805504,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806016,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806272,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806400,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806464,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806496,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806512,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806520,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806524,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806526,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4118806527,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2128566065,32,FLEN) -NAN_BOXED(3222452148,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994944,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994945,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994947,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994951,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994959,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994975,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995007,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995071,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995199,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995455,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150995967,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150996991,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150999039,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151003135,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151011327,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151027711,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151060479,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151126015,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151257087,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(151519231,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(152043519,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(153092095,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(155189247,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(155189248,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(157286400,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(158334976,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(158859264,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159121408,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159252480,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159318016,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159350784,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159367168,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159375360,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159379456,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159381504,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159382528,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383040,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383296,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383424,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383488,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383520,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383536,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383544,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383548,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383550,32,FLEN) -NAN_BOXED(2128599586,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383551,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981120,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981121,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981123,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981127,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981135,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981151,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981183,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981247,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981375,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981631,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222982143,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222983167,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222985215,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222989311,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222997503,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223013887,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223046655,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223112191,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223243263,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223505407,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2224029695,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2225078271,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2227175423,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2227175424,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2229272576,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2230321152,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2230845440,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231107584,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231238656,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231304192,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231336960,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231353344,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231361536,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231365632,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231367680,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231368704,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369216,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369472,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369600,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369664,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369696,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369712,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369720,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369724,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369726,32,FLEN) -NAN_BOXED(2128656959,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369727,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729808896,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729808897,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729808899,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729808903,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729808911,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729808927,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729808959,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729809023,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729809151,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729809407,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729809919,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729810943,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729812991,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729817087,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729825279,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729841663,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729874431,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(729939967,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(730071039,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(730333183,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(730857471,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(731906047,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(734003199,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(734003200,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(736100352,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(737148928,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(737673216,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(737935360,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738066432,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738131968,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738164736,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738181120,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738189312,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738193408,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738195456,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738196480,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738196992,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197248,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197376,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197440,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197472,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197488,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197496,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197500,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197502,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(738197503,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2128703434,32,FLEN) -NAN_BOXED(4762942,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587456,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587457,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587459,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587463,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587471,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587487,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587519,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587583,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587711,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587967,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365588479,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365589503,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365591551,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365595647,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365603839,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365620223,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365652991,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365718527,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365849599,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2366111743,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2366636031,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2367684607,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2369781759,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2369781760,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2371878912,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2372927488,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373451776,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373713920,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373844992,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373910528,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373943296,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373959680,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373967872,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373971968,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373974016,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975040,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975552,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975808,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975936,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976000,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976032,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976048,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976056,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976060,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976062,32,FLEN) -NAN_BOXED(2128717083,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976063,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743168,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743169,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743171,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743175,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743183,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743199,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743231,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743295,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743423,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692743679,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692744191,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692745215,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692747263,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692751359,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692759551,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692775935,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692808703,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2692874239,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2693005311,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2693267455,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2693791743,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2694840319,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2696937471,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2696937472,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2699034624,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2700083200,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2700607488,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2700869632,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701000704,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701066240,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701099008,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701115392,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701123584,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701127680,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701129728,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701130752,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131264,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131520,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131648,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131712,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131744,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131760,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131768,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131772,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131774,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(2701131775,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2128784039,32,FLEN) -NAN_BOXED(2152220745,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080374784,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080374785,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080374787,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080374791,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080374799,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080374815,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080374847,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080374911,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080375039,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080375295,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080375807,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080376831,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080378879,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080382975,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080391167,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080407551,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080440319,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080505855,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080636927,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2080899071,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2081423359,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2082471935,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2084569087,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2084569088,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2086666240,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2087714816,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088239104,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088501248,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088632320,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088697856,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088730624,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088747008,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088755200,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088759296,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088761344,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088762368,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088762880,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763136,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763264,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763328,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763360,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763376,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763384,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763388,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763390,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2088763391,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2128804143,32,FLEN) -NAN_BOXED(1074814605,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214016,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214017,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214019,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214023,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214031,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214047,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214079,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214143,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214271,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904214527,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904215039,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904216063,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904218111,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904222207,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904230399,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904246783,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904279551,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904345087,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904476159,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1904738303,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1905262591,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1906311167,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1908408319,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1908408320,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1910505472,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1911554048,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912078336,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912340480,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912471552,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912537088,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912569856,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912586240,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912594432,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912598528,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912600576,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912601600,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602112,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602368,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602496,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602560,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602592,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602608,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602616,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602620,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602622,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(1912602623,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2128853037,32,FLEN) -NAN_BOXED(1074783607,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852032,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852033,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852035,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852039,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852047,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852063,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852095,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852159,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852287,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759852543,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759853055,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759854079,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759856127,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759860223,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759868415,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759884799,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759917567,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2759983103,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2760114175,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2760376319,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2760900607,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2761949183,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2764046335,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2764046336,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2766143488,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2767192064,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2767716352,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2767978496,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768109568,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768175104,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768207872,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768224256,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768232448,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768236544,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768238592,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768239616,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240128,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240384,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240512,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240576,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240608,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240624,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240632,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240636,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240638,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(2768240639,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2128892233,32,FLEN) -NAN_BOXED(2152186492,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138176,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138177,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138179,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138183,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138191,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138207,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138239,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138303,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138431,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169138687,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169139199,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169140223,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169142271,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169146367,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169154559,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169170943,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169203711,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169269247,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169400319,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4169662463,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4170186751,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4171235327,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4173332479,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4173332480,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4175429632,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4176478208,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177002496,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177264640,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177395712,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177461248,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177494016,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177510400,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177518592,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177522688,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177524736,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177525760,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526272,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526528,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526656,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526720,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526752,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526768,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526776,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526780,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526782,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4177526783,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2128913196,32,FLEN) -NAN_BOXED(3222229393,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141888,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141889,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141891,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141895,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141903,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141919,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141951,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142015,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142143,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142399,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142911,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399143935,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399145983,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399150079,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399158271,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399174655,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399207423,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399272959,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399404031,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399666175,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2400190463,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2401239039,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2403336191,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2403336192,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2405433344,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2406481920,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407006208,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407268352,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407399424,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407464960,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407497728,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407514112,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407522304,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407526400,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407528448,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407529472,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407529984,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530240,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530368,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530432,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530464,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530480,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530488,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530492,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530494,32,FLEN) -NAN_BOXED(2128934098,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530495,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364672,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364673,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364675,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364679,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364687,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364703,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364735,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364799,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364927,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382365183,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382365695,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382366719,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382368767,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382372863,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382381055,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382397439,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382430207,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382495743,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382626815,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382888959,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2383413247,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2384461823,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2386558975,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2386558976,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2388656128,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2389704704,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390228992,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390491136,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390622208,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390687744,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390720512,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390736896,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390745088,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390749184,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390751232,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390752256,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390752768,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753024,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753152,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753216,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753248,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753264,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753272,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753276,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753278,32,FLEN) -NAN_BOXED(2128935265,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753279,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130432,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130433,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130435,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130439,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130447,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130463,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130495,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130559,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130687,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082130943,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082131455,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082132479,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082134527,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082138623,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082146815,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082163199,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082195967,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082261503,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082392575,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1082654719,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1083179007,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1084227583,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1086324735,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1086324736,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1088421888,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1089470464,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1089994752,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090256896,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090387968,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090453504,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090486272,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090502656,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090510848,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090514944,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090516992,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090518016,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090518528,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090518784,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090518912,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090518976,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090519008,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090519024,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090519032,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090519036,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090519038,32,FLEN) -NAN_BOXED(2128940249,32,FLEN) -NAN_BOXED(4687801,32,FLEN) -NAN_BOXED(1090519039,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887424,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887425,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887427,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887431,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887439,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887455,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887487,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887551,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887679,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702887935,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702888447,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702889471,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702891519,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702895615,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702903807,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702920191,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1702952959,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1703018495,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1703149567,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1703411711,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1703935999,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1704984575,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1707081727,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1707081728,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1709178880,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1710227456,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1710751744,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711013888,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711144960,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711210496,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711243264,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711259648,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711267840,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711271936,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711273984,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711275008,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711275520,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711275776,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711275904,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711275968,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711276000,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711276016,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711276024,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711276028,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711276030,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(1711276031,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2128942870,32,FLEN) -NAN_BOXED(1074727181,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426688,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426689,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426691,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426695,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426703,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426719,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426751,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426815,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426943,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189427199,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189427711,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189428735,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189430783,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189434879,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189443071,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189459455,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189492223,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189557759,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189688831,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189950975,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2190475263,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2191523839,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2193620991,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2193620992,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2195718144,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2196766720,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197291008,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197553152,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197684224,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197749760,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197782528,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197798912,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197807104,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197811200,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197813248,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197814272,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197814784,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815040,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815168,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815232,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815264,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815280,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815288,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815292,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815294,32,FLEN) -NAN_BOXED(2129032290,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815295,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654528,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654529,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654531,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654535,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654543,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654559,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654591,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654655,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021654783,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021655039,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021655551,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021656575,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021658623,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021662719,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021670911,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021687295,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021720063,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021785599,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2021916671,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2022178815,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2022703103,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2023751679,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2025848831,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2025848832,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2027945984,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2028994560,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2029518848,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2029780992,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2029912064,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2029977600,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030010368,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030026752,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030034944,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030039040,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030041088,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030042112,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030042624,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030042880,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030043008,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030043072,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030043104,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030043120,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030043128,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030043132,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030043134,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2030043135,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2129059115,32,FLEN) -NAN_BOXED(1074655160,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217728,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217729,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217731,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217735,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217743,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217759,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217791,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217855,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217983,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134218239,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134218751,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134219775,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134221823,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134225919,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134234111,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134250495,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134283263,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134348799,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134479871,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134742015,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(135266303,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(136314879,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(138412031,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(138412032,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(140509184,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(141557760,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142082048,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142344192,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142475264,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142540800,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142573568,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142589952,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142598144,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142602240,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142604288,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142605312,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142605824,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606080,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606208,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606272,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606304,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606320,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606328,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606332,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606334,32,FLEN) -NAN_BOXED(2129076577,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606335,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026624,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026625,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026627,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026631,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026639,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026655,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026687,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026751,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864026879,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864027135,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864027647,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864028671,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864030719,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864034815,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864043007,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864059391,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864092159,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864157695,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864288767,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(864550911,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(865075199,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(866123775,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(868220927,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(868220928,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(870318080,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(871366656,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(871890944,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872153088,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872284160,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872349696,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872382464,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872398848,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872407040,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872411136,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872413184,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872414208,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872414720,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872414976,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872415104,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872415168,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872415200,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872415216,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872415224,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872415228,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872415230,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(872415231,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2129083331,32,FLEN) -NAN_BOXED(4643540,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198848,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198849,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198851,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198855,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198863,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198879,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198911,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198975,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199103,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199359,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357199871,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357200895,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357202943,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357207039,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357215231,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357231615,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357264383,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357329919,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357460991,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357723135,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2358247423,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2359295999,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2361393151,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2361393152,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2363490304,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2364538880,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365063168,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365325312,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365456384,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365521920,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365554688,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365571072,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365579264,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365583360,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365585408,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365586432,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365586944,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587200,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587328,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587392,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587424,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587440,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587448,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587452,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587454,32,FLEN) -NAN_BOXED(2129108878,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587455,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235584,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235585,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235587,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235591,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235599,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235615,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235647,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235711,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919235839,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919236095,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919236607,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919237631,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919239679,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919243775,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919251967,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919268351,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919301119,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919366655,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919497727,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2919759871,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2920284159,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2921332735,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2923429887,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2923429888,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2925527040,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2926575616,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927099904,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927362048,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927493120,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927558656,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927591424,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927607808,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927616000,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927620096,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927622144,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927623168,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927623680,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927623936,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927624064,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927624128,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927624160,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927624176,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927624184,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927624188,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927624190,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(2927624191,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2129128804,32,FLEN) -NAN_BOXED(2152113296,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524096,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524097,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524099,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524103,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524111,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524127,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524159,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524223,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524351,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939524607,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939525119,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939526143,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939528191,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939532287,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939540479,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939556863,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939589631,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939655167,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(939786239,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(940048383,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(940572671,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(941621247,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(943718399,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(943718400,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(945815552,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(946864128,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947388416,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947650560,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947781632,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947847168,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947879936,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947896320,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947904512,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947908608,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947910656,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947911680,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912192,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912448,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912576,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912640,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912672,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912688,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912696,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912700,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912702,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(947912703,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2129167226,32,FLEN) -NAN_BOXED(4617974,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312768,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312769,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312771,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312775,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312783,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312799,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312831,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312895,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313023,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313279,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313791,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273314815,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273316863,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273320959,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273329151,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273345535,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273378303,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273443839,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273574911,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273837055,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2274361343,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2275409919,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2277507071,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2277507072,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2279604224,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2280652800,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281177088,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281439232,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281570304,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281635840,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281668608,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281684992,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281693184,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281697280,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281699328,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281700352,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281700864,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701120,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701248,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701312,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701344,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701360,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701368,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701372,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701374,32,FLEN) -NAN_BOXED(2129215689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701375,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443200,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443201,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443203,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443207,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443215,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443231,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443263,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443327,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443455,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355443711,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355444223,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355445247,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355447295,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355451391,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355459583,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355475967,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355508735,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355574271,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355705343,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3355967487,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3356491775,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3357540351,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3359637503,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3359637504,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3361734656,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3362783232,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363307520,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363569664,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363700736,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363766272,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363799040,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363815424,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363823616,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363827712,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363829760,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363830784,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831296,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831552,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831680,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831744,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831776,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831792,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831800,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831804,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831806,32,FLEN) -NAN_BOXED(2129219881,32,FLEN) -NAN_BOXED(2152085719,32,FLEN) -NAN_BOXED(3363831807,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562176,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562177,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562179,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562183,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562191,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562207,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562239,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562303,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562431,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120562687,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120563199,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120564223,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120566271,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120570367,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120578559,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120594943,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120627711,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120693247,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3120824319,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3121086463,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3121610751,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3122659327,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3124756479,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3124756480,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3126853632,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3127902208,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128426496,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128688640,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128819712,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128885248,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128918016,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128934400,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128942592,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128946688,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128948736,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128949760,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950272,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950528,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950656,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950720,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950752,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950768,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950776,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950780,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950782,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3128950783,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2129239087,32,FLEN) -NAN_BOXED(2152079946,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720256,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720257,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720259,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720263,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720271,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720287,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720319,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720383,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720511,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720767,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58721279,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58722303,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58724351,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58728447,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58736639,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58753023,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58785791,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58851327,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58982399,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(59244543,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(59768831,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(60817407,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(62914559,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(62914560,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65011712,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66060288,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66584576,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66846720,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66977792,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67043328,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67076096,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67092480,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67100672,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67104768,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67106816,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67107840,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108352,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108608,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108736,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108800,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108832,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108848,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108856,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108860,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108862,32,FLEN) -NAN_BOXED(2129274595,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108863,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326592,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326593,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326595,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326599,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326607,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326623,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326655,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326719,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326847,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201327103,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201327615,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201328639,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201330687,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201334783,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201342975,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201359359,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201392127,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201457663,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201588735,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201850879,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(202375167,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(203423743,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(205520895,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(205520896,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(207618048,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(208666624,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209190912,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209453056,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209584128,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209649664,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209682432,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209698816,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209707008,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209711104,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209713152,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714176,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714688,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714944,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715072,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715136,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715168,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715184,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715192,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715196,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715198,32,FLEN) -NAN_BOXED(2129283381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715199,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675965952,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675965953,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675965955,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675965959,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675965967,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675965983,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675966015,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675966079,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675966207,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675966463,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675966975,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675967999,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675970047,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675974143,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675982335,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2675998719,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2676031487,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2676097023,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2676228095,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2676490239,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2677014527,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2678063103,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2680160255,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2680160256,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2682257408,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2683305984,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2683830272,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684092416,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684223488,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684289024,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684321792,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684338176,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684346368,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684350464,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684352512,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684353536,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354048,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354304,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354432,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354496,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354528,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354544,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354552,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354556,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354558,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(2684354559,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2129283781,32,FLEN) -NAN_BOXED(2152066567,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497472,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497473,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497475,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497479,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497487,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497503,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497535,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497599,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497727,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75497983,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75498495,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75499519,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75501567,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75505663,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75513855,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75530239,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75563007,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75628543,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(75759615,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(76021759,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(76546047,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(77594623,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(79691775,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(79691776,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(81788928,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(82837504,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83361792,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83623936,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83755008,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83820544,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83853312,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83869696,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83877888,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83881984,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83884032,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885056,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885568,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885824,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83885952,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886016,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886048,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886064,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886072,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886076,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886078,32,FLEN) -NAN_BOXED(2129324933,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886079,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103784960,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103784961,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103784963,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103784967,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103784975,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103784991,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103785023,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103785087,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103785215,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103785471,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103785983,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103787007,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103789055,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103793151,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103801343,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103817727,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103850495,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3103916031,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3104047103,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3104309247,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3104833535,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3105882111,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3107979263,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3107979264,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3110076416,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3111124992,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3111649280,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3111911424,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112042496,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112108032,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112140800,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112157184,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112165376,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112169472,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112171520,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112172544,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173056,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173312,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173440,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173504,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173536,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173552,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173560,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173564,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173566,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3112173567,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2129332259,32,FLEN) -NAN_BOXED(2152052144,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829120,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829121,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829123,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829127,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829135,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829151,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829183,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829247,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829375,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829631,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125830143,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125831167,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125833215,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125837311,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125845503,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125861887,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125894655,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125960191,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126091263,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126353407,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126877695,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127926271,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(130023423,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(130023424,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(132120576,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133169152,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133693440,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133955584,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134086656,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134152192,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134184960,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134201344,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134209536,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134213632,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134215680,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134216704,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217216,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217472,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217600,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217664,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217696,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217712,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217720,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217724,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217726,32,FLEN) -NAN_BOXED(2129466605,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217727,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942645760,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942645761,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942645763,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942645767,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942645775,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942645791,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942645823,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942645887,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942646015,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942646271,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942646783,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942647807,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942649855,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942653951,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942662143,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942678527,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942711295,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942776831,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3942907903,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3943170047,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3943694335,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3944742911,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3946840063,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3946840064,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3948937216,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3949985792,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3950510080,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3950772224,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3950903296,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3950968832,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951001600,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951017984,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951026176,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951030272,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951032320,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951033344,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951033856,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034112,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034240,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034304,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034336,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034352,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034360,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034364,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034366,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(3951034367,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2129500204,32,FLEN) -NAN_BOXED(3221875306,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021568,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021569,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021571,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021575,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021583,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021599,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021631,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021695,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015021823,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015022079,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015022591,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015023615,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015025663,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015029759,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015037951,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015054335,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015087103,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015152639,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015283711,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1015545855,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1016070143,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1017118719,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1019215871,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1019215872,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1021313024,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1022361600,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1022885888,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023148032,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023279104,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023344640,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023377408,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023393792,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023401984,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023406080,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023408128,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023409152,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023409664,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023409920,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023410048,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023410112,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023410144,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023410160,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023410168,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023410172,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023410174,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1023410175,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2129547125,32,FLEN) -NAN_BOXED(4505644,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658240,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658241,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658243,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658247,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658255,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658271,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658303,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658367,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658495,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658751,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251659263,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251660287,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251662335,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251666431,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251674623,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251691007,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251723775,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251789311,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251920383,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(252182527,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(252706815,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(253755391,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255852543,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255852544,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(257949696,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(258998272,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259522560,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259784704,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259915776,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(259981312,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260014080,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260030464,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260038656,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260042752,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260044800,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260045824,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046336,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046592,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046720,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046784,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046816,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046832,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046840,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046844,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046846,32,FLEN) -NAN_BOXED(2129583300,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046847,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810240,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810241,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810243,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810247,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810255,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810271,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810303,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810367,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810495,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810751,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348811263,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348812287,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348814335,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348818431,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348826623,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348843007,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348875775,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348941311,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349072383,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349334527,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349858815,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2350907391,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2353004543,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2353004544,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2355101696,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356150272,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356674560,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356936704,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357067776,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357133312,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357166080,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357182464,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357190656,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357194752,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357196800,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357197824,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198336,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198592,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198720,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198784,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198816,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198832,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198840,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198844,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198846,32,FLEN) -NAN_BOXED(2129617969,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198847,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103808,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103809,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103811,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103815,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103823,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103839,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103871,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103935,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104063,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104319,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104831,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218105855,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218107903,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218111999,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218120191,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218136575,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218169343,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218234879,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218365951,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218628095,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(219152383,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(220200959,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(222298111,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(222298112,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(224395264,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(225443840,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(225968128,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226230272,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226361344,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226426880,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226459648,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226476032,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226484224,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226488320,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226490368,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226491392,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226491904,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492160,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492288,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492352,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492384,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492400,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492408,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492412,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492414,32,FLEN) -NAN_BOXED(2129701695,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492415,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190080,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190095,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190111,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190143,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190207,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190335,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278190591,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278191103,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278192127,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278194175,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278198271,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278206463,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278222847,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278255615,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278321151,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278452223,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4278714367,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4279238655,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4280287231,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4282384383,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4282384384,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4284481536,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4285530112,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286054400,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286316544,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286447616,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286513152,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286545920,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286562304,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286570496,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286574592,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286576640,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286577664,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578176,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578432,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578560,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578624,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578656,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578672,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2129711702,32,FLEN) -NAN_BOXED(3221754183,32,FLEN) -NAN_BOXED(4286578687,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282432,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282433,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282435,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282439,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282447,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282463,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282495,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282559,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282687,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179282943,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179283455,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179284479,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179286527,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179290623,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179298815,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179315199,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179347967,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179413503,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179544575,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3179806719,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3180331007,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3181379583,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3183476735,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3183476736,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3185573888,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3186622464,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187146752,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187408896,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187539968,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187605504,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187638272,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187654656,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187662848,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187666944,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187668992,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187670016,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187670528,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187670784,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187670912,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187670976,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187671008,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187671024,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187671032,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187671036,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187671038,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3187671039,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2129724270,32,FLEN) -NAN_BOXED(2151938760,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200192,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200193,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200195,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200199,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200207,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200223,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200255,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200319,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200447,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976200703,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976201215,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976202239,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976204287,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976208383,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976216575,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976232959,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976265727,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976331263,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976462335,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3976724479,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3977248767,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3978297343,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3980394495,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3980394496,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3982491648,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3983540224,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984064512,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984326656,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984457728,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984523264,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984556032,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984572416,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984580608,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984584704,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984586752,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984587776,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588288,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588544,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588672,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588736,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588768,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588784,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588792,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588796,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588798,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(3984588799,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2129756514,32,FLEN) -NAN_BOXED(3221728935,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217728,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217729,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217731,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217735,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217743,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217759,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217791,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217855,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217983,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134218239,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134218751,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134219775,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134221823,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134225919,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134234111,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134250495,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134283263,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134348799,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134479871,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134742015,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(135266303,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(136314879,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(138412031,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(138412032,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(140509184,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(141557760,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142082048,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142344192,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142475264,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142540800,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142573568,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142589952,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142598144,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142602240,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142604288,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142605312,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142605824,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606080,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606208,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606272,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606304,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606320,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606328,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606332,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606334,32,FLEN) -NAN_BOXED(2129782836,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606335,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103808,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103809,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103811,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103815,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103823,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103839,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103871,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103935,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104063,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104319,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218104831,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218105855,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218107903,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218111999,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218120191,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218136575,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218169343,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218234879,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218365951,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218628095,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(219152383,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(220200959,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(222298111,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(222298112,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(224395264,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(225443840,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(225968128,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226230272,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226361344,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226426880,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226459648,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226476032,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226484224,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226488320,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226490368,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226491392,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226491904,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492160,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492288,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492352,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492384,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492400,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492408,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492412,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492414,32,FLEN) -NAN_BOXED(2129841883,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(226492415,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929216,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929217,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929219,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929223,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929231,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929247,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929279,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929343,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929471,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113929727,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113930239,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113931263,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113933311,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113937407,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113945599,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113961983,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2113994751,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2114060287,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2114191359,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2114453503,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2114977791,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2116026367,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2118123519,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2118123520,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2120220672,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2121269248,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2121793536,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122055680,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122186752,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122252288,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122285056,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122301440,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122309632,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122313728,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122315776,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122316800,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317312,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317568,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317696,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317760,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317792,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317808,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317816,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317820,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317822,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2122317823,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2129853620,32,FLEN) -NAN_BOXED(1074191064,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249408,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249409,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249411,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249415,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249423,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249439,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249471,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249535,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249663,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847249919,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847250431,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847251455,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847253503,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847257599,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847265791,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847282175,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847314943,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847380479,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847511551,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(847773695,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(848297983,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(849346559,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(851443711,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(851443712,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(853540864,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(854589440,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855113728,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855375872,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855506944,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855572480,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855605248,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855621632,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855629824,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855633920,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855635968,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855636992,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855637504,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855637760,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855637888,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855637952,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855637984,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855638000,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855638008,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855638012,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855638014,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(855638015,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2129889542,32,FLEN) -NAN_BOXED(4408979,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122317824,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122317825,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122317827,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122317831,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122317839,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122317855,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122317887,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122317951,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122318079,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122318335,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122318847,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122319871,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122321919,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122326015,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122334207,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122350591,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122383359,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122448895,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122579967,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2122842111,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2123366399,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2124414975,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2126512127,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2126512128,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2128609280,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2129657856,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130182144,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130444288,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130575360,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130640896,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130673664,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130690048,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130698240,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130702336,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130704384,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130705408,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130705920,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706176,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706304,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706368,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706400,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706416,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706424,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706428,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706430,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706431,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2129960965,32,FLEN) -NAN_BOXED(1074131888,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702720,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702721,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702723,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702727,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702735,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702751,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702783,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702847,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900702975,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900703231,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900703743,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900704767,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900706815,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900710911,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900719103,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900735487,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900768255,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900833791,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3900964863,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3901227007,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3901751295,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3902799871,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3904897023,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3904897024,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3906994176,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3908042752,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3908567040,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3908829184,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3908960256,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909025792,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909058560,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909074944,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909083136,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909087232,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909089280,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909090304,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909090816,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091072,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091200,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091264,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091296,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091312,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091320,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091324,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091326,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(3909091327,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2129967483,32,FLEN) -NAN_BOXED(3221611968,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(63,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(511,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1023,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2047,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4095,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8191,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16383,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32767,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65535,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(131071,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(524287,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1048575,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2097151,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194303,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194304,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6291456,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7340032,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7864320,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8126464,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8257536,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8323072,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8355840,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8372224,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8380416,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8384512,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8386560,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8387584,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388096,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388352,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388480,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388544,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388576,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388592,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2129994159,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388607,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269632,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269633,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269635,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269639,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269647,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269663,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269695,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269759,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269887,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243270143,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243270655,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243271679,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243273727,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243277823,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243286015,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243302399,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243335167,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243400703,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243531775,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243793919,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(244318207,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(245366783,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(247463935,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(247463936,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(249561088,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(250609664,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251133952,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251396096,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251527168,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251592704,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251625472,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251641856,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251650048,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251654144,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251656192,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657216,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657728,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657984,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658112,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658176,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658208,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658224,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658232,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658236,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658238,32,FLEN) -NAN_BOXED(2130007119,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658239,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715200,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715201,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715203,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715207,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715215,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715231,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715263,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715327,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715455,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715711,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209716223,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209717247,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209719295,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209723391,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209731583,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209747967,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209780735,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209846271,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209977343,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(210239487,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(210763775,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(211812351,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(213909503,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(213909504,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(216006656,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217055232,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217579520,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217841664,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217972736,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218038272,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218071040,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218087424,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218095616,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218099712,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218101760,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218102784,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103296,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103552,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103680,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103744,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103776,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103792,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103800,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103804,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103806,32,FLEN) -NAN_BOXED(2130045997,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103807,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644416,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644417,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644419,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644423,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644431,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644447,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644479,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644543,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644671,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644927,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323645439,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323646463,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323648511,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323652607,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323660799,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323677183,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323709951,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323775487,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323906559,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2324168703,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2324692991,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2325741567,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2327838719,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2327838720,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2329935872,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2330984448,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331508736,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331770880,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331901952,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331967488,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332000256,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332016640,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332024832,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332028928,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332030976,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032000,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032512,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032768,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032896,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032960,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032992,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033008,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033016,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033020,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033022,32,FLEN) -NAN_BOXED(2130060439,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033023,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477248,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477249,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477251,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477255,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477263,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477279,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477311,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477375,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477503,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679477759,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679478271,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679479295,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679481343,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679485439,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679493631,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679510015,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679542783,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679608319,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(679739391,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(680001535,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(680525823,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(681574399,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(683671551,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(683671552,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(685768704,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(686817280,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687341568,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687603712,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687734784,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687800320,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687833088,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687849472,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687857664,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687861760,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687863808,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687864832,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865344,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865600,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865728,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865792,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865824,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865840,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865848,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865852,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865854,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(687865855,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130065461,32,FLEN) -NAN_BOXED(4360911,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220416,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220417,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220419,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220423,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220431,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220447,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220479,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220543,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220671,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372220927,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372221439,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372222463,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372224511,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372228607,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372236799,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372253183,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372285951,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372351487,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372482559,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3372744703,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3373268991,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3374317567,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3376414719,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3376414720,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3378511872,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3379560448,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380084736,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380346880,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380477952,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380543488,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380576256,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380592640,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380600832,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380604928,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380606976,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380608000,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380608512,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380608768,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380608896,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380608960,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380608992,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380609008,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380609016,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380609020,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380609022,32,FLEN) -NAN_BOXED(2130139616,32,FLEN) -NAN_BOXED(2151824610,32,FLEN) -NAN_BOXED(3380609023,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391296,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391297,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391299,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391303,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391311,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391327,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391359,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391423,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391551,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246391807,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246392319,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246393343,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246395391,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246399487,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246407679,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246424063,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246456831,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246522367,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246653439,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3246915583,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3247439871,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3248488447,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3250585599,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3250585600,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3252682752,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3253731328,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254255616,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254517760,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254648832,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254714368,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254747136,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254763520,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254771712,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254775808,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254777856,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254778880,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779392,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779648,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779776,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779840,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779872,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779888,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779896,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779900,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779902,32,FLEN) -NAN_BOXED(2130159678,32,FLEN) -NAN_BOXED(2151819244,32,FLEN) -NAN_BOXED(3254779903,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068416,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068417,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068419,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068423,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068431,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068447,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068479,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068543,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068671,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275068927,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275069439,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275070463,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275072511,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275076607,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275084799,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275101183,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275133951,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275199487,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275330559,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1275592703,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1276116991,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1277165567,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1279262719,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1279262720,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1281359872,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1282408448,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1282932736,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283194880,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283325952,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283391488,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283424256,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283440640,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283448832,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283452928,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283454976,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283456000,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283456512,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283456768,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283456896,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283456960,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283456992,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283457008,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283457016,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283457020,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283457022,32,FLEN) -NAN_BOXED(2130260161,32,FLEN) -NAN_BOXED(4308920,32,FLEN) -NAN_BOXED(1283457023,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614080,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614081,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614083,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614087,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614095,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614111,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614143,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614207,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614335,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229614591,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229615103,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229616127,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229618175,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229622271,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229630463,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229646847,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229679615,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229745151,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3229876223,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3230138367,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3230662655,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3231711231,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3233808383,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3233808384,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3235905536,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3236954112,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3237478400,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3237740544,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3237871616,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3237937152,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3237969920,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3237986304,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3237994496,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3237998592,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238000640,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238001664,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002176,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002432,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002560,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002624,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002656,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002672,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002680,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002684,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002686,32,FLEN) -NAN_BOXED(2130376767,32,FLEN) -NAN_BOXED(2151762020,32,FLEN) -NAN_BOXED(3238002687,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435456,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435457,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435459,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435463,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435471,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435487,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435519,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435583,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435711,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435967,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268436479,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268437503,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268439551,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268443647,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268451839,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268468223,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268500991,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268566527,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268697599,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268959743,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(269484031,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(270532607,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(272629759,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(272629760,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(274726912,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(275775488,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276299776,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276561920,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276692992,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276758528,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276791296,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276807680,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276815872,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276819968,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276822016,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823040,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823552,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823808,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823936,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824000,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824032,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824048,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824056,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824060,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824062,32,FLEN) -NAN_BOXED(2130440101,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824063,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845632,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845633,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845635,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845639,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845647,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845663,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845695,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845759,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291845887,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291846143,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291846655,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291847679,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291849727,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291853823,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291862015,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291878399,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291911167,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1291976703,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1292107775,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1292369919,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1292894207,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1293942783,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1296039935,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1296039936,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1298137088,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1299185664,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1299709952,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1299972096,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300103168,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300168704,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300201472,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300217856,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300226048,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300230144,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300232192,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300233216,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300233728,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300233984,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300234112,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300234176,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300234208,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300234224,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300234232,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300234236,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300234238,32,FLEN) -NAN_BOXED(2130478668,32,FLEN) -NAN_BOXED(4252028,32,FLEN) -NAN_BOXED(1300234239,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053248,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053249,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053251,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053255,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053263,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053279,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053311,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053375,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053503,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728053759,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728054271,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728055295,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728057343,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728061439,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728069631,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728086015,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728118783,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728184319,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728315391,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1728577535,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1729101823,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1730150399,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1732247551,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1732247552,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1734344704,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1735393280,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1735917568,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736179712,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736310784,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736376320,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736409088,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736425472,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736433664,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736437760,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736439808,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736440832,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441344,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441600,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441728,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441792,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441824,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441840,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441848,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441852,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441854,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(1736441855,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2130513958,32,FLEN) -NAN_BOXED(1073839177,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877312,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877313,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877315,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877319,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877327,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877343,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877375,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877439,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877567,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004877823,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004878335,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004879359,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004881407,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004885503,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004893695,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004910079,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2004942847,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2005008383,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2005139455,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2005401599,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2005925887,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2006974463,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2009071615,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2009071616,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2011168768,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2012217344,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2012741632,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013003776,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013134848,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013200384,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013233152,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013249536,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013257728,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013261824,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013263872,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013264896,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265408,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265664,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265792,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265856,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265888,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265904,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265912,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265916,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265918,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2013265919,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2130619076,32,FLEN) -NAN_BOXED(1073785729,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224736768,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224736769,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224736771,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224736775,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224736783,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224736799,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224736831,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224736895,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224737023,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224737279,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224737791,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224738815,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224740863,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224744959,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224753151,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224769535,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224802303,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224867839,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1224998911,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1225261055,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1225785343,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1226833919,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1228931071,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1228931072,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1231028224,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1232076800,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1232601088,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1232863232,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1232994304,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233059840,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233092608,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233108992,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233117184,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233121280,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233123328,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233124352,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233124864,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125120,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125248,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125312,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125344,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125360,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125368,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125372,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125374,32,FLEN) -NAN_BOXED(2130679734,32,FLEN) -NAN_BOXED(4200989,32,FLEN) -NAN_BOXED(1233125375,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701376,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701377,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701379,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701383,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701391,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701407,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701439,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701503,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701631,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701887,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281702399,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281703423,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281705471,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281709567,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281717759,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281734143,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281766911,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281832447,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281963519,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2282225663,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2282749951,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2283798527,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2285895679,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2285895680,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2287992832,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289041408,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289565696,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289827840,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2289958912,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290024448,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290057216,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290073600,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290081792,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290085888,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290087936,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290088960,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089472,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089728,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089856,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089920,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089952,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089968,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089976,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089980,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089982,32,FLEN) -NAN_BOXED(2130702517,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089983,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872256,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872271,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872287,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872319,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872383,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872511,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872767,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155873279,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155874303,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155876351,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155880447,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155888639,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155905023,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155937791,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156003327,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156134399,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156396543,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156920831,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157969407,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160066559,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160066560,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162163712,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163212288,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163736576,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163998720,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164129792,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164195328,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164228096,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164244480,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164252672,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164256768,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164258816,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164259840,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260352,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260608,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260736,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260800,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260832,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260848,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2130725136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260863,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943040,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943041,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943043,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943047,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943055,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943071,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943103,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943167,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943295,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943551,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41944063,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41945087,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41947135,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41951231,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41959423,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41975807,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42008575,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42074111,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42205183,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42467327,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42991615,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(44040191,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(46137343,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(46137344,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(48234496,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(49283072,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(49807360,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50069504,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50200576,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50266112,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50298880,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50315264,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50323456,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50327552,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50329600,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50330624,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331136,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331392,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331520,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331584,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331616,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331632,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331640,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331644,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331646,32,FLEN) -NAN_BOXED(2130749232,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331647,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354560,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354561,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354563,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354567,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354575,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354591,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354623,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354687,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684354815,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684355071,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684355583,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684356607,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684358655,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684362751,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684370943,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684387327,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684420095,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684485631,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684616703,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2684878847,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2685403135,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2686451711,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2688548863,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2688548864,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2690646016,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2691694592,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692218880,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692481024,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692612096,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692677632,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692710400,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692726784,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692734976,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692739072,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692741120,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692742144,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692742656,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692742912,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692743040,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692743104,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692743136,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692743152,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692743160,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692743164,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692743166,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(2692743167,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2130791200,32,FLEN) -NAN_BOXED(2151635991,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943040,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943041,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943043,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943047,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943055,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943071,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943103,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943167,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943295,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943551,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41944063,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41945087,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41947135,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41951231,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41959423,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41975807,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42008575,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42074111,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42205183,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42467327,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42991615,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(44040191,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(46137343,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(46137344,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(48234496,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(49283072,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(49807360,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50069504,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50200576,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50266112,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50298880,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50315264,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50323456,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50327552,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50329600,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50330624,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331136,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331392,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331520,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331584,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331616,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331632,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331640,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331644,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331646,32,FLEN) -NAN_BOXED(2130792966,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331647,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183680,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183681,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183683,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183687,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183695,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183711,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183743,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183807,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810183935,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810184191,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810184703,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810185727,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810187775,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810191871,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810200063,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810216447,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810249215,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810314751,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810445823,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2810707967,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2811232255,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2812280831,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2814377983,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2814377984,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2816475136,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2817523712,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818048000,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818310144,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818441216,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818506752,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818539520,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818555904,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818564096,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818568192,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818570240,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818571264,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818571776,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572032,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572160,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572224,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572256,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572272,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572280,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572284,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572286,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(2818572287,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2130795877,32,FLEN) -NAN_BOXED(2151633700,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396352,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396353,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396355,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396359,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396367,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396383,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396415,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396479,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396607,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095396863,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095397375,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095398399,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095400447,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095404543,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095412735,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095429119,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095461887,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095527423,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095658495,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3095920639,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3096444927,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3097493503,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3099590655,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3099590656,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3101687808,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3102736384,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103260672,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103522816,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103653888,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103719424,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103752192,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103768576,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103776768,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103780864,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103782912,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103783936,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784448,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784704,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784832,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784896,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784928,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784944,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784952,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784956,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784958,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3103784959,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2130820876,32,FLEN) -NAN_BOXED(2151621500,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143232,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143233,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143235,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143239,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143247,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143263,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143295,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143359,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143487,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018143743,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018144255,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018145279,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018147327,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018151423,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018159615,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018175999,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018208767,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018274303,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018405375,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4018667519,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4019191807,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4020240383,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4022337535,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4022337536,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4024434688,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4025483264,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026007552,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026269696,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026400768,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026466304,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026499072,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026515456,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026523648,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026527744,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026529792,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026530816,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531328,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531584,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531712,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531776,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531808,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531824,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531832,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531836,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531838,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4026531839,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2130851287,32,FLEN) -NAN_BOXED(3220940678,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482304,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482305,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482307,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482311,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482319,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482335,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482367,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482431,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482559,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528482815,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528483327,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528484351,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528486399,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528490495,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528498687,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528515071,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528547839,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528613375,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(528744447,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(529006591,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(529530879,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(530579455,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(532676607,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(532676608,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(534773760,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(535822336,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536346624,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536608768,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536739840,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536805376,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536838144,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536854528,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536862720,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536866816,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536868864,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536869888,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870400,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870656,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870784,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870848,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870880,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870896,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870904,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870908,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870910,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(536870911,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130858147,32,FLEN) -NAN_BOXED(4119793,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244352,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244353,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244355,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244359,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244367,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244383,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244415,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244479,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244607,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998244863,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998245375,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998246399,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998248447,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998252543,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998260735,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998277119,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998309887,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998375423,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998506495,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(998768639,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(999292927,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1000341503,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1002438655,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1002438656,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1004535808,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1005584384,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006108672,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006370816,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006501888,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006567424,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006600192,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006616576,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006624768,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006628864,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006630912,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006631936,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632448,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632704,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632832,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632896,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632928,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632944,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632952,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632956,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632958,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1006632959,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130865989,32,FLEN) -NAN_BOXED(4116014,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534208,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534209,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534211,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534215,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534223,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534239,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534271,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534335,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534463,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637534719,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637535231,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637536255,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637538303,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637542399,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637550591,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637566975,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637599743,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637665279,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(637796351,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(638058495,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(638582783,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(639631359,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(641728511,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(641728512,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(643825664,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(644874240,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645398528,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645660672,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645791744,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645857280,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645890048,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645906432,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645914624,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645918720,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645920768,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645921792,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922304,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922560,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922688,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922752,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922784,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922800,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922808,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922812,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922814,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(645922815,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130867589,32,FLEN) -NAN_BOXED(4115244,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483663,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483679,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483711,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483775,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483903,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484159,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484671,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147485695,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147487743,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147491839,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147500031,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147516415,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147549183,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147614719,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147745791,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148007935,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148532223,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149580799,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677951,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677952,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153775104,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154823680,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155347968,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155610112,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155741184,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155806720,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155839488,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155855872,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155864064,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155868160,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155870208,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871232,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871744,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872000,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872128,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872192,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872224,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872240,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872255,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2130886867,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241513984,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241513985,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241513987,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241513991,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241513999,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241514015,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241514047,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241514111,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241514239,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241514495,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241515007,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241516031,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241518079,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241522175,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241530367,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241546751,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241579519,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241645055,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1241776127,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1242038271,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1242562559,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1243611135,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1245708287,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1245708288,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1247805440,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1248854016,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249378304,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249640448,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249771520,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249837056,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249869824,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249886208,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249894400,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249898496,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249900544,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249901568,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902080,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902336,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902464,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902528,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902560,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902576,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902584,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902588,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902590,32,FLEN) -NAN_BOXED(2130890318,32,FLEN) -NAN_BOXED(4104333,32,FLEN) -NAN_BOXED(1249902591,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269632,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269633,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269635,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269639,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269647,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269663,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269695,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269759,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269887,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243270143,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243270655,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243271679,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243273727,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243277823,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243286015,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243302399,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243335167,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243400703,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243531775,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243793919,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(244318207,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(245366783,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(247463935,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(247463936,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(249561088,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(250609664,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251133952,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251396096,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251527168,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251592704,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251625472,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251641856,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251650048,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251654144,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251656192,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657216,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657728,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251657984,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658112,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658176,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658208,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658224,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658232,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658236,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658238,32,FLEN) -NAN_BOXED(2130906033,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(251658239,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202560,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202561,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202563,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202567,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202575,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202591,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202623,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202687,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587202815,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587203071,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587203583,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587204607,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587206655,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587210751,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587218943,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587235327,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587268095,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587333631,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587464703,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(587726847,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(588251135,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(589299711,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(591396863,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(591396864,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(593494016,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(594542592,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595066880,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595329024,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595460096,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595525632,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595558400,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595574784,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595582976,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595587072,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595589120,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595590144,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595590656,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595590912,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595591040,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595591104,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595591136,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595591152,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595591160,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595591164,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595591166,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(595591167,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2130918223,32,FLEN) -NAN_BOXED(4091015,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428032,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428033,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428035,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428039,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428047,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428063,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428095,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428159,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428287,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808428543,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808429055,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808430079,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808432127,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808436223,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808444415,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808460799,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808493567,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808559103,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808690175,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3808952319,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3809476607,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3810525183,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3812622335,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3812622336,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3814719488,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3815768064,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816292352,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816554496,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816685568,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816751104,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816783872,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816800256,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816808448,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816812544,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816814592,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816815616,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816128,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816384,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816512,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816576,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816608,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816624,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816632,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816636,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816638,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(3816816639,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2130977387,32,FLEN) -NAN_BOXED(3220700516,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728000,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728001,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728003,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728007,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728015,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728031,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728063,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728127,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728255,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145728511,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145729023,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145730047,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145732095,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145736191,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145744383,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145760767,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145793535,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145859071,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3145990143,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3146252287,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3146776575,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3147825151,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3149922303,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3149922304,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3152019456,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3153068032,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3153592320,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3153854464,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3153985536,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154051072,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154083840,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154100224,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154108416,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154112512,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154114560,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154115584,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116096,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116352,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116480,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116544,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116576,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116592,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116600,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116604,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116606,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3154116607,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2130981661,32,FLEN) -NAN_BOXED(2151544708,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996288,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996289,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996291,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996295,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996303,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996319,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996351,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996415,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996543,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769996799,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769997311,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1769998335,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1770000383,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1770004479,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1770012671,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1770029055,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1770061823,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1770127359,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1770258431,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1770520575,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1771044863,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1772093439,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1774190591,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1774190592,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1776287744,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1777336320,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1777860608,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778122752,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778253824,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778319360,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778352128,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778368512,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778376704,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778380800,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778382848,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778383872,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384384,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384640,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384768,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384832,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384864,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384880,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384888,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384892,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384894,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(1778384895,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2130993319,32,FLEN) -NAN_BOXED(1073187021,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308622848,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308622849,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308622851,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308622855,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308622863,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308622879,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308622911,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308622975,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308623103,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308623359,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308623871,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308624895,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308626943,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308631039,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308639231,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308655615,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308688383,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308753919,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1308884991,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1309147135,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1309671423,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1310719999,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1312817151,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1312817152,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1314914304,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1315962880,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1316487168,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1316749312,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1316880384,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1316945920,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1316978688,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1316995072,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317003264,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317007360,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317009408,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317010432,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317010944,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011200,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011328,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011392,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011424,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011440,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011448,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011452,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011454,32,FLEN) -NAN_BOXED(2131010385,32,FLEN) -NAN_BOXED(4047641,32,FLEN) -NAN_BOXED(1317011455,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652555776,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652555777,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652555779,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652555783,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652555791,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652555807,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652555839,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652555903,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652556031,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652556287,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652556799,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652557823,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652559871,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652563967,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652572159,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652588543,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652621311,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652686847,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1652817919,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1653080063,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1653604351,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1654652927,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1656750079,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1656750080,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1658847232,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1659895808,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660420096,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660682240,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660813312,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660878848,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660911616,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660928000,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660936192,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660940288,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660942336,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660943360,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660943872,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944128,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944256,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944320,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944352,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944368,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944376,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944380,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944382,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(1660944383,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2131022369,32,FLEN) -NAN_BOXED(1073132882,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239296,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239297,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239299,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239303,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239311,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239327,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239359,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239423,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239551,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149239807,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149240319,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149241343,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149243391,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149247487,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149255679,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149272063,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149304831,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149370367,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149501439,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1149763583,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1150287871,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1151336447,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1153433599,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1153433600,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1155530752,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1156579328,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157103616,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157365760,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157496832,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157562368,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157595136,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157611520,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157619712,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157623808,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157625856,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157626880,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627392,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627648,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627776,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627840,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627872,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627888,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627896,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627900,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627902,32,FLEN) -NAN_BOXED(2131096884,32,FLEN) -NAN_BOXED(4007760,32,FLEN) -NAN_BOXED(1157627903,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421632,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421633,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421635,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421639,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421647,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421663,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421695,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421759,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421887,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340422143,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340422655,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340423679,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340425727,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340429823,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340438015,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340454399,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340487167,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340552703,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340683775,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340945919,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2341470207,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2342518783,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2344615935,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2344615936,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2346713088,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2347761664,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348285952,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348548096,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348679168,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348744704,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348777472,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348793856,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348802048,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348806144,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348808192,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809216,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809728,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809984,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810112,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810176,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810208,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810224,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810232,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810236,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810238,32,FLEN) -NAN_BOXED(2131107018,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810239,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240640,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240641,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240643,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240647,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240655,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240671,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240703,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240767,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768240895,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768241151,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768241663,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768242687,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768244735,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768248831,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768257023,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768273407,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768306175,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768371711,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768502783,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2768764927,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2769289215,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2770337791,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2772434943,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2772434944,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2774532096,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2775580672,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776104960,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776367104,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776498176,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776563712,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776596480,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776612864,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776621056,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776625152,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776627200,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776628224,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776628736,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776628992,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776629120,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776629184,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776629216,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776629232,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776629240,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776629244,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776629246,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(2776629247,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2131108028,32,FLEN) -NAN_BOXED(2151486327,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257152,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257153,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257155,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257159,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257167,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257183,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257215,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257279,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257407,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934257663,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934258175,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934259199,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934261247,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934265343,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934273535,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934289919,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934322687,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934388223,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934519295,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3934781439,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3935305727,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3936354303,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3938451455,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3938451456,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3940548608,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3941597184,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942121472,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942383616,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942514688,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942580224,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942612992,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942629376,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942637568,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942641664,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942643712,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942644736,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645248,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645504,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645632,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645696,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645728,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645744,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645752,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645756,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645758,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(3942645759,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2131113174,32,FLEN) -NAN_BOXED(3220449605,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425344,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425345,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425347,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425351,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425359,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425375,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425407,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425471,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425599,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570425855,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570426367,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570427391,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570429439,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570433535,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570441727,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570458111,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570490879,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570556415,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570687487,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(570949631,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(571473919,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(572522495,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(574619647,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(574619648,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(576716800,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(577765376,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578289664,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578551808,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578682880,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578748416,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578781184,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578797568,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578805760,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578809856,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578811904,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578812928,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813440,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813696,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813824,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813888,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813920,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813936,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813944,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813948,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813950,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(578813951,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131117340,32,FLEN) -NAN_BOXED(3998443,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519040,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519041,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519043,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519047,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519055,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519071,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519103,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519167,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519295,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090519551,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090520063,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090521087,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090523135,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090527231,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090535423,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090551807,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090584575,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090650111,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1090781183,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1091043327,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1091567615,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1092616191,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1094713343,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1094713344,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1096810496,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1097859072,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098383360,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098645504,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098776576,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098842112,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098874880,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098891264,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098899456,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098903552,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098905600,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098906624,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907136,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907392,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907520,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907584,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907616,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907632,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907640,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907644,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907646,32,FLEN) -NAN_BOXED(2131117344,32,FLEN) -NAN_BOXED(3998441,32,FLEN) -NAN_BOXED(1098907647,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772160,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772161,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772163,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772167,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772175,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772191,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772223,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772287,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772415,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772671,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167773183,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167774207,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167776255,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167780351,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167788543,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167804927,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167837695,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167903231,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168034303,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168296447,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168820735,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(169869311,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(171966463,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(171966464,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(174063616,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175112192,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175636480,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175898624,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176029696,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176095232,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176128000,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176144384,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176152576,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176156672,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176158720,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176159744,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160256,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160512,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160640,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160704,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160736,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160752,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160760,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160764,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160766,32,FLEN) -NAN_BOXED(2131120769,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160767,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687865856,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687865857,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687865859,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687865863,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687865871,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687865887,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687865919,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687865983,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687866111,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687866367,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687866879,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687867903,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687869951,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687874047,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687882239,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687898623,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687931391,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(687996927,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(688127999,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(688390143,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(688914431,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(689963007,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(692060159,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(692060160,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(694157312,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(695205888,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(695730176,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(695992320,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696123392,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696188928,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696221696,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696238080,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696246272,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696250368,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696252416,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696253440,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696253952,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254208,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254336,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254400,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254432,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254448,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254456,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254460,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254462,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(696254463,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131128699,32,FLEN) -NAN_BOXED(3993288,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681152,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681153,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681155,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681159,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681167,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681183,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681215,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681279,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681407,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885681663,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885682175,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885683199,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885685247,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885689343,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885697535,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885713919,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885746687,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885812223,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2885943295,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2886205439,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2886729727,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2887778303,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2889875455,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2889875456,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2891972608,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2893021184,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2893545472,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2893807616,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2893938688,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894004224,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894036992,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894053376,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894061568,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894065664,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894067712,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894068736,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069248,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069504,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069632,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069696,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069728,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069744,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069752,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069756,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069758,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(2894069759,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2131144939,32,FLEN) -NAN_BOXED(2151469590,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431744,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431745,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431747,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431751,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431759,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431775,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431807,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431871,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038431999,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038432255,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038432767,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038433791,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038435839,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038439935,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038448127,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038464511,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038497279,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038562815,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038693887,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2038956031,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2039480319,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2040528895,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2042626047,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2042626048,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2044723200,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2045771776,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046296064,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046558208,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046689280,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046754816,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046787584,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046803968,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046812160,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046816256,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046818304,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046819328,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046819840,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820096,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820224,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820288,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820320,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820336,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820344,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820348,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820350,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2046820351,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2131153160,32,FLEN) -NAN_BOXED(1072893539,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829120,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829121,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829123,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829127,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829135,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829151,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829183,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829247,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829375,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829631,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125830143,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125831167,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125833215,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125837311,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125845503,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125861887,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125894655,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125960191,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126091263,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126353407,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(126877695,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127926271,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(130023423,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(130023424,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(132120576,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133169152,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133693440,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(133955584,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134086656,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134152192,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134184960,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134201344,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134209536,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134213632,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134215680,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134216704,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217216,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217472,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217600,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217664,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217696,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217712,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217720,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217724,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217726,32,FLEN) -NAN_BOXED(2131190944,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217727,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771751936,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771751937,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771751939,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771751943,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771751951,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771751967,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771751999,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771752063,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771752191,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771752447,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771752959,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771753983,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771756031,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771760127,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771768319,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771784703,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771817471,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(771883007,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(772014079,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(772276223,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(772800511,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(773849087,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(775946239,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(775946240,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(778043392,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(779091968,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(779616256,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(779878400,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780009472,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780075008,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780107776,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780124160,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780132352,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780136448,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780138496,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780139520,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140032,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140288,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140416,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140480,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140512,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140528,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140536,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140540,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140542,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(780140543,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131192968,32,FLEN) -NAN_BOXED(3964371,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366016,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366017,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366019,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366023,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366031,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366047,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366079,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366143,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366271,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001366527,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001367039,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001368063,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001370111,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001374207,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001382399,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001398783,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001431551,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001497087,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001628159,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4001890303,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4002414591,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4003463167,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4005560319,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4005560320,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4007657472,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4008706048,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009230336,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009492480,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009623552,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009689088,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009721856,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009738240,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009746432,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009750528,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009752576,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009753600,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754112,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754368,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754496,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754560,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754592,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754608,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754616,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754620,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754622,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4009754623,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2131205059,32,FLEN) -NAN_BOXED(3220284168,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255808,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255809,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255811,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255815,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255823,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255839,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255871,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255935,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256063,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256319,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256831,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315257855,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315259903,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315263999,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315272191,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315288575,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315321343,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315386879,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315517951,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315780095,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2316304383,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2317352959,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2319450111,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2319450112,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2321547264,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2322595840,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323120128,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323382272,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323513344,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323578880,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323611648,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323628032,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323636224,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323640320,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323642368,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323643392,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323643904,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644160,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644288,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644352,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644384,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644400,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644408,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644412,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644414,32,FLEN) -NAN_BOXED(2131208423,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644415,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820327936,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820327937,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820327939,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820327943,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820327951,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820327967,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820327999,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820328063,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820328191,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820328447,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820328959,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820329983,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820332031,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820336127,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820344319,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820360703,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820393471,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820459007,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820590079,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1820852223,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1821376511,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1822425087,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1824522239,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1824522240,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1826619392,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1827667968,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828192256,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828454400,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828585472,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828651008,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828683776,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828700160,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828708352,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828712448,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828714496,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828715520,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716032,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716288,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716416,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716480,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716512,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716528,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716536,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716540,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716542,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(1828716543,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2131219988,32,FLEN) -NAN_BOXED(1072773963,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515328,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515329,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515331,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515335,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515343,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515359,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515391,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515455,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515583,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860515839,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860516351,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860517375,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860519423,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860523519,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860531711,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860548095,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860580863,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860646399,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2860777471,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2861039615,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2861563903,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2862612479,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2864709631,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2864709632,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2866806784,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2867855360,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868379648,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868641792,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868772864,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868838400,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868871168,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868887552,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868895744,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868899840,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868901888,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868902912,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903424,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903680,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903808,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903872,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903904,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903920,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903928,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903932,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903934,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(2868903935,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2131239184,32,FLEN) -NAN_BOXED(2151427482,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795072,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795073,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795075,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795079,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795087,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795103,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795135,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795199,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795327,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801795583,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801796095,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801797119,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801799167,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801803263,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801811455,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801827839,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801860607,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2801926143,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2802057215,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2802319359,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2802843647,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2803892223,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2805989375,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2805989376,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2808086528,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2809135104,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2809659392,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2809921536,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810052608,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810118144,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810150912,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810167296,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810175488,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810179584,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810181632,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810182656,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183168,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183424,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183552,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183616,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183648,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183664,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183672,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183676,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183678,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(2810183679,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2131256094,32,FLEN) -NAN_BOXED(2151420021,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038080,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038081,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038083,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038087,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038095,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038111,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038143,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038207,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038335,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038591,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181039103,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181040127,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181042175,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181046271,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181054463,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181070847,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181103615,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181169151,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181300223,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181562367,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2182086655,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2183135231,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2185232383,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2185232384,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2187329536,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2188378112,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2188902400,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189164544,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189295616,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189361152,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189393920,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189410304,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189418496,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189422592,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189424640,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189425664,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426176,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426432,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426560,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426624,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426656,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426672,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426680,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426684,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426686,32,FLEN) -NAN_BOXED(2131307136,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426687,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554432,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554433,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554435,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554439,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554447,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554463,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554495,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554559,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554687,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554943,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33555455,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33556479,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33558527,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33562623,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33570815,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33587199,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33619967,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33685503,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33816575,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(34078719,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(34603007,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(35651583,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(37748735,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(37748736,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(39845888,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(40894464,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41418752,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41680896,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41811968,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41877504,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41910272,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41926656,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41934848,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41938944,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41940992,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942016,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942528,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942784,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942912,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942976,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943008,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943024,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943032,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943036,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943038,32,FLEN) -NAN_BOXED(2131342146,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943039,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964689920,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964689921,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964689923,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964689927,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964689935,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964689951,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964689983,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964690047,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964690175,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964690431,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964690943,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964691967,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964694015,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964698111,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964706303,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964722687,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964755455,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964820991,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(964952063,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(965214207,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(965738495,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(966787071,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(968884223,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(968884224,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(970981376,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(972029952,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(972554240,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(972816384,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(972947456,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973012992,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973045760,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973062144,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973070336,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973074432,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973076480,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973077504,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078016,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078272,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078400,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078464,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078496,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078512,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078520,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078524,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078526,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(973078527,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131353780,32,FLEN) -NAN_BOXED(3893818,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383552,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383553,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383555,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383559,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383567,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383583,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383615,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383679,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159383807,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159384063,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159384575,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159385599,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159387647,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159391743,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159399935,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159416319,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159449087,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159514623,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159645695,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(159907839,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(160432127,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(161480703,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(163577855,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(163577856,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(165675008,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(166723584,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167247872,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167510016,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167641088,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167706624,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167739392,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167755776,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167763968,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167768064,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167770112,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771136,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771648,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167771904,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772032,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772096,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772128,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772144,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772152,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772156,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772158,32,FLEN) -NAN_BOXED(2131354011,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772159,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467136,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467137,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467139,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467143,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467151,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467167,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467199,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467263,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467391,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981467647,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981468159,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981469183,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981471231,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981475327,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981483519,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981499903,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981532671,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981598207,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981729279,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(981991423,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(982515711,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(983564287,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(985661439,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(985661440,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(987758592,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(988807168,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989331456,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989593600,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989724672,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989790208,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989822976,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989839360,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989847552,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989851648,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989853696,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989854720,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855232,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855488,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855616,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855680,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855712,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855728,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855736,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855740,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855742,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(989855743,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131467553,32,FLEN) -NAN_BOXED(3845400,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930560,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930561,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930563,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930567,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930575,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930591,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930623,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930687,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732930815,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732931071,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732931583,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732932607,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732934655,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732938751,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732946943,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732963327,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3732996095,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3733061631,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3733192703,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3733454847,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3733979135,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3735027711,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3737124863,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3737124864,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3739222016,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3740270592,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3740794880,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741057024,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741188096,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741253632,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741286400,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741302784,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741310976,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741315072,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741317120,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741318144,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741318656,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741318912,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741319040,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741319104,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741319136,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741319152,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741319160,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741319164,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741319166,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(3741319167,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2131480454,32,FLEN) -NAN_BOXED(3219808198,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(63,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(511,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1023,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2047,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4095,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8191,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16383,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32767,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65535,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(131071,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(524287,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1048575,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2097151,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194303,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194304,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6291456,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7340032,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7864320,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8126464,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8257536,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8323072,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8355840,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8372224,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8380416,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8384512,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8386560,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8387584,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388096,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388352,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388480,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388544,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388576,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388592,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388607,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2131496437,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736441856,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736441857,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736441859,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736441863,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736441871,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736441887,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736441919,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736441983,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736442111,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736442367,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736442879,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736443903,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736445951,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736450047,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736458239,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736474623,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736507391,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736572927,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736703999,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1736966143,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1737490431,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1738539007,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1740636159,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1740636160,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1742733312,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1743781888,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744306176,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744568320,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744699392,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744764928,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744797696,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744814080,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744822272,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744826368,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744828416,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744829440,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744829952,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830208,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830336,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830400,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830432,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830448,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830456,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830460,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830462,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(1744830463,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2131529792,32,FLEN) -NAN_BOXED(1072242285,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937984,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937985,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937987,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937991,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937999,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938015,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938047,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938111,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938239,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938495,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192939007,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192940031,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192942079,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192946175,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192954367,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192970751,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193003519,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193069055,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193200127,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193462271,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193986559,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(195035135,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(197132287,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(197132288,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(199229440,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(200278016,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(200802304,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201064448,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201195520,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201261056,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201293824,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201310208,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201318400,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201322496,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201324544,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201325568,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326080,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326336,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326464,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326528,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326560,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326576,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326584,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326588,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326590,32,FLEN) -NAN_BOXED(2131563130,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326591,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788672,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788673,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788675,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788679,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788687,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788703,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788735,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788799,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333788927,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333789183,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333789695,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333790719,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333792767,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333796863,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333805055,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333821439,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333854207,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1333919743,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1334050815,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1334312959,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1334837247,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1335885823,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1337982975,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1337982976,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1340080128,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1341128704,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1341652992,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1341915136,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342046208,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342111744,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342144512,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342160896,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342169088,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342173184,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342175232,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342176256,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342176768,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177024,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177152,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177216,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177248,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177264,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177272,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177276,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177278,32,FLEN) -NAN_BOXED(2131616798,32,FLEN) -NAN_BOXED(3783683,32,FLEN) -NAN_BOXED(1342177279,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255808,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255809,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255811,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255815,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255823,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255839,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255871,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255935,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256063,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256319,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256831,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315257855,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315259903,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315263999,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315272191,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315288575,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315321343,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315386879,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315517951,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315780095,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2316304383,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2317352959,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2319450111,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2319450112,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2321547264,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2322595840,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323120128,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323382272,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323513344,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323578880,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323611648,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323628032,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323636224,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323640320,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323642368,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323643392,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323643904,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644160,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644288,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644352,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644384,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644400,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644408,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644412,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644414,32,FLEN) -NAN_BOXED(2131638557,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644415,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219072,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219073,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219075,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219079,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219087,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219103,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219135,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219199,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219327,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753219583,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753220095,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753221119,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753223167,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753227263,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753235455,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753251839,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753284607,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753350143,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753481215,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1753743359,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1754267647,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1755316223,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1757413375,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1757413376,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1759510528,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1760559104,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761083392,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761345536,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761476608,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761542144,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761574912,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761591296,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761599488,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761603584,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761605632,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761606656,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607168,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607424,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607552,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607616,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607648,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607664,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607672,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607676,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607678,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(1761607679,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2131729550,32,FLEN) -NAN_BOXED(1071918026,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686208,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686209,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686211,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686215,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686223,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686239,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686271,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686335,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686463,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734686719,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734687231,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734688255,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734690303,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734694399,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734702591,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734718975,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734751743,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734817279,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2734948351,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2735210495,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2735734783,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2736783359,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2738880511,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2738880512,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2740977664,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2742026240,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2742550528,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2742812672,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2742943744,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743009280,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743042048,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743058432,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743066624,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743070720,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743072768,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743073792,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074304,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074560,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074688,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074752,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074784,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074800,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074808,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074812,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074814,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(2743074815,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2131735955,32,FLEN) -NAN_BOXED(2151219460,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435456,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435457,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435459,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435463,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435471,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435487,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435519,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435583,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435711,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435967,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268436479,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268437503,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268439551,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268443647,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268451839,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268468223,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268500991,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268566527,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268697599,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268959743,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(269484031,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(270532607,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(272629759,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(272629760,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(274726912,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(275775488,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276299776,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276561920,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276692992,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276758528,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276791296,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276807680,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276815872,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276819968,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276822016,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823040,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823552,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823808,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823936,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824000,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824032,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824048,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824056,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824060,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824062,32,FLEN) -NAN_BOXED(2131753366,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824063,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089984,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089985,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089987,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089991,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089999,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090015,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090047,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090111,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090239,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090495,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290091007,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290092031,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290094079,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290098175,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290106367,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290122751,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290155519,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290221055,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290352127,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290614271,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2291138559,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2292187135,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2294284287,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2294284288,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2296381440,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2297430016,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2297954304,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298216448,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298347520,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298413056,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298445824,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298462208,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298470400,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298474496,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298476544,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298477568,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478080,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478336,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478464,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478528,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478560,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478576,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478584,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478588,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478590,32,FLEN) -NAN_BOXED(2131785689,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478591,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592512,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592513,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592515,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592519,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592527,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592543,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592575,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592639,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592767,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214593023,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214593535,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214594559,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214596607,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214600703,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214608895,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214625279,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214658047,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214723583,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214854655,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2215116799,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2215641087,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2216689663,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2218786815,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2218786816,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2220883968,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2221932544,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222456832,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222718976,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222850048,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222915584,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222948352,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222964736,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222972928,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222977024,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222979072,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980096,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980608,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980864,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980992,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981056,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981088,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981104,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981112,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981116,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981118,32,FLEN) -NAN_BOXED(2131813118,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981119,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619136,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619137,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619139,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619143,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619151,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619167,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619199,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619263,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619391,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078619647,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078620159,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078621183,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078623231,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078627327,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078635519,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078651903,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078684671,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078750207,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3078881279,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3079143423,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3079667711,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3080716287,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3082813439,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3082813440,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3084910592,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3085959168,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3086483456,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3086745600,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3086876672,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3086942208,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3086974976,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3086991360,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3086999552,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087003648,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087005696,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087006720,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007232,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007488,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007616,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007680,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007712,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007728,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007736,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007740,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007742,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3087007743,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2131814824,32,FLEN) -NAN_BOXED(2151188435,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152360960,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152360961,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152360963,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152360967,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152360975,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152360991,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152361023,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152361087,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152361215,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152361471,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152361983,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152363007,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152365055,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152369151,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152377343,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152393727,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152426495,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152492031,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152623103,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4152885247,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4153409535,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4154458111,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4156555263,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4156555264,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4158652416,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4159700992,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160225280,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160487424,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160618496,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160684032,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160716800,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160733184,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160741376,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160745472,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160747520,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160748544,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749056,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749312,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749440,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749504,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749536,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749552,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749560,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749564,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749566,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4160749567,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2131820726,32,FLEN) -NAN_BOXED(3219258202,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203904,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203905,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203907,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203911,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203919,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203935,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203967,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204031,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204159,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204415,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204927,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206205951,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206207999,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206212095,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206220287,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206236671,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206269439,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206334975,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206466047,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206728191,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2207252479,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2208301055,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2210398207,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2210398208,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2212495360,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2213543936,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214068224,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214330368,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214461440,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214526976,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214559744,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214576128,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214584320,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214588416,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214590464,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214591488,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592000,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592256,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592384,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592448,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592480,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592496,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592504,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592508,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592510,32,FLEN) -NAN_BOXED(2131838258,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592511,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026531840,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026531841,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026531843,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026531847,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026531855,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026531871,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026531903,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026531967,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026532095,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026532351,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026532863,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026533887,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026535935,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026540031,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026548223,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026564607,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026597375,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026662911,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4026793983,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4027056127,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4027580415,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4028628991,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4030726143,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4030726144,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4032823296,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4033871872,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034396160,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034658304,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034789376,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034854912,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034887680,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034904064,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034912256,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034916352,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034918400,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034919424,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034919936,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920192,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920320,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920384,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920416,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920432,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920440,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920444,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920446,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4034920447,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2131881967,32,FLEN) -NAN_BOXED(3219163372,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309056,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309057,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309059,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309063,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309071,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309087,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309119,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309183,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309311,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043309567,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043310079,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043311103,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043313151,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043317247,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043325439,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043341823,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043374591,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043440127,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043571199,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4043833343,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4044357631,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4045406207,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4047503359,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4047503360,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4049600512,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4050649088,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051173376,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051435520,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051566592,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051632128,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051664896,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051681280,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051689472,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051693568,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051695616,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051696640,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697152,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697408,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697536,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697600,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697632,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697648,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697656,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697660,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697662,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4051697663,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2131905939,32,FLEN) -NAN_BOXED(3219126580,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319168,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319169,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319171,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319175,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319183,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319199,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319231,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319295,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319423,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741319679,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741320191,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741321215,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741323263,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741327359,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741335551,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741351935,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741384703,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741450239,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741581311,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3741843455,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3742367743,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3743416319,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3745513471,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3745513472,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3747610624,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3748659200,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749183488,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749445632,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749576704,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749642240,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749675008,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749691392,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749699584,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749703680,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749705728,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749706752,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707264,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707520,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707648,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707712,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707744,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707760,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707768,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707772,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707774,32,FLEN) -NAN_BOXED(2131908099,32,FLEN) -NAN_BOXED(2151152403,32,FLEN) -NAN_BOXED(3749707775,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016512,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016513,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016515,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016519,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016527,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016543,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016575,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016639,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166016767,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166017023,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166017535,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166018559,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166020607,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166024703,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166032895,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166049279,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166082047,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166147583,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166278655,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1166540799,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1167065087,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1168113663,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1170210815,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1170210816,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1172307968,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1173356544,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1173880832,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174142976,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174274048,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174339584,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174372352,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174388736,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174396928,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174401024,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174403072,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174404096,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174404608,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174404864,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174404992,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174405056,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174405088,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174405104,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174405112,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174405116,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174405118,32,FLEN) -NAN_BOXED(2131973300,32,FLEN) -NAN_BOXED(3643980,32,FLEN) -NAN_BOXED(1174405119,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982464,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982465,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982467,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982471,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982479,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982495,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982527,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982591,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982719,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841982975,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841983487,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841984511,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841986559,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841990655,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3841998847,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3842015231,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3842047999,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3842113535,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3842244607,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3842506751,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3843031039,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3844079615,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3846176767,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3846176768,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3848273920,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3849322496,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3849846784,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850108928,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850240000,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850305536,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850338304,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850354688,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850362880,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850366976,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850369024,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850370048,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850370560,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850370816,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850370944,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850371008,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850371040,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850371056,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850371064,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850371068,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850371070,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(3850371071,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2131976979,32,FLEN) -NAN_BOXED(3219018627,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811584,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811585,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811587,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811591,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811599,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811615,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811647,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811711,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967811839,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967812095,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967812607,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967813631,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967815679,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967819775,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967827967,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967844351,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967877119,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3967942655,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3968073727,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3968335871,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3968860159,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3969908735,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3972005887,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3972005888,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3974103040,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3975151616,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3975675904,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3975938048,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976069120,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976134656,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976167424,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976183808,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976192000,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976196096,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976198144,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976199168,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976199680,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976199936,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976200064,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976200128,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976200160,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976200176,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976200184,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976200188,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976200190,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(3976200191,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2131989480,32,FLEN) -NAN_BOXED(3218999793,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126720,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126721,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126723,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126727,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126735,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126751,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126783,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126847,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852126975,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852127231,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852127743,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852128767,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852130815,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852134911,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852143103,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852159487,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852192255,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852257791,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852388863,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2852651007,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2853175295,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2854223871,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2856321023,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2856321024,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2858418176,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2859466752,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2859991040,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860253184,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860384256,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860449792,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860482560,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860498944,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860507136,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860511232,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860513280,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860514304,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860514816,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515072,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515200,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515264,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515296,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515312,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515320,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515324,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515326,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(2860515327,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132034168,32,FLEN) -NAN_BOXED(2151104801,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976064,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976065,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976067,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976071,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976079,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976095,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976127,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976191,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976319,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976575,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373977087,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373978111,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373980159,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373984255,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373992447,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374008831,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374041599,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374107135,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374238207,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2374500351,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2375024639,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2376073215,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2378170367,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2378170368,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2380267520,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2381316096,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2381840384,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382102528,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382233600,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382299136,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382331904,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382348288,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382356480,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382360576,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382362624,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382363648,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364160,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364416,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364544,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364608,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364640,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364656,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364664,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364668,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364670,32,FLEN) -NAN_BOXED(2132037873,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364671,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307712,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307713,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307715,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307719,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307727,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307743,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307775,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307839,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424307967,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424308223,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424308735,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424309759,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424311807,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424315903,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424324095,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424340479,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424373247,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424438783,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424569855,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2424831999,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2425356287,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2426404863,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2428502015,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2428502016,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2430599168,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2431647744,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432172032,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432434176,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432565248,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432630784,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432663552,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432679936,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432688128,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432692224,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432694272,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432695296,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432695808,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696064,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696192,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696256,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696288,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696304,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696312,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696316,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696318,32,FLEN) -NAN_BOXED(2132054716,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2432696319,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160768,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160769,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160771,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160775,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160783,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160799,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160831,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160895,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161023,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161279,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176161791,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176162815,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176164863,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176168959,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176177151,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176193535,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176226303,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176291839,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176422911,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176685055,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(177209343,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(178257919,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(180355071,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(180355072,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(182452224,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(183500800,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184025088,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184287232,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184418304,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184483840,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184516608,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184532992,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184541184,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184545280,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184547328,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184548352,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184548864,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549120,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549248,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549312,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549344,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549360,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549368,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549372,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549374,32,FLEN) -NAN_BOXED(2132087446,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(184549375,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033024,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033025,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033027,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033031,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033039,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033055,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033087,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033151,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033279,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033535,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332034047,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332035071,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332037119,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332041215,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332049407,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332065791,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332098559,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332164095,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332295167,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332557311,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2333081599,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2334130175,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2336227327,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2336227328,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2338324480,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2339373056,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2339897344,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340159488,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340290560,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340356096,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340388864,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340405248,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340413440,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340417536,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340419584,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340420608,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421120,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421376,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421504,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421568,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421600,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421616,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421624,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421628,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421630,32,FLEN) -NAN_BOXED(2132124891,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421631,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883712,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883713,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883715,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883719,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883727,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883743,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883775,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883839,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472883967,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472884223,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472884735,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472885759,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472887807,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472891903,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472900095,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472916479,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3472949247,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3473014783,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3473145855,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3473407999,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3473932287,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3474980863,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3477078015,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3477078016,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3479175168,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3480223744,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3480748032,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481010176,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481141248,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481206784,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481239552,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481255936,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481264128,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481268224,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481270272,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481271296,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481271808,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272064,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272192,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272256,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272288,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272304,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272312,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272316,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272318,32,FLEN) -NAN_BOXED(2132125158,32,FLEN) -NAN_BOXED(2151071205,32,FLEN) -NAN_BOXED(3481272319,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426688,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426689,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426691,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426695,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426703,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426719,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426751,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426815,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426943,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189427199,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189427711,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189428735,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189430783,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189434879,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189443071,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189459455,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189492223,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189557759,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189688831,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189950975,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2190475263,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2191523839,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2193620991,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2193620992,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2195718144,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2196766720,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197291008,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197553152,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197684224,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197749760,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197782528,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197798912,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197807104,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197811200,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197813248,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197814272,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197814784,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815040,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815168,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815232,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815264,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815280,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815288,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815292,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815294,32,FLEN) -NAN_BOXED(2132159096,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2197815295,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813694976,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813694977,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813694979,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813694983,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813694991,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813695007,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813695039,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813695103,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813695231,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813695487,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813695999,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813697023,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813699071,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813703167,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813711359,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813727743,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813760511,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813826047,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(813957119,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(814219263,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(814743551,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(815792127,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(817889279,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(817889280,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(819986432,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(821035008,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(821559296,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(821821440,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(821952512,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822018048,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822050816,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822067200,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822075392,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822079488,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822081536,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822082560,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083072,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083328,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083456,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083520,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083552,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083568,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083576,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083580,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083582,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(822083583,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132171734,32,FLEN) -NAN_BOXED(3570599,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217728,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217729,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217731,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217735,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217743,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217759,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217791,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217855,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217983,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134218239,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134218751,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134219775,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134221823,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134225919,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134234111,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134250495,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134283263,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134348799,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134479871,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134742015,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(135266303,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(136314879,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(138412031,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(138412032,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(140509184,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(141557760,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142082048,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142344192,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142475264,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142540800,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142573568,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142589952,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142598144,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142602240,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142604288,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142605312,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142605824,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606080,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606208,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606272,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606304,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606320,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606328,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606332,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606334,32,FLEN) -NAN_BOXED(2132184922,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606335,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649472,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649473,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649475,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649479,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649487,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649503,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649535,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649599,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649727,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649983,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172650495,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172651519,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172653567,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172657663,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172665855,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172682239,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172715007,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172780543,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172911615,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2173173759,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2173698047,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2174746623,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2176843775,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2176843776,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2178940928,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2179989504,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180513792,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180775936,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180907008,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180972544,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181005312,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181021696,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181029888,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181033984,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181036032,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037056,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037568,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037824,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037952,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038016,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038048,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038064,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038072,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038076,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038078,32,FLEN) -NAN_BOXED(2132201564,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038079,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649472,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649473,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649475,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649479,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649487,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649503,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649535,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649599,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649727,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649983,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172650495,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172651519,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172653567,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172657663,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172665855,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172682239,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172715007,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172780543,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172911615,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2173173759,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2173698047,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2174746623,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2176843775,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2176843776,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2178940928,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2179989504,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180513792,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180775936,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180907008,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180972544,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181005312,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181021696,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181029888,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181033984,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181036032,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037056,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037568,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037824,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037952,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038016,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038048,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038064,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038072,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038076,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038078,32,FLEN) -NAN_BOXED(2132236791,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038079,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046848,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046849,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046851,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046855,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046863,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046879,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046911,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046975,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047103,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047359,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047871,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260048895,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260050943,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260055039,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260063231,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260079615,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260112383,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260177919,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260308991,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260571135,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(261095423,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143999,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(264241151,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(264241152,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(266338304,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(267386880,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(267911168,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268173312,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268304384,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268369920,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268402688,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268419072,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268427264,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268431360,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268433408,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268434432,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268434944,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435200,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435328,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435392,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435424,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435440,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435448,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435452,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435454,32,FLEN) -NAN_BOXED(2132240286,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435455,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405120,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405121,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405123,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405127,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405135,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405151,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405183,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405247,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405375,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174405631,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174406143,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174407167,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174409215,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174413311,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174421503,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174437887,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174470655,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174536191,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174667263,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1174929407,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1175453695,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1176502271,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1178599423,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1178599424,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1180696576,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1181745152,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182269440,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182531584,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182662656,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182728192,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182760960,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182777344,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182785536,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182789632,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182791680,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182792704,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793216,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793472,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793600,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793664,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793696,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793712,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793720,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793724,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793726,32,FLEN) -NAN_BOXED(2132241315,32,FLEN) -NAN_BOXED(3545563,32,FLEN) -NAN_BOXED(1182793727,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981120,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981121,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981123,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981127,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981135,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981151,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981183,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981247,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981375,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981631,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222982143,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222983167,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222985215,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222989311,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222997503,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223013887,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223046655,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223112191,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223243263,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2223505407,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2224029695,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2225078271,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2227175423,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2227175424,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2229272576,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2230321152,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2230845440,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231107584,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231238656,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231304192,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231336960,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231353344,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231361536,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231365632,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231367680,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231368704,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369216,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369472,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369600,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369664,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369696,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369712,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369720,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369724,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369726,32,FLEN) -NAN_BOXED(2132252771,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369727,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2132275221,32,FLEN) -NAN_BOXED(1071098570,32,FLEN) -NAN_BOXED(2139095039,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915392,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915393,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915395,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915399,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915407,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915423,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915455,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915519,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915647,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185915903,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185916415,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185917439,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185919487,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185923583,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185931775,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185948159,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4185980927,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4186046463,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4186177535,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4186439679,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4186963967,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4188012543,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4190109695,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4190109696,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4192206848,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4193255424,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4193779712,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194041856,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194172928,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194238464,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194271232,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194287616,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194295808,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194299904,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194301952,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194302976,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303488,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303744,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303872,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303936,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303968,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303984,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303992,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303996,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303998,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4194303999,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2132286465,32,FLEN) -NAN_BOXED(3218566276,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649472,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649473,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649475,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649479,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649487,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649503,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649535,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649599,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649727,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649983,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172650495,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172651519,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172653567,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172657663,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172665855,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172682239,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172715007,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172780543,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172911615,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2173173759,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2173698047,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2174746623,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2176843775,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2176843776,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2178940928,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2179989504,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180513792,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180775936,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180907008,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2180972544,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181005312,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181021696,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181029888,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181033984,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181036032,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037056,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037568,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037824,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181037952,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038016,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038048,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038064,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038072,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038076,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038078,32,FLEN) -NAN_BOXED(2132310482,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038079,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816640,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816641,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816643,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816647,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816655,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816671,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816703,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816767,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816816895,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816817151,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816817663,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816818687,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816820735,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816824831,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816833023,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816849407,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816882175,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3816947711,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3817078783,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3817340927,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3817865215,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3818913791,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3821010943,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3821010944,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3823108096,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3824156672,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3824680960,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3824943104,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825074176,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825139712,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825172480,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825188864,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825197056,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825201152,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825203200,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825204224,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825204736,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825204992,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825205120,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825205184,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825205216,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825205232,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825205240,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825205244,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825205246,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(3825205247,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2132329507,32,FLEN) -NAN_BOXED(3218505580,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262208,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262209,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262211,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262215,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262223,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262239,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262271,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262335,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262463,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783262719,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783263231,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783264255,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783266303,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783270399,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783278591,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783294975,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783327743,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783393279,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783524351,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3783786495,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3784310783,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3785359359,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3787456511,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3787456512,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3789553664,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3790602240,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791126528,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791388672,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791519744,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791585280,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791618048,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791634432,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791642624,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791646720,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791648768,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791649792,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650304,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650560,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650688,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650752,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650784,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650800,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650808,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650812,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650814,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(3791650815,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2132340327,32,FLEN) -NAN_BOXED(3218490404,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421632,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421633,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421635,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421639,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421647,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421663,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421695,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421759,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421887,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340422143,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340422655,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340423679,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340425727,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340429823,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340438015,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340454399,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340487167,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340552703,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340683775,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340945919,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2341470207,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2342518783,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2344615935,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2344615936,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2346713088,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2347761664,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348285952,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348548096,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348679168,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348744704,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348777472,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348793856,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348802048,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348806144,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348808192,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809216,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809728,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348809984,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810112,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810176,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810208,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810224,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810232,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810236,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810238,32,FLEN) -NAN_BOXED(2132351855,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810239,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483663,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483679,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483711,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483775,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483903,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484159,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484671,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147485695,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147487743,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147491839,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147500031,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147516415,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147549183,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147614719,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147745791,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148007935,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148532223,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149580799,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677951,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677952,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153775104,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154823680,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155347968,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155610112,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155741184,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155806720,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155839488,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155855872,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155864064,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155868160,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155870208,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871232,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871744,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872000,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872128,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872192,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872224,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872240,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872255,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2132375863,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663296,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663297,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663299,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663303,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663311,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663327,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663359,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663423,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663551,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663807,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100664319,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100665343,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100667391,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100671487,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100679679,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100696063,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100728831,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100794367,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100925439,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(101187583,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(101711871,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(102760447,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(104857599,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(104857600,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(106954752,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108003328,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108527616,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108789760,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108920832,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108986368,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109019136,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109035520,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109043712,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109047808,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109049856,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109050880,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051392,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051648,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051776,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051840,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051872,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051888,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051896,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051900,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051902,32,FLEN) -NAN_BOXED(2132376635,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051903,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448256,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448257,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448259,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448263,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448271,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448287,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448319,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448383,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448511,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204448767,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204449279,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204450303,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204452351,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204456447,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204464639,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204481023,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204513791,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204579327,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204710399,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3204972543,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3205496831,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3206545407,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3208642559,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3208642560,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3210739712,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3211788288,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212312576,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212574720,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212705792,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212771328,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212804096,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212820480,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212828672,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212832768,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212834816,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212835840,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836352,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836608,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836736,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836800,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836832,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836848,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836856,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836860,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836862,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836863,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132381945,32,FLEN) -NAN_BOXED(2150979668,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146944,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146945,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146947,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146951,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146959,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146975,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147007,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147071,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147199,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147455,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147967,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248148991,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248151039,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248155135,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248163327,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248179711,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248212479,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248278015,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248409087,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248671231,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2249195519,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2250244095,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2252341247,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2252341248,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2254438400,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2255486976,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256011264,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256273408,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256404480,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256470016,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256502784,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256519168,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256527360,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256531456,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256533504,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256534528,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535040,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535296,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535424,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535488,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535520,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535536,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535544,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535548,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535550,32,FLEN) -NAN_BOXED(2132424160,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535551,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772160,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772161,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772163,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772167,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772175,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772191,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772223,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772287,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772415,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772671,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167773183,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167774207,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167776255,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167780351,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167788543,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167804927,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167837695,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167903231,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168034303,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168296447,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168820735,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(169869311,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(171966463,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(171966464,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(174063616,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175112192,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175636480,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175898624,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176029696,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176095232,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176128000,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176144384,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176152576,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176156672,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176158720,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176159744,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160256,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160512,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160640,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160704,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160736,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160752,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160760,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160764,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160766,32,FLEN) -NAN_BOXED(2132472930,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160767,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872256,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872271,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872287,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872319,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872383,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872511,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872767,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155873279,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155874303,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155876351,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155880447,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155888639,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155905023,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155937791,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156003327,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156134399,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156396543,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2156920831,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157969407,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160066559,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160066560,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162163712,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163212288,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163736576,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163998720,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164129792,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164195328,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164228096,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164244480,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164252672,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164256768,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164258816,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164259840,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260352,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260608,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260736,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260800,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260832,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260848,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2132513138,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260863,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033024,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033025,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033027,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033031,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033039,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033055,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033087,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033151,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033279,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033535,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332034047,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332035071,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332037119,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332041215,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332049407,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332065791,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332098559,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332164095,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332295167,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332557311,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2333081599,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2334130175,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2336227327,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2336227328,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2338324480,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2339373056,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2339897344,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340159488,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340290560,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340356096,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340388864,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340405248,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340413440,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340417536,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340419584,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340420608,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421120,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421376,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421504,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421568,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421600,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421616,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421624,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421628,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421630,32,FLEN) -NAN_BOXED(2132566188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421631,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838860800,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838860801,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838860803,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838860807,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838860815,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838860831,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838860863,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838860927,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838861055,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838861311,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838861823,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838862847,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838864895,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838868991,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838877183,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838893567,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838926335,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(838991871,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(839122943,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(839385087,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(839909375,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(840957951,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(843055103,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(843055104,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(845152256,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(846200832,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(846725120,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(846987264,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847118336,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847183872,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847216640,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847233024,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847241216,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847245312,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847247360,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847248384,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847248896,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249152,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249280,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249344,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249376,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249392,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249400,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249404,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249406,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(847249407,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132599576,32,FLEN) -NAN_BOXED(3422020,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002688,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002689,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002691,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002695,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002703,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002719,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002751,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002815,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238002943,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238003199,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238003711,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238004735,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238006783,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238010879,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238019071,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238035455,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238068223,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238133759,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238264831,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3238526975,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3239051263,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3240099839,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3242196991,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3242196992,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3244294144,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3245342720,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3245867008,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246129152,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246260224,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246325760,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246358528,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246374912,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246383104,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246387200,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246389248,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246390272,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246390784,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391040,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391168,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391232,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391264,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391280,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391288,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391292,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391294,32,FLEN) -NAN_BOXED(2132601500,32,FLEN) -NAN_BOXED(2150905028,32,FLEN) -NAN_BOXED(3246391295,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663296,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663297,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663299,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663303,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663311,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663327,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663359,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663423,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663551,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663807,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100664319,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100665343,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100667391,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100671487,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100679679,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100696063,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100728831,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100794367,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100925439,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(101187583,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(101711871,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(102760447,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(104857599,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(104857600,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(106954752,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108003328,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108527616,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108789760,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108920832,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(108986368,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109019136,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109035520,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109043712,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109047808,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109049856,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109050880,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051392,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051648,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051776,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051840,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051872,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051888,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051896,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051900,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051902,32,FLEN) -NAN_BOXED(2132612135,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051903,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255808,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255809,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255811,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255815,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255823,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255839,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255871,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255935,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256063,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256319,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315256831,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315257855,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315259903,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315263999,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315272191,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315288575,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315321343,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315386879,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315517951,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315780095,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2316304383,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2317352959,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2319450111,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2319450112,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2321547264,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2322595840,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323120128,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323382272,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323513344,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323578880,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323611648,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323628032,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323636224,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323640320,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323642368,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323643392,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323643904,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644160,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644288,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644352,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644384,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644400,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644408,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644412,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644414,32,FLEN) -NAN_BOXED(2132628188,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644415,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535552,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535553,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535555,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535559,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535567,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535583,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535615,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535679,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535807,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256536063,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256536575,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256537599,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256539647,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256543743,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256551935,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256568319,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256601087,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256666623,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256797695,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2257059839,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2257584127,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2258632703,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2260729855,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2260729856,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2262827008,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2263875584,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264399872,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264662016,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264793088,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264858624,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264891392,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264907776,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264915968,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264920064,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264922112,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923136,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923648,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923904,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924032,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924096,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924128,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924144,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924152,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924156,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924158,32,FLEN) -NAN_BOXED(2132660734,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924159,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567232,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567233,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567235,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567239,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567247,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567263,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567295,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567359,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567487,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969567743,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969568255,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969569279,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969571327,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969575423,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969583615,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969599999,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969632767,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969698303,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2969829375,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2970091519,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2970615807,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2971664383,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2973761535,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2973761536,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2975858688,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2976907264,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977431552,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977693696,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977824768,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977890304,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977923072,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977939456,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977947648,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977951744,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977953792,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977954816,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955328,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955584,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955712,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955776,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955808,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955824,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955832,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955836,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955838,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(2977955839,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132670035,32,FLEN) -NAN_BOXED(2150882377,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483663,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483679,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483711,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483775,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483903,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484159,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484671,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147485695,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147487743,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147491839,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147500031,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147516415,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147549183,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147614719,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147745791,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148007935,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148532223,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149580799,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677951,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677952,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153775104,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154823680,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155347968,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155610112,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155741184,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155806720,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155839488,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155855872,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155864064,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155868160,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155870208,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871232,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871744,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872000,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872128,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872192,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872224,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872240,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132696775,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872255,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587456,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587457,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587459,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587463,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587471,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587487,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587519,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587583,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587711,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365587967,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365588479,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365589503,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365591551,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365595647,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365603839,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365620223,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365652991,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365718527,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2365849599,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2366111743,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2366636031,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2367684607,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2369781759,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2369781760,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2371878912,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2372927488,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373451776,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373713920,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373844992,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373910528,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373943296,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373959680,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373967872,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373971968,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373974016,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975040,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975552,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975808,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373975936,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976000,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976032,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976048,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976056,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976060,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976062,32,FLEN) -NAN_BOXED(2132698981,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2373976063,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645922816,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645922817,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645922819,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645922823,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645922831,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645922847,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645922879,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645922943,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645923071,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645923327,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645923839,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645924863,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645926911,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645931007,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645939199,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645955583,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(645988351,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(646053887,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(646184959,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(646447103,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(646971391,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(648019967,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(650117119,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(650117120,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(652214272,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(653262848,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(653787136,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654049280,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654180352,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654245888,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654278656,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654295040,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654303232,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654307328,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654309376,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654310400,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654310912,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311168,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311296,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311360,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311392,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311408,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311416,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311420,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311422,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(654311423,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132702039,32,FLEN) -NAN_BOXED(3388255,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364672,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364673,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364675,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364679,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364687,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364703,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364735,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364799,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382364927,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382365183,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382365695,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382366719,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382368767,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382372863,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382381055,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382397439,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382430207,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382495743,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382626815,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2382888959,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2383413247,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2384461823,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2386558975,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2386558976,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2388656128,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2389704704,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390228992,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390491136,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390622208,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390687744,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390720512,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390736896,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390745088,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390749184,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390751232,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390752256,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390752768,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753024,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753152,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753216,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753248,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753264,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753272,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753276,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753278,32,FLEN) -NAN_BOXED(2132723723,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753279,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743074816,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743074817,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743074819,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743074823,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743074831,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743074847,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743074879,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743074943,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743075071,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743075327,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743075839,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743076863,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743078911,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743083007,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743091199,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743107583,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743140351,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743205887,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743336959,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2743599103,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2744123391,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2745171967,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2747269119,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2747269120,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2749366272,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2750414848,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2750939136,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751201280,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751332352,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751397888,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751430656,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751447040,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751455232,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751459328,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751461376,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751462400,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751462912,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463168,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463296,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463360,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463392,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463408,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463416,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463420,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463422,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(2751463423,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132747834,32,FLEN) -NAN_BOXED(2150857026,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578813952,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578813953,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578813955,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578813959,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578813967,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578813983,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578814015,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578814079,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578814207,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578814463,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578814975,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578815999,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578818047,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578822143,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578830335,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578846719,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578879487,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(578945023,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(579076095,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(579338239,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(579862527,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(580911103,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(583008255,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(583008256,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(585105408,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(586153984,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(586678272,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(586940416,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587071488,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587137024,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587169792,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587186176,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587194368,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587198464,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587200512,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587201536,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202048,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202304,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202432,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202496,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202528,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202544,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202552,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202556,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202558,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(587202559,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132753598,32,FLEN) -NAN_BOXED(3371515,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554432,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554433,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554435,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554439,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554447,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554463,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554495,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554559,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554687,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554943,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33555455,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33556479,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33558527,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33562623,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33570815,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33587199,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33619967,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33685503,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33816575,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(34078719,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(34603007,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(35651583,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(37748735,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(37748736,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(39845888,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(40894464,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41418752,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41680896,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41811968,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41877504,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41910272,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41926656,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41934848,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41938944,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41940992,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942016,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942528,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942784,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942912,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41942976,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943008,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943024,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943032,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943036,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943038,32,FLEN) -NAN_BOXED(2132759789,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943039,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581056,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581057,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581059,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581063,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581071,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581087,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581119,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581183,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581311,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897581567,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897582079,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897583103,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897585151,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897589247,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897597439,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897613823,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897646591,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897712127,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(897843199,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(898105343,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(898629631,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(899678207,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(901775359,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(901775360,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(903872512,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(904921088,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905445376,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905707520,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905838592,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905904128,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905936896,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905953280,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905961472,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905965568,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905967616,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905968640,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969152,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969408,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969536,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969600,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969632,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969648,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969656,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969660,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969662,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(905969663,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132762724,32,FLEN) -NAN_BOXED(3368569,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721600,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721601,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721603,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721607,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721615,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721631,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721663,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721727,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677721855,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677722111,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677722623,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677723647,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677725695,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677729791,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677737983,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677754367,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677787135,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677852671,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1677983743,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1678245887,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1678770175,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1679818751,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1681915903,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1681915904,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1684013056,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1685061632,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1685585920,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1685848064,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1685979136,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686044672,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686077440,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686093824,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686102016,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686106112,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686108160,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686109184,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686109696,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686109952,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686110080,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686110144,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686110176,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686110192,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686110200,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686110204,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686110206,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(1686110207,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2132765038,32,FLEN) -NAN_BOXED(1070435900,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922746880,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922746881,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922746883,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922746887,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922746895,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922746911,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922746943,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922747007,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922747135,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922747391,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922747903,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922748927,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922750975,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922755071,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922763263,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922779647,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922812415,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(922877951,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(923009023,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(923271167,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(923795455,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(924844031,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(926941183,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(926941184,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(929038336,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(930086912,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(930611200,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(930873344,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931004416,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931069952,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931102720,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931119104,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931127296,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931131392,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931133440,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931134464,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931134976,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135232,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135360,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135424,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135456,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135472,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135480,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135484,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135486,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(931135487,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132810014,32,FLEN) -NAN_BOXED(3353386,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410176,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410177,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410179,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410183,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410191,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410207,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410239,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410303,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410431,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023410687,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023411199,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023412223,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023414271,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023418367,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023426559,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023442943,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023475711,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023541247,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023672319,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1023934463,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1024458751,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1025507327,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1027604479,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1027604480,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1029701632,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1030750208,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031274496,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031536640,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031667712,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031733248,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031766016,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031782400,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031790592,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031794688,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031796736,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031797760,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798272,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798528,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798656,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798720,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798752,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798768,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798776,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798780,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798782,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1031798783,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132835913,32,FLEN) -NAN_BOXED(3345129,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019898880,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019898881,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019898883,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019898887,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019898895,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019898911,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019898943,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019899007,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019899135,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019899391,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019899903,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019900927,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019902975,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019907071,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019915263,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019931647,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3019964415,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3020029951,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3020161023,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3020423167,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3020947455,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3021996031,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3024093183,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3024093184,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3026190336,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3027238912,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3027763200,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028025344,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028156416,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028221952,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028254720,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028271104,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028279296,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028283392,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028285440,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028286464,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028286976,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287232,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287360,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287424,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287456,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287472,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287480,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287484,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287486,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3028287487,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132855363,32,FLEN) -NAN_BOXED(2150822603,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790016,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790017,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790019,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790023,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790031,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790047,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790079,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790143,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790271,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952790527,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952791039,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952792063,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952794111,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952798207,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952806399,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952822783,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952855551,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2952921087,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2953052159,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2953314303,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2953838591,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2954887167,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2956984319,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2956984320,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2959081472,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2960130048,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2960654336,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2960916480,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961047552,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961113088,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961145856,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961162240,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961170432,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961174528,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961176576,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961177600,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178112,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178368,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178496,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178560,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178592,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178608,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178616,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178620,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178622,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(2961178623,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132858992,32,FLEN) -NAN_BOXED(2150821453,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591168,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591169,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591171,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591175,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591183,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591199,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591231,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591295,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591423,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595591679,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595592191,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595593215,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595595263,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595599359,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595607551,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595623935,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595656703,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595722239,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(595853311,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(596115455,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(596639743,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(597688319,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(599785471,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(599785472,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(601882624,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(602931200,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603455488,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603717632,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603848704,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603914240,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603947008,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603963392,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603971584,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603975680,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603977728,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603978752,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979264,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979520,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979648,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979712,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979744,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979760,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979768,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979772,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979774,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(603979775,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2132860608,32,FLEN) -NAN_BOXED(3337294,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217728,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217729,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217731,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217735,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217743,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217759,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217791,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217855,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134217983,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134218239,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134218751,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134219775,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134221823,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134225919,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134234111,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134250495,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134283263,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134348799,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134479871,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(134742015,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(135266303,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(136314879,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(138412031,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(138412032,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(140509184,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(141557760,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142082048,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142344192,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142475264,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142540800,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142573568,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142589952,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142598144,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142602240,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142604288,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142605312,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142605824,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606080,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606208,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606272,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606304,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606320,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606328,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606332,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606334,32,FLEN) -NAN_BOXED(2132898144,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606335,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606336,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606337,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606339,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606343,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606351,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606367,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606399,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606463,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606591,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606847,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142607359,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142608383,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142610431,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142614527,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142622719,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142639103,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142671871,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142737407,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142868479,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(143130623,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(143654911,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(144703487,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(146800639,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(146800640,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(148897792,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(149946368,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150470656,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150732800,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150863872,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150929408,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150962176,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150978560,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150986752,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150990848,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150992896,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150993920,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994432,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994688,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994816,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994880,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994912,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994928,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994936,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994940,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994942,32,FLEN) -NAN_BOXED(2132916829,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994943,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881024,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881025,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881027,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881031,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881039,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881055,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881087,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881151,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881279,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881535,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234882047,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234883071,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234885119,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234889215,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234897407,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234913791,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234946559,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235012095,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235143167,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235405311,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235929599,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(236978175,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(239075327,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(239075328,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(241172480,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(242221056,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(242745344,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243007488,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243138560,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243204096,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243236864,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243253248,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243261440,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243265536,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243267584,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243268608,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269120,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269376,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269504,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269568,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269600,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269616,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269624,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269628,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269630,32,FLEN) -NAN_BOXED(2132937231,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269631,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(63,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(127,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(255,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(511,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1023,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2047,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4095,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8191,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16383,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32767,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65535,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(131071,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(524287,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1048575,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2097151,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194303,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4194304,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6291456,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7340032,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7864320,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8126464,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8257536,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8323072,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8355840,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8372224,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8380416,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8384512,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8386560,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8387584,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388096,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388352,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388480,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388544,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388576,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388592,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2132943109,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388607,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535552,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535553,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535555,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535559,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535567,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535583,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535615,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535679,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535807,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256536063,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256536575,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256537599,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256539647,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256543743,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256551935,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256568319,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256601087,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256666623,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256797695,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2257059839,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2257584127,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2258632703,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2260729855,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2260729856,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2262827008,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2263875584,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264399872,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264662016,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264793088,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264858624,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264891392,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264907776,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264915968,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264920064,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264922112,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923136,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923648,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264923904,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924032,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924096,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924128,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924144,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924152,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924156,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924158,32,FLEN) -NAN_BOXED(2132956574,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924159,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338665984,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338665985,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338665987,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338665991,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338665999,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338666015,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338666047,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338666111,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338666239,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338666495,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338667007,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338668031,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338670079,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338674175,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338682367,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338698751,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338731519,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338797055,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3338928127,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3339190271,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3339714559,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3340763135,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3342860287,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3342860288,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3344957440,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3346006016,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3346530304,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3346792448,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3346923520,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3346989056,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347021824,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347038208,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347046400,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347050496,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347052544,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347053568,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054080,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054336,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054464,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054528,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054560,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054576,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054584,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054588,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054590,32,FLEN) -NAN_BOXED(2132967495,32,FLEN) -NAN_BOXED(2150787446,32,FLEN) -NAN_BOXED(3347054591,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277376,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277377,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277379,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277383,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277391,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277407,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277439,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277503,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277631,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330277887,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330278399,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330279423,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330281471,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330285567,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330293759,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330310143,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330342911,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330408447,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330539519,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3330801663,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3331325951,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3332374527,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3334471679,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3334471680,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3336568832,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3337617408,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338141696,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338403840,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338534912,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338600448,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338633216,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338649600,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338657792,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338661888,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338663936,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338664960,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665472,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665728,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665856,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665920,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665952,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665968,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665976,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665980,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665982,32,FLEN) -NAN_BOXED(2133006224,32,FLEN) -NAN_BOXED(2150775475,32,FLEN) -NAN_BOXED(3338665983,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772160,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772161,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772163,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772167,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772175,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772191,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772223,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772287,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772415,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167772671,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167773183,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167774207,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167776255,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167780351,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167788543,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167804927,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167837695,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(167903231,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168034303,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168296447,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(168820735,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(169869311,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(171966463,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(171966464,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(174063616,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175112192,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175636480,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(175898624,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176029696,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176095232,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176128000,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176144384,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176152576,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176156672,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176158720,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176159744,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160256,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160512,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160640,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160704,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160736,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160752,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160760,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160764,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160766,32,FLEN) -NAN_BOXED(2133019260,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(176160767,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557120,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557121,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557123,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557127,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557135,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557151,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557183,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557247,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557375,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271557631,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271558143,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271559167,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271561215,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271565311,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271573503,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271589887,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271622655,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271688191,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3271819263,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3272081407,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3272605695,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3273654271,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3275751423,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3275751424,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3277848576,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3278897152,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279421440,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279683584,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279814656,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279880192,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279912960,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279929344,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279937536,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279941632,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279943680,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279944704,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945216,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945472,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945600,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945664,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945696,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945712,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945720,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945724,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945726,32,FLEN) -NAN_BOXED(2133028898,32,FLEN) -NAN_BOXED(2150768507,32,FLEN) -NAN_BOXED(3279945727,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924160,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924161,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924163,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924167,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924175,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924191,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924223,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924287,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924415,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924671,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264925183,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264926207,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264928255,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264932351,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264940543,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264956927,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264989695,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265055231,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265186303,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265448447,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265972735,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2267021311,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2269118463,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2269118464,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2271215616,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2272264192,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2272788480,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273050624,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273181696,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273247232,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273280000,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273296384,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273304576,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273308672,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273310720,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273311744,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312256,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312512,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312640,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312704,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312736,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312752,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312760,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312764,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312766,32,FLEN) -NAN_BOXED(2133049269,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312767,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520384,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520385,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520387,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520391,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520399,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520415,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520447,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520511,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520639,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709520895,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709521407,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709522431,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709524479,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709528575,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709536767,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709553151,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709585919,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709651455,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2709782527,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2710044671,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2710568959,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2711617535,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2713714687,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2713714688,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2715811840,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2716860416,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717384704,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717646848,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717777920,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717843456,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717876224,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717892608,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717900800,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717904896,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717906944,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717907968,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908480,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908736,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908864,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908928,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908960,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908976,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908984,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908988,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908990,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(2717908991,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133060791,32,FLEN) -NAN_BOXED(2150758755,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083584,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083585,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083587,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083591,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083599,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083615,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083647,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083711,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822083839,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822084095,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822084607,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822085631,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822087679,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822091775,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822099967,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822116351,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822149119,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822214655,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822345727,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(822607871,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(823132159,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(824180735,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(826277887,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(826277888,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(828375040,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(829423616,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(829947904,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830210048,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830341120,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830406656,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830439424,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830455808,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830464000,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830468096,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830470144,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830471168,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830471680,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830471936,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830472064,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830472128,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830472160,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830472176,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830472184,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830472188,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830472190,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(830472191,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2133080272,32,FLEN) -NAN_BOXED(3269179,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013265920,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013265921,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013265923,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013265927,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013265935,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013265951,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013265983,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013266047,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013266175,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013266431,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013266943,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013267967,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013270015,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013274111,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013282303,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013298687,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013331455,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013396991,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013528063,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2013790207,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2014314495,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2015363071,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2017460223,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2017460224,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2019557376,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2020605952,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021130240,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021392384,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021523456,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021588992,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021621760,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021638144,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021646336,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021650432,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021652480,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021653504,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654016,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654272,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654400,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654464,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654496,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654512,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654520,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654524,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654526,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2021654527,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2133151391,32,FLEN) -NAN_BOXED(1069955479,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165824,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165825,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165827,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165831,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165839,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165855,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165887,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165951,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166079,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166335,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166847,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25167871,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25169919,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25174015,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25182207,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25198591,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25231359,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25296895,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25427967,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25690111,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(26214399,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(27262975,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(29360127,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(29360128,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31457280,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32505856,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33030144,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33292288,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33423360,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33488896,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33521664,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33538048,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33546240,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33550336,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33552384,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33553408,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33553920,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554176,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554304,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554368,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554400,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554416,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554424,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554428,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554430,32,FLEN) -NAN_BOXED(2133180968,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554431,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612736,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612737,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612739,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612743,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612751,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612767,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612799,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612863,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610612991,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610613247,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610613759,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610614783,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610616831,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610620927,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610629119,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610645503,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610678271,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610743807,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1610874879,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1611137023,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1611661311,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1612709887,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1614807039,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1614807040,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1616904192,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1617952768,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618477056,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618739200,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618870272,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618935808,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618968576,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618984960,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618993152,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618997248,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1618999296,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619000320,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619000832,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001088,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001216,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001280,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001312,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001328,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001336,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001340,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001342,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(1619001343,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2133190185,32,FLEN) -NAN_BOXED(1069909126,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089984,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089985,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089987,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089991,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089999,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090015,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090047,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090111,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090239,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090495,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290091007,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290092031,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290094079,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290098175,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290106367,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290122751,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290155519,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290221055,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290352127,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290614271,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2291138559,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2292187135,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2294284287,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2294284288,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2296381440,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2297430016,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2297954304,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298216448,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298347520,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298413056,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298445824,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298462208,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298470400,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298474496,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298476544,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298477568,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478080,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478336,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478464,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478528,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478560,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478576,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478584,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478588,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478590,32,FLEN) -NAN_BOXED(2133199233,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478591,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038080,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038081,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038083,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038087,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038095,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038111,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038143,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038207,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038335,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181038591,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181039103,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181040127,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181042175,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181046271,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181054463,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181070847,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181103615,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181169151,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181300223,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2181562367,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2182086655,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2183135231,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2185232383,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2185232384,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2187329536,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2188378112,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2188902400,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189164544,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189295616,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189361152,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189393920,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189410304,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189418496,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189422592,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189424640,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189425664,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426176,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426432,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426560,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426624,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426656,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426672,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426680,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426684,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426686,32,FLEN) -NAN_BOXED(2133234792,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2189426687,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937984,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937985,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937987,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937991,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937999,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938015,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938047,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938111,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938239,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938495,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192939007,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192940031,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192942079,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192946175,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192954367,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192970751,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193003519,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193069055,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193200127,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193462271,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193986559,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(195035135,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(197132287,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(197132288,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(199229440,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(200278016,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(200802304,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201064448,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201195520,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201261056,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201293824,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201310208,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201318400,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201322496,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201324544,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201325568,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326080,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326336,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326464,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326528,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326560,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326576,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326584,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326588,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326590,32,FLEN) -NAN_BOXED(2133251056,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326591,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203904,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203905,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203907,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203911,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203919,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203935,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206203967,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204031,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204159,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204415,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206204927,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206205951,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206207999,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206212095,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206220287,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206236671,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206269439,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206334975,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206466047,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2206728191,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2207252479,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2208301055,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2210398207,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2210398208,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2212495360,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2213543936,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214068224,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214330368,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214461440,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214526976,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214559744,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214576128,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214584320,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214588416,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214590464,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214591488,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592000,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592256,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592384,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592448,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592480,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592496,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592504,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592508,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592510,32,FLEN) -NAN_BOXED(2133270886,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592511,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386240,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386241,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386243,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386247,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386255,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386271,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386303,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386367,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386495,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397386751,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397387263,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397388287,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397390335,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397394431,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397402623,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397419007,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397451775,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397517311,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397648383,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3397910527,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3398434815,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3399483391,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3401580543,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3401580544,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3403677696,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3404726272,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405250560,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405512704,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405643776,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405709312,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405742080,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405758464,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405766656,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405770752,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405772800,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405773824,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774336,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774592,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774720,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774784,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774816,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774832,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774840,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774844,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774846,32,FLEN) -NAN_BOXED(2133282708,32,FLEN) -NAN_BOXED(2150692470,32,FLEN) -NAN_BOXED(3405774847,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349504,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349505,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349507,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349511,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349519,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349535,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349567,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349631,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835349759,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835350015,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835350527,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835351551,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835353599,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835357695,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835365887,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835382271,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835415039,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835480575,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835611647,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2835873791,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2836398079,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2837446655,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2839543807,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2839543808,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2841640960,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2842689536,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843213824,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843475968,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843607040,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843672576,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843705344,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843721728,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843729920,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843734016,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843736064,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843737088,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843737600,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843737856,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843737984,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843738048,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843738080,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843738096,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843738104,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843738108,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843738110,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(2843738111,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133286199,32,FLEN) -NAN_BOXED(2150691449,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026531840,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026531841,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026531843,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026531847,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026531855,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026531871,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026531903,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026531967,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026532095,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026532351,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026532863,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026533887,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026535935,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026540031,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026548223,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026564607,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026597375,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026662911,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4026793983,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4027056127,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4027580415,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4028628991,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4030726143,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4030726144,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4032823296,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4033871872,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034396160,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034658304,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034789376,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034854912,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034887680,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034904064,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034912256,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034916352,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034918400,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034919424,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034919936,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920192,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920320,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920384,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920416,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920432,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920440,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920444,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920446,32,FLEN) -NAN_BOXED(2133296851,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(4034920447,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572288,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572289,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572291,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572295,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572303,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572319,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572351,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572415,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572543,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818572799,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818573311,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818574335,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818576383,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818580479,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818588671,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818605055,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818637823,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818703359,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2818834431,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2819096575,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2819620863,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2820669439,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2822766591,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2822766592,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2824863744,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2825912320,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826436608,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826698752,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826829824,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826895360,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826928128,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826944512,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826952704,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826956800,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826958848,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826959872,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960384,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960640,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960768,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960832,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960864,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960880,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960888,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960892,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960894,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(2826960895,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133322053,32,FLEN) -NAN_BOXED(2150680997,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291200,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291201,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291203,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291207,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291215,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291231,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291263,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291327,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291455,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258291711,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258292223,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258293247,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258295295,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258299391,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258307583,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258323967,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258356735,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258422271,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258553343,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1258815487,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1259339775,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1260388351,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1262485503,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1262485504,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1264582656,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1265631232,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266155520,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266417664,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266548736,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266614272,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266647040,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266663424,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266671616,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266675712,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266677760,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266678784,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679296,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679552,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679680,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679744,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679776,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679792,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679800,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679804,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679806,32,FLEN) -NAN_BOXED(2133325414,32,FLEN) -NAN_BOXED(3196373,32,FLEN) -NAN_BOXED(1266679807,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793728,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793729,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793731,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793735,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793743,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793759,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793791,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793855,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182793983,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182794239,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182794751,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182795775,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182797823,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182801919,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182810111,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182826495,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182859263,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1182924799,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1183055871,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1183318015,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1183842303,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1184890879,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1186988031,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1186988032,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1189085184,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1190133760,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1190658048,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1190920192,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191051264,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191116800,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191149568,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191165952,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191174144,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191178240,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191180288,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191181312,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191181824,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182080,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182208,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182272,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182304,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182320,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182328,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182332,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182334,32,FLEN) -NAN_BOXED(2133361299,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1191182335,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048192,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048193,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048195,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048199,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048207,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048223,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048255,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048319,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048447,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879048703,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879049215,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879050239,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879052287,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879056383,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879064575,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879080959,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879113727,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879179263,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879310335,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1879572479,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1880096767,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1881145343,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1883242495,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1883242496,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1885339648,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1886388224,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1886912512,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887174656,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887305728,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887371264,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887404032,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887420416,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887428608,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887432704,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887434752,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887435776,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436288,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436544,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436672,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436736,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436768,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436784,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436792,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436796,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436798,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(1887436799,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2133370783,32,FLEN) -NAN_BOXED(1069697621,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937984,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937985,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937987,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937991,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192937999,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938015,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938047,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938111,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938239,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192938495,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192939007,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192940031,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192942079,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192946175,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192954367,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(192970751,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193003519,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193069055,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193200127,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193462271,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(193986559,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(195035135,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(197132287,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(197132288,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(199229440,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(200278016,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(200802304,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201064448,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201195520,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201261056,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201293824,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201310208,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201318400,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201322496,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201324544,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201325568,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326080,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326336,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326464,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326528,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326560,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326576,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326584,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326588,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326590,32,FLEN) -NAN_BOXED(2133406849,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326591,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863488,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863489,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863491,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863495,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863503,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863519,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863551,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863615,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863743,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076863999,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076864511,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076865535,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076867583,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076871679,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076879871,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076896255,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076929023,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4076994559,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4077125631,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4077387775,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4077912063,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4078960639,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4081057791,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4081057792,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4083154944,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4084203520,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4084727808,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4084989952,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085121024,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085186560,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085219328,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085235712,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085243904,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085248000,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085250048,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085251072,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085251584,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085251840,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085251968,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085252032,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085252064,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085252080,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085252088,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085252092,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085252094,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4085252095,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2133437569,32,FLEN) -NAN_BOXED(3217104793,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458368,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458369,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458371,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458375,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458383,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458399,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458431,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458495,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458623,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902458879,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902459391,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902460415,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902462463,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902466559,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902474751,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902491135,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902523903,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902589439,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902720511,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2902982655,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2903506943,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2904555519,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2906652671,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2906652672,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2908749824,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2909798400,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910322688,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910584832,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910715904,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910781440,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910814208,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910830592,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910838784,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910842880,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910844928,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910845952,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846464,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846720,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846848,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846912,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846944,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846960,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846968,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846972,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846974,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(2910846975,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133453015,32,FLEN) -NAN_BOXED(2150643393,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867200,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867201,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867203,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867207,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867215,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867231,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867263,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867327,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867455,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306867711,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306868223,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306869247,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306871295,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306875391,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306883583,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306899967,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306932735,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2306998271,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307129343,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307391487,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2307915775,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2308964351,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2311061503,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2311061504,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2313158656,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314207232,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314731520,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2314993664,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315124736,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315190272,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315223040,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315239424,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315247616,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315251712,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315253760,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315254784,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255296,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255552,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255680,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255744,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255776,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255792,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255800,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255804,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255806,32,FLEN) -NAN_BOXED(2133456909,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2315255807,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644416,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644417,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644419,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644423,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644431,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644447,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644479,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644543,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644671,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323644927,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323645439,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323646463,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323648511,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323652607,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323660799,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323677183,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323709951,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323775487,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2323906559,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2324168703,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2324692991,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2325741567,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2327838719,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2327838720,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2329935872,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2330984448,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331508736,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331770880,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331901952,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2331967488,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332000256,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332016640,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332024832,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332028928,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332030976,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032000,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032512,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032768,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032896,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032960,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332032992,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033008,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033016,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033020,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033022,32,FLEN) -NAN_BOXED(2133501164,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033023,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214016,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214017,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214019,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214023,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214031,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214047,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214079,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214143,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214271,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904214527,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904215039,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904216063,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904218111,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904222207,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904230399,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904246783,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904279551,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904345087,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904476159,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1904738303,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1905262591,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1906311167,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1908408319,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1908408320,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1910505472,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1911554048,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912078336,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912340480,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912471552,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912537088,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912569856,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912586240,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912594432,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912598528,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912600576,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912601600,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602112,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602368,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602496,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602560,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602592,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602608,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602616,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602620,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602622,32,FLEN) -NAN_BOXED(2133519684,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1912602623,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720256,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720257,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720259,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720263,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720271,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720287,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720319,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720383,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720511,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720767,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58721279,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58722303,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58724351,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58728447,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58736639,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58753023,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58785791,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58851327,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58982399,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(59244543,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(59768831,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(60817407,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(62914559,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(62914560,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65011712,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66060288,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66584576,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66846720,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66977792,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67043328,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67076096,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67092480,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67100672,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67104768,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67106816,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67107840,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108352,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108608,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108736,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108800,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108832,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108848,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108856,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108860,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108862,32,FLEN) -NAN_BOXED(2133537511,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108863,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701131776,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701131777,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701131779,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701131783,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701131791,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701131807,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701131839,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701131903,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701132031,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701132287,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701132799,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701133823,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701135871,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701139967,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701148159,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701164543,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701197311,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701262847,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701393919,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2701656063,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2702180351,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2703228927,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2705326079,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2705326080,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2707423232,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2708471808,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2708996096,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709258240,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709389312,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709454848,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709487616,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709504000,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709512192,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709516288,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709518336,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709519360,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709519872,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520128,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520256,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520320,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520352,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520368,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520376,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520380,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520382,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(2709520383,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133541070,32,FLEN) -NAN_BOXED(2150618602,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326592,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326593,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326595,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326599,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326607,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326623,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326655,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326719,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201326847,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201327103,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201327615,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201328639,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201330687,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201334783,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201342975,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201359359,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201392127,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201457663,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201588735,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(201850879,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(202375167,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(203423743,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(205520895,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(205520896,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(207618048,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(208666624,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209190912,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209453056,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209584128,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209649664,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209682432,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209698816,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209707008,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209711104,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209713152,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714176,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714688,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209714944,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715072,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715136,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715168,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715184,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715192,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715196,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715198,32,FLEN) -NAN_BOXED(2133571977,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715199,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274688,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274689,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274691,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274695,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274703,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274719,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274751,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274815,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274943,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92275199,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92275711,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92276735,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92278783,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92282879,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92291071,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92307455,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92340223,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92405759,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92536831,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92798975,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(93323263,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(94371839,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(96468991,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(96468992,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(98566144,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(99614720,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100139008,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100401152,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100532224,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100597760,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100630528,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100646912,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100655104,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100659200,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100661248,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100662272,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100662784,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663040,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663168,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663232,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663264,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663280,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663288,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663292,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663294,32,FLEN) -NAN_BOXED(2133629962,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(100663295,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902592,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902593,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902595,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902599,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902607,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902623,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902655,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902719,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249902847,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249903103,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249903615,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249904639,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249906687,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249910783,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249918975,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249935359,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1249968127,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1250033663,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1250164735,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1250426879,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1250951167,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1251999743,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1254096895,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1254096896,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1256194048,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1257242624,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1257766912,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258029056,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258160128,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258225664,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258258432,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258274816,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258283008,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258287104,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258289152,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258290176,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258290688,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258290944,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258291072,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258291136,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258291168,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258291184,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258291192,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258291196,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258291198,32,FLEN) -NAN_BOXED(2133643678,32,FLEN) -NAN_BOXED(3106553,32,FLEN) -NAN_BOXED(1258291199,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830464,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830465,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830467,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830471,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830479,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830495,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830527,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830591,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830719,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744830975,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744831487,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744832511,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744834559,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744838655,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744846847,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744863231,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744895999,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1744961535,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1745092607,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1745354751,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1745879039,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1746927615,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1749024767,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1749024768,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1751121920,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1752170496,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1752694784,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1752956928,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753088000,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753153536,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753186304,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753202688,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753210880,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753214976,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753217024,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753218048,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753218560,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753218816,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753218944,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753219008,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753219040,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753219056,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753219064,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753219068,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753219070,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(1753219071,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2133653818,32,FLEN) -NAN_BOXED(1069379705,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924160,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924161,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924163,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924167,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924175,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924191,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924223,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924287,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924415,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924671,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264925183,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264926207,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264928255,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264932351,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264940543,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264956927,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264989695,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265055231,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265186303,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265448447,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265972735,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2267021311,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2269118463,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2269118464,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2271215616,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2272264192,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2272788480,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273050624,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273181696,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273247232,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273280000,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273296384,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273304576,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273308672,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273310720,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273311744,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312256,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312512,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312640,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312704,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312736,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312752,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312760,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312764,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312766,32,FLEN) -NAN_BOXED(2133655925,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312767,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369728,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369729,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369731,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369735,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369743,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369759,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369791,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369855,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231369983,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231370239,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231370751,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231371775,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231373823,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231377919,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231386111,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231402495,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231435263,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231500799,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231631871,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2231894015,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2232418303,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2233466879,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2235564031,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2235564032,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2237661184,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2238709760,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239234048,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239496192,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239627264,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239692800,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239725568,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239741952,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239750144,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239754240,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239756288,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239757312,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239757824,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758080,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758208,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758272,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758304,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758320,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758328,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758332,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758334,32,FLEN) -NAN_BOXED(2133656772,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758335,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462080,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462081,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462083,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462087,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462095,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462111,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462143,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462207,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462335,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132462591,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132463103,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132464127,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132466175,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132470271,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132478463,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132494847,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132527615,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132593151,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132724223,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1132986367,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1133510655,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1134559231,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1136656383,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1136656384,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1138753536,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1139802112,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140326400,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140588544,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140719616,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140785152,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140817920,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140834304,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140842496,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140846592,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140848640,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140849664,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850176,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850432,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850560,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850624,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850656,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850672,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850680,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850684,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850686,32,FLEN) -NAN_BOXED(2133671438,32,FLEN) -NAN_BOXED(3098957,32,FLEN) -NAN_BOXED(1140850687,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115684864,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115684865,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115684867,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115684871,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115684879,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115684895,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115684927,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115684991,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115685119,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115685375,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115685887,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115686911,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115688959,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115693055,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115701247,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115717631,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115750399,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115815935,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1115947007,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1116209151,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1116733439,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1117782015,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1119879167,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1119879168,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1121976320,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1123024896,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1123549184,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1123811328,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1123942400,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124007936,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124040704,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124057088,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124065280,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124069376,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124071424,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124072448,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124072960,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073216,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073344,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073408,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073440,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073456,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073464,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073468,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073470,32,FLEN) -NAN_BOXED(2133697791,32,FLEN) -NAN_BOXED(3091781,32,FLEN) -NAN_BOXED(1124073471,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910846976,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910846977,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910846979,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910846983,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910846991,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910847007,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910847039,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910847103,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910847231,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910847487,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910847999,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910849023,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910851071,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910855167,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910863359,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910879743,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910912511,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2910978047,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2911109119,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2911371263,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2911895551,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2912944127,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2915041279,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2915041280,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2917138432,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2918187008,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2918711296,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2918973440,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919104512,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919170048,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919202816,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919219200,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919227392,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919231488,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919233536,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919234560,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235072,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235328,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235456,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235520,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235552,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235568,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235576,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235580,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235582,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(2919235583,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133743609,32,FLEN) -NAN_BOXED(2150563031,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440512,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440513,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440515,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440519,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440527,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440543,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440575,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440639,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440767,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117441023,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117441535,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117442559,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117444607,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117448703,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117456895,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117473279,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117506047,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117571583,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117702655,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117964799,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(118489087,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(119537663,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(121634815,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(121634816,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(123731968,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(124780544,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125304832,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125566976,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125698048,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125763584,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125796352,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125812736,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125820928,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125825024,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125827072,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828096,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828608,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828864,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125828992,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829056,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829088,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829104,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829112,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829116,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829118,32,FLEN) -NAN_BOXED(2133751381,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(125829119,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749568,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749569,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749571,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749575,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749583,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749599,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749631,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749695,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160749823,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160750079,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160750591,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160751615,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160753663,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160757759,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160765951,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160782335,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160815103,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4160880639,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4161011711,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4161273855,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4161798143,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4162846719,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4164943871,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4164943872,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4167041024,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4168089600,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4168613888,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4168876032,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169007104,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169072640,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169105408,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169121792,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169129984,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169134080,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169136128,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169137152,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169137664,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169137920,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169138048,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169138112,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169138144,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169138160,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169138168,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169138172,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169138174,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4169138175,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2133752850,32,FLEN) -NAN_BOXED(3216755833,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824064,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824065,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824067,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824071,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824079,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824095,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824127,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824191,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824319,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824575,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276825087,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276826111,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276828159,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276832255,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276840447,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276856831,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276889599,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276955135,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(277086207,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(277348351,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(277872639,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(278921215,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(281018367,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(281018368,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(283115520,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(284164096,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(284688384,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(284950528,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285081600,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285147136,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285179904,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285196288,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285204480,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285208576,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285210624,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285211648,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212160,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212416,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212544,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212608,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212640,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212656,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212664,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212668,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212670,32,FLEN) -NAN_BOXED(2133790712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(285212671,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059648,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059649,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059651,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059655,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059663,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059679,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059711,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059775,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196059903,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196060159,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196060671,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196061695,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196063743,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196067839,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196076031,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196092415,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196125183,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196190719,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196321791,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3196583935,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3197108223,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3198156799,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3200253951,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3200253952,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3202351104,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3203399680,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3203923968,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204186112,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204317184,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204382720,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204415488,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204431872,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204440064,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204444160,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204446208,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204447232,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204447744,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448000,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448128,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448192,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448224,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448240,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448248,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448252,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448254,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3204448255,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133817109,32,FLEN) -NAN_BOXED(2150543348,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435456,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435457,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435459,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435463,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435471,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435487,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435519,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435583,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435711,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435967,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268436479,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268437503,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268439551,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268443647,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268451839,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268468223,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268500991,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268566527,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268697599,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268959743,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(269484031,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(270532607,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(272629759,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(272629760,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(274726912,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(275775488,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276299776,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276561920,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276692992,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276758528,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276791296,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276807680,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276815872,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276819968,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276822016,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823040,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823552,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823808,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276823936,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824000,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824032,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824048,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824056,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824060,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824062,32,FLEN) -NAN_BOXED(2133843701,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(276824063,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388608,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388623,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388639,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388671,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388735,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388863,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8389119,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8389631,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8390655,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8392703,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8396799,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8404991,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8421375,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8454143,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8519679,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8650751,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8912895,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(9437183,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10485759,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12582911,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12582912,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14680064,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15728640,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16252928,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16515072,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16646144,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16711680,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16744448,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16760832,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16769024,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16773120,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16775168,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776192,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776704,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776960,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777088,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777152,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777184,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777200,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2133856941,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777215,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266679808,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266679809,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266679811,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266679815,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266679823,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266679839,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266679871,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266679935,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266680063,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266680319,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266680831,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266681855,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266683903,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266687999,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266696191,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266712575,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266745343,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266810879,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1266941951,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1267204095,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1267728383,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1268776959,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1270874111,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1270874112,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1272971264,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1274019840,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1274544128,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1274806272,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1274937344,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275002880,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275035648,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275052032,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275060224,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275064320,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275066368,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275067392,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275067904,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068160,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068288,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068352,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068384,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068400,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068408,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068412,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068414,32,FLEN) -NAN_BOXED(2133862785,32,FLEN) -NAN_BOXED(3047595,32,FLEN) -NAN_BOXED(1275068415,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165824,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165825,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165827,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165831,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165839,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165855,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165887,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25165951,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166079,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166335,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25166847,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25167871,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25169919,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25174015,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25182207,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25198591,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25231359,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25296895,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25427967,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(25690111,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(26214399,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(27262975,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(29360127,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(29360128,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(31457280,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(32505856,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33030144,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33292288,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33423360,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33488896,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33521664,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33538048,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33546240,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33550336,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33552384,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33553408,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33553920,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554176,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554304,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554368,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554400,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554416,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554424,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554428,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554430,32,FLEN) -NAN_BOXED(2133871885,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(33554431,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046848,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046849,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046851,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046855,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046863,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046879,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046911,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260046975,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047103,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047359,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260047871,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260048895,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260050943,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260055039,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260063231,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260079615,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260112383,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260177919,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260308991,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(260571135,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(261095423,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(262143999,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(264241151,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(264241152,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(266338304,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(267386880,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(267911168,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268173312,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268304384,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268369920,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268402688,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268419072,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268427264,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268431360,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268433408,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268434432,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268434944,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435200,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435328,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435392,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435424,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435440,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435448,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435452,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435454,32,FLEN) -NAN_BOXED(2133874786,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(268435455,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715200,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715201,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715203,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715207,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715215,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715231,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715263,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715327,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715455,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209715711,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209716223,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209717247,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209719295,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209723391,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209731583,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209747967,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209780735,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209846271,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(209977343,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(210239487,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(210763775,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(211812351,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(213909503,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(213909504,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(216006656,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217055232,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217579520,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217841664,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(217972736,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218038272,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218071040,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218087424,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218095616,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218099712,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218101760,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218102784,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103296,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103552,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103680,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103744,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103776,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103792,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103800,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103804,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103806,32,FLEN) -NAN_BOXED(2133890187,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(218103807,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858432,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858433,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858435,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858439,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858447,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858463,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858495,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858559,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858687,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227858943,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227859455,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227860479,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227862527,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227866623,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227874815,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227891199,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227923967,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4227989503,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4228120575,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4228382719,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4228907007,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4229955583,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4232052735,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4232052736,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4234149888,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4235198464,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4235722752,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4235984896,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236115968,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236181504,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236214272,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236230656,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236238848,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236242944,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236244992,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236246016,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236246528,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236246784,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236246912,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236246976,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236247008,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236247024,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236247032,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236247036,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236247038,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4236247039,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2133893826,32,FLEN) -NAN_BOXED(3216605948,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260864,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260865,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260867,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260871,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260879,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260895,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260927,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260991,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261119,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261375,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164261887,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164262911,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164264959,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164269055,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164277247,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164293631,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164326399,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164391935,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164523007,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164785151,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2165309439,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2166358015,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2168455167,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2168455168,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2170552320,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2171600896,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172125184,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172387328,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172518400,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172583936,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172616704,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172633088,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172641280,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172645376,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172647424,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172648448,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172648960,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649216,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649344,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649408,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649440,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649456,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649464,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649468,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649470,32,FLEN) -NAN_BOXED(2133896023,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2172649471,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348160,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348161,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348163,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348167,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348175,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348191,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348223,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348287,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348415,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216348671,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216349183,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216350207,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216352255,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216356351,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216364543,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216380927,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216413695,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216479231,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216610303,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1216872447,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1217396735,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1218445311,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1220542463,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1220542464,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1222639616,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1223688192,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224212480,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224474624,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224605696,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224671232,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224704000,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224720384,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224728576,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224732672,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224734720,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224735744,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736256,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736512,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736640,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736704,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736736,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736752,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736760,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736764,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736766,32,FLEN) -NAN_BOXED(2133911950,32,FLEN) -NAN_BOXED(3034672,32,FLEN) -NAN_BOXED(1224736767,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170893824,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170893825,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170893827,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170893831,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170893839,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170893855,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170893887,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170893951,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170894079,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170894335,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170894847,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170895871,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170897919,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170902015,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170910207,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170926591,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3170959359,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3171024895,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3171155967,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3171418111,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3171942399,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3172990975,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3175088127,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3175088128,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3177185280,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3178233856,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3178758144,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179020288,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179151360,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179216896,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179249664,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179266048,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179274240,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179278336,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179280384,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179281408,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179281920,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282176,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282304,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282368,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282400,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282416,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282424,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282428,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282430,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3179282431,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2133928953,32,FLEN) -NAN_BOXED(2150513876,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753280,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753281,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753283,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753287,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753295,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753311,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753343,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753407,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753535,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390753791,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390754303,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390755327,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390757375,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390761471,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390769663,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390786047,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390818815,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2390884351,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391015423,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391277567,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2391801855,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2392850431,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2394947583,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2394947584,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2397044736,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398093312,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398617600,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2398879744,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399010816,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399076352,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399109120,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399125504,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399133696,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399137792,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399139840,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399140864,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141376,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141632,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141760,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141824,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141856,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141872,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141880,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141884,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141886,32,FLEN) -NAN_BOXED(2133930348,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141887,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986176,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986177,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986179,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986183,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986191,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986207,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986239,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986303,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986431,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071986687,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071987199,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071988223,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071990271,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2071994367,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2072002559,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2072018943,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2072051711,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2072117247,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2072248319,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2072510463,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2073034751,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2074083327,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2076180479,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2076180480,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2078277632,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2079326208,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2079850496,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080112640,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080243712,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080309248,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080342016,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080358400,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080366592,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080370688,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080372736,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080373760,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374272,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374528,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374656,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374720,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374752,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374768,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374776,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374780,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374782,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2080374783,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2133974587,32,FLEN) -NAN_BOXED(1069038068,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778384896,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778384897,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778384899,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778384903,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778384911,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778384927,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778384959,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778385023,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778385151,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778385407,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778385919,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778386943,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778388991,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778393087,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778401279,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778417663,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778450431,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778515967,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778647039,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1778909183,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1779433471,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1780482047,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1782579199,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1782579200,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1784676352,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1785724928,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786249216,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786511360,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786642432,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786707968,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786740736,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786757120,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786765312,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786769408,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786771456,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786772480,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786772992,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773248,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773376,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773440,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773472,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773488,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773496,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773500,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773502,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(1786773503,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2134055013,32,FLEN) -NAN_BOXED(1068955339,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089984,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089985,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089987,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089991,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290089999,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090015,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090047,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090111,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090239,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290090495,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290091007,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290092031,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290094079,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290098175,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290106367,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290122751,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290155519,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290221055,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290352127,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2290614271,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2291138559,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2292187135,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2294284287,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2294284288,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2296381440,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2297430016,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2297954304,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298216448,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298347520,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298413056,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298445824,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298462208,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298470400,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298474496,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298476544,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298477568,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478080,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478336,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478464,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478528,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478560,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478576,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478584,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478588,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478590,32,FLEN) -NAN_BOXED(2134055589,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2298478591,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146944,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146945,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146947,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146951,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146959,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146975,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147007,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147071,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147199,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147455,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147967,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248148991,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248151039,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248155135,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248163327,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248179711,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248212479,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248278015,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248409087,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248671231,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2249195519,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2250244095,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2252341247,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2252341248,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2254438400,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2255486976,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256011264,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256273408,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256404480,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256470016,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256502784,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256519168,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256527360,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256531456,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256533504,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256534528,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535040,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535296,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535424,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535488,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535520,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535536,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535544,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535548,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535550,32,FLEN) -NAN_BOXED(2134073907,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535551,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530496,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530497,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530499,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530503,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530511,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530527,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530559,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530623,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530751,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407531007,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407531519,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407532543,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407534591,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407538687,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407546879,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407563263,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407596031,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407661567,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407792639,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2408054783,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2408579071,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2409627647,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2411724799,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2411724800,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2413821952,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2414870528,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415394816,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415656960,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415788032,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415853568,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415886336,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415902720,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415910912,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415915008,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415917056,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918080,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918592,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918848,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415918976,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919040,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919072,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919088,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919096,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919100,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919102,32,FLEN) -NAN_BOXED(2134089443,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2415919103,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141888,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141889,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141891,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141895,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141903,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141919,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399141951,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142015,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142143,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142399,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399142911,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399143935,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399145983,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399150079,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399158271,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399174655,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399207423,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399272959,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399404031,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2399666175,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2400190463,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2401239039,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2403336191,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2403336192,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2405433344,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2406481920,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407006208,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407268352,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407399424,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407464960,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407497728,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407514112,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407522304,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407526400,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407528448,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407529472,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407529984,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530240,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530368,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530432,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530464,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530480,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530488,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530492,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530494,32,FLEN) -NAN_BOXED(2134092343,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2407530495,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638016,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638017,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638019,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638023,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638031,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638047,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638079,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638143,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638271,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855638527,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855639039,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855640063,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855642111,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855646207,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855654399,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855670783,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855703551,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855769087,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(855900159,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(856162303,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(856686591,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(857735167,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(859832319,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(859832320,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(861929472,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(862978048,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(863502336,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(863764480,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(863895552,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(863961088,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(863993856,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864010240,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864018432,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864022528,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864024576,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864025600,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026112,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026368,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026496,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026560,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026592,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026608,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026616,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026620,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026622,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(864026623,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2134101968,32,FLEN) -NAN_BOXED(2985738,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875536896,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875536897,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875536899,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875536903,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875536911,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875536927,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875536959,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875537023,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875537151,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875537407,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875537919,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875538943,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875540991,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875545087,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875553279,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875569663,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875602431,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875667967,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3875799039,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3876061183,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3876585471,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3877634047,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3879731199,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3879731200,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3881828352,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3882876928,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883401216,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883663360,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883794432,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883859968,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883892736,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883909120,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883917312,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883921408,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883923456,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883924480,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883924992,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925248,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925376,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925440,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925472,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925488,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925496,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925500,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925502,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(3883925503,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2134109328,32,FLEN) -NAN_BOXED(3216383753,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872257,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872259,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872263,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2157549977,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2158269001,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159227699,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159467373,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2159786939,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160346180,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2160905420,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2161864118,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2162583142,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2163062491,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260856,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260860,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2164260862,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312768,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312769,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312771,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312775,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312783,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312799,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312831,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312895,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313023,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313279,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273313791,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273314815,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273316863,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273320959,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273329151,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273345535,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273378303,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273443839,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273574911,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273837055,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2274361343,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2275409919,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2277507071,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2277507072,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2279604224,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2280652800,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281177088,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281439232,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281570304,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281635840,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281668608,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281684992,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281693184,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281697280,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281699328,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281700352,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281700864,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701120,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701248,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701312,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701344,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701360,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701368,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701372,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701374,32,FLEN) -NAN_BOXED(2134205948,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2281701375,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064704,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064705,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064707,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064711,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064719,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064735,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064767,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064831,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045064959,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045065215,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045065727,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045066751,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045068799,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045072895,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045081087,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045097471,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045130239,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045195775,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045326847,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3045588991,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3046113279,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3047161855,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3049259007,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3049259008,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3051356160,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3052404736,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3052929024,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053191168,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053322240,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053387776,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053420544,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053436928,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053445120,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053449216,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053451264,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053452288,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053452800,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453056,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453184,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453248,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453280,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453296,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453304,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453308,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453310,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3053453311,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2134265896,32,FLEN) -NAN_BOXED(2150428421,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873600,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873601,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873603,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873607,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873615,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873631,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873663,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873727,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774873855,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774874111,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774874623,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774875647,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774877695,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774881791,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774889983,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774906367,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3774939135,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3775004671,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3775135743,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3775397887,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3775922175,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3776970751,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3779067903,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3779067904,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3781165056,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3782213632,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3782737920,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783000064,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783131136,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783196672,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783229440,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783245824,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783254016,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783258112,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783260160,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783261184,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783261696,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783261952,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783262080,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783262144,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783262176,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783262192,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783262200,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783262204,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783262206,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(3783262207,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2134274966,32,FLEN) -NAN_BOXED(3216218416,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669696,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669697,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669699,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669703,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669711,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669727,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669759,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669823,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568669951,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568670207,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568670719,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568671743,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568673791,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568677887,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568686079,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568702463,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568735231,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568800767,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1568931839,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1569193983,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1569718271,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1570766847,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1572863999,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1572864000,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1574961152,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1576009728,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1576534016,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1576796160,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1576927232,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1576992768,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577025536,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577041920,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577050112,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577054208,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577056256,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577057280,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577057792,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058048,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058176,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058240,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058272,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058288,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058296,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058300,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058302,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(1577058303,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2134328890,32,FLEN) -NAN_BOXED(1068681925,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862270976,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862270977,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862270979,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862270983,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862270991,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862271007,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862271039,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862271103,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862271231,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862271487,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862271999,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862273023,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862275071,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862279167,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862287359,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862303743,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862336511,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862402047,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862533119,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1862795263,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1863319551,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1864368127,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1866465279,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1866465280,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1868562432,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1869611008,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870135296,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870397440,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870528512,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870594048,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870626816,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870643200,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870651392,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870655488,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870657536,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870658560,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659072,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659328,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659456,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659520,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659552,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659568,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659576,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659580,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659582,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(1870659583,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2130706433,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2130706435,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2130706439,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2132384153,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2133103177,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2134061875,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2134301549,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2134621115,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2135180356,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2135739596,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2136698294,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2137417318,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2137896667,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2139095032,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2139095036,32,FLEN) -NAN_BOXED(2134408833,32,FLEN) -NAN_BOXED(1068604453,32,FLEN) -NAN_BOXED(2139095038,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054592,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054593,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054595,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054599,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054607,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054623,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054655,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054719,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347054847,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347055103,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347055615,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347056639,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347058687,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347062783,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347070975,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347087359,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347120127,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347185663,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347316735,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3347578879,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3348103167,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3349151743,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3351248895,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3351248896,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3353346048,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3354394624,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3354918912,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355181056,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355312128,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355377664,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355410432,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355426816,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355435008,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355439104,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355441152,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355442176,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355442688,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355442944,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355443072,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355443136,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355443168,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355443184,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355443192,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355443196,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355443198,32,FLEN) -NAN_BOXED(2134412555,32,FLEN) -NAN_BOXED(2150392714,32,FLEN) -NAN_BOXED(3355443199,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886080,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886081,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886083,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886087,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886095,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886111,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886143,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886207,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886335,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83886591,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83887103,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83888127,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83890175,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83894271,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83902463,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83918847,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(83951615,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84017151,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84148223,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84410367,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(84934655,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(85983231,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(88080383,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(88080384,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(90177536,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(91226112,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(91750400,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92012544,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92143616,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92209152,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92241920,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92258304,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92266496,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92270592,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92272640,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92273664,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274176,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274432,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274560,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274624,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274656,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274672,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274680,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274684,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274686,32,FLEN) -NAN_BOXED(2134429712,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(92274687,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121664,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121665,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121667,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121671,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121679,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121695,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121727,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121791,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003121919,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003122175,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003122687,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003123711,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003125759,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003129855,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003138047,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003154431,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003187199,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003252735,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003383807,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3003645951,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3004170239,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3005218815,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3007315967,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3007315968,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3009413120,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3010461696,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3010985984,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011248128,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011379200,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011444736,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011477504,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011493888,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011502080,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011506176,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011508224,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011509248,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011509760,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510016,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510144,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510208,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510240,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510256,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510264,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510268,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510270,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3011510271,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2134435643,32,FLEN) -NAN_BOXED(2150387171,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810240,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810241,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810243,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810247,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810255,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810271,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810303,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810367,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810495,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348810751,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348811263,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348812287,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348814335,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348818431,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348826623,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348843007,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348875775,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2348941311,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349072383,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349334527,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2349858815,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2350907391,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2353004543,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2353004544,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2355101696,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356150272,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356674560,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2356936704,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357067776,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357133312,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357166080,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357182464,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357190656,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357194752,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357196800,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357197824,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198336,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198592,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198720,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198784,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198816,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198832,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198840,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198844,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198846,32,FLEN) -NAN_BOXED(2134445719,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2357198847,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388608,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388623,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388639,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388671,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388735,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388863,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8389119,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8389631,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8390655,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8392703,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8396799,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8404991,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8421375,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8454143,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8519679,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8650751,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8912895,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(9437183,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10485759,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12582911,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12582912,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14680064,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15728640,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16252928,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16515072,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16646144,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16711680,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16744448,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16760832,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16769024,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16773120,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16775168,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776192,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776704,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16776960,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777088,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777152,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777184,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777200,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2134466183,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777215,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758336,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758337,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758339,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758343,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758351,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758367,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758399,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758463,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758591,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239758847,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239759359,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239760383,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239762431,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239766527,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239774719,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239791103,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239823871,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2239889407,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240020479,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240282623,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2240806911,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2241855487,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2243952639,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2243952640,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2246049792,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247098368,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247622656,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2247884800,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248015872,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248081408,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248114176,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248130560,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248138752,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248142848,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248144896,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248145920,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146432,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146688,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146816,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146880,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146912,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146928,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146936,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146940,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146942,32,FLEN) -NAN_BOXED(2134492297,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146943,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943040,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943041,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943043,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943047,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943055,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943071,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943103,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943167,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943295,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41943551,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41944063,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41945087,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41947135,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41951231,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41959423,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(41975807,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42008575,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42074111,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42205183,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42467327,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(42991615,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(44040191,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(46137343,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(46137344,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(48234496,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(49283072,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(49807360,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50069504,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50200576,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50266112,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50298880,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50315264,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50323456,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50327552,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50329600,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50330624,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331136,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331392,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331520,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331584,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331616,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331632,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331640,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331644,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331646,32,FLEN) -NAN_BOXED(2134495565,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(50331647,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483663,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483679,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483711,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483775,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483903,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484159,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147484671,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147485695,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147487743,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147491839,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147500031,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147516415,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147549183,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147614719,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147745791,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148007935,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2148532223,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149580799,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677951,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151677952,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153775104,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154823680,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155347968,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155610112,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155741184,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155806720,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155839488,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155855872,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155864064,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155868160,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155870208,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871232,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155871744,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872000,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872128,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872192,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872224,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872240,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134505610,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872255,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301312,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301313,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301315,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301319,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301327,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301343,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301375,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301439,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301567,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956301823,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956302335,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956303359,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956305407,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956309503,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956317695,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956334079,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956366847,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956432383,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956563455,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(956825599,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(957349887,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(958398463,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(960495615,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(960495616,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(962592768,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(963641344,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964165632,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964427776,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964558848,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964624384,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964657152,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964673536,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964681728,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964685824,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964687872,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964688896,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689408,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689664,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689792,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689856,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689888,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689904,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689912,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689916,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689918,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(964689919,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2134531954,32,FLEN) -NAN_BOXED(2880628,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924160,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924161,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924163,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924167,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924175,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924191,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924223,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924287,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924415,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264924671,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264925183,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264926207,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264928255,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264932351,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264940543,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264956927,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2264989695,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265055231,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265186303,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265448447,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2265972735,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2267021311,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2269118463,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2269118464,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2271215616,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2272264192,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2272788480,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273050624,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273181696,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273247232,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273280000,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273296384,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273304576,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273308672,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273310720,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273311744,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312256,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312512,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312640,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312704,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312736,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312752,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312760,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312764,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312766,32,FLEN) -NAN_BOXED(2134551355,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2273312767,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146944,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146945,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146947,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146951,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146959,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248146975,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147007,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147071,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147199,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147455,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248147967,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248148991,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248151039,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248155135,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248163327,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248179711,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248212479,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248278015,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248409087,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2248671231,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2249195519,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2250244095,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2252341247,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2252341248,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2254438400,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2255486976,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256011264,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256273408,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256404480,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256470016,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256502784,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256519168,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256527360,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256531456,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256533504,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256534528,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535040,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535296,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535424,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535488,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535520,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535536,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535544,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535548,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535550,32,FLEN) -NAN_BOXED(2134555315,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2256535551,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977955840,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977955841,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977955843,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977955847,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977955855,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977955871,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977955903,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977955967,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977956095,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977956351,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977956863,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977957887,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977959935,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977964031,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977972223,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2977988607,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2978021375,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2978086911,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2978217983,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2978480127,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2979004415,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2980052991,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2982150143,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2982150144,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2984247296,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2985295872,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2985820160,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986082304,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986213376,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986278912,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986311680,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986328064,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986336256,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986340352,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986342400,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986343424,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986343936,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344192,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344320,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344384,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344416,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344432,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344440,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344444,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344446,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(2986344447,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2134575805,32,FLEN) -NAN_BOXED(2150353971,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881024,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881025,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881027,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881031,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881039,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881055,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881087,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881151,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881279,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234881535,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234882047,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234883071,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234885119,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234889215,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234897407,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234913791,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(234946559,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235012095,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235143167,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235405311,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(235929599,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(236978175,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(239075327,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(239075328,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(241172480,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(242221056,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(242745344,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243007488,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243138560,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243204096,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243236864,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243253248,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243261440,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243265536,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243267584,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243268608,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269120,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269376,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269504,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269568,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269600,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269616,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269624,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269628,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269630,32,FLEN) -NAN_BOXED(2134580632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(243269631,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606336,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606337,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606339,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606343,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606351,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606367,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606399,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606463,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606591,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142606847,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142607359,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142608383,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142610431,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142614527,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142622719,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142639103,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142671871,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142737407,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(142868479,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(143130623,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(143654911,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(144703487,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(146800639,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(146800640,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(148897792,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(149946368,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150470656,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150732800,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150863872,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150929408,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150962176,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150978560,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150986752,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150990848,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150992896,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150993920,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994432,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994688,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994816,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994880,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994912,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994928,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994936,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994940,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994942,32,FLEN) -NAN_BOXED(2134601632,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(150994943,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510272,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510273,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510275,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510279,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510287,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510303,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510335,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510399,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510527,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011510783,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011511295,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011512319,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011514367,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011518463,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011526655,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011543039,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011575807,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011641343,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3011772415,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3012034559,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3012558847,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3013607423,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3015704575,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3015704576,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3017801728,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3018850304,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019374592,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019636736,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019767808,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019833344,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019866112,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019882496,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019890688,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019894784,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019896832,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019897856,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898368,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898624,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898752,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898816,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898848,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898864,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898872,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898876,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898878,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3019898879,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2134631105,32,FLEN) -NAN_BOXED(2150341080,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007744,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007745,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007747,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007751,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007759,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007775,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007807,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007871,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087007999,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087008255,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087008767,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087009791,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087011839,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087015935,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087024127,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087040511,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087073279,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087138815,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087269887,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3087532031,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3088056319,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3089104895,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3091202047,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3091202048,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3093299200,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3094347776,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3094872064,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095134208,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095265280,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095330816,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095363584,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095379968,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095388160,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095392256,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095394304,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095395328,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095395840,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396096,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396224,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396288,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396320,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396336,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396344,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396348,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396350,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3095396351,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3212836865,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3212836867,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3212836871,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3214514585,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3215233609,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3216192307,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3216431981,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3216751547,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3217310788,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3217870028,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3218828726,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3219547750,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3220027099,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3221225464,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3221225468,32,FLEN) -NAN_BOXED(2134652155,32,FLEN) -NAN_BOXED(2150336204,32,FLEN) -NAN_BOXED(3221225470,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591168,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591169,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591171,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591175,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591183,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591199,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591231,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591295,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591423,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595591679,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595592191,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595593215,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595595263,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595599359,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595607551,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595623935,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595656703,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595722239,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(595853311,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(596115455,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(596639743,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(597688319,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(599785471,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(599785472,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(601882624,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(602931200,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603455488,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603717632,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603848704,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603914240,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603947008,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603963392,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603971584,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603975680,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603977728,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603978752,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979264,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979520,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979648,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979712,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979744,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979760,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979768,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979772,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979774,32,FLEN) -NAN_BOXED(2134673161,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(603979775,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254464,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254465,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254467,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254471,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254479,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254495,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254527,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254591,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254719,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696254975,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696255487,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696256511,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696258559,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696262655,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696270847,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696287231,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696319999,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696385535,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696516607,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(696778751,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(697303039,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(698351615,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(700448767,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(700448768,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(702545920,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(703594496,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704118784,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704380928,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704512000,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704577536,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704610304,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704626688,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704634880,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704638976,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704641024,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704642048,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704642560,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704642816,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704642944,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704643008,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704643040,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704643056,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704643064,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704643068,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704643070,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(704643071,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1065353217,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1065353219,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1065353223,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1067030937,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1067749961,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1068708659,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1068948333,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1069267899,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1069827140,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1070386380,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1071345078,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1072064102,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1072543451,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1073741816,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1073741820,32,FLEN) -NAN_BOXED(2134680036,32,FLEN) -NAN_BOXED(2846122,32,FLEN) -NAN_BOXED(1073741822,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086272,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086273,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086275,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086279,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086287,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086303,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086335,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086399,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086527,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060086783,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060087295,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060088319,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060090367,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060094463,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060102655,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060119039,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060151807,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060217343,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060348415,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4060610559,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4061134847,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4062183423,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4064280575,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4064280576,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4066377728,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4067426304,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4067950592,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068212736,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068343808,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068409344,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068442112,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068458496,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068466688,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068470784,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068472832,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068473856,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474368,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474624,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474752,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474816,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474848,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474864,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474872,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474876,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474878,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4068474879,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4278190081,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4278190083,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4278190087,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4279867801,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4280586825,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4281545523,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4281785197,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4282104763,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4282664004,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4283223244,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4284181942,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4284900966,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4285380315,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4286578680,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4286578684,32,FLEN) -NAN_BOXED(2134699599,32,FLEN) -NAN_BOXED(3215814758,32,FLEN) -NAN_BOXED(4286578686,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388609,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388611,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388615,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10066329,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(10785353,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11744051,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(11983725,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12303291,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(12862532,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(13421772,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(14380470,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15099494,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(15578843,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777208,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777212,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(16777214,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720256,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720257,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720259,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720263,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720271,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720287,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720319,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720383,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720511,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58720767,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58721279,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58722303,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58724351,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58728447,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58736639,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58753023,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58785791,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58851327,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(58982399,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(59244543,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(59768831,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(60817407,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(62914559,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(62914560,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(65011712,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66060288,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66584576,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66846720,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(66977792,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67043328,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67076096,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67092480,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67100672,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67104768,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67106816,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67107840,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108352,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108608,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108736,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108800,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108832,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108848,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108856,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108860,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108862,32,FLEN) -NAN_BOXED(2134733457,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(67108863,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(1677721,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(2396745,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3355443,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3595117,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(3914683,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(4473924,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5033164,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(5991862,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(6710886,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(7190235,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388600,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388604,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(8388606,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051904,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051905,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051907,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051911,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051919,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051935,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109051967,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052031,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052159,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052415,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109052927,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109053951,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109055999,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109060095,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109068287,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109084671,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109117439,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109182975,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109314047,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(109576191,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(110100479,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(111149055,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(113246207,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(113246208,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(115343360,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(116391936,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(116916224,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117178368,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117309440,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117374976,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117407744,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117424128,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117432320,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117436416,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117438464,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117439488,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440000,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440256,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440384,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440448,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440480,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440496,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440504,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440508,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440510,32,FLEN) -NAN_BOXED(2134740419,32,FLEN) -NAN_BOXED(0,32,FLEN) -NAN_BOXED(117440511,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033024,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033025,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033027,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033031,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033039,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033055,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033087,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033151,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033279,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332033535,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332034047,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332035071,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332037119,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332041215,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332049407,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332065791,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332098559,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332164095,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332295167,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2332557311,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2333081599,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2334130175,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2336227327,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2336227328,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2338324480,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2339373056,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2339897344,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340159488,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340290560,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340356096,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340388864,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340405248,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340413440,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340417536,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340419584,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340420608,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421120,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421376,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421504,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421568,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421600,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421616,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421624,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421628,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421630,32,FLEN) -NAN_BOXED(2134863496,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2340421631,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483649,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483651,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2147483655,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149161369,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2149880393,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2150839091,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151078765,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151398331,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2151957572,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2152516812,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2153475510,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154194534,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2154673883,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872248,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872252,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2155872254,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592512,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592513,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592515,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592519,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592527,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592543,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592575,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592639,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214592767,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214593023,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214593535,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214594559,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214596607,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214600703,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214608895,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214625279,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214658047,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214723583,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2214854655,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2215116799,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2215641087,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2216689663,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2218786815,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2218786816,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2220883968,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2221932544,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222456832,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222718976,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222850048,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222915584,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222948352,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222964736,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222972928,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222977024,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222979072,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980096,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980608,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980864,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222980992,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981056,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981088,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981104,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981112,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981116,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981118,32,FLEN) -NAN_BOXED(2134889494,32,FLEN) -NAN_BOXED(2147483648,32,FLEN) -NAN_BOXED(2222981119,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624192,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624193,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624195,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624207,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624223,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624255,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624319,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624447,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927624703,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927625215,32,FLEN) -NAN_BOXED(2019135821,32,FLEN) -NAN_BOXED(2258017365,32,FLEN) -NAN_BOXED(2927626239,32,FLEN) -RVTEST_DATA_END - -RVMODEL_DATA_BEGIN -rvtest_sig_begin: -sig_begin_canary: -CANARY; - - -signature_x1_0: - .fill 0*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_1: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_2: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_3: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_4: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_5: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_6: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_7: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_8: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_9: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_10: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_11: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_12: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_13: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_14: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_15: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_16: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_17: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_18: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_19: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_20: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_21: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_22: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_23: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_24: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_25: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_26: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_27: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_28: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_29: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_30: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_31: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_32: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_33: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_34: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_35: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_36: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_37: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_38: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_39: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_40: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_41: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_42: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_43: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_44: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_45: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_46: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_47: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_48: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_49: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_50: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_51: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_52: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_53: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_54: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_55: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_56: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_57: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_58: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_59: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_60: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_61: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_62: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_63: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_64: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_65: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_66: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_67: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_68: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_69: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_70: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_71: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_72: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_73: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_74: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_75: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_76: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_77: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_78: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_79: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_80: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_81: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_82: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_83: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_84: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_85: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_86: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_87: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_88: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_89: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_90: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_91: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_92: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_93: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_94: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_95: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_96: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_97: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_98: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_99: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_100: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_101: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_102: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_103: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_104: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_105: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_106: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_107: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_108: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_109: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_110: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_111: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_112: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_113: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_114: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_115: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_116: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_117: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_118: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_119: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_120: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_121: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_122: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_123: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_124: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_125: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_126: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_127: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_128: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_129: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_130: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_131: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_132: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_133: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_134: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_135: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_136: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_137: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_138: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_139: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_140: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_141: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_142: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_143: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_144: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_145: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_146: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_147: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_148: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_149: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_150: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_151: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_152: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_153: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_154: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_155: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_156: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_157: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_158: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_159: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_160: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_161: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_162: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_163: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_164: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_165: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_166: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_167: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_168: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_169: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_170: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_171: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_172: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_173: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_174: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_175: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_176: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_177: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_178: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_179: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_180: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_181: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_182: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_183: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_184: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_185: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_186: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_187: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_188: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_189: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_190: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_191: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_192: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_193: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_194: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_195: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_196: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_197: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_198: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_199: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_200: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_201: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_202: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_203: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_204: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_205: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_206: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_207: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_208: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_209: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_210: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_211: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_212: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_213: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_214: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_215: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_216: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_217: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_218: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_219: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_220: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_221: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_222: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_223: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_224: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_225: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_226: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_227: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_228: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_229: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_230: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_231: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_232: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_233: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_234: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_235: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_236: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_237: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_238: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_239: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_240: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_241: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_242: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_243: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_244: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_245: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_246: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_247: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_248: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_249: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_250: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_251: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_252: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_253: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_254: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_255: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_256: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_257: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_258: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_259: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_260: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_261: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_262: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_263: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_264: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_265: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_266: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_267: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_268: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_269: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_270: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_271: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_272: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_273: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_274: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_275: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_276: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_277: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_278: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_279: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_280: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_281: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_282: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_283: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_284: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_285: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_286: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_287: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_288: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_289: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_290: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_291: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_292: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_293: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_294: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_295: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_296: - .fill 256*((SIGALIGN)/4),4,0xdeadbeef - - -signature_x1_297: +signature_x1_1: .fill 256*((SIGALIGN)/4),4,0xdeadbeef -signature_x1_298: - .fill 226*((SIGALIGN)/4),4,0xdeadbeef - #ifdef rvtest_mtrap_routine tsig_begin_canary: diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-02.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-02.S new file mode 100644 index 000000000..3781946ac --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-02.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_128: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea00000f; valaddr_reg:x3; val_offset:384*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 384*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_129: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea00001f; valaddr_reg:x3; val_offset:387*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 387*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_130: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea00003f; valaddr_reg:x3; val_offset:390*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 390*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_131: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea00007f; valaddr_reg:x3; val_offset:393*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 393*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_132: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea0000ff; valaddr_reg:x3; val_offset:396*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 396*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_133: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea0001ff; valaddr_reg:x3; val_offset:399*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 399*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_134: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea0003ff; valaddr_reg:x3; val_offset:402*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 402*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_135: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea0007ff; valaddr_reg:x3; val_offset:405*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 405*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_136: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea000fff; valaddr_reg:x3; val_offset:408*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 408*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_137: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea001fff; valaddr_reg:x3; val_offset:411*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 411*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_138: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea003fff; valaddr_reg:x3; val_offset:414*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 414*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_139: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea007fff; valaddr_reg:x3; val_offset:417*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 417*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_140: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea00ffff; valaddr_reg:x3; val_offset:420*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 420*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_141: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea01ffff; valaddr_reg:x3; val_offset:423*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 423*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_142: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea03ffff; valaddr_reg:x3; val_offset:426*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 426*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_143: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea07ffff; valaddr_reg:x3; val_offset:429*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 429*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_144: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea0fffff; valaddr_reg:x3; val_offset:432*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 432*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_145: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea1fffff; valaddr_reg:x3; val_offset:435*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 435*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_146: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea3fffff; valaddr_reg:x3; val_offset:438*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 438*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_147: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea400000; valaddr_reg:x3; val_offset:441*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 441*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_148: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea600000; valaddr_reg:x3; val_offset:444*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 444*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_149: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea700000; valaddr_reg:x3; val_offset:447*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 447*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_150: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea780000; valaddr_reg:x3; val_offset:450*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 450*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_151: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7c0000; valaddr_reg:x3; val_offset:453*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 453*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_152: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7e0000; valaddr_reg:x3; val_offset:456*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 456*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_153: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7f0000; valaddr_reg:x3; val_offset:459*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 459*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_154: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7f8000; valaddr_reg:x3; val_offset:462*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 462*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_155: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7fc000; valaddr_reg:x3; val_offset:465*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 465*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_156: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7fe000; valaddr_reg:x3; val_offset:468*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 468*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_157: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7ff000; valaddr_reg:x3; val_offset:471*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 471*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_158: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7ff800; valaddr_reg:x3; val_offset:474*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 474*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_159: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7ffc00; valaddr_reg:x3; val_offset:477*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 477*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_160: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7ffe00; valaddr_reg:x3; val_offset:480*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 480*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_161: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7fff00; valaddr_reg:x3; val_offset:483*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 483*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_162: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7fff80; valaddr_reg:x3; val_offset:486*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 486*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_163: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7fffc0; valaddr_reg:x3; val_offset:489*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 489*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_164: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7fffe0; valaddr_reg:x3; val_offset:492*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 492*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_165: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7ffff0; valaddr_reg:x3; val_offset:495*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 495*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_166: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7ffff8; valaddr_reg:x3; val_offset:498*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 498*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_167: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7ffffc; valaddr_reg:x3; val_offset:501*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 501*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_168: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7ffffe; valaddr_reg:x3; val_offset:504*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 504*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_169: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xd4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xea7fffff; valaddr_reg:x3; val_offset:507*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 507*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_170: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff000001; valaddr_reg:x3; val_offset:510*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 510*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_171: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff000003; valaddr_reg:x3; val_offset:513*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 513*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_172: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff000007; valaddr_reg:x3; val_offset:516*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 516*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_173: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff199999; valaddr_reg:x3; val_offset:519*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 519*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_174: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff249249; valaddr_reg:x3; val_offset:522*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 522*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_175: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff333333; valaddr_reg:x3; val_offset:525*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 525*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_176: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:528*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 528*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_177: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:531*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 531*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_178: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff444444; valaddr_reg:x3; val_offset:534*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 534*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_179: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:537*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 537*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_180: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:540*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 540*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_181: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff666666; valaddr_reg:x3; val_offset:543*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 543*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_182: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:546*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 546*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_183: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:549*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 549*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_184: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:552*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 552*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_185: +// fs1 == 0 and fe1 == 0xf5 and fm1 == 0x3530a7 and fs2 == 1 and fe2 == 0x88 and fm2 == 0x34d948 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ab530a7; op2val:0xc434d948; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:555*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 555*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_186: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66800000; valaddr_reg:x3; val_offset:558*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 558*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_187: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66800001; valaddr_reg:x3; val_offset:561*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 561*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_188: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66800003; valaddr_reg:x3; val_offset:564*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 564*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_189: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66800007; valaddr_reg:x3; val_offset:567*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 567*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_190: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x6680000f; valaddr_reg:x3; val_offset:570*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 570*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_191: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x6680001f; valaddr_reg:x3; val_offset:573*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 573*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_192: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x6680003f; valaddr_reg:x3; val_offset:576*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 576*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_193: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x6680007f; valaddr_reg:x3; val_offset:579*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 579*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_194: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x668000ff; valaddr_reg:x3; val_offset:582*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 582*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_195: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x668001ff; valaddr_reg:x3; val_offset:585*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 585*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_196: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x668003ff; valaddr_reg:x3; val_offset:588*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 588*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_197: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x668007ff; valaddr_reg:x3; val_offset:591*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 591*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_198: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66800fff; valaddr_reg:x3; val_offset:594*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 594*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_199: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66801fff; valaddr_reg:x3; val_offset:597*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 597*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_200: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66803fff; valaddr_reg:x3; val_offset:600*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 600*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_201: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66807fff; valaddr_reg:x3; val_offset:603*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 603*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_202: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x6680ffff; valaddr_reg:x3; val_offset:606*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 606*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_203: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x6681ffff; valaddr_reg:x3; val_offset:609*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 609*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_204: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x6683ffff; valaddr_reg:x3; val_offset:612*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 612*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_205: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x6687ffff; valaddr_reg:x3; val_offset:615*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 615*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_206: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x668fffff; valaddr_reg:x3; val_offset:618*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 618*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_207: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x669fffff; valaddr_reg:x3; val_offset:621*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 621*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_208: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66bfffff; valaddr_reg:x3; val_offset:624*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 624*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_209: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66c00000; valaddr_reg:x3; val_offset:627*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 627*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_210: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66e00000; valaddr_reg:x3; val_offset:630*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 630*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_211: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66f00000; valaddr_reg:x3; val_offset:633*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 633*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_212: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66f80000; valaddr_reg:x3; val_offset:636*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 636*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_213: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fc0000; valaddr_reg:x3; val_offset:639*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 639*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_214: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fe0000; valaddr_reg:x3; val_offset:642*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 642*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_215: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ff0000; valaddr_reg:x3; val_offset:645*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 645*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_216: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ff8000; valaddr_reg:x3; val_offset:648*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 648*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_217: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ffc000; valaddr_reg:x3; val_offset:651*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 651*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_218: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ffe000; valaddr_reg:x3; val_offset:654*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 654*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_219: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fff000; valaddr_reg:x3; val_offset:657*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 657*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_220: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fff800; valaddr_reg:x3; val_offset:660*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 660*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_221: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fffc00; valaddr_reg:x3; val_offset:663*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 663*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_222: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fffe00; valaddr_reg:x3; val_offset:666*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 666*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_223: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ffff00; valaddr_reg:x3; val_offset:669*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 669*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_224: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ffff80; valaddr_reg:x3; val_offset:672*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 672*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_225: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ffffc0; valaddr_reg:x3; val_offset:675*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 675*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_226: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ffffe0; valaddr_reg:x3; val_offset:678*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 678*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_227: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fffff0; valaddr_reg:x3; val_offset:681*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 681*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_228: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fffff8; valaddr_reg:x3; val_offset:684*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 684*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_229: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fffffc; valaddr_reg:x3; val_offset:687*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 687*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_230: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66fffffe; valaddr_reg:x3; val_offset:690*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 690*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_231: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xcd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x66ffffff; valaddr_reg:x3; val_offset:693*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 693*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_232: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f000001; valaddr_reg:x3; val_offset:696*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 696*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_233: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f000003; valaddr_reg:x3; val_offset:699*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 699*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_234: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f000007; valaddr_reg:x3; val_offset:702*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 702*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_235: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f199999; valaddr_reg:x3; val_offset:705*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 705*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_236: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f249249; valaddr_reg:x3; val_offset:708*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 708*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_237: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f333333; valaddr_reg:x3; val_offset:711*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 711*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_238: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:714*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 714*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_239: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:717*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 717*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_240: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f444444; valaddr_reg:x3; val_offset:720*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 720*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_241: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:723*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 723*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_242: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:726*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 726*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_243: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f666666; valaddr_reg:x3; val_offset:729*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 729*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_244: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:732*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 732*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_245: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:735*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 735*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_246: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:738*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 738*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_247: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x1edd3c and fs2 == 0 and fe2 == 0x87 and fm2 == 0x4e43a2 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b1edd3c; op2val:0x43ce43a2; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:741*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 741*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_248: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6800000; valaddr_reg:x3; val_offset:744*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 744*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_249: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6800001; valaddr_reg:x3; val_offset:747*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 747*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_250: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6800003; valaddr_reg:x3; val_offset:750*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 750*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_251: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6800007; valaddr_reg:x3; val_offset:753*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 753*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_252: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb680000f; valaddr_reg:x3; val_offset:756*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 756*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_253: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb680001f; valaddr_reg:x3; val_offset:759*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 759*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_254: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb680003f; valaddr_reg:x3; val_offset:762*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 762*0 + 3*1*FLEN/8, x4, x1, x2) + +inst_255: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb680007f; valaddr_reg:x3; val_offset:765*0 + 3*1*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 765*0 + 3*1*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868559,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868575,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868607,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868671,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925868799,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925869055,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925869567,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925870591,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925872639,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925876735,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925884927,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925901311,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925934079,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3925999615,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3926130687,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3926392831,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3926917119,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3927965695,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3930062847,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3930062848,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3932160000,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3933208576,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3933732864,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3933995008,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934126080,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934191616,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934224384,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934240768,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934248960,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934253056,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934255104,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934256128,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934256640,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934256896,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934257024,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934257088,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934257120,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934257136,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934257144,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934257148,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934257150,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(3934257151,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2058694823,32,FLEN) +NAN_BOXED(3291797832,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664640,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664641,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664643,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664647,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664655,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664671,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664703,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664767,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719664895,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719665151,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719665663,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719666687,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719668735,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719672831,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719681023,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719697407,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719730175,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719795711,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1719926783,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1720188927,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1720713215,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1721761791,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1723858943,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1723858944,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1725956096,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1727004672,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1727528960,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1727791104,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1727922176,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1727987712,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728020480,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728036864,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728045056,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728049152,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728051200,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728052224,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728052736,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728052992,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728053120,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728053184,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728053216,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728053232,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728053240,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728053244,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728053246,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(1728053247,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2065620284,32,FLEN) +NAN_BOXED(1137591202,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061841920,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061841921,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061841923,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061841927,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061841935,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061841951,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061841983,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061842047,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-03.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-03.S new file mode 100644 index 000000000..857f1155c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-03.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_256: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb68000ff; valaddr_reg:x3; val_offset:768*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 768*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_257: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb68001ff; valaddr_reg:x3; val_offset:771*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 771*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_258: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb68003ff; valaddr_reg:x3; val_offset:774*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 774*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_259: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb68007ff; valaddr_reg:x3; val_offset:777*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 777*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_260: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6800fff; valaddr_reg:x3; val_offset:780*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 780*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_261: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6801fff; valaddr_reg:x3; val_offset:783*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 783*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_262: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6803fff; valaddr_reg:x3; val_offset:786*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 786*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_263: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6807fff; valaddr_reg:x3; val_offset:789*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 789*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_264: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb680ffff; valaddr_reg:x3; val_offset:792*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 792*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_265: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb681ffff; valaddr_reg:x3; val_offset:795*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 795*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_266: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb683ffff; valaddr_reg:x3; val_offset:798*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 798*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_267: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb687ffff; valaddr_reg:x3; val_offset:801*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 801*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_268: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb68fffff; valaddr_reg:x3; val_offset:804*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 804*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_269: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb69fffff; valaddr_reg:x3; val_offset:807*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 807*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_270: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6bfffff; valaddr_reg:x3; val_offset:810*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 810*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_271: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6c00000; valaddr_reg:x3; val_offset:813*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 813*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_272: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6e00000; valaddr_reg:x3; val_offset:816*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 816*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_273: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6f00000; valaddr_reg:x3; val_offset:819*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 819*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_274: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6f80000; valaddr_reg:x3; val_offset:822*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 822*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_275: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fc0000; valaddr_reg:x3; val_offset:825*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 825*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_276: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fe0000; valaddr_reg:x3; val_offset:828*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 828*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_277: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ff0000; valaddr_reg:x3; val_offset:831*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 831*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_278: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ff8000; valaddr_reg:x3; val_offset:834*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 834*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_279: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ffc000; valaddr_reg:x3; val_offset:837*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 837*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_280: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ffe000; valaddr_reg:x3; val_offset:840*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 840*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_281: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fff000; valaddr_reg:x3; val_offset:843*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 843*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_282: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fff800; valaddr_reg:x3; val_offset:846*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 846*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_283: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fffc00; valaddr_reg:x3; val_offset:849*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 849*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_284: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fffe00; valaddr_reg:x3; val_offset:852*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 852*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_285: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ffff00; valaddr_reg:x3; val_offset:855*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 855*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_286: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ffff80; valaddr_reg:x3; val_offset:858*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 858*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_287: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ffffc0; valaddr_reg:x3; val_offset:861*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 861*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_288: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ffffe0; valaddr_reg:x3; val_offset:864*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 864*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_289: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fffff0; valaddr_reg:x3; val_offset:867*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 867*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_290: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fffff8; valaddr_reg:x3; val_offset:870*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 870*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_291: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fffffc; valaddr_reg:x3; val_offset:873*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 873*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_292: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6fffffe; valaddr_reg:x3; val_offset:876*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 876*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_293: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x6d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xb6ffffff; valaddr_reg:x3; val_offset:879*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 879*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_294: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbf800001; valaddr_reg:x3; val_offset:882*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 882*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_295: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbf800003; valaddr_reg:x3; val_offset:885*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 885*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_296: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbf800007; valaddr_reg:x3; val_offset:888*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 888*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_297: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbf999999; valaddr_reg:x3; val_offset:891*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 891*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_298: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:894*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 894*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_299: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:897*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 897*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_300: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:900*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 900*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_301: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:903*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 903*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_302: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:906*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 906*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_303: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:909*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 909*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_304: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:912*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 912*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_305: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:915*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 915*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_306: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:918*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 918*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_307: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:921*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 921*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_308: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:924*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 924*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_309: +// fs1 == 0 and fe1 == 0xf6 and fm1 == 0x26c36c and fs2 == 1 and fe2 == 0x07 and fm2 == 0x447e75 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7b26c36c; op2val:0x83c47e75; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:927*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 927*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_310: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb800000; valaddr_reg:x3; val_offset:930*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 930*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_311: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb800001; valaddr_reg:x3; val_offset:933*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 933*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_312: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb800003; valaddr_reg:x3; val_offset:936*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 936*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_313: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb800007; valaddr_reg:x3; val_offset:939*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 939*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_314: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb80000f; valaddr_reg:x3; val_offset:942*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 942*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_315: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb80001f; valaddr_reg:x3; val_offset:945*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 945*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_316: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb80003f; valaddr_reg:x3; val_offset:948*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 948*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_317: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb80007f; valaddr_reg:x3; val_offset:951*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 951*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_318: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb8000ff; valaddr_reg:x3; val_offset:954*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 954*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_319: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb8001ff; valaddr_reg:x3; val_offset:957*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 957*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_320: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb8003ff; valaddr_reg:x3; val_offset:960*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 960*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_321: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb8007ff; valaddr_reg:x3; val_offset:963*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 963*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_322: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb800fff; valaddr_reg:x3; val_offset:966*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 966*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_323: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb801fff; valaddr_reg:x3; val_offset:969*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 969*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_324: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb803fff; valaddr_reg:x3; val_offset:972*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 972*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_325: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb807fff; valaddr_reg:x3; val_offset:975*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 975*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_326: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb80ffff; valaddr_reg:x3; val_offset:978*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 978*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_327: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb81ffff; valaddr_reg:x3; val_offset:981*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 981*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_328: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb83ffff; valaddr_reg:x3; val_offset:984*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 984*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_329: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb87ffff; valaddr_reg:x3; val_offset:987*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 987*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_330: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb8fffff; valaddr_reg:x3; val_offset:990*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 990*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_331: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xeb9fffff; valaddr_reg:x3; val_offset:993*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 993*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_332: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebbfffff; valaddr_reg:x3; val_offset:996*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 996*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_333: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebc00000; valaddr_reg:x3; val_offset:999*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 999*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_334: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebe00000; valaddr_reg:x3; val_offset:1002*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1002*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_335: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebf00000; valaddr_reg:x3; val_offset:1005*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1005*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_336: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebf80000; valaddr_reg:x3; val_offset:1008*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1008*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_337: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfc0000; valaddr_reg:x3; val_offset:1011*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1011*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_338: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfe0000; valaddr_reg:x3; val_offset:1014*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1014*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_339: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebff0000; valaddr_reg:x3; val_offset:1017*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1017*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_340: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebff8000; valaddr_reg:x3; val_offset:1020*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1020*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_341: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebffc000; valaddr_reg:x3; val_offset:1023*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1023*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_342: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebffe000; valaddr_reg:x3; val_offset:1026*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1026*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_343: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfff000; valaddr_reg:x3; val_offset:1029*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1029*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_344: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfff800; valaddr_reg:x3; val_offset:1032*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1032*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_345: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfffc00; valaddr_reg:x3; val_offset:1035*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1035*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_346: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfffe00; valaddr_reg:x3; val_offset:1038*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1038*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_347: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebffff00; valaddr_reg:x3; val_offset:1041*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1041*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_348: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebffff80; valaddr_reg:x3; val_offset:1044*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1044*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_349: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebffffc0; valaddr_reg:x3; val_offset:1047*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1047*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_350: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebffffe0; valaddr_reg:x3; val_offset:1050*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1050*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_351: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfffff0; valaddr_reg:x3; val_offset:1053*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1053*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_352: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfffff8; valaddr_reg:x3; val_offset:1056*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1056*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_353: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfffffc; valaddr_reg:x3; val_offset:1059*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1059*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_354: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebfffffe; valaddr_reg:x3; val_offset:1062*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1062*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_355: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xd7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xebffffff; valaddr_reg:x3; val_offset:1065*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1065*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_356: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff000001; valaddr_reg:x3; val_offset:1068*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1068*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_357: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff000003; valaddr_reg:x3; val_offset:1071*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1071*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_358: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff000007; valaddr_reg:x3; val_offset:1074*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1074*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_359: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff199999; valaddr_reg:x3; val_offset:1077*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1077*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_360: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff249249; valaddr_reg:x3; val_offset:1080*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1080*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_361: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff333333; valaddr_reg:x3; val_offset:1083*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1083*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_362: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:1086*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1086*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_363: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:1089*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1089*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_364: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff444444; valaddr_reg:x3; val_offset:1092*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1092*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_365: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:1095*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1095*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_366: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:1098*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1098*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_367: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff666666; valaddr_reg:x3; val_offset:1101*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1101*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_368: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:1104*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1104*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_369: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:1107*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1107*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_370: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:1110*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1110*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_371: +// fs1 == 0 and fe1 == 0xf7 and fm1 == 0x3f1e72 and fs2 == 1 and fe2 == 0x86 and fm2 == 0x2b7414 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7bbf1e72; op2val:0xc32b7414; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:1113*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1113*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_372: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3f800001; valaddr_reg:x3; val_offset:1116*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1116*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_373: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3f800003; valaddr_reg:x3; val_offset:1119*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1119*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_374: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3f800007; valaddr_reg:x3; val_offset:1122*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1122*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_375: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3f999999; valaddr_reg:x3; val_offset:1125*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1125*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_376: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:1128*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1128*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_377: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:1131*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1131*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_378: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:1134*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1134*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_379: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:1137*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1137*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_380: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:1140*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1140*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_381: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:1143*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1143*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_382: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:1146*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1146*0 + 3*2*FLEN/8, x4, x1, x2) + +inst_383: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:1149*0 + 3*2*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1149*0 + 3*2*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061842175,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061842431,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061842943,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061843967,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061846015,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061850111,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061858303,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061874687,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061907455,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3061972991,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3062104063,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3062366207,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3062890495,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3063939071,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3066036223,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3066036224,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3068133376,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3069181952,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3069706240,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3069968384,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070099456,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070164992,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070197760,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070214144,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070222336,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070226432,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070228480,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070229504,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230016,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230272,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230400,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230464,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230496,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230512,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230520,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230524,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230526,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3070230527,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2066137964,32,FLEN) +NAN_BOXED(2210692725,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034368,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034369,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034371,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034375,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034383,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034399,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034431,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034495,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034623,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951034879,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951035391,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951036415,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951038463,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951042559,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951050751,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951067135,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951099903,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951165439,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951296511,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3951558655,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3952082943,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3953131519,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3955228671,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3955228672,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3957325824,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3958374400,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3958898688,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959160832,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959291904,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959357440,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959390208,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959406592,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959414784,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959418880,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959420928,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959421952,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422464,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422720,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422848,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422912,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422944,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422960,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422968,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422972,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422974,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(3959422975,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2076122738,32,FLEN) +NAN_BOXED(3274404884,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-04.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-04.S new file mode 100644 index 000000000..a25f39bb4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-04.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_384: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:1152*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1152*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_385: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:1155*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1155*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_386: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:1158*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1158*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_387: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:1161*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1161*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_388: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49800000; valaddr_reg:x3; val_offset:1164*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1164*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_389: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49800001; valaddr_reg:x3; val_offset:1167*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1167*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_390: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49800003; valaddr_reg:x3; val_offset:1170*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1170*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_391: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49800007; valaddr_reg:x3; val_offset:1173*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1173*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_392: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x4980000f; valaddr_reg:x3; val_offset:1176*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1176*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_393: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x4980001f; valaddr_reg:x3; val_offset:1179*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1179*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_394: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x4980003f; valaddr_reg:x3; val_offset:1182*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1182*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_395: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x4980007f; valaddr_reg:x3; val_offset:1185*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1185*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_396: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x498000ff; valaddr_reg:x3; val_offset:1188*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1188*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_397: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x498001ff; valaddr_reg:x3; val_offset:1191*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1191*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_398: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x498003ff; valaddr_reg:x3; val_offset:1194*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1194*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_399: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x498007ff; valaddr_reg:x3; val_offset:1197*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1197*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_400: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49800fff; valaddr_reg:x3; val_offset:1200*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1200*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_401: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49801fff; valaddr_reg:x3; val_offset:1203*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1203*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_402: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49803fff; valaddr_reg:x3; val_offset:1206*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1206*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_403: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49807fff; valaddr_reg:x3; val_offset:1209*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1209*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_404: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x4980ffff; valaddr_reg:x3; val_offset:1212*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1212*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_405: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x4981ffff; valaddr_reg:x3; val_offset:1215*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1215*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_406: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x4983ffff; valaddr_reg:x3; val_offset:1218*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1218*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_407: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x4987ffff; valaddr_reg:x3; val_offset:1221*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1221*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_408: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x498fffff; valaddr_reg:x3; val_offset:1224*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1224*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_409: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x499fffff; valaddr_reg:x3; val_offset:1227*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1227*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_410: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49bfffff; valaddr_reg:x3; val_offset:1230*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1230*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_411: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49c00000; valaddr_reg:x3; val_offset:1233*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1233*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_412: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49e00000; valaddr_reg:x3; val_offset:1236*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1236*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_413: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49f00000; valaddr_reg:x3; val_offset:1239*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1239*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_414: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49f80000; valaddr_reg:x3; val_offset:1242*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1242*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_415: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fc0000; valaddr_reg:x3; val_offset:1245*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1245*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_416: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fe0000; valaddr_reg:x3; val_offset:1248*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1248*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_417: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ff0000; valaddr_reg:x3; val_offset:1251*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1251*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_418: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ff8000; valaddr_reg:x3; val_offset:1254*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1254*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_419: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ffc000; valaddr_reg:x3; val_offset:1257*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1257*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_420: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ffe000; valaddr_reg:x3; val_offset:1260*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1260*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_421: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fff000; valaddr_reg:x3; val_offset:1263*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1263*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_422: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fff800; valaddr_reg:x3; val_offset:1266*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1266*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_423: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fffc00; valaddr_reg:x3; val_offset:1269*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1269*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_424: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fffe00; valaddr_reg:x3; val_offset:1272*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1272*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_425: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ffff00; valaddr_reg:x3; val_offset:1275*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1275*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_426: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ffff80; valaddr_reg:x3; val_offset:1278*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1278*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_427: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ffffc0; valaddr_reg:x3; val_offset:1281*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1281*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_428: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ffffe0; valaddr_reg:x3; val_offset:1284*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1284*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_429: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fffff0; valaddr_reg:x3; val_offset:1287*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1287*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_430: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fffff8; valaddr_reg:x3; val_offset:1290*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1290*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_431: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fffffc; valaddr_reg:x3; val_offset:1293*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1293*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_432: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49fffffe; valaddr_reg:x3; val_offset:1296*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1296*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_433: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x223f6e and fs2 == 0 and fe2 == 0x05 and fm2 == 0x49f673 and fs3 == 0 and fe3 == 0x93 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c223f6e; op2val:0x2c9f673; +op3val:0x49ffffff; valaddr_reg:x3; val_offset:1299*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1299*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_434: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7000000; valaddr_reg:x3; val_offset:1302*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1302*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_435: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7000001; valaddr_reg:x3; val_offset:1305*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1305*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_436: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7000003; valaddr_reg:x3; val_offset:1308*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1308*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_437: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7000007; valaddr_reg:x3; val_offset:1311*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1311*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_438: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb700000f; valaddr_reg:x3; val_offset:1314*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1314*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_439: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb700001f; valaddr_reg:x3; val_offset:1317*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1317*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_440: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb700003f; valaddr_reg:x3; val_offset:1320*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1320*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_441: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb700007f; valaddr_reg:x3; val_offset:1323*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1323*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_442: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb70000ff; valaddr_reg:x3; val_offset:1326*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1326*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_443: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb70001ff; valaddr_reg:x3; val_offset:1329*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1329*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_444: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb70003ff; valaddr_reg:x3; val_offset:1332*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1332*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_445: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb70007ff; valaddr_reg:x3; val_offset:1335*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1335*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_446: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7000fff; valaddr_reg:x3; val_offset:1338*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1338*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_447: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7001fff; valaddr_reg:x3; val_offset:1341*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1341*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_448: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7003fff; valaddr_reg:x3; val_offset:1344*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1344*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_449: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7007fff; valaddr_reg:x3; val_offset:1347*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1347*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_450: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb700ffff; valaddr_reg:x3; val_offset:1350*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1350*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_451: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb701ffff; valaddr_reg:x3; val_offset:1353*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1353*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_452: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb703ffff; valaddr_reg:x3; val_offset:1356*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1356*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_453: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb707ffff; valaddr_reg:x3; val_offset:1359*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1359*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_454: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb70fffff; valaddr_reg:x3; val_offset:1362*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1362*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_455: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb71fffff; valaddr_reg:x3; val_offset:1365*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1365*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_456: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb73fffff; valaddr_reg:x3; val_offset:1368*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1368*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_457: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7400000; valaddr_reg:x3; val_offset:1371*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1371*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_458: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7600000; valaddr_reg:x3; val_offset:1374*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1374*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_459: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7700000; valaddr_reg:x3; val_offset:1377*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1377*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_460: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb7780000; valaddr_reg:x3; val_offset:1380*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1380*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_461: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77c0000; valaddr_reg:x3; val_offset:1383*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1383*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_462: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77e0000; valaddr_reg:x3; val_offset:1386*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1386*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_463: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77f0000; valaddr_reg:x3; val_offset:1389*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1389*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_464: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77f8000; valaddr_reg:x3; val_offset:1392*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1392*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_465: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77fc000; valaddr_reg:x3; val_offset:1395*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1395*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_466: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77fe000; valaddr_reg:x3; val_offset:1398*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1398*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_467: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77ff000; valaddr_reg:x3; val_offset:1401*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1401*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_468: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77ff800; valaddr_reg:x3; val_offset:1404*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1404*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_469: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77ffc00; valaddr_reg:x3; val_offset:1407*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1407*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_470: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77ffe00; valaddr_reg:x3; val_offset:1410*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1410*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_471: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77fff00; valaddr_reg:x3; val_offset:1413*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1413*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_472: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77fff80; valaddr_reg:x3; val_offset:1416*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1416*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_473: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77fffc0; valaddr_reg:x3; val_offset:1419*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1419*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_474: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77fffe0; valaddr_reg:x3; val_offset:1422*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1422*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_475: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77ffff0; valaddr_reg:x3; val_offset:1425*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1425*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_476: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77ffff8; valaddr_reg:x3; val_offset:1428*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1428*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_477: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77ffffc; valaddr_reg:x3; val_offset:1431*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1431*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_478: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77ffffe; valaddr_reg:x3; val_offset:1434*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1434*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_479: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x6e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xb77fffff; valaddr_reg:x3; val_offset:1437*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1437*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_480: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbf800001; valaddr_reg:x3; val_offset:1440*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1440*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_481: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbf800003; valaddr_reg:x3; val_offset:1443*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1443*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_482: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbf800007; valaddr_reg:x3; val_offset:1446*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1446*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_483: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbf999999; valaddr_reg:x3; val_offset:1449*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1449*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_484: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:1452*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1452*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_485: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:1455*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1455*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_486: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:1458*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1458*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_487: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:1461*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1461*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_488: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:1464*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1464*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_489: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:1467*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1467*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_490: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:1470*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1470*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_491: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:1473*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1473*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_492: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:1476*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1476*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_493: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:1479*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1479*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_494: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:1482*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1482*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_495: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x2f9c95 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x3a97f1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c2f9c95; op2val:0x82ba97f1; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:1485*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1485*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_496: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5000000; valaddr_reg:x3; val_offset:1488*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1488*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_497: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5000001; valaddr_reg:x3; val_offset:1491*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1491*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_498: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5000003; valaddr_reg:x3; val_offset:1494*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1494*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_499: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5000007; valaddr_reg:x3; val_offset:1497*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1497*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_500: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb500000f; valaddr_reg:x3; val_offset:1500*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1500*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_501: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb500001f; valaddr_reg:x3; val_offset:1503*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1503*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_502: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb500003f; valaddr_reg:x3; val_offset:1506*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1506*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_503: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb500007f; valaddr_reg:x3; val_offset:1509*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1509*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_504: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb50000ff; valaddr_reg:x3; val_offset:1512*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1512*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_505: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb50001ff; valaddr_reg:x3; val_offset:1515*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1515*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_506: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb50003ff; valaddr_reg:x3; val_offset:1518*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1518*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_507: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb50007ff; valaddr_reg:x3; val_offset:1521*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1521*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_508: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5000fff; valaddr_reg:x3; val_offset:1524*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1524*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_509: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5001fff; valaddr_reg:x3; val_offset:1527*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1527*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_510: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5003fff; valaddr_reg:x3; val_offset:1530*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1530*0 + 3*3*FLEN/8, x4, x1, x2) + +inst_511: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5007fff; valaddr_reg:x3; val_offset:1533*0 + 3*3*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1533*0 + 3*3*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125376,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125377,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125379,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125383,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125391,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125407,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125439,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125503,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125631,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233125887,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233126399,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233127423,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233129471,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233133567,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233141759,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233158143,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233190911,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233256447,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233387519,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1233649663,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1234173951,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1235222527,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1237319679,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1237319680,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1239416832,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1240465408,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1240989696,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241251840,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241382912,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241448448,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241481216,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241497600,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241505792,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241509888,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241511936,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241512960,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513472,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513728,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513856,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513920,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513952,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513968,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513976,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513980,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513982,32,FLEN) +NAN_BOXED(2082619246,32,FLEN) +NAN_BOXED(46790259,32,FLEN) +NAN_BOXED(1241513983,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230528,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230529,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230531,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230535,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230543,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230559,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230591,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230655,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070230783,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070231039,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070231551,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070232575,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070234623,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070238719,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070246911,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070263295,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070296063,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070361599,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070492671,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3070754815,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3071279103,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3072327679,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3074424831,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3074424832,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3076521984,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3077570560,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078094848,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078356992,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078488064,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078553600,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078586368,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078602752,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078610944,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078615040,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078617088,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078618112,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078618624,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078618880,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078619008,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078619072,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078619104,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078619120,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078619128,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078619132,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078619134,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3078619135,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2083495061,32,FLEN) +NAN_BOXED(2193266673,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676096,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676097,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676099,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676103,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676111,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676127,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676159,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676223,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676351,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036676607,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036677119,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036678143,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036680191,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036684287,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036692479,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036708863,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-05.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-05.S new file mode 100644 index 000000000..07d8fb845 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-05.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_512: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb500ffff; valaddr_reg:x3; val_offset:1536*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1536*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_513: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb501ffff; valaddr_reg:x3; val_offset:1539*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1539*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_514: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb503ffff; valaddr_reg:x3; val_offset:1542*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1542*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_515: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb507ffff; valaddr_reg:x3; val_offset:1545*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1545*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_516: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb50fffff; valaddr_reg:x3; val_offset:1548*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1548*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_517: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb51fffff; valaddr_reg:x3; val_offset:1551*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1551*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_518: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb53fffff; valaddr_reg:x3; val_offset:1554*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1554*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_519: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5400000; valaddr_reg:x3; val_offset:1557*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1557*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_520: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5600000; valaddr_reg:x3; val_offset:1560*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1560*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_521: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5700000; valaddr_reg:x3; val_offset:1563*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1563*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_522: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb5780000; valaddr_reg:x3; val_offset:1566*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1566*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_523: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57c0000; valaddr_reg:x3; val_offset:1569*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1569*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_524: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57e0000; valaddr_reg:x3; val_offset:1572*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1572*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_525: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57f0000; valaddr_reg:x3; val_offset:1575*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1575*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_526: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57f8000; valaddr_reg:x3; val_offset:1578*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1578*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_527: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57fc000; valaddr_reg:x3; val_offset:1581*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1581*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_528: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57fe000; valaddr_reg:x3; val_offset:1584*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1584*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_529: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57ff000; valaddr_reg:x3; val_offset:1587*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1587*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_530: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57ff800; valaddr_reg:x3; val_offset:1590*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1590*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_531: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57ffc00; valaddr_reg:x3; val_offset:1593*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1593*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_532: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57ffe00; valaddr_reg:x3; val_offset:1596*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1596*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_533: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57fff00; valaddr_reg:x3; val_offset:1599*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1599*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_534: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57fff80; valaddr_reg:x3; val_offset:1602*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1602*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_535: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57fffc0; valaddr_reg:x3; val_offset:1605*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1605*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_536: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57fffe0; valaddr_reg:x3; val_offset:1608*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1608*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_537: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57ffff0; valaddr_reg:x3; val_offset:1611*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1611*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_538: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57ffff8; valaddr_reg:x3; val_offset:1614*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1614*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_539: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57ffffc; valaddr_reg:x3; val_offset:1617*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1617*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_540: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57ffffe; valaddr_reg:x3; val_offset:1620*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1620*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_541: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x6a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xb57fffff; valaddr_reg:x3; val_offset:1623*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1623*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_542: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbf800001; valaddr_reg:x3; val_offset:1626*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1626*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_543: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbf800003; valaddr_reg:x3; val_offset:1629*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1629*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_544: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbf800007; valaddr_reg:x3; val_offset:1632*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1632*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_545: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbf999999; valaddr_reg:x3; val_offset:1635*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1635*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_546: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:1638*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1638*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_547: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:1641*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1641*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_548: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:1644*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1644*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_549: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:1647*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1647*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_550: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:1650*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1650*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_551: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:1653*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1653*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_552: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:1656*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1656*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_553: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:1659*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1659*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_554: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:1662*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1662*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_555: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:1665*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1665*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_556: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:1668*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1668*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_557: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x34fe53 and fs2 == 1 and fe2 == 0x05 and fm2 == 0x350b92 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c34fe53; op2val:0x82b50b92; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:1671*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1671*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_558: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:1674*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1674*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_559: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:1677*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1677*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_560: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:1680*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1680*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_561: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:1683*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1683*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_562: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:1686*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1686*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_563: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:1689*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1689*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_564: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:1692*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1692*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_565: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:1695*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1695*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_566: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:1698*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1698*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_567: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:1701*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1701*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_568: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:1704*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1704*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_569: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:1707*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1707*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_570: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:1710*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1710*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_571: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:1713*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1713*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_572: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:1716*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1716*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_573: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:1719*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1719*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_574: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd800000; valaddr_reg:x3; val_offset:1722*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1722*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_575: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd800001; valaddr_reg:x3; val_offset:1725*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1725*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_576: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd800003; valaddr_reg:x3; val_offset:1728*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1728*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_577: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd800007; valaddr_reg:x3; val_offset:1731*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1731*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_578: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd80000f; valaddr_reg:x3; val_offset:1734*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1734*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_579: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd80001f; valaddr_reg:x3; val_offset:1737*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1737*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_580: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd80003f; valaddr_reg:x3; val_offset:1740*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1740*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_581: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd80007f; valaddr_reg:x3; val_offset:1743*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1743*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_582: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd8000ff; valaddr_reg:x3; val_offset:1746*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1746*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_583: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd8001ff; valaddr_reg:x3; val_offset:1749*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1749*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_584: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd8003ff; valaddr_reg:x3; val_offset:1752*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1752*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_585: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd8007ff; valaddr_reg:x3; val_offset:1755*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1755*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_586: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd800fff; valaddr_reg:x3; val_offset:1758*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1758*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_587: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd801fff; valaddr_reg:x3; val_offset:1761*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1761*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_588: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd803fff; valaddr_reg:x3; val_offset:1764*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1764*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_589: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd807fff; valaddr_reg:x3; val_offset:1767*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1767*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_590: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd80ffff; valaddr_reg:x3; val_offset:1770*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1770*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_591: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd81ffff; valaddr_reg:x3; val_offset:1773*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1773*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_592: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd83ffff; valaddr_reg:x3; val_offset:1776*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1776*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_593: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd87ffff; valaddr_reg:x3; val_offset:1779*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1779*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_594: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd8fffff; valaddr_reg:x3; val_offset:1782*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1782*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_595: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xd9fffff; valaddr_reg:x3; val_offset:1785*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1785*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_596: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdbfffff; valaddr_reg:x3; val_offset:1788*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1788*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_597: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdc00000; valaddr_reg:x3; val_offset:1791*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1791*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_598: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xde00000; valaddr_reg:x3; val_offset:1794*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1794*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_599: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdf00000; valaddr_reg:x3; val_offset:1797*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1797*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_600: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdf80000; valaddr_reg:x3; val_offset:1800*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1800*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_601: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfc0000; valaddr_reg:x3; val_offset:1803*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1803*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_602: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfe0000; valaddr_reg:x3; val_offset:1806*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1806*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_603: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdff0000; valaddr_reg:x3; val_offset:1809*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1809*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_604: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdff8000; valaddr_reg:x3; val_offset:1812*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1812*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_605: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdffc000; valaddr_reg:x3; val_offset:1815*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1815*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_606: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdffe000; valaddr_reg:x3; val_offset:1818*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1818*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_607: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfff000; valaddr_reg:x3; val_offset:1821*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1821*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_608: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfff800; valaddr_reg:x3; val_offset:1824*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1824*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_609: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfffc00; valaddr_reg:x3; val_offset:1827*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1827*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_610: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfffe00; valaddr_reg:x3; val_offset:1830*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1830*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_611: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdffff00; valaddr_reg:x3; val_offset:1833*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1833*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_612: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdffff80; valaddr_reg:x3; val_offset:1836*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1836*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_613: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdffffc0; valaddr_reg:x3; val_offset:1839*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1839*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_614: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdffffe0; valaddr_reg:x3; val_offset:1842*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1842*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_615: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfffff0; valaddr_reg:x3; val_offset:1845*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1845*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_616: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfffff8; valaddr_reg:x3; val_offset:1848*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1848*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_617: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfffffc; valaddr_reg:x3; val_offset:1851*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1851*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_618: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdfffffe; valaddr_reg:x3; val_offset:1854*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1854*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_619: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x3bd2e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c3bd2e4; op2val:0x0; +op3val:0xdffffff; valaddr_reg:x3; val_offset:1857*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1857*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_620: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d000000; valaddr_reg:x3; val_offset:1860*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1860*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_621: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d000001; valaddr_reg:x3; val_offset:1863*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1863*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_622: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d000003; valaddr_reg:x3; val_offset:1866*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1866*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_623: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d000007; valaddr_reg:x3; val_offset:1869*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1869*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_624: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d00000f; valaddr_reg:x3; val_offset:1872*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1872*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_625: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d00001f; valaddr_reg:x3; val_offset:1875*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1875*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_626: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d00003f; valaddr_reg:x3; val_offset:1878*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1878*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_627: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d00007f; valaddr_reg:x3; val_offset:1881*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1881*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_628: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d0000ff; valaddr_reg:x3; val_offset:1884*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1884*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_629: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d0001ff; valaddr_reg:x3; val_offset:1887*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1887*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_630: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d0003ff; valaddr_reg:x3; val_offset:1890*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1890*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_631: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d0007ff; valaddr_reg:x3; val_offset:1893*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1893*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_632: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d000fff; valaddr_reg:x3; val_offset:1896*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1896*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_633: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d001fff; valaddr_reg:x3; val_offset:1899*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1899*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_634: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d003fff; valaddr_reg:x3; val_offset:1902*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1902*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_635: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d007fff; valaddr_reg:x3; val_offset:1905*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1905*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_636: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d00ffff; valaddr_reg:x3; val_offset:1908*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1908*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_637: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d01ffff; valaddr_reg:x3; val_offset:1911*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1911*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_638: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d03ffff; valaddr_reg:x3; val_offset:1914*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1914*0 + 3*4*FLEN/8, x4, x1, x2) + +inst_639: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d07ffff; valaddr_reg:x3; val_offset:1917*0 + 3*4*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1917*0 + 3*4*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036741631,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036807167,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3036938239,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3037200383,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3037724671,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3038773247,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3040870399,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3040870400,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3042967552,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3044016128,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3044540416,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3044802560,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3044933632,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3044999168,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045031936,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045048320,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045056512,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045060608,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045062656,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045063680,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064192,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064448,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064576,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064640,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064672,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064688,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064696,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064700,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064702,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3045064703,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2083847763,32,FLEN) +NAN_BOXED(2192903058,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492416,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492417,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492419,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492423,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492431,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492447,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492479,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492543,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492671,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492927,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226493439,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226494463,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226496511,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226500607,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226508799,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226525183,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226557951,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226623487,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226754559,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(227016703,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(227540991,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(228589567,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(230686719,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(230686720,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(232783872,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(233832448,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234356736,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234618880,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234749952,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234815488,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234848256,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234864640,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234872832,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234876928,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234878976,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880000,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880512,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880768,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880896,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880960,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880992,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881008,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881016,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881020,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881022,32,FLEN) +NAN_BOXED(2084295396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881023,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974720,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974721,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974723,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974727,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974735,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974751,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974783,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974847,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754974975,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754975231,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754975743,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754976767,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754978815,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754982911,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(754991103,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(755007487,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(755040255,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(755105791,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(755236863,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(755499007,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-06.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-06.S new file mode 100644 index 000000000..2f4384ed4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-06.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_640: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d0fffff; valaddr_reg:x3; val_offset:1920*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1920*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_641: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d1fffff; valaddr_reg:x3; val_offset:1923*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1923*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_642: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d3fffff; valaddr_reg:x3; val_offset:1926*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1926*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_643: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d400000; valaddr_reg:x3; val_offset:1929*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1929*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_644: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d600000; valaddr_reg:x3; val_offset:1932*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1932*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_645: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d700000; valaddr_reg:x3; val_offset:1935*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1935*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_646: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d780000; valaddr_reg:x3; val_offset:1938*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1938*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_647: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7c0000; valaddr_reg:x3; val_offset:1941*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1941*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_648: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7e0000; valaddr_reg:x3; val_offset:1944*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1944*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_649: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7f0000; valaddr_reg:x3; val_offset:1947*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1947*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_650: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7f8000; valaddr_reg:x3; val_offset:1950*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1950*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_651: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7fc000; valaddr_reg:x3; val_offset:1953*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1953*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_652: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7fe000; valaddr_reg:x3; val_offset:1956*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1956*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_653: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7ff000; valaddr_reg:x3; val_offset:1959*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1959*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_654: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7ff800; valaddr_reg:x3; val_offset:1962*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1962*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_655: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7ffc00; valaddr_reg:x3; val_offset:1965*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1965*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_656: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7ffe00; valaddr_reg:x3; val_offset:1968*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1968*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_657: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7fff00; valaddr_reg:x3; val_offset:1971*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1971*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_658: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7fff80; valaddr_reg:x3; val_offset:1974*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1974*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_659: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7fffc0; valaddr_reg:x3; val_offset:1977*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1977*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_660: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7fffe0; valaddr_reg:x3; val_offset:1980*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1980*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_661: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7ffff0; valaddr_reg:x3; val_offset:1983*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1983*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_662: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7ffff8; valaddr_reg:x3; val_offset:1986*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1986*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_663: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7ffffc; valaddr_reg:x3; val_offset:1989*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1989*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_664: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7ffffe; valaddr_reg:x3; val_offset:1992*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1992*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_665: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x5a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x2d7fffff; valaddr_reg:x3; val_offset:1995*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1995*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_666: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3f800001; valaddr_reg:x3; val_offset:1998*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 1998*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_667: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3f800003; valaddr_reg:x3; val_offset:2001*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2001*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_668: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3f800007; valaddr_reg:x3; val_offset:2004*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2004*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_669: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3f999999; valaddr_reg:x3; val_offset:2007*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2007*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_670: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:2010*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2010*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_671: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:2013*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2013*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_672: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:2016*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2016*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_673: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:2019*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2019*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_674: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:2022*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2022*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_675: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:2025*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2025*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_676: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:2028*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2028*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_677: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:2031*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2031*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_678: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:2034*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2034*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_679: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:2037*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2037*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_680: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:2040*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2040*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_681: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x472d2f and fs2 == 0 and fe2 == 0x05 and fm2 == 0x248473 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c472d2f; op2val:0x2a48473; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:2043*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2043*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_682: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:2046*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2046*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_683: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:2049*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2049*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_684: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:2052*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2052*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_685: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:2055*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2055*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_686: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:2058*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2058*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_687: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:2061*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2061*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_688: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:2064*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2064*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_689: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:2067*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2067*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_690: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:2070*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2070*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_691: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:2073*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2073*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_692: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:2076*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2076*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_693: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:2079*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2079*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_694: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:2082*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2082*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_695: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:2085*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2085*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_696: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:2088*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2088*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_697: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:2091*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2091*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_698: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89000000; valaddr_reg:x3; val_offset:2094*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2094*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_699: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89000001; valaddr_reg:x3; val_offset:2097*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2097*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_700: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89000003; valaddr_reg:x3; val_offset:2100*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2100*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_701: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89000007; valaddr_reg:x3; val_offset:2103*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2103*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_702: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8900000f; valaddr_reg:x3; val_offset:2106*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2106*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_703: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8900001f; valaddr_reg:x3; val_offset:2109*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2109*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_704: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8900003f; valaddr_reg:x3; val_offset:2112*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2112*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_705: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8900007f; valaddr_reg:x3; val_offset:2115*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2115*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_706: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x890000ff; valaddr_reg:x3; val_offset:2118*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2118*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_707: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x890001ff; valaddr_reg:x3; val_offset:2121*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2121*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_708: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x890003ff; valaddr_reg:x3; val_offset:2124*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2124*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_709: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x890007ff; valaddr_reg:x3; val_offset:2127*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2127*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_710: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89000fff; valaddr_reg:x3; val_offset:2130*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2130*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_711: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89001fff; valaddr_reg:x3; val_offset:2133*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2133*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_712: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89003fff; valaddr_reg:x3; val_offset:2136*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2136*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_713: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89007fff; valaddr_reg:x3; val_offset:2139*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2139*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_714: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8900ffff; valaddr_reg:x3; val_offset:2142*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2142*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_715: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8901ffff; valaddr_reg:x3; val_offset:2145*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2145*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_716: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8903ffff; valaddr_reg:x3; val_offset:2148*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2148*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_717: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x8907ffff; valaddr_reg:x3; val_offset:2151*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2151*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_718: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x890fffff; valaddr_reg:x3; val_offset:2154*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2154*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_719: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x891fffff; valaddr_reg:x3; val_offset:2157*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2157*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_720: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x893fffff; valaddr_reg:x3; val_offset:2160*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2160*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_721: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89400000; valaddr_reg:x3; val_offset:2163*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2163*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_722: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89600000; valaddr_reg:x3; val_offset:2166*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2166*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_723: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89700000; valaddr_reg:x3; val_offset:2169*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2169*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_724: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x89780000; valaddr_reg:x3; val_offset:2172*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2172*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_725: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897c0000; valaddr_reg:x3; val_offset:2175*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2175*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_726: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897e0000; valaddr_reg:x3; val_offset:2178*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2178*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_727: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897f0000; valaddr_reg:x3; val_offset:2181*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2181*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_728: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897f8000; valaddr_reg:x3; val_offset:2184*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2184*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_729: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897fc000; valaddr_reg:x3; val_offset:2187*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2187*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_730: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897fe000; valaddr_reg:x3; val_offset:2190*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2190*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_731: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897ff000; valaddr_reg:x3; val_offset:2193*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2193*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_732: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897ff800; valaddr_reg:x3; val_offset:2196*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2196*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_733: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897ffc00; valaddr_reg:x3; val_offset:2199*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2199*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_734: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897ffe00; valaddr_reg:x3; val_offset:2202*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2202*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_735: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897fff00; valaddr_reg:x3; val_offset:2205*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2205*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_736: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897fff80; valaddr_reg:x3; val_offset:2208*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2208*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_737: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897fffc0; valaddr_reg:x3; val_offset:2211*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2211*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_738: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897fffe0; valaddr_reg:x3; val_offset:2214*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2214*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_739: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897ffff0; valaddr_reg:x3; val_offset:2217*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2217*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_740: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897ffff8; valaddr_reg:x3; val_offset:2220*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2220*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_741: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897ffffc; valaddr_reg:x3; val_offset:2223*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2223*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_742: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897ffffe; valaddr_reg:x3; val_offset:2226*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2226*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_743: +// fs1 == 0 and fe1 == 0xf8 and fm1 == 0x7bae1f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c7bae1f; op2val:0x80000000; +op3val:0x897fffff; valaddr_reg:x3; val_offset:2229*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2229*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_744: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe000000; valaddr_reg:x3; val_offset:2232*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2232*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_745: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe000001; valaddr_reg:x3; val_offset:2235*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2235*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_746: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe000003; valaddr_reg:x3; val_offset:2238*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2238*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_747: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe000007; valaddr_reg:x3; val_offset:2241*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2241*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_748: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe00000f; valaddr_reg:x3; val_offset:2244*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2244*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_749: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe00001f; valaddr_reg:x3; val_offset:2247*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2247*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_750: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe00003f; valaddr_reg:x3; val_offset:2250*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2250*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_751: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe00007f; valaddr_reg:x3; val_offset:2253*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2253*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_752: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe0000ff; valaddr_reg:x3; val_offset:2256*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2256*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_753: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe0001ff; valaddr_reg:x3; val_offset:2259*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2259*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_754: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe0003ff; valaddr_reg:x3; val_offset:2262*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2262*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_755: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe0007ff; valaddr_reg:x3; val_offset:2265*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2265*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_756: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe000fff; valaddr_reg:x3; val_offset:2268*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2268*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_757: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe001fff; valaddr_reg:x3; val_offset:2271*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2271*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_758: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe003fff; valaddr_reg:x3; val_offset:2274*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2274*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_759: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe007fff; valaddr_reg:x3; val_offset:2277*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2277*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_760: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe00ffff; valaddr_reg:x3; val_offset:2280*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2280*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_761: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe01ffff; valaddr_reg:x3; val_offset:2283*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2283*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_762: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe03ffff; valaddr_reg:x3; val_offset:2286*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2286*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_763: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe07ffff; valaddr_reg:x3; val_offset:2289*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2289*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_764: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe0fffff; valaddr_reg:x3; val_offset:2292*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2292*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_765: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe1fffff; valaddr_reg:x3; val_offset:2295*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2295*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_766: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe3fffff; valaddr_reg:x3; val_offset:2298*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2298*0 + 3*5*FLEN/8, x4, x1, x2) + +inst_767: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe400000; valaddr_reg:x3; val_offset:2301*0 + 3*5*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2301*0 + 3*5*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(756023295,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(757071871,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(759169023,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(759169024,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(761266176,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(762314752,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(762839040,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763101184,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763232256,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763297792,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763330560,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763346944,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763355136,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763359232,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763361280,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763362304,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763362816,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363072,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363200,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363264,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363296,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363312,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363320,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363324,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363326,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(763363327,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2085039407,32,FLEN) +NAN_BOXED(44336243,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478592,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478593,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478595,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478599,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478607,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478623,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478655,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478719,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478847,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298479103,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298479615,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298480639,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298482687,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298486783,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298494975,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298511359,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298544127,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298609663,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298740735,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2299002879,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2299527167,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2300575743,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2302672895,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2302672896,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2304770048,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2305818624,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306342912,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306605056,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306736128,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306801664,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306834432,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306850816,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306859008,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306863104,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306865152,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866176,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866688,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866944,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867072,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867136,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867168,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867184,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867192,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867196,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867198,32,FLEN) +NAN_BOXED(2088480287,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867199,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671040,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671041,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671043,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671047,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671055,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671071,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671103,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671167,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671295,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187671551,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187672063,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187673087,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187675135,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187679231,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187687423,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187703807,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187736575,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187802111,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3187933183,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3188195327,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3188719615,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3189768191,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3191865343,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3191865344,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-07.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-07.S new file mode 100644 index 000000000..c5e0db5c9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-07.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_768: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe600000; valaddr_reg:x3; val_offset:2304*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2304*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_769: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe700000; valaddr_reg:x3; val_offset:2307*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2307*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_770: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe780000; valaddr_reg:x3; val_offset:2310*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2310*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_771: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7c0000; valaddr_reg:x3; val_offset:2313*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2313*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_772: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7e0000; valaddr_reg:x3; val_offset:2316*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2316*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_773: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7f0000; valaddr_reg:x3; val_offset:2319*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2319*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_774: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7f8000; valaddr_reg:x3; val_offset:2322*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2322*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_775: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7fc000; valaddr_reg:x3; val_offset:2325*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2325*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_776: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7fe000; valaddr_reg:x3; val_offset:2328*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2328*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_777: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7ff000; valaddr_reg:x3; val_offset:2331*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2331*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_778: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7ff800; valaddr_reg:x3; val_offset:2334*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2334*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_779: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7ffc00; valaddr_reg:x3; val_offset:2337*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2337*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_780: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7ffe00; valaddr_reg:x3; val_offset:2340*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2340*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_781: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7fff00; valaddr_reg:x3; val_offset:2343*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2343*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_782: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7fff80; valaddr_reg:x3; val_offset:2346*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2346*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_783: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7fffc0; valaddr_reg:x3; val_offset:2349*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2349*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_784: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7fffe0; valaddr_reg:x3; val_offset:2352*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2352*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_785: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7ffff0; valaddr_reg:x3; val_offset:2355*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2355*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_786: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7ffff8; valaddr_reg:x3; val_offset:2358*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2358*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_787: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7ffffc; valaddr_reg:x3; val_offset:2361*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2361*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_788: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7ffffe; valaddr_reg:x3; val_offset:2364*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2364*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_789: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbe7fffff; valaddr_reg:x3; val_offset:2367*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2367*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_790: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbf800001; valaddr_reg:x3; val_offset:2370*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2370*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_791: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbf800003; valaddr_reg:x3; val_offset:2373*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2373*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_792: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbf800007; valaddr_reg:x3; val_offset:2376*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2376*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_793: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbf999999; valaddr_reg:x3; val_offset:2379*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2379*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_794: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:2382*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2382*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_795: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:2385*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2385*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_796: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:2388*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2388*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_797: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:2391*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2391*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_798: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:2394*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2394*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_799: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:2397*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2397*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_800: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:2400*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2400*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_801: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:2403*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2403*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_802: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:2406*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2406*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_803: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:2409*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2409*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_804: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:2412*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2412*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_805: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x0637ff and fs2 == 1 and fe2 == 0x04 and fm2 == 0x742387 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7c8637ff; op2val:0x82742387; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:2415*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2415*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_806: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:2418*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2418*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_807: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:2421*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2421*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_808: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:2424*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2424*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_809: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:2427*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2427*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_810: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:2430*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2430*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_811: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:2433*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2433*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_812: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:2436*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2436*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_813: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:2439*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2439*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_814: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:2442*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2442*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_815: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:2445*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2445*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_816: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:2448*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2448*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_817: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:2451*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2451*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_818: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:2454*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2454*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_819: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:2457*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2457*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_820: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:2460*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2460*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_821: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:2463*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2463*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_822: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87800000; valaddr_reg:x3; val_offset:2466*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2466*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_823: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87800001; valaddr_reg:x3; val_offset:2469*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2469*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_824: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87800003; valaddr_reg:x3; val_offset:2472*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2472*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_825: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87800007; valaddr_reg:x3; val_offset:2475*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2475*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_826: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8780000f; valaddr_reg:x3; val_offset:2478*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2478*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_827: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8780001f; valaddr_reg:x3; val_offset:2481*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2481*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_828: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8780003f; valaddr_reg:x3; val_offset:2484*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2484*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_829: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8780007f; valaddr_reg:x3; val_offset:2487*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2487*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_830: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x878000ff; valaddr_reg:x3; val_offset:2490*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2490*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_831: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x878001ff; valaddr_reg:x3; val_offset:2493*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2493*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_832: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x878003ff; valaddr_reg:x3; val_offset:2496*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2496*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_833: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x878007ff; valaddr_reg:x3; val_offset:2499*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2499*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_834: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87800fff; valaddr_reg:x3; val_offset:2502*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2502*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_835: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87801fff; valaddr_reg:x3; val_offset:2505*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2505*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_836: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87803fff; valaddr_reg:x3; val_offset:2508*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2508*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_837: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87807fff; valaddr_reg:x3; val_offset:2511*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2511*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_838: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8780ffff; valaddr_reg:x3; val_offset:2514*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2514*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_839: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8781ffff; valaddr_reg:x3; val_offset:2517*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2517*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_840: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8783ffff; valaddr_reg:x3; val_offset:2520*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2520*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_841: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x8787ffff; valaddr_reg:x3; val_offset:2523*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2523*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_842: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x878fffff; valaddr_reg:x3; val_offset:2526*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2526*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_843: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x879fffff; valaddr_reg:x3; val_offset:2529*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2529*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_844: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87bfffff; valaddr_reg:x3; val_offset:2532*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2532*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_845: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87c00000; valaddr_reg:x3; val_offset:2535*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2535*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_846: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87e00000; valaddr_reg:x3; val_offset:2538*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2538*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_847: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87f00000; valaddr_reg:x3; val_offset:2541*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2541*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_848: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87f80000; valaddr_reg:x3; val_offset:2544*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2544*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_849: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fc0000; valaddr_reg:x3; val_offset:2547*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2547*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_850: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fe0000; valaddr_reg:x3; val_offset:2550*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2550*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_851: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ff0000; valaddr_reg:x3; val_offset:2553*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2553*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_852: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ff8000; valaddr_reg:x3; val_offset:2556*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2556*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_853: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ffc000; valaddr_reg:x3; val_offset:2559*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2559*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_854: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ffe000; valaddr_reg:x3; val_offset:2562*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2562*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_855: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fff000; valaddr_reg:x3; val_offset:2565*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2565*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_856: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fff800; valaddr_reg:x3; val_offset:2568*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2568*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_857: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fffc00; valaddr_reg:x3; val_offset:2571*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2571*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_858: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fffe00; valaddr_reg:x3; val_offset:2574*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2574*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_859: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ffff00; valaddr_reg:x3; val_offset:2577*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2577*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_860: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ffff80; valaddr_reg:x3; val_offset:2580*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2580*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_861: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ffffc0; valaddr_reg:x3; val_offset:2583*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2583*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_862: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ffffe0; valaddr_reg:x3; val_offset:2586*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2586*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_863: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fffff0; valaddr_reg:x3; val_offset:2589*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2589*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_864: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fffff8; valaddr_reg:x3; val_offset:2592*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2592*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_865: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fffffc; valaddr_reg:x3; val_offset:2595*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2595*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_866: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87fffffe; valaddr_reg:x3; val_offset:2598*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2598*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_867: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x29b0da and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ca9b0da; op2val:0x80000000; +op3val:0x87ffffff; valaddr_reg:x3; val_offset:2601*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2601*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_868: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d800000; valaddr_reg:x3; val_offset:2604*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2604*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_869: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d800001; valaddr_reg:x3; val_offset:2607*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2607*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_870: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d800003; valaddr_reg:x3; val_offset:2610*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2610*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_871: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d800007; valaddr_reg:x3; val_offset:2613*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2613*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_872: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d80000f; valaddr_reg:x3; val_offset:2616*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2616*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_873: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d80001f; valaddr_reg:x3; val_offset:2619*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2619*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_874: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d80003f; valaddr_reg:x3; val_offset:2622*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2622*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_875: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d80007f; valaddr_reg:x3; val_offset:2625*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2625*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_876: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d8000ff; valaddr_reg:x3; val_offset:2628*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2628*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_877: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d8001ff; valaddr_reg:x3; val_offset:2631*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2631*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_878: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d8003ff; valaddr_reg:x3; val_offset:2634*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2634*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_879: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d8007ff; valaddr_reg:x3; val_offset:2637*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2637*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_880: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d800fff; valaddr_reg:x3; val_offset:2640*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2640*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_881: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d801fff; valaddr_reg:x3; val_offset:2643*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2643*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_882: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d803fff; valaddr_reg:x3; val_offset:2646*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2646*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_883: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d807fff; valaddr_reg:x3; val_offset:2649*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2649*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_884: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d80ffff; valaddr_reg:x3; val_offset:2652*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2652*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_885: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d81ffff; valaddr_reg:x3; val_offset:2655*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2655*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_886: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d83ffff; valaddr_reg:x3; val_offset:2658*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2658*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_887: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d87ffff; valaddr_reg:x3; val_offset:2661*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2661*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_888: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d8fffff; valaddr_reg:x3; val_offset:2664*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2664*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_889: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6d9fffff; valaddr_reg:x3; val_offset:2667*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2667*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_890: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dbfffff; valaddr_reg:x3; val_offset:2670*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2670*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_891: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dc00000; valaddr_reg:x3; val_offset:2673*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2673*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_892: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6de00000; valaddr_reg:x3; val_offset:2676*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2676*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_893: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6df00000; valaddr_reg:x3; val_offset:2679*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2679*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_894: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6df80000; valaddr_reg:x3; val_offset:2682*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2682*0 + 3*6*FLEN/8, x4, x1, x2) + +inst_895: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfc0000; valaddr_reg:x3; val_offset:2685*0 + 3*6*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2685*0 + 3*6*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3193962496,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3195011072,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3195535360,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3195797504,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3195928576,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3195994112,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196026880,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196043264,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196051456,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196055552,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196057600,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196058624,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059136,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059392,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059520,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059584,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059616,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059632,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059640,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059644,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059646,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3196059647,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2089170943,32,FLEN) +NAN_BOXED(2188649351,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312768,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312769,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312771,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312775,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312783,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312799,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312831,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312895,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313023,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313279,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313791,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273314815,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273316863,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273320959,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273329151,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273345535,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273378303,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273443839,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273574911,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273837055,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2274361343,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2275409919,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2277507071,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2277507072,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2279604224,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2280652800,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281177088,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281439232,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281570304,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281635840,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281668608,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281684992,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281693184,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281697280,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281699328,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281700352,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281700864,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701120,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701248,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701312,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701344,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701360,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701368,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701372,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701374,32,FLEN) +NAN_BOXED(2091495642,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701375,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105152,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105153,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105155,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105159,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105167,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105183,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105215,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105279,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105407,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837105663,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837106175,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837107199,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837109247,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837113343,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837121535,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837137919,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837170687,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837236223,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837367295,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1837629439,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1838153727,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1839202303,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1841299455,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1841299456,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1843396608,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1844445184,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1844969472,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845231616,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-08.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-08.S new file mode 100644 index 000000000..6d980df39 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-08.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_896: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfe0000; valaddr_reg:x3; val_offset:2688*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2688*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_897: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dff0000; valaddr_reg:x3; val_offset:2691*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2691*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_898: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dff8000; valaddr_reg:x3; val_offset:2694*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2694*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_899: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dffc000; valaddr_reg:x3; val_offset:2697*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2697*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_900: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dffe000; valaddr_reg:x3; val_offset:2700*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2700*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_901: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfff000; valaddr_reg:x3; val_offset:2703*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2703*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_902: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfff800; valaddr_reg:x3; val_offset:2706*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2706*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_903: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfffc00; valaddr_reg:x3; val_offset:2709*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2709*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_904: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfffe00; valaddr_reg:x3; val_offset:2712*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2712*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_905: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dffff00; valaddr_reg:x3; val_offset:2715*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2715*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_906: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dffff80; valaddr_reg:x3; val_offset:2718*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2718*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_907: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dffffc0; valaddr_reg:x3; val_offset:2721*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2721*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_908: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dffffe0; valaddr_reg:x3; val_offset:2724*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2724*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_909: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfffff0; valaddr_reg:x3; val_offset:2727*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2727*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_910: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfffff8; valaddr_reg:x3; val_offset:2730*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2730*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_911: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfffffc; valaddr_reg:x3; val_offset:2733*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2733*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_912: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dfffffe; valaddr_reg:x3; val_offset:2736*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2736*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_913: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xdb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x6dffffff; valaddr_reg:x3; val_offset:2739*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2739*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_914: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f000001; valaddr_reg:x3; val_offset:2742*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2742*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_915: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f000003; valaddr_reg:x3; val_offset:2745*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2745*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_916: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f000007; valaddr_reg:x3; val_offset:2748*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2748*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_917: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f199999; valaddr_reg:x3; val_offset:2751*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2751*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_918: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f249249; valaddr_reg:x3; val_offset:2754*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2754*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_919: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f333333; valaddr_reg:x3; val_offset:2757*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2757*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_920: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:2760*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2760*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_921: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:2763*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2763*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_922: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f444444; valaddr_reg:x3; val_offset:2766*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2766*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_923: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:2769*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2769*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_924: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:2772*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2772*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_925: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f666666; valaddr_reg:x3; val_offset:2775*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2775*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_926: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:2778*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2778*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_927: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:2781*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2781*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_928: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:2784*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2784*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_929: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x2ba3e8 and fs2 == 0 and fe2 == 0x84 and fm2 == 0x3ee930 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7caba3e8; op2val:0x423ee930; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:2787*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2787*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_930: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8800000; valaddr_reg:x3; val_offset:2790*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2790*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_931: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8800001; valaddr_reg:x3; val_offset:2793*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2793*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_932: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8800003; valaddr_reg:x3; val_offset:2796*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2796*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_933: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8800007; valaddr_reg:x3; val_offset:2799*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2799*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_934: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa880000f; valaddr_reg:x3; val_offset:2802*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2802*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_935: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa880001f; valaddr_reg:x3; val_offset:2805*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2805*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_936: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa880003f; valaddr_reg:x3; val_offset:2808*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2808*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_937: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa880007f; valaddr_reg:x3; val_offset:2811*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2811*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_938: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa88000ff; valaddr_reg:x3; val_offset:2814*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2814*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_939: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa88001ff; valaddr_reg:x3; val_offset:2817*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2817*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_940: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa88003ff; valaddr_reg:x3; val_offset:2820*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2820*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_941: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa88007ff; valaddr_reg:x3; val_offset:2823*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2823*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_942: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8800fff; valaddr_reg:x3; val_offset:2826*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2826*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_943: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8801fff; valaddr_reg:x3; val_offset:2829*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2829*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_944: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8803fff; valaddr_reg:x3; val_offset:2832*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2832*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_945: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8807fff; valaddr_reg:x3; val_offset:2835*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2835*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_946: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa880ffff; valaddr_reg:x3; val_offset:2838*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2838*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_947: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa881ffff; valaddr_reg:x3; val_offset:2841*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2841*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_948: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa883ffff; valaddr_reg:x3; val_offset:2844*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2844*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_949: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa887ffff; valaddr_reg:x3; val_offset:2847*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2847*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_950: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa88fffff; valaddr_reg:x3; val_offset:2850*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2850*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_951: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa89fffff; valaddr_reg:x3; val_offset:2853*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2853*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_952: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8bfffff; valaddr_reg:x3; val_offset:2856*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2856*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_953: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8c00000; valaddr_reg:x3; val_offset:2859*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2859*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_954: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8e00000; valaddr_reg:x3; val_offset:2862*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2862*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_955: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8f00000; valaddr_reg:x3; val_offset:2865*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2865*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_956: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8f80000; valaddr_reg:x3; val_offset:2868*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2868*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_957: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fc0000; valaddr_reg:x3; val_offset:2871*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2871*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_958: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fe0000; valaddr_reg:x3; val_offset:2874*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2874*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_959: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ff0000; valaddr_reg:x3; val_offset:2877*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2877*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_960: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ff8000; valaddr_reg:x3; val_offset:2880*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2880*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_961: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ffc000; valaddr_reg:x3; val_offset:2883*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2883*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_962: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ffe000; valaddr_reg:x3; val_offset:2886*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2886*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_963: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fff000; valaddr_reg:x3; val_offset:2889*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2889*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_964: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fff800; valaddr_reg:x3; val_offset:2892*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2892*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_965: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fffc00; valaddr_reg:x3; val_offset:2895*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2895*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_966: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fffe00; valaddr_reg:x3; val_offset:2898*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2898*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_967: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ffff00; valaddr_reg:x3; val_offset:2901*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2901*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_968: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ffff80; valaddr_reg:x3; val_offset:2904*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2904*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_969: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ffffc0; valaddr_reg:x3; val_offset:2907*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2907*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_970: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ffffe0; valaddr_reg:x3; val_offset:2910*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2910*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_971: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fffff0; valaddr_reg:x3; val_offset:2913*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2913*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_972: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fffff8; valaddr_reg:x3; val_offset:2916*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2916*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_973: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fffffc; valaddr_reg:x3; val_offset:2919*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2919*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_974: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8fffffe; valaddr_reg:x3; val_offset:2922*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2922*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_975: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x51 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xa8ffffff; valaddr_reg:x3; val_offset:2925*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2925*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_976: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbf800001; valaddr_reg:x3; val_offset:2928*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2928*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_977: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbf800003; valaddr_reg:x3; val_offset:2931*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2931*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_978: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbf800007; valaddr_reg:x3; val_offset:2934*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2934*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_979: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbf999999; valaddr_reg:x3; val_offset:2937*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2937*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_980: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:2940*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2940*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_981: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:2943*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2943*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_982: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:2946*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2946*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_983: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:2949*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2949*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_984: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:2952*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2952*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_985: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:2955*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2955*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_986: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:2958*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2958*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_987: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:2961*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2961*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_988: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:2964*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2964*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_989: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:2967*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2967*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_990: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:2970*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2970*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_991: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x41d0be and fs2 == 1 and fe2 == 0x04 and fm2 == 0x29116d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc1d0be; op2val:0x8229116d; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:2973*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2973*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_992: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:2976*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2976*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_993: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:2979*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2979*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_994: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:2982*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2982*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_995: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:2985*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2985*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_996: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:2988*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2988*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_997: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:2991*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2991*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_998: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:2994*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2994*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_999: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:2997*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 2997*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1000: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:3000*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3000*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1001: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:3003*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3003*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1002: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:3006*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3006*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1003: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:3009*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3009*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1004: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:3012*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3012*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1005: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:3015*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3015*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1006: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:3018*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3018*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1007: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:3021*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3021*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1008: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7000000; valaddr_reg:x3; val_offset:3024*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3024*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1009: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7000001; valaddr_reg:x3; val_offset:3027*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3027*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1010: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7000003; valaddr_reg:x3; val_offset:3030*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3030*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1011: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7000007; valaddr_reg:x3; val_offset:3033*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3033*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1012: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x700000f; valaddr_reg:x3; val_offset:3036*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3036*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1013: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x700001f; valaddr_reg:x3; val_offset:3039*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3039*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1014: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x700003f; valaddr_reg:x3; val_offset:3042*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3042*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1015: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x700007f; valaddr_reg:x3; val_offset:3045*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3045*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1016: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x70000ff; valaddr_reg:x3; val_offset:3048*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3048*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1017: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x70001ff; valaddr_reg:x3; val_offset:3051*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3051*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1018: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x70003ff; valaddr_reg:x3; val_offset:3054*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3054*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1019: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x70007ff; valaddr_reg:x3; val_offset:3057*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3057*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1020: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7000fff; valaddr_reg:x3; val_offset:3060*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3060*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1021: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7001fff; valaddr_reg:x3; val_offset:3063*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3063*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1022: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7003fff; valaddr_reg:x3; val_offset:3066*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3066*0 + 3*7*FLEN/8, x4, x1, x2) + +inst_1023: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7007fff; valaddr_reg:x3; val_offset:3069*0 + 3*7*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3069*0 + 3*7*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845362688,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845428224,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845460992,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845477376,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845485568,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845489664,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845491712,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845492736,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493248,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493504,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493632,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493696,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493728,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493744,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493752,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493756,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493758,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(1845493759,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2091623400,32,FLEN) +NAN_BOXED(1111419184,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826960896,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826960897,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826960899,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826960903,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826960911,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826960927,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826960959,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826961023,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826961151,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826961407,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826961919,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826962943,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826964991,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826969087,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826977279,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2826993663,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2827026431,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2827091967,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2827223039,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2827485183,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2828009471,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2829058047,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2831155199,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2831155200,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2833252352,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2834300928,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2834825216,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835087360,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835218432,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835283968,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835316736,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835333120,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835341312,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835345408,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835347456,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835348480,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835348992,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349248,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349376,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349440,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349472,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349488,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349496,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349500,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349502,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(2835349503,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2093076670,32,FLEN) +NAN_BOXED(2183729517,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440512,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440513,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440515,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440519,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440527,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440543,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440575,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440639,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440767,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117441023,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117441535,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117442559,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117444607,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117448703,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117456895,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117473279,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-09.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-09.S new file mode 100644 index 000000000..bb49e13aa --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-09.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_1024: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x700ffff; valaddr_reg:x3; val_offset:3072*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3072*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1025: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x701ffff; valaddr_reg:x3; val_offset:3075*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3075*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1026: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x703ffff; valaddr_reg:x3; val_offset:3078*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3078*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1027: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x707ffff; valaddr_reg:x3; val_offset:3081*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3081*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1028: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x70fffff; valaddr_reg:x3; val_offset:3084*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3084*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1029: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x71fffff; valaddr_reg:x3; val_offset:3087*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3087*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1030: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x73fffff; valaddr_reg:x3; val_offset:3090*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3090*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1031: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7400000; valaddr_reg:x3; val_offset:3093*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3093*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1032: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7600000; valaddr_reg:x3; val_offset:3096*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3096*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1033: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7700000; valaddr_reg:x3; val_offset:3099*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3099*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1034: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x7780000; valaddr_reg:x3; val_offset:3102*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3102*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1035: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77c0000; valaddr_reg:x3; val_offset:3105*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3105*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1036: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77e0000; valaddr_reg:x3; val_offset:3108*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3108*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1037: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77f0000; valaddr_reg:x3; val_offset:3111*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3111*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1038: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77f8000; valaddr_reg:x3; val_offset:3114*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3114*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1039: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77fc000; valaddr_reg:x3; val_offset:3117*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3117*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1040: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77fe000; valaddr_reg:x3; val_offset:3120*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3120*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1041: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77ff000; valaddr_reg:x3; val_offset:3123*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3123*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1042: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77ff800; valaddr_reg:x3; val_offset:3126*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3126*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1043: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77ffc00; valaddr_reg:x3; val_offset:3129*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3129*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1044: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77ffe00; valaddr_reg:x3; val_offset:3132*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3132*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1045: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77fff00; valaddr_reg:x3; val_offset:3135*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3135*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1046: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77fff80; valaddr_reg:x3; val_offset:3138*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3138*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1047: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77fffc0; valaddr_reg:x3; val_offset:3141*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3141*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1048: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77fffe0; valaddr_reg:x3; val_offset:3144*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3144*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1049: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77ffff0; valaddr_reg:x3; val_offset:3147*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3147*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1050: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77ffff8; valaddr_reg:x3; val_offset:3150*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3150*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1051: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77ffffc; valaddr_reg:x3; val_offset:3153*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3153*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1052: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77ffffe; valaddr_reg:x3; val_offset:3156*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3156*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1053: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4777c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cc777c1; op2val:0x0; +op3val:0x77fffff; valaddr_reg:x3; val_offset:3159*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3159*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1054: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5800000; valaddr_reg:x3; val_offset:3162*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3162*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1055: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5800001; valaddr_reg:x3; val_offset:3165*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3165*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1056: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5800003; valaddr_reg:x3; val_offset:3168*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3168*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1057: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5800007; valaddr_reg:x3; val_offset:3171*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3171*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1058: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x580000f; valaddr_reg:x3; val_offset:3174*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3174*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1059: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x580001f; valaddr_reg:x3; val_offset:3177*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3177*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1060: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x580003f; valaddr_reg:x3; val_offset:3180*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3180*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1061: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x580007f; valaddr_reg:x3; val_offset:3183*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3183*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1062: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x58000ff; valaddr_reg:x3; val_offset:3186*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3186*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1063: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x58001ff; valaddr_reg:x3; val_offset:3189*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3189*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1064: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x58003ff; valaddr_reg:x3; val_offset:3192*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3192*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1065: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x58007ff; valaddr_reg:x3; val_offset:3195*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3195*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1066: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5800fff; valaddr_reg:x3; val_offset:3198*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3198*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1067: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5801fff; valaddr_reg:x3; val_offset:3201*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3201*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1068: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5803fff; valaddr_reg:x3; val_offset:3204*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3204*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1069: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5807fff; valaddr_reg:x3; val_offset:3207*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3207*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1070: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x580ffff; valaddr_reg:x3; val_offset:3210*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3210*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1071: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x581ffff; valaddr_reg:x3; val_offset:3213*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3213*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1072: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x583ffff; valaddr_reg:x3; val_offset:3216*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3216*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1073: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x587ffff; valaddr_reg:x3; val_offset:3219*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3219*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1074: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x58fffff; valaddr_reg:x3; val_offset:3222*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3222*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1075: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x59fffff; valaddr_reg:x3; val_offset:3225*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3225*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1076: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5bfffff; valaddr_reg:x3; val_offset:3228*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3228*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1077: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5c00000; valaddr_reg:x3; val_offset:3231*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3231*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1078: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5e00000; valaddr_reg:x3; val_offset:3234*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3234*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1079: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5f00000; valaddr_reg:x3; val_offset:3237*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3237*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1080: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5f80000; valaddr_reg:x3; val_offset:3240*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3240*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1081: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fc0000; valaddr_reg:x3; val_offset:3243*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3243*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1082: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fe0000; valaddr_reg:x3; val_offset:3246*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3246*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1083: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ff0000; valaddr_reg:x3; val_offset:3249*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3249*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1084: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ff8000; valaddr_reg:x3; val_offset:3252*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3252*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1085: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ffc000; valaddr_reg:x3; val_offset:3255*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3255*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1086: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ffe000; valaddr_reg:x3; val_offset:3258*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3258*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1087: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fff000; valaddr_reg:x3; val_offset:3261*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3261*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1088: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fff800; valaddr_reg:x3; val_offset:3264*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3264*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1089: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fffc00; valaddr_reg:x3; val_offset:3267*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3267*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1090: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fffe00; valaddr_reg:x3; val_offset:3270*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3270*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1091: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ffff00; valaddr_reg:x3; val_offset:3273*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3273*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1092: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ffff80; valaddr_reg:x3; val_offset:3276*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3276*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1093: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ffffc0; valaddr_reg:x3; val_offset:3279*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3279*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1094: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ffffe0; valaddr_reg:x3; val_offset:3282*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3282*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1095: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fffff0; valaddr_reg:x3; val_offset:3285*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3285*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1096: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fffff8; valaddr_reg:x3; val_offset:3288*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3288*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1097: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fffffc; valaddr_reg:x3; val_offset:3291*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3291*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1098: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5fffffe; valaddr_reg:x3; val_offset:3294*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3294*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1099: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x5ffffff; valaddr_reg:x3; val_offset:3297*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3297*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1100: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3f800001; valaddr_reg:x3; val_offset:3300*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3300*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1101: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3f800003; valaddr_reg:x3; val_offset:3303*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3303*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1102: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3f800007; valaddr_reg:x3; val_offset:3306*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3306*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1103: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3f999999; valaddr_reg:x3; val_offset:3309*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3309*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1104: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:3312*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3312*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1105: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:3315*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3315*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1106: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:3318*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3318*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1107: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:3321*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3321*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1108: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:3324*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3324*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1109: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:3327*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3327*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1110: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:3330*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3330*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1111: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:3333*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3333*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1112: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:3336*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3336*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1113: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:3339*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3339*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1114: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:3342*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3342*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1115: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4a951f and fs2 == 0 and fe2 == 0x04 and fm2 == 0x21c05a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cca951f; op2val:0x221c05a; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:3345*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3345*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1116: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:3348*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3348*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1117: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:3351*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3351*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1118: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:3354*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3354*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1119: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:3357*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3357*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1120: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:3360*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3360*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1121: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:3363*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3363*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1122: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:3366*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3366*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1123: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:3369*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3369*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1124: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:3372*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3372*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1125: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:3375*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3375*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1126: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:3378*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3378*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1127: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:3381*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3381*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1128: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:3384*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3384*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1129: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:3387*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3387*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1130: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:3390*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3390*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1131: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:3393*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3393*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1132: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80800000; valaddr_reg:x3; val_offset:3396*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3396*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1133: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:3399*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3399*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1134: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:3402*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3402*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1135: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:3405*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3405*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1136: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8080000f; valaddr_reg:x3; val_offset:3408*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3408*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1137: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8080001f; valaddr_reg:x3; val_offset:3411*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3411*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1138: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8080003f; valaddr_reg:x3; val_offset:3414*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3414*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1139: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8080007f; valaddr_reg:x3; val_offset:3417*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3417*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1140: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x808000ff; valaddr_reg:x3; val_offset:3420*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3420*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1141: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x808001ff; valaddr_reg:x3; val_offset:3423*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3423*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1142: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x808003ff; valaddr_reg:x3; val_offset:3426*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3426*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1143: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x808007ff; valaddr_reg:x3; val_offset:3429*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3429*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1144: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80800fff; valaddr_reg:x3; val_offset:3432*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3432*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1145: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80801fff; valaddr_reg:x3; val_offset:3435*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3435*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1146: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80803fff; valaddr_reg:x3; val_offset:3438*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3438*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1147: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80807fff; valaddr_reg:x3; val_offset:3441*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3441*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1148: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8080ffff; valaddr_reg:x3; val_offset:3444*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3444*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1149: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8081ffff; valaddr_reg:x3; val_offset:3447*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3447*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1150: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8083ffff; valaddr_reg:x3; val_offset:3450*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3450*0 + 3*8*FLEN/8, x4, x1, x2) + +inst_1151: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x8087ffff; valaddr_reg:x3; val_offset:3453*0 + 3*8*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3453*0 + 3*8*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117506047,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117571583,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117702655,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117964799,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(118489087,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(119537663,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(121634815,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(121634816,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(123731968,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(124780544,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125304832,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125566976,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125698048,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125763584,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125796352,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125812736,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125820928,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125825024,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125827072,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828096,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828608,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828864,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828992,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829056,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829088,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829104,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829112,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829116,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829118,32,FLEN) +NAN_BOXED(2093447105,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829119,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274688,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274689,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274691,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274695,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274703,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274719,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274751,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274815,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92274943,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92275199,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92275711,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92276735,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92278783,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92282879,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92291071,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92307455,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92340223,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92405759,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92536831,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(92798975,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(93323263,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(94371839,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(96468991,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(96468992,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(98566144,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(99614720,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100139008,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100401152,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100532224,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100597760,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100630528,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100646912,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100655104,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100659200,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100661248,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100662272,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100662784,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663040,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663168,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663232,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663264,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663280,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663288,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663292,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663294,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(100663295,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2093651231,32,FLEN) +NAN_BOXED(35766362,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872256,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872271,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872287,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872319,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872383,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872511,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872767,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155873279,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155874303,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155876351,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155880447,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155888639,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155905023,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155937791,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156003327,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156134399,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156396543,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-10.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-10.S new file mode 100644 index 000000000..7a66545e3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-10.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_1152: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x808fffff; valaddr_reg:x3; val_offset:3456*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3456*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1153: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x809fffff; valaddr_reg:x3; val_offset:3459*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3459*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1154: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80bfffff; valaddr_reg:x3; val_offset:3462*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3462*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1155: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80c00000; valaddr_reg:x3; val_offset:3465*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3465*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1156: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80e00000; valaddr_reg:x3; val_offset:3468*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3468*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1157: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80f00000; valaddr_reg:x3; val_offset:3471*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3471*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1158: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80f80000; valaddr_reg:x3; val_offset:3474*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3474*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1159: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fc0000; valaddr_reg:x3; val_offset:3477*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3477*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1160: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fe0000; valaddr_reg:x3; val_offset:3480*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3480*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1161: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ff0000; valaddr_reg:x3; val_offset:3483*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3483*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1162: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ff8000; valaddr_reg:x3; val_offset:3486*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3486*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1163: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ffc000; valaddr_reg:x3; val_offset:3489*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3489*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1164: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ffe000; valaddr_reg:x3; val_offset:3492*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3492*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1165: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fff000; valaddr_reg:x3; val_offset:3495*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3495*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1166: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fff800; valaddr_reg:x3; val_offset:3498*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3498*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1167: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fffc00; valaddr_reg:x3; val_offset:3501*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3501*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1168: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fffe00; valaddr_reg:x3; val_offset:3504*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3504*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1169: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ffff00; valaddr_reg:x3; val_offset:3507*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3507*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1170: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ffff80; valaddr_reg:x3; val_offset:3510*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3510*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1171: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ffffc0; valaddr_reg:x3; val_offset:3513*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3513*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1172: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ffffe0; valaddr_reg:x3; val_offset:3516*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3516*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1173: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fffff0; valaddr_reg:x3; val_offset:3519*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3519*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1174: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:3522*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3522*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1175: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:3525*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3525*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1176: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:3528*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3528*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1177: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x4e8c90 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cce8c90; op2val:0x80000000; +op3val:0x80ffffff; valaddr_reg:x3; val_offset:3531*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3531*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1178: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9000000; valaddr_reg:x3; val_offset:3534*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3534*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1179: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9000001; valaddr_reg:x3; val_offset:3537*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3537*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1180: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9000003; valaddr_reg:x3; val_offset:3540*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3540*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1181: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9000007; valaddr_reg:x3; val_offset:3543*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3543*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1182: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf900000f; valaddr_reg:x3; val_offset:3546*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3546*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1183: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf900001f; valaddr_reg:x3; val_offset:3549*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3549*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1184: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf900003f; valaddr_reg:x3; val_offset:3552*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3552*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1185: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf900007f; valaddr_reg:x3; val_offset:3555*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3555*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1186: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf90000ff; valaddr_reg:x3; val_offset:3558*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3558*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1187: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf90001ff; valaddr_reg:x3; val_offset:3561*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3561*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1188: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf90003ff; valaddr_reg:x3; val_offset:3564*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3564*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1189: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf90007ff; valaddr_reg:x3; val_offset:3567*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3567*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1190: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9000fff; valaddr_reg:x3; val_offset:3570*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3570*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1191: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9001fff; valaddr_reg:x3; val_offset:3573*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3573*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1192: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9003fff; valaddr_reg:x3; val_offset:3576*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3576*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1193: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9007fff; valaddr_reg:x3; val_offset:3579*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3579*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1194: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf900ffff; valaddr_reg:x3; val_offset:3582*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3582*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1195: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf901ffff; valaddr_reg:x3; val_offset:3585*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3585*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1196: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf903ffff; valaddr_reg:x3; val_offset:3588*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3588*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1197: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf907ffff; valaddr_reg:x3; val_offset:3591*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3591*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1198: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf90fffff; valaddr_reg:x3; val_offset:3594*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3594*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1199: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf91fffff; valaddr_reg:x3; val_offset:3597*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3597*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1200: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf93fffff; valaddr_reg:x3; val_offset:3600*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3600*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1201: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9400000; valaddr_reg:x3; val_offset:3603*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3603*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1202: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9600000; valaddr_reg:x3; val_offset:3606*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3606*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1203: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9700000; valaddr_reg:x3; val_offset:3609*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3609*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1204: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf9780000; valaddr_reg:x3; val_offset:3612*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3612*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1205: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97c0000; valaddr_reg:x3; val_offset:3615*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3615*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1206: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97e0000; valaddr_reg:x3; val_offset:3618*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3618*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1207: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97f0000; valaddr_reg:x3; val_offset:3621*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3621*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1208: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97f8000; valaddr_reg:x3; val_offset:3624*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3624*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1209: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97fc000; valaddr_reg:x3; val_offset:3627*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3627*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1210: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97fe000; valaddr_reg:x3; val_offset:3630*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3630*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1211: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97ff000; valaddr_reg:x3; val_offset:3633*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3633*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1212: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97ff800; valaddr_reg:x3; val_offset:3636*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3636*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1213: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97ffc00; valaddr_reg:x3; val_offset:3639*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3639*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1214: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97ffe00; valaddr_reg:x3; val_offset:3642*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3642*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1215: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97fff00; valaddr_reg:x3; val_offset:3645*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3645*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1216: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97fff80; valaddr_reg:x3; val_offset:3648*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3648*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1217: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97fffc0; valaddr_reg:x3; val_offset:3651*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3651*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1218: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97fffe0; valaddr_reg:x3; val_offset:3654*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3654*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1219: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97ffff0; valaddr_reg:x3; val_offset:3657*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3657*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1220: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97ffff8; valaddr_reg:x3; val_offset:3660*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3660*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1221: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97ffffc; valaddr_reg:x3; val_offset:3663*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3663*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1222: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97ffffe; valaddr_reg:x3; val_offset:3666*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3666*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1223: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xf2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xf97fffff; valaddr_reg:x3; val_offset:3669*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3669*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1224: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff000001; valaddr_reg:x3; val_offset:3672*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3672*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1225: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff000003; valaddr_reg:x3; val_offset:3675*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3675*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1226: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff000007; valaddr_reg:x3; val_offset:3678*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3678*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1227: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff199999; valaddr_reg:x3; val_offset:3681*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3681*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1228: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff249249; valaddr_reg:x3; val_offset:3684*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3684*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1229: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff333333; valaddr_reg:x3; val_offset:3687*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3687*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1230: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:3690*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3690*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1231: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:3693*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3693*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1232: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff444444; valaddr_reg:x3; val_offset:3696*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3696*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1233: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:3699*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3699*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1234: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:3702*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3702*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1235: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff666666; valaddr_reg:x3; val_offset:3705*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3705*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1236: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:3708*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3708*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1237: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:3711*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3711*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1238: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:3714*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3714*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1239: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59cf8b and fs2 == 1 and fe2 == 0x84 and fm2 == 0x16714a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9cf8b; op2val:0xc216714a; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:3717*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3717*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1240: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:3720*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3720*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1241: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:3723*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3723*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1242: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:3726*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3726*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1243: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:3729*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3729*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1244: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:3732*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3732*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1245: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:3735*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3735*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1246: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:3738*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3738*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1247: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:3741*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3741*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1248: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:3744*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3744*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1249: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:3747*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3747*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1250: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:3750*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3750*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1251: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:3753*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3753*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1252: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:3756*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3756*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1253: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:3759*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3759*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1254: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:3762*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3762*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1255: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:3765*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3765*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1256: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6800000; valaddr_reg:x3; val_offset:3768*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3768*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1257: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6800001; valaddr_reg:x3; val_offset:3771*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3771*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1258: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6800003; valaddr_reg:x3; val_offset:3774*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3774*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1259: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6800007; valaddr_reg:x3; val_offset:3777*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3777*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1260: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x680000f; valaddr_reg:x3; val_offset:3780*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3780*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1261: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x680001f; valaddr_reg:x3; val_offset:3783*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3783*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1262: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x680003f; valaddr_reg:x3; val_offset:3786*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3786*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1263: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x680007f; valaddr_reg:x3; val_offset:3789*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3789*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1264: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x68000ff; valaddr_reg:x3; val_offset:3792*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3792*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1265: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x68001ff; valaddr_reg:x3; val_offset:3795*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3795*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1266: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x68003ff; valaddr_reg:x3; val_offset:3798*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3798*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1267: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x68007ff; valaddr_reg:x3; val_offset:3801*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3801*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1268: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6800fff; valaddr_reg:x3; val_offset:3804*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3804*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1269: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6801fff; valaddr_reg:x3; val_offset:3807*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3807*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1270: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6803fff; valaddr_reg:x3; val_offset:3810*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3810*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1271: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6807fff; valaddr_reg:x3; val_offset:3813*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3813*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1272: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x680ffff; valaddr_reg:x3; val_offset:3816*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3816*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1273: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x681ffff; valaddr_reg:x3; val_offset:3819*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3819*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1274: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x683ffff; valaddr_reg:x3; val_offset:3822*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3822*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1275: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x687ffff; valaddr_reg:x3; val_offset:3825*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3825*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1276: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x68fffff; valaddr_reg:x3; val_offset:3828*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3828*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1277: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x69fffff; valaddr_reg:x3; val_offset:3831*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3831*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1278: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6bfffff; valaddr_reg:x3; val_offset:3834*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3834*0 + 3*9*FLEN/8, x4, x1, x2) + +inst_1279: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6c00000; valaddr_reg:x3; val_offset:3837*0 + 3*9*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3837*0 + 3*9*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156920831,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157969407,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160066559,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160066560,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162163712,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163212288,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163736576,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163998720,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164129792,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164195328,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164228096,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164244480,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164252672,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164256768,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164258816,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164259840,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260352,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260608,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260736,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260800,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260832,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260848,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2093911184,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260863,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177526784,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177526785,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177526787,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177526791,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177526799,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177526815,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177526847,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177526911,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177527039,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177527295,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177527807,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177528831,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177530879,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177534975,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177543167,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177559551,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177592319,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177657855,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4177788927,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4178051071,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4178575359,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4179623935,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4181721087,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4181721088,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4183818240,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4184866816,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185391104,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185653248,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185784320,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185849856,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185882624,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185899008,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185907200,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185911296,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185913344,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185914368,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185914880,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915136,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915264,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915328,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915360,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915376,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915384,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915388,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915390,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4185915391,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2094649227,32,FLEN) +NAN_BOXED(3256250698,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051904,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051905,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051907,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051911,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051919,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051935,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051967,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052031,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052159,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052415,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052927,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109053951,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109055999,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109060095,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109068287,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109084671,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109117439,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109182975,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109314047,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109576191,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(110100479,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(111149055,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(113246207,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(113246208,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-100.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-100.S new file mode 100644 index 000000000..075f743ad --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-100.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_12672: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf00000f; valaddr_reg:x3; val_offset:38016*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38016*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12673: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf00001f; valaddr_reg:x3; val_offset:38019*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38019*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12674: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf00003f; valaddr_reg:x3; val_offset:38022*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38022*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12675: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf00007f; valaddr_reg:x3; val_offset:38025*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38025*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12676: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf0000ff; valaddr_reg:x3; val_offset:38028*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38028*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12677: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf0001ff; valaddr_reg:x3; val_offset:38031*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38031*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12678: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf0003ff; valaddr_reg:x3; val_offset:38034*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38034*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12679: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf0007ff; valaddr_reg:x3; val_offset:38037*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38037*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12680: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf000fff; valaddr_reg:x3; val_offset:38040*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38040*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12681: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf001fff; valaddr_reg:x3; val_offset:38043*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38043*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12682: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf003fff; valaddr_reg:x3; val_offset:38046*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38046*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12683: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf007fff; valaddr_reg:x3; val_offset:38049*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38049*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12684: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf00ffff; valaddr_reg:x3; val_offset:38052*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38052*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12685: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf01ffff; valaddr_reg:x3; val_offset:38055*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38055*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12686: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf03ffff; valaddr_reg:x3; val_offset:38058*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38058*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12687: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf07ffff; valaddr_reg:x3; val_offset:38061*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38061*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12688: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf0fffff; valaddr_reg:x3; val_offset:38064*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38064*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12689: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf1fffff; valaddr_reg:x3; val_offset:38067*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38067*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12690: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf3fffff; valaddr_reg:x3; val_offset:38070*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38070*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12691: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf400000; valaddr_reg:x3; val_offset:38073*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38073*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12692: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf600000; valaddr_reg:x3; val_offset:38076*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38076*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12693: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf700000; valaddr_reg:x3; val_offset:38079*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38079*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12694: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf780000; valaddr_reg:x3; val_offset:38082*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38082*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12695: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7c0000; valaddr_reg:x3; val_offset:38085*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38085*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12696: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7e0000; valaddr_reg:x3; val_offset:38088*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38088*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12697: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7f0000; valaddr_reg:x3; val_offset:38091*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38091*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12698: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7f8000; valaddr_reg:x3; val_offset:38094*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38094*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12699: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7fc000; valaddr_reg:x3; val_offset:38097*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38097*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12700: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7fe000; valaddr_reg:x3; val_offset:38100*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38100*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12701: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7ff000; valaddr_reg:x3; val_offset:38103*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38103*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12702: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7ff800; valaddr_reg:x3; val_offset:38106*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38106*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12703: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7ffc00; valaddr_reg:x3; val_offset:38109*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38109*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12704: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7ffe00; valaddr_reg:x3; val_offset:38112*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38112*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12705: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7fff00; valaddr_reg:x3; val_offset:38115*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38115*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12706: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7fff80; valaddr_reg:x3; val_offset:38118*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38118*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12707: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7fffc0; valaddr_reg:x3; val_offset:38121*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38121*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12708: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7fffe0; valaddr_reg:x3; val_offset:38124*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38124*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12709: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7ffff0; valaddr_reg:x3; val_offset:38127*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38127*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12710: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7ffff8; valaddr_reg:x3; val_offset:38130*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38130*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12711: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7ffffc; valaddr_reg:x3; val_offset:38133*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38133*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12712: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7ffffe; valaddr_reg:x3; val_offset:38136*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38136*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12713: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf7fffff; valaddr_reg:x3; val_offset:38139*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38139*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12714: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff000001; valaddr_reg:x3; val_offset:38142*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38142*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12715: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff000003; valaddr_reg:x3; val_offset:38145*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38145*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12716: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff000007; valaddr_reg:x3; val_offset:38148*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38148*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12717: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff199999; valaddr_reg:x3; val_offset:38151*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38151*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12718: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff249249; valaddr_reg:x3; val_offset:38154*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38154*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12719: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff333333; valaddr_reg:x3; val_offset:38157*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38157*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12720: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:38160*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38160*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12721: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:38163*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38163*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12722: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff444444; valaddr_reg:x3; val_offset:38166*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38166*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12723: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:38169*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38169*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12724: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:38172*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38172*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12725: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff666666; valaddr_reg:x3; val_offset:38175*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38175*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12726: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:38178*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38178*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12727: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:38181*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38181*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12728: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:38184*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38184*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12729: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:38187*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38187*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12730: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:38190*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38190*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12731: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:38193*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38193*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12732: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:38196*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38196*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12733: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:38199*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38199*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12734: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:38202*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38202*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12735: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:38205*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38205*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12736: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:38208*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38208*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12737: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:38211*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38211*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12738: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:38214*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38214*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12739: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:38217*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38217*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12740: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:38220*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38220*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12741: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:38223*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38223*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12742: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:38226*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38226*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12743: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:38229*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38229*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12744: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:38232*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38232*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12745: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:38235*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38235*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12746: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1000000; valaddr_reg:x3; val_offset:38238*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38238*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12747: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1000001; valaddr_reg:x3; val_offset:38241*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38241*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12748: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1000003; valaddr_reg:x3; val_offset:38244*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38244*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12749: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1000007; valaddr_reg:x3; val_offset:38247*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38247*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12750: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x100000f; valaddr_reg:x3; val_offset:38250*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38250*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12751: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x100001f; valaddr_reg:x3; val_offset:38253*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38253*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12752: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x100003f; valaddr_reg:x3; val_offset:38256*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38256*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12753: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x100007f; valaddr_reg:x3; val_offset:38259*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38259*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12754: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x10000ff; valaddr_reg:x3; val_offset:38262*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38262*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12755: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x10001ff; valaddr_reg:x3; val_offset:38265*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38265*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12756: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x10003ff; valaddr_reg:x3; val_offset:38268*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38268*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12757: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x10007ff; valaddr_reg:x3; val_offset:38271*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38271*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12758: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1000fff; valaddr_reg:x3; val_offset:38274*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38274*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12759: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1001fff; valaddr_reg:x3; val_offset:38277*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38277*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12760: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1003fff; valaddr_reg:x3; val_offset:38280*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38280*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12761: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1007fff; valaddr_reg:x3; val_offset:38283*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38283*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12762: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x100ffff; valaddr_reg:x3; val_offset:38286*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38286*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12763: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x101ffff; valaddr_reg:x3; val_offset:38289*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38289*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12764: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x103ffff; valaddr_reg:x3; val_offset:38292*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38292*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12765: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x107ffff; valaddr_reg:x3; val_offset:38295*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38295*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12766: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x10fffff; valaddr_reg:x3; val_offset:38298*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38298*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12767: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x11fffff; valaddr_reg:x3; val_offset:38301*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38301*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12768: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x13fffff; valaddr_reg:x3; val_offset:38304*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38304*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12769: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1400000; valaddr_reg:x3; val_offset:38307*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38307*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12770: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1600000; valaddr_reg:x3; val_offset:38310*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38310*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12771: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1700000; valaddr_reg:x3; val_offset:38313*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38313*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12772: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x1780000; valaddr_reg:x3; val_offset:38316*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38316*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12773: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17c0000; valaddr_reg:x3; val_offset:38319*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38319*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12774: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17e0000; valaddr_reg:x3; val_offset:38322*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38322*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12775: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17f0000; valaddr_reg:x3; val_offset:38325*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38325*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12776: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17f8000; valaddr_reg:x3; val_offset:38328*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38328*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12777: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17fc000; valaddr_reg:x3; val_offset:38331*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38331*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12778: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17fe000; valaddr_reg:x3; val_offset:38334*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38334*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12779: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17ff000; valaddr_reg:x3; val_offset:38337*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38337*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12780: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17ff800; valaddr_reg:x3; val_offset:38340*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38340*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12781: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17ffc00; valaddr_reg:x3; val_offset:38343*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38343*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12782: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17ffe00; valaddr_reg:x3; val_offset:38346*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38346*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12783: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17fff00; valaddr_reg:x3; val_offset:38349*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38349*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12784: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17fff80; valaddr_reg:x3; val_offset:38352*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38352*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12785: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17fffc0; valaddr_reg:x3; val_offset:38355*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38355*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12786: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17fffe0; valaddr_reg:x3; val_offset:38358*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38358*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12787: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17ffff0; valaddr_reg:x3; val_offset:38361*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38361*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12788: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17ffff8; valaddr_reg:x3; val_offset:38364*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38364*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12789: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17ffffc; valaddr_reg:x3; val_offset:38367*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38367*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12790: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17ffffe; valaddr_reg:x3; val_offset:38370*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38370*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12791: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x77a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e77a646; op2val:0x0; +op3val:0x17fffff; valaddr_reg:x3; val_offset:38373*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38373*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12792: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a800000; valaddr_reg:x3; val_offset:38376*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38376*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12793: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a800001; valaddr_reg:x3; val_offset:38379*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38379*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12794: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a800003; valaddr_reg:x3; val_offset:38382*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38382*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12795: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a800007; valaddr_reg:x3; val_offset:38385*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38385*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12796: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a80000f; valaddr_reg:x3; val_offset:38388*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38388*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12797: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a80001f; valaddr_reg:x3; val_offset:38391*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38391*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12798: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a80003f; valaddr_reg:x3; val_offset:38394*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38394*0 + 3*99*FLEN/8, x4, x1, x2) + +inst_12799: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a80007f; valaddr_reg:x3; val_offset:38397*0 + 3*99*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38397*0 + 3*99*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319183,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319199,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319231,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319295,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319423,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319679,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741320191,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741321215,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741323263,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741327359,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741335551,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741351935,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741384703,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741450239,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741581311,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741843455,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3742367743,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3743416319,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3745513471,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3745513472,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3747610624,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3748659200,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749183488,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749445632,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749576704,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749642240,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749675008,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749691392,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749699584,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749703680,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749705728,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749706752,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707264,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707520,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707648,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707712,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707744,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707760,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707768,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707772,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707774,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3749707775,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777216,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777217,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777219,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777223,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777231,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777247,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777279,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777343,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777471,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777727,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16778239,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16779263,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16781311,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16785407,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16793599,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16809983,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16842751,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16908287,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17039359,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17301503,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17825791,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(18874367,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(20971519,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(20971520,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(23068672,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24117248,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24641536,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24903680,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25034752,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25100288,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25133056,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25149440,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25157632,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25161728,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25163776,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25164800,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165312,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165568,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165696,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165760,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165792,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165808,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165816,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165820,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165822,32,FLEN) +NAN_BOXED(2121770566,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165823,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031680,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031681,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031683,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031687,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031695,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031711,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031743,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031807,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-101.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-101.S new file mode 100644 index 000000000..9be9ea3ff --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-101.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_12800: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a8000ff; valaddr_reg:x3; val_offset:38400*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38400*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12801: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a8001ff; valaddr_reg:x3; val_offset:38403*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38403*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12802: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a8003ff; valaddr_reg:x3; val_offset:38406*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38406*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12803: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a8007ff; valaddr_reg:x3; val_offset:38409*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38409*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12804: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a800fff; valaddr_reg:x3; val_offset:38412*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38412*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12805: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a801fff; valaddr_reg:x3; val_offset:38415*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38415*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12806: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a803fff; valaddr_reg:x3; val_offset:38418*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38418*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12807: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a807fff; valaddr_reg:x3; val_offset:38421*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38421*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12808: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a80ffff; valaddr_reg:x3; val_offset:38424*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38424*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12809: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a81ffff; valaddr_reg:x3; val_offset:38427*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38427*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12810: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a83ffff; valaddr_reg:x3; val_offset:38430*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38430*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12811: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a87ffff; valaddr_reg:x3; val_offset:38433*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38433*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12812: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a8fffff; valaddr_reg:x3; val_offset:38436*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38436*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12813: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2a9fffff; valaddr_reg:x3; val_offset:38439*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38439*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12814: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2abfffff; valaddr_reg:x3; val_offset:38442*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38442*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12815: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2ac00000; valaddr_reg:x3; val_offset:38445*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38445*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12816: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2ae00000; valaddr_reg:x3; val_offset:38448*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38448*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12817: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2af00000; valaddr_reg:x3; val_offset:38451*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38451*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12818: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2af80000; valaddr_reg:x3; val_offset:38454*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38454*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12819: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afc0000; valaddr_reg:x3; val_offset:38457*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38457*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12820: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afe0000; valaddr_reg:x3; val_offset:38460*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38460*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12821: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2aff0000; valaddr_reg:x3; val_offset:38463*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38463*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12822: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2aff8000; valaddr_reg:x3; val_offset:38466*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38466*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12823: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2affc000; valaddr_reg:x3; val_offset:38469*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38469*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12824: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2affe000; valaddr_reg:x3; val_offset:38472*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38472*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12825: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afff000; valaddr_reg:x3; val_offset:38475*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38475*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12826: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afff800; valaddr_reg:x3; val_offset:38478*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38478*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12827: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afffc00; valaddr_reg:x3; val_offset:38481*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38481*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12828: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afffe00; valaddr_reg:x3; val_offset:38484*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38484*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12829: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2affff00; valaddr_reg:x3; val_offset:38487*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38487*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12830: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2affff80; valaddr_reg:x3; val_offset:38490*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38490*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12831: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2affffc0; valaddr_reg:x3; val_offset:38493*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38493*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12832: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2affffe0; valaddr_reg:x3; val_offset:38496*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38496*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12833: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afffff0; valaddr_reg:x3; val_offset:38499*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38499*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12834: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afffff8; valaddr_reg:x3; val_offset:38502*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38502*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12835: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afffffc; valaddr_reg:x3; val_offset:38505*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38505*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12836: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2afffffe; valaddr_reg:x3; val_offset:38508*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38508*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12837: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x55 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x2affffff; valaddr_reg:x3; val_offset:38511*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38511*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12838: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3f800001; valaddr_reg:x3; val_offset:38514*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38514*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12839: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3f800003; valaddr_reg:x3; val_offset:38517*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38517*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12840: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3f800007; valaddr_reg:x3; val_offset:38520*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38520*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12841: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3f999999; valaddr_reg:x3; val_offset:38523*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38523*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12842: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:38526*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38526*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12843: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:38529*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38529*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12844: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:38532*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38532*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12845: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:38535*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38535*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12846: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:38538*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38538*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12847: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:38541*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38541*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12848: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:38544*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38544*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12849: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:38547*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38547*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12850: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:38550*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38550*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12851: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:38553*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38553*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12852: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:38556*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38556*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12853: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7914db and fs2 == 0 and fe2 == 0x01 and fm2 == 0x038e2b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7914db; op2val:0x838e2b; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:38559*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38559*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12854: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60800000; valaddr_reg:x3; val_offset:38562*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38562*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12855: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60800001; valaddr_reg:x3; val_offset:38565*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38565*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12856: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60800003; valaddr_reg:x3; val_offset:38568*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38568*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12857: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60800007; valaddr_reg:x3; val_offset:38571*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38571*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12858: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x6080000f; valaddr_reg:x3; val_offset:38574*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38574*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12859: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x6080001f; valaddr_reg:x3; val_offset:38577*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38577*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12860: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x6080003f; valaddr_reg:x3; val_offset:38580*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38580*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12861: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x6080007f; valaddr_reg:x3; val_offset:38583*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38583*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12862: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x608000ff; valaddr_reg:x3; val_offset:38586*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38586*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12863: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x608001ff; valaddr_reg:x3; val_offset:38589*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38589*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12864: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x608003ff; valaddr_reg:x3; val_offset:38592*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38592*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12865: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x608007ff; valaddr_reg:x3; val_offset:38595*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38595*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12866: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60800fff; valaddr_reg:x3; val_offset:38598*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38598*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12867: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60801fff; valaddr_reg:x3; val_offset:38601*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38601*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12868: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60803fff; valaddr_reg:x3; val_offset:38604*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38604*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12869: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60807fff; valaddr_reg:x3; val_offset:38607*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38607*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12870: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x6080ffff; valaddr_reg:x3; val_offset:38610*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38610*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12871: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x6081ffff; valaddr_reg:x3; val_offset:38613*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38613*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12872: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x6083ffff; valaddr_reg:x3; val_offset:38616*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38616*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12873: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x6087ffff; valaddr_reg:x3; val_offset:38619*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38619*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12874: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x608fffff; valaddr_reg:x3; val_offset:38622*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38622*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12875: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x609fffff; valaddr_reg:x3; val_offset:38625*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38625*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12876: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60bfffff; valaddr_reg:x3; val_offset:38628*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38628*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12877: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60c00000; valaddr_reg:x3; val_offset:38631*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38631*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12878: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60e00000; valaddr_reg:x3; val_offset:38634*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38634*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12879: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60f00000; valaddr_reg:x3; val_offset:38637*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38637*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12880: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60f80000; valaddr_reg:x3; val_offset:38640*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38640*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12881: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fc0000; valaddr_reg:x3; val_offset:38643*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38643*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12882: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fe0000; valaddr_reg:x3; val_offset:38646*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38646*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12883: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ff0000; valaddr_reg:x3; val_offset:38649*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38649*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12884: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ff8000; valaddr_reg:x3; val_offset:38652*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38652*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12885: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ffc000; valaddr_reg:x3; val_offset:38655*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38655*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12886: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ffe000; valaddr_reg:x3; val_offset:38658*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38658*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12887: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fff000; valaddr_reg:x3; val_offset:38661*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38661*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12888: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fff800; valaddr_reg:x3; val_offset:38664*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38664*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12889: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fffc00; valaddr_reg:x3; val_offset:38667*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38667*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12890: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fffe00; valaddr_reg:x3; val_offset:38670*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38670*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12891: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ffff00; valaddr_reg:x3; val_offset:38673*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38673*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12892: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ffff80; valaddr_reg:x3; val_offset:38676*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38676*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12893: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ffffc0; valaddr_reg:x3; val_offset:38679*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38679*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12894: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ffffe0; valaddr_reg:x3; val_offset:38682*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38682*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12895: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fffff0; valaddr_reg:x3; val_offset:38685*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38685*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12896: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fffff8; valaddr_reg:x3; val_offset:38688*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38688*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12897: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fffffc; valaddr_reg:x3; val_offset:38691*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38691*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12898: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60fffffe; valaddr_reg:x3; val_offset:38694*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38694*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12899: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xc1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x60ffffff; valaddr_reg:x3; val_offset:38697*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38697*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12900: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f000001; valaddr_reg:x3; val_offset:38700*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38700*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12901: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f000003; valaddr_reg:x3; val_offset:38703*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38703*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12902: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f000007; valaddr_reg:x3; val_offset:38706*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38706*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12903: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f199999; valaddr_reg:x3; val_offset:38709*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38709*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12904: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f249249; valaddr_reg:x3; val_offset:38712*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38712*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12905: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f333333; valaddr_reg:x3; val_offset:38715*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38715*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12906: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:38718*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38718*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12907: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:38721*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38721*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12908: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f444444; valaddr_reg:x3; val_offset:38724*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38724*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12909: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:38727*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38727*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12910: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:38730*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38730*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12911: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f666666; valaddr_reg:x3; val_offset:38733*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38733*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12912: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:38736*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38736*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12913: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:38739*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38739*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12914: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:38742*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38742*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12915: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79371f and fs2 == 0 and fe2 == 0x81 and fm2 == 0x037c14 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79371f; op2val:0x40837c14; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:38745*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38745*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12916: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:38748*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38748*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12917: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:38751*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38751*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12918: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:38754*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38754*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12919: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:38757*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38757*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12920: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:38760*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38760*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12921: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:38763*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38763*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12922: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:38766*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38766*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12923: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:38769*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38769*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12924: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:38772*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38772*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12925: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:38775*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38775*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12926: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:38778*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38778*0 + 3*100*FLEN/8, x4, x1, x2) + +inst_12927: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:38781*0 + 3*100*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38781*0 + 3*100*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713031935,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713032191,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713032703,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713033727,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713035775,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713039871,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713048063,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713064447,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713097215,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713162751,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713293823,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(713555967,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(714080255,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(715128831,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(717225983,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(717225984,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(719323136,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(720371712,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(720896000,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721158144,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721289216,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721354752,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721387520,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721403904,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721412096,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721416192,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721418240,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721419264,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721419776,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420032,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420160,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420224,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420256,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420272,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420280,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420284,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420286,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(721420287,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2121864411,32,FLEN) +NAN_BOXED(8621611,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001344,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001345,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001347,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001351,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001359,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001375,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001407,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001471,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001599,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619001855,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619002367,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619003391,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619005439,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619009535,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619017727,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619034111,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619066879,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619132415,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619263487,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1619525631,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1620049919,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1621098495,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1623195647,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1623195648,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1625292800,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1626341376,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1626865664,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627127808,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627258880,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627324416,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627357184,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627373568,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627381760,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627385856,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627387904,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627388928,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389440,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389696,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389824,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389888,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389920,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389936,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389944,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389948,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389950,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(1627389951,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2121873183,32,FLEN) +NAN_BOXED(1082358804,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-102.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-102.S new file mode 100644 index 000000000..b22b0b373 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-102.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_12928: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:38784*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38784*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12929: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:38787*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38787*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12930: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:38790*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38790*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12931: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:38793*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38793*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12932: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83000000; valaddr_reg:x3; val_offset:38796*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38796*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12933: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83000001; valaddr_reg:x3; val_offset:38799*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38799*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12934: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83000003; valaddr_reg:x3; val_offset:38802*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38802*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12935: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83000007; valaddr_reg:x3; val_offset:38805*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38805*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12936: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8300000f; valaddr_reg:x3; val_offset:38808*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38808*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12937: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8300001f; valaddr_reg:x3; val_offset:38811*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38811*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12938: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8300003f; valaddr_reg:x3; val_offset:38814*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38814*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12939: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8300007f; valaddr_reg:x3; val_offset:38817*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38817*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12940: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x830000ff; valaddr_reg:x3; val_offset:38820*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38820*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12941: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x830001ff; valaddr_reg:x3; val_offset:38823*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38823*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12942: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x830003ff; valaddr_reg:x3; val_offset:38826*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38826*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12943: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x830007ff; valaddr_reg:x3; val_offset:38829*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38829*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12944: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83000fff; valaddr_reg:x3; val_offset:38832*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38832*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12945: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83001fff; valaddr_reg:x3; val_offset:38835*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38835*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12946: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83003fff; valaddr_reg:x3; val_offset:38838*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38838*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12947: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83007fff; valaddr_reg:x3; val_offset:38841*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38841*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12948: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8300ffff; valaddr_reg:x3; val_offset:38844*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38844*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12949: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8301ffff; valaddr_reg:x3; val_offset:38847*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38847*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12950: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8303ffff; valaddr_reg:x3; val_offset:38850*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38850*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12951: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x8307ffff; valaddr_reg:x3; val_offset:38853*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38853*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12952: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x830fffff; valaddr_reg:x3; val_offset:38856*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38856*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12953: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x831fffff; valaddr_reg:x3; val_offset:38859*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38859*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12954: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x833fffff; valaddr_reg:x3; val_offset:38862*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38862*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12955: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83400000; valaddr_reg:x3; val_offset:38865*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38865*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12956: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83600000; valaddr_reg:x3; val_offset:38868*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38868*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12957: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83700000; valaddr_reg:x3; val_offset:38871*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38871*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12958: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x83780000; valaddr_reg:x3; val_offset:38874*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38874*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12959: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837c0000; valaddr_reg:x3; val_offset:38877*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38877*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12960: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837e0000; valaddr_reg:x3; val_offset:38880*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38880*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12961: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837f0000; valaddr_reg:x3; val_offset:38883*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38883*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12962: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837f8000; valaddr_reg:x3; val_offset:38886*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38886*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12963: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837fc000; valaddr_reg:x3; val_offset:38889*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38889*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12964: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837fe000; valaddr_reg:x3; val_offset:38892*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38892*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12965: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837ff000; valaddr_reg:x3; val_offset:38895*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38895*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12966: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837ff800; valaddr_reg:x3; val_offset:38898*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38898*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12967: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837ffc00; valaddr_reg:x3; val_offset:38901*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38901*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12968: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837ffe00; valaddr_reg:x3; val_offset:38904*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38904*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12969: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837fff00; valaddr_reg:x3; val_offset:38907*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38907*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12970: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837fff80; valaddr_reg:x3; val_offset:38910*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38910*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12971: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837fffc0; valaddr_reg:x3; val_offset:38913*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38913*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12972: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837fffe0; valaddr_reg:x3; val_offset:38916*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38916*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12973: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837ffff0; valaddr_reg:x3; val_offset:38919*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38919*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12974: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837ffff8; valaddr_reg:x3; val_offset:38922*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38922*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12975: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837ffffc; valaddr_reg:x3; val_offset:38925*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38925*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12976: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837ffffe; valaddr_reg:x3; val_offset:38928*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38928*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12977: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x79c1c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e79c1c6; op2val:0x80000000; +op3val:0x837fffff; valaddr_reg:x3; val_offset:38931*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38931*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12978: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf800000; valaddr_reg:x3; val_offset:38934*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38934*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12979: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf800001; valaddr_reg:x3; val_offset:38937*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38937*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12980: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf800003; valaddr_reg:x3; val_offset:38940*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38940*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12981: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf800007; valaddr_reg:x3; val_offset:38943*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38943*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12982: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf80000f; valaddr_reg:x3; val_offset:38946*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38946*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12983: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf80001f; valaddr_reg:x3; val_offset:38949*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38949*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12984: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf80003f; valaddr_reg:x3; val_offset:38952*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38952*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12985: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf80007f; valaddr_reg:x3; val_offset:38955*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38955*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12986: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf8000ff; valaddr_reg:x3; val_offset:38958*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38958*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12987: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf8001ff; valaddr_reg:x3; val_offset:38961*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38961*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12988: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf8003ff; valaddr_reg:x3; val_offset:38964*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38964*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12989: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf8007ff; valaddr_reg:x3; val_offset:38967*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38967*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12990: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf800fff; valaddr_reg:x3; val_offset:38970*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38970*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12991: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf801fff; valaddr_reg:x3; val_offset:38973*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38973*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12992: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf803fff; valaddr_reg:x3; val_offset:38976*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38976*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12993: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf807fff; valaddr_reg:x3; val_offset:38979*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38979*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12994: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf80ffff; valaddr_reg:x3; val_offset:38982*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38982*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12995: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf81ffff; valaddr_reg:x3; val_offset:38985*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38985*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12996: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf83ffff; valaddr_reg:x3; val_offset:38988*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38988*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12997: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf87ffff; valaddr_reg:x3; val_offset:38991*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38991*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12998: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf8fffff; valaddr_reg:x3; val_offset:38994*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38994*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_12999: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaf9fffff; valaddr_reg:x3; val_offset:38997*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38997*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13000: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafbfffff; valaddr_reg:x3; val_offset:39000*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39000*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13001: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafc00000; valaddr_reg:x3; val_offset:39003*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39003*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13002: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafe00000; valaddr_reg:x3; val_offset:39006*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39006*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13003: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaff00000; valaddr_reg:x3; val_offset:39009*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39009*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13004: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaff80000; valaddr_reg:x3; val_offset:39012*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39012*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13005: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffc0000; valaddr_reg:x3; val_offset:39015*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39015*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13006: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffe0000; valaddr_reg:x3; val_offset:39018*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39018*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13007: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafff0000; valaddr_reg:x3; val_offset:39021*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39021*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13008: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafff8000; valaddr_reg:x3; val_offset:39024*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39024*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13009: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafffc000; valaddr_reg:x3; val_offset:39027*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39027*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13010: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafffe000; valaddr_reg:x3; val_offset:39030*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39030*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13011: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffff000; valaddr_reg:x3; val_offset:39033*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39033*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13012: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffff800; valaddr_reg:x3; val_offset:39036*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39036*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13013: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffffc00; valaddr_reg:x3; val_offset:39039*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39039*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13014: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffffe00; valaddr_reg:x3; val_offset:39042*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39042*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13015: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafffff00; valaddr_reg:x3; val_offset:39045*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39045*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13016: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafffff80; valaddr_reg:x3; val_offset:39048*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39048*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13017: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafffffc0; valaddr_reg:x3; val_offset:39051*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39051*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13018: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafffffe0; valaddr_reg:x3; val_offset:39054*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39054*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13019: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffffff0; valaddr_reg:x3; val_offset:39057*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39057*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13020: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffffff8; valaddr_reg:x3; val_offset:39060*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39060*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13021: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffffffc; valaddr_reg:x3; val_offset:39063*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39063*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13022: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xaffffffe; valaddr_reg:x3; val_offset:39066*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39066*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13023: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x5f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xafffffff; valaddr_reg:x3; val_offset:39069*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39069*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13024: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbf800001; valaddr_reg:x3; val_offset:39072*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39072*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13025: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbf800003; valaddr_reg:x3; val_offset:39075*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39075*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13026: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbf800007; valaddr_reg:x3; val_offset:39078*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39078*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13027: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbf999999; valaddr_reg:x3; val_offset:39081*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39081*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13028: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:39084*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39084*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13029: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:39087*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39087*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13030: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:39090*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39090*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13031: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:39093*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39093*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13032: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:39096*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39096*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13033: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:39099*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39099*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13034: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:39102*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39102*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13035: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:39105*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39105*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13036: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:39108*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39108*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13037: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:39111*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39111*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13038: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:39114*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39114*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13039: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7a532d and fs2 == 1 and fe2 == 0x01 and fm2 == 0x02e6e1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7a532d; op2val:0x8082e6e1; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:39117*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39117*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13040: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71000000; valaddr_reg:x3; val_offset:39120*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39120*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13041: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71000001; valaddr_reg:x3; val_offset:39123*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39123*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13042: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71000003; valaddr_reg:x3; val_offset:39126*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39126*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13043: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71000007; valaddr_reg:x3; val_offset:39129*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39129*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13044: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7100000f; valaddr_reg:x3; val_offset:39132*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39132*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13045: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7100001f; valaddr_reg:x3; val_offset:39135*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39135*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13046: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7100003f; valaddr_reg:x3; val_offset:39138*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39138*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13047: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7100007f; valaddr_reg:x3; val_offset:39141*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39141*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13048: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x710000ff; valaddr_reg:x3; val_offset:39144*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39144*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13049: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x710001ff; valaddr_reg:x3; val_offset:39147*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39147*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13050: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x710003ff; valaddr_reg:x3; val_offset:39150*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39150*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13051: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x710007ff; valaddr_reg:x3; val_offset:39153*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39153*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13052: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71000fff; valaddr_reg:x3; val_offset:39156*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39156*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13053: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71001fff; valaddr_reg:x3; val_offset:39159*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39159*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13054: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71003fff; valaddr_reg:x3; val_offset:39162*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39162*0 + 3*101*FLEN/8, x4, x1, x2) + +inst_13055: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71007fff; valaddr_reg:x3; val_offset:39165*0 + 3*101*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39165*0 + 3*101*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815296,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815297,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815299,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815303,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815311,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815327,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815359,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815423,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815551,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815807,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197816319,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197817343,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197819391,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197823487,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197831679,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197848063,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197880831,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197946367,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198077439,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198339583,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198863871,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2199912447,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2202009599,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2202009600,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2204106752,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205155328,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205679616,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205941760,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206072832,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206138368,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206171136,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206187520,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206195712,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206199808,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206201856,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206202880,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203392,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203648,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203776,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203840,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203872,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203888,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203896,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203900,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203902,32,FLEN) +NAN_BOXED(2121908678,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203903,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401408,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401409,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401411,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401415,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401423,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401439,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401471,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401535,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401663,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944401919,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944402431,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944403455,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944405503,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944409599,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944417791,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944434175,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944466943,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944532479,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944663551,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2944925695,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2945449983,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2946498559,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2948595711,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2948595712,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2950692864,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2951741440,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952265728,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952527872,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952658944,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952724480,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952757248,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952773632,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952781824,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952785920,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952787968,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952788992,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952789504,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952789760,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952789888,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952789952,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952789984,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952790000,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952790008,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952790012,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952790014,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(2952790015,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2121945901,32,FLEN) +NAN_BOXED(2156062433,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825408,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825409,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825411,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825415,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825423,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825439,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825471,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825535,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825663,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895825919,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895826431,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895827455,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895829503,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895833599,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895841791,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895858175,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-103.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-103.S new file mode 100644 index 000000000..04ac6d513 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-103.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_13056: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7100ffff; valaddr_reg:x3; val_offset:39168*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39168*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13057: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7101ffff; valaddr_reg:x3; val_offset:39171*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39171*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13058: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7103ffff; valaddr_reg:x3; val_offset:39174*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39174*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13059: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7107ffff; valaddr_reg:x3; val_offset:39177*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39177*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13060: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x710fffff; valaddr_reg:x3; val_offset:39180*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39180*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13061: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x711fffff; valaddr_reg:x3; val_offset:39183*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39183*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13062: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x713fffff; valaddr_reg:x3; val_offset:39186*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39186*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13063: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71400000; valaddr_reg:x3; val_offset:39189*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39189*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13064: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71600000; valaddr_reg:x3; val_offset:39192*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39192*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13065: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71700000; valaddr_reg:x3; val_offset:39195*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39195*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13066: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x71780000; valaddr_reg:x3; val_offset:39198*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39198*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13067: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717c0000; valaddr_reg:x3; val_offset:39201*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39201*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13068: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717e0000; valaddr_reg:x3; val_offset:39204*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39204*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13069: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717f0000; valaddr_reg:x3; val_offset:39207*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39207*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13070: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717f8000; valaddr_reg:x3; val_offset:39210*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39210*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13071: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717fc000; valaddr_reg:x3; val_offset:39213*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39213*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13072: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717fe000; valaddr_reg:x3; val_offset:39216*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39216*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13073: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717ff000; valaddr_reg:x3; val_offset:39219*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39219*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13074: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717ff800; valaddr_reg:x3; val_offset:39222*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39222*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13075: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717ffc00; valaddr_reg:x3; val_offset:39225*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39225*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13076: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717ffe00; valaddr_reg:x3; val_offset:39228*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39228*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13077: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717fff00; valaddr_reg:x3; val_offset:39231*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39231*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13078: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717fff80; valaddr_reg:x3; val_offset:39234*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39234*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13079: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717fffc0; valaddr_reg:x3; val_offset:39237*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39237*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13080: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717fffe0; valaddr_reg:x3; val_offset:39240*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39240*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13081: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717ffff0; valaddr_reg:x3; val_offset:39243*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39243*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13082: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717ffff8; valaddr_reg:x3; val_offset:39246*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39246*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13083: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717ffffc; valaddr_reg:x3; val_offset:39249*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39249*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13084: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717ffffe; valaddr_reg:x3; val_offset:39252*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39252*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13085: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xe2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x717fffff; valaddr_reg:x3; val_offset:39255*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39255*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13086: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f000001; valaddr_reg:x3; val_offset:39258*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39258*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13087: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f000003; valaddr_reg:x3; val_offset:39261*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39261*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13088: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f000007; valaddr_reg:x3; val_offset:39264*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39264*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13089: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f199999; valaddr_reg:x3; val_offset:39267*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39267*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13090: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f249249; valaddr_reg:x3; val_offset:39270*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39270*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13091: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f333333; valaddr_reg:x3; val_offset:39273*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39273*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13092: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:39276*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39276*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13093: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:39279*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39279*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13094: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f444444; valaddr_reg:x3; val_offset:39282*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39282*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13095: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:39285*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39285*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13096: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:39288*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39288*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13097: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f666666; valaddr_reg:x3; val_offset:39291*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39291*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13098: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:39294*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39294*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13099: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:39297*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39297*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13100: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:39300*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39300*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13101: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7b1fb1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x027c45 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7b1fb1; op2val:0x40827c45; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:39303*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39303*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13102: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:39306*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39306*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13103: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:39309*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39309*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13104: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:39312*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39312*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13105: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:39315*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39315*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13106: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:39318*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39318*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13107: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:39321*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39321*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13108: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:39324*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39324*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13109: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:39327*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39327*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13110: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:39330*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39330*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13111: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:39333*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39333*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13112: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:39336*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39336*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13113: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:39339*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39339*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13114: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:39342*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39342*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13115: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:39345*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39345*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13116: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:39348*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39348*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13117: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:39351*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39351*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13118: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5800000; valaddr_reg:x3; val_offset:39354*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39354*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13119: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5800001; valaddr_reg:x3; val_offset:39357*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39357*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13120: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5800003; valaddr_reg:x3; val_offset:39360*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39360*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13121: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5800007; valaddr_reg:x3; val_offset:39363*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39363*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13122: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x580000f; valaddr_reg:x3; val_offset:39366*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39366*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13123: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x580001f; valaddr_reg:x3; val_offset:39369*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39369*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13124: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x580003f; valaddr_reg:x3; val_offset:39372*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39372*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13125: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x580007f; valaddr_reg:x3; val_offset:39375*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39375*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13126: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x58000ff; valaddr_reg:x3; val_offset:39378*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39378*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13127: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x58001ff; valaddr_reg:x3; val_offset:39381*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39381*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13128: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x58003ff; valaddr_reg:x3; val_offset:39384*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39384*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13129: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x58007ff; valaddr_reg:x3; val_offset:39387*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39387*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13130: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5800fff; valaddr_reg:x3; val_offset:39390*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39390*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13131: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5801fff; valaddr_reg:x3; val_offset:39393*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39393*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13132: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5803fff; valaddr_reg:x3; val_offset:39396*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39396*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13133: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5807fff; valaddr_reg:x3; val_offset:39399*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39399*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13134: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x580ffff; valaddr_reg:x3; val_offset:39402*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39402*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13135: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x581ffff; valaddr_reg:x3; val_offset:39405*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39405*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13136: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x583ffff; valaddr_reg:x3; val_offset:39408*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39408*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13137: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x587ffff; valaddr_reg:x3; val_offset:39411*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39411*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13138: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x58fffff; valaddr_reg:x3; val_offset:39414*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39414*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13139: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x59fffff; valaddr_reg:x3; val_offset:39417*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39417*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13140: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5bfffff; valaddr_reg:x3; val_offset:39420*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39420*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13141: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5c00000; valaddr_reg:x3; val_offset:39423*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39423*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13142: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5e00000; valaddr_reg:x3; val_offset:39426*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39426*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13143: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5f00000; valaddr_reg:x3; val_offset:39429*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39429*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13144: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5f80000; valaddr_reg:x3; val_offset:39432*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39432*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13145: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fc0000; valaddr_reg:x3; val_offset:39435*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39435*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13146: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fe0000; valaddr_reg:x3; val_offset:39438*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39438*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13147: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ff0000; valaddr_reg:x3; val_offset:39441*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39441*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13148: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ff8000; valaddr_reg:x3; val_offset:39444*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39444*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13149: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ffc000; valaddr_reg:x3; val_offset:39447*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39447*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13150: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ffe000; valaddr_reg:x3; val_offset:39450*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39450*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13151: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fff000; valaddr_reg:x3; val_offset:39453*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39453*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13152: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fff800; valaddr_reg:x3; val_offset:39456*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39456*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13153: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fffc00; valaddr_reg:x3; val_offset:39459*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39459*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13154: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fffe00; valaddr_reg:x3; val_offset:39462*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39462*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13155: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ffff00; valaddr_reg:x3; val_offset:39465*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39465*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13156: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ffff80; valaddr_reg:x3; val_offset:39468*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39468*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13157: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ffffc0; valaddr_reg:x3; val_offset:39471*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39471*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13158: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ffffe0; valaddr_reg:x3; val_offset:39474*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39474*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13159: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fffff0; valaddr_reg:x3; val_offset:39477*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39477*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13160: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fffff8; valaddr_reg:x3; val_offset:39480*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39480*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13161: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fffffc; valaddr_reg:x3; val_offset:39483*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39483*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13162: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5fffffe; valaddr_reg:x3; val_offset:39486*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39486*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13163: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7c4dcc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7c4dcc; op2val:0x0; +op3val:0x5ffffff; valaddr_reg:x3; val_offset:39489*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39489*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13164: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:39492*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39492*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13165: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:39495*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39495*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13166: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:39498*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39498*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13167: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:39501*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39501*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13168: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:39504*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39504*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13169: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:39507*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39507*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13170: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:39510*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39510*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13171: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:39513*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39513*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13172: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:39516*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39516*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13173: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:39519*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39519*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13174: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:39522*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39522*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13175: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:39525*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39525*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13176: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:39528*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39528*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13177: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:39531*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39531*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13178: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:39534*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39534*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13179: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:39537*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39537*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13180: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa800000; valaddr_reg:x3; val_offset:39540*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39540*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13181: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa800001; valaddr_reg:x3; val_offset:39543*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39543*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13182: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa800003; valaddr_reg:x3; val_offset:39546*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39546*0 + 3*102*FLEN/8, x4, x1, x2) + +inst_13183: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa800007; valaddr_reg:x3; val_offset:39549*0 + 3*102*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39549*0 + 3*102*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895890943,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1895956479,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1896087551,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1896349695,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1896873983,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1897922559,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1900019711,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1900019712,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1902116864,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1903165440,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1903689728,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1903951872,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904082944,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904148480,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904181248,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904197632,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904205824,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904209920,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904211968,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904212992,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904213504,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904213760,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904213888,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904213952,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904213984,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904214000,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904214008,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904214012,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904214014,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(1904214015,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2121998257,32,FLEN) +NAN_BOXED(1082293317,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274688,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274689,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274691,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274695,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274703,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274719,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274751,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274815,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274943,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92275199,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92275711,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92276735,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92278783,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92282879,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92291071,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92307455,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92340223,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92405759,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92536831,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92798975,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(93323263,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(94371839,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(96468991,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(96468992,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(98566144,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(99614720,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100139008,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100401152,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100532224,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100597760,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100630528,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100646912,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100655104,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100659200,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100661248,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100662272,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100662784,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663040,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663168,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663232,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663264,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663280,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663288,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663292,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663294,32,FLEN) +NAN_BOXED(2122075596,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663295,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160768,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160769,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160771,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160775,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-104.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-104.S new file mode 100644 index 000000000..9287c6ba1 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-104.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_13184: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa80000f; valaddr_reg:x3; val_offset:39552*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39552*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13185: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa80001f; valaddr_reg:x3; val_offset:39555*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39555*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13186: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa80003f; valaddr_reg:x3; val_offset:39558*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39558*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13187: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa80007f; valaddr_reg:x3; val_offset:39561*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39561*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13188: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa8000ff; valaddr_reg:x3; val_offset:39564*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39564*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13189: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa8001ff; valaddr_reg:x3; val_offset:39567*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39567*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13190: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa8003ff; valaddr_reg:x3; val_offset:39570*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39570*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13191: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa8007ff; valaddr_reg:x3; val_offset:39573*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39573*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13192: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa800fff; valaddr_reg:x3; val_offset:39576*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39576*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13193: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa801fff; valaddr_reg:x3; val_offset:39579*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39579*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13194: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa803fff; valaddr_reg:x3; val_offset:39582*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39582*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13195: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa807fff; valaddr_reg:x3; val_offset:39585*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39585*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13196: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa80ffff; valaddr_reg:x3; val_offset:39588*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39588*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13197: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa81ffff; valaddr_reg:x3; val_offset:39591*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39591*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13198: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa83ffff; valaddr_reg:x3; val_offset:39594*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39594*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13199: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa87ffff; valaddr_reg:x3; val_offset:39597*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39597*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13200: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa8fffff; valaddr_reg:x3; val_offset:39600*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39600*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13201: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xa9fffff; valaddr_reg:x3; val_offset:39603*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39603*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13202: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xabfffff; valaddr_reg:x3; val_offset:39606*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39606*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13203: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xac00000; valaddr_reg:x3; val_offset:39609*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39609*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13204: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xae00000; valaddr_reg:x3; val_offset:39612*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39612*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13205: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaf00000; valaddr_reg:x3; val_offset:39615*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39615*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13206: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaf80000; valaddr_reg:x3; val_offset:39618*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39618*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13207: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafc0000; valaddr_reg:x3; val_offset:39621*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39621*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13208: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafe0000; valaddr_reg:x3; val_offset:39624*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39624*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13209: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaff0000; valaddr_reg:x3; val_offset:39627*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39627*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13210: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaff8000; valaddr_reg:x3; val_offset:39630*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39630*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13211: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaffc000; valaddr_reg:x3; val_offset:39633*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39633*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13212: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaffe000; valaddr_reg:x3; val_offset:39636*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39636*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13213: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafff000; valaddr_reg:x3; val_offset:39639*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39639*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13214: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafff800; valaddr_reg:x3; val_offset:39642*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39642*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13215: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafffc00; valaddr_reg:x3; val_offset:39645*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39645*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13216: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafffe00; valaddr_reg:x3; val_offset:39648*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39648*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13217: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaffff00; valaddr_reg:x3; val_offset:39651*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39651*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13218: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaffff80; valaddr_reg:x3; val_offset:39654*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39654*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13219: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaffffc0; valaddr_reg:x3; val_offset:39657*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39657*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13220: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaffffe0; valaddr_reg:x3; val_offset:39660*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39660*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13221: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafffff0; valaddr_reg:x3; val_offset:39663*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39663*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13222: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafffff8; valaddr_reg:x3; val_offset:39666*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39666*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13223: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafffffc; valaddr_reg:x3; val_offset:39669*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39669*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13224: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xafffffe; valaddr_reg:x3; val_offset:39672*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39672*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13225: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7d9769 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7d9769; op2val:0x0; +op3val:0xaffffff; valaddr_reg:x3; val_offset:39675*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39675*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13226: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:39678*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39678*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13227: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:39681*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39681*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13228: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:39684*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39684*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13229: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:39687*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39687*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13230: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:39690*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39690*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13231: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:39693*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39693*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13232: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:39696*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39696*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13233: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:39699*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39699*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13234: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:39702*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39702*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13235: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:39705*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39705*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13236: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:39708*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39708*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13237: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:39711*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39711*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13238: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:39714*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39714*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13239: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:39717*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39717*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13240: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:39720*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39720*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13241: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:39723*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39723*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13242: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe800000; valaddr_reg:x3; val_offset:39726*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39726*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13243: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe800001; valaddr_reg:x3; val_offset:39729*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39729*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13244: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe800003; valaddr_reg:x3; val_offset:39732*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39732*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13245: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe800007; valaddr_reg:x3; val_offset:39735*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39735*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13246: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe80000f; valaddr_reg:x3; val_offset:39738*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39738*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13247: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe80001f; valaddr_reg:x3; val_offset:39741*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39741*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13248: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe80003f; valaddr_reg:x3; val_offset:39744*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39744*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13249: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe80007f; valaddr_reg:x3; val_offset:39747*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39747*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13250: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe8000ff; valaddr_reg:x3; val_offset:39750*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39750*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13251: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe8001ff; valaddr_reg:x3; val_offset:39753*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39753*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13252: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe8003ff; valaddr_reg:x3; val_offset:39756*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39756*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13253: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe8007ff; valaddr_reg:x3; val_offset:39759*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39759*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13254: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe800fff; valaddr_reg:x3; val_offset:39762*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39762*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13255: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe801fff; valaddr_reg:x3; val_offset:39765*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39765*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13256: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe803fff; valaddr_reg:x3; val_offset:39768*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39768*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13257: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe807fff; valaddr_reg:x3; val_offset:39771*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39771*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13258: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe80ffff; valaddr_reg:x3; val_offset:39774*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39774*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13259: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe81ffff; valaddr_reg:x3; val_offset:39777*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39777*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13260: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe83ffff; valaddr_reg:x3; val_offset:39780*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39780*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13261: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe87ffff; valaddr_reg:x3; val_offset:39783*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39783*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13262: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe8fffff; valaddr_reg:x3; val_offset:39786*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39786*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13263: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xe9fffff; valaddr_reg:x3; val_offset:39789*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39789*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13264: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xebfffff; valaddr_reg:x3; val_offset:39792*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39792*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13265: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xec00000; valaddr_reg:x3; val_offset:39795*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39795*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13266: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xee00000; valaddr_reg:x3; val_offset:39798*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39798*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13267: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xef00000; valaddr_reg:x3; val_offset:39801*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39801*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13268: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xef80000; valaddr_reg:x3; val_offset:39804*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39804*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13269: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefc0000; valaddr_reg:x3; val_offset:39807*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39807*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13270: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefe0000; valaddr_reg:x3; val_offset:39810*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39810*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13271: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeff0000; valaddr_reg:x3; val_offset:39813*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39813*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13272: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeff8000; valaddr_reg:x3; val_offset:39816*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39816*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13273: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeffc000; valaddr_reg:x3; val_offset:39819*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39819*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13274: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeffe000; valaddr_reg:x3; val_offset:39822*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39822*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13275: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefff000; valaddr_reg:x3; val_offset:39825*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39825*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13276: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefff800; valaddr_reg:x3; val_offset:39828*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39828*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13277: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefffc00; valaddr_reg:x3; val_offset:39831*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39831*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13278: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefffe00; valaddr_reg:x3; val_offset:39834*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39834*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13279: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeffff00; valaddr_reg:x3; val_offset:39837*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39837*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13280: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeffff80; valaddr_reg:x3; val_offset:39840*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39840*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13281: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeffffc0; valaddr_reg:x3; val_offset:39843*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39843*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13282: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeffffe0; valaddr_reg:x3; val_offset:39846*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39846*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13283: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefffff0; valaddr_reg:x3; val_offset:39849*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39849*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13284: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefffff8; valaddr_reg:x3; val_offset:39852*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39852*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13285: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefffffc; valaddr_reg:x3; val_offset:39855*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39855*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13286: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xefffffe; valaddr_reg:x3; val_offset:39858*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39858*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13287: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7de57e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7de57e; op2val:0x0; +op3val:0xeffffff; valaddr_reg:x3; val_offset:39861*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39861*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13288: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:39864*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39864*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13289: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:39867*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39867*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13290: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:39870*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39870*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13291: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:39873*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39873*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13292: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:39876*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39876*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13293: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:39879*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39879*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13294: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:39882*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39882*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13295: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:39885*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39885*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13296: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:39888*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39888*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13297: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:39891*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39891*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13298: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:39894*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39894*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13299: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:39897*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39897*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13300: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:39900*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39900*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13301: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:39903*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39903*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13302: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:39906*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39906*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13303: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:39909*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39909*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13304: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b800000; valaddr_reg:x3; val_offset:39912*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39912*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13305: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b800001; valaddr_reg:x3; val_offset:39915*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39915*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13306: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b800003; valaddr_reg:x3; val_offset:39918*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39918*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13307: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b800007; valaddr_reg:x3; val_offset:39921*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39921*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13308: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b80000f; valaddr_reg:x3; val_offset:39924*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39924*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13309: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b80001f; valaddr_reg:x3; val_offset:39927*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39927*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13310: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b80003f; valaddr_reg:x3; val_offset:39930*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39930*0 + 3*103*FLEN/8, x4, x1, x2) + +inst_13311: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b80007f; valaddr_reg:x3; val_offset:39933*0 + 3*103*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39933*0 + 3*103*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160783,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160799,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160831,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160895,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161023,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161279,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161791,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176162815,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176164863,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176168959,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176177151,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176193535,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176226303,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176291839,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176422911,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176685055,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(177209343,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(178257919,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(180355071,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(180355072,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(182452224,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(183500800,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184025088,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184287232,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184418304,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184483840,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184516608,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184532992,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184541184,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184545280,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184547328,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184548352,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184548864,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549120,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549248,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549312,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549344,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549360,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549368,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549372,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549374,32,FLEN) +NAN_BOXED(2122159977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549375,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269632,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269633,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269635,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269639,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269647,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269663,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269695,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269759,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269887,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243270143,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243270655,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243271679,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243273727,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243277823,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243286015,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243302399,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243335167,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243400703,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243531775,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243793919,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(244318207,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(245366783,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(247463935,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(247463936,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(249561088,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(250609664,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251133952,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251396096,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251527168,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251592704,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251625472,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251641856,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251650048,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251654144,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251656192,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657216,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657728,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657984,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658112,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658176,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658208,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658224,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658232,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658236,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658238,32,FLEN) +NAN_BOXED(2122179966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658239,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421632,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421633,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421635,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421639,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421647,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421663,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421695,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421759,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-105.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-105.S new file mode 100644 index 000000000..324d0d485 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-105.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_13312: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b8000ff; valaddr_reg:x3; val_offset:39936*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39936*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13313: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b8001ff; valaddr_reg:x3; val_offset:39939*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39939*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13314: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b8003ff; valaddr_reg:x3; val_offset:39942*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39942*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13315: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b8007ff; valaddr_reg:x3; val_offset:39945*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39945*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13316: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b800fff; valaddr_reg:x3; val_offset:39948*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39948*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13317: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b801fff; valaddr_reg:x3; val_offset:39951*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39951*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13318: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b803fff; valaddr_reg:x3; val_offset:39954*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39954*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13319: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b807fff; valaddr_reg:x3; val_offset:39957*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39957*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13320: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b80ffff; valaddr_reg:x3; val_offset:39960*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39960*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13321: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b81ffff; valaddr_reg:x3; val_offset:39963*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39963*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13322: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b83ffff; valaddr_reg:x3; val_offset:39966*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39966*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13323: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b87ffff; valaddr_reg:x3; val_offset:39969*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39969*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13324: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b8fffff; valaddr_reg:x3; val_offset:39972*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39972*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13325: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8b9fffff; valaddr_reg:x3; val_offset:39975*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39975*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13326: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bbfffff; valaddr_reg:x3; val_offset:39978*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39978*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13327: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bc00000; valaddr_reg:x3; val_offset:39981*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39981*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13328: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8be00000; valaddr_reg:x3; val_offset:39984*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39984*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13329: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bf00000; valaddr_reg:x3; val_offset:39987*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39987*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13330: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bf80000; valaddr_reg:x3; val_offset:39990*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39990*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13331: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfc0000; valaddr_reg:x3; val_offset:39993*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39993*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13332: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfe0000; valaddr_reg:x3; val_offset:39996*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39996*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13333: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bff0000; valaddr_reg:x3; val_offset:39999*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 39999*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13334: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bff8000; valaddr_reg:x3; val_offset:40002*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40002*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13335: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bffc000; valaddr_reg:x3; val_offset:40005*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40005*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13336: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bffe000; valaddr_reg:x3; val_offset:40008*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40008*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13337: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfff000; valaddr_reg:x3; val_offset:40011*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40011*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13338: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfff800; valaddr_reg:x3; val_offset:40014*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40014*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13339: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfffc00; valaddr_reg:x3; val_offset:40017*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40017*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13340: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfffe00; valaddr_reg:x3; val_offset:40020*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40020*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13341: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bffff00; valaddr_reg:x3; val_offset:40023*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40023*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13342: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bffff80; valaddr_reg:x3; val_offset:40026*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40026*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13343: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bffffc0; valaddr_reg:x3; val_offset:40029*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40029*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13344: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bffffe0; valaddr_reg:x3; val_offset:40032*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40032*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13345: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfffff0; valaddr_reg:x3; val_offset:40035*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40035*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13346: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfffff8; valaddr_reg:x3; val_offset:40038*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40038*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13347: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfffffc; valaddr_reg:x3; val_offset:40041*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40041*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13348: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bfffffe; valaddr_reg:x3; val_offset:40044*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40044*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13349: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x7f80b0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e7f80b0; op2val:0x80000000; +op3val:0x8bffffff; valaddr_reg:x3; val_offset:40047*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40047*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e800000; valaddr_reg:x3; val_offset:40050*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40050*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e800001; valaddr_reg:x3; val_offset:40053*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40053*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e800003; valaddr_reg:x3; val_offset:40056*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40056*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e800007; valaddr_reg:x3; val_offset:40059*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40059*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e80000f; valaddr_reg:x3; val_offset:40062*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40062*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e80001f; valaddr_reg:x3; val_offset:40065*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40065*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e80003f; valaddr_reg:x3; val_offset:40068*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40068*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e80007f; valaddr_reg:x3; val_offset:40071*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40071*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e8000ff; valaddr_reg:x3; val_offset:40074*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40074*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e8001ff; valaddr_reg:x3; val_offset:40077*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40077*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e8003ff; valaddr_reg:x3; val_offset:40080*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40080*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e8007ff; valaddr_reg:x3; val_offset:40083*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40083*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e800fff; valaddr_reg:x3; val_offset:40086*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40086*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e801fff; valaddr_reg:x3; val_offset:40089*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40089*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e803fff; valaddr_reg:x3; val_offset:40092*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40092*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e807fff; valaddr_reg:x3; val_offset:40095*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40095*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e80ffff; valaddr_reg:x3; val_offset:40098*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40098*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e81ffff; valaddr_reg:x3; val_offset:40101*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40101*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e83ffff; valaddr_reg:x3; val_offset:40104*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40104*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e87ffff; valaddr_reg:x3; val_offset:40107*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40107*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e8fffff; valaddr_reg:x3; val_offset:40110*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40110*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6e9fffff; valaddr_reg:x3; val_offset:40113*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40113*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6ebfffff; valaddr_reg:x3; val_offset:40116*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40116*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6ec00000; valaddr_reg:x3; val_offset:40119*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40119*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6ee00000; valaddr_reg:x3; val_offset:40122*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40122*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6ef00000; valaddr_reg:x3; val_offset:40125*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40125*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6ef80000; valaddr_reg:x3; val_offset:40128*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40128*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efc0000; valaddr_reg:x3; val_offset:40131*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40131*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efe0000; valaddr_reg:x3; val_offset:40134*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40134*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6eff0000; valaddr_reg:x3; val_offset:40137*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40137*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6eff8000; valaddr_reg:x3; val_offset:40140*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40140*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6effc000; valaddr_reg:x3; val_offset:40143*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40143*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6effe000; valaddr_reg:x3; val_offset:40146*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40146*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efff000; valaddr_reg:x3; val_offset:40149*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40149*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efff800; valaddr_reg:x3; val_offset:40152*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40152*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efffc00; valaddr_reg:x3; val_offset:40155*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40155*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efffe00; valaddr_reg:x3; val_offset:40158*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40158*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6effff00; valaddr_reg:x3; val_offset:40161*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40161*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6effff80; valaddr_reg:x3; val_offset:40164*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40164*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6effffc0; valaddr_reg:x3; val_offset:40167*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40167*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6effffe0; valaddr_reg:x3; val_offset:40170*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40170*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efffff0; valaddr_reg:x3; val_offset:40173*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40173*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efffff8; valaddr_reg:x3; val_offset:40176*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40176*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efffffc; valaddr_reg:x3; val_offset:40179*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40179*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6efffffe; valaddr_reg:x3; val_offset:40182*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40182*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xdd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x6effffff; valaddr_reg:x3; val_offset:40185*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40185*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f000001; valaddr_reg:x3; val_offset:40188*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40188*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f000003; valaddr_reg:x3; val_offset:40191*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40191*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f000007; valaddr_reg:x3; val_offset:40194*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40194*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f199999; valaddr_reg:x3; val_offset:40197*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40197*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f249249; valaddr_reg:x3; val_offset:40200*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40200*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f333333; valaddr_reg:x3; val_offset:40203*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40203*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:40206*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40206*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:40209*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40209*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f444444; valaddr_reg:x3; val_offset:40212*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40212*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:40215*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40215*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:40218*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40218*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f666666; valaddr_reg:x3; val_offset:40221*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40221*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:40224*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40224*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:40227*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40227*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:40230*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40230*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00a521 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x7eb763 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80a521; op2val:0x407eb763; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:40233*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40233*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c000000; valaddr_reg:x3; val_offset:40236*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40236*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c000001; valaddr_reg:x3; val_offset:40239*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40239*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c000003; valaddr_reg:x3; val_offset:40242*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40242*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c000007; valaddr_reg:x3; val_offset:40245*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40245*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c00000f; valaddr_reg:x3; val_offset:40248*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40248*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c00001f; valaddr_reg:x3; val_offset:40251*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40251*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c00003f; valaddr_reg:x3; val_offset:40254*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40254*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c00007f; valaddr_reg:x3; val_offset:40257*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40257*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c0000ff; valaddr_reg:x3; val_offset:40260*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40260*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c0001ff; valaddr_reg:x3; val_offset:40263*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40263*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c0003ff; valaddr_reg:x3; val_offset:40266*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40266*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c0007ff; valaddr_reg:x3; val_offset:40269*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40269*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c000fff; valaddr_reg:x3; val_offset:40272*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40272*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c001fff; valaddr_reg:x3; val_offset:40275*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40275*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c003fff; valaddr_reg:x3; val_offset:40278*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40278*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c007fff; valaddr_reg:x3; val_offset:40281*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40281*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c00ffff; valaddr_reg:x3; val_offset:40284*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40284*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c01ffff; valaddr_reg:x3; val_offset:40287*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40287*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c03ffff; valaddr_reg:x3; val_offset:40290*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40290*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c07ffff; valaddr_reg:x3; val_offset:40293*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40293*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c0fffff; valaddr_reg:x3; val_offset:40296*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40296*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c1fffff; valaddr_reg:x3; val_offset:40299*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40299*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c3fffff; valaddr_reg:x3; val_offset:40302*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40302*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c400000; valaddr_reg:x3; val_offset:40305*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40305*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c600000; valaddr_reg:x3; val_offset:40308*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40308*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c700000; valaddr_reg:x3; val_offset:40311*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40311*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c780000; valaddr_reg:x3; val_offset:40314*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40314*0 + 3*104*FLEN/8, x4, x1, x2) + +inst_13439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7c0000; valaddr_reg:x3; val_offset:40317*0 + 3*104*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40317*0 + 3*104*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421887,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340422143,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340422655,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340423679,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340425727,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340429823,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340438015,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340454399,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340487167,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340552703,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340683775,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340945919,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2341470207,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2342518783,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2344615935,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2344615936,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2346713088,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2347761664,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348285952,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348548096,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348679168,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348744704,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348777472,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348793856,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348802048,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348806144,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348808192,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809216,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809728,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809984,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810112,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810176,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810208,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810224,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810232,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810236,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810238,32,FLEN) +NAN_BOXED(2122285232,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810239,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882368,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882369,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882371,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882375,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882383,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882399,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882431,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882495,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882623,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853882879,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853883391,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853884415,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853886463,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853890559,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853898751,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853915135,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1853947903,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1854013439,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1854144511,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1854406655,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1854930943,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1855979519,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1858076671,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1858076672,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1860173824,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1861222400,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1861746688,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862008832,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862139904,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862205440,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862238208,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862254592,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862262784,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862266880,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862268928,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862269952,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270464,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270720,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270848,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270912,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270944,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270960,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270968,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270972,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270974,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(1862270975,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2122360097,32,FLEN) +NAN_BOXED(1082046307,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197504,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197505,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197507,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197511,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197519,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197535,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197567,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197631,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738197759,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738198015,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738198527,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738199551,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738201599,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738205695,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738213887,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738230271,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738263039,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738328575,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738459647,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(738721791,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(739246079,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(740294655,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(742391807,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(742391808,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(744488960,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(745537536,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746061824,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746323968,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-106.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-106.S new file mode 100644 index 000000000..16a2ad8ac --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-106.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_13440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7e0000; valaddr_reg:x3; val_offset:40320*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40320*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7f0000; valaddr_reg:x3; val_offset:40323*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40323*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7f8000; valaddr_reg:x3; val_offset:40326*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40326*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7fc000; valaddr_reg:x3; val_offset:40329*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40329*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7fe000; valaddr_reg:x3; val_offset:40332*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40332*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7ff000; valaddr_reg:x3; val_offset:40335*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40335*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7ff800; valaddr_reg:x3; val_offset:40338*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40338*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7ffc00; valaddr_reg:x3; val_offset:40341*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40341*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7ffe00; valaddr_reg:x3; val_offset:40344*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40344*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7fff00; valaddr_reg:x3; val_offset:40347*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40347*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7fff80; valaddr_reg:x3; val_offset:40350*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40350*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7fffc0; valaddr_reg:x3; val_offset:40353*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40353*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7fffe0; valaddr_reg:x3; val_offset:40356*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40356*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7ffff0; valaddr_reg:x3; val_offset:40359*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40359*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7ffff8; valaddr_reg:x3; val_offset:40362*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40362*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7ffffc; valaddr_reg:x3; val_offset:40365*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40365*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7ffffe; valaddr_reg:x3; val_offset:40368*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40368*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x58 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x2c7fffff; valaddr_reg:x3; val_offset:40371*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40371*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3f800001; valaddr_reg:x3; val_offset:40374*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40374*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3f800003; valaddr_reg:x3; val_offset:40377*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40377*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3f800007; valaddr_reg:x3; val_offset:40380*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40380*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3f999999; valaddr_reg:x3; val_offset:40383*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40383*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:40386*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40386*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:40389*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40389*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:40392*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40392*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:40395*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40395*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:40398*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40398*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:40401*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40401*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:40404*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40404*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:40407*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40407*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:40410*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40410*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:40413*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40413*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:40416*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40416*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x00be6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x7f42ac and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e80be6d; op2val:0x7f42ac; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:40419*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40419*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbf800001; valaddr_reg:x3; val_offset:40422*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40422*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbf800003; valaddr_reg:x3; val_offset:40425*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40425*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbf800007; valaddr_reg:x3; val_offset:40428*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40428*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbf999999; valaddr_reg:x3; val_offset:40431*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40431*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:40434*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40434*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:40437*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40437*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:40440*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40440*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:40443*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40443*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:40446*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40446*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:40449*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40449*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:40452*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40452*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:40455*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40455*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:40458*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40458*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:40461*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40461*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:40464*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40464*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:40467*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40467*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd800000; valaddr_reg:x3; val_offset:40470*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40470*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd800001; valaddr_reg:x3; val_offset:40473*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40473*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd800003; valaddr_reg:x3; val_offset:40476*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40476*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd800007; valaddr_reg:x3; val_offset:40479*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40479*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd80000f; valaddr_reg:x3; val_offset:40482*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40482*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd80001f; valaddr_reg:x3; val_offset:40485*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40485*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd80003f; valaddr_reg:x3; val_offset:40488*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40488*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd80007f; valaddr_reg:x3; val_offset:40491*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40491*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd8000ff; valaddr_reg:x3; val_offset:40494*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40494*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd8001ff; valaddr_reg:x3; val_offset:40497*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40497*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd8003ff; valaddr_reg:x3; val_offset:40500*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40500*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd8007ff; valaddr_reg:x3; val_offset:40503*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40503*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd800fff; valaddr_reg:x3; val_offset:40506*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40506*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd801fff; valaddr_reg:x3; val_offset:40509*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40509*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd803fff; valaddr_reg:x3; val_offset:40512*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40512*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd807fff; valaddr_reg:x3; val_offset:40515*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40515*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd80ffff; valaddr_reg:x3; val_offset:40518*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40518*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd81ffff; valaddr_reg:x3; val_offset:40521*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40521*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd83ffff; valaddr_reg:x3; val_offset:40524*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40524*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd87ffff; valaddr_reg:x3; val_offset:40527*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40527*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd8fffff; valaddr_reg:x3; val_offset:40530*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40530*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcd9fffff; valaddr_reg:x3; val_offset:40533*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40533*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdbfffff; valaddr_reg:x3; val_offset:40536*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40536*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdc00000; valaddr_reg:x3; val_offset:40539*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40539*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcde00000; valaddr_reg:x3; val_offset:40542*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40542*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdf00000; valaddr_reg:x3; val_offset:40545*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40545*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdf80000; valaddr_reg:x3; val_offset:40548*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40548*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfc0000; valaddr_reg:x3; val_offset:40551*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40551*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfe0000; valaddr_reg:x3; val_offset:40554*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40554*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdff0000; valaddr_reg:x3; val_offset:40557*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40557*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdff8000; valaddr_reg:x3; val_offset:40560*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40560*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdffc000; valaddr_reg:x3; val_offset:40563*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40563*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdffe000; valaddr_reg:x3; val_offset:40566*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40566*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfff000; valaddr_reg:x3; val_offset:40569*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40569*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfff800; valaddr_reg:x3; val_offset:40572*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40572*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfffc00; valaddr_reg:x3; val_offset:40575*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40575*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfffe00; valaddr_reg:x3; val_offset:40578*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40578*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdffff00; valaddr_reg:x3; val_offset:40581*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40581*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdffff80; valaddr_reg:x3; val_offset:40584*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40584*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdffffc0; valaddr_reg:x3; val_offset:40587*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40587*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdffffe0; valaddr_reg:x3; val_offset:40590*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40590*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfffff0; valaddr_reg:x3; val_offset:40593*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40593*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfffff8; valaddr_reg:x3; val_offset:40596*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40596*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfffffc; valaddr_reg:x3; val_offset:40599*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40599*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdfffffe; valaddr_reg:x3; val_offset:40602*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40602*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x019aaf and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7e6a65 and fs3 == 1 and fe3 == 0x9b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e819aaf; op2val:0x807e6a65; +op3val:0xcdffffff; valaddr_reg:x3; val_offset:40605*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40605*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:40608*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40608*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:40611*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40611*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:40614*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40614*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:40617*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40617*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:40620*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40620*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:40623*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40623*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:40626*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40626*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:40629*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40629*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:40632*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40632*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:40635*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40635*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:40638*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40638*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:40641*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40641*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:40644*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40644*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:40647*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40647*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:40650*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40650*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:40653*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40653*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd800000; valaddr_reg:x3; val_offset:40656*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40656*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd800001; valaddr_reg:x3; val_offset:40659*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40659*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd800003; valaddr_reg:x3; val_offset:40662*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40662*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd800007; valaddr_reg:x3; val_offset:40665*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40665*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd80000f; valaddr_reg:x3; val_offset:40668*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40668*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd80001f; valaddr_reg:x3; val_offset:40671*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40671*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd80003f; valaddr_reg:x3; val_offset:40674*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40674*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd80007f; valaddr_reg:x3; val_offset:40677*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40677*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd8000ff; valaddr_reg:x3; val_offset:40680*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40680*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd8001ff; valaddr_reg:x3; val_offset:40683*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40683*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd8003ff; valaddr_reg:x3; val_offset:40686*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40686*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd8007ff; valaddr_reg:x3; val_offset:40689*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40689*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd800fff; valaddr_reg:x3; val_offset:40692*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40692*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd801fff; valaddr_reg:x3; val_offset:40695*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40695*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd803fff; valaddr_reg:x3; val_offset:40698*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40698*0 + 3*105*FLEN/8, x4, x1, x2) + +inst_13567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd807fff; valaddr_reg:x3; val_offset:40701*0 + 3*105*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40701*0 + 3*105*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746455040,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746520576,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746553344,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746569728,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746577920,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746582016,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746584064,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746585088,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746585600,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746585856,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746585984,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746586048,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746586080,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746586096,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746586104,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746586108,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746586110,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(746586111,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2122366573,32,FLEN) +NAN_BOXED(8340140,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447717888,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447717889,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447717891,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447717895,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447717903,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447717919,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447717951,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447718015,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447718143,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447718399,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447718911,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447719935,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447721983,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447726079,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447734271,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447750655,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447783423,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447848959,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3447980031,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3448242175,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3448766463,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3449815039,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3451912191,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3451912192,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3454009344,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3455057920,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3455582208,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3455844352,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3455975424,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456040960,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456073728,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456090112,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456098304,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456102400,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456104448,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456105472,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456105984,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106240,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106368,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106432,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106464,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106480,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106488,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106492,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106494,32,FLEN) +NAN_BOXED(2122422959,32,FLEN) +NAN_BOXED(2155768421,32,FLEN) +NAN_BOXED(3456106495,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492416,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492417,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492419,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492423,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492431,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492447,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492479,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492543,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492671,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492927,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226493439,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226494463,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226496511,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226500607,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226508799,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226525183,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-107.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-107.S new file mode 100644 index 000000000..489855c11 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-107.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_13568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd80ffff; valaddr_reg:x3; val_offset:40704*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40704*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd81ffff; valaddr_reg:x3; val_offset:40707*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40707*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd83ffff; valaddr_reg:x3; val_offset:40710*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40710*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd87ffff; valaddr_reg:x3; val_offset:40713*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40713*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd8fffff; valaddr_reg:x3; val_offset:40716*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40716*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xd9fffff; valaddr_reg:x3; val_offset:40719*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40719*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdbfffff; valaddr_reg:x3; val_offset:40722*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40722*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdc00000; valaddr_reg:x3; val_offset:40725*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40725*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xde00000; valaddr_reg:x3; val_offset:40728*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40728*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdf00000; valaddr_reg:x3; val_offset:40731*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40731*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdf80000; valaddr_reg:x3; val_offset:40734*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40734*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfc0000; valaddr_reg:x3; val_offset:40737*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40737*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfe0000; valaddr_reg:x3; val_offset:40740*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40740*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdff0000; valaddr_reg:x3; val_offset:40743*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40743*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdff8000; valaddr_reg:x3; val_offset:40746*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40746*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdffc000; valaddr_reg:x3; val_offset:40749*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40749*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdffe000; valaddr_reg:x3; val_offset:40752*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40752*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfff000; valaddr_reg:x3; val_offset:40755*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40755*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfff800; valaddr_reg:x3; val_offset:40758*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40758*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfffc00; valaddr_reg:x3; val_offset:40761*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40761*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfffe00; valaddr_reg:x3; val_offset:40764*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40764*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdffff00; valaddr_reg:x3; val_offset:40767*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40767*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdffff80; valaddr_reg:x3; val_offset:40770*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40770*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdffffc0; valaddr_reg:x3; val_offset:40773*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40773*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdffffe0; valaddr_reg:x3; val_offset:40776*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40776*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfffff0; valaddr_reg:x3; val_offset:40779*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40779*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfffff8; valaddr_reg:x3; val_offset:40782*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40782*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfffffc; valaddr_reg:x3; val_offset:40785*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40785*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdfffffe; valaddr_reg:x3; val_offset:40788*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40788*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x01bd84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e81bd84; op2val:0x0; +op3val:0xdffffff; valaddr_reg:x3; val_offset:40791*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40791*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa800000; valaddr_reg:x3; val_offset:40794*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40794*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa800001; valaddr_reg:x3; val_offset:40797*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40797*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa800003; valaddr_reg:x3; val_offset:40800*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40800*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa800007; valaddr_reg:x3; val_offset:40803*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40803*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa80000f; valaddr_reg:x3; val_offset:40806*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40806*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa80001f; valaddr_reg:x3; val_offset:40809*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40809*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa80003f; valaddr_reg:x3; val_offset:40812*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40812*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa80007f; valaddr_reg:x3; val_offset:40815*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40815*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa8000ff; valaddr_reg:x3; val_offset:40818*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40818*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa8001ff; valaddr_reg:x3; val_offset:40821*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40821*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa8003ff; valaddr_reg:x3; val_offset:40824*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40824*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa8007ff; valaddr_reg:x3; val_offset:40827*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40827*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa800fff; valaddr_reg:x3; val_offset:40830*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40830*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa801fff; valaddr_reg:x3; val_offset:40833*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40833*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa803fff; valaddr_reg:x3; val_offset:40836*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40836*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa807fff; valaddr_reg:x3; val_offset:40839*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40839*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa80ffff; valaddr_reg:x3; val_offset:40842*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40842*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa81ffff; valaddr_reg:x3; val_offset:40845*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40845*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa83ffff; valaddr_reg:x3; val_offset:40848*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40848*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa87ffff; valaddr_reg:x3; val_offset:40851*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40851*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa8fffff; valaddr_reg:x3; val_offset:40854*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40854*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfa9fffff; valaddr_reg:x3; val_offset:40857*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40857*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfabfffff; valaddr_reg:x3; val_offset:40860*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40860*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfac00000; valaddr_reg:x3; val_offset:40863*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40863*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfae00000; valaddr_reg:x3; val_offset:40866*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40866*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaf00000; valaddr_reg:x3; val_offset:40869*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40869*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaf80000; valaddr_reg:x3; val_offset:40872*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40872*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafc0000; valaddr_reg:x3; val_offset:40875*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40875*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafe0000; valaddr_reg:x3; val_offset:40878*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40878*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaff0000; valaddr_reg:x3; val_offset:40881*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40881*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaff8000; valaddr_reg:x3; val_offset:40884*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40884*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaffc000; valaddr_reg:x3; val_offset:40887*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40887*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaffe000; valaddr_reg:x3; val_offset:40890*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40890*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafff000; valaddr_reg:x3; val_offset:40893*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40893*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafff800; valaddr_reg:x3; val_offset:40896*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40896*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafffc00; valaddr_reg:x3; val_offset:40899*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40899*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafffe00; valaddr_reg:x3; val_offset:40902*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40902*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaffff00; valaddr_reg:x3; val_offset:40905*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40905*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaffff80; valaddr_reg:x3; val_offset:40908*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40908*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaffffc0; valaddr_reg:x3; val_offset:40911*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40911*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaffffe0; valaddr_reg:x3; val_offset:40914*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40914*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafffff0; valaddr_reg:x3; val_offset:40917*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40917*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafffff8; valaddr_reg:x3; val_offset:40920*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40920*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafffffc; valaddr_reg:x3; val_offset:40923*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40923*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfafffffe; valaddr_reg:x3; val_offset:40926*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40926*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xf5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xfaffffff; valaddr_reg:x3; val_offset:40929*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40929*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff000001; valaddr_reg:x3; val_offset:40932*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40932*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff000003; valaddr_reg:x3; val_offset:40935*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40935*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff000007; valaddr_reg:x3; val_offset:40938*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40938*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff199999; valaddr_reg:x3; val_offset:40941*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40941*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff249249; valaddr_reg:x3; val_offset:40944*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40944*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff333333; valaddr_reg:x3; val_offset:40947*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40947*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:40950*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40950*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:40953*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40953*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff444444; valaddr_reg:x3; val_offset:40956*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40956*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:40959*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40959*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:40962*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40962*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff666666; valaddr_reg:x3; val_offset:40965*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40965*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:40968*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40968*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:40971*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40971*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:40974*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40974*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x028495 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x7b0fb2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e828495; op2val:0xc07b0fb2; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:40977*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40977*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:40980*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40980*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:40983*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40983*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:40986*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40986*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:40989*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40989*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:40992*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40992*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:40995*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40995*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:40998*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 40998*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:41001*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41001*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:41004*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41004*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:41007*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41007*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:41010*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41010*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:41013*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41013*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:41016*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41016*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:41019*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41019*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:41022*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41022*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:41025*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41025*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4800000; valaddr_reg:x3; val_offset:41028*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41028*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4800001; valaddr_reg:x3; val_offset:41031*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41031*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4800003; valaddr_reg:x3; val_offset:41034*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41034*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4800007; valaddr_reg:x3; val_offset:41037*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41037*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x480000f; valaddr_reg:x3; val_offset:41040*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41040*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x480001f; valaddr_reg:x3; val_offset:41043*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41043*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x480003f; valaddr_reg:x3; val_offset:41046*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41046*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x480007f; valaddr_reg:x3; val_offset:41049*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41049*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x48000ff; valaddr_reg:x3; val_offset:41052*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41052*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x48001ff; valaddr_reg:x3; val_offset:41055*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41055*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x48003ff; valaddr_reg:x3; val_offset:41058*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41058*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x48007ff; valaddr_reg:x3; val_offset:41061*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41061*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4800fff; valaddr_reg:x3; val_offset:41064*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41064*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4801fff; valaddr_reg:x3; val_offset:41067*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41067*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4803fff; valaddr_reg:x3; val_offset:41070*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41070*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4807fff; valaddr_reg:x3; val_offset:41073*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41073*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x480ffff; valaddr_reg:x3; val_offset:41076*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41076*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x481ffff; valaddr_reg:x3; val_offset:41079*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41079*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x483ffff; valaddr_reg:x3; val_offset:41082*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41082*0 + 3*106*FLEN/8, x4, x1, x2) + +inst_13695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x487ffff; valaddr_reg:x3; val_offset:41085*0 + 3*106*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41085*0 + 3*106*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226557951,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226623487,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226754559,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(227016703,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(227540991,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(228589567,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(230686719,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(230686720,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(232783872,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(233832448,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234356736,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234618880,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234749952,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234815488,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234848256,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234864640,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234872832,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234876928,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234878976,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880000,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880512,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880768,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880896,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880960,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880992,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881008,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881016,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881020,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881022,32,FLEN) +NAN_BOXED(2122431876,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881023,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692608,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692609,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692611,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692615,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692623,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692639,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692671,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692735,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202692863,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202693119,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202693631,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202694655,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202696703,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202700799,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202708991,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202725375,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202758143,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202823679,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4202954751,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4203216895,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4203741183,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4204789759,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4206886911,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4206886912,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4208984064,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4210032640,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4210556928,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4210819072,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4210950144,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211015680,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211048448,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211064832,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211073024,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211077120,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211079168,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211080192,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211080704,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211080960,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211081088,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211081152,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211081184,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211081200,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211081208,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211081212,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211081214,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4211081215,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2122482837,32,FLEN) +NAN_BOXED(3229290418,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497472,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497473,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497475,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497479,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497487,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497503,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497535,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497599,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497727,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497983,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75498495,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75499519,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75501567,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75505663,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75513855,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75530239,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75563007,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75628543,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75759615,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(76021759,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-108.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-108.S new file mode 100644 index 000000000..e627e7c22 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-108.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_13696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x48fffff; valaddr_reg:x3; val_offset:41088*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41088*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x49fffff; valaddr_reg:x3; val_offset:41091*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41091*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4bfffff; valaddr_reg:x3; val_offset:41094*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41094*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4c00000; valaddr_reg:x3; val_offset:41097*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41097*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4e00000; valaddr_reg:x3; val_offset:41100*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41100*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4f00000; valaddr_reg:x3; val_offset:41103*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41103*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4f80000; valaddr_reg:x3; val_offset:41106*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41106*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fc0000; valaddr_reg:x3; val_offset:41109*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41109*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fe0000; valaddr_reg:x3; val_offset:41112*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41112*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ff0000; valaddr_reg:x3; val_offset:41115*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41115*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ff8000; valaddr_reg:x3; val_offset:41118*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41118*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ffc000; valaddr_reg:x3; val_offset:41121*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41121*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ffe000; valaddr_reg:x3; val_offset:41124*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41124*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fff000; valaddr_reg:x3; val_offset:41127*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41127*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fff800; valaddr_reg:x3; val_offset:41130*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41130*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fffc00; valaddr_reg:x3; val_offset:41133*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41133*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fffe00; valaddr_reg:x3; val_offset:41136*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41136*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ffff00; valaddr_reg:x3; val_offset:41139*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41139*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ffff80; valaddr_reg:x3; val_offset:41142*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41142*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ffffc0; valaddr_reg:x3; val_offset:41145*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41145*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ffffe0; valaddr_reg:x3; val_offset:41148*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41148*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fffff0; valaddr_reg:x3; val_offset:41151*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41151*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fffff8; valaddr_reg:x3; val_offset:41154*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41154*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fffffc; valaddr_reg:x3; val_offset:41157*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41157*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4fffffe; valaddr_reg:x3; val_offset:41160*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41160*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x02a504 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e82a504; op2val:0x0; +op3val:0x4ffffff; valaddr_reg:x3; val_offset:41163*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41163*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:41166*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41166*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:41169*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41169*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:41172*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41172*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:41175*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41175*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:41178*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41178*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:41181*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41181*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:41184*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41184*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:41187*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41187*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:41190*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41190*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:41193*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41193*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:41196*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41196*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:41199*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41199*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:41202*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41202*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:41205*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41205*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:41208*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41208*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:41211*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41211*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9000000; valaddr_reg:x3; val_offset:41214*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41214*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9000001; valaddr_reg:x3; val_offset:41217*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41217*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9000003; valaddr_reg:x3; val_offset:41220*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41220*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9000007; valaddr_reg:x3; val_offset:41223*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41223*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x900000f; valaddr_reg:x3; val_offset:41226*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41226*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x900001f; valaddr_reg:x3; val_offset:41229*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41229*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x900003f; valaddr_reg:x3; val_offset:41232*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41232*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x900007f; valaddr_reg:x3; val_offset:41235*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41235*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x90000ff; valaddr_reg:x3; val_offset:41238*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41238*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x90001ff; valaddr_reg:x3; val_offset:41241*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41241*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x90003ff; valaddr_reg:x3; val_offset:41244*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41244*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x90007ff; valaddr_reg:x3; val_offset:41247*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41247*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9000fff; valaddr_reg:x3; val_offset:41250*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41250*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9001fff; valaddr_reg:x3; val_offset:41253*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41253*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9003fff; valaddr_reg:x3; val_offset:41256*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41256*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9007fff; valaddr_reg:x3; val_offset:41259*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41259*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x900ffff; valaddr_reg:x3; val_offset:41262*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41262*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x901ffff; valaddr_reg:x3; val_offset:41265*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41265*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x903ffff; valaddr_reg:x3; val_offset:41268*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41268*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x907ffff; valaddr_reg:x3; val_offset:41271*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41271*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x90fffff; valaddr_reg:x3; val_offset:41274*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41274*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x91fffff; valaddr_reg:x3; val_offset:41277*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41277*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x93fffff; valaddr_reg:x3; val_offset:41280*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41280*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9400000; valaddr_reg:x3; val_offset:41283*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41283*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9600000; valaddr_reg:x3; val_offset:41286*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41286*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9700000; valaddr_reg:x3; val_offset:41289*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41289*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x9780000; valaddr_reg:x3; val_offset:41292*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41292*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97c0000; valaddr_reg:x3; val_offset:41295*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41295*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97e0000; valaddr_reg:x3; val_offset:41298*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41298*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97f0000; valaddr_reg:x3; val_offset:41301*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41301*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97f8000; valaddr_reg:x3; val_offset:41304*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41304*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97fc000; valaddr_reg:x3; val_offset:41307*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41307*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97fe000; valaddr_reg:x3; val_offset:41310*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41310*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97ff000; valaddr_reg:x3; val_offset:41313*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41313*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97ff800; valaddr_reg:x3; val_offset:41316*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41316*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97ffc00; valaddr_reg:x3; val_offset:41319*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41319*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97ffe00; valaddr_reg:x3; val_offset:41322*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41322*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97fff00; valaddr_reg:x3; val_offset:41325*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41325*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97fff80; valaddr_reg:x3; val_offset:41328*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41328*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97fffc0; valaddr_reg:x3; val_offset:41331*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41331*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97fffe0; valaddr_reg:x3; val_offset:41334*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41334*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97ffff0; valaddr_reg:x3; val_offset:41337*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41337*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97ffff8; valaddr_reg:x3; val_offset:41340*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41340*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97ffffc; valaddr_reg:x3; val_offset:41343*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41343*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97ffffe; valaddr_reg:x3; val_offset:41346*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41346*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x03f653 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e83f653; op2val:0x0; +op3val:0x97fffff; valaddr_reg:x3; val_offset:41349*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41349*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63000000; valaddr_reg:x3; val_offset:41352*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41352*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63000001; valaddr_reg:x3; val_offset:41355*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41355*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63000003; valaddr_reg:x3; val_offset:41358*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41358*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63000007; valaddr_reg:x3; val_offset:41361*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41361*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x6300000f; valaddr_reg:x3; val_offset:41364*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41364*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x6300001f; valaddr_reg:x3; val_offset:41367*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41367*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x6300003f; valaddr_reg:x3; val_offset:41370*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41370*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x6300007f; valaddr_reg:x3; val_offset:41373*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41373*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x630000ff; valaddr_reg:x3; val_offset:41376*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41376*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x630001ff; valaddr_reg:x3; val_offset:41379*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41379*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x630003ff; valaddr_reg:x3; val_offset:41382*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41382*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x630007ff; valaddr_reg:x3; val_offset:41385*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41385*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63000fff; valaddr_reg:x3; val_offset:41388*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41388*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63001fff; valaddr_reg:x3; val_offset:41391*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41391*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63003fff; valaddr_reg:x3; val_offset:41394*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41394*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63007fff; valaddr_reg:x3; val_offset:41397*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41397*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x6300ffff; valaddr_reg:x3; val_offset:41400*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41400*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x6301ffff; valaddr_reg:x3; val_offset:41403*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41403*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x6303ffff; valaddr_reg:x3; val_offset:41406*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41406*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x6307ffff; valaddr_reg:x3; val_offset:41409*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41409*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x630fffff; valaddr_reg:x3; val_offset:41412*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41412*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x631fffff; valaddr_reg:x3; val_offset:41415*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41415*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x633fffff; valaddr_reg:x3; val_offset:41418*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41418*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63400000; valaddr_reg:x3; val_offset:41421*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41421*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63600000; valaddr_reg:x3; val_offset:41424*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41424*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63700000; valaddr_reg:x3; val_offset:41427*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41427*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x63780000; valaddr_reg:x3; val_offset:41430*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41430*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637c0000; valaddr_reg:x3; val_offset:41433*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41433*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637e0000; valaddr_reg:x3; val_offset:41436*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41436*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637f0000; valaddr_reg:x3; val_offset:41439*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41439*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637f8000; valaddr_reg:x3; val_offset:41442*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41442*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637fc000; valaddr_reg:x3; val_offset:41445*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41445*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637fe000; valaddr_reg:x3; val_offset:41448*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41448*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637ff000; valaddr_reg:x3; val_offset:41451*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41451*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637ff800; valaddr_reg:x3; val_offset:41454*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41454*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637ffc00; valaddr_reg:x3; val_offset:41457*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41457*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637ffe00; valaddr_reg:x3; val_offset:41460*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41460*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637fff00; valaddr_reg:x3; val_offset:41463*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41463*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637fff80; valaddr_reg:x3; val_offset:41466*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41466*0 + 3*107*FLEN/8, x4, x1, x2) + +inst_13823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637fffc0; valaddr_reg:x3; val_offset:41469*0 + 3*107*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41469*0 + 3*107*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(76546047,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(77594623,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(79691775,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(79691776,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(81788928,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(82837504,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83361792,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83623936,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83755008,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83820544,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83853312,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83869696,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83877888,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83881984,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83884032,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885056,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885568,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885824,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885952,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886016,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886048,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886064,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886072,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886076,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886078,32,FLEN) +NAN_BOXED(2122491140,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886079,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994944,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994945,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994947,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994951,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994959,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994975,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995007,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995071,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995199,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995455,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995967,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150996991,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150999039,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151003135,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151011327,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151027711,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151060479,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151126015,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151257087,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151519231,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(152043519,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(153092095,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(155189247,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(155189248,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(157286400,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(158334976,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(158859264,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159121408,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159252480,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159318016,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159350784,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159367168,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159375360,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159379456,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159381504,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159382528,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383040,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383296,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383424,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383488,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383520,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383536,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383544,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383548,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383550,32,FLEN) +NAN_BOXED(2122577491,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383551,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944384,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944385,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944387,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944391,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944399,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944415,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944447,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944511,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944639,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660944895,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660945407,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660946431,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660948479,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660952575,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660960767,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1660977151,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1661009919,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1661075455,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1661206527,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1661468671,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1661992959,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1663041535,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1665138687,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1665138688,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1667235840,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1668284416,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1668808704,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669070848,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669201920,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669267456,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669300224,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669316608,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669324800,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669328896,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669330944,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669331968,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332480,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332736,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332864,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332928,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-109.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-109.S new file mode 100644 index 000000000..540c58dc9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-109.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_13824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637fffe0; valaddr_reg:x3; val_offset:41472*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41472*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637ffff0; valaddr_reg:x3; val_offset:41475*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41475*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637ffff8; valaddr_reg:x3; val_offset:41478*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41478*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637ffffc; valaddr_reg:x3; val_offset:41481*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41481*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637ffffe; valaddr_reg:x3; val_offset:41484*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41484*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xc6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x637fffff; valaddr_reg:x3; val_offset:41487*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41487*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f000001; valaddr_reg:x3; val_offset:41490*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41490*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f000003; valaddr_reg:x3; val_offset:41493*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41493*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f000007; valaddr_reg:x3; val_offset:41496*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41496*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f199999; valaddr_reg:x3; val_offset:41499*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41499*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f249249; valaddr_reg:x3; val_offset:41502*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41502*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f333333; valaddr_reg:x3; val_offset:41505*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41505*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:41508*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41508*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:41511*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41511*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f444444; valaddr_reg:x3; val_offset:41514*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41514*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:41517*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41517*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:41520*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41520*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f666666; valaddr_reg:x3; val_offset:41523*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41523*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:41526*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41526*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:41529*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41529*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:41532*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41532*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x04a6a2 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x770637 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e84a6a2; op2val:0x40770637; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:41535*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41535*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:41538*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41538*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:41541*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41541*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:41544*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41544*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:41547*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41547*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:41550*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41550*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:41553*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41553*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:41556*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41556*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:41559*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41559*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:41562*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41562*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:41565*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41565*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:41568*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41568*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:41571*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41571*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:41574*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41574*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:41577*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41577*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:41580*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41580*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:41583*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41583*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9800000; valaddr_reg:x3; val_offset:41586*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41586*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9800001; valaddr_reg:x3; val_offset:41589*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41589*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9800003; valaddr_reg:x3; val_offset:41592*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41592*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9800007; valaddr_reg:x3; val_offset:41595*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41595*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x980000f; valaddr_reg:x3; val_offset:41598*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41598*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x980001f; valaddr_reg:x3; val_offset:41601*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41601*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x980003f; valaddr_reg:x3; val_offset:41604*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41604*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x980007f; valaddr_reg:x3; val_offset:41607*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41607*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x98000ff; valaddr_reg:x3; val_offset:41610*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41610*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x98001ff; valaddr_reg:x3; val_offset:41613*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41613*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x98003ff; valaddr_reg:x3; val_offset:41616*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41616*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x98007ff; valaddr_reg:x3; val_offset:41619*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41619*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9800fff; valaddr_reg:x3; val_offset:41622*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41622*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9801fff; valaddr_reg:x3; val_offset:41625*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41625*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9803fff; valaddr_reg:x3; val_offset:41628*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41628*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9807fff; valaddr_reg:x3; val_offset:41631*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41631*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x980ffff; valaddr_reg:x3; val_offset:41634*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41634*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x981ffff; valaddr_reg:x3; val_offset:41637*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41637*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x983ffff; valaddr_reg:x3; val_offset:41640*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41640*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x987ffff; valaddr_reg:x3; val_offset:41643*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41643*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x98fffff; valaddr_reg:x3; val_offset:41646*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41646*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x99fffff; valaddr_reg:x3; val_offset:41649*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41649*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9bfffff; valaddr_reg:x3; val_offset:41652*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41652*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9c00000; valaddr_reg:x3; val_offset:41655*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41655*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9e00000; valaddr_reg:x3; val_offset:41658*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41658*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9f00000; valaddr_reg:x3; val_offset:41661*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41661*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9f80000; valaddr_reg:x3; val_offset:41664*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41664*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fc0000; valaddr_reg:x3; val_offset:41667*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41667*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fe0000; valaddr_reg:x3; val_offset:41670*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41670*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ff0000; valaddr_reg:x3; val_offset:41673*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41673*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ff8000; valaddr_reg:x3; val_offset:41676*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41676*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ffc000; valaddr_reg:x3; val_offset:41679*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41679*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ffe000; valaddr_reg:x3; val_offset:41682*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41682*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fff000; valaddr_reg:x3; val_offset:41685*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41685*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fff800; valaddr_reg:x3; val_offset:41688*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41688*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fffc00; valaddr_reg:x3; val_offset:41691*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41691*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fffe00; valaddr_reg:x3; val_offset:41694*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41694*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ffff00; valaddr_reg:x3; val_offset:41697*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41697*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ffff80; valaddr_reg:x3; val_offset:41700*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41700*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ffffc0; valaddr_reg:x3; val_offset:41703*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41703*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ffffe0; valaddr_reg:x3; val_offset:41706*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41706*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fffff0; valaddr_reg:x3; val_offset:41709*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41709*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fffff8; valaddr_reg:x3; val_offset:41712*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41712*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fffffc; valaddr_reg:x3; val_offset:41715*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41715*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9fffffe; valaddr_reg:x3; val_offset:41718*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41718*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x051ed8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e851ed8; op2val:0x0; +op3val:0x9ffffff; valaddr_reg:x3; val_offset:41721*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41721*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61800000; valaddr_reg:x3; val_offset:41724*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41724*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61800001; valaddr_reg:x3; val_offset:41727*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41727*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61800003; valaddr_reg:x3; val_offset:41730*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41730*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61800007; valaddr_reg:x3; val_offset:41733*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41733*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x6180000f; valaddr_reg:x3; val_offset:41736*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41736*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x6180001f; valaddr_reg:x3; val_offset:41739*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41739*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x6180003f; valaddr_reg:x3; val_offset:41742*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41742*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x6180007f; valaddr_reg:x3; val_offset:41745*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41745*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x618000ff; valaddr_reg:x3; val_offset:41748*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41748*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x618001ff; valaddr_reg:x3; val_offset:41751*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41751*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x618003ff; valaddr_reg:x3; val_offset:41754*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41754*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x618007ff; valaddr_reg:x3; val_offset:41757*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41757*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61800fff; valaddr_reg:x3; val_offset:41760*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41760*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61801fff; valaddr_reg:x3; val_offset:41763*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41763*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61803fff; valaddr_reg:x3; val_offset:41766*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41766*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61807fff; valaddr_reg:x3; val_offset:41769*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41769*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x6180ffff; valaddr_reg:x3; val_offset:41772*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41772*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x6181ffff; valaddr_reg:x3; val_offset:41775*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41775*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x6183ffff; valaddr_reg:x3; val_offset:41778*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41778*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x6187ffff; valaddr_reg:x3; val_offset:41781*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41781*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x618fffff; valaddr_reg:x3; val_offset:41784*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41784*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x619fffff; valaddr_reg:x3; val_offset:41787*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41787*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61bfffff; valaddr_reg:x3; val_offset:41790*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41790*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61c00000; valaddr_reg:x3; val_offset:41793*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41793*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61e00000; valaddr_reg:x3; val_offset:41796*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41796*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61f00000; valaddr_reg:x3; val_offset:41799*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41799*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61f80000; valaddr_reg:x3; val_offset:41802*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41802*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fc0000; valaddr_reg:x3; val_offset:41805*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41805*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fe0000; valaddr_reg:x3; val_offset:41808*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41808*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ff0000; valaddr_reg:x3; val_offset:41811*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41811*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ff8000; valaddr_reg:x3; val_offset:41814*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41814*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ffc000; valaddr_reg:x3; val_offset:41817*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41817*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ffe000; valaddr_reg:x3; val_offset:41820*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41820*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fff000; valaddr_reg:x3; val_offset:41823*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41823*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fff800; valaddr_reg:x3; val_offset:41826*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41826*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fffc00; valaddr_reg:x3; val_offset:41829*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41829*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fffe00; valaddr_reg:x3; val_offset:41832*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41832*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ffff00; valaddr_reg:x3; val_offset:41835*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41835*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ffff80; valaddr_reg:x3; val_offset:41838*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41838*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ffffc0; valaddr_reg:x3; val_offset:41841*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41841*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ffffe0; valaddr_reg:x3; val_offset:41844*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41844*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fffff0; valaddr_reg:x3; val_offset:41847*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41847*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fffff8; valaddr_reg:x3; val_offset:41850*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41850*0 + 3*108*FLEN/8, x4, x1, x2) + +inst_13951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fffffc; valaddr_reg:x3; val_offset:41853*0 + 3*108*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41853*0 + 3*108*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332960,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332976,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332984,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332988,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332990,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(1669332991,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2122622626,32,FLEN) +NAN_BOXED(1081542199,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383552,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383553,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383555,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383559,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383567,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383583,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383615,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383679,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383807,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159384063,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159384575,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159385599,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159387647,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159391743,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159399935,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159416319,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159449087,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159514623,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159645695,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159907839,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(160432127,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(161480703,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(163577855,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(163577856,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(165675008,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(166723584,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167247872,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167510016,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167641088,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167706624,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167739392,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167755776,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167763968,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167768064,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167770112,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771136,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771648,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771904,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772032,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772096,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772128,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772144,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772152,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772156,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772158,32,FLEN) +NAN_BOXED(2122653400,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772159,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778560,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778561,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778563,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778567,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778575,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778591,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778623,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778687,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635778815,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635779071,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635779583,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635780607,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635782655,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635786751,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635794943,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635811327,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635844095,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1635909631,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1636040703,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1636302847,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1636827135,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1637875711,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1639972863,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1639972864,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1642070016,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1643118592,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1643642880,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1643905024,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644036096,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644101632,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644134400,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644150784,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644158976,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644163072,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644165120,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644166144,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644166656,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644166912,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644167040,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644167104,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644167136,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644167152,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644167160,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644167164,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-11.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-11.S new file mode 100644 index 000000000..63ddcec96 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-11.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_1280: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6e00000; valaddr_reg:x3; val_offset:3840*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3840*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1281: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6f00000; valaddr_reg:x3; val_offset:3843*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3843*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1282: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6f80000; valaddr_reg:x3; val_offset:3846*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3846*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1283: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fc0000; valaddr_reg:x3; val_offset:3849*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3849*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1284: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fe0000; valaddr_reg:x3; val_offset:3852*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3852*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1285: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ff0000; valaddr_reg:x3; val_offset:3855*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3855*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1286: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ff8000; valaddr_reg:x3; val_offset:3858*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3858*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1287: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ffc000; valaddr_reg:x3; val_offset:3861*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3861*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1288: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ffe000; valaddr_reg:x3; val_offset:3864*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3864*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1289: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fff000; valaddr_reg:x3; val_offset:3867*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3867*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1290: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fff800; valaddr_reg:x3; val_offset:3870*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3870*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1291: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fffc00; valaddr_reg:x3; val_offset:3873*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3873*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1292: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fffe00; valaddr_reg:x3; val_offset:3876*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3876*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1293: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ffff00; valaddr_reg:x3; val_offset:3879*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3879*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1294: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ffff80; valaddr_reg:x3; val_offset:3882*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3882*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1295: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ffffc0; valaddr_reg:x3; val_offset:3885*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3885*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1296: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ffffe0; valaddr_reg:x3; val_offset:3888*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3888*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1297: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fffff0; valaddr_reg:x3; val_offset:3891*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3891*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1298: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fffff8; valaddr_reg:x3; val_offset:3894*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3894*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1299: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fffffc; valaddr_reg:x3; val_offset:3897*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3897*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1300: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6fffffe; valaddr_reg:x3; val_offset:3900*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3900*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1301: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x59eac0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cd9eac0; op2val:0x0; +op3val:0x6ffffff; valaddr_reg:x3; val_offset:3903*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3903*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1302: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbf800001; valaddr_reg:x3; val_offset:3906*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3906*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1303: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbf800003; valaddr_reg:x3; val_offset:3909*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3909*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1304: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbf800007; valaddr_reg:x3; val_offset:3912*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3912*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1305: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbf999999; valaddr_reg:x3; val_offset:3915*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3915*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1306: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:3918*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3918*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1307: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:3921*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3921*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1308: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:3924*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3924*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1309: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:3927*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3927*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1310: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:3930*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3930*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1311: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:3933*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3933*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1312: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:3936*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3936*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1313: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:3939*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3939*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1314: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:3942*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3942*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1315: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:3945*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3945*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1316: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:3948*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3948*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1317: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:3951*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3951*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1318: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf800000; valaddr_reg:x3; val_offset:3954*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3954*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1319: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf800001; valaddr_reg:x3; val_offset:3957*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3957*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1320: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf800003; valaddr_reg:x3; val_offset:3960*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3960*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1321: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf800007; valaddr_reg:x3; val_offset:3963*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3963*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1322: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf80000f; valaddr_reg:x3; val_offset:3966*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3966*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1323: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf80001f; valaddr_reg:x3; val_offset:3969*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3969*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1324: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf80003f; valaddr_reg:x3; val_offset:3972*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3972*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1325: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf80007f; valaddr_reg:x3; val_offset:3975*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3975*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1326: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf8000ff; valaddr_reg:x3; val_offset:3978*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3978*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1327: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf8001ff; valaddr_reg:x3; val_offset:3981*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3981*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1328: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf8003ff; valaddr_reg:x3; val_offset:3984*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3984*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1329: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf8007ff; valaddr_reg:x3; val_offset:3987*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3987*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1330: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf800fff; valaddr_reg:x3; val_offset:3990*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3990*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1331: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf801fff; valaddr_reg:x3; val_offset:3993*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3993*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1332: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf803fff; valaddr_reg:x3; val_offset:3996*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3996*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1333: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf807fff; valaddr_reg:x3; val_offset:3999*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 3999*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1334: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf80ffff; valaddr_reg:x3; val_offset:4002*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4002*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1335: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf81ffff; valaddr_reg:x3; val_offset:4005*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4005*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1336: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf83ffff; valaddr_reg:x3; val_offset:4008*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4008*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1337: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf87ffff; valaddr_reg:x3; val_offset:4011*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4011*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1338: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf8fffff; valaddr_reg:x3; val_offset:4014*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4014*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1339: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcf9fffff; valaddr_reg:x3; val_offset:4017*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4017*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1340: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfbfffff; valaddr_reg:x3; val_offset:4020*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4020*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1341: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfc00000; valaddr_reg:x3; val_offset:4023*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4023*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1342: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfe00000; valaddr_reg:x3; val_offset:4026*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4026*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1343: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcff00000; valaddr_reg:x3; val_offset:4029*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4029*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1344: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcff80000; valaddr_reg:x3; val_offset:4032*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4032*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1345: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffc0000; valaddr_reg:x3; val_offset:4035*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4035*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1346: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffe0000; valaddr_reg:x3; val_offset:4038*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4038*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1347: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfff0000; valaddr_reg:x3; val_offset:4041*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4041*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1348: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfff8000; valaddr_reg:x3; val_offset:4044*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4044*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1349: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfffc000; valaddr_reg:x3; val_offset:4047*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4047*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1350: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfffe000; valaddr_reg:x3; val_offset:4050*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4050*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1351: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffff000; valaddr_reg:x3; val_offset:4053*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4053*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1352: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffff800; valaddr_reg:x3; val_offset:4056*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4056*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1353: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffffc00; valaddr_reg:x3; val_offset:4059*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4059*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1354: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffffe00; valaddr_reg:x3; val_offset:4062*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4062*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1355: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfffff00; valaddr_reg:x3; val_offset:4065*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4065*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1356: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfffff80; valaddr_reg:x3; val_offset:4068*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4068*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1357: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfffffc0; valaddr_reg:x3; val_offset:4071*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4071*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1358: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfffffe0; valaddr_reg:x3; val_offset:4074*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4074*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1359: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffffff0; valaddr_reg:x3; val_offset:4077*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4077*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1360: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffffff8; valaddr_reg:x3; val_offset:4080*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4080*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1361: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffffffc; valaddr_reg:x3; val_offset:4083*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4083*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1362: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcffffffe; valaddr_reg:x3; val_offset:4086*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4086*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1363: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5b20ed and fs2 == 1 and fe2 == 0x04 and fm2 == 0x1589a9 and fs3 == 1 and fe3 == 0x9f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdb20ed; op2val:0x821589a9; +op3val:0xcfffffff; valaddr_reg:x3; val_offset:4089*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4089*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1364: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x0; valaddr_reg:x3; val_offset:4092*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4092*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1365: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:4095*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4095*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1366: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:4098*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4098*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1367: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:4101*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4101*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1368: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xf; valaddr_reg:x3; val_offset:4104*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4104*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1369: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x1f; valaddr_reg:x3; val_offset:4107*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4107*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1370: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x3f; valaddr_reg:x3; val_offset:4110*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4110*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1371: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7f; valaddr_reg:x3; val_offset:4113*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4113*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1372: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xff; valaddr_reg:x3; val_offset:4116*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4116*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1373: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x1ff; valaddr_reg:x3; val_offset:4119*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4119*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1374: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x3ff; valaddr_reg:x3; val_offset:4122*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4122*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1375: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ff; valaddr_reg:x3; val_offset:4125*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4125*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1376: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xfff; valaddr_reg:x3; val_offset:4128*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4128*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1377: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x1fff; valaddr_reg:x3; val_offset:4131*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4131*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1378: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x3fff; valaddr_reg:x3; val_offset:4134*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4134*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1379: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7fff; valaddr_reg:x3; val_offset:4137*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4137*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1380: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xffff; valaddr_reg:x3; val_offset:4140*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4140*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1381: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x1ffff; valaddr_reg:x3; val_offset:4143*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4143*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1382: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x3ffff; valaddr_reg:x3; val_offset:4146*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4146*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1383: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ffff; valaddr_reg:x3; val_offset:4149*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4149*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1384: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xfffff; valaddr_reg:x3; val_offset:4152*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4152*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1385: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x1fffff; valaddr_reg:x3; val_offset:4155*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4155*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1386: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x3fffff; valaddr_reg:x3; val_offset:4158*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4158*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1387: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x400000; valaddr_reg:x3; val_offset:4161*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4161*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1388: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x600000; valaddr_reg:x3; val_offset:4164*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4164*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1389: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x700000; valaddr_reg:x3; val_offset:4167*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4167*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1390: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x780000; valaddr_reg:x3; val_offset:4170*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4170*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1391: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7c0000; valaddr_reg:x3; val_offset:4173*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4173*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1392: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7e0000; valaddr_reg:x3; val_offset:4176*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4176*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1393: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7f0000; valaddr_reg:x3; val_offset:4179*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4179*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1394: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7f8000; valaddr_reg:x3; val_offset:4182*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4182*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1395: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7fc000; valaddr_reg:x3; val_offset:4185*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4185*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1396: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7fe000; valaddr_reg:x3; val_offset:4188*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4188*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1397: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ff000; valaddr_reg:x3; val_offset:4191*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4191*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1398: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ff800; valaddr_reg:x3; val_offset:4194*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4194*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1399: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ffc00; valaddr_reg:x3; val_offset:4197*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4197*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1400: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ffe00; valaddr_reg:x3; val_offset:4200*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4200*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1401: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7fff00; valaddr_reg:x3; val_offset:4203*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4203*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1402: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7fff80; valaddr_reg:x3; val_offset:4206*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4206*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1403: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7fffc0; valaddr_reg:x3; val_offset:4209*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4209*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1404: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7fffe0; valaddr_reg:x3; val_offset:4212*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4212*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1405: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ffff0; valaddr_reg:x3; val_offset:4215*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4215*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1406: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:4218*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4218*0 + 3*10*FLEN/8, x4, x1, x2) + +inst_1407: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:4221*0 + 3*10*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4221*0 + 3*10*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(115343360,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(116391936,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(116916224,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117178368,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117309440,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117374976,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117407744,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117424128,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117432320,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117436416,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117438464,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117439488,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440000,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440256,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440384,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440448,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440480,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440496,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440504,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440508,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440510,32,FLEN) +NAN_BOXED(2094656192,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440511,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272320,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272321,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272323,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272327,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272335,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272351,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272383,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272447,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272575,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481272831,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481273343,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481274367,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481276415,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481280511,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481288703,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481305087,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481337855,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481403391,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481534463,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3481796607,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3482320895,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3483369471,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3485466623,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3485466624,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3487563776,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3488612352,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489136640,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489398784,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489529856,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489595392,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489628160,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489644544,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489652736,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489656832,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489658880,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489659904,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660416,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660672,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660800,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660864,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660896,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660912,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660920,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660924,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660926,32,FLEN) +NAN_BOXED(2094735597,32,FLEN) +NAN_BOXED(2182449577,32,FLEN) +NAN_BOXED(3489660927,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(63,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(511,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1023,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2047,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4095,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8191,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16383,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32767,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65535,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(131071,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(524287,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1048575,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2097151,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194303,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194304,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6291456,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7340032,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7864320,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8126464,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8257536,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8323072,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8355840,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8372224,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8380416,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8384512,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8386560,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8387584,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388096,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388352,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388480,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388544,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388576,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388592,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-110.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-110.S new file mode 100644 index 000000000..39ba556ce --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-110.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_13952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61fffffe; valaddr_reg:x3; val_offset:41856*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41856*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xc3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x61ffffff; valaddr_reg:x3; val_offset:41859*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41859*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f000001; valaddr_reg:x3; val_offset:41862*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41862*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f000003; valaddr_reg:x3; val_offset:41865*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41865*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f000007; valaddr_reg:x3; val_offset:41868*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41868*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f199999; valaddr_reg:x3; val_offset:41871*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41871*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f249249; valaddr_reg:x3; val_offset:41874*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41874*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f333333; valaddr_reg:x3; val_offset:41877*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41877*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:41880*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41880*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:41883*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41883*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f444444; valaddr_reg:x3; val_offset:41886*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41886*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:41889*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41889*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:41892*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41892*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f666666; valaddr_reg:x3; val_offset:41895*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41895*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:41898*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41898*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:41901*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41901*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:41904*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41904*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x075c74 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x72140b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e875c74; op2val:0x4072140b; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:41907*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41907*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:41910*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41910*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:41913*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41913*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:41916*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41916*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:41919*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41919*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:41922*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41922*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:41925*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41925*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:41928*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41928*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:41931*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41931*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:41934*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41934*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:41937*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41937*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:41940*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41940*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:41943*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41943*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:41946*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41946*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:41949*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41949*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:41952*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41952*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:41955*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41955*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb800000; valaddr_reg:x3; val_offset:41958*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41958*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb800001; valaddr_reg:x3; val_offset:41961*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41961*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb800003; valaddr_reg:x3; val_offset:41964*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41964*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb800007; valaddr_reg:x3; val_offset:41967*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41967*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb80000f; valaddr_reg:x3; val_offset:41970*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41970*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb80001f; valaddr_reg:x3; val_offset:41973*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41973*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb80003f; valaddr_reg:x3; val_offset:41976*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41976*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb80007f; valaddr_reg:x3; val_offset:41979*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41979*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb8000ff; valaddr_reg:x3; val_offset:41982*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41982*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb8001ff; valaddr_reg:x3; val_offset:41985*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41985*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb8003ff; valaddr_reg:x3; val_offset:41988*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41988*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb8007ff; valaddr_reg:x3; val_offset:41991*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41991*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb800fff; valaddr_reg:x3; val_offset:41994*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41994*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_13999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb801fff; valaddr_reg:x3; val_offset:41997*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 41997*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb803fff; valaddr_reg:x3; val_offset:42000*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42000*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb807fff; valaddr_reg:x3; val_offset:42003*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42003*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb80ffff; valaddr_reg:x3; val_offset:42006*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42006*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb81ffff; valaddr_reg:x3; val_offset:42009*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42009*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb83ffff; valaddr_reg:x3; val_offset:42012*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42012*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb87ffff; valaddr_reg:x3; val_offset:42015*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42015*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb8fffff; valaddr_reg:x3; val_offset:42018*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42018*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xb9fffff; valaddr_reg:x3; val_offset:42021*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42021*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbbfffff; valaddr_reg:x3; val_offset:42024*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42024*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbc00000; valaddr_reg:x3; val_offset:42027*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42027*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbe00000; valaddr_reg:x3; val_offset:42030*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42030*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbf00000; valaddr_reg:x3; val_offset:42033*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42033*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbf80000; valaddr_reg:x3; val_offset:42036*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42036*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfc0000; valaddr_reg:x3; val_offset:42039*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42039*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfe0000; valaddr_reg:x3; val_offset:42042*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42042*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbff0000; valaddr_reg:x3; val_offset:42045*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42045*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbff8000; valaddr_reg:x3; val_offset:42048*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42048*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbffc000; valaddr_reg:x3; val_offset:42051*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42051*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbffe000; valaddr_reg:x3; val_offset:42054*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42054*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfff000; valaddr_reg:x3; val_offset:42057*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42057*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfff800; valaddr_reg:x3; val_offset:42060*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42060*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfffc00; valaddr_reg:x3; val_offset:42063*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42063*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfffe00; valaddr_reg:x3; val_offset:42066*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42066*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbffff00; valaddr_reg:x3; val_offset:42069*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42069*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbffff80; valaddr_reg:x3; val_offset:42072*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42072*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbffffc0; valaddr_reg:x3; val_offset:42075*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42075*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbffffe0; valaddr_reg:x3; val_offset:42078*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42078*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfffff0; valaddr_reg:x3; val_offset:42081*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42081*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfffff8; valaddr_reg:x3; val_offset:42084*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42084*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfffffc; valaddr_reg:x3; val_offset:42087*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42087*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbfffffe; valaddr_reg:x3; val_offset:42090*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42090*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x07db19 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e87db19; op2val:0x0; +op3val:0xbffffff; valaddr_reg:x3; val_offset:42093*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42093*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d000000; valaddr_reg:x3; val_offset:42096*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42096*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d000001; valaddr_reg:x3; val_offset:42099*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42099*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d000003; valaddr_reg:x3; val_offset:42102*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42102*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d000007; valaddr_reg:x3; val_offset:42105*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42105*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d00000f; valaddr_reg:x3; val_offset:42108*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42108*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d00001f; valaddr_reg:x3; val_offset:42111*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42111*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d00003f; valaddr_reg:x3; val_offset:42114*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42114*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d00007f; valaddr_reg:x3; val_offset:42117*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42117*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d0000ff; valaddr_reg:x3; val_offset:42120*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42120*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d0001ff; valaddr_reg:x3; val_offset:42123*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42123*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d0003ff; valaddr_reg:x3; val_offset:42126*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42126*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d0007ff; valaddr_reg:x3; val_offset:42129*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42129*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d000fff; valaddr_reg:x3; val_offset:42132*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42132*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d001fff; valaddr_reg:x3; val_offset:42135*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42135*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d003fff; valaddr_reg:x3; val_offset:42138*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42138*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d007fff; valaddr_reg:x3; val_offset:42141*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42141*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d00ffff; valaddr_reg:x3; val_offset:42144*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42144*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d01ffff; valaddr_reg:x3; val_offset:42147*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42147*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d03ffff; valaddr_reg:x3; val_offset:42150*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42150*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d07ffff; valaddr_reg:x3; val_offset:42153*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42153*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d0fffff; valaddr_reg:x3; val_offset:42156*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42156*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d1fffff; valaddr_reg:x3; val_offset:42159*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42159*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d3fffff; valaddr_reg:x3; val_offset:42162*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42162*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d400000; valaddr_reg:x3; val_offset:42165*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42165*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d600000; valaddr_reg:x3; val_offset:42168*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42168*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d700000; valaddr_reg:x3; val_offset:42171*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42171*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d780000; valaddr_reg:x3; val_offset:42174*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42174*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7c0000; valaddr_reg:x3; val_offset:42177*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42177*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7e0000; valaddr_reg:x3; val_offset:42180*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42180*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7f0000; valaddr_reg:x3; val_offset:42183*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42183*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7f8000; valaddr_reg:x3; val_offset:42186*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42186*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7fc000; valaddr_reg:x3; val_offset:42189*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42189*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7fe000; valaddr_reg:x3; val_offset:42192*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42192*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7ff000; valaddr_reg:x3; val_offset:42195*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42195*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7ff800; valaddr_reg:x3; val_offset:42198*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42198*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7ffc00; valaddr_reg:x3; val_offset:42201*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42201*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7ffe00; valaddr_reg:x3; val_offset:42204*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42204*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7fff00; valaddr_reg:x3; val_offset:42207*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42207*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7fff80; valaddr_reg:x3; val_offset:42210*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42210*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7fffc0; valaddr_reg:x3; val_offset:42213*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42213*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7fffe0; valaddr_reg:x3; val_offset:42216*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42216*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7ffff0; valaddr_reg:x3; val_offset:42219*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42219*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7ffff8; valaddr_reg:x3; val_offset:42222*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42222*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7ffffc; valaddr_reg:x3; val_offset:42225*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42225*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7ffffe; valaddr_reg:x3; val_offset:42228*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42228*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfa and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7d7fffff; valaddr_reg:x3; val_offset:42231*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42231*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f000001; valaddr_reg:x3; val_offset:42234*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42234*0 + 3*109*FLEN/8, x4, x1, x2) + +inst_14079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f000003; valaddr_reg:x3; val_offset:42237*0 + 3*109*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42237*0 + 3*109*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644167166,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(1644167167,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2122800244,32,FLEN) +NAN_BOXED(1081218059,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937984,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937985,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937987,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937991,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937999,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938015,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938047,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938111,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938239,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938495,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192939007,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192940031,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192942079,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192946175,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192954367,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192970751,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193003519,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193069055,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193200127,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193462271,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193986559,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(195035135,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(197132287,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(197132288,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(199229440,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(200278016,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(200802304,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201064448,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201195520,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201261056,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201293824,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201310208,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201318400,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201322496,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201324544,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201325568,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326080,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326336,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326464,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326528,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326560,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326576,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326584,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326588,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326590,32,FLEN) +NAN_BOXED(2122832665,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326591,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152000,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152001,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152003,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152007,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152015,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152031,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152063,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152127,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152255,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097152511,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097153023,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097154047,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097156095,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097160191,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097168383,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097184767,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097217535,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097283071,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097414143,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2097676287,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2098200575,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2099249151,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2101346303,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2101346304,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2103443456,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2104492032,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105016320,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105278464,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105409536,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105475072,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105507840,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105524224,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105532416,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105536512,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105538560,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105539584,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540096,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540352,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540480,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540544,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540576,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540592,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540600,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540604,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540606,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2105540607,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-111.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-111.S new file mode 100644 index 000000000..fdb07ae1d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-111.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_14080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f000007; valaddr_reg:x3; val_offset:42240*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42240*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f199999; valaddr_reg:x3; val_offset:42243*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42243*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f249249; valaddr_reg:x3; val_offset:42246*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42246*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f333333; valaddr_reg:x3; val_offset:42249*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42249*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:42252*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42252*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:42255*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42255*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f444444; valaddr_reg:x3; val_offset:42258*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42258*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:42261*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42261*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:42264*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42264*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f666666; valaddr_reg:x3; val_offset:42267*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42267*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:42270*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42270*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:42273*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42273*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:42276*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42276*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x082711 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x70abcc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e882711; op2val:0x4070abcc; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:42279*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42279*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a000000; valaddr_reg:x3; val_offset:42282*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42282*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a000001; valaddr_reg:x3; val_offset:42285*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42285*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a000003; valaddr_reg:x3; val_offset:42288*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42288*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a000007; valaddr_reg:x3; val_offset:42291*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42291*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a00000f; valaddr_reg:x3; val_offset:42294*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42294*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a00001f; valaddr_reg:x3; val_offset:42297*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42297*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a00003f; valaddr_reg:x3; val_offset:42300*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42300*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a00007f; valaddr_reg:x3; val_offset:42303*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42303*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a0000ff; valaddr_reg:x3; val_offset:42306*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42306*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a0001ff; valaddr_reg:x3; val_offset:42309*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42309*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a0003ff; valaddr_reg:x3; val_offset:42312*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42312*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a0007ff; valaddr_reg:x3; val_offset:42315*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42315*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a000fff; valaddr_reg:x3; val_offset:42318*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42318*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a001fff; valaddr_reg:x3; val_offset:42321*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42321*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a003fff; valaddr_reg:x3; val_offset:42324*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42324*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a007fff; valaddr_reg:x3; val_offset:42327*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42327*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a00ffff; valaddr_reg:x3; val_offset:42330*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42330*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a01ffff; valaddr_reg:x3; val_offset:42333*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42333*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a03ffff; valaddr_reg:x3; val_offset:42336*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42336*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a07ffff; valaddr_reg:x3; val_offset:42339*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42339*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a0fffff; valaddr_reg:x3; val_offset:42342*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42342*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a1fffff; valaddr_reg:x3; val_offset:42345*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42345*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a3fffff; valaddr_reg:x3; val_offset:42348*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42348*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a400000; valaddr_reg:x3; val_offset:42351*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42351*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a600000; valaddr_reg:x3; val_offset:42354*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42354*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a700000; valaddr_reg:x3; val_offset:42357*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42357*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a780000; valaddr_reg:x3; val_offset:42360*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42360*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7c0000; valaddr_reg:x3; val_offset:42363*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42363*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7e0000; valaddr_reg:x3; val_offset:42366*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42366*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7f0000; valaddr_reg:x3; val_offset:42369*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42369*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7f8000; valaddr_reg:x3; val_offset:42372*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42372*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7fc000; valaddr_reg:x3; val_offset:42375*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42375*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7fe000; valaddr_reg:x3; val_offset:42378*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42378*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7ff000; valaddr_reg:x3; val_offset:42381*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42381*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7ff800; valaddr_reg:x3; val_offset:42384*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42384*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7ffc00; valaddr_reg:x3; val_offset:42387*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42387*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7ffe00; valaddr_reg:x3; val_offset:42390*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42390*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7fff00; valaddr_reg:x3; val_offset:42393*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42393*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7fff80; valaddr_reg:x3; val_offset:42396*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42396*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7fffc0; valaddr_reg:x3; val_offset:42399*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42399*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7fffe0; valaddr_reg:x3; val_offset:42402*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42402*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7ffff0; valaddr_reg:x3; val_offset:42405*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42405*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7ffff8; valaddr_reg:x3; val_offset:42408*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42408*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7ffffc; valaddr_reg:x3; val_offset:42411*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42411*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7ffffe; valaddr_reg:x3; val_offset:42414*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42414*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x54 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x2a7fffff; valaddr_reg:x3; val_offset:42417*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42417*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:42420*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42420*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:42423*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42423*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:42426*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42426*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:42429*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42429*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:42432*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42432*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:42435*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42435*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:42438*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42438*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:42441*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42441*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:42444*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42444*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:42447*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42447*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:42450*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42450*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:42453*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42453*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:42456*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42456*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:42459*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42459*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:42462*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42462*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x093aa8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x77643d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e893aa8; op2val:0x77643d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:42465*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42465*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:42468*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42468*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:42471*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42471*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:42474*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42474*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:42477*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42477*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:42480*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42480*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:42483*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42483*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:42486*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42486*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:42489*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42489*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:42492*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42492*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:42495*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42495*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:42498*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42498*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:42501*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42501*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:42504*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42504*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:42507*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42507*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:42510*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42510*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:42513*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42513*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3000000; valaddr_reg:x3; val_offset:42516*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42516*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3000001; valaddr_reg:x3; val_offset:42519*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42519*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3000003; valaddr_reg:x3; val_offset:42522*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42522*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3000007; valaddr_reg:x3; val_offset:42525*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42525*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x300000f; valaddr_reg:x3; val_offset:42528*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42528*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x300001f; valaddr_reg:x3; val_offset:42531*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42531*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x300003f; valaddr_reg:x3; val_offset:42534*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42534*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x300007f; valaddr_reg:x3; val_offset:42537*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42537*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x30000ff; valaddr_reg:x3; val_offset:42540*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42540*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x30001ff; valaddr_reg:x3; val_offset:42543*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42543*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x30003ff; valaddr_reg:x3; val_offset:42546*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42546*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x30007ff; valaddr_reg:x3; val_offset:42549*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42549*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3000fff; valaddr_reg:x3; val_offset:42552*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42552*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3001fff; valaddr_reg:x3; val_offset:42555*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42555*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3003fff; valaddr_reg:x3; val_offset:42558*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42558*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3007fff; valaddr_reg:x3; val_offset:42561*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42561*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x300ffff; valaddr_reg:x3; val_offset:42564*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42564*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x301ffff; valaddr_reg:x3; val_offset:42567*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42567*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x303ffff; valaddr_reg:x3; val_offset:42570*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42570*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x307ffff; valaddr_reg:x3; val_offset:42573*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42573*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x30fffff; valaddr_reg:x3; val_offset:42576*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42576*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x31fffff; valaddr_reg:x3; val_offset:42579*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42579*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x33fffff; valaddr_reg:x3; val_offset:42582*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42582*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3400000; valaddr_reg:x3; val_offset:42585*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42585*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3600000; valaddr_reg:x3; val_offset:42588*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42588*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3700000; valaddr_reg:x3; val_offset:42591*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42591*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x3780000; valaddr_reg:x3; val_offset:42594*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42594*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37c0000; valaddr_reg:x3; val_offset:42597*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42597*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37e0000; valaddr_reg:x3; val_offset:42600*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42600*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37f0000; valaddr_reg:x3; val_offset:42603*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42603*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37f8000; valaddr_reg:x3; val_offset:42606*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42606*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37fc000; valaddr_reg:x3; val_offset:42609*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42609*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37fe000; valaddr_reg:x3; val_offset:42612*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42612*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37ff000; valaddr_reg:x3; val_offset:42615*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42615*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37ff800; valaddr_reg:x3; val_offset:42618*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42618*0 + 3*110*FLEN/8, x4, x1, x2) + +inst_14207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37ffc00; valaddr_reg:x3; val_offset:42621*0 + 3*110*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42621*0 + 3*110*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2122852113,32,FLEN) +NAN_BOXED(1081125836,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643072,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643073,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643075,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643079,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643087,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643103,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643135,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643199,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643327,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704643583,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704644095,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704645119,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704647167,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704651263,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704659455,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704675839,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704708607,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704774143,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(704905215,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(705167359,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(705691647,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(706740223,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(708837375,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(708837376,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(710934528,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(711983104,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(712507392,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(712769536,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(712900608,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(712966144,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(712998912,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713015296,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713023488,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713027584,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713029632,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713030656,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031168,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031424,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031552,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031616,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031648,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031664,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031672,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031676,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031678,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(713031679,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2122922664,32,FLEN) +NAN_BOXED(7824445,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331648,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331649,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331651,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331655,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331663,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331679,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331711,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331775,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331903,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50332159,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50332671,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50333695,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50335743,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50339839,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50348031,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50364415,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50397183,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50462719,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50593791,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50855935,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(51380223,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(52428799,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(54525951,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(54525952,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(56623104,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(57671680,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58195968,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58458112,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58589184,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58654720,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58687488,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58703872,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58712064,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58716160,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58718208,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58719232,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-112.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-112.S new file mode 100644 index 000000000..c4224a62d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-112.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_14208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37ffe00; valaddr_reg:x3; val_offset:42624*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42624*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37fff00; valaddr_reg:x3; val_offset:42627*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42627*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37fff80; valaddr_reg:x3; val_offset:42630*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42630*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37fffc0; valaddr_reg:x3; val_offset:42633*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42633*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37fffe0; valaddr_reg:x3; val_offset:42636*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42636*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37ffff0; valaddr_reg:x3; val_offset:42639*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42639*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37ffff8; valaddr_reg:x3; val_offset:42642*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42642*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37ffffc; valaddr_reg:x3; val_offset:42645*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42645*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37ffffe; valaddr_reg:x3; val_offset:42648*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42648*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x097daf and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e897daf; op2val:0x0; +op3val:0x37fffff; valaddr_reg:x3; val_offset:42651*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42651*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:42654*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42654*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:42657*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42657*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:42660*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42660*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:42663*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42663*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:42666*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42666*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:42669*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42669*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:42672*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42672*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:42675*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42675*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:42678*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42678*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:42681*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42681*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:42684*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42684*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:42687*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42687*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:42690*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42690*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:42693*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42693*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:42696*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42696*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:42699*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42699*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d800000; valaddr_reg:x3; val_offset:42702*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42702*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d800001; valaddr_reg:x3; val_offset:42705*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42705*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d800003; valaddr_reg:x3; val_offset:42708*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42708*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d800007; valaddr_reg:x3; val_offset:42711*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42711*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d80000f; valaddr_reg:x3; val_offset:42714*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42714*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d80001f; valaddr_reg:x3; val_offset:42717*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42717*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d80003f; valaddr_reg:x3; val_offset:42720*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42720*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d80007f; valaddr_reg:x3; val_offset:42723*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42723*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d8000ff; valaddr_reg:x3; val_offset:42726*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42726*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d8001ff; valaddr_reg:x3; val_offset:42729*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42729*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d8003ff; valaddr_reg:x3; val_offset:42732*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42732*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d8007ff; valaddr_reg:x3; val_offset:42735*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42735*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d800fff; valaddr_reg:x3; val_offset:42738*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42738*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d801fff; valaddr_reg:x3; val_offset:42741*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42741*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d803fff; valaddr_reg:x3; val_offset:42744*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42744*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d807fff; valaddr_reg:x3; val_offset:42747*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42747*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d80ffff; valaddr_reg:x3; val_offset:42750*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42750*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d81ffff; valaddr_reg:x3; val_offset:42753*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42753*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d83ffff; valaddr_reg:x3; val_offset:42756*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42756*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d87ffff; valaddr_reg:x3; val_offset:42759*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42759*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d8fffff; valaddr_reg:x3; val_offset:42762*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42762*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8d9fffff; valaddr_reg:x3; val_offset:42765*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42765*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dbfffff; valaddr_reg:x3; val_offset:42768*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42768*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dc00000; valaddr_reg:x3; val_offset:42771*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42771*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8de00000; valaddr_reg:x3; val_offset:42774*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42774*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8df00000; valaddr_reg:x3; val_offset:42777*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42777*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8df80000; valaddr_reg:x3; val_offset:42780*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42780*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfc0000; valaddr_reg:x3; val_offset:42783*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42783*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfe0000; valaddr_reg:x3; val_offset:42786*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42786*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dff0000; valaddr_reg:x3; val_offset:42789*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42789*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dff8000; valaddr_reg:x3; val_offset:42792*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42792*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dffc000; valaddr_reg:x3; val_offset:42795*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42795*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dffe000; valaddr_reg:x3; val_offset:42798*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42798*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfff000; valaddr_reg:x3; val_offset:42801*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42801*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfff800; valaddr_reg:x3; val_offset:42804*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42804*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfffc00; valaddr_reg:x3; val_offset:42807*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42807*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfffe00; valaddr_reg:x3; val_offset:42810*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42810*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dffff00; valaddr_reg:x3; val_offset:42813*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42813*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dffff80; valaddr_reg:x3; val_offset:42816*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42816*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dffffc0; valaddr_reg:x3; val_offset:42819*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42819*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dffffe0; valaddr_reg:x3; val_offset:42822*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42822*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfffff0; valaddr_reg:x3; val_offset:42825*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42825*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfffff8; valaddr_reg:x3; val_offset:42828*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42828*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfffffc; valaddr_reg:x3; val_offset:42831*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42831*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dfffffe; valaddr_reg:x3; val_offset:42834*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42834*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0adedc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8adedc; op2val:0x80000000; +op3val:0x8dffffff; valaddr_reg:x3; val_offset:42837*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42837*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65000000; valaddr_reg:x3; val_offset:42840*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42840*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65000001; valaddr_reg:x3; val_offset:42843*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42843*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65000003; valaddr_reg:x3; val_offset:42846*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42846*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65000007; valaddr_reg:x3; val_offset:42849*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42849*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x6500000f; valaddr_reg:x3; val_offset:42852*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42852*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x6500001f; valaddr_reg:x3; val_offset:42855*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42855*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x6500003f; valaddr_reg:x3; val_offset:42858*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42858*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x6500007f; valaddr_reg:x3; val_offset:42861*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42861*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x650000ff; valaddr_reg:x3; val_offset:42864*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42864*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x650001ff; valaddr_reg:x3; val_offset:42867*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42867*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x650003ff; valaddr_reg:x3; val_offset:42870*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42870*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x650007ff; valaddr_reg:x3; val_offset:42873*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42873*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65000fff; valaddr_reg:x3; val_offset:42876*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42876*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65001fff; valaddr_reg:x3; val_offset:42879*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42879*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65003fff; valaddr_reg:x3; val_offset:42882*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42882*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65007fff; valaddr_reg:x3; val_offset:42885*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42885*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x6500ffff; valaddr_reg:x3; val_offset:42888*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42888*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x6501ffff; valaddr_reg:x3; val_offset:42891*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42891*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x6503ffff; valaddr_reg:x3; val_offset:42894*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42894*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x6507ffff; valaddr_reg:x3; val_offset:42897*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42897*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x650fffff; valaddr_reg:x3; val_offset:42900*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42900*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x651fffff; valaddr_reg:x3; val_offset:42903*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42903*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x653fffff; valaddr_reg:x3; val_offset:42906*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42906*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65400000; valaddr_reg:x3; val_offset:42909*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42909*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65600000; valaddr_reg:x3; val_offset:42912*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42912*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65700000; valaddr_reg:x3; val_offset:42915*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42915*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x65780000; valaddr_reg:x3; val_offset:42918*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42918*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657c0000; valaddr_reg:x3; val_offset:42921*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42921*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657e0000; valaddr_reg:x3; val_offset:42924*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42924*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657f0000; valaddr_reg:x3; val_offset:42927*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42927*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657f8000; valaddr_reg:x3; val_offset:42930*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42930*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657fc000; valaddr_reg:x3; val_offset:42933*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42933*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657fe000; valaddr_reg:x3; val_offset:42936*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42936*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657ff000; valaddr_reg:x3; val_offset:42939*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42939*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657ff800; valaddr_reg:x3; val_offset:42942*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42942*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657ffc00; valaddr_reg:x3; val_offset:42945*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42945*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657ffe00; valaddr_reg:x3; val_offset:42948*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42948*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657fff00; valaddr_reg:x3; val_offset:42951*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42951*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657fff80; valaddr_reg:x3; val_offset:42954*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42954*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657fffc0; valaddr_reg:x3; val_offset:42957*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42957*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657fffe0; valaddr_reg:x3; val_offset:42960*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42960*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657ffff0; valaddr_reg:x3; val_offset:42963*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42963*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657ffff8; valaddr_reg:x3; val_offset:42966*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42966*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657ffffc; valaddr_reg:x3; val_offset:42969*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42969*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657ffffe; valaddr_reg:x3; val_offset:42972*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42972*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xca and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x657fffff; valaddr_reg:x3; val_offset:42975*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42975*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f000001; valaddr_reg:x3; val_offset:42978*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42978*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f000003; valaddr_reg:x3; val_offset:42981*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42981*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f000007; valaddr_reg:x3; val_offset:42984*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42984*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f199999; valaddr_reg:x3; val_offset:42987*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42987*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f249249; valaddr_reg:x3; val_offset:42990*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42990*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f333333; valaddr_reg:x3; val_offset:42993*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42993*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:42996*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42996*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:42999*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 42999*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f444444; valaddr_reg:x3; val_offset:43002*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43002*0 + 3*111*FLEN/8, x4, x1, x2) + +inst_14335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:43005*0 + 3*111*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43005*0 + 3*111*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58719744,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720000,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720128,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720192,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720224,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720240,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720248,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720252,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720254,32,FLEN) +NAN_BOXED(2122939823,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720255,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976064,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976065,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976067,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976071,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976079,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976095,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976127,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976191,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976319,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976575,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373977087,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373978111,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373980159,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373984255,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373992447,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374008831,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374041599,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374107135,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374238207,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374500351,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2375024639,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2376073215,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2378170367,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2378170368,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2380267520,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2381316096,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2381840384,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382102528,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382233600,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382299136,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382331904,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382348288,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382356480,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382360576,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382362624,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382363648,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364160,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364416,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364544,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364608,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364640,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364656,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364664,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364668,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364670,32,FLEN) +NAN_BOXED(2123030236,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364671,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694498816,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694498817,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694498819,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694498823,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694498831,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694498847,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694498879,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694498943,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694499071,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694499327,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694499839,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694500863,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694502911,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694507007,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694515199,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694531583,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694564351,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694629887,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1694760959,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1695023103,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1695547391,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1696595967,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1698693119,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1698693120,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1700790272,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1701838848,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702363136,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702625280,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702756352,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702821888,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702854656,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702871040,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702879232,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702883328,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702885376,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702886400,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702886912,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887168,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887296,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887360,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887392,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887408,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887416,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887420,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887422,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(1702887423,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-113.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-113.S new file mode 100644 index 000000000..8eeb7369b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-113.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_14336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:43008*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43008*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f666666; valaddr_reg:x3; val_offset:43011*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43011*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:43014*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43014*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:43017*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43017*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:43020*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43020*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0c77d8 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x6946ee and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8c77d8; op2val:0x406946ee; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:43023*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43023*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbf800001; valaddr_reg:x3; val_offset:43026*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43026*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbf800003; valaddr_reg:x3; val_offset:43029*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43029*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbf800007; valaddr_reg:x3; val_offset:43032*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43032*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbf999999; valaddr_reg:x3; val_offset:43035*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43035*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:43038*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43038*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:43041*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43041*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:43044*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43044*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:43047*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43047*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:43050*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43050*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:43053*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43053*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:43056*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43056*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:43059*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43059*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:43062*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43062*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:43065*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43065*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:43068*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43068*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:43071*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43071*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5800000; valaddr_reg:x3; val_offset:43074*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43074*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5800001; valaddr_reg:x3; val_offset:43077*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43077*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5800003; valaddr_reg:x3; val_offset:43080*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43080*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5800007; valaddr_reg:x3; val_offset:43083*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43083*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc580000f; valaddr_reg:x3; val_offset:43086*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43086*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc580001f; valaddr_reg:x3; val_offset:43089*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43089*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc580003f; valaddr_reg:x3; val_offset:43092*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43092*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc580007f; valaddr_reg:x3; val_offset:43095*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43095*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc58000ff; valaddr_reg:x3; val_offset:43098*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43098*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc58001ff; valaddr_reg:x3; val_offset:43101*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43101*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc58003ff; valaddr_reg:x3; val_offset:43104*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43104*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc58007ff; valaddr_reg:x3; val_offset:43107*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43107*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5800fff; valaddr_reg:x3; val_offset:43110*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43110*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5801fff; valaddr_reg:x3; val_offset:43113*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43113*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5803fff; valaddr_reg:x3; val_offset:43116*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43116*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5807fff; valaddr_reg:x3; val_offset:43119*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43119*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc580ffff; valaddr_reg:x3; val_offset:43122*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43122*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc581ffff; valaddr_reg:x3; val_offset:43125*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43125*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc583ffff; valaddr_reg:x3; val_offset:43128*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43128*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc587ffff; valaddr_reg:x3; val_offset:43131*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43131*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc58fffff; valaddr_reg:x3; val_offset:43134*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43134*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc59fffff; valaddr_reg:x3; val_offset:43137*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43137*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5bfffff; valaddr_reg:x3; val_offset:43140*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43140*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5c00000; valaddr_reg:x3; val_offset:43143*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43143*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5e00000; valaddr_reg:x3; val_offset:43146*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43146*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5f00000; valaddr_reg:x3; val_offset:43149*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43149*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5f80000; valaddr_reg:x3; val_offset:43152*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43152*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fc0000; valaddr_reg:x3; val_offset:43155*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43155*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fe0000; valaddr_reg:x3; val_offset:43158*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43158*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ff0000; valaddr_reg:x3; val_offset:43161*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43161*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ff8000; valaddr_reg:x3; val_offset:43164*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43164*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ffc000; valaddr_reg:x3; val_offset:43167*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43167*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ffe000; valaddr_reg:x3; val_offset:43170*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43170*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fff000; valaddr_reg:x3; val_offset:43173*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43173*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fff800; valaddr_reg:x3; val_offset:43176*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43176*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fffc00; valaddr_reg:x3; val_offset:43179*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43179*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fffe00; valaddr_reg:x3; val_offset:43182*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43182*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ffff00; valaddr_reg:x3; val_offset:43185*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43185*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ffff80; valaddr_reg:x3; val_offset:43188*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43188*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ffffc0; valaddr_reg:x3; val_offset:43191*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43191*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ffffe0; valaddr_reg:x3; val_offset:43194*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43194*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fffff0; valaddr_reg:x3; val_offset:43197*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43197*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fffff8; valaddr_reg:x3; val_offset:43200*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43200*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fffffc; valaddr_reg:x3; val_offset:43203*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43203*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5fffffe; valaddr_reg:x3; val_offset:43206*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43206*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0ce320 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x744aa6 and fs3 == 1 and fe3 == 0x8b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8ce320; op2val:0x80744aa6; +op3val:0xc5ffffff; valaddr_reg:x3; val_offset:43209*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43209*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbf800001; valaddr_reg:x3; val_offset:43212*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43212*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbf800003; valaddr_reg:x3; val_offset:43215*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43215*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbf800007; valaddr_reg:x3; val_offset:43218*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43218*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbf999999; valaddr_reg:x3; val_offset:43221*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43221*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:43224*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43224*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:43227*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43227*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:43230*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43230*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:43233*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43233*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:43236*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43236*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:43239*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43239*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:43242*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43242*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:43245*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43245*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:43248*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43248*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:43251*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43251*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:43254*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43254*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:43257*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43257*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce000000; valaddr_reg:x3; val_offset:43260*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43260*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce000001; valaddr_reg:x3; val_offset:43263*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43263*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce000003; valaddr_reg:x3; val_offset:43266*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43266*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce000007; valaddr_reg:x3; val_offset:43269*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43269*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce00000f; valaddr_reg:x3; val_offset:43272*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43272*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce00001f; valaddr_reg:x3; val_offset:43275*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43275*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce00003f; valaddr_reg:x3; val_offset:43278*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43278*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce00007f; valaddr_reg:x3; val_offset:43281*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43281*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce0000ff; valaddr_reg:x3; val_offset:43284*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43284*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce0001ff; valaddr_reg:x3; val_offset:43287*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43287*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce0003ff; valaddr_reg:x3; val_offset:43290*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43290*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce0007ff; valaddr_reg:x3; val_offset:43293*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43293*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce000fff; valaddr_reg:x3; val_offset:43296*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43296*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce001fff; valaddr_reg:x3; val_offset:43299*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43299*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce003fff; valaddr_reg:x3; val_offset:43302*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43302*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce007fff; valaddr_reg:x3; val_offset:43305*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43305*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce00ffff; valaddr_reg:x3; val_offset:43308*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43308*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce01ffff; valaddr_reg:x3; val_offset:43311*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43311*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce03ffff; valaddr_reg:x3; val_offset:43314*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43314*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce07ffff; valaddr_reg:x3; val_offset:43317*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43317*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce0fffff; valaddr_reg:x3; val_offset:43320*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43320*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce1fffff; valaddr_reg:x3; val_offset:43323*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43323*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce3fffff; valaddr_reg:x3; val_offset:43326*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43326*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce400000; valaddr_reg:x3; val_offset:43329*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43329*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce600000; valaddr_reg:x3; val_offset:43332*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43332*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce700000; valaddr_reg:x3; val_offset:43335*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43335*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce780000; valaddr_reg:x3; val_offset:43338*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43338*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7c0000; valaddr_reg:x3; val_offset:43341*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43341*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7e0000; valaddr_reg:x3; val_offset:43344*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43344*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7f0000; valaddr_reg:x3; val_offset:43347*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43347*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7f8000; valaddr_reg:x3; val_offset:43350*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43350*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7fc000; valaddr_reg:x3; val_offset:43353*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43353*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7fe000; valaddr_reg:x3; val_offset:43356*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43356*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7ff000; valaddr_reg:x3; val_offset:43359*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43359*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7ff800; valaddr_reg:x3; val_offset:43362*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43362*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7ffc00; valaddr_reg:x3; val_offset:43365*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43365*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7ffe00; valaddr_reg:x3; val_offset:43368*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43368*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7fff00; valaddr_reg:x3; val_offset:43371*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43371*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7fff80; valaddr_reg:x3; val_offset:43374*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43374*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7fffc0; valaddr_reg:x3; val_offset:43377*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43377*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7fffe0; valaddr_reg:x3; val_offset:43380*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43380*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7ffff0; valaddr_reg:x3; val_offset:43383*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43383*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7ffff8; valaddr_reg:x3; val_offset:43386*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43386*0 + 3*112*FLEN/8, x4, x1, x2) + +inst_14463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7ffffc; valaddr_reg:x3; val_offset:43389*0 + 3*112*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43389*0 + 3*112*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2123134936,32,FLEN) +NAN_BOXED(1080641262,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500160,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500161,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500163,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500167,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500175,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500191,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500223,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500287,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500415,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313500671,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313501183,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313502207,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313504255,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313508351,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313516543,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313532927,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313565695,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313631231,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3313762303,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3314024447,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3314548735,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3315597311,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3317694463,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3317694464,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3319791616,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3320840192,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321364480,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321626624,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321757696,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321823232,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321856000,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321872384,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321880576,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321884672,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321886720,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321887744,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888256,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888512,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888640,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888704,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888736,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888752,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888760,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888764,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888766,32,FLEN) +NAN_BOXED(2123162400,32,FLEN) +NAN_BOXED(2155104934,32,FLEN) +NAN_BOXED(3321888767,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106496,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106497,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106499,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106503,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106511,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106527,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106559,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106623,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456106751,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456107007,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456107519,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456108543,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456110591,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456114687,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456122879,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456139263,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456172031,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456237567,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456368639,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3456630783,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3457155071,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3458203647,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3460300799,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3460300800,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3462397952,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3463446528,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3463970816,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464232960,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464364032,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464429568,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464462336,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464478720,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464486912,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464491008,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464493056,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464494080,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464494592,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464494848,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464494976,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464495040,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464495072,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464495088,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464495096,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464495100,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-114.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-114.S new file mode 100644 index 000000000..588ed23be --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-114.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_14464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7ffffe; valaddr_reg:x3; val_offset:43392*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43392*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0d015f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x7431b4 and fs3 == 1 and fe3 == 0x9c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8d015f; op2val:0x807431b4; +op3val:0xce7fffff; valaddr_reg:x3; val_offset:43395*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43395*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e800000; valaddr_reg:x3; val_offset:43398*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43398*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e800001; valaddr_reg:x3; val_offset:43401*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43401*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e800003; valaddr_reg:x3; val_offset:43404*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43404*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e800007; valaddr_reg:x3; val_offset:43407*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43407*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e80000f; valaddr_reg:x3; val_offset:43410*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43410*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e80001f; valaddr_reg:x3; val_offset:43413*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43413*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e80003f; valaddr_reg:x3; val_offset:43416*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43416*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e80007f; valaddr_reg:x3; val_offset:43419*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43419*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e8000ff; valaddr_reg:x3; val_offset:43422*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43422*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e8001ff; valaddr_reg:x3; val_offset:43425*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43425*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e8003ff; valaddr_reg:x3; val_offset:43428*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43428*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e8007ff; valaddr_reg:x3; val_offset:43431*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43431*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e800fff; valaddr_reg:x3; val_offset:43434*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43434*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e801fff; valaddr_reg:x3; val_offset:43437*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43437*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e803fff; valaddr_reg:x3; val_offset:43440*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43440*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e807fff; valaddr_reg:x3; val_offset:43443*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43443*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e80ffff; valaddr_reg:x3; val_offset:43446*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43446*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e81ffff; valaddr_reg:x3; val_offset:43449*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43449*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e83ffff; valaddr_reg:x3; val_offset:43452*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43452*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e87ffff; valaddr_reg:x3; val_offset:43455*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43455*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e8fffff; valaddr_reg:x3; val_offset:43458*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43458*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2e9fffff; valaddr_reg:x3; val_offset:43461*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43461*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2ebfffff; valaddr_reg:x3; val_offset:43464*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43464*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2ec00000; valaddr_reg:x3; val_offset:43467*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43467*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2ee00000; valaddr_reg:x3; val_offset:43470*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43470*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2ef00000; valaddr_reg:x3; val_offset:43473*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43473*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2ef80000; valaddr_reg:x3; val_offset:43476*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43476*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efc0000; valaddr_reg:x3; val_offset:43479*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43479*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efe0000; valaddr_reg:x3; val_offset:43482*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43482*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2eff0000; valaddr_reg:x3; val_offset:43485*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43485*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2eff8000; valaddr_reg:x3; val_offset:43488*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43488*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2effc000; valaddr_reg:x3; val_offset:43491*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43491*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2effe000; valaddr_reg:x3; val_offset:43494*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43494*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efff000; valaddr_reg:x3; val_offset:43497*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43497*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efff800; valaddr_reg:x3; val_offset:43500*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43500*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efffc00; valaddr_reg:x3; val_offset:43503*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43503*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efffe00; valaddr_reg:x3; val_offset:43506*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43506*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2effff00; valaddr_reg:x3; val_offset:43509*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43509*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2effff80; valaddr_reg:x3; val_offset:43512*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43512*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2effffc0; valaddr_reg:x3; val_offset:43515*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43515*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2effffe0; valaddr_reg:x3; val_offset:43518*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43518*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efffff0; valaddr_reg:x3; val_offset:43521*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43521*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efffff8; valaddr_reg:x3; val_offset:43524*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43524*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efffffc; valaddr_reg:x3; val_offset:43527*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43527*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2efffffe; valaddr_reg:x3; val_offset:43530*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43530*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x5d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x2effffff; valaddr_reg:x3; val_offset:43533*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43533*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3f800001; valaddr_reg:x3; val_offset:43536*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43536*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3f800003; valaddr_reg:x3; val_offset:43539*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43539*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3f800007; valaddr_reg:x3; val_offset:43542*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43542*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3f999999; valaddr_reg:x3; val_offset:43545*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43545*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:43548*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43548*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:43551*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43551*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:43554*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43554*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:43557*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43557*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:43560*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43560*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:43563*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43563*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:43566*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43566*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:43569*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43569*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:43572*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43572*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:43575*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43575*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:43578*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43578*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0edf00 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x72ad42 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8edf00; op2val:0x72ad42; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:43581*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43581*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77000000; valaddr_reg:x3; val_offset:43584*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43584*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77000001; valaddr_reg:x3; val_offset:43587*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43587*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77000003; valaddr_reg:x3; val_offset:43590*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43590*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77000007; valaddr_reg:x3; val_offset:43593*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43593*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7700000f; valaddr_reg:x3; val_offset:43596*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43596*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7700001f; valaddr_reg:x3; val_offset:43599*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43599*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7700003f; valaddr_reg:x3; val_offset:43602*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43602*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7700007f; valaddr_reg:x3; val_offset:43605*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43605*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x770000ff; valaddr_reg:x3; val_offset:43608*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43608*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x770001ff; valaddr_reg:x3; val_offset:43611*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43611*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x770003ff; valaddr_reg:x3; val_offset:43614*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43614*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x770007ff; valaddr_reg:x3; val_offset:43617*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43617*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77000fff; valaddr_reg:x3; val_offset:43620*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43620*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77001fff; valaddr_reg:x3; val_offset:43623*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43623*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77003fff; valaddr_reg:x3; val_offset:43626*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43626*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77007fff; valaddr_reg:x3; val_offset:43629*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43629*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7700ffff; valaddr_reg:x3; val_offset:43632*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43632*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7701ffff; valaddr_reg:x3; val_offset:43635*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43635*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7703ffff; valaddr_reg:x3; val_offset:43638*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43638*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7707ffff; valaddr_reg:x3; val_offset:43641*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43641*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x770fffff; valaddr_reg:x3; val_offset:43644*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43644*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x771fffff; valaddr_reg:x3; val_offset:43647*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43647*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x773fffff; valaddr_reg:x3; val_offset:43650*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43650*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77400000; valaddr_reg:x3; val_offset:43653*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43653*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77600000; valaddr_reg:x3; val_offset:43656*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43656*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77700000; valaddr_reg:x3; val_offset:43659*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43659*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x77780000; valaddr_reg:x3; val_offset:43662*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43662*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777c0000; valaddr_reg:x3; val_offset:43665*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43665*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777e0000; valaddr_reg:x3; val_offset:43668*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43668*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777f0000; valaddr_reg:x3; val_offset:43671*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43671*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777f8000; valaddr_reg:x3; val_offset:43674*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43674*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777fc000; valaddr_reg:x3; val_offset:43677*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43677*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777fe000; valaddr_reg:x3; val_offset:43680*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43680*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777ff000; valaddr_reg:x3; val_offset:43683*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43683*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777ff800; valaddr_reg:x3; val_offset:43686*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43686*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777ffc00; valaddr_reg:x3; val_offset:43689*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43689*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777ffe00; valaddr_reg:x3; val_offset:43692*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43692*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777fff00; valaddr_reg:x3; val_offset:43695*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43695*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777fff80; valaddr_reg:x3; val_offset:43698*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43698*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777fffc0; valaddr_reg:x3; val_offset:43701*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43701*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777fffe0; valaddr_reg:x3; val_offset:43704*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43704*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777ffff0; valaddr_reg:x3; val_offset:43707*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43707*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777ffff8; valaddr_reg:x3; val_offset:43710*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43710*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777ffffc; valaddr_reg:x3; val_offset:43713*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43713*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777ffffe; valaddr_reg:x3; val_offset:43716*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43716*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xee and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x777fffff; valaddr_reg:x3; val_offset:43719*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43719*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f000001; valaddr_reg:x3; val_offset:43722*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43722*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f000003; valaddr_reg:x3; val_offset:43725*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43725*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f000007; valaddr_reg:x3; val_offset:43728*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43728*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f199999; valaddr_reg:x3; val_offset:43731*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43731*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f249249; valaddr_reg:x3; val_offset:43734*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43734*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f333333; valaddr_reg:x3; val_offset:43737*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43737*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:43740*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43740*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:43743*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43743*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f444444; valaddr_reg:x3; val_offset:43746*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43746*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:43749*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43749*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:43752*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43752*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f666666; valaddr_reg:x3; val_offset:43755*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43755*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:43758*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43758*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:43761*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43761*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:43764*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43764*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x0f067e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x651b2f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e8f067e; op2val:0x40651b2f; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:43767*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43767*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:43770*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43770*0 + 3*113*FLEN/8, x4, x1, x2) + +inst_14591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:43773*0 + 3*113*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43773*0 + 3*113*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464495102,32,FLEN) +NAN_BOXED(2123170143,32,FLEN) +NAN_BOXED(2155098548,32,FLEN) +NAN_BOXED(3464495103,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140544,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140545,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140547,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140551,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140559,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140575,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140607,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140671,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780140799,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780141055,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780141567,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780142591,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780144639,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780148735,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780156927,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780173311,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780206079,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780271615,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780402687,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(780664831,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(781189119,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(782237695,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(784334847,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(784334848,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(786432000,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(787480576,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788004864,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788267008,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788398080,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788463616,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788496384,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788512768,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788520960,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788525056,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788527104,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788528128,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788528640,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788528896,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788529024,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788529088,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788529120,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788529136,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788529144,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788529148,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788529150,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(788529151,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2123292416,32,FLEN) +NAN_BOXED(7515458,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488704,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488705,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488707,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488711,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488719,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488735,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488767,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488831,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996488959,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996489215,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996489727,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996490751,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996492799,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996496895,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996505087,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996521471,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996554239,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996619775,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1996750847,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1997012991,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1997537279,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(1998585855,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2000683007,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2000683008,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2002780160,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2003828736,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004353024,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004615168,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004746240,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004811776,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004844544,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004860928,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004869120,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004873216,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004875264,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004876288,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004876800,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877056,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877184,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877248,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877280,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877296,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877304,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877308,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877310,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2004877311,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2123302526,32,FLEN) +NAN_BOXED(1080367919,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-115.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-115.S new file mode 100644 index 000000000..a99d6f398 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-115.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_14592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:43776*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43776*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:43779*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43779*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:43782*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43782*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:43785*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43785*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:43788*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43788*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:43791*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43791*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:43794*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43794*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:43797*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43797*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:43800*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43800*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:43803*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43803*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:43806*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43806*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:43809*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43809*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:43812*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43812*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:43815*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43815*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd800000; valaddr_reg:x3; val_offset:43818*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43818*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd800001; valaddr_reg:x3; val_offset:43821*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43821*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd800003; valaddr_reg:x3; val_offset:43824*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43824*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd800007; valaddr_reg:x3; val_offset:43827*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43827*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd80000f; valaddr_reg:x3; val_offset:43830*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43830*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd80001f; valaddr_reg:x3; val_offset:43833*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43833*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd80003f; valaddr_reg:x3; val_offset:43836*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43836*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd80007f; valaddr_reg:x3; val_offset:43839*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43839*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd8000ff; valaddr_reg:x3; val_offset:43842*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43842*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd8001ff; valaddr_reg:x3; val_offset:43845*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43845*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd8003ff; valaddr_reg:x3; val_offset:43848*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43848*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd8007ff; valaddr_reg:x3; val_offset:43851*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43851*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd800fff; valaddr_reg:x3; val_offset:43854*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43854*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd801fff; valaddr_reg:x3; val_offset:43857*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43857*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd803fff; valaddr_reg:x3; val_offset:43860*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43860*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd807fff; valaddr_reg:x3; val_offset:43863*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43863*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd80ffff; valaddr_reg:x3; val_offset:43866*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43866*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd81ffff; valaddr_reg:x3; val_offset:43869*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43869*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd83ffff; valaddr_reg:x3; val_offset:43872*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43872*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd87ffff; valaddr_reg:x3; val_offset:43875*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43875*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd8fffff; valaddr_reg:x3; val_offset:43878*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43878*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xd9fffff; valaddr_reg:x3; val_offset:43881*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43881*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdbfffff; valaddr_reg:x3; val_offset:43884*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43884*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdc00000; valaddr_reg:x3; val_offset:43887*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43887*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xde00000; valaddr_reg:x3; val_offset:43890*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43890*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdf00000; valaddr_reg:x3; val_offset:43893*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43893*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdf80000; valaddr_reg:x3; val_offset:43896*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43896*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfc0000; valaddr_reg:x3; val_offset:43899*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43899*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfe0000; valaddr_reg:x3; val_offset:43902*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43902*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdff0000; valaddr_reg:x3; val_offset:43905*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43905*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdff8000; valaddr_reg:x3; val_offset:43908*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43908*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdffc000; valaddr_reg:x3; val_offset:43911*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43911*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdffe000; valaddr_reg:x3; val_offset:43914*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43914*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfff000; valaddr_reg:x3; val_offset:43917*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43917*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfff800; valaddr_reg:x3; val_offset:43920*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43920*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfffc00; valaddr_reg:x3; val_offset:43923*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43923*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfffe00; valaddr_reg:x3; val_offset:43926*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43926*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdffff00; valaddr_reg:x3; val_offset:43929*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43929*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdffff80; valaddr_reg:x3; val_offset:43932*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43932*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdffffc0; valaddr_reg:x3; val_offset:43935*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43935*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdffffe0; valaddr_reg:x3; val_offset:43938*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43938*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfffff0; valaddr_reg:x3; val_offset:43941*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43941*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfffff8; valaddr_reg:x3; val_offset:43944*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43944*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfffffc; valaddr_reg:x3; val_offset:43947*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43947*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdfffffe; valaddr_reg:x3; val_offset:43950*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43950*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x10382a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e90382a; op2val:0x0; +op3val:0xdffffff; valaddr_reg:x3; val_offset:43953*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43953*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbf800001; valaddr_reg:x3; val_offset:43956*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43956*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbf800003; valaddr_reg:x3; val_offset:43959*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43959*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbf800007; valaddr_reg:x3; val_offset:43962*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43962*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbf999999; valaddr_reg:x3; val_offset:43965*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43965*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:43968*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43968*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:43971*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43971*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:43974*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43974*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:43977*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43977*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:43980*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43980*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:43983*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43983*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:43986*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43986*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:43989*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43989*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:43992*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43992*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:43995*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43995*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:43998*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 43998*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:44001*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44001*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb800000; valaddr_reg:x3; val_offset:44004*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44004*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb800001; valaddr_reg:x3; val_offset:44007*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44007*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb800003; valaddr_reg:x3; val_offset:44010*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44010*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb800007; valaddr_reg:x3; val_offset:44013*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44013*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb80000f; valaddr_reg:x3; val_offset:44016*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44016*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb80001f; valaddr_reg:x3; val_offset:44019*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44019*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb80003f; valaddr_reg:x3; val_offset:44022*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44022*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb80007f; valaddr_reg:x3; val_offset:44025*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44025*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb8000ff; valaddr_reg:x3; val_offset:44028*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44028*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb8001ff; valaddr_reg:x3; val_offset:44031*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44031*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb8003ff; valaddr_reg:x3; val_offset:44034*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44034*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb8007ff; valaddr_reg:x3; val_offset:44037*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44037*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb800fff; valaddr_reg:x3; val_offset:44040*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44040*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb801fff; valaddr_reg:x3; val_offset:44043*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44043*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb803fff; valaddr_reg:x3; val_offset:44046*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44046*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb807fff; valaddr_reg:x3; val_offset:44049*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44049*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb80ffff; valaddr_reg:x3; val_offset:44052*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44052*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb81ffff; valaddr_reg:x3; val_offset:44055*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44055*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb83ffff; valaddr_reg:x3; val_offset:44058*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44058*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb87ffff; valaddr_reg:x3; val_offset:44061*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44061*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb8fffff; valaddr_reg:x3; val_offset:44064*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44064*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcb9fffff; valaddr_reg:x3; val_offset:44067*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44067*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbbfffff; valaddr_reg:x3; val_offset:44070*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44070*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbc00000; valaddr_reg:x3; val_offset:44073*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44073*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbe00000; valaddr_reg:x3; val_offset:44076*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44076*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbf00000; valaddr_reg:x3; val_offset:44079*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44079*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbf80000; valaddr_reg:x3; val_offset:44082*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44082*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfc0000; valaddr_reg:x3; val_offset:44085*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44085*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfe0000; valaddr_reg:x3; val_offset:44088*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44088*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbff0000; valaddr_reg:x3; val_offset:44091*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44091*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbff8000; valaddr_reg:x3; val_offset:44094*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44094*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbffc000; valaddr_reg:x3; val_offset:44097*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44097*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbffe000; valaddr_reg:x3; val_offset:44100*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44100*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfff000; valaddr_reg:x3; val_offset:44103*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44103*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfff800; valaddr_reg:x3; val_offset:44106*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44106*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfffc00; valaddr_reg:x3; val_offset:44109*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44109*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfffe00; valaddr_reg:x3; val_offset:44112*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44112*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbffff00; valaddr_reg:x3; val_offset:44115*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44115*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbffff80; valaddr_reg:x3; val_offset:44118*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44118*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbffffc0; valaddr_reg:x3; val_offset:44121*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44121*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbffffe0; valaddr_reg:x3; val_offset:44124*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44124*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfffff0; valaddr_reg:x3; val_offset:44127*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44127*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfffff8; valaddr_reg:x3; val_offset:44130*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44130*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfffffc; valaddr_reg:x3; val_offset:44133*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44133*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbfffffe; valaddr_reg:x3; val_offset:44136*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44136*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1038e8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x719a37 and fs3 == 1 and fe3 == 0x97 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9038e8; op2val:0x80719a37; +op3val:0xcbffffff; valaddr_reg:x3; val_offset:44139*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44139*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73800000; valaddr_reg:x3; val_offset:44142*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44142*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73800001; valaddr_reg:x3; val_offset:44145*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44145*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73800003; valaddr_reg:x3; val_offset:44148*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44148*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73800007; valaddr_reg:x3; val_offset:44151*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44151*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7380000f; valaddr_reg:x3; val_offset:44154*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44154*0 + 3*114*FLEN/8, x4, x1, x2) + +inst_14719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7380001f; valaddr_reg:x3; val_offset:44157*0 + 3*114*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44157*0 + 3*114*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492416,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492417,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492419,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492423,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492431,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492447,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492479,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492543,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492671,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492927,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226493439,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226494463,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226496511,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226500607,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226508799,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226525183,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226557951,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226623487,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226754559,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(227016703,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(227540991,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(228589567,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(230686719,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(230686720,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(232783872,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(233832448,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234356736,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234618880,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234749952,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234815488,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234848256,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234864640,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234872832,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234876928,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234878976,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880000,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880512,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880768,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880896,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880960,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880992,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881008,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881016,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881020,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881022,32,FLEN) +NAN_BOXED(2123380778,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881023,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163456,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163457,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163459,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163463,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163471,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163487,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163519,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163583,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163711,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414163967,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414164479,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414165503,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414167551,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414171647,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414179839,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414196223,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414228991,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414294527,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414425599,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3414687743,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3415212031,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3416260607,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3418357759,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3418357760,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3420454912,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3421503488,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422027776,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422289920,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422420992,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422486528,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422519296,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422535680,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422543872,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422547968,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422550016,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422551040,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422551552,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422551808,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422551936,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422552000,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422552032,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422552048,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422552056,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422552060,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422552062,32,FLEN) +NAN_BOXED(2123380968,32,FLEN) +NAN_BOXED(2154928695,32,FLEN) +NAN_BOXED(3422552063,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768448,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768449,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768451,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768455,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768463,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768479,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-116.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-116.S new file mode 100644 index 000000000..59a630f4f --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-116.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_14720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7380003f; valaddr_reg:x3; val_offset:44160*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44160*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7380007f; valaddr_reg:x3; val_offset:44163*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44163*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x738000ff; valaddr_reg:x3; val_offset:44166*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44166*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x738001ff; valaddr_reg:x3; val_offset:44169*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44169*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x738003ff; valaddr_reg:x3; val_offset:44172*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44172*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x738007ff; valaddr_reg:x3; val_offset:44175*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44175*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73800fff; valaddr_reg:x3; val_offset:44178*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44178*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73801fff; valaddr_reg:x3; val_offset:44181*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44181*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73803fff; valaddr_reg:x3; val_offset:44184*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44184*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73807fff; valaddr_reg:x3; val_offset:44187*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44187*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7380ffff; valaddr_reg:x3; val_offset:44190*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44190*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7381ffff; valaddr_reg:x3; val_offset:44193*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44193*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7383ffff; valaddr_reg:x3; val_offset:44196*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44196*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7387ffff; valaddr_reg:x3; val_offset:44199*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44199*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x738fffff; valaddr_reg:x3; val_offset:44202*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44202*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x739fffff; valaddr_reg:x3; val_offset:44205*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44205*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73bfffff; valaddr_reg:x3; val_offset:44208*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44208*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73c00000; valaddr_reg:x3; val_offset:44211*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44211*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73e00000; valaddr_reg:x3; val_offset:44214*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44214*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73f00000; valaddr_reg:x3; val_offset:44217*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44217*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73f80000; valaddr_reg:x3; val_offset:44220*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44220*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fc0000; valaddr_reg:x3; val_offset:44223*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44223*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fe0000; valaddr_reg:x3; val_offset:44226*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44226*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ff0000; valaddr_reg:x3; val_offset:44229*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44229*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ff8000; valaddr_reg:x3; val_offset:44232*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44232*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ffc000; valaddr_reg:x3; val_offset:44235*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44235*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ffe000; valaddr_reg:x3; val_offset:44238*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44238*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fff000; valaddr_reg:x3; val_offset:44241*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44241*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fff800; valaddr_reg:x3; val_offset:44244*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44244*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fffc00; valaddr_reg:x3; val_offset:44247*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44247*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fffe00; valaddr_reg:x3; val_offset:44250*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44250*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ffff00; valaddr_reg:x3; val_offset:44253*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44253*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ffff80; valaddr_reg:x3; val_offset:44256*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44256*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ffffc0; valaddr_reg:x3; val_offset:44259*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44259*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ffffe0; valaddr_reg:x3; val_offset:44262*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44262*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fffff0; valaddr_reg:x3; val_offset:44265*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44265*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fffff8; valaddr_reg:x3; val_offset:44268*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44268*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fffffc; valaddr_reg:x3; val_offset:44271*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44271*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73fffffe; valaddr_reg:x3; val_offset:44274*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44274*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xe7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x73ffffff; valaddr_reg:x3; val_offset:44277*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44277*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f000001; valaddr_reg:x3; val_offset:44280*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44280*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f000003; valaddr_reg:x3; val_offset:44283*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44283*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f000007; valaddr_reg:x3; val_offset:44286*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44286*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f199999; valaddr_reg:x3; val_offset:44289*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44289*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f249249; valaddr_reg:x3; val_offset:44292*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44292*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f333333; valaddr_reg:x3; val_offset:44295*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44295*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:44298*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44298*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:44301*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44301*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f444444; valaddr_reg:x3; val_offset:44304*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44304*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:44307*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44307*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:44310*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44310*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f666666; valaddr_reg:x3; val_offset:44313*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44313*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:44316*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44316*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:44319*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44319*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:44322*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44322*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x109c32 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x62986e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e909c32; op2val:0x4062986e; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:44325*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44325*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:44328*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44328*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:44331*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44331*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:44334*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44334*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:44337*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44337*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:44340*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44340*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:44343*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44343*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:44346*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44346*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:44349*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44349*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:44352*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44352*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:44355*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44355*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:44358*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44358*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:44361*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44361*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:44364*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44364*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:44367*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44367*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:44370*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44370*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:44373*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44373*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1000000; valaddr_reg:x3; val_offset:44376*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44376*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1000001; valaddr_reg:x3; val_offset:44379*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44379*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1000003; valaddr_reg:x3; val_offset:44382*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44382*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1000007; valaddr_reg:x3; val_offset:44385*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44385*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd100000f; valaddr_reg:x3; val_offset:44388*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44388*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd100001f; valaddr_reg:x3; val_offset:44391*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44391*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd100003f; valaddr_reg:x3; val_offset:44394*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44394*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd100007f; valaddr_reg:x3; val_offset:44397*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44397*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd10000ff; valaddr_reg:x3; val_offset:44400*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44400*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd10001ff; valaddr_reg:x3; val_offset:44403*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44403*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd10003ff; valaddr_reg:x3; val_offset:44406*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44406*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd10007ff; valaddr_reg:x3; val_offset:44409*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44409*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1000fff; valaddr_reg:x3; val_offset:44412*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44412*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1001fff; valaddr_reg:x3; val_offset:44415*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44415*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1003fff; valaddr_reg:x3; val_offset:44418*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44418*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1007fff; valaddr_reg:x3; val_offset:44421*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44421*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd100ffff; valaddr_reg:x3; val_offset:44424*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44424*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd101ffff; valaddr_reg:x3; val_offset:44427*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44427*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd103ffff; valaddr_reg:x3; val_offset:44430*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44430*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd107ffff; valaddr_reg:x3; val_offset:44433*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44433*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd10fffff; valaddr_reg:x3; val_offset:44436*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44436*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd11fffff; valaddr_reg:x3; val_offset:44439*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44439*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd13fffff; valaddr_reg:x3; val_offset:44442*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44442*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1400000; valaddr_reg:x3; val_offset:44445*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44445*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1600000; valaddr_reg:x3; val_offset:44448*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44448*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1700000; valaddr_reg:x3; val_offset:44451*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44451*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd1780000; valaddr_reg:x3; val_offset:44454*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44454*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17c0000; valaddr_reg:x3; val_offset:44457*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44457*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17e0000; valaddr_reg:x3; val_offset:44460*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44460*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17f0000; valaddr_reg:x3; val_offset:44463*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44463*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17f8000; valaddr_reg:x3; val_offset:44466*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44466*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17fc000; valaddr_reg:x3; val_offset:44469*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44469*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17fe000; valaddr_reg:x3; val_offset:44472*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44472*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17ff000; valaddr_reg:x3; val_offset:44475*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44475*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17ff800; valaddr_reg:x3; val_offset:44478*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44478*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17ffc00; valaddr_reg:x3; val_offset:44481*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44481*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17ffe00; valaddr_reg:x3; val_offset:44484*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44484*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17fff00; valaddr_reg:x3; val_offset:44487*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44487*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17fff80; valaddr_reg:x3; val_offset:44490*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44490*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17fffc0; valaddr_reg:x3; val_offset:44493*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44493*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17fffe0; valaddr_reg:x3; val_offset:44496*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44496*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17ffff0; valaddr_reg:x3; val_offset:44499*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44499*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17ffff8; valaddr_reg:x3; val_offset:44502*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44502*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17ffffc; valaddr_reg:x3; val_offset:44505*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44505*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17ffffe; valaddr_reg:x3; val_offset:44508*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44508*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x12c6fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xa2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e92c6fc; op2val:0x80000000; +op3val:0xd17fffff; valaddr_reg:x3; val_offset:44511*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44511*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:44514*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44514*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:44517*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44517*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:44520*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44520*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:44523*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44523*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:44526*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44526*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:44529*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44529*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:44532*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44532*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:44535*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44535*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:44538*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44538*0 + 3*115*FLEN/8, x4, x1, x2) + +inst_14847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:44541*0 + 3*115*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44541*0 + 3*115*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768511,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768575,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768703,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937768959,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937769471,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937770495,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937772543,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937776639,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937784831,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937801215,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937833983,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1937899519,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1938030591,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1938292735,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1938817023,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1939865599,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1941962751,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1941962752,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1944059904,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1945108480,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1945632768,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1945894912,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946025984,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946091520,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946124288,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946140672,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946148864,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946152960,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946155008,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946156032,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946156544,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946156800,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946156928,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946156992,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946157024,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946157040,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946157048,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946157052,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946157054,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(1946157055,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2123406386,32,FLEN) +NAN_BOXED(1080203374,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438144,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438145,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438147,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438151,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438159,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438175,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438207,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438271,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438399,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506438655,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506439167,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506440191,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506442239,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506446335,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506454527,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506470911,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506503679,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506569215,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506700287,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3506962431,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3507486719,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3508535295,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3510632447,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3510632448,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3512729600,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3513778176,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514302464,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514564608,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514695680,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514761216,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514793984,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514810368,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514818560,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514822656,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514824704,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514825728,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826240,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826496,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826624,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826688,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826720,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826736,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826744,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826748,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826750,32,FLEN) +NAN_BOXED(2123548412,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(3514826751,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-117.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-117.S new file mode 100644 index 000000000..1d734cbbc --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-117.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_14848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:44544*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44544*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:44547*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44547*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:44550*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44550*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:44553*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44553*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:44556*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44556*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:44559*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44559*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa000000; valaddr_reg:x3; val_offset:44562*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44562*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa000001; valaddr_reg:x3; val_offset:44565*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44565*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa000003; valaddr_reg:x3; val_offset:44568*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44568*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa000007; valaddr_reg:x3; val_offset:44571*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44571*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa00000f; valaddr_reg:x3; val_offset:44574*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44574*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa00001f; valaddr_reg:x3; val_offset:44577*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44577*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa00003f; valaddr_reg:x3; val_offset:44580*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44580*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa00007f; valaddr_reg:x3; val_offset:44583*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44583*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa0000ff; valaddr_reg:x3; val_offset:44586*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44586*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa0001ff; valaddr_reg:x3; val_offset:44589*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44589*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa0003ff; valaddr_reg:x3; val_offset:44592*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44592*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa0007ff; valaddr_reg:x3; val_offset:44595*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44595*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa000fff; valaddr_reg:x3; val_offset:44598*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44598*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa001fff; valaddr_reg:x3; val_offset:44601*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44601*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa003fff; valaddr_reg:x3; val_offset:44604*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44604*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa007fff; valaddr_reg:x3; val_offset:44607*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44607*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa00ffff; valaddr_reg:x3; val_offset:44610*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44610*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa01ffff; valaddr_reg:x3; val_offset:44613*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44613*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa03ffff; valaddr_reg:x3; val_offset:44616*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44616*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa07ffff; valaddr_reg:x3; val_offset:44619*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44619*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa0fffff; valaddr_reg:x3; val_offset:44622*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44622*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa1fffff; valaddr_reg:x3; val_offset:44625*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44625*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa3fffff; valaddr_reg:x3; val_offset:44628*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44628*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa400000; valaddr_reg:x3; val_offset:44631*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44631*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa600000; valaddr_reg:x3; val_offset:44634*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44634*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa700000; valaddr_reg:x3; val_offset:44637*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44637*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa780000; valaddr_reg:x3; val_offset:44640*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44640*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7c0000; valaddr_reg:x3; val_offset:44643*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44643*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7e0000; valaddr_reg:x3; val_offset:44646*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44646*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7f0000; valaddr_reg:x3; val_offset:44649*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44649*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7f8000; valaddr_reg:x3; val_offset:44652*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44652*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7fc000; valaddr_reg:x3; val_offset:44655*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44655*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7fe000; valaddr_reg:x3; val_offset:44658*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44658*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7ff000; valaddr_reg:x3; val_offset:44661*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44661*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7ff800; valaddr_reg:x3; val_offset:44664*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44664*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7ffc00; valaddr_reg:x3; val_offset:44667*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44667*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7ffe00; valaddr_reg:x3; val_offset:44670*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44670*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7fff00; valaddr_reg:x3; val_offset:44673*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44673*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7fff80; valaddr_reg:x3; val_offset:44676*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44676*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7fffc0; valaddr_reg:x3; val_offset:44679*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44679*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7fffe0; valaddr_reg:x3; val_offset:44682*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44682*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7ffff0; valaddr_reg:x3; val_offset:44685*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44685*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7ffff8; valaddr_reg:x3; val_offset:44688*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44688*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7ffffc; valaddr_reg:x3; val_offset:44691*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44691*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7ffffe; valaddr_reg:x3; val_offset:44694*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44694*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x133b22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e933b22; op2val:0x0; +op3val:0xa7fffff; valaddr_reg:x3; val_offset:44697*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44697*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:44700*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44700*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:44703*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44703*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:44706*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44706*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:44709*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44709*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:44712*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44712*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:44715*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44715*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:44718*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44718*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:44721*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44721*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:44724*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44724*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:44727*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44727*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:44730*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44730*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:44733*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44733*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:44736*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44736*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:44739*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44739*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:44742*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44742*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:44745*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44745*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e800000; valaddr_reg:x3; val_offset:44748*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44748*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e800001; valaddr_reg:x3; val_offset:44751*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44751*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e800003; valaddr_reg:x3; val_offset:44754*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44754*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e800007; valaddr_reg:x3; val_offset:44757*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44757*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e80000f; valaddr_reg:x3; val_offset:44760*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44760*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e80001f; valaddr_reg:x3; val_offset:44763*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44763*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e80003f; valaddr_reg:x3; val_offset:44766*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44766*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e80007f; valaddr_reg:x3; val_offset:44769*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44769*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e8000ff; valaddr_reg:x3; val_offset:44772*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44772*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e8001ff; valaddr_reg:x3; val_offset:44775*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44775*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e8003ff; valaddr_reg:x3; val_offset:44778*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44778*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e8007ff; valaddr_reg:x3; val_offset:44781*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44781*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e800fff; valaddr_reg:x3; val_offset:44784*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44784*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e801fff; valaddr_reg:x3; val_offset:44787*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44787*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e803fff; valaddr_reg:x3; val_offset:44790*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44790*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e807fff; valaddr_reg:x3; val_offset:44793*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44793*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e80ffff; valaddr_reg:x3; val_offset:44796*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44796*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e81ffff; valaddr_reg:x3; val_offset:44799*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44799*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e83ffff; valaddr_reg:x3; val_offset:44802*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44802*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e87ffff; valaddr_reg:x3; val_offset:44805*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44805*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e8fffff; valaddr_reg:x3; val_offset:44808*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44808*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8e9fffff; valaddr_reg:x3; val_offset:44811*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44811*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8ebfffff; valaddr_reg:x3; val_offset:44814*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44814*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8ec00000; valaddr_reg:x3; val_offset:44817*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44817*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8ee00000; valaddr_reg:x3; val_offset:44820*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44820*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8ef00000; valaddr_reg:x3; val_offset:44823*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44823*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8ef80000; valaddr_reg:x3; val_offset:44826*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44826*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efc0000; valaddr_reg:x3; val_offset:44829*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44829*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efe0000; valaddr_reg:x3; val_offset:44832*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44832*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8eff0000; valaddr_reg:x3; val_offset:44835*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44835*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8eff8000; valaddr_reg:x3; val_offset:44838*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44838*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8effc000; valaddr_reg:x3; val_offset:44841*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44841*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8effe000; valaddr_reg:x3; val_offset:44844*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44844*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efff000; valaddr_reg:x3; val_offset:44847*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44847*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efff800; valaddr_reg:x3; val_offset:44850*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44850*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efffc00; valaddr_reg:x3; val_offset:44853*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44853*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efffe00; valaddr_reg:x3; val_offset:44856*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44856*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8effff00; valaddr_reg:x3; val_offset:44859*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44859*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8effff80; valaddr_reg:x3; val_offset:44862*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44862*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8effffc0; valaddr_reg:x3; val_offset:44865*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44865*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8effffe0; valaddr_reg:x3; val_offset:44868*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44868*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efffff0; valaddr_reg:x3; val_offset:44871*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44871*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efffff8; valaddr_reg:x3; val_offset:44874*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44874*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efffffc; valaddr_reg:x3; val_offset:44877*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44877*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8efffffe; valaddr_reg:x3; val_offset:44880*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44880*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x135538 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e935538; op2val:0x80000000; +op3val:0x8effffff; valaddr_reg:x3; val_offset:44883*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44883*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:44886*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44886*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:44889*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44889*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:44892*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44892*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:44895*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44895*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:44898*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44898*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:44901*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44901*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:44904*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44904*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:44907*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44907*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:44910*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44910*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:44913*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44913*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:44916*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44916*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:44919*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44919*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:44922*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44922*0 + 3*116*FLEN/8, x4, x1, x2) + +inst_14975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:44925*0 + 3*116*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44925*0 + 3*116*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772160,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772161,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772163,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772167,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772175,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772191,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772223,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772287,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772415,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772671,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167773183,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167774207,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167776255,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167780351,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167788543,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167804927,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167837695,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167903231,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168034303,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168296447,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168820735,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(169869311,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(171966463,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(171966464,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(174063616,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175112192,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175636480,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175898624,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176029696,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176095232,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176128000,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176144384,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176152576,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176156672,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176158720,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176159744,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160256,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160512,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160640,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160704,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160736,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160752,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160760,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160764,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160766,32,FLEN) +NAN_BOXED(2123578146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160767,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753280,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753281,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753283,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753287,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753295,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753311,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753343,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753407,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753535,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753791,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390754303,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390755327,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390757375,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390761471,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390769663,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390786047,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390818815,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390884351,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391015423,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391277567,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391801855,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2392850431,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2394947583,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2394947584,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2397044736,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398093312,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398617600,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398879744,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399010816,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399076352,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399109120,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399125504,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399133696,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399137792,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399139840,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399140864,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141376,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141632,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141760,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141824,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141856,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141872,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141880,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141884,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141886,32,FLEN) +NAN_BOXED(2123584824,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141887,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-118.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-118.S new file mode 100644 index 000000000..d04714a59 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-118.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_14976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:44928*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44928*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:44931*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44931*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e000000; valaddr_reg:x3; val_offset:44934*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44934*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e000001; valaddr_reg:x3; val_offset:44937*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44937*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e000003; valaddr_reg:x3; val_offset:44940*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44940*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e000007; valaddr_reg:x3; val_offset:44943*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44943*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e00000f; valaddr_reg:x3; val_offset:44946*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44946*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e00001f; valaddr_reg:x3; val_offset:44949*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44949*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e00003f; valaddr_reg:x3; val_offset:44952*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44952*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e00007f; valaddr_reg:x3; val_offset:44955*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44955*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e0000ff; valaddr_reg:x3; val_offset:44958*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44958*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e0001ff; valaddr_reg:x3; val_offset:44961*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44961*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e0003ff; valaddr_reg:x3; val_offset:44964*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44964*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e0007ff; valaddr_reg:x3; val_offset:44967*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44967*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e000fff; valaddr_reg:x3; val_offset:44970*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44970*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e001fff; valaddr_reg:x3; val_offset:44973*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44973*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e003fff; valaddr_reg:x3; val_offset:44976*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44976*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e007fff; valaddr_reg:x3; val_offset:44979*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44979*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e00ffff; valaddr_reg:x3; val_offset:44982*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44982*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e01ffff; valaddr_reg:x3; val_offset:44985*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44985*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e03ffff; valaddr_reg:x3; val_offset:44988*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44988*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e07ffff; valaddr_reg:x3; val_offset:44991*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44991*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e0fffff; valaddr_reg:x3; val_offset:44994*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44994*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_14999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e1fffff; valaddr_reg:x3; val_offset:44997*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 44997*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e3fffff; valaddr_reg:x3; val_offset:45000*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45000*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e400000; valaddr_reg:x3; val_offset:45003*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45003*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e600000; valaddr_reg:x3; val_offset:45006*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45006*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e700000; valaddr_reg:x3; val_offset:45009*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45009*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e780000; valaddr_reg:x3; val_offset:45012*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45012*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7c0000; valaddr_reg:x3; val_offset:45015*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45015*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7e0000; valaddr_reg:x3; val_offset:45018*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45018*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7f0000; valaddr_reg:x3; val_offset:45021*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45021*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7f8000; valaddr_reg:x3; val_offset:45024*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45024*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7fc000; valaddr_reg:x3; val_offset:45027*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45027*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7fe000; valaddr_reg:x3; val_offset:45030*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45030*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7ff000; valaddr_reg:x3; val_offset:45033*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45033*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7ff800; valaddr_reg:x3; val_offset:45036*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45036*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:45039*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45039*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:45042*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45042*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7fff00; valaddr_reg:x3; val_offset:45045*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45045*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7fff80; valaddr_reg:x3; val_offset:45048*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45048*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:45051*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45051*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:45054*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45054*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:45057*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45057*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:45060*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45060*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:45063*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45063*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:45066*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45066*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13846f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93846f; op2val:0x80000000; +op3val:0x8e7fffff; valaddr_reg:x3; val_offset:45069*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45069*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:45072*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45072*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:45075*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45075*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:45078*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45078*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:45081*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45081*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:45084*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45084*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:45087*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45087*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:45090*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45090*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:45093*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45093*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:45096*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45096*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:45099*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45099*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:45102*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45102*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:45105*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45105*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:45108*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45108*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:45111*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45111*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:45114*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45114*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:45117*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45117*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e800000; valaddr_reg:x3; val_offset:45120*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45120*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e800001; valaddr_reg:x3; val_offset:45123*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45123*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e800003; valaddr_reg:x3; val_offset:45126*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45126*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e800007; valaddr_reg:x3; val_offset:45129*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45129*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e80000f; valaddr_reg:x3; val_offset:45132*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45132*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e80001f; valaddr_reg:x3; val_offset:45135*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45135*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e80003f; valaddr_reg:x3; val_offset:45138*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45138*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e80007f; valaddr_reg:x3; val_offset:45141*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45141*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e8000ff; valaddr_reg:x3; val_offset:45144*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45144*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e8001ff; valaddr_reg:x3; val_offset:45147*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45147*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e8003ff; valaddr_reg:x3; val_offset:45150*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45150*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e8007ff; valaddr_reg:x3; val_offset:45153*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45153*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e800fff; valaddr_reg:x3; val_offset:45156*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45156*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e801fff; valaddr_reg:x3; val_offset:45159*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45159*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e803fff; valaddr_reg:x3; val_offset:45162*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45162*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e807fff; valaddr_reg:x3; val_offset:45165*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45165*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e80ffff; valaddr_reg:x3; val_offset:45168*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45168*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e81ffff; valaddr_reg:x3; val_offset:45171*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45171*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e83ffff; valaddr_reg:x3; val_offset:45174*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45174*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e87ffff; valaddr_reg:x3; val_offset:45177*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45177*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e8fffff; valaddr_reg:x3; val_offset:45180*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45180*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8e9fffff; valaddr_reg:x3; val_offset:45183*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45183*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8ebfffff; valaddr_reg:x3; val_offset:45186*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45186*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8ec00000; valaddr_reg:x3; val_offset:45189*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45189*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8ee00000; valaddr_reg:x3; val_offset:45192*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45192*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8ef00000; valaddr_reg:x3; val_offset:45195*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45195*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8ef80000; valaddr_reg:x3; val_offset:45198*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45198*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efc0000; valaddr_reg:x3; val_offset:45201*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45201*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efe0000; valaddr_reg:x3; val_offset:45204*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45204*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8eff0000; valaddr_reg:x3; val_offset:45207*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45207*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8eff8000; valaddr_reg:x3; val_offset:45210*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45210*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8effc000; valaddr_reg:x3; val_offset:45213*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45213*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8effe000; valaddr_reg:x3; val_offset:45216*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45216*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efff000; valaddr_reg:x3; val_offset:45219*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45219*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efff800; valaddr_reg:x3; val_offset:45222*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45222*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efffc00; valaddr_reg:x3; val_offset:45225*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45225*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efffe00; valaddr_reg:x3; val_offset:45228*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45228*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8effff00; valaddr_reg:x3; val_offset:45231*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45231*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8effff80; valaddr_reg:x3; val_offset:45234*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45234*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8effffc0; valaddr_reg:x3; val_offset:45237*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45237*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8effffe0; valaddr_reg:x3; val_offset:45240*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45240*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efffff0; valaddr_reg:x3; val_offset:45243*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45243*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efffff8; valaddr_reg:x3; val_offset:45246*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45246*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efffffc; valaddr_reg:x3; val_offset:45249*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45249*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8efffffe; valaddr_reg:x3; val_offset:45252*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45252*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x13cd52 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e93cd52; op2val:0x80000000; +op3val:0x8effffff; valaddr_reg:x3; val_offset:45255*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45255*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:45258*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45258*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:45261*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45261*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:45264*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45264*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:45267*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45267*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:45270*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45270*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:45273*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45273*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:45276*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45276*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:45279*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45279*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:45282*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45282*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:45285*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45285*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:45288*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45288*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:45291*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45291*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:45294*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45294*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:45297*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45297*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:45300*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45300*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:45303*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45303*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5000000; valaddr_reg:x3; val_offset:45306*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45306*0 + 3*117*FLEN/8, x4, x1, x2) + +inst_15103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5000001; valaddr_reg:x3; val_offset:45309*0 + 3*117*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45309*0 + 3*117*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364672,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364673,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364675,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364679,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364687,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364703,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364735,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364799,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364927,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382365183,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382365695,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382366719,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382368767,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382372863,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382381055,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382397439,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382430207,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382495743,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382626815,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382888959,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2383413247,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2384461823,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2386558975,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2386558976,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2388656128,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2389704704,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390228992,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390491136,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390622208,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390687744,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390720512,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390736896,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390745088,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390749184,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390751232,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390752256,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390752768,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753024,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753152,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753216,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753248,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753264,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753272,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753276,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753278,32,FLEN) +NAN_BOXED(2123596911,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753279,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753280,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753281,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753283,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753287,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753295,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753311,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753343,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753407,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753535,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753791,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390754303,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390755327,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390757375,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390761471,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390769663,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390786047,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390818815,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390884351,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391015423,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391277567,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391801855,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2392850431,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2394947583,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2394947584,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2397044736,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398093312,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398617600,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398879744,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399010816,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399076352,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399109120,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399125504,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399133696,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399137792,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399139840,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399140864,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141376,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141632,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141760,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141824,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141856,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141872,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141880,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141884,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141886,32,FLEN) +NAN_BOXED(2123615570,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141887,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886080,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886081,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-119.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-119.S new file mode 100644 index 000000000..7db694a82 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-119.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_15104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5000003; valaddr_reg:x3; val_offset:45312*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45312*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5000007; valaddr_reg:x3; val_offset:45315*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45315*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x500000f; valaddr_reg:x3; val_offset:45318*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45318*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x500001f; valaddr_reg:x3; val_offset:45321*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45321*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x500003f; valaddr_reg:x3; val_offset:45324*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45324*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x500007f; valaddr_reg:x3; val_offset:45327*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45327*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x50000ff; valaddr_reg:x3; val_offset:45330*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45330*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x50001ff; valaddr_reg:x3; val_offset:45333*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45333*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x50003ff; valaddr_reg:x3; val_offset:45336*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45336*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x50007ff; valaddr_reg:x3; val_offset:45339*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45339*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5000fff; valaddr_reg:x3; val_offset:45342*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45342*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5001fff; valaddr_reg:x3; val_offset:45345*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45345*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5003fff; valaddr_reg:x3; val_offset:45348*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45348*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5007fff; valaddr_reg:x3; val_offset:45351*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45351*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x500ffff; valaddr_reg:x3; val_offset:45354*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45354*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x501ffff; valaddr_reg:x3; val_offset:45357*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45357*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x503ffff; valaddr_reg:x3; val_offset:45360*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45360*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x507ffff; valaddr_reg:x3; val_offset:45363*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45363*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x50fffff; valaddr_reg:x3; val_offset:45366*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45366*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x51fffff; valaddr_reg:x3; val_offset:45369*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45369*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x53fffff; valaddr_reg:x3; val_offset:45372*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45372*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5400000; valaddr_reg:x3; val_offset:45375*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45375*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5600000; valaddr_reg:x3; val_offset:45378*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45378*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5700000; valaddr_reg:x3; val_offset:45381*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45381*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x5780000; valaddr_reg:x3; val_offset:45384*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45384*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57c0000; valaddr_reg:x3; val_offset:45387*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45387*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57e0000; valaddr_reg:x3; val_offset:45390*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45390*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57f0000; valaddr_reg:x3; val_offset:45393*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45393*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57f8000; valaddr_reg:x3; val_offset:45396*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45396*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57fc000; valaddr_reg:x3; val_offset:45399*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45399*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57fe000; valaddr_reg:x3; val_offset:45402*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45402*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57ff000; valaddr_reg:x3; val_offset:45405*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45405*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57ff800; valaddr_reg:x3; val_offset:45408*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45408*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57ffc00; valaddr_reg:x3; val_offset:45411*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45411*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57ffe00; valaddr_reg:x3; val_offset:45414*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45414*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57fff00; valaddr_reg:x3; val_offset:45417*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45417*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57fff80; valaddr_reg:x3; val_offset:45420*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45420*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57fffc0; valaddr_reg:x3; val_offset:45423*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45423*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57fffe0; valaddr_reg:x3; val_offset:45426*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45426*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57ffff0; valaddr_reg:x3; val_offset:45429*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45429*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57ffff8; valaddr_reg:x3; val_offset:45432*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45432*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57ffffc; valaddr_reg:x3; val_offset:45435*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45435*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57ffffe; valaddr_reg:x3; val_offset:45438*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45438*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x147c7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e947c7c; op2val:0x0; +op3val:0x57fffff; valaddr_reg:x3; val_offset:45441*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45441*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3f800001; valaddr_reg:x3; val_offset:45444*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45444*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3f800003; valaddr_reg:x3; val_offset:45447*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45447*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3f800007; valaddr_reg:x3; val_offset:45450*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45450*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3f999999; valaddr_reg:x3; val_offset:45453*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45453*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:45456*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45456*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:45459*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45459*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:45462*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45462*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:45465*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45465*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:45468*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45468*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:45471*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45471*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:45474*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45474*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:45477*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45477*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:45480*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45480*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:45483*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45483*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:45486*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45486*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:45489*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45489*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c800000; valaddr_reg:x3; val_offset:45492*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45492*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c800001; valaddr_reg:x3; val_offset:45495*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45495*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c800003; valaddr_reg:x3; val_offset:45498*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45498*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c800007; valaddr_reg:x3; val_offset:45501*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45501*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c80000f; valaddr_reg:x3; val_offset:45504*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45504*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c80001f; valaddr_reg:x3; val_offset:45507*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45507*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c80003f; valaddr_reg:x3; val_offset:45510*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45510*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c80007f; valaddr_reg:x3; val_offset:45513*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45513*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c8000ff; valaddr_reg:x3; val_offset:45516*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45516*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c8001ff; valaddr_reg:x3; val_offset:45519*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45519*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c8003ff; valaddr_reg:x3; val_offset:45522*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45522*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c8007ff; valaddr_reg:x3; val_offset:45525*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45525*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c800fff; valaddr_reg:x3; val_offset:45528*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45528*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c801fff; valaddr_reg:x3; val_offset:45531*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45531*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c803fff; valaddr_reg:x3; val_offset:45534*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45534*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c807fff; valaddr_reg:x3; val_offset:45537*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45537*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c80ffff; valaddr_reg:x3; val_offset:45540*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45540*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c81ffff; valaddr_reg:x3; val_offset:45543*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45543*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c83ffff; valaddr_reg:x3; val_offset:45546*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45546*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c87ffff; valaddr_reg:x3; val_offset:45549*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45549*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c8fffff; valaddr_reg:x3; val_offset:45552*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45552*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4c9fffff; valaddr_reg:x3; val_offset:45555*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45555*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cbfffff; valaddr_reg:x3; val_offset:45558*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45558*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cc00000; valaddr_reg:x3; val_offset:45561*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45561*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4ce00000; valaddr_reg:x3; val_offset:45564*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45564*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cf00000; valaddr_reg:x3; val_offset:45567*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45567*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cf80000; valaddr_reg:x3; val_offset:45570*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45570*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfc0000; valaddr_reg:x3; val_offset:45573*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45573*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfe0000; valaddr_reg:x3; val_offset:45576*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45576*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cff0000; valaddr_reg:x3; val_offset:45579*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45579*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cff8000; valaddr_reg:x3; val_offset:45582*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45582*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cffc000; valaddr_reg:x3; val_offset:45585*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45585*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cffe000; valaddr_reg:x3; val_offset:45588*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45588*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfff000; valaddr_reg:x3; val_offset:45591*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45591*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfff800; valaddr_reg:x3; val_offset:45594*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45594*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfffc00; valaddr_reg:x3; val_offset:45597*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45597*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfffe00; valaddr_reg:x3; val_offset:45600*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45600*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cffff00; valaddr_reg:x3; val_offset:45603*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45603*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cffff80; valaddr_reg:x3; val_offset:45606*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45606*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cffffc0; valaddr_reg:x3; val_offset:45609*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45609*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cffffe0; valaddr_reg:x3; val_offset:45612*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45612*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfffff0; valaddr_reg:x3; val_offset:45615*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45615*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfffff8; valaddr_reg:x3; val_offset:45618*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45618*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfffffc; valaddr_reg:x3; val_offset:45621*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45621*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cfffffe; valaddr_reg:x3; val_offset:45624*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45624*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x153d15 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6dc8ae and fs3 == 0 and fe3 == 0x99 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e953d15; op2val:0x6dc8ae; +op3val:0x4cffffff; valaddr_reg:x3; val_offset:45627*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45627*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:45630*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45630*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:45633*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45633*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:45636*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45636*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:45639*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45639*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:45642*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45642*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:45645*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45645*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:45648*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45648*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:45651*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45651*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:45654*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45654*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:45657*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45657*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:45660*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45660*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:45663*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45663*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:45666*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45666*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:45669*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45669*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:45672*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45672*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:45675*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45675*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41800000; valaddr_reg:x3; val_offset:45678*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45678*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41800001; valaddr_reg:x3; val_offset:45681*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45681*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41800003; valaddr_reg:x3; val_offset:45684*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45684*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41800007; valaddr_reg:x3; val_offset:45687*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45687*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x4180000f; valaddr_reg:x3; val_offset:45690*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45690*0 + 3*118*FLEN/8, x4, x1, x2) + +inst_15231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x4180001f; valaddr_reg:x3; val_offset:45693*0 + 3*118*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45693*0 + 3*118*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886083,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886087,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886095,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886111,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886143,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886207,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886335,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886591,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83887103,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83888127,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83890175,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83894271,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83902463,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83918847,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83951615,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84017151,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84148223,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84410367,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84934655,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(85983231,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(88080383,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(88080384,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(90177536,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(91226112,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(91750400,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92012544,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92143616,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92209152,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92241920,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92258304,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92266496,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92270592,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92272640,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92273664,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274176,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274432,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274560,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274624,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274656,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274672,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274680,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274684,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274686,32,FLEN) +NAN_BOXED(2123660412,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274687,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457024,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457025,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457027,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457031,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457039,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457055,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457087,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457151,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457279,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283457535,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283458047,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283459071,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283461119,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283465215,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283473407,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283489791,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283522559,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283588095,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283719167,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1283981311,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1284505599,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1285554175,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1287651327,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1287651328,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1289748480,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1290797056,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291321344,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291583488,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291714560,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291780096,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291812864,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291829248,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291837440,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291841536,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291843584,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291844608,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845120,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845376,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845504,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845568,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845600,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845616,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845624,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845628,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845630,32,FLEN) +NAN_BOXED(2123709717,32,FLEN) +NAN_BOXED(7194798,32,FLEN) +NAN_BOXED(1291845631,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907648,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907649,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907651,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907655,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907663,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907679,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-12.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-12.S new file mode 100644 index 000000000..5554991be --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-12.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_1408: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:4224*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4224*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1409: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x7fffff; valaddr_reg:x3; val_offset:4227*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4227*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1410: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:4230*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4230*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1411: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:4233*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4233*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1412: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:4236*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4236*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1413: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:4239*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4239*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1414: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:4242*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4242*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1415: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:4245*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4245*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1416: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:4248*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4248*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1417: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:4251*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4251*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1418: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:4254*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4254*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1419: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:4257*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4257*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1420: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:4260*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4260*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1421: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:4263*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4263*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1422: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:4266*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4266*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1423: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:4269*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4269*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1424: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:4272*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4272*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1425: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x5cc707 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cdcc707; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:4275*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4275*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1426: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21000000; valaddr_reg:x3; val_offset:4278*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4278*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1427: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21000001; valaddr_reg:x3; val_offset:4281*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4281*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1428: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21000003; valaddr_reg:x3; val_offset:4284*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4284*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1429: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21000007; valaddr_reg:x3; val_offset:4287*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4287*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1430: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x2100000f; valaddr_reg:x3; val_offset:4290*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4290*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1431: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x2100001f; valaddr_reg:x3; val_offset:4293*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4293*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1432: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x2100003f; valaddr_reg:x3; val_offset:4296*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4296*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1433: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x2100007f; valaddr_reg:x3; val_offset:4299*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4299*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1434: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x210000ff; valaddr_reg:x3; val_offset:4302*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4302*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1435: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x210001ff; valaddr_reg:x3; val_offset:4305*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4305*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1436: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x210003ff; valaddr_reg:x3; val_offset:4308*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4308*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1437: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x210007ff; valaddr_reg:x3; val_offset:4311*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4311*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1438: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21000fff; valaddr_reg:x3; val_offset:4314*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4314*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1439: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21001fff; valaddr_reg:x3; val_offset:4317*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4317*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1440: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21003fff; valaddr_reg:x3; val_offset:4320*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4320*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1441: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21007fff; valaddr_reg:x3; val_offset:4323*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4323*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1442: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x2100ffff; valaddr_reg:x3; val_offset:4326*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4326*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1443: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x2101ffff; valaddr_reg:x3; val_offset:4329*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4329*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1444: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x2103ffff; valaddr_reg:x3; val_offset:4332*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4332*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1445: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x2107ffff; valaddr_reg:x3; val_offset:4335*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4335*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1446: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x210fffff; valaddr_reg:x3; val_offset:4338*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4338*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1447: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x211fffff; valaddr_reg:x3; val_offset:4341*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4341*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1448: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x213fffff; valaddr_reg:x3; val_offset:4344*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4344*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1449: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21400000; valaddr_reg:x3; val_offset:4347*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4347*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1450: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21600000; valaddr_reg:x3; val_offset:4350*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4350*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1451: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21700000; valaddr_reg:x3; val_offset:4353*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4353*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1452: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x21780000; valaddr_reg:x3; val_offset:4356*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4356*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1453: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217c0000; valaddr_reg:x3; val_offset:4359*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4359*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1454: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217e0000; valaddr_reg:x3; val_offset:4362*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4362*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1455: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217f0000; valaddr_reg:x3; val_offset:4365*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4365*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1456: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217f8000; valaddr_reg:x3; val_offset:4368*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4368*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1457: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217fc000; valaddr_reg:x3; val_offset:4371*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4371*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1458: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217fe000; valaddr_reg:x3; val_offset:4374*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4374*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1459: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217ff000; valaddr_reg:x3; val_offset:4377*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4377*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1460: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217ff800; valaddr_reg:x3; val_offset:4380*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4380*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1461: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217ffc00; valaddr_reg:x3; val_offset:4383*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4383*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1462: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217ffe00; valaddr_reg:x3; val_offset:4386*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4386*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1463: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217fff00; valaddr_reg:x3; val_offset:4389*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4389*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1464: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217fff80; valaddr_reg:x3; val_offset:4392*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4392*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1465: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217fffc0; valaddr_reg:x3; val_offset:4395*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4395*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1466: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217fffe0; valaddr_reg:x3; val_offset:4398*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4398*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1467: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217ffff0; valaddr_reg:x3; val_offset:4401*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4401*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1468: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217ffff8; valaddr_reg:x3; val_offset:4404*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4404*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1469: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217ffffc; valaddr_reg:x3; val_offset:4407*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4407*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1470: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217ffffe; valaddr_reg:x3; val_offset:4410*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4410*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1471: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x42 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x217fffff; valaddr_reg:x3; val_offset:4413*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4413*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1472: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3f800001; valaddr_reg:x3; val_offset:4416*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4416*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1473: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3f800003; valaddr_reg:x3; val_offset:4419*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4419*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1474: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3f800007; valaddr_reg:x3; val_offset:4422*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4422*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1475: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3f999999; valaddr_reg:x3; val_offset:4425*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4425*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1476: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:4428*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4428*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1477: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:4431*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4431*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1478: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:4434*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4434*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1479: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:4437*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4437*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1480: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:4440*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4440*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1481: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:4443*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4443*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1482: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:4446*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4446*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1483: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:4449*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4449*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1484: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:4452*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4452*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1485: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:4455*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4455*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1486: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:4458*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4458*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1487: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6d69ee and fs2 == 0 and fe2 == 0x04 and fm2 == 0x0a0547 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ced69ee; op2val:0x20a0547; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:4461*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4461*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1488: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf000000; valaddr_reg:x3; val_offset:4464*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4464*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1489: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf000001; valaddr_reg:x3; val_offset:4467*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4467*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1490: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf000003; valaddr_reg:x3; val_offset:4470*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4470*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1491: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf000007; valaddr_reg:x3; val_offset:4473*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4473*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1492: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf00000f; valaddr_reg:x3; val_offset:4476*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4476*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1493: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf00001f; valaddr_reg:x3; val_offset:4479*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4479*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1494: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf00003f; valaddr_reg:x3; val_offset:4482*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4482*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1495: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf00007f; valaddr_reg:x3; val_offset:4485*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4485*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1496: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf0000ff; valaddr_reg:x3; val_offset:4488*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4488*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1497: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf0001ff; valaddr_reg:x3; val_offset:4491*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4491*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1498: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf0003ff; valaddr_reg:x3; val_offset:4494*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4494*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1499: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf0007ff; valaddr_reg:x3; val_offset:4497*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4497*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1500: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf000fff; valaddr_reg:x3; val_offset:4500*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4500*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1501: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf001fff; valaddr_reg:x3; val_offset:4503*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4503*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1502: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf003fff; valaddr_reg:x3; val_offset:4506*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4506*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1503: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf007fff; valaddr_reg:x3; val_offset:4509*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4509*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1504: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf00ffff; valaddr_reg:x3; val_offset:4512*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4512*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1505: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf01ffff; valaddr_reg:x3; val_offset:4515*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4515*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1506: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf03ffff; valaddr_reg:x3; val_offset:4518*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4518*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1507: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf07ffff; valaddr_reg:x3; val_offset:4521*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4521*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1508: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf0fffff; valaddr_reg:x3; val_offset:4524*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4524*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1509: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf1fffff; valaddr_reg:x3; val_offset:4527*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4527*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1510: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf3fffff; valaddr_reg:x3; val_offset:4530*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4530*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1511: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf400000; valaddr_reg:x3; val_offset:4533*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4533*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1512: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf600000; valaddr_reg:x3; val_offset:4536*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4536*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1513: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf700000; valaddr_reg:x3; val_offset:4539*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4539*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1514: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf780000; valaddr_reg:x3; val_offset:4542*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4542*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1515: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7c0000; valaddr_reg:x3; val_offset:4545*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4545*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1516: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7e0000; valaddr_reg:x3; val_offset:4548*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4548*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1517: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7f0000; valaddr_reg:x3; val_offset:4551*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4551*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1518: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7f8000; valaddr_reg:x3; val_offset:4554*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4554*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1519: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7fc000; valaddr_reg:x3; val_offset:4557*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4557*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1520: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7fe000; valaddr_reg:x3; val_offset:4560*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4560*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1521: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7ff000; valaddr_reg:x3; val_offset:4563*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4563*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1522: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7ff800; valaddr_reg:x3; val_offset:4566*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4566*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1523: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7ffc00; valaddr_reg:x3; val_offset:4569*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4569*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1524: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7ffe00; valaddr_reg:x3; val_offset:4572*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4572*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1525: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7fff00; valaddr_reg:x3; val_offset:4575*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4575*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1526: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7fff80; valaddr_reg:x3; val_offset:4578*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4578*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1527: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7fffc0; valaddr_reg:x3; val_offset:4581*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4581*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1528: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7fffe0; valaddr_reg:x3; val_offset:4584*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4584*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1529: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7ffff0; valaddr_reg:x3; val_offset:4587*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4587*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1530: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7ffff8; valaddr_reg:x3; val_offset:4590*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4590*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1531: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7ffffc; valaddr_reg:x3; val_offset:4593*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4593*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1532: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7ffffe; valaddr_reg:x3; val_offset:4596*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4596*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1533: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x5e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xaf7fffff; valaddr_reg:x3; val_offset:4599*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4599*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1534: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbf800001; valaddr_reg:x3; val_offset:4602*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4602*0 + 3*11*FLEN/8, x4, x1, x2) + +inst_1535: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbf800003; valaddr_reg:x3; val_offset:4605*0 + 3*11*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4605*0 + 3*11*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388607,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2094843655,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648128,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648129,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648131,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648135,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648143,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648159,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648191,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648255,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648383,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553648639,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553649151,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553650175,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553652223,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553656319,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553664511,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553680895,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553713663,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553779199,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(553910271,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(554172415,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(554696703,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(555745279,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(557842431,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(557842432,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(559939584,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(560988160,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(561512448,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(561774592,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(561905664,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(561971200,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562003968,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562020352,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562028544,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562032640,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562034688,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562035712,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036224,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036480,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036608,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036672,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036704,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036720,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036728,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036732,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036734,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(562036735,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2095933934,32,FLEN) +NAN_BOXED(34211143,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936012800,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936012801,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936012803,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936012807,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936012815,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936012831,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936012863,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936012927,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936013055,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936013311,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936013823,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936014847,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936016895,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936020991,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936029183,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936045567,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936078335,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936143871,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936274943,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2936537087,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2937061375,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2938109951,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2940207103,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2940207104,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2942304256,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2943352832,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2943877120,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944139264,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944270336,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944335872,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944368640,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944385024,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944393216,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944397312,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944399360,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944400384,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944400896,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401152,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401280,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401344,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401376,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401392,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401400,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401404,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401406,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(2944401407,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-120.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-120.S new file mode 100644 index 000000000..a784ea88a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-120.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_15232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x4180003f; valaddr_reg:x3; val_offset:45696*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45696*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x4180007f; valaddr_reg:x3; val_offset:45699*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45699*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x418000ff; valaddr_reg:x3; val_offset:45702*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45702*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x418001ff; valaddr_reg:x3; val_offset:45705*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45705*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x418003ff; valaddr_reg:x3; val_offset:45708*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45708*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x418007ff; valaddr_reg:x3; val_offset:45711*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45711*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41800fff; valaddr_reg:x3; val_offset:45714*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45714*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41801fff; valaddr_reg:x3; val_offset:45717*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45717*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41803fff; valaddr_reg:x3; val_offset:45720*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45720*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41807fff; valaddr_reg:x3; val_offset:45723*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45723*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x4180ffff; valaddr_reg:x3; val_offset:45726*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45726*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x4181ffff; valaddr_reg:x3; val_offset:45729*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45729*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x4183ffff; valaddr_reg:x3; val_offset:45732*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45732*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x4187ffff; valaddr_reg:x3; val_offset:45735*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45735*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x418fffff; valaddr_reg:x3; val_offset:45738*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45738*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x419fffff; valaddr_reg:x3; val_offset:45741*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45741*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41bfffff; valaddr_reg:x3; val_offset:45744*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45744*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41c00000; valaddr_reg:x3; val_offset:45747*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45747*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41e00000; valaddr_reg:x3; val_offset:45750*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45750*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41f00000; valaddr_reg:x3; val_offset:45753*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45753*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41f80000; valaddr_reg:x3; val_offset:45756*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45756*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fc0000; valaddr_reg:x3; val_offset:45759*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45759*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fe0000; valaddr_reg:x3; val_offset:45762*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45762*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ff0000; valaddr_reg:x3; val_offset:45765*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45765*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ff8000; valaddr_reg:x3; val_offset:45768*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45768*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ffc000; valaddr_reg:x3; val_offset:45771*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45771*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ffe000; valaddr_reg:x3; val_offset:45774*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45774*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fff000; valaddr_reg:x3; val_offset:45777*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45777*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fff800; valaddr_reg:x3; val_offset:45780*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45780*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fffc00; valaddr_reg:x3; val_offset:45783*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45783*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fffe00; valaddr_reg:x3; val_offset:45786*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45786*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ffff00; valaddr_reg:x3; val_offset:45789*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45789*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ffff80; valaddr_reg:x3; val_offset:45792*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45792*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ffffc0; valaddr_reg:x3; val_offset:45795*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45795*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ffffe0; valaddr_reg:x3; val_offset:45798*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45798*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fffff0; valaddr_reg:x3; val_offset:45801*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45801*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fffff8; valaddr_reg:x3; val_offset:45804*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45804*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fffffc; valaddr_reg:x3; val_offset:45807*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45807*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41fffffe; valaddr_reg:x3; val_offset:45810*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45810*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x164003 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x6d0b7d and fs3 == 0 and fe3 == 0x83 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e964003; op2val:0x6d0b7d; +op3val:0x41ffffff; valaddr_reg:x3; val_offset:45813*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45813*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79000000; valaddr_reg:x3; val_offset:45816*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45816*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79000001; valaddr_reg:x3; val_offset:45819*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45819*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79000003; valaddr_reg:x3; val_offset:45822*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45822*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79000007; valaddr_reg:x3; val_offset:45825*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45825*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7900000f; valaddr_reg:x3; val_offset:45828*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45828*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7900001f; valaddr_reg:x3; val_offset:45831*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45831*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7900003f; valaddr_reg:x3; val_offset:45834*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45834*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7900007f; valaddr_reg:x3; val_offset:45837*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45837*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x790000ff; valaddr_reg:x3; val_offset:45840*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45840*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x790001ff; valaddr_reg:x3; val_offset:45843*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45843*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x790003ff; valaddr_reg:x3; val_offset:45846*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45846*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x790007ff; valaddr_reg:x3; val_offset:45849*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45849*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79000fff; valaddr_reg:x3; val_offset:45852*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45852*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79001fff; valaddr_reg:x3; val_offset:45855*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45855*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79003fff; valaddr_reg:x3; val_offset:45858*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45858*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79007fff; valaddr_reg:x3; val_offset:45861*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45861*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7900ffff; valaddr_reg:x3; val_offset:45864*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45864*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7901ffff; valaddr_reg:x3; val_offset:45867*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45867*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7903ffff; valaddr_reg:x3; val_offset:45870*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45870*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7907ffff; valaddr_reg:x3; val_offset:45873*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45873*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x790fffff; valaddr_reg:x3; val_offset:45876*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45876*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x791fffff; valaddr_reg:x3; val_offset:45879*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45879*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x793fffff; valaddr_reg:x3; val_offset:45882*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45882*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79400000; valaddr_reg:x3; val_offset:45885*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45885*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79600000; valaddr_reg:x3; val_offset:45888*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45888*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79700000; valaddr_reg:x3; val_offset:45891*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45891*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x79780000; valaddr_reg:x3; val_offset:45894*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45894*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797c0000; valaddr_reg:x3; val_offset:45897*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45897*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797e0000; valaddr_reg:x3; val_offset:45900*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45900*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797f0000; valaddr_reg:x3; val_offset:45903*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45903*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797f8000; valaddr_reg:x3; val_offset:45906*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45906*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797fc000; valaddr_reg:x3; val_offset:45909*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45909*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797fe000; valaddr_reg:x3; val_offset:45912*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45912*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797ff000; valaddr_reg:x3; val_offset:45915*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45915*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797ff800; valaddr_reg:x3; val_offset:45918*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45918*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797ffc00; valaddr_reg:x3; val_offset:45921*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45921*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797ffe00; valaddr_reg:x3; val_offset:45924*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45924*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797fff00; valaddr_reg:x3; val_offset:45927*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45927*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797fff80; valaddr_reg:x3; val_offset:45930*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45930*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797fffc0; valaddr_reg:x3; val_offset:45933*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45933*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797fffe0; valaddr_reg:x3; val_offset:45936*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45936*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797ffff0; valaddr_reg:x3; val_offset:45939*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45939*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797ffff8; valaddr_reg:x3; val_offset:45942*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45942*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797ffffc; valaddr_reg:x3; val_offset:45945*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45945*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797ffffe; valaddr_reg:x3; val_offset:45948*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45948*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xf2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x797fffff; valaddr_reg:x3; val_offset:45951*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45951*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f000001; valaddr_reg:x3; val_offset:45954*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45954*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f000003; valaddr_reg:x3; val_offset:45957*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45957*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f000007; valaddr_reg:x3; val_offset:45960*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45960*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f199999; valaddr_reg:x3; val_offset:45963*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45963*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f249249; valaddr_reg:x3; val_offset:45966*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45966*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f333333; valaddr_reg:x3; val_offset:45969*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45969*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:45972*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45972*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:45975*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45975*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f444444; valaddr_reg:x3; val_offset:45978*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45978*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:45981*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45981*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:45984*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45984*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f666666; valaddr_reg:x3; val_offset:45987*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45987*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:45990*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45990*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:45993*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45993*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:45996*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45996*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x17383a and fs2 == 0 and fe2 == 0x80 and fm2 == 0x58b100 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e97383a; op2val:0x4058b100; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:45999*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 45999*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:46002*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46002*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:46005*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46005*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:46008*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46008*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:46011*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46011*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:46014*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46014*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:46017*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46017*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:46020*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46020*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:46023*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46023*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:46026*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46026*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:46029*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46029*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:46032*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46032*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:46035*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46035*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:46038*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46038*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:46041*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46041*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:46044*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46044*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:46047*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46047*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x800000; valaddr_reg:x3; val_offset:46050*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46050*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:46053*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46053*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:46056*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46056*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:46059*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46059*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x80000f; valaddr_reg:x3; val_offset:46062*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46062*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x80001f; valaddr_reg:x3; val_offset:46065*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46065*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x80003f; valaddr_reg:x3; val_offset:46068*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46068*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x80007f; valaddr_reg:x3; val_offset:46071*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46071*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x8000ff; valaddr_reg:x3; val_offset:46074*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46074*0 + 3*119*FLEN/8, x4, x1, x2) + +inst_15359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x8001ff; valaddr_reg:x3; val_offset:46077*0 + 3*119*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46077*0 + 3*119*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907711,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907775,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098907903,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098908159,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098908671,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098909695,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098911743,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098915839,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098924031,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098940415,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1098973183,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1099038719,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1099169791,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1099431935,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1099956223,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1101004799,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1103101951,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1103101952,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1105199104,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1106247680,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1106771968,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107034112,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107165184,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107230720,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107263488,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107279872,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107288064,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107292160,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107294208,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107295232,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107295744,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296000,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296128,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296192,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296224,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296240,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296248,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296252,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296254,32,FLEN) +NAN_BOXED(2123776003,32,FLEN) +NAN_BOXED(7146365,32,FLEN) +NAN_BOXED(1107296255,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043136,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043137,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043139,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043143,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043151,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043167,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043199,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043263,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043391,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030043647,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030044159,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030045183,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030047231,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030051327,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030059519,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030075903,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030108671,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030174207,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030305279,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2030567423,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2031091711,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2032140287,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2034237439,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2034237440,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2036334592,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2037383168,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2037907456,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038169600,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038300672,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038366208,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038398976,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038415360,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038423552,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038427648,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038429696,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038430720,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431232,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431488,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431616,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431680,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431712,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431728,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431736,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431740,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431742,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2038431743,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2123839546,32,FLEN) +NAN_BOXED(1079554304,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388608,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388623,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388639,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388671,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388735,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388863,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8389119,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-121.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-121.S new file mode 100644 index 000000000..9b47c32d4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-121.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_15360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x8003ff; valaddr_reg:x3; val_offset:46080*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46080*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x8007ff; valaddr_reg:x3; val_offset:46083*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46083*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x800fff; valaddr_reg:x3; val_offset:46086*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46086*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x801fff; valaddr_reg:x3; val_offset:46089*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46089*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x803fff; valaddr_reg:x3; val_offset:46092*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46092*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x807fff; valaddr_reg:x3; val_offset:46095*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46095*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x80ffff; valaddr_reg:x3; val_offset:46098*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46098*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x81ffff; valaddr_reg:x3; val_offset:46101*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46101*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x83ffff; valaddr_reg:x3; val_offset:46104*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46104*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x87ffff; valaddr_reg:x3; val_offset:46107*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46107*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x8fffff; valaddr_reg:x3; val_offset:46110*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46110*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0x9fffff; valaddr_reg:x3; val_offset:46113*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46113*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xbfffff; valaddr_reg:x3; val_offset:46116*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46116*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xc00000; valaddr_reg:x3; val_offset:46119*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46119*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xe00000; valaddr_reg:x3; val_offset:46122*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46122*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xf00000; valaddr_reg:x3; val_offset:46125*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46125*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xf80000; valaddr_reg:x3; val_offset:46128*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46128*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfc0000; valaddr_reg:x3; val_offset:46131*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46131*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfe0000; valaddr_reg:x3; val_offset:46134*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46134*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xff0000; valaddr_reg:x3; val_offset:46137*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46137*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xff8000; valaddr_reg:x3; val_offset:46140*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46140*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xffc000; valaddr_reg:x3; val_offset:46143*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46143*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xffe000; valaddr_reg:x3; val_offset:46146*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46146*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfff000; valaddr_reg:x3; val_offset:46149*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46149*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfff800; valaddr_reg:x3; val_offset:46152*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46152*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfffc00; valaddr_reg:x3; val_offset:46155*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46155*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfffe00; valaddr_reg:x3; val_offset:46158*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46158*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xffff00; valaddr_reg:x3; val_offset:46161*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46161*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xffff80; valaddr_reg:x3; val_offset:46164*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46164*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xffffc0; valaddr_reg:x3; val_offset:46167*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46167*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xffffe0; valaddr_reg:x3; val_offset:46170*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46170*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfffff0; valaddr_reg:x3; val_offset:46173*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46173*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:46176*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46176*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:46179*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46179*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:46182*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46182*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1799a1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9799a1; op2val:0x0; +op3val:0xffffff; valaddr_reg:x3; val_offset:46185*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46185*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5800000; valaddr_reg:x3; val_offset:46188*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46188*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5800001; valaddr_reg:x3; val_offset:46191*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46191*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5800003; valaddr_reg:x3; val_offset:46194*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46194*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5800007; valaddr_reg:x3; val_offset:46197*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46197*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf580000f; valaddr_reg:x3; val_offset:46200*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46200*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf580001f; valaddr_reg:x3; val_offset:46203*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46203*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf580003f; valaddr_reg:x3; val_offset:46206*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46206*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf580007f; valaddr_reg:x3; val_offset:46209*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46209*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf58000ff; valaddr_reg:x3; val_offset:46212*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46212*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf58001ff; valaddr_reg:x3; val_offset:46215*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46215*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf58003ff; valaddr_reg:x3; val_offset:46218*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46218*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf58007ff; valaddr_reg:x3; val_offset:46221*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46221*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5800fff; valaddr_reg:x3; val_offset:46224*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46224*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5801fff; valaddr_reg:x3; val_offset:46227*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46227*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5803fff; valaddr_reg:x3; val_offset:46230*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46230*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5807fff; valaddr_reg:x3; val_offset:46233*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46233*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf580ffff; valaddr_reg:x3; val_offset:46236*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46236*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf581ffff; valaddr_reg:x3; val_offset:46239*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46239*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf583ffff; valaddr_reg:x3; val_offset:46242*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46242*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf587ffff; valaddr_reg:x3; val_offset:46245*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46245*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf58fffff; valaddr_reg:x3; val_offset:46248*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46248*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf59fffff; valaddr_reg:x3; val_offset:46251*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46251*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5bfffff; valaddr_reg:x3; val_offset:46254*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46254*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5c00000; valaddr_reg:x3; val_offset:46257*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46257*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5e00000; valaddr_reg:x3; val_offset:46260*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46260*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5f00000; valaddr_reg:x3; val_offset:46263*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46263*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5f80000; valaddr_reg:x3; val_offset:46266*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46266*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fc0000; valaddr_reg:x3; val_offset:46269*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46269*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fe0000; valaddr_reg:x3; val_offset:46272*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46272*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ff0000; valaddr_reg:x3; val_offset:46275*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46275*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ff8000; valaddr_reg:x3; val_offset:46278*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46278*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ffc000; valaddr_reg:x3; val_offset:46281*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46281*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ffe000; valaddr_reg:x3; val_offset:46284*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46284*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fff000; valaddr_reg:x3; val_offset:46287*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46287*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fff800; valaddr_reg:x3; val_offset:46290*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46290*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fffc00; valaddr_reg:x3; val_offset:46293*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46293*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fffe00; valaddr_reg:x3; val_offset:46296*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46296*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ffff00; valaddr_reg:x3; val_offset:46299*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46299*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ffff80; valaddr_reg:x3; val_offset:46302*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46302*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ffffc0; valaddr_reg:x3; val_offset:46305*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46305*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ffffe0; valaddr_reg:x3; val_offset:46308*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46308*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fffff0; valaddr_reg:x3; val_offset:46311*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46311*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fffff8; valaddr_reg:x3; val_offset:46314*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46314*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fffffc; valaddr_reg:x3; val_offset:46317*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46317*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5fffffe; valaddr_reg:x3; val_offset:46320*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46320*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xeb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xf5ffffff; valaddr_reg:x3; val_offset:46323*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46323*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff000001; valaddr_reg:x3; val_offset:46326*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46326*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff000003; valaddr_reg:x3; val_offset:46329*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46329*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff000007; valaddr_reg:x3; val_offset:46332*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46332*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff199999; valaddr_reg:x3; val_offset:46335*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46335*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff249249; valaddr_reg:x3; val_offset:46338*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46338*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff333333; valaddr_reg:x3; val_offset:46341*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46341*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:46344*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46344*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:46347*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46347*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff444444; valaddr_reg:x3; val_offset:46350*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46350*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:46353*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46353*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:46356*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46356*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff666666; valaddr_reg:x3; val_offset:46359*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46359*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:46362*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46362*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:46365*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46365*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:46368*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46368*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x18277b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x575c44 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e98277b; op2val:0xc0575c44; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:46371*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46371*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4800000; valaddr_reg:x3; val_offset:46374*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46374*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4800001; valaddr_reg:x3; val_offset:46377*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46377*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4800003; valaddr_reg:x3; val_offset:46380*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46380*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4800007; valaddr_reg:x3; val_offset:46383*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46383*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe480000f; valaddr_reg:x3; val_offset:46386*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46386*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe480001f; valaddr_reg:x3; val_offset:46389*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46389*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe480003f; valaddr_reg:x3; val_offset:46392*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46392*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe480007f; valaddr_reg:x3; val_offset:46395*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46395*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe48000ff; valaddr_reg:x3; val_offset:46398*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46398*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe48001ff; valaddr_reg:x3; val_offset:46401*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46401*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe48003ff; valaddr_reg:x3; val_offset:46404*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46404*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe48007ff; valaddr_reg:x3; val_offset:46407*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46407*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4800fff; valaddr_reg:x3; val_offset:46410*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46410*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4801fff; valaddr_reg:x3; val_offset:46413*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46413*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4803fff; valaddr_reg:x3; val_offset:46416*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46416*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4807fff; valaddr_reg:x3; val_offset:46419*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46419*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe480ffff; valaddr_reg:x3; val_offset:46422*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46422*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe481ffff; valaddr_reg:x3; val_offset:46425*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46425*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe483ffff; valaddr_reg:x3; val_offset:46428*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46428*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe487ffff; valaddr_reg:x3; val_offset:46431*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46431*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe48fffff; valaddr_reg:x3; val_offset:46434*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46434*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe49fffff; valaddr_reg:x3; val_offset:46437*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46437*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4bfffff; valaddr_reg:x3; val_offset:46440*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46440*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4c00000; valaddr_reg:x3; val_offset:46443*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46443*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4e00000; valaddr_reg:x3; val_offset:46446*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46446*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4f00000; valaddr_reg:x3; val_offset:46449*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46449*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4f80000; valaddr_reg:x3; val_offset:46452*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46452*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fc0000; valaddr_reg:x3; val_offset:46455*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46455*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fe0000; valaddr_reg:x3; val_offset:46458*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46458*0 + 3*120*FLEN/8, x4, x1, x2) + +inst_15487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ff0000; valaddr_reg:x3; val_offset:46461*0 + 3*120*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46461*0 + 3*120*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8389631,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8390655,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8392703,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8396799,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8404991,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8421375,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8454143,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8519679,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8650751,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8912895,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(9437183,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10485759,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12582911,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12582912,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14680064,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15728640,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16252928,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16515072,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16646144,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16711680,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16744448,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16760832,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16769024,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16773120,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16775168,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776192,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776704,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776960,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777088,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777152,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777184,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777200,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2123864481,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777215,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806528,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806529,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806531,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806535,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806543,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806559,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806591,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806655,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118806783,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118807039,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118807551,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118808575,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118810623,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118814719,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118822911,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118839295,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118872063,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4118937599,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4119068671,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4119330815,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4119855103,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4120903679,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4123000831,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4123000832,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4125097984,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4126146560,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4126670848,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4126932992,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127064064,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127129600,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127162368,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127178752,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127186944,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127191040,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127193088,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127194112,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127194624,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127194880,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127195008,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127195072,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127195104,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127195120,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127195128,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127195132,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127195134,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4127195135,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2123900795,32,FLEN) +NAN_BOXED(3226950724,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833593856,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833593857,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833593859,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833593863,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833593871,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833593887,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833593919,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833593983,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833594111,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833594367,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833594879,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833595903,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833597951,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833602047,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833610239,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833626623,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833659391,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833724927,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3833855999,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3834118143,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3834642431,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3835691007,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3837788159,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3837788160,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3839885312,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3840933888,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841458176,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841720320,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841851392,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841916928,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-122.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-122.S new file mode 100644 index 000000000..d7048041e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-122.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_15488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ff8000; valaddr_reg:x3; val_offset:46464*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46464*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ffc000; valaddr_reg:x3; val_offset:46467*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46467*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ffe000; valaddr_reg:x3; val_offset:46470*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46470*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fff000; valaddr_reg:x3; val_offset:46473*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46473*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fff800; valaddr_reg:x3; val_offset:46476*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46476*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fffc00; valaddr_reg:x3; val_offset:46479*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46479*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fffe00; valaddr_reg:x3; val_offset:46482*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46482*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ffff00; valaddr_reg:x3; val_offset:46485*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46485*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ffff80; valaddr_reg:x3; val_offset:46488*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46488*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ffffc0; valaddr_reg:x3; val_offset:46491*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46491*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ffffe0; valaddr_reg:x3; val_offset:46494*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46494*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fffff0; valaddr_reg:x3; val_offset:46497*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46497*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fffff8; valaddr_reg:x3; val_offset:46500*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46500*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fffffc; valaddr_reg:x3; val_offset:46503*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46503*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4fffffe; valaddr_reg:x3; val_offset:46506*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46506*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xc9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xe4ffffff; valaddr_reg:x3; val_offset:46509*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46509*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff000001; valaddr_reg:x3; val_offset:46512*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46512*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff000003; valaddr_reg:x3; val_offset:46515*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46515*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff000007; valaddr_reg:x3; val_offset:46518*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46518*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff199999; valaddr_reg:x3; val_offset:46521*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46521*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff249249; valaddr_reg:x3; val_offset:46524*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46524*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff333333; valaddr_reg:x3; val_offset:46527*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46527*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:46530*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46530*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:46533*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46533*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff444444; valaddr_reg:x3; val_offset:46536*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46536*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:46539*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46539*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:46542*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46542*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff666666; valaddr_reg:x3; val_offset:46545*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46545*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:46548*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46548*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:46551*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46551*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:46554*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46554*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x19215d and fs2 == 1 and fe2 == 0x80 and fm2 == 0x55fcd6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e99215d; op2val:0xc055fcd6; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:46557*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46557*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:46560*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46560*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:46563*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46563*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:46566*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46566*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:46569*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46569*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:46572*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46572*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:46575*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46575*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:46578*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46578*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:46581*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46581*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:46584*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46584*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:46587*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46587*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:46590*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46590*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:46593*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46593*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:46596*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46596*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:46599*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46599*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:46602*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46602*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:46605*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46605*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc000000; valaddr_reg:x3; val_offset:46608*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46608*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc000001; valaddr_reg:x3; val_offset:46611*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46611*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc000003; valaddr_reg:x3; val_offset:46614*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46614*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc000007; valaddr_reg:x3; val_offset:46617*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46617*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc00000f; valaddr_reg:x3; val_offset:46620*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46620*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc00001f; valaddr_reg:x3; val_offset:46623*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46623*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc00003f; valaddr_reg:x3; val_offset:46626*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46626*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc00007f; valaddr_reg:x3; val_offset:46629*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46629*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc0000ff; valaddr_reg:x3; val_offset:46632*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46632*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc0001ff; valaddr_reg:x3; val_offset:46635*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46635*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc0003ff; valaddr_reg:x3; val_offset:46638*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46638*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc0007ff; valaddr_reg:x3; val_offset:46641*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46641*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc000fff; valaddr_reg:x3; val_offset:46644*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46644*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc001fff; valaddr_reg:x3; val_offset:46647*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46647*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc003fff; valaddr_reg:x3; val_offset:46650*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46650*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc007fff; valaddr_reg:x3; val_offset:46653*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46653*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc00ffff; valaddr_reg:x3; val_offset:46656*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46656*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc01ffff; valaddr_reg:x3; val_offset:46659*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46659*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc03ffff; valaddr_reg:x3; val_offset:46662*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46662*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc07ffff; valaddr_reg:x3; val_offset:46665*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46665*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc0fffff; valaddr_reg:x3; val_offset:46668*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46668*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc1fffff; valaddr_reg:x3; val_offset:46671*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46671*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc3fffff; valaddr_reg:x3; val_offset:46674*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46674*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc400000; valaddr_reg:x3; val_offset:46677*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46677*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc600000; valaddr_reg:x3; val_offset:46680*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46680*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc700000; valaddr_reg:x3; val_offset:46683*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46683*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc780000; valaddr_reg:x3; val_offset:46686*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46686*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7c0000; valaddr_reg:x3; val_offset:46689*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46689*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7e0000; valaddr_reg:x3; val_offset:46692*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46692*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7f0000; valaddr_reg:x3; val_offset:46695*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46695*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7f8000; valaddr_reg:x3; val_offset:46698*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46698*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7fc000; valaddr_reg:x3; val_offset:46701*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46701*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7fe000; valaddr_reg:x3; val_offset:46704*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46704*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7ff000; valaddr_reg:x3; val_offset:46707*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46707*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7ff800; valaddr_reg:x3; val_offset:46710*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46710*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7ffc00; valaddr_reg:x3; val_offset:46713*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46713*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7ffe00; valaddr_reg:x3; val_offset:46716*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46716*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7fff00; valaddr_reg:x3; val_offset:46719*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46719*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7fff80; valaddr_reg:x3; val_offset:46722*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46722*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7fffc0; valaddr_reg:x3; val_offset:46725*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46725*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7fffe0; valaddr_reg:x3; val_offset:46728*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46728*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7ffff0; valaddr_reg:x3; val_offset:46731*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46731*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7ffff8; valaddr_reg:x3; val_offset:46734*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46734*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7ffffc; valaddr_reg:x3; val_offset:46737*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46737*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7ffffe; valaddr_reg:x3; val_offset:46740*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46740*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1925f2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9925f2; op2val:0x80000000; +op3val:0xfc7fffff; valaddr_reg:x3; val_offset:46743*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46743*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:46746*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46746*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:46749*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46749*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:46752*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46752*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:46755*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46755*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:46758*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46758*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:46761*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46761*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:46764*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46764*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:46767*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46767*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:46770*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46770*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:46773*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46773*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:46776*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46776*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:46779*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46779*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:46782*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46782*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:46785*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46785*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:46788*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46788*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:46791*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46791*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5000000; valaddr_reg:x3; val_offset:46794*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46794*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5000001; valaddr_reg:x3; val_offset:46797*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46797*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5000003; valaddr_reg:x3; val_offset:46800*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46800*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5000007; valaddr_reg:x3; val_offset:46803*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46803*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x500000f; valaddr_reg:x3; val_offset:46806*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46806*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x500001f; valaddr_reg:x3; val_offset:46809*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46809*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x500003f; valaddr_reg:x3; val_offset:46812*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46812*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x500007f; valaddr_reg:x3; val_offset:46815*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46815*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x50000ff; valaddr_reg:x3; val_offset:46818*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46818*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x50001ff; valaddr_reg:x3; val_offset:46821*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46821*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x50003ff; valaddr_reg:x3; val_offset:46824*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46824*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x50007ff; valaddr_reg:x3; val_offset:46827*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46827*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5000fff; valaddr_reg:x3; val_offset:46830*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46830*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5001fff; valaddr_reg:x3; val_offset:46833*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46833*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5003fff; valaddr_reg:x3; val_offset:46836*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46836*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5007fff; valaddr_reg:x3; val_offset:46839*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46839*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x500ffff; valaddr_reg:x3; val_offset:46842*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46842*0 + 3*121*FLEN/8, x4, x1, x2) + +inst_15615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x501ffff; valaddr_reg:x3; val_offset:46845*0 + 3*121*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46845*0 + 3*121*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841949696,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841966080,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841974272,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841978368,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841980416,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841981440,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841981952,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982208,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982336,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982400,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982432,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982448,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982456,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982460,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982462,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(3841982463,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2123964765,32,FLEN) +NAN_BOXED(3226860758,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858432,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858433,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858435,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858439,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858447,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858463,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858495,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858559,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858687,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227858943,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227859455,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227860479,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227862527,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227866623,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227874815,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227891199,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227923967,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4227989503,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4228120575,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4228382719,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4228907007,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4229955583,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4232052735,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4232052736,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4234149888,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4235198464,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4235722752,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4235984896,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236115968,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236181504,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236214272,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236230656,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236238848,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236242944,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236244992,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236246016,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236246528,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236246784,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236246912,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236246976,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236247008,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236247024,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236247032,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236247036,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236247038,32,FLEN) +NAN_BOXED(2123965938,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4236247039,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886080,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886081,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886083,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886087,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886095,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886111,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886143,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886207,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886335,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886591,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83887103,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83888127,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83890175,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83894271,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83902463,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83918847,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83951615,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84017151,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-123.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-123.S new file mode 100644 index 000000000..a3084929d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-123.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_15616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x503ffff; valaddr_reg:x3; val_offset:46848*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46848*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x507ffff; valaddr_reg:x3; val_offset:46851*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46851*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x50fffff; valaddr_reg:x3; val_offset:46854*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46854*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x51fffff; valaddr_reg:x3; val_offset:46857*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46857*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x53fffff; valaddr_reg:x3; val_offset:46860*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46860*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5400000; valaddr_reg:x3; val_offset:46863*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46863*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5600000; valaddr_reg:x3; val_offset:46866*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46866*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5700000; valaddr_reg:x3; val_offset:46869*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46869*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x5780000; valaddr_reg:x3; val_offset:46872*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46872*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57c0000; valaddr_reg:x3; val_offset:46875*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46875*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57e0000; valaddr_reg:x3; val_offset:46878*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46878*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57f0000; valaddr_reg:x3; val_offset:46881*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46881*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57f8000; valaddr_reg:x3; val_offset:46884*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46884*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57fc000; valaddr_reg:x3; val_offset:46887*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46887*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57fe000; valaddr_reg:x3; val_offset:46890*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46890*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57ff000; valaddr_reg:x3; val_offset:46893*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46893*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57ff800; valaddr_reg:x3; val_offset:46896*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46896*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57ffc00; valaddr_reg:x3; val_offset:46899*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46899*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57ffe00; valaddr_reg:x3; val_offset:46902*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46902*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57fff00; valaddr_reg:x3; val_offset:46905*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46905*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57fff80; valaddr_reg:x3; val_offset:46908*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46908*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57fffc0; valaddr_reg:x3; val_offset:46911*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46911*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57fffe0; valaddr_reg:x3; val_offset:46914*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46914*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57ffff0; valaddr_reg:x3; val_offset:46917*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46917*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57ffff8; valaddr_reg:x3; val_offset:46920*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46920*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57ffffc; valaddr_reg:x3; val_offset:46923*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46923*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57ffffe; valaddr_reg:x3; val_offset:46926*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46926*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ad123 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ad123; op2val:0x0; +op3val:0x57fffff; valaddr_reg:x3; val_offset:46929*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46929*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0000000; valaddr_reg:x3; val_offset:46932*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46932*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0000001; valaddr_reg:x3; val_offset:46935*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46935*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0000003; valaddr_reg:x3; val_offset:46938*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46938*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0000007; valaddr_reg:x3; val_offset:46941*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46941*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb000000f; valaddr_reg:x3; val_offset:46944*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46944*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb000001f; valaddr_reg:x3; val_offset:46947*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46947*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb000003f; valaddr_reg:x3; val_offset:46950*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46950*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb000007f; valaddr_reg:x3; val_offset:46953*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46953*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb00000ff; valaddr_reg:x3; val_offset:46956*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46956*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb00001ff; valaddr_reg:x3; val_offset:46959*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46959*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb00003ff; valaddr_reg:x3; val_offset:46962*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46962*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb00007ff; valaddr_reg:x3; val_offset:46965*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46965*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0000fff; valaddr_reg:x3; val_offset:46968*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46968*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0001fff; valaddr_reg:x3; val_offset:46971*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46971*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0003fff; valaddr_reg:x3; val_offset:46974*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46974*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0007fff; valaddr_reg:x3; val_offset:46977*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46977*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb000ffff; valaddr_reg:x3; val_offset:46980*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46980*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb001ffff; valaddr_reg:x3; val_offset:46983*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46983*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb003ffff; valaddr_reg:x3; val_offset:46986*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46986*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb007ffff; valaddr_reg:x3; val_offset:46989*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46989*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb00fffff; valaddr_reg:x3; val_offset:46992*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46992*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb01fffff; valaddr_reg:x3; val_offset:46995*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46995*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb03fffff; valaddr_reg:x3; val_offset:46998*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 46998*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0400000; valaddr_reg:x3; val_offset:47001*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47001*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0600000; valaddr_reg:x3; val_offset:47004*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47004*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0700000; valaddr_reg:x3; val_offset:47007*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47007*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb0780000; valaddr_reg:x3; val_offset:47010*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47010*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07c0000; valaddr_reg:x3; val_offset:47013*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47013*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07e0000; valaddr_reg:x3; val_offset:47016*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47016*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07f0000; valaddr_reg:x3; val_offset:47019*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47019*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07f8000; valaddr_reg:x3; val_offset:47022*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47022*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07fc000; valaddr_reg:x3; val_offset:47025*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47025*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07fe000; valaddr_reg:x3; val_offset:47028*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47028*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07ff000; valaddr_reg:x3; val_offset:47031*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47031*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07ff800; valaddr_reg:x3; val_offset:47034*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47034*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07ffc00; valaddr_reg:x3; val_offset:47037*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47037*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07ffe00; valaddr_reg:x3; val_offset:47040*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47040*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07fff00; valaddr_reg:x3; val_offset:47043*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47043*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07fff80; valaddr_reg:x3; val_offset:47046*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47046*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07fffc0; valaddr_reg:x3; val_offset:47049*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47049*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07fffe0; valaddr_reg:x3; val_offset:47052*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47052*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07ffff0; valaddr_reg:x3; val_offset:47055*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47055*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07ffff8; valaddr_reg:x3; val_offset:47058*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47058*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07ffffc; valaddr_reg:x3; val_offset:47061*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47061*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07ffffe; valaddr_reg:x3; val_offset:47064*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47064*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xb07fffff; valaddr_reg:x3; val_offset:47067*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47067*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff000001; valaddr_reg:x3; val_offset:47070*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47070*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff000003; valaddr_reg:x3; val_offset:47073*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47073*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff000007; valaddr_reg:x3; val_offset:47076*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47076*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff199999; valaddr_reg:x3; val_offset:47079*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47079*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff249249; valaddr_reg:x3; val_offset:47082*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47082*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff333333; valaddr_reg:x3; val_offset:47085*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47085*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:47088*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47088*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:47091*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47091*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff444444; valaddr_reg:x3; val_offset:47094*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47094*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:47097*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47097*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:47100*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47100*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff666666; valaddr_reg:x3; val_offset:47103*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47103*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:47106*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47106*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:47109*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47109*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:47112*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47112*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1ce997 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x50d46d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9ce997; op2val:0xc050d46d; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:47115*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47115*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:47118*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47118*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:47121*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47121*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:47124*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47124*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:47127*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47127*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:47130*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47130*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:47133*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47133*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:47136*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47136*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:47139*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47139*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:47142*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47142*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:47145*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47145*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:47148*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47148*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:47151*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47151*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:47154*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47154*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:47157*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47157*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:47160*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47160*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:47163*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47163*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4000000; valaddr_reg:x3; val_offset:47166*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47166*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4000001; valaddr_reg:x3; val_offset:47169*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47169*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4000003; valaddr_reg:x3; val_offset:47172*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47172*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4000007; valaddr_reg:x3; val_offset:47175*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47175*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x400000f; valaddr_reg:x3; val_offset:47178*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47178*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x400001f; valaddr_reg:x3; val_offset:47181*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47181*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x400003f; valaddr_reg:x3; val_offset:47184*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47184*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x400007f; valaddr_reg:x3; val_offset:47187*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47187*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x40000ff; valaddr_reg:x3; val_offset:47190*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47190*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x40001ff; valaddr_reg:x3; val_offset:47193*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47193*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x40003ff; valaddr_reg:x3; val_offset:47196*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47196*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x40007ff; valaddr_reg:x3; val_offset:47199*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47199*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4000fff; valaddr_reg:x3; val_offset:47202*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47202*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4001fff; valaddr_reg:x3; val_offset:47205*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47205*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4003fff; valaddr_reg:x3; val_offset:47208*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47208*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4007fff; valaddr_reg:x3; val_offset:47211*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47211*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x400ffff; valaddr_reg:x3; val_offset:47214*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47214*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x401ffff; valaddr_reg:x3; val_offset:47217*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47217*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x403ffff; valaddr_reg:x3; val_offset:47220*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47220*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x407ffff; valaddr_reg:x3; val_offset:47223*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47223*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x40fffff; valaddr_reg:x3; val_offset:47226*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47226*0 + 3*122*FLEN/8, x4, x1, x2) + +inst_15743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x41fffff; valaddr_reg:x3; val_offset:47229*0 + 3*122*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47229*0 + 3*122*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84148223,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84410367,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84934655,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(85983231,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(88080383,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(88080384,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(90177536,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(91226112,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(91750400,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92012544,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92143616,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92209152,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92241920,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92258304,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92266496,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92270592,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92272640,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92273664,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274176,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274432,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274560,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274624,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274656,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274672,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274680,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274684,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274686,32,FLEN) +NAN_BOXED(2124075299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274687,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790016,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790017,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790019,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790023,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790031,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790047,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790079,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790143,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790271,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952790527,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952791039,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952792063,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952794111,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952798207,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952806399,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952822783,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952855551,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2952921087,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2953052159,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2953314303,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2953838591,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2954887167,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2956984319,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2956984320,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2959081472,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2960130048,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2960654336,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2960916480,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961047552,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961113088,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961145856,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961162240,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961170432,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961174528,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961176576,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961177600,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178112,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178368,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178496,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178560,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178592,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178608,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178616,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178620,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178622,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(2961178623,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2124212631,32,FLEN) +NAN_BOXED(3226522733,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108864,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108865,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108867,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108871,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108879,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108895,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108927,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108991,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109119,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109375,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109887,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67110911,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67112959,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67117055,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67125247,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67141631,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67174399,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67239935,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67371007,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67633151,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(68157439,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(69206015,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-124.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-124.S new file mode 100644 index 000000000..0f90f14ae --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-124.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_15744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x43fffff; valaddr_reg:x3; val_offset:47232*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47232*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4400000; valaddr_reg:x3; val_offset:47235*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47235*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4600000; valaddr_reg:x3; val_offset:47238*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47238*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4700000; valaddr_reg:x3; val_offset:47241*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47241*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x4780000; valaddr_reg:x3; val_offset:47244*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47244*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47c0000; valaddr_reg:x3; val_offset:47247*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47247*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47e0000; valaddr_reg:x3; val_offset:47250*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47250*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47f0000; valaddr_reg:x3; val_offset:47253*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47253*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47f8000; valaddr_reg:x3; val_offset:47256*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47256*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47fc000; valaddr_reg:x3; val_offset:47259*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47259*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47fe000; valaddr_reg:x3; val_offset:47262*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47262*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47ff000; valaddr_reg:x3; val_offset:47265*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47265*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47ff800; valaddr_reg:x3; val_offset:47268*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47268*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47ffc00; valaddr_reg:x3; val_offset:47271*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47271*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47ffe00; valaddr_reg:x3; val_offset:47274*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47274*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47fff00; valaddr_reg:x3; val_offset:47277*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47277*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47fff80; valaddr_reg:x3; val_offset:47280*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47280*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47fffc0; valaddr_reg:x3; val_offset:47283*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47283*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47fffe0; valaddr_reg:x3; val_offset:47286*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47286*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47ffff0; valaddr_reg:x3; val_offset:47289*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47289*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47ffff8; valaddr_reg:x3; val_offset:47292*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47292*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47ffffc; valaddr_reg:x3; val_offset:47295*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47295*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47ffffe; valaddr_reg:x3; val_offset:47298*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47298*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1de0b9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9de0b9; op2val:0x0; +op3val:0x47fffff; valaddr_reg:x3; val_offset:47301*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47301*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:47304*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47304*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:47307*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47307*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:47310*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47310*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:47313*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47313*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:47316*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47316*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:47319*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47319*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:47322*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47322*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:47325*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47325*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:47328*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47328*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:47331*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47331*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:47334*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47334*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:47337*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47337*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:47340*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47340*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:47343*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47343*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:47346*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47346*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:47349*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47349*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6000000; valaddr_reg:x3; val_offset:47352*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47352*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6000001; valaddr_reg:x3; val_offset:47355*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47355*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6000003; valaddr_reg:x3; val_offset:47358*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47358*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6000007; valaddr_reg:x3; val_offset:47361*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47361*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x600000f; valaddr_reg:x3; val_offset:47364*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47364*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x600001f; valaddr_reg:x3; val_offset:47367*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47367*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x600003f; valaddr_reg:x3; val_offset:47370*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47370*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x600007f; valaddr_reg:x3; val_offset:47373*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47373*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x60000ff; valaddr_reg:x3; val_offset:47376*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47376*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x60001ff; valaddr_reg:x3; val_offset:47379*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47379*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x60003ff; valaddr_reg:x3; val_offset:47382*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47382*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x60007ff; valaddr_reg:x3; val_offset:47385*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47385*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6000fff; valaddr_reg:x3; val_offset:47388*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47388*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6001fff; valaddr_reg:x3; val_offset:47391*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47391*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6003fff; valaddr_reg:x3; val_offset:47394*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47394*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6007fff; valaddr_reg:x3; val_offset:47397*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47397*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x600ffff; valaddr_reg:x3; val_offset:47400*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47400*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x601ffff; valaddr_reg:x3; val_offset:47403*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47403*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x603ffff; valaddr_reg:x3; val_offset:47406*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47406*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x607ffff; valaddr_reg:x3; val_offset:47409*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47409*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x60fffff; valaddr_reg:x3; val_offset:47412*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47412*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x61fffff; valaddr_reg:x3; val_offset:47415*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47415*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x63fffff; valaddr_reg:x3; val_offset:47418*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47418*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6400000; valaddr_reg:x3; val_offset:47421*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47421*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6600000; valaddr_reg:x3; val_offset:47424*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47424*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6700000; valaddr_reg:x3; val_offset:47427*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47427*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x6780000; valaddr_reg:x3; val_offset:47430*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47430*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67c0000; valaddr_reg:x3; val_offset:47433*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47433*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67e0000; valaddr_reg:x3; val_offset:47436*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47436*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67f0000; valaddr_reg:x3; val_offset:47439*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47439*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67f8000; valaddr_reg:x3; val_offset:47442*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47442*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67fc000; valaddr_reg:x3; val_offset:47445*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47445*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67fe000; valaddr_reg:x3; val_offset:47448*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47448*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67ff000; valaddr_reg:x3; val_offset:47451*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47451*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67ff800; valaddr_reg:x3; val_offset:47454*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47454*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67ffc00; valaddr_reg:x3; val_offset:47457*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47457*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67ffe00; valaddr_reg:x3; val_offset:47460*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47460*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67fff00; valaddr_reg:x3; val_offset:47463*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47463*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67fff80; valaddr_reg:x3; val_offset:47466*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47466*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67fffc0; valaddr_reg:x3; val_offset:47469*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47469*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67fffe0; valaddr_reg:x3; val_offset:47472*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47472*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67ffff0; valaddr_reg:x3; val_offset:47475*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47475*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67ffff8; valaddr_reg:x3; val_offset:47478*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47478*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67ffffc; valaddr_reg:x3; val_offset:47481*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47481*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67ffffe; valaddr_reg:x3; val_offset:47484*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47484*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f40ca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f40ca; op2val:0x0; +op3val:0x67fffff; valaddr_reg:x3; val_offset:47487*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47487*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd000000; valaddr_reg:x3; val_offset:47490*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47490*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd000001; valaddr_reg:x3; val_offset:47493*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47493*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd000003; valaddr_reg:x3; val_offset:47496*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47496*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd000007; valaddr_reg:x3; val_offset:47499*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47499*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd00000f; valaddr_reg:x3; val_offset:47502*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47502*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd00001f; valaddr_reg:x3; val_offset:47505*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47505*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd00003f; valaddr_reg:x3; val_offset:47508*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47508*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd00007f; valaddr_reg:x3; val_offset:47511*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47511*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd0000ff; valaddr_reg:x3; val_offset:47514*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47514*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd0001ff; valaddr_reg:x3; val_offset:47517*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47517*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd0003ff; valaddr_reg:x3; val_offset:47520*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47520*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd0007ff; valaddr_reg:x3; val_offset:47523*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47523*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd000fff; valaddr_reg:x3; val_offset:47526*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47526*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd001fff; valaddr_reg:x3; val_offset:47529*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47529*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd003fff; valaddr_reg:x3; val_offset:47532*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47532*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd007fff; valaddr_reg:x3; val_offset:47535*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47535*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd00ffff; valaddr_reg:x3; val_offset:47538*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47538*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd01ffff; valaddr_reg:x3; val_offset:47541*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47541*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd03ffff; valaddr_reg:x3; val_offset:47544*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47544*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd07ffff; valaddr_reg:x3; val_offset:47547*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47547*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd0fffff; valaddr_reg:x3; val_offset:47550*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47550*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd1fffff; valaddr_reg:x3; val_offset:47553*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47553*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd3fffff; valaddr_reg:x3; val_offset:47556*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47556*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd400000; valaddr_reg:x3; val_offset:47559*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47559*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd600000; valaddr_reg:x3; val_offset:47562*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47562*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd700000; valaddr_reg:x3; val_offset:47565*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47565*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd780000; valaddr_reg:x3; val_offset:47568*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47568*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7c0000; valaddr_reg:x3; val_offset:47571*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47571*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7e0000; valaddr_reg:x3; val_offset:47574*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47574*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7f0000; valaddr_reg:x3; val_offset:47577*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47577*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7f8000; valaddr_reg:x3; val_offset:47580*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47580*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7fc000; valaddr_reg:x3; val_offset:47583*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47583*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7fe000; valaddr_reg:x3; val_offset:47586*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47586*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7ff000; valaddr_reg:x3; val_offset:47589*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47589*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7ff800; valaddr_reg:x3; val_offset:47592*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47592*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7ffc00; valaddr_reg:x3; val_offset:47595*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47595*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7ffe00; valaddr_reg:x3; val_offset:47598*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47598*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7fff00; valaddr_reg:x3; val_offset:47601*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47601*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7fff80; valaddr_reg:x3; val_offset:47604*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47604*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7fffc0; valaddr_reg:x3; val_offset:47607*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47607*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7fffe0; valaddr_reg:x3; val_offset:47610*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47610*0 + 3*123*FLEN/8, x4, x1, x2) + +inst_15871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7ffff0; valaddr_reg:x3; val_offset:47613*0 + 3*123*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47613*0 + 3*123*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(71303167,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(71303168,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(73400320,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(74448896,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(74973184,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75235328,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75366400,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75431936,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75464704,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75481088,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75489280,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75493376,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75495424,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75496448,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75496960,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497216,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497344,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497408,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497440,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497456,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497464,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497468,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497470,32,FLEN) +NAN_BOXED(2124275897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497471,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663296,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663297,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663299,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663303,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663311,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663327,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663359,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663423,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663551,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663807,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100664319,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100665343,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100667391,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100671487,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100679679,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100696063,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100728831,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100794367,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100925439,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(101187583,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(101711871,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(102760447,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(104857599,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(104857600,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(106954752,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108003328,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108527616,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108789760,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108920832,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108986368,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109019136,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109035520,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109043712,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109047808,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109049856,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109050880,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051392,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051648,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051776,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051840,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051872,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051888,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051896,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051900,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051902,32,FLEN) +NAN_BOXED(2124366026,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051903,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635648,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635649,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635651,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635655,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635663,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635679,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635711,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635775,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244635903,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244636159,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244636671,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244637695,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244639743,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244643839,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244652031,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244668415,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244701183,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244766719,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4244897791,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4245159935,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4245684223,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4246732799,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4248829951,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4248829952,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4250927104,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4251975680,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4252499968,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4252762112,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4252893184,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4252958720,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4252991488,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253007872,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253016064,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253020160,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253022208,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253023232,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253023744,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024000,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024128,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024192,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024224,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024240,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-125.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-125.S new file mode 100644 index 000000000..6d3baf2f4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-125.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_15872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7ffff8; valaddr_reg:x3; val_offset:47616*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47616*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7ffffc; valaddr_reg:x3; val_offset:47619*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47619*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7ffffe; valaddr_reg:x3; val_offset:47622*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47622*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfa and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xfd7fffff; valaddr_reg:x3; val_offset:47625*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47625*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff000001; valaddr_reg:x3; val_offset:47628*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47628*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff000003; valaddr_reg:x3; val_offset:47631*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47631*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff000007; valaddr_reg:x3; val_offset:47634*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47634*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff199999; valaddr_reg:x3; val_offset:47637*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47637*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff249249; valaddr_reg:x3; val_offset:47640*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47640*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff333333; valaddr_reg:x3; val_offset:47643*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47643*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:47646*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47646*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:47649*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47649*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff444444; valaddr_reg:x3; val_offset:47652*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47652*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:47655*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47655*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:47658*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47658*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff666666; valaddr_reg:x3; val_offset:47661*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47661*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:47664*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47664*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:47667*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47667*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:47670*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47670*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f4b7c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4db4e0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f4b7c; op2val:0xc04db4e0; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:47673*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47673*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2000000; valaddr_reg:x3; val_offset:47676*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47676*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2000001; valaddr_reg:x3; val_offset:47679*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47679*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2000003; valaddr_reg:x3; val_offset:47682*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47682*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2000007; valaddr_reg:x3; val_offset:47685*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47685*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb200000f; valaddr_reg:x3; val_offset:47688*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47688*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb200001f; valaddr_reg:x3; val_offset:47691*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47691*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb200003f; valaddr_reg:x3; val_offset:47694*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47694*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb200007f; valaddr_reg:x3; val_offset:47697*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47697*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb20000ff; valaddr_reg:x3; val_offset:47700*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47700*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb20001ff; valaddr_reg:x3; val_offset:47703*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47703*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb20003ff; valaddr_reg:x3; val_offset:47706*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47706*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb20007ff; valaddr_reg:x3; val_offset:47709*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47709*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2000fff; valaddr_reg:x3; val_offset:47712*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47712*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2001fff; valaddr_reg:x3; val_offset:47715*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47715*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2003fff; valaddr_reg:x3; val_offset:47718*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47718*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2007fff; valaddr_reg:x3; val_offset:47721*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47721*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb200ffff; valaddr_reg:x3; val_offset:47724*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47724*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb201ffff; valaddr_reg:x3; val_offset:47727*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47727*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb203ffff; valaddr_reg:x3; val_offset:47730*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47730*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb207ffff; valaddr_reg:x3; val_offset:47733*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47733*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb20fffff; valaddr_reg:x3; val_offset:47736*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47736*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb21fffff; valaddr_reg:x3; val_offset:47739*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47739*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb23fffff; valaddr_reg:x3; val_offset:47742*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47742*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2400000; valaddr_reg:x3; val_offset:47745*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47745*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2600000; valaddr_reg:x3; val_offset:47748*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47748*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2700000; valaddr_reg:x3; val_offset:47751*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47751*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb2780000; valaddr_reg:x3; val_offset:47754*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47754*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27c0000; valaddr_reg:x3; val_offset:47757*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47757*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27e0000; valaddr_reg:x3; val_offset:47760*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47760*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27f0000; valaddr_reg:x3; val_offset:47763*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47763*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27f8000; valaddr_reg:x3; val_offset:47766*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47766*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27fc000; valaddr_reg:x3; val_offset:47769*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47769*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27fe000; valaddr_reg:x3; val_offset:47772*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47772*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27ff000; valaddr_reg:x3; val_offset:47775*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47775*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27ff800; valaddr_reg:x3; val_offset:47778*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47778*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27ffc00; valaddr_reg:x3; val_offset:47781*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47781*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27ffe00; valaddr_reg:x3; val_offset:47784*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47784*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27fff00; valaddr_reg:x3; val_offset:47787*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47787*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27fff80; valaddr_reg:x3; val_offset:47790*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47790*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27fffc0; valaddr_reg:x3; val_offset:47793*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47793*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27fffe0; valaddr_reg:x3; val_offset:47796*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47796*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27ffff0; valaddr_reg:x3; val_offset:47799*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47799*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27ffff8; valaddr_reg:x3; val_offset:47802*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47802*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27ffffc; valaddr_reg:x3; val_offset:47805*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47805*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27ffffe; valaddr_reg:x3; val_offset:47808*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47808*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x64 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xb27fffff; valaddr_reg:x3; val_offset:47811*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47811*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbf800001; valaddr_reg:x3; val_offset:47814*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47814*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbf800003; valaddr_reg:x3; val_offset:47817*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47817*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbf800007; valaddr_reg:x3; val_offset:47820*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47820*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbf999999; valaddr_reg:x3; val_offset:47823*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47823*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:47826*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47826*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:47829*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47829*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:47832*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47832*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:47835*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47835*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:47838*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47838*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:47841*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47841*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:47844*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47844*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:47847*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47847*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:47850*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47850*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:47853*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47853*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:47856*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47856*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f69aa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x66c6f7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f69aa; op2val:0x8066c6f7; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:47859*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47859*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:47862*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47862*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:47865*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47865*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:47868*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47868*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:47871*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47871*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:47874*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47874*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:47877*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47877*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:47880*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47880*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:47883*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47883*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:47886*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47886*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:47889*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47889*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:47892*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47892*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:47895*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47895*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:47898*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47898*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:47901*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47901*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:47904*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47904*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:47907*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47907*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f800000; valaddr_reg:x3; val_offset:47910*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47910*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f800001; valaddr_reg:x3; val_offset:47913*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47913*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f800003; valaddr_reg:x3; val_offset:47916*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47916*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f800007; valaddr_reg:x3; val_offset:47919*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47919*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f80000f; valaddr_reg:x3; val_offset:47922*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47922*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f80001f; valaddr_reg:x3; val_offset:47925*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47925*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f80003f; valaddr_reg:x3; val_offset:47928*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47928*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f80007f; valaddr_reg:x3; val_offset:47931*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47931*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f8000ff; valaddr_reg:x3; val_offset:47934*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47934*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f8001ff; valaddr_reg:x3; val_offset:47937*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47937*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f8003ff; valaddr_reg:x3; val_offset:47940*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47940*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f8007ff; valaddr_reg:x3; val_offset:47943*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47943*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f800fff; valaddr_reg:x3; val_offset:47946*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47946*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f801fff; valaddr_reg:x3; val_offset:47949*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47949*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f803fff; valaddr_reg:x3; val_offset:47952*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47952*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f807fff; valaddr_reg:x3; val_offset:47955*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47955*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f80ffff; valaddr_reg:x3; val_offset:47958*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47958*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f81ffff; valaddr_reg:x3; val_offset:47961*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47961*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f83ffff; valaddr_reg:x3; val_offset:47964*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47964*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f87ffff; valaddr_reg:x3; val_offset:47967*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47967*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f8fffff; valaddr_reg:x3; val_offset:47970*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47970*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8f9fffff; valaddr_reg:x3; val_offset:47973*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47973*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fbfffff; valaddr_reg:x3; val_offset:47976*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47976*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fc00000; valaddr_reg:x3; val_offset:47979*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47979*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fe00000; valaddr_reg:x3; val_offset:47982*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47982*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ff00000; valaddr_reg:x3; val_offset:47985*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47985*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ff80000; valaddr_reg:x3; val_offset:47988*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47988*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffc0000; valaddr_reg:x3; val_offset:47991*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47991*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffe0000; valaddr_reg:x3; val_offset:47994*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47994*0 + 3*124*FLEN/8, x4, x1, x2) + +inst_15999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fff0000; valaddr_reg:x3; val_offset:47997*0 + 3*124*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 47997*0 + 3*124*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024248,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024252,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024254,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4253024255,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2124368764,32,FLEN) +NAN_BOXED(3226318048,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344448,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344449,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344451,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344455,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344463,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344479,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344511,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344575,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344703,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986344959,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986345471,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986346495,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986348543,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986352639,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986360831,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986377215,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986409983,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986475519,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986606591,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2986868735,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2987393023,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2988441599,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2990538751,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2990538752,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2992635904,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2993684480,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994208768,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994470912,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994601984,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994667520,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994700288,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994716672,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994724864,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994728960,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994731008,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994732032,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994732544,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994732800,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994732928,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994732992,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994733024,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994733040,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994733048,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994733052,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994733054,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(2994733055,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2124376490,32,FLEN) +NAN_BOXED(2154219255,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530496,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530497,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530499,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530503,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530511,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530527,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530559,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530623,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530751,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407531007,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407531519,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407532543,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407534591,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407538687,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407546879,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407563263,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407596031,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407661567,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407792639,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2408054783,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2408579071,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2409627647,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2411724799,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2411724800,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2413821952,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2414870528,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415394816,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415656960,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415788032,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415853568,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-126.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-126.S new file mode 100644 index 000000000..86bb9be53 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-126.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_16000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fff8000; valaddr_reg:x3; val_offset:48000*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48000*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fffc000; valaddr_reg:x3; val_offset:48003*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48003*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fffe000; valaddr_reg:x3; val_offset:48006*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48006*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffff000; valaddr_reg:x3; val_offset:48009*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48009*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffff800; valaddr_reg:x3; val_offset:48012*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48012*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffffc00; valaddr_reg:x3; val_offset:48015*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48015*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffffe00; valaddr_reg:x3; val_offset:48018*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48018*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fffff00; valaddr_reg:x3; val_offset:48021*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48021*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fffff80; valaddr_reg:x3; val_offset:48024*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48024*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fffffc0; valaddr_reg:x3; val_offset:48027*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48027*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fffffe0; valaddr_reg:x3; val_offset:48030*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48030*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffffff0; valaddr_reg:x3; val_offset:48033*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48033*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffffff8; valaddr_reg:x3; val_offset:48036*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48036*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffffffc; valaddr_reg:x3; val_offset:48039*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48039*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8ffffffe; valaddr_reg:x3; val_offset:48042*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48042*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x1f9b30 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e9f9b30; op2val:0x80000000; +op3val:0x8fffffff; valaddr_reg:x3; val_offset:48045*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48045*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b000000; valaddr_reg:x3; val_offset:48048*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48048*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b000001; valaddr_reg:x3; val_offset:48051*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48051*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b000003; valaddr_reg:x3; val_offset:48054*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48054*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b000007; valaddr_reg:x3; val_offset:48057*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48057*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b00000f; valaddr_reg:x3; val_offset:48060*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48060*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b00001f; valaddr_reg:x3; val_offset:48063*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48063*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b00003f; valaddr_reg:x3; val_offset:48066*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48066*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b00007f; valaddr_reg:x3; val_offset:48069*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48069*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b0000ff; valaddr_reg:x3; val_offset:48072*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48072*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b0001ff; valaddr_reg:x3; val_offset:48075*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48075*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b0003ff; valaddr_reg:x3; val_offset:48078*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48078*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b0007ff; valaddr_reg:x3; val_offset:48081*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48081*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b000fff; valaddr_reg:x3; val_offset:48084*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48084*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b001fff; valaddr_reg:x3; val_offset:48087*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48087*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b003fff; valaddr_reg:x3; val_offset:48090*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48090*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b007fff; valaddr_reg:x3; val_offset:48093*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48093*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b00ffff; valaddr_reg:x3; val_offset:48096*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48096*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b01ffff; valaddr_reg:x3; val_offset:48099*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48099*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b03ffff; valaddr_reg:x3; val_offset:48102*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48102*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b07ffff; valaddr_reg:x3; val_offset:48105*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48105*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b0fffff; valaddr_reg:x3; val_offset:48108*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48108*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b1fffff; valaddr_reg:x3; val_offset:48111*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48111*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b3fffff; valaddr_reg:x3; val_offset:48114*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48114*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b400000; valaddr_reg:x3; val_offset:48117*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48117*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b600000; valaddr_reg:x3; val_offset:48120*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48120*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b700000; valaddr_reg:x3; val_offset:48123*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48123*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b780000; valaddr_reg:x3; val_offset:48126*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48126*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7c0000; valaddr_reg:x3; val_offset:48129*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48129*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7e0000; valaddr_reg:x3; val_offset:48132*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48132*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7f0000; valaddr_reg:x3; val_offset:48135*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48135*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7f8000; valaddr_reg:x3; val_offset:48138*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48138*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7fc000; valaddr_reg:x3; val_offset:48141*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48141*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7fe000; valaddr_reg:x3; val_offset:48144*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48144*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7ff000; valaddr_reg:x3; val_offset:48147*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48147*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7ff800; valaddr_reg:x3; val_offset:48150*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48150*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7ffc00; valaddr_reg:x3; val_offset:48153*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48153*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7ffe00; valaddr_reg:x3; val_offset:48156*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48156*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7fff00; valaddr_reg:x3; val_offset:48159*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48159*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7fff80; valaddr_reg:x3; val_offset:48162*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48162*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7fffc0; valaddr_reg:x3; val_offset:48165*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48165*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7fffe0; valaddr_reg:x3; val_offset:48168*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48168*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7ffff0; valaddr_reg:x3; val_offset:48171*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48171*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7ffff8; valaddr_reg:x3; val_offset:48174*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48174*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7ffffc; valaddr_reg:x3; val_offset:48177*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48177*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7ffffe; valaddr_reg:x3; val_offset:48180*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48180*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xf6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7b7fffff; valaddr_reg:x3; val_offset:48183*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48183*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f000001; valaddr_reg:x3; val_offset:48186*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48186*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f000003; valaddr_reg:x3; val_offset:48189*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48189*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f000007; valaddr_reg:x3; val_offset:48192*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48192*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f199999; valaddr_reg:x3; val_offset:48195*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48195*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f249249; valaddr_reg:x3; val_offset:48198*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48198*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f333333; valaddr_reg:x3; val_offset:48201*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48201*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:48204*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48204*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:48207*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48207*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f444444; valaddr_reg:x3; val_offset:48210*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48210*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:48213*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48213*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:48216*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48216*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f666666; valaddr_reg:x3; val_offset:48219*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48219*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:48222*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48222*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:48225*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48225*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:48228*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48228*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x20081f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4cc266 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea0081f; op2val:0x404cc266; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:48231*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48231*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f000000; valaddr_reg:x3; val_offset:48234*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48234*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f000001; valaddr_reg:x3; val_offset:48237*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48237*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f000003; valaddr_reg:x3; val_offset:48240*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48240*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f000007; valaddr_reg:x3; val_offset:48243*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48243*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f00000f; valaddr_reg:x3; val_offset:48246*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48246*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f00001f; valaddr_reg:x3; val_offset:48249*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48249*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f00003f; valaddr_reg:x3; val_offset:48252*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48252*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f00007f; valaddr_reg:x3; val_offset:48255*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48255*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f0000ff; valaddr_reg:x3; val_offset:48258*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48258*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f0001ff; valaddr_reg:x3; val_offset:48261*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48261*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f0003ff; valaddr_reg:x3; val_offset:48264*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48264*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f0007ff; valaddr_reg:x3; val_offset:48267*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48267*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f000fff; valaddr_reg:x3; val_offset:48270*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48270*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f001fff; valaddr_reg:x3; val_offset:48273*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48273*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f003fff; valaddr_reg:x3; val_offset:48276*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48276*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f007fff; valaddr_reg:x3; val_offset:48279*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48279*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f00ffff; valaddr_reg:x3; val_offset:48282*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48282*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f01ffff; valaddr_reg:x3; val_offset:48285*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48285*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f03ffff; valaddr_reg:x3; val_offset:48288*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48288*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f07ffff; valaddr_reg:x3; val_offset:48291*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48291*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f0fffff; valaddr_reg:x3; val_offset:48294*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48294*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f1fffff; valaddr_reg:x3; val_offset:48297*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48297*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f3fffff; valaddr_reg:x3; val_offset:48300*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48300*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f400000; valaddr_reg:x3; val_offset:48303*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48303*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f600000; valaddr_reg:x3; val_offset:48306*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48306*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f700000; valaddr_reg:x3; val_offset:48309*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48309*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f780000; valaddr_reg:x3; val_offset:48312*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48312*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7c0000; valaddr_reg:x3; val_offset:48315*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48315*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7e0000; valaddr_reg:x3; val_offset:48318*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48318*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7f0000; valaddr_reg:x3; val_offset:48321*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48321*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7f8000; valaddr_reg:x3; val_offset:48324*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48324*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7fc000; valaddr_reg:x3; val_offset:48327*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48327*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7fe000; valaddr_reg:x3; val_offset:48330*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48330*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7ff000; valaddr_reg:x3; val_offset:48333*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48333*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7ff800; valaddr_reg:x3; val_offset:48336*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48336*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7ffc00; valaddr_reg:x3; val_offset:48339*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48339*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7ffe00; valaddr_reg:x3; val_offset:48342*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48342*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7fff00; valaddr_reg:x3; val_offset:48345*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48345*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7fff80; valaddr_reg:x3; val_offset:48348*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48348*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7fffc0; valaddr_reg:x3; val_offset:48351*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48351*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7fffe0; valaddr_reg:x3; val_offset:48354*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48354*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7ffff0; valaddr_reg:x3; val_offset:48357*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48357*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7ffff8; valaddr_reg:x3; val_offset:48360*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48360*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7ffffc; valaddr_reg:x3; val_offset:48363*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48363*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7ffffe; valaddr_reg:x3; val_offset:48366*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48366*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xbe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x5f7fffff; valaddr_reg:x3; val_offset:48369*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48369*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f000001; valaddr_reg:x3; val_offset:48372*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48372*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f000003; valaddr_reg:x3; val_offset:48375*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48375*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f000007; valaddr_reg:x3; val_offset:48378*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48378*0 + 3*125*FLEN/8, x4, x1, x2) + +inst_16127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f199999; valaddr_reg:x3; val_offset:48381*0 + 3*125*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48381*0 + 3*125*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415886336,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415902720,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415910912,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415915008,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415917056,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918080,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918592,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918848,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918976,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919040,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919072,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919088,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919096,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919100,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919102,32,FLEN) +NAN_BOXED(2124389168,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919103,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597568,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597569,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597571,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597575,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597583,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597599,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597631,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597695,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063597823,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063598079,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063598591,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063599615,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063601663,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063605759,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063613951,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063630335,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063663103,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063728639,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2063859711,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2064121855,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2064646143,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2065694719,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2067791871,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2067791872,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2069889024,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2070937600,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071461888,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071724032,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071855104,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071920640,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071953408,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071969792,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071977984,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071982080,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071984128,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071985152,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071985664,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071985920,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071986048,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071986112,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071986144,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071986160,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071986168,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071986172,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071986174,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2071986175,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2124417055,32,FLEN) +NAN_BOXED(1078772326,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835520,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835521,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835523,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835527,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835535,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835551,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835583,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835647,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593835775,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593836031,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593836543,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593837567,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593839615,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593843711,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593851903,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593868287,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593901055,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1593966591,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1594097663,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1594359807,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1594884095,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1595932671,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1598029823,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1598029824,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1600126976,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1601175552,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1601699840,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1601961984,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602093056,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602158592,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602191360,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602207744,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602215936,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602220032,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602222080,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602223104,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602223616,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602223872,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602224000,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602224064,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602224096,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602224112,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602224120,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602224124,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602224126,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(1602224127,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-127.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-127.S new file mode 100644 index 000000000..a01a3ba6a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-127.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_16128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f249249; valaddr_reg:x3; val_offset:48384*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48384*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f333333; valaddr_reg:x3; val_offset:48387*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48387*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:48390*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48390*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:48393*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48393*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f444444; valaddr_reg:x3; val_offset:48396*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48396*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:48399*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48399*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:48402*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48402*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f666666; valaddr_reg:x3; val_offset:48405*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48405*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:48408*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48408*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:48411*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48411*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:48414*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48414*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2022af and fs2 == 0 and fe2 == 0x80 and fm2 == 0x4ca070 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea022af; op2val:0x404ca070; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:48417*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48417*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff000001; valaddr_reg:x3; val_offset:48420*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48420*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff000003; valaddr_reg:x3; val_offset:48423*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48423*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff000007; valaddr_reg:x3; val_offset:48426*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48426*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff199999; valaddr_reg:x3; val_offset:48429*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48429*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff249249; valaddr_reg:x3; val_offset:48432*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48432*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff333333; valaddr_reg:x3; val_offset:48435*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48435*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:48438*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48438*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:48441*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48441*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff444444; valaddr_reg:x3; val_offset:48444*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48444*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:48447*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48447*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:48450*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48450*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff666666; valaddr_reg:x3; val_offset:48453*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48453*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:48456*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48456*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:48459*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48459*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:48462*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48462*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:48465*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48465*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2036ee and fs2 == 1 and fe2 == 0x80 and fm2 == 0x4c8694 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea036ee; op2val:0xc04c8694; +op3val:0xff7fffff; valaddr_reg:x3; val_offset:48468*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48468*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6000000; valaddr_reg:x3; val_offset:48471*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48471*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6000001; valaddr_reg:x3; val_offset:48474*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48474*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6000003; valaddr_reg:x3; val_offset:48477*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48477*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6000007; valaddr_reg:x3; val_offset:48480*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48480*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb600000f; valaddr_reg:x3; val_offset:48483*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48483*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb600001f; valaddr_reg:x3; val_offset:48486*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48486*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb600003f; valaddr_reg:x3; val_offset:48489*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48489*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb600007f; valaddr_reg:x3; val_offset:48492*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48492*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb60000ff; valaddr_reg:x3; val_offset:48495*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48495*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb60001ff; valaddr_reg:x3; val_offset:48498*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48498*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb60003ff; valaddr_reg:x3; val_offset:48501*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48501*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb60007ff; valaddr_reg:x3; val_offset:48504*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48504*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6000fff; valaddr_reg:x3; val_offset:48507*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48507*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6001fff; valaddr_reg:x3; val_offset:48510*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48510*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6003fff; valaddr_reg:x3; val_offset:48513*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48513*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6007fff; valaddr_reg:x3; val_offset:48516*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48516*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb600ffff; valaddr_reg:x3; val_offset:48519*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48519*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb601ffff; valaddr_reg:x3; val_offset:48522*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48522*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb603ffff; valaddr_reg:x3; val_offset:48525*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48525*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb607ffff; valaddr_reg:x3; val_offset:48528*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48528*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb60fffff; valaddr_reg:x3; val_offset:48531*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48531*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb61fffff; valaddr_reg:x3; val_offset:48534*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48534*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb63fffff; valaddr_reg:x3; val_offset:48537*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48537*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6400000; valaddr_reg:x3; val_offset:48540*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48540*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6600000; valaddr_reg:x3; val_offset:48543*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48543*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6700000; valaddr_reg:x3; val_offset:48546*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48546*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb6780000; valaddr_reg:x3; val_offset:48549*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48549*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67c0000; valaddr_reg:x3; val_offset:48552*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48552*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67e0000; valaddr_reg:x3; val_offset:48555*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48555*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67f0000; valaddr_reg:x3; val_offset:48558*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48558*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67f8000; valaddr_reg:x3; val_offset:48561*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48561*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67fc000; valaddr_reg:x3; val_offset:48564*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48564*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67fe000; valaddr_reg:x3; val_offset:48567*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48567*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67ff000; valaddr_reg:x3; val_offset:48570*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48570*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67ff800; valaddr_reg:x3; val_offset:48573*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48573*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67ffc00; valaddr_reg:x3; val_offset:48576*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48576*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67ffe00; valaddr_reg:x3; val_offset:48579*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48579*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67fff00; valaddr_reg:x3; val_offset:48582*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48582*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67fff80; valaddr_reg:x3; val_offset:48585*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48585*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67fffc0; valaddr_reg:x3; val_offset:48588*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48588*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67fffe0; valaddr_reg:x3; val_offset:48591*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48591*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67ffff0; valaddr_reg:x3; val_offset:48594*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48594*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67ffff8; valaddr_reg:x3; val_offset:48597*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48597*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67ffffc; valaddr_reg:x3; val_offset:48600*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48600*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67ffffe; valaddr_reg:x3; val_offset:48603*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48603*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x6c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xb67fffff; valaddr_reg:x3; val_offset:48606*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48606*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbf800001; valaddr_reg:x3; val_offset:48609*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48609*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbf800003; valaddr_reg:x3; val_offset:48612*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48612*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbf800007; valaddr_reg:x3; val_offset:48615*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48615*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbf999999; valaddr_reg:x3; val_offset:48618*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48618*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:48621*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48621*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:48624*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48624*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:48627*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48627*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:48630*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48630*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:48633*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48633*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:48636*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48636*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:48639*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48639*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:48642*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48642*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:48645*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48645*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:48648*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48648*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:48651*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48651*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x205073 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x663303 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea05073; op2val:0x80663303; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:48654*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48654*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:48657*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48657*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:48660*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48660*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:48663*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48663*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:48666*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48666*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:48669*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48669*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:48672*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48672*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:48675*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48675*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:48678*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48678*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:48681*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48681*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:48684*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48684*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:48687*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48687*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:48690*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48690*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:48693*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48693*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:48696*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48696*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:48699*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48699*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:48702*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48702*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85800000; valaddr_reg:x3; val_offset:48705*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48705*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85800001; valaddr_reg:x3; val_offset:48708*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48708*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85800003; valaddr_reg:x3; val_offset:48711*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48711*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85800007; valaddr_reg:x3; val_offset:48714*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48714*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8580000f; valaddr_reg:x3; val_offset:48717*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48717*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8580001f; valaddr_reg:x3; val_offset:48720*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48720*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8580003f; valaddr_reg:x3; val_offset:48723*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48723*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8580007f; valaddr_reg:x3; val_offset:48726*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48726*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x858000ff; valaddr_reg:x3; val_offset:48729*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48729*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x858001ff; valaddr_reg:x3; val_offset:48732*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48732*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x858003ff; valaddr_reg:x3; val_offset:48735*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48735*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x858007ff; valaddr_reg:x3; val_offset:48738*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48738*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85800fff; valaddr_reg:x3; val_offset:48741*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48741*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85801fff; valaddr_reg:x3; val_offset:48744*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48744*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85803fff; valaddr_reg:x3; val_offset:48747*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48747*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85807fff; valaddr_reg:x3; val_offset:48750*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48750*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8580ffff; valaddr_reg:x3; val_offset:48753*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48753*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8581ffff; valaddr_reg:x3; val_offset:48756*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48756*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8583ffff; valaddr_reg:x3; val_offset:48759*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48759*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x8587ffff; valaddr_reg:x3; val_offset:48762*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48762*0 + 3*126*FLEN/8, x4, x1, x2) + +inst_16255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x858fffff; valaddr_reg:x3; val_offset:48765*0 + 3*126*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48765*0 + 3*126*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2124423855,32,FLEN) +NAN_BOXED(1078763632,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2124429038,32,FLEN) +NAN_BOXED(3226240660,32,FLEN) +NAN_BOXED(4286578687,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453312,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453313,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453315,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453319,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453327,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453343,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453375,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453439,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453567,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053453823,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053454335,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053455359,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053457407,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053461503,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053469695,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053486079,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053518847,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053584383,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053715455,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3053977599,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3054501887,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3055550463,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3057647615,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3057647616,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3059744768,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3060793344,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061317632,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061579776,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061710848,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061776384,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061809152,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061825536,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061833728,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061837824,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061839872,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061840896,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841408,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841664,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841792,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841856,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841888,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841904,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841912,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841916,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841918,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3061841919,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2124435571,32,FLEN) +NAN_BOXED(2154181379,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758336,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758337,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758339,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758343,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758351,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758367,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758399,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758463,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758591,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758847,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239759359,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239760383,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239762431,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239766527,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239774719,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239791103,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239823871,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239889407,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240020479,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240282623,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240806911,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-128.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-128.S new file mode 100644 index 000000000..a2d2b8fe2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-128.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_16256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x859fffff; valaddr_reg:x3; val_offset:48768*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48768*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85bfffff; valaddr_reg:x3; val_offset:48771*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48771*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85c00000; valaddr_reg:x3; val_offset:48774*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48774*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85e00000; valaddr_reg:x3; val_offset:48777*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48777*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85f00000; valaddr_reg:x3; val_offset:48780*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48780*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85f80000; valaddr_reg:x3; val_offset:48783*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48783*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fc0000; valaddr_reg:x3; val_offset:48786*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48786*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fe0000; valaddr_reg:x3; val_offset:48789*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48789*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ff0000; valaddr_reg:x3; val_offset:48792*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48792*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ff8000; valaddr_reg:x3; val_offset:48795*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48795*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ffc000; valaddr_reg:x3; val_offset:48798*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48798*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ffe000; valaddr_reg:x3; val_offset:48801*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48801*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fff000; valaddr_reg:x3; val_offset:48804*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48804*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fff800; valaddr_reg:x3; val_offset:48807*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48807*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fffc00; valaddr_reg:x3; val_offset:48810*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48810*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fffe00; valaddr_reg:x3; val_offset:48813*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48813*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ffff00; valaddr_reg:x3; val_offset:48816*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48816*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ffff80; valaddr_reg:x3; val_offset:48819*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48819*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ffffc0; valaddr_reg:x3; val_offset:48822*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48822*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ffffe0; valaddr_reg:x3; val_offset:48825*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48825*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fffff0; valaddr_reg:x3; val_offset:48828*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48828*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fffff8; valaddr_reg:x3; val_offset:48831*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48831*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fffffc; valaddr_reg:x3; val_offset:48834*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48834*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85fffffe; valaddr_reg:x3; val_offset:48837*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48837*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x207367 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea07367; op2val:0x80000000; +op3val:0x85ffffff; valaddr_reg:x3; val_offset:48840*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48840*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x800000; valaddr_reg:x3; val_offset:48843*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48843*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:48846*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48846*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:48849*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48849*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:48852*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48852*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x80000f; valaddr_reg:x3; val_offset:48855*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48855*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x80001f; valaddr_reg:x3; val_offset:48858*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48858*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x80003f; valaddr_reg:x3; val_offset:48861*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48861*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x80007f; valaddr_reg:x3; val_offset:48864*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48864*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x8000ff; valaddr_reg:x3; val_offset:48867*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48867*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x8001ff; valaddr_reg:x3; val_offset:48870*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48870*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x8003ff; valaddr_reg:x3; val_offset:48873*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48873*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x8007ff; valaddr_reg:x3; val_offset:48876*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48876*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x800fff; valaddr_reg:x3; val_offset:48879*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48879*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x801fff; valaddr_reg:x3; val_offset:48882*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48882*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x803fff; valaddr_reg:x3; val_offset:48885*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48885*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x807fff; valaddr_reg:x3; val_offset:48888*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48888*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x80ffff; valaddr_reg:x3; val_offset:48891*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48891*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x81ffff; valaddr_reg:x3; val_offset:48894*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48894*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x83ffff; valaddr_reg:x3; val_offset:48897*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48897*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x87ffff; valaddr_reg:x3; val_offset:48900*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48900*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x8fffff; valaddr_reg:x3; val_offset:48903*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48903*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:48906*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48906*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0x9fffff; valaddr_reg:x3; val_offset:48909*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48909*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:48912*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48912*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:48915*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48915*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:48918*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48918*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:48921*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48921*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xbfffff; valaddr_reg:x3; val_offset:48924*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48924*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xc00000; valaddr_reg:x3; val_offset:48927*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48927*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:48930*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48930*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:48933*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48933*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:48936*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48936*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xe00000; valaddr_reg:x3; val_offset:48939*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48939*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:48942*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48942*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:48945*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48945*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xf00000; valaddr_reg:x3; val_offset:48948*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48948*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xf80000; valaddr_reg:x3; val_offset:48951*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48951*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfc0000; valaddr_reg:x3; val_offset:48954*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48954*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfe0000; valaddr_reg:x3; val_offset:48957*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48957*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xff0000; valaddr_reg:x3; val_offset:48960*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48960*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xff8000; valaddr_reg:x3; val_offset:48963*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48963*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xffc000; valaddr_reg:x3; val_offset:48966*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48966*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xffe000; valaddr_reg:x3; val_offset:48969*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48969*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfff000; valaddr_reg:x3; val_offset:48972*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48972*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfff800; valaddr_reg:x3; val_offset:48975*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48975*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfffc00; valaddr_reg:x3; val_offset:48978*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48978*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfffe00; valaddr_reg:x3; val_offset:48981*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48981*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xffff00; valaddr_reg:x3; val_offset:48984*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48984*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xffff80; valaddr_reg:x3; val_offset:48987*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48987*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xffffc0; valaddr_reg:x3; val_offset:48990*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48990*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xffffe0; valaddr_reg:x3; val_offset:48993*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48993*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfffff0; valaddr_reg:x3; val_offset:48996*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48996*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:48999*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 48999*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:49002*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49002*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:49005*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49005*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2075e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea075e6; op2val:0x0; +op3val:0xffffff; valaddr_reg:x3; val_offset:49008*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49008*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27000000; valaddr_reg:x3; val_offset:49011*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49011*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27000001; valaddr_reg:x3; val_offset:49014*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49014*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27000003; valaddr_reg:x3; val_offset:49017*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49017*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27000007; valaddr_reg:x3; val_offset:49020*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49020*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x2700000f; valaddr_reg:x3; val_offset:49023*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49023*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x2700001f; valaddr_reg:x3; val_offset:49026*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49026*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x2700003f; valaddr_reg:x3; val_offset:49029*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49029*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x2700007f; valaddr_reg:x3; val_offset:49032*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49032*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x270000ff; valaddr_reg:x3; val_offset:49035*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49035*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x270001ff; valaddr_reg:x3; val_offset:49038*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49038*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x270003ff; valaddr_reg:x3; val_offset:49041*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49041*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x270007ff; valaddr_reg:x3; val_offset:49044*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49044*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27000fff; valaddr_reg:x3; val_offset:49047*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49047*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27001fff; valaddr_reg:x3; val_offset:49050*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49050*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27003fff; valaddr_reg:x3; val_offset:49053*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49053*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27007fff; valaddr_reg:x3; val_offset:49056*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49056*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x2700ffff; valaddr_reg:x3; val_offset:49059*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49059*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x2701ffff; valaddr_reg:x3; val_offset:49062*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49062*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x2703ffff; valaddr_reg:x3; val_offset:49065*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49065*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x2707ffff; valaddr_reg:x3; val_offset:49068*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49068*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x270fffff; valaddr_reg:x3; val_offset:49071*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49071*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x271fffff; valaddr_reg:x3; val_offset:49074*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49074*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x273fffff; valaddr_reg:x3; val_offset:49077*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49077*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27400000; valaddr_reg:x3; val_offset:49080*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49080*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27600000; valaddr_reg:x3; val_offset:49083*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49083*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27700000; valaddr_reg:x3; val_offset:49086*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49086*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x27780000; valaddr_reg:x3; val_offset:49089*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49089*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277c0000; valaddr_reg:x3; val_offset:49092*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49092*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277e0000; valaddr_reg:x3; val_offset:49095*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49095*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277f0000; valaddr_reg:x3; val_offset:49098*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49098*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277f8000; valaddr_reg:x3; val_offset:49101*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49101*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277fc000; valaddr_reg:x3; val_offset:49104*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49104*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277fe000; valaddr_reg:x3; val_offset:49107*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49107*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277ff000; valaddr_reg:x3; val_offset:49110*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49110*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277ff800; valaddr_reg:x3; val_offset:49113*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49113*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277ffc00; valaddr_reg:x3; val_offset:49116*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49116*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277ffe00; valaddr_reg:x3; val_offset:49119*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49119*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277fff00; valaddr_reg:x3; val_offset:49122*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49122*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277fff80; valaddr_reg:x3; val_offset:49125*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49125*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277fffc0; valaddr_reg:x3; val_offset:49128*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49128*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277fffe0; valaddr_reg:x3; val_offset:49131*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49131*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277ffff0; valaddr_reg:x3; val_offset:49134*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49134*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277ffff8; valaddr_reg:x3; val_offset:49137*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49137*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277ffffc; valaddr_reg:x3; val_offset:49140*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49140*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277ffffe; valaddr_reg:x3; val_offset:49143*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49143*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x4e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x277fffff; valaddr_reg:x3; val_offset:49146*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49146*0 + 3*127*FLEN/8, x4, x1, x2) + +inst_16383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3f800001; valaddr_reg:x3; val_offset:49149*0 + 3*127*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49149*0 + 3*127*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2241855487,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2243952639,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2243952640,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2246049792,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247098368,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247622656,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247884800,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248015872,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248081408,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248114176,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248130560,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248138752,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248142848,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248144896,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248145920,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146432,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146688,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146816,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146880,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146912,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146928,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146936,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146940,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146942,32,FLEN) +NAN_BOXED(2124444519,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146943,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388608,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388623,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388639,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388671,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388735,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388863,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8389119,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8389631,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8390655,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8392703,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8396799,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8404991,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8421375,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8454143,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8519679,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8650751,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8912895,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(9437183,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10485759,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12582911,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12582912,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14680064,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15728640,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16252928,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16515072,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16646144,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16711680,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16744448,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16760832,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16769024,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16773120,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16775168,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776192,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776704,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776960,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777088,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777152,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777184,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777200,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2124445158,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777215,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311424,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311425,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311427,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311431,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311439,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311455,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311487,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311551,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311679,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654311935,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654312447,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654313471,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654315519,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654319615,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654327807,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654344191,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654376959,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654442495,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654573567,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(654835711,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(655359999,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(656408575,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(658505727,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(658505728,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(660602880,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(661651456,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662175744,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662437888,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662568960,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662634496,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662667264,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662683648,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662691840,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662695936,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662697984,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662699008,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662699520,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662699776,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662699904,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662699968,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662700000,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662700016,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662700024,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662700028,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662700030,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(662700031,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-129.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-129.S new file mode 100644 index 000000000..cf65693e3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-129.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_16384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3f800003; valaddr_reg:x3; val_offset:49152*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49152*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3f800007; valaddr_reg:x3; val_offset:49155*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49155*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3f999999; valaddr_reg:x3; val_offset:49158*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49158*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:49161*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49161*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:49164*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49164*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:49167*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49167*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:49170*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49170*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:49173*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49173*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:49176*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49176*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:49179*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49179*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:49182*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49182*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:49185*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49185*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:49188*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49188*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:49191*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49191*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x210efb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x65ba1c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea10efb; op2val:0x65ba1c; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:49194*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49194*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:49197*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49197*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:49200*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49200*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:49203*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49203*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:49206*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49206*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:49209*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49209*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:49212*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49212*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:49215*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49215*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:49218*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49218*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:49221*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49221*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:49224*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49224*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:49227*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49227*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:49230*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49230*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:49233*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49233*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:49236*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49236*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:49239*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49239*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:49242*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49242*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c000000; valaddr_reg:x3; val_offset:49245*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49245*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c000001; valaddr_reg:x3; val_offset:49248*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49248*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c000003; valaddr_reg:x3; val_offset:49251*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49251*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c000007; valaddr_reg:x3; val_offset:49254*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49254*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c00000f; valaddr_reg:x3; val_offset:49257*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49257*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c00001f; valaddr_reg:x3; val_offset:49260*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49260*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c00003f; valaddr_reg:x3; val_offset:49263*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49263*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c00007f; valaddr_reg:x3; val_offset:49266*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49266*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c0000ff; valaddr_reg:x3; val_offset:49269*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49269*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c0001ff; valaddr_reg:x3; val_offset:49272*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49272*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c0003ff; valaddr_reg:x3; val_offset:49275*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49275*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c0007ff; valaddr_reg:x3; val_offset:49278*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49278*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c000fff; valaddr_reg:x3; val_offset:49281*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49281*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c001fff; valaddr_reg:x3; val_offset:49284*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49284*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c003fff; valaddr_reg:x3; val_offset:49287*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49287*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c007fff; valaddr_reg:x3; val_offset:49290*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49290*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c00ffff; valaddr_reg:x3; val_offset:49293*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49293*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c01ffff; valaddr_reg:x3; val_offset:49296*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49296*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c03ffff; valaddr_reg:x3; val_offset:49299*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49299*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c07ffff; valaddr_reg:x3; val_offset:49302*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49302*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c0fffff; valaddr_reg:x3; val_offset:49305*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49305*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c1fffff; valaddr_reg:x3; val_offset:49308*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49308*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c3fffff; valaddr_reg:x3; val_offset:49311*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49311*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c400000; valaddr_reg:x3; val_offset:49314*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49314*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c600000; valaddr_reg:x3; val_offset:49317*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49317*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c700000; valaddr_reg:x3; val_offset:49320*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49320*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c780000; valaddr_reg:x3; val_offset:49323*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49323*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7c0000; valaddr_reg:x3; val_offset:49326*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49326*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7e0000; valaddr_reg:x3; val_offset:49329*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49329*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7f0000; valaddr_reg:x3; val_offset:49332*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49332*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7f8000; valaddr_reg:x3; val_offset:49335*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49335*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7fc000; valaddr_reg:x3; val_offset:49338*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49338*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7fe000; valaddr_reg:x3; val_offset:49341*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49341*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7ff000; valaddr_reg:x3; val_offset:49344*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49344*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7ff800; valaddr_reg:x3; val_offset:49347*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49347*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7ffc00; valaddr_reg:x3; val_offset:49350*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49350*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7ffe00; valaddr_reg:x3; val_offset:49353*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49353*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7fff00; valaddr_reg:x3; val_offset:49356*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49356*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7fff80; valaddr_reg:x3; val_offset:49359*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49359*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7fffc0; valaddr_reg:x3; val_offset:49362*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49362*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7fffe0; valaddr_reg:x3; val_offset:49365*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49365*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7ffff0; valaddr_reg:x3; val_offset:49368*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49368*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7ffff8; valaddr_reg:x3; val_offset:49371*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49371*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7ffffc; valaddr_reg:x3; val_offset:49374*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49374*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7ffffe; valaddr_reg:x3; val_offset:49377*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49377*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x215299 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea15299; op2val:0x80000000; +op3val:0x8c7fffff; valaddr_reg:x3; val_offset:49380*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49380*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:49383*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49383*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:49386*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49386*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:49389*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49389*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:49392*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49392*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:49395*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49395*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:49398*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49398*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:49401*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49401*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:49404*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49404*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:49407*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49407*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:49410*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49410*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:49413*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49413*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:49416*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49416*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:49419*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49419*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:49422*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49422*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:49425*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49425*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:49428*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49428*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d800000; valaddr_reg:x3; val_offset:49431*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49431*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d800001; valaddr_reg:x3; val_offset:49434*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49434*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d800003; valaddr_reg:x3; val_offset:49437*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49437*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d800007; valaddr_reg:x3; val_offset:49440*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49440*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d80000f; valaddr_reg:x3; val_offset:49443*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49443*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d80001f; valaddr_reg:x3; val_offset:49446*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49446*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d80003f; valaddr_reg:x3; val_offset:49449*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49449*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d80007f; valaddr_reg:x3; val_offset:49452*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49452*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d8000ff; valaddr_reg:x3; val_offset:49455*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49455*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d8001ff; valaddr_reg:x3; val_offset:49458*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49458*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d8003ff; valaddr_reg:x3; val_offset:49461*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49461*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d8007ff; valaddr_reg:x3; val_offset:49464*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49464*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d800fff; valaddr_reg:x3; val_offset:49467*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49467*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d801fff; valaddr_reg:x3; val_offset:49470*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49470*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d803fff; valaddr_reg:x3; val_offset:49473*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49473*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d807fff; valaddr_reg:x3; val_offset:49476*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49476*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d80ffff; valaddr_reg:x3; val_offset:49479*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49479*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d81ffff; valaddr_reg:x3; val_offset:49482*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49482*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d83ffff; valaddr_reg:x3; val_offset:49485*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49485*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d87ffff; valaddr_reg:x3; val_offset:49488*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49488*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d8fffff; valaddr_reg:x3; val_offset:49491*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49491*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8d9fffff; valaddr_reg:x3; val_offset:49494*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49494*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dbfffff; valaddr_reg:x3; val_offset:49497*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49497*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dc00000; valaddr_reg:x3; val_offset:49500*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49500*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8de00000; valaddr_reg:x3; val_offset:49503*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49503*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8df00000; valaddr_reg:x3; val_offset:49506*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49506*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8df80000; valaddr_reg:x3; val_offset:49509*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49509*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfc0000; valaddr_reg:x3; val_offset:49512*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49512*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfe0000; valaddr_reg:x3; val_offset:49515*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49515*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dff0000; valaddr_reg:x3; val_offset:49518*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49518*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dff8000; valaddr_reg:x3; val_offset:49521*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49521*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dffc000; valaddr_reg:x3; val_offset:49524*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49524*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dffe000; valaddr_reg:x3; val_offset:49527*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49527*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfff000; valaddr_reg:x3; val_offset:49530*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49530*0 + 3*128*FLEN/8, x4, x1, x2) + +inst_16511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfff800; valaddr_reg:x3; val_offset:49533*0 + 3*128*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49533*0 + 3*128*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2124484347,32,FLEN) +NAN_BOXED(6666780,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810240,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810241,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810243,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810247,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810255,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810271,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810303,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810367,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810495,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810751,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348811263,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348812287,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348814335,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348818431,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348826623,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348843007,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348875775,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348941311,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349072383,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349334527,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349858815,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2350907391,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2353004543,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2353004544,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2355101696,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356150272,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356674560,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356936704,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357067776,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357133312,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357166080,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357182464,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357190656,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357194752,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357196800,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357197824,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198336,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198592,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198720,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198784,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198816,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198832,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198840,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198844,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198846,32,FLEN) +NAN_BOXED(2124501657,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198847,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976064,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976065,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976067,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976071,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976079,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976095,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976127,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976191,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976319,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976575,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373977087,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373978111,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373980159,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373984255,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373992447,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374008831,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374041599,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374107135,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374238207,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374500351,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2375024639,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2376073215,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2378170367,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2378170368,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2380267520,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2381316096,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2381840384,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382102528,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382233600,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382299136,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382331904,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382348288,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382356480,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382360576,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382362624,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-13.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-13.S new file mode 100644 index 000000000..4b4e4fbe5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-13.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_1536: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbf800007; valaddr_reg:x3; val_offset:4608*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4608*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1537: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbf999999; valaddr_reg:x3; val_offset:4611*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4611*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1538: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:4614*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4614*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1539: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:4617*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4617*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1540: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:4620*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4620*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1541: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:4623*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4623*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1542: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:4626*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4626*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1543: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:4629*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4629*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1544: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:4632*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4632*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1545: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:4635*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4635*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1546: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:4638*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4638*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1547: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:4641*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4641*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1548: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:4644*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4644*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1549: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x6f106c and fs2 == 1 and fe2 == 0x04 and fm2 == 0x09115b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cef106c; op2val:0x8209115b; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:4647*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4647*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1550: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:4650*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4650*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1551: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:4653*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4653*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1552: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:4656*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4656*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1553: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:4659*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4659*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1554: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:4662*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4662*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1555: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:4665*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4665*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1556: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:4668*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4668*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1557: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:4671*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4671*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1558: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:4674*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4674*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1559: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:4677*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4677*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1560: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:4680*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4680*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1561: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:4683*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4683*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1562: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:4686*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4686*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1563: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:4689*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4689*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1564: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:4692*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4692*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1565: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:4695*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4695*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1566: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc000000; valaddr_reg:x3; val_offset:4698*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4698*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1567: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc000001; valaddr_reg:x3; val_offset:4701*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4701*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1568: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc000003; valaddr_reg:x3; val_offset:4704*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4704*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1569: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc000007; valaddr_reg:x3; val_offset:4707*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4707*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1570: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc00000f; valaddr_reg:x3; val_offset:4710*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4710*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1571: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc00001f; valaddr_reg:x3; val_offset:4713*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4713*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1572: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc00003f; valaddr_reg:x3; val_offset:4716*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4716*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1573: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc00007f; valaddr_reg:x3; val_offset:4719*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4719*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1574: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc0000ff; valaddr_reg:x3; val_offset:4722*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4722*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1575: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc0001ff; valaddr_reg:x3; val_offset:4725*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4725*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1576: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc0003ff; valaddr_reg:x3; val_offset:4728*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4728*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1577: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc0007ff; valaddr_reg:x3; val_offset:4731*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4731*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1578: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc000fff; valaddr_reg:x3; val_offset:4734*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4734*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1579: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc001fff; valaddr_reg:x3; val_offset:4737*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4737*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1580: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc003fff; valaddr_reg:x3; val_offset:4740*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4740*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1581: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc007fff; valaddr_reg:x3; val_offset:4743*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4743*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1582: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc00ffff; valaddr_reg:x3; val_offset:4746*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4746*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1583: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc01ffff; valaddr_reg:x3; val_offset:4749*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4749*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1584: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc03ffff; valaddr_reg:x3; val_offset:4752*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4752*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1585: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc07ffff; valaddr_reg:x3; val_offset:4755*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4755*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1586: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc0fffff; valaddr_reg:x3; val_offset:4758*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4758*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1587: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc1fffff; valaddr_reg:x3; val_offset:4761*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4761*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1588: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc3fffff; valaddr_reg:x3; val_offset:4764*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4764*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1589: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc400000; valaddr_reg:x3; val_offset:4767*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4767*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1590: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc600000; valaddr_reg:x3; val_offset:4770*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4770*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1591: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc700000; valaddr_reg:x3; val_offset:4773*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4773*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1592: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc780000; valaddr_reg:x3; val_offset:4776*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4776*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1593: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7c0000; valaddr_reg:x3; val_offset:4779*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4779*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1594: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7e0000; valaddr_reg:x3; val_offset:4782*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4782*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1595: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7f0000; valaddr_reg:x3; val_offset:4785*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4785*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1596: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7f8000; valaddr_reg:x3; val_offset:4788*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4788*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1597: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7fc000; valaddr_reg:x3; val_offset:4791*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4791*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1598: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7fe000; valaddr_reg:x3; val_offset:4794*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4794*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1599: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7ff000; valaddr_reg:x3; val_offset:4797*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4797*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1600: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7ff800; valaddr_reg:x3; val_offset:4800*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4800*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1601: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7ffc00; valaddr_reg:x3; val_offset:4803*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4803*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1602: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7ffe00; valaddr_reg:x3; val_offset:4806*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4806*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1603: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7fff00; valaddr_reg:x3; val_offset:4809*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4809*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1604: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7fff80; valaddr_reg:x3; val_offset:4812*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4812*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1605: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7fffc0; valaddr_reg:x3; val_offset:4815*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4815*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1606: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7fffe0; valaddr_reg:x3; val_offset:4818*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4818*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1607: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7ffff0; valaddr_reg:x3; val_offset:4821*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4821*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1608: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7ffff8; valaddr_reg:x3; val_offset:4824*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4824*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1609: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7ffffc; valaddr_reg:x3; val_offset:4827*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4827*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1610: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7ffffe; valaddr_reg:x3; val_offset:4830*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4830*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1611: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x722bbc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf22bbc; op2val:0x0; +op3val:0xc7fffff; valaddr_reg:x3; val_offset:4833*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4833*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1612: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x0; valaddr_reg:x3; val_offset:4836*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4836*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1613: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:4839*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4839*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1614: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:4842*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4842*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1615: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:4845*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4845*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1616: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0xf; valaddr_reg:x3; val_offset:4848*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4848*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1617: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x1f; valaddr_reg:x3; val_offset:4851*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4851*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1618: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x3f; valaddr_reg:x3; val_offset:4854*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4854*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1619: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7f; valaddr_reg:x3; val_offset:4857*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4857*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1620: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0xff; valaddr_reg:x3; val_offset:4860*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4860*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1621: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x1ff; valaddr_reg:x3; val_offset:4863*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4863*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1622: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x3ff; valaddr_reg:x3; val_offset:4866*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4866*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1623: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ff; valaddr_reg:x3; val_offset:4869*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4869*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1624: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0xfff; valaddr_reg:x3; val_offset:4872*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4872*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1625: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x1fff; valaddr_reg:x3; val_offset:4875*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4875*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1626: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x3fff; valaddr_reg:x3; val_offset:4878*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4878*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1627: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7fff; valaddr_reg:x3; val_offset:4881*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4881*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1628: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0xffff; valaddr_reg:x3; val_offset:4884*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4884*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1629: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x1ffff; valaddr_reg:x3; val_offset:4887*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4887*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1630: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x3ffff; valaddr_reg:x3; val_offset:4890*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4890*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1631: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ffff; valaddr_reg:x3; val_offset:4893*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4893*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1632: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0xfffff; valaddr_reg:x3; val_offset:4896*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4896*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1633: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:4899*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4899*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1634: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x1fffff; valaddr_reg:x3; val_offset:4902*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4902*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1635: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:4905*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4905*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1636: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:4908*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4908*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1637: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:4911*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4911*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1638: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:4914*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4914*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1639: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x3fffff; valaddr_reg:x3; val_offset:4917*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4917*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1640: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x400000; valaddr_reg:x3; val_offset:4920*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4920*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1641: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:4923*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4923*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1642: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:4926*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4926*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1643: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:4929*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4929*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1644: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x600000; valaddr_reg:x3; val_offset:4932*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4932*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1645: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:4935*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4935*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1646: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:4938*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4938*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1647: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x700000; valaddr_reg:x3; val_offset:4941*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4941*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1648: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x780000; valaddr_reg:x3; val_offset:4944*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4944*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1649: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7c0000; valaddr_reg:x3; val_offset:4947*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4947*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1650: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7e0000; valaddr_reg:x3; val_offset:4950*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4950*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1651: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7f0000; valaddr_reg:x3; val_offset:4953*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4953*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1652: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7f8000; valaddr_reg:x3; val_offset:4956*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4956*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1653: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7fc000; valaddr_reg:x3; val_offset:4959*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4959*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1654: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7fe000; valaddr_reg:x3; val_offset:4962*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4962*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1655: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ff000; valaddr_reg:x3; val_offset:4965*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4965*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1656: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ff800; valaddr_reg:x3; val_offset:4968*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4968*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1657: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ffc00; valaddr_reg:x3; val_offset:4971*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4971*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1658: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ffe00; valaddr_reg:x3; val_offset:4974*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4974*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1659: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7fff00; valaddr_reg:x3; val_offset:4977*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4977*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1660: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7fff80; valaddr_reg:x3; val_offset:4980*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4980*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1661: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7fffc0; valaddr_reg:x3; val_offset:4983*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4983*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1662: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7fffe0; valaddr_reg:x3; val_offset:4986*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4986*0 + 3*12*FLEN/8, x4, x1, x2) + +inst_1663: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ffff0; valaddr_reg:x3; val_offset:4989*0 + 3*12*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4989*0 + 3*12*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2096042092,32,FLEN) +NAN_BOXED(2181632347,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326592,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326593,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326595,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326599,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326607,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326623,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326655,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326719,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326847,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201327103,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201327615,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201328639,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201330687,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201334783,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201342975,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201359359,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201392127,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201457663,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201588735,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201850879,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(202375167,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(203423743,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(205520895,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(205520896,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(207618048,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(208666624,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209190912,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209453056,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209584128,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209649664,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209682432,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209698816,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209707008,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209711104,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209713152,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714176,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714688,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714944,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715072,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715136,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715168,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715184,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715192,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715196,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715198,32,FLEN) +NAN_BOXED(2096245692,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715199,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(63,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(511,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1023,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2047,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4095,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8191,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16383,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32767,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65535,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(131071,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(524287,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1048575,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2097151,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194303,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194304,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6291456,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7340032,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7864320,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8126464,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8257536,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8323072,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8355840,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8372224,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8380416,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8384512,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8386560,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8387584,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388096,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388352,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388480,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388544,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388576,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388592,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-130.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-130.S new file mode 100644 index 000000000..a1d20af42 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-130.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_16512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfffc00; valaddr_reg:x3; val_offset:49536*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49536*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfffe00; valaddr_reg:x3; val_offset:49539*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49539*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dffff00; valaddr_reg:x3; val_offset:49542*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49542*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dffff80; valaddr_reg:x3; val_offset:49545*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49545*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dffffc0; valaddr_reg:x3; val_offset:49548*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49548*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dffffe0; valaddr_reg:x3; val_offset:49551*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49551*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfffff0; valaddr_reg:x3; val_offset:49554*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49554*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfffff8; valaddr_reg:x3; val_offset:49557*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49557*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfffffc; valaddr_reg:x3; val_offset:49560*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49560*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dfffffe; valaddr_reg:x3; val_offset:49563*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49563*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x239293 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea39293; op2val:0x80000000; +op3val:0x8dffffff; valaddr_reg:x3; val_offset:49566*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49566*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f800000; valaddr_reg:x3; val_offset:49569*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49569*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f800001; valaddr_reg:x3; val_offset:49572*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49572*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f800003; valaddr_reg:x3; val_offset:49575*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49575*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f800007; valaddr_reg:x3; val_offset:49578*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49578*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f80000f; valaddr_reg:x3; val_offset:49581*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49581*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f80001f; valaddr_reg:x3; val_offset:49584*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49584*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f80003f; valaddr_reg:x3; val_offset:49587*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49587*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f80007f; valaddr_reg:x3; val_offset:49590*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49590*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f8000ff; valaddr_reg:x3; val_offset:49593*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49593*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f8001ff; valaddr_reg:x3; val_offset:49596*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49596*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f8003ff; valaddr_reg:x3; val_offset:49599*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49599*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f8007ff; valaddr_reg:x3; val_offset:49602*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49602*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f800fff; valaddr_reg:x3; val_offset:49605*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49605*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f801fff; valaddr_reg:x3; val_offset:49608*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49608*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f803fff; valaddr_reg:x3; val_offset:49611*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49611*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f807fff; valaddr_reg:x3; val_offset:49614*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49614*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f80ffff; valaddr_reg:x3; val_offset:49617*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49617*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f81ffff; valaddr_reg:x3; val_offset:49620*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49620*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f83ffff; valaddr_reg:x3; val_offset:49623*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49623*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f87ffff; valaddr_reg:x3; val_offset:49626*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49626*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f8fffff; valaddr_reg:x3; val_offset:49629*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49629*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2f9fffff; valaddr_reg:x3; val_offset:49632*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49632*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fbfffff; valaddr_reg:x3; val_offset:49635*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49635*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fc00000; valaddr_reg:x3; val_offset:49638*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49638*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fe00000; valaddr_reg:x3; val_offset:49641*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49641*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ff00000; valaddr_reg:x3; val_offset:49644*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49644*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ff80000; valaddr_reg:x3; val_offset:49647*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49647*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffc0000; valaddr_reg:x3; val_offset:49650*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49650*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffe0000; valaddr_reg:x3; val_offset:49653*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49653*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fff0000; valaddr_reg:x3; val_offset:49656*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49656*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fff8000; valaddr_reg:x3; val_offset:49659*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49659*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fffc000; valaddr_reg:x3; val_offset:49662*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49662*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fffe000; valaddr_reg:x3; val_offset:49665*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49665*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffff000; valaddr_reg:x3; val_offset:49668*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49668*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffff800; valaddr_reg:x3; val_offset:49671*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49671*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffffc00; valaddr_reg:x3; val_offset:49674*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49674*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffffe00; valaddr_reg:x3; val_offset:49677*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49677*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fffff00; valaddr_reg:x3; val_offset:49680*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49680*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fffff80; valaddr_reg:x3; val_offset:49683*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49683*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fffffc0; valaddr_reg:x3; val_offset:49686*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49686*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fffffe0; valaddr_reg:x3; val_offset:49689*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49689*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffffff0; valaddr_reg:x3; val_offset:49692*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49692*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffffff8; valaddr_reg:x3; val_offset:49695*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49695*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffffffc; valaddr_reg:x3; val_offset:49698*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49698*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2ffffffe; valaddr_reg:x3; val_offset:49701*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49701*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x5f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x2fffffff; valaddr_reg:x3; val_offset:49704*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49704*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3f800001; valaddr_reg:x3; val_offset:49707*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49707*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3f800003; valaddr_reg:x3; val_offset:49710*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49710*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3f800007; valaddr_reg:x3; val_offset:49713*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49713*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3f999999; valaddr_reg:x3; val_offset:49716*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49716*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:49719*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49719*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:49722*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49722*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:49725*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49725*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:49728*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49728*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:49731*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49731*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:49734*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49734*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:49737*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49737*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:49740*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49740*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:49743*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49743*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:49746*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49746*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:49749*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49749*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23a264 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x64202c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3a264; op2val:0x64202c; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:49752*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49752*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:49755*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49755*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:49758*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49758*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:49761*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49761*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:49764*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49764*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:49767*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49767*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:49770*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49770*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:49773*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49773*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:49776*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49776*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:49779*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49779*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:49782*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49782*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:49785*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49785*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:49788*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49788*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:49791*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49791*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:49794*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49794*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:49797*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49797*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:49800*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49800*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83800000; valaddr_reg:x3; val_offset:49803*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49803*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83800001; valaddr_reg:x3; val_offset:49806*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49806*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83800003; valaddr_reg:x3; val_offset:49809*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49809*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83800007; valaddr_reg:x3; val_offset:49812*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49812*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8380000f; valaddr_reg:x3; val_offset:49815*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49815*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8380001f; valaddr_reg:x3; val_offset:49818*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49818*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8380003f; valaddr_reg:x3; val_offset:49821*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49821*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8380007f; valaddr_reg:x3; val_offset:49824*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49824*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x838000ff; valaddr_reg:x3; val_offset:49827*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49827*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x838001ff; valaddr_reg:x3; val_offset:49830*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49830*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x838003ff; valaddr_reg:x3; val_offset:49833*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49833*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x838007ff; valaddr_reg:x3; val_offset:49836*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49836*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83800fff; valaddr_reg:x3; val_offset:49839*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49839*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83801fff; valaddr_reg:x3; val_offset:49842*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49842*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83803fff; valaddr_reg:x3; val_offset:49845*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49845*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83807fff; valaddr_reg:x3; val_offset:49848*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49848*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8380ffff; valaddr_reg:x3; val_offset:49851*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49851*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8381ffff; valaddr_reg:x3; val_offset:49854*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49854*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8383ffff; valaddr_reg:x3; val_offset:49857*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49857*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x8387ffff; valaddr_reg:x3; val_offset:49860*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49860*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x838fffff; valaddr_reg:x3; val_offset:49863*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49863*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x839fffff; valaddr_reg:x3; val_offset:49866*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49866*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83bfffff; valaddr_reg:x3; val_offset:49869*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49869*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83c00000; valaddr_reg:x3; val_offset:49872*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49872*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83e00000; valaddr_reg:x3; val_offset:49875*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49875*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83f00000; valaddr_reg:x3; val_offset:49878*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49878*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83f80000; valaddr_reg:x3; val_offset:49881*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49881*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fc0000; valaddr_reg:x3; val_offset:49884*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49884*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fe0000; valaddr_reg:x3; val_offset:49887*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49887*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ff0000; valaddr_reg:x3; val_offset:49890*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49890*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ff8000; valaddr_reg:x3; val_offset:49893*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49893*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ffc000; valaddr_reg:x3; val_offset:49896*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49896*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ffe000; valaddr_reg:x3; val_offset:49899*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49899*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fff000; valaddr_reg:x3; val_offset:49902*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49902*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fff800; valaddr_reg:x3; val_offset:49905*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49905*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fffc00; valaddr_reg:x3; val_offset:49908*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49908*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fffe00; valaddr_reg:x3; val_offset:49911*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49911*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ffff00; valaddr_reg:x3; val_offset:49914*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49914*0 + 3*129*FLEN/8, x4, x1, x2) + +inst_16639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ffff80; valaddr_reg:x3; val_offset:49917*0 + 3*129*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49917*0 + 3*129*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382363648,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364160,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364416,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364544,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364608,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364640,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364656,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364664,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364668,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364670,32,FLEN) +NAN_BOXED(2124649107,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364671,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796917760,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796917761,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796917763,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796917767,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796917775,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796917791,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796917823,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796917887,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796918015,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796918271,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796918783,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796919807,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796921855,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796925951,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796934143,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796950527,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(796983295,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(797048831,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(797179903,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(797442047,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(797966335,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(799014911,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(801112063,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(801112064,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(803209216,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(804257792,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(804782080,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805044224,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805175296,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805240832,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805273600,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805289984,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805298176,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805302272,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805304320,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805305344,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805305856,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306112,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306240,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306304,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306336,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306352,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306360,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306364,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306366,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(805306367,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2124653156,32,FLEN) +NAN_BOXED(6561836,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203904,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203905,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203907,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203911,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203919,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203935,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203967,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204031,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204159,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204415,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204927,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206205951,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206207999,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206212095,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206220287,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206236671,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206269439,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206334975,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206466047,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206728191,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2207252479,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2208301055,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2210398207,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2210398208,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2212495360,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2213543936,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214068224,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214330368,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214461440,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214526976,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214559744,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214576128,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214584320,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214588416,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214590464,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214591488,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592000,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592256,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592384,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-131.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-131.S new file mode 100644 index 000000000..b60064969 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-131.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_16640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ffffc0; valaddr_reg:x3; val_offset:49920*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49920*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ffffe0; valaddr_reg:x3; val_offset:49923*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49923*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fffff0; valaddr_reg:x3; val_offset:49926*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49926*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fffff8; valaddr_reg:x3; val_offset:49929*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49929*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fffffc; valaddr_reg:x3; val_offset:49932*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49932*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83fffffe; valaddr_reg:x3; val_offset:49935*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49935*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23b98c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3b98c; op2val:0x80000000; +op3val:0x83ffffff; valaddr_reg:x3; val_offset:49938*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49938*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:49941*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49941*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:49944*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49944*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:49947*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49947*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:49950*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49950*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:49953*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49953*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:49956*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49956*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:49959*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49959*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:49962*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49962*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:49965*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49965*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:49968*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49968*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:49971*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49971*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:49974*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49974*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:49977*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49977*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:49980*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49980*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:49983*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49983*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:49986*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49986*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa800000; valaddr_reg:x3; val_offset:49989*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49989*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa800001; valaddr_reg:x3; val_offset:49992*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49992*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa800003; valaddr_reg:x3; val_offset:49995*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49995*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa800007; valaddr_reg:x3; val_offset:49998*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 49998*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa80000f; valaddr_reg:x3; val_offset:50001*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50001*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa80001f; valaddr_reg:x3; val_offset:50004*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50004*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa80003f; valaddr_reg:x3; val_offset:50007*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50007*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa80007f; valaddr_reg:x3; val_offset:50010*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50010*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa8000ff; valaddr_reg:x3; val_offset:50013*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50013*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa8001ff; valaddr_reg:x3; val_offset:50016*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50016*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa8003ff; valaddr_reg:x3; val_offset:50019*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50019*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa8007ff; valaddr_reg:x3; val_offset:50022*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50022*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa800fff; valaddr_reg:x3; val_offset:50025*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50025*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa801fff; valaddr_reg:x3; val_offset:50028*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50028*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa803fff; valaddr_reg:x3; val_offset:50031*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50031*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa807fff; valaddr_reg:x3; val_offset:50034*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50034*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa80ffff; valaddr_reg:x3; val_offset:50037*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50037*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa81ffff; valaddr_reg:x3; val_offset:50040*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50040*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa83ffff; valaddr_reg:x3; val_offset:50043*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50043*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa87ffff; valaddr_reg:x3; val_offset:50046*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50046*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa8fffff; valaddr_reg:x3; val_offset:50049*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50049*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xa9fffff; valaddr_reg:x3; val_offset:50052*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50052*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xabfffff; valaddr_reg:x3; val_offset:50055*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50055*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xac00000; valaddr_reg:x3; val_offset:50058*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50058*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xae00000; valaddr_reg:x3; val_offset:50061*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50061*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaf00000; valaddr_reg:x3; val_offset:50064*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50064*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaf80000; valaddr_reg:x3; val_offset:50067*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50067*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafc0000; valaddr_reg:x3; val_offset:50070*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50070*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafe0000; valaddr_reg:x3; val_offset:50073*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50073*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaff0000; valaddr_reg:x3; val_offset:50076*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50076*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaff8000; valaddr_reg:x3; val_offset:50079*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50079*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaffc000; valaddr_reg:x3; val_offset:50082*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50082*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaffe000; valaddr_reg:x3; val_offset:50085*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50085*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafff000; valaddr_reg:x3; val_offset:50088*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50088*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafff800; valaddr_reg:x3; val_offset:50091*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50091*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafffc00; valaddr_reg:x3; val_offset:50094*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50094*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafffe00; valaddr_reg:x3; val_offset:50097*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50097*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaffff00; valaddr_reg:x3; val_offset:50100*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50100*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaffff80; valaddr_reg:x3; val_offset:50103*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50103*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaffffc0; valaddr_reg:x3; val_offset:50106*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50106*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaffffe0; valaddr_reg:x3; val_offset:50109*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50109*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafffff0; valaddr_reg:x3; val_offset:50112*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50112*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafffff8; valaddr_reg:x3; val_offset:50115*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50115*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafffffc; valaddr_reg:x3; val_offset:50118*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50118*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xafffffe; valaddr_reg:x3; val_offset:50121*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50121*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x23ca20 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea3ca20; op2val:0x0; +op3val:0xaffffff; valaddr_reg:x3; val_offset:50124*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50124*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e800000; valaddr_reg:x3; val_offset:50127*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50127*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e800001; valaddr_reg:x3; val_offset:50130*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50130*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e800003; valaddr_reg:x3; val_offset:50133*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50133*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e800007; valaddr_reg:x3; val_offset:50136*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50136*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e80000f; valaddr_reg:x3; val_offset:50139*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50139*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e80001f; valaddr_reg:x3; val_offset:50142*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50142*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e80003f; valaddr_reg:x3; val_offset:50145*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50145*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e80007f; valaddr_reg:x3; val_offset:50148*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50148*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e8000ff; valaddr_reg:x3; val_offset:50151*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50151*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e8001ff; valaddr_reg:x3; val_offset:50154*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50154*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e8003ff; valaddr_reg:x3; val_offset:50157*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50157*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e8007ff; valaddr_reg:x3; val_offset:50160*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50160*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e800fff; valaddr_reg:x3; val_offset:50163*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50163*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e801fff; valaddr_reg:x3; val_offset:50166*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50166*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e803fff; valaddr_reg:x3; val_offset:50169*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50169*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e807fff; valaddr_reg:x3; val_offset:50172*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50172*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e80ffff; valaddr_reg:x3; val_offset:50175*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50175*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e81ffff; valaddr_reg:x3; val_offset:50178*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50178*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e83ffff; valaddr_reg:x3; val_offset:50181*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50181*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e87ffff; valaddr_reg:x3; val_offset:50184*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50184*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e8fffff; valaddr_reg:x3; val_offset:50187*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50187*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5e9fffff; valaddr_reg:x3; val_offset:50190*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50190*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5ebfffff; valaddr_reg:x3; val_offset:50193*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50193*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5ec00000; valaddr_reg:x3; val_offset:50196*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50196*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5ee00000; valaddr_reg:x3; val_offset:50199*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50199*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5ef00000; valaddr_reg:x3; val_offset:50202*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50202*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5ef80000; valaddr_reg:x3; val_offset:50205*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50205*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efc0000; valaddr_reg:x3; val_offset:50208*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50208*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efe0000; valaddr_reg:x3; val_offset:50211*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50211*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5eff0000; valaddr_reg:x3; val_offset:50214*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50214*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5eff8000; valaddr_reg:x3; val_offset:50217*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50217*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5effc000; valaddr_reg:x3; val_offset:50220*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50220*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5effe000; valaddr_reg:x3; val_offset:50223*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50223*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efff000; valaddr_reg:x3; val_offset:50226*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50226*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efff800; valaddr_reg:x3; val_offset:50229*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50229*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efffc00; valaddr_reg:x3; val_offset:50232*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50232*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efffe00; valaddr_reg:x3; val_offset:50235*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50235*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5effff00; valaddr_reg:x3; val_offset:50238*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50238*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5effff80; valaddr_reg:x3; val_offset:50241*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50241*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5effffc0; valaddr_reg:x3; val_offset:50244*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50244*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5effffe0; valaddr_reg:x3; val_offset:50247*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50247*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efffff0; valaddr_reg:x3; val_offset:50250*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50250*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efffff8; valaddr_reg:x3; val_offset:50253*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50253*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efffffc; valaddr_reg:x3; val_offset:50256*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50256*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5efffffe; valaddr_reg:x3; val_offset:50259*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50259*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xbd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x5effffff; valaddr_reg:x3; val_offset:50262*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50262*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f000001; valaddr_reg:x3; val_offset:50265*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50265*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f000003; valaddr_reg:x3; val_offset:50268*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50268*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f000007; valaddr_reg:x3; val_offset:50271*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50271*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f199999; valaddr_reg:x3; val_offset:50274*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50274*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f249249; valaddr_reg:x3; val_offset:50277*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50277*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f333333; valaddr_reg:x3; val_offset:50280*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50280*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:50283*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50283*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:50286*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50286*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f444444; valaddr_reg:x3; val_offset:50289*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50289*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:50292*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50292*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:50295*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50295*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f666666; valaddr_reg:x3; val_offset:50298*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50298*0 + 3*130*FLEN/8, x4, x1, x2) + +inst_16767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:50301*0 + 3*130*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50301*0 + 3*130*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592448,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592480,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592496,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592504,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592508,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592510,32,FLEN) +NAN_BOXED(2124659084,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592511,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160768,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160769,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160771,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160775,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160783,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160799,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160831,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160895,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161023,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161279,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161791,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176162815,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176164863,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176168959,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176177151,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176193535,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176226303,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176291839,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176422911,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176685055,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(177209343,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(178257919,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(180355071,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(180355072,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(182452224,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(183500800,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184025088,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184287232,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184418304,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184483840,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184516608,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184532992,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184541184,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184545280,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184547328,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184548352,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184548864,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549120,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549248,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549312,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549344,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549360,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549368,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549372,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549374,32,FLEN) +NAN_BOXED(2124663328,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549375,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585446912,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585446913,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585446915,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585446919,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585446927,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585446943,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585446975,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585447039,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585447167,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585447423,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585447935,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585448959,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585451007,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585455103,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585463295,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585479679,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585512447,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585577983,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585709055,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1585971199,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1586495487,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1587544063,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1589641215,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1589641216,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1591738368,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1592786944,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593311232,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593573376,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593704448,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593769984,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593802752,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593819136,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593827328,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593831424,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593833472,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593834496,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835008,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835264,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835392,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835456,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835488,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835504,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835512,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835516,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835518,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(1593835519,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-132.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-132.S new file mode 100644 index 000000000..291bfa0d8 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-132.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_16768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:50304*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50304*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:50307*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50307*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x258981 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x45f314 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea58981; op2val:0x4045f314; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:50310*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50310*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5800000; valaddr_reg:x3; val_offset:50313*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50313*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5800001; valaddr_reg:x3; val_offset:50316*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50316*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5800003; valaddr_reg:x3; val_offset:50319*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50319*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5800007; valaddr_reg:x3; val_offset:50322*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50322*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe580000f; valaddr_reg:x3; val_offset:50325*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50325*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe580001f; valaddr_reg:x3; val_offset:50328*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50328*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe580003f; valaddr_reg:x3; val_offset:50331*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50331*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe580007f; valaddr_reg:x3; val_offset:50334*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50334*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe58000ff; valaddr_reg:x3; val_offset:50337*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50337*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe58001ff; valaddr_reg:x3; val_offset:50340*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50340*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe58003ff; valaddr_reg:x3; val_offset:50343*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50343*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe58007ff; valaddr_reg:x3; val_offset:50346*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50346*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5800fff; valaddr_reg:x3; val_offset:50349*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50349*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5801fff; valaddr_reg:x3; val_offset:50352*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50352*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5803fff; valaddr_reg:x3; val_offset:50355*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50355*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5807fff; valaddr_reg:x3; val_offset:50358*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50358*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe580ffff; valaddr_reg:x3; val_offset:50361*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50361*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe581ffff; valaddr_reg:x3; val_offset:50364*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50364*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe583ffff; valaddr_reg:x3; val_offset:50367*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50367*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe587ffff; valaddr_reg:x3; val_offset:50370*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50370*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe58fffff; valaddr_reg:x3; val_offset:50373*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50373*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe59fffff; valaddr_reg:x3; val_offset:50376*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50376*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5bfffff; valaddr_reg:x3; val_offset:50379*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50379*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5c00000; valaddr_reg:x3; val_offset:50382*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50382*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5e00000; valaddr_reg:x3; val_offset:50385*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50385*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5f00000; valaddr_reg:x3; val_offset:50388*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50388*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5f80000; valaddr_reg:x3; val_offset:50391*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50391*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fc0000; valaddr_reg:x3; val_offset:50394*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50394*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fe0000; valaddr_reg:x3; val_offset:50397*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50397*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ff0000; valaddr_reg:x3; val_offset:50400*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50400*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ff8000; valaddr_reg:x3; val_offset:50403*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50403*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ffc000; valaddr_reg:x3; val_offset:50406*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50406*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ffe000; valaddr_reg:x3; val_offset:50409*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50409*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fff000; valaddr_reg:x3; val_offset:50412*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50412*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fff800; valaddr_reg:x3; val_offset:50415*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50415*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fffc00; valaddr_reg:x3; val_offset:50418*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50418*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fffe00; valaddr_reg:x3; val_offset:50421*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50421*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ffff00; valaddr_reg:x3; val_offset:50424*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50424*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ffff80; valaddr_reg:x3; val_offset:50427*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50427*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ffffc0; valaddr_reg:x3; val_offset:50430*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50430*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ffffe0; valaddr_reg:x3; val_offset:50433*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50433*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fffff0; valaddr_reg:x3; val_offset:50436*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50436*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fffff8; valaddr_reg:x3; val_offset:50439*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50439*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fffffc; valaddr_reg:x3; val_offset:50442*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50442*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5fffffe; valaddr_reg:x3; val_offset:50445*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50445*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xcb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xe5ffffff; valaddr_reg:x3; val_offset:50448*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50448*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff000001; valaddr_reg:x3; val_offset:50451*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50451*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff000003; valaddr_reg:x3; val_offset:50454*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50454*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff000007; valaddr_reg:x3; val_offset:50457*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50457*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff199999; valaddr_reg:x3; val_offset:50460*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50460*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff249249; valaddr_reg:x3; val_offset:50463*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50463*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff333333; valaddr_reg:x3; val_offset:50466*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50466*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:50469*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50469*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:50472*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50472*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff444444; valaddr_reg:x3; val_offset:50475*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50475*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:50478*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50478*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:50481*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50481*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff666666; valaddr_reg:x3; val_offset:50484*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50484*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:50487*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50487*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:50490*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50490*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:50493*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50493*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x25c774 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x45a91b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea5c774; op2val:0xc045a91b; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:50496*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50496*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbf800001; valaddr_reg:x3; val_offset:50499*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50499*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbf800003; valaddr_reg:x3; val_offset:50502*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50502*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbf800007; valaddr_reg:x3; val_offset:50505*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50505*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbf999999; valaddr_reg:x3; val_offset:50508*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50508*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:50511*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50511*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:50514*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50514*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:50517*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50517*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:50520*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50520*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:50523*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50523*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:50526*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50526*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:50529*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50529*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:50532*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50532*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:50535*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50535*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:50538*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50538*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:50541*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50541*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:50544*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50544*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca000000; valaddr_reg:x3; val_offset:50547*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50547*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca000001; valaddr_reg:x3; val_offset:50550*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50550*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca000003; valaddr_reg:x3; val_offset:50553*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50553*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca000007; valaddr_reg:x3; val_offset:50556*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50556*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca00000f; valaddr_reg:x3; val_offset:50559*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50559*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca00001f; valaddr_reg:x3; val_offset:50562*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50562*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca00003f; valaddr_reg:x3; val_offset:50565*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50565*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca00007f; valaddr_reg:x3; val_offset:50568*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50568*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca0000ff; valaddr_reg:x3; val_offset:50571*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50571*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca0001ff; valaddr_reg:x3; val_offset:50574*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50574*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca0003ff; valaddr_reg:x3; val_offset:50577*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50577*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca0007ff; valaddr_reg:x3; val_offset:50580*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50580*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca000fff; valaddr_reg:x3; val_offset:50583*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50583*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca001fff; valaddr_reg:x3; val_offset:50586*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50586*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca003fff; valaddr_reg:x3; val_offset:50589*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50589*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca007fff; valaddr_reg:x3; val_offset:50592*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50592*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca00ffff; valaddr_reg:x3; val_offset:50595*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50595*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca01ffff; valaddr_reg:x3; val_offset:50598*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50598*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca03ffff; valaddr_reg:x3; val_offset:50601*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50601*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca07ffff; valaddr_reg:x3; val_offset:50604*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50604*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca0fffff; valaddr_reg:x3; val_offset:50607*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50607*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca1fffff; valaddr_reg:x3; val_offset:50610*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50610*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca3fffff; valaddr_reg:x3; val_offset:50613*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50613*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca400000; valaddr_reg:x3; val_offset:50616*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50616*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca600000; valaddr_reg:x3; val_offset:50619*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50619*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca700000; valaddr_reg:x3; val_offset:50622*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50622*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca780000; valaddr_reg:x3; val_offset:50625*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50625*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7c0000; valaddr_reg:x3; val_offset:50628*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50628*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7e0000; valaddr_reg:x3; val_offset:50631*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50631*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7f0000; valaddr_reg:x3; val_offset:50634*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50634*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7f8000; valaddr_reg:x3; val_offset:50637*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50637*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7fc000; valaddr_reg:x3; val_offset:50640*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50640*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7fe000; valaddr_reg:x3; val_offset:50643*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50643*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7ff000; valaddr_reg:x3; val_offset:50646*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50646*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7ff800; valaddr_reg:x3; val_offset:50649*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50649*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7ffc00; valaddr_reg:x3; val_offset:50652*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50652*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7ffe00; valaddr_reg:x3; val_offset:50655*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50655*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7fff00; valaddr_reg:x3; val_offset:50658*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50658*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7fff80; valaddr_reg:x3; val_offset:50661*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50661*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7fffc0; valaddr_reg:x3; val_offset:50664*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50664*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7fffe0; valaddr_reg:x3; val_offset:50667*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50667*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7ffff0; valaddr_reg:x3; val_offset:50670*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50670*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7ffff8; valaddr_reg:x3; val_offset:50673*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50673*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7ffffc; valaddr_reg:x3; val_offset:50676*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50676*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7ffffe; valaddr_reg:x3; val_offset:50679*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50679*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27358d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x61fc2b and fs3 == 1 and fe3 == 0x94 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7358d; op2val:0x8061fc2b; +op3val:0xca7fffff; valaddr_reg:x3; val_offset:50682*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50682*0 + 3*131*FLEN/8, x4, x1, x2) + +inst_16895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f000000; valaddr_reg:x3; val_offset:50685*0 + 3*131*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50685*0 + 3*131*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2124777857,32,FLEN) +NAN_BOXED(1078326036,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371072,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371073,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371075,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371079,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371087,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371103,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371135,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371199,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371327,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850371583,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850372095,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850373119,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850375167,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850379263,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850387455,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850403839,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850436607,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850502143,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850633215,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3850895359,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3851419647,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3852468223,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3854565375,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3854565376,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3856662528,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3857711104,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858235392,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858497536,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858628608,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858694144,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858726912,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858743296,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858751488,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858755584,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858757632,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858758656,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759168,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759424,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759552,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759616,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759648,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759664,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759672,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759676,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759678,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(3858759679,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2124793716,32,FLEN) +NAN_BOXED(3225790747,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997632,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997633,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997635,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997639,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997647,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997663,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997695,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997759,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388997887,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388998143,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388998655,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3388999679,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3389001727,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3389005823,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3389014015,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3389030399,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3389063167,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3389128703,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3389259775,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3389521919,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3390046207,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3391094783,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3393191935,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3393191936,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3395289088,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3396337664,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3396861952,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397124096,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397255168,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397320704,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397353472,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397369856,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397378048,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397382144,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397384192,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397385216,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397385728,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397385984,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397386112,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397386176,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397386208,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397386224,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397386232,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397386236,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397386238,32,FLEN) +NAN_BOXED(2124887437,32,FLEN) +NAN_BOXED(2153905195,32,FLEN) +NAN_BOXED(3397386239,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964608,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-133.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-133.S new file mode 100644 index 000000000..88a0525f7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-133.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_16896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f000001; valaddr_reg:x3; val_offset:50688*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50688*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f000003; valaddr_reg:x3; val_offset:50691*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50691*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f000007; valaddr_reg:x3; val_offset:50694*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50694*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f00000f; valaddr_reg:x3; val_offset:50697*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50697*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f00001f; valaddr_reg:x3; val_offset:50700*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50700*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f00003f; valaddr_reg:x3; val_offset:50703*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50703*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f00007f; valaddr_reg:x3; val_offset:50706*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50706*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f0000ff; valaddr_reg:x3; val_offset:50709*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50709*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f0001ff; valaddr_reg:x3; val_offset:50712*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50712*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f0003ff; valaddr_reg:x3; val_offset:50715*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50715*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f0007ff; valaddr_reg:x3; val_offset:50718*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50718*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f000fff; valaddr_reg:x3; val_offset:50721*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50721*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f001fff; valaddr_reg:x3; val_offset:50724*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50724*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f003fff; valaddr_reg:x3; val_offset:50727*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50727*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f007fff; valaddr_reg:x3; val_offset:50730*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50730*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f00ffff; valaddr_reg:x3; val_offset:50733*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50733*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f01ffff; valaddr_reg:x3; val_offset:50736*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50736*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f03ffff; valaddr_reg:x3; val_offset:50739*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50739*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f07ffff; valaddr_reg:x3; val_offset:50742*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50742*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f0fffff; valaddr_reg:x3; val_offset:50745*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50745*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f1fffff; valaddr_reg:x3; val_offset:50748*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50748*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f3fffff; valaddr_reg:x3; val_offset:50751*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50751*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f400000; valaddr_reg:x3; val_offset:50754*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50754*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f600000; valaddr_reg:x3; val_offset:50757*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50757*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f700000; valaddr_reg:x3; val_offset:50760*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50760*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f780000; valaddr_reg:x3; val_offset:50763*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50763*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7c0000; valaddr_reg:x3; val_offset:50766*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50766*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7e0000; valaddr_reg:x3; val_offset:50769*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50769*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7f0000; valaddr_reg:x3; val_offset:50772*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50772*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7f8000; valaddr_reg:x3; val_offset:50775*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50775*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7fc000; valaddr_reg:x3; val_offset:50778*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50778*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7fe000; valaddr_reg:x3; val_offset:50781*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50781*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7ff000; valaddr_reg:x3; val_offset:50784*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50784*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7ff800; valaddr_reg:x3; val_offset:50787*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50787*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7ffc00; valaddr_reg:x3; val_offset:50790*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50790*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7ffe00; valaddr_reg:x3; val_offset:50793*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50793*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7fff00; valaddr_reg:x3; val_offset:50796*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50796*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7fff80; valaddr_reg:x3; val_offset:50799*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50799*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7fffc0; valaddr_reg:x3; val_offset:50802*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50802*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7fffe0; valaddr_reg:x3; val_offset:50805*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50805*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7ffff0; valaddr_reg:x3; val_offset:50808*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50808*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7ffff8; valaddr_reg:x3; val_offset:50811*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50811*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7ffffc; valaddr_reg:x3; val_offset:50814*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50814*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7ffffe; valaddr_reg:x3; val_offset:50817*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50817*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f7fffff; valaddr_reg:x3; val_offset:50820*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50820*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f800001; valaddr_reg:x3; val_offset:50823*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50823*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f800003; valaddr_reg:x3; val_offset:50826*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50826*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f800007; valaddr_reg:x3; val_offset:50829*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50829*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3f999999; valaddr_reg:x3; val_offset:50832*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50832*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:50835*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50835*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:50838*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50838*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:50841*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50841*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:50844*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50844*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:50847*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50847*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:50850*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50850*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:50853*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50853*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:50856*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50856*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:50859*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50859*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:50862*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50862*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:50865*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50865*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x27734a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x61d80b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea7734a; op2val:0x61d80b; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:50868*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50868*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:50871*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50871*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:50874*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50874*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:50877*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50877*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:50880*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50880*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:50883*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50883*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:50886*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50886*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:50889*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50889*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:50892*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50892*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:50895*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50895*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:50898*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50898*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:50901*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50901*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:50904*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50904*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:50907*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50907*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:50910*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50910*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:50913*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50913*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:50916*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50916*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe000000; valaddr_reg:x3; val_offset:50919*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50919*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe000001; valaddr_reg:x3; val_offset:50922*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50922*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe000003; valaddr_reg:x3; val_offset:50925*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50925*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe000007; valaddr_reg:x3; val_offset:50928*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50928*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe00000f; valaddr_reg:x3; val_offset:50931*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50931*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe00001f; valaddr_reg:x3; val_offset:50934*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50934*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe00003f; valaddr_reg:x3; val_offset:50937*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50937*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe00007f; valaddr_reg:x3; val_offset:50940*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50940*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe0000ff; valaddr_reg:x3; val_offset:50943*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50943*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe0001ff; valaddr_reg:x3; val_offset:50946*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50946*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe0003ff; valaddr_reg:x3; val_offset:50949*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50949*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe0007ff; valaddr_reg:x3; val_offset:50952*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50952*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe000fff; valaddr_reg:x3; val_offset:50955*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50955*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe001fff; valaddr_reg:x3; val_offset:50958*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50958*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe003fff; valaddr_reg:x3; val_offset:50961*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50961*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe007fff; valaddr_reg:x3; val_offset:50964*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50964*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe00ffff; valaddr_reg:x3; val_offset:50967*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50967*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe01ffff; valaddr_reg:x3; val_offset:50970*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50970*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe03ffff; valaddr_reg:x3; val_offset:50973*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50973*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe07ffff; valaddr_reg:x3; val_offset:50976*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50976*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe0fffff; valaddr_reg:x3; val_offset:50979*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50979*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe1fffff; valaddr_reg:x3; val_offset:50982*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50982*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe3fffff; valaddr_reg:x3; val_offset:50985*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50985*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe400000; valaddr_reg:x3; val_offset:50988*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50988*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe600000; valaddr_reg:x3; val_offset:50991*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50991*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe700000; valaddr_reg:x3; val_offset:50994*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50994*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_16999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe780000; valaddr_reg:x3; val_offset:50997*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 50997*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7c0000; valaddr_reg:x3; val_offset:51000*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51000*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7e0000; valaddr_reg:x3; val_offset:51003*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51003*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7f0000; valaddr_reg:x3; val_offset:51006*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51006*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7f8000; valaddr_reg:x3; val_offset:51009*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51009*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7fc000; valaddr_reg:x3; val_offset:51012*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51012*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7fe000; valaddr_reg:x3; val_offset:51015*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51015*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7ff000; valaddr_reg:x3; val_offset:51018*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51018*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7ff800; valaddr_reg:x3; val_offset:51021*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51021*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7ffc00; valaddr_reg:x3; val_offset:51024*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51024*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7ffe00; valaddr_reg:x3; val_offset:51027*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51027*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7fff00; valaddr_reg:x3; val_offset:51030*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51030*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7fff80; valaddr_reg:x3; val_offset:51033*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51033*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7fffc0; valaddr_reg:x3; val_offset:51036*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51036*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7fffe0; valaddr_reg:x3; val_offset:51039*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51039*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7ffff0; valaddr_reg:x3; val_offset:51042*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51042*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7ffff8; valaddr_reg:x3; val_offset:51045*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51045*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7ffffc; valaddr_reg:x3; val_offset:51048*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51048*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7ffffe; valaddr_reg:x3; val_offset:51051*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51051*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x29fe86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ea9fe86; op2val:0x0; +op3val:0xe7fffff; valaddr_reg:x3; val_offset:51054*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51054*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:51057*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51057*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:51060*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51060*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:51063*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51063*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:51066*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51066*0 + 3*132*FLEN/8, x4, x1, x2) + +inst_17023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:51069*0 + 3*132*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51069*0 + 3*132*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964609,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964611,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964615,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964623,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964639,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964671,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964735,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056964863,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056965119,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056965631,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056966655,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056968703,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056972799,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056980991,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1056997375,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1057030143,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1057095679,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1057226751,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1057488895,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1058013183,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1059061759,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1061158911,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1061158912,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1063256064,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1064304640,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1064828928,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065091072,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065222144,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065287680,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065320448,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065336832,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065345024,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065349120,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065351168,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065352192,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065352704,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065352960,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353088,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353152,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353184,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353200,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353208,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353212,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353214,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353215,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2124903242,32,FLEN) +NAN_BOXED(6412299,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881024,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881025,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881027,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881031,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881039,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881055,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881087,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881151,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881279,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881535,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234882047,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234883071,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234885119,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234889215,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234897407,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234913791,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234946559,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235012095,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235143167,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235405311,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235929599,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(236978175,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(239075327,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(239075328,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(241172480,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(242221056,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(242745344,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243007488,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243138560,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243204096,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243236864,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243253248,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243261440,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243265536,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243267584,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243268608,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269120,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269376,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269504,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269568,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269600,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269616,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269624,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269628,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269630,32,FLEN) +NAN_BOXED(2125069958,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269631,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-134.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-134.S new file mode 100644 index 000000000..6db5c93ff --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-134.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_17024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:51072*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51072*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:51075*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51075*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:51078*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51078*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:51081*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51081*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:51084*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51084*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:51087*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51087*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:51090*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51090*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:51093*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51093*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:51096*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51096*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:51099*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51099*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:51102*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51102*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83000000; valaddr_reg:x3; val_offset:51105*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51105*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83000001; valaddr_reg:x3; val_offset:51108*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51108*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83000003; valaddr_reg:x3; val_offset:51111*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51111*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83000007; valaddr_reg:x3; val_offset:51114*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51114*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x8300000f; valaddr_reg:x3; val_offset:51117*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51117*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x8300001f; valaddr_reg:x3; val_offset:51120*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51120*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x8300003f; valaddr_reg:x3; val_offset:51123*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51123*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x8300007f; valaddr_reg:x3; val_offset:51126*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51126*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x830000ff; valaddr_reg:x3; val_offset:51129*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51129*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x830001ff; valaddr_reg:x3; val_offset:51132*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51132*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x830003ff; valaddr_reg:x3; val_offset:51135*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51135*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x830007ff; valaddr_reg:x3; val_offset:51138*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51138*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83000fff; valaddr_reg:x3; val_offset:51141*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51141*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83001fff; valaddr_reg:x3; val_offset:51144*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51144*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83003fff; valaddr_reg:x3; val_offset:51147*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51147*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83007fff; valaddr_reg:x3; val_offset:51150*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51150*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x8300ffff; valaddr_reg:x3; val_offset:51153*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51153*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x8301ffff; valaddr_reg:x3; val_offset:51156*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51156*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x8303ffff; valaddr_reg:x3; val_offset:51159*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51159*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x8307ffff; valaddr_reg:x3; val_offset:51162*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51162*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x830fffff; valaddr_reg:x3; val_offset:51165*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51165*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x831fffff; valaddr_reg:x3; val_offset:51168*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51168*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x833fffff; valaddr_reg:x3; val_offset:51171*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51171*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83400000; valaddr_reg:x3; val_offset:51174*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51174*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83600000; valaddr_reg:x3; val_offset:51177*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51177*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83700000; valaddr_reg:x3; val_offset:51180*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51180*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x83780000; valaddr_reg:x3; val_offset:51183*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51183*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837c0000; valaddr_reg:x3; val_offset:51186*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51186*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837e0000; valaddr_reg:x3; val_offset:51189*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51189*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837f0000; valaddr_reg:x3; val_offset:51192*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51192*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837f8000; valaddr_reg:x3; val_offset:51195*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51195*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837fc000; valaddr_reg:x3; val_offset:51198*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51198*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837fe000; valaddr_reg:x3; val_offset:51201*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51201*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837ff000; valaddr_reg:x3; val_offset:51204*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51204*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837ff800; valaddr_reg:x3; val_offset:51207*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51207*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837ffc00; valaddr_reg:x3; val_offset:51210*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51210*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837ffe00; valaddr_reg:x3; val_offset:51213*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51213*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837fff00; valaddr_reg:x3; val_offset:51216*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51216*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837fff80; valaddr_reg:x3; val_offset:51219*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51219*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837fffc0; valaddr_reg:x3; val_offset:51222*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51222*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837fffe0; valaddr_reg:x3; val_offset:51225*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51225*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837ffff0; valaddr_reg:x3; val_offset:51228*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51228*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837ffff8; valaddr_reg:x3; val_offset:51231*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51231*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837ffffc; valaddr_reg:x3; val_offset:51234*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51234*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837ffffe; valaddr_reg:x3; val_offset:51237*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51237*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ab7f3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaab7f3; op2val:0x80000000; +op3val:0x837fffff; valaddr_reg:x3; val_offset:51240*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51240*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:51243*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51243*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:51246*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51246*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:51249*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51249*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:51252*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51252*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:51255*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51255*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:51258*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51258*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:51261*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51261*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:51264*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51264*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:51267*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51267*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:51270*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51270*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:51273*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51273*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:51276*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51276*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:51279*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51279*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:51282*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51282*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:51285*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51285*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:51288*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51288*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d800000; valaddr_reg:x3; val_offset:51291*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51291*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d800001; valaddr_reg:x3; val_offset:51294*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51294*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d800003; valaddr_reg:x3; val_offset:51297*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51297*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d800007; valaddr_reg:x3; val_offset:51300*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51300*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d80000f; valaddr_reg:x3; val_offset:51303*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51303*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d80001f; valaddr_reg:x3; val_offset:51306*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51306*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d80003f; valaddr_reg:x3; val_offset:51309*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51309*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d80007f; valaddr_reg:x3; val_offset:51312*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51312*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d8000ff; valaddr_reg:x3; val_offset:51315*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51315*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d8001ff; valaddr_reg:x3; val_offset:51318*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51318*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d8003ff; valaddr_reg:x3; val_offset:51321*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51321*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d8007ff; valaddr_reg:x3; val_offset:51324*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51324*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d800fff; valaddr_reg:x3; val_offset:51327*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51327*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d801fff; valaddr_reg:x3; val_offset:51330*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51330*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d803fff; valaddr_reg:x3; val_offset:51333*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51333*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d807fff; valaddr_reg:x3; val_offset:51336*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51336*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d80ffff; valaddr_reg:x3; val_offset:51339*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51339*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d81ffff; valaddr_reg:x3; val_offset:51342*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51342*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d83ffff; valaddr_reg:x3; val_offset:51345*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51345*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d87ffff; valaddr_reg:x3; val_offset:51348*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51348*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d8fffff; valaddr_reg:x3; val_offset:51351*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51351*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8d9fffff; valaddr_reg:x3; val_offset:51354*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51354*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dbfffff; valaddr_reg:x3; val_offset:51357*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51357*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dc00000; valaddr_reg:x3; val_offset:51360*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51360*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8de00000; valaddr_reg:x3; val_offset:51363*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51363*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8df00000; valaddr_reg:x3; val_offset:51366*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51366*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8df80000; valaddr_reg:x3; val_offset:51369*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51369*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfc0000; valaddr_reg:x3; val_offset:51372*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51372*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfe0000; valaddr_reg:x3; val_offset:51375*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51375*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dff0000; valaddr_reg:x3; val_offset:51378*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51378*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dff8000; valaddr_reg:x3; val_offset:51381*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51381*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dffc000; valaddr_reg:x3; val_offset:51384*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51384*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dffe000; valaddr_reg:x3; val_offset:51387*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51387*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfff000; valaddr_reg:x3; val_offset:51390*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51390*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfff800; valaddr_reg:x3; val_offset:51393*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51393*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfffc00; valaddr_reg:x3; val_offset:51396*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51396*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfffe00; valaddr_reg:x3; val_offset:51399*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51399*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dffff00; valaddr_reg:x3; val_offset:51402*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51402*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dffff80; valaddr_reg:x3; val_offset:51405*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51405*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dffffc0; valaddr_reg:x3; val_offset:51408*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51408*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dffffe0; valaddr_reg:x3; val_offset:51411*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51411*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfffff0; valaddr_reg:x3; val_offset:51414*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51414*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfffff8; valaddr_reg:x3; val_offset:51417*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51417*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfffffc; valaddr_reg:x3; val_offset:51420*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51420*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dfffffe; valaddr_reg:x3; val_offset:51423*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51423*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ae033 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaae033; op2val:0x80000000; +op3val:0x8dffffff; valaddr_reg:x3; val_offset:51426*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51426*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4000000; valaddr_reg:x3; val_offset:51429*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51429*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4000001; valaddr_reg:x3; val_offset:51432*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51432*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4000003; valaddr_reg:x3; val_offset:51435*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51435*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4000007; valaddr_reg:x3; val_offset:51438*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51438*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe400000f; valaddr_reg:x3; val_offset:51441*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51441*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe400001f; valaddr_reg:x3; val_offset:51444*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51444*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe400003f; valaddr_reg:x3; val_offset:51447*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51447*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe400007f; valaddr_reg:x3; val_offset:51450*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51450*0 + 3*133*FLEN/8, x4, x1, x2) + +inst_17151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe40000ff; valaddr_reg:x3; val_offset:51453*0 + 3*133*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51453*0 + 3*133*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815296,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815297,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815299,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815303,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815311,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815327,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815359,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815423,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815551,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815807,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197816319,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197817343,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197819391,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197823487,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197831679,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197848063,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197880831,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197946367,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198077439,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198339583,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198863871,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2199912447,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2202009599,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2202009600,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2204106752,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205155328,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205679616,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205941760,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206072832,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206138368,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206171136,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206187520,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206195712,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206199808,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206201856,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206202880,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203392,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203648,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203776,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203840,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203872,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203888,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203896,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203900,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203902,32,FLEN) +NAN_BOXED(2125117427,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203903,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976064,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976065,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976067,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976071,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976079,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976095,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976127,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976191,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976319,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976575,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373977087,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373978111,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373980159,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373984255,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373992447,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374008831,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374041599,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374107135,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374238207,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374500351,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2375024639,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2376073215,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2378170367,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2378170368,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2380267520,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2381316096,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2381840384,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382102528,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382233600,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382299136,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382331904,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382348288,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382356480,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382360576,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382362624,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382363648,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364160,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364416,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364544,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364608,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364640,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364656,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364664,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364668,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364670,32,FLEN) +NAN_BOXED(2125127731,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364671,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205248,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205249,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205251,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205255,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205263,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205279,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205311,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205375,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205503,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-135.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-135.S new file mode 100644 index 000000000..8d9289a73 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-135.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_17152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe40001ff; valaddr_reg:x3; val_offset:51456*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51456*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe40003ff; valaddr_reg:x3; val_offset:51459*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51459*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe40007ff; valaddr_reg:x3; val_offset:51462*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51462*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4000fff; valaddr_reg:x3; val_offset:51465*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51465*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4001fff; valaddr_reg:x3; val_offset:51468*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51468*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4003fff; valaddr_reg:x3; val_offset:51471*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51471*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4007fff; valaddr_reg:x3; val_offset:51474*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51474*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe400ffff; valaddr_reg:x3; val_offset:51477*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51477*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe401ffff; valaddr_reg:x3; val_offset:51480*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51480*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe403ffff; valaddr_reg:x3; val_offset:51483*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51483*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe407ffff; valaddr_reg:x3; val_offset:51486*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51486*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe40fffff; valaddr_reg:x3; val_offset:51489*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51489*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe41fffff; valaddr_reg:x3; val_offset:51492*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51492*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe43fffff; valaddr_reg:x3; val_offset:51495*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51495*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4400000; valaddr_reg:x3; val_offset:51498*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51498*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4600000; valaddr_reg:x3; val_offset:51501*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51501*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4700000; valaddr_reg:x3; val_offset:51504*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51504*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe4780000; valaddr_reg:x3; val_offset:51507*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51507*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47c0000; valaddr_reg:x3; val_offset:51510*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51510*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47e0000; valaddr_reg:x3; val_offset:51513*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51513*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47f0000; valaddr_reg:x3; val_offset:51516*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51516*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47f8000; valaddr_reg:x3; val_offset:51519*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51519*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47fc000; valaddr_reg:x3; val_offset:51522*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51522*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47fe000; valaddr_reg:x3; val_offset:51525*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51525*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47ff000; valaddr_reg:x3; val_offset:51528*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51528*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47ff800; valaddr_reg:x3; val_offset:51531*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51531*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47ffc00; valaddr_reg:x3; val_offset:51534*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51534*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47ffe00; valaddr_reg:x3; val_offset:51537*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51537*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47fff00; valaddr_reg:x3; val_offset:51540*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51540*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47fff80; valaddr_reg:x3; val_offset:51543*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51543*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47fffc0; valaddr_reg:x3; val_offset:51546*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51546*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47fffe0; valaddr_reg:x3; val_offset:51549*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51549*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47ffff0; valaddr_reg:x3; val_offset:51552*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51552*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47ffff8; valaddr_reg:x3; val_offset:51555*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51555*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47ffffc; valaddr_reg:x3; val_offset:51558*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51558*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47ffffe; valaddr_reg:x3; val_offset:51561*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51561*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xc8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xe47fffff; valaddr_reg:x3; val_offset:51564*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51564*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff000001; valaddr_reg:x3; val_offset:51567*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51567*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff000003; valaddr_reg:x3; val_offset:51570*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51570*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff000007; valaddr_reg:x3; val_offset:51573*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51573*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff199999; valaddr_reg:x3; val_offset:51576*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51576*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff249249; valaddr_reg:x3; val_offset:51579*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51579*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff333333; valaddr_reg:x3; val_offset:51582*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51582*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:51585*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51585*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:51588*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51588*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff444444; valaddr_reg:x3; val_offset:51591*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51591*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:51594*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51594*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:51597*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51597*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff666666; valaddr_reg:x3; val_offset:51600*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51600*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:51603*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51603*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:51606*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51606*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:51609*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51609*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b53bd and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3f4285 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab53bd; op2val:0xc03f4285; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:51612*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51612*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac800000; valaddr_reg:x3; val_offset:51615*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51615*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac800001; valaddr_reg:x3; val_offset:51618*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51618*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac800003; valaddr_reg:x3; val_offset:51621*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51621*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac800007; valaddr_reg:x3; val_offset:51624*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51624*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac80000f; valaddr_reg:x3; val_offset:51627*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51627*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac80001f; valaddr_reg:x3; val_offset:51630*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51630*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac80003f; valaddr_reg:x3; val_offset:51633*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51633*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac80007f; valaddr_reg:x3; val_offset:51636*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51636*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac8000ff; valaddr_reg:x3; val_offset:51639*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51639*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac8001ff; valaddr_reg:x3; val_offset:51642*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51642*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac8003ff; valaddr_reg:x3; val_offset:51645*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51645*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac8007ff; valaddr_reg:x3; val_offset:51648*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51648*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac800fff; valaddr_reg:x3; val_offset:51651*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51651*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac801fff; valaddr_reg:x3; val_offset:51654*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51654*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac803fff; valaddr_reg:x3; val_offset:51657*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51657*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac807fff; valaddr_reg:x3; val_offset:51660*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51660*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac80ffff; valaddr_reg:x3; val_offset:51663*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51663*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac81ffff; valaddr_reg:x3; val_offset:51666*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51666*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac83ffff; valaddr_reg:x3; val_offset:51669*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51669*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac87ffff; valaddr_reg:x3; val_offset:51672*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51672*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac8fffff; valaddr_reg:x3; val_offset:51675*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51675*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xac9fffff; valaddr_reg:x3; val_offset:51678*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51678*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacbfffff; valaddr_reg:x3; val_offset:51681*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51681*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacc00000; valaddr_reg:x3; val_offset:51684*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51684*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xace00000; valaddr_reg:x3; val_offset:51687*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51687*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacf00000; valaddr_reg:x3; val_offset:51690*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51690*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacf80000; valaddr_reg:x3; val_offset:51693*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51693*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfc0000; valaddr_reg:x3; val_offset:51696*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51696*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfe0000; valaddr_reg:x3; val_offset:51699*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51699*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacff0000; valaddr_reg:x3; val_offset:51702*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51702*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacff8000; valaddr_reg:x3; val_offset:51705*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51705*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacffc000; valaddr_reg:x3; val_offset:51708*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51708*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacffe000; valaddr_reg:x3; val_offset:51711*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51711*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfff000; valaddr_reg:x3; val_offset:51714*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51714*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfff800; valaddr_reg:x3; val_offset:51717*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51717*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfffc00; valaddr_reg:x3; val_offset:51720*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51720*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfffe00; valaddr_reg:x3; val_offset:51723*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51723*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacffff00; valaddr_reg:x3; val_offset:51726*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51726*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacffff80; valaddr_reg:x3; val_offset:51729*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51729*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacffffc0; valaddr_reg:x3; val_offset:51732*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51732*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacffffe0; valaddr_reg:x3; val_offset:51735*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51735*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfffff0; valaddr_reg:x3; val_offset:51738*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51738*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfffff8; valaddr_reg:x3; val_offset:51741*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51741*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfffffc; valaddr_reg:x3; val_offset:51744*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51744*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacfffffe; valaddr_reg:x3; val_offset:51747*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51747*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x59 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xacffffff; valaddr_reg:x3; val_offset:51750*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51750*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbf800001; valaddr_reg:x3; val_offset:51753*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51753*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbf800003; valaddr_reg:x3; val_offset:51756*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51756*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbf800007; valaddr_reg:x3; val_offset:51759*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51759*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbf999999; valaddr_reg:x3; val_offset:51762*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51762*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:51765*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51765*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:51768*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51768*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:51771*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51771*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:51774*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51774*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:51777*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51777*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:51780*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51780*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:51783*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51783*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:51786*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51786*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:51789*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51789*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:51792*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51792*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:51795*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51795*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2b676f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f9646 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eab676f; op2val:0x805f9646; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:51798*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51798*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:51801*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51801*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:51804*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51804*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:51807*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51807*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:51810*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51810*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:51813*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51813*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:51816*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51816*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:51819*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51819*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:51822*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51822*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:51825*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51825*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:51828*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51828*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:51831*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51831*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:51834*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51834*0 + 3*134*FLEN/8, x4, x1, x2) + +inst_17279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:51837*0 + 3*134*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51837*0 + 3*134*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825205759,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825206271,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825207295,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825209343,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825213439,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825221631,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825238015,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825270783,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825336319,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825467391,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3825729535,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3826253823,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3827302399,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3829399551,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3829399552,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3831496704,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3832545280,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833069568,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833331712,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833462784,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833528320,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833561088,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833577472,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833585664,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833589760,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833591808,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833592832,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593344,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593600,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593728,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593792,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593824,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593840,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593848,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593852,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593854,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(3833593855,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2125157309,32,FLEN) +NAN_BOXED(3225371269,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894069760,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894069761,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894069763,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894069767,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894069775,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894069791,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894069823,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894069887,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894070015,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894070271,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894070783,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894071807,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894073855,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894077951,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894086143,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894102527,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894135295,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894200831,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894331903,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2894594047,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2895118335,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2896166911,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2898264063,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2898264064,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2900361216,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2901409792,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2901934080,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902196224,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902327296,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902392832,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902425600,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902441984,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902450176,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902454272,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902456320,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902457344,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902457856,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458112,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458240,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458304,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458336,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458352,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458360,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458364,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458366,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(2902458367,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2125162351,32,FLEN) +NAN_BOXED(2153748038,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-136.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-136.S new file mode 100644 index 000000000..1d318237b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-136.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_17280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:51840*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51840*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:51843*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51843*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:51846*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51846*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86800000; valaddr_reg:x3; val_offset:51849*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51849*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86800001; valaddr_reg:x3; val_offset:51852*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51852*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86800003; valaddr_reg:x3; val_offset:51855*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51855*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86800007; valaddr_reg:x3; val_offset:51858*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51858*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8680000f; valaddr_reg:x3; val_offset:51861*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51861*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8680001f; valaddr_reg:x3; val_offset:51864*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51864*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8680003f; valaddr_reg:x3; val_offset:51867*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51867*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8680007f; valaddr_reg:x3; val_offset:51870*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51870*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x868000ff; valaddr_reg:x3; val_offset:51873*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51873*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x868001ff; valaddr_reg:x3; val_offset:51876*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51876*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x868003ff; valaddr_reg:x3; val_offset:51879*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51879*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x868007ff; valaddr_reg:x3; val_offset:51882*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51882*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86800fff; valaddr_reg:x3; val_offset:51885*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51885*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86801fff; valaddr_reg:x3; val_offset:51888*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51888*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86803fff; valaddr_reg:x3; val_offset:51891*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51891*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86807fff; valaddr_reg:x3; val_offset:51894*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51894*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8680ffff; valaddr_reg:x3; val_offset:51897*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51897*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8681ffff; valaddr_reg:x3; val_offset:51900*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51900*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8683ffff; valaddr_reg:x3; val_offset:51903*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51903*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x8687ffff; valaddr_reg:x3; val_offset:51906*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51906*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x868fffff; valaddr_reg:x3; val_offset:51909*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51909*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x869fffff; valaddr_reg:x3; val_offset:51912*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51912*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86bfffff; valaddr_reg:x3; val_offset:51915*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51915*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86c00000; valaddr_reg:x3; val_offset:51918*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51918*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86e00000; valaddr_reg:x3; val_offset:51921*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51921*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86f00000; valaddr_reg:x3; val_offset:51924*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51924*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86f80000; valaddr_reg:x3; val_offset:51927*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51927*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fc0000; valaddr_reg:x3; val_offset:51930*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51930*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fe0000; valaddr_reg:x3; val_offset:51933*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51933*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ff0000; valaddr_reg:x3; val_offset:51936*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51936*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ff8000; valaddr_reg:x3; val_offset:51939*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51939*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ffc000; valaddr_reg:x3; val_offset:51942*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51942*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ffe000; valaddr_reg:x3; val_offset:51945*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51945*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fff000; valaddr_reg:x3; val_offset:51948*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51948*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fff800; valaddr_reg:x3; val_offset:51951*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51951*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fffc00; valaddr_reg:x3; val_offset:51954*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51954*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fffe00; valaddr_reg:x3; val_offset:51957*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51957*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ffff00; valaddr_reg:x3; val_offset:51960*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51960*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ffff80; valaddr_reg:x3; val_offset:51963*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51963*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ffffc0; valaddr_reg:x3; val_offset:51966*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51966*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ffffe0; valaddr_reg:x3; val_offset:51969*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51969*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fffff0; valaddr_reg:x3; val_offset:51972*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51972*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fffff8; valaddr_reg:x3; val_offset:51975*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51975*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fffffc; valaddr_reg:x3; val_offset:51978*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51978*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86fffffe; valaddr_reg:x3; val_offset:51981*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51981*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c0532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac0532; op2val:0x80000000; +op3val:0x86ffffff; valaddr_reg:x3; val_offset:51984*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51984*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6800000; valaddr_reg:x3; val_offset:51987*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51987*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6800001; valaddr_reg:x3; val_offset:51990*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51990*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6800003; valaddr_reg:x3; val_offset:51993*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51993*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6800007; valaddr_reg:x3; val_offset:51996*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51996*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa680000f; valaddr_reg:x3; val_offset:51999*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 51999*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa680001f; valaddr_reg:x3; val_offset:52002*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52002*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa680003f; valaddr_reg:x3; val_offset:52005*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52005*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa680007f; valaddr_reg:x3; val_offset:52008*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52008*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa68000ff; valaddr_reg:x3; val_offset:52011*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52011*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa68001ff; valaddr_reg:x3; val_offset:52014*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52014*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa68003ff; valaddr_reg:x3; val_offset:52017*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52017*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa68007ff; valaddr_reg:x3; val_offset:52020*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52020*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6800fff; valaddr_reg:x3; val_offset:52023*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52023*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6801fff; valaddr_reg:x3; val_offset:52026*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52026*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6803fff; valaddr_reg:x3; val_offset:52029*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52029*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6807fff; valaddr_reg:x3; val_offset:52032*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52032*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa680ffff; valaddr_reg:x3; val_offset:52035*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52035*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa681ffff; valaddr_reg:x3; val_offset:52038*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52038*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa683ffff; valaddr_reg:x3; val_offset:52041*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52041*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa687ffff; valaddr_reg:x3; val_offset:52044*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52044*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa68fffff; valaddr_reg:x3; val_offset:52047*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52047*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa69fffff; valaddr_reg:x3; val_offset:52050*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52050*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6bfffff; valaddr_reg:x3; val_offset:52053*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52053*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6c00000; valaddr_reg:x3; val_offset:52056*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52056*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6e00000; valaddr_reg:x3; val_offset:52059*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52059*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6f00000; valaddr_reg:x3; val_offset:52062*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52062*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6f80000; valaddr_reg:x3; val_offset:52065*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52065*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fc0000; valaddr_reg:x3; val_offset:52068*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52068*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fe0000; valaddr_reg:x3; val_offset:52071*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52071*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ff0000; valaddr_reg:x3; val_offset:52074*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52074*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ff8000; valaddr_reg:x3; val_offset:52077*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52077*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ffc000; valaddr_reg:x3; val_offset:52080*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52080*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ffe000; valaddr_reg:x3; val_offset:52083*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52083*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fff000; valaddr_reg:x3; val_offset:52086*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52086*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fff800; valaddr_reg:x3; val_offset:52089*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52089*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fffc00; valaddr_reg:x3; val_offset:52092*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52092*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fffe00; valaddr_reg:x3; val_offset:52095*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52095*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ffff00; valaddr_reg:x3; val_offset:52098*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52098*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ffff80; valaddr_reg:x3; val_offset:52101*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52101*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ffffc0; valaddr_reg:x3; val_offset:52104*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52104*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ffffe0; valaddr_reg:x3; val_offset:52107*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52107*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fffff0; valaddr_reg:x3; val_offset:52110*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52110*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fffff8; valaddr_reg:x3; val_offset:52113*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52113*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fffffc; valaddr_reg:x3; val_offset:52116*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52116*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6fffffe; valaddr_reg:x3; val_offset:52119*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52119*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x4d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xa6ffffff; valaddr_reg:x3; val_offset:52122*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52122*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbf800001; valaddr_reg:x3; val_offset:52125*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52125*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbf800003; valaddr_reg:x3; val_offset:52128*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52128*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbf800007; valaddr_reg:x3; val_offset:52131*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52131*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbf999999; valaddr_reg:x3; val_offset:52134*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52134*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:52137*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52137*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:52140*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52140*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:52143*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52143*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:52146*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52146*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:52149*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52149*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:52152*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52152*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:52155*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52155*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:52158*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52158*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:52161*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52161*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:52164*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52164*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:52167*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52167*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2c157e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5f3597 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eac157e; op2val:0x805f3597; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:52170*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52170*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6800000; valaddr_reg:x3; val_offset:52173*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52173*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6800001; valaddr_reg:x3; val_offset:52176*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52176*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6800003; valaddr_reg:x3; val_offset:52179*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52179*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6800007; valaddr_reg:x3; val_offset:52182*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52182*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe680000f; valaddr_reg:x3; val_offset:52185*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52185*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe680001f; valaddr_reg:x3; val_offset:52188*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52188*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe680003f; valaddr_reg:x3; val_offset:52191*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52191*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe680007f; valaddr_reg:x3; val_offset:52194*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52194*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe68000ff; valaddr_reg:x3; val_offset:52197*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52197*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe68001ff; valaddr_reg:x3; val_offset:52200*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52200*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe68003ff; valaddr_reg:x3; val_offset:52203*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52203*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe68007ff; valaddr_reg:x3; val_offset:52206*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52206*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6800fff; valaddr_reg:x3; val_offset:52209*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52209*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6801fff; valaddr_reg:x3; val_offset:52212*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52212*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6803fff; valaddr_reg:x3; val_offset:52215*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52215*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6807fff; valaddr_reg:x3; val_offset:52218*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52218*0 + 3*135*FLEN/8, x4, x1, x2) + +inst_17407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe680ffff; valaddr_reg:x3; val_offset:52221*0 + 3*135*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52221*0 + 3*135*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535552,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535553,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535555,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535559,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535567,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535583,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535615,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535679,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535807,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256536063,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256536575,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256537599,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256539647,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256543743,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256551935,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256568319,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256601087,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256666623,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256797695,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2257059839,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2257584127,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2258632703,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2260729855,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2260729856,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2262827008,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2263875584,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264399872,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264662016,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264793088,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264858624,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264891392,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264907776,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264915968,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264920064,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264922112,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923136,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923648,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923904,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924032,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924096,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924128,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924144,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924152,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924156,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924158,32,FLEN) +NAN_BOXED(2125202738,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924159,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406464,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406465,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406467,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406471,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406479,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406495,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406527,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406591,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406719,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793406975,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793407487,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793408511,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793410559,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793414655,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793422847,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793439231,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793471999,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793537535,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793668607,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2793930751,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2794455039,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2795503615,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2797600767,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2797600768,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2799697920,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2800746496,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801270784,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801532928,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801664000,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801729536,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801762304,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801778688,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801786880,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801790976,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801793024,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801794048,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801794560,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801794816,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801794944,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801795008,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801795040,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801795056,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801795064,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801795068,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801795070,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(2801795071,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2125206910,32,FLEN) +NAN_BOXED(2153723287,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148288,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148289,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148291,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148295,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148303,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148319,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148351,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148415,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148543,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867148799,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867149311,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867150335,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867152383,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867156479,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867164671,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867181055,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867213823,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-137.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-137.S new file mode 100644 index 000000000..6e43c63ac --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-137.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_17408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe681ffff; valaddr_reg:x3; val_offset:52224*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52224*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe683ffff; valaddr_reg:x3; val_offset:52227*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52227*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe687ffff; valaddr_reg:x3; val_offset:52230*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52230*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe68fffff; valaddr_reg:x3; val_offset:52233*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52233*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe69fffff; valaddr_reg:x3; val_offset:52236*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52236*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6bfffff; valaddr_reg:x3; val_offset:52239*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52239*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6c00000; valaddr_reg:x3; val_offset:52242*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52242*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6e00000; valaddr_reg:x3; val_offset:52245*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52245*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6f00000; valaddr_reg:x3; val_offset:52248*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52248*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6f80000; valaddr_reg:x3; val_offset:52251*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52251*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fc0000; valaddr_reg:x3; val_offset:52254*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52254*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fe0000; valaddr_reg:x3; val_offset:52257*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52257*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ff0000; valaddr_reg:x3; val_offset:52260*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52260*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ff8000; valaddr_reg:x3; val_offset:52263*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52263*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ffc000; valaddr_reg:x3; val_offset:52266*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52266*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ffe000; valaddr_reg:x3; val_offset:52269*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52269*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fff000; valaddr_reg:x3; val_offset:52272*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52272*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fff800; valaddr_reg:x3; val_offset:52275*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52275*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fffc00; valaddr_reg:x3; val_offset:52278*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52278*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fffe00; valaddr_reg:x3; val_offset:52281*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52281*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ffff00; valaddr_reg:x3; val_offset:52284*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52284*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ffff80; valaddr_reg:x3; val_offset:52287*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52287*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ffffc0; valaddr_reg:x3; val_offset:52290*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52290*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ffffe0; valaddr_reg:x3; val_offset:52293*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52293*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fffff0; valaddr_reg:x3; val_offset:52296*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52296*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fffff8; valaddr_reg:x3; val_offset:52299*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52299*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fffffc; valaddr_reg:x3; val_offset:52302*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52302*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6fffffe; valaddr_reg:x3; val_offset:52305*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52305*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xcd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xe6ffffff; valaddr_reg:x3; val_offset:52308*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52308*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff000001; valaddr_reg:x3; val_offset:52311*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52311*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff000003; valaddr_reg:x3; val_offset:52314*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52314*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff000007; valaddr_reg:x3; val_offset:52317*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52317*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff199999; valaddr_reg:x3; val_offset:52320*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52320*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff249249; valaddr_reg:x3; val_offset:52323*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52323*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff333333; valaddr_reg:x3; val_offset:52326*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52326*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:52329*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52329*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:52332*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52332*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff444444; valaddr_reg:x3; val_offset:52335*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52335*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:52338*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52338*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:52341*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52341*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff666666; valaddr_reg:x3; val_offset:52344*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52344*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:52347*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52347*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:52350*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52350*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:52353*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52353*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e1fa7 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3c3026 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae1fa7; op2val:0xc03c3026; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:52356*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52356*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b800000; valaddr_reg:x3; val_offset:52359*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52359*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b800001; valaddr_reg:x3; val_offset:52362*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52362*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b800003; valaddr_reg:x3; val_offset:52365*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52365*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b800007; valaddr_reg:x3; val_offset:52368*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52368*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b80000f; valaddr_reg:x3; val_offset:52371*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52371*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b80001f; valaddr_reg:x3; val_offset:52374*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52374*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b80003f; valaddr_reg:x3; val_offset:52377*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52377*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b80007f; valaddr_reg:x3; val_offset:52380*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52380*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b8000ff; valaddr_reg:x3; val_offset:52383*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52383*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b8001ff; valaddr_reg:x3; val_offset:52386*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52386*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b8003ff; valaddr_reg:x3; val_offset:52389*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52389*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b8007ff; valaddr_reg:x3; val_offset:52392*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52392*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b800fff; valaddr_reg:x3; val_offset:52395*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52395*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b801fff; valaddr_reg:x3; val_offset:52398*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52398*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b803fff; valaddr_reg:x3; val_offset:52401*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52401*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b807fff; valaddr_reg:x3; val_offset:52404*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52404*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b80ffff; valaddr_reg:x3; val_offset:52407*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52407*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b81ffff; valaddr_reg:x3; val_offset:52410*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52410*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b83ffff; valaddr_reg:x3; val_offset:52413*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52413*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b87ffff; valaddr_reg:x3; val_offset:52416*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52416*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b8fffff; valaddr_reg:x3; val_offset:52419*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52419*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6b9fffff; valaddr_reg:x3; val_offset:52422*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52422*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bbfffff; valaddr_reg:x3; val_offset:52425*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52425*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bc00000; valaddr_reg:x3; val_offset:52428*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52428*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6be00000; valaddr_reg:x3; val_offset:52431*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52431*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bf00000; valaddr_reg:x3; val_offset:52434*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52434*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bf80000; valaddr_reg:x3; val_offset:52437*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52437*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfc0000; valaddr_reg:x3; val_offset:52440*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52440*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfe0000; valaddr_reg:x3; val_offset:52443*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52443*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bff0000; valaddr_reg:x3; val_offset:52446*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52446*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bff8000; valaddr_reg:x3; val_offset:52449*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52449*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bffc000; valaddr_reg:x3; val_offset:52452*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52452*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bffe000; valaddr_reg:x3; val_offset:52455*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52455*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfff000; valaddr_reg:x3; val_offset:52458*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52458*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfff800; valaddr_reg:x3; val_offset:52461*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52461*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfffc00; valaddr_reg:x3; val_offset:52464*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52464*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfffe00; valaddr_reg:x3; val_offset:52467*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52467*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bffff00; valaddr_reg:x3; val_offset:52470*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52470*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bffff80; valaddr_reg:x3; val_offset:52473*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52473*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bffffc0; valaddr_reg:x3; val_offset:52476*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52476*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bffffe0; valaddr_reg:x3; val_offset:52479*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52479*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfffff0; valaddr_reg:x3; val_offset:52482*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52482*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfffff8; valaddr_reg:x3; val_offset:52485*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52485*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfffffc; valaddr_reg:x3; val_offset:52488*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52488*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bfffffe; valaddr_reg:x3; val_offset:52491*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52491*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xd7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x6bffffff; valaddr_reg:x3; val_offset:52494*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52494*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f000001; valaddr_reg:x3; val_offset:52497*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52497*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f000003; valaddr_reg:x3; val_offset:52500*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52500*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f000007; valaddr_reg:x3; val_offset:52503*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52503*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f199999; valaddr_reg:x3; val_offset:52506*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52506*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f249249; valaddr_reg:x3; val_offset:52509*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52509*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f333333; valaddr_reg:x3; val_offset:52512*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52512*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:52515*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52515*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:52518*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52518*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f444444; valaddr_reg:x3; val_offset:52521*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52521*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:52524*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52524*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:52527*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52527*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f666666; valaddr_reg:x3; val_offset:52530*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52530*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:52533*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52533*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:52536*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52536*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:52539*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52539*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2e5abd and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3bf061 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eae5abd; op2val:0x403bf061; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:52542*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52542*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:52545*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52545*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:52548*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52548*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:52551*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52551*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:52554*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52554*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:52557*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52557*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:52560*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52560*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:52563*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52563*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:52566*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52566*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:52569*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52569*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:52572*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52572*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:52575*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52575*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:52578*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52578*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:52581*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52581*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:52584*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52584*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:52587*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52587*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:52590*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52590*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84000000; valaddr_reg:x3; val_offset:52593*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52593*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84000001; valaddr_reg:x3; val_offset:52596*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52596*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84000003; valaddr_reg:x3; val_offset:52599*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52599*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84000007; valaddr_reg:x3; val_offset:52602*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52602*0 + 3*136*FLEN/8, x4, x1, x2) + +inst_17535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x8400000f; valaddr_reg:x3; val_offset:52605*0 + 3*136*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52605*0 + 3*136*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867279359,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867410431,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3867672575,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3868196863,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3869245439,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3871342591,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3871342592,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3873439744,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3874488320,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875012608,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875274752,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875405824,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875471360,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875504128,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875520512,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875528704,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875532800,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875534848,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875535872,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536384,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536640,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536768,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536832,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536864,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536880,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536888,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536892,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536894,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(3875536895,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2125340583,32,FLEN) +NAN_BOXED(3225169958,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550720,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550721,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550723,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550727,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550735,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550751,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550783,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550847,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803550975,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803551231,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803551743,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803552767,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803554815,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803558911,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803567103,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803583487,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803616255,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803681791,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1803812863,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1804075007,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1804599295,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1805647871,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1807745023,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1807745024,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1809842176,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1810890752,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811415040,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811677184,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811808256,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811873792,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811906560,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811922944,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811931136,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811935232,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811937280,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811938304,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811938816,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939072,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939200,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939264,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939296,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939312,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939320,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939324,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939326,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(1811939327,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2125355709,32,FLEN) +NAN_BOXED(1077669985,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592512,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592513,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592515,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592519,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592527,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-138.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-138.S new file mode 100644 index 000000000..8fad6147f --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-138.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_17536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x8400001f; valaddr_reg:x3; val_offset:52608*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52608*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x8400003f; valaddr_reg:x3; val_offset:52611*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52611*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x8400007f; valaddr_reg:x3; val_offset:52614*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52614*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x840000ff; valaddr_reg:x3; val_offset:52617*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52617*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x840001ff; valaddr_reg:x3; val_offset:52620*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52620*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x840003ff; valaddr_reg:x3; val_offset:52623*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52623*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x840007ff; valaddr_reg:x3; val_offset:52626*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52626*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84000fff; valaddr_reg:x3; val_offset:52629*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52629*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84001fff; valaddr_reg:x3; val_offset:52632*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52632*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84003fff; valaddr_reg:x3; val_offset:52635*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52635*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84007fff; valaddr_reg:x3; val_offset:52638*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52638*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x8400ffff; valaddr_reg:x3; val_offset:52641*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52641*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x8401ffff; valaddr_reg:x3; val_offset:52644*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52644*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x8403ffff; valaddr_reg:x3; val_offset:52647*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52647*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x8407ffff; valaddr_reg:x3; val_offset:52650*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52650*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x840fffff; valaddr_reg:x3; val_offset:52653*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52653*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x841fffff; valaddr_reg:x3; val_offset:52656*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52656*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x843fffff; valaddr_reg:x3; val_offset:52659*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52659*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84400000; valaddr_reg:x3; val_offset:52662*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52662*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84600000; valaddr_reg:x3; val_offset:52665*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52665*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84700000; valaddr_reg:x3; val_offset:52668*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52668*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x84780000; valaddr_reg:x3; val_offset:52671*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52671*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847c0000; valaddr_reg:x3; val_offset:52674*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52674*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847e0000; valaddr_reg:x3; val_offset:52677*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52677*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847f0000; valaddr_reg:x3; val_offset:52680*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52680*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847f8000; valaddr_reg:x3; val_offset:52683*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52683*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847fc000; valaddr_reg:x3; val_offset:52686*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52686*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847fe000; valaddr_reg:x3; val_offset:52689*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52689*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847ff000; valaddr_reg:x3; val_offset:52692*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52692*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847ff800; valaddr_reg:x3; val_offset:52695*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52695*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847ffc00; valaddr_reg:x3; val_offset:52698*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52698*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847ffe00; valaddr_reg:x3; val_offset:52701*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52701*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847fff00; valaddr_reg:x3; val_offset:52704*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52704*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847fff80; valaddr_reg:x3; val_offset:52707*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52707*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847fffc0; valaddr_reg:x3; val_offset:52710*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52710*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847fffe0; valaddr_reg:x3; val_offset:52713*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52713*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847ffff0; valaddr_reg:x3; val_offset:52716*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52716*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847ffff8; valaddr_reg:x3; val_offset:52719*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52719*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847ffffc; valaddr_reg:x3; val_offset:52722*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52722*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847ffffe; valaddr_reg:x3; val_offset:52725*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52725*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2ee68b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eaee68b; op2val:0x80000000; +op3val:0x847fffff; valaddr_reg:x3; val_offset:52728*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52728*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3f800001; valaddr_reg:x3; val_offset:52731*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52731*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3f800003; valaddr_reg:x3; val_offset:52734*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52734*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3f800007; valaddr_reg:x3; val_offset:52737*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52737*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3f999999; valaddr_reg:x3; val_offset:52740*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52740*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:52743*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52743*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:52746*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52746*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:52749*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52749*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:52752*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52752*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:52755*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52755*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:52758*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52758*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:52761*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52761*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:52764*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52764*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:52767*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52767*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:52770*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52770*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:52773*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52773*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:52776*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52776*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e800000; valaddr_reg:x3; val_offset:52779*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52779*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e800001; valaddr_reg:x3; val_offset:52782*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52782*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e800003; valaddr_reg:x3; val_offset:52785*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52785*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e800007; valaddr_reg:x3; val_offset:52788*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52788*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e80000f; valaddr_reg:x3; val_offset:52791*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52791*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e80001f; valaddr_reg:x3; val_offset:52794*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52794*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e80003f; valaddr_reg:x3; val_offset:52797*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52797*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e80007f; valaddr_reg:x3; val_offset:52800*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52800*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e8000ff; valaddr_reg:x3; val_offset:52803*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52803*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e8001ff; valaddr_reg:x3; val_offset:52806*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52806*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e8003ff; valaddr_reg:x3; val_offset:52809*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52809*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e8007ff; valaddr_reg:x3; val_offset:52812*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52812*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e800fff; valaddr_reg:x3; val_offset:52815*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52815*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e801fff; valaddr_reg:x3; val_offset:52818*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52818*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e803fff; valaddr_reg:x3; val_offset:52821*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52821*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e807fff; valaddr_reg:x3; val_offset:52824*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52824*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e80ffff; valaddr_reg:x3; val_offset:52827*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52827*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e81ffff; valaddr_reg:x3; val_offset:52830*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52830*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e83ffff; valaddr_reg:x3; val_offset:52833*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52833*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e87ffff; valaddr_reg:x3; val_offset:52836*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52836*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e8fffff; valaddr_reg:x3; val_offset:52839*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52839*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4e9fffff; valaddr_reg:x3; val_offset:52842*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52842*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4ebfffff; valaddr_reg:x3; val_offset:52845*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52845*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4ec00000; valaddr_reg:x3; val_offset:52848*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52848*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4ee00000; valaddr_reg:x3; val_offset:52851*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52851*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4ef00000; valaddr_reg:x3; val_offset:52854*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52854*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4ef80000; valaddr_reg:x3; val_offset:52857*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52857*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efc0000; valaddr_reg:x3; val_offset:52860*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52860*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efe0000; valaddr_reg:x3; val_offset:52863*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52863*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4eff0000; valaddr_reg:x3; val_offset:52866*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52866*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4eff8000; valaddr_reg:x3; val_offset:52869*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52869*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4effc000; valaddr_reg:x3; val_offset:52872*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52872*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4effe000; valaddr_reg:x3; val_offset:52875*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52875*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efff000; valaddr_reg:x3; val_offset:52878*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52878*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efff800; valaddr_reg:x3; val_offset:52881*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52881*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efffc00; valaddr_reg:x3; val_offset:52884*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52884*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efffe00; valaddr_reg:x3; val_offset:52887*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52887*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4effff00; valaddr_reg:x3; val_offset:52890*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52890*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4effff80; valaddr_reg:x3; val_offset:52893*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52893*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4effffc0; valaddr_reg:x3; val_offset:52896*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52896*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4effffe0; valaddr_reg:x3; val_offset:52899*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52899*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efffff0; valaddr_reg:x3; val_offset:52902*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52902*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efffff8; valaddr_reg:x3; val_offset:52905*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52905*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efffffc; valaddr_reg:x3; val_offset:52908*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52908*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4efffffe; valaddr_reg:x3; val_offset:52911*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52911*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x2fdaba and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5d2b00 and fs3 == 0 and fe3 == 0x9d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eafdaba; op2val:0x5d2b00; +op3val:0x4effffff; valaddr_reg:x3; val_offset:52914*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52914*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:52917*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52917*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:52920*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52920*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:52923*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52923*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:52926*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52926*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:52929*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52929*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:52932*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52932*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:52935*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52935*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:52938*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52938*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:52941*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52941*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:52944*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52944*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:52947*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52947*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:52950*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52950*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:52953*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52953*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:52956*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52956*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:52959*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52959*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:52962*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52962*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d000000; valaddr_reg:x3; val_offset:52965*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52965*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d000001; valaddr_reg:x3; val_offset:52968*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52968*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d000003; valaddr_reg:x3; val_offset:52971*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52971*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d000007; valaddr_reg:x3; val_offset:52974*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52974*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d00000f; valaddr_reg:x3; val_offset:52977*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52977*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d00001f; valaddr_reg:x3; val_offset:52980*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52980*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d00003f; valaddr_reg:x3; val_offset:52983*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52983*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d00007f; valaddr_reg:x3; val_offset:52986*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52986*0 + 3*137*FLEN/8, x4, x1, x2) + +inst_17663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d0000ff; valaddr_reg:x3; val_offset:52989*0 + 3*137*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52989*0 + 3*137*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592543,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592575,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592639,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592767,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214593023,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214593535,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214594559,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214596607,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214600703,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214608895,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214625279,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214658047,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214723583,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214854655,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2215116799,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2215641087,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2216689663,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2218786815,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2218786816,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2220883968,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2221932544,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222456832,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222718976,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222850048,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222915584,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222948352,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222964736,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222972928,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222977024,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222979072,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980096,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980608,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980864,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980992,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981056,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981088,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981104,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981112,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981116,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981118,32,FLEN) +NAN_BOXED(2125391499,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981119,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011456,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011457,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011459,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011463,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011471,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011487,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011519,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011583,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011711,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317011967,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317012479,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317013503,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317015551,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317019647,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317027839,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317044223,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317076991,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317142527,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317273599,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1317535743,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1318060031,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1319108607,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1321205759,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1321205760,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1323302912,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1324351488,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1324875776,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325137920,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325268992,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325334528,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325367296,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325383680,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325391872,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325395968,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325398016,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325399040,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325399552,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325399808,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325399936,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325400000,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325400032,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325400048,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325400056,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325400060,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325400062,32,FLEN) +NAN_BOXED(2125454010,32,FLEN) +NAN_BOXED(6105856,32,FLEN) +NAN_BOXED(1325400063,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587456,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587457,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587459,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587463,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587471,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587487,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587519,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587583,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587711,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-139.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-139.S new file mode 100644 index 000000000..e9d8d51e1 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-139.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_17664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d0001ff; valaddr_reg:x3; val_offset:52992*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52992*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d0003ff; valaddr_reg:x3; val_offset:52995*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52995*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d0007ff; valaddr_reg:x3; val_offset:52998*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 52998*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d000fff; valaddr_reg:x3; val_offset:53001*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53001*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d001fff; valaddr_reg:x3; val_offset:53004*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53004*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d003fff; valaddr_reg:x3; val_offset:53007*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53007*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d007fff; valaddr_reg:x3; val_offset:53010*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53010*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d00ffff; valaddr_reg:x3; val_offset:53013*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53013*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d01ffff; valaddr_reg:x3; val_offset:53016*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53016*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d03ffff; valaddr_reg:x3; val_offset:53019*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53019*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d07ffff; valaddr_reg:x3; val_offset:53022*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53022*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d0fffff; valaddr_reg:x3; val_offset:53025*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53025*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d1fffff; valaddr_reg:x3; val_offset:53028*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53028*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d3fffff; valaddr_reg:x3; val_offset:53031*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53031*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d400000; valaddr_reg:x3; val_offset:53034*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53034*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d600000; valaddr_reg:x3; val_offset:53037*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53037*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d700000; valaddr_reg:x3; val_offset:53040*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53040*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d780000; valaddr_reg:x3; val_offset:53043*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53043*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7c0000; valaddr_reg:x3; val_offset:53046*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53046*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7e0000; valaddr_reg:x3; val_offset:53049*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53049*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7f0000; valaddr_reg:x3; val_offset:53052*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53052*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7f8000; valaddr_reg:x3; val_offset:53055*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53055*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7fc000; valaddr_reg:x3; val_offset:53058*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53058*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7fe000; valaddr_reg:x3; val_offset:53061*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53061*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7ff000; valaddr_reg:x3; val_offset:53064*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53064*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7ff800; valaddr_reg:x3; val_offset:53067*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53067*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:53070*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53070*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:53073*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53073*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7fff00; valaddr_reg:x3; val_offset:53076*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53076*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7fff80; valaddr_reg:x3; val_offset:53079*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53079*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:53082*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53082*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:53085*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53085*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:53088*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53088*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:53091*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53091*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:53094*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53094*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:53097*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53097*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x300757 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb00757; op2val:0x80000000; +op3val:0x8d7fffff; valaddr_reg:x3; val_offset:53100*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53100*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbf800001; valaddr_reg:x3; val_offset:53103*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53103*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbf800003; valaddr_reg:x3; val_offset:53106*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53106*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbf800007; valaddr_reg:x3; val_offset:53109*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53109*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbf999999; valaddr_reg:x3; val_offset:53112*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53112*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:53115*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53115*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:53118*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53118*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:53121*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53121*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:53124*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53124*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:53127*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53127*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:53130*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53130*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:53133*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53133*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:53136*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53136*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:53139*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53139*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:53142*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53142*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:53145*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53145*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:53148*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53148*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9800000; valaddr_reg:x3; val_offset:53151*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53151*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9800001; valaddr_reg:x3; val_offset:53154*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53154*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9800003; valaddr_reg:x3; val_offset:53157*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53157*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9800007; valaddr_reg:x3; val_offset:53160*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53160*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc980000f; valaddr_reg:x3; val_offset:53163*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53163*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc980001f; valaddr_reg:x3; val_offset:53166*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53166*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc980003f; valaddr_reg:x3; val_offset:53169*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53169*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc980007f; valaddr_reg:x3; val_offset:53172*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53172*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc98000ff; valaddr_reg:x3; val_offset:53175*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53175*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc98001ff; valaddr_reg:x3; val_offset:53178*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53178*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc98003ff; valaddr_reg:x3; val_offset:53181*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53181*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc98007ff; valaddr_reg:x3; val_offset:53184*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53184*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9800fff; valaddr_reg:x3; val_offset:53187*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53187*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9801fff; valaddr_reg:x3; val_offset:53190*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53190*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9803fff; valaddr_reg:x3; val_offset:53193*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53193*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9807fff; valaddr_reg:x3; val_offset:53196*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53196*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc980ffff; valaddr_reg:x3; val_offset:53199*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53199*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc981ffff; valaddr_reg:x3; val_offset:53202*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53202*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc983ffff; valaddr_reg:x3; val_offset:53205*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53205*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc987ffff; valaddr_reg:x3; val_offset:53208*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53208*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc98fffff; valaddr_reg:x3; val_offset:53211*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53211*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc99fffff; valaddr_reg:x3; val_offset:53214*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53214*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9bfffff; valaddr_reg:x3; val_offset:53217*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53217*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9c00000; valaddr_reg:x3; val_offset:53220*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53220*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9e00000; valaddr_reg:x3; val_offset:53223*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53223*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9f00000; valaddr_reg:x3; val_offset:53226*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53226*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9f80000; valaddr_reg:x3; val_offset:53229*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53229*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fc0000; valaddr_reg:x3; val_offset:53232*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53232*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fe0000; valaddr_reg:x3; val_offset:53235*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53235*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ff0000; valaddr_reg:x3; val_offset:53238*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53238*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ff8000; valaddr_reg:x3; val_offset:53241*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53241*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ffc000; valaddr_reg:x3; val_offset:53244*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53244*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ffe000; valaddr_reg:x3; val_offset:53247*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53247*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fff000; valaddr_reg:x3; val_offset:53250*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53250*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fff800; valaddr_reg:x3; val_offset:53253*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53253*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fffc00; valaddr_reg:x3; val_offset:53256*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53256*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fffe00; valaddr_reg:x3; val_offset:53259*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53259*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ffff00; valaddr_reg:x3; val_offset:53262*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53262*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ffff80; valaddr_reg:x3; val_offset:53265*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53265*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ffffc0; valaddr_reg:x3; val_offset:53268*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53268*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ffffe0; valaddr_reg:x3; val_offset:53271*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53271*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fffff0; valaddr_reg:x3; val_offset:53274*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53274*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fffff8; valaddr_reg:x3; val_offset:53277*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53277*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fffffc; valaddr_reg:x3; val_offset:53280*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53280*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9fffffe; valaddr_reg:x3; val_offset:53283*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53283*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x30208a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5d0612 and fs3 == 1 and fe3 == 0x93 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb0208a; op2val:0x805d0612; +op3val:0xc9ffffff; valaddr_reg:x3; val_offset:53286*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53286*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8000000; valaddr_reg:x3; val_offset:53289*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53289*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8000001; valaddr_reg:x3; val_offset:53292*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53292*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8000003; valaddr_reg:x3; val_offset:53295*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53295*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8000007; valaddr_reg:x3; val_offset:53298*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53298*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe800000f; valaddr_reg:x3; val_offset:53301*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53301*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe800001f; valaddr_reg:x3; val_offset:53304*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53304*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe800003f; valaddr_reg:x3; val_offset:53307*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53307*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe800007f; valaddr_reg:x3; val_offset:53310*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53310*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe80000ff; valaddr_reg:x3; val_offset:53313*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53313*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe80001ff; valaddr_reg:x3; val_offset:53316*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53316*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe80003ff; valaddr_reg:x3; val_offset:53319*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53319*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe80007ff; valaddr_reg:x3; val_offset:53322*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53322*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8000fff; valaddr_reg:x3; val_offset:53325*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53325*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8001fff; valaddr_reg:x3; val_offset:53328*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53328*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8003fff; valaddr_reg:x3; val_offset:53331*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53331*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8007fff; valaddr_reg:x3; val_offset:53334*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53334*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe800ffff; valaddr_reg:x3; val_offset:53337*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53337*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe801ffff; valaddr_reg:x3; val_offset:53340*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53340*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe803ffff; valaddr_reg:x3; val_offset:53343*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53343*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe807ffff; valaddr_reg:x3; val_offset:53346*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53346*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe80fffff; valaddr_reg:x3; val_offset:53349*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53349*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe81fffff; valaddr_reg:x3; val_offset:53352*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53352*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe83fffff; valaddr_reg:x3; val_offset:53355*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53355*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8400000; valaddr_reg:x3; val_offset:53358*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53358*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8600000; valaddr_reg:x3; val_offset:53361*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53361*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8700000; valaddr_reg:x3; val_offset:53364*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53364*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe8780000; valaddr_reg:x3; val_offset:53367*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53367*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87c0000; valaddr_reg:x3; val_offset:53370*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53370*0 + 3*138*FLEN/8, x4, x1, x2) + +inst_17791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87e0000; valaddr_reg:x3; val_offset:53373*0 + 3*138*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53373*0 + 3*138*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587967,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365588479,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365589503,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365591551,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365595647,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365603839,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365620223,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365652991,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365718527,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365849599,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2366111743,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2366636031,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2367684607,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2369781759,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2369781760,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2371878912,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2372927488,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373451776,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373713920,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373844992,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373910528,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373943296,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373959680,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373967872,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373971968,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373974016,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975040,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975552,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975808,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975936,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976000,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976032,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976048,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976056,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976060,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976062,32,FLEN) +NAN_BOXED(2125465431,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976063,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609024,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609025,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609027,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609031,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609039,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609055,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609087,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609151,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609279,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380609535,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380610047,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380611071,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380613119,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380617215,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380625407,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380641791,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380674559,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380740095,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3380871167,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3381133311,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3381657599,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3382706175,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3384803327,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3384803328,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3386900480,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3387949056,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388473344,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388735488,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388866560,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388932096,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388964864,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388981248,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388989440,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388993536,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388995584,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388996608,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997120,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997376,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997504,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997568,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997600,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997616,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997624,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997628,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997630,32,FLEN) +NAN_BOXED(2125471882,32,FLEN) +NAN_BOXED(2153580050,32,FLEN) +NAN_BOXED(3388997631,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314112,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314113,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314115,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314119,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314127,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314143,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314175,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314239,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314367,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892314623,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892315135,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892316159,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892318207,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892322303,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892330495,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892346879,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892379647,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892445183,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892576255,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3892838399,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3893362687,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3894411263,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3896508415,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3896508416,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3898605568,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3899654144,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900178432,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900440576,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900571648,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-14.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-14.S new file mode 100644 index 000000000..beb7541df --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-14.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_1664: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:4992*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4992*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1665: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:4995*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4995*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1666: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:4998*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 4998*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1667: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x78bc6b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf8bc6b; op2val:0x0; +op3val:0x7fffff; valaddr_reg:x3; val_offset:5001*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5001*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1668: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3800000; valaddr_reg:x3; val_offset:5004*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5004*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1669: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3800001; valaddr_reg:x3; val_offset:5007*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5007*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1670: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3800003; valaddr_reg:x3; val_offset:5010*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5010*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1671: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3800007; valaddr_reg:x3; val_offset:5013*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5013*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1672: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf380000f; valaddr_reg:x3; val_offset:5016*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5016*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1673: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf380001f; valaddr_reg:x3; val_offset:5019*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5019*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1674: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf380003f; valaddr_reg:x3; val_offset:5022*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5022*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1675: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf380007f; valaddr_reg:x3; val_offset:5025*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5025*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1676: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf38000ff; valaddr_reg:x3; val_offset:5028*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5028*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1677: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf38001ff; valaddr_reg:x3; val_offset:5031*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5031*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1678: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf38003ff; valaddr_reg:x3; val_offset:5034*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5034*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1679: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf38007ff; valaddr_reg:x3; val_offset:5037*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5037*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1680: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3800fff; valaddr_reg:x3; val_offset:5040*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5040*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1681: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3801fff; valaddr_reg:x3; val_offset:5043*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5043*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1682: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3803fff; valaddr_reg:x3; val_offset:5046*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5046*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1683: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3807fff; valaddr_reg:x3; val_offset:5049*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5049*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1684: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf380ffff; valaddr_reg:x3; val_offset:5052*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5052*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1685: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf381ffff; valaddr_reg:x3; val_offset:5055*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5055*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1686: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf383ffff; valaddr_reg:x3; val_offset:5058*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5058*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1687: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf387ffff; valaddr_reg:x3; val_offset:5061*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5061*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1688: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf38fffff; valaddr_reg:x3; val_offset:5064*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5064*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1689: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf39fffff; valaddr_reg:x3; val_offset:5067*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5067*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1690: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3bfffff; valaddr_reg:x3; val_offset:5070*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5070*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1691: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3c00000; valaddr_reg:x3; val_offset:5073*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5073*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1692: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3e00000; valaddr_reg:x3; val_offset:5076*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5076*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1693: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3f00000; valaddr_reg:x3; val_offset:5079*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5079*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1694: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3f80000; valaddr_reg:x3; val_offset:5082*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5082*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1695: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fc0000; valaddr_reg:x3; val_offset:5085*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5085*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1696: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fe0000; valaddr_reg:x3; val_offset:5088*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5088*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1697: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ff0000; valaddr_reg:x3; val_offset:5091*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5091*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1698: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ff8000; valaddr_reg:x3; val_offset:5094*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5094*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1699: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ffc000; valaddr_reg:x3; val_offset:5097*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5097*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1700: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ffe000; valaddr_reg:x3; val_offset:5100*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5100*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1701: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fff000; valaddr_reg:x3; val_offset:5103*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5103*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1702: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fff800; valaddr_reg:x3; val_offset:5106*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5106*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1703: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fffc00; valaddr_reg:x3; val_offset:5109*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5109*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1704: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fffe00; valaddr_reg:x3; val_offset:5112*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5112*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1705: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ffff00; valaddr_reg:x3; val_offset:5115*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5115*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1706: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ffff80; valaddr_reg:x3; val_offset:5118*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5118*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1707: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ffffc0; valaddr_reg:x3; val_offset:5121*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5121*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1708: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ffffe0; valaddr_reg:x3; val_offset:5124*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5124*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1709: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fffff0; valaddr_reg:x3; val_offset:5127*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5127*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1710: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fffff8; valaddr_reg:x3; val_offset:5130*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5130*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1711: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fffffc; valaddr_reg:x3; val_offset:5133*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5133*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1712: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3fffffe; valaddr_reg:x3; val_offset:5136*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5136*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1713: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xe7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xf3ffffff; valaddr_reg:x3; val_offset:5139*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5139*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1714: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff000001; valaddr_reg:x3; val_offset:5142*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5142*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1715: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff000003; valaddr_reg:x3; val_offset:5145*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5145*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1716: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff000007; valaddr_reg:x3; val_offset:5148*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5148*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1717: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff199999; valaddr_reg:x3; val_offset:5151*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5151*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1718: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff249249; valaddr_reg:x3; val_offset:5154*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5154*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1719: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff333333; valaddr_reg:x3; val_offset:5157*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5157*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1720: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:5160*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5160*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1721: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:5163*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5163*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1722: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff444444; valaddr_reg:x3; val_offset:5166*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5166*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1723: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:5169*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5169*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1724: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:5172*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5172*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1725: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff666666; valaddr_reg:x3; val_offset:5175*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5175*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1726: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:5178*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5178*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1727: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:5181*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5181*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1728: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:5184*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5184*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1729: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x791f1c and fs2 == 1 and fe2 == 0x84 and fm2 == 0x0388c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf91f1c; op2val:0xc20388c0; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:5187*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5187*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1730: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:5190*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5190*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1731: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:5193*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5193*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1732: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:5196*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5196*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1733: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:5199*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5199*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1734: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:5202*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5202*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1735: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:5205*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5205*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1736: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:5208*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5208*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1737: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:5211*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5211*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1738: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:5214*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5214*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1739: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:5217*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5217*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1740: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:5220*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5220*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1741: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:5223*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5223*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1742: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:5226*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5226*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1743: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:5229*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5229*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1744: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:5232*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5232*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1745: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:5235*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5235*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1746: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd000000; valaddr_reg:x3; val_offset:5238*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5238*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1747: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd000001; valaddr_reg:x3; val_offset:5241*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5241*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1748: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd000003; valaddr_reg:x3; val_offset:5244*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5244*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1749: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd000007; valaddr_reg:x3; val_offset:5247*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5247*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1750: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd00000f; valaddr_reg:x3; val_offset:5250*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5250*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1751: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd00001f; valaddr_reg:x3; val_offset:5253*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5253*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1752: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd00003f; valaddr_reg:x3; val_offset:5256*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5256*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1753: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd00007f; valaddr_reg:x3; val_offset:5259*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5259*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1754: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd0000ff; valaddr_reg:x3; val_offset:5262*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5262*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1755: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd0001ff; valaddr_reg:x3; val_offset:5265*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5265*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1756: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd0003ff; valaddr_reg:x3; val_offset:5268*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5268*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1757: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd0007ff; valaddr_reg:x3; val_offset:5271*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5271*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1758: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd000fff; valaddr_reg:x3; val_offset:5274*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5274*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1759: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd001fff; valaddr_reg:x3; val_offset:5277*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5277*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1760: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd003fff; valaddr_reg:x3; val_offset:5280*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5280*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1761: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd007fff; valaddr_reg:x3; val_offset:5283*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5283*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1762: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd00ffff; valaddr_reg:x3; val_offset:5286*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5286*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1763: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd01ffff; valaddr_reg:x3; val_offset:5289*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5289*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1764: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd03ffff; valaddr_reg:x3; val_offset:5292*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5292*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1765: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd07ffff; valaddr_reg:x3; val_offset:5295*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5295*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1766: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd0fffff; valaddr_reg:x3; val_offset:5298*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5298*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1767: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd1fffff; valaddr_reg:x3; val_offset:5301*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5301*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1768: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd3fffff; valaddr_reg:x3; val_offset:5304*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5304*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1769: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd400000; valaddr_reg:x3; val_offset:5307*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5307*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1770: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd600000; valaddr_reg:x3; val_offset:5310*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5310*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1771: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd700000; valaddr_reg:x3; val_offset:5313*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5313*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1772: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd780000; valaddr_reg:x3; val_offset:5316*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5316*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1773: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7c0000; valaddr_reg:x3; val_offset:5319*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5319*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1774: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7e0000; valaddr_reg:x3; val_offset:5322*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5322*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1775: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7f0000; valaddr_reg:x3; val_offset:5325*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5325*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1776: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7f8000; valaddr_reg:x3; val_offset:5328*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5328*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1777: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7fc000; valaddr_reg:x3; val_offset:5331*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5331*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1778: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7fe000; valaddr_reg:x3; val_offset:5334*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5334*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1779: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7ff000; valaddr_reg:x3; val_offset:5337*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5337*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1780: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7ff800; valaddr_reg:x3; val_offset:5340*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5340*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1781: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7ffc00; valaddr_reg:x3; val_offset:5343*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5343*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1782: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7ffe00; valaddr_reg:x3; val_offset:5346*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5346*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1783: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7fff00; valaddr_reg:x3; val_offset:5349*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5349*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1784: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7fff80; valaddr_reg:x3; val_offset:5352*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5352*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1785: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7fffc0; valaddr_reg:x3; val_offset:5355*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5355*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1786: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7fffe0; valaddr_reg:x3; val_offset:5358*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5358*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1787: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7ffff0; valaddr_reg:x3; val_offset:5361*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5361*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1788: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7ffff8; valaddr_reg:x3; val_offset:5364*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5364*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1789: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7ffffc; valaddr_reg:x3; val_offset:5367*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5367*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1790: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7ffffe; valaddr_reg:x3; val_offset:5370*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5370*0 + 3*13*FLEN/8, x4, x1, x2) + +inst_1791: +// fs1 == 0 and fe1 == 0xf9 and fm1 == 0x79a4a6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7cf9a4a6; op2val:0x0; +op3val:0xd7fffff; valaddr_reg:x3; val_offset:5373*0 + 3*13*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5373*0 + 3*13*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2096675947,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388607,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252096,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252097,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252099,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252103,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252111,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252127,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252159,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252223,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252351,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085252607,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085253119,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085254143,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085256191,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085260287,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085268479,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085284863,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085317631,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085383167,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085514239,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4085776383,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4086300671,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4087349247,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4089446399,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4089446400,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4091543552,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4092592128,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093116416,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093378560,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093509632,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093575168,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093607936,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093624320,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093632512,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093636608,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093638656,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093639680,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640192,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640448,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640576,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640640,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640672,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640688,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640696,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640700,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640702,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4093640703,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2096701212,32,FLEN) +NAN_BOXED(3255011520,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103808,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103809,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103811,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103815,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103823,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103839,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103871,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103935,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104063,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104319,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104831,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218105855,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218107903,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218111999,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218120191,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218136575,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218169343,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218234879,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218365951,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218628095,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(219152383,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(220200959,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(222298111,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(222298112,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(224395264,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(225443840,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(225968128,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226230272,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226361344,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226426880,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226459648,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226476032,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226484224,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226488320,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226490368,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226491392,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226491904,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492160,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492288,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492352,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492384,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492400,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492408,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492412,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492414,32,FLEN) +NAN_BOXED(2096735398,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492415,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-140.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-140.S new file mode 100644 index 000000000..67d0b31e6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-140.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_17792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87f0000; valaddr_reg:x3; val_offset:53376*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53376*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87f8000; valaddr_reg:x3; val_offset:53379*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53379*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87fc000; valaddr_reg:x3; val_offset:53382*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53382*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87fe000; valaddr_reg:x3; val_offset:53385*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53385*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87ff000; valaddr_reg:x3; val_offset:53388*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53388*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87ff800; valaddr_reg:x3; val_offset:53391*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53391*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87ffc00; valaddr_reg:x3; val_offset:53394*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53394*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87ffe00; valaddr_reg:x3; val_offset:53397*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53397*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87fff00; valaddr_reg:x3; val_offset:53400*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53400*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87fff80; valaddr_reg:x3; val_offset:53403*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53403*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87fffc0; valaddr_reg:x3; val_offset:53406*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53406*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87fffe0; valaddr_reg:x3; val_offset:53409*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53409*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87ffff0; valaddr_reg:x3; val_offset:53412*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53412*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87ffff8; valaddr_reg:x3; val_offset:53415*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53415*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87ffffc; valaddr_reg:x3; val_offset:53418*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53418*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87ffffe; valaddr_reg:x3; val_offset:53421*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53421*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xd0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xe87fffff; valaddr_reg:x3; val_offset:53424*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53424*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff000001; valaddr_reg:x3; val_offset:53427*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53427*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff000003; valaddr_reg:x3; val_offset:53430*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53430*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff000007; valaddr_reg:x3; val_offset:53433*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53433*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff199999; valaddr_reg:x3; val_offset:53436*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53436*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff249249; valaddr_reg:x3; val_offset:53439*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53439*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff333333; valaddr_reg:x3; val_offset:53442*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53442*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:53445*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53445*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:53448*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53448*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff444444; valaddr_reg:x3; val_offset:53451*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53451*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:53454*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53454*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:53457*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53457*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff666666; valaddr_reg:x3; val_offset:53460*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53460*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:53463*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53463*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:53466*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53466*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:53469*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53469*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x31933e and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3887c1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb1933e; op2val:0xc03887c1; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:53472*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53472*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3f800001; valaddr_reg:x3; val_offset:53475*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53475*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3f800003; valaddr_reg:x3; val_offset:53478*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53478*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3f800007; valaddr_reg:x3; val_offset:53481*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53481*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3f999999; valaddr_reg:x3; val_offset:53484*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53484*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:53487*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53487*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:53490*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53490*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:53493*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53493*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:53496*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53496*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:53499*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53499*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:53502*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53502*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:53505*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53505*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:53508*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53508*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:53511*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53511*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:53514*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53514*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:53517*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53517*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:53520*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53520*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40000000; valaddr_reg:x3; val_offset:53523*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53523*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40000001; valaddr_reg:x3; val_offset:53526*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53526*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40000003; valaddr_reg:x3; val_offset:53529*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53529*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40000007; valaddr_reg:x3; val_offset:53532*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53532*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x4000000f; valaddr_reg:x3; val_offset:53535*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53535*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x4000001f; valaddr_reg:x3; val_offset:53538*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53538*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x4000003f; valaddr_reg:x3; val_offset:53541*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53541*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x4000007f; valaddr_reg:x3; val_offset:53544*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53544*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x400000ff; valaddr_reg:x3; val_offset:53547*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53547*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x400001ff; valaddr_reg:x3; val_offset:53550*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53550*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x400003ff; valaddr_reg:x3; val_offset:53553*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53553*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x400007ff; valaddr_reg:x3; val_offset:53556*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53556*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40000fff; valaddr_reg:x3; val_offset:53559*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53559*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40001fff; valaddr_reg:x3; val_offset:53562*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53562*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40003fff; valaddr_reg:x3; val_offset:53565*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53565*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40007fff; valaddr_reg:x3; val_offset:53568*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53568*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x4000ffff; valaddr_reg:x3; val_offset:53571*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53571*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x4001ffff; valaddr_reg:x3; val_offset:53574*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53574*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x4003ffff; valaddr_reg:x3; val_offset:53577*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53577*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x4007ffff; valaddr_reg:x3; val_offset:53580*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53580*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x400fffff; valaddr_reg:x3; val_offset:53583*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53583*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x401fffff; valaddr_reg:x3; val_offset:53586*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53586*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x403fffff; valaddr_reg:x3; val_offset:53589*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53589*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40400000; valaddr_reg:x3; val_offset:53592*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53592*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40600000; valaddr_reg:x3; val_offset:53595*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53595*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40700000; valaddr_reg:x3; val_offset:53598*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53598*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x40780000; valaddr_reg:x3; val_offset:53601*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53601*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407c0000; valaddr_reg:x3; val_offset:53604*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53604*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407e0000; valaddr_reg:x3; val_offset:53607*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53607*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407f0000; valaddr_reg:x3; val_offset:53610*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53610*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407f8000; valaddr_reg:x3; val_offset:53613*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53613*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407fc000; valaddr_reg:x3; val_offset:53616*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53616*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407fe000; valaddr_reg:x3; val_offset:53619*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53619*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407ff000; valaddr_reg:x3; val_offset:53622*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53622*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407ff800; valaddr_reg:x3; val_offset:53625*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53625*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407ffc00; valaddr_reg:x3; val_offset:53628*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53628*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407ffe00; valaddr_reg:x3; val_offset:53631*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53631*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407fff00; valaddr_reg:x3; val_offset:53634*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53634*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407fff80; valaddr_reg:x3; val_offset:53637*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53637*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407fffc0; valaddr_reg:x3; val_offset:53640*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53640*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407fffe0; valaddr_reg:x3; val_offset:53643*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53643*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407ffff0; valaddr_reg:x3; val_offset:53646*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53646*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407ffff8; valaddr_reg:x3; val_offset:53649*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53649*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407ffffc; valaddr_reg:x3; val_offset:53652*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53652*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407ffffe; valaddr_reg:x3; val_offset:53655*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53655*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3360dd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5b5670 and fs3 == 0 and fe3 == 0x80 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb360dd; op2val:0x5b5670; +op3val:0x407fffff; valaddr_reg:x3; val_offset:53658*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53658*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:53661*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53661*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:53664*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53664*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:53667*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53667*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:53670*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53670*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:53673*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53673*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:53676*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53676*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:53679*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53679*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:53682*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53682*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:53685*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53685*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:53688*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53688*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:53691*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53691*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:53694*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53694*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:53697*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53697*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:53700*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53700*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:53703*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53703*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:53706*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53706*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc800000; valaddr_reg:x3; val_offset:53709*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53709*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc800001; valaddr_reg:x3; val_offset:53712*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53712*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc800003; valaddr_reg:x3; val_offset:53715*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53715*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc800007; valaddr_reg:x3; val_offset:53718*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53718*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc80000f; valaddr_reg:x3; val_offset:53721*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53721*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc80001f; valaddr_reg:x3; val_offset:53724*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53724*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc80003f; valaddr_reg:x3; val_offset:53727*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53727*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc80007f; valaddr_reg:x3; val_offset:53730*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53730*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc8000ff; valaddr_reg:x3; val_offset:53733*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53733*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc8001ff; valaddr_reg:x3; val_offset:53736*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53736*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc8003ff; valaddr_reg:x3; val_offset:53739*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53739*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc8007ff; valaddr_reg:x3; val_offset:53742*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53742*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc800fff; valaddr_reg:x3; val_offset:53745*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53745*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc801fff; valaddr_reg:x3; val_offset:53748*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53748*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc803fff; valaddr_reg:x3; val_offset:53751*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53751*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc807fff; valaddr_reg:x3; val_offset:53754*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53754*0 + 3*139*FLEN/8, x4, x1, x2) + +inst_17919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc80ffff; valaddr_reg:x3; val_offset:53757*0 + 3*139*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53757*0 + 3*139*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900637184,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900669952,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900686336,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900694528,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900698624,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900700672,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900701696,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702208,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702464,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702592,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702656,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702688,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702704,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702712,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702716,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702718,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(3900702719,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2125566782,32,FLEN) +NAN_BOXED(3224930241,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741824,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741825,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741827,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741831,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741839,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741855,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741887,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073741951,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073742079,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073742335,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073742847,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073743871,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073745919,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073750015,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073758207,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073774591,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073807359,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1073872895,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1074003967,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1074266111,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1074790399,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1075838975,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1077936127,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1077936128,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1080033280,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1081081856,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1081606144,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1081868288,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1081999360,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082064896,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082097664,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082114048,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082122240,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082126336,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082128384,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082129408,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082129920,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130176,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130304,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130368,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130400,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130416,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130424,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130428,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130430,32,FLEN) +NAN_BOXED(2125684957,32,FLEN) +NAN_BOXED(5985904,32,FLEN) +NAN_BOXED(1082130431,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715200,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715201,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715203,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715207,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715215,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715231,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715263,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715327,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715455,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715711,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209716223,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209717247,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209719295,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209723391,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209731583,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209747967,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209780735,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-141.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-141.S new file mode 100644 index 000000000..9f56a04d3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-141.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_17920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc81ffff; valaddr_reg:x3; val_offset:53760*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53760*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc83ffff; valaddr_reg:x3; val_offset:53763*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53763*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc87ffff; valaddr_reg:x3; val_offset:53766*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53766*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc8fffff; valaddr_reg:x3; val_offset:53769*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53769*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xc9fffff; valaddr_reg:x3; val_offset:53772*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53772*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcbfffff; valaddr_reg:x3; val_offset:53775*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53775*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcc00000; valaddr_reg:x3; val_offset:53778*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53778*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xce00000; valaddr_reg:x3; val_offset:53781*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53781*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcf00000; valaddr_reg:x3; val_offset:53784*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53784*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcf80000; valaddr_reg:x3; val_offset:53787*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53787*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfc0000; valaddr_reg:x3; val_offset:53790*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53790*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfe0000; valaddr_reg:x3; val_offset:53793*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53793*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcff0000; valaddr_reg:x3; val_offset:53796*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53796*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcff8000; valaddr_reg:x3; val_offset:53799*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53799*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcffc000; valaddr_reg:x3; val_offset:53802*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53802*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcffe000; valaddr_reg:x3; val_offset:53805*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53805*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfff000; valaddr_reg:x3; val_offset:53808*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53808*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfff800; valaddr_reg:x3; val_offset:53811*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53811*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfffc00; valaddr_reg:x3; val_offset:53814*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53814*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfffe00; valaddr_reg:x3; val_offset:53817*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53817*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcffff00; valaddr_reg:x3; val_offset:53820*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53820*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcffff80; valaddr_reg:x3; val_offset:53823*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53823*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcffffc0; valaddr_reg:x3; val_offset:53826*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53826*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcffffe0; valaddr_reg:x3; val_offset:53829*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53829*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfffff0; valaddr_reg:x3; val_offset:53832*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53832*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfffff8; valaddr_reg:x3; val_offset:53835*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53835*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfffffc; valaddr_reg:x3; val_offset:53838*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53838*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcfffffe; valaddr_reg:x3; val_offset:53841*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53841*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x33667c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb3667c; op2val:0x0; +op3val:0xcffffff; valaddr_reg:x3; val_offset:53844*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53844*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3f800001; valaddr_reg:x3; val_offset:53847*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53847*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3f800003; valaddr_reg:x3; val_offset:53850*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53850*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3f800007; valaddr_reg:x3; val_offset:53853*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53853*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3f999999; valaddr_reg:x3; val_offset:53856*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53856*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:53859*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53859*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:53862*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53862*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:53865*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53865*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:53868*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53868*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:53871*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53871*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:53874*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53874*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:53877*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53877*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:53880*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53880*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:53883*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53883*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:53886*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53886*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:53889*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53889*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:53892*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53892*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43000000; valaddr_reg:x3; val_offset:53895*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53895*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43000001; valaddr_reg:x3; val_offset:53898*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53898*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43000003; valaddr_reg:x3; val_offset:53901*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53901*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43000007; valaddr_reg:x3; val_offset:53904*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53904*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x4300000f; valaddr_reg:x3; val_offset:53907*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53907*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x4300001f; valaddr_reg:x3; val_offset:53910*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53910*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x4300003f; valaddr_reg:x3; val_offset:53913*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53913*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x4300007f; valaddr_reg:x3; val_offset:53916*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53916*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x430000ff; valaddr_reg:x3; val_offset:53919*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53919*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x430001ff; valaddr_reg:x3; val_offset:53922*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53922*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x430003ff; valaddr_reg:x3; val_offset:53925*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53925*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x430007ff; valaddr_reg:x3; val_offset:53928*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53928*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43000fff; valaddr_reg:x3; val_offset:53931*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53931*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43001fff; valaddr_reg:x3; val_offset:53934*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53934*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43003fff; valaddr_reg:x3; val_offset:53937*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53937*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43007fff; valaddr_reg:x3; val_offset:53940*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53940*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x4300ffff; valaddr_reg:x3; val_offset:53943*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53943*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x4301ffff; valaddr_reg:x3; val_offset:53946*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53946*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x4303ffff; valaddr_reg:x3; val_offset:53949*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53949*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x4307ffff; valaddr_reg:x3; val_offset:53952*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53952*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x430fffff; valaddr_reg:x3; val_offset:53955*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53955*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x431fffff; valaddr_reg:x3; val_offset:53958*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53958*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x433fffff; valaddr_reg:x3; val_offset:53961*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53961*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43400000; valaddr_reg:x3; val_offset:53964*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53964*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43600000; valaddr_reg:x3; val_offset:53967*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53967*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43700000; valaddr_reg:x3; val_offset:53970*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53970*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x43780000; valaddr_reg:x3; val_offset:53973*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53973*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437c0000; valaddr_reg:x3; val_offset:53976*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53976*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437e0000; valaddr_reg:x3; val_offset:53979*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53979*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437f0000; valaddr_reg:x3; val_offset:53982*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53982*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437f8000; valaddr_reg:x3; val_offset:53985*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53985*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437fc000; valaddr_reg:x3; val_offset:53988*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53988*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437fe000; valaddr_reg:x3; val_offset:53991*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53991*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437ff000; valaddr_reg:x3; val_offset:53994*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53994*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_17999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437ff800; valaddr_reg:x3; val_offset:53997*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 53997*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437ffc00; valaddr_reg:x3; val_offset:54000*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54000*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437ffe00; valaddr_reg:x3; val_offset:54003*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54003*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437fff00; valaddr_reg:x3; val_offset:54006*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54006*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437fff80; valaddr_reg:x3; val_offset:54009*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54009*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437fffc0; valaddr_reg:x3; val_offset:54012*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54012*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437fffe0; valaddr_reg:x3; val_offset:54015*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54015*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437ffff0; valaddr_reg:x3; val_offset:54018*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54018*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437ffff8; valaddr_reg:x3; val_offset:54021*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54021*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437ffffc; valaddr_reg:x3; val_offset:54024*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54024*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437ffffe; valaddr_reg:x3; val_offset:54027*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54027*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x349020 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5abd08 and fs3 == 0 and fe3 == 0x86 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb49020; op2val:0x5abd08; +op3val:0x437fffff; valaddr_reg:x3; val_offset:54030*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54030*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0800000; valaddr_reg:x3; val_offset:54033*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54033*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0800001; valaddr_reg:x3; val_offset:54036*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54036*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0800003; valaddr_reg:x3; val_offset:54039*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54039*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0800007; valaddr_reg:x3; val_offset:54042*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54042*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe080000f; valaddr_reg:x3; val_offset:54045*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54045*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe080001f; valaddr_reg:x3; val_offset:54048*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54048*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe080003f; valaddr_reg:x3; val_offset:54051*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54051*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe080007f; valaddr_reg:x3; val_offset:54054*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54054*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe08000ff; valaddr_reg:x3; val_offset:54057*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54057*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe08001ff; valaddr_reg:x3; val_offset:54060*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54060*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe08003ff; valaddr_reg:x3; val_offset:54063*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54063*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe08007ff; valaddr_reg:x3; val_offset:54066*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54066*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0800fff; valaddr_reg:x3; val_offset:54069*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54069*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0801fff; valaddr_reg:x3; val_offset:54072*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54072*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0803fff; valaddr_reg:x3; val_offset:54075*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54075*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0807fff; valaddr_reg:x3; val_offset:54078*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54078*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe080ffff; valaddr_reg:x3; val_offset:54081*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54081*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe081ffff; valaddr_reg:x3; val_offset:54084*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54084*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe083ffff; valaddr_reg:x3; val_offset:54087*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54087*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe087ffff; valaddr_reg:x3; val_offset:54090*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54090*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe08fffff; valaddr_reg:x3; val_offset:54093*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54093*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe09fffff; valaddr_reg:x3; val_offset:54096*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54096*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0bfffff; valaddr_reg:x3; val_offset:54099*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54099*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0c00000; valaddr_reg:x3; val_offset:54102*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54102*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0e00000; valaddr_reg:x3; val_offset:54105*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54105*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0f00000; valaddr_reg:x3; val_offset:54108*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54108*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0f80000; valaddr_reg:x3; val_offset:54111*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54111*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fc0000; valaddr_reg:x3; val_offset:54114*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54114*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fe0000; valaddr_reg:x3; val_offset:54117*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54117*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ff0000; valaddr_reg:x3; val_offset:54120*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54120*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ff8000; valaddr_reg:x3; val_offset:54123*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54123*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ffc000; valaddr_reg:x3; val_offset:54126*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54126*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ffe000; valaddr_reg:x3; val_offset:54129*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54129*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fff000; valaddr_reg:x3; val_offset:54132*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54132*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fff800; valaddr_reg:x3; val_offset:54135*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54135*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fffc00; valaddr_reg:x3; val_offset:54138*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54138*0 + 3*140*FLEN/8, x4, x1, x2) + +inst_18047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fffe00; valaddr_reg:x3; val_offset:54141*0 + 3*140*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54141*0 + 3*140*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209846271,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209977343,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(210239487,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(210763775,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(211812351,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(213909503,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(213909504,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(216006656,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217055232,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217579520,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217841664,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217972736,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218038272,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218071040,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218087424,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218095616,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218099712,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218101760,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218102784,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103296,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103552,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103680,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103744,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103776,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103792,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103800,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103804,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103806,32,FLEN) +NAN_BOXED(2125686396,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103807,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073472,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073473,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073475,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073479,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073487,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073503,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073535,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073599,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073727,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124073983,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124074495,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124075519,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124077567,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124081663,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124089855,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124106239,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124139007,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124204543,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124335615,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1124597759,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1125122047,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1126170623,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1128267775,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1128267776,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1130364928,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1131413504,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1131937792,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132199936,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132331008,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132396544,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132429312,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132445696,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132453888,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132457984,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132460032,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132461056,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132461568,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132461824,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132461952,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132462016,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132462048,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132462064,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132462072,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132462076,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132462078,32,FLEN) +NAN_BOXED(2125762592,32,FLEN) +NAN_BOXED(5946632,32,FLEN) +NAN_BOXED(1132462079,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766484992,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766484993,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766484995,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766484999,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766485007,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766485023,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766485055,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766485119,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766485247,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766485503,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766486015,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766487039,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766489087,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766493183,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766501375,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766517759,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766550527,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766616063,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3766747135,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3767009279,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3767533567,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3768582143,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3770679295,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3770679296,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3772776448,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3773825024,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774349312,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774611456,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774742528,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774808064,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774840832,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774857216,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774865408,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774869504,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774871552,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774872576,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873088,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-142.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-142.S new file mode 100644 index 000000000..f473d3c86 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-142.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_18048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ffff00; valaddr_reg:x3; val_offset:54144*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54144*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ffff80; valaddr_reg:x3; val_offset:54147*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54147*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ffffc0; valaddr_reg:x3; val_offset:54150*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54150*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ffffe0; valaddr_reg:x3; val_offset:54153*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54153*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fffff0; valaddr_reg:x3; val_offset:54156*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54156*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fffff8; valaddr_reg:x3; val_offset:54159*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54159*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fffffc; valaddr_reg:x3; val_offset:54162*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54162*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0fffffe; valaddr_reg:x3; val_offset:54165*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54165*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xc1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xe0ffffff; valaddr_reg:x3; val_offset:54168*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54168*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff000001; valaddr_reg:x3; val_offset:54171*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54171*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff000003; valaddr_reg:x3; val_offset:54174*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54174*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff000007; valaddr_reg:x3; val_offset:54177*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54177*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff199999; valaddr_reg:x3; val_offset:54180*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54180*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff249249; valaddr_reg:x3; val_offset:54183*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54183*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff333333; valaddr_reg:x3; val_offset:54186*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54186*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:54189*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54189*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:54192*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54192*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff444444; valaddr_reg:x3; val_offset:54195*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54195*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:54198*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54198*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:54201*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54201*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff666666; valaddr_reg:x3; val_offset:54204*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54204*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:54207*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54207*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:54210*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54210*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:54213*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54213*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d220 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3537d3 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d220; op2val:0xc03537d3; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:54216*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54216*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:54219*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54219*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:54222*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54222*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:54225*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54225*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:54228*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54228*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:54231*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54231*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:54234*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54234*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:54237*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54237*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:54240*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54240*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:54243*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54243*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:54246*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54246*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:54249*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54249*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:54252*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54252*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:54255*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54255*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:54258*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54258*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:54261*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54261*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:54264*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54264*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6000000; valaddr_reg:x3; val_offset:54267*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54267*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6000001; valaddr_reg:x3; val_offset:54270*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54270*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6000003; valaddr_reg:x3; val_offset:54273*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54273*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6000007; valaddr_reg:x3; val_offset:54276*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54276*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x600000f; valaddr_reg:x3; val_offset:54279*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54279*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x600001f; valaddr_reg:x3; val_offset:54282*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54282*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x600003f; valaddr_reg:x3; val_offset:54285*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54285*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x600007f; valaddr_reg:x3; val_offset:54288*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54288*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x60000ff; valaddr_reg:x3; val_offset:54291*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54291*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x60001ff; valaddr_reg:x3; val_offset:54294*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54294*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x60003ff; valaddr_reg:x3; val_offset:54297*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54297*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x60007ff; valaddr_reg:x3; val_offset:54300*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54300*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6000fff; valaddr_reg:x3; val_offset:54303*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54303*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6001fff; valaddr_reg:x3; val_offset:54306*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54306*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6003fff; valaddr_reg:x3; val_offset:54309*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54309*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6007fff; valaddr_reg:x3; val_offset:54312*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54312*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x600ffff; valaddr_reg:x3; val_offset:54315*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54315*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x601ffff; valaddr_reg:x3; val_offset:54318*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54318*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x603ffff; valaddr_reg:x3; val_offset:54321*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54321*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x607ffff; valaddr_reg:x3; val_offset:54324*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54324*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x60fffff; valaddr_reg:x3; val_offset:54327*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54327*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x61fffff; valaddr_reg:x3; val_offset:54330*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54330*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x63fffff; valaddr_reg:x3; val_offset:54333*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54333*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6400000; valaddr_reg:x3; val_offset:54336*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54336*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6600000; valaddr_reg:x3; val_offset:54339*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54339*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6700000; valaddr_reg:x3; val_offset:54342*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54342*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x6780000; valaddr_reg:x3; val_offset:54345*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54345*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67c0000; valaddr_reg:x3; val_offset:54348*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54348*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67e0000; valaddr_reg:x3; val_offset:54351*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54351*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67f0000; valaddr_reg:x3; val_offset:54354*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54354*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67f8000; valaddr_reg:x3; val_offset:54357*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54357*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67fc000; valaddr_reg:x3; val_offset:54360*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54360*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67fe000; valaddr_reg:x3; val_offset:54363*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54363*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67ff000; valaddr_reg:x3; val_offset:54366*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54366*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67ff800; valaddr_reg:x3; val_offset:54369*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54369*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67ffc00; valaddr_reg:x3; val_offset:54372*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54372*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67ffe00; valaddr_reg:x3; val_offset:54375*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54375*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67fff00; valaddr_reg:x3; val_offset:54378*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54378*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67fff80; valaddr_reg:x3; val_offset:54381*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54381*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67fffc0; valaddr_reg:x3; val_offset:54384*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54384*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67fffe0; valaddr_reg:x3; val_offset:54387*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54387*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67ffff0; valaddr_reg:x3; val_offset:54390*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54390*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67ffff8; valaddr_reg:x3; val_offset:54393*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54393*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67ffffc; valaddr_reg:x3; val_offset:54396*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54396*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67ffffe; valaddr_reg:x3; val_offset:54399*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54399*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x34d24a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb4d24a; op2val:0x0; +op3val:0x67fffff; valaddr_reg:x3; val_offset:54402*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54402*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef000000; valaddr_reg:x3; val_offset:54405*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54405*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef000001; valaddr_reg:x3; val_offset:54408*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54408*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef000003; valaddr_reg:x3; val_offset:54411*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54411*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef000007; valaddr_reg:x3; val_offset:54414*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54414*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef00000f; valaddr_reg:x3; val_offset:54417*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54417*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef00001f; valaddr_reg:x3; val_offset:54420*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54420*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef00003f; valaddr_reg:x3; val_offset:54423*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54423*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef00007f; valaddr_reg:x3; val_offset:54426*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54426*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef0000ff; valaddr_reg:x3; val_offset:54429*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54429*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef0001ff; valaddr_reg:x3; val_offset:54432*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54432*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef0003ff; valaddr_reg:x3; val_offset:54435*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54435*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef0007ff; valaddr_reg:x3; val_offset:54438*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54438*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef000fff; valaddr_reg:x3; val_offset:54441*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54441*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef001fff; valaddr_reg:x3; val_offset:54444*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54444*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef003fff; valaddr_reg:x3; val_offset:54447*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54447*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef007fff; valaddr_reg:x3; val_offset:54450*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54450*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef00ffff; valaddr_reg:x3; val_offset:54453*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54453*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef01ffff; valaddr_reg:x3; val_offset:54456*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54456*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef03ffff; valaddr_reg:x3; val_offset:54459*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54459*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef07ffff; valaddr_reg:x3; val_offset:54462*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54462*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef0fffff; valaddr_reg:x3; val_offset:54465*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54465*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef1fffff; valaddr_reg:x3; val_offset:54468*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54468*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef3fffff; valaddr_reg:x3; val_offset:54471*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54471*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef400000; valaddr_reg:x3; val_offset:54474*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54474*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef600000; valaddr_reg:x3; val_offset:54477*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54477*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef700000; valaddr_reg:x3; val_offset:54480*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54480*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef780000; valaddr_reg:x3; val_offset:54483*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54483*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7c0000; valaddr_reg:x3; val_offset:54486*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54486*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7e0000; valaddr_reg:x3; val_offset:54489*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54489*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7f0000; valaddr_reg:x3; val_offset:54492*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54492*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7f8000; valaddr_reg:x3; val_offset:54495*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54495*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7fc000; valaddr_reg:x3; val_offset:54498*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54498*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7fe000; valaddr_reg:x3; val_offset:54501*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54501*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7ff000; valaddr_reg:x3; val_offset:54504*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54504*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7ff800; valaddr_reg:x3; val_offset:54507*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54507*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7ffc00; valaddr_reg:x3; val_offset:54510*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54510*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7ffe00; valaddr_reg:x3; val_offset:54513*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54513*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7fff00; valaddr_reg:x3; val_offset:54516*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54516*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7fff80; valaddr_reg:x3; val_offset:54519*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54519*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7fffc0; valaddr_reg:x3; val_offset:54522*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54522*0 + 3*141*FLEN/8, x4, x1, x2) + +inst_18175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7fffe0; valaddr_reg:x3; val_offset:54525*0 + 3*141*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54525*0 + 3*141*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873344,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873472,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873536,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873568,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873584,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873592,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873596,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873598,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(3774873599,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2125779488,32,FLEN) +NAN_BOXED(3224713171,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663296,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663297,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663299,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663303,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663311,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663327,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663359,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663423,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663551,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663807,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100664319,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100665343,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100667391,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100671487,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100679679,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100696063,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100728831,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100794367,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100925439,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(101187583,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(101711871,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(102760447,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(104857599,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(104857600,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(106954752,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108003328,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108527616,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108789760,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108920832,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108986368,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109019136,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109035520,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109043712,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109047808,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109049856,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109050880,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051392,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051648,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051776,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051840,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051872,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051888,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051896,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051900,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051902,32,FLEN) +NAN_BOXED(2125779530,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051903,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754624,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754625,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754627,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754631,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754639,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754655,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754687,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754751,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009754879,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009755135,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009755647,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009756671,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009758719,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009762815,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009771007,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009787391,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009820159,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4009885695,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4010016767,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4010278911,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4010803199,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4011851775,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4013948927,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4013948928,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4016046080,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4017094656,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4017618944,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4017881088,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018012160,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018077696,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018110464,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018126848,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018135040,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018139136,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018141184,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018142208,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018142720,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018142976,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018143104,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018143168,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018143200,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-143.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-143.S new file mode 100644 index 000000000..7cab016fd --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-143.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_18176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7ffff0; valaddr_reg:x3; val_offset:54528*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54528*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7ffff8; valaddr_reg:x3; val_offset:54531*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54531*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7ffffc; valaddr_reg:x3; val_offset:54534*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54534*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7ffffe; valaddr_reg:x3; val_offset:54537*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54537*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xde and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xef7fffff; valaddr_reg:x3; val_offset:54540*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54540*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff000001; valaddr_reg:x3; val_offset:54543*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54543*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff000003; valaddr_reg:x3; val_offset:54546*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54546*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff000007; valaddr_reg:x3; val_offset:54549*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54549*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff199999; valaddr_reg:x3; val_offset:54552*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54552*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff249249; valaddr_reg:x3; val_offset:54555*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54555*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff333333; valaddr_reg:x3; val_offset:54558*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54558*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:54561*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54561*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:54564*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54564*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff444444; valaddr_reg:x3; val_offset:54567*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54567*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:54570*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54570*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:54573*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54573*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff666666; valaddr_reg:x3; val_offset:54576*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54576*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:54579*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54579*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:54582*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54582*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:54585*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54585*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3507ef and fs2 == 1 and fe2 == 0x80 and fm2 == 0x3501f5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb507ef; op2val:0xc03501f5; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:54588*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54588*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:54591*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54591*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:54594*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54594*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:54597*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54597*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:54600*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54600*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:54603*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54603*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:54606*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54606*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:54609*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54609*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:54612*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54612*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:54615*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54615*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:54618*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54618*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:54621*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54621*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:54624*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54624*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:54627*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54627*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:54630*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54630*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:54633*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54633*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:54636*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54636*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7800000; valaddr_reg:x3; val_offset:54639*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54639*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7800001; valaddr_reg:x3; val_offset:54642*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54642*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7800003; valaddr_reg:x3; val_offset:54645*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54645*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7800007; valaddr_reg:x3; val_offset:54648*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54648*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x780000f; valaddr_reg:x3; val_offset:54651*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54651*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x780001f; valaddr_reg:x3; val_offset:54654*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54654*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x780003f; valaddr_reg:x3; val_offset:54657*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54657*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x780007f; valaddr_reg:x3; val_offset:54660*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54660*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x78000ff; valaddr_reg:x3; val_offset:54663*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54663*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x78001ff; valaddr_reg:x3; val_offset:54666*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54666*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x78003ff; valaddr_reg:x3; val_offset:54669*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54669*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x78007ff; valaddr_reg:x3; val_offset:54672*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54672*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7800fff; valaddr_reg:x3; val_offset:54675*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54675*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7801fff; valaddr_reg:x3; val_offset:54678*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54678*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7803fff; valaddr_reg:x3; val_offset:54681*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54681*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7807fff; valaddr_reg:x3; val_offset:54684*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54684*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x780ffff; valaddr_reg:x3; val_offset:54687*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54687*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x781ffff; valaddr_reg:x3; val_offset:54690*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54690*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x783ffff; valaddr_reg:x3; val_offset:54693*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54693*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x787ffff; valaddr_reg:x3; val_offset:54696*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54696*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x78fffff; valaddr_reg:x3; val_offset:54699*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54699*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x79fffff; valaddr_reg:x3; val_offset:54702*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54702*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7bfffff; valaddr_reg:x3; val_offset:54705*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54705*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7c00000; valaddr_reg:x3; val_offset:54708*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54708*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7e00000; valaddr_reg:x3; val_offset:54711*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54711*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7f00000; valaddr_reg:x3; val_offset:54714*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54714*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7f80000; valaddr_reg:x3; val_offset:54717*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54717*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fc0000; valaddr_reg:x3; val_offset:54720*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54720*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fe0000; valaddr_reg:x3; val_offset:54723*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54723*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ff0000; valaddr_reg:x3; val_offset:54726*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54726*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ff8000; valaddr_reg:x3; val_offset:54729*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54729*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffc000; valaddr_reg:x3; val_offset:54732*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54732*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffe000; valaddr_reg:x3; val_offset:54735*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54735*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fff000; valaddr_reg:x3; val_offset:54738*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54738*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fff800; valaddr_reg:x3; val_offset:54741*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54741*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fffc00; valaddr_reg:x3; val_offset:54744*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54744*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fffe00; valaddr_reg:x3; val_offset:54747*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54747*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffff00; valaddr_reg:x3; val_offset:54750*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54750*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffff80; valaddr_reg:x3; val_offset:54753*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54753*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffffc0; valaddr_reg:x3; val_offset:54756*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54756*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffffe0; valaddr_reg:x3; val_offset:54759*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54759*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fffff0; valaddr_reg:x3; val_offset:54762*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54762*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fffff8; valaddr_reg:x3; val_offset:54765*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54765*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fffffc; valaddr_reg:x3; val_offset:54768*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54768*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7fffffe; valaddr_reg:x3; val_offset:54771*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54771*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36048d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6048d; op2val:0x0; +op3val:0x7ffffff; valaddr_reg:x3; val_offset:54774*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54774*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc800000; valaddr_reg:x3; val_offset:54777*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54777*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc800001; valaddr_reg:x3; val_offset:54780*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54780*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc800003; valaddr_reg:x3; val_offset:54783*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54783*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc800007; valaddr_reg:x3; val_offset:54786*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54786*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc80000f; valaddr_reg:x3; val_offset:54789*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54789*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc80001f; valaddr_reg:x3; val_offset:54792*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54792*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc80003f; valaddr_reg:x3; val_offset:54795*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54795*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc80007f; valaddr_reg:x3; val_offset:54798*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54798*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc8000ff; valaddr_reg:x3; val_offset:54801*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54801*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc8001ff; valaddr_reg:x3; val_offset:54804*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54804*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc8003ff; valaddr_reg:x3; val_offset:54807*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54807*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc8007ff; valaddr_reg:x3; val_offset:54810*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54810*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc800fff; valaddr_reg:x3; val_offset:54813*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54813*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc801fff; valaddr_reg:x3; val_offset:54816*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54816*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc803fff; valaddr_reg:x3; val_offset:54819*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54819*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc807fff; valaddr_reg:x3; val_offset:54822*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54822*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc80ffff; valaddr_reg:x3; val_offset:54825*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54825*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc81ffff; valaddr_reg:x3; val_offset:54828*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54828*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc83ffff; valaddr_reg:x3; val_offset:54831*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54831*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc87ffff; valaddr_reg:x3; val_offset:54834*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54834*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc8fffff; valaddr_reg:x3; val_offset:54837*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54837*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbc9fffff; valaddr_reg:x3; val_offset:54840*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54840*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcbfffff; valaddr_reg:x3; val_offset:54843*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54843*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcc00000; valaddr_reg:x3; val_offset:54846*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54846*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbce00000; valaddr_reg:x3; val_offset:54849*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54849*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcf00000; valaddr_reg:x3; val_offset:54852*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54852*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcf80000; valaddr_reg:x3; val_offset:54855*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54855*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfc0000; valaddr_reg:x3; val_offset:54858*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54858*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfe0000; valaddr_reg:x3; val_offset:54861*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54861*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcff0000; valaddr_reg:x3; val_offset:54864*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54864*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcff8000; valaddr_reg:x3; val_offset:54867*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54867*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcffc000; valaddr_reg:x3; val_offset:54870*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54870*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcffe000; valaddr_reg:x3; val_offset:54873*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54873*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfff000; valaddr_reg:x3; val_offset:54876*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54876*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfff800; valaddr_reg:x3; val_offset:54879*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54879*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfffc00; valaddr_reg:x3; val_offset:54882*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54882*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfffe00; valaddr_reg:x3; val_offset:54885*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54885*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcffff00; valaddr_reg:x3; val_offset:54888*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54888*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcffff80; valaddr_reg:x3; val_offset:54891*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54891*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcffffc0; valaddr_reg:x3; val_offset:54894*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54894*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcffffe0; valaddr_reg:x3; val_offset:54897*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54897*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfffff0; valaddr_reg:x3; val_offset:54900*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54900*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfffff8; valaddr_reg:x3; val_offset:54903*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54903*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfffffc; valaddr_reg:x3; val_offset:54906*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54906*0 + 3*142*FLEN/8, x4, x1, x2) + +inst_18303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcfffffe; valaddr_reg:x3; val_offset:54909*0 + 3*142*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54909*0 + 3*142*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018143216,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018143224,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018143228,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018143230,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4018143231,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2125793263,32,FLEN) +NAN_BOXED(3224699381,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829120,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829121,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829123,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829127,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829135,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829151,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829183,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829247,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829375,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829631,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125830143,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125831167,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125833215,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125837311,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125845503,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125861887,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125894655,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125960191,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126091263,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126353407,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126877695,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127926271,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(130023423,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(130023424,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(132120576,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133169152,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133693440,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133955584,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134086656,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134152192,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134184960,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134201344,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134209536,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134213632,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134215680,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134216704,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217216,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217472,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217600,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217664,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217696,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217712,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217720,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217724,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217726,32,FLEN) +NAN_BOXED(2125857933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217727,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505216,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505217,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505219,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505223,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505231,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505247,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505279,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505343,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505471,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162505727,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162506239,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162507263,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162509311,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162513407,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162521599,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162537983,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162570751,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162636287,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3162767359,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3163029503,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3163553791,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3164602367,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3166699519,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3166699520,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3168796672,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3169845248,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170369536,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170631680,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170762752,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170828288,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170861056,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170877440,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170885632,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170889728,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170891776,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170892800,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893312,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893568,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893696,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893760,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893792,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893808,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893816,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893820,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893822,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-144.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-144.S new file mode 100644 index 000000000..b0b7df6ee --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-144.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_18304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x79 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbcffffff; valaddr_reg:x3; val_offset:54912*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54912*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbf800001; valaddr_reg:x3; val_offset:54915*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54915*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbf800003; valaddr_reg:x3; val_offset:54918*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54918*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbf800007; valaddr_reg:x3; val_offset:54921*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54921*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbf999999; valaddr_reg:x3; val_offset:54924*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54924*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:54927*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54927*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:54930*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54930*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:54933*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54933*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:54936*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54936*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:54939*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54939*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:54942*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54942*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:54945*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54945*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:54948*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54948*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:54951*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54951*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:54954*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54954*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:54957*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54957*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x36a1eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x59b5d0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb6a1eb; op2val:0x8059b5d0; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:54960*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54960*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c000000; valaddr_reg:x3; val_offset:54963*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54963*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c000001; valaddr_reg:x3; val_offset:54966*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54966*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c000003; valaddr_reg:x3; val_offset:54969*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54969*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c000007; valaddr_reg:x3; val_offset:54972*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54972*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c00000f; valaddr_reg:x3; val_offset:54975*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54975*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c00001f; valaddr_reg:x3; val_offset:54978*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54978*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c00003f; valaddr_reg:x3; val_offset:54981*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54981*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c00007f; valaddr_reg:x3; val_offset:54984*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54984*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c0000ff; valaddr_reg:x3; val_offset:54987*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54987*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c0001ff; valaddr_reg:x3; val_offset:54990*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54990*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c0003ff; valaddr_reg:x3; val_offset:54993*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54993*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c0007ff; valaddr_reg:x3; val_offset:54996*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54996*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c000fff; valaddr_reg:x3; val_offset:54999*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 54999*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c001fff; valaddr_reg:x3; val_offset:55002*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55002*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c003fff; valaddr_reg:x3; val_offset:55005*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55005*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c007fff; valaddr_reg:x3; val_offset:55008*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55008*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c00ffff; valaddr_reg:x3; val_offset:55011*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55011*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c01ffff; valaddr_reg:x3; val_offset:55014*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55014*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c03ffff; valaddr_reg:x3; val_offset:55017*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55017*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c07ffff; valaddr_reg:x3; val_offset:55020*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55020*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c0fffff; valaddr_reg:x3; val_offset:55023*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55023*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c1fffff; valaddr_reg:x3; val_offset:55026*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55026*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c3fffff; valaddr_reg:x3; val_offset:55029*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55029*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c400000; valaddr_reg:x3; val_offset:55032*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55032*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c600000; valaddr_reg:x3; val_offset:55035*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55035*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c700000; valaddr_reg:x3; val_offset:55038*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55038*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c780000; valaddr_reg:x3; val_offset:55041*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55041*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7c0000; valaddr_reg:x3; val_offset:55044*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55044*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7e0000; valaddr_reg:x3; val_offset:55047*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55047*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7f0000; valaddr_reg:x3; val_offset:55050*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55050*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7f8000; valaddr_reg:x3; val_offset:55053*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55053*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7fc000; valaddr_reg:x3; val_offset:55056*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55056*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7fe000; valaddr_reg:x3; val_offset:55059*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55059*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7ff000; valaddr_reg:x3; val_offset:55062*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55062*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7ff800; valaddr_reg:x3; val_offset:55065*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55065*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7ffc00; valaddr_reg:x3; val_offset:55068*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55068*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7ffe00; valaddr_reg:x3; val_offset:55071*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55071*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7fff00; valaddr_reg:x3; val_offset:55074*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55074*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7fff80; valaddr_reg:x3; val_offset:55077*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55077*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7fffc0; valaddr_reg:x3; val_offset:55080*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55080*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7fffe0; valaddr_reg:x3; val_offset:55083*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55083*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7ffff0; valaddr_reg:x3; val_offset:55086*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55086*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7ffff8; valaddr_reg:x3; val_offset:55089*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55089*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7ffffc; valaddr_reg:x3; val_offset:55092*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55092*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7ffffe; valaddr_reg:x3; val_offset:55095*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55095*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xd8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x6c7fffff; valaddr_reg:x3; val_offset:55098*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55098*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f000001; valaddr_reg:x3; val_offset:55101*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55101*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f000003; valaddr_reg:x3; val_offset:55104*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55104*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f000007; valaddr_reg:x3; val_offset:55107*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55107*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f199999; valaddr_reg:x3; val_offset:55110*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55110*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f249249; valaddr_reg:x3; val_offset:55113*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55113*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f333333; valaddr_reg:x3; val_offset:55116*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55116*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:55119*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55119*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:55122*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55122*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f444444; valaddr_reg:x3; val_offset:55125*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55125*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:55128*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55128*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:55131*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55131*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f666666; valaddr_reg:x3; val_offset:55134*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55134*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:55137*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55137*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:55140*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55140*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:55143*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55143*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x370cea and fs2 == 0 and fe2 == 0x80 and fm2 == 0x3302c0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb70cea; op2val:0x403302c0; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:55146*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55146*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:55149*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55149*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:55152*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55152*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:55155*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55155*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:55158*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55158*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:55161*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55161*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:55164*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55164*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:55167*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55167*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:55170*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55170*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:55173*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55173*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:55176*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55176*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:55179*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55179*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:55182*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55182*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:55185*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55185*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:55188*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55188*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:55191*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55191*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:55194*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55194*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2000000; valaddr_reg:x3; val_offset:55197*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55197*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2000001; valaddr_reg:x3; val_offset:55200*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55200*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2000003; valaddr_reg:x3; val_offset:55203*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55203*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2000007; valaddr_reg:x3; val_offset:55206*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55206*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x200000f; valaddr_reg:x3; val_offset:55209*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55209*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x200001f; valaddr_reg:x3; val_offset:55212*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55212*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x200003f; valaddr_reg:x3; val_offset:55215*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55215*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x200007f; valaddr_reg:x3; val_offset:55218*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55218*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x20000ff; valaddr_reg:x3; val_offset:55221*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55221*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x20001ff; valaddr_reg:x3; val_offset:55224*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55224*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x20003ff; valaddr_reg:x3; val_offset:55227*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55227*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x20007ff; valaddr_reg:x3; val_offset:55230*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55230*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2000fff; valaddr_reg:x3; val_offset:55233*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55233*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2001fff; valaddr_reg:x3; val_offset:55236*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55236*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2003fff; valaddr_reg:x3; val_offset:55239*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55239*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2007fff; valaddr_reg:x3; val_offset:55242*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55242*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x200ffff; valaddr_reg:x3; val_offset:55245*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55245*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x201ffff; valaddr_reg:x3; val_offset:55248*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55248*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x203ffff; valaddr_reg:x3; val_offset:55251*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55251*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x207ffff; valaddr_reg:x3; val_offset:55254*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55254*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x20fffff; valaddr_reg:x3; val_offset:55257*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55257*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x21fffff; valaddr_reg:x3; val_offset:55260*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55260*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x23fffff; valaddr_reg:x3; val_offset:55263*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55263*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2400000; valaddr_reg:x3; val_offset:55266*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55266*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2600000; valaddr_reg:x3; val_offset:55269*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55269*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2700000; valaddr_reg:x3; val_offset:55272*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55272*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x2780000; valaddr_reg:x3; val_offset:55275*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55275*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27c0000; valaddr_reg:x3; val_offset:55278*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55278*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27e0000; valaddr_reg:x3; val_offset:55281*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55281*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27f0000; valaddr_reg:x3; val_offset:55284*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55284*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27f8000; valaddr_reg:x3; val_offset:55287*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55287*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27fc000; valaddr_reg:x3; val_offset:55290*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55290*0 + 3*143*FLEN/8, x4, x1, x2) + +inst_18431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27fe000; valaddr_reg:x3; val_offset:55293*0 + 3*143*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55293*0 + 3*143*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3170893823,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2125898219,32,FLEN) +NAN_BOXED(2153362896,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939328,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939329,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939331,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939335,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939343,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939359,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939391,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939455,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939583,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811939839,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811940351,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811941375,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811943423,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811947519,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811955711,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1811972095,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1812004863,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1812070399,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1812201471,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1812463615,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1812987903,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1814036479,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1816133631,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1816133632,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1818230784,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1819279360,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1819803648,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820065792,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820196864,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820262400,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820295168,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820311552,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820319744,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820323840,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820325888,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820326912,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327424,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327680,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327808,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327872,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327904,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327920,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327928,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327932,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327934,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(1820327935,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2125925610,32,FLEN) +NAN_BOXED(1077084864,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554432,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554433,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554435,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554439,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554447,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554463,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554495,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554559,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554687,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554943,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33555455,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33556479,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33558527,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33562623,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33570815,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33587199,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33619967,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33685503,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33816575,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(34078719,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(34603007,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(35651583,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(37748735,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(37748736,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(39845888,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(40894464,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41418752,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41680896,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41811968,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41877504,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41910272,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41926656,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41934848,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-145.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-145.S new file mode 100644 index 000000000..56c2d1b27 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-145.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_18432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27ff000; valaddr_reg:x3; val_offset:55296*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55296*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27ff800; valaddr_reg:x3; val_offset:55299*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55299*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27ffc00; valaddr_reg:x3; val_offset:55302*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55302*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27ffe00; valaddr_reg:x3; val_offset:55305*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55305*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27fff00; valaddr_reg:x3; val_offset:55308*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55308*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27fff80; valaddr_reg:x3; val_offset:55311*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55311*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27fffc0; valaddr_reg:x3; val_offset:55314*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55314*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27fffe0; valaddr_reg:x3; val_offset:55317*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55317*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27ffff0; valaddr_reg:x3; val_offset:55320*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55320*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27ffff8; valaddr_reg:x3; val_offset:55323*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55323*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27ffffc; valaddr_reg:x3; val_offset:55326*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55326*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27ffffe; valaddr_reg:x3; val_offset:55329*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55329*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3793aa and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb793aa; op2val:0x0; +op3val:0x27fffff; valaddr_reg:x3; val_offset:55332*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55332*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:55335*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55335*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:55338*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55338*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:55341*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55341*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:55344*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55344*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:55347*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55347*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:55350*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55350*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:55353*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55353*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:55356*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55356*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:55359*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55359*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:55362*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55362*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:55365*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55365*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:55368*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55368*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:55371*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55371*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:55374*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55374*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:55377*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55377*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:55380*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55380*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9800000; valaddr_reg:x3; val_offset:55383*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55383*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9800001; valaddr_reg:x3; val_offset:55386*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55386*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9800003; valaddr_reg:x3; val_offset:55389*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55389*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9800007; valaddr_reg:x3; val_offset:55392*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55392*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x980000f; valaddr_reg:x3; val_offset:55395*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55395*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x980001f; valaddr_reg:x3; val_offset:55398*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55398*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x980003f; valaddr_reg:x3; val_offset:55401*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55401*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x980007f; valaddr_reg:x3; val_offset:55404*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55404*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x98000ff; valaddr_reg:x3; val_offset:55407*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55407*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x98001ff; valaddr_reg:x3; val_offset:55410*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55410*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x98003ff; valaddr_reg:x3; val_offset:55413*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55413*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x98007ff; valaddr_reg:x3; val_offset:55416*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55416*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9800fff; valaddr_reg:x3; val_offset:55419*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55419*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9801fff; valaddr_reg:x3; val_offset:55422*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55422*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9803fff; valaddr_reg:x3; val_offset:55425*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55425*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9807fff; valaddr_reg:x3; val_offset:55428*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55428*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x980ffff; valaddr_reg:x3; val_offset:55431*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55431*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x981ffff; valaddr_reg:x3; val_offset:55434*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55434*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x983ffff; valaddr_reg:x3; val_offset:55437*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55437*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x987ffff; valaddr_reg:x3; val_offset:55440*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55440*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x98fffff; valaddr_reg:x3; val_offset:55443*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55443*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x99fffff; valaddr_reg:x3; val_offset:55446*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55446*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9bfffff; valaddr_reg:x3; val_offset:55449*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55449*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9c00000; valaddr_reg:x3; val_offset:55452*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55452*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9e00000; valaddr_reg:x3; val_offset:55455*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55455*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9f00000; valaddr_reg:x3; val_offset:55458*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55458*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9f80000; valaddr_reg:x3; val_offset:55461*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55461*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fc0000; valaddr_reg:x3; val_offset:55464*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55464*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fe0000; valaddr_reg:x3; val_offset:55467*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55467*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ff0000; valaddr_reg:x3; val_offset:55470*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55470*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ff8000; valaddr_reg:x3; val_offset:55473*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55473*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ffc000; valaddr_reg:x3; val_offset:55476*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55476*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ffe000; valaddr_reg:x3; val_offset:55479*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55479*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fff000; valaddr_reg:x3; val_offset:55482*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55482*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fff800; valaddr_reg:x3; val_offset:55485*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55485*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fffc00; valaddr_reg:x3; val_offset:55488*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55488*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fffe00; valaddr_reg:x3; val_offset:55491*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55491*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ffff00; valaddr_reg:x3; val_offset:55494*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55494*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ffff80; valaddr_reg:x3; val_offset:55497*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55497*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ffffc0; valaddr_reg:x3; val_offset:55500*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55500*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ffffe0; valaddr_reg:x3; val_offset:55503*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55503*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fffff0; valaddr_reg:x3; val_offset:55506*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55506*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fffff8; valaddr_reg:x3; val_offset:55509*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55509*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fffffc; valaddr_reg:x3; val_offset:55512*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55512*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9fffffe; valaddr_reg:x3; val_offset:55515*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55515*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x37f81e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb7f81e; op2val:0x0; +op3val:0x9ffffff; valaddr_reg:x3; val_offset:55518*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55518*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a000000; valaddr_reg:x3; val_offset:55521*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55521*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a000001; valaddr_reg:x3; val_offset:55524*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55524*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a000003; valaddr_reg:x3; val_offset:55527*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55527*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a000007; valaddr_reg:x3; val_offset:55530*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55530*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a00000f; valaddr_reg:x3; val_offset:55533*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55533*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a00001f; valaddr_reg:x3; val_offset:55536*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55536*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a00003f; valaddr_reg:x3; val_offset:55539*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55539*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a00007f; valaddr_reg:x3; val_offset:55542*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55542*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a0000ff; valaddr_reg:x3; val_offset:55545*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55545*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a0001ff; valaddr_reg:x3; val_offset:55548*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55548*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a0003ff; valaddr_reg:x3; val_offset:55551*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55551*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a0007ff; valaddr_reg:x3; val_offset:55554*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55554*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a000fff; valaddr_reg:x3; val_offset:55557*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55557*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a001fff; valaddr_reg:x3; val_offset:55560*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55560*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a003fff; valaddr_reg:x3; val_offset:55563*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55563*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a007fff; valaddr_reg:x3; val_offset:55566*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55566*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a00ffff; valaddr_reg:x3; val_offset:55569*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55569*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a01ffff; valaddr_reg:x3; val_offset:55572*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55572*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a03ffff; valaddr_reg:x3; val_offset:55575*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55575*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a07ffff; valaddr_reg:x3; val_offset:55578*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55578*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a0fffff; valaddr_reg:x3; val_offset:55581*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55581*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a1fffff; valaddr_reg:x3; val_offset:55584*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55584*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a3fffff; valaddr_reg:x3; val_offset:55587*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55587*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a400000; valaddr_reg:x3; val_offset:55590*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55590*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a600000; valaddr_reg:x3; val_offset:55593*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55593*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a700000; valaddr_reg:x3; val_offset:55596*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55596*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a780000; valaddr_reg:x3; val_offset:55599*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55599*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7c0000; valaddr_reg:x3; val_offset:55602*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55602*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7e0000; valaddr_reg:x3; val_offset:55605*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55605*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7f0000; valaddr_reg:x3; val_offset:55608*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55608*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7f8000; valaddr_reg:x3; val_offset:55611*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55611*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7fc000; valaddr_reg:x3; val_offset:55614*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55614*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7fe000; valaddr_reg:x3; val_offset:55617*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55617*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7ff000; valaddr_reg:x3; val_offset:55620*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55620*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7ff800; valaddr_reg:x3; val_offset:55623*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55623*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7ffc00; valaddr_reg:x3; val_offset:55626*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55626*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7ffe00; valaddr_reg:x3; val_offset:55629*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55629*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7fff00; valaddr_reg:x3; val_offset:55632*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55632*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7fff80; valaddr_reg:x3; val_offset:55635*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55635*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7fffc0; valaddr_reg:x3; val_offset:55638*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55638*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7fffe0; valaddr_reg:x3; val_offset:55641*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55641*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7ffff0; valaddr_reg:x3; val_offset:55644*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55644*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7ffff8; valaddr_reg:x3; val_offset:55647*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55647*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7ffffc; valaddr_reg:x3; val_offset:55650*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55650*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7ffffe; valaddr_reg:x3; val_offset:55653*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55653*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x74 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3a7fffff; valaddr_reg:x3; val_offset:55656*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55656*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3f800001; valaddr_reg:x3; val_offset:55659*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55659*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3f800003; valaddr_reg:x3; val_offset:55662*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55662*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3f800007; valaddr_reg:x3; val_offset:55665*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55665*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3f999999; valaddr_reg:x3; val_offset:55668*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55668*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:55671*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55671*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:55674*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55674*0 + 3*144*FLEN/8, x4, x1, x2) + +inst_18559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:55677*0 + 3*144*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55677*0 + 3*144*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41938944,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41940992,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942016,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942528,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942784,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942912,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942976,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943008,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943024,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943032,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943036,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943038,32,FLEN) +NAN_BOXED(2125960106,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943039,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383552,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383553,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383555,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383559,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383567,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383583,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383615,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383679,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383807,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159384063,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159384575,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159385599,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159387647,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159391743,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159399935,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159416319,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159449087,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159514623,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159645695,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159907839,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(160432127,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(161480703,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(163577855,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(163577856,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(165675008,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(166723584,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167247872,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167510016,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167641088,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167706624,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167739392,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167755776,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167763968,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167768064,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167770112,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771136,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771648,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771904,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772032,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772096,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772128,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772144,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772152,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772156,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772158,32,FLEN) +NAN_BOXED(2125985822,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772159,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078528,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078529,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078531,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078535,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078543,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078559,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078591,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078655,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973078783,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973079039,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973079551,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973080575,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973082623,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973086719,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973094911,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973111295,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973144063,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973209599,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973340671,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(973602815,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(974127103,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(975175679,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(977272831,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(977272832,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(979369984,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(980418560,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(980942848,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981204992,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981336064,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981401600,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981434368,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981450752,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981458944,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981463040,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981465088,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981466112,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981466624,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981466880,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981467008,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981467072,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981467104,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981467120,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981467128,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981467132,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981467134,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(981467135,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-146.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-146.S new file mode 100644 index 000000000..2559c7029 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-146.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_18560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:55680*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55680*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:55683*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55683*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:55686*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55686*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:55689*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55689*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:55692*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55692*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:55695*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55695*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:55698*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55698*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:55701*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55701*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x380695 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5907f1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb80695; op2val:0x5907f1; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:55704*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55704*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f000000; valaddr_reg:x3; val_offset:55707*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55707*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f000001; valaddr_reg:x3; val_offset:55710*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55710*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f000003; valaddr_reg:x3; val_offset:55713*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55713*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f000007; valaddr_reg:x3; val_offset:55716*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55716*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f00000f; valaddr_reg:x3; val_offset:55719*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55719*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f00001f; valaddr_reg:x3; val_offset:55722*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55722*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f00003f; valaddr_reg:x3; val_offset:55725*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55725*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f00007f; valaddr_reg:x3; val_offset:55728*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55728*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f0000ff; valaddr_reg:x3; val_offset:55731*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55731*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f0001ff; valaddr_reg:x3; val_offset:55734*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55734*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f0003ff; valaddr_reg:x3; val_offset:55737*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55737*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f0007ff; valaddr_reg:x3; val_offset:55740*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55740*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f000fff; valaddr_reg:x3; val_offset:55743*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55743*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f001fff; valaddr_reg:x3; val_offset:55746*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55746*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f003fff; valaddr_reg:x3; val_offset:55749*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55749*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f007fff; valaddr_reg:x3; val_offset:55752*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55752*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f00ffff; valaddr_reg:x3; val_offset:55755*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55755*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f01ffff; valaddr_reg:x3; val_offset:55758*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55758*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f03ffff; valaddr_reg:x3; val_offset:55761*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55761*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f07ffff; valaddr_reg:x3; val_offset:55764*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55764*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f0fffff; valaddr_reg:x3; val_offset:55767*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55767*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f1fffff; valaddr_reg:x3; val_offset:55770*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55770*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f3fffff; valaddr_reg:x3; val_offset:55773*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55773*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f400000; valaddr_reg:x3; val_offset:55776*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55776*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f600000; valaddr_reg:x3; val_offset:55779*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55779*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f700000; valaddr_reg:x3; val_offset:55782*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55782*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f780000; valaddr_reg:x3; val_offset:55785*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55785*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7c0000; valaddr_reg:x3; val_offset:55788*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55788*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7e0000; valaddr_reg:x3; val_offset:55791*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55791*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7f0000; valaddr_reg:x3; val_offset:55794*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55794*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7f8000; valaddr_reg:x3; val_offset:55797*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55797*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7fc000; valaddr_reg:x3; val_offset:55800*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55800*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7fe000; valaddr_reg:x3; val_offset:55803*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55803*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7ff000; valaddr_reg:x3; val_offset:55806*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55806*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7ff800; valaddr_reg:x3; val_offset:55809*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55809*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7ffc00; valaddr_reg:x3; val_offset:55812*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55812*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7ffe00; valaddr_reg:x3; val_offset:55815*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55815*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7fff00; valaddr_reg:x3; val_offset:55818*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55818*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7fff80; valaddr_reg:x3; val_offset:55821*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55821*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7fffc0; valaddr_reg:x3; val_offset:55824*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55824*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7fffe0; valaddr_reg:x3; val_offset:55827*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55827*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7ffff0; valaddr_reg:x3; val_offset:55830*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55830*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7ffff8; valaddr_reg:x3; val_offset:55833*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55833*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7ffffc; valaddr_reg:x3; val_offset:55836*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55836*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7ffffe; valaddr_reg:x3; val_offset:55839*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55839*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x3e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0x9f7fffff; valaddr_reg:x3; val_offset:55842*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55842*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbf800001; valaddr_reg:x3; val_offset:55845*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55845*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbf800003; valaddr_reg:x3; val_offset:55848*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55848*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbf800007; valaddr_reg:x3; val_offset:55851*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55851*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbf999999; valaddr_reg:x3; val_offset:55854*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55854*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:55857*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55857*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:55860*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55860*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:55863*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55863*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:55866*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55866*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:55869*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55869*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:55872*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55872*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:55875*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55875*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:55878*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55878*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:55881*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55881*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:55884*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55884*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:55887*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55887*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x390587 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x588d44 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb90587; op2val:0x80588d44; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:55890*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55890*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9000000; valaddr_reg:x3; val_offset:55893*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55893*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9000001; valaddr_reg:x3; val_offset:55896*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55896*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9000003; valaddr_reg:x3; val_offset:55899*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55899*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9000007; valaddr_reg:x3; val_offset:55902*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55902*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe900000f; valaddr_reg:x3; val_offset:55905*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55905*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe900001f; valaddr_reg:x3; val_offset:55908*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55908*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe900003f; valaddr_reg:x3; val_offset:55911*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55911*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe900007f; valaddr_reg:x3; val_offset:55914*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55914*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe90000ff; valaddr_reg:x3; val_offset:55917*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55917*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe90001ff; valaddr_reg:x3; val_offset:55920*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55920*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe90003ff; valaddr_reg:x3; val_offset:55923*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55923*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe90007ff; valaddr_reg:x3; val_offset:55926*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55926*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9000fff; valaddr_reg:x3; val_offset:55929*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55929*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9001fff; valaddr_reg:x3; val_offset:55932*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55932*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9003fff; valaddr_reg:x3; val_offset:55935*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55935*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9007fff; valaddr_reg:x3; val_offset:55938*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55938*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe900ffff; valaddr_reg:x3; val_offset:55941*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55941*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe901ffff; valaddr_reg:x3; val_offset:55944*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55944*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe903ffff; valaddr_reg:x3; val_offset:55947*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55947*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe907ffff; valaddr_reg:x3; val_offset:55950*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55950*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe90fffff; valaddr_reg:x3; val_offset:55953*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55953*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe91fffff; valaddr_reg:x3; val_offset:55956*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55956*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe93fffff; valaddr_reg:x3; val_offset:55959*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55959*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9400000; valaddr_reg:x3; val_offset:55962*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55962*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9600000; valaddr_reg:x3; val_offset:55965*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55965*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9700000; valaddr_reg:x3; val_offset:55968*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55968*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe9780000; valaddr_reg:x3; val_offset:55971*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55971*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97c0000; valaddr_reg:x3; val_offset:55974*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55974*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97e0000; valaddr_reg:x3; val_offset:55977*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55977*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97f0000; valaddr_reg:x3; val_offset:55980*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55980*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97f8000; valaddr_reg:x3; val_offset:55983*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55983*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97fc000; valaddr_reg:x3; val_offset:55986*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55986*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97fe000; valaddr_reg:x3; val_offset:55989*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55989*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97ff000; valaddr_reg:x3; val_offset:55992*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55992*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97ff800; valaddr_reg:x3; val_offset:55995*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55995*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97ffc00; valaddr_reg:x3; val_offset:55998*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 55998*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97ffe00; valaddr_reg:x3; val_offset:56001*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56001*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97fff00; valaddr_reg:x3; val_offset:56004*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56004*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97fff80; valaddr_reg:x3; val_offset:56007*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56007*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97fffc0; valaddr_reg:x3; val_offset:56010*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56010*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97fffe0; valaddr_reg:x3; val_offset:56013*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56013*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97ffff0; valaddr_reg:x3; val_offset:56016*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56016*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97ffff8; valaddr_reg:x3; val_offset:56019*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56019*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97ffffc; valaddr_reg:x3; val_offset:56022*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56022*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97ffffe; valaddr_reg:x3; val_offset:56025*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56025*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xd2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xe97fffff; valaddr_reg:x3; val_offset:56028*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56028*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff000001; valaddr_reg:x3; val_offset:56031*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56031*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff000003; valaddr_reg:x3; val_offset:56034*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56034*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff000007; valaddr_reg:x3; val_offset:56037*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56037*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff199999; valaddr_reg:x3; val_offset:56040*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56040*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff249249; valaddr_reg:x3; val_offset:56043*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56043*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff333333; valaddr_reg:x3; val_offset:56046*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56046*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:56049*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56049*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:56052*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56052*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff444444; valaddr_reg:x3; val_offset:56055*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56055*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:56058*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56058*0 + 3*145*FLEN/8, x4, x1, x2) + +inst_18687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:56061*0 + 3*145*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56061*0 + 3*145*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2125989525,32,FLEN) +NAN_BOXED(5834737,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577344,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577345,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577347,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577351,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577359,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577375,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577407,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577471,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577599,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667577855,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667578367,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667579391,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667581439,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667585535,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667593727,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667610111,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667642879,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667708415,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2667839487,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2668101631,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2668625919,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2669674495,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2671771647,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2671771648,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2673868800,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2674917376,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675441664,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675703808,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675834880,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675900416,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675933184,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675949568,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675957760,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675961856,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675963904,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675964928,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965440,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965696,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965824,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965888,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965920,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965936,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965944,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965948,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965950,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(2675965951,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2126054791,32,FLEN) +NAN_BOXED(2153286980,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091328,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091329,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091331,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091335,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091343,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091359,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091391,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091455,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091583,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909091839,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909092351,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909093375,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909095423,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909099519,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909107711,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909124095,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909156863,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909222399,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909353471,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3909615615,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3910139903,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3911188479,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3913285631,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3913285632,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3915382784,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3916431360,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3916955648,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917217792,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917348864,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917414400,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917447168,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917463552,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917471744,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917475840,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917477888,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917478912,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479424,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479680,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479808,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479872,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479904,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479920,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479928,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479932,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479934,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(3917479935,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-147.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-147.S new file mode 100644 index 000000000..5214b7cd5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-147.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_18688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff666666; valaddr_reg:x3; val_offset:56064*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56064*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:56067*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56067*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:56070*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56070*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:56073*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56073*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x399523 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x30917b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eb99523; op2val:0xc030917b; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:56076*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56076*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:56079*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56079*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:56082*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56082*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:56085*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56085*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:56088*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56088*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:56091*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56091*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:56094*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56094*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:56097*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56097*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:56100*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56100*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:56103*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56103*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:56106*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56106*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:56109*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56109*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:56112*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56112*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:56115*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56115*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:56118*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56118*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:56121*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56121*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:56124*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56124*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1000000; valaddr_reg:x3; val_offset:56127*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56127*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1000001; valaddr_reg:x3; val_offset:56130*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56130*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1000003; valaddr_reg:x3; val_offset:56133*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56133*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1000007; valaddr_reg:x3; val_offset:56136*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56136*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x100000f; valaddr_reg:x3; val_offset:56139*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56139*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x100001f; valaddr_reg:x3; val_offset:56142*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56142*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x100003f; valaddr_reg:x3; val_offset:56145*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56145*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x100007f; valaddr_reg:x3; val_offset:56148*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56148*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x10000ff; valaddr_reg:x3; val_offset:56151*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56151*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x10001ff; valaddr_reg:x3; val_offset:56154*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56154*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x10003ff; valaddr_reg:x3; val_offset:56157*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56157*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x10007ff; valaddr_reg:x3; val_offset:56160*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56160*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1000fff; valaddr_reg:x3; val_offset:56163*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56163*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1001fff; valaddr_reg:x3; val_offset:56166*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56166*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1003fff; valaddr_reg:x3; val_offset:56169*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56169*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1007fff; valaddr_reg:x3; val_offset:56172*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56172*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x100ffff; valaddr_reg:x3; val_offset:56175*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56175*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x101ffff; valaddr_reg:x3; val_offset:56178*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56178*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x103ffff; valaddr_reg:x3; val_offset:56181*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56181*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x107ffff; valaddr_reg:x3; val_offset:56184*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56184*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x10fffff; valaddr_reg:x3; val_offset:56187*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56187*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x11fffff; valaddr_reg:x3; val_offset:56190*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56190*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x13fffff; valaddr_reg:x3; val_offset:56193*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56193*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1400000; valaddr_reg:x3; val_offset:56196*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56196*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1600000; valaddr_reg:x3; val_offset:56199*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56199*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1700000; valaddr_reg:x3; val_offset:56202*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56202*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x1780000; valaddr_reg:x3; val_offset:56205*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56205*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17c0000; valaddr_reg:x3; val_offset:56208*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56208*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17e0000; valaddr_reg:x3; val_offset:56211*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56211*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17f0000; valaddr_reg:x3; val_offset:56214*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56214*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17f8000; valaddr_reg:x3; val_offset:56217*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56217*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17fc000; valaddr_reg:x3; val_offset:56220*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56220*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17fe000; valaddr_reg:x3; val_offset:56223*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56223*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17ff000; valaddr_reg:x3; val_offset:56226*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56226*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17ff800; valaddr_reg:x3; val_offset:56229*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56229*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17ffc00; valaddr_reg:x3; val_offset:56232*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56232*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17ffe00; valaddr_reg:x3; val_offset:56235*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56235*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17fff00; valaddr_reg:x3; val_offset:56238*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56238*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17fff80; valaddr_reg:x3; val_offset:56241*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56241*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17fffc0; valaddr_reg:x3; val_offset:56244*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56244*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17fffe0; valaddr_reg:x3; val_offset:56247*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56247*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17ffff0; valaddr_reg:x3; val_offset:56250*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56250*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17ffff8; valaddr_reg:x3; val_offset:56253*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56253*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17ffffc; valaddr_reg:x3; val_offset:56256*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56256*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17ffffe; valaddr_reg:x3; val_offset:56259*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56259*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3a98a2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eba98a2; op2val:0x0; +op3val:0x17fffff; valaddr_reg:x3; val_offset:56262*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56262*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:56265*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56265*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:56268*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56268*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:56271*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56271*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:56274*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56274*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:56277*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56277*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:56280*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56280*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:56283*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56283*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:56286*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56286*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:56289*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56289*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:56292*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56292*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:56295*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56295*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:56298*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56298*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:56301*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56301*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:56304*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56304*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:56307*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56307*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:56310*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56310*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86800000; valaddr_reg:x3; val_offset:56313*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56313*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86800001; valaddr_reg:x3; val_offset:56316*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56316*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86800003; valaddr_reg:x3; val_offset:56319*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56319*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86800007; valaddr_reg:x3; val_offset:56322*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56322*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x8680000f; valaddr_reg:x3; val_offset:56325*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56325*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x8680001f; valaddr_reg:x3; val_offset:56328*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56328*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x8680003f; valaddr_reg:x3; val_offset:56331*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56331*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x8680007f; valaddr_reg:x3; val_offset:56334*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56334*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x868000ff; valaddr_reg:x3; val_offset:56337*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56337*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x868001ff; valaddr_reg:x3; val_offset:56340*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56340*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x868003ff; valaddr_reg:x3; val_offset:56343*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56343*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x868007ff; valaddr_reg:x3; val_offset:56346*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56346*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86800fff; valaddr_reg:x3; val_offset:56349*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56349*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86801fff; valaddr_reg:x3; val_offset:56352*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56352*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86803fff; valaddr_reg:x3; val_offset:56355*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56355*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86807fff; valaddr_reg:x3; val_offset:56358*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56358*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x8680ffff; valaddr_reg:x3; val_offset:56361*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56361*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x8681ffff; valaddr_reg:x3; val_offset:56364*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56364*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x8683ffff; valaddr_reg:x3; val_offset:56367*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56367*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x8687ffff; valaddr_reg:x3; val_offset:56370*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56370*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x868fffff; valaddr_reg:x3; val_offset:56373*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56373*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x869fffff; valaddr_reg:x3; val_offset:56376*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56376*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86bfffff; valaddr_reg:x3; val_offset:56379*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56379*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86c00000; valaddr_reg:x3; val_offset:56382*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56382*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86e00000; valaddr_reg:x3; val_offset:56385*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56385*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86f00000; valaddr_reg:x3; val_offset:56388*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56388*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86f80000; valaddr_reg:x3; val_offset:56391*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56391*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fc0000; valaddr_reg:x3; val_offset:56394*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56394*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fe0000; valaddr_reg:x3; val_offset:56397*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56397*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ff0000; valaddr_reg:x3; val_offset:56400*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56400*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ff8000; valaddr_reg:x3; val_offset:56403*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56403*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ffc000; valaddr_reg:x3; val_offset:56406*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56406*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ffe000; valaddr_reg:x3; val_offset:56409*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56409*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fff000; valaddr_reg:x3; val_offset:56412*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56412*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fff800; valaddr_reg:x3; val_offset:56415*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56415*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fffc00; valaddr_reg:x3; val_offset:56418*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56418*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fffe00; valaddr_reg:x3; val_offset:56421*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56421*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ffff00; valaddr_reg:x3; val_offset:56424*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56424*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ffff80; valaddr_reg:x3; val_offset:56427*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56427*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ffffc0; valaddr_reg:x3; val_offset:56430*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56430*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ffffe0; valaddr_reg:x3; val_offset:56433*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56433*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fffff0; valaddr_reg:x3; val_offset:56436*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56436*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fffff8; valaddr_reg:x3; val_offset:56439*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56439*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fffffc; valaddr_reg:x3; val_offset:56442*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56442*0 + 3*146*FLEN/8, x4, x1, x2) + +inst_18815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86fffffe; valaddr_reg:x3; val_offset:56445*0 + 3*146*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56445*0 + 3*146*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2126091555,32,FLEN) +NAN_BOXED(3224408443,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777216,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777217,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777219,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777223,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777231,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777247,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777279,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777343,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777471,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777727,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16778239,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16779263,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16781311,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16785407,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16793599,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16809983,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16842751,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16908287,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17039359,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17301503,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17825791,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(18874367,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(20971519,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(20971520,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(23068672,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24117248,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24641536,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24903680,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25034752,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25100288,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25133056,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25149440,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25157632,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25161728,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25163776,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25164800,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165312,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165568,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165696,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165760,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165792,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165808,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165816,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165820,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165822,32,FLEN) +NAN_BOXED(2126157986,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165823,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535552,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535553,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535555,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535559,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535567,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535583,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535615,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535679,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535807,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256536063,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256536575,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256537599,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256539647,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256543743,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256551935,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256568319,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256601087,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256666623,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256797695,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2257059839,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2257584127,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2258632703,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2260729855,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2260729856,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2262827008,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2263875584,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264399872,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264662016,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264793088,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264858624,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264891392,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264907776,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264915968,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264920064,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264922112,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923136,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923648,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923904,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924032,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924096,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924128,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924144,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924152,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924156,32,FLEN) +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924158,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-148.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-148.S new file mode 100644 index 000000000..7491f52ac --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-148.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_18816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3aaff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebaaff8; op2val:0x80000000; +op3val:0x86ffffff; valaddr_reg:x3; val_offset:56448*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56448*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:56451*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56451*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:56454*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56454*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:56457*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56457*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:56460*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56460*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:56463*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56463*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:56466*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56466*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:56469*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56469*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:56472*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56472*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:56475*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56475*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:56478*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56478*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:56481*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56481*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:56484*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56484*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:56487*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56487*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:56490*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56490*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:56493*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56493*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:56496*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56496*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f800000; valaddr_reg:x3; val_offset:56499*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56499*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f800001; valaddr_reg:x3; val_offset:56502*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56502*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f800003; valaddr_reg:x3; val_offset:56505*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56505*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f800007; valaddr_reg:x3; val_offset:56508*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56508*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f80000f; valaddr_reg:x3; val_offset:56511*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56511*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f80001f; valaddr_reg:x3; val_offset:56514*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56514*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f80003f; valaddr_reg:x3; val_offset:56517*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56517*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f80007f; valaddr_reg:x3; val_offset:56520*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56520*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f8000ff; valaddr_reg:x3; val_offset:56523*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56523*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f8001ff; valaddr_reg:x3; val_offset:56526*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56526*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f8003ff; valaddr_reg:x3; val_offset:56529*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56529*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f8007ff; valaddr_reg:x3; val_offset:56532*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56532*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f800fff; valaddr_reg:x3; val_offset:56535*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56535*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f801fff; valaddr_reg:x3; val_offset:56538*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56538*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f803fff; valaddr_reg:x3; val_offset:56541*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56541*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f807fff; valaddr_reg:x3; val_offset:56544*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56544*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f80ffff; valaddr_reg:x3; val_offset:56547*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56547*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f81ffff; valaddr_reg:x3; val_offset:56550*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56550*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f83ffff; valaddr_reg:x3; val_offset:56553*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56553*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f87ffff; valaddr_reg:x3; val_offset:56556*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56556*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f8fffff; valaddr_reg:x3; val_offset:56559*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56559*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8f9fffff; valaddr_reg:x3; val_offset:56562*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56562*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fbfffff; valaddr_reg:x3; val_offset:56565*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56565*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fc00000; valaddr_reg:x3; val_offset:56568*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56568*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fe00000; valaddr_reg:x3; val_offset:56571*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56571*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ff00000; valaddr_reg:x3; val_offset:56574*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56574*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ff80000; valaddr_reg:x3; val_offset:56577*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56577*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffc0000; valaddr_reg:x3; val_offset:56580*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56580*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffe0000; valaddr_reg:x3; val_offset:56583*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56583*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fff0000; valaddr_reg:x3; val_offset:56586*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56586*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fff8000; valaddr_reg:x3; val_offset:56589*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56589*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fffc000; valaddr_reg:x3; val_offset:56592*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56592*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fffe000; valaddr_reg:x3; val_offset:56595*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56595*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffff000; valaddr_reg:x3; val_offset:56598*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56598*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffff800; valaddr_reg:x3; val_offset:56601*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56601*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffffc00; valaddr_reg:x3; val_offset:56604*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56604*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffffe00; valaddr_reg:x3; val_offset:56607*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56607*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fffff00; valaddr_reg:x3; val_offset:56610*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56610*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fffff80; valaddr_reg:x3; val_offset:56613*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56613*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fffffc0; valaddr_reg:x3; val_offset:56616*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56616*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fffffe0; valaddr_reg:x3; val_offset:56619*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56619*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffffff0; valaddr_reg:x3; val_offset:56622*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56622*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffffff8; valaddr_reg:x3; val_offset:56625*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56625*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffffffc; valaddr_reg:x3; val_offset:56628*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56628*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8ffffffe; valaddr_reg:x3; val_offset:56631*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56631*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3b5aa8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebb5aa8; op2val:0x80000000; +op3val:0x8fffffff; valaddr_reg:x3; val_offset:56634*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56634*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:56637*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56637*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:56640*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56640*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:56643*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56643*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:56646*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56646*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:56649*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56649*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:56652*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56652*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:56655*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56655*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:56658*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56658*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:56661*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56661*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:56664*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56664*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:56667*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56667*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:56670*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56670*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:56673*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56673*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:56676*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56676*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:56679*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56679*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:56682*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56682*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb000000; valaddr_reg:x3; val_offset:56685*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56685*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb000001; valaddr_reg:x3; val_offset:56688*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56688*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb000003; valaddr_reg:x3; val_offset:56691*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56691*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb000007; valaddr_reg:x3; val_offset:56694*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56694*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb00000f; valaddr_reg:x3; val_offset:56697*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56697*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb00001f; valaddr_reg:x3; val_offset:56700*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56700*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb00003f; valaddr_reg:x3; val_offset:56703*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56703*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb00007f; valaddr_reg:x3; val_offset:56706*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56706*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb0000ff; valaddr_reg:x3; val_offset:56709*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56709*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb0001ff; valaddr_reg:x3; val_offset:56712*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56712*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb0003ff; valaddr_reg:x3; val_offset:56715*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56715*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb0007ff; valaddr_reg:x3; val_offset:56718*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56718*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb000fff; valaddr_reg:x3; val_offset:56721*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56721*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb001fff; valaddr_reg:x3; val_offset:56724*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56724*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb003fff; valaddr_reg:x3; val_offset:56727*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56727*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb007fff; valaddr_reg:x3; val_offset:56730*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56730*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb00ffff; valaddr_reg:x3; val_offset:56733*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56733*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb01ffff; valaddr_reg:x3; val_offset:56736*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56736*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb03ffff; valaddr_reg:x3; val_offset:56739*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56739*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb07ffff; valaddr_reg:x3; val_offset:56742*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56742*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb0fffff; valaddr_reg:x3; val_offset:56745*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56745*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb1fffff; valaddr_reg:x3; val_offset:56748*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56748*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb3fffff; valaddr_reg:x3; val_offset:56751*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56751*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb400000; valaddr_reg:x3; val_offset:56754*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56754*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb600000; valaddr_reg:x3; val_offset:56757*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56757*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb700000; valaddr_reg:x3; val_offset:56760*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56760*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb780000; valaddr_reg:x3; val_offset:56763*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56763*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7c0000; valaddr_reg:x3; val_offset:56766*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56766*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7e0000; valaddr_reg:x3; val_offset:56769*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56769*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7f0000; valaddr_reg:x3; val_offset:56772*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56772*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7f8000; valaddr_reg:x3; val_offset:56775*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56775*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7fc000; valaddr_reg:x3; val_offset:56778*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56778*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7fe000; valaddr_reg:x3; val_offset:56781*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56781*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7ff000; valaddr_reg:x3; val_offset:56784*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56784*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7ff800; valaddr_reg:x3; val_offset:56787*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56787*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7ffc00; valaddr_reg:x3; val_offset:56790*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56790*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7ffe00; valaddr_reg:x3; val_offset:56793*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56793*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7fff00; valaddr_reg:x3; val_offset:56796*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56796*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7fff80; valaddr_reg:x3; val_offset:56799*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56799*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7fffc0; valaddr_reg:x3; val_offset:56802*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56802*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7fffe0; valaddr_reg:x3; val_offset:56805*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56805*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7ffff0; valaddr_reg:x3; val_offset:56808*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56808*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7ffff8; valaddr_reg:x3; val_offset:56811*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56811*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7ffffc; valaddr_reg:x3; val_offset:56814*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56814*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7ffffe; valaddr_reg:x3; val_offset:56817*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56817*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3c4862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebc4862; op2val:0x0; +op3val:0xb7fffff; valaddr_reg:x3; val_offset:56820*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56820*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:56823*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56823*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:56826*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56826*0 + 3*147*FLEN/8, x4, x1, x2) + +inst_18943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:56829*0 + 3*147*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56829*0 + 3*147*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126163960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924159,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530496,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530497,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530499,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530503,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530511,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530527,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530559,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530623,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530751,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407531007,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407531519,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407532543,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407534591,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407538687,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407546879,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407563263,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407596031,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407661567,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407792639,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2408054783,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2408579071,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2409627647,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2411724799,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2411724800,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2413821952,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2414870528,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415394816,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415656960,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415788032,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415853568,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415886336,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415902720,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415910912,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415915008,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415917056,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918080,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918592,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918848,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918976,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919040,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919072,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919088,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919096,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919100,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919102,32,FLEN) +NAN_BOXED(2126207656,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919103,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549376,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549377,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549379,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549383,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549391,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549407,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549439,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549503,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549631,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549887,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184550399,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184551423,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184553471,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184557567,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184565759,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184582143,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184614911,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184680447,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184811519,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(185073663,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(185597951,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(186646527,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(188743679,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(188743680,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(190840832,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(191889408,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192413696,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192675840,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192806912,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192872448,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192905216,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192921600,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192929792,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192933888,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192935936,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192936960,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937472,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937728,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937856,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937920,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937952,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937968,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937976,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937980,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937982,32,FLEN) +NAN_BOXED(2126268514,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937983,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-149.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-149.S new file mode 100644 index 000000000..a1e63fe0c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-149.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_18944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:56832*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56832*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:56835*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56835*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:56838*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56838*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:56841*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56841*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:56844*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56844*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:56847*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56847*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:56850*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56850*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:56853*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56853*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:56856*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56856*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:56859*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56859*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:56862*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56862*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:56865*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56865*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:56868*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56868*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1000000; valaddr_reg:x3; val_offset:56871*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56871*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1000001; valaddr_reg:x3; val_offset:56874*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56874*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1000003; valaddr_reg:x3; val_offset:56877*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56877*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1000007; valaddr_reg:x3; val_offset:56880*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56880*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x100000f; valaddr_reg:x3; val_offset:56883*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56883*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x100001f; valaddr_reg:x3; val_offset:56886*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56886*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x100003f; valaddr_reg:x3; val_offset:56889*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56889*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x100007f; valaddr_reg:x3; val_offset:56892*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56892*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x10000ff; valaddr_reg:x3; val_offset:56895*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56895*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x10001ff; valaddr_reg:x3; val_offset:56898*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56898*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x10003ff; valaddr_reg:x3; val_offset:56901*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56901*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x10007ff; valaddr_reg:x3; val_offset:56904*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56904*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1000fff; valaddr_reg:x3; val_offset:56907*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56907*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1001fff; valaddr_reg:x3; val_offset:56910*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56910*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1003fff; valaddr_reg:x3; val_offset:56913*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56913*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1007fff; valaddr_reg:x3; val_offset:56916*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56916*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x100ffff; valaddr_reg:x3; val_offset:56919*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56919*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x101ffff; valaddr_reg:x3; val_offset:56922*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56922*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x103ffff; valaddr_reg:x3; val_offset:56925*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56925*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x107ffff; valaddr_reg:x3; val_offset:56928*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56928*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x10fffff; valaddr_reg:x3; val_offset:56931*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56931*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x11fffff; valaddr_reg:x3; val_offset:56934*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56934*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x13fffff; valaddr_reg:x3; val_offset:56937*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56937*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1400000; valaddr_reg:x3; val_offset:56940*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56940*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1600000; valaddr_reg:x3; val_offset:56943*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56943*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1700000; valaddr_reg:x3; val_offset:56946*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56946*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x1780000; valaddr_reg:x3; val_offset:56949*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56949*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17c0000; valaddr_reg:x3; val_offset:56952*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56952*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17e0000; valaddr_reg:x3; val_offset:56955*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56955*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17f0000; valaddr_reg:x3; val_offset:56958*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56958*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17f8000; valaddr_reg:x3; val_offset:56961*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56961*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17fc000; valaddr_reg:x3; val_offset:56964*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56964*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17fe000; valaddr_reg:x3; val_offset:56967*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56967*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17ff000; valaddr_reg:x3; val_offset:56970*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56970*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17ff800; valaddr_reg:x3; val_offset:56973*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56973*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17ffc00; valaddr_reg:x3; val_offset:56976*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56976*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17ffe00; valaddr_reg:x3; val_offset:56979*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56979*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17fff00; valaddr_reg:x3; val_offset:56982*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56982*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17fff80; valaddr_reg:x3; val_offset:56985*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56985*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17fffc0; valaddr_reg:x3; val_offset:56988*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56988*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17fffe0; valaddr_reg:x3; val_offset:56991*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56991*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17ffff0; valaddr_reg:x3; val_offset:56994*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56994*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_18999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17ffff8; valaddr_reg:x3; val_offset:56997*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 56997*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17ffffc; valaddr_reg:x3; val_offset:57000*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57000*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17ffffe; valaddr_reg:x3; val_offset:57003*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57003*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3cdcf2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebcdcf2; op2val:0x0; +op3val:0x17fffff; valaddr_reg:x3; val_offset:57006*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57006*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28000000; valaddr_reg:x3; val_offset:57009*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57009*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28000001; valaddr_reg:x3; val_offset:57012*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57012*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28000003; valaddr_reg:x3; val_offset:57015*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57015*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28000007; valaddr_reg:x3; val_offset:57018*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57018*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x2800000f; valaddr_reg:x3; val_offset:57021*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57021*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x2800001f; valaddr_reg:x3; val_offset:57024*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57024*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x2800003f; valaddr_reg:x3; val_offset:57027*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57027*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x2800007f; valaddr_reg:x3; val_offset:57030*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57030*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x280000ff; valaddr_reg:x3; val_offset:57033*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57033*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x280001ff; valaddr_reg:x3; val_offset:57036*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57036*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x280003ff; valaddr_reg:x3; val_offset:57039*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57039*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x280007ff; valaddr_reg:x3; val_offset:57042*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57042*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28000fff; valaddr_reg:x3; val_offset:57045*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57045*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28001fff; valaddr_reg:x3; val_offset:57048*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57048*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28003fff; valaddr_reg:x3; val_offset:57051*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57051*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28007fff; valaddr_reg:x3; val_offset:57054*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57054*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x2800ffff; valaddr_reg:x3; val_offset:57057*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57057*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x2801ffff; valaddr_reg:x3; val_offset:57060*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57060*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x2803ffff; valaddr_reg:x3; val_offset:57063*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57063*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x2807ffff; valaddr_reg:x3; val_offset:57066*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57066*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x280fffff; valaddr_reg:x3; val_offset:57069*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57069*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x281fffff; valaddr_reg:x3; val_offset:57072*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57072*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x283fffff; valaddr_reg:x3; val_offset:57075*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57075*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28400000; valaddr_reg:x3; val_offset:57078*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57078*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28600000; valaddr_reg:x3; val_offset:57081*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57081*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28700000; valaddr_reg:x3; val_offset:57084*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57084*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x28780000; valaddr_reg:x3; val_offset:57087*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57087*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287c0000; valaddr_reg:x3; val_offset:57090*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57090*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287e0000; valaddr_reg:x3; val_offset:57093*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57093*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287f0000; valaddr_reg:x3; val_offset:57096*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57096*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287f8000; valaddr_reg:x3; val_offset:57099*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57099*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287fc000; valaddr_reg:x3; val_offset:57102*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57102*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287fe000; valaddr_reg:x3; val_offset:57105*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57105*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287ff000; valaddr_reg:x3; val_offset:57108*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57108*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287ff800; valaddr_reg:x3; val_offset:57111*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57111*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287ffc00; valaddr_reg:x3; val_offset:57114*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57114*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287ffe00; valaddr_reg:x3; val_offset:57117*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57117*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287fff00; valaddr_reg:x3; val_offset:57120*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57120*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287fff80; valaddr_reg:x3; val_offset:57123*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57123*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287fffc0; valaddr_reg:x3; val_offset:57126*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57126*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287fffe0; valaddr_reg:x3; val_offset:57129*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57129*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287ffff0; valaddr_reg:x3; val_offset:57132*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57132*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287ffff8; valaddr_reg:x3; val_offset:57135*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57135*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287ffffc; valaddr_reg:x3; val_offset:57138*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57138*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287ffffe; valaddr_reg:x3; val_offset:57141*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57141*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x50 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x287fffff; valaddr_reg:x3; val_offset:57144*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57144*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3f800001; valaddr_reg:x3; val_offset:57147*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57147*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3f800003; valaddr_reg:x3; val_offset:57150*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57150*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3f800007; valaddr_reg:x3; val_offset:57153*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57153*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3f999999; valaddr_reg:x3; val_offset:57156*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57156*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:57159*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57159*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:57162*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57162*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:57165*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57165*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:57168*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57168*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:57171*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57171*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:57174*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57174*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:57177*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57177*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:57180*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57180*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:57183*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57183*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:57186*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57186*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:57189*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57189*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d2dfe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x569b02 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd2dfe; op2val:0x569b02; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:57192*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57192*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:57195*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57195*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:57198*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57198*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:57201*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57201*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:57204*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57204*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:57207*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57207*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:57210*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57210*0 + 3*148*FLEN/8, x4, x1, x2) + +inst_19071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:57213*0 + 3*148*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57213*0 + 3*148*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777216,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777217,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777219,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777223,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777231,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777247,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777279,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777343,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777471,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777727,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16778239,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16779263,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16781311,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16785407,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16793599,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16809983,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16842751,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16908287,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17039359,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17301503,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17825791,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(18874367,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(20971519,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(20971520,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(23068672,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24117248,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24641536,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24903680,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25034752,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25100288,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25133056,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25149440,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25157632,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25161728,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25163776,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25164800,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165312,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165568,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165696,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165760,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165792,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165808,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165816,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165820,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165822,32,FLEN) +NAN_BOXED(2126306546,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165823,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088640,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088641,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088643,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088647,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088655,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088671,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088703,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088767,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671088895,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671089151,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671089663,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671090687,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671092735,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671096831,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671105023,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671121407,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671154175,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671219711,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671350783,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(671612927,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(672137215,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(673185791,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(675282943,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(675282944,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(677380096,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(678428672,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(678952960,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679215104,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679346176,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679411712,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679444480,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679460864,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679469056,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679473152,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679475200,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679476224,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679476736,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679476992,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679477120,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679477184,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679477216,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679477232,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679477240,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679477244,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679477246,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(679477247,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2126327294,32,FLEN) +NAN_BOXED(5675778,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-15.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-15.S new file mode 100644 index 000000000..2ce0dd320 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-15.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_1792: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbf800001; valaddr_reg:x3; val_offset:5376*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5376*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1793: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbf800003; valaddr_reg:x3; val_offset:5379*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5379*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1794: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbf800007; valaddr_reg:x3; val_offset:5382*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5382*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1795: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbf999999; valaddr_reg:x3; val_offset:5385*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5385*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1796: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:5388*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5388*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1797: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:5391*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5391*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1798: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:5394*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5394*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1799: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:5397*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5397*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1800: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:5400*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5400*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1801: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:5403*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5403*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1802: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:5406*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5406*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1803: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:5409*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5409*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1804: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:5412*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5412*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1805: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:5415*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5415*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1806: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:5418*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5418*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1807: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:5421*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5421*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1808: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3800000; valaddr_reg:x3; val_offset:5424*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5424*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1809: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3800001; valaddr_reg:x3; val_offset:5427*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5427*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1810: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3800003; valaddr_reg:x3; val_offset:5430*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5430*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1811: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3800007; valaddr_reg:x3; val_offset:5433*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5433*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1812: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc380000f; valaddr_reg:x3; val_offset:5436*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5436*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1813: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc380001f; valaddr_reg:x3; val_offset:5439*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5439*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1814: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc380003f; valaddr_reg:x3; val_offset:5442*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5442*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1815: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc380007f; valaddr_reg:x3; val_offset:5445*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5445*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1816: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc38000ff; valaddr_reg:x3; val_offset:5448*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5448*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1817: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc38001ff; valaddr_reg:x3; val_offset:5451*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5451*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1818: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc38003ff; valaddr_reg:x3; val_offset:5454*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5454*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1819: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc38007ff; valaddr_reg:x3; val_offset:5457*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5457*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1820: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3800fff; valaddr_reg:x3; val_offset:5460*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5460*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1821: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3801fff; valaddr_reg:x3; val_offset:5463*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5463*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1822: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3803fff; valaddr_reg:x3; val_offset:5466*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5466*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1823: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3807fff; valaddr_reg:x3; val_offset:5469*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5469*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1824: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc380ffff; valaddr_reg:x3; val_offset:5472*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5472*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1825: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc381ffff; valaddr_reg:x3; val_offset:5475*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5475*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1826: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc383ffff; valaddr_reg:x3; val_offset:5478*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5478*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1827: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc387ffff; valaddr_reg:x3; val_offset:5481*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5481*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1828: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc38fffff; valaddr_reg:x3; val_offset:5484*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5484*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1829: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc39fffff; valaddr_reg:x3; val_offset:5487*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5487*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1830: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3bfffff; valaddr_reg:x3; val_offset:5490*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5490*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1831: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3c00000; valaddr_reg:x3; val_offset:5493*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5493*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1832: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3e00000; valaddr_reg:x3; val_offset:5496*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5496*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1833: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3f00000; valaddr_reg:x3; val_offset:5499*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5499*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1834: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3f80000; valaddr_reg:x3; val_offset:5502*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5502*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1835: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fc0000; valaddr_reg:x3; val_offset:5505*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5505*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1836: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fe0000; valaddr_reg:x3; val_offset:5508*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5508*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1837: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ff0000; valaddr_reg:x3; val_offset:5511*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5511*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1838: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ff8000; valaddr_reg:x3; val_offset:5514*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5514*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1839: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ffc000; valaddr_reg:x3; val_offset:5517*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5517*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1840: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ffe000; valaddr_reg:x3; val_offset:5520*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5520*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1841: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fff000; valaddr_reg:x3; val_offset:5523*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5523*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1842: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fff800; valaddr_reg:x3; val_offset:5526*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5526*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1843: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fffc00; valaddr_reg:x3; val_offset:5529*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5529*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1844: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fffe00; valaddr_reg:x3; val_offset:5532*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5532*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1845: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ffff00; valaddr_reg:x3; val_offset:5535*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5535*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1846: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ffff80; valaddr_reg:x3; val_offset:5538*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5538*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1847: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ffffc0; valaddr_reg:x3; val_offset:5541*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5541*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1848: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ffffe0; valaddr_reg:x3; val_offset:5544*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5544*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1849: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fffff0; valaddr_reg:x3; val_offset:5547*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5547*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1850: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fffff8; valaddr_reg:x3; val_offset:5550*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5550*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1851: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fffffc; valaddr_reg:x3; val_offset:5553*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5553*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1852: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3fffffe; valaddr_reg:x3; val_offset:5556*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5556*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1853: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x01f02f and fs2 == 1 and fe2 == 0x03 and fm2 == 0x7c2e6e and fs3 == 1 and fe3 == 0x87 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d01f02f; op2val:0x81fc2e6e; +op3val:0xc3ffffff; valaddr_reg:x3; val_offset:5559*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5559*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1854: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:5562*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5562*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1855: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:5565*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5565*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1856: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:5568*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5568*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1857: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:5571*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5571*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1858: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:5574*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5574*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1859: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:5577*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5577*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1860: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:5580*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5580*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1861: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:5583*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5583*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1862: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:5586*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5586*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1863: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:5589*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5589*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1864: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:5592*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5592*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1865: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:5595*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5595*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1866: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:5598*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5598*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1867: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:5601*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5601*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1868: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:5604*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5604*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1869: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:5607*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5607*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1870: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85800000; valaddr_reg:x3; val_offset:5610*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5610*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1871: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85800001; valaddr_reg:x3; val_offset:5613*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5613*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1872: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85800003; valaddr_reg:x3; val_offset:5616*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5616*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1873: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85800007; valaddr_reg:x3; val_offset:5619*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5619*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1874: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x8580000f; valaddr_reg:x3; val_offset:5622*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5622*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1875: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x8580001f; valaddr_reg:x3; val_offset:5625*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5625*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1876: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x8580003f; valaddr_reg:x3; val_offset:5628*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5628*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1877: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x8580007f; valaddr_reg:x3; val_offset:5631*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5631*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1878: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x858000ff; valaddr_reg:x3; val_offset:5634*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5634*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1879: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x858001ff; valaddr_reg:x3; val_offset:5637*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5637*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1880: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x858003ff; valaddr_reg:x3; val_offset:5640*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5640*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1881: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x858007ff; valaddr_reg:x3; val_offset:5643*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5643*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1882: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85800fff; valaddr_reg:x3; val_offset:5646*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5646*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1883: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85801fff; valaddr_reg:x3; val_offset:5649*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5649*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1884: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85803fff; valaddr_reg:x3; val_offset:5652*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5652*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1885: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85807fff; valaddr_reg:x3; val_offset:5655*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5655*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1886: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x8580ffff; valaddr_reg:x3; val_offset:5658*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5658*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1887: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x8581ffff; valaddr_reg:x3; val_offset:5661*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5661*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1888: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x8583ffff; valaddr_reg:x3; val_offset:5664*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5664*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1889: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x8587ffff; valaddr_reg:x3; val_offset:5667*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5667*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1890: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x858fffff; valaddr_reg:x3; val_offset:5670*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5670*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1891: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x859fffff; valaddr_reg:x3; val_offset:5673*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5673*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1892: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85bfffff; valaddr_reg:x3; val_offset:5676*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5676*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1893: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85c00000; valaddr_reg:x3; val_offset:5679*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5679*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1894: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85e00000; valaddr_reg:x3; val_offset:5682*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5682*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1895: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85f00000; valaddr_reg:x3; val_offset:5685*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5685*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1896: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85f80000; valaddr_reg:x3; val_offset:5688*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5688*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1897: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fc0000; valaddr_reg:x3; val_offset:5691*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5691*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1898: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fe0000; valaddr_reg:x3; val_offset:5694*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5694*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1899: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ff0000; valaddr_reg:x3; val_offset:5697*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5697*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1900: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ff8000; valaddr_reg:x3; val_offset:5700*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5700*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1901: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ffc000; valaddr_reg:x3; val_offset:5703*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5703*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1902: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ffe000; valaddr_reg:x3; val_offset:5706*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5706*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1903: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fff000; valaddr_reg:x3; val_offset:5709*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5709*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1904: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fff800; valaddr_reg:x3; val_offset:5712*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5712*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1905: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fffc00; valaddr_reg:x3; val_offset:5715*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5715*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1906: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fffe00; valaddr_reg:x3; val_offset:5718*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5718*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1907: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ffff00; valaddr_reg:x3; val_offset:5721*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5721*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1908: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ffff80; valaddr_reg:x3; val_offset:5724*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5724*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1909: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ffffc0; valaddr_reg:x3; val_offset:5727*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5727*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1910: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ffffe0; valaddr_reg:x3; val_offset:5730*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5730*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1911: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fffff0; valaddr_reg:x3; val_offset:5733*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5733*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1912: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fffff8; valaddr_reg:x3; val_offset:5736*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5736*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1913: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fffffc; valaddr_reg:x3; val_offset:5739*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5739*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1914: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85fffffe; valaddr_reg:x3; val_offset:5742*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5742*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1915: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x092308 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d092308; op2val:0x80000000; +op3val:0x85ffffff; valaddr_reg:x3; val_offset:5745*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5745*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1916: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:5748*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5748*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1917: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:5751*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5751*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1918: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:5754*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5754*0 + 3*14*FLEN/8, x4, x1, x2) + +inst_1919: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:5757*0 + 3*14*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5757*0 + 3*14*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945728,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945729,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945731,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945735,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945743,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945759,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945791,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945855,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279945983,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279946239,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279946751,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279947775,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279949823,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279953919,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279962111,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3279978495,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3280011263,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3280076799,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3280207871,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3280470015,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3280994303,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3282042879,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3284140031,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3284140032,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3286237184,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3287285760,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3287810048,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288072192,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288203264,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288268800,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288301568,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288317952,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288326144,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288330240,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288332288,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288333312,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288333824,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334080,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334208,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334272,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334304,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334320,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334328,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334332,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334334,32,FLEN) +NAN_BOXED(2097279023,32,FLEN) +NAN_BOXED(2180787822,32,FLEN) +NAN_BOXED(3288334335,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758336,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758337,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758339,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758343,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758351,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758367,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758399,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758463,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758591,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758847,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239759359,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239760383,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239762431,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239766527,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239774719,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239791103,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239823871,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239889407,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240020479,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240282623,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240806911,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2241855487,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2243952639,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2243952640,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2246049792,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247098368,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247622656,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247884800,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248015872,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248081408,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248114176,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248130560,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248138752,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248142848,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248144896,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248145920,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146432,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146688,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146816,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146880,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146912,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146928,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146936,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146940,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146942,32,FLEN) +NAN_BOXED(2097750792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146943,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-150.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-150.S new file mode 100644 index 000000000..1a281b684 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-150.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_19072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:57216*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57216*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:57219*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57219*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:57222*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57222*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:57225*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57225*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:57228*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57228*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:57231*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57231*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:57234*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57234*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:57237*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57237*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:57240*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57240*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c000000; valaddr_reg:x3; val_offset:57243*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57243*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c000001; valaddr_reg:x3; val_offset:57246*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57246*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c000003; valaddr_reg:x3; val_offset:57249*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57249*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c000007; valaddr_reg:x3; val_offset:57252*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57252*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c00000f; valaddr_reg:x3; val_offset:57255*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57255*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c00001f; valaddr_reg:x3; val_offset:57258*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57258*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c00003f; valaddr_reg:x3; val_offset:57261*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57261*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c00007f; valaddr_reg:x3; val_offset:57264*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57264*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c0000ff; valaddr_reg:x3; val_offset:57267*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57267*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c0001ff; valaddr_reg:x3; val_offset:57270*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57270*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c0003ff; valaddr_reg:x3; val_offset:57273*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57273*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c0007ff; valaddr_reg:x3; val_offset:57276*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57276*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c000fff; valaddr_reg:x3; val_offset:57279*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57279*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c001fff; valaddr_reg:x3; val_offset:57282*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57282*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c003fff; valaddr_reg:x3; val_offset:57285*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57285*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c007fff; valaddr_reg:x3; val_offset:57288*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57288*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c00ffff; valaddr_reg:x3; val_offset:57291*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57291*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c01ffff; valaddr_reg:x3; val_offset:57294*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57294*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c03ffff; valaddr_reg:x3; val_offset:57297*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57297*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c07ffff; valaddr_reg:x3; val_offset:57300*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57300*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c0fffff; valaddr_reg:x3; val_offset:57303*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57303*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c1fffff; valaddr_reg:x3; val_offset:57306*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57306*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c3fffff; valaddr_reg:x3; val_offset:57309*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57309*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c400000; valaddr_reg:x3; val_offset:57312*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57312*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c600000; valaddr_reg:x3; val_offset:57315*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57315*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c700000; valaddr_reg:x3; val_offset:57318*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57318*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c780000; valaddr_reg:x3; val_offset:57321*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57321*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7c0000; valaddr_reg:x3; val_offset:57324*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57324*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7e0000; valaddr_reg:x3; val_offset:57327*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57327*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7f0000; valaddr_reg:x3; val_offset:57330*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57330*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7f8000; valaddr_reg:x3; val_offset:57333*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57333*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7fc000; valaddr_reg:x3; val_offset:57336*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57336*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7fe000; valaddr_reg:x3; val_offset:57339*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57339*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7ff000; valaddr_reg:x3; val_offset:57342*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57342*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7ff800; valaddr_reg:x3; val_offset:57345*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57345*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7ffc00; valaddr_reg:x3; val_offset:57348*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57348*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7ffe00; valaddr_reg:x3; val_offset:57351*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57351*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7fff00; valaddr_reg:x3; val_offset:57354*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57354*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7fff80; valaddr_reg:x3; val_offset:57357*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57357*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7fffc0; valaddr_reg:x3; val_offset:57360*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57360*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7fffe0; valaddr_reg:x3; val_offset:57363*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57363*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7ffff0; valaddr_reg:x3; val_offset:57366*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57366*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7ffff8; valaddr_reg:x3; val_offset:57369*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57369*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7ffffc; valaddr_reg:x3; val_offset:57372*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57372*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7ffffe; valaddr_reg:x3; val_offset:57375*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57375*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d8201 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd8201; op2val:0x80000000; +op3val:0x8c7fffff; valaddr_reg:x3; val_offset:57378*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57378*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:57381*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57381*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:57384*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57384*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:57387*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57387*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:57390*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57390*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:57393*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57393*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:57396*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57396*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:57399*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57399*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:57402*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57402*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:57405*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57405*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:57408*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57408*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:57411*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57411*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:57414*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57414*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:57417*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57417*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:57420*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57420*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:57423*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57423*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:57426*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57426*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81800000; valaddr_reg:x3; val_offset:57429*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57429*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81800001; valaddr_reg:x3; val_offset:57432*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57432*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81800003; valaddr_reg:x3; val_offset:57435*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57435*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81800007; valaddr_reg:x3; val_offset:57438*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57438*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8180000f; valaddr_reg:x3; val_offset:57441*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57441*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8180001f; valaddr_reg:x3; val_offset:57444*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57444*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8180003f; valaddr_reg:x3; val_offset:57447*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57447*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8180007f; valaddr_reg:x3; val_offset:57450*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57450*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x818000ff; valaddr_reg:x3; val_offset:57453*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57453*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x818001ff; valaddr_reg:x3; val_offset:57456*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57456*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x818003ff; valaddr_reg:x3; val_offset:57459*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57459*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x818007ff; valaddr_reg:x3; val_offset:57462*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57462*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81800fff; valaddr_reg:x3; val_offset:57465*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57465*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81801fff; valaddr_reg:x3; val_offset:57468*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57468*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81803fff; valaddr_reg:x3; val_offset:57471*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57471*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81807fff; valaddr_reg:x3; val_offset:57474*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57474*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8180ffff; valaddr_reg:x3; val_offset:57477*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57477*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8181ffff; valaddr_reg:x3; val_offset:57480*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57480*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8183ffff; valaddr_reg:x3; val_offset:57483*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57483*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x8187ffff; valaddr_reg:x3; val_offset:57486*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57486*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x818fffff; valaddr_reg:x3; val_offset:57489*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57489*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x819fffff; valaddr_reg:x3; val_offset:57492*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57492*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81bfffff; valaddr_reg:x3; val_offset:57495*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57495*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81c00000; valaddr_reg:x3; val_offset:57498*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57498*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81e00000; valaddr_reg:x3; val_offset:57501*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57501*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81f00000; valaddr_reg:x3; val_offset:57504*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57504*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81f80000; valaddr_reg:x3; val_offset:57507*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57507*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fc0000; valaddr_reg:x3; val_offset:57510*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57510*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fe0000; valaddr_reg:x3; val_offset:57513*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57513*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ff0000; valaddr_reg:x3; val_offset:57516*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57516*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ff8000; valaddr_reg:x3; val_offset:57519*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57519*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ffc000; valaddr_reg:x3; val_offset:57522*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57522*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ffe000; valaddr_reg:x3; val_offset:57525*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57525*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fff000; valaddr_reg:x3; val_offset:57528*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57528*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fff800; valaddr_reg:x3; val_offset:57531*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57531*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fffc00; valaddr_reg:x3; val_offset:57534*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57534*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fffe00; valaddr_reg:x3; val_offset:57537*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57537*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ffff00; valaddr_reg:x3; val_offset:57540*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57540*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ffff80; valaddr_reg:x3; val_offset:57543*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57543*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ffffc0; valaddr_reg:x3; val_offset:57546*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57546*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ffffe0; valaddr_reg:x3; val_offset:57549*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57549*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fffff0; valaddr_reg:x3; val_offset:57552*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57552*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fffff8; valaddr_reg:x3; val_offset:57555*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57555*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fffffc; valaddr_reg:x3; val_offset:57558*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57558*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81fffffe; valaddr_reg:x3; val_offset:57561*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57561*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3d88ad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebd88ad; op2val:0x80000000; +op3val:0x81ffffff; valaddr_reg:x3; val_offset:57564*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57564*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbf800001; valaddr_reg:x3; val_offset:57567*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57567*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbf800003; valaddr_reg:x3; val_offset:57570*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57570*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbf800007; valaddr_reg:x3; val_offset:57573*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57573*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbf999999; valaddr_reg:x3; val_offset:57576*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57576*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:57579*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57579*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:57582*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57582*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:57585*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57585*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:57588*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57588*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:57591*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57591*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:57594*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57594*0 + 3*149*FLEN/8, x4, x1, x2) + +inst_19199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:57597*0 + 3*149*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57597*0 + 3*149*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810240,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810241,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810243,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810247,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810255,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810271,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810303,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810367,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810495,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810751,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348811263,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348812287,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348814335,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348818431,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348826623,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348843007,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348875775,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348941311,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349072383,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349334527,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349858815,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2350907391,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2353004543,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2353004544,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2355101696,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356150272,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356674560,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356936704,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357067776,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357133312,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357166080,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357182464,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357190656,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357194752,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357196800,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357197824,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198336,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198592,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198720,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198784,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198816,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198832,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198840,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198844,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198846,32,FLEN) +NAN_BOXED(2126348801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198847,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649472,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649473,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649475,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649479,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649487,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649503,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649535,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649599,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649727,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649983,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172650495,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172651519,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172653567,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172657663,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172665855,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172682239,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172715007,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172780543,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172911615,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2173173759,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2173698047,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2174746623,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2176843775,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2176843776,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2178940928,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2179989504,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180513792,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180775936,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180907008,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180972544,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181005312,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181021696,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181029888,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181033984,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181036032,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037056,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037568,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037824,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037952,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038016,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038048,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038064,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038072,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038076,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038078,32,FLEN) +NAN_BOXED(2126350509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038079,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-151.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-151.S new file mode 100644 index 000000000..f9bdd75f3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-151.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_19200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:57600*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57600*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:57603*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57603*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:57606*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57606*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:57609*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57609*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:57612*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57612*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8800000; valaddr_reg:x3; val_offset:57615*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57615*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8800001; valaddr_reg:x3; val_offset:57618*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57618*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8800003; valaddr_reg:x3; val_offset:57621*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57621*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8800007; valaddr_reg:x3; val_offset:57624*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57624*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc880000f; valaddr_reg:x3; val_offset:57627*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57627*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc880001f; valaddr_reg:x3; val_offset:57630*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57630*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc880003f; valaddr_reg:x3; val_offset:57633*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57633*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc880007f; valaddr_reg:x3; val_offset:57636*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57636*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc88000ff; valaddr_reg:x3; val_offset:57639*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57639*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc88001ff; valaddr_reg:x3; val_offset:57642*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57642*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc88003ff; valaddr_reg:x3; val_offset:57645*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57645*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc88007ff; valaddr_reg:x3; val_offset:57648*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57648*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8800fff; valaddr_reg:x3; val_offset:57651*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57651*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8801fff; valaddr_reg:x3; val_offset:57654*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57654*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8803fff; valaddr_reg:x3; val_offset:57657*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57657*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8807fff; valaddr_reg:x3; val_offset:57660*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57660*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc880ffff; valaddr_reg:x3; val_offset:57663*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57663*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc881ffff; valaddr_reg:x3; val_offset:57666*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57666*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc883ffff; valaddr_reg:x3; val_offset:57669*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57669*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc887ffff; valaddr_reg:x3; val_offset:57672*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57672*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc88fffff; valaddr_reg:x3; val_offset:57675*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57675*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc89fffff; valaddr_reg:x3; val_offset:57678*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57678*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8bfffff; valaddr_reg:x3; val_offset:57681*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57681*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8c00000; valaddr_reg:x3; val_offset:57684*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57684*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8e00000; valaddr_reg:x3; val_offset:57687*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57687*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8f00000; valaddr_reg:x3; val_offset:57690*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57690*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8f80000; valaddr_reg:x3; val_offset:57693*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57693*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fc0000; valaddr_reg:x3; val_offset:57696*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57696*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fe0000; valaddr_reg:x3; val_offset:57699*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57699*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ff0000; valaddr_reg:x3; val_offset:57702*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57702*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ff8000; valaddr_reg:x3; val_offset:57705*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57705*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ffc000; valaddr_reg:x3; val_offset:57708*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57708*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ffe000; valaddr_reg:x3; val_offset:57711*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57711*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fff000; valaddr_reg:x3; val_offset:57714*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57714*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fff800; valaddr_reg:x3; val_offset:57717*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57717*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fffc00; valaddr_reg:x3; val_offset:57720*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57720*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fffe00; valaddr_reg:x3; val_offset:57723*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57723*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ffff00; valaddr_reg:x3; val_offset:57726*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57726*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ffff80; valaddr_reg:x3; val_offset:57729*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57729*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ffffc0; valaddr_reg:x3; val_offset:57732*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57732*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ffffe0; valaddr_reg:x3; val_offset:57735*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57735*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fffff0; valaddr_reg:x3; val_offset:57738*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57738*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fffff8; valaddr_reg:x3; val_offset:57741*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57741*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fffffc; valaddr_reg:x3; val_offset:57744*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57744*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8fffffe; valaddr_reg:x3; val_offset:57747*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57747*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3de1ea and fs2 == 1 and fe2 == 0x00 and fm2 == 0x5648f2 and fs3 == 1 and fe3 == 0x91 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebde1ea; op2val:0x805648f2; +op3val:0xc8ffffff; valaddr_reg:x3; val_offset:57750*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57750*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x0; valaddr_reg:x3; val_offset:57753*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57753*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:57756*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57756*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:57759*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57759*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:57762*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57762*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0xf; valaddr_reg:x3; val_offset:57765*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57765*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x1f; valaddr_reg:x3; val_offset:57768*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57768*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x3f; valaddr_reg:x3; val_offset:57771*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57771*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7f; valaddr_reg:x3; val_offset:57774*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57774*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0xff; valaddr_reg:x3; val_offset:57777*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57777*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x1ff; valaddr_reg:x3; val_offset:57780*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57780*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x3ff; valaddr_reg:x3; val_offset:57783*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57783*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ff; valaddr_reg:x3; val_offset:57786*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57786*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0xfff; valaddr_reg:x3; val_offset:57789*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57789*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x1fff; valaddr_reg:x3; val_offset:57792*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57792*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x3fff; valaddr_reg:x3; val_offset:57795*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57795*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7fff; valaddr_reg:x3; val_offset:57798*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57798*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0xffff; valaddr_reg:x3; val_offset:57801*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57801*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x1ffff; valaddr_reg:x3; val_offset:57804*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57804*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x3ffff; valaddr_reg:x3; val_offset:57807*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57807*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ffff; valaddr_reg:x3; val_offset:57810*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57810*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0xfffff; valaddr_reg:x3; val_offset:57813*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57813*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:57816*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57816*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x1fffff; valaddr_reg:x3; val_offset:57819*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57819*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:57822*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57822*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:57825*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57825*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:57828*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57828*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:57831*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57831*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x3fffff; valaddr_reg:x3; val_offset:57834*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57834*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x400000; valaddr_reg:x3; val_offset:57837*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57837*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:57840*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57840*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:57843*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57843*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:57846*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57846*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x600000; valaddr_reg:x3; val_offset:57849*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57849*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:57852*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57852*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:57855*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57855*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x700000; valaddr_reg:x3; val_offset:57858*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57858*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x780000; valaddr_reg:x3; val_offset:57861*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57861*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7c0000; valaddr_reg:x3; val_offset:57864*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57864*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7e0000; valaddr_reg:x3; val_offset:57867*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57867*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7f0000; valaddr_reg:x3; val_offset:57870*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57870*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7f8000; valaddr_reg:x3; val_offset:57873*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57873*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7fc000; valaddr_reg:x3; val_offset:57876*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57876*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7fe000; valaddr_reg:x3; val_offset:57879*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57879*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ff000; valaddr_reg:x3; val_offset:57882*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57882*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ff800; valaddr_reg:x3; val_offset:57885*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57885*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ffc00; valaddr_reg:x3; val_offset:57888*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57888*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ffe00; valaddr_reg:x3; val_offset:57891*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57891*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7fff00; valaddr_reg:x3; val_offset:57894*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57894*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7fff80; valaddr_reg:x3; val_offset:57897*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57897*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7fffc0; valaddr_reg:x3; val_offset:57900*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57900*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7fffe0; valaddr_reg:x3; val_offset:57903*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57903*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ffff0; valaddr_reg:x3; val_offset:57906*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57906*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:57909*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57909*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:57912*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57912*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:57915*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57915*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3e3c61 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebe3c61; op2val:0x0; +op3val:0x7fffff; valaddr_reg:x3; val_offset:57918*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57918*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f800000; valaddr_reg:x3; val_offset:57921*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57921*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f800001; valaddr_reg:x3; val_offset:57924*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57924*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f800003; valaddr_reg:x3; val_offset:57927*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57927*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f800007; valaddr_reg:x3; val_offset:57930*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57930*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f80000f; valaddr_reg:x3; val_offset:57933*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57933*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f80001f; valaddr_reg:x3; val_offset:57936*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57936*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f80003f; valaddr_reg:x3; val_offset:57939*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57939*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f80007f; valaddr_reg:x3; val_offset:57942*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57942*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f8000ff; valaddr_reg:x3; val_offset:57945*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57945*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f8001ff; valaddr_reg:x3; val_offset:57948*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57948*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f8003ff; valaddr_reg:x3; val_offset:57951*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57951*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f8007ff; valaddr_reg:x3; val_offset:57954*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57954*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f800fff; valaddr_reg:x3; val_offset:57957*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57957*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f801fff; valaddr_reg:x3; val_offset:57960*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57960*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f803fff; valaddr_reg:x3; val_offset:57963*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57963*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f807fff; valaddr_reg:x3; val_offset:57966*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57966*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f80ffff; valaddr_reg:x3; val_offset:57969*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57969*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f81ffff; valaddr_reg:x3; val_offset:57972*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57972*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f83ffff; valaddr_reg:x3; val_offset:57975*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57975*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f87ffff; valaddr_reg:x3; val_offset:57978*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57978*0 + 3*150*FLEN/8, x4, x1, x2) + +inst_19327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f8fffff; valaddr_reg:x3; val_offset:57981*0 + 3*150*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57981*0 + 3*150*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363831808,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363831809,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363831811,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363831815,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363831823,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363831839,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363831871,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363831935,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363832063,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363832319,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363832831,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363833855,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363835903,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363839999,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363848191,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363864575,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363897343,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3363962879,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3364093951,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3364356095,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3364880383,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3365928959,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3368026111,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3368026112,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3370123264,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3371171840,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3371696128,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3371958272,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372089344,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372154880,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372187648,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372204032,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372212224,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372216320,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372218368,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372219392,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372219904,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220160,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220288,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220352,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220384,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220400,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220408,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220412,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220414,32,FLEN) +NAN_BOXED(2126373354,32,FLEN) +NAN_BOXED(2153138418,32,FLEN) +NAN_BOXED(3372220415,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(63,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(511,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1023,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2047,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4095,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8191,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16383,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32767,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65535,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(131071,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(524287,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1048575,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2097151,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194303,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194304,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6291456,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7340032,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7864320,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8126464,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8257536,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8323072,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8355840,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8372224,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8380416,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8384512,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8386560,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8387584,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388096,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388352,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388480,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388544,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388576,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388592,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2126396513,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388607,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224128,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224129,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224131,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224135,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224143,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224159,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224191,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224255,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224383,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602224639,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602225151,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602226175,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602228223,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602232319,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602240511,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602256895,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602289663,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602355199,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602486271,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1602748415,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1603272703,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-152.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-152.S new file mode 100644 index 000000000..6e5a17059 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-152.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_19328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5f9fffff; valaddr_reg:x3; val_offset:57984*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57984*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fbfffff; valaddr_reg:x3; val_offset:57987*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57987*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fc00000; valaddr_reg:x3; val_offset:57990*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57990*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fe00000; valaddr_reg:x3; val_offset:57993*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57993*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ff00000; valaddr_reg:x3; val_offset:57996*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57996*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ff80000; valaddr_reg:x3; val_offset:57999*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 57999*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffc0000; valaddr_reg:x3; val_offset:58002*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58002*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffe0000; valaddr_reg:x3; val_offset:58005*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58005*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fff0000; valaddr_reg:x3; val_offset:58008*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58008*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fff8000; valaddr_reg:x3; val_offset:58011*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58011*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fffc000; valaddr_reg:x3; val_offset:58014*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58014*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fffe000; valaddr_reg:x3; val_offset:58017*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58017*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffff000; valaddr_reg:x3; val_offset:58020*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58020*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffff800; valaddr_reg:x3; val_offset:58023*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58023*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffffc00; valaddr_reg:x3; val_offset:58026*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58026*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffffe00; valaddr_reg:x3; val_offset:58029*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58029*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fffff00; valaddr_reg:x3; val_offset:58032*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58032*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fffff80; valaddr_reg:x3; val_offset:58035*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58035*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fffffc0; valaddr_reg:x3; val_offset:58038*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58038*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fffffe0; valaddr_reg:x3; val_offset:58041*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58041*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffffff0; valaddr_reg:x3; val_offset:58044*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58044*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffffff8; valaddr_reg:x3; val_offset:58047*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58047*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffffffc; valaddr_reg:x3; val_offset:58050*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58050*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5ffffffe; valaddr_reg:x3; val_offset:58053*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58053*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xbf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x5fffffff; valaddr_reg:x3; val_offset:58056*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58056*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f000001; valaddr_reg:x3; val_offset:58059*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58059*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f000003; valaddr_reg:x3; val_offset:58062*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58062*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f000007; valaddr_reg:x3; val_offset:58065*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58065*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f199999; valaddr_reg:x3; val_offset:58068*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58068*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f249249; valaddr_reg:x3; val_offset:58071*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58071*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f333333; valaddr_reg:x3; val_offset:58074*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58074*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:58077*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58077*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:58080*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58080*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f444444; valaddr_reg:x3; val_offset:58083*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58083*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:58086*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58086*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:58089*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58089*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f666666; valaddr_reg:x3; val_offset:58092*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58092*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:58095*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58095*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:58098*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58098*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:58101*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58101*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3eb433 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x2bd39a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebeb433; op2val:0x402bd39a; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:58104*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58104*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:58107*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58107*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:58110*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58110*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:58113*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58113*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:58116*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58116*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:58119*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58119*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:58122*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58122*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:58125*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58125*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:58128*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58128*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:58131*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58131*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:58134*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58134*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:58137*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58137*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:58140*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58140*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:58143*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58143*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:58146*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58146*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:58149*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58149*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:58152*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58152*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89800000; valaddr_reg:x3; val_offset:58155*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58155*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89800001; valaddr_reg:x3; val_offset:58158*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58158*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89800003; valaddr_reg:x3; val_offset:58161*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58161*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89800007; valaddr_reg:x3; val_offset:58164*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58164*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8980000f; valaddr_reg:x3; val_offset:58167*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58167*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8980001f; valaddr_reg:x3; val_offset:58170*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58170*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8980003f; valaddr_reg:x3; val_offset:58173*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58173*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8980007f; valaddr_reg:x3; val_offset:58176*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58176*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x898000ff; valaddr_reg:x3; val_offset:58179*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58179*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x898001ff; valaddr_reg:x3; val_offset:58182*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58182*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x898003ff; valaddr_reg:x3; val_offset:58185*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58185*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x898007ff; valaddr_reg:x3; val_offset:58188*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58188*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89800fff; valaddr_reg:x3; val_offset:58191*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58191*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89801fff; valaddr_reg:x3; val_offset:58194*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58194*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89803fff; valaddr_reg:x3; val_offset:58197*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58197*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89807fff; valaddr_reg:x3; val_offset:58200*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58200*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8980ffff; valaddr_reg:x3; val_offset:58203*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58203*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8981ffff; valaddr_reg:x3; val_offset:58206*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58206*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8983ffff; valaddr_reg:x3; val_offset:58209*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58209*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x8987ffff; valaddr_reg:x3; val_offset:58212*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58212*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x898fffff; valaddr_reg:x3; val_offset:58215*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58215*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x899fffff; valaddr_reg:x3; val_offset:58218*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58218*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89bfffff; valaddr_reg:x3; val_offset:58221*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58221*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89c00000; valaddr_reg:x3; val_offset:58224*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58224*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89e00000; valaddr_reg:x3; val_offset:58227*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58227*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89f00000; valaddr_reg:x3; val_offset:58230*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58230*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89f80000; valaddr_reg:x3; val_offset:58233*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58233*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fc0000; valaddr_reg:x3; val_offset:58236*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58236*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fe0000; valaddr_reg:x3; val_offset:58239*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58239*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ff0000; valaddr_reg:x3; val_offset:58242*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58242*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ff8000; valaddr_reg:x3; val_offset:58245*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58245*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ffc000; valaddr_reg:x3; val_offset:58248*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58248*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ffe000; valaddr_reg:x3; val_offset:58251*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58251*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fff000; valaddr_reg:x3; val_offset:58254*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58254*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fff800; valaddr_reg:x3; val_offset:58257*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58257*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fffc00; valaddr_reg:x3; val_offset:58260*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58260*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fffe00; valaddr_reg:x3; val_offset:58263*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58263*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ffff00; valaddr_reg:x3; val_offset:58266*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58266*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ffff80; valaddr_reg:x3; val_offset:58269*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58269*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ffffc0; valaddr_reg:x3; val_offset:58272*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58272*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ffffe0; valaddr_reg:x3; val_offset:58275*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58275*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fffff0; valaddr_reg:x3; val_offset:58278*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58278*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fffff8; valaddr_reg:x3; val_offset:58281*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58281*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fffffc; valaddr_reg:x3; val_offset:58284*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58284*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89fffffe; valaddr_reg:x3; val_offset:58287*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58287*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3ee1af and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebee1af; op2val:0x80000000; +op3val:0x89ffffff; valaddr_reg:x3; val_offset:58290*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58290*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:58293*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58293*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:58296*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58296*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:58299*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58299*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:58302*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58302*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:58305*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58305*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:58308*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58308*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:58311*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58311*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:58314*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58314*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:58317*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58317*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:58320*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58320*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:58323*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58323*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:58326*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58326*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:58329*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58329*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:58332*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58332*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:58335*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58335*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:58338*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58338*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1800000; valaddr_reg:x3; val_offset:58341*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58341*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1800001; valaddr_reg:x3; val_offset:58344*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58344*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1800003; valaddr_reg:x3; val_offset:58347*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58347*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1800007; valaddr_reg:x3; val_offset:58350*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58350*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x180000f; valaddr_reg:x3; val_offset:58353*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58353*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x180001f; valaddr_reg:x3; val_offset:58356*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58356*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x180003f; valaddr_reg:x3; val_offset:58359*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58359*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x180007f; valaddr_reg:x3; val_offset:58362*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58362*0 + 3*151*FLEN/8, x4, x1, x2) + +inst_19455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x18000ff; valaddr_reg:x3; val_offset:58365*0 + 3*151*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58365*0 + 3*151*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1604321279,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1606418431,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1606418432,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1608515584,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1609564160,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610088448,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610350592,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610481664,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610547200,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610579968,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610596352,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610604544,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610608640,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610610688,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610611712,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612224,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612480,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612608,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612672,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612704,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612720,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612728,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612732,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612734,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(1610612735,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2126427187,32,FLEN) +NAN_BOXED(1076614042,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867200,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867201,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867203,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867207,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867215,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867231,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867263,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867327,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867455,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867711,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306868223,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306869247,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306871295,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306875391,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306883583,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306899967,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306932735,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306998271,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307129343,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307391487,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307915775,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2308964351,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2311061503,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2311061504,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2313158656,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314207232,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314731520,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314993664,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315124736,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315190272,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315223040,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315239424,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315247616,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315251712,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315253760,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315254784,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255296,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255552,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255680,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255744,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255776,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255792,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255800,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255804,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255806,32,FLEN) +NAN_BOXED(2126438831,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255807,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165824,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165825,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165827,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165831,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165839,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165855,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165887,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165951,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166079,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-153.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-153.S new file mode 100644 index 000000000..287b9a69e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-153.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_19456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x18001ff; valaddr_reg:x3; val_offset:58368*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58368*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x18003ff; valaddr_reg:x3; val_offset:58371*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58371*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x18007ff; valaddr_reg:x3; val_offset:58374*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58374*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1800fff; valaddr_reg:x3; val_offset:58377*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58377*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1801fff; valaddr_reg:x3; val_offset:58380*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58380*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1803fff; valaddr_reg:x3; val_offset:58383*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58383*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1807fff; valaddr_reg:x3; val_offset:58386*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58386*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x180ffff; valaddr_reg:x3; val_offset:58389*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58389*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x181ffff; valaddr_reg:x3; val_offset:58392*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58392*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x183ffff; valaddr_reg:x3; val_offset:58395*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58395*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x187ffff; valaddr_reg:x3; val_offset:58398*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58398*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x18fffff; valaddr_reg:x3; val_offset:58401*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58401*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x19fffff; valaddr_reg:x3; val_offset:58404*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58404*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1bfffff; valaddr_reg:x3; val_offset:58407*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58407*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1c00000; valaddr_reg:x3; val_offset:58410*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58410*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1e00000; valaddr_reg:x3; val_offset:58413*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58413*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1f00000; valaddr_reg:x3; val_offset:58416*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58416*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1f80000; valaddr_reg:x3; val_offset:58419*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58419*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fc0000; valaddr_reg:x3; val_offset:58422*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58422*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fe0000; valaddr_reg:x3; val_offset:58425*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58425*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ff0000; valaddr_reg:x3; val_offset:58428*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58428*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ff8000; valaddr_reg:x3; val_offset:58431*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58431*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ffc000; valaddr_reg:x3; val_offset:58434*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58434*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ffe000; valaddr_reg:x3; val_offset:58437*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58437*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fff000; valaddr_reg:x3; val_offset:58440*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58440*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fff800; valaddr_reg:x3; val_offset:58443*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58443*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fffc00; valaddr_reg:x3; val_offset:58446*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58446*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fffe00; valaddr_reg:x3; val_offset:58449*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58449*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ffff00; valaddr_reg:x3; val_offset:58452*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58452*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ffff80; valaddr_reg:x3; val_offset:58455*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58455*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ffffc0; valaddr_reg:x3; val_offset:58458*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58458*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ffffe0; valaddr_reg:x3; val_offset:58461*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58461*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fffff0; valaddr_reg:x3; val_offset:58464*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58464*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fffff8; valaddr_reg:x3; val_offset:58467*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58467*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fffffc; valaddr_reg:x3; val_offset:58470*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58470*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1fffffe; valaddr_reg:x3; val_offset:58473*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58473*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f66bb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf66bb; op2val:0x0; +op3val:0x1ffffff; valaddr_reg:x3; val_offset:58476*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58476*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:58479*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58479*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:58482*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58482*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:58485*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58485*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:58488*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58488*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:58491*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58491*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:58494*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58494*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:58497*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58497*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:58500*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58500*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:58503*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58503*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:58506*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58506*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:58509*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58509*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:58512*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58512*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:58515*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58515*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:58518*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58518*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:58521*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58521*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:58524*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58524*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2000000; valaddr_reg:x3; val_offset:58527*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58527*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2000001; valaddr_reg:x3; val_offset:58530*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58530*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2000003; valaddr_reg:x3; val_offset:58533*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58533*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2000007; valaddr_reg:x3; val_offset:58536*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58536*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x200000f; valaddr_reg:x3; val_offset:58539*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58539*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x200001f; valaddr_reg:x3; val_offset:58542*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58542*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x200003f; valaddr_reg:x3; val_offset:58545*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58545*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x200007f; valaddr_reg:x3; val_offset:58548*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58548*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x20000ff; valaddr_reg:x3; val_offset:58551*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58551*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x20001ff; valaddr_reg:x3; val_offset:58554*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58554*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x20003ff; valaddr_reg:x3; val_offset:58557*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58557*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x20007ff; valaddr_reg:x3; val_offset:58560*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58560*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2000fff; valaddr_reg:x3; val_offset:58563*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58563*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2001fff; valaddr_reg:x3; val_offset:58566*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58566*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2003fff; valaddr_reg:x3; val_offset:58569*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58569*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2007fff; valaddr_reg:x3; val_offset:58572*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58572*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x200ffff; valaddr_reg:x3; val_offset:58575*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58575*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x201ffff; valaddr_reg:x3; val_offset:58578*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58578*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x203ffff; valaddr_reg:x3; val_offset:58581*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58581*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x207ffff; valaddr_reg:x3; val_offset:58584*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58584*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x20fffff; valaddr_reg:x3; val_offset:58587*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58587*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x21fffff; valaddr_reg:x3; val_offset:58590*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58590*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x23fffff; valaddr_reg:x3; val_offset:58593*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58593*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2400000; valaddr_reg:x3; val_offset:58596*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58596*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2600000; valaddr_reg:x3; val_offset:58599*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58599*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2700000; valaddr_reg:x3; val_offset:58602*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58602*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x2780000; valaddr_reg:x3; val_offset:58605*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58605*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27c0000; valaddr_reg:x3; val_offset:58608*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58608*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27e0000; valaddr_reg:x3; val_offset:58611*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58611*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27f0000; valaddr_reg:x3; val_offset:58614*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58614*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27f8000; valaddr_reg:x3; val_offset:58617*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58617*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27fc000; valaddr_reg:x3; val_offset:58620*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58620*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27fe000; valaddr_reg:x3; val_offset:58623*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58623*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27ff000; valaddr_reg:x3; val_offset:58626*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58626*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27ff800; valaddr_reg:x3; val_offset:58629*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58629*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27ffc00; valaddr_reg:x3; val_offset:58632*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58632*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27ffe00; valaddr_reg:x3; val_offset:58635*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58635*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27fff00; valaddr_reg:x3; val_offset:58638*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58638*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27fff80; valaddr_reg:x3; val_offset:58641*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58641*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27fffc0; valaddr_reg:x3; val_offset:58644*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58644*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27fffe0; valaddr_reg:x3; val_offset:58647*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58647*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27ffff0; valaddr_reg:x3; val_offset:58650*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58650*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27ffff8; valaddr_reg:x3; val_offset:58653*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58653*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27ffffc; valaddr_reg:x3; val_offset:58656*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58656*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27ffffe; valaddr_reg:x3; val_offset:58659*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58659*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x3f7af3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ebf7af3; op2val:0x0; +op3val:0x27fffff; valaddr_reg:x3; val_offset:58662*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58662*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:58665*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58665*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:58668*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58668*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:58671*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58671*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:58674*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58674*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:58677*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58677*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:58680*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58680*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:58683*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58683*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:58686*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58686*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:58689*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58689*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:58692*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58692*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:58695*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58695*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:58698*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58698*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:58701*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58701*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:58704*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58704*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:58707*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58707*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:58710*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58710*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88000000; valaddr_reg:x3; val_offset:58713*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58713*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88000001; valaddr_reg:x3; val_offset:58716*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58716*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88000003; valaddr_reg:x3; val_offset:58719*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58719*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88000007; valaddr_reg:x3; val_offset:58722*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58722*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8800000f; valaddr_reg:x3; val_offset:58725*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58725*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8800001f; valaddr_reg:x3; val_offset:58728*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58728*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8800003f; valaddr_reg:x3; val_offset:58731*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58731*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8800007f; valaddr_reg:x3; val_offset:58734*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58734*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x880000ff; valaddr_reg:x3; val_offset:58737*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58737*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x880001ff; valaddr_reg:x3; val_offset:58740*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58740*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x880003ff; valaddr_reg:x3; val_offset:58743*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58743*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x880007ff; valaddr_reg:x3; val_offset:58746*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58746*0 + 3*152*FLEN/8, x4, x1, x2) + +inst_19583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88000fff; valaddr_reg:x3; val_offset:58749*0 + 3*152*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58749*0 + 3*152*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166335,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166847,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25167871,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25169919,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25174015,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25182207,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25198591,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25231359,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25296895,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25427967,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25690111,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(26214399,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(27262975,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(29360127,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(29360128,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31457280,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32505856,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33030144,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33292288,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33423360,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33488896,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33521664,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33538048,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33546240,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33550336,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33552384,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33553408,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33553920,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554176,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554304,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554368,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554400,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554416,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554424,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554428,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554430,32,FLEN) +NAN_BOXED(2126472891,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554431,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554432,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554433,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554435,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554439,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554447,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554463,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554495,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554559,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554687,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554943,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33555455,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33556479,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33558527,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33562623,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33570815,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33587199,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33619967,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33685503,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33816575,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(34078719,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(34603007,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(35651583,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(37748735,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(37748736,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(39845888,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(40894464,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41418752,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41680896,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41811968,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41877504,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41910272,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41926656,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41934848,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41938944,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41940992,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942016,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942528,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942784,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942912,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942976,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943008,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943024,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943032,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943036,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943038,32,FLEN) +NAN_BOXED(2126478067,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943039,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701376,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701377,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701379,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701383,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701391,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701407,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701439,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701503,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701631,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701887,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281702399,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281703423,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281705471,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-154.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-154.S new file mode 100644 index 000000000..6c65889d6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-154.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_19584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88001fff; valaddr_reg:x3; val_offset:58752*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58752*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88003fff; valaddr_reg:x3; val_offset:58755*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58755*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88007fff; valaddr_reg:x3; val_offset:58758*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58758*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8800ffff; valaddr_reg:x3; val_offset:58761*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58761*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8801ffff; valaddr_reg:x3; val_offset:58764*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58764*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8803ffff; valaddr_reg:x3; val_offset:58767*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58767*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x8807ffff; valaddr_reg:x3; val_offset:58770*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58770*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x880fffff; valaddr_reg:x3; val_offset:58773*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58773*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x881fffff; valaddr_reg:x3; val_offset:58776*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58776*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x883fffff; valaddr_reg:x3; val_offset:58779*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58779*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88400000; valaddr_reg:x3; val_offset:58782*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58782*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88600000; valaddr_reg:x3; val_offset:58785*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58785*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88700000; valaddr_reg:x3; val_offset:58788*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58788*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x88780000; valaddr_reg:x3; val_offset:58791*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58791*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887c0000; valaddr_reg:x3; val_offset:58794*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58794*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887e0000; valaddr_reg:x3; val_offset:58797*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58797*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887f0000; valaddr_reg:x3; val_offset:58800*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58800*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887f8000; valaddr_reg:x3; val_offset:58803*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58803*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887fc000; valaddr_reg:x3; val_offset:58806*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58806*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887fe000; valaddr_reg:x3; val_offset:58809*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58809*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887ff000; valaddr_reg:x3; val_offset:58812*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58812*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887ff800; valaddr_reg:x3; val_offset:58815*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58815*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887ffc00; valaddr_reg:x3; val_offset:58818*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58818*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887ffe00; valaddr_reg:x3; val_offset:58821*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58821*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887fff00; valaddr_reg:x3; val_offset:58824*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58824*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887fff80; valaddr_reg:x3; val_offset:58827*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58827*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887fffc0; valaddr_reg:x3; val_offset:58830*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58830*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887fffe0; valaddr_reg:x3; val_offset:58833*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58833*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887ffff0; valaddr_reg:x3; val_offset:58836*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58836*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887ffff8; valaddr_reg:x3; val_offset:58839*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58839*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887ffffc; valaddr_reg:x3; val_offset:58842*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58842*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887ffffe; valaddr_reg:x3; val_offset:58845*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58845*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x430c98 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec30c98; op2val:0x80000000; +op3val:0x887fffff; valaddr_reg:x3; val_offset:58848*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58848*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75800000; valaddr_reg:x3; val_offset:58851*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58851*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75800001; valaddr_reg:x3; val_offset:58854*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58854*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75800003; valaddr_reg:x3; val_offset:58857*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58857*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75800007; valaddr_reg:x3; val_offset:58860*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58860*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7580000f; valaddr_reg:x3; val_offset:58863*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58863*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7580001f; valaddr_reg:x3; val_offset:58866*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58866*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7580003f; valaddr_reg:x3; val_offset:58869*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58869*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7580007f; valaddr_reg:x3; val_offset:58872*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58872*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x758000ff; valaddr_reg:x3; val_offset:58875*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58875*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x758001ff; valaddr_reg:x3; val_offset:58878*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58878*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x758003ff; valaddr_reg:x3; val_offset:58881*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58881*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x758007ff; valaddr_reg:x3; val_offset:58884*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58884*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75800fff; valaddr_reg:x3; val_offset:58887*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58887*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75801fff; valaddr_reg:x3; val_offset:58890*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58890*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75803fff; valaddr_reg:x3; val_offset:58893*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58893*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75807fff; valaddr_reg:x3; val_offset:58896*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58896*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7580ffff; valaddr_reg:x3; val_offset:58899*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58899*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7581ffff; valaddr_reg:x3; val_offset:58902*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58902*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7583ffff; valaddr_reg:x3; val_offset:58905*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58905*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7587ffff; valaddr_reg:x3; val_offset:58908*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58908*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x758fffff; valaddr_reg:x3; val_offset:58911*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58911*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x759fffff; valaddr_reg:x3; val_offset:58914*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58914*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75bfffff; valaddr_reg:x3; val_offset:58917*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58917*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75c00000; valaddr_reg:x3; val_offset:58920*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58920*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75e00000; valaddr_reg:x3; val_offset:58923*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58923*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75f00000; valaddr_reg:x3; val_offset:58926*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58926*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75f80000; valaddr_reg:x3; val_offset:58929*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58929*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fc0000; valaddr_reg:x3; val_offset:58932*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58932*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fe0000; valaddr_reg:x3; val_offset:58935*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58935*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ff0000; valaddr_reg:x3; val_offset:58938*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58938*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ff8000; valaddr_reg:x3; val_offset:58941*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58941*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ffc000; valaddr_reg:x3; val_offset:58944*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58944*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ffe000; valaddr_reg:x3; val_offset:58947*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58947*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fff000; valaddr_reg:x3; val_offset:58950*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58950*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fff800; valaddr_reg:x3; val_offset:58953*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58953*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fffc00; valaddr_reg:x3; val_offset:58956*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58956*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fffe00; valaddr_reg:x3; val_offset:58959*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58959*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ffff00; valaddr_reg:x3; val_offset:58962*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58962*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ffff80; valaddr_reg:x3; val_offset:58965*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58965*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ffffc0; valaddr_reg:x3; val_offset:58968*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58968*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ffffe0; valaddr_reg:x3; val_offset:58971*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58971*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fffff0; valaddr_reg:x3; val_offset:58974*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58974*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fffff8; valaddr_reg:x3; val_offset:58977*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58977*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fffffc; valaddr_reg:x3; val_offset:58980*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58980*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75fffffe; valaddr_reg:x3; val_offset:58983*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58983*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xeb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x75ffffff; valaddr_reg:x3; val_offset:58986*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58986*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f000001; valaddr_reg:x3; val_offset:58989*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58989*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f000003; valaddr_reg:x3; val_offset:58992*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58992*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f000007; valaddr_reg:x3; val_offset:58995*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58995*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f199999; valaddr_reg:x3; val_offset:58998*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 58998*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f249249; valaddr_reg:x3; val_offset:59001*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59001*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f333333; valaddr_reg:x3; val_offset:59004*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59004*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:59007*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59007*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:59010*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59010*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f444444; valaddr_reg:x3; val_offset:59013*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59013*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:59016*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59016*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:59019*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59019*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f666666; valaddr_reg:x3; val_offset:59022*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59022*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:59025*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59025*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:59028*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59028*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:59031*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59031*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x43331c and fs2 == 0 and fe2 == 0x80 and fm2 == 0x27de80 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec3331c; op2val:0x4027de80; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:59034*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59034*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:59037*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59037*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:59040*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59040*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:59043*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59043*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:59046*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59046*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:59049*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59049*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:59052*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59052*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:59055*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59055*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:59058*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59058*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:59061*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59061*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:59064*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59064*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:59067*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59067*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:59070*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59070*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:59073*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59073*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:59076*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59076*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:59079*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59079*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:59082*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59082*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82000000; valaddr_reg:x3; val_offset:59085*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59085*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82000001; valaddr_reg:x3; val_offset:59088*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59088*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82000003; valaddr_reg:x3; val_offset:59091*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59091*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82000007; valaddr_reg:x3; val_offset:59094*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59094*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8200000f; valaddr_reg:x3; val_offset:59097*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59097*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8200001f; valaddr_reg:x3; val_offset:59100*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59100*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8200003f; valaddr_reg:x3; val_offset:59103*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59103*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8200007f; valaddr_reg:x3; val_offset:59106*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59106*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x820000ff; valaddr_reg:x3; val_offset:59109*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59109*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x820001ff; valaddr_reg:x3; val_offset:59112*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59112*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x820003ff; valaddr_reg:x3; val_offset:59115*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59115*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x820007ff; valaddr_reg:x3; val_offset:59118*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59118*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82000fff; valaddr_reg:x3; val_offset:59121*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59121*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82001fff; valaddr_reg:x3; val_offset:59124*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59124*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82003fff; valaddr_reg:x3; val_offset:59127*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59127*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82007fff; valaddr_reg:x3; val_offset:59130*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59130*0 + 3*153*FLEN/8, x4, x1, x2) + +inst_19711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8200ffff; valaddr_reg:x3; val_offset:59133*0 + 3*153*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59133*0 + 3*153*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281709567,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281717759,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281734143,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281766911,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281832447,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281963519,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2282225663,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2282749951,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2283798527,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2285895679,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2285895680,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2287992832,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289041408,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289565696,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289827840,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289958912,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290024448,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290057216,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290073600,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290081792,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290085888,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290087936,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290088960,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089472,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089728,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089856,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089920,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089952,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089968,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089976,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089980,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089982,32,FLEN) +NAN_BOXED(2126711960,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089983,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971322880,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971322881,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971322883,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971322887,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971322895,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971322911,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971322943,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971323007,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971323135,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971323391,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971323903,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971324927,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971326975,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971331071,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971339263,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971355647,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971388415,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971453951,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971585023,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1971847167,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1972371455,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1973420031,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1975517183,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1975517184,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1977614336,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1978662912,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979187200,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979449344,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979580416,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979645952,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979678720,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979695104,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979703296,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979707392,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979709440,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979710464,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979710976,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711232,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711360,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711424,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711456,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711472,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711480,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711484,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711486,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(1979711487,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2126721820,32,FLEN) +NAN_BOXED(1076354688,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038080,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038081,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038083,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038087,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038095,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038111,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038143,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038207,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038335,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038591,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181039103,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181040127,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181042175,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181046271,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181054463,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181070847,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181103615,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-155.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-155.S new file mode 100644 index 000000000..2a13b687b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-155.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_19712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8201ffff; valaddr_reg:x3; val_offset:59136*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59136*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8203ffff; valaddr_reg:x3; val_offset:59139*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59139*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x8207ffff; valaddr_reg:x3; val_offset:59142*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59142*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x820fffff; valaddr_reg:x3; val_offset:59145*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59145*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x821fffff; valaddr_reg:x3; val_offset:59148*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59148*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x823fffff; valaddr_reg:x3; val_offset:59151*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59151*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82400000; valaddr_reg:x3; val_offset:59154*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59154*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82600000; valaddr_reg:x3; val_offset:59157*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59157*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82700000; valaddr_reg:x3; val_offset:59160*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59160*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x82780000; valaddr_reg:x3; val_offset:59163*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59163*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827c0000; valaddr_reg:x3; val_offset:59166*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59166*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827e0000; valaddr_reg:x3; val_offset:59169*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59169*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827f0000; valaddr_reg:x3; val_offset:59172*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59172*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827f8000; valaddr_reg:x3; val_offset:59175*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59175*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827fc000; valaddr_reg:x3; val_offset:59178*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59178*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827fe000; valaddr_reg:x3; val_offset:59181*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59181*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827ff000; valaddr_reg:x3; val_offset:59184*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59184*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827ff800; valaddr_reg:x3; val_offset:59187*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59187*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827ffc00; valaddr_reg:x3; val_offset:59190*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59190*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827ffe00; valaddr_reg:x3; val_offset:59193*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59193*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827fff00; valaddr_reg:x3; val_offset:59196*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59196*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827fff80; valaddr_reg:x3; val_offset:59199*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59199*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827fffc0; valaddr_reg:x3; val_offset:59202*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59202*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827fffe0; valaddr_reg:x3; val_offset:59205*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59205*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827ffff0; valaddr_reg:x3; val_offset:59208*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59208*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827ffff8; valaddr_reg:x3; val_offset:59211*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59211*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827ffffc; valaddr_reg:x3; val_offset:59214*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59214*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827ffffe; valaddr_reg:x3; val_offset:59217*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59217*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x46e94e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec6e94e; op2val:0x80000000; +op3val:0x827fffff; valaddr_reg:x3; val_offset:59220*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59220*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:59223*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59223*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:59226*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59226*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:59229*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59229*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:59232*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59232*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:59235*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59235*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:59238*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59238*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:59241*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59241*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:59244*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59244*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:59247*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59247*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:59250*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59250*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:59253*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59253*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:59256*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59256*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:59259*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59259*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:59262*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59262*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:59265*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59265*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:59268*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59268*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81000000; valaddr_reg:x3; val_offset:59271*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59271*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81000001; valaddr_reg:x3; val_offset:59274*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59274*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81000003; valaddr_reg:x3; val_offset:59277*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59277*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81000007; valaddr_reg:x3; val_offset:59280*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59280*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x8100000f; valaddr_reg:x3; val_offset:59283*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59283*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x8100001f; valaddr_reg:x3; val_offset:59286*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59286*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x8100003f; valaddr_reg:x3; val_offset:59289*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59289*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x8100007f; valaddr_reg:x3; val_offset:59292*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59292*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x810000ff; valaddr_reg:x3; val_offset:59295*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59295*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x810001ff; valaddr_reg:x3; val_offset:59298*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59298*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x810003ff; valaddr_reg:x3; val_offset:59301*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59301*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x810007ff; valaddr_reg:x3; val_offset:59304*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59304*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81000fff; valaddr_reg:x3; val_offset:59307*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59307*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81001fff; valaddr_reg:x3; val_offset:59310*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59310*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81003fff; valaddr_reg:x3; val_offset:59313*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59313*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81007fff; valaddr_reg:x3; val_offset:59316*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59316*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x8100ffff; valaddr_reg:x3; val_offset:59319*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59319*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x8101ffff; valaddr_reg:x3; val_offset:59322*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59322*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x8103ffff; valaddr_reg:x3; val_offset:59325*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59325*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x8107ffff; valaddr_reg:x3; val_offset:59328*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59328*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x810fffff; valaddr_reg:x3; val_offset:59331*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59331*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x811fffff; valaddr_reg:x3; val_offset:59334*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59334*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x813fffff; valaddr_reg:x3; val_offset:59337*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59337*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81400000; valaddr_reg:x3; val_offset:59340*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59340*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81600000; valaddr_reg:x3; val_offset:59343*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59343*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81700000; valaddr_reg:x3; val_offset:59346*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59346*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x81780000; valaddr_reg:x3; val_offset:59349*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59349*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817c0000; valaddr_reg:x3; val_offset:59352*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59352*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817e0000; valaddr_reg:x3; val_offset:59355*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59355*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817f0000; valaddr_reg:x3; val_offset:59358*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59358*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817f8000; valaddr_reg:x3; val_offset:59361*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59361*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817fc000; valaddr_reg:x3; val_offset:59364*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59364*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817fe000; valaddr_reg:x3; val_offset:59367*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59367*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817ff000; valaddr_reg:x3; val_offset:59370*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59370*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817ff800; valaddr_reg:x3; val_offset:59373*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59373*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817ffc00; valaddr_reg:x3; val_offset:59376*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59376*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817ffe00; valaddr_reg:x3; val_offset:59379*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59379*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817fff00; valaddr_reg:x3; val_offset:59382*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59382*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817fff80; valaddr_reg:x3; val_offset:59385*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59385*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817fffc0; valaddr_reg:x3; val_offset:59388*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59388*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817fffe0; valaddr_reg:x3; val_offset:59391*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59391*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817ffff0; valaddr_reg:x3; val_offset:59394*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59394*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817ffff8; valaddr_reg:x3; val_offset:59397*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59397*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817ffffc; valaddr_reg:x3; val_offset:59400*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59400*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817ffffe; valaddr_reg:x3; val_offset:59403*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59403*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x474c7e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec74c7e; op2val:0x80000000; +op3val:0x817fffff; valaddr_reg:x3; val_offset:59406*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59406*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe000000; valaddr_reg:x3; val_offset:59409*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59409*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe000001; valaddr_reg:x3; val_offset:59412*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59412*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe000003; valaddr_reg:x3; val_offset:59415*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59415*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe000007; valaddr_reg:x3; val_offset:59418*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59418*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe00000f; valaddr_reg:x3; val_offset:59421*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59421*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe00001f; valaddr_reg:x3; val_offset:59424*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59424*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe00003f; valaddr_reg:x3; val_offset:59427*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59427*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe00007f; valaddr_reg:x3; val_offset:59430*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59430*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe0000ff; valaddr_reg:x3; val_offset:59433*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59433*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe0001ff; valaddr_reg:x3; val_offset:59436*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59436*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe0003ff; valaddr_reg:x3; val_offset:59439*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59439*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe0007ff; valaddr_reg:x3; val_offset:59442*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59442*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe000fff; valaddr_reg:x3; val_offset:59445*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59445*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe001fff; valaddr_reg:x3; val_offset:59448*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59448*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe003fff; valaddr_reg:x3; val_offset:59451*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59451*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe007fff; valaddr_reg:x3; val_offset:59454*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59454*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe00ffff; valaddr_reg:x3; val_offset:59457*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59457*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe01ffff; valaddr_reg:x3; val_offset:59460*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59460*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe03ffff; valaddr_reg:x3; val_offset:59463*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59463*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe07ffff; valaddr_reg:x3; val_offset:59466*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59466*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe0fffff; valaddr_reg:x3; val_offset:59469*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59469*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe1fffff; valaddr_reg:x3; val_offset:59472*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59472*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe3fffff; valaddr_reg:x3; val_offset:59475*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59475*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe400000; valaddr_reg:x3; val_offset:59478*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59478*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe600000; valaddr_reg:x3; val_offset:59481*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59481*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe700000; valaddr_reg:x3; val_offset:59484*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59484*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe780000; valaddr_reg:x3; val_offset:59487*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59487*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7c0000; valaddr_reg:x3; val_offset:59490*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59490*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7e0000; valaddr_reg:x3; val_offset:59493*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59493*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7f0000; valaddr_reg:x3; val_offset:59496*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59496*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7f8000; valaddr_reg:x3; val_offset:59499*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59499*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7fc000; valaddr_reg:x3; val_offset:59502*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59502*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7fe000; valaddr_reg:x3; val_offset:59505*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59505*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7ff000; valaddr_reg:x3; val_offset:59508*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59508*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7ff800; valaddr_reg:x3; val_offset:59511*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59511*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7ffc00; valaddr_reg:x3; val_offset:59514*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59514*0 + 3*154*FLEN/8, x4, x1, x2) + +inst_19839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7ffe00; valaddr_reg:x3; val_offset:59517*0 + 3*154*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59517*0 + 3*154*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181169151,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181300223,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181562367,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2182086655,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2183135231,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2185232383,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2185232384,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2187329536,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2188378112,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2188902400,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189164544,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189295616,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189361152,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189393920,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189410304,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189418496,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189422592,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189424640,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189425664,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426176,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426432,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426560,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426624,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426656,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426672,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426680,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426684,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426686,32,FLEN) +NAN_BOXED(2126965070,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426687,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260864,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260865,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260867,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260871,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260879,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260895,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260927,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260991,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261119,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261375,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261887,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164262911,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164264959,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164269055,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164277247,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164293631,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164326399,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164391935,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164523007,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164785151,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2165309439,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2166358015,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2168455167,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2168455168,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2170552320,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2171600896,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172125184,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172387328,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172518400,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172583936,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172616704,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172633088,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172641280,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172645376,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172647424,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172648448,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172648960,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649216,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649344,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649408,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649440,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649456,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649464,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649468,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649470,32,FLEN) +NAN_BOXED(2126990462,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649471,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261412864,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261412865,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261412867,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261412871,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261412879,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261412895,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261412927,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261412991,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261413119,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261413375,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261413887,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261414911,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261416959,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261421055,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261429247,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261445631,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261478399,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261543935,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261675007,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4261937151,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4262461439,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4263510015,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4265607167,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4265607168,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4267704320,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4268752896,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269277184,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269539328,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269670400,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269735936,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269768704,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269785088,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269793280,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269797376,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269799424,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269800448,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269800960,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-156.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-156.S new file mode 100644 index 000000000..521e7b0de --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-156.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_19840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7fff00; valaddr_reg:x3; val_offset:59520*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59520*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7fff80; valaddr_reg:x3; val_offset:59523*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59523*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7fffc0; valaddr_reg:x3; val_offset:59526*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59526*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7fffe0; valaddr_reg:x3; val_offset:59529*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59529*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7ffff0; valaddr_reg:x3; val_offset:59532*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59532*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7ffff8; valaddr_reg:x3; val_offset:59535*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59535*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7ffffc; valaddr_reg:x3; val_offset:59538*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59538*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7ffffe; valaddr_reg:x3; val_offset:59541*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59541*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xfe7fffff; valaddr_reg:x3; val_offset:59544*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59544*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff000001; valaddr_reg:x3; val_offset:59547*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59547*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff000003; valaddr_reg:x3; val_offset:59550*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59550*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff000007; valaddr_reg:x3; val_offset:59553*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59553*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff199999; valaddr_reg:x3; val_offset:59556*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59556*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff249249; valaddr_reg:x3; val_offset:59559*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59559*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff333333; valaddr_reg:x3; val_offset:59562*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59562*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:59565*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59565*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:59568*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59568*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff444444; valaddr_reg:x3; val_offset:59571*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59571*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:59574*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59574*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:59577*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59577*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff666666; valaddr_reg:x3; val_offset:59580*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59580*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:59583*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59583*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:59586*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59586*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:59589*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59589*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x479dc5 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x2427a9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec79dc5; op2val:0xc02427a9; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:59592*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59592*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:59595*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59595*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:59598*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59598*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:59601*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59601*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:59604*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59604*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:59607*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59607*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:59610*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59610*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:59613*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59613*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:59616*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59616*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:59619*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59619*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:59622*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59622*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:59625*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59625*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:59628*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59628*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:59631*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59631*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:59634*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59634*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:59637*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59637*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:59640*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59640*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe800000; valaddr_reg:x3; val_offset:59643*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59643*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe800001; valaddr_reg:x3; val_offset:59646*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59646*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe800003; valaddr_reg:x3; val_offset:59649*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59649*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe800007; valaddr_reg:x3; val_offset:59652*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59652*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe80000f; valaddr_reg:x3; val_offset:59655*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59655*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe80001f; valaddr_reg:x3; val_offset:59658*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59658*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe80003f; valaddr_reg:x3; val_offset:59661*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59661*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe80007f; valaddr_reg:x3; val_offset:59664*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59664*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe8000ff; valaddr_reg:x3; val_offset:59667*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59667*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe8001ff; valaddr_reg:x3; val_offset:59670*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59670*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe8003ff; valaddr_reg:x3; val_offset:59673*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59673*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe8007ff; valaddr_reg:x3; val_offset:59676*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59676*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe800fff; valaddr_reg:x3; val_offset:59679*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59679*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe801fff; valaddr_reg:x3; val_offset:59682*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59682*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe803fff; valaddr_reg:x3; val_offset:59685*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59685*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe807fff; valaddr_reg:x3; val_offset:59688*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59688*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe80ffff; valaddr_reg:x3; val_offset:59691*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59691*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe81ffff; valaddr_reg:x3; val_offset:59694*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59694*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe83ffff; valaddr_reg:x3; val_offset:59697*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59697*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe87ffff; valaddr_reg:x3; val_offset:59700*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59700*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe8fffff; valaddr_reg:x3; val_offset:59703*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59703*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xe9fffff; valaddr_reg:x3; val_offset:59706*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59706*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xebfffff; valaddr_reg:x3; val_offset:59709*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59709*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xec00000; valaddr_reg:x3; val_offset:59712*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59712*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xee00000; valaddr_reg:x3; val_offset:59715*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59715*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xef00000; valaddr_reg:x3; val_offset:59718*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59718*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xef80000; valaddr_reg:x3; val_offset:59721*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59721*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefc0000; valaddr_reg:x3; val_offset:59724*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59724*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefe0000; valaddr_reg:x3; val_offset:59727*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59727*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeff0000; valaddr_reg:x3; val_offset:59730*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59730*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeff8000; valaddr_reg:x3; val_offset:59733*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59733*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeffc000; valaddr_reg:x3; val_offset:59736*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59736*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeffe000; valaddr_reg:x3; val_offset:59739*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59739*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefff000; valaddr_reg:x3; val_offset:59742*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59742*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefff800; valaddr_reg:x3; val_offset:59745*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59745*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefffc00; valaddr_reg:x3; val_offset:59748*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59748*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefffe00; valaddr_reg:x3; val_offset:59751*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59751*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeffff00; valaddr_reg:x3; val_offset:59754*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59754*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeffff80; valaddr_reg:x3; val_offset:59757*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59757*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeffffc0; valaddr_reg:x3; val_offset:59760*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59760*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeffffe0; valaddr_reg:x3; val_offset:59763*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59763*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefffff0; valaddr_reg:x3; val_offset:59766*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59766*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefffff8; valaddr_reg:x3; val_offset:59769*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59769*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefffffc; valaddr_reg:x3; val_offset:59772*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59772*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xefffffe; valaddr_reg:x3; val_offset:59775*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59775*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x483325 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec83325; op2val:0x0; +op3val:0xeffffff; valaddr_reg:x3; val_offset:59778*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59778*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24800000; valaddr_reg:x3; val_offset:59781*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59781*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24800001; valaddr_reg:x3; val_offset:59784*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59784*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24800003; valaddr_reg:x3; val_offset:59787*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59787*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24800007; valaddr_reg:x3; val_offset:59790*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59790*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x2480000f; valaddr_reg:x3; val_offset:59793*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59793*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x2480001f; valaddr_reg:x3; val_offset:59796*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59796*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x2480003f; valaddr_reg:x3; val_offset:59799*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59799*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x2480007f; valaddr_reg:x3; val_offset:59802*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59802*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x248000ff; valaddr_reg:x3; val_offset:59805*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59805*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x248001ff; valaddr_reg:x3; val_offset:59808*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59808*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x248003ff; valaddr_reg:x3; val_offset:59811*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59811*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x248007ff; valaddr_reg:x3; val_offset:59814*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59814*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24800fff; valaddr_reg:x3; val_offset:59817*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59817*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24801fff; valaddr_reg:x3; val_offset:59820*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59820*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24803fff; valaddr_reg:x3; val_offset:59823*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59823*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24807fff; valaddr_reg:x3; val_offset:59826*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59826*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x2480ffff; valaddr_reg:x3; val_offset:59829*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59829*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x2481ffff; valaddr_reg:x3; val_offset:59832*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59832*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x2483ffff; valaddr_reg:x3; val_offset:59835*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59835*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x2487ffff; valaddr_reg:x3; val_offset:59838*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59838*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x248fffff; valaddr_reg:x3; val_offset:59841*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59841*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x249fffff; valaddr_reg:x3; val_offset:59844*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59844*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24bfffff; valaddr_reg:x3; val_offset:59847*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59847*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24c00000; valaddr_reg:x3; val_offset:59850*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59850*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24e00000; valaddr_reg:x3; val_offset:59853*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59853*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24f00000; valaddr_reg:x3; val_offset:59856*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59856*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24f80000; valaddr_reg:x3; val_offset:59859*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59859*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fc0000; valaddr_reg:x3; val_offset:59862*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59862*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fe0000; valaddr_reg:x3; val_offset:59865*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59865*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ff0000; valaddr_reg:x3; val_offset:59868*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59868*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ff8000; valaddr_reg:x3; val_offset:59871*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59871*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ffc000; valaddr_reg:x3; val_offset:59874*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59874*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ffe000; valaddr_reg:x3; val_offset:59877*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59877*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fff000; valaddr_reg:x3; val_offset:59880*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59880*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fff800; valaddr_reg:x3; val_offset:59883*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59883*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fffc00; valaddr_reg:x3; val_offset:59886*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59886*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fffe00; valaddr_reg:x3; val_offset:59889*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59889*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ffff00; valaddr_reg:x3; val_offset:59892*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59892*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ffff80; valaddr_reg:x3; val_offset:59895*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59895*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ffffc0; valaddr_reg:x3; val_offset:59898*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59898*0 + 3*155*FLEN/8, x4, x1, x2) + +inst_19967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ffffe0; valaddr_reg:x3; val_offset:59901*0 + 3*155*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59901*0 + 3*155*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801216,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801344,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801408,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801440,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801456,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801464,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801468,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801470,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4269801471,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2127011269,32,FLEN) +NAN_BOXED(3223594921,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269632,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269633,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269635,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269639,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269647,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269663,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269695,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269759,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269887,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243270143,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243270655,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243271679,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243273727,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243277823,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243286015,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243302399,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243335167,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243400703,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243531775,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243793919,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(244318207,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(245366783,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(247463935,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(247463936,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(249561088,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(250609664,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251133952,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251396096,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251527168,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251592704,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251625472,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251641856,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251650048,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251654144,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251656192,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657216,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657728,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657984,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658112,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658176,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658208,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658224,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658232,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658236,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658238,32,FLEN) +NAN_BOXED(2127049509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658239,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368384,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368385,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368387,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368391,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368399,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368415,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368447,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368511,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368639,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612368895,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612369407,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612370431,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612372479,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612376575,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612384767,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612401151,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612433919,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612499455,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612630527,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(612892671,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(613416959,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(614465535,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(616562687,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(616562688,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(618659840,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(619708416,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620232704,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620494848,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620625920,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620691456,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620724224,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620740608,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620748800,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620752896,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620754944,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620755968,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756480,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756736,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756864,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756928,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756960,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-157.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-157.S new file mode 100644 index 000000000..ed03f2937 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-157.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_19968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fffff0; valaddr_reg:x3; val_offset:59904*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59904*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fffff8; valaddr_reg:x3; val_offset:59907*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59907*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fffffc; valaddr_reg:x3; val_offset:59910*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59910*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24fffffe; valaddr_reg:x3; val_offset:59913*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59913*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x49 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x24ffffff; valaddr_reg:x3; val_offset:59916*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59916*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3f800001; valaddr_reg:x3; val_offset:59919*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59919*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3f800003; valaddr_reg:x3; val_offset:59922*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59922*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3f800007; valaddr_reg:x3; val_offset:59925*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59925*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3f999999; valaddr_reg:x3; val_offset:59928*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59928*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:59931*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59931*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:59934*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59934*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:59937*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59937*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:59940*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59940*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:59943*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59943*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:59946*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59946*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:59949*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59949*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:59952*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59952*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:59955*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59955*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:59958*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59958*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:59961*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59961*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x485e0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x51c511 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec85e0d; op2val:0x51c511; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:59964*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59964*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:59967*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59967*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:59970*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59970*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:59973*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59973*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:59976*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59976*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:59979*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59979*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:59982*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59982*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:59985*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59985*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:59988*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59988*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:59991*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59991*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:59994*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59994*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_19999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:59997*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 59997*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:60000*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60000*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:60003*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60003*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:60006*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60006*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:60009*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60009*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:60012*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60012*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4000000; valaddr_reg:x3; val_offset:60015*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60015*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4000001; valaddr_reg:x3; val_offset:60018*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60018*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4000003; valaddr_reg:x3; val_offset:60021*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60021*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4000007; valaddr_reg:x3; val_offset:60024*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60024*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x400000f; valaddr_reg:x3; val_offset:60027*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60027*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x400001f; valaddr_reg:x3; val_offset:60030*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60030*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x400003f; valaddr_reg:x3; val_offset:60033*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60033*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x400007f; valaddr_reg:x3; val_offset:60036*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60036*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x40000ff; valaddr_reg:x3; val_offset:60039*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60039*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x40001ff; valaddr_reg:x3; val_offset:60042*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60042*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x40003ff; valaddr_reg:x3; val_offset:60045*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60045*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x40007ff; valaddr_reg:x3; val_offset:60048*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60048*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4000fff; valaddr_reg:x3; val_offset:60051*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60051*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4001fff; valaddr_reg:x3; val_offset:60054*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60054*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4003fff; valaddr_reg:x3; val_offset:60057*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60057*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4007fff; valaddr_reg:x3; val_offset:60060*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60060*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x400ffff; valaddr_reg:x3; val_offset:60063*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60063*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x401ffff; valaddr_reg:x3; val_offset:60066*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60066*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x403ffff; valaddr_reg:x3; val_offset:60069*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60069*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x407ffff; valaddr_reg:x3; val_offset:60072*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60072*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x40fffff; valaddr_reg:x3; val_offset:60075*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60075*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x41fffff; valaddr_reg:x3; val_offset:60078*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60078*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x43fffff; valaddr_reg:x3; val_offset:60081*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60081*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4400000; valaddr_reg:x3; val_offset:60084*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60084*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4600000; valaddr_reg:x3; val_offset:60087*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60087*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4700000; valaddr_reg:x3; val_offset:60090*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60090*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x4780000; valaddr_reg:x3; val_offset:60093*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60093*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47c0000; valaddr_reg:x3; val_offset:60096*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60096*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47e0000; valaddr_reg:x3; val_offset:60099*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60099*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47f0000; valaddr_reg:x3; val_offset:60102*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60102*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47f8000; valaddr_reg:x3; val_offset:60105*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60105*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47fc000; valaddr_reg:x3; val_offset:60108*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60108*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47fe000; valaddr_reg:x3; val_offset:60111*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60111*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47ff000; valaddr_reg:x3; val_offset:60114*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60114*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47ff800; valaddr_reg:x3; val_offset:60117*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60117*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47ffc00; valaddr_reg:x3; val_offset:60120*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60120*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47ffe00; valaddr_reg:x3; val_offset:60123*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60123*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47fff00; valaddr_reg:x3; val_offset:60126*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60126*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47fff80; valaddr_reg:x3; val_offset:60129*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60129*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47fffc0; valaddr_reg:x3; val_offset:60132*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60132*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47fffe0; valaddr_reg:x3; val_offset:60135*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60135*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47ffff0; valaddr_reg:x3; val_offset:60138*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60138*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47ffff8; valaddr_reg:x3; val_offset:60141*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60141*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47ffffc; valaddr_reg:x3; val_offset:60144*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60144*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47ffffe; valaddr_reg:x3; val_offset:60147*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60147*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x48d9ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec8d9ed; op2val:0x0; +op3val:0x47fffff; valaddr_reg:x3; val_offset:60150*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60150*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24000000; valaddr_reg:x3; val_offset:60153*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60153*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24000001; valaddr_reg:x3; val_offset:60156*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60156*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24000003; valaddr_reg:x3; val_offset:60159*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60159*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24000007; valaddr_reg:x3; val_offset:60162*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60162*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x2400000f; valaddr_reg:x3; val_offset:60165*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60165*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x2400001f; valaddr_reg:x3; val_offset:60168*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60168*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x2400003f; valaddr_reg:x3; val_offset:60171*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60171*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x2400007f; valaddr_reg:x3; val_offset:60174*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60174*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x240000ff; valaddr_reg:x3; val_offset:60177*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60177*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x240001ff; valaddr_reg:x3; val_offset:60180*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60180*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x240003ff; valaddr_reg:x3; val_offset:60183*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60183*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x240007ff; valaddr_reg:x3; val_offset:60186*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60186*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24000fff; valaddr_reg:x3; val_offset:60189*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60189*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24001fff; valaddr_reg:x3; val_offset:60192*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60192*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24003fff; valaddr_reg:x3; val_offset:60195*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60195*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24007fff; valaddr_reg:x3; val_offset:60198*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60198*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x2400ffff; valaddr_reg:x3; val_offset:60201*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60201*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x2401ffff; valaddr_reg:x3; val_offset:60204*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60204*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x2403ffff; valaddr_reg:x3; val_offset:60207*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60207*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x2407ffff; valaddr_reg:x3; val_offset:60210*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60210*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x240fffff; valaddr_reg:x3; val_offset:60213*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60213*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x241fffff; valaddr_reg:x3; val_offset:60216*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60216*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x243fffff; valaddr_reg:x3; val_offset:60219*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60219*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24400000; valaddr_reg:x3; val_offset:60222*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60222*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24600000; valaddr_reg:x3; val_offset:60225*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60225*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24700000; valaddr_reg:x3; val_offset:60228*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60228*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x24780000; valaddr_reg:x3; val_offset:60231*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60231*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247c0000; valaddr_reg:x3; val_offset:60234*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60234*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247e0000; valaddr_reg:x3; val_offset:60237*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60237*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247f0000; valaddr_reg:x3; val_offset:60240*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60240*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247f8000; valaddr_reg:x3; val_offset:60243*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60243*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247fc000; valaddr_reg:x3; val_offset:60246*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60246*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247fe000; valaddr_reg:x3; val_offset:60249*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60249*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247ff000; valaddr_reg:x3; val_offset:60252*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60252*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247ff800; valaddr_reg:x3; val_offset:60255*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60255*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247ffc00; valaddr_reg:x3; val_offset:60258*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60258*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247ffe00; valaddr_reg:x3; val_offset:60261*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60261*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247fff00; valaddr_reg:x3; val_offset:60264*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60264*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247fff80; valaddr_reg:x3; val_offset:60267*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60267*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247fffc0; valaddr_reg:x3; val_offset:60270*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60270*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247fffe0; valaddr_reg:x3; val_offset:60273*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60273*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247ffff0; valaddr_reg:x3; val_offset:60276*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60276*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247ffff8; valaddr_reg:x3; val_offset:60279*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60279*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247ffffc; valaddr_reg:x3; val_offset:60282*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60282*0 + 3*156*FLEN/8, x4, x1, x2) + +inst_20095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247ffffe; valaddr_reg:x3; val_offset:60285*0 + 3*156*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60285*0 + 3*156*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756976,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756984,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756988,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756990,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(620756991,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2127060493,32,FLEN) +NAN_BOXED(5358865,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108864,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108865,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108867,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108871,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108879,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108895,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108927,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108991,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109119,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109375,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109887,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67110911,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67112959,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67117055,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67125247,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67141631,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67174399,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67239935,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67371007,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67633151,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(68157439,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(69206015,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(71303167,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(71303168,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(73400320,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(74448896,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(74973184,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75235328,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75366400,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75431936,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75464704,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75481088,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75489280,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75493376,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75495424,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75496448,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75496960,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497216,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497344,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497408,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497440,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497456,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497464,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497468,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497470,32,FLEN) +NAN_BOXED(2127092205,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497471,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603979776,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603979777,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603979779,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603979783,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603979791,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603979807,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603979839,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603979903,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603980031,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603980287,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603980799,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603981823,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603983871,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603987967,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(603996159,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(604012543,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(604045311,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(604110847,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(604241919,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(604504063,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(605028351,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(606076927,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(608174079,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(608174080,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(610271232,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(611319808,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(611844096,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612106240,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612237312,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612302848,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612335616,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612352000,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612360192,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612364288,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612366336,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612367360,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612367872,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368128,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368256,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368320,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368352,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368368,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368376,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368380,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368382,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-158.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-158.S new file mode 100644 index 000000000..be171b924 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-158.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_20096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x48 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x247fffff; valaddr_reg:x3; val_offset:60288*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60288*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3f800001; valaddr_reg:x3; val_offset:60291*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60291*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3f800003; valaddr_reg:x3; val_offset:60294*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60294*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3f800007; valaddr_reg:x3; val_offset:60297*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60297*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3f999999; valaddr_reg:x3; val_offset:60300*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60300*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:60303*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60303*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:60306*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60306*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:60309*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60309*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:60312*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60312*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:60315*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60315*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:60318*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60318*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:60321*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60321*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:60324*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60324*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:60327*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60327*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:60330*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60330*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:60333*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60333*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x496fb6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x5155fa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec96fb6; op2val:0x5155fa; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:60336*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60336*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:60339*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60339*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:60342*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60342*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:60345*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60345*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:60348*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60348*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:60351*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60351*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:60354*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60354*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:60357*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60357*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:60360*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60360*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:60363*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60363*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:60366*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60366*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:60369*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60369*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:60372*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60372*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:60375*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60375*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:60378*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60378*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:60381*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60381*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:60384*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60384*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88000000; valaddr_reg:x3; val_offset:60387*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60387*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88000001; valaddr_reg:x3; val_offset:60390*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60390*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88000003; valaddr_reg:x3; val_offset:60393*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60393*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88000007; valaddr_reg:x3; val_offset:60396*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60396*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8800000f; valaddr_reg:x3; val_offset:60399*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60399*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8800001f; valaddr_reg:x3; val_offset:60402*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60402*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8800003f; valaddr_reg:x3; val_offset:60405*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60405*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8800007f; valaddr_reg:x3; val_offset:60408*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60408*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x880000ff; valaddr_reg:x3; val_offset:60411*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60411*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x880001ff; valaddr_reg:x3; val_offset:60414*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60414*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x880003ff; valaddr_reg:x3; val_offset:60417*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60417*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x880007ff; valaddr_reg:x3; val_offset:60420*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60420*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88000fff; valaddr_reg:x3; val_offset:60423*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60423*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88001fff; valaddr_reg:x3; val_offset:60426*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60426*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88003fff; valaddr_reg:x3; val_offset:60429*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60429*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88007fff; valaddr_reg:x3; val_offset:60432*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60432*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8800ffff; valaddr_reg:x3; val_offset:60435*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60435*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8801ffff; valaddr_reg:x3; val_offset:60438*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60438*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8803ffff; valaddr_reg:x3; val_offset:60441*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60441*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x8807ffff; valaddr_reg:x3; val_offset:60444*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60444*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x880fffff; valaddr_reg:x3; val_offset:60447*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60447*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x881fffff; valaddr_reg:x3; val_offset:60450*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60450*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x883fffff; valaddr_reg:x3; val_offset:60453*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60453*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88400000; valaddr_reg:x3; val_offset:60456*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60456*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88600000; valaddr_reg:x3; val_offset:60459*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60459*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88700000; valaddr_reg:x3; val_offset:60462*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60462*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x88780000; valaddr_reg:x3; val_offset:60465*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60465*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887c0000; valaddr_reg:x3; val_offset:60468*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60468*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887e0000; valaddr_reg:x3; val_offset:60471*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60471*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887f0000; valaddr_reg:x3; val_offset:60474*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60474*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887f8000; valaddr_reg:x3; val_offset:60477*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60477*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887fc000; valaddr_reg:x3; val_offset:60480*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60480*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887fe000; valaddr_reg:x3; val_offset:60483*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60483*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887ff000; valaddr_reg:x3; val_offset:60486*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60486*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887ff800; valaddr_reg:x3; val_offset:60489*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60489*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887ffc00; valaddr_reg:x3; val_offset:60492*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60492*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887ffe00; valaddr_reg:x3; val_offset:60495*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60495*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887fff00; valaddr_reg:x3; val_offset:60498*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60498*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887fff80; valaddr_reg:x3; val_offset:60501*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60501*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887fffc0; valaddr_reg:x3; val_offset:60504*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60504*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887fffe0; valaddr_reg:x3; val_offset:60507*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60507*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887ffff0; valaddr_reg:x3; val_offset:60510*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60510*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887ffff8; valaddr_reg:x3; val_offset:60513*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60513*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887ffffc; valaddr_reg:x3; val_offset:60516*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60516*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887ffffe; valaddr_reg:x3; val_offset:60519*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60519*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x49e9c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ec9e9c9; op2val:0x80000000; +op3val:0x887fffff; valaddr_reg:x3; val_offset:60522*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60522*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4800000; valaddr_reg:x3; val_offset:60525*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60525*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4800001; valaddr_reg:x3; val_offset:60528*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60528*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4800003; valaddr_reg:x3; val_offset:60531*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60531*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4800007; valaddr_reg:x3; val_offset:60534*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60534*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf480000f; valaddr_reg:x3; val_offset:60537*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60537*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf480001f; valaddr_reg:x3; val_offset:60540*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60540*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf480003f; valaddr_reg:x3; val_offset:60543*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60543*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf480007f; valaddr_reg:x3; val_offset:60546*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60546*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf48000ff; valaddr_reg:x3; val_offset:60549*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60549*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf48001ff; valaddr_reg:x3; val_offset:60552*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60552*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf48003ff; valaddr_reg:x3; val_offset:60555*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60555*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf48007ff; valaddr_reg:x3; val_offset:60558*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60558*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4800fff; valaddr_reg:x3; val_offset:60561*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60561*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4801fff; valaddr_reg:x3; val_offset:60564*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60564*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4803fff; valaddr_reg:x3; val_offset:60567*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60567*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4807fff; valaddr_reg:x3; val_offset:60570*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60570*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf480ffff; valaddr_reg:x3; val_offset:60573*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60573*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf481ffff; valaddr_reg:x3; val_offset:60576*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60576*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf483ffff; valaddr_reg:x3; val_offset:60579*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60579*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf487ffff; valaddr_reg:x3; val_offset:60582*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60582*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf48fffff; valaddr_reg:x3; val_offset:60585*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60585*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf49fffff; valaddr_reg:x3; val_offset:60588*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60588*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4bfffff; valaddr_reg:x3; val_offset:60591*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60591*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4c00000; valaddr_reg:x3; val_offset:60594*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60594*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4e00000; valaddr_reg:x3; val_offset:60597*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60597*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4f00000; valaddr_reg:x3; val_offset:60600*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60600*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4f80000; valaddr_reg:x3; val_offset:60603*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60603*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fc0000; valaddr_reg:x3; val_offset:60606*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60606*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fe0000; valaddr_reg:x3; val_offset:60609*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60609*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ff0000; valaddr_reg:x3; val_offset:60612*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60612*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ff8000; valaddr_reg:x3; val_offset:60615*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60615*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ffc000; valaddr_reg:x3; val_offset:60618*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60618*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ffe000; valaddr_reg:x3; val_offset:60621*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60621*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fff000; valaddr_reg:x3; val_offset:60624*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60624*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fff800; valaddr_reg:x3; val_offset:60627*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60627*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fffc00; valaddr_reg:x3; val_offset:60630*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60630*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fffe00; valaddr_reg:x3; val_offset:60633*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60633*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ffff00; valaddr_reg:x3; val_offset:60636*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60636*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ffff80; valaddr_reg:x3; val_offset:60639*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60639*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ffffc0; valaddr_reg:x3; val_offset:60642*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60642*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ffffe0; valaddr_reg:x3; val_offset:60645*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60645*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fffff0; valaddr_reg:x3; val_offset:60648*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60648*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fffff8; valaddr_reg:x3; val_offset:60651*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60651*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fffffc; valaddr_reg:x3; val_offset:60654*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60654*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4fffffe; valaddr_reg:x3; val_offset:60657*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60657*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xe9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xf4ffffff; valaddr_reg:x3; val_offset:60660*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60660*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff000001; valaddr_reg:x3; val_offset:60663*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60663*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff000003; valaddr_reg:x3; val_offset:60666*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60666*0 + 3*157*FLEN/8, x4, x1, x2) + +inst_20223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff000007; valaddr_reg:x3; val_offset:60669*0 + 3*157*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60669*0 + 3*157*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(612368383,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2127130550,32,FLEN) +NAN_BOXED(5330426,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701376,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701377,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701379,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701383,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701391,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701407,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701439,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701503,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701631,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701887,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281702399,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281703423,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281705471,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281709567,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281717759,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281734143,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281766911,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281832447,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281963519,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2282225663,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2282749951,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2283798527,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2285895679,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2285895680,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2287992832,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289041408,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289565696,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289827840,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289958912,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290024448,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290057216,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290073600,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290081792,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290085888,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290087936,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290088960,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089472,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089728,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089856,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089920,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089952,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089968,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089976,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089980,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089982,32,FLEN) +NAN_BOXED(2127161801,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089983,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029312,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029313,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029315,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029319,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029327,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029343,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029375,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029439,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029567,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102029823,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102030335,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102031359,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102033407,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102037503,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102045695,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102062079,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102094847,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102160383,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102291455,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4102553599,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4103077887,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4104126463,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4106223615,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4106223616,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4108320768,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4109369344,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4109893632,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110155776,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110286848,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110352384,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110385152,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110401536,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110409728,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110413824,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110415872,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110416896,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417408,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417664,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417792,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417856,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417888,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417904,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417912,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417916,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417918,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4110417919,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-159.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-159.S new file mode 100644 index 000000000..f40df81e6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-159.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_20224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff199999; valaddr_reg:x3; val_offset:60672*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60672*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff249249; valaddr_reg:x3; val_offset:60675*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60675*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff333333; valaddr_reg:x3; val_offset:60678*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60678*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:60681*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60681*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:60684*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60684*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff444444; valaddr_reg:x3; val_offset:60687*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60687*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:60690*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60690*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:60693*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60693*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff666666; valaddr_reg:x3; val_offset:60696*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60696*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:60699*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60699*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:60702*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60702*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:60705*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60705*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4a05eb and fs2 == 1 and fe2 == 0x80 and fm2 == 0x223301 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eca05eb; op2val:0xc0223301; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:60708*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60708*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f000000; valaddr_reg:x3; val_offset:60711*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60711*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f000001; valaddr_reg:x3; val_offset:60714*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60714*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f000003; valaddr_reg:x3; val_offset:60717*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60717*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f000007; valaddr_reg:x3; val_offset:60720*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60720*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f00000f; valaddr_reg:x3; val_offset:60723*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60723*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f00001f; valaddr_reg:x3; val_offset:60726*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60726*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f00003f; valaddr_reg:x3; val_offset:60729*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60729*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f00007f; valaddr_reg:x3; val_offset:60732*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60732*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f0000ff; valaddr_reg:x3; val_offset:60735*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60735*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f0001ff; valaddr_reg:x3; val_offset:60738*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60738*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f0003ff; valaddr_reg:x3; val_offset:60741*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60741*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f0007ff; valaddr_reg:x3; val_offset:60744*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60744*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f000fff; valaddr_reg:x3; val_offset:60747*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60747*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f001fff; valaddr_reg:x3; val_offset:60750*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60750*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f003fff; valaddr_reg:x3; val_offset:60753*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60753*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f007fff; valaddr_reg:x3; val_offset:60756*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60756*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f00ffff; valaddr_reg:x3; val_offset:60759*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60759*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f01ffff; valaddr_reg:x3; val_offset:60762*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60762*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f03ffff; valaddr_reg:x3; val_offset:60765*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60765*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f07ffff; valaddr_reg:x3; val_offset:60768*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60768*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f0fffff; valaddr_reg:x3; val_offset:60771*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60771*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f199999; valaddr_reg:x3; val_offset:60774*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60774*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f1fffff; valaddr_reg:x3; val_offset:60777*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60777*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f249249; valaddr_reg:x3; val_offset:60780*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60780*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f333333; valaddr_reg:x3; val_offset:60783*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60783*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:60786*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60786*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:60789*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60789*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f3fffff; valaddr_reg:x3; val_offset:60792*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60792*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f400000; valaddr_reg:x3; val_offset:60795*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60795*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f444444; valaddr_reg:x3; val_offset:60798*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60798*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:60801*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60801*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:60804*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60804*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f600000; valaddr_reg:x3; val_offset:60807*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60807*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f666666; valaddr_reg:x3; val_offset:60810*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60810*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:60813*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60813*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f700000; valaddr_reg:x3; val_offset:60816*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60816*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f780000; valaddr_reg:x3; val_offset:60819*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60819*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7c0000; valaddr_reg:x3; val_offset:60822*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60822*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7e0000; valaddr_reg:x3; val_offset:60825*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60825*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7f0000; valaddr_reg:x3; val_offset:60828*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60828*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7f8000; valaddr_reg:x3; val_offset:60831*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60831*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7fc000; valaddr_reg:x3; val_offset:60834*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60834*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7fe000; valaddr_reg:x3; val_offset:60837*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60837*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7ff000; valaddr_reg:x3; val_offset:60840*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60840*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7ff800; valaddr_reg:x3; val_offset:60843*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60843*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7ffc00; valaddr_reg:x3; val_offset:60846*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60846*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7ffe00; valaddr_reg:x3; val_offset:60849*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60849*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7fff00; valaddr_reg:x3; val_offset:60852*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60852*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7fff80; valaddr_reg:x3; val_offset:60855*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60855*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7fffc0; valaddr_reg:x3; val_offset:60858*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60858*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7fffe0; valaddr_reg:x3; val_offset:60861*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60861*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7ffff0; valaddr_reg:x3; val_offset:60864*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60864*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:60867*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60867*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:60870*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60870*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:60873*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60873*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b3731 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x213f59 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb3731; op2val:0x40213f59; +op3val:0x7f7fffff; valaddr_reg:x3; val_offset:60876*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60876*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3f800001; valaddr_reg:x3; val_offset:60879*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60879*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3f800003; valaddr_reg:x3; val_offset:60882*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60882*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3f800007; valaddr_reg:x3; val_offset:60885*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60885*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3f999999; valaddr_reg:x3; val_offset:60888*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60888*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:60891*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60891*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:60894*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60894*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:60897*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60897*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:60900*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60900*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:60903*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60903*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:60906*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60906*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:60909*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60909*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:60912*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60912*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:60915*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60915*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:60918*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60918*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:60921*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60921*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:60924*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60924*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47800000; valaddr_reg:x3; val_offset:60927*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60927*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47800001; valaddr_reg:x3; val_offset:60930*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60930*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47800003; valaddr_reg:x3; val_offset:60933*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60933*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47800007; valaddr_reg:x3; val_offset:60936*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60936*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x4780000f; valaddr_reg:x3; val_offset:60939*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60939*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x4780001f; valaddr_reg:x3; val_offset:60942*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60942*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x4780003f; valaddr_reg:x3; val_offset:60945*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60945*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x4780007f; valaddr_reg:x3; val_offset:60948*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60948*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x478000ff; valaddr_reg:x3; val_offset:60951*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60951*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x478001ff; valaddr_reg:x3; val_offset:60954*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60954*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x478003ff; valaddr_reg:x3; val_offset:60957*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60957*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x478007ff; valaddr_reg:x3; val_offset:60960*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60960*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47800fff; valaddr_reg:x3; val_offset:60963*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60963*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47801fff; valaddr_reg:x3; val_offset:60966*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60966*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47803fff; valaddr_reg:x3; val_offset:60969*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60969*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47807fff; valaddr_reg:x3; val_offset:60972*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60972*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x4780ffff; valaddr_reg:x3; val_offset:60975*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60975*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x4781ffff; valaddr_reg:x3; val_offset:60978*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60978*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x4783ffff; valaddr_reg:x3; val_offset:60981*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60981*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x4787ffff; valaddr_reg:x3; val_offset:60984*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60984*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x478fffff; valaddr_reg:x3; val_offset:60987*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60987*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x479fffff; valaddr_reg:x3; val_offset:60990*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60990*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47bfffff; valaddr_reg:x3; val_offset:60993*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60993*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47c00000; valaddr_reg:x3; val_offset:60996*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60996*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47e00000; valaddr_reg:x3; val_offset:60999*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 60999*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47f00000; valaddr_reg:x3; val_offset:61002*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61002*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47f80000; valaddr_reg:x3; val_offset:61005*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61005*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fc0000; valaddr_reg:x3; val_offset:61008*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61008*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fe0000; valaddr_reg:x3; val_offset:61011*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61011*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ff0000; valaddr_reg:x3; val_offset:61014*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61014*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ff8000; valaddr_reg:x3; val_offset:61017*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61017*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ffc000; valaddr_reg:x3; val_offset:61020*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61020*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ffe000; valaddr_reg:x3; val_offset:61023*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61023*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fff000; valaddr_reg:x3; val_offset:61026*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61026*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fff800; valaddr_reg:x3; val_offset:61029*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61029*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fffc00; valaddr_reg:x3; val_offset:61032*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61032*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fffe00; valaddr_reg:x3; val_offset:61035*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61035*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ffff00; valaddr_reg:x3; val_offset:61038*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61038*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ffff80; valaddr_reg:x3; val_offset:61041*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61041*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ffffc0; valaddr_reg:x3; val_offset:61044*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61044*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ffffe0; valaddr_reg:x3; val_offset:61047*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61047*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fffff0; valaddr_reg:x3; val_offset:61050*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61050*0 + 3*158*FLEN/8, x4, x1, x2) + +inst_20351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fffff8; valaddr_reg:x3; val_offset:61053*0 + 3*158*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61053*0 + 3*158*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2127169003,32,FLEN) +NAN_BOXED(3223466753,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706432,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706447,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706463,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706495,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706559,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706687,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130706943,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130707455,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130708479,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130710527,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130714623,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130722815,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130739199,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130771967,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130837503,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2130968575,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2131230719,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2131755007,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2132803583,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2134900735,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2134900736,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2136997888,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2138046464,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2138570752,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2138832896,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2138963968,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139029504,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139062272,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139078656,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139086848,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139090944,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139092992,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139094016,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139094528,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139094784,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139094912,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139094976,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139095008,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139095024,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2127247153,32,FLEN) +NAN_BOXED(1075920729,32,FLEN) +NAN_BOXED(2139095039,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199570944,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199570945,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199570947,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199570951,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199570959,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199570975,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199571007,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199571071,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199571199,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199571455,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199571967,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199572991,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199575039,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199579135,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199587327,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199603711,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199636479,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199702015,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1199833087,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1200095231,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1200619519,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1201668095,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1203765247,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1203765248,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1205862400,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1206910976,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207435264,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207697408,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207828480,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207894016,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207926784,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207943168,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207951360,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207955456,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207957504,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207958528,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959040,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959296,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959424,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959488,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959520,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959536,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959544,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-16.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-16.S new file mode 100644 index 000000000..326b8c48c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-16.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_1920: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:5760*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5760*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1921: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:5763*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5763*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1922: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:5766*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5766*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1923: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:5769*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5769*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1924: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:5772*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5772*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1925: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:5775*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5775*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1926: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:5778*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5778*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1927: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:5781*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5781*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1928: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:5784*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5784*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1929: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:5787*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5787*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1930: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:5790*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5790*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1931: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:5793*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5793*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1932: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5800000; valaddr_reg:x3; val_offset:5796*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5796*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1933: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5800001; valaddr_reg:x3; val_offset:5799*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5799*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1934: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5800003; valaddr_reg:x3; val_offset:5802*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5802*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1935: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5800007; valaddr_reg:x3; val_offset:5805*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5805*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1936: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x580000f; valaddr_reg:x3; val_offset:5808*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5808*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1937: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x580001f; valaddr_reg:x3; val_offset:5811*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5811*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1938: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x580003f; valaddr_reg:x3; val_offset:5814*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5814*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1939: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x580007f; valaddr_reg:x3; val_offset:5817*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5817*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1940: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x58000ff; valaddr_reg:x3; val_offset:5820*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5820*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1941: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x58001ff; valaddr_reg:x3; val_offset:5823*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5823*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1942: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x58003ff; valaddr_reg:x3; val_offset:5826*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5826*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1943: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x58007ff; valaddr_reg:x3; val_offset:5829*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5829*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1944: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5800fff; valaddr_reg:x3; val_offset:5832*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5832*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1945: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5801fff; valaddr_reg:x3; val_offset:5835*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5835*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1946: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5803fff; valaddr_reg:x3; val_offset:5838*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5838*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1947: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5807fff; valaddr_reg:x3; val_offset:5841*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5841*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1948: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x580ffff; valaddr_reg:x3; val_offset:5844*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5844*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1949: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x581ffff; valaddr_reg:x3; val_offset:5847*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5847*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1950: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x583ffff; valaddr_reg:x3; val_offset:5850*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5850*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1951: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x587ffff; valaddr_reg:x3; val_offset:5853*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5853*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1952: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x58fffff; valaddr_reg:x3; val_offset:5856*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5856*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1953: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x59fffff; valaddr_reg:x3; val_offset:5859*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5859*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1954: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5bfffff; valaddr_reg:x3; val_offset:5862*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5862*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1955: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5c00000; valaddr_reg:x3; val_offset:5865*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5865*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1956: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5e00000; valaddr_reg:x3; val_offset:5868*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5868*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1957: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5f00000; valaddr_reg:x3; val_offset:5871*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5871*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1958: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5f80000; valaddr_reg:x3; val_offset:5874*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5874*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1959: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fc0000; valaddr_reg:x3; val_offset:5877*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5877*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1960: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fe0000; valaddr_reg:x3; val_offset:5880*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5880*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1961: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ff0000; valaddr_reg:x3; val_offset:5883*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5883*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1962: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ff8000; valaddr_reg:x3; val_offset:5886*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5886*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1963: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ffc000; valaddr_reg:x3; val_offset:5889*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5889*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1964: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ffe000; valaddr_reg:x3; val_offset:5892*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5892*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1965: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fff000; valaddr_reg:x3; val_offset:5895*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5895*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1966: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fff800; valaddr_reg:x3; val_offset:5898*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5898*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1967: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fffc00; valaddr_reg:x3; val_offset:5901*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5901*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1968: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fffe00; valaddr_reg:x3; val_offset:5904*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5904*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1969: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ffff00; valaddr_reg:x3; val_offset:5907*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5907*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1970: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ffff80; valaddr_reg:x3; val_offset:5910*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5910*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1971: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ffffc0; valaddr_reg:x3; val_offset:5913*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5913*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1972: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ffffe0; valaddr_reg:x3; val_offset:5916*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5916*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1973: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fffff0; valaddr_reg:x3; val_offset:5919*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5919*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1974: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fffff8; valaddr_reg:x3; val_offset:5922*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5922*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1975: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fffffc; valaddr_reg:x3; val_offset:5925*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5925*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1976: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5fffffe; valaddr_reg:x3; val_offset:5928*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5928*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1977: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x107c30 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d107c30; op2val:0x0; +op3val:0x5ffffff; valaddr_reg:x3; val_offset:5931*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5931*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1978: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:5934*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5934*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1979: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:5937*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5937*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1980: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:5940*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5940*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1981: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:5943*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5943*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1982: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:5946*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5946*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1983: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:5949*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5949*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1984: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:5952*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5952*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1985: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:5955*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5955*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1986: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:5958*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5958*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1987: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:5961*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5961*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1988: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:5964*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5964*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1989: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:5967*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5967*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1990: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:5970*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5970*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1991: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:5973*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5973*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1992: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:5976*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5976*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1993: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:5979*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5979*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1994: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3000000; valaddr_reg:x3; val_offset:5982*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5982*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1995: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3000001; valaddr_reg:x3; val_offset:5985*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5985*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1996: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3000003; valaddr_reg:x3; val_offset:5988*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5988*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1997: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3000007; valaddr_reg:x3; val_offset:5991*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5991*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1998: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x300000f; valaddr_reg:x3; val_offset:5994*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5994*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_1999: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x300001f; valaddr_reg:x3; val_offset:5997*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 5997*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2000: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x300003f; valaddr_reg:x3; val_offset:6000*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6000*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2001: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x300007f; valaddr_reg:x3; val_offset:6003*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6003*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2002: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x30000ff; valaddr_reg:x3; val_offset:6006*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6006*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2003: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x30001ff; valaddr_reg:x3; val_offset:6009*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6009*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2004: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x30003ff; valaddr_reg:x3; val_offset:6012*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6012*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2005: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x30007ff; valaddr_reg:x3; val_offset:6015*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6015*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2006: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3000fff; valaddr_reg:x3; val_offset:6018*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6018*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2007: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3001fff; valaddr_reg:x3; val_offset:6021*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6021*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2008: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3003fff; valaddr_reg:x3; val_offset:6024*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6024*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2009: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3007fff; valaddr_reg:x3; val_offset:6027*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6027*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2010: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x300ffff; valaddr_reg:x3; val_offset:6030*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6030*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2011: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x301ffff; valaddr_reg:x3; val_offset:6033*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6033*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2012: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x303ffff; valaddr_reg:x3; val_offset:6036*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6036*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2013: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x307ffff; valaddr_reg:x3; val_offset:6039*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6039*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2014: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x30fffff; valaddr_reg:x3; val_offset:6042*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6042*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2015: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x31fffff; valaddr_reg:x3; val_offset:6045*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6045*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2016: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x33fffff; valaddr_reg:x3; val_offset:6048*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6048*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2017: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3400000; valaddr_reg:x3; val_offset:6051*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6051*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2018: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3600000; valaddr_reg:x3; val_offset:6054*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6054*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2019: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3700000; valaddr_reg:x3; val_offset:6057*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6057*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2020: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x3780000; valaddr_reg:x3; val_offset:6060*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6060*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2021: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37c0000; valaddr_reg:x3; val_offset:6063*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6063*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2022: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37e0000; valaddr_reg:x3; val_offset:6066*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6066*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2023: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37f0000; valaddr_reg:x3; val_offset:6069*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6069*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2024: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37f8000; valaddr_reg:x3; val_offset:6072*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6072*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2025: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37fc000; valaddr_reg:x3; val_offset:6075*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6075*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2026: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37fe000; valaddr_reg:x3; val_offset:6078*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6078*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2027: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37ff000; valaddr_reg:x3; val_offset:6081*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6081*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2028: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37ff800; valaddr_reg:x3; val_offset:6084*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6084*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2029: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37ffc00; valaddr_reg:x3; val_offset:6087*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6087*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2030: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37ffe00; valaddr_reg:x3; val_offset:6090*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6090*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2031: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37fff00; valaddr_reg:x3; val_offset:6093*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6093*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2032: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37fff80; valaddr_reg:x3; val_offset:6096*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6096*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2033: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37fffc0; valaddr_reg:x3; val_offset:6099*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6099*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2034: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37fffe0; valaddr_reg:x3; val_offset:6102*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6102*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2035: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37ffff0; valaddr_reg:x3; val_offset:6105*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6105*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2036: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37ffff8; valaddr_reg:x3; val_offset:6108*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6108*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2037: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37ffffc; valaddr_reg:x3; val_offset:6111*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6111*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2038: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37ffffe; valaddr_reg:x3; val_offset:6114*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6114*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2039: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x143e58 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d143e58; op2val:0x0; +op3val:0x37fffff; valaddr_reg:x3; val_offset:6117*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6117*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2040: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0800000; valaddr_reg:x3; val_offset:6120*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6120*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2041: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0800001; valaddr_reg:x3; val_offset:6123*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6123*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2042: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0800003; valaddr_reg:x3; val_offset:6126*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6126*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2043: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0800007; valaddr_reg:x3; val_offset:6129*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6129*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2044: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb080000f; valaddr_reg:x3; val_offset:6132*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6132*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2045: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb080001f; valaddr_reg:x3; val_offset:6135*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6135*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2046: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb080003f; valaddr_reg:x3; val_offset:6138*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6138*0 + 3*15*FLEN/8, x4, x1, x2) + +inst_2047: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb080007f; valaddr_reg:x3; val_offset:6141*0 + 3*15*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6141*0 + 3*15*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274688,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274689,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274691,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274695,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274703,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274719,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274751,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274815,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274943,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92275199,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92275711,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92276735,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92278783,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92282879,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92291071,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92307455,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92340223,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92405759,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92536831,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92798975,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(93323263,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(94371839,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(96468991,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(96468992,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(98566144,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(99614720,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100139008,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100401152,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100532224,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100597760,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100630528,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100646912,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100655104,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100659200,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100661248,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100662272,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100662784,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663040,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663168,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663232,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663264,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663280,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663288,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663292,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663294,32,FLEN) +NAN_BOXED(2098232368,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663295,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331648,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331649,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331651,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331655,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331663,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331679,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331711,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331775,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331903,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50332159,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50332671,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50333695,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50335743,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50339839,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50348031,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50364415,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50397183,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50462719,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50593791,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50855935,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(51380223,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(52428799,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(54525951,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(54525952,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(56623104,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(57671680,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58195968,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58458112,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58589184,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58654720,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58687488,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58703872,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58712064,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58716160,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58718208,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58719232,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58719744,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720000,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720128,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720192,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720224,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720240,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720248,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720252,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720254,32,FLEN) +NAN_BOXED(2098478680,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720255,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178624,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178625,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178627,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178631,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178639,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178655,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178687,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178751,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-160.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-160.S new file mode 100644 index 000000000..61ce90dac --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-160.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_20352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fffffc; valaddr_reg:x3; val_offset:61056*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61056*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47fffffe; valaddr_reg:x3; val_offset:61059*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61059*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b516e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x509545 and fs3 == 0 and fe3 == 0x8f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb516e; op2val:0x509545; +op3val:0x47ffffff; valaddr_reg:x3; val_offset:61062*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61062*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80000000; valaddr_reg:x3; val_offset:61065*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61065*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:61068*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61068*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:61071*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61071*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:61074*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61074*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8000000f; valaddr_reg:x3; val_offset:61077*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61077*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8000001f; valaddr_reg:x3; val_offset:61080*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61080*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8000003f; valaddr_reg:x3; val_offset:61083*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61083*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8000007f; valaddr_reg:x3; val_offset:61086*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61086*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x800000ff; valaddr_reg:x3; val_offset:61089*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61089*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x800001ff; valaddr_reg:x3; val_offset:61092*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61092*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x800003ff; valaddr_reg:x3; val_offset:61095*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61095*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x800007ff; valaddr_reg:x3; val_offset:61098*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61098*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80000fff; valaddr_reg:x3; val_offset:61101*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61101*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80001fff; valaddr_reg:x3; val_offset:61104*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61104*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80003fff; valaddr_reg:x3; val_offset:61107*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61107*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80007fff; valaddr_reg:x3; val_offset:61110*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61110*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8000ffff; valaddr_reg:x3; val_offset:61113*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61113*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8001ffff; valaddr_reg:x3; val_offset:61116*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61116*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8003ffff; valaddr_reg:x3; val_offset:61119*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61119*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8007ffff; valaddr_reg:x3; val_offset:61122*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61122*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x800fffff; valaddr_reg:x3; val_offset:61125*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61125*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:61128*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61128*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x801fffff; valaddr_reg:x3; val_offset:61131*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61131*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:61134*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61134*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:61137*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61137*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:61140*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61140*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:61143*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61143*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x803fffff; valaddr_reg:x3; val_offset:61146*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61146*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80400000; valaddr_reg:x3; val_offset:61149*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61149*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:61152*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61152*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:61155*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61155*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:61158*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61158*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80600000; valaddr_reg:x3; val_offset:61161*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61161*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:61164*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61164*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:61167*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61167*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80700000; valaddr_reg:x3; val_offset:61170*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61170*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x80780000; valaddr_reg:x3; val_offset:61173*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61173*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807c0000; valaddr_reg:x3; val_offset:61176*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61176*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807e0000; valaddr_reg:x3; val_offset:61179*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61179*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807f0000; valaddr_reg:x3; val_offset:61182*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61182*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807f8000; valaddr_reg:x3; val_offset:61185*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61185*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807fc000; valaddr_reg:x3; val_offset:61188*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61188*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807fe000; valaddr_reg:x3; val_offset:61191*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61191*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807ff000; valaddr_reg:x3; val_offset:61194*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61194*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807ff800; valaddr_reg:x3; val_offset:61197*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61197*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807ffc00; valaddr_reg:x3; val_offset:61200*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61200*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807ffe00; valaddr_reg:x3; val_offset:61203*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61203*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807fff00; valaddr_reg:x3; val_offset:61206*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61206*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807fff80; valaddr_reg:x3; val_offset:61209*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61209*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807fffc0; valaddr_reg:x3; val_offset:61212*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61212*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807fffe0; valaddr_reg:x3; val_offset:61215*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61215*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807ffff0; valaddr_reg:x3; val_offset:61218*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61218*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:61221*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61221*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:61224*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61224*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:61227*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61227*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b7235 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb7235; op2val:0x80000000; +op3val:0x807fffff; valaddr_reg:x3; val_offset:61230*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61230*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb000000; valaddr_reg:x3; val_offset:61233*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61233*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb000001; valaddr_reg:x3; val_offset:61236*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61236*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb000003; valaddr_reg:x3; val_offset:61239*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61239*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb000007; valaddr_reg:x3; val_offset:61242*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61242*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb00000f; valaddr_reg:x3; val_offset:61245*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61245*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb00001f; valaddr_reg:x3; val_offset:61248*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61248*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb00003f; valaddr_reg:x3; val_offset:61251*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61251*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb00007f; valaddr_reg:x3; val_offset:61254*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61254*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb0000ff; valaddr_reg:x3; val_offset:61257*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61257*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb0001ff; valaddr_reg:x3; val_offset:61260*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61260*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb0003ff; valaddr_reg:x3; val_offset:61263*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61263*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb0007ff; valaddr_reg:x3; val_offset:61266*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61266*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb000fff; valaddr_reg:x3; val_offset:61269*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61269*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb001fff; valaddr_reg:x3; val_offset:61272*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61272*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb003fff; valaddr_reg:x3; val_offset:61275*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61275*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb007fff; valaddr_reg:x3; val_offset:61278*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61278*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb00ffff; valaddr_reg:x3; val_offset:61281*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61281*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb01ffff; valaddr_reg:x3; val_offset:61284*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61284*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb03ffff; valaddr_reg:x3; val_offset:61287*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61287*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb07ffff; valaddr_reg:x3; val_offset:61290*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61290*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb0fffff; valaddr_reg:x3; val_offset:61293*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61293*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb1fffff; valaddr_reg:x3; val_offset:61296*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61296*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb3fffff; valaddr_reg:x3; val_offset:61299*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61299*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb400000; valaddr_reg:x3; val_offset:61302*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61302*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb600000; valaddr_reg:x3; val_offset:61305*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61305*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb700000; valaddr_reg:x3; val_offset:61308*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61308*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb780000; valaddr_reg:x3; val_offset:61311*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61311*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7c0000; valaddr_reg:x3; val_offset:61314*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61314*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7e0000; valaddr_reg:x3; val_offset:61317*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61317*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7f0000; valaddr_reg:x3; val_offset:61320*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61320*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7f8000; valaddr_reg:x3; val_offset:61323*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61323*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7fc000; valaddr_reg:x3; val_offset:61326*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61326*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7fe000; valaddr_reg:x3; val_offset:61329*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61329*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7ff000; valaddr_reg:x3; val_offset:61332*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61332*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7ff800; valaddr_reg:x3; val_offset:61335*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61335*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7ffc00; valaddr_reg:x3; val_offset:61338*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61338*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7ffe00; valaddr_reg:x3; val_offset:61341*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61341*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7fff00; valaddr_reg:x3; val_offset:61344*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61344*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7fff80; valaddr_reg:x3; val_offset:61347*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61347*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7fffc0; valaddr_reg:x3; val_offset:61350*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61350*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7fffe0; valaddr_reg:x3; val_offset:61353*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61353*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7ffff0; valaddr_reg:x3; val_offset:61356*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61356*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7ffff8; valaddr_reg:x3; val_offset:61359*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61359*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7ffffc; valaddr_reg:x3; val_offset:61362*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61362*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7ffffe; valaddr_reg:x3; val_offset:61365*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61365*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xf6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xfb7fffff; valaddr_reg:x3; val_offset:61368*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61368*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff000001; valaddr_reg:x3; val_offset:61371*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61371*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff000003; valaddr_reg:x3; val_offset:61374*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61374*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff000007; valaddr_reg:x3; val_offset:61377*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61377*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff199999; valaddr_reg:x3; val_offset:61380*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61380*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff249249; valaddr_reg:x3; val_offset:61383*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61383*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff333333; valaddr_reg:x3; val_offset:61386*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61386*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:61389*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61389*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:61392*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61392*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff444444; valaddr_reg:x3; val_offset:61395*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61395*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:61398*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61398*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:61401*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61401*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff666666; valaddr_reg:x3; val_offset:61404*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61404*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:61407*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61407*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:61410*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61410*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:61413*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61413*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4b9758 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x20f331 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecb9758; op2val:0xc020f331; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:61416*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61416*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:61419*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61419*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:61422*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61422*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:61425*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61425*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:61428*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61428*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:61431*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61431*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:61434*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61434*0 + 3*159*FLEN/8, x4, x1, x2) + +inst_20479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:61437*0 + 3*159*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61437*0 + 3*159*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959548,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959550,32,FLEN) +NAN_BOXED(2127253870,32,FLEN) +NAN_BOXED(5281093,32,FLEN) +NAN_BOXED(1207959551,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483663,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483679,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483711,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483775,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483903,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484159,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484671,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147485695,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147487743,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147491839,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147500031,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147516415,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147549183,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147614719,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147745791,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148007935,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148532223,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149580799,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677951,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677952,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153775104,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154823680,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155347968,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155610112,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155741184,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155806720,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155839488,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155855872,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155864064,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155868160,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155870208,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871232,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871744,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872000,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872128,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872192,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872224,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872240,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2127262261,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872255,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081216,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081217,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081219,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081223,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081231,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081247,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081279,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081343,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081471,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211081727,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211082239,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211083263,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211085311,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211089407,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211097599,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211113983,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211146751,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211212287,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211343359,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4211605503,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4212129791,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4213178367,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4215275519,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4215275520,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4217372672,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4218421248,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4218945536,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219207680,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219338752,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219404288,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219437056,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219453440,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219461632,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219465728,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219467776,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219468800,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469312,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469568,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469696,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469760,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469792,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469808,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469816,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469820,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469822,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4219469823,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2127271768,32,FLEN) +NAN_BOXED(3223384881,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-161.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-161.S new file mode 100644 index 000000000..bec299472 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-161.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_20480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:61440*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61440*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:61443*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61443*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:61446*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61446*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:61449*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61449*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:61452*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61452*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:61455*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61455*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:61458*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61458*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:61461*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61461*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:61464*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61464*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7000000; valaddr_reg:x3; val_offset:61467*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61467*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7000001; valaddr_reg:x3; val_offset:61470*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61470*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7000003; valaddr_reg:x3; val_offset:61473*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61473*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7000007; valaddr_reg:x3; val_offset:61476*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61476*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x700000f; valaddr_reg:x3; val_offset:61479*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61479*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x700001f; valaddr_reg:x3; val_offset:61482*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61482*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x700003f; valaddr_reg:x3; val_offset:61485*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61485*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x700007f; valaddr_reg:x3; val_offset:61488*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61488*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x70000ff; valaddr_reg:x3; val_offset:61491*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61491*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x70001ff; valaddr_reg:x3; val_offset:61494*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61494*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x70003ff; valaddr_reg:x3; val_offset:61497*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61497*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x70007ff; valaddr_reg:x3; val_offset:61500*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61500*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7000fff; valaddr_reg:x3; val_offset:61503*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61503*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7001fff; valaddr_reg:x3; val_offset:61506*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61506*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7003fff; valaddr_reg:x3; val_offset:61509*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61509*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7007fff; valaddr_reg:x3; val_offset:61512*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61512*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x700ffff; valaddr_reg:x3; val_offset:61515*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61515*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x701ffff; valaddr_reg:x3; val_offset:61518*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61518*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x703ffff; valaddr_reg:x3; val_offset:61521*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61521*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x707ffff; valaddr_reg:x3; val_offset:61524*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61524*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x70fffff; valaddr_reg:x3; val_offset:61527*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61527*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x71fffff; valaddr_reg:x3; val_offset:61530*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61530*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x73fffff; valaddr_reg:x3; val_offset:61533*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61533*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7400000; valaddr_reg:x3; val_offset:61536*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61536*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7600000; valaddr_reg:x3; val_offset:61539*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61539*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7700000; valaddr_reg:x3; val_offset:61542*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61542*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x7780000; valaddr_reg:x3; val_offset:61545*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61545*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77c0000; valaddr_reg:x3; val_offset:61548*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61548*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77e0000; valaddr_reg:x3; val_offset:61551*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61551*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77f0000; valaddr_reg:x3; val_offset:61554*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61554*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77f8000; valaddr_reg:x3; val_offset:61557*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61557*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77fc000; valaddr_reg:x3; val_offset:61560*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61560*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77fe000; valaddr_reg:x3; val_offset:61563*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61563*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77ff000; valaddr_reg:x3; val_offset:61566*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61566*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77ff800; valaddr_reg:x3; val_offset:61569*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61569*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77ffc00; valaddr_reg:x3; val_offset:61572*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61572*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77ffe00; valaddr_reg:x3; val_offset:61575*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61575*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77fff00; valaddr_reg:x3; val_offset:61578*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61578*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77fff80; valaddr_reg:x3; val_offset:61581*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61581*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77fffc0; valaddr_reg:x3; val_offset:61584*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61584*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77fffe0; valaddr_reg:x3; val_offset:61587*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61587*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77ffff0; valaddr_reg:x3; val_offset:61590*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61590*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77ffff8; valaddr_reg:x3; val_offset:61593*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61593*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77ffffc; valaddr_reg:x3; val_offset:61596*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61596*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77ffffe; valaddr_reg:x3; val_offset:61599*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61599*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4c8122 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecc8122; op2val:0x0; +op3val:0x77fffff; valaddr_reg:x3; val_offset:61602*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61602*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72800000; valaddr_reg:x3; val_offset:61605*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61605*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72800001; valaddr_reg:x3; val_offset:61608*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61608*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72800003; valaddr_reg:x3; val_offset:61611*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61611*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72800007; valaddr_reg:x3; val_offset:61614*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61614*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7280000f; valaddr_reg:x3; val_offset:61617*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61617*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7280001f; valaddr_reg:x3; val_offset:61620*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61620*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7280003f; valaddr_reg:x3; val_offset:61623*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61623*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7280007f; valaddr_reg:x3; val_offset:61626*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61626*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x728000ff; valaddr_reg:x3; val_offset:61629*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61629*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x728001ff; valaddr_reg:x3; val_offset:61632*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61632*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x728003ff; valaddr_reg:x3; val_offset:61635*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61635*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x728007ff; valaddr_reg:x3; val_offset:61638*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61638*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72800fff; valaddr_reg:x3; val_offset:61641*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61641*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72801fff; valaddr_reg:x3; val_offset:61644*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61644*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72803fff; valaddr_reg:x3; val_offset:61647*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61647*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72807fff; valaddr_reg:x3; val_offset:61650*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61650*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7280ffff; valaddr_reg:x3; val_offset:61653*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61653*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7281ffff; valaddr_reg:x3; val_offset:61656*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61656*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7283ffff; valaddr_reg:x3; val_offset:61659*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61659*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7287ffff; valaddr_reg:x3; val_offset:61662*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61662*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x728fffff; valaddr_reg:x3; val_offset:61665*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61665*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x729fffff; valaddr_reg:x3; val_offset:61668*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61668*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72bfffff; valaddr_reg:x3; val_offset:61671*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61671*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72c00000; valaddr_reg:x3; val_offset:61674*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61674*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72e00000; valaddr_reg:x3; val_offset:61677*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61677*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72f00000; valaddr_reg:x3; val_offset:61680*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61680*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72f80000; valaddr_reg:x3; val_offset:61683*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61683*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fc0000; valaddr_reg:x3; val_offset:61686*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61686*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fe0000; valaddr_reg:x3; val_offset:61689*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61689*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ff0000; valaddr_reg:x3; val_offset:61692*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61692*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ff8000; valaddr_reg:x3; val_offset:61695*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61695*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ffc000; valaddr_reg:x3; val_offset:61698*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61698*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ffe000; valaddr_reg:x3; val_offset:61701*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61701*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fff000; valaddr_reg:x3; val_offset:61704*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61704*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fff800; valaddr_reg:x3; val_offset:61707*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61707*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fffc00; valaddr_reg:x3; val_offset:61710*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61710*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fffe00; valaddr_reg:x3; val_offset:61713*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61713*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ffff00; valaddr_reg:x3; val_offset:61716*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61716*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ffff80; valaddr_reg:x3; val_offset:61719*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61719*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ffffc0; valaddr_reg:x3; val_offset:61722*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61722*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ffffe0; valaddr_reg:x3; val_offset:61725*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61725*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fffff0; valaddr_reg:x3; val_offset:61728*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61728*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fffff8; valaddr_reg:x3; val_offset:61731*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61731*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fffffc; valaddr_reg:x3; val_offset:61734*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61734*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72fffffe; valaddr_reg:x3; val_offset:61737*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61737*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xe5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x72ffffff; valaddr_reg:x3; val_offset:61740*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61740*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f000001; valaddr_reg:x3; val_offset:61743*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61743*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f000003; valaddr_reg:x3; val_offset:61746*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61746*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f000007; valaddr_reg:x3; val_offset:61749*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61749*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f199999; valaddr_reg:x3; val_offset:61752*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61752*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f249249; valaddr_reg:x3; val_offset:61755*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61755*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f333333; valaddr_reg:x3; val_offset:61758*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61758*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:61761*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61761*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:61764*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61764*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f444444; valaddr_reg:x3; val_offset:61767*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61767*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:61770*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61770*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:61773*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61773*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f666666; valaddr_reg:x3; val_offset:61776*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61776*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:61779*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61779*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:61782*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61782*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:61785*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61785*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4cc26e and fs2 == 0 and fe2 == 0x80 and fm2 == 0x200819 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eccc26e; op2val:0x40200819; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:61788*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61788*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:61791*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61791*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:61794*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61794*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:61797*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61797*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:61800*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61800*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:61803*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61803*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:61806*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61806*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:61809*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61809*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:61812*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61812*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:61815*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61815*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:61818*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61818*0 + 3*160*FLEN/8, x4, x1, x2) + +inst_20607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:61821*0 + 3*160*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61821*0 + 3*160*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440512,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440513,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440515,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440519,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440527,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440543,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440575,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440639,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440767,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117441023,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117441535,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117442559,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117444607,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117448703,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117456895,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117473279,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117506047,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117571583,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117702655,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117964799,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(118489087,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(119537663,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(121634815,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(121634816,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(123731968,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(124780544,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125304832,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125566976,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125698048,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125763584,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125796352,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125812736,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125820928,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125825024,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125827072,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828096,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828608,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828864,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828992,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829056,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829088,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829104,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829112,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829116,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829118,32,FLEN) +NAN_BOXED(2127331618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829119,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991232,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991233,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991235,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991239,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991247,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991263,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991295,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991359,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991487,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920991743,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920992255,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920993279,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920995327,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1920999423,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1921007615,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1921023999,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1921056767,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1921122303,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1921253375,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1921515519,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1922039807,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1923088383,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1925185535,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1925185536,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1927282688,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1928331264,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1928855552,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929117696,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929248768,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929314304,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929347072,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929363456,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929371648,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929375744,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929377792,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929378816,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379328,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379584,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379712,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379776,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379808,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379824,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379832,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379836,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379838,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(1929379839,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2127348334,32,FLEN) +NAN_BOXED(1075841049,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-162.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-162.S new file mode 100644 index 000000000..8e608ab53 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-162.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_20608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:61824*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61824*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:61827*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61827*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:61830*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61830*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:61833*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61833*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:61836*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61836*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b800000; valaddr_reg:x3; val_offset:61839*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61839*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b800001; valaddr_reg:x3; val_offset:61842*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61842*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b800003; valaddr_reg:x3; val_offset:61845*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61845*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b800007; valaddr_reg:x3; val_offset:61848*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61848*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b80000f; valaddr_reg:x3; val_offset:61851*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61851*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b80001f; valaddr_reg:x3; val_offset:61854*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61854*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b80003f; valaddr_reg:x3; val_offset:61857*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61857*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b80007f; valaddr_reg:x3; val_offset:61860*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61860*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b8000ff; valaddr_reg:x3; val_offset:61863*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61863*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b8001ff; valaddr_reg:x3; val_offset:61866*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61866*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b8003ff; valaddr_reg:x3; val_offset:61869*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61869*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b8007ff; valaddr_reg:x3; val_offset:61872*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61872*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b800fff; valaddr_reg:x3; val_offset:61875*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61875*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b801fff; valaddr_reg:x3; val_offset:61878*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61878*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b803fff; valaddr_reg:x3; val_offset:61881*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61881*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b807fff; valaddr_reg:x3; val_offset:61884*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61884*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b80ffff; valaddr_reg:x3; val_offset:61887*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61887*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b81ffff; valaddr_reg:x3; val_offset:61890*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61890*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b83ffff; valaddr_reg:x3; val_offset:61893*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61893*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b87ffff; valaddr_reg:x3; val_offset:61896*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61896*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b8fffff; valaddr_reg:x3; val_offset:61899*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61899*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8b9fffff; valaddr_reg:x3; val_offset:61902*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61902*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bbfffff; valaddr_reg:x3; val_offset:61905*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61905*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bc00000; valaddr_reg:x3; val_offset:61908*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61908*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8be00000; valaddr_reg:x3; val_offset:61911*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61911*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bf00000; valaddr_reg:x3; val_offset:61914*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61914*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bf80000; valaddr_reg:x3; val_offset:61917*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61917*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfc0000; valaddr_reg:x3; val_offset:61920*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61920*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfe0000; valaddr_reg:x3; val_offset:61923*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61923*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bff0000; valaddr_reg:x3; val_offset:61926*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61926*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bff8000; valaddr_reg:x3; val_offset:61929*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61929*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bffc000; valaddr_reg:x3; val_offset:61932*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61932*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bffe000; valaddr_reg:x3; val_offset:61935*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61935*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfff000; valaddr_reg:x3; val_offset:61938*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61938*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfff800; valaddr_reg:x3; val_offset:61941*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61941*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfffc00; valaddr_reg:x3; val_offset:61944*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61944*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfffe00; valaddr_reg:x3; val_offset:61947*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61947*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bffff00; valaddr_reg:x3; val_offset:61950*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61950*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bffff80; valaddr_reg:x3; val_offset:61953*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61953*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bffffc0; valaddr_reg:x3; val_offset:61956*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61956*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bffffe0; valaddr_reg:x3; val_offset:61959*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61959*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfffff0; valaddr_reg:x3; val_offset:61962*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61962*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfffff8; valaddr_reg:x3; val_offset:61965*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61965*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfffffc; valaddr_reg:x3; val_offset:61968*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61968*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bfffffe; valaddr_reg:x3; val_offset:61971*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61971*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x4f7809 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ecf7809; op2val:0x80000000; +op3val:0x8bffffff; valaddr_reg:x3; val_offset:61974*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61974*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c000000; valaddr_reg:x3; val_offset:61977*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61977*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c000001; valaddr_reg:x3; val_offset:61980*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61980*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c000003; valaddr_reg:x3; val_offset:61983*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61983*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c000007; valaddr_reg:x3; val_offset:61986*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61986*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c00000f; valaddr_reg:x3; val_offset:61989*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61989*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c00001f; valaddr_reg:x3; val_offset:61992*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61992*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c00003f; valaddr_reg:x3; val_offset:61995*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61995*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c00007f; valaddr_reg:x3; val_offset:61998*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 61998*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c0000ff; valaddr_reg:x3; val_offset:62001*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62001*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c0001ff; valaddr_reg:x3; val_offset:62004*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62004*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c0003ff; valaddr_reg:x3; val_offset:62007*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62007*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c0007ff; valaddr_reg:x3; val_offset:62010*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62010*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c000fff; valaddr_reg:x3; val_offset:62013*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62013*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c001fff; valaddr_reg:x3; val_offset:62016*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62016*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c003fff; valaddr_reg:x3; val_offset:62019*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62019*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c007fff; valaddr_reg:x3; val_offset:62022*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62022*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c00ffff; valaddr_reg:x3; val_offset:62025*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62025*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c01ffff; valaddr_reg:x3; val_offset:62028*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62028*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c03ffff; valaddr_reg:x3; val_offset:62031*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62031*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c07ffff; valaddr_reg:x3; val_offset:62034*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62034*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c0fffff; valaddr_reg:x3; val_offset:62037*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62037*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c1fffff; valaddr_reg:x3; val_offset:62040*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62040*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c3fffff; valaddr_reg:x3; val_offset:62043*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62043*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c400000; valaddr_reg:x3; val_offset:62046*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62046*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c600000; valaddr_reg:x3; val_offset:62049*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62049*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c700000; valaddr_reg:x3; val_offset:62052*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62052*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c780000; valaddr_reg:x3; val_offset:62055*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62055*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7c0000; valaddr_reg:x3; val_offset:62058*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62058*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7e0000; valaddr_reg:x3; val_offset:62061*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62061*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7f0000; valaddr_reg:x3; val_offset:62064*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62064*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7f8000; valaddr_reg:x3; val_offset:62067*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62067*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7fc000; valaddr_reg:x3; val_offset:62070*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62070*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7fe000; valaddr_reg:x3; val_offset:62073*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62073*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7ff000; valaddr_reg:x3; val_offset:62076*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62076*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7ff800; valaddr_reg:x3; val_offset:62079*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62079*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7ffc00; valaddr_reg:x3; val_offset:62082*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62082*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7ffe00; valaddr_reg:x3; val_offset:62085*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62085*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7fff00; valaddr_reg:x3; val_offset:62088*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62088*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7fff80; valaddr_reg:x3; val_offset:62091*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62091*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7fffc0; valaddr_reg:x3; val_offset:62094*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62094*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7fffe0; valaddr_reg:x3; val_offset:62097*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62097*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7ffff0; valaddr_reg:x3; val_offset:62100*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62100*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7ffff8; valaddr_reg:x3; val_offset:62103*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62103*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7ffffc; valaddr_reg:x3; val_offset:62106*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62106*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7ffffe; valaddr_reg:x3; val_offset:62109*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62109*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x78 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3c7fffff; valaddr_reg:x3; val_offset:62112*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62112*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3f800001; valaddr_reg:x3; val_offset:62115*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62115*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3f800003; valaddr_reg:x3; val_offset:62118*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62118*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3f800007; valaddr_reg:x3; val_offset:62121*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62121*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3f999999; valaddr_reg:x3; val_offset:62124*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62124*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:62127*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62127*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:62130*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62130*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:62133*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62133*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:62136*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62136*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:62139*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62139*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:62142*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62142*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:62145*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62145*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:62148*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62148*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:62151*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62151*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:62154*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62154*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:62157*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62157*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x50fc84 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4e65bf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed0fc84; op2val:0x4e65bf; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:62160*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62160*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed800000; valaddr_reg:x3; val_offset:62163*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62163*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed800001; valaddr_reg:x3; val_offset:62166*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62166*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed800003; valaddr_reg:x3; val_offset:62169*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62169*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed800007; valaddr_reg:x3; val_offset:62172*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62172*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed80000f; valaddr_reg:x3; val_offset:62175*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62175*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed80001f; valaddr_reg:x3; val_offset:62178*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62178*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed80003f; valaddr_reg:x3; val_offset:62181*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62181*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed80007f; valaddr_reg:x3; val_offset:62184*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62184*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed8000ff; valaddr_reg:x3; val_offset:62187*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62187*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed8001ff; valaddr_reg:x3; val_offset:62190*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62190*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed8003ff; valaddr_reg:x3; val_offset:62193*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62193*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed8007ff; valaddr_reg:x3; val_offset:62196*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62196*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed800fff; valaddr_reg:x3; val_offset:62199*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62199*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed801fff; valaddr_reg:x3; val_offset:62202*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62202*0 + 3*161*FLEN/8, x4, x1, x2) + +inst_20735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed803fff; valaddr_reg:x3; val_offset:62205*0 + 3*161*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62205*0 + 3*161*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421632,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421633,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421635,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421639,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421647,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421663,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421695,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421759,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421887,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340422143,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340422655,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340423679,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340425727,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340429823,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340438015,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340454399,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340487167,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340552703,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340683775,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340945919,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2341470207,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2342518783,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2344615935,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2344615936,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2346713088,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2347761664,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348285952,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348548096,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348679168,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348744704,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348777472,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348793856,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348802048,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348806144,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348808192,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809216,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809728,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809984,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810112,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810176,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810208,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810224,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810232,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810236,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810238,32,FLEN) +NAN_BOXED(2127525897,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810239,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006632960,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006632961,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006632963,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006632967,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006632975,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006632991,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006633023,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006633087,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006633215,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006633471,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006633983,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006635007,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006637055,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006641151,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006649343,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006665727,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006698495,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006764031,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1006895103,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1007157247,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1007681535,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1008730111,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1010827263,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1010827264,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1012924416,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1013972992,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1014497280,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1014759424,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1014890496,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1014956032,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1014988800,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015005184,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015013376,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015017472,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015019520,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015020544,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021056,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021312,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021440,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021504,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021536,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021552,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021560,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021564,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021566,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1015021567,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2127625348,32,FLEN) +NAN_BOXED(5137855,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984588800,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984588801,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984588803,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984588807,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984588815,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984588831,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984588863,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984588927,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984589055,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984589311,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984589823,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984590847,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984592895,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984596991,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984605183,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-163.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-163.S new file mode 100644 index 000000000..ca9acae9e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-163.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_20736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed807fff; valaddr_reg:x3; val_offset:62208*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62208*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed80ffff; valaddr_reg:x3; val_offset:62211*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62211*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed81ffff; valaddr_reg:x3; val_offset:62214*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62214*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed83ffff; valaddr_reg:x3; val_offset:62217*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62217*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed87ffff; valaddr_reg:x3; val_offset:62220*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62220*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed8fffff; valaddr_reg:x3; val_offset:62223*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62223*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xed9fffff; valaddr_reg:x3; val_offset:62226*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62226*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedbfffff; valaddr_reg:x3; val_offset:62229*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62229*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedc00000; valaddr_reg:x3; val_offset:62232*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62232*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xede00000; valaddr_reg:x3; val_offset:62235*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62235*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedf00000; valaddr_reg:x3; val_offset:62238*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62238*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedf80000; valaddr_reg:x3; val_offset:62241*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62241*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfc0000; valaddr_reg:x3; val_offset:62244*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62244*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfe0000; valaddr_reg:x3; val_offset:62247*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62247*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedff0000; valaddr_reg:x3; val_offset:62250*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62250*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedff8000; valaddr_reg:x3; val_offset:62253*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62253*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedffc000; valaddr_reg:x3; val_offset:62256*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62256*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedffe000; valaddr_reg:x3; val_offset:62259*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62259*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfff000; valaddr_reg:x3; val_offset:62262*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62262*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfff800; valaddr_reg:x3; val_offset:62265*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62265*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfffc00; valaddr_reg:x3; val_offset:62268*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62268*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfffe00; valaddr_reg:x3; val_offset:62271*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62271*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedffff00; valaddr_reg:x3; val_offset:62274*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62274*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedffff80; valaddr_reg:x3; val_offset:62277*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62277*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedffffc0; valaddr_reg:x3; val_offset:62280*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62280*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedffffe0; valaddr_reg:x3; val_offset:62283*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62283*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfffff0; valaddr_reg:x3; val_offset:62286*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62286*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfffff8; valaddr_reg:x3; val_offset:62289*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62289*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfffffc; valaddr_reg:x3; val_offset:62292*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62292*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedfffffe; valaddr_reg:x3; val_offset:62295*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62295*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xdb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xedffffff; valaddr_reg:x3; val_offset:62298*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62298*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff000001; valaddr_reg:x3; val_offset:62301*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62301*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff000003; valaddr_reg:x3; val_offset:62304*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62304*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff000007; valaddr_reg:x3; val_offset:62307*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62307*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff199999; valaddr_reg:x3; val_offset:62310*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62310*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff249249; valaddr_reg:x3; val_offset:62313*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62313*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff333333; valaddr_reg:x3; val_offset:62316*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62316*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:62319*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62319*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:62322*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62322*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff444444; valaddr_reg:x3; val_offset:62325*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62325*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:62328*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62328*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:62331*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62331*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff666666; valaddr_reg:x3; val_offset:62334*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62334*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:62337*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62337*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:62340*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62340*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:62343*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62343*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x515c22 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x1c83e1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed15c22; op2val:0xc01c83e1; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:62346*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62346*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:62349*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62349*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:62352*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62352*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:62355*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62355*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:62358*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62358*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:62361*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62361*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:62364*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62364*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:62367*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62367*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:62370*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62370*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:62373*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62373*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:62376*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62376*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:62379*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62379*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:62382*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62382*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:62385*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62385*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:62388*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62388*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:62391*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62391*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:62394*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62394*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a800000; valaddr_reg:x3; val_offset:62397*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62397*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a800001; valaddr_reg:x3; val_offset:62400*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62400*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a800003; valaddr_reg:x3; val_offset:62403*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62403*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a800007; valaddr_reg:x3; val_offset:62406*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62406*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a80000f; valaddr_reg:x3; val_offset:62409*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62409*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a80001f; valaddr_reg:x3; val_offset:62412*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62412*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a80003f; valaddr_reg:x3; val_offset:62415*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62415*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a80007f; valaddr_reg:x3; val_offset:62418*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62418*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a8000ff; valaddr_reg:x3; val_offset:62421*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62421*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a8001ff; valaddr_reg:x3; val_offset:62424*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62424*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a8003ff; valaddr_reg:x3; val_offset:62427*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62427*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a8007ff; valaddr_reg:x3; val_offset:62430*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62430*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a800fff; valaddr_reg:x3; val_offset:62433*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62433*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a801fff; valaddr_reg:x3; val_offset:62436*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62436*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a803fff; valaddr_reg:x3; val_offset:62439*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62439*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a807fff; valaddr_reg:x3; val_offset:62442*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62442*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a80ffff; valaddr_reg:x3; val_offset:62445*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62445*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a81ffff; valaddr_reg:x3; val_offset:62448*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62448*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a83ffff; valaddr_reg:x3; val_offset:62451*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62451*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a87ffff; valaddr_reg:x3; val_offset:62454*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62454*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a8fffff; valaddr_reg:x3; val_offset:62457*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62457*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8a9fffff; valaddr_reg:x3; val_offset:62460*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62460*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8abfffff; valaddr_reg:x3; val_offset:62463*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62463*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8ac00000; valaddr_reg:x3; val_offset:62466*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62466*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8ae00000; valaddr_reg:x3; val_offset:62469*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62469*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8af00000; valaddr_reg:x3; val_offset:62472*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62472*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8af80000; valaddr_reg:x3; val_offset:62475*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62475*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afc0000; valaddr_reg:x3; val_offset:62478*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62478*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afe0000; valaddr_reg:x3; val_offset:62481*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62481*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8aff0000; valaddr_reg:x3; val_offset:62484*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62484*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8aff8000; valaddr_reg:x3; val_offset:62487*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62487*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8affc000; valaddr_reg:x3; val_offset:62490*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62490*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8affe000; valaddr_reg:x3; val_offset:62493*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62493*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afff000; valaddr_reg:x3; val_offset:62496*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62496*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afff800; valaddr_reg:x3; val_offset:62499*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62499*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afffc00; valaddr_reg:x3; val_offset:62502*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62502*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afffe00; valaddr_reg:x3; val_offset:62505*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62505*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8affff00; valaddr_reg:x3; val_offset:62508*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62508*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8affff80; valaddr_reg:x3; val_offset:62511*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62511*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8affffc0; valaddr_reg:x3; val_offset:62514*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62514*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8affffe0; valaddr_reg:x3; val_offset:62517*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62517*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afffff0; valaddr_reg:x3; val_offset:62520*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62520*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afffff8; valaddr_reg:x3; val_offset:62523*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62523*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afffffc; valaddr_reg:x3; val_offset:62526*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62526*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8afffffe; valaddr_reg:x3; val_offset:62529*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62529*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5237a1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed237a1; op2val:0x80000000; +op3val:0x8affffff; valaddr_reg:x3; val_offset:62532*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62532*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:62535*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62535*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:62538*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62538*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:62541*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62541*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:62544*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62544*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:62547*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62547*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:62550*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62550*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:62553*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62553*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:62556*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62556*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:62559*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62559*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:62562*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62562*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:62565*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62565*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:62568*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62568*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:62571*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62571*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:62574*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62574*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:62577*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62577*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:62580*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62580*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1000000; valaddr_reg:x3; val_offset:62583*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62583*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1000001; valaddr_reg:x3; val_offset:62586*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62586*0 + 3*162*FLEN/8, x4, x1, x2) + +inst_20863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1000003; valaddr_reg:x3; val_offset:62589*0 + 3*162*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62589*0 + 3*162*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984621567,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984654335,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984719871,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3984850943,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3985113087,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3985637375,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3986685951,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3988783103,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3988783104,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3990880256,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3991928832,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992453120,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992715264,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992846336,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992911872,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992944640,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992961024,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992969216,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992973312,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992975360,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992976384,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992976896,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977152,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977280,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977344,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977376,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977392,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977400,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977404,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977406,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(3992977407,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2127649826,32,FLEN) +NAN_BOXED(3223094241,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644416,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644417,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644419,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644423,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644431,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644447,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644479,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644543,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644671,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644927,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323645439,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323646463,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323648511,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323652607,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323660799,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323677183,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323709951,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323775487,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323906559,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2324168703,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2324692991,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2325741567,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2327838719,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2327838720,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2329935872,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2330984448,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331508736,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331770880,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331901952,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331967488,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332000256,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332016640,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332024832,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332028928,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332030976,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032000,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032512,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032768,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032896,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032960,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032992,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033008,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033016,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033020,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033022,32,FLEN) +NAN_BOXED(2127706017,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033023,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777216,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777217,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777219,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-164.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-164.S new file mode 100644 index 000000000..02035bdb7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-164.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_20864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1000007; valaddr_reg:x3; val_offset:62592*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62592*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x100000f; valaddr_reg:x3; val_offset:62595*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62595*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x100001f; valaddr_reg:x3; val_offset:62598*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62598*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x100003f; valaddr_reg:x3; val_offset:62601*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62601*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x100007f; valaddr_reg:x3; val_offset:62604*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62604*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x10000ff; valaddr_reg:x3; val_offset:62607*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62607*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x10001ff; valaddr_reg:x3; val_offset:62610*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62610*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x10003ff; valaddr_reg:x3; val_offset:62613*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62613*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x10007ff; valaddr_reg:x3; val_offset:62616*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62616*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1000fff; valaddr_reg:x3; val_offset:62619*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62619*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1001fff; valaddr_reg:x3; val_offset:62622*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62622*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1003fff; valaddr_reg:x3; val_offset:62625*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62625*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1007fff; valaddr_reg:x3; val_offset:62628*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62628*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x100ffff; valaddr_reg:x3; val_offset:62631*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62631*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x101ffff; valaddr_reg:x3; val_offset:62634*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62634*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x103ffff; valaddr_reg:x3; val_offset:62637*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62637*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x107ffff; valaddr_reg:x3; val_offset:62640*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62640*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x10fffff; valaddr_reg:x3; val_offset:62643*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62643*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x11fffff; valaddr_reg:x3; val_offset:62646*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62646*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x13fffff; valaddr_reg:x3; val_offset:62649*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62649*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1400000; valaddr_reg:x3; val_offset:62652*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62652*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1600000; valaddr_reg:x3; val_offset:62655*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62655*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1700000; valaddr_reg:x3; val_offset:62658*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62658*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x1780000; valaddr_reg:x3; val_offset:62661*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62661*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17c0000; valaddr_reg:x3; val_offset:62664*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62664*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17e0000; valaddr_reg:x3; val_offset:62667*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62667*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17f0000; valaddr_reg:x3; val_offset:62670*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62670*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17f8000; valaddr_reg:x3; val_offset:62673*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62673*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17fc000; valaddr_reg:x3; val_offset:62676*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62676*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17fe000; valaddr_reg:x3; val_offset:62679*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62679*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17ff000; valaddr_reg:x3; val_offset:62682*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62682*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17ff800; valaddr_reg:x3; val_offset:62685*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62685*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17ffc00; valaddr_reg:x3; val_offset:62688*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62688*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17ffe00; valaddr_reg:x3; val_offset:62691*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62691*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17fff00; valaddr_reg:x3; val_offset:62694*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62694*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17fff80; valaddr_reg:x3; val_offset:62697*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62697*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17fffc0; valaddr_reg:x3; val_offset:62700*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62700*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17fffe0; valaddr_reg:x3; val_offset:62703*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62703*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17ffff0; valaddr_reg:x3; val_offset:62706*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62706*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17ffff8; valaddr_reg:x3; val_offset:62709*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62709*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17ffffc; valaddr_reg:x3; val_offset:62712*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62712*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17ffffe; valaddr_reg:x3; val_offset:62715*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62715*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x529e32 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed29e32; op2val:0x0; +op3val:0x17fffff; valaddr_reg:x3; val_offset:62718*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62718*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2800000; valaddr_reg:x3; val_offset:62721*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62721*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2800001; valaddr_reg:x3; val_offset:62724*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62724*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2800003; valaddr_reg:x3; val_offset:62727*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62727*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2800007; valaddr_reg:x3; val_offset:62730*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62730*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb280000f; valaddr_reg:x3; val_offset:62733*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62733*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb280001f; valaddr_reg:x3; val_offset:62736*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62736*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb280003f; valaddr_reg:x3; val_offset:62739*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62739*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb280007f; valaddr_reg:x3; val_offset:62742*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62742*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb28000ff; valaddr_reg:x3; val_offset:62745*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62745*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb28001ff; valaddr_reg:x3; val_offset:62748*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62748*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb28003ff; valaddr_reg:x3; val_offset:62751*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62751*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb28007ff; valaddr_reg:x3; val_offset:62754*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62754*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2800fff; valaddr_reg:x3; val_offset:62757*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62757*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2801fff; valaddr_reg:x3; val_offset:62760*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62760*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2803fff; valaddr_reg:x3; val_offset:62763*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62763*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2807fff; valaddr_reg:x3; val_offset:62766*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62766*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb280ffff; valaddr_reg:x3; val_offset:62769*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62769*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb281ffff; valaddr_reg:x3; val_offset:62772*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62772*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb283ffff; valaddr_reg:x3; val_offset:62775*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62775*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb287ffff; valaddr_reg:x3; val_offset:62778*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62778*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb28fffff; valaddr_reg:x3; val_offset:62781*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62781*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb29fffff; valaddr_reg:x3; val_offset:62784*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62784*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2bfffff; valaddr_reg:x3; val_offset:62787*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62787*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2c00000; valaddr_reg:x3; val_offset:62790*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62790*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2e00000; valaddr_reg:x3; val_offset:62793*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62793*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2f00000; valaddr_reg:x3; val_offset:62796*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62796*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2f80000; valaddr_reg:x3; val_offset:62799*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62799*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fc0000; valaddr_reg:x3; val_offset:62802*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62802*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fe0000; valaddr_reg:x3; val_offset:62805*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62805*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ff0000; valaddr_reg:x3; val_offset:62808*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62808*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ff8000; valaddr_reg:x3; val_offset:62811*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62811*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ffc000; valaddr_reg:x3; val_offset:62814*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62814*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ffe000; valaddr_reg:x3; val_offset:62817*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62817*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fff000; valaddr_reg:x3; val_offset:62820*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62820*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fff800; valaddr_reg:x3; val_offset:62823*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62823*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fffc00; valaddr_reg:x3; val_offset:62826*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62826*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fffe00; valaddr_reg:x3; val_offset:62829*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62829*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ffff00; valaddr_reg:x3; val_offset:62832*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62832*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ffff80; valaddr_reg:x3; val_offset:62835*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62835*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ffffc0; valaddr_reg:x3; val_offset:62838*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62838*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ffffe0; valaddr_reg:x3; val_offset:62841*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62841*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fffff0; valaddr_reg:x3; val_offset:62844*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62844*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fffff8; valaddr_reg:x3; val_offset:62847*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62847*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fffffc; valaddr_reg:x3; val_offset:62850*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62850*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2fffffe; valaddr_reg:x3; val_offset:62853*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62853*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x65 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xb2ffffff; valaddr_reg:x3; val_offset:62856*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62856*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbf800001; valaddr_reg:x3; val_offset:62859*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62859*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbf800003; valaddr_reg:x3; val_offset:62862*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62862*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbf800007; valaddr_reg:x3; val_offset:62865*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62865*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbf999999; valaddr_reg:x3; val_offset:62868*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62868*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:62871*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62871*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:62874*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62874*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:62877*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62877*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:62880*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62880*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:62883*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62883*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:62886*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62886*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:62889*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62889*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:62892*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62892*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:62895*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62895*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:62898*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62898*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:62901*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62901*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52a5d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4dc773 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2a5d7; op2val:0x804dc773; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:62904*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62904*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:62907*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62907*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:62910*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62910*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:62913*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62913*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:62916*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62916*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:62919*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62919*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:62922*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62922*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:62925*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62925*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:62928*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62928*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:62931*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62931*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:62934*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62934*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:62937*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62937*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:62940*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62940*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:62943*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62943*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:62946*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62946*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:62949*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62949*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:62952*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62952*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9000000; valaddr_reg:x3; val_offset:62955*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62955*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9000001; valaddr_reg:x3; val_offset:62958*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62958*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9000003; valaddr_reg:x3; val_offset:62961*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62961*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9000007; valaddr_reg:x3; val_offset:62964*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62964*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x900000f; valaddr_reg:x3; val_offset:62967*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62967*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x900001f; valaddr_reg:x3; val_offset:62970*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62970*0 + 3*163*FLEN/8, x4, x1, x2) + +inst_20991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x900003f; valaddr_reg:x3; val_offset:62973*0 + 3*163*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62973*0 + 3*163*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777223,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777231,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777247,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777279,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777343,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777471,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777727,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16778239,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16779263,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16781311,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16785407,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16793599,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16809983,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16842751,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16908287,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17039359,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17301503,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(17825791,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(18874367,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(20971519,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(20971520,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(23068672,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24117248,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24641536,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(24903680,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25034752,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25100288,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25133056,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25149440,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25157632,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25161728,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25163776,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25164800,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165312,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165568,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165696,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165760,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165792,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165808,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165816,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165820,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165822,32,FLEN) +NAN_BOXED(2127732274,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165823,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733056,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733057,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733059,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733063,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733071,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733087,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733119,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733183,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733311,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994733567,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994734079,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994735103,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994737151,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994741247,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994749439,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994765823,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994798591,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994864127,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2994995199,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2995257343,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2995781631,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2996830207,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2998927359,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(2998927360,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3001024512,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3002073088,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3002597376,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3002859520,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3002990592,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003056128,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003088896,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003105280,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003113472,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003117568,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003119616,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003120640,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121152,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121408,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121536,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121600,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121632,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121648,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121656,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121660,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121662,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3003121663,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2127734231,32,FLEN) +NAN_BOXED(2152580979,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994944,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994945,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994947,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994951,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994959,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994975,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995007,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-165.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-165.S new file mode 100644 index 000000000..e30c9b0d0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-165.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_20992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x900007f; valaddr_reg:x3; val_offset:62976*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62976*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_20993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x90000ff; valaddr_reg:x3; val_offset:62979*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62979*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_20994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x90001ff; valaddr_reg:x3; val_offset:62982*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62982*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_20995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x90003ff; valaddr_reg:x3; val_offset:62985*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62985*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_20996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x90007ff; valaddr_reg:x3; val_offset:62988*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62988*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_20997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9000fff; valaddr_reg:x3; val_offset:62991*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62991*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_20998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9001fff; valaddr_reg:x3; val_offset:62994*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62994*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_20999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9003fff; valaddr_reg:x3; val_offset:62997*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 62997*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9007fff; valaddr_reg:x3; val_offset:63000*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63000*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x900ffff; valaddr_reg:x3; val_offset:63003*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63003*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x901ffff; valaddr_reg:x3; val_offset:63006*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63006*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x903ffff; valaddr_reg:x3; val_offset:63009*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63009*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x907ffff; valaddr_reg:x3; val_offset:63012*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63012*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x90fffff; valaddr_reg:x3; val_offset:63015*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63015*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x91fffff; valaddr_reg:x3; val_offset:63018*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63018*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x93fffff; valaddr_reg:x3; val_offset:63021*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63021*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9400000; valaddr_reg:x3; val_offset:63024*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63024*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9600000; valaddr_reg:x3; val_offset:63027*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63027*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9700000; valaddr_reg:x3; val_offset:63030*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63030*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x9780000; valaddr_reg:x3; val_offset:63033*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63033*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97c0000; valaddr_reg:x3; val_offset:63036*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63036*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97e0000; valaddr_reg:x3; val_offset:63039*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63039*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97f0000; valaddr_reg:x3; val_offset:63042*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63042*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97f8000; valaddr_reg:x3; val_offset:63045*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63045*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97fc000; valaddr_reg:x3; val_offset:63048*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63048*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97fe000; valaddr_reg:x3; val_offset:63051*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63051*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97ff000; valaddr_reg:x3; val_offset:63054*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63054*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97ff800; valaddr_reg:x3; val_offset:63057*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63057*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97ffc00; valaddr_reg:x3; val_offset:63060*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63060*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97ffe00; valaddr_reg:x3; val_offset:63063*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63063*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97fff00; valaddr_reg:x3; val_offset:63066*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63066*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97fff80; valaddr_reg:x3; val_offset:63069*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63069*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97fffc0; valaddr_reg:x3; val_offset:63072*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63072*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97fffe0; valaddr_reg:x3; val_offset:63075*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63075*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97ffff0; valaddr_reg:x3; val_offset:63078*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63078*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97ffff8; valaddr_reg:x3; val_offset:63081*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63081*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97ffffc; valaddr_reg:x3; val_offset:63084*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63084*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97ffffe; valaddr_reg:x3; val_offset:63087*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63087*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x52df06 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed2df06; op2val:0x0; +op3val:0x97fffff; valaddr_reg:x3; val_offset:63090*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63090*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:63093*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63093*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:63096*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63096*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:63099*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63099*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:63102*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63102*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:63105*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63105*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:63108*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63108*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:63111*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63111*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:63114*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63114*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:63117*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63117*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:63120*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63120*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:63123*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63123*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:63126*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63126*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:63129*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63129*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:63132*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63132*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:63135*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63135*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:63138*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63138*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89800000; valaddr_reg:x3; val_offset:63141*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63141*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89800001; valaddr_reg:x3; val_offset:63144*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63144*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89800003; valaddr_reg:x3; val_offset:63147*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63147*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89800007; valaddr_reg:x3; val_offset:63150*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63150*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8980000f; valaddr_reg:x3; val_offset:63153*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63153*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8980001f; valaddr_reg:x3; val_offset:63156*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63156*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8980003f; valaddr_reg:x3; val_offset:63159*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63159*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8980007f; valaddr_reg:x3; val_offset:63162*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63162*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x898000ff; valaddr_reg:x3; val_offset:63165*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63165*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x898001ff; valaddr_reg:x3; val_offset:63168*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63168*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x898003ff; valaddr_reg:x3; val_offset:63171*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63171*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x898007ff; valaddr_reg:x3; val_offset:63174*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63174*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89800fff; valaddr_reg:x3; val_offset:63177*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63177*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89801fff; valaddr_reg:x3; val_offset:63180*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63180*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89803fff; valaddr_reg:x3; val_offset:63183*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63183*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89807fff; valaddr_reg:x3; val_offset:63186*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63186*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8980ffff; valaddr_reg:x3; val_offset:63189*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63189*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8981ffff; valaddr_reg:x3; val_offset:63192*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63192*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8983ffff; valaddr_reg:x3; val_offset:63195*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63195*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x8987ffff; valaddr_reg:x3; val_offset:63198*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63198*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x898fffff; valaddr_reg:x3; val_offset:63201*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63201*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x899fffff; valaddr_reg:x3; val_offset:63204*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63204*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89bfffff; valaddr_reg:x3; val_offset:63207*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63207*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89c00000; valaddr_reg:x3; val_offset:63210*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63210*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89e00000; valaddr_reg:x3; val_offset:63213*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63213*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89f00000; valaddr_reg:x3; val_offset:63216*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63216*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89f80000; valaddr_reg:x3; val_offset:63219*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63219*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fc0000; valaddr_reg:x3; val_offset:63222*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63222*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fe0000; valaddr_reg:x3; val_offset:63225*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63225*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ff0000; valaddr_reg:x3; val_offset:63228*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63228*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ff8000; valaddr_reg:x3; val_offset:63231*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63231*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ffc000; valaddr_reg:x3; val_offset:63234*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63234*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ffe000; valaddr_reg:x3; val_offset:63237*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63237*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fff000; valaddr_reg:x3; val_offset:63240*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63240*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fff800; valaddr_reg:x3; val_offset:63243*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63243*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fffc00; valaddr_reg:x3; val_offset:63246*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63246*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fffe00; valaddr_reg:x3; val_offset:63249*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63249*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ffff00; valaddr_reg:x3; val_offset:63252*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63252*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ffff80; valaddr_reg:x3; val_offset:63255*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63255*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ffffc0; valaddr_reg:x3; val_offset:63258*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63258*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ffffe0; valaddr_reg:x3; val_offset:63261*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63261*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fffff0; valaddr_reg:x3; val_offset:63264*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63264*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fffff8; valaddr_reg:x3; val_offset:63267*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63267*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fffffc; valaddr_reg:x3; val_offset:63270*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63270*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89fffffe; valaddr_reg:x3; val_offset:63273*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63273*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x53afc5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed3afc5; op2val:0x80000000; +op3val:0x89ffffff; valaddr_reg:x3; val_offset:63276*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63276*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:63279*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63279*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:63282*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63282*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:63285*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63285*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:63288*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63288*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:63291*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63291*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:63294*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63294*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:63297*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63297*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:63300*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63300*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:63303*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63303*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:63306*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63306*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:63309*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63309*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:63312*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63312*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:63315*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63315*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:63318*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63318*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:63321*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63321*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:63324*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63324*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd800000; valaddr_reg:x3; val_offset:63327*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63327*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd800001; valaddr_reg:x3; val_offset:63330*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63330*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd800003; valaddr_reg:x3; val_offset:63333*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63333*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd800007; valaddr_reg:x3; val_offset:63336*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63336*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd80000f; valaddr_reg:x3; val_offset:63339*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63339*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd80001f; valaddr_reg:x3; val_offset:63342*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63342*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd80003f; valaddr_reg:x3; val_offset:63345*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63345*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd80007f; valaddr_reg:x3; val_offset:63348*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63348*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd8000ff; valaddr_reg:x3; val_offset:63351*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63351*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd8001ff; valaddr_reg:x3; val_offset:63354*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63354*0 + 3*164*FLEN/8, x4, x1, x2) + +inst_21119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd8003ff; valaddr_reg:x3; val_offset:63357*0 + 3*164*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63357*0 + 3*164*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995071,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995199,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995455,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995967,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150996991,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150999039,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151003135,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151011327,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151027711,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151060479,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151126015,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151257087,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151519231,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(152043519,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(153092095,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(155189247,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(155189248,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(157286400,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(158334976,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(158859264,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159121408,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159252480,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159318016,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159350784,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159367168,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159375360,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159379456,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159381504,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159382528,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383040,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383296,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383424,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383488,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383520,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383536,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383544,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383548,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383550,32,FLEN) +NAN_BOXED(2127748870,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383551,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867200,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867201,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867203,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867207,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867215,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867231,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867263,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867327,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867455,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867711,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306868223,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306869247,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306871295,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306875391,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306883583,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306899967,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306932735,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306998271,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307129343,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307391487,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307915775,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2308964351,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2311061503,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2311061504,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2313158656,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314207232,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314731520,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314993664,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315124736,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315190272,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315223040,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315239424,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315247616,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315251712,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315253760,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315254784,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255296,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255552,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255680,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255744,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255776,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255792,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255800,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255804,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255806,32,FLEN) +NAN_BOXED(2127802309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255807,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492416,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492417,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492419,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492423,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492431,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492447,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492479,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492543,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492671,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492927,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226493439,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-166.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-166.S new file mode 100644 index 000000000..ea5346153 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-166.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_21120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd8007ff; valaddr_reg:x3; val_offset:63360*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63360*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd800fff; valaddr_reg:x3; val_offset:63363*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63363*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd801fff; valaddr_reg:x3; val_offset:63366*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63366*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd803fff; valaddr_reg:x3; val_offset:63369*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63369*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd807fff; valaddr_reg:x3; val_offset:63372*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63372*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd80ffff; valaddr_reg:x3; val_offset:63375*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63375*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd81ffff; valaddr_reg:x3; val_offset:63378*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63378*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd83ffff; valaddr_reg:x3; val_offset:63381*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63381*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd87ffff; valaddr_reg:x3; val_offset:63384*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63384*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd8fffff; valaddr_reg:x3; val_offset:63387*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63387*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xd9fffff; valaddr_reg:x3; val_offset:63390*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63390*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdbfffff; valaddr_reg:x3; val_offset:63393*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63393*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdc00000; valaddr_reg:x3; val_offset:63396*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63396*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xde00000; valaddr_reg:x3; val_offset:63399*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63399*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdf00000; valaddr_reg:x3; val_offset:63402*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63402*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdf80000; valaddr_reg:x3; val_offset:63405*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63405*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfc0000; valaddr_reg:x3; val_offset:63408*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63408*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfe0000; valaddr_reg:x3; val_offset:63411*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63411*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdff0000; valaddr_reg:x3; val_offset:63414*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63414*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdff8000; valaddr_reg:x3; val_offset:63417*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63417*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdffc000; valaddr_reg:x3; val_offset:63420*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63420*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdffe000; valaddr_reg:x3; val_offset:63423*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63423*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfff000; valaddr_reg:x3; val_offset:63426*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63426*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfff800; valaddr_reg:x3; val_offset:63429*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63429*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfffc00; valaddr_reg:x3; val_offset:63432*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63432*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfffe00; valaddr_reg:x3; val_offset:63435*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63435*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdffff00; valaddr_reg:x3; val_offset:63438*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63438*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdffff80; valaddr_reg:x3; val_offset:63441*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63441*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdffffc0; valaddr_reg:x3; val_offset:63444*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63444*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdffffe0; valaddr_reg:x3; val_offset:63447*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63447*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfffff0; valaddr_reg:x3; val_offset:63450*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63450*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfffff8; valaddr_reg:x3; val_offset:63453*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63453*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfffffc; valaddr_reg:x3; val_offset:63456*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63456*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdfffffe; valaddr_reg:x3; val_offset:63459*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63459*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x542b49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed42b49; op2val:0x0; +op3val:0xdffffff; valaddr_reg:x3; val_offset:63462*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63462*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70800000; valaddr_reg:x3; val_offset:63465*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63465*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70800001; valaddr_reg:x3; val_offset:63468*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63468*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70800003; valaddr_reg:x3; val_offset:63471*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63471*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70800007; valaddr_reg:x3; val_offset:63474*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63474*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7080000f; valaddr_reg:x3; val_offset:63477*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63477*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7080001f; valaddr_reg:x3; val_offset:63480*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63480*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7080003f; valaddr_reg:x3; val_offset:63483*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63483*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7080007f; valaddr_reg:x3; val_offset:63486*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63486*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x708000ff; valaddr_reg:x3; val_offset:63489*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63489*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x708001ff; valaddr_reg:x3; val_offset:63492*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63492*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x708003ff; valaddr_reg:x3; val_offset:63495*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63495*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x708007ff; valaddr_reg:x3; val_offset:63498*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63498*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70800fff; valaddr_reg:x3; val_offset:63501*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63501*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70801fff; valaddr_reg:x3; val_offset:63504*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63504*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70803fff; valaddr_reg:x3; val_offset:63507*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63507*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70807fff; valaddr_reg:x3; val_offset:63510*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63510*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7080ffff; valaddr_reg:x3; val_offset:63513*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63513*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7081ffff; valaddr_reg:x3; val_offset:63516*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63516*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7083ffff; valaddr_reg:x3; val_offset:63519*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63519*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7087ffff; valaddr_reg:x3; val_offset:63522*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63522*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x708fffff; valaddr_reg:x3; val_offset:63525*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63525*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x709fffff; valaddr_reg:x3; val_offset:63528*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63528*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70bfffff; valaddr_reg:x3; val_offset:63531*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63531*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70c00000; valaddr_reg:x3; val_offset:63534*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63534*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70e00000; valaddr_reg:x3; val_offset:63537*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63537*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70f00000; valaddr_reg:x3; val_offset:63540*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63540*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70f80000; valaddr_reg:x3; val_offset:63543*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63543*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fc0000; valaddr_reg:x3; val_offset:63546*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63546*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fe0000; valaddr_reg:x3; val_offset:63549*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63549*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ff0000; valaddr_reg:x3; val_offset:63552*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63552*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ff8000; valaddr_reg:x3; val_offset:63555*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63555*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ffc000; valaddr_reg:x3; val_offset:63558*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63558*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ffe000; valaddr_reg:x3; val_offset:63561*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63561*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fff000; valaddr_reg:x3; val_offset:63564*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63564*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fff800; valaddr_reg:x3; val_offset:63567*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63567*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fffc00; valaddr_reg:x3; val_offset:63570*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63570*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fffe00; valaddr_reg:x3; val_offset:63573*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63573*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ffff00; valaddr_reg:x3; val_offset:63576*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63576*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ffff80; valaddr_reg:x3; val_offset:63579*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63579*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ffffc0; valaddr_reg:x3; val_offset:63582*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63582*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ffffe0; valaddr_reg:x3; val_offset:63585*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63585*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fffff0; valaddr_reg:x3; val_offset:63588*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63588*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fffff8; valaddr_reg:x3; val_offset:63591*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63591*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fffffc; valaddr_reg:x3; val_offset:63594*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63594*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70fffffe; valaddr_reg:x3; val_offset:63597*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63597*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xe1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x70ffffff; valaddr_reg:x3; val_offset:63600*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63600*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f000001; valaddr_reg:x3; val_offset:63603*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63603*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f000003; valaddr_reg:x3; val_offset:63606*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63606*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f000007; valaddr_reg:x3; val_offset:63609*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63609*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f199999; valaddr_reg:x3; val_offset:63612*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63612*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f249249; valaddr_reg:x3; val_offset:63615*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63615*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f333333; valaddr_reg:x3; val_offset:63618*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63618*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:63621*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63621*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:63624*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63624*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f444444; valaddr_reg:x3; val_offset:63627*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63627*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:63630*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63630*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:63633*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63633*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f666666; valaddr_reg:x3; val_offset:63636*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63636*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:63639*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63639*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:63642*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63642*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:63645*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63645*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x546e37 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x1a40b5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed46e37; op2val:0x401a40b5; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:63648*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63648*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80000000; valaddr_reg:x3; val_offset:63651*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63651*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:63654*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63654*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:63657*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63657*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:63660*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63660*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8000000f; valaddr_reg:x3; val_offset:63663*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63663*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8000001f; valaddr_reg:x3; val_offset:63666*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63666*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8000003f; valaddr_reg:x3; val_offset:63669*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63669*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8000007f; valaddr_reg:x3; val_offset:63672*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63672*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x800000ff; valaddr_reg:x3; val_offset:63675*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63675*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x800001ff; valaddr_reg:x3; val_offset:63678*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63678*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x800003ff; valaddr_reg:x3; val_offset:63681*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63681*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x800007ff; valaddr_reg:x3; val_offset:63684*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63684*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80000fff; valaddr_reg:x3; val_offset:63687*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63687*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80001fff; valaddr_reg:x3; val_offset:63690*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63690*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80003fff; valaddr_reg:x3; val_offset:63693*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63693*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80007fff; valaddr_reg:x3; val_offset:63696*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63696*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8000ffff; valaddr_reg:x3; val_offset:63699*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63699*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8001ffff; valaddr_reg:x3; val_offset:63702*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63702*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8003ffff; valaddr_reg:x3; val_offset:63705*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63705*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8007ffff; valaddr_reg:x3; val_offset:63708*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63708*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x800fffff; valaddr_reg:x3; val_offset:63711*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63711*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:63714*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63714*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x801fffff; valaddr_reg:x3; val_offset:63717*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63717*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:63720*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63720*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:63723*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63723*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:63726*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63726*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:63729*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63729*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x803fffff; valaddr_reg:x3; val_offset:63732*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63732*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80400000; valaddr_reg:x3; val_offset:63735*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63735*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:63738*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63738*0 + 3*165*FLEN/8, x4, x1, x2) + +inst_21247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:63741*0 + 3*165*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63741*0 + 3*165*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226494463,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226496511,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226500607,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226508799,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226525183,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226557951,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226623487,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226754559,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(227016703,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(227540991,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(228589567,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(230686719,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(230686720,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(232783872,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(233832448,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234356736,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234618880,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234749952,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234815488,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234848256,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234864640,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234872832,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234876928,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234878976,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880000,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880512,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880768,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880896,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880960,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234880992,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881008,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881016,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881020,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881022,32,FLEN) +NAN_BOXED(2127833929,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881023,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887436800,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887436801,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887436803,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887436807,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887436815,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887436831,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887436863,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887436927,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887437055,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887437311,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887437823,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887438847,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887440895,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887444991,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887453183,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887469567,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887502335,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887567871,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887698943,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1887961087,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1888485375,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1889533951,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1891631103,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1891631104,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1893728256,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1894776832,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895301120,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895563264,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895694336,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895759872,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895792640,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895809024,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895817216,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895821312,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895823360,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895824384,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895824896,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825152,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825280,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825344,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825376,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825392,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825400,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825404,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825406,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(1895825407,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2127851063,32,FLEN) +NAN_BOXED(1075462325,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483663,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483679,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483711,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483775,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483903,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484159,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484671,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147485695,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147487743,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147491839,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147500031,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147516415,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147549183,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147614719,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147745791,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148007935,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148532223,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149580799,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677951,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677952,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-167.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-167.S new file mode 100644 index 000000000..af236769c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-167.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_21248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:63744*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63744*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80600000; valaddr_reg:x3; val_offset:63747*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63747*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:63750*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63750*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:63753*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63753*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80700000; valaddr_reg:x3; val_offset:63756*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63756*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x80780000; valaddr_reg:x3; val_offset:63759*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63759*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807c0000; valaddr_reg:x3; val_offset:63762*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63762*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807e0000; valaddr_reg:x3; val_offset:63765*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63765*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807f0000; valaddr_reg:x3; val_offset:63768*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63768*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807f8000; valaddr_reg:x3; val_offset:63771*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63771*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807fc000; valaddr_reg:x3; val_offset:63774*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63774*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807fe000; valaddr_reg:x3; val_offset:63777*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63777*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807ff000; valaddr_reg:x3; val_offset:63780*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63780*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807ff800; valaddr_reg:x3; val_offset:63783*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63783*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807ffc00; valaddr_reg:x3; val_offset:63786*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63786*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807ffe00; valaddr_reg:x3; val_offset:63789*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63789*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807fff00; valaddr_reg:x3; val_offset:63792*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63792*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807fff80; valaddr_reg:x3; val_offset:63795*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63795*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807fffc0; valaddr_reg:x3; val_offset:63798*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63798*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807fffe0; valaddr_reg:x3; val_offset:63801*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63801*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807ffff0; valaddr_reg:x3; val_offset:63804*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63804*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:63807*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63807*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:63810*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63810*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:63813*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63813*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x55afad and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed5afad; op2val:0x80000000; +op3val:0x807fffff; valaddr_reg:x3; val_offset:63816*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63816*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2800000; valaddr_reg:x3; val_offset:63819*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63819*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2800001; valaddr_reg:x3; val_offset:63822*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63822*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2800003; valaddr_reg:x3; val_offset:63825*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63825*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2800007; valaddr_reg:x3; val_offset:63828*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63828*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe280000f; valaddr_reg:x3; val_offset:63831*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63831*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe280001f; valaddr_reg:x3; val_offset:63834*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63834*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe280003f; valaddr_reg:x3; val_offset:63837*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63837*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe280007f; valaddr_reg:x3; val_offset:63840*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63840*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe28000ff; valaddr_reg:x3; val_offset:63843*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63843*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe28001ff; valaddr_reg:x3; val_offset:63846*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63846*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe28003ff; valaddr_reg:x3; val_offset:63849*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63849*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe28007ff; valaddr_reg:x3; val_offset:63852*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63852*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2800fff; valaddr_reg:x3; val_offset:63855*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63855*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2801fff; valaddr_reg:x3; val_offset:63858*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63858*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2803fff; valaddr_reg:x3; val_offset:63861*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63861*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2807fff; valaddr_reg:x3; val_offset:63864*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63864*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe280ffff; valaddr_reg:x3; val_offset:63867*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63867*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe281ffff; valaddr_reg:x3; val_offset:63870*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63870*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe283ffff; valaddr_reg:x3; val_offset:63873*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63873*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe287ffff; valaddr_reg:x3; val_offset:63876*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63876*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe28fffff; valaddr_reg:x3; val_offset:63879*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63879*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe29fffff; valaddr_reg:x3; val_offset:63882*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63882*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2bfffff; valaddr_reg:x3; val_offset:63885*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63885*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2c00000; valaddr_reg:x3; val_offset:63888*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63888*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2e00000; valaddr_reg:x3; val_offset:63891*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63891*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2f00000; valaddr_reg:x3; val_offset:63894*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63894*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2f80000; valaddr_reg:x3; val_offset:63897*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63897*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fc0000; valaddr_reg:x3; val_offset:63900*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63900*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fe0000; valaddr_reg:x3; val_offset:63903*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63903*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ff0000; valaddr_reg:x3; val_offset:63906*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63906*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ff8000; valaddr_reg:x3; val_offset:63909*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63909*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ffc000; valaddr_reg:x3; val_offset:63912*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63912*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ffe000; valaddr_reg:x3; val_offset:63915*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63915*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fff000; valaddr_reg:x3; val_offset:63918*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63918*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fff800; valaddr_reg:x3; val_offset:63921*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63921*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fffc00; valaddr_reg:x3; val_offset:63924*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63924*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fffe00; valaddr_reg:x3; val_offset:63927*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63927*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ffff00; valaddr_reg:x3; val_offset:63930*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63930*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ffff80; valaddr_reg:x3; val_offset:63933*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63933*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ffffc0; valaddr_reg:x3; val_offset:63936*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63936*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ffffe0; valaddr_reg:x3; val_offset:63939*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63939*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fffff0; valaddr_reg:x3; val_offset:63942*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63942*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fffff8; valaddr_reg:x3; val_offset:63945*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63945*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fffffc; valaddr_reg:x3; val_offset:63948*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63948*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2fffffe; valaddr_reg:x3; val_offset:63951*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63951*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xc5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xe2ffffff; valaddr_reg:x3; val_offset:63954*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63954*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff000001; valaddr_reg:x3; val_offset:63957*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63957*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff000003; valaddr_reg:x3; val_offset:63960*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63960*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff000007; valaddr_reg:x3; val_offset:63963*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63963*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff199999; valaddr_reg:x3; val_offset:63966*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63966*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff249249; valaddr_reg:x3; val_offset:63969*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63969*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff333333; valaddr_reg:x3; val_offset:63972*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63972*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:63975*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63975*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:63978*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63978*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff444444; valaddr_reg:x3; val_offset:63981*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63981*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:63984*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63984*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:63987*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63987*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff666666; valaddr_reg:x3; val_offset:63990*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63990*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:63993*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63993*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:63996*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63996*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:63999*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 63999*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56577b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x18e09b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6577b; op2val:0xc018e09b; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:64002*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64002*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:64005*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64005*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:64008*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64008*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:64011*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64011*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:64014*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64014*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:64017*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64017*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:64020*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64020*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:64023*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64023*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:64026*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64026*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:64029*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64029*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:64032*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64032*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:64035*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64035*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:64038*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64038*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:64041*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64041*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:64044*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64044*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:64047*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64047*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:64050*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64050*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb000000; valaddr_reg:x3; val_offset:64053*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64053*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb000001; valaddr_reg:x3; val_offset:64056*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64056*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb000003; valaddr_reg:x3; val_offset:64059*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64059*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb000007; valaddr_reg:x3; val_offset:64062*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64062*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb00000f; valaddr_reg:x3; val_offset:64065*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64065*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb00001f; valaddr_reg:x3; val_offset:64068*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64068*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb00003f; valaddr_reg:x3; val_offset:64071*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64071*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb00007f; valaddr_reg:x3; val_offset:64074*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64074*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb0000ff; valaddr_reg:x3; val_offset:64077*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64077*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb0001ff; valaddr_reg:x3; val_offset:64080*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64080*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb0003ff; valaddr_reg:x3; val_offset:64083*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64083*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb0007ff; valaddr_reg:x3; val_offset:64086*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64086*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb000fff; valaddr_reg:x3; val_offset:64089*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64089*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb001fff; valaddr_reg:x3; val_offset:64092*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64092*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb003fff; valaddr_reg:x3; val_offset:64095*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64095*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb007fff; valaddr_reg:x3; val_offset:64098*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64098*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb00ffff; valaddr_reg:x3; val_offset:64101*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64101*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb01ffff; valaddr_reg:x3; val_offset:64104*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64104*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb03ffff; valaddr_reg:x3; val_offset:64107*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64107*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb07ffff; valaddr_reg:x3; val_offset:64110*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64110*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb0fffff; valaddr_reg:x3; val_offset:64113*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64113*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb1fffff; valaddr_reg:x3; val_offset:64116*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64116*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb3fffff; valaddr_reg:x3; val_offset:64119*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64119*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb400000; valaddr_reg:x3; val_offset:64122*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64122*0 + 3*166*FLEN/8, x4, x1, x2) + +inst_21375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb600000; valaddr_reg:x3; val_offset:64125*0 + 3*166*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64125*0 + 3*166*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153775104,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154823680,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155347968,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155610112,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155741184,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155806720,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155839488,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155855872,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155864064,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155868160,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155870208,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871232,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871744,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872000,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872128,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872192,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872224,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872240,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2127933357,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872255,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039424,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039425,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039427,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039431,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039439,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039455,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039487,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039551,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039679,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800039935,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800040447,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800041471,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800043519,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800047615,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800055807,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800072191,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800104959,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800170495,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800301567,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3800563711,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3801087999,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3802136575,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3804233727,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3804233728,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3806330880,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3807379456,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3807903744,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808165888,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808296960,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808362496,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808395264,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808411648,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808419840,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808423936,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808425984,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808427008,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808427520,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808427776,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808427904,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808427968,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808428000,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808428016,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808428024,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808428028,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808428030,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(3808428031,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2127976315,32,FLEN) +NAN_BOXED(3222855835,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549376,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549377,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549379,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549383,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549391,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549407,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549439,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549503,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549631,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549887,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184550399,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184551423,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184553471,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184557567,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184565759,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184582143,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184614911,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184680447,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184811519,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(185073663,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(185597951,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(186646527,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(188743679,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(188743680,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(190840832,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-168.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-168.S new file mode 100644 index 000000000..40f4bb11e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-168.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_21376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb700000; valaddr_reg:x3; val_offset:64128*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64128*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb780000; valaddr_reg:x3; val_offset:64131*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64131*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7c0000; valaddr_reg:x3; val_offset:64134*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64134*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7e0000; valaddr_reg:x3; val_offset:64137*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64137*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7f0000; valaddr_reg:x3; val_offset:64140*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64140*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7f8000; valaddr_reg:x3; val_offset:64143*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64143*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7fc000; valaddr_reg:x3; val_offset:64146*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64146*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7fe000; valaddr_reg:x3; val_offset:64149*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64149*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7ff000; valaddr_reg:x3; val_offset:64152*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64152*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7ff800; valaddr_reg:x3; val_offset:64155*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64155*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7ffc00; valaddr_reg:x3; val_offset:64158*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64158*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7ffe00; valaddr_reg:x3; val_offset:64161*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64161*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7fff00; valaddr_reg:x3; val_offset:64164*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64164*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7fff80; valaddr_reg:x3; val_offset:64167*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64167*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7fffc0; valaddr_reg:x3; val_offset:64170*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64170*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7fffe0; valaddr_reg:x3; val_offset:64173*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64173*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7ffff0; valaddr_reg:x3; val_offset:64176*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64176*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7ffff8; valaddr_reg:x3; val_offset:64179*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64179*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7ffffc; valaddr_reg:x3; val_offset:64182*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64182*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7ffffe; valaddr_reg:x3; val_offset:64185*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64185*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x56f7eb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed6f7eb; op2val:0x0; +op3val:0xb7fffff; valaddr_reg:x3; val_offset:64188*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64188*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:64191*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64191*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:64194*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64194*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:64197*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64197*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:64200*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64200*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:64203*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64203*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:64206*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64206*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:64209*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64209*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:64212*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64212*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:64215*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64215*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:64218*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64218*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:64221*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64221*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:64224*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64224*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:64227*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64227*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:64230*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64230*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:64233*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64233*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:64236*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64236*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90000000; valaddr_reg:x3; val_offset:64239*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64239*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90000001; valaddr_reg:x3; val_offset:64242*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64242*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90000003; valaddr_reg:x3; val_offset:64245*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64245*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90000007; valaddr_reg:x3; val_offset:64248*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64248*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x9000000f; valaddr_reg:x3; val_offset:64251*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64251*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x9000001f; valaddr_reg:x3; val_offset:64254*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64254*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x9000003f; valaddr_reg:x3; val_offset:64257*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64257*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x9000007f; valaddr_reg:x3; val_offset:64260*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64260*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x900000ff; valaddr_reg:x3; val_offset:64263*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64263*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x900001ff; valaddr_reg:x3; val_offset:64266*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64266*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x900003ff; valaddr_reg:x3; val_offset:64269*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64269*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x900007ff; valaddr_reg:x3; val_offset:64272*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64272*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90000fff; valaddr_reg:x3; val_offset:64275*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64275*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90001fff; valaddr_reg:x3; val_offset:64278*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64278*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90003fff; valaddr_reg:x3; val_offset:64281*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64281*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90007fff; valaddr_reg:x3; val_offset:64284*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64284*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x9000ffff; valaddr_reg:x3; val_offset:64287*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64287*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x9001ffff; valaddr_reg:x3; val_offset:64290*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64290*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x9003ffff; valaddr_reg:x3; val_offset:64293*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64293*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x9007ffff; valaddr_reg:x3; val_offset:64296*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64296*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x900fffff; valaddr_reg:x3; val_offset:64299*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64299*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x901fffff; valaddr_reg:x3; val_offset:64302*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64302*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x903fffff; valaddr_reg:x3; val_offset:64305*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64305*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90400000; valaddr_reg:x3; val_offset:64308*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64308*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90600000; valaddr_reg:x3; val_offset:64311*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64311*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90700000; valaddr_reg:x3; val_offset:64314*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64314*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x90780000; valaddr_reg:x3; val_offset:64317*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64317*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907c0000; valaddr_reg:x3; val_offset:64320*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64320*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907e0000; valaddr_reg:x3; val_offset:64323*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64323*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907f0000; valaddr_reg:x3; val_offset:64326*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64326*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907f8000; valaddr_reg:x3; val_offset:64329*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64329*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907fc000; valaddr_reg:x3; val_offset:64332*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64332*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907fe000; valaddr_reg:x3; val_offset:64335*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64335*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907ff000; valaddr_reg:x3; val_offset:64338*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64338*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907ff800; valaddr_reg:x3; val_offset:64341*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64341*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907ffc00; valaddr_reg:x3; val_offset:64344*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64344*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907ffe00; valaddr_reg:x3; val_offset:64347*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64347*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907fff00; valaddr_reg:x3; val_offset:64350*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64350*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907fff80; valaddr_reg:x3; val_offset:64353*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64353*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907fffc0; valaddr_reg:x3; val_offset:64356*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64356*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907fffe0; valaddr_reg:x3; val_offset:64359*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64359*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907ffff0; valaddr_reg:x3; val_offset:64362*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64362*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907ffff8; valaddr_reg:x3; val_offset:64365*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64365*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907ffffc; valaddr_reg:x3; val_offset:64368*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64368*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907ffffe; valaddr_reg:x3; val_offset:64371*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64371*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x588a07 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed88a07; op2val:0x80000000; +op3val:0x907fffff; valaddr_reg:x3; val_offset:64374*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64374*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:64377*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64377*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:64380*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64380*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:64383*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64383*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:64386*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64386*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:64389*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64389*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:64392*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64392*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:64395*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64395*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:64398*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64398*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:64401*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64401*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:64404*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64404*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:64407*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64407*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:64410*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64410*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:64413*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64413*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:64416*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64416*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:64419*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64419*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:64422*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64422*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e000000; valaddr_reg:x3; val_offset:64425*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64425*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e000001; valaddr_reg:x3; val_offset:64428*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64428*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e000003; valaddr_reg:x3; val_offset:64431*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64431*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e000007; valaddr_reg:x3; val_offset:64434*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64434*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e00000f; valaddr_reg:x3; val_offset:64437*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64437*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e00001f; valaddr_reg:x3; val_offset:64440*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64440*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e00003f; valaddr_reg:x3; val_offset:64443*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64443*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e00007f; valaddr_reg:x3; val_offset:64446*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64446*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e0000ff; valaddr_reg:x3; val_offset:64449*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64449*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e0001ff; valaddr_reg:x3; val_offset:64452*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64452*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e0003ff; valaddr_reg:x3; val_offset:64455*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64455*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e0007ff; valaddr_reg:x3; val_offset:64458*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64458*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e000fff; valaddr_reg:x3; val_offset:64461*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64461*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e001fff; valaddr_reg:x3; val_offset:64464*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64464*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e003fff; valaddr_reg:x3; val_offset:64467*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64467*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e007fff; valaddr_reg:x3; val_offset:64470*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64470*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e00ffff; valaddr_reg:x3; val_offset:64473*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64473*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e01ffff; valaddr_reg:x3; val_offset:64476*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64476*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e03ffff; valaddr_reg:x3; val_offset:64479*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64479*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e07ffff; valaddr_reg:x3; val_offset:64482*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64482*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e0fffff; valaddr_reg:x3; val_offset:64485*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64485*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e1fffff; valaddr_reg:x3; val_offset:64488*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64488*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e3fffff; valaddr_reg:x3; val_offset:64491*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64491*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e400000; valaddr_reg:x3; val_offset:64494*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64494*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e600000; valaddr_reg:x3; val_offset:64497*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64497*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e700000; valaddr_reg:x3; val_offset:64500*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64500*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e780000; valaddr_reg:x3; val_offset:64503*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64503*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7c0000; valaddr_reg:x3; val_offset:64506*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64506*0 + 3*167*FLEN/8, x4, x1, x2) + +inst_21503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7e0000; valaddr_reg:x3; val_offset:64509*0 + 3*167*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64509*0 + 3*167*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(191889408,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192413696,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192675840,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192806912,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192872448,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192905216,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192921600,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192929792,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192933888,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192935936,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192936960,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937472,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937728,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937856,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937920,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937952,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937968,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937976,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937980,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937982,32,FLEN) +NAN_BOXED(2128017387,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937983,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919104,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919105,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919107,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919111,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919119,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919135,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919167,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919231,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919359,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919615,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415920127,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415921151,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415923199,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415927295,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415935487,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415951871,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415984639,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416050175,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416181247,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416443391,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416967679,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2418016255,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2420113407,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2420113408,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2422210560,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2423259136,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2423783424,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424045568,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424176640,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424242176,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424274944,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424291328,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424299520,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424303616,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424305664,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424306688,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307200,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307456,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307584,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307648,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307680,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307696,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307704,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307708,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307710,32,FLEN) +NAN_BOXED(2128120327,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307711,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364672,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364673,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364675,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364679,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364687,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364703,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364735,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364799,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364927,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382365183,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382365695,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382366719,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382368767,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382372863,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382381055,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382397439,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382430207,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382495743,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382626815,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382888959,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2383413247,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2384461823,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2386558975,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2386558976,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2388656128,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2389704704,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390228992,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390491136,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390622208,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-169.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-169.S new file mode 100644 index 000000000..d0367f101 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-169.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_21504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7f0000; valaddr_reg:x3; val_offset:64512*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64512*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7f8000; valaddr_reg:x3; val_offset:64515*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64515*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7fc000; valaddr_reg:x3; val_offset:64518*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64518*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7fe000; valaddr_reg:x3; val_offset:64521*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64521*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7ff000; valaddr_reg:x3; val_offset:64524*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64524*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7ff800; valaddr_reg:x3; val_offset:64527*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64527*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:64530*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64530*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:64533*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64533*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7fff00; valaddr_reg:x3; val_offset:64536*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64536*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7fff80; valaddr_reg:x3; val_offset:64539*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64539*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:64542*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64542*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:64545*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64545*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:64548*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64548*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:64551*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64551*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:64554*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64554*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:64557*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64557*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x595956 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed95956; op2val:0x80000000; +op3val:0x8e7fffff; valaddr_reg:x3; val_offset:64560*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64560*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbf800001; valaddr_reg:x3; val_offset:64563*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64563*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbf800003; valaddr_reg:x3; val_offset:64566*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64566*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbf800007; valaddr_reg:x3; val_offset:64569*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64569*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbf999999; valaddr_reg:x3; val_offset:64572*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64572*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:64575*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64575*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:64578*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64578*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:64581*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64581*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:64584*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64584*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:64587*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64587*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:64590*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64590*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:64593*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64593*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:64596*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64596*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:64599*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64599*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:64602*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64602*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:64605*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64605*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:64608*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64608*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6000000; valaddr_reg:x3; val_offset:64611*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64611*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6000001; valaddr_reg:x3; val_offset:64614*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64614*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6000003; valaddr_reg:x3; val_offset:64617*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64617*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6000007; valaddr_reg:x3; val_offset:64620*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64620*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc600000f; valaddr_reg:x3; val_offset:64623*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64623*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc600001f; valaddr_reg:x3; val_offset:64626*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64626*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc600003f; valaddr_reg:x3; val_offset:64629*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64629*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc600007f; valaddr_reg:x3; val_offset:64632*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64632*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc60000ff; valaddr_reg:x3; val_offset:64635*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64635*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc60001ff; valaddr_reg:x3; val_offset:64638*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64638*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc60003ff; valaddr_reg:x3; val_offset:64641*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64641*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc60007ff; valaddr_reg:x3; val_offset:64644*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64644*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6000fff; valaddr_reg:x3; val_offset:64647*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64647*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6001fff; valaddr_reg:x3; val_offset:64650*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64650*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6003fff; valaddr_reg:x3; val_offset:64653*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64653*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6007fff; valaddr_reg:x3; val_offset:64656*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64656*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc600ffff; valaddr_reg:x3; val_offset:64659*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64659*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc601ffff; valaddr_reg:x3; val_offset:64662*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64662*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc603ffff; valaddr_reg:x3; val_offset:64665*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64665*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc607ffff; valaddr_reg:x3; val_offset:64668*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64668*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc60fffff; valaddr_reg:x3; val_offset:64671*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64671*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc61fffff; valaddr_reg:x3; val_offset:64674*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64674*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc63fffff; valaddr_reg:x3; val_offset:64677*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64677*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6400000; valaddr_reg:x3; val_offset:64680*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64680*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6600000; valaddr_reg:x3; val_offset:64683*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64683*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6700000; valaddr_reg:x3; val_offset:64686*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64686*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc6780000; valaddr_reg:x3; val_offset:64689*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64689*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67c0000; valaddr_reg:x3; val_offset:64692*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64692*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67e0000; valaddr_reg:x3; val_offset:64695*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64695*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67f0000; valaddr_reg:x3; val_offset:64698*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64698*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67f8000; valaddr_reg:x3; val_offset:64701*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64701*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67fc000; valaddr_reg:x3; val_offset:64704*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64704*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67fe000; valaddr_reg:x3; val_offset:64707*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64707*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67ff000; valaddr_reg:x3; val_offset:64710*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64710*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67ff800; valaddr_reg:x3; val_offset:64713*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64713*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67ffc00; valaddr_reg:x3; val_offset:64716*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64716*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67ffe00; valaddr_reg:x3; val_offset:64719*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64719*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67fff00; valaddr_reg:x3; val_offset:64722*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64722*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67fff80; valaddr_reg:x3; val_offset:64725*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64725*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67fffc0; valaddr_reg:x3; val_offset:64728*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64728*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67fffe0; valaddr_reg:x3; val_offset:64731*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64731*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67ffff0; valaddr_reg:x3; val_offset:64734*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64734*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67ffff8; valaddr_reg:x3; val_offset:64737*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64737*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67ffffc; valaddr_reg:x3; val_offset:64740*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64740*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67ffffe; valaddr_reg:x3; val_offset:64743*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64743*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e85a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b3015 and fs3 == 1 and fe3 == 0x8c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e85a; op2val:0x804b3015; +op3val:0xc67fffff; valaddr_reg:x3; val_offset:64746*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64746*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9800000; valaddr_reg:x3; val_offset:64749*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64749*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9800001; valaddr_reg:x3; val_offset:64752*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64752*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9800003; valaddr_reg:x3; val_offset:64755*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64755*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9800007; valaddr_reg:x3; val_offset:64758*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64758*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa980000f; valaddr_reg:x3; val_offset:64761*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64761*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa980001f; valaddr_reg:x3; val_offset:64764*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64764*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa980003f; valaddr_reg:x3; val_offset:64767*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64767*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa980007f; valaddr_reg:x3; val_offset:64770*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64770*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa98000ff; valaddr_reg:x3; val_offset:64773*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64773*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa98001ff; valaddr_reg:x3; val_offset:64776*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64776*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa98003ff; valaddr_reg:x3; val_offset:64779*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64779*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa98007ff; valaddr_reg:x3; val_offset:64782*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64782*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9800fff; valaddr_reg:x3; val_offset:64785*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64785*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9801fff; valaddr_reg:x3; val_offset:64788*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64788*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9803fff; valaddr_reg:x3; val_offset:64791*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64791*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9807fff; valaddr_reg:x3; val_offset:64794*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64794*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa980ffff; valaddr_reg:x3; val_offset:64797*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64797*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa981ffff; valaddr_reg:x3; val_offset:64800*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64800*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa983ffff; valaddr_reg:x3; val_offset:64803*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64803*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa987ffff; valaddr_reg:x3; val_offset:64806*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64806*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa98fffff; valaddr_reg:x3; val_offset:64809*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64809*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa99fffff; valaddr_reg:x3; val_offset:64812*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64812*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9bfffff; valaddr_reg:x3; val_offset:64815*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64815*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9c00000; valaddr_reg:x3; val_offset:64818*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64818*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9e00000; valaddr_reg:x3; val_offset:64821*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64821*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9f00000; valaddr_reg:x3; val_offset:64824*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64824*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9f80000; valaddr_reg:x3; val_offset:64827*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64827*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fc0000; valaddr_reg:x3; val_offset:64830*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64830*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fe0000; valaddr_reg:x3; val_offset:64833*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64833*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ff0000; valaddr_reg:x3; val_offset:64836*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64836*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ff8000; valaddr_reg:x3; val_offset:64839*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64839*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ffc000; valaddr_reg:x3; val_offset:64842*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64842*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ffe000; valaddr_reg:x3; val_offset:64845*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64845*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fff000; valaddr_reg:x3; val_offset:64848*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64848*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fff800; valaddr_reg:x3; val_offset:64851*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64851*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fffc00; valaddr_reg:x3; val_offset:64854*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64854*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fffe00; valaddr_reg:x3; val_offset:64857*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64857*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ffff00; valaddr_reg:x3; val_offset:64860*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64860*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ffff80; valaddr_reg:x3; val_offset:64863*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64863*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ffffc0; valaddr_reg:x3; val_offset:64866*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64866*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ffffe0; valaddr_reg:x3; val_offset:64869*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64869*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fffff0; valaddr_reg:x3; val_offset:64872*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64872*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fffff8; valaddr_reg:x3; val_offset:64875*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64875*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fffffc; valaddr_reg:x3; val_offset:64878*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64878*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9fffffe; valaddr_reg:x3; val_offset:64881*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64881*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x53 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xa9ffffff; valaddr_reg:x3; val_offset:64884*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64884*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbf800001; valaddr_reg:x3; val_offset:64887*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64887*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbf800003; valaddr_reg:x3; val_offset:64890*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64890*0 + 3*168*FLEN/8, x4, x1, x2) + +inst_21631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbf800007; valaddr_reg:x3; val_offset:64893*0 + 3*168*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64893*0 + 3*168*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390687744,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390720512,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390736896,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390745088,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390749184,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390751232,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390752256,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390752768,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753024,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753152,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753216,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753248,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753264,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753272,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753276,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753278,32,FLEN) +NAN_BOXED(2128173398,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753279,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321888768,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321888769,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321888771,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321888775,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321888783,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321888799,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321888831,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321888895,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321889023,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321889279,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321889791,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321890815,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321892863,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321896959,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321905151,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321921535,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3321954303,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3322019839,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3322150911,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3322413055,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3322937343,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3323985919,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3326083071,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3326083072,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3328180224,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3329228800,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3329753088,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330015232,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330146304,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330211840,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330244608,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330260992,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330269184,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330273280,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330275328,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330276352,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330276864,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277120,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277248,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277312,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277344,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277360,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277368,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277372,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277374,32,FLEN) +NAN_BOXED(2128210010,32,FLEN) +NAN_BOXED(2152411157,32,FLEN) +NAN_BOXED(3330277375,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738112,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738113,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738115,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738119,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738127,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738143,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738175,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738239,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738367,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843738623,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843739135,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843740159,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843742207,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843746303,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843754495,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843770879,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843803647,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2843869183,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2844000255,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2844262399,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2844786687,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2845835263,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2847932415,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2847932416,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2850029568,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2851078144,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2851602432,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2851864576,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2851995648,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852061184,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852093952,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852110336,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852118528,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852122624,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852124672,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852125696,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126208,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126464,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126592,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126656,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126688,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126704,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126712,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126716,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126718,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(2852126719,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-17.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-17.S new file mode 100644 index 000000000..a574a3d54 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-17.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_2048: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb08000ff; valaddr_reg:x3; val_offset:6144*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6144*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2049: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb08001ff; valaddr_reg:x3; val_offset:6147*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6147*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2050: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb08003ff; valaddr_reg:x3; val_offset:6150*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6150*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2051: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb08007ff; valaddr_reg:x3; val_offset:6153*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6153*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2052: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0800fff; valaddr_reg:x3; val_offset:6156*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6156*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2053: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0801fff; valaddr_reg:x3; val_offset:6159*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6159*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2054: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0803fff; valaddr_reg:x3; val_offset:6162*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6162*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2055: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0807fff; valaddr_reg:x3; val_offset:6165*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6165*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2056: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb080ffff; valaddr_reg:x3; val_offset:6168*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6168*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2057: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb081ffff; valaddr_reg:x3; val_offset:6171*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6171*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2058: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb083ffff; valaddr_reg:x3; val_offset:6174*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6174*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2059: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb087ffff; valaddr_reg:x3; val_offset:6177*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6177*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2060: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb08fffff; valaddr_reg:x3; val_offset:6180*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6180*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2061: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb09fffff; valaddr_reg:x3; val_offset:6183*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6183*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2062: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0bfffff; valaddr_reg:x3; val_offset:6186*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6186*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2063: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0c00000; valaddr_reg:x3; val_offset:6189*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6189*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2064: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0e00000; valaddr_reg:x3; val_offset:6192*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6192*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2065: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0f00000; valaddr_reg:x3; val_offset:6195*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6195*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2066: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0f80000; valaddr_reg:x3; val_offset:6198*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6198*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2067: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fc0000; valaddr_reg:x3; val_offset:6201*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6201*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2068: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fe0000; valaddr_reg:x3; val_offset:6204*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6204*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2069: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ff0000; valaddr_reg:x3; val_offset:6207*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6207*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2070: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ff8000; valaddr_reg:x3; val_offset:6210*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6210*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2071: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ffc000; valaddr_reg:x3; val_offset:6213*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6213*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2072: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ffe000; valaddr_reg:x3; val_offset:6216*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6216*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2073: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fff000; valaddr_reg:x3; val_offset:6219*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6219*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2074: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fff800; valaddr_reg:x3; val_offset:6222*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6222*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2075: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fffc00; valaddr_reg:x3; val_offset:6225*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6225*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2076: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fffe00; valaddr_reg:x3; val_offset:6228*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6228*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2077: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ffff00; valaddr_reg:x3; val_offset:6231*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6231*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2078: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ffff80; valaddr_reg:x3; val_offset:6234*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6234*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2079: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ffffc0; valaddr_reg:x3; val_offset:6237*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6237*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2080: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ffffe0; valaddr_reg:x3; val_offset:6240*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6240*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2081: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fffff0; valaddr_reg:x3; val_offset:6243*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6243*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2082: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fffff8; valaddr_reg:x3; val_offset:6246*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6246*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2083: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fffffc; valaddr_reg:x3; val_offset:6249*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6249*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2084: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0fffffe; valaddr_reg:x3; val_offset:6252*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6252*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2085: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x61 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xb0ffffff; valaddr_reg:x3; val_offset:6255*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6255*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2086: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbf800001; valaddr_reg:x3; val_offset:6258*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6258*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2087: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbf800003; valaddr_reg:x3; val_offset:6261*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6261*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2088: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbf800007; valaddr_reg:x3; val_offset:6264*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6264*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2089: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbf999999; valaddr_reg:x3; val_offset:6267*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6267*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2090: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:6270*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6270*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2091: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:6273*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6273*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2092: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:6276*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6276*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2093: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:6279*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6279*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2094: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:6282*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6282*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2095: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:6285*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6285*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2096: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:6288*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6288*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2097: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:6291*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6291*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2098: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:6294*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6294*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2099: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:6297*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6297*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2100: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:6300*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6300*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2101: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x192922 and fs2 == 1 and fe2 == 0x03 and fm2 == 0x55f1fb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d192922; op2val:0x81d5f1fb; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:6303*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6303*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2102: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:6306*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6306*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2103: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:6309*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6309*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2104: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:6312*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6312*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2105: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:6315*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6315*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2106: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:6318*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6318*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2107: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:6321*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6321*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2108: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:6324*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6324*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2109: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:6327*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6327*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2110: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:6330*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6330*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2111: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:6333*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6333*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2112: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:6336*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6336*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2113: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:6339*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6339*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2114: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:6342*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6342*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2115: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:6345*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6345*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2116: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:6348*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6348*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2117: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:6351*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6351*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2118: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b800000; valaddr_reg:x3; val_offset:6354*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6354*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2119: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b800001; valaddr_reg:x3; val_offset:6357*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6357*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2120: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b800003; valaddr_reg:x3; val_offset:6360*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6360*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2121: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b800007; valaddr_reg:x3; val_offset:6363*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6363*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2122: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b80000f; valaddr_reg:x3; val_offset:6366*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6366*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2123: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b80001f; valaddr_reg:x3; val_offset:6369*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6369*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2124: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b80003f; valaddr_reg:x3; val_offset:6372*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6372*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2125: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b80007f; valaddr_reg:x3; val_offset:6375*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6375*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2126: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b8000ff; valaddr_reg:x3; val_offset:6378*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6378*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2127: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b8001ff; valaddr_reg:x3; val_offset:6381*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6381*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2128: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b8003ff; valaddr_reg:x3; val_offset:6384*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6384*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2129: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b8007ff; valaddr_reg:x3; val_offset:6387*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6387*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2130: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b800fff; valaddr_reg:x3; val_offset:6390*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6390*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2131: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b801fff; valaddr_reg:x3; val_offset:6393*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6393*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2132: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b803fff; valaddr_reg:x3; val_offset:6396*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6396*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2133: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b807fff; valaddr_reg:x3; val_offset:6399*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6399*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2134: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b80ffff; valaddr_reg:x3; val_offset:6402*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6402*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2135: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b81ffff; valaddr_reg:x3; val_offset:6405*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6405*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2136: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b83ffff; valaddr_reg:x3; val_offset:6408*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6408*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2137: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b87ffff; valaddr_reg:x3; val_offset:6411*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6411*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2138: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b8fffff; valaddr_reg:x3; val_offset:6414*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6414*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2139: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3b9fffff; valaddr_reg:x3; val_offset:6417*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6417*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2140: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bbfffff; valaddr_reg:x3; val_offset:6420*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6420*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2141: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bc00000; valaddr_reg:x3; val_offset:6423*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6423*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2142: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3be00000; valaddr_reg:x3; val_offset:6426*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6426*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2143: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bf00000; valaddr_reg:x3; val_offset:6429*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6429*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2144: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bf80000; valaddr_reg:x3; val_offset:6432*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6432*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2145: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfc0000; valaddr_reg:x3; val_offset:6435*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6435*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2146: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfe0000; valaddr_reg:x3; val_offset:6438*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6438*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2147: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bff0000; valaddr_reg:x3; val_offset:6441*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6441*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2148: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bff8000; valaddr_reg:x3; val_offset:6444*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6444*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2149: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bffc000; valaddr_reg:x3; val_offset:6447*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6447*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2150: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bffe000; valaddr_reg:x3; val_offset:6450*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6450*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2151: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfff000; valaddr_reg:x3; val_offset:6453*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6453*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2152: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfff800; valaddr_reg:x3; val_offset:6456*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6456*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2153: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfffc00; valaddr_reg:x3; val_offset:6459*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6459*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2154: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfffe00; valaddr_reg:x3; val_offset:6462*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6462*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2155: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bffff00; valaddr_reg:x3; val_offset:6465*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6465*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2156: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bffff80; valaddr_reg:x3; val_offset:6468*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6468*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2157: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bffffc0; valaddr_reg:x3; val_offset:6471*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6471*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2158: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bffffe0; valaddr_reg:x3; val_offset:6474*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6474*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2159: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfffff0; valaddr_reg:x3; val_offset:6477*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6477*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2160: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfffff8; valaddr_reg:x3; val_offset:6480*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6480*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2161: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfffffc; valaddr_reg:x3; val_offset:6483*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6483*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2162: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bfffffe; valaddr_reg:x3; val_offset:6486*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6486*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2163: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x2a943e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d2a943e; op2val:0x0; +op3val:0x3bffffff; valaddr_reg:x3; val_offset:6489*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6489*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2164: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f800000; valaddr_reg:x3; val_offset:6492*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6492*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2165: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f800001; valaddr_reg:x3; val_offset:6495*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6495*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2166: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f800003; valaddr_reg:x3; val_offset:6498*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6498*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2167: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f800007; valaddr_reg:x3; val_offset:6501*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6501*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2168: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f80000f; valaddr_reg:x3; val_offset:6504*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6504*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2169: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f80001f; valaddr_reg:x3; val_offset:6507*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6507*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2170: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f80003f; valaddr_reg:x3; val_offset:6510*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6510*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2171: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f80007f; valaddr_reg:x3; val_offset:6513*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6513*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2172: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f8000ff; valaddr_reg:x3; val_offset:6516*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6516*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2173: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f8001ff; valaddr_reg:x3; val_offset:6519*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6519*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2174: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f8003ff; valaddr_reg:x3; val_offset:6522*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6522*0 + 3*16*FLEN/8, x4, x1, x2) + +inst_2175: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f8007ff; valaddr_reg:x3; val_offset:6525*0 + 3*16*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6525*0 + 3*16*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961178879,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961179135,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961179647,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961180671,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961182719,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961186815,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961195007,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961211391,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961244159,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961309695,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961440767,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2961702911,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2962227199,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2963275775,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2965372927,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2965372928,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2967470080,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2968518656,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969042944,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969305088,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969436160,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969501696,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969534464,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969550848,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969559040,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969563136,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969565184,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969566208,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969566720,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969566976,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969567104,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969567168,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969567200,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969567216,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969567224,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969567228,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969567230,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(2969567231,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2098800930,32,FLEN) +NAN_BOXED(2178281979,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244352,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244353,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244355,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244359,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244367,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244383,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244415,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244479,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244607,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998244863,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998245375,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998246399,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998248447,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998252543,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998260735,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998277119,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998309887,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998375423,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998506495,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(998768639,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(999292927,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1000341503,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1002438655,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1002438656,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1004535808,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1005584384,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006108672,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006370816,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006501888,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006567424,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006600192,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006616576,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006624768,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006628864,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006630912,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006631936,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632448,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632704,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632832,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632896,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632928,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632944,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632952,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632956,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632958,32,FLEN) +NAN_BOXED(2099942462,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1006632959,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353216,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353231,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353247,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353279,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353343,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353471,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065353727,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065354239,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065355263,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-170.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-170.S new file mode 100644 index 000000000..d5a837646 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-170.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_21632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbf999999; valaddr_reg:x3; val_offset:64896*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64896*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:64899*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64899*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:64902*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64902*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:64905*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64905*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:64908*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64908*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:64911*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64911*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:64914*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64914*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:64917*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64917*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:64920*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64920*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:64923*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64923*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:64926*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64926*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:64929*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64929*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59e8cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4b2fed and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9e8cc; op2val:0x804b2fed; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:64932*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64932*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:64935*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64935*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:64938*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64938*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:64941*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64941*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:64944*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64944*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:64947*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64947*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:64950*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64950*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:64953*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64953*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:64956*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64956*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:64959*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64959*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:64962*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64962*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:64965*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64965*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:64968*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64968*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:64971*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64971*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:64974*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64974*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:64977*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64977*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:64980*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64980*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84800000; valaddr_reg:x3; val_offset:64983*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64983*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84800001; valaddr_reg:x3; val_offset:64986*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64986*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84800003; valaddr_reg:x3; val_offset:64989*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64989*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84800007; valaddr_reg:x3; val_offset:64992*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64992*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8480000f; valaddr_reg:x3; val_offset:64995*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64995*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8480001f; valaddr_reg:x3; val_offset:64998*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 64998*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8480003f; valaddr_reg:x3; val_offset:65001*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65001*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8480007f; valaddr_reg:x3; val_offset:65004*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65004*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x848000ff; valaddr_reg:x3; val_offset:65007*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65007*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x848001ff; valaddr_reg:x3; val_offset:65010*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65010*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x848003ff; valaddr_reg:x3; val_offset:65013*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65013*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x848007ff; valaddr_reg:x3; val_offset:65016*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65016*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84800fff; valaddr_reg:x3; val_offset:65019*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65019*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84801fff; valaddr_reg:x3; val_offset:65022*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65022*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84803fff; valaddr_reg:x3; val_offset:65025*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65025*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84807fff; valaddr_reg:x3; val_offset:65028*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65028*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8480ffff; valaddr_reg:x3; val_offset:65031*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65031*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8481ffff; valaddr_reg:x3; val_offset:65034*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65034*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8483ffff; valaddr_reg:x3; val_offset:65037*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65037*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x8487ffff; valaddr_reg:x3; val_offset:65040*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65040*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x848fffff; valaddr_reg:x3; val_offset:65043*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65043*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x849fffff; valaddr_reg:x3; val_offset:65046*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65046*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84bfffff; valaddr_reg:x3; val_offset:65049*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65049*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84c00000; valaddr_reg:x3; val_offset:65052*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65052*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84e00000; valaddr_reg:x3; val_offset:65055*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65055*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84f00000; valaddr_reg:x3; val_offset:65058*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65058*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84f80000; valaddr_reg:x3; val_offset:65061*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65061*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fc0000; valaddr_reg:x3; val_offset:65064*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65064*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fe0000; valaddr_reg:x3; val_offset:65067*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65067*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ff0000; valaddr_reg:x3; val_offset:65070*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65070*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ff8000; valaddr_reg:x3; val_offset:65073*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65073*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ffc000; valaddr_reg:x3; val_offset:65076*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65076*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ffe000; valaddr_reg:x3; val_offset:65079*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65079*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fff000; valaddr_reg:x3; val_offset:65082*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65082*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fff800; valaddr_reg:x3; val_offset:65085*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65085*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fffc00; valaddr_reg:x3; val_offset:65088*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65088*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fffe00; valaddr_reg:x3; val_offset:65091*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65091*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ffff00; valaddr_reg:x3; val_offset:65094*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65094*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ffff80; valaddr_reg:x3; val_offset:65097*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65097*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ffffc0; valaddr_reg:x3; val_offset:65100*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65100*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ffffe0; valaddr_reg:x3; val_offset:65103*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65103*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fffff0; valaddr_reg:x3; val_offset:65106*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65106*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fffff8; valaddr_reg:x3; val_offset:65109*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65109*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fffffc; valaddr_reg:x3; val_offset:65112*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65112*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84fffffe; valaddr_reg:x3; val_offset:65115*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65115*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x59ec92 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ed9ec92; op2val:0x80000000; +op3val:0x84ffffff; valaddr_reg:x3; val_offset:65118*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65118*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3f800001; valaddr_reg:x3; val_offset:65121*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65121*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3f800003; valaddr_reg:x3; val_offset:65124*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65124*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3f800007; valaddr_reg:x3; val_offset:65127*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65127*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3f999999; valaddr_reg:x3; val_offset:65130*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65130*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:65133*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65133*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:65136*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65136*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:65139*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65139*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:65142*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65142*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:65145*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65145*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:65148*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65148*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:65151*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65151*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:65154*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65154*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:65157*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65157*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:65160*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65160*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:65163*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65163*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:65166*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65166*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44000000; valaddr_reg:x3; val_offset:65169*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65169*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44000001; valaddr_reg:x3; val_offset:65172*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65172*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44000003; valaddr_reg:x3; val_offset:65175*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65175*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44000007; valaddr_reg:x3; val_offset:65178*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65178*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x4400000f; valaddr_reg:x3; val_offset:65181*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65181*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x4400001f; valaddr_reg:x3; val_offset:65184*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65184*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x4400003f; valaddr_reg:x3; val_offset:65187*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65187*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x4400007f; valaddr_reg:x3; val_offset:65190*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65190*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x440000ff; valaddr_reg:x3; val_offset:65193*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65193*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x440001ff; valaddr_reg:x3; val_offset:65196*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65196*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x440003ff; valaddr_reg:x3; val_offset:65199*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65199*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x440007ff; valaddr_reg:x3; val_offset:65202*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65202*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44000fff; valaddr_reg:x3; val_offset:65205*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65205*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44001fff; valaddr_reg:x3; val_offset:65208*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65208*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44003fff; valaddr_reg:x3; val_offset:65211*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65211*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44007fff; valaddr_reg:x3; val_offset:65214*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65214*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x4400ffff; valaddr_reg:x3; val_offset:65217*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65217*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x4401ffff; valaddr_reg:x3; val_offset:65220*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65220*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x4403ffff; valaddr_reg:x3; val_offset:65223*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65223*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x4407ffff; valaddr_reg:x3; val_offset:65226*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65226*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x440fffff; valaddr_reg:x3; val_offset:65229*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65229*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x441fffff; valaddr_reg:x3; val_offset:65232*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65232*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x443fffff; valaddr_reg:x3; val_offset:65235*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65235*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44400000; valaddr_reg:x3; val_offset:65238*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65238*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44600000; valaddr_reg:x3; val_offset:65241*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65241*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44700000; valaddr_reg:x3; val_offset:65244*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65244*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x44780000; valaddr_reg:x3; val_offset:65247*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65247*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447c0000; valaddr_reg:x3; val_offset:65250*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65250*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447e0000; valaddr_reg:x3; val_offset:65253*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65253*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447f0000; valaddr_reg:x3; val_offset:65256*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65256*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447f8000; valaddr_reg:x3; val_offset:65259*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65259*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447fc000; valaddr_reg:x3; val_offset:65262*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65262*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447fe000; valaddr_reg:x3; val_offset:65265*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65265*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447ff000; valaddr_reg:x3; val_offset:65268*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65268*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447ff800; valaddr_reg:x3; val_offset:65271*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65271*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447ffc00; valaddr_reg:x3; val_offset:65274*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65274*0 + 3*169*FLEN/8, x4, x1, x2) + +inst_21759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447ffe00; valaddr_reg:x3; val_offset:65277*0 + 3*169*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65277*0 + 3*169*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2128210124,32,FLEN) +NAN_BOXED(2152411117,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981120,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981121,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981123,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981127,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981135,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981151,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981183,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981247,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981375,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981631,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222982143,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222983167,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222985215,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222989311,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222997503,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223013887,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223046655,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223112191,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223243263,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223505407,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2224029695,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2225078271,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2227175423,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2227175424,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2229272576,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2230321152,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2230845440,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231107584,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231238656,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231304192,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231336960,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231353344,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231361536,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231365632,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231367680,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231368704,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369216,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369472,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369600,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369664,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369696,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369712,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369720,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369724,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369726,32,FLEN) +NAN_BOXED(2128211090,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369727,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850688,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850689,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850691,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850695,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850703,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850719,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850751,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850815,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140850943,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140851199,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140851711,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140852735,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140854783,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140858879,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140867071,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140883455,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140916223,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1140981759,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1141112831,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1141374975,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1141899263,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1142947839,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1145044991,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1145044992,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1147142144,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1148190720,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1148715008,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1148977152,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149108224,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149173760,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149206528,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149222912,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149231104,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149235200,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149237248,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149238272,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149238784,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-171.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-171.S new file mode 100644 index 000000000..814a8e0ec --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-171.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_21760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447fff00; valaddr_reg:x3; val_offset:65280*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65280*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447fff80; valaddr_reg:x3; val_offset:65283*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65283*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447fffc0; valaddr_reg:x3; val_offset:65286*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65286*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447fffe0; valaddr_reg:x3; val_offset:65289*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65289*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447ffff0; valaddr_reg:x3; val_offset:65292*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65292*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447ffff8; valaddr_reg:x3; val_offset:65295*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65295*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447ffffc; valaddr_reg:x3; val_offset:65298*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65298*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447ffffe; valaddr_reg:x3; val_offset:65301*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65301*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5aca86 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4ae25b and fs3 == 0 and fe3 == 0x88 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edaca86; op2val:0x4ae25b; +op3val:0x447fffff; valaddr_reg:x3; val_offset:65304*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65304*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:65307*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65307*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:65310*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65310*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:65313*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65313*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:65316*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65316*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:65319*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65319*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:65322*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65322*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:65325*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65325*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:65328*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65328*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:65331*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65331*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:65334*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65334*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:65337*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65337*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:65340*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65340*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:65343*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65343*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:65346*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65346*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:65349*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65349*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:65352*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65352*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b000000; valaddr_reg:x3; val_offset:65355*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65355*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b000001; valaddr_reg:x3; val_offset:65358*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65358*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b000003; valaddr_reg:x3; val_offset:65361*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65361*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b000007; valaddr_reg:x3; val_offset:65364*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65364*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b00000f; valaddr_reg:x3; val_offset:65367*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65367*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b00001f; valaddr_reg:x3; val_offset:65370*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65370*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b00003f; valaddr_reg:x3; val_offset:65373*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65373*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b00007f; valaddr_reg:x3; val_offset:65376*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65376*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b0000ff; valaddr_reg:x3; val_offset:65379*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65379*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b0001ff; valaddr_reg:x3; val_offset:65382*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65382*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b0003ff; valaddr_reg:x3; val_offset:65385*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65385*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b0007ff; valaddr_reg:x3; val_offset:65388*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65388*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b000fff; valaddr_reg:x3; val_offset:65391*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65391*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b001fff; valaddr_reg:x3; val_offset:65394*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65394*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b003fff; valaddr_reg:x3; val_offset:65397*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65397*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b007fff; valaddr_reg:x3; val_offset:65400*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65400*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b00ffff; valaddr_reg:x3; val_offset:65403*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65403*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b01ffff; valaddr_reg:x3; val_offset:65406*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65406*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b03ffff; valaddr_reg:x3; val_offset:65409*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65409*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b07ffff; valaddr_reg:x3; val_offset:65412*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65412*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b0fffff; valaddr_reg:x3; val_offset:65415*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65415*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b1fffff; valaddr_reg:x3; val_offset:65418*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65418*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b3fffff; valaddr_reg:x3; val_offset:65421*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65421*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b400000; valaddr_reg:x3; val_offset:65424*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65424*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b600000; valaddr_reg:x3; val_offset:65427*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65427*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b700000; valaddr_reg:x3; val_offset:65430*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65430*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b780000; valaddr_reg:x3; val_offset:65433*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65433*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7c0000; valaddr_reg:x3; val_offset:65436*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65436*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7e0000; valaddr_reg:x3; val_offset:65439*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65439*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7f0000; valaddr_reg:x3; val_offset:65442*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65442*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7f8000; valaddr_reg:x3; val_offset:65445*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65445*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7fc000; valaddr_reg:x3; val_offset:65448*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65448*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7fe000; valaddr_reg:x3; val_offset:65451*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65451*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7ff000; valaddr_reg:x3; val_offset:65454*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65454*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7ff800; valaddr_reg:x3; val_offset:65457*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65457*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:65460*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65460*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:65463*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65463*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7fff00; valaddr_reg:x3; val_offset:65466*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65466*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7fff80; valaddr_reg:x3; val_offset:65469*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65469*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:65472*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65472*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:65475*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65475*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:65478*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65478*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:65481*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65481*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:65484*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65484*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:65487*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65487*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5afb7d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edafb7d; op2val:0x80000000; +op3val:0x8b7fffff; valaddr_reg:x3; val_offset:65490*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65490*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:65493*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65493*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:65496*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65496*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:65499*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65499*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:65502*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65502*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:65505*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65505*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:65508*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65508*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:65511*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65511*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:65514*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65514*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:65517*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65517*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:65520*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65520*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:65523*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65523*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:65526*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65526*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:65529*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65529*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:65532*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65532*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:65535*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65535*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:65538*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65538*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88800000; valaddr_reg:x3; val_offset:65541*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65541*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88800001; valaddr_reg:x3; val_offset:65544*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65544*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88800003; valaddr_reg:x3; val_offset:65547*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65547*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88800007; valaddr_reg:x3; val_offset:65550*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65550*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x8880000f; valaddr_reg:x3; val_offset:65553*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65553*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x8880001f; valaddr_reg:x3; val_offset:65556*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65556*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x8880003f; valaddr_reg:x3; val_offset:65559*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65559*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x8880007f; valaddr_reg:x3; val_offset:65562*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65562*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x888000ff; valaddr_reg:x3; val_offset:65565*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65565*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x888001ff; valaddr_reg:x3; val_offset:65568*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65568*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x888003ff; valaddr_reg:x3; val_offset:65571*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65571*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x888007ff; valaddr_reg:x3; val_offset:65574*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65574*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88800fff; valaddr_reg:x3; val_offset:65577*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65577*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88801fff; valaddr_reg:x3; val_offset:65580*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65580*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88803fff; valaddr_reg:x3; val_offset:65583*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65583*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88807fff; valaddr_reg:x3; val_offset:65586*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65586*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x8880ffff; valaddr_reg:x3; val_offset:65589*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65589*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x8881ffff; valaddr_reg:x3; val_offset:65592*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65592*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x8883ffff; valaddr_reg:x3; val_offset:65595*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65595*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x8887ffff; valaddr_reg:x3; val_offset:65598*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65598*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x888fffff; valaddr_reg:x3; val_offset:65601*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65601*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x889fffff; valaddr_reg:x3; val_offset:65604*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65604*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88bfffff; valaddr_reg:x3; val_offset:65607*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65607*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88c00000; valaddr_reg:x3; val_offset:65610*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65610*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88e00000; valaddr_reg:x3; val_offset:65613*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65613*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88f00000; valaddr_reg:x3; val_offset:65616*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65616*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88f80000; valaddr_reg:x3; val_offset:65619*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65619*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fc0000; valaddr_reg:x3; val_offset:65622*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65622*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fe0000; valaddr_reg:x3; val_offset:65625*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65625*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ff0000; valaddr_reg:x3; val_offset:65628*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65628*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ff8000; valaddr_reg:x3; val_offset:65631*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65631*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ffc000; valaddr_reg:x3; val_offset:65634*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65634*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ffe000; valaddr_reg:x3; val_offset:65637*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65637*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fff000; valaddr_reg:x3; val_offset:65640*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65640*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fff800; valaddr_reg:x3; val_offset:65643*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65643*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fffc00; valaddr_reg:x3; val_offset:65646*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65646*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fffe00; valaddr_reg:x3; val_offset:65649*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65649*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ffff00; valaddr_reg:x3; val_offset:65652*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65652*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ffff80; valaddr_reg:x3; val_offset:65655*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65655*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ffffc0; valaddr_reg:x3; val_offset:65658*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65658*0 + 3*170*FLEN/8, x4, x1, x2) + +inst_21887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ffffe0; valaddr_reg:x3; val_offset:65661*0 + 3*170*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65661*0 + 3*170*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239040,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239168,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239232,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239264,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239280,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239288,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239292,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239294,32,FLEN) +NAN_BOXED(2128267910,32,FLEN) +NAN_BOXED(4907611,32,FLEN) +NAN_BOXED(1149239295,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033024,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033025,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033027,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033031,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033039,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033055,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033087,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033151,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033279,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033535,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332034047,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332035071,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332037119,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332041215,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332049407,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332065791,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332098559,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332164095,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332295167,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332557311,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2333081599,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2334130175,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2336227327,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2336227328,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2338324480,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2339373056,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2339897344,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340159488,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340290560,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340356096,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340388864,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340405248,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340413440,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340417536,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340419584,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340420608,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421120,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421376,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421504,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421568,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421600,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421616,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421624,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421628,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421630,32,FLEN) +NAN_BOXED(2128280445,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421631,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089984,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089985,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089987,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089991,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089999,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090015,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090047,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090111,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090239,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090495,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290091007,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290092031,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290094079,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290098175,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290106367,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290122751,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290155519,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290221055,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290352127,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290614271,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2291138559,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2292187135,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2294284287,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2294284288,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2296381440,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2297430016,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2297954304,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298216448,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298347520,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298413056,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298445824,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298462208,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298470400,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298474496,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298476544,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298477568,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478080,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478336,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478464,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478528,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478560,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-172.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-172.S new file mode 100644 index 000000000..f8ec5ccaa --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-172.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_21888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fffff0; valaddr_reg:x3; val_offset:65664*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65664*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fffff8; valaddr_reg:x3; val_offset:65667*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65667*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fffffc; valaddr_reg:x3; val_offset:65670*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65670*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88fffffe; valaddr_reg:x3; val_offset:65673*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65673*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5b91e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edb91e9; op2val:0x80000000; +op3val:0x88ffffff; valaddr_reg:x3; val_offset:65676*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65676*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe800000; valaddr_reg:x3; val_offset:65679*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65679*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe800001; valaddr_reg:x3; val_offset:65682*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65682*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe800003; valaddr_reg:x3; val_offset:65685*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65685*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe800007; valaddr_reg:x3; val_offset:65688*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65688*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe80000f; valaddr_reg:x3; val_offset:65691*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65691*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe80001f; valaddr_reg:x3; val_offset:65694*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65694*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe80003f; valaddr_reg:x3; val_offset:65697*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65697*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe80007f; valaddr_reg:x3; val_offset:65700*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65700*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe8000ff; valaddr_reg:x3; val_offset:65703*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65703*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe8001ff; valaddr_reg:x3; val_offset:65706*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65706*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe8003ff; valaddr_reg:x3; val_offset:65709*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65709*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe8007ff; valaddr_reg:x3; val_offset:65712*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65712*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe800fff; valaddr_reg:x3; val_offset:65715*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65715*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe801fff; valaddr_reg:x3; val_offset:65718*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65718*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe803fff; valaddr_reg:x3; val_offset:65721*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65721*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe807fff; valaddr_reg:x3; val_offset:65724*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65724*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe80ffff; valaddr_reg:x3; val_offset:65727*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65727*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe81ffff; valaddr_reg:x3; val_offset:65730*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65730*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe83ffff; valaddr_reg:x3; val_offset:65733*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65733*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe87ffff; valaddr_reg:x3; val_offset:65736*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65736*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe8fffff; valaddr_reg:x3; val_offset:65739*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65739*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfe9fffff; valaddr_reg:x3; val_offset:65742*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65742*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfebfffff; valaddr_reg:x3; val_offset:65745*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65745*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfec00000; valaddr_reg:x3; val_offset:65748*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65748*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfee00000; valaddr_reg:x3; val_offset:65751*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65751*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfef00000; valaddr_reg:x3; val_offset:65754*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65754*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfef80000; valaddr_reg:x3; val_offset:65757*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65757*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefc0000; valaddr_reg:x3; val_offset:65760*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65760*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefe0000; valaddr_reg:x3; val_offset:65763*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65763*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeff0000; valaddr_reg:x3; val_offset:65766*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65766*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeff8000; valaddr_reg:x3; val_offset:65769*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65769*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeffc000; valaddr_reg:x3; val_offset:65772*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65772*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeffe000; valaddr_reg:x3; val_offset:65775*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65775*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefff000; valaddr_reg:x3; val_offset:65778*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65778*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefff800; valaddr_reg:x3; val_offset:65781*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65781*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefffc00; valaddr_reg:x3; val_offset:65784*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65784*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefffe00; valaddr_reg:x3; val_offset:65787*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65787*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeffff00; valaddr_reg:x3; val_offset:65790*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65790*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeffff80; valaddr_reg:x3; val_offset:65793*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65793*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeffffc0; valaddr_reg:x3; val_offset:65796*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65796*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeffffe0; valaddr_reg:x3; val_offset:65799*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65799*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefffff0; valaddr_reg:x3; val_offset:65802*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65802*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefffff8; valaddr_reg:x3; val_offset:65805*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65805*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefffffc; valaddr_reg:x3; val_offset:65808*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65808*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfefffffe; valaddr_reg:x3; val_offset:65811*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65811*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xfeffffff; valaddr_reg:x3; val_offset:65814*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65814*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff000001; valaddr_reg:x3; val_offset:65817*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65817*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff000003; valaddr_reg:x3; val_offset:65820*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65820*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff000007; valaddr_reg:x3; val_offset:65823*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65823*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff199999; valaddr_reg:x3; val_offset:65826*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65826*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff249249; valaddr_reg:x3; val_offset:65829*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65829*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff333333; valaddr_reg:x3; val_offset:65832*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65832*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:65835*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65835*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:65838*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65838*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff444444; valaddr_reg:x3; val_offset:65841*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65841*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:65844*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65844*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:65847*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65847*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff666666; valaddr_reg:x3; val_offset:65850*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65850*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:65853*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65853*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:65856*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65856*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:65859*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65859*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5c68b4 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x14ab47 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edc68b4; op2val:0xc014ab47; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:65862*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65862*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:65865*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65865*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:65868*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65868*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:65871*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65871*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:65874*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65874*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:65877*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65877*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:65880*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65880*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:65883*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65883*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:65886*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65886*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:65889*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65889*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:65892*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65892*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:65895*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65895*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:65898*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65898*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:65901*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65901*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:65904*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65904*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:65907*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65907*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:65910*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65910*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f000000; valaddr_reg:x3; val_offset:65913*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65913*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f000001; valaddr_reg:x3; val_offset:65916*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65916*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f000003; valaddr_reg:x3; val_offset:65919*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65919*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f000007; valaddr_reg:x3; val_offset:65922*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65922*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f00000f; valaddr_reg:x3; val_offset:65925*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65925*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f00001f; valaddr_reg:x3; val_offset:65928*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65928*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f00003f; valaddr_reg:x3; val_offset:65931*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65931*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f00007f; valaddr_reg:x3; val_offset:65934*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65934*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f0000ff; valaddr_reg:x3; val_offset:65937*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65937*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f0001ff; valaddr_reg:x3; val_offset:65940*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65940*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f0003ff; valaddr_reg:x3; val_offset:65943*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65943*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f0007ff; valaddr_reg:x3; val_offset:65946*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65946*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f000fff; valaddr_reg:x3; val_offset:65949*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65949*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f001fff; valaddr_reg:x3; val_offset:65952*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65952*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f003fff; valaddr_reg:x3; val_offset:65955*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65955*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f007fff; valaddr_reg:x3; val_offset:65958*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65958*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f00ffff; valaddr_reg:x3; val_offset:65961*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65961*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f01ffff; valaddr_reg:x3; val_offset:65964*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65964*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f03ffff; valaddr_reg:x3; val_offset:65967*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65967*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f07ffff; valaddr_reg:x3; val_offset:65970*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65970*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f0fffff; valaddr_reg:x3; val_offset:65973*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65973*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f1fffff; valaddr_reg:x3; val_offset:65976*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65976*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f3fffff; valaddr_reg:x3; val_offset:65979*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65979*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f400000; valaddr_reg:x3; val_offset:65982*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65982*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f600000; valaddr_reg:x3; val_offset:65985*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65985*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f700000; valaddr_reg:x3; val_offset:65988*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65988*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f780000; valaddr_reg:x3; val_offset:65991*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65991*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7c0000; valaddr_reg:x3; val_offset:65994*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65994*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_21999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7e0000; valaddr_reg:x3; val_offset:65997*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 65997*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7f0000; valaddr_reg:x3; val_offset:66000*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66000*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7f8000; valaddr_reg:x3; val_offset:66003*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66003*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7fc000; valaddr_reg:x3; val_offset:66006*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66006*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7fe000; valaddr_reg:x3; val_offset:66009*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66009*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7ff000; valaddr_reg:x3; val_offset:66012*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66012*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7ff800; valaddr_reg:x3; val_offset:66015*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66015*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:66018*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66018*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:66021*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66021*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7fff00; valaddr_reg:x3; val_offset:66024*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66024*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7fff80; valaddr_reg:x3; val_offset:66027*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66027*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:66030*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66030*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:66033*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66033*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:66036*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66036*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:66039*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66039*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:66042*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66042*0 + 3*171*FLEN/8, x4, x1, x2) + +inst_22015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:66045*0 + 3*171*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66045*0 + 3*171*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478576,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478584,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478588,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478590,32,FLEN) +NAN_BOXED(2128318953,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478591,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801472,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801473,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801475,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801479,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801487,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801503,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801535,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801599,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801727,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269801983,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269802495,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269803519,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269805567,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269809663,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269817855,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269834239,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269867007,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4269932543,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4270063615,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4270325759,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4270850047,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4271898623,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4273995775,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4273995776,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4276092928,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4277141504,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4277665792,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4277927936,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278059008,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278124544,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278157312,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278173696,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278181888,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278185984,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278188032,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278189056,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278189568,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278189824,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278189952,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190016,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190048,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190064,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190072,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190076,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190078,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190079,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2128373940,32,FLEN) +NAN_BOXED(3222580039,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141888,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141889,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141891,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141895,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141903,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141919,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141951,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142015,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142143,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142399,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142911,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399143935,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399145983,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399150079,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399158271,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399174655,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399207423,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399272959,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399404031,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399666175,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2400190463,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2401239039,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2403336191,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2403336192,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2405433344,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2406481920,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407006208,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407268352,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407399424,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407464960,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407497728,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407514112,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407522304,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407526400,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407528448,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407529472,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407529984,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530240,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530368,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530432,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530464,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530480,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530488,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530492,32,FLEN) +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530494,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-173.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-173.S new file mode 100644 index 000000000..8db1e2a81 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-173.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_22016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5d0ccb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edd0ccb; op2val:0x80000000; +op3val:0x8f7fffff; valaddr_reg:x3; val_offset:66048*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66048*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5000000; valaddr_reg:x3; val_offset:66051*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66051*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5000001; valaddr_reg:x3; val_offset:66054*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66054*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5000003; valaddr_reg:x3; val_offset:66057*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66057*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5000007; valaddr_reg:x3; val_offset:66060*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66060*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf500000f; valaddr_reg:x3; val_offset:66063*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66063*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf500001f; valaddr_reg:x3; val_offset:66066*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66066*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf500003f; valaddr_reg:x3; val_offset:66069*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66069*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf500007f; valaddr_reg:x3; val_offset:66072*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66072*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf50000ff; valaddr_reg:x3; val_offset:66075*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66075*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf50001ff; valaddr_reg:x3; val_offset:66078*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66078*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf50003ff; valaddr_reg:x3; val_offset:66081*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66081*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf50007ff; valaddr_reg:x3; val_offset:66084*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66084*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5000fff; valaddr_reg:x3; val_offset:66087*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66087*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5001fff; valaddr_reg:x3; val_offset:66090*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66090*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5003fff; valaddr_reg:x3; val_offset:66093*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66093*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5007fff; valaddr_reg:x3; val_offset:66096*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66096*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf500ffff; valaddr_reg:x3; val_offset:66099*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66099*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf501ffff; valaddr_reg:x3; val_offset:66102*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66102*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf503ffff; valaddr_reg:x3; val_offset:66105*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66105*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf507ffff; valaddr_reg:x3; val_offset:66108*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66108*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf50fffff; valaddr_reg:x3; val_offset:66111*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66111*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf51fffff; valaddr_reg:x3; val_offset:66114*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66114*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf53fffff; valaddr_reg:x3; val_offset:66117*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66117*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5400000; valaddr_reg:x3; val_offset:66120*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66120*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5600000; valaddr_reg:x3; val_offset:66123*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66123*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5700000; valaddr_reg:x3; val_offset:66126*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66126*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf5780000; valaddr_reg:x3; val_offset:66129*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66129*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57c0000; valaddr_reg:x3; val_offset:66132*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66132*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57e0000; valaddr_reg:x3; val_offset:66135*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66135*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57f0000; valaddr_reg:x3; val_offset:66138*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66138*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57f8000; valaddr_reg:x3; val_offset:66141*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66141*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57fc000; valaddr_reg:x3; val_offset:66144*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66144*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57fe000; valaddr_reg:x3; val_offset:66147*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66147*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57ff000; valaddr_reg:x3; val_offset:66150*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66150*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57ff800; valaddr_reg:x3; val_offset:66153*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66153*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57ffc00; valaddr_reg:x3; val_offset:66156*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66156*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57ffe00; valaddr_reg:x3; val_offset:66159*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66159*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57fff00; valaddr_reg:x3; val_offset:66162*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66162*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57fff80; valaddr_reg:x3; val_offset:66165*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66165*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57fffc0; valaddr_reg:x3; val_offset:66168*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66168*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57fffe0; valaddr_reg:x3; val_offset:66171*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66171*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57ffff0; valaddr_reg:x3; val_offset:66174*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66174*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57ffff8; valaddr_reg:x3; val_offset:66177*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66177*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57ffffc; valaddr_reg:x3; val_offset:66180*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66180*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57ffffe; valaddr_reg:x3; val_offset:66183*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66183*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xea and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xf57fffff; valaddr_reg:x3; val_offset:66186*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66186*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff000001; valaddr_reg:x3; val_offset:66189*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66189*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff000003; valaddr_reg:x3; val_offset:66192*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66192*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff000007; valaddr_reg:x3; val_offset:66195*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66195*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff199999; valaddr_reg:x3; val_offset:66198*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66198*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff249249; valaddr_reg:x3; val_offset:66201*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66201*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff333333; valaddr_reg:x3; val_offset:66204*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66204*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:66207*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66207*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:66210*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66210*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff444444; valaddr_reg:x3; val_offset:66213*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66213*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:66216*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66216*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:66219*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66219*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff666666; valaddr_reg:x3; val_offset:66222*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66222*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:66225*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66225*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:66228*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66228*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:66231*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66231*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5f5731 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x12b7b4 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edf5731; op2val:0xc012b7b4; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:66234*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66234*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:66237*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66237*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:66240*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66240*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:66243*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66243*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:66246*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66246*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:66249*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66249*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:66252*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66252*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:66255*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66255*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:66258*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66258*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:66261*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66261*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:66264*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66264*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:66267*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66267*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:66270*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66270*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:66273*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66273*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:66276*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66276*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:66279*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66279*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:66282*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66282*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9000000; valaddr_reg:x3; val_offset:66285*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66285*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9000001; valaddr_reg:x3; val_offset:66288*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66288*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9000003; valaddr_reg:x3; val_offset:66291*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66291*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9000007; valaddr_reg:x3; val_offset:66294*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66294*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x900000f; valaddr_reg:x3; val_offset:66297*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66297*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x900001f; valaddr_reg:x3; val_offset:66300*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66300*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x900003f; valaddr_reg:x3; val_offset:66303*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66303*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x900007f; valaddr_reg:x3; val_offset:66306*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66306*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x90000ff; valaddr_reg:x3; val_offset:66309*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66309*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x90001ff; valaddr_reg:x3; val_offset:66312*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66312*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x90003ff; valaddr_reg:x3; val_offset:66315*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66315*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x90007ff; valaddr_reg:x3; val_offset:66318*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66318*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9000fff; valaddr_reg:x3; val_offset:66321*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66321*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9001fff; valaddr_reg:x3; val_offset:66324*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66324*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9003fff; valaddr_reg:x3; val_offset:66327*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66327*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9007fff; valaddr_reg:x3; val_offset:66330*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66330*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x900ffff; valaddr_reg:x3; val_offset:66333*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66333*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x901ffff; valaddr_reg:x3; val_offset:66336*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66336*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x903ffff; valaddr_reg:x3; val_offset:66339*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66339*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x907ffff; valaddr_reg:x3; val_offset:66342*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66342*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x90fffff; valaddr_reg:x3; val_offset:66345*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66345*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x91fffff; valaddr_reg:x3; val_offset:66348*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66348*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x93fffff; valaddr_reg:x3; val_offset:66351*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66351*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9400000; valaddr_reg:x3; val_offset:66354*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66354*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9600000; valaddr_reg:x3; val_offset:66357*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66357*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9700000; valaddr_reg:x3; val_offset:66360*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66360*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x9780000; valaddr_reg:x3; val_offset:66363*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66363*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97c0000; valaddr_reg:x3; val_offset:66366*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66366*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97e0000; valaddr_reg:x3; val_offset:66369*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66369*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97f0000; valaddr_reg:x3; val_offset:66372*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66372*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97f8000; valaddr_reg:x3; val_offset:66375*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66375*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97fc000; valaddr_reg:x3; val_offset:66378*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66378*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97fe000; valaddr_reg:x3; val_offset:66381*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66381*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97ff000; valaddr_reg:x3; val_offset:66384*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66384*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97ff800; valaddr_reg:x3; val_offset:66387*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66387*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97ffc00; valaddr_reg:x3; val_offset:66390*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66390*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97ffe00; valaddr_reg:x3; val_offset:66393*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66393*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97fff00; valaddr_reg:x3; val_offset:66396*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66396*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97fff80; valaddr_reg:x3; val_offset:66399*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66399*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97fffc0; valaddr_reg:x3; val_offset:66402*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66402*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97fffe0; valaddr_reg:x3; val_offset:66405*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66405*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97ffff0; valaddr_reg:x3; val_offset:66408*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66408*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97ffff8; valaddr_reg:x3; val_offset:66411*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66411*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97ffffc; valaddr_reg:x3; val_offset:66414*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66414*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97ffffe; valaddr_reg:x3; val_offset:66417*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66417*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x5fda22 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7edfda22; op2val:0x0; +op3val:0x97fffff; valaddr_reg:x3; val_offset:66420*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66420*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:66423*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66423*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:66426*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66426*0 + 3*172*FLEN/8, x4, x1, x2) + +inst_22143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:66429*0 + 3*172*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66429*0 + 3*172*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128415947,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530495,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110417920,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110417921,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110417923,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110417927,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110417935,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110417951,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110417983,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110418047,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110418175,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110418431,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110418943,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110419967,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110422015,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110426111,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110434303,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110450687,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110483455,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110548991,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110680063,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4110942207,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4111466495,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4112515071,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4114612223,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4114612224,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4116709376,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4117757952,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118282240,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118544384,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118675456,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118740992,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118773760,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118790144,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118798336,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118802432,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118804480,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118805504,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806016,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806272,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806400,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806464,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806496,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806512,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806520,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806524,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806526,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4118806527,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2128566065,32,FLEN) +NAN_BOXED(3222452148,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994944,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994945,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994947,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994951,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994959,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994975,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995007,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995071,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995199,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995455,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995967,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150996991,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150999039,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151003135,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151011327,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151027711,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151060479,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151126015,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151257087,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151519231,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(152043519,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(153092095,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(155189247,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(155189248,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(157286400,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(158334976,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(158859264,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159121408,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159252480,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159318016,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159350784,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159367168,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159375360,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159379456,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159381504,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159382528,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383040,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383296,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383424,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383488,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383520,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383536,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383544,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383548,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383550,32,FLEN) +NAN_BOXED(2128599586,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383551,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-174.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-174.S new file mode 100644 index 000000000..d98b61013 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-174.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_22144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:66432*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66432*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:66435*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66435*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:66438*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66438*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:66441*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66441*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:66444*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66444*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:66447*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66447*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:66450*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66450*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:66453*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66453*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:66456*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66456*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:66459*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66459*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:66462*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66462*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:66465*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66465*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:66468*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66468*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84800000; valaddr_reg:x3; val_offset:66471*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66471*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84800001; valaddr_reg:x3; val_offset:66474*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66474*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84800003; valaddr_reg:x3; val_offset:66477*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66477*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84800007; valaddr_reg:x3; val_offset:66480*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66480*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8480000f; valaddr_reg:x3; val_offset:66483*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66483*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8480001f; valaddr_reg:x3; val_offset:66486*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66486*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8480003f; valaddr_reg:x3; val_offset:66489*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66489*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8480007f; valaddr_reg:x3; val_offset:66492*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66492*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x848000ff; valaddr_reg:x3; val_offset:66495*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66495*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x848001ff; valaddr_reg:x3; val_offset:66498*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66498*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x848003ff; valaddr_reg:x3; val_offset:66501*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66501*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x848007ff; valaddr_reg:x3; val_offset:66504*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66504*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84800fff; valaddr_reg:x3; val_offset:66507*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66507*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84801fff; valaddr_reg:x3; val_offset:66510*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66510*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84803fff; valaddr_reg:x3; val_offset:66513*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66513*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84807fff; valaddr_reg:x3; val_offset:66516*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66516*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8480ffff; valaddr_reg:x3; val_offset:66519*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66519*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8481ffff; valaddr_reg:x3; val_offset:66522*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66522*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8483ffff; valaddr_reg:x3; val_offset:66525*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66525*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x8487ffff; valaddr_reg:x3; val_offset:66528*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66528*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x848fffff; valaddr_reg:x3; val_offset:66531*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66531*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x849fffff; valaddr_reg:x3; val_offset:66534*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66534*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84bfffff; valaddr_reg:x3; val_offset:66537*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66537*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84c00000; valaddr_reg:x3; val_offset:66540*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66540*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84e00000; valaddr_reg:x3; val_offset:66543*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66543*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84f00000; valaddr_reg:x3; val_offset:66546*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66546*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84f80000; valaddr_reg:x3; val_offset:66549*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66549*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fc0000; valaddr_reg:x3; val_offset:66552*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66552*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fe0000; valaddr_reg:x3; val_offset:66555*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66555*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ff0000; valaddr_reg:x3; val_offset:66558*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66558*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ff8000; valaddr_reg:x3; val_offset:66561*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66561*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ffc000; valaddr_reg:x3; val_offset:66564*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66564*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ffe000; valaddr_reg:x3; val_offset:66567*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66567*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fff000; valaddr_reg:x3; val_offset:66570*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66570*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fff800; valaddr_reg:x3; val_offset:66573*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66573*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fffc00; valaddr_reg:x3; val_offset:66576*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66576*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fffe00; valaddr_reg:x3; val_offset:66579*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66579*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ffff00; valaddr_reg:x3; val_offset:66582*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66582*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ffff80; valaddr_reg:x3; val_offset:66585*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66585*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ffffc0; valaddr_reg:x3; val_offset:66588*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66588*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ffffe0; valaddr_reg:x3; val_offset:66591*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66591*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fffff0; valaddr_reg:x3; val_offset:66594*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66594*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fffff8; valaddr_reg:x3; val_offset:66597*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66597*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fffffc; valaddr_reg:x3; val_offset:66600*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66600*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84fffffe; valaddr_reg:x3; val_offset:66603*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66603*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x60ba3f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee0ba3f; op2val:0x80000000; +op3val:0x84ffffff; valaddr_reg:x3; val_offset:66606*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66606*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b800000; valaddr_reg:x3; val_offset:66609*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66609*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b800001; valaddr_reg:x3; val_offset:66612*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66612*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b800003; valaddr_reg:x3; val_offset:66615*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66615*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b800007; valaddr_reg:x3; val_offset:66618*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66618*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b80000f; valaddr_reg:x3; val_offset:66621*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66621*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b80001f; valaddr_reg:x3; val_offset:66624*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66624*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b80003f; valaddr_reg:x3; val_offset:66627*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66627*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b80007f; valaddr_reg:x3; val_offset:66630*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66630*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b8000ff; valaddr_reg:x3; val_offset:66633*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66633*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b8001ff; valaddr_reg:x3; val_offset:66636*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66636*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b8003ff; valaddr_reg:x3; val_offset:66639*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66639*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b8007ff; valaddr_reg:x3; val_offset:66642*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66642*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b800fff; valaddr_reg:x3; val_offset:66645*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66645*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b801fff; valaddr_reg:x3; val_offset:66648*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66648*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b803fff; valaddr_reg:x3; val_offset:66651*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66651*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b807fff; valaddr_reg:x3; val_offset:66654*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66654*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b80ffff; valaddr_reg:x3; val_offset:66657*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66657*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b81ffff; valaddr_reg:x3; val_offset:66660*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66660*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b83ffff; valaddr_reg:x3; val_offset:66663*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66663*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b87ffff; valaddr_reg:x3; val_offset:66666*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66666*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b8fffff; valaddr_reg:x3; val_offset:66669*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66669*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2b9fffff; valaddr_reg:x3; val_offset:66672*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66672*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bbfffff; valaddr_reg:x3; val_offset:66675*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66675*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bc00000; valaddr_reg:x3; val_offset:66678*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66678*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2be00000; valaddr_reg:x3; val_offset:66681*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66681*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bf00000; valaddr_reg:x3; val_offset:66684*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66684*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bf80000; valaddr_reg:x3; val_offset:66687*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66687*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfc0000; valaddr_reg:x3; val_offset:66690*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66690*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfe0000; valaddr_reg:x3; val_offset:66693*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66693*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bff0000; valaddr_reg:x3; val_offset:66696*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66696*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bff8000; valaddr_reg:x3; val_offset:66699*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66699*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bffc000; valaddr_reg:x3; val_offset:66702*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66702*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bffe000; valaddr_reg:x3; val_offset:66705*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66705*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfff000; valaddr_reg:x3; val_offset:66708*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66708*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfff800; valaddr_reg:x3; val_offset:66711*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66711*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfffc00; valaddr_reg:x3; val_offset:66714*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66714*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfffe00; valaddr_reg:x3; val_offset:66717*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66717*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bffff00; valaddr_reg:x3; val_offset:66720*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66720*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bffff80; valaddr_reg:x3; val_offset:66723*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66723*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bffffc0; valaddr_reg:x3; val_offset:66726*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66726*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bffffe0; valaddr_reg:x3; val_offset:66729*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66729*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfffff0; valaddr_reg:x3; val_offset:66732*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66732*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfffff8; valaddr_reg:x3; val_offset:66735*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66735*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfffffc; valaddr_reg:x3; val_offset:66738*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66738*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bfffffe; valaddr_reg:x3; val_offset:66741*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66741*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x57 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x2bffffff; valaddr_reg:x3; val_offset:66744*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66744*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3f800001; valaddr_reg:x3; val_offset:66747*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66747*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3f800003; valaddr_reg:x3; val_offset:66750*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66750*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3f800007; valaddr_reg:x3; val_offset:66753*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66753*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3f999999; valaddr_reg:x3; val_offset:66756*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66756*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:66759*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66759*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:66762*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66762*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:66765*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66765*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:66768*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66768*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:66771*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66771*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:66774*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66774*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:66777*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66777*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:66780*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66780*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:66783*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66783*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:66786*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66786*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:66789*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66789*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x616fca and fs2 == 0 and fe2 == 0x00 and fm2 == 0x48ad3e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee16fca; op2val:0x48ad3e; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:66792*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66792*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:66795*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66795*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:66798*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66798*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:66801*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66801*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:66804*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66804*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:66807*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66807*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:66810*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66810*0 + 3*173*FLEN/8, x4, x1, x2) + +inst_22271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:66813*0 + 3*173*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66813*0 + 3*173*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981120,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981121,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981123,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981127,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981135,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981151,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981183,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981247,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981375,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981631,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222982143,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222983167,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222985215,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222989311,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222997503,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223013887,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223046655,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223112191,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223243263,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223505407,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2224029695,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2225078271,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2227175423,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2227175424,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2229272576,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2230321152,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2230845440,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231107584,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231238656,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231304192,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231336960,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231353344,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231361536,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231365632,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231367680,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231368704,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369216,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369472,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369600,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369664,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369696,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369712,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369720,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369724,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369726,32,FLEN) +NAN_BOXED(2128656959,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369727,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729808896,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729808897,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729808899,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729808903,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729808911,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729808927,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729808959,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729809023,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729809151,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729809407,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729809919,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729810943,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729812991,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729817087,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729825279,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729841663,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729874431,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(729939967,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(730071039,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(730333183,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(730857471,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(731906047,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(734003199,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(734003200,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(736100352,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(737148928,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(737673216,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(737935360,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738066432,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738131968,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738164736,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738181120,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738189312,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738193408,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738195456,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738196480,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738196992,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197248,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197376,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197440,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197472,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197488,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197496,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197500,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197502,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(738197503,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2128703434,32,FLEN) +NAN_BOXED(4762942,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-175.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-175.S new file mode 100644 index 000000000..1d72b0c05 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-175.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_22272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:66816*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66816*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:66819*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66819*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:66822*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66822*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:66825*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66825*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:66828*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66828*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:66831*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66831*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:66834*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66834*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:66837*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66837*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:66840*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66840*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d000000; valaddr_reg:x3; val_offset:66843*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66843*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d000001; valaddr_reg:x3; val_offset:66846*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66846*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d000003; valaddr_reg:x3; val_offset:66849*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66849*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d000007; valaddr_reg:x3; val_offset:66852*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66852*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d00000f; valaddr_reg:x3; val_offset:66855*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66855*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d00001f; valaddr_reg:x3; val_offset:66858*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66858*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d00003f; valaddr_reg:x3; val_offset:66861*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66861*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d00007f; valaddr_reg:x3; val_offset:66864*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66864*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d0000ff; valaddr_reg:x3; val_offset:66867*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66867*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d0001ff; valaddr_reg:x3; val_offset:66870*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66870*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d0003ff; valaddr_reg:x3; val_offset:66873*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66873*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d0007ff; valaddr_reg:x3; val_offset:66876*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66876*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d000fff; valaddr_reg:x3; val_offset:66879*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66879*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d001fff; valaddr_reg:x3; val_offset:66882*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66882*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d003fff; valaddr_reg:x3; val_offset:66885*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66885*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d007fff; valaddr_reg:x3; val_offset:66888*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66888*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d00ffff; valaddr_reg:x3; val_offset:66891*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66891*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d01ffff; valaddr_reg:x3; val_offset:66894*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66894*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d03ffff; valaddr_reg:x3; val_offset:66897*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66897*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d07ffff; valaddr_reg:x3; val_offset:66900*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66900*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d0fffff; valaddr_reg:x3; val_offset:66903*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66903*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d1fffff; valaddr_reg:x3; val_offset:66906*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66906*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d3fffff; valaddr_reg:x3; val_offset:66909*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66909*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d400000; valaddr_reg:x3; val_offset:66912*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66912*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d600000; valaddr_reg:x3; val_offset:66915*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66915*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d700000; valaddr_reg:x3; val_offset:66918*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66918*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d780000; valaddr_reg:x3; val_offset:66921*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66921*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7c0000; valaddr_reg:x3; val_offset:66924*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66924*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7e0000; valaddr_reg:x3; val_offset:66927*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66927*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7f0000; valaddr_reg:x3; val_offset:66930*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66930*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7f8000; valaddr_reg:x3; val_offset:66933*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66933*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7fc000; valaddr_reg:x3; val_offset:66936*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66936*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7fe000; valaddr_reg:x3; val_offset:66939*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66939*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7ff000; valaddr_reg:x3; val_offset:66942*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66942*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7ff800; valaddr_reg:x3; val_offset:66945*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66945*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:66948*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66948*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:66951*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66951*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7fff00; valaddr_reg:x3; val_offset:66954*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66954*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7fff80; valaddr_reg:x3; val_offset:66957*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66957*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:66960*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66960*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:66963*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66963*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:66966*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66966*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:66969*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66969*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:66972*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66972*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:66975*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66975*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x61a51b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee1a51b; op2val:0x80000000; +op3val:0x8d7fffff; valaddr_reg:x3; val_offset:66978*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66978*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0800000; valaddr_reg:x3; val_offset:66981*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66981*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0800001; valaddr_reg:x3; val_offset:66984*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66984*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0800003; valaddr_reg:x3; val_offset:66987*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66987*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0800007; valaddr_reg:x3; val_offset:66990*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66990*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa080000f; valaddr_reg:x3; val_offset:66993*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66993*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa080001f; valaddr_reg:x3; val_offset:66996*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66996*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa080003f; valaddr_reg:x3; val_offset:66999*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 66999*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa080007f; valaddr_reg:x3; val_offset:67002*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67002*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa08000ff; valaddr_reg:x3; val_offset:67005*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67005*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa08001ff; valaddr_reg:x3; val_offset:67008*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67008*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa08003ff; valaddr_reg:x3; val_offset:67011*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67011*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa08007ff; valaddr_reg:x3; val_offset:67014*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67014*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0800fff; valaddr_reg:x3; val_offset:67017*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67017*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0801fff; valaddr_reg:x3; val_offset:67020*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67020*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0803fff; valaddr_reg:x3; val_offset:67023*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67023*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0807fff; valaddr_reg:x3; val_offset:67026*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67026*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa080ffff; valaddr_reg:x3; val_offset:67029*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67029*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa081ffff; valaddr_reg:x3; val_offset:67032*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67032*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa083ffff; valaddr_reg:x3; val_offset:67035*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67035*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa087ffff; valaddr_reg:x3; val_offset:67038*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67038*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa08fffff; valaddr_reg:x3; val_offset:67041*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67041*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa09fffff; valaddr_reg:x3; val_offset:67044*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67044*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0bfffff; valaddr_reg:x3; val_offset:67047*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67047*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0c00000; valaddr_reg:x3; val_offset:67050*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67050*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0e00000; valaddr_reg:x3; val_offset:67053*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67053*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0f00000; valaddr_reg:x3; val_offset:67056*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67056*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0f80000; valaddr_reg:x3; val_offset:67059*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67059*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fc0000; valaddr_reg:x3; val_offset:67062*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67062*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fe0000; valaddr_reg:x3; val_offset:67065*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67065*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ff0000; valaddr_reg:x3; val_offset:67068*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67068*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ff8000; valaddr_reg:x3; val_offset:67071*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67071*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ffc000; valaddr_reg:x3; val_offset:67074*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67074*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ffe000; valaddr_reg:x3; val_offset:67077*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67077*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fff000; valaddr_reg:x3; val_offset:67080*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67080*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fff800; valaddr_reg:x3; val_offset:67083*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67083*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fffc00; valaddr_reg:x3; val_offset:67086*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67086*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fffe00; valaddr_reg:x3; val_offset:67089*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67089*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ffff00; valaddr_reg:x3; val_offset:67092*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67092*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ffff80; valaddr_reg:x3; val_offset:67095*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67095*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ffffc0; valaddr_reg:x3; val_offset:67098*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67098*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ffffe0; valaddr_reg:x3; val_offset:67101*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67101*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fffff0; valaddr_reg:x3; val_offset:67104*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67104*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fffff8; valaddr_reg:x3; val_offset:67107*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67107*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fffffc; valaddr_reg:x3; val_offset:67110*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67110*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0fffffe; valaddr_reg:x3; val_offset:67113*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67113*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x41 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xa0ffffff; valaddr_reg:x3; val_offset:67116*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67116*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbf800001; valaddr_reg:x3; val_offset:67119*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67119*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbf800003; valaddr_reg:x3; val_offset:67122*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67122*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbf800007; valaddr_reg:x3; val_offset:67125*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67125*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbf999999; valaddr_reg:x3; val_offset:67128*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67128*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:67131*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67131*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:67134*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67134*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:67137*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67137*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:67140*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67140*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:67143*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67143*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:67146*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67146*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:67149*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67149*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:67152*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67152*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:67155*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67155*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:67158*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67158*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:67161*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67161*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62aaa7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x484849 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2aaa7; op2val:0x80484849; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:67164*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67164*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c000000; valaddr_reg:x3; val_offset:67167*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67167*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c000001; valaddr_reg:x3; val_offset:67170*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67170*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c000003; valaddr_reg:x3; val_offset:67173*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67173*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c000007; valaddr_reg:x3; val_offset:67176*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67176*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c00000f; valaddr_reg:x3; val_offset:67179*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67179*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c00001f; valaddr_reg:x3; val_offset:67182*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67182*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c00003f; valaddr_reg:x3; val_offset:67185*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67185*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c00007f; valaddr_reg:x3; val_offset:67188*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67188*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c0000ff; valaddr_reg:x3; val_offset:67191*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67191*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c0001ff; valaddr_reg:x3; val_offset:67194*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67194*0 + 3*174*FLEN/8, x4, x1, x2) + +inst_22399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c0003ff; valaddr_reg:x3; val_offset:67197*0 + 3*174*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67197*0 + 3*174*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587456,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587457,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587459,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587463,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587471,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587487,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587519,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587583,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587711,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587967,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365588479,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365589503,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365591551,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365595647,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365603839,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365620223,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365652991,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365718527,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365849599,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2366111743,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2366636031,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2367684607,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2369781759,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2369781760,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2371878912,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2372927488,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373451776,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373713920,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373844992,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373910528,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373943296,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373959680,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373967872,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373971968,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373974016,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975040,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975552,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975808,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975936,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976000,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976032,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976048,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976056,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976060,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976062,32,FLEN) +NAN_BOXED(2128717083,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976063,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743168,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743169,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743171,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743175,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743183,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743199,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743231,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743295,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743423,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692743679,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692744191,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692745215,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692747263,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692751359,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692759551,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692775935,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692808703,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2692874239,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2693005311,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2693267455,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2693791743,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2694840319,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2696937471,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2696937472,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2699034624,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2700083200,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2700607488,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2700869632,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701000704,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701066240,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701099008,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701115392,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701123584,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701127680,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701129728,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701130752,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131264,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131520,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131648,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131712,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131744,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131760,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131768,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131772,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131774,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(2701131775,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2128784039,32,FLEN) +NAN_BOXED(2152220745,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080374784,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080374785,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080374787,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080374791,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080374799,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080374815,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080374847,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080374911,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080375039,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080375295,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080375807,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-176.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-176.S new file mode 100644 index 000000000..44055b72b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-176.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_22400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c0007ff; valaddr_reg:x3; val_offset:67200*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67200*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c000fff; valaddr_reg:x3; val_offset:67203*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67203*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c001fff; valaddr_reg:x3; val_offset:67206*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67206*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c003fff; valaddr_reg:x3; val_offset:67209*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67209*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c007fff; valaddr_reg:x3; val_offset:67212*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67212*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c00ffff; valaddr_reg:x3; val_offset:67215*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67215*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c01ffff; valaddr_reg:x3; val_offset:67218*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67218*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c03ffff; valaddr_reg:x3; val_offset:67221*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67221*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c07ffff; valaddr_reg:x3; val_offset:67224*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67224*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c0fffff; valaddr_reg:x3; val_offset:67227*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67227*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c1fffff; valaddr_reg:x3; val_offset:67230*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67230*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c3fffff; valaddr_reg:x3; val_offset:67233*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67233*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c400000; valaddr_reg:x3; val_offset:67236*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67236*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c600000; valaddr_reg:x3; val_offset:67239*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67239*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c700000; valaddr_reg:x3; val_offset:67242*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67242*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c780000; valaddr_reg:x3; val_offset:67245*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67245*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7c0000; valaddr_reg:x3; val_offset:67248*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67248*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7e0000; valaddr_reg:x3; val_offset:67251*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67251*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7f0000; valaddr_reg:x3; val_offset:67254*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67254*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7f8000; valaddr_reg:x3; val_offset:67257*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67257*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7fc000; valaddr_reg:x3; val_offset:67260*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67260*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7fe000; valaddr_reg:x3; val_offset:67263*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67263*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7ff000; valaddr_reg:x3; val_offset:67266*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67266*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7ff800; valaddr_reg:x3; val_offset:67269*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67269*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7ffc00; valaddr_reg:x3; val_offset:67272*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67272*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7ffe00; valaddr_reg:x3; val_offset:67275*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67275*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7fff00; valaddr_reg:x3; val_offset:67278*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67278*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7fff80; valaddr_reg:x3; val_offset:67281*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67281*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7fffc0; valaddr_reg:x3; val_offset:67284*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67284*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7fffe0; valaddr_reg:x3; val_offset:67287*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67287*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7ffff0; valaddr_reg:x3; val_offset:67290*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67290*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7ffff8; valaddr_reg:x3; val_offset:67293*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67293*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7ffffc; valaddr_reg:x3; val_offset:67296*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67296*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7ffffe; valaddr_reg:x3; val_offset:67299*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67299*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xf8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7c7fffff; valaddr_reg:x3; val_offset:67302*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67302*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f000001; valaddr_reg:x3; val_offset:67305*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67305*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f000003; valaddr_reg:x3; val_offset:67308*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67308*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f000007; valaddr_reg:x3; val_offset:67311*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67311*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f199999; valaddr_reg:x3; val_offset:67314*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67314*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f249249; valaddr_reg:x3; val_offset:67317*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67317*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f333333; valaddr_reg:x3; val_offset:67320*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67320*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:67323*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67323*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:67326*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67326*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f444444; valaddr_reg:x3; val_offset:67329*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67329*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:67332*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67332*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:67335*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67335*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f666666; valaddr_reg:x3; val_offset:67338*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67338*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:67341*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67341*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:67344*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67344*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:67347*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67347*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x62f92f and fs2 == 0 and fe2 == 0x80 and fm2 == 0x105e8d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee2f92f; op2val:0x40105e8d; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:67350*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67350*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71800000; valaddr_reg:x3; val_offset:67353*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67353*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71800001; valaddr_reg:x3; val_offset:67356*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67356*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71800003; valaddr_reg:x3; val_offset:67359*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67359*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71800007; valaddr_reg:x3; val_offset:67362*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67362*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7180000f; valaddr_reg:x3; val_offset:67365*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67365*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7180001f; valaddr_reg:x3; val_offset:67368*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67368*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7180003f; valaddr_reg:x3; val_offset:67371*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67371*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7180007f; valaddr_reg:x3; val_offset:67374*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67374*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x718000ff; valaddr_reg:x3; val_offset:67377*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67377*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x718001ff; valaddr_reg:x3; val_offset:67380*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67380*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x718003ff; valaddr_reg:x3; val_offset:67383*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67383*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x718007ff; valaddr_reg:x3; val_offset:67386*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67386*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71800fff; valaddr_reg:x3; val_offset:67389*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67389*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71801fff; valaddr_reg:x3; val_offset:67392*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67392*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71803fff; valaddr_reg:x3; val_offset:67395*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67395*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71807fff; valaddr_reg:x3; val_offset:67398*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67398*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7180ffff; valaddr_reg:x3; val_offset:67401*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67401*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7181ffff; valaddr_reg:x3; val_offset:67404*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67404*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7183ffff; valaddr_reg:x3; val_offset:67407*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67407*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7187ffff; valaddr_reg:x3; val_offset:67410*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67410*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x718fffff; valaddr_reg:x3; val_offset:67413*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67413*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x719fffff; valaddr_reg:x3; val_offset:67416*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67416*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71bfffff; valaddr_reg:x3; val_offset:67419*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67419*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71c00000; valaddr_reg:x3; val_offset:67422*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67422*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71e00000; valaddr_reg:x3; val_offset:67425*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67425*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71f00000; valaddr_reg:x3; val_offset:67428*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67428*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71f80000; valaddr_reg:x3; val_offset:67431*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67431*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fc0000; valaddr_reg:x3; val_offset:67434*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67434*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fe0000; valaddr_reg:x3; val_offset:67437*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67437*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ff0000; valaddr_reg:x3; val_offset:67440*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67440*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ff8000; valaddr_reg:x3; val_offset:67443*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67443*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ffc000; valaddr_reg:x3; val_offset:67446*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67446*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ffe000; valaddr_reg:x3; val_offset:67449*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67449*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fff000; valaddr_reg:x3; val_offset:67452*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67452*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fff800; valaddr_reg:x3; val_offset:67455*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67455*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fffc00; valaddr_reg:x3; val_offset:67458*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67458*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fffe00; valaddr_reg:x3; val_offset:67461*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67461*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ffff00; valaddr_reg:x3; val_offset:67464*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67464*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ffff80; valaddr_reg:x3; val_offset:67467*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67467*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ffffc0; valaddr_reg:x3; val_offset:67470*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67470*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ffffe0; valaddr_reg:x3; val_offset:67473*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67473*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fffff0; valaddr_reg:x3; val_offset:67476*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67476*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fffff8; valaddr_reg:x3; val_offset:67479*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67479*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fffffc; valaddr_reg:x3; val_offset:67482*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67482*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71fffffe; valaddr_reg:x3; val_offset:67485*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67485*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x71ffffff; valaddr_reg:x3; val_offset:67488*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67488*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f000001; valaddr_reg:x3; val_offset:67491*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67491*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f000003; valaddr_reg:x3; val_offset:67494*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67494*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f000007; valaddr_reg:x3; val_offset:67497*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67497*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f199999; valaddr_reg:x3; val_offset:67500*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67500*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f249249; valaddr_reg:x3; val_offset:67503*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67503*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f333333; valaddr_reg:x3; val_offset:67506*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67506*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:67509*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67509*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:67512*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67512*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f444444; valaddr_reg:x3; val_offset:67515*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67515*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:67518*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67518*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:67521*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67521*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f666666; valaddr_reg:x3; val_offset:67524*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67524*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:67527*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67527*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:67530*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67530*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:67533*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67533*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x63b82d and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0fe577 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee3b82d; op2val:0x400fe577; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:67536*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67536*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4800000; valaddr_reg:x3; val_offset:67539*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67539*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4800001; valaddr_reg:x3; val_offset:67542*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67542*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4800003; valaddr_reg:x3; val_offset:67545*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67545*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4800007; valaddr_reg:x3; val_offset:67548*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67548*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa480000f; valaddr_reg:x3; val_offset:67551*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67551*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa480001f; valaddr_reg:x3; val_offset:67554*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67554*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa480003f; valaddr_reg:x3; val_offset:67557*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67557*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa480007f; valaddr_reg:x3; val_offset:67560*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67560*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa48000ff; valaddr_reg:x3; val_offset:67563*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67563*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa48001ff; valaddr_reg:x3; val_offset:67566*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67566*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa48003ff; valaddr_reg:x3; val_offset:67569*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67569*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa48007ff; valaddr_reg:x3; val_offset:67572*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67572*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4800fff; valaddr_reg:x3; val_offset:67575*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67575*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4801fff; valaddr_reg:x3; val_offset:67578*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67578*0 + 3*175*FLEN/8, x4, x1, x2) + +inst_22527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4803fff; valaddr_reg:x3; val_offset:67581*0 + 3*175*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67581*0 + 3*175*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080376831,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080378879,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080382975,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080391167,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080407551,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080440319,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080505855,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080636927,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2080899071,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2081423359,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2082471935,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2084569087,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2084569088,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2086666240,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2087714816,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088239104,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088501248,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088632320,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088697856,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088730624,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088747008,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088755200,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088759296,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088761344,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088762368,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088762880,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763136,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763264,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763328,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763360,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763376,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763384,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763388,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763390,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2088763391,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2128804143,32,FLEN) +NAN_BOXED(1074814605,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214016,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214017,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214019,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214023,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214031,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214047,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214079,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214143,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214271,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904214527,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904215039,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904216063,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904218111,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904222207,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904230399,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904246783,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904279551,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904345087,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904476159,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1904738303,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1905262591,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1906311167,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1908408319,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1908408320,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1910505472,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1911554048,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912078336,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912340480,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912471552,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912537088,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912569856,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912586240,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912594432,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912598528,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912600576,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912601600,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602112,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602368,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602496,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602560,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602592,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602608,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602616,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602620,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602622,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(1912602623,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2128853037,32,FLEN) +NAN_BOXED(1074783607,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852032,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852033,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852035,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852039,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852047,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852063,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852095,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852159,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852287,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759852543,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759853055,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759854079,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759856127,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759860223,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759868415,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-177.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-177.S new file mode 100644 index 000000000..52e3a2b3c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-177.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_22528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4807fff; valaddr_reg:x3; val_offset:67584*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67584*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa480ffff; valaddr_reg:x3; val_offset:67587*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67587*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa481ffff; valaddr_reg:x3; val_offset:67590*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67590*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa483ffff; valaddr_reg:x3; val_offset:67593*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67593*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa487ffff; valaddr_reg:x3; val_offset:67596*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67596*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa48fffff; valaddr_reg:x3; val_offset:67599*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67599*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa49fffff; valaddr_reg:x3; val_offset:67602*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67602*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4bfffff; valaddr_reg:x3; val_offset:67605*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67605*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4c00000; valaddr_reg:x3; val_offset:67608*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67608*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4e00000; valaddr_reg:x3; val_offset:67611*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67611*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4f00000; valaddr_reg:x3; val_offset:67614*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67614*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4f80000; valaddr_reg:x3; val_offset:67617*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67617*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fc0000; valaddr_reg:x3; val_offset:67620*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67620*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fe0000; valaddr_reg:x3; val_offset:67623*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67623*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ff0000; valaddr_reg:x3; val_offset:67626*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67626*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ff8000; valaddr_reg:x3; val_offset:67629*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67629*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ffc000; valaddr_reg:x3; val_offset:67632*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67632*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ffe000; valaddr_reg:x3; val_offset:67635*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67635*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fff000; valaddr_reg:x3; val_offset:67638*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67638*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fff800; valaddr_reg:x3; val_offset:67641*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67641*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fffc00; valaddr_reg:x3; val_offset:67644*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67644*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fffe00; valaddr_reg:x3; val_offset:67647*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67647*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ffff00; valaddr_reg:x3; val_offset:67650*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67650*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ffff80; valaddr_reg:x3; val_offset:67653*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67653*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ffffc0; valaddr_reg:x3; val_offset:67656*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67656*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ffffe0; valaddr_reg:x3; val_offset:67659*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67659*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fffff0; valaddr_reg:x3; val_offset:67662*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67662*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fffff8; valaddr_reg:x3; val_offset:67665*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67665*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fffffc; valaddr_reg:x3; val_offset:67668*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67668*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4fffffe; valaddr_reg:x3; val_offset:67671*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67671*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x49 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xa4ffffff; valaddr_reg:x3; val_offset:67674*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67674*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbf800001; valaddr_reg:x3; val_offset:67677*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67677*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbf800003; valaddr_reg:x3; val_offset:67680*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67680*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbf800007; valaddr_reg:x3; val_offset:67683*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67683*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbf999999; valaddr_reg:x3; val_offset:67686*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67686*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:67689*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67689*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:67692*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67692*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:67695*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67695*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:67698*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67698*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:67701*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67701*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:67704*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67704*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:67707*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67707*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:67710*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67710*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:67713*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67713*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:67716*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67716*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:67719*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67719*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x645149 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x47c27c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee45149; op2val:0x8047c27c; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:67722*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67722*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8800000; valaddr_reg:x3; val_offset:67725*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67725*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8800001; valaddr_reg:x3; val_offset:67728*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67728*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8800003; valaddr_reg:x3; val_offset:67731*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67731*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8800007; valaddr_reg:x3; val_offset:67734*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67734*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf880000f; valaddr_reg:x3; val_offset:67737*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67737*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf880001f; valaddr_reg:x3; val_offset:67740*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67740*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf880003f; valaddr_reg:x3; val_offset:67743*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67743*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf880007f; valaddr_reg:x3; val_offset:67746*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67746*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf88000ff; valaddr_reg:x3; val_offset:67749*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67749*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf88001ff; valaddr_reg:x3; val_offset:67752*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67752*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf88003ff; valaddr_reg:x3; val_offset:67755*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67755*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf88007ff; valaddr_reg:x3; val_offset:67758*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67758*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8800fff; valaddr_reg:x3; val_offset:67761*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67761*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8801fff; valaddr_reg:x3; val_offset:67764*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67764*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8803fff; valaddr_reg:x3; val_offset:67767*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67767*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8807fff; valaddr_reg:x3; val_offset:67770*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67770*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf880ffff; valaddr_reg:x3; val_offset:67773*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67773*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf881ffff; valaddr_reg:x3; val_offset:67776*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67776*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf883ffff; valaddr_reg:x3; val_offset:67779*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67779*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf887ffff; valaddr_reg:x3; val_offset:67782*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67782*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf88fffff; valaddr_reg:x3; val_offset:67785*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67785*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf89fffff; valaddr_reg:x3; val_offset:67788*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67788*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8bfffff; valaddr_reg:x3; val_offset:67791*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67791*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8c00000; valaddr_reg:x3; val_offset:67794*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67794*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8e00000; valaddr_reg:x3; val_offset:67797*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67797*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8f00000; valaddr_reg:x3; val_offset:67800*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67800*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8f80000; valaddr_reg:x3; val_offset:67803*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67803*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fc0000; valaddr_reg:x3; val_offset:67806*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67806*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fe0000; valaddr_reg:x3; val_offset:67809*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67809*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ff0000; valaddr_reg:x3; val_offset:67812*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67812*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ff8000; valaddr_reg:x3; val_offset:67815*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67815*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ffc000; valaddr_reg:x3; val_offset:67818*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67818*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ffe000; valaddr_reg:x3; val_offset:67821*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67821*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fff000; valaddr_reg:x3; val_offset:67824*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67824*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fff800; valaddr_reg:x3; val_offset:67827*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67827*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fffc00; valaddr_reg:x3; val_offset:67830*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67830*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fffe00; valaddr_reg:x3; val_offset:67833*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67833*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ffff00; valaddr_reg:x3; val_offset:67836*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67836*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ffff80; valaddr_reg:x3; val_offset:67839*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67839*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ffffc0; valaddr_reg:x3; val_offset:67842*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67842*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ffffe0; valaddr_reg:x3; val_offset:67845*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67845*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fffff0; valaddr_reg:x3; val_offset:67848*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67848*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fffff8; valaddr_reg:x3; val_offset:67851*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67851*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fffffc; valaddr_reg:x3; val_offset:67854*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67854*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8fffffe; valaddr_reg:x3; val_offset:67857*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67857*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xf1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xf8ffffff; valaddr_reg:x3; val_offset:67860*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67860*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff000001; valaddr_reg:x3; val_offset:67863*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67863*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff000003; valaddr_reg:x3; val_offset:67866*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67866*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff000007; valaddr_reg:x3; val_offset:67869*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67869*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff199999; valaddr_reg:x3; val_offset:67872*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67872*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff249249; valaddr_reg:x3; val_offset:67875*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67875*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff333333; valaddr_reg:x3; val_offset:67878*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67878*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:67881*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67881*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:67884*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67884*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff444444; valaddr_reg:x3; val_offset:67887*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67887*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:67890*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67890*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:67893*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67893*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff666666; valaddr_reg:x3; val_offset:67896*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67896*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:67899*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67899*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:67902*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67902*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:67905*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67905*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64a32c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x0f5191 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4a32c; op2val:0xc00f5191; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:67908*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67908*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:67911*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67911*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:67914*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67914*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:67917*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67917*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:67920*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67920*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:67923*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67923*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:67926*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67926*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:67929*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67929*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:67932*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67932*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:67935*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67935*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:67938*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67938*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:67941*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67941*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:67944*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67944*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:67947*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67947*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:67950*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67950*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:67953*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67953*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:67956*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67956*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f000000; valaddr_reg:x3; val_offset:67959*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67959*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f000001; valaddr_reg:x3; val_offset:67962*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67962*0 + 3*176*FLEN/8, x4, x1, x2) + +inst_22655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f000003; valaddr_reg:x3; val_offset:67965*0 + 3*176*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67965*0 + 3*176*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759884799,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759917567,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2759983103,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2760114175,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2760376319,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2760900607,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2761949183,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2764046335,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2764046336,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2766143488,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2767192064,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2767716352,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2767978496,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768109568,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768175104,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768207872,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768224256,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768232448,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768236544,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768238592,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768239616,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240128,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240384,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240512,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240576,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240608,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240624,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240632,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240636,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240638,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(2768240639,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2128892233,32,FLEN) +NAN_BOXED(2152186492,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138176,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138177,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138179,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138183,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138191,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138207,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138239,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138303,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138431,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169138687,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169139199,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169140223,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169142271,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169146367,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169154559,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169170943,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169203711,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169269247,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169400319,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4169662463,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4170186751,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4171235327,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4173332479,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4173332480,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4175429632,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4176478208,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177002496,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177264640,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177395712,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177461248,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177494016,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177510400,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177518592,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177522688,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177524736,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177525760,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526272,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526528,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526656,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526720,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526752,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526768,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526776,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526780,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526782,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4177526783,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2128913196,32,FLEN) +NAN_BOXED(3222229393,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141888,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141889,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141891,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-178.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-178.S new file mode 100644 index 000000000..4114158b4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-178.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_22656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f000007; valaddr_reg:x3; val_offset:67968*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67968*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f00000f; valaddr_reg:x3; val_offset:67971*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67971*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f00001f; valaddr_reg:x3; val_offset:67974*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67974*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f00003f; valaddr_reg:x3; val_offset:67977*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67977*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f00007f; valaddr_reg:x3; val_offset:67980*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67980*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f0000ff; valaddr_reg:x3; val_offset:67983*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67983*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f0001ff; valaddr_reg:x3; val_offset:67986*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67986*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f0003ff; valaddr_reg:x3; val_offset:67989*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67989*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f0007ff; valaddr_reg:x3; val_offset:67992*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67992*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f000fff; valaddr_reg:x3; val_offset:67995*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67995*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f001fff; valaddr_reg:x3; val_offset:67998*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 67998*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f003fff; valaddr_reg:x3; val_offset:68001*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68001*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f007fff; valaddr_reg:x3; val_offset:68004*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68004*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f00ffff; valaddr_reg:x3; val_offset:68007*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68007*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f01ffff; valaddr_reg:x3; val_offset:68010*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68010*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f03ffff; valaddr_reg:x3; val_offset:68013*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68013*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f07ffff; valaddr_reg:x3; val_offset:68016*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68016*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f0fffff; valaddr_reg:x3; val_offset:68019*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68019*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f1fffff; valaddr_reg:x3; val_offset:68022*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68022*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f3fffff; valaddr_reg:x3; val_offset:68025*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68025*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f400000; valaddr_reg:x3; val_offset:68028*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68028*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f600000; valaddr_reg:x3; val_offset:68031*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68031*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f700000; valaddr_reg:x3; val_offset:68034*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68034*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f780000; valaddr_reg:x3; val_offset:68037*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68037*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7c0000; valaddr_reg:x3; val_offset:68040*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68040*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7e0000; valaddr_reg:x3; val_offset:68043*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68043*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7f0000; valaddr_reg:x3; val_offset:68046*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68046*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7f8000; valaddr_reg:x3; val_offset:68049*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68049*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7fc000; valaddr_reg:x3; val_offset:68052*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68052*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7fe000; valaddr_reg:x3; val_offset:68055*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68055*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7ff000; valaddr_reg:x3; val_offset:68058*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68058*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7ff800; valaddr_reg:x3; val_offset:68061*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68061*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:68064*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68064*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:68067*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68067*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7fff00; valaddr_reg:x3; val_offset:68070*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68070*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7fff80; valaddr_reg:x3; val_offset:68073*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68073*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:68076*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68076*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:68079*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68079*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:68082*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68082*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:68085*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68085*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:68088*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68088*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:68091*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68091*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f4d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f4d2; op2val:0x80000000; +op3val:0x8f7fffff; valaddr_reg:x3; val_offset:68094*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68094*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:68097*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68097*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:68100*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68100*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:68103*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68103*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:68106*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68106*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:68109*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68109*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:68112*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68112*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:68115*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68115*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:68118*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68118*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:68121*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68121*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:68124*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68124*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:68127*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68127*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:68130*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68130*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:68133*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68133*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:68136*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68136*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:68139*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68139*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:68142*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68142*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e000000; valaddr_reg:x3; val_offset:68145*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68145*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e000001; valaddr_reg:x3; val_offset:68148*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68148*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e000003; valaddr_reg:x3; val_offset:68151*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68151*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e000007; valaddr_reg:x3; val_offset:68154*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68154*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e00000f; valaddr_reg:x3; val_offset:68157*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68157*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e00001f; valaddr_reg:x3; val_offset:68160*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68160*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e00003f; valaddr_reg:x3; val_offset:68163*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68163*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e00007f; valaddr_reg:x3; val_offset:68166*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68166*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e0000ff; valaddr_reg:x3; val_offset:68169*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68169*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e0001ff; valaddr_reg:x3; val_offset:68172*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68172*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e0003ff; valaddr_reg:x3; val_offset:68175*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68175*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e0007ff; valaddr_reg:x3; val_offset:68178*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68178*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e000fff; valaddr_reg:x3; val_offset:68181*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68181*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e001fff; valaddr_reg:x3; val_offset:68184*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68184*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e003fff; valaddr_reg:x3; val_offset:68187*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68187*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e007fff; valaddr_reg:x3; val_offset:68190*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68190*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e00ffff; valaddr_reg:x3; val_offset:68193*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68193*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e01ffff; valaddr_reg:x3; val_offset:68196*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68196*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e03ffff; valaddr_reg:x3; val_offset:68199*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68199*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e07ffff; valaddr_reg:x3; val_offset:68202*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68202*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e0fffff; valaddr_reg:x3; val_offset:68205*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68205*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e1fffff; valaddr_reg:x3; val_offset:68208*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68208*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e3fffff; valaddr_reg:x3; val_offset:68211*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68211*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e400000; valaddr_reg:x3; val_offset:68214*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68214*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e600000; valaddr_reg:x3; val_offset:68217*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68217*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e700000; valaddr_reg:x3; val_offset:68220*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68220*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e780000; valaddr_reg:x3; val_offset:68223*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68223*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7c0000; valaddr_reg:x3; val_offset:68226*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68226*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7e0000; valaddr_reg:x3; val_offset:68229*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68229*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7f0000; valaddr_reg:x3; val_offset:68232*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68232*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7f8000; valaddr_reg:x3; val_offset:68235*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68235*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7fc000; valaddr_reg:x3; val_offset:68238*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68238*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7fe000; valaddr_reg:x3; val_offset:68241*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68241*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7ff000; valaddr_reg:x3; val_offset:68244*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68244*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7ff800; valaddr_reg:x3; val_offset:68247*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68247*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:68250*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68250*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:68253*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68253*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7fff00; valaddr_reg:x3; val_offset:68256*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68256*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7fff80; valaddr_reg:x3; val_offset:68259*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68259*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:68262*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68262*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:68265*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68265*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:68268*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68268*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:68271*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68271*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:68274*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68274*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:68277*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68277*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x64f961 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee4f961; op2val:0x80000000; +op3val:0x8e7fffff; valaddr_reg:x3; val_offset:68280*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68280*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3f800001; valaddr_reg:x3; val_offset:68283*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68283*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3f800003; valaddr_reg:x3; val_offset:68286*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68286*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3f800007; valaddr_reg:x3; val_offset:68289*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68289*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3f999999; valaddr_reg:x3; val_offset:68292*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68292*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:68295*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68295*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:68298*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68298*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:68301*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68301*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:68304*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68304*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:68307*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68307*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:68310*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68310*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:68313*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68313*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:68316*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68316*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:68319*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68319*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:68322*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68322*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:68325*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68325*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:68328*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68328*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40800000; valaddr_reg:x3; val_offset:68331*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68331*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40800001; valaddr_reg:x3; val_offset:68334*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68334*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40800003; valaddr_reg:x3; val_offset:68337*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68337*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40800007; valaddr_reg:x3; val_offset:68340*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68340*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x4080000f; valaddr_reg:x3; val_offset:68343*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68343*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x4080001f; valaddr_reg:x3; val_offset:68346*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68346*0 + 3*177*FLEN/8, x4, x1, x2) + +inst_22783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x4080003f; valaddr_reg:x3; val_offset:68349*0 + 3*177*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68349*0 + 3*177*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141895,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141903,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141919,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141951,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142015,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142143,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142399,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142911,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399143935,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399145983,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399150079,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399158271,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399174655,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399207423,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399272959,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399404031,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399666175,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2400190463,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2401239039,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2403336191,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2403336192,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2405433344,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2406481920,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407006208,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407268352,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407399424,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407464960,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407497728,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407514112,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407522304,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407526400,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407528448,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407529472,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407529984,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530240,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530368,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530432,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530464,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530480,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530488,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530492,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530494,32,FLEN) +NAN_BOXED(2128934098,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530495,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364672,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364673,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364675,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364679,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364687,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364703,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364735,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364799,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364927,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382365183,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382365695,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382366719,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382368767,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382372863,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382381055,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382397439,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382430207,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382495743,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382626815,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382888959,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2383413247,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2384461823,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2386558975,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2386558976,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2388656128,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2389704704,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390228992,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390491136,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390622208,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390687744,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390720512,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390736896,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390745088,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390749184,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390751232,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390752256,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390752768,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753024,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753152,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753216,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753248,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753264,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753272,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753276,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753278,32,FLEN) +NAN_BOXED(2128935265,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753279,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130432,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130433,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130435,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130439,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130447,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130463,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130495,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-179.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-179.S new file mode 100644 index 000000000..08b23a3f0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-179.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_22784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x4080007f; valaddr_reg:x3; val_offset:68352*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68352*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x408000ff; valaddr_reg:x3; val_offset:68355*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68355*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x408001ff; valaddr_reg:x3; val_offset:68358*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68358*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x408003ff; valaddr_reg:x3; val_offset:68361*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68361*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x408007ff; valaddr_reg:x3; val_offset:68364*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68364*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40800fff; valaddr_reg:x3; val_offset:68367*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68367*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40801fff; valaddr_reg:x3; val_offset:68370*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68370*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40803fff; valaddr_reg:x3; val_offset:68373*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68373*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40807fff; valaddr_reg:x3; val_offset:68376*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68376*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x4080ffff; valaddr_reg:x3; val_offset:68379*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68379*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x4081ffff; valaddr_reg:x3; val_offset:68382*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68382*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x4083ffff; valaddr_reg:x3; val_offset:68385*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68385*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x4087ffff; valaddr_reg:x3; val_offset:68388*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68388*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x408fffff; valaddr_reg:x3; val_offset:68391*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68391*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x409fffff; valaddr_reg:x3; val_offset:68394*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68394*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40bfffff; valaddr_reg:x3; val_offset:68397*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68397*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40c00000; valaddr_reg:x3; val_offset:68400*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68400*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40e00000; valaddr_reg:x3; val_offset:68403*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68403*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40f00000; valaddr_reg:x3; val_offset:68406*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68406*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40f80000; valaddr_reg:x3; val_offset:68409*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68409*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fc0000; valaddr_reg:x3; val_offset:68412*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68412*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fe0000; valaddr_reg:x3; val_offset:68415*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68415*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ff0000; valaddr_reg:x3; val_offset:68418*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68418*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ff8000; valaddr_reg:x3; val_offset:68421*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68421*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ffc000; valaddr_reg:x3; val_offset:68424*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68424*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ffe000; valaddr_reg:x3; val_offset:68427*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68427*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fff000; valaddr_reg:x3; val_offset:68430*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68430*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fff800; valaddr_reg:x3; val_offset:68433*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68433*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fffc00; valaddr_reg:x3; val_offset:68436*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68436*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fffe00; valaddr_reg:x3; val_offset:68439*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68439*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ffff00; valaddr_reg:x3; val_offset:68442*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68442*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ffff80; valaddr_reg:x3; val_offset:68445*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68445*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ffffc0; valaddr_reg:x3; val_offset:68448*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68448*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ffffe0; valaddr_reg:x3; val_offset:68451*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68451*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fffff0; valaddr_reg:x3; val_offset:68454*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68454*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fffff8; valaddr_reg:x3; val_offset:68457*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68457*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fffffc; valaddr_reg:x3; val_offset:68460*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68460*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40fffffe; valaddr_reg:x3; val_offset:68463*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68463*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x650cd9 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4787b9 and fs3 == 0 and fe3 == 0x81 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee50cd9; op2val:0x4787b9; +op3val:0x40ffffff; valaddr_reg:x3; val_offset:68466*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68466*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65800000; valaddr_reg:x3; val_offset:68469*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68469*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65800001; valaddr_reg:x3; val_offset:68472*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68472*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65800003; valaddr_reg:x3; val_offset:68475*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68475*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65800007; valaddr_reg:x3; val_offset:68478*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68478*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x6580000f; valaddr_reg:x3; val_offset:68481*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68481*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x6580001f; valaddr_reg:x3; val_offset:68484*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68484*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x6580003f; valaddr_reg:x3; val_offset:68487*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68487*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x6580007f; valaddr_reg:x3; val_offset:68490*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68490*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x658000ff; valaddr_reg:x3; val_offset:68493*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68493*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x658001ff; valaddr_reg:x3; val_offset:68496*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68496*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x658003ff; valaddr_reg:x3; val_offset:68499*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68499*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x658007ff; valaddr_reg:x3; val_offset:68502*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68502*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65800fff; valaddr_reg:x3; val_offset:68505*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68505*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65801fff; valaddr_reg:x3; val_offset:68508*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68508*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65803fff; valaddr_reg:x3; val_offset:68511*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68511*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65807fff; valaddr_reg:x3; val_offset:68514*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68514*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x6580ffff; valaddr_reg:x3; val_offset:68517*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68517*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x6581ffff; valaddr_reg:x3; val_offset:68520*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68520*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x6583ffff; valaddr_reg:x3; val_offset:68523*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68523*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x6587ffff; valaddr_reg:x3; val_offset:68526*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68526*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x658fffff; valaddr_reg:x3; val_offset:68529*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68529*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x659fffff; valaddr_reg:x3; val_offset:68532*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68532*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65bfffff; valaddr_reg:x3; val_offset:68535*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68535*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65c00000; valaddr_reg:x3; val_offset:68538*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68538*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65e00000; valaddr_reg:x3; val_offset:68541*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68541*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65f00000; valaddr_reg:x3; val_offset:68544*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68544*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65f80000; valaddr_reg:x3; val_offset:68547*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68547*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fc0000; valaddr_reg:x3; val_offset:68550*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68550*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fe0000; valaddr_reg:x3; val_offset:68553*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68553*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ff0000; valaddr_reg:x3; val_offset:68556*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68556*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ff8000; valaddr_reg:x3; val_offset:68559*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68559*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ffc000; valaddr_reg:x3; val_offset:68562*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68562*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ffe000; valaddr_reg:x3; val_offset:68565*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68565*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fff000; valaddr_reg:x3; val_offset:68568*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68568*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fff800; valaddr_reg:x3; val_offset:68571*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68571*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fffc00; valaddr_reg:x3; val_offset:68574*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68574*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fffe00; valaddr_reg:x3; val_offset:68577*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68577*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ffff00; valaddr_reg:x3; val_offset:68580*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68580*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ffff80; valaddr_reg:x3; val_offset:68583*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68583*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ffffc0; valaddr_reg:x3; val_offset:68586*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68586*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ffffe0; valaddr_reg:x3; val_offset:68589*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68589*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fffff0; valaddr_reg:x3; val_offset:68592*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68592*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fffff8; valaddr_reg:x3; val_offset:68595*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68595*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fffffc; valaddr_reg:x3; val_offset:68598*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68598*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65fffffe; valaddr_reg:x3; val_offset:68601*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68601*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xcb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x65ffffff; valaddr_reg:x3; val_offset:68604*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68604*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f000001; valaddr_reg:x3; val_offset:68607*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68607*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f000003; valaddr_reg:x3; val_offset:68610*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68610*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f000007; valaddr_reg:x3; val_offset:68613*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68613*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f199999; valaddr_reg:x3; val_offset:68616*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68616*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f249249; valaddr_reg:x3; val_offset:68619*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68619*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f333333; valaddr_reg:x3; val_offset:68622*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68622*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:68625*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68625*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:68628*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68628*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f444444; valaddr_reg:x3; val_offset:68631*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68631*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:68634*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68634*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:68637*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68637*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f666666; valaddr_reg:x3; val_offset:68640*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68640*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:68643*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68643*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:68646*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68646*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:68649*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68649*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x651716 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0f090d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee51716; op2val:0x400f090d; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:68652*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68652*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:68655*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68655*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:68658*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68658*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:68661*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68661*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:68664*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68664*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:68667*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68667*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:68670*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68670*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:68673*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68673*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:68676*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68676*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:68679*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68679*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:68682*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68682*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:68685*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68685*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:68688*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68688*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:68691*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68691*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:68694*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68694*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:68697*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68697*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:68700*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68700*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82800000; valaddr_reg:x3; val_offset:68703*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68703*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82800001; valaddr_reg:x3; val_offset:68706*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68706*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82800003; valaddr_reg:x3; val_offset:68709*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68709*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82800007; valaddr_reg:x3; val_offset:68712*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68712*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8280000f; valaddr_reg:x3; val_offset:68715*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68715*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8280001f; valaddr_reg:x3; val_offset:68718*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68718*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8280003f; valaddr_reg:x3; val_offset:68721*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68721*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8280007f; valaddr_reg:x3; val_offset:68724*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68724*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x828000ff; valaddr_reg:x3; val_offset:68727*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68727*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x828001ff; valaddr_reg:x3; val_offset:68730*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68730*0 + 3*178*FLEN/8, x4, x1, x2) + +inst_22911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x828003ff; valaddr_reg:x3; val_offset:68733*0 + 3*178*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68733*0 + 3*178*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130559,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130687,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082130943,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082131455,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082132479,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082134527,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082138623,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082146815,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082163199,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082195967,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082261503,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082392575,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1082654719,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1083179007,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1084227583,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1086324735,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1086324736,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1088421888,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1089470464,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1089994752,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090256896,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090387968,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090453504,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090486272,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090502656,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090510848,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090514944,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090516992,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090518016,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090518528,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090518784,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090518912,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090518976,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090519008,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090519024,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090519032,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090519036,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090519038,32,FLEN) +NAN_BOXED(2128940249,32,FLEN) +NAN_BOXED(4687801,32,FLEN) +NAN_BOXED(1090519039,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887424,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887425,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887427,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887431,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887439,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887455,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887487,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887551,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887679,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702887935,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702888447,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702889471,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702891519,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702895615,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702903807,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702920191,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1702952959,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1703018495,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1703149567,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1703411711,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1703935999,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1704984575,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1707081727,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1707081728,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1709178880,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1710227456,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1710751744,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711013888,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711144960,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711210496,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711243264,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711259648,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711267840,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711271936,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711273984,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711275008,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711275520,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711275776,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711275904,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711275968,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711276000,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711276016,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711276024,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711276028,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711276030,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(1711276031,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2128942870,32,FLEN) +NAN_BOXED(1074727181,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426688,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426689,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426691,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426695,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426703,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426719,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426751,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426815,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426943,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189427199,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189427711,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-18.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-18.S new file mode 100644 index 000000000..a27d20ae6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-18.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_2176: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f800fff; valaddr_reg:x3; val_offset:6528*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6528*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2177: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f801fff; valaddr_reg:x3; val_offset:6531*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6531*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2178: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f803fff; valaddr_reg:x3; val_offset:6534*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6534*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2179: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f807fff; valaddr_reg:x3; val_offset:6537*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6537*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2180: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f80ffff; valaddr_reg:x3; val_offset:6540*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6540*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2181: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f81ffff; valaddr_reg:x3; val_offset:6543*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6543*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2182: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f83ffff; valaddr_reg:x3; val_offset:6546*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6546*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2183: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f87ffff; valaddr_reg:x3; val_offset:6549*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6549*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2184: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f8fffff; valaddr_reg:x3; val_offset:6552*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6552*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2185: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f999999; valaddr_reg:x3; val_offset:6555*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6555*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2186: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3f9fffff; valaddr_reg:x3; val_offset:6558*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6558*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2187: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:6561*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6561*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2188: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:6564*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6564*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2189: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:6567*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6567*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2190: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:6570*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6570*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2191: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fbfffff; valaddr_reg:x3; val_offset:6573*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6573*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2192: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fc00000; valaddr_reg:x3; val_offset:6576*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6576*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2193: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:6579*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6579*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2194: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:6582*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6582*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2195: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:6585*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6585*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2196: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fe00000; valaddr_reg:x3; val_offset:6588*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6588*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2197: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:6591*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6591*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2198: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:6594*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6594*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2199: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ff00000; valaddr_reg:x3; val_offset:6597*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6597*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2200: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ff80000; valaddr_reg:x3; val_offset:6600*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6600*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2201: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffc0000; valaddr_reg:x3; val_offset:6603*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6603*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2202: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffe0000; valaddr_reg:x3; val_offset:6606*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6606*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2203: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fff0000; valaddr_reg:x3; val_offset:6609*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6609*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2204: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fff8000; valaddr_reg:x3; val_offset:6612*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6612*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2205: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fffc000; valaddr_reg:x3; val_offset:6615*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6615*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2206: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fffe000; valaddr_reg:x3; val_offset:6618*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6618*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2207: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffff000; valaddr_reg:x3; val_offset:6621*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6621*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2208: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffff800; valaddr_reg:x3; val_offset:6624*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6624*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2209: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffffc00; valaddr_reg:x3; val_offset:6627*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6627*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2210: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffffe00; valaddr_reg:x3; val_offset:6630*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6630*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2211: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fffff00; valaddr_reg:x3; val_offset:6633*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6633*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2212: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fffff80; valaddr_reg:x3; val_offset:6636*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6636*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2213: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fffffc0; valaddr_reg:x3; val_offset:6639*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6639*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2214: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fffffe0; valaddr_reg:x3; val_offset:6642*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6642*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2215: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffffff0; valaddr_reg:x3; val_offset:6645*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6645*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2216: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:6648*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6648*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2217: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:6651*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6651*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2218: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:6654*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6654*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2219: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3b85b9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2ebde8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3b85b9; op2val:0x1aebde8; +op3val:0x3fffffff; valaddr_reg:x3; val_offset:6657*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6657*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2220: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b000000; valaddr_reg:x3; val_offset:6660*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6660*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2221: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b000001; valaddr_reg:x3; val_offset:6663*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6663*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2222: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b000003; valaddr_reg:x3; val_offset:6666*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6666*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2223: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b000007; valaddr_reg:x3; val_offset:6669*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6669*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2224: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b00000f; valaddr_reg:x3; val_offset:6672*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6672*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2225: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b00001f; valaddr_reg:x3; val_offset:6675*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6675*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2226: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b00003f; valaddr_reg:x3; val_offset:6678*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6678*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2227: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b00007f; valaddr_reg:x3; val_offset:6681*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6681*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2228: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b0000ff; valaddr_reg:x3; val_offset:6684*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6684*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2229: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b0001ff; valaddr_reg:x3; val_offset:6687*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6687*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2230: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b0003ff; valaddr_reg:x3; val_offset:6690*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6690*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2231: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b0007ff; valaddr_reg:x3; val_offset:6693*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6693*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2232: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b000fff; valaddr_reg:x3; val_offset:6696*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6696*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2233: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b001fff; valaddr_reg:x3; val_offset:6699*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6699*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2234: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b003fff; valaddr_reg:x3; val_offset:6702*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6702*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2235: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b007fff; valaddr_reg:x3; val_offset:6705*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6705*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2236: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b00ffff; valaddr_reg:x3; val_offset:6708*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6708*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2237: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b01ffff; valaddr_reg:x3; val_offset:6711*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6711*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2238: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b03ffff; valaddr_reg:x3; val_offset:6714*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6714*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2239: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b07ffff; valaddr_reg:x3; val_offset:6717*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6717*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2240: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b0fffff; valaddr_reg:x3; val_offset:6720*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6720*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2241: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b1fffff; valaddr_reg:x3; val_offset:6723*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6723*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2242: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b3fffff; valaddr_reg:x3; val_offset:6726*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6726*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2243: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b400000; valaddr_reg:x3; val_offset:6729*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6729*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2244: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b600000; valaddr_reg:x3; val_offset:6732*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6732*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2245: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b700000; valaddr_reg:x3; val_offset:6735*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6735*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2246: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b780000; valaddr_reg:x3; val_offset:6738*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6738*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2247: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7c0000; valaddr_reg:x3; val_offset:6741*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6741*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2248: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7e0000; valaddr_reg:x3; val_offset:6744*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6744*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2249: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7f0000; valaddr_reg:x3; val_offset:6747*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6747*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2250: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7f8000; valaddr_reg:x3; val_offset:6750*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6750*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2251: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7fc000; valaddr_reg:x3; val_offset:6753*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6753*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2252: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7fe000; valaddr_reg:x3; val_offset:6756*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6756*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2253: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7ff000; valaddr_reg:x3; val_offset:6759*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6759*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2254: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7ff800; valaddr_reg:x3; val_offset:6762*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6762*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2255: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7ffc00; valaddr_reg:x3; val_offset:6765*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6765*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2256: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7ffe00; valaddr_reg:x3; val_offset:6768*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6768*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2257: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7fff00; valaddr_reg:x3; val_offset:6771*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6771*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2258: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7fff80; valaddr_reg:x3; val_offset:6774*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6774*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2259: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7fffc0; valaddr_reg:x3; val_offset:6777*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6777*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2260: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7fffe0; valaddr_reg:x3; val_offset:6780*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6780*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2261: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7ffff0; valaddr_reg:x3; val_offset:6783*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6783*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2262: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7ffff8; valaddr_reg:x3; val_offset:6786*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6786*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2263: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7ffffc; valaddr_reg:x3; val_offset:6789*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6789*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2264: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7ffffe; valaddr_reg:x3; val_offset:6792*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6792*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2265: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x76 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3b7fffff; valaddr_reg:x3; val_offset:6795*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6795*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2266: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3f800001; valaddr_reg:x3; val_offset:6798*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6798*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2267: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3f800003; valaddr_reg:x3; val_offset:6801*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6801*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2268: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3f800007; valaddr_reg:x3; val_offset:6804*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6804*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2269: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3f999999; valaddr_reg:x3; val_offset:6807*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6807*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2270: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:6810*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6810*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2271: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:6813*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6813*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2272: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:6816*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6816*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2273: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:6819*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6819*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2274: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:6822*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6822*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2275: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:6825*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6825*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2276: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:6828*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6828*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2277: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:6831*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6831*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2278: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:6834*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6834*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2279: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:6837*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6837*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2280: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:6840*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6840*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2281: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3ba71d and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2e9ed0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3ba71d; op2val:0x1ae9ed0; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:6843*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6843*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2282: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80000000; valaddr_reg:x3; val_offset:6846*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6846*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2283: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:6849*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6849*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2284: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:6852*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6852*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2285: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:6855*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6855*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2286: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8000000f; valaddr_reg:x3; val_offset:6858*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6858*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2287: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8000001f; valaddr_reg:x3; val_offset:6861*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6861*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2288: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8000003f; valaddr_reg:x3; val_offset:6864*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6864*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2289: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8000007f; valaddr_reg:x3; val_offset:6867*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6867*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2290: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x800000ff; valaddr_reg:x3; val_offset:6870*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6870*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2291: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x800001ff; valaddr_reg:x3; val_offset:6873*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6873*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2292: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x800003ff; valaddr_reg:x3; val_offset:6876*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6876*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2293: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x800007ff; valaddr_reg:x3; val_offset:6879*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6879*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2294: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80000fff; valaddr_reg:x3; val_offset:6882*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6882*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2295: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80001fff; valaddr_reg:x3; val_offset:6885*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6885*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2296: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80003fff; valaddr_reg:x3; val_offset:6888*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6888*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2297: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80007fff; valaddr_reg:x3; val_offset:6891*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6891*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2298: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8000ffff; valaddr_reg:x3; val_offset:6894*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6894*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2299: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8001ffff; valaddr_reg:x3; val_offset:6897*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6897*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2300: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8003ffff; valaddr_reg:x3; val_offset:6900*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6900*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2301: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8007ffff; valaddr_reg:x3; val_offset:6903*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6903*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2302: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x800fffff; valaddr_reg:x3; val_offset:6906*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6906*0 + 3*17*FLEN/8, x4, x1, x2) + +inst_2303: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:6909*0 + 3*17*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6909*0 + 3*17*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065357311,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065361407,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065369599,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065385983,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065418751,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065484287,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065615359,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1065877503,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1066401791,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1067450367,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1069547519,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1069547520,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1071644672,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1072693248,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073217536,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073479680,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073610752,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073676288,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073709056,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073725440,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073733632,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073737728,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073739776,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073740800,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741312,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741568,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741696,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741760,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741792,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741808,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2101052857,32,FLEN) +NAN_BOXED(28229096,32,FLEN) +NAN_BOXED(1073741823,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855744,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855745,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855747,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855751,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855759,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855775,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855807,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855871,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989855999,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989856255,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989856767,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989857791,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989859839,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989863935,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989872127,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989888511,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989921279,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(989986815,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(990117887,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(990380031,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(990904319,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(991952895,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(994050047,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(994050048,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(996147200,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(997195776,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(997720064,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(997982208,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998113280,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998178816,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998211584,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998227968,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998236160,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998240256,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998242304,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998243328,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998243840,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244096,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244224,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244288,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244320,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244336,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244344,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244348,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244350,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(998244351,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2101061405,32,FLEN) +NAN_BOXED(28221136,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483663,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483679,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483711,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483775,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483903,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484159,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484671,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147485695,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147487743,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147491839,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147500031,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147516415,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147549183,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147614719,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147745791,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148007935,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148532223,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-180.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-180.S new file mode 100644 index 000000000..44ceb0386 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-180.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_22912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x828007ff; valaddr_reg:x3; val_offset:68736*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68736*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82800fff; valaddr_reg:x3; val_offset:68739*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68739*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82801fff; valaddr_reg:x3; val_offset:68742*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68742*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82803fff; valaddr_reg:x3; val_offset:68745*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68745*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82807fff; valaddr_reg:x3; val_offset:68748*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68748*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8280ffff; valaddr_reg:x3; val_offset:68751*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68751*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8281ffff; valaddr_reg:x3; val_offset:68754*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68754*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8283ffff; valaddr_reg:x3; val_offset:68757*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68757*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x8287ffff; valaddr_reg:x3; val_offset:68760*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68760*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x828fffff; valaddr_reg:x3; val_offset:68763*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68763*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x829fffff; valaddr_reg:x3; val_offset:68766*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68766*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82bfffff; valaddr_reg:x3; val_offset:68769*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68769*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82c00000; valaddr_reg:x3; val_offset:68772*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68772*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82e00000; valaddr_reg:x3; val_offset:68775*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68775*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82f00000; valaddr_reg:x3; val_offset:68778*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68778*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82f80000; valaddr_reg:x3; val_offset:68781*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68781*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fc0000; valaddr_reg:x3; val_offset:68784*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68784*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fe0000; valaddr_reg:x3; val_offset:68787*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68787*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ff0000; valaddr_reg:x3; val_offset:68790*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68790*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ff8000; valaddr_reg:x3; val_offset:68793*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68793*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ffc000; valaddr_reg:x3; val_offset:68796*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68796*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ffe000; valaddr_reg:x3; val_offset:68799*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68799*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fff000; valaddr_reg:x3; val_offset:68802*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68802*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fff800; valaddr_reg:x3; val_offset:68805*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68805*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fffc00; valaddr_reg:x3; val_offset:68808*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68808*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fffe00; valaddr_reg:x3; val_offset:68811*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68811*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ffff00; valaddr_reg:x3; val_offset:68814*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68814*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ffff80; valaddr_reg:x3; val_offset:68817*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68817*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ffffc0; valaddr_reg:x3; val_offset:68820*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68820*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ffffe0; valaddr_reg:x3; val_offset:68823*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68823*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fffff0; valaddr_reg:x3; val_offset:68826*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68826*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fffff8; valaddr_reg:x3; val_offset:68829*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68829*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fffffc; valaddr_reg:x3; val_offset:68832*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68832*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82fffffe; valaddr_reg:x3; val_offset:68835*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68835*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x667462 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee67462; op2val:0x80000000; +op3val:0x82ffffff; valaddr_reg:x3; val_offset:68838*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68838*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78800000; valaddr_reg:x3; val_offset:68841*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68841*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78800001; valaddr_reg:x3; val_offset:68844*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68844*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78800003; valaddr_reg:x3; val_offset:68847*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68847*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78800007; valaddr_reg:x3; val_offset:68850*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68850*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7880000f; valaddr_reg:x3; val_offset:68853*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68853*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7880001f; valaddr_reg:x3; val_offset:68856*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68856*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7880003f; valaddr_reg:x3; val_offset:68859*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68859*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7880007f; valaddr_reg:x3; val_offset:68862*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68862*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x788000ff; valaddr_reg:x3; val_offset:68865*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68865*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x788001ff; valaddr_reg:x3; val_offset:68868*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68868*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x788003ff; valaddr_reg:x3; val_offset:68871*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68871*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x788007ff; valaddr_reg:x3; val_offset:68874*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68874*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78800fff; valaddr_reg:x3; val_offset:68877*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68877*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78801fff; valaddr_reg:x3; val_offset:68880*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68880*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78803fff; valaddr_reg:x3; val_offset:68883*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68883*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78807fff; valaddr_reg:x3; val_offset:68886*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68886*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7880ffff; valaddr_reg:x3; val_offset:68889*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68889*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7881ffff; valaddr_reg:x3; val_offset:68892*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68892*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7883ffff; valaddr_reg:x3; val_offset:68895*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68895*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7887ffff; valaddr_reg:x3; val_offset:68898*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68898*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x788fffff; valaddr_reg:x3; val_offset:68901*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68901*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x789fffff; valaddr_reg:x3; val_offset:68904*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68904*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78bfffff; valaddr_reg:x3; val_offset:68907*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68907*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78c00000; valaddr_reg:x3; val_offset:68910*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68910*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78e00000; valaddr_reg:x3; val_offset:68913*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68913*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78f00000; valaddr_reg:x3; val_offset:68916*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68916*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78f80000; valaddr_reg:x3; val_offset:68919*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68919*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fc0000; valaddr_reg:x3; val_offset:68922*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68922*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fe0000; valaddr_reg:x3; val_offset:68925*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68925*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ff0000; valaddr_reg:x3; val_offset:68928*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68928*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ff8000; valaddr_reg:x3; val_offset:68931*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68931*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ffc000; valaddr_reg:x3; val_offset:68934*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68934*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ffe000; valaddr_reg:x3; val_offset:68937*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68937*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fff000; valaddr_reg:x3; val_offset:68940*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68940*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fff800; valaddr_reg:x3; val_offset:68943*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68943*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fffc00; valaddr_reg:x3; val_offset:68946*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68946*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fffe00; valaddr_reg:x3; val_offset:68949*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68949*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ffff00; valaddr_reg:x3; val_offset:68952*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68952*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ffff80; valaddr_reg:x3; val_offset:68955*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68955*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ffffc0; valaddr_reg:x3; val_offset:68958*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68958*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ffffe0; valaddr_reg:x3; val_offset:68961*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68961*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fffff0; valaddr_reg:x3; val_offset:68964*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68964*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fffff8; valaddr_reg:x3; val_offset:68967*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68967*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fffffc; valaddr_reg:x3; val_offset:68970*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68970*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78fffffe; valaddr_reg:x3; val_offset:68973*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68973*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xf1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x78ffffff; valaddr_reg:x3; val_offset:68976*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68976*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f000001; valaddr_reg:x3; val_offset:68979*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68979*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f000003; valaddr_reg:x3; val_offset:68982*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68982*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f000007; valaddr_reg:x3; val_offset:68985*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68985*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f199999; valaddr_reg:x3; val_offset:68988*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68988*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f249249; valaddr_reg:x3; val_offset:68991*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68991*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f333333; valaddr_reg:x3; val_offset:68994*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68994*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_22999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:68997*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 68997*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:69000*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69000*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f444444; valaddr_reg:x3; val_offset:69003*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69003*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:69006*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69006*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:69009*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69009*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f666666; valaddr_reg:x3; val_offset:69012*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69012*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:69015*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69015*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:69018*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69018*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:69021*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69021*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x66dd2b and fs2 == 0 and fe2 == 0x80 and fm2 == 0x0defb8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee6dd2b; op2val:0x400defb8; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:69024*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69024*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:69027*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69027*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:69030*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69030*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:69033*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69033*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:69036*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69036*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:69039*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69039*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:69042*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69042*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:69045*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69045*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:69048*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69048*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:69051*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69051*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:69054*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69054*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:69057*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69057*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:69060*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69060*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:69063*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69063*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:69066*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69066*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:69069*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69069*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:69072*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69072*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8000000; valaddr_reg:x3; val_offset:69075*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69075*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8000001; valaddr_reg:x3; val_offset:69078*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69078*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8000003; valaddr_reg:x3; val_offset:69081*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69081*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8000007; valaddr_reg:x3; val_offset:69084*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69084*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x800000f; valaddr_reg:x3; val_offset:69087*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69087*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x800001f; valaddr_reg:x3; val_offset:69090*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69090*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x800003f; valaddr_reg:x3; val_offset:69093*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69093*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x800007f; valaddr_reg:x3; val_offset:69096*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69096*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x80000ff; valaddr_reg:x3; val_offset:69099*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69099*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x80001ff; valaddr_reg:x3; val_offset:69102*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69102*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x80003ff; valaddr_reg:x3; val_offset:69105*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69105*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x80007ff; valaddr_reg:x3; val_offset:69108*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69108*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8000fff; valaddr_reg:x3; val_offset:69111*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69111*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8001fff; valaddr_reg:x3; val_offset:69114*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69114*0 + 3*179*FLEN/8, x4, x1, x2) + +inst_23039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8003fff; valaddr_reg:x3; val_offset:69117*0 + 3*179*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69117*0 + 3*179*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189428735,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189430783,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189434879,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189443071,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189459455,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189492223,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189557759,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189688831,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189950975,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2190475263,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2191523839,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2193620991,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2193620992,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2195718144,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2196766720,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197291008,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197553152,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197684224,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197749760,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197782528,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197798912,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197807104,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197811200,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197813248,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197814272,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197814784,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815040,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815168,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815232,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815264,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815280,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815288,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815292,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815294,32,FLEN) +NAN_BOXED(2129032290,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815295,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654528,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654529,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654531,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654535,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654543,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654559,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654591,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654655,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021654783,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021655039,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021655551,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021656575,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021658623,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021662719,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021670911,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021687295,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021720063,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021785599,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2021916671,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2022178815,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2022703103,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2023751679,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2025848831,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2025848832,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2027945984,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2028994560,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2029518848,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2029780992,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2029912064,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2029977600,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030010368,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030026752,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030034944,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030039040,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030041088,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030042112,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030042624,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030042880,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030043008,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030043072,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030043104,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030043120,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030043128,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030043132,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030043134,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2030043135,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2129059115,32,FLEN) +NAN_BOXED(1074655160,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217728,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217729,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217731,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217735,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217743,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217759,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217791,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217855,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217983,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134218239,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134218751,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134219775,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134221823,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134225919,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134234111,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-181.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-181.S new file mode 100644 index 000000000..a46e265b1 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-181.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_23040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8007fff; valaddr_reg:x3; val_offset:69120*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69120*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x800ffff; valaddr_reg:x3; val_offset:69123*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69123*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x801ffff; valaddr_reg:x3; val_offset:69126*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69126*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x803ffff; valaddr_reg:x3; val_offset:69129*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69129*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x807ffff; valaddr_reg:x3; val_offset:69132*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69132*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x80fffff; valaddr_reg:x3; val_offset:69135*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69135*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x81fffff; valaddr_reg:x3; val_offset:69138*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69138*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x83fffff; valaddr_reg:x3; val_offset:69141*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69141*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8400000; valaddr_reg:x3; val_offset:69144*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69144*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8600000; valaddr_reg:x3; val_offset:69147*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69147*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8700000; valaddr_reg:x3; val_offset:69150*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69150*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x8780000; valaddr_reg:x3; val_offset:69153*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69153*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87c0000; valaddr_reg:x3; val_offset:69156*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69156*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87e0000; valaddr_reg:x3; val_offset:69159*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69159*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87f0000; valaddr_reg:x3; val_offset:69162*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69162*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87f8000; valaddr_reg:x3; val_offset:69165*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69165*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87fc000; valaddr_reg:x3; val_offset:69168*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69168*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87fe000; valaddr_reg:x3; val_offset:69171*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69171*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87ff000; valaddr_reg:x3; val_offset:69174*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69174*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87ff800; valaddr_reg:x3; val_offset:69177*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69177*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87ffc00; valaddr_reg:x3; val_offset:69180*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69180*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87ffe00; valaddr_reg:x3; val_offset:69183*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69183*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87fff00; valaddr_reg:x3; val_offset:69186*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69186*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87fff80; valaddr_reg:x3; val_offset:69189*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69189*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87fffc0; valaddr_reg:x3; val_offset:69192*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69192*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87fffe0; valaddr_reg:x3; val_offset:69195*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69195*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87ffff0; valaddr_reg:x3; val_offset:69198*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69198*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87ffff8; valaddr_reg:x3; val_offset:69201*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69201*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87ffffc; valaddr_reg:x3; val_offset:69204*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69204*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87ffffe; valaddr_reg:x3; val_offset:69207*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69207*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x672161 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee72161; op2val:0x0; +op3val:0x87fffff; valaddr_reg:x3; val_offset:69210*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69210*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33800000; valaddr_reg:x3; val_offset:69213*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69213*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33800001; valaddr_reg:x3; val_offset:69216*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69216*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33800003; valaddr_reg:x3; val_offset:69219*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69219*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33800007; valaddr_reg:x3; val_offset:69222*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69222*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3380000f; valaddr_reg:x3; val_offset:69225*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69225*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3380001f; valaddr_reg:x3; val_offset:69228*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69228*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3380003f; valaddr_reg:x3; val_offset:69231*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69231*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3380007f; valaddr_reg:x3; val_offset:69234*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69234*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x338000ff; valaddr_reg:x3; val_offset:69237*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69237*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x338001ff; valaddr_reg:x3; val_offset:69240*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69240*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x338003ff; valaddr_reg:x3; val_offset:69243*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69243*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x338007ff; valaddr_reg:x3; val_offset:69246*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69246*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33800fff; valaddr_reg:x3; val_offset:69249*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69249*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33801fff; valaddr_reg:x3; val_offset:69252*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69252*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33803fff; valaddr_reg:x3; val_offset:69255*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69255*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33807fff; valaddr_reg:x3; val_offset:69258*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69258*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3380ffff; valaddr_reg:x3; val_offset:69261*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69261*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3381ffff; valaddr_reg:x3; val_offset:69264*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69264*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3383ffff; valaddr_reg:x3; val_offset:69267*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69267*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3387ffff; valaddr_reg:x3; val_offset:69270*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69270*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x338fffff; valaddr_reg:x3; val_offset:69273*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69273*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x339fffff; valaddr_reg:x3; val_offset:69276*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69276*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33bfffff; valaddr_reg:x3; val_offset:69279*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69279*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33c00000; valaddr_reg:x3; val_offset:69282*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69282*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33e00000; valaddr_reg:x3; val_offset:69285*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69285*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33f00000; valaddr_reg:x3; val_offset:69288*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69288*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33f80000; valaddr_reg:x3; val_offset:69291*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69291*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fc0000; valaddr_reg:x3; val_offset:69294*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69294*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fe0000; valaddr_reg:x3; val_offset:69297*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69297*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ff0000; valaddr_reg:x3; val_offset:69300*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69300*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ff8000; valaddr_reg:x3; val_offset:69303*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69303*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ffc000; valaddr_reg:x3; val_offset:69306*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69306*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ffe000; valaddr_reg:x3; val_offset:69309*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69309*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fff000; valaddr_reg:x3; val_offset:69312*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69312*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fff800; valaddr_reg:x3; val_offset:69315*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69315*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fffc00; valaddr_reg:x3; val_offset:69318*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69318*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fffe00; valaddr_reg:x3; val_offset:69321*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69321*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ffff00; valaddr_reg:x3; val_offset:69324*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69324*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ffff80; valaddr_reg:x3; val_offset:69327*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69327*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ffffc0; valaddr_reg:x3; val_offset:69330*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69330*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ffffe0; valaddr_reg:x3; val_offset:69333*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69333*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fffff0; valaddr_reg:x3; val_offset:69336*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69336*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fffff8; valaddr_reg:x3; val_offset:69339*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69339*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fffffc; valaddr_reg:x3; val_offset:69342*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69342*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33fffffe; valaddr_reg:x3; val_offset:69345*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69345*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x67 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x33ffffff; valaddr_reg:x3; val_offset:69348*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69348*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3f800001; valaddr_reg:x3; val_offset:69351*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69351*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3f800003; valaddr_reg:x3; val_offset:69354*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69354*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3f800007; valaddr_reg:x3; val_offset:69357*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69357*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3f999999; valaddr_reg:x3; val_offset:69360*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69360*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:69363*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69363*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:69366*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69366*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:69369*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69369*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:69372*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69372*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:69375*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69375*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:69378*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69378*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:69381*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69381*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:69384*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69384*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:69387*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69387*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:69390*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69390*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:69393*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69393*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x673bc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x46dad4 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee73bc3; op2val:0x46dad4; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:69396*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69396*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:69399*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69399*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:69402*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69402*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:69405*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69405*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:69408*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69408*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:69411*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69411*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:69414*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69414*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:69417*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69417*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:69420*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69420*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:69423*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69423*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:69426*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69426*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:69429*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69429*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:69432*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69432*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:69435*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69435*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:69438*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69438*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:69441*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69441*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:69444*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69444*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c800000; valaddr_reg:x3; val_offset:69447*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69447*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c800001; valaddr_reg:x3; val_offset:69450*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69450*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c800003; valaddr_reg:x3; val_offset:69453*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69453*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c800007; valaddr_reg:x3; val_offset:69456*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69456*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c80000f; valaddr_reg:x3; val_offset:69459*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69459*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c80001f; valaddr_reg:x3; val_offset:69462*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69462*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c80003f; valaddr_reg:x3; val_offset:69465*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69465*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c80007f; valaddr_reg:x3; val_offset:69468*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69468*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c8000ff; valaddr_reg:x3; val_offset:69471*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69471*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c8001ff; valaddr_reg:x3; val_offset:69474*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69474*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c8003ff; valaddr_reg:x3; val_offset:69477*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69477*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c8007ff; valaddr_reg:x3; val_offset:69480*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69480*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c800fff; valaddr_reg:x3; val_offset:69483*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69483*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c801fff; valaddr_reg:x3; val_offset:69486*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69486*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c803fff; valaddr_reg:x3; val_offset:69489*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69489*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c807fff; valaddr_reg:x3; val_offset:69492*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69492*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c80ffff; valaddr_reg:x3; val_offset:69495*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69495*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c81ffff; valaddr_reg:x3; val_offset:69498*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69498*0 + 3*180*FLEN/8, x4, x1, x2) + +inst_23167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c83ffff; valaddr_reg:x3; val_offset:69501*0 + 3*180*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69501*0 + 3*180*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134250495,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134283263,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134348799,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134479871,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134742015,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(135266303,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(136314879,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(138412031,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(138412032,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(140509184,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(141557760,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142082048,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142344192,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142475264,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142540800,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142573568,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142589952,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142598144,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142602240,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142604288,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142605312,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142605824,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606080,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606208,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606272,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606304,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606320,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606328,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606332,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606334,32,FLEN) +NAN_BOXED(2129076577,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606335,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026624,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026625,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026627,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026631,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026639,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026655,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026687,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026751,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864026879,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864027135,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864027647,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864028671,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864030719,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864034815,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864043007,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864059391,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864092159,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864157695,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864288767,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(864550911,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(865075199,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(866123775,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(868220927,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(868220928,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(870318080,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(871366656,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(871890944,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872153088,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872284160,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872349696,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872382464,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872398848,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872407040,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872411136,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872413184,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872414208,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872414720,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872414976,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872415104,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872415168,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872415200,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872415216,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872415224,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872415228,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872415230,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(872415231,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2129083331,32,FLEN) +NAN_BOXED(4643540,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198848,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198849,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198851,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198855,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198863,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198879,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198911,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198975,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199103,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199359,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199871,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357200895,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357202943,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357207039,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357215231,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357231615,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357264383,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357329919,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357460991,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-182.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-182.S new file mode 100644 index 000000000..c35f32efb --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-182.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_23168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c87ffff; valaddr_reg:x3; val_offset:69504*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69504*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c8fffff; valaddr_reg:x3; val_offset:69507*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69507*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8c9fffff; valaddr_reg:x3; val_offset:69510*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69510*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cbfffff; valaddr_reg:x3; val_offset:69513*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69513*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cc00000; valaddr_reg:x3; val_offset:69516*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69516*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8ce00000; valaddr_reg:x3; val_offset:69519*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69519*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cf00000; valaddr_reg:x3; val_offset:69522*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69522*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cf80000; valaddr_reg:x3; val_offset:69525*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69525*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfc0000; valaddr_reg:x3; val_offset:69528*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69528*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfe0000; valaddr_reg:x3; val_offset:69531*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69531*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cff0000; valaddr_reg:x3; val_offset:69534*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69534*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cff8000; valaddr_reg:x3; val_offset:69537*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69537*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cffc000; valaddr_reg:x3; val_offset:69540*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69540*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cffe000; valaddr_reg:x3; val_offset:69543*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69543*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfff000; valaddr_reg:x3; val_offset:69546*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69546*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfff800; valaddr_reg:x3; val_offset:69549*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69549*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfffc00; valaddr_reg:x3; val_offset:69552*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69552*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfffe00; valaddr_reg:x3; val_offset:69555*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69555*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cffff00; valaddr_reg:x3; val_offset:69558*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69558*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cffff80; valaddr_reg:x3; val_offset:69561*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69561*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cffffc0; valaddr_reg:x3; val_offset:69564*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69564*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cffffe0; valaddr_reg:x3; val_offset:69567*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69567*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfffff0; valaddr_reg:x3; val_offset:69570*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69570*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfffff8; valaddr_reg:x3; val_offset:69573*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69573*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfffffc; valaddr_reg:x3; val_offset:69576*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69576*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cfffffe; valaddr_reg:x3; val_offset:69579*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69579*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x679f8e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee79f8e; op2val:0x80000000; +op3val:0x8cffffff; valaddr_reg:x3; val_offset:69582*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69582*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae000000; valaddr_reg:x3; val_offset:69585*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69585*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae000001; valaddr_reg:x3; val_offset:69588*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69588*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae000003; valaddr_reg:x3; val_offset:69591*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69591*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae000007; valaddr_reg:x3; val_offset:69594*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69594*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae00000f; valaddr_reg:x3; val_offset:69597*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69597*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae00001f; valaddr_reg:x3; val_offset:69600*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69600*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae00003f; valaddr_reg:x3; val_offset:69603*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69603*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae00007f; valaddr_reg:x3; val_offset:69606*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69606*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae0000ff; valaddr_reg:x3; val_offset:69609*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69609*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae0001ff; valaddr_reg:x3; val_offset:69612*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69612*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae0003ff; valaddr_reg:x3; val_offset:69615*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69615*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae0007ff; valaddr_reg:x3; val_offset:69618*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69618*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae000fff; valaddr_reg:x3; val_offset:69621*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69621*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae001fff; valaddr_reg:x3; val_offset:69624*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69624*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae003fff; valaddr_reg:x3; val_offset:69627*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69627*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae007fff; valaddr_reg:x3; val_offset:69630*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69630*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae00ffff; valaddr_reg:x3; val_offset:69633*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69633*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae01ffff; valaddr_reg:x3; val_offset:69636*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69636*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae03ffff; valaddr_reg:x3; val_offset:69639*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69639*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae07ffff; valaddr_reg:x3; val_offset:69642*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69642*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae0fffff; valaddr_reg:x3; val_offset:69645*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69645*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae1fffff; valaddr_reg:x3; val_offset:69648*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69648*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae3fffff; valaddr_reg:x3; val_offset:69651*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69651*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae400000; valaddr_reg:x3; val_offset:69654*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69654*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae600000; valaddr_reg:x3; val_offset:69657*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69657*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae700000; valaddr_reg:x3; val_offset:69660*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69660*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae780000; valaddr_reg:x3; val_offset:69663*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69663*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7c0000; valaddr_reg:x3; val_offset:69666*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69666*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7e0000; valaddr_reg:x3; val_offset:69669*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69669*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7f0000; valaddr_reg:x3; val_offset:69672*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69672*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7f8000; valaddr_reg:x3; val_offset:69675*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69675*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7fc000; valaddr_reg:x3; val_offset:69678*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69678*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7fe000; valaddr_reg:x3; val_offset:69681*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69681*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7ff000; valaddr_reg:x3; val_offset:69684*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69684*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7ff800; valaddr_reg:x3; val_offset:69687*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69687*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7ffc00; valaddr_reg:x3; val_offset:69690*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69690*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7ffe00; valaddr_reg:x3; val_offset:69693*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69693*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7fff00; valaddr_reg:x3; val_offset:69696*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69696*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7fff80; valaddr_reg:x3; val_offset:69699*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69699*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7fffc0; valaddr_reg:x3; val_offset:69702*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69702*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7fffe0; valaddr_reg:x3; val_offset:69705*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69705*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7ffff0; valaddr_reg:x3; val_offset:69708*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69708*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7ffff8; valaddr_reg:x3; val_offset:69711*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69711*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7ffffc; valaddr_reg:x3; val_offset:69714*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69714*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7ffffe; valaddr_reg:x3; val_offset:69717*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69717*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x5c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xae7fffff; valaddr_reg:x3; val_offset:69720*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69720*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbf800001; valaddr_reg:x3; val_offset:69723*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69723*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbf800003; valaddr_reg:x3; val_offset:69726*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69726*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbf800007; valaddr_reg:x3; val_offset:69729*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69729*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbf999999; valaddr_reg:x3; val_offset:69732*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69732*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:69735*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69735*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:69738*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69738*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:69741*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69741*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:69744*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69744*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:69747*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69747*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:69750*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69750*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:69753*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69753*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:69756*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69756*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:69759*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69759*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:69762*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69762*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:69765*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69765*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x67ed64 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46a490 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee7ed64; op2val:0x8046a490; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:69768*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69768*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38000000; valaddr_reg:x3; val_offset:69771*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69771*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38000001; valaddr_reg:x3; val_offset:69774*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69774*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38000003; valaddr_reg:x3; val_offset:69777*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69777*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38000007; valaddr_reg:x3; val_offset:69780*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69780*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3800000f; valaddr_reg:x3; val_offset:69783*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69783*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3800001f; valaddr_reg:x3; val_offset:69786*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69786*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3800003f; valaddr_reg:x3; val_offset:69789*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69789*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3800007f; valaddr_reg:x3; val_offset:69792*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69792*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x380000ff; valaddr_reg:x3; val_offset:69795*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69795*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x380001ff; valaddr_reg:x3; val_offset:69798*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69798*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x380003ff; valaddr_reg:x3; val_offset:69801*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69801*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x380007ff; valaddr_reg:x3; val_offset:69804*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69804*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38000fff; valaddr_reg:x3; val_offset:69807*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69807*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38001fff; valaddr_reg:x3; val_offset:69810*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69810*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38003fff; valaddr_reg:x3; val_offset:69813*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69813*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38007fff; valaddr_reg:x3; val_offset:69816*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69816*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3800ffff; valaddr_reg:x3; val_offset:69819*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69819*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3801ffff; valaddr_reg:x3; val_offset:69822*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69822*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3803ffff; valaddr_reg:x3; val_offset:69825*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69825*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3807ffff; valaddr_reg:x3; val_offset:69828*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69828*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x380fffff; valaddr_reg:x3; val_offset:69831*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69831*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x381fffff; valaddr_reg:x3; val_offset:69834*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69834*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x383fffff; valaddr_reg:x3; val_offset:69837*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69837*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38400000; valaddr_reg:x3; val_offset:69840*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69840*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38600000; valaddr_reg:x3; val_offset:69843*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69843*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38700000; valaddr_reg:x3; val_offset:69846*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69846*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x38780000; valaddr_reg:x3; val_offset:69849*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69849*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387c0000; valaddr_reg:x3; val_offset:69852*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69852*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387e0000; valaddr_reg:x3; val_offset:69855*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69855*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387f0000; valaddr_reg:x3; val_offset:69858*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69858*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387f8000; valaddr_reg:x3; val_offset:69861*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69861*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387fc000; valaddr_reg:x3; val_offset:69864*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69864*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387fe000; valaddr_reg:x3; val_offset:69867*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69867*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387ff000; valaddr_reg:x3; val_offset:69870*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69870*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387ff800; valaddr_reg:x3; val_offset:69873*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69873*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387ffc00; valaddr_reg:x3; val_offset:69876*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69876*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387ffe00; valaddr_reg:x3; val_offset:69879*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69879*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387fff00; valaddr_reg:x3; val_offset:69882*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69882*0 + 3*181*FLEN/8, x4, x1, x2) + +inst_23295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387fff80; valaddr_reg:x3; val_offset:69885*0 + 3*181*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69885*0 + 3*181*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357723135,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2358247423,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2359295999,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2361393151,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2361393152,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2363490304,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2364538880,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365063168,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365325312,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365456384,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365521920,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365554688,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365571072,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365579264,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365583360,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365585408,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365586432,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365586944,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587200,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587328,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587392,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587424,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587440,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587448,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587452,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587454,32,FLEN) +NAN_BOXED(2129108878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587455,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235584,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235585,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235587,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235591,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235599,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235615,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235647,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235711,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919235839,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919236095,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919236607,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919237631,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919239679,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919243775,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919251967,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919268351,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919301119,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919366655,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919497727,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2919759871,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2920284159,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2921332735,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2923429887,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2923429888,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2925527040,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2926575616,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927099904,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927362048,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927493120,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927558656,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927591424,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927607808,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927616000,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927620096,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927622144,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927623168,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927623680,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927623936,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927624064,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927624128,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927624160,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927624176,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927624184,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927624188,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927624190,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(2927624191,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2129128804,32,FLEN) +NAN_BOXED(2152113296,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524096,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524097,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524099,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524103,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524111,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524127,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524159,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524223,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524351,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939524607,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939525119,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939526143,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939528191,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939532287,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939540479,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939556863,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939589631,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939655167,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(939786239,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(940048383,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(940572671,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(941621247,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(943718399,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(943718400,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(945815552,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(946864128,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947388416,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947650560,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947781632,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947847168,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947879936,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947896320,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947904512,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947908608,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947910656,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947911680,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912192,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912448,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912576,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-183.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-183.S new file mode 100644 index 000000000..98379d06b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-183.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_23296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387fffc0; valaddr_reg:x3; val_offset:69888*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69888*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387fffe0; valaddr_reg:x3; val_offset:69891*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69891*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387ffff0; valaddr_reg:x3; val_offset:69894*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69894*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387ffff8; valaddr_reg:x3; val_offset:69897*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69897*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387ffffc; valaddr_reg:x3; val_offset:69900*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69900*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387ffffe; valaddr_reg:x3; val_offset:69903*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69903*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x70 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x387fffff; valaddr_reg:x3; val_offset:69906*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69906*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3f800001; valaddr_reg:x3; val_offset:69909*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69909*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3f800003; valaddr_reg:x3; val_offset:69912*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69912*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3f800007; valaddr_reg:x3; val_offset:69915*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69915*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3f999999; valaddr_reg:x3; val_offset:69918*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69918*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:69921*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69921*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:69924*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69924*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:69927*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69927*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:69930*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69930*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:69933*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69933*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:69936*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69936*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:69939*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69939*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:69942*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69942*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:69945*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69945*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:69948*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69948*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:69951*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69951*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x68837a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x4676f6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee8837a; op2val:0x4676f6; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:69954*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69954*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:69957*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69957*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:69960*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69960*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:69963*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69963*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:69966*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69966*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:69969*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69969*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:69972*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69972*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:69975*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69975*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:69978*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69978*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:69981*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69981*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:69984*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69984*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:69987*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69987*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:69990*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69990*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:69993*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69993*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:69996*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69996*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:69999*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 69999*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:70002*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70002*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87800000; valaddr_reg:x3; val_offset:70005*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70005*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87800001; valaddr_reg:x3; val_offset:70008*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70008*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87800003; valaddr_reg:x3; val_offset:70011*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70011*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87800007; valaddr_reg:x3; val_offset:70014*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70014*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8780000f; valaddr_reg:x3; val_offset:70017*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70017*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8780001f; valaddr_reg:x3; val_offset:70020*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70020*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8780003f; valaddr_reg:x3; val_offset:70023*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70023*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8780007f; valaddr_reg:x3; val_offset:70026*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70026*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x878000ff; valaddr_reg:x3; val_offset:70029*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70029*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x878001ff; valaddr_reg:x3; val_offset:70032*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70032*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x878003ff; valaddr_reg:x3; val_offset:70035*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70035*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x878007ff; valaddr_reg:x3; val_offset:70038*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70038*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87800fff; valaddr_reg:x3; val_offset:70041*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70041*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87801fff; valaddr_reg:x3; val_offset:70044*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70044*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87803fff; valaddr_reg:x3; val_offset:70047*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70047*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87807fff; valaddr_reg:x3; val_offset:70050*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70050*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8780ffff; valaddr_reg:x3; val_offset:70053*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70053*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8781ffff; valaddr_reg:x3; val_offset:70056*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70056*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8783ffff; valaddr_reg:x3; val_offset:70059*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70059*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x8787ffff; valaddr_reg:x3; val_offset:70062*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70062*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x878fffff; valaddr_reg:x3; val_offset:70065*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70065*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x879fffff; valaddr_reg:x3; val_offset:70068*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70068*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87bfffff; valaddr_reg:x3; val_offset:70071*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70071*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87c00000; valaddr_reg:x3; val_offset:70074*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70074*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87e00000; valaddr_reg:x3; val_offset:70077*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70077*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87f00000; valaddr_reg:x3; val_offset:70080*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70080*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87f80000; valaddr_reg:x3; val_offset:70083*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70083*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fc0000; valaddr_reg:x3; val_offset:70086*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70086*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fe0000; valaddr_reg:x3; val_offset:70089*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70089*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ff0000; valaddr_reg:x3; val_offset:70092*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70092*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ff8000; valaddr_reg:x3; val_offset:70095*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70095*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ffc000; valaddr_reg:x3; val_offset:70098*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70098*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ffe000; valaddr_reg:x3; val_offset:70101*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70101*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fff000; valaddr_reg:x3; val_offset:70104*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70104*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fff800; valaddr_reg:x3; val_offset:70107*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70107*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fffc00; valaddr_reg:x3; val_offset:70110*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70110*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fffe00; valaddr_reg:x3; val_offset:70113*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70113*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ffff00; valaddr_reg:x3; val_offset:70116*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70116*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ffff80; valaddr_reg:x3; val_offset:70119*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70119*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ffffc0; valaddr_reg:x3; val_offset:70122*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70122*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ffffe0; valaddr_reg:x3; val_offset:70125*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70125*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fffff0; valaddr_reg:x3; val_offset:70128*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70128*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fffff8; valaddr_reg:x3; val_offset:70131*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70131*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fffffc; valaddr_reg:x3; val_offset:70134*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70134*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87fffffe; valaddr_reg:x3; val_offset:70137*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70137*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6940c9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee940c9; op2val:0x80000000; +op3val:0x87ffffff; valaddr_reg:x3; val_offset:70140*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70140*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbf800001; valaddr_reg:x3; val_offset:70143*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70143*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbf800003; valaddr_reg:x3; val_offset:70146*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70146*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbf800007; valaddr_reg:x3; val_offset:70149*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70149*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbf999999; valaddr_reg:x3; val_offset:70152*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70152*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:70155*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70155*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:70158*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70158*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:70161*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70161*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:70164*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70164*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:70167*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70167*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:70170*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70170*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:70173*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70173*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:70176*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70176*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:70179*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70179*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:70182*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70182*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:70185*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70185*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:70188*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70188*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8000000; valaddr_reg:x3; val_offset:70191*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70191*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8000001; valaddr_reg:x3; val_offset:70194*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70194*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8000003; valaddr_reg:x3; val_offset:70197*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70197*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8000007; valaddr_reg:x3; val_offset:70200*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70200*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc800000f; valaddr_reg:x3; val_offset:70203*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70203*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc800001f; valaddr_reg:x3; val_offset:70206*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70206*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc800003f; valaddr_reg:x3; val_offset:70209*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70209*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc800007f; valaddr_reg:x3; val_offset:70212*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70212*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc80000ff; valaddr_reg:x3; val_offset:70215*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70215*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc80001ff; valaddr_reg:x3; val_offset:70218*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70218*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc80003ff; valaddr_reg:x3; val_offset:70221*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70221*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc80007ff; valaddr_reg:x3; val_offset:70224*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70224*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8000fff; valaddr_reg:x3; val_offset:70227*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70227*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8001fff; valaddr_reg:x3; val_offset:70230*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70230*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8003fff; valaddr_reg:x3; val_offset:70233*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70233*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8007fff; valaddr_reg:x3; val_offset:70236*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70236*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc800ffff; valaddr_reg:x3; val_offset:70239*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70239*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc801ffff; valaddr_reg:x3; val_offset:70242*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70242*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc803ffff; valaddr_reg:x3; val_offset:70245*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70245*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc807ffff; valaddr_reg:x3; val_offset:70248*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70248*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc80fffff; valaddr_reg:x3; val_offset:70251*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70251*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc81fffff; valaddr_reg:x3; val_offset:70254*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70254*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc83fffff; valaddr_reg:x3; val_offset:70257*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70257*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8400000; valaddr_reg:x3; val_offset:70260*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70260*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8600000; valaddr_reg:x3; val_offset:70263*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70263*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8700000; valaddr_reg:x3; val_offset:70266*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70266*0 + 3*182*FLEN/8, x4, x1, x2) + +inst_23423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc8780000; valaddr_reg:x3; val_offset:70269*0 + 3*182*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70269*0 + 3*182*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912640,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912672,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912688,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912696,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912700,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912702,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(947912703,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2129167226,32,FLEN) +NAN_BOXED(4617974,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312768,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312769,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312771,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312775,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312783,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312799,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312831,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312895,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313023,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313279,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313791,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273314815,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273316863,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273320959,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273329151,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273345535,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273378303,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273443839,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273574911,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273837055,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2274361343,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2275409919,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2277507071,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2277507072,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2279604224,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2280652800,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281177088,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281439232,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281570304,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281635840,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281668608,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281684992,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281693184,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281697280,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281699328,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281700352,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281700864,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701120,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701248,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701312,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701344,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701360,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701368,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701372,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701374,32,FLEN) +NAN_BOXED(2129215689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701375,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443200,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443201,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443203,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443207,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443215,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443231,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443263,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443327,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443455,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355443711,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355444223,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355445247,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355447295,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355451391,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355459583,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355475967,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355508735,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355574271,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355705343,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3355967487,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3356491775,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3357540351,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3359637503,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3359637504,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3361734656,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3362783232,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363307520,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-184.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-184.S new file mode 100644 index 000000000..3a1869bf2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-184.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_23424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87c0000; valaddr_reg:x3; val_offset:70272*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70272*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87e0000; valaddr_reg:x3; val_offset:70275*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70275*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87f0000; valaddr_reg:x3; val_offset:70278*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70278*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87f8000; valaddr_reg:x3; val_offset:70281*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70281*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87fc000; valaddr_reg:x3; val_offset:70284*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70284*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87fe000; valaddr_reg:x3; val_offset:70287*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70287*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87ff000; valaddr_reg:x3; val_offset:70290*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70290*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87ff800; valaddr_reg:x3; val_offset:70293*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70293*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87ffc00; valaddr_reg:x3; val_offset:70296*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70296*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87ffe00; valaddr_reg:x3; val_offset:70299*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70299*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87fff00; valaddr_reg:x3; val_offset:70302*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70302*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87fff80; valaddr_reg:x3; val_offset:70305*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70305*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87fffc0; valaddr_reg:x3; val_offset:70308*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70308*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87fffe0; valaddr_reg:x3; val_offset:70311*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70311*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87ffff0; valaddr_reg:x3; val_offset:70314*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70314*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87ffff8; valaddr_reg:x3; val_offset:70317*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70317*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87ffffc; valaddr_reg:x3; val_offset:70320*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70320*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87ffffe; valaddr_reg:x3; val_offset:70323*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70323*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x695129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4638d7 and fs3 == 1 and fe3 == 0x90 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee95129; op2val:0x804638d7; +op3val:0xc87fffff; valaddr_reg:x3; val_offset:70326*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70326*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba000000; valaddr_reg:x3; val_offset:70329*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70329*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba000001; valaddr_reg:x3; val_offset:70332*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70332*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba000003; valaddr_reg:x3; val_offset:70335*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70335*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba000007; valaddr_reg:x3; val_offset:70338*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70338*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba00000f; valaddr_reg:x3; val_offset:70341*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70341*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba00001f; valaddr_reg:x3; val_offset:70344*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70344*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba00003f; valaddr_reg:x3; val_offset:70347*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70347*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba00007f; valaddr_reg:x3; val_offset:70350*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70350*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba0000ff; valaddr_reg:x3; val_offset:70353*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70353*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba0001ff; valaddr_reg:x3; val_offset:70356*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70356*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba0003ff; valaddr_reg:x3; val_offset:70359*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70359*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba0007ff; valaddr_reg:x3; val_offset:70362*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70362*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba000fff; valaddr_reg:x3; val_offset:70365*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70365*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba001fff; valaddr_reg:x3; val_offset:70368*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70368*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba003fff; valaddr_reg:x3; val_offset:70371*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70371*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba007fff; valaddr_reg:x3; val_offset:70374*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70374*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba00ffff; valaddr_reg:x3; val_offset:70377*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70377*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba01ffff; valaddr_reg:x3; val_offset:70380*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70380*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba03ffff; valaddr_reg:x3; val_offset:70383*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70383*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba07ffff; valaddr_reg:x3; val_offset:70386*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70386*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba0fffff; valaddr_reg:x3; val_offset:70389*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70389*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba1fffff; valaddr_reg:x3; val_offset:70392*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70392*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba3fffff; valaddr_reg:x3; val_offset:70395*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70395*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba400000; valaddr_reg:x3; val_offset:70398*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70398*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba600000; valaddr_reg:x3; val_offset:70401*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70401*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba700000; valaddr_reg:x3; val_offset:70404*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70404*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba780000; valaddr_reg:x3; val_offset:70407*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70407*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7c0000; valaddr_reg:x3; val_offset:70410*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70410*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7e0000; valaddr_reg:x3; val_offset:70413*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70413*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7f0000; valaddr_reg:x3; val_offset:70416*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70416*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7f8000; valaddr_reg:x3; val_offset:70419*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70419*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7fc000; valaddr_reg:x3; val_offset:70422*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70422*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7fe000; valaddr_reg:x3; val_offset:70425*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70425*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7ff000; valaddr_reg:x3; val_offset:70428*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70428*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7ff800; valaddr_reg:x3; val_offset:70431*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70431*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7ffc00; valaddr_reg:x3; val_offset:70434*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70434*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7ffe00; valaddr_reg:x3; val_offset:70437*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70437*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7fff00; valaddr_reg:x3; val_offset:70440*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70440*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7fff80; valaddr_reg:x3; val_offset:70443*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70443*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7fffc0; valaddr_reg:x3; val_offset:70446*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70446*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7fffe0; valaddr_reg:x3; val_offset:70449*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70449*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7ffff0; valaddr_reg:x3; val_offset:70452*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70452*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7ffff8; valaddr_reg:x3; val_offset:70455*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70455*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7ffffc; valaddr_reg:x3; val_offset:70458*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70458*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7ffffe; valaddr_reg:x3; val_offset:70461*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70461*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x74 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xba7fffff; valaddr_reg:x3; val_offset:70464*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70464*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbf800001; valaddr_reg:x3; val_offset:70467*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70467*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbf800003; valaddr_reg:x3; val_offset:70470*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70470*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbf800007; valaddr_reg:x3; val_offset:70473*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70473*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbf999999; valaddr_reg:x3; val_offset:70476*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70476*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:70479*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70479*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:70482*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70482*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:70485*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70485*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:70488*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70488*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:70491*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70491*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:70494*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70494*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:70497*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70497*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:70500*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70500*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:70503*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70503*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:70506*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70506*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:70509*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70509*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x699c2f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x46224a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ee99c2f; op2val:0x8046224a; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:70512*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70512*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:70515*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70515*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:70518*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70518*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:70521*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70521*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:70524*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70524*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:70527*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70527*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:70530*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70530*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:70533*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70533*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:70536*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70536*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:70539*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70539*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:70542*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70542*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:70545*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70545*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:70548*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70548*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:70551*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70551*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:70554*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70554*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:70557*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70557*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:70560*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70560*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3800000; valaddr_reg:x3; val_offset:70563*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70563*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3800001; valaddr_reg:x3; val_offset:70566*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70566*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3800003; valaddr_reg:x3; val_offset:70569*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70569*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3800007; valaddr_reg:x3; val_offset:70572*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70572*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x380000f; valaddr_reg:x3; val_offset:70575*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70575*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x380001f; valaddr_reg:x3; val_offset:70578*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70578*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x380003f; valaddr_reg:x3; val_offset:70581*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70581*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x380007f; valaddr_reg:x3; val_offset:70584*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70584*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x38000ff; valaddr_reg:x3; val_offset:70587*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70587*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x38001ff; valaddr_reg:x3; val_offset:70590*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70590*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x38003ff; valaddr_reg:x3; val_offset:70593*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70593*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x38007ff; valaddr_reg:x3; val_offset:70596*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70596*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3800fff; valaddr_reg:x3; val_offset:70599*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70599*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3801fff; valaddr_reg:x3; val_offset:70602*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70602*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3803fff; valaddr_reg:x3; val_offset:70605*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70605*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3807fff; valaddr_reg:x3; val_offset:70608*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70608*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x380ffff; valaddr_reg:x3; val_offset:70611*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70611*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x381ffff; valaddr_reg:x3; val_offset:70614*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70614*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x383ffff; valaddr_reg:x3; val_offset:70617*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70617*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x387ffff; valaddr_reg:x3; val_offset:70620*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70620*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x38fffff; valaddr_reg:x3; val_offset:70623*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70623*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x39fffff; valaddr_reg:x3; val_offset:70626*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70626*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3bfffff; valaddr_reg:x3; val_offset:70629*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70629*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3c00000; valaddr_reg:x3; val_offset:70632*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70632*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3e00000; valaddr_reg:x3; val_offset:70635*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70635*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3f00000; valaddr_reg:x3; val_offset:70638*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70638*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3f80000; valaddr_reg:x3; val_offset:70641*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70641*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fc0000; valaddr_reg:x3; val_offset:70644*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70644*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fe0000; valaddr_reg:x3; val_offset:70647*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70647*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ff0000; valaddr_reg:x3; val_offset:70650*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70650*0 + 3*183*FLEN/8, x4, x1, x2) + +inst_23551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ff8000; valaddr_reg:x3; val_offset:70653*0 + 3*183*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70653*0 + 3*183*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363569664,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363700736,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363766272,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363799040,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363815424,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363823616,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363827712,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363829760,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363830784,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831296,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831552,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831680,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831744,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831776,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831792,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831800,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831804,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831806,32,FLEN) +NAN_BOXED(2129219881,32,FLEN) +NAN_BOXED(2152085719,32,FLEN) +NAN_BOXED(3363831807,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562176,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562177,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562179,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562183,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562191,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562207,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562239,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562303,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562431,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120562687,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120563199,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120564223,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120566271,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120570367,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120578559,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120594943,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120627711,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120693247,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3120824319,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3121086463,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3121610751,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3122659327,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3124756479,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3124756480,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3126853632,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3127902208,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128426496,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128688640,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128819712,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128885248,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128918016,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128934400,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128942592,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128946688,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128948736,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128949760,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950272,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950528,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950656,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950720,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950752,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950768,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950776,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950780,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950782,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3128950783,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2129239087,32,FLEN) +NAN_BOXED(2152079946,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720256,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720257,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720259,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720263,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720271,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720287,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720319,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720383,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720511,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720767,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58721279,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58722303,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58724351,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58728447,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58736639,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58753023,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58785791,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58851327,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58982399,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(59244543,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(59768831,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(60817407,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(62914559,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(62914560,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65011712,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66060288,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66584576,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66846720,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66977792,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67043328,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67076096,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-185.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-185.S new file mode 100644 index 000000000..f5785482b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-185.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_23552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ffc000; valaddr_reg:x3; val_offset:70656*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70656*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ffe000; valaddr_reg:x3; val_offset:70659*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70659*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fff000; valaddr_reg:x3; val_offset:70662*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70662*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fff800; valaddr_reg:x3; val_offset:70665*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70665*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fffc00; valaddr_reg:x3; val_offset:70668*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70668*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fffe00; valaddr_reg:x3; val_offset:70671*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70671*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ffff00; valaddr_reg:x3; val_offset:70674*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70674*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ffff80; valaddr_reg:x3; val_offset:70677*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70677*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ffffc0; valaddr_reg:x3; val_offset:70680*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70680*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ffffe0; valaddr_reg:x3; val_offset:70683*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70683*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fffff0; valaddr_reg:x3; val_offset:70686*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70686*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fffff8; valaddr_reg:x3; val_offset:70689*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70689*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fffffc; valaddr_reg:x3; val_offset:70692*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70692*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3fffffe; valaddr_reg:x3; val_offset:70695*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70695*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a26e3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea26e3; op2val:0x0; +op3val:0x3ffffff; valaddr_reg:x3; val_offset:70698*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70698*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:70701*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70701*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:70704*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70704*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:70707*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70707*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:70710*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70710*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:70713*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70713*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:70716*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70716*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:70719*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70719*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:70722*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70722*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:70725*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70725*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:70728*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70728*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:70731*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70731*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:70734*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70734*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:70737*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70737*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:70740*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70740*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:70743*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70743*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:70746*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70746*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc000000; valaddr_reg:x3; val_offset:70749*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70749*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc000001; valaddr_reg:x3; val_offset:70752*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70752*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc000003; valaddr_reg:x3; val_offset:70755*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70755*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc000007; valaddr_reg:x3; val_offset:70758*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70758*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc00000f; valaddr_reg:x3; val_offset:70761*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70761*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc00001f; valaddr_reg:x3; val_offset:70764*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70764*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc00003f; valaddr_reg:x3; val_offset:70767*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70767*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc00007f; valaddr_reg:x3; val_offset:70770*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70770*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc0000ff; valaddr_reg:x3; val_offset:70773*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70773*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc0001ff; valaddr_reg:x3; val_offset:70776*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70776*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc0003ff; valaddr_reg:x3; val_offset:70779*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70779*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc0007ff; valaddr_reg:x3; val_offset:70782*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70782*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc000fff; valaddr_reg:x3; val_offset:70785*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70785*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc001fff; valaddr_reg:x3; val_offset:70788*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70788*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc003fff; valaddr_reg:x3; val_offset:70791*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70791*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc007fff; valaddr_reg:x3; val_offset:70794*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70794*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc00ffff; valaddr_reg:x3; val_offset:70797*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70797*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc01ffff; valaddr_reg:x3; val_offset:70800*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70800*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc03ffff; valaddr_reg:x3; val_offset:70803*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70803*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc07ffff; valaddr_reg:x3; val_offset:70806*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70806*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc0fffff; valaddr_reg:x3; val_offset:70809*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70809*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc1fffff; valaddr_reg:x3; val_offset:70812*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70812*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc3fffff; valaddr_reg:x3; val_offset:70815*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70815*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc400000; valaddr_reg:x3; val_offset:70818*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70818*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc600000; valaddr_reg:x3; val_offset:70821*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70821*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc700000; valaddr_reg:x3; val_offset:70824*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70824*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc780000; valaddr_reg:x3; val_offset:70827*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70827*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7c0000; valaddr_reg:x3; val_offset:70830*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70830*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7e0000; valaddr_reg:x3; val_offset:70833*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70833*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7f0000; valaddr_reg:x3; val_offset:70836*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70836*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7f8000; valaddr_reg:x3; val_offset:70839*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70839*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7fc000; valaddr_reg:x3; val_offset:70842*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70842*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7fe000; valaddr_reg:x3; val_offset:70845*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70845*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7ff000; valaddr_reg:x3; val_offset:70848*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70848*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7ff800; valaddr_reg:x3; val_offset:70851*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70851*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7ffc00; valaddr_reg:x3; val_offset:70854*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70854*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7ffe00; valaddr_reg:x3; val_offset:70857*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70857*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7fff00; valaddr_reg:x3; val_offset:70860*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70860*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7fff80; valaddr_reg:x3; val_offset:70863*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70863*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7fffc0; valaddr_reg:x3; val_offset:70866*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70866*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7fffe0; valaddr_reg:x3; val_offset:70869*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70869*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7ffff0; valaddr_reg:x3; val_offset:70872*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70872*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7ffff8; valaddr_reg:x3; val_offset:70875*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70875*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7ffffc; valaddr_reg:x3; val_offset:70878*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70878*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7ffffe; valaddr_reg:x3; val_offset:70881*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70881*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4935 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4935; op2val:0x0; +op3val:0xc7fffff; valaddr_reg:x3; val_offset:70884*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70884*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f800000; valaddr_reg:x3; val_offset:70887*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70887*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f800001; valaddr_reg:x3; val_offset:70890*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70890*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f800003; valaddr_reg:x3; val_offset:70893*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70893*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f800007; valaddr_reg:x3; val_offset:70896*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70896*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f80000f; valaddr_reg:x3; val_offset:70899*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70899*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f80001f; valaddr_reg:x3; val_offset:70902*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70902*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f80003f; valaddr_reg:x3; val_offset:70905*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70905*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f80007f; valaddr_reg:x3; val_offset:70908*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70908*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f8000ff; valaddr_reg:x3; val_offset:70911*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70911*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f8001ff; valaddr_reg:x3; val_offset:70914*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70914*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f8003ff; valaddr_reg:x3; val_offset:70917*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70917*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f8007ff; valaddr_reg:x3; val_offset:70920*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70920*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f800fff; valaddr_reg:x3; val_offset:70923*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70923*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f801fff; valaddr_reg:x3; val_offset:70926*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70926*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f803fff; valaddr_reg:x3; val_offset:70929*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70929*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f807fff; valaddr_reg:x3; val_offset:70932*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70932*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f80ffff; valaddr_reg:x3; val_offset:70935*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70935*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f81ffff; valaddr_reg:x3; val_offset:70938*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70938*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f83ffff; valaddr_reg:x3; val_offset:70941*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70941*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f87ffff; valaddr_reg:x3; val_offset:70944*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70944*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f8fffff; valaddr_reg:x3; val_offset:70947*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70947*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9f9fffff; valaddr_reg:x3; val_offset:70950*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70950*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fbfffff; valaddr_reg:x3; val_offset:70953*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70953*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fc00000; valaddr_reg:x3; val_offset:70956*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70956*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fe00000; valaddr_reg:x3; val_offset:70959*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70959*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ff00000; valaddr_reg:x3; val_offset:70962*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70962*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ff80000; valaddr_reg:x3; val_offset:70965*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70965*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffc0000; valaddr_reg:x3; val_offset:70968*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70968*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffe0000; valaddr_reg:x3; val_offset:70971*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70971*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fff0000; valaddr_reg:x3; val_offset:70974*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70974*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fff8000; valaddr_reg:x3; val_offset:70977*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70977*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fffc000; valaddr_reg:x3; val_offset:70980*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70980*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fffe000; valaddr_reg:x3; val_offset:70983*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70983*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffff000; valaddr_reg:x3; val_offset:70986*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70986*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffff800; valaddr_reg:x3; val_offset:70989*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70989*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffffc00; valaddr_reg:x3; val_offset:70992*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70992*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffffe00; valaddr_reg:x3; val_offset:70995*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70995*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fffff00; valaddr_reg:x3; val_offset:70998*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 70998*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fffff80; valaddr_reg:x3; val_offset:71001*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71001*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fffffc0; valaddr_reg:x3; val_offset:71004*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71004*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fffffe0; valaddr_reg:x3; val_offset:71007*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71007*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffffff0; valaddr_reg:x3; val_offset:71010*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71010*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffffff8; valaddr_reg:x3; val_offset:71013*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71013*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffffffc; valaddr_reg:x3; val_offset:71016*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71016*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9ffffffe; valaddr_reg:x3; val_offset:71019*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71019*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x3f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0x9fffffff; valaddr_reg:x3; val_offset:71022*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71022*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbf800001; valaddr_reg:x3; val_offset:71025*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71025*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbf800003; valaddr_reg:x3; val_offset:71028*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71028*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbf800007; valaddr_reg:x3; val_offset:71031*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71031*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbf999999; valaddr_reg:x3; val_offset:71034*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71034*0 + 3*184*FLEN/8, x4, x1, x2) + +inst_23679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:71037*0 + 3*184*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71037*0 + 3*184*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67092480,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67100672,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67104768,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67106816,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67107840,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108352,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108608,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108736,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108800,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108832,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108848,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108856,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108860,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108862,32,FLEN) +NAN_BOXED(2129274595,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108863,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326592,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326593,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326595,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326599,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326607,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326623,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326655,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326719,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326847,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201327103,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201327615,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201328639,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201330687,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201334783,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201342975,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201359359,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201392127,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201457663,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201588735,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201850879,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(202375167,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(203423743,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(205520895,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(205520896,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(207618048,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(208666624,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209190912,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209453056,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209584128,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209649664,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209682432,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209698816,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209707008,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209711104,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209713152,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714176,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714688,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714944,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715072,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715136,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715168,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715184,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715192,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715196,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715198,32,FLEN) +NAN_BOXED(2129283381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715199,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675965952,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675965953,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675965955,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675965959,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675965967,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675965983,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675966015,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675966079,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675966207,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675966463,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675966975,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675967999,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675970047,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675974143,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675982335,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2675998719,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2676031487,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2676097023,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2676228095,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2676490239,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2677014527,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2678063103,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2680160255,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2680160256,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2682257408,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2683305984,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2683830272,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684092416,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684223488,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684289024,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684321792,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684338176,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684346368,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684350464,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684352512,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684353536,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354048,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354304,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354432,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354496,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354528,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354544,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354552,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354556,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354558,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(2684354559,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-186.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-186.S new file mode 100644 index 000000000..319d67b18 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-186.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_23680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:71040*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71040*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:71043*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71043*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:71046*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71046*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:71049*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71049*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:71052*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71052*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:71055*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71055*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:71058*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71058*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:71061*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71061*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:71064*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71064*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:71067*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71067*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6a4ac5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45ee07 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eea4ac5; op2val:0x8045ee07; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:71070*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71070*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:71073*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71073*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:71076*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71076*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:71079*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71079*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:71082*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71082*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:71085*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71085*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:71088*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71088*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:71091*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71091*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:71094*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71094*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:71097*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71097*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:71100*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71100*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:71103*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71103*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:71106*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71106*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:71109*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71109*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:71112*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71112*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:71115*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71115*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:71118*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71118*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4800000; valaddr_reg:x3; val_offset:71121*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71121*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4800001; valaddr_reg:x3; val_offset:71124*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71124*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4800003; valaddr_reg:x3; val_offset:71127*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71127*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4800007; valaddr_reg:x3; val_offset:71130*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71130*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x480000f; valaddr_reg:x3; val_offset:71133*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71133*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x480001f; valaddr_reg:x3; val_offset:71136*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71136*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x480003f; valaddr_reg:x3; val_offset:71139*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71139*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x480007f; valaddr_reg:x3; val_offset:71142*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71142*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x48000ff; valaddr_reg:x3; val_offset:71145*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71145*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x48001ff; valaddr_reg:x3; val_offset:71148*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71148*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x48003ff; valaddr_reg:x3; val_offset:71151*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71151*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x48007ff; valaddr_reg:x3; val_offset:71154*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71154*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4800fff; valaddr_reg:x3; val_offset:71157*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71157*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4801fff; valaddr_reg:x3; val_offset:71160*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71160*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4803fff; valaddr_reg:x3; val_offset:71163*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71163*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4807fff; valaddr_reg:x3; val_offset:71166*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71166*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x480ffff; valaddr_reg:x3; val_offset:71169*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71169*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x481ffff; valaddr_reg:x3; val_offset:71172*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71172*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x483ffff; valaddr_reg:x3; val_offset:71175*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71175*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x487ffff; valaddr_reg:x3; val_offset:71178*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71178*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x48fffff; valaddr_reg:x3; val_offset:71181*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71181*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x49fffff; valaddr_reg:x3; val_offset:71184*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71184*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4bfffff; valaddr_reg:x3; val_offset:71187*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71187*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4c00000; valaddr_reg:x3; val_offset:71190*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71190*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4e00000; valaddr_reg:x3; val_offset:71193*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71193*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4f00000; valaddr_reg:x3; val_offset:71196*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71196*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4f80000; valaddr_reg:x3; val_offset:71199*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71199*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fc0000; valaddr_reg:x3; val_offset:71202*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71202*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fe0000; valaddr_reg:x3; val_offset:71205*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71205*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ff0000; valaddr_reg:x3; val_offset:71208*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71208*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ff8000; valaddr_reg:x3; val_offset:71211*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71211*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ffc000; valaddr_reg:x3; val_offset:71214*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71214*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ffe000; valaddr_reg:x3; val_offset:71217*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71217*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fff000; valaddr_reg:x3; val_offset:71220*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71220*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fff800; valaddr_reg:x3; val_offset:71223*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71223*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fffc00; valaddr_reg:x3; val_offset:71226*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71226*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fffe00; valaddr_reg:x3; val_offset:71229*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71229*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ffff00; valaddr_reg:x3; val_offset:71232*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71232*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ffff80; valaddr_reg:x3; val_offset:71235*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71235*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ffffc0; valaddr_reg:x3; val_offset:71238*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71238*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ffffe0; valaddr_reg:x3; val_offset:71241*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71241*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fffff0; valaddr_reg:x3; val_offset:71244*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71244*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fffff8; valaddr_reg:x3; val_offset:71247*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71247*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fffffc; valaddr_reg:x3; val_offset:71250*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71250*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4fffffe; valaddr_reg:x3; val_offset:71253*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71253*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6aeb85 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeaeb85; op2val:0x0; +op3val:0x4ffffff; valaddr_reg:x3; val_offset:71256*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71256*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9000000; valaddr_reg:x3; val_offset:71259*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71259*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9000001; valaddr_reg:x3; val_offset:71262*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71262*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9000003; valaddr_reg:x3; val_offset:71265*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71265*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9000007; valaddr_reg:x3; val_offset:71268*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71268*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb900000f; valaddr_reg:x3; val_offset:71271*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71271*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb900001f; valaddr_reg:x3; val_offset:71274*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71274*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb900003f; valaddr_reg:x3; val_offset:71277*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71277*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb900007f; valaddr_reg:x3; val_offset:71280*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71280*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb90000ff; valaddr_reg:x3; val_offset:71283*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71283*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb90001ff; valaddr_reg:x3; val_offset:71286*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71286*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb90003ff; valaddr_reg:x3; val_offset:71289*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71289*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb90007ff; valaddr_reg:x3; val_offset:71292*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71292*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9000fff; valaddr_reg:x3; val_offset:71295*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71295*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9001fff; valaddr_reg:x3; val_offset:71298*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71298*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9003fff; valaddr_reg:x3; val_offset:71301*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71301*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9007fff; valaddr_reg:x3; val_offset:71304*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71304*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb900ffff; valaddr_reg:x3; val_offset:71307*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71307*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb901ffff; valaddr_reg:x3; val_offset:71310*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71310*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb903ffff; valaddr_reg:x3; val_offset:71313*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71313*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb907ffff; valaddr_reg:x3; val_offset:71316*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71316*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb90fffff; valaddr_reg:x3; val_offset:71319*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71319*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb91fffff; valaddr_reg:x3; val_offset:71322*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71322*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb93fffff; valaddr_reg:x3; val_offset:71325*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71325*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9400000; valaddr_reg:x3; val_offset:71328*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71328*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9600000; valaddr_reg:x3; val_offset:71331*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71331*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9700000; valaddr_reg:x3; val_offset:71334*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71334*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb9780000; valaddr_reg:x3; val_offset:71337*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71337*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97c0000; valaddr_reg:x3; val_offset:71340*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71340*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97e0000; valaddr_reg:x3; val_offset:71343*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71343*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97f0000; valaddr_reg:x3; val_offset:71346*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71346*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97f8000; valaddr_reg:x3; val_offset:71349*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71349*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97fc000; valaddr_reg:x3; val_offset:71352*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71352*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97fe000; valaddr_reg:x3; val_offset:71355*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71355*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97ff000; valaddr_reg:x3; val_offset:71358*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71358*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97ff800; valaddr_reg:x3; val_offset:71361*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71361*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97ffc00; valaddr_reg:x3; val_offset:71364*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71364*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97ffe00; valaddr_reg:x3; val_offset:71367*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71367*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97fff00; valaddr_reg:x3; val_offset:71370*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71370*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97fff80; valaddr_reg:x3; val_offset:71373*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71373*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97fffc0; valaddr_reg:x3; val_offset:71376*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71376*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97fffe0; valaddr_reg:x3; val_offset:71379*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71379*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97ffff0; valaddr_reg:x3; val_offset:71382*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71382*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97ffff8; valaddr_reg:x3; val_offset:71385*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71385*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97ffffc; valaddr_reg:x3; val_offset:71388*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71388*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97ffffe; valaddr_reg:x3; val_offset:71391*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71391*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x72 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xb97fffff; valaddr_reg:x3; val_offset:71394*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71394*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbf800001; valaddr_reg:x3; val_offset:71397*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71397*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbf800003; valaddr_reg:x3; val_offset:71400*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71400*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbf800007; valaddr_reg:x3; val_offset:71403*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71403*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbf999999; valaddr_reg:x3; val_offset:71406*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71406*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:71409*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71409*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:71412*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71412*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:71415*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71415*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:71418*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71418*0 + 3*185*FLEN/8, x4, x1, x2) + +inst_23807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:71421*0 + 3*185*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71421*0 + 3*185*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2129283781,32,FLEN) +NAN_BOXED(2152066567,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497472,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497473,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497475,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497479,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497487,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497503,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497535,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497599,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497727,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497983,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75498495,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75499519,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75501567,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75505663,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75513855,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75530239,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75563007,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75628543,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75759615,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(76021759,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(76546047,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(77594623,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(79691775,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(79691776,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(81788928,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(82837504,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83361792,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83623936,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83755008,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83820544,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83853312,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83869696,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83877888,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83881984,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83884032,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885056,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885568,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885824,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885952,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886016,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886048,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886064,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886072,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886076,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886078,32,FLEN) +NAN_BOXED(2129324933,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886079,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103784960,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103784961,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103784963,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103784967,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103784975,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103784991,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103785023,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103785087,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103785215,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103785471,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103785983,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103787007,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103789055,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103793151,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103801343,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103817727,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103850495,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3103916031,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3104047103,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3104309247,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3104833535,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3105882111,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3107979263,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3107979264,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3110076416,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3111124992,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3111649280,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3111911424,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112042496,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112108032,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112140800,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112157184,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112165376,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112169472,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112171520,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112172544,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173056,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173312,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173440,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173504,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173536,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173552,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173560,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173564,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173566,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3112173567,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-187.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-187.S new file mode 100644 index 000000000..4e59f63f7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-187.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_23808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:71424*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71424*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:71427*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71427*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:71430*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71430*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:71433*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71433*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:71436*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71436*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:71439*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71439*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6b0823 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x45b5b0 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeb0823; op2val:0x8045b5b0; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:71442*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71442*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:71445*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71445*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:71448*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71448*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:71451*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71451*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:71454*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71454*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:71457*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71457*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:71460*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71460*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:71463*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71463*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:71466*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71466*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:71469*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71469*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:71472*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71472*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:71475*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71475*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:71478*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71478*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:71481*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71481*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:71484*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71484*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:71487*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71487*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:71490*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71490*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7800000; valaddr_reg:x3; val_offset:71493*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71493*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7800001; valaddr_reg:x3; val_offset:71496*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71496*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7800003; valaddr_reg:x3; val_offset:71499*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71499*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7800007; valaddr_reg:x3; val_offset:71502*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71502*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x780000f; valaddr_reg:x3; val_offset:71505*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71505*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x780001f; valaddr_reg:x3; val_offset:71508*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71508*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x780003f; valaddr_reg:x3; val_offset:71511*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71511*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x780007f; valaddr_reg:x3; val_offset:71514*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71514*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x78000ff; valaddr_reg:x3; val_offset:71517*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71517*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x78001ff; valaddr_reg:x3; val_offset:71520*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71520*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x78003ff; valaddr_reg:x3; val_offset:71523*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71523*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x78007ff; valaddr_reg:x3; val_offset:71526*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71526*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7800fff; valaddr_reg:x3; val_offset:71529*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71529*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7801fff; valaddr_reg:x3; val_offset:71532*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71532*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7803fff; valaddr_reg:x3; val_offset:71535*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71535*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7807fff; valaddr_reg:x3; val_offset:71538*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71538*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x780ffff; valaddr_reg:x3; val_offset:71541*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71541*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x781ffff; valaddr_reg:x3; val_offset:71544*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71544*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x783ffff; valaddr_reg:x3; val_offset:71547*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71547*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x787ffff; valaddr_reg:x3; val_offset:71550*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71550*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x78fffff; valaddr_reg:x3; val_offset:71553*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71553*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x79fffff; valaddr_reg:x3; val_offset:71556*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71556*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7bfffff; valaddr_reg:x3; val_offset:71559*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71559*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7c00000; valaddr_reg:x3; val_offset:71562*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71562*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7e00000; valaddr_reg:x3; val_offset:71565*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71565*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7f00000; valaddr_reg:x3; val_offset:71568*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71568*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7f80000; valaddr_reg:x3; val_offset:71571*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71571*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fc0000; valaddr_reg:x3; val_offset:71574*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71574*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fe0000; valaddr_reg:x3; val_offset:71577*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71577*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ff0000; valaddr_reg:x3; val_offset:71580*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71580*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ff8000; valaddr_reg:x3; val_offset:71583*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71583*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ffc000; valaddr_reg:x3; val_offset:71586*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71586*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ffe000; valaddr_reg:x3; val_offset:71589*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71589*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fff000; valaddr_reg:x3; val_offset:71592*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71592*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fff800; valaddr_reg:x3; val_offset:71595*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71595*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fffc00; valaddr_reg:x3; val_offset:71598*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71598*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fffe00; valaddr_reg:x3; val_offset:71601*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71601*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ffff00; valaddr_reg:x3; val_offset:71604*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71604*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ffff80; valaddr_reg:x3; val_offset:71607*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71607*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ffffc0; valaddr_reg:x3; val_offset:71610*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71610*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ffffe0; valaddr_reg:x3; val_offset:71613*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71613*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fffff0; valaddr_reg:x3; val_offset:71616*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71616*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fffff8; valaddr_reg:x3; val_offset:71619*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71619*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fffffc; valaddr_reg:x3; val_offset:71622*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71622*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7fffffe; valaddr_reg:x3; val_offset:71625*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71625*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d14ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed14ed; op2val:0x0; +op3val:0x7ffffff; valaddr_reg:x3; val_offset:71628*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71628*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb000000; valaddr_reg:x3; val_offset:71631*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71631*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb000001; valaddr_reg:x3; val_offset:71634*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71634*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb000003; valaddr_reg:x3; val_offset:71637*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71637*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb000007; valaddr_reg:x3; val_offset:71640*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71640*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb00000f; valaddr_reg:x3; val_offset:71643*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71643*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb00001f; valaddr_reg:x3; val_offset:71646*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71646*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb00003f; valaddr_reg:x3; val_offset:71649*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71649*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb00007f; valaddr_reg:x3; val_offset:71652*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71652*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb0000ff; valaddr_reg:x3; val_offset:71655*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71655*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb0001ff; valaddr_reg:x3; val_offset:71658*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71658*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb0003ff; valaddr_reg:x3; val_offset:71661*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71661*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb0007ff; valaddr_reg:x3; val_offset:71664*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71664*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb000fff; valaddr_reg:x3; val_offset:71667*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71667*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb001fff; valaddr_reg:x3; val_offset:71670*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71670*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb003fff; valaddr_reg:x3; val_offset:71673*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71673*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb007fff; valaddr_reg:x3; val_offset:71676*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71676*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb00ffff; valaddr_reg:x3; val_offset:71679*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71679*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb01ffff; valaddr_reg:x3; val_offset:71682*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71682*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb03ffff; valaddr_reg:x3; val_offset:71685*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71685*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb07ffff; valaddr_reg:x3; val_offset:71688*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71688*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb0fffff; valaddr_reg:x3; val_offset:71691*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71691*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb1fffff; valaddr_reg:x3; val_offset:71694*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71694*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb3fffff; valaddr_reg:x3; val_offset:71697*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71697*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb400000; valaddr_reg:x3; val_offset:71700*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71700*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb600000; valaddr_reg:x3; val_offset:71703*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71703*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb700000; valaddr_reg:x3; val_offset:71706*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71706*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb780000; valaddr_reg:x3; val_offset:71709*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71709*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7c0000; valaddr_reg:x3; val_offset:71712*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71712*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7e0000; valaddr_reg:x3; val_offset:71715*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71715*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7f0000; valaddr_reg:x3; val_offset:71718*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71718*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7f8000; valaddr_reg:x3; val_offset:71721*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71721*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7fc000; valaddr_reg:x3; val_offset:71724*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71724*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7fe000; valaddr_reg:x3; val_offset:71727*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71727*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7ff000; valaddr_reg:x3; val_offset:71730*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71730*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7ff800; valaddr_reg:x3; val_offset:71733*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71733*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7ffc00; valaddr_reg:x3; val_offset:71736*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71736*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7ffe00; valaddr_reg:x3; val_offset:71739*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71739*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7fff00; valaddr_reg:x3; val_offset:71742*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71742*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7fff80; valaddr_reg:x3; val_offset:71745*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71745*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7fffc0; valaddr_reg:x3; val_offset:71748*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71748*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7fffe0; valaddr_reg:x3; val_offset:71751*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71751*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7ffff0; valaddr_reg:x3; val_offset:71754*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71754*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7ffff8; valaddr_reg:x3; val_offset:71757*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71757*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7ffffc; valaddr_reg:x3; val_offset:71760*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71760*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7ffffe; valaddr_reg:x3; val_offset:71763*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71763*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xd6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xeb7fffff; valaddr_reg:x3; val_offset:71766*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71766*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff000001; valaddr_reg:x3; val_offset:71769*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71769*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff000003; valaddr_reg:x3; val_offset:71772*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71772*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff000007; valaddr_reg:x3; val_offset:71775*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71775*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff199999; valaddr_reg:x3; val_offset:71778*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71778*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff249249; valaddr_reg:x3; val_offset:71781*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71781*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff333333; valaddr_reg:x3; val_offset:71784*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71784*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:71787*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71787*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:71790*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71790*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff444444; valaddr_reg:x3; val_offset:71793*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71793*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:71796*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71796*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:71799*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71799*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff666666; valaddr_reg:x3; val_offset:71802*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71802*0 + 3*186*FLEN/8, x4, x1, x2) + +inst_23935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:71805*0 + 3*186*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71805*0 + 3*186*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2129332259,32,FLEN) +NAN_BOXED(2152052144,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829120,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829121,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829123,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829127,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829135,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829151,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829183,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829247,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829375,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829631,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125830143,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125831167,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125833215,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125837311,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125845503,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125861887,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125894655,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125960191,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126091263,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126353407,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126877695,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127926271,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(130023423,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(130023424,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(132120576,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133169152,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133693440,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133955584,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134086656,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134152192,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134184960,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134201344,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134209536,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134213632,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134215680,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134216704,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217216,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217472,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217600,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217664,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217696,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217712,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217720,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217724,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217726,32,FLEN) +NAN_BOXED(2129466605,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217727,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942645760,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942645761,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942645763,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942645767,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942645775,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942645791,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942645823,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942645887,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942646015,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942646271,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942646783,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942647807,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942649855,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942653951,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942662143,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942678527,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942711295,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942776831,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3942907903,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3943170047,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3943694335,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3944742911,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3946840063,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3946840064,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3948937216,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3949985792,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3950510080,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3950772224,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3950903296,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3950968832,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951001600,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951017984,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951026176,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951030272,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951032320,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951033344,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951033856,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034112,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034240,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034304,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034336,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034352,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034360,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034364,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034366,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(3951034367,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-188.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-188.S new file mode 100644 index 000000000..f4bae2d6c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-188.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_23936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:71808*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71808*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:71811*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71811*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6d982c and fs2 == 1 and fe2 == 0x80 and fm2 == 0x09ea6a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eed982c; op2val:0xc009ea6a; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:71814*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71814*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c800000; valaddr_reg:x3; val_offset:71817*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71817*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c800001; valaddr_reg:x3; val_offset:71820*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71820*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c800003; valaddr_reg:x3; val_offset:71823*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71823*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c800007; valaddr_reg:x3; val_offset:71826*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71826*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c80000f; valaddr_reg:x3; val_offset:71829*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71829*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c80001f; valaddr_reg:x3; val_offset:71832*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71832*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c80003f; valaddr_reg:x3; val_offset:71835*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71835*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c80007f; valaddr_reg:x3; val_offset:71838*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71838*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c8000ff; valaddr_reg:x3; val_offset:71841*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71841*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c8001ff; valaddr_reg:x3; val_offset:71844*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71844*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c8003ff; valaddr_reg:x3; val_offset:71847*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71847*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c8007ff; valaddr_reg:x3; val_offset:71850*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71850*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c800fff; valaddr_reg:x3; val_offset:71853*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71853*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c801fff; valaddr_reg:x3; val_offset:71856*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71856*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c803fff; valaddr_reg:x3; val_offset:71859*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71859*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c807fff; valaddr_reg:x3; val_offset:71862*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71862*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c80ffff; valaddr_reg:x3; val_offset:71865*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71865*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c81ffff; valaddr_reg:x3; val_offset:71868*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71868*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c83ffff; valaddr_reg:x3; val_offset:71871*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71871*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c87ffff; valaddr_reg:x3; val_offset:71874*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71874*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c8fffff; valaddr_reg:x3; val_offset:71877*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71877*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3c9fffff; valaddr_reg:x3; val_offset:71880*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71880*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cbfffff; valaddr_reg:x3; val_offset:71883*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71883*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cc00000; valaddr_reg:x3; val_offset:71886*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71886*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3ce00000; valaddr_reg:x3; val_offset:71889*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71889*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cf00000; valaddr_reg:x3; val_offset:71892*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71892*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cf80000; valaddr_reg:x3; val_offset:71895*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71895*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfc0000; valaddr_reg:x3; val_offset:71898*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71898*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfe0000; valaddr_reg:x3; val_offset:71901*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71901*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cff0000; valaddr_reg:x3; val_offset:71904*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71904*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cff8000; valaddr_reg:x3; val_offset:71907*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71907*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cffc000; valaddr_reg:x3; val_offset:71910*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71910*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cffe000; valaddr_reg:x3; val_offset:71913*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71913*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfff000; valaddr_reg:x3; val_offset:71916*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71916*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfff800; valaddr_reg:x3; val_offset:71919*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71919*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfffc00; valaddr_reg:x3; val_offset:71922*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71922*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfffe00; valaddr_reg:x3; val_offset:71925*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71925*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cffff00; valaddr_reg:x3; val_offset:71928*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71928*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cffff80; valaddr_reg:x3; val_offset:71931*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71931*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cffffc0; valaddr_reg:x3; val_offset:71934*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71934*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cffffe0; valaddr_reg:x3; val_offset:71937*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71937*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfffff0; valaddr_reg:x3; val_offset:71940*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71940*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfffff8; valaddr_reg:x3; val_offset:71943*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71943*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfffffc; valaddr_reg:x3; val_offset:71946*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71946*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cfffffe; valaddr_reg:x3; val_offset:71949*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71949*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x79 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3cffffff; valaddr_reg:x3; val_offset:71952*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71952*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3f800001; valaddr_reg:x3; val_offset:71955*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71955*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3f800003; valaddr_reg:x3; val_offset:71958*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71958*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3f800007; valaddr_reg:x3; val_offset:71961*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71961*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3f999999; valaddr_reg:x3; val_offset:71964*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71964*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:71967*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71967*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:71970*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71970*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:71973*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71973*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:71976*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71976*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:71979*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71979*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:71982*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71982*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:71985*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71985*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:71988*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71988*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:71991*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71991*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:71994*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71994*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_23999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:71997*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 71997*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6e4f75 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x44c02c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eee4f75; op2val:0x44c02c; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:72000*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72000*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:72003*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72003*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:72006*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72006*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:72009*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72009*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:72012*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72012*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:72015*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72015*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:72018*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72018*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:72021*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72021*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:72024*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72024*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:72027*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72027*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:72030*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72030*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:72033*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72033*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:72036*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72036*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:72039*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72039*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:72042*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72042*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:72045*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72045*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:72048*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72048*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf000000; valaddr_reg:x3; val_offset:72051*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72051*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf000001; valaddr_reg:x3; val_offset:72054*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72054*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf000003; valaddr_reg:x3; val_offset:72057*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72057*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf000007; valaddr_reg:x3; val_offset:72060*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72060*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf00000f; valaddr_reg:x3; val_offset:72063*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72063*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf00001f; valaddr_reg:x3; val_offset:72066*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72066*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf00003f; valaddr_reg:x3; val_offset:72069*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72069*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf00007f; valaddr_reg:x3; val_offset:72072*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72072*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf0000ff; valaddr_reg:x3; val_offset:72075*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72075*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf0001ff; valaddr_reg:x3; val_offset:72078*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72078*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf0003ff; valaddr_reg:x3; val_offset:72081*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72081*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf0007ff; valaddr_reg:x3; val_offset:72084*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72084*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf000fff; valaddr_reg:x3; val_offset:72087*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72087*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf001fff; valaddr_reg:x3; val_offset:72090*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72090*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf003fff; valaddr_reg:x3; val_offset:72093*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72093*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf007fff; valaddr_reg:x3; val_offset:72096*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72096*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf00ffff; valaddr_reg:x3; val_offset:72099*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72099*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf01ffff; valaddr_reg:x3; val_offset:72102*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72102*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf03ffff; valaddr_reg:x3; val_offset:72105*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72105*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf07ffff; valaddr_reg:x3; val_offset:72108*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72108*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf0fffff; valaddr_reg:x3; val_offset:72111*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72111*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf1fffff; valaddr_reg:x3; val_offset:72114*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72114*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf3fffff; valaddr_reg:x3; val_offset:72117*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72117*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf400000; valaddr_reg:x3; val_offset:72120*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72120*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf600000; valaddr_reg:x3; val_offset:72123*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72123*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf700000; valaddr_reg:x3; val_offset:72126*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72126*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf780000; valaddr_reg:x3; val_offset:72129*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72129*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7c0000; valaddr_reg:x3; val_offset:72132*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72132*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7e0000; valaddr_reg:x3; val_offset:72135*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72135*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7f0000; valaddr_reg:x3; val_offset:72138*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72138*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7f8000; valaddr_reg:x3; val_offset:72141*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72141*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7fc000; valaddr_reg:x3; val_offset:72144*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72144*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7fe000; valaddr_reg:x3; val_offset:72147*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72147*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7ff000; valaddr_reg:x3; val_offset:72150*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72150*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7ff800; valaddr_reg:x3; val_offset:72153*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72153*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7ffc00; valaddr_reg:x3; val_offset:72156*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72156*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7ffe00; valaddr_reg:x3; val_offset:72159*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72159*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7fff00; valaddr_reg:x3; val_offset:72162*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72162*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7fff80; valaddr_reg:x3; val_offset:72165*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72165*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7fffc0; valaddr_reg:x3; val_offset:72168*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72168*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7fffe0; valaddr_reg:x3; val_offset:72171*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72171*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7ffff0; valaddr_reg:x3; val_offset:72174*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72174*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7ffff8; valaddr_reg:x3; val_offset:72177*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72177*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7ffffc; valaddr_reg:x3; val_offset:72180*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72180*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7ffffe; valaddr_reg:x3; val_offset:72183*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72183*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6edcc4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eeedcc4; op2val:0x0; +op3val:0xf7fffff; valaddr_reg:x3; val_offset:72186*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72186*0 + 3*187*FLEN/8, x4, x1, x2) + +inst_24063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:72189*0 + 3*187*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72189*0 + 3*187*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2129500204,32,FLEN) +NAN_BOXED(3221875306,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021568,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021569,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021571,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021575,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021583,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021599,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021631,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021695,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015021823,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015022079,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015022591,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015023615,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015025663,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015029759,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015037951,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015054335,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015087103,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015152639,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015283711,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1015545855,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1016070143,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1017118719,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1019215871,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1019215872,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1021313024,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1022361600,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1022885888,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023148032,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023279104,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023344640,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023377408,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023393792,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023401984,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023406080,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023408128,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023409152,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023409664,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023409920,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023410048,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023410112,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023410144,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023410160,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023410168,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023410172,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023410174,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1023410175,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2129547125,32,FLEN) +NAN_BOXED(4505644,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658240,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658241,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658243,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658247,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658255,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658271,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658303,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658367,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658495,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658751,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251659263,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251660287,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251662335,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251666431,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251674623,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251691007,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251723775,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251789311,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251920383,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(252182527,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(252706815,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(253755391,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255852543,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255852544,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(257949696,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(258998272,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259522560,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259784704,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259915776,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259981312,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260014080,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260030464,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260038656,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260042752,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260044800,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260045824,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046336,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046592,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046720,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046784,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046816,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046832,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046840,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046844,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046846,32,FLEN) +NAN_BOXED(2129583300,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046847,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-189.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-189.S new file mode 100644 index 000000000..c7d884dfb --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-189.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_24064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:72192*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72192*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:72195*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72195*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:72198*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72198*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:72201*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72201*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:72204*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72204*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:72207*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72207*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:72210*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72210*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:72213*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72213*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:72216*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72216*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:72219*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72219*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:72222*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72222*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:72225*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72225*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:72228*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72228*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:72231*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72231*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:72234*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72234*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c000000; valaddr_reg:x3; val_offset:72237*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72237*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c000001; valaddr_reg:x3; val_offset:72240*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72240*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c000003; valaddr_reg:x3; val_offset:72243*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72243*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c000007; valaddr_reg:x3; val_offset:72246*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72246*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c00000f; valaddr_reg:x3; val_offset:72249*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72249*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c00001f; valaddr_reg:x3; val_offset:72252*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72252*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c00003f; valaddr_reg:x3; val_offset:72255*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72255*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c00007f; valaddr_reg:x3; val_offset:72258*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72258*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c0000ff; valaddr_reg:x3; val_offset:72261*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72261*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c0001ff; valaddr_reg:x3; val_offset:72264*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72264*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c0003ff; valaddr_reg:x3; val_offset:72267*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72267*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c0007ff; valaddr_reg:x3; val_offset:72270*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72270*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c000fff; valaddr_reg:x3; val_offset:72273*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72273*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c001fff; valaddr_reg:x3; val_offset:72276*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72276*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c003fff; valaddr_reg:x3; val_offset:72279*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72279*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c007fff; valaddr_reg:x3; val_offset:72282*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72282*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c00ffff; valaddr_reg:x3; val_offset:72285*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72285*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c01ffff; valaddr_reg:x3; val_offset:72288*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72288*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c03ffff; valaddr_reg:x3; val_offset:72291*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72291*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c07ffff; valaddr_reg:x3; val_offset:72294*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72294*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c0fffff; valaddr_reg:x3; val_offset:72297*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72297*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c1fffff; valaddr_reg:x3; val_offset:72300*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72300*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c3fffff; valaddr_reg:x3; val_offset:72303*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72303*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c400000; valaddr_reg:x3; val_offset:72306*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72306*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c600000; valaddr_reg:x3; val_offset:72309*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72309*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c700000; valaddr_reg:x3; val_offset:72312*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72312*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c780000; valaddr_reg:x3; val_offset:72315*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72315*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7c0000; valaddr_reg:x3; val_offset:72318*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72318*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7e0000; valaddr_reg:x3; val_offset:72321*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72321*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7f0000; valaddr_reg:x3; val_offset:72324*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72324*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7f8000; valaddr_reg:x3; val_offset:72327*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72327*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7fc000; valaddr_reg:x3; val_offset:72330*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72330*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7fe000; valaddr_reg:x3; val_offset:72333*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72333*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7ff000; valaddr_reg:x3; val_offset:72336*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72336*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7ff800; valaddr_reg:x3; val_offset:72339*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72339*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7ffc00; valaddr_reg:x3; val_offset:72342*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72342*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7ffe00; valaddr_reg:x3; val_offset:72345*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72345*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7fff00; valaddr_reg:x3; val_offset:72348*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72348*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7fff80; valaddr_reg:x3; val_offset:72351*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72351*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7fffc0; valaddr_reg:x3; val_offset:72354*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72354*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7fffe0; valaddr_reg:x3; val_offset:72357*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72357*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7ffff0; valaddr_reg:x3; val_offset:72360*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72360*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7ffff8; valaddr_reg:x3; val_offset:72363*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72363*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7ffffc; valaddr_reg:x3; val_offset:72366*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72366*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7ffffe; valaddr_reg:x3; val_offset:72369*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72369*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x6f6431 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eef6431; op2val:0x80000000; +op3val:0x8c7fffff; valaddr_reg:x3; val_offset:72372*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72372*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:72375*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72375*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:72378*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72378*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:72381*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72381*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:72384*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72384*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:72387*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72387*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:72390*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72390*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:72393*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72393*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:72396*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72396*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:72399*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72399*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:72402*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72402*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:72405*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72405*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:72408*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72408*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:72411*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72411*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:72414*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72414*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:72417*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72417*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:72420*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72420*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd000000; valaddr_reg:x3; val_offset:72423*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72423*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd000001; valaddr_reg:x3; val_offset:72426*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72426*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd000003; valaddr_reg:x3; val_offset:72429*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72429*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd000007; valaddr_reg:x3; val_offset:72432*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72432*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd00000f; valaddr_reg:x3; val_offset:72435*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72435*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd00001f; valaddr_reg:x3; val_offset:72438*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72438*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd00003f; valaddr_reg:x3; val_offset:72441*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72441*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd00007f; valaddr_reg:x3; val_offset:72444*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72444*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd0000ff; valaddr_reg:x3; val_offset:72447*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72447*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd0001ff; valaddr_reg:x3; val_offset:72450*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72450*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd0003ff; valaddr_reg:x3; val_offset:72453*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72453*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd0007ff; valaddr_reg:x3; val_offset:72456*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72456*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd000fff; valaddr_reg:x3; val_offset:72459*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72459*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd001fff; valaddr_reg:x3; val_offset:72462*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72462*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd003fff; valaddr_reg:x3; val_offset:72465*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72465*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd007fff; valaddr_reg:x3; val_offset:72468*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72468*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd00ffff; valaddr_reg:x3; val_offset:72471*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72471*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd01ffff; valaddr_reg:x3; val_offset:72474*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72474*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd03ffff; valaddr_reg:x3; val_offset:72477*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72477*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd07ffff; valaddr_reg:x3; val_offset:72480*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72480*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd0fffff; valaddr_reg:x3; val_offset:72483*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72483*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd1fffff; valaddr_reg:x3; val_offset:72486*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72486*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd3fffff; valaddr_reg:x3; val_offset:72489*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72489*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd400000; valaddr_reg:x3; val_offset:72492*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72492*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd600000; valaddr_reg:x3; val_offset:72495*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72495*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd700000; valaddr_reg:x3; val_offset:72498*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72498*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd780000; valaddr_reg:x3; val_offset:72501*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72501*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7c0000; valaddr_reg:x3; val_offset:72504*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72504*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7e0000; valaddr_reg:x3; val_offset:72507*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72507*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7f0000; valaddr_reg:x3; val_offset:72510*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72510*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7f8000; valaddr_reg:x3; val_offset:72513*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72513*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7fc000; valaddr_reg:x3; val_offset:72516*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72516*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7fe000; valaddr_reg:x3; val_offset:72519*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72519*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7ff000; valaddr_reg:x3; val_offset:72522*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72522*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7ff800; valaddr_reg:x3; val_offset:72525*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72525*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7ffc00; valaddr_reg:x3; val_offset:72528*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72528*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7ffe00; valaddr_reg:x3; val_offset:72531*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72531*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7fff00; valaddr_reg:x3; val_offset:72534*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72534*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7fff80; valaddr_reg:x3; val_offset:72537*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72537*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7fffc0; valaddr_reg:x3; val_offset:72540*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72540*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7fffe0; valaddr_reg:x3; val_offset:72543*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72543*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7ffff0; valaddr_reg:x3; val_offset:72546*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72546*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7ffff8; valaddr_reg:x3; val_offset:72549*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72549*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7ffffc; valaddr_reg:x3; val_offset:72552*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72552*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7ffffe; valaddr_reg:x3; val_offset:72555*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72555*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70ab3f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0ab3f; op2val:0x0; +op3val:0xd7fffff; valaddr_reg:x3; val_offset:72558*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72558*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff000000; valaddr_reg:x3; val_offset:72561*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72561*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff000001; valaddr_reg:x3; val_offset:72564*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72564*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff000003; valaddr_reg:x3; val_offset:72567*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72567*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff000007; valaddr_reg:x3; val_offset:72570*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72570*0 + 3*188*FLEN/8, x4, x1, x2) + +inst_24191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff00000f; valaddr_reg:x3; val_offset:72573*0 + 3*188*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72573*0 + 3*188*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810240,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810241,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810243,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810247,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810255,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810271,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810303,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810367,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810495,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810751,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348811263,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348812287,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348814335,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348818431,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348826623,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348843007,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348875775,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348941311,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349072383,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349334527,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349858815,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2350907391,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2353004543,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2353004544,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2355101696,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356150272,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356674560,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356936704,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357067776,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357133312,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357166080,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357182464,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357190656,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357194752,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357196800,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357197824,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198336,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198592,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198720,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198784,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198816,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198832,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198840,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198844,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198846,32,FLEN) +NAN_BOXED(2129617969,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198847,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103808,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103809,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103811,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103815,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103823,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103839,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103871,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103935,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104063,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104319,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104831,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218105855,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218107903,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218111999,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218120191,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218136575,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218169343,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218234879,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218365951,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218628095,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(219152383,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(220200959,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(222298111,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(222298112,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(224395264,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(225443840,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(225968128,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226230272,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226361344,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226426880,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226459648,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226476032,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226484224,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226488320,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226490368,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226491392,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226491904,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492160,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492288,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492352,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492384,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492400,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492408,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492412,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492414,32,FLEN) +NAN_BOXED(2129701695,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492415,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190080,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190095,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-19.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-19.S new file mode 100644 index 000000000..f32ddf198 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-19.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_2304: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x801fffff; valaddr_reg:x3; val_offset:6912*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6912*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2305: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:6915*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6915*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2306: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:6918*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6918*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2307: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:6921*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6921*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2308: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:6924*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6924*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2309: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x803fffff; valaddr_reg:x3; val_offset:6927*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6927*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2310: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80400000; valaddr_reg:x3; val_offset:6930*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6930*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2311: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:6933*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6933*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2312: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:6936*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6936*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2313: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:6939*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6939*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2314: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80600000; valaddr_reg:x3; val_offset:6942*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6942*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2315: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:6945*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6945*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2316: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:6948*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6948*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2317: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80700000; valaddr_reg:x3; val_offset:6951*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6951*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2318: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x80780000; valaddr_reg:x3; val_offset:6954*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6954*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2319: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807c0000; valaddr_reg:x3; val_offset:6957*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6957*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2320: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807e0000; valaddr_reg:x3; val_offset:6960*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6960*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2321: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807f0000; valaddr_reg:x3; val_offset:6963*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6963*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2322: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807f8000; valaddr_reg:x3; val_offset:6966*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6966*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2323: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807fc000; valaddr_reg:x3; val_offset:6969*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6969*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2324: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807fe000; valaddr_reg:x3; val_offset:6972*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6972*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2325: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807ff000; valaddr_reg:x3; val_offset:6975*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6975*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2326: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807ff800; valaddr_reg:x3; val_offset:6978*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6978*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2327: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807ffc00; valaddr_reg:x3; val_offset:6981*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6981*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2328: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807ffe00; valaddr_reg:x3; val_offset:6984*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6984*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2329: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807fff00; valaddr_reg:x3; val_offset:6987*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6987*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2330: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807fff80; valaddr_reg:x3; val_offset:6990*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6990*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2331: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807fffc0; valaddr_reg:x3; val_offset:6993*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6993*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2332: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807fffe0; valaddr_reg:x3; val_offset:6996*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6996*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2333: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807ffff0; valaddr_reg:x3; val_offset:6999*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 6999*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2334: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:7002*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7002*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2335: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:7005*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7005*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2336: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:7008*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7008*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2337: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3bdf28 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3bdf28; op2val:0x80000000; +op3val:0x807fffff; valaddr_reg:x3; val_offset:7011*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7011*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2338: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30000000; valaddr_reg:x3; val_offset:7014*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7014*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2339: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30000001; valaddr_reg:x3; val_offset:7017*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7017*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2340: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30000003; valaddr_reg:x3; val_offset:7020*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7020*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2341: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30000007; valaddr_reg:x3; val_offset:7023*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7023*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2342: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3000000f; valaddr_reg:x3; val_offset:7026*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7026*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2343: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3000001f; valaddr_reg:x3; val_offset:7029*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7029*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2344: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3000003f; valaddr_reg:x3; val_offset:7032*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7032*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2345: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3000007f; valaddr_reg:x3; val_offset:7035*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7035*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2346: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x300000ff; valaddr_reg:x3; val_offset:7038*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7038*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2347: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x300001ff; valaddr_reg:x3; val_offset:7041*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7041*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2348: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x300003ff; valaddr_reg:x3; val_offset:7044*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7044*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2349: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x300007ff; valaddr_reg:x3; val_offset:7047*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7047*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2350: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30000fff; valaddr_reg:x3; val_offset:7050*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7050*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2351: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30001fff; valaddr_reg:x3; val_offset:7053*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7053*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2352: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30003fff; valaddr_reg:x3; val_offset:7056*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7056*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2353: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30007fff; valaddr_reg:x3; val_offset:7059*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7059*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2354: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3000ffff; valaddr_reg:x3; val_offset:7062*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7062*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2355: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3001ffff; valaddr_reg:x3; val_offset:7065*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7065*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2356: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3003ffff; valaddr_reg:x3; val_offset:7068*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7068*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2357: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3007ffff; valaddr_reg:x3; val_offset:7071*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7071*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2358: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x300fffff; valaddr_reg:x3; val_offset:7074*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7074*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2359: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x301fffff; valaddr_reg:x3; val_offset:7077*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7077*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2360: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x303fffff; valaddr_reg:x3; val_offset:7080*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7080*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2361: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30400000; valaddr_reg:x3; val_offset:7083*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7083*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2362: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30600000; valaddr_reg:x3; val_offset:7086*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7086*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2363: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30700000; valaddr_reg:x3; val_offset:7089*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7089*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2364: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x30780000; valaddr_reg:x3; val_offset:7092*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7092*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2365: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307c0000; valaddr_reg:x3; val_offset:7095*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7095*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2366: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307e0000; valaddr_reg:x3; val_offset:7098*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7098*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2367: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307f0000; valaddr_reg:x3; val_offset:7101*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7101*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2368: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307f8000; valaddr_reg:x3; val_offset:7104*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7104*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2369: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307fc000; valaddr_reg:x3; val_offset:7107*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7107*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2370: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307fe000; valaddr_reg:x3; val_offset:7110*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7110*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2371: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307ff000; valaddr_reg:x3; val_offset:7113*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7113*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2372: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307ff800; valaddr_reg:x3; val_offset:7116*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7116*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2373: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307ffc00; valaddr_reg:x3; val_offset:7119*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7119*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2374: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307ffe00; valaddr_reg:x3; val_offset:7122*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7122*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2375: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307fff00; valaddr_reg:x3; val_offset:7125*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7125*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2376: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307fff80; valaddr_reg:x3; val_offset:7128*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7128*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2377: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307fffc0; valaddr_reg:x3; val_offset:7131*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7131*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2378: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307fffe0; valaddr_reg:x3; val_offset:7134*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7134*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2379: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307ffff0; valaddr_reg:x3; val_offset:7137*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7137*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2380: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307ffff8; valaddr_reg:x3; val_offset:7140*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7140*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2381: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307ffffc; valaddr_reg:x3; val_offset:7143*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7143*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2382: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307ffffe; valaddr_reg:x3; val_offset:7146*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7146*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2383: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x60 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x307fffff; valaddr_reg:x3; val_offset:7149*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7149*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2384: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3f800001; valaddr_reg:x3; val_offset:7152*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7152*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2385: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3f800003; valaddr_reg:x3; val_offset:7155*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7155*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2386: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3f800007; valaddr_reg:x3; val_offset:7158*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7158*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2387: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3f999999; valaddr_reg:x3; val_offset:7161*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7161*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2388: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:7164*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7164*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2389: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:7167*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7167*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2390: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:7170*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7170*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2391: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:7173*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7173*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2392: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:7176*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7176*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2393: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:7179*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7179*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2394: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:7182*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7182*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2395: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:7185*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7185*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2396: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:7188*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7188*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2397: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:7191*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7191*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2398: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:7194*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7194*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2399: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f0e22 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x2b82b8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f0e22; op2val:0x1ab82b8; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:7197*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7197*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2400: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:7200*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7200*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2401: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:7203*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7203*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2402: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:7206*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7206*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2403: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:7209*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7209*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2404: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:7212*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7212*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2405: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:7215*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7215*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2406: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:7218*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7218*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2407: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:7221*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7221*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2408: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:7224*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7224*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2409: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:7227*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7227*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2410: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:7230*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7230*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2411: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:7233*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7233*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2412: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:7236*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7236*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2413: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:7239*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7239*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2414: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:7242*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7242*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2415: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:7245*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7245*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2416: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf000000; valaddr_reg:x3; val_offset:7248*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7248*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2417: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf000001; valaddr_reg:x3; val_offset:7251*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7251*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2418: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf000003; valaddr_reg:x3; val_offset:7254*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7254*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2419: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf000007; valaddr_reg:x3; val_offset:7257*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7257*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2420: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf00000f; valaddr_reg:x3; val_offset:7260*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7260*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2421: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf00001f; valaddr_reg:x3; val_offset:7263*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7263*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2422: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf00003f; valaddr_reg:x3; val_offset:7266*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7266*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2423: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf00007f; valaddr_reg:x3; val_offset:7269*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7269*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2424: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf0000ff; valaddr_reg:x3; val_offset:7272*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7272*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2425: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf0001ff; valaddr_reg:x3; val_offset:7275*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7275*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2426: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf0003ff; valaddr_reg:x3; val_offset:7278*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7278*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2427: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf0007ff; valaddr_reg:x3; val_offset:7281*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7281*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2428: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf000fff; valaddr_reg:x3; val_offset:7284*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7284*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2429: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf001fff; valaddr_reg:x3; val_offset:7287*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7287*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2430: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf003fff; valaddr_reg:x3; val_offset:7290*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7290*0 + 3*18*FLEN/8, x4, x1, x2) + +inst_2431: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf007fff; valaddr_reg:x3; val_offset:7293*0 + 3*18*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7293*0 + 3*18*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149580799,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677951,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677952,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153775104,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154823680,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155347968,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155610112,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155741184,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155806720,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155839488,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155855872,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155864064,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155868160,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155870208,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871232,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871744,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872000,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872128,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872192,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872224,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872240,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2101075752,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872255,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306368,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306369,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306371,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306375,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306383,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306399,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306431,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306495,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306623,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805306879,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805307391,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805308415,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805310463,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805314559,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805322751,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805339135,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805371903,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805437439,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805568511,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(805830655,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(806354943,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(807403519,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(809500671,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(809500672,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(811597824,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(812646400,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813170688,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813432832,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813563904,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813629440,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813662208,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813678592,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813686784,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813690880,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813692928,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813693952,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694464,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694720,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694848,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694912,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694944,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694960,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694968,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694972,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694974,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(813694975,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2101284386,32,FLEN) +NAN_BOXED(28017336,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658240,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658241,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658243,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658247,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658255,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658271,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658303,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658367,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658495,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658751,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251659263,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251660287,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251662335,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251666431,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251674623,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251691007,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-190.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-190.S new file mode 100644 index 000000000..ae4158603 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-190.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_24192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff00001f; valaddr_reg:x3; val_offset:72576*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72576*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff00003f; valaddr_reg:x3; val_offset:72579*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72579*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff00007f; valaddr_reg:x3; val_offset:72582*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72582*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff0000ff; valaddr_reg:x3; val_offset:72585*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72585*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff0001ff; valaddr_reg:x3; val_offset:72588*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72588*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff0003ff; valaddr_reg:x3; val_offset:72591*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72591*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff0007ff; valaddr_reg:x3; val_offset:72594*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72594*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff000fff; valaddr_reg:x3; val_offset:72597*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72597*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff001fff; valaddr_reg:x3; val_offset:72600*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72600*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff003fff; valaddr_reg:x3; val_offset:72603*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72603*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff007fff; valaddr_reg:x3; val_offset:72606*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72606*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff00ffff; valaddr_reg:x3; val_offset:72609*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72609*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff01ffff; valaddr_reg:x3; val_offset:72612*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72612*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff03ffff; valaddr_reg:x3; val_offset:72615*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72615*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff07ffff; valaddr_reg:x3; val_offset:72618*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72618*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff0fffff; valaddr_reg:x3; val_offset:72621*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72621*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff199999; valaddr_reg:x3; val_offset:72624*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72624*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff1fffff; valaddr_reg:x3; val_offset:72627*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72627*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff249249; valaddr_reg:x3; val_offset:72630*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72630*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff333333; valaddr_reg:x3; val_offset:72633*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72633*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:72636*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72636*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:72639*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72639*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff3fffff; valaddr_reg:x3; val_offset:72642*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72642*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff400000; valaddr_reg:x3; val_offset:72645*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72645*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff444444; valaddr_reg:x3; val_offset:72648*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72648*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:72651*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72651*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:72654*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72654*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff600000; valaddr_reg:x3; val_offset:72657*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72657*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff666666; valaddr_reg:x3; val_offset:72660*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72660*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:72663*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72663*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff700000; valaddr_reg:x3; val_offset:72666*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72666*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff780000; valaddr_reg:x3; val_offset:72669*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72669*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7c0000; valaddr_reg:x3; val_offset:72672*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72672*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7e0000; valaddr_reg:x3; val_offset:72675*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72675*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7f0000; valaddr_reg:x3; val_offset:72678*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72678*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7f8000; valaddr_reg:x3; val_offset:72681*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72681*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7fc000; valaddr_reg:x3; val_offset:72684*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72684*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7fe000; valaddr_reg:x3; val_offset:72687*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72687*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7ff000; valaddr_reg:x3; val_offset:72690*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72690*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7ff800; valaddr_reg:x3; val_offset:72693*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72693*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7ffc00; valaddr_reg:x3; val_offset:72696*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72696*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7ffe00; valaddr_reg:x3; val_offset:72699*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72699*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7fff00; valaddr_reg:x3; val_offset:72702*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72702*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7fff80; valaddr_reg:x3; val_offset:72705*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72705*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7fffc0; valaddr_reg:x3; val_offset:72708*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72708*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7fffe0; valaddr_reg:x3; val_offset:72711*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72711*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7ffff0; valaddr_reg:x3; val_offset:72714*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72714*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:72717*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72717*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:72720*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72720*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:72723*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72723*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x70d256 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x081147 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef0d256; op2val:0xc0081147; +op3val:0xff7fffff; valaddr_reg:x3; val_offset:72726*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72726*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd800000; valaddr_reg:x3; val_offset:72729*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72729*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd800001; valaddr_reg:x3; val_offset:72732*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72732*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd800003; valaddr_reg:x3; val_offset:72735*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72735*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd800007; valaddr_reg:x3; val_offset:72738*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72738*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd80000f; valaddr_reg:x3; val_offset:72741*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72741*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd80001f; valaddr_reg:x3; val_offset:72744*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72744*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd80003f; valaddr_reg:x3; val_offset:72747*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72747*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd80007f; valaddr_reg:x3; val_offset:72750*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72750*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd8000ff; valaddr_reg:x3; val_offset:72753*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72753*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd8001ff; valaddr_reg:x3; val_offset:72756*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72756*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd8003ff; valaddr_reg:x3; val_offset:72759*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72759*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd8007ff; valaddr_reg:x3; val_offset:72762*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72762*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd800fff; valaddr_reg:x3; val_offset:72765*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72765*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd801fff; valaddr_reg:x3; val_offset:72768*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72768*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd803fff; valaddr_reg:x3; val_offset:72771*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72771*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd807fff; valaddr_reg:x3; val_offset:72774*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72774*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd80ffff; valaddr_reg:x3; val_offset:72777*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72777*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd81ffff; valaddr_reg:x3; val_offset:72780*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72780*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd83ffff; valaddr_reg:x3; val_offset:72783*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72783*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd87ffff; valaddr_reg:x3; val_offset:72786*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72786*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd8fffff; valaddr_reg:x3; val_offset:72789*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72789*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbd9fffff; valaddr_reg:x3; val_offset:72792*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72792*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdbfffff; valaddr_reg:x3; val_offset:72795*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72795*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdc00000; valaddr_reg:x3; val_offset:72798*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72798*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbde00000; valaddr_reg:x3; val_offset:72801*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72801*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdf00000; valaddr_reg:x3; val_offset:72804*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72804*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdf80000; valaddr_reg:x3; val_offset:72807*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72807*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfc0000; valaddr_reg:x3; val_offset:72810*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72810*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfe0000; valaddr_reg:x3; val_offset:72813*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72813*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdff0000; valaddr_reg:x3; val_offset:72816*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72816*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdff8000; valaddr_reg:x3; val_offset:72819*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72819*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdffc000; valaddr_reg:x3; val_offset:72822*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72822*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdffe000; valaddr_reg:x3; val_offset:72825*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72825*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfff000; valaddr_reg:x3; val_offset:72828*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72828*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfff800; valaddr_reg:x3; val_offset:72831*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72831*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfffc00; valaddr_reg:x3; val_offset:72834*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72834*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfffe00; valaddr_reg:x3; val_offset:72837*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72837*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdffff00; valaddr_reg:x3; val_offset:72840*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72840*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdffff80; valaddr_reg:x3; val_offset:72843*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72843*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdffffc0; valaddr_reg:x3; val_offset:72846*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72846*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdffffe0; valaddr_reg:x3; val_offset:72849*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72849*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfffff0; valaddr_reg:x3; val_offset:72852*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72852*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfffff8; valaddr_reg:x3; val_offset:72855*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72855*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfffffc; valaddr_reg:x3; val_offset:72858*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72858*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdfffffe; valaddr_reg:x3; val_offset:72861*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72861*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbdffffff; valaddr_reg:x3; val_offset:72864*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72864*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbf800001; valaddr_reg:x3; val_offset:72867*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72867*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbf800003; valaddr_reg:x3; val_offset:72870*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72870*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbf800007; valaddr_reg:x3; val_offset:72873*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72873*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbf999999; valaddr_reg:x3; val_offset:72876*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72876*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:72879*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72879*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:72882*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72882*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:72885*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72885*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:72888*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72888*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:72891*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72891*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:72894*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72894*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:72897*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72897*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:72900*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72900*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:72903*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72903*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:72906*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72906*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:72909*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72909*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71036e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x43fac8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1036e; op2val:0x8043fac8; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:72912*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72912*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed000000; valaddr_reg:x3; val_offset:72915*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72915*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed000001; valaddr_reg:x3; val_offset:72918*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72918*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed000003; valaddr_reg:x3; val_offset:72921*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72921*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed000007; valaddr_reg:x3; val_offset:72924*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72924*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed00000f; valaddr_reg:x3; val_offset:72927*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72927*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed00001f; valaddr_reg:x3; val_offset:72930*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72930*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed00003f; valaddr_reg:x3; val_offset:72933*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72933*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed00007f; valaddr_reg:x3; val_offset:72936*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72936*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed0000ff; valaddr_reg:x3; val_offset:72939*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72939*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed0001ff; valaddr_reg:x3; val_offset:72942*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72942*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed0003ff; valaddr_reg:x3; val_offset:72945*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72945*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed0007ff; valaddr_reg:x3; val_offset:72948*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72948*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed000fff; valaddr_reg:x3; val_offset:72951*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72951*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed001fff; valaddr_reg:x3; val_offset:72954*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72954*0 + 3*189*FLEN/8, x4, x1, x2) + +inst_24319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed003fff; valaddr_reg:x3; val_offset:72957*0 + 3*189*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72957*0 + 3*189*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190111,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190143,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190207,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190335,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278190591,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278191103,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278192127,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278194175,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278198271,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278206463,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278222847,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278255615,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278321151,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278452223,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4278714367,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4279238655,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4280287231,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4282384383,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4282384384,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4284481536,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4285530112,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286054400,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286316544,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286447616,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286513152,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286545920,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286562304,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286570496,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286574592,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286576640,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286577664,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578176,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578432,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578560,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578624,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578656,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578672,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2129711702,32,FLEN) +NAN_BOXED(3221754183,32,FLEN) +NAN_BOXED(4286578687,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282432,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282433,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282435,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282439,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282447,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282463,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282495,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282559,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282687,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179282943,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179283455,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179284479,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179286527,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179290623,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179298815,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179315199,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179347967,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179413503,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179544575,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3179806719,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3180331007,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3181379583,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3183476735,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3183476736,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3185573888,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3186622464,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187146752,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187408896,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187539968,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187605504,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187638272,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187654656,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187662848,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187666944,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187668992,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187670016,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187670528,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187670784,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187670912,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187670976,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187671008,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187671024,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187671032,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187671036,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187671038,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3187671039,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2129724270,32,FLEN) +NAN_BOXED(2151938760,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200192,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200193,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200195,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200199,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200207,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200223,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200255,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200319,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200447,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976200703,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976201215,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976202239,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976204287,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976208383,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976216575,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-191.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-191.S new file mode 100644 index 000000000..fa34e7d9e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-191.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_24320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed007fff; valaddr_reg:x3; val_offset:72960*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72960*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed00ffff; valaddr_reg:x3; val_offset:72963*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72963*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed01ffff; valaddr_reg:x3; val_offset:72966*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72966*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed03ffff; valaddr_reg:x3; val_offset:72969*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72969*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed07ffff; valaddr_reg:x3; val_offset:72972*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72972*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed0fffff; valaddr_reg:x3; val_offset:72975*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72975*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed1fffff; valaddr_reg:x3; val_offset:72978*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72978*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed3fffff; valaddr_reg:x3; val_offset:72981*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72981*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed400000; valaddr_reg:x3; val_offset:72984*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72984*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed600000; valaddr_reg:x3; val_offset:72987*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72987*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed700000; valaddr_reg:x3; val_offset:72990*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72990*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed780000; valaddr_reg:x3; val_offset:72993*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72993*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7c0000; valaddr_reg:x3; val_offset:72996*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72996*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7e0000; valaddr_reg:x3; val_offset:72999*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 72999*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7f0000; valaddr_reg:x3; val_offset:73002*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73002*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7f8000; valaddr_reg:x3; val_offset:73005*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73005*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7fc000; valaddr_reg:x3; val_offset:73008*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73008*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7fe000; valaddr_reg:x3; val_offset:73011*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73011*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7ff000; valaddr_reg:x3; val_offset:73014*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73014*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7ff800; valaddr_reg:x3; val_offset:73017*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73017*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7ffc00; valaddr_reg:x3; val_offset:73020*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73020*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7ffe00; valaddr_reg:x3; val_offset:73023*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73023*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7fff00; valaddr_reg:x3; val_offset:73026*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73026*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7fff80; valaddr_reg:x3; val_offset:73029*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73029*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7fffc0; valaddr_reg:x3; val_offset:73032*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73032*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7fffe0; valaddr_reg:x3; val_offset:73035*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73035*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7ffff0; valaddr_reg:x3; val_offset:73038*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73038*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7ffff8; valaddr_reg:x3; val_offset:73041*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73041*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7ffffc; valaddr_reg:x3; val_offset:73044*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73044*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7ffffe; valaddr_reg:x3; val_offset:73047*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73047*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xda and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xed7fffff; valaddr_reg:x3; val_offset:73050*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73050*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff000001; valaddr_reg:x3; val_offset:73053*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73053*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff000003; valaddr_reg:x3; val_offset:73056*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73056*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff000007; valaddr_reg:x3; val_offset:73059*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73059*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff199999; valaddr_reg:x3; val_offset:73062*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73062*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff249249; valaddr_reg:x3; val_offset:73065*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73065*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff333333; valaddr_reg:x3; val_offset:73068*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73068*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:73071*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73071*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:73074*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73074*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff444444; valaddr_reg:x3; val_offset:73077*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73077*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:73080*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73080*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:73083*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73083*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff666666; valaddr_reg:x3; val_offset:73086*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73086*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:73089*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73089*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:73092*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73092*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:73095*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73095*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x718162 and fs2 == 1 and fe2 == 0x80 and fm2 == 0x07aea7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef18162; op2val:0xc007aea7; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:73098*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73098*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:73101*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73101*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:73104*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73104*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:73107*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73107*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:73110*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73110*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:73113*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73113*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:73116*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73116*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:73119*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73119*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:73122*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73122*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:73125*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73125*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:73128*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73128*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:73131*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73131*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:73134*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73134*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:73137*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73137*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:73140*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73140*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:73143*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73143*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:73146*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73146*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8000000; valaddr_reg:x3; val_offset:73149*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73149*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8000001; valaddr_reg:x3; val_offset:73152*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73152*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8000003; valaddr_reg:x3; val_offset:73155*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73155*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8000007; valaddr_reg:x3; val_offset:73158*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73158*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x800000f; valaddr_reg:x3; val_offset:73161*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73161*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x800001f; valaddr_reg:x3; val_offset:73164*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73164*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x800003f; valaddr_reg:x3; val_offset:73167*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73167*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x800007f; valaddr_reg:x3; val_offset:73170*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73170*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x80000ff; valaddr_reg:x3; val_offset:73173*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73173*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x80001ff; valaddr_reg:x3; val_offset:73176*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73176*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x80003ff; valaddr_reg:x3; val_offset:73179*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73179*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x80007ff; valaddr_reg:x3; val_offset:73182*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73182*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8000fff; valaddr_reg:x3; val_offset:73185*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73185*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8001fff; valaddr_reg:x3; val_offset:73188*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73188*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8003fff; valaddr_reg:x3; val_offset:73191*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73191*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8007fff; valaddr_reg:x3; val_offset:73194*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73194*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x800ffff; valaddr_reg:x3; val_offset:73197*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73197*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x801ffff; valaddr_reg:x3; val_offset:73200*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73200*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x803ffff; valaddr_reg:x3; val_offset:73203*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73203*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x807ffff; valaddr_reg:x3; val_offset:73206*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73206*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x80fffff; valaddr_reg:x3; val_offset:73209*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73209*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x81fffff; valaddr_reg:x3; val_offset:73212*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73212*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x83fffff; valaddr_reg:x3; val_offset:73215*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73215*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8400000; valaddr_reg:x3; val_offset:73218*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73218*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8600000; valaddr_reg:x3; val_offset:73221*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73221*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8700000; valaddr_reg:x3; val_offset:73224*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73224*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x8780000; valaddr_reg:x3; val_offset:73227*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73227*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87c0000; valaddr_reg:x3; val_offset:73230*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73230*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87e0000; valaddr_reg:x3; val_offset:73233*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73233*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87f0000; valaddr_reg:x3; val_offset:73236*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73236*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87f8000; valaddr_reg:x3; val_offset:73239*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73239*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87fc000; valaddr_reg:x3; val_offset:73242*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73242*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87fe000; valaddr_reg:x3; val_offset:73245*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73245*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87ff000; valaddr_reg:x3; val_offset:73248*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73248*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87ff800; valaddr_reg:x3; val_offset:73251*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73251*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87ffc00; valaddr_reg:x3; val_offset:73254*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73254*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87ffe00; valaddr_reg:x3; val_offset:73257*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73257*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87fff00; valaddr_reg:x3; val_offset:73260*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73260*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87fff80; valaddr_reg:x3; val_offset:73263*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73263*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87fffc0; valaddr_reg:x3; val_offset:73266*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73266*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87fffe0; valaddr_reg:x3; val_offset:73269*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73269*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87ffff0; valaddr_reg:x3; val_offset:73272*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73272*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87ffff8; valaddr_reg:x3; val_offset:73275*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73275*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87ffffc; valaddr_reg:x3; val_offset:73278*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73278*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87ffffe; valaddr_reg:x3; val_offset:73281*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73281*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x71e834 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef1e834; op2val:0x0; +op3val:0x87fffff; valaddr_reg:x3; val_offset:73284*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73284*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:73287*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73287*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:73290*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73290*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:73293*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73293*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:73296*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73296*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:73299*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73299*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:73302*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73302*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:73305*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73305*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:73308*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73308*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:73311*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73311*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:73314*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73314*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:73317*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73317*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:73320*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73320*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:73323*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73323*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:73326*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73326*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:73329*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73329*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:73332*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73332*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd000000; valaddr_reg:x3; val_offset:73335*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73335*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd000001; valaddr_reg:x3; val_offset:73338*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73338*0 + 3*190*FLEN/8, x4, x1, x2) + +inst_24447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd000003; valaddr_reg:x3; val_offset:73341*0 + 3*190*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73341*0 + 3*190*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976232959,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976265727,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976331263,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976462335,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3976724479,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3977248767,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3978297343,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3980394495,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3980394496,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3982491648,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3983540224,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984064512,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984326656,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984457728,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984523264,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984556032,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984572416,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984580608,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984584704,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984586752,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984587776,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588288,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588544,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588672,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588736,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588768,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588784,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588792,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588796,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588798,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(3984588799,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2129756514,32,FLEN) +NAN_BOXED(3221728935,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217728,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217729,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217731,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217735,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217743,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217759,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217791,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217855,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217983,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134218239,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134218751,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134219775,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134221823,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134225919,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134234111,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134250495,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134283263,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134348799,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134479871,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134742015,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(135266303,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(136314879,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(138412031,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(138412032,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(140509184,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(141557760,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142082048,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142344192,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142475264,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142540800,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142573568,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142589952,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142598144,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142602240,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142604288,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142605312,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142605824,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606080,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606208,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606272,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606304,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606320,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606328,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606332,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606334,32,FLEN) +NAN_BOXED(2129782836,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606335,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103808,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103809,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103811,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-192.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-192.S new file mode 100644 index 000000000..362997792 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-192.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_24448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd000007; valaddr_reg:x3; val_offset:73344*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73344*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd00000f; valaddr_reg:x3; val_offset:73347*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73347*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd00001f; valaddr_reg:x3; val_offset:73350*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73350*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd00003f; valaddr_reg:x3; val_offset:73353*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73353*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd00007f; valaddr_reg:x3; val_offset:73356*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73356*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd0000ff; valaddr_reg:x3; val_offset:73359*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73359*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd0001ff; valaddr_reg:x3; val_offset:73362*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73362*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd0003ff; valaddr_reg:x3; val_offset:73365*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73365*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd0007ff; valaddr_reg:x3; val_offset:73368*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73368*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd000fff; valaddr_reg:x3; val_offset:73371*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73371*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd001fff; valaddr_reg:x3; val_offset:73374*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73374*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd003fff; valaddr_reg:x3; val_offset:73377*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73377*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd007fff; valaddr_reg:x3; val_offset:73380*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73380*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd00ffff; valaddr_reg:x3; val_offset:73383*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73383*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd01ffff; valaddr_reg:x3; val_offset:73386*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73386*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd03ffff; valaddr_reg:x3; val_offset:73389*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73389*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd07ffff; valaddr_reg:x3; val_offset:73392*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73392*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd0fffff; valaddr_reg:x3; val_offset:73395*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73395*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd1fffff; valaddr_reg:x3; val_offset:73398*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73398*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd3fffff; valaddr_reg:x3; val_offset:73401*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73401*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd400000; valaddr_reg:x3; val_offset:73404*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73404*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd600000; valaddr_reg:x3; val_offset:73407*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73407*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd700000; valaddr_reg:x3; val_offset:73410*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73410*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd780000; valaddr_reg:x3; val_offset:73413*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73413*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7c0000; valaddr_reg:x3; val_offset:73416*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73416*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7e0000; valaddr_reg:x3; val_offset:73419*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73419*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7f0000; valaddr_reg:x3; val_offset:73422*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73422*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7f8000; valaddr_reg:x3; val_offset:73425*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73425*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7fc000; valaddr_reg:x3; val_offset:73428*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73428*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7fe000; valaddr_reg:x3; val_offset:73431*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73431*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7ff000; valaddr_reg:x3; val_offset:73434*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73434*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7ff800; valaddr_reg:x3; val_offset:73437*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73437*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7ffc00; valaddr_reg:x3; val_offset:73440*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73440*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7ffe00; valaddr_reg:x3; val_offset:73443*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73443*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7fff00; valaddr_reg:x3; val_offset:73446*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73446*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7fff80; valaddr_reg:x3; val_offset:73449*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73449*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7fffc0; valaddr_reg:x3; val_offset:73452*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73452*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7fffe0; valaddr_reg:x3; val_offset:73455*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73455*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7ffff0; valaddr_reg:x3; val_offset:73458*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73458*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7ffff8; valaddr_reg:x3; val_offset:73461*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73461*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7ffffc; valaddr_reg:x3; val_offset:73464*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73464*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7ffffe; valaddr_reg:x3; val_offset:73467*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73467*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72cedb and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2cedb; op2val:0x0; +op3val:0xd7fffff; valaddr_reg:x3; val_offset:73470*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73470*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e000000; valaddr_reg:x3; val_offset:73473*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73473*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e000001; valaddr_reg:x3; val_offset:73476*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73476*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e000003; valaddr_reg:x3; val_offset:73479*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73479*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e000007; valaddr_reg:x3; val_offset:73482*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73482*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e00000f; valaddr_reg:x3; val_offset:73485*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73485*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e00001f; valaddr_reg:x3; val_offset:73488*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73488*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e00003f; valaddr_reg:x3; val_offset:73491*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73491*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e00007f; valaddr_reg:x3; val_offset:73494*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73494*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e0000ff; valaddr_reg:x3; val_offset:73497*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73497*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e0001ff; valaddr_reg:x3; val_offset:73500*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73500*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e0003ff; valaddr_reg:x3; val_offset:73503*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73503*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e0007ff; valaddr_reg:x3; val_offset:73506*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73506*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e000fff; valaddr_reg:x3; val_offset:73509*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73509*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e001fff; valaddr_reg:x3; val_offset:73512*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73512*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e003fff; valaddr_reg:x3; val_offset:73515*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73515*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e007fff; valaddr_reg:x3; val_offset:73518*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73518*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e00ffff; valaddr_reg:x3; val_offset:73521*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73521*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e01ffff; valaddr_reg:x3; val_offset:73524*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73524*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e03ffff; valaddr_reg:x3; val_offset:73527*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73527*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e07ffff; valaddr_reg:x3; val_offset:73530*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73530*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e0fffff; valaddr_reg:x3; val_offset:73533*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73533*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e1fffff; valaddr_reg:x3; val_offset:73536*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73536*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e3fffff; valaddr_reg:x3; val_offset:73539*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73539*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e400000; valaddr_reg:x3; val_offset:73542*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73542*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e600000; valaddr_reg:x3; val_offset:73545*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73545*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e700000; valaddr_reg:x3; val_offset:73548*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73548*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e780000; valaddr_reg:x3; val_offset:73551*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73551*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7c0000; valaddr_reg:x3; val_offset:73554*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73554*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7e0000; valaddr_reg:x3; val_offset:73557*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73557*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7f0000; valaddr_reg:x3; val_offset:73560*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73560*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7f8000; valaddr_reg:x3; val_offset:73563*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73563*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7fc000; valaddr_reg:x3; val_offset:73566*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73566*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7fe000; valaddr_reg:x3; val_offset:73569*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73569*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7ff000; valaddr_reg:x3; val_offset:73572*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73572*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7ff800; valaddr_reg:x3; val_offset:73575*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73575*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7ffc00; valaddr_reg:x3; val_offset:73578*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73578*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7ffe00; valaddr_reg:x3; val_offset:73581*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73581*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7fff00; valaddr_reg:x3; val_offset:73584*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73584*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7fff80; valaddr_reg:x3; val_offset:73587*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73587*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7fffc0; valaddr_reg:x3; val_offset:73590*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73590*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7fffe0; valaddr_reg:x3; val_offset:73593*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73593*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7ffff0; valaddr_reg:x3; val_offset:73596*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73596*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7ffff8; valaddr_reg:x3; val_offset:73599*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73599*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7ffffc; valaddr_reg:x3; val_offset:73602*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73602*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7ffffe; valaddr_reg:x3; val_offset:73605*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73605*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7e7fffff; valaddr_reg:x3; val_offset:73608*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73608*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f000001; valaddr_reg:x3; val_offset:73611*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73611*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f000003; valaddr_reg:x3; val_offset:73614*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73614*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f000007; valaddr_reg:x3; val_offset:73617*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73617*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f199999; valaddr_reg:x3; val_offset:73620*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73620*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f249249; valaddr_reg:x3; val_offset:73623*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73623*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f333333; valaddr_reg:x3; val_offset:73626*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73626*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:73629*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73629*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:73632*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73632*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f444444; valaddr_reg:x3; val_offset:73635*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73635*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:73638*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73638*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:73641*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73641*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f666666; valaddr_reg:x3; val_offset:73644*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73644*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:73647*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73647*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:73650*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73650*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:73653*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73653*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x72fcb4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x06dad8 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef2fcb4; op2val:0x4006dad8; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:73656*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73656*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32800000; valaddr_reg:x3; val_offset:73659*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73659*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32800001; valaddr_reg:x3; val_offset:73662*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73662*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32800003; valaddr_reg:x3; val_offset:73665*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73665*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32800007; valaddr_reg:x3; val_offset:73668*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73668*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3280000f; valaddr_reg:x3; val_offset:73671*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73671*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3280001f; valaddr_reg:x3; val_offset:73674*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73674*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3280003f; valaddr_reg:x3; val_offset:73677*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73677*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3280007f; valaddr_reg:x3; val_offset:73680*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73680*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x328000ff; valaddr_reg:x3; val_offset:73683*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73683*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x328001ff; valaddr_reg:x3; val_offset:73686*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73686*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x328003ff; valaddr_reg:x3; val_offset:73689*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73689*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x328007ff; valaddr_reg:x3; val_offset:73692*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73692*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32800fff; valaddr_reg:x3; val_offset:73695*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73695*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32801fff; valaddr_reg:x3; val_offset:73698*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73698*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32803fff; valaddr_reg:x3; val_offset:73701*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73701*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32807fff; valaddr_reg:x3; val_offset:73704*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73704*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3280ffff; valaddr_reg:x3; val_offset:73707*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73707*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3281ffff; valaddr_reg:x3; val_offset:73710*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73710*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3283ffff; valaddr_reg:x3; val_offset:73713*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73713*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3287ffff; valaddr_reg:x3; val_offset:73716*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73716*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x328fffff; valaddr_reg:x3; val_offset:73719*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73719*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x329fffff; valaddr_reg:x3; val_offset:73722*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73722*0 + 3*191*FLEN/8, x4, x1, x2) + +inst_24575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32bfffff; valaddr_reg:x3; val_offset:73725*0 + 3*191*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73725*0 + 3*191*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103815,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103823,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103839,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103871,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103935,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104063,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104319,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104831,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218105855,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218107903,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218111999,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218120191,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218136575,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218169343,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218234879,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218365951,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218628095,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(219152383,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(220200959,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(222298111,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(222298112,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(224395264,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(225443840,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(225968128,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226230272,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226361344,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226426880,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226459648,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226476032,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226484224,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226488320,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226490368,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226491392,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226491904,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492160,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492288,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492352,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492384,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492400,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492408,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492412,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492414,32,FLEN) +NAN_BOXED(2129841883,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492415,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929216,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929217,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929219,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929223,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929231,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929247,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929279,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929343,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929471,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113929727,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113930239,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113931263,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113933311,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113937407,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113945599,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113961983,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2113994751,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2114060287,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2114191359,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2114453503,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2114977791,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2116026367,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2118123519,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2118123520,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2120220672,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2121269248,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2121793536,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122055680,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122186752,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122252288,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122285056,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122301440,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122309632,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122313728,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122315776,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122316800,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317312,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317568,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317696,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317760,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317792,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317808,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317816,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317820,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317822,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2122317823,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2129853620,32,FLEN) +NAN_BOXED(1074191064,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249408,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249409,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249411,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249415,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249423,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249439,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249471,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249535,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249663,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847249919,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847250431,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847251455,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847253503,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847257599,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847265791,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847282175,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847314943,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847380479,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847511551,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(847773695,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(848297983,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(849346559,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(851443711,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-193.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-193.S new file mode 100644 index 000000000..dcdef8e9f --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-193.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_24576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32c00000; valaddr_reg:x3; val_offset:73728*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73728*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32e00000; valaddr_reg:x3; val_offset:73731*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73731*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32f00000; valaddr_reg:x3; val_offset:73734*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73734*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32f80000; valaddr_reg:x3; val_offset:73737*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73737*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fc0000; valaddr_reg:x3; val_offset:73740*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73740*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fe0000; valaddr_reg:x3; val_offset:73743*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73743*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ff0000; valaddr_reg:x3; val_offset:73746*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73746*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ff8000; valaddr_reg:x3; val_offset:73749*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73749*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ffc000; valaddr_reg:x3; val_offset:73752*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73752*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ffe000; valaddr_reg:x3; val_offset:73755*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73755*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fff000; valaddr_reg:x3; val_offset:73758*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73758*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fff800; valaddr_reg:x3; val_offset:73761*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73761*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fffc00; valaddr_reg:x3; val_offset:73764*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73764*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fffe00; valaddr_reg:x3; val_offset:73767*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73767*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ffff00; valaddr_reg:x3; val_offset:73770*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73770*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ffff80; valaddr_reg:x3; val_offset:73773*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73773*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ffffc0; valaddr_reg:x3; val_offset:73776*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73776*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ffffe0; valaddr_reg:x3; val_offset:73779*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73779*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fffff0; valaddr_reg:x3; val_offset:73782*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73782*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fffff8; valaddr_reg:x3; val_offset:73785*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73785*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fffffc; valaddr_reg:x3; val_offset:73788*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73788*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32fffffe; valaddr_reg:x3; val_offset:73791*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73791*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x65 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x32ffffff; valaddr_reg:x3; val_offset:73794*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73794*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3f800001; valaddr_reg:x3; val_offset:73797*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73797*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3f800003; valaddr_reg:x3; val_offset:73800*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73800*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3f800007; valaddr_reg:x3; val_offset:73803*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73803*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3f999999; valaddr_reg:x3; val_offset:73806*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73806*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:73809*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73809*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:73812*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73812*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:73815*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73815*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:73818*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73818*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:73821*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73821*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:73824*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73824*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:73827*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73827*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:73830*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73830*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:73833*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73833*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:73836*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73836*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:73839*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73839*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x738906 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x434693 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef38906; op2val:0x434693; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:73842*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73842*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e800000; valaddr_reg:x3; val_offset:73845*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73845*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e800001; valaddr_reg:x3; val_offset:73848*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73848*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e800003; valaddr_reg:x3; val_offset:73851*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73851*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e800007; valaddr_reg:x3; val_offset:73854*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73854*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e80000f; valaddr_reg:x3; val_offset:73857*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73857*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e80001f; valaddr_reg:x3; val_offset:73860*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73860*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e80003f; valaddr_reg:x3; val_offset:73863*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73863*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e80007f; valaddr_reg:x3; val_offset:73866*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73866*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e8000ff; valaddr_reg:x3; val_offset:73869*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73869*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e8001ff; valaddr_reg:x3; val_offset:73872*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73872*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e8003ff; valaddr_reg:x3; val_offset:73875*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73875*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e8007ff; valaddr_reg:x3; val_offset:73878*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73878*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e800fff; valaddr_reg:x3; val_offset:73881*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73881*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e801fff; valaddr_reg:x3; val_offset:73884*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73884*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e803fff; valaddr_reg:x3; val_offset:73887*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73887*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e807fff; valaddr_reg:x3; val_offset:73890*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73890*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e80ffff; valaddr_reg:x3; val_offset:73893*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73893*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e81ffff; valaddr_reg:x3; val_offset:73896*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73896*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e83ffff; valaddr_reg:x3; val_offset:73899*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73899*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e87ffff; valaddr_reg:x3; val_offset:73902*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73902*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e8fffff; valaddr_reg:x3; val_offset:73905*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73905*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7e9fffff; valaddr_reg:x3; val_offset:73908*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73908*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7ebfffff; valaddr_reg:x3; val_offset:73911*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73911*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7ec00000; valaddr_reg:x3; val_offset:73914*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73914*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7ee00000; valaddr_reg:x3; val_offset:73917*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73917*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7ef00000; valaddr_reg:x3; val_offset:73920*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73920*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7ef80000; valaddr_reg:x3; val_offset:73923*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73923*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efc0000; valaddr_reg:x3; val_offset:73926*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73926*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efe0000; valaddr_reg:x3; val_offset:73929*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73929*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7eff0000; valaddr_reg:x3; val_offset:73932*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73932*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7eff8000; valaddr_reg:x3; val_offset:73935*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73935*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7effc000; valaddr_reg:x3; val_offset:73938*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73938*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7effe000; valaddr_reg:x3; val_offset:73941*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73941*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efff000; valaddr_reg:x3; val_offset:73944*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73944*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efff800; valaddr_reg:x3; val_offset:73947*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73947*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efffc00; valaddr_reg:x3; val_offset:73950*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73950*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efffe00; valaddr_reg:x3; val_offset:73953*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73953*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7effff00; valaddr_reg:x3; val_offset:73956*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73956*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7effff80; valaddr_reg:x3; val_offset:73959*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73959*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7effffc0; valaddr_reg:x3; val_offset:73962*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73962*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7effffe0; valaddr_reg:x3; val_offset:73965*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73965*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efffff0; valaddr_reg:x3; val_offset:73968*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73968*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efffff8; valaddr_reg:x3; val_offset:73971*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73971*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efffffc; valaddr_reg:x3; val_offset:73974*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73974*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7efffffe; valaddr_reg:x3; val_offset:73977*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73977*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7effffff; valaddr_reg:x3; val_offset:73980*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73980*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f000001; valaddr_reg:x3; val_offset:73983*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73983*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f000003; valaddr_reg:x3; val_offset:73986*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73986*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24663: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f000007; valaddr_reg:x3; val_offset:73989*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73989*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24664: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f199999; valaddr_reg:x3; val_offset:73992*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73992*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24665: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f249249; valaddr_reg:x3; val_offset:73995*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73995*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24666: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f333333; valaddr_reg:x3; val_offset:73998*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 73998*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24667: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:74001*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74001*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24668: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:74004*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74004*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24669: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f444444; valaddr_reg:x3; val_offset:74007*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74007*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24670: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:74010*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74010*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24671: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:74013*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74013*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24672: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f666666; valaddr_reg:x3; val_offset:74016*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74016*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24673: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:74019*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74019*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24674: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:74022*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74022*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24675: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:74025*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74025*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24676: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74a005 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x05f3b0 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4a005; op2val:0x4005f3b0; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:74028*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74028*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24677: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8800000; valaddr_reg:x3; val_offset:74031*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74031*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24678: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8800001; valaddr_reg:x3; val_offset:74034*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74034*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24679: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8800003; valaddr_reg:x3; val_offset:74037*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74037*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24680: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8800007; valaddr_reg:x3; val_offset:74040*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74040*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24681: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe880000f; valaddr_reg:x3; val_offset:74043*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74043*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24682: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe880001f; valaddr_reg:x3; val_offset:74046*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74046*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24683: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe880003f; valaddr_reg:x3; val_offset:74049*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74049*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24684: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe880007f; valaddr_reg:x3; val_offset:74052*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74052*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24685: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe88000ff; valaddr_reg:x3; val_offset:74055*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74055*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24686: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe88001ff; valaddr_reg:x3; val_offset:74058*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74058*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24687: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe88003ff; valaddr_reg:x3; val_offset:74061*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74061*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24688: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe88007ff; valaddr_reg:x3; val_offset:74064*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74064*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24689: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8800fff; valaddr_reg:x3; val_offset:74067*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74067*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24690: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8801fff; valaddr_reg:x3; val_offset:74070*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74070*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24691: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8803fff; valaddr_reg:x3; val_offset:74073*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74073*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24692: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8807fff; valaddr_reg:x3; val_offset:74076*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74076*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24693: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe880ffff; valaddr_reg:x3; val_offset:74079*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74079*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24694: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe881ffff; valaddr_reg:x3; val_offset:74082*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74082*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24695: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe883ffff; valaddr_reg:x3; val_offset:74085*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74085*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24696: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe887ffff; valaddr_reg:x3; val_offset:74088*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74088*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24697: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe88fffff; valaddr_reg:x3; val_offset:74091*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74091*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24698: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe89fffff; valaddr_reg:x3; val_offset:74094*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74094*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24699: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8bfffff; valaddr_reg:x3; val_offset:74097*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74097*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24700: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8c00000; valaddr_reg:x3; val_offset:74100*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74100*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24701: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8e00000; valaddr_reg:x3; val_offset:74103*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74103*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24702: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8f00000; valaddr_reg:x3; val_offset:74106*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74106*0 + 3*192*FLEN/8, x4, x1, x2) + +inst_24703: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8f80000; valaddr_reg:x3; val_offset:74109*0 + 3*192*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74109*0 + 3*192*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(851443712,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(853540864,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(854589440,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855113728,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855375872,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855506944,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855572480,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855605248,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855621632,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855629824,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855633920,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855635968,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855636992,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855637504,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855637760,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855637888,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855637952,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855637984,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855638000,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855638008,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855638012,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855638014,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(855638015,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2129889542,32,FLEN) +NAN_BOXED(4408979,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122317824,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122317825,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122317827,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122317831,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122317839,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122317855,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122317887,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122317951,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122318079,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122318335,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122318847,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122319871,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122321919,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122326015,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122334207,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122350591,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122383359,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122448895,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122579967,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2122842111,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2123366399,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2124414975,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2126512127,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2126512128,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2128609280,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2129657856,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130182144,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130444288,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130575360,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130640896,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130673664,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130690048,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130698240,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130702336,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130704384,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130705408,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130705920,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706176,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706304,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706368,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706400,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706416,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706424,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706428,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706430,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706431,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2129960965,32,FLEN) +NAN_BOXED(1074131888,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702720,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702721,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702723,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702727,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702735,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702751,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702783,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702847,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900702975,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900703231,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900703743,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900704767,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900706815,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900710911,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900719103,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900735487,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900768255,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900833791,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3900964863,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3901227007,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3901751295,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3902799871,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3904897023,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3904897024,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3906994176,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3908042752,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3908567040,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-194.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-194.S new file mode 100644 index 000000000..0742cc4b1 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-194.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_24704: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fc0000; valaddr_reg:x3; val_offset:74112*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74112*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24705: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fe0000; valaddr_reg:x3; val_offset:74115*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74115*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24706: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ff0000; valaddr_reg:x3; val_offset:74118*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74118*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24707: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ff8000; valaddr_reg:x3; val_offset:74121*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74121*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24708: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ffc000; valaddr_reg:x3; val_offset:74124*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74124*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24709: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ffe000; valaddr_reg:x3; val_offset:74127*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74127*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24710: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fff000; valaddr_reg:x3; val_offset:74130*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74130*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24711: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fff800; valaddr_reg:x3; val_offset:74133*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74133*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24712: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fffc00; valaddr_reg:x3; val_offset:74136*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74136*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24713: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fffe00; valaddr_reg:x3; val_offset:74139*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74139*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24714: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ffff00; valaddr_reg:x3; val_offset:74142*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74142*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24715: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ffff80; valaddr_reg:x3; val_offset:74145*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74145*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24716: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ffffc0; valaddr_reg:x3; val_offset:74148*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74148*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24717: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ffffe0; valaddr_reg:x3; val_offset:74151*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74151*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24718: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fffff0; valaddr_reg:x3; val_offset:74154*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74154*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24719: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fffff8; valaddr_reg:x3; val_offset:74157*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74157*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24720: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fffffc; valaddr_reg:x3; val_offset:74160*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74160*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24721: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8fffffe; valaddr_reg:x3; val_offset:74163*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74163*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24722: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xd1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xe8ffffff; valaddr_reg:x3; val_offset:74166*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74166*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24723: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff000001; valaddr_reg:x3; val_offset:74169*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74169*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24724: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff000003; valaddr_reg:x3; val_offset:74172*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74172*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24725: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff000007; valaddr_reg:x3; val_offset:74175*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74175*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24726: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff199999; valaddr_reg:x3; val_offset:74178*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74178*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24727: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff249249; valaddr_reg:x3; val_offset:74181*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74181*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24728: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff333333; valaddr_reg:x3; val_offset:74184*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74184*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24729: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:74187*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74187*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24730: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:74190*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74190*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24731: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff444444; valaddr_reg:x3; val_offset:74193*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74193*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24732: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:74196*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74196*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24733: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:74199*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74199*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24734: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff666666; valaddr_reg:x3; val_offset:74202*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74202*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24735: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:74205*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74205*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24736: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:74208*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74208*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24737: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:74211*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74211*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24738: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x74b97b and fs2 == 1 and fe2 == 0x80 and fm2 == 0x05e5c0 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef4b97b; op2val:0xc005e5c0; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:74214*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74214*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24739: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x0; valaddr_reg:x3; val_offset:74217*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74217*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24740: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:74220*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74220*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24741: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:74223*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74223*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24742: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:74226*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74226*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24743: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0xf; valaddr_reg:x3; val_offset:74229*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74229*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24744: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x1f; valaddr_reg:x3; val_offset:74232*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74232*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24745: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x3f; valaddr_reg:x3; val_offset:74235*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74235*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24746: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7f; valaddr_reg:x3; val_offset:74238*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74238*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24747: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0xff; valaddr_reg:x3; val_offset:74241*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74241*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24748: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x1ff; valaddr_reg:x3; val_offset:74244*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74244*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24749: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x3ff; valaddr_reg:x3; val_offset:74247*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74247*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24750: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ff; valaddr_reg:x3; val_offset:74250*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74250*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24751: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0xfff; valaddr_reg:x3; val_offset:74253*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74253*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24752: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x1fff; valaddr_reg:x3; val_offset:74256*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74256*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24753: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x3fff; valaddr_reg:x3; val_offset:74259*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74259*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24754: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7fff; valaddr_reg:x3; val_offset:74262*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74262*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24755: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0xffff; valaddr_reg:x3; val_offset:74265*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74265*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24756: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x1ffff; valaddr_reg:x3; val_offset:74268*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74268*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24757: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x3ffff; valaddr_reg:x3; val_offset:74271*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74271*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24758: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ffff; valaddr_reg:x3; val_offset:74274*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74274*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24759: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0xfffff; valaddr_reg:x3; val_offset:74277*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74277*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24760: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:74280*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74280*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24761: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x1fffff; valaddr_reg:x3; val_offset:74283*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74283*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24762: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:74286*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74286*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24763: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:74289*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74289*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24764: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:74292*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74292*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24765: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:74295*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74295*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24766: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x3fffff; valaddr_reg:x3; val_offset:74298*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74298*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24767: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x400000; valaddr_reg:x3; val_offset:74301*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74301*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24768: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:74304*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74304*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24769: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:74307*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74307*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24770: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:74310*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74310*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24771: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x600000; valaddr_reg:x3; val_offset:74313*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74313*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24772: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:74316*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74316*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24773: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:74319*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74319*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24774: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x700000; valaddr_reg:x3; val_offset:74322*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74322*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24775: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x780000; valaddr_reg:x3; val_offset:74325*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74325*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24776: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7c0000; valaddr_reg:x3; val_offset:74328*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74328*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24777: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7e0000; valaddr_reg:x3; val_offset:74331*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74331*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24778: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7f0000; valaddr_reg:x3; val_offset:74334*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74334*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24779: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7f8000; valaddr_reg:x3; val_offset:74337*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74337*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24780: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7fc000; valaddr_reg:x3; val_offset:74340*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74340*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24781: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7fe000; valaddr_reg:x3; val_offset:74343*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74343*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24782: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ff000; valaddr_reg:x3; val_offset:74346*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74346*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24783: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ff800; valaddr_reg:x3; val_offset:74349*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74349*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24784: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ffc00; valaddr_reg:x3; val_offset:74352*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74352*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24785: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ffe00; valaddr_reg:x3; val_offset:74355*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74355*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24786: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7fff00; valaddr_reg:x3; val_offset:74358*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74358*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24787: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7fff80; valaddr_reg:x3; val_offset:74361*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74361*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24788: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7fffc0; valaddr_reg:x3; val_offset:74364*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74364*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24789: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7fffe0; valaddr_reg:x3; val_offset:74367*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74367*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24790: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ffff0; valaddr_reg:x3; val_offset:74370*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74370*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24791: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:74373*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74373*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24792: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:74376*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74376*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24793: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:74379*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74379*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24794: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7521af and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef521af; op2val:0x0; +op3val:0x7fffff; valaddr_reg:x3; val_offset:74382*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74382*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24795: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:74385*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74385*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24796: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:74388*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74388*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24797: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:74391*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74391*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24798: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:74394*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74394*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24799: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:74397*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74397*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24800: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:74400*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74400*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24801: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:74403*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74403*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24802: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:74406*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74406*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24803: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:74409*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74409*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24804: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:74412*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74412*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24805: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:74415*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74415*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24806: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:74418*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74418*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24807: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:74421*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74421*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24808: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:74424*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74424*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24809: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:74427*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74427*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24810: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:74430*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74430*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24811: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe800000; valaddr_reg:x3; val_offset:74433*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74433*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24812: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe800001; valaddr_reg:x3; val_offset:74436*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74436*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24813: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe800003; valaddr_reg:x3; val_offset:74439*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74439*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24814: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe800007; valaddr_reg:x3; val_offset:74442*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74442*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24815: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe80000f; valaddr_reg:x3; val_offset:74445*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74445*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24816: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe80001f; valaddr_reg:x3; val_offset:74448*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74448*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24817: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe80003f; valaddr_reg:x3; val_offset:74451*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74451*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24818: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe80007f; valaddr_reg:x3; val_offset:74454*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74454*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24819: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe8000ff; valaddr_reg:x3; val_offset:74457*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74457*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24820: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe8001ff; valaddr_reg:x3; val_offset:74460*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74460*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24821: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe8003ff; valaddr_reg:x3; val_offset:74463*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74463*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24822: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe8007ff; valaddr_reg:x3; val_offset:74466*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74466*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24823: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe800fff; valaddr_reg:x3; val_offset:74469*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74469*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24824: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe801fff; valaddr_reg:x3; val_offset:74472*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74472*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24825: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe803fff; valaddr_reg:x3; val_offset:74475*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74475*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24826: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe807fff; valaddr_reg:x3; val_offset:74478*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74478*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24827: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe80ffff; valaddr_reg:x3; val_offset:74481*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74481*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24828: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe81ffff; valaddr_reg:x3; val_offset:74484*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74484*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24829: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe83ffff; valaddr_reg:x3; val_offset:74487*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74487*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24830: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe87ffff; valaddr_reg:x3; val_offset:74490*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74490*0 + 3*193*FLEN/8, x4, x1, x2) + +inst_24831: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe8fffff; valaddr_reg:x3; val_offset:74493*0 + 3*193*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74493*0 + 3*193*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3908829184,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3908960256,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909025792,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909058560,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909074944,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909083136,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909087232,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909089280,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909090304,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909090816,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091072,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091200,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091264,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091296,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091312,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091320,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091324,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091326,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(3909091327,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2129967483,32,FLEN) +NAN_BOXED(3221611968,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(63,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(511,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1023,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2047,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4095,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8191,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16383,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32767,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65535,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(131071,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(524287,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1048575,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2097151,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194303,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194304,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6291456,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7340032,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7864320,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8126464,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8257536,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8323072,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8355840,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8372224,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8380416,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8384512,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8386560,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8387584,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388096,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388352,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388480,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388544,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388576,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388592,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2129994159,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388607,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269632,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269633,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269635,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269639,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269647,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269663,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269695,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269759,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269887,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243270143,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243270655,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243271679,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243273727,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243277823,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243286015,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243302399,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243335167,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243400703,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243531775,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243793919,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(244318207,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-195.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-195.S new file mode 100644 index 000000000..0f4741237 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-195.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_24832: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xe9fffff; valaddr_reg:x3; val_offset:74496*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74496*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24833: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xebfffff; valaddr_reg:x3; val_offset:74499*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74499*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24834: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xec00000; valaddr_reg:x3; val_offset:74502*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74502*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24835: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xee00000; valaddr_reg:x3; val_offset:74505*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74505*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24836: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xef00000; valaddr_reg:x3; val_offset:74508*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74508*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24837: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xef80000; valaddr_reg:x3; val_offset:74511*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74511*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24838: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefc0000; valaddr_reg:x3; val_offset:74514*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74514*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24839: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefe0000; valaddr_reg:x3; val_offset:74517*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74517*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24840: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeff0000; valaddr_reg:x3; val_offset:74520*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74520*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24841: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeff8000; valaddr_reg:x3; val_offset:74523*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74523*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24842: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeffc000; valaddr_reg:x3; val_offset:74526*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74526*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24843: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeffe000; valaddr_reg:x3; val_offset:74529*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74529*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24844: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefff000; valaddr_reg:x3; val_offset:74532*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74532*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24845: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefff800; valaddr_reg:x3; val_offset:74535*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74535*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24846: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefffc00; valaddr_reg:x3; val_offset:74538*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74538*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24847: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefffe00; valaddr_reg:x3; val_offset:74541*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74541*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24848: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeffff00; valaddr_reg:x3; val_offset:74544*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74544*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24849: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeffff80; valaddr_reg:x3; val_offset:74547*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74547*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24850: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeffffc0; valaddr_reg:x3; val_offset:74550*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74550*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24851: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeffffe0; valaddr_reg:x3; val_offset:74553*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74553*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24852: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefffff0; valaddr_reg:x3; val_offset:74556*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74556*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24853: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefffff8; valaddr_reg:x3; val_offset:74559*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74559*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24854: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefffffc; valaddr_reg:x3; val_offset:74562*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74562*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24855: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xefffffe; valaddr_reg:x3; val_offset:74565*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74565*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24856: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75544f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5544f; op2val:0x0; +op3val:0xeffffff; valaddr_reg:x3; val_offset:74568*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74568*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24857: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:74571*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74571*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24858: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:74574*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74574*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24859: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:74577*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74577*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24860: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:74580*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74580*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24861: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:74583*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74583*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24862: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:74586*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74586*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24863: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:74589*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74589*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24864: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:74592*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74592*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24865: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:74595*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74595*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24866: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:74598*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74598*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24867: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:74601*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74601*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24868: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:74604*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74604*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24869: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:74607*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74607*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24870: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:74610*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74610*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24871: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:74613*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74613*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24872: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:74616*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74616*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24873: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc800000; valaddr_reg:x3; val_offset:74619*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74619*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24874: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc800001; valaddr_reg:x3; val_offset:74622*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74622*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24875: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc800003; valaddr_reg:x3; val_offset:74625*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74625*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24876: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc800007; valaddr_reg:x3; val_offset:74628*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74628*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24877: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc80000f; valaddr_reg:x3; val_offset:74631*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74631*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24878: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc80001f; valaddr_reg:x3; val_offset:74634*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74634*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24879: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc80003f; valaddr_reg:x3; val_offset:74637*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74637*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24880: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc80007f; valaddr_reg:x3; val_offset:74640*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74640*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24881: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc8000ff; valaddr_reg:x3; val_offset:74643*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74643*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24882: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc8001ff; valaddr_reg:x3; val_offset:74646*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74646*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24883: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc8003ff; valaddr_reg:x3; val_offset:74649*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74649*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24884: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc8007ff; valaddr_reg:x3; val_offset:74652*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74652*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24885: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc800fff; valaddr_reg:x3; val_offset:74655*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74655*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24886: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc801fff; valaddr_reg:x3; val_offset:74658*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74658*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24887: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc803fff; valaddr_reg:x3; val_offset:74661*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74661*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24888: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc807fff; valaddr_reg:x3; val_offset:74664*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74664*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24889: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc80ffff; valaddr_reg:x3; val_offset:74667*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74667*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24890: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc81ffff; valaddr_reg:x3; val_offset:74670*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74670*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24891: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc83ffff; valaddr_reg:x3; val_offset:74673*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74673*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24892: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc87ffff; valaddr_reg:x3; val_offset:74676*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74676*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24893: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc8fffff; valaddr_reg:x3; val_offset:74679*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74679*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24894: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xc9fffff; valaddr_reg:x3; val_offset:74682*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74682*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24895: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcbfffff; valaddr_reg:x3; val_offset:74685*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74685*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24896: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcc00000; valaddr_reg:x3; val_offset:74688*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74688*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24897: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xce00000; valaddr_reg:x3; val_offset:74691*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74691*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24898: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcf00000; valaddr_reg:x3; val_offset:74694*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74694*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24899: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcf80000; valaddr_reg:x3; val_offset:74697*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74697*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24900: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfc0000; valaddr_reg:x3; val_offset:74700*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74700*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24901: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfe0000; valaddr_reg:x3; val_offset:74703*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74703*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24902: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcff0000; valaddr_reg:x3; val_offset:74706*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74706*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24903: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcff8000; valaddr_reg:x3; val_offset:74709*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74709*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24904: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcffc000; valaddr_reg:x3; val_offset:74712*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74712*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24905: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcffe000; valaddr_reg:x3; val_offset:74715*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74715*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24906: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfff000; valaddr_reg:x3; val_offset:74718*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74718*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24907: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfff800; valaddr_reg:x3; val_offset:74721*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74721*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24908: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfffc00; valaddr_reg:x3; val_offset:74724*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74724*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24909: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfffe00; valaddr_reg:x3; val_offset:74727*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74727*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24910: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcffff00; valaddr_reg:x3; val_offset:74730*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74730*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24911: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcffff80; valaddr_reg:x3; val_offset:74733*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74733*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24912: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcffffc0; valaddr_reg:x3; val_offset:74736*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74736*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24913: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcffffe0; valaddr_reg:x3; val_offset:74739*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74739*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24914: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfffff0; valaddr_reg:x3; val_offset:74742*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74742*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24915: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfffff8; valaddr_reg:x3; val_offset:74745*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74745*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24916: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfffffc; valaddr_reg:x3; val_offset:74748*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74748*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24917: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcfffffe; valaddr_reg:x3; val_offset:74751*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74751*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24918: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x75ec2d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef5ec2d; op2val:0x0; +op3val:0xcffffff; valaddr_reg:x3; val_offset:74754*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74754*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24919: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:74757*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74757*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24920: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:74760*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74760*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24921: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:74763*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74763*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24922: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:74766*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74766*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24923: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:74769*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74769*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24924: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:74772*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74772*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24925: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:74775*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74775*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24926: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:74778*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74778*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24927: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:74781*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74781*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24928: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:74784*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74784*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24929: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:74787*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74787*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24930: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:74790*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74790*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24931: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:74793*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74793*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24932: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:74796*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74796*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24933: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:74799*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74799*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24934: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:74802*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74802*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24935: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a800000; valaddr_reg:x3; val_offset:74805*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74805*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24936: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a800001; valaddr_reg:x3; val_offset:74808*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74808*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24937: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a800003; valaddr_reg:x3; val_offset:74811*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74811*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24938: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a800007; valaddr_reg:x3; val_offset:74814*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74814*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24939: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a80000f; valaddr_reg:x3; val_offset:74817*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74817*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24940: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a80001f; valaddr_reg:x3; val_offset:74820*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74820*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24941: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a80003f; valaddr_reg:x3; val_offset:74823*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74823*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24942: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a80007f; valaddr_reg:x3; val_offset:74826*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74826*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24943: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a8000ff; valaddr_reg:x3; val_offset:74829*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74829*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24944: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a8001ff; valaddr_reg:x3; val_offset:74832*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74832*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24945: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a8003ff; valaddr_reg:x3; val_offset:74835*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74835*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24946: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a8007ff; valaddr_reg:x3; val_offset:74838*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74838*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24947: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a800fff; valaddr_reg:x3; val_offset:74841*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74841*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24948: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a801fff; valaddr_reg:x3; val_offset:74844*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74844*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24949: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a803fff; valaddr_reg:x3; val_offset:74847*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74847*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24950: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a807fff; valaddr_reg:x3; val_offset:74850*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74850*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24951: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a80ffff; valaddr_reg:x3; val_offset:74853*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74853*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24952: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a81ffff; valaddr_reg:x3; val_offset:74856*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74856*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24953: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a83ffff; valaddr_reg:x3; val_offset:74859*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74859*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24954: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a87ffff; valaddr_reg:x3; val_offset:74862*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74862*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24955: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a8fffff; valaddr_reg:x3; val_offset:74865*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74865*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24956: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8a9fffff; valaddr_reg:x3; val_offset:74868*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74868*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24957: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8abfffff; valaddr_reg:x3; val_offset:74871*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74871*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24958: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8ac00000; valaddr_reg:x3; val_offset:74874*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74874*0 + 3*194*FLEN/8, x4, x1, x2) + +inst_24959: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8ae00000; valaddr_reg:x3; val_offset:74877*0 + 3*194*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74877*0 + 3*194*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(245366783,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(247463935,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(247463936,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(249561088,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(250609664,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251133952,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251396096,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251527168,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251592704,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251625472,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251641856,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251650048,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251654144,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251656192,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657216,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657728,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657984,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658112,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658176,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658208,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658224,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658232,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658236,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658238,32,FLEN) +NAN_BOXED(2130007119,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658239,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715200,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715201,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715203,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715207,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715215,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715231,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715263,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715327,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715455,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715711,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209716223,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209717247,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209719295,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209723391,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209731583,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209747967,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209780735,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209846271,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209977343,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(210239487,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(210763775,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(211812351,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(213909503,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(213909504,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(216006656,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217055232,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217579520,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217841664,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217972736,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218038272,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218071040,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218087424,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218095616,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218099712,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218101760,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218102784,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103296,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103552,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103680,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103744,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103776,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103792,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103800,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103804,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103806,32,FLEN) +NAN_BOXED(2130045997,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103807,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644416,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644417,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644419,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644423,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644431,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644447,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644479,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644543,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644671,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644927,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323645439,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323646463,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323648511,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323652607,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323660799,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323677183,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323709951,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323775487,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323906559,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2324168703,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2324692991,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2325741567,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2327838719,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2327838720,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2329935872,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-196.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-196.S new file mode 100644 index 000000000..6c27a325a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-196.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_24960: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8af00000; valaddr_reg:x3; val_offset:74880*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74880*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24961: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8af80000; valaddr_reg:x3; val_offset:74883*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74883*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24962: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afc0000; valaddr_reg:x3; val_offset:74886*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74886*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24963: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afe0000; valaddr_reg:x3; val_offset:74889*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74889*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24964: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8aff0000; valaddr_reg:x3; val_offset:74892*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74892*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24965: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8aff8000; valaddr_reg:x3; val_offset:74895*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74895*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24966: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8affc000; valaddr_reg:x3; val_offset:74898*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74898*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24967: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8affe000; valaddr_reg:x3; val_offset:74901*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74901*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24968: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afff000; valaddr_reg:x3; val_offset:74904*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74904*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24969: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afff800; valaddr_reg:x3; val_offset:74907*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74907*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24970: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afffc00; valaddr_reg:x3; val_offset:74910*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74910*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24971: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afffe00; valaddr_reg:x3; val_offset:74913*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74913*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24972: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8affff00; valaddr_reg:x3; val_offset:74916*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74916*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24973: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8affff80; valaddr_reg:x3; val_offset:74919*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74919*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24974: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8affffc0; valaddr_reg:x3; val_offset:74922*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74922*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24975: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8affffe0; valaddr_reg:x3; val_offset:74925*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74925*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24976: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afffff0; valaddr_reg:x3; val_offset:74928*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74928*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24977: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afffff8; valaddr_reg:x3; val_offset:74931*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74931*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24978: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afffffc; valaddr_reg:x3; val_offset:74934*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74934*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24979: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8afffffe; valaddr_reg:x3; val_offset:74937*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74937*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24980: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x762497 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef62497; op2val:0x80000000; +op3val:0x8affffff; valaddr_reg:x3; val_offset:74940*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74940*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24981: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28800000; valaddr_reg:x3; val_offset:74943*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74943*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24982: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28800001; valaddr_reg:x3; val_offset:74946*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74946*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24983: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28800003; valaddr_reg:x3; val_offset:74949*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74949*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24984: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28800007; valaddr_reg:x3; val_offset:74952*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74952*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24985: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x2880000f; valaddr_reg:x3; val_offset:74955*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74955*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24986: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x2880001f; valaddr_reg:x3; val_offset:74958*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74958*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24987: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x2880003f; valaddr_reg:x3; val_offset:74961*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74961*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24988: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x2880007f; valaddr_reg:x3; val_offset:74964*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74964*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24989: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x288000ff; valaddr_reg:x3; val_offset:74967*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74967*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24990: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x288001ff; valaddr_reg:x3; val_offset:74970*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74970*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24991: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x288003ff; valaddr_reg:x3; val_offset:74973*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74973*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24992: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x288007ff; valaddr_reg:x3; val_offset:74976*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74976*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24993: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28800fff; valaddr_reg:x3; val_offset:74979*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74979*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24994: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28801fff; valaddr_reg:x3; val_offset:74982*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74982*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24995: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28803fff; valaddr_reg:x3; val_offset:74985*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74985*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24996: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28807fff; valaddr_reg:x3; val_offset:74988*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74988*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24997: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x2880ffff; valaddr_reg:x3; val_offset:74991*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74991*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24998: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x2881ffff; valaddr_reg:x3; val_offset:74994*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74994*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_24999: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x2883ffff; valaddr_reg:x3; val_offset:74997*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 74997*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25000: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x2887ffff; valaddr_reg:x3; val_offset:75000*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75000*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25001: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x288fffff; valaddr_reg:x3; val_offset:75003*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75003*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25002: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x289fffff; valaddr_reg:x3; val_offset:75006*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75006*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25003: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28bfffff; valaddr_reg:x3; val_offset:75009*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75009*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25004: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28c00000; valaddr_reg:x3; val_offset:75012*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75012*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25005: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28e00000; valaddr_reg:x3; val_offset:75015*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75015*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25006: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28f00000; valaddr_reg:x3; val_offset:75018*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75018*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25007: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28f80000; valaddr_reg:x3; val_offset:75021*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75021*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25008: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fc0000; valaddr_reg:x3; val_offset:75024*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75024*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25009: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fe0000; valaddr_reg:x3; val_offset:75027*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75027*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25010: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ff0000; valaddr_reg:x3; val_offset:75030*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75030*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25011: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ff8000; valaddr_reg:x3; val_offset:75033*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75033*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25012: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ffc000; valaddr_reg:x3; val_offset:75036*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75036*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25013: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ffe000; valaddr_reg:x3; val_offset:75039*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75039*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25014: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fff000; valaddr_reg:x3; val_offset:75042*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75042*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25015: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fff800; valaddr_reg:x3; val_offset:75045*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75045*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25016: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fffc00; valaddr_reg:x3; val_offset:75048*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75048*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25017: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fffe00; valaddr_reg:x3; val_offset:75051*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75051*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25018: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ffff00; valaddr_reg:x3; val_offset:75054*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75054*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25019: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ffff80; valaddr_reg:x3; val_offset:75057*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75057*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25020: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ffffc0; valaddr_reg:x3; val_offset:75060*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75060*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25021: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ffffe0; valaddr_reg:x3; val_offset:75063*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75063*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25022: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fffff0; valaddr_reg:x3; val_offset:75066*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75066*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25023: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fffff8; valaddr_reg:x3; val_offset:75069*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75069*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25024: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fffffc; valaddr_reg:x3; val_offset:75072*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75072*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25025: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28fffffe; valaddr_reg:x3; val_offset:75075*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75075*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25026: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x51 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x28ffffff; valaddr_reg:x3; val_offset:75078*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75078*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25027: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3f800001; valaddr_reg:x3; val_offset:75081*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75081*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25028: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3f800003; valaddr_reg:x3; val_offset:75084*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75084*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25029: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3f800007; valaddr_reg:x3; val_offset:75087*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75087*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25030: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3f999999; valaddr_reg:x3; val_offset:75090*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75090*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25031: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:75093*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75093*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25032: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:75096*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75096*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25033: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:75099*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75099*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25034: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:75102*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75102*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25035: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:75105*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75105*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25036: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:75108*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75108*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25037: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:75111*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75111*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25038: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:75114*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75114*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25039: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:75117*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75117*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25040: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:75120*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75120*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25041: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:75123*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75123*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25042: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x763835 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x428acf and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef63835; op2val:0x428acf; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:75126*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75126*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25043: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbf800001; valaddr_reg:x3; val_offset:75129*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75129*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25044: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbf800003; valaddr_reg:x3; val_offset:75132*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75132*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25045: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbf800007; valaddr_reg:x3; val_offset:75135*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75135*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25046: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbf999999; valaddr_reg:x3; val_offset:75138*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75138*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25047: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:75141*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75141*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25048: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:75144*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75144*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25049: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:75147*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75147*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25050: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:75150*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75150*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25051: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:75153*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75153*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25052: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:75156*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75156*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25053: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:75159*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75159*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25054: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:75162*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75162*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25055: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:75165*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75165*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25056: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:75168*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75168*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25057: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:75171*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75171*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25058: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:75174*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75174*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25059: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9000000; valaddr_reg:x3; val_offset:75177*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75177*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25060: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9000001; valaddr_reg:x3; val_offset:75180*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75180*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25061: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9000003; valaddr_reg:x3; val_offset:75183*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75183*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25062: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9000007; valaddr_reg:x3; val_offset:75186*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75186*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25063: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc900000f; valaddr_reg:x3; val_offset:75189*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75189*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25064: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc900001f; valaddr_reg:x3; val_offset:75192*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75192*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25065: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc900003f; valaddr_reg:x3; val_offset:75195*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75195*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25066: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc900007f; valaddr_reg:x3; val_offset:75198*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75198*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25067: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc90000ff; valaddr_reg:x3; val_offset:75201*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75201*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25068: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc90001ff; valaddr_reg:x3; val_offset:75204*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75204*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25069: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc90003ff; valaddr_reg:x3; val_offset:75207*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75207*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25070: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc90007ff; valaddr_reg:x3; val_offset:75210*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75210*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25071: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9000fff; valaddr_reg:x3; val_offset:75213*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75213*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25072: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9001fff; valaddr_reg:x3; val_offset:75216*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75216*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25073: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9003fff; valaddr_reg:x3; val_offset:75219*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75219*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25074: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9007fff; valaddr_reg:x3; val_offset:75222*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75222*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25075: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc900ffff; valaddr_reg:x3; val_offset:75225*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75225*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25076: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc901ffff; valaddr_reg:x3; val_offset:75228*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75228*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25077: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc903ffff; valaddr_reg:x3; val_offset:75231*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75231*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25078: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc907ffff; valaddr_reg:x3; val_offset:75234*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75234*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25079: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc90fffff; valaddr_reg:x3; val_offset:75237*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75237*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25080: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc91fffff; valaddr_reg:x3; val_offset:75240*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75240*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25081: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc93fffff; valaddr_reg:x3; val_offset:75243*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75243*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25082: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9400000; valaddr_reg:x3; val_offset:75246*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75246*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25083: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9600000; valaddr_reg:x3; val_offset:75249*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75249*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25084: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9700000; valaddr_reg:x3; val_offset:75252*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75252*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25085: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc9780000; valaddr_reg:x3; val_offset:75255*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75255*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25086: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97c0000; valaddr_reg:x3; val_offset:75258*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75258*0 + 3*195*FLEN/8, x4, x1, x2) + +inst_25087: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97e0000; valaddr_reg:x3; val_offset:75261*0 + 3*195*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75261*0 + 3*195*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2330984448,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331508736,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331770880,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331901952,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331967488,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332000256,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332016640,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332024832,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332028928,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332030976,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032000,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032512,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032768,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032896,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032960,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032992,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033008,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033016,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033020,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033022,32,FLEN) +NAN_BOXED(2130060439,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033023,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477248,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477249,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477251,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477255,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477263,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477279,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477311,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477375,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477503,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679477759,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679478271,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679479295,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679481343,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679485439,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679493631,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679510015,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679542783,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679608319,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(679739391,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(680001535,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(680525823,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(681574399,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(683671551,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(683671552,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(685768704,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(686817280,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687341568,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687603712,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687734784,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687800320,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687833088,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687849472,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687857664,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687861760,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687863808,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687864832,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865344,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865600,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865728,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865792,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865824,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865840,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865848,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865852,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865854,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(687865855,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130065461,32,FLEN) +NAN_BOXED(4360911,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220416,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220417,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220419,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220423,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220431,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220447,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220479,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220543,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220671,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372220927,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372221439,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372222463,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372224511,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372228607,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372236799,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372253183,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372285951,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372351487,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372482559,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3372744703,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3373268991,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3374317567,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3376414719,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3376414720,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3378511872,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3379560448,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380084736,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380346880,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380477952,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-197.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-197.S new file mode 100644 index 000000000..8684b8c90 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-197.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_25088: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97f0000; valaddr_reg:x3; val_offset:75264*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75264*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25089: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97f8000; valaddr_reg:x3; val_offset:75267*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75267*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25090: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97fc000; valaddr_reg:x3; val_offset:75270*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75270*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25091: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97fe000; valaddr_reg:x3; val_offset:75273*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75273*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25092: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97ff000; valaddr_reg:x3; val_offset:75276*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75276*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25093: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97ff800; valaddr_reg:x3; val_offset:75279*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75279*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25094: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97ffc00; valaddr_reg:x3; val_offset:75282*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75282*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25095: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97ffe00; valaddr_reg:x3; val_offset:75285*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75285*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25096: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97fff00; valaddr_reg:x3; val_offset:75288*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75288*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25097: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97fff80; valaddr_reg:x3; val_offset:75291*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75291*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25098: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97fffc0; valaddr_reg:x3; val_offset:75294*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75294*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25099: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97fffe0; valaddr_reg:x3; val_offset:75297*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75297*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25100: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97ffff0; valaddr_reg:x3; val_offset:75300*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75300*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25101: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97ffff8; valaddr_reg:x3; val_offset:75303*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75303*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25102: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97ffffc; valaddr_reg:x3; val_offset:75306*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75306*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25103: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97ffffe; valaddr_reg:x3; val_offset:75309*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75309*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25104: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7759e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x423ce2 and fs3 == 1 and fe3 == 0x92 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef759e0; op2val:0x80423ce2; +op3val:0xc97fffff; valaddr_reg:x3; val_offset:75312*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75312*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25105: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbf800001; valaddr_reg:x3; val_offset:75315*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75315*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25106: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbf800003; valaddr_reg:x3; val_offset:75318*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75318*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25107: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbf800007; valaddr_reg:x3; val_offset:75321*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75321*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25108: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbf999999; valaddr_reg:x3; val_offset:75324*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75324*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25109: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:75327*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75327*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25110: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:75330*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75330*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25111: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:75333*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75333*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25112: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:75336*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75336*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25113: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:75339*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75339*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25114: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:75342*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75342*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25115: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:75345*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75345*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25116: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:75348*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75348*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25117: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:75351*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75351*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25118: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:75354*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75354*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25119: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:75357*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75357*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25120: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:75360*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75360*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25121: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1800000; valaddr_reg:x3; val_offset:75363*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75363*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25122: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1800001; valaddr_reg:x3; val_offset:75366*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75366*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25123: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1800003; valaddr_reg:x3; val_offset:75369*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75369*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25124: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1800007; valaddr_reg:x3; val_offset:75372*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75372*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25125: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc180000f; valaddr_reg:x3; val_offset:75375*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75375*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25126: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc180001f; valaddr_reg:x3; val_offset:75378*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75378*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25127: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc180003f; valaddr_reg:x3; val_offset:75381*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75381*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25128: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc180007f; valaddr_reg:x3; val_offset:75384*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75384*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25129: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc18000ff; valaddr_reg:x3; val_offset:75387*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75387*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25130: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc18001ff; valaddr_reg:x3; val_offset:75390*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75390*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25131: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc18003ff; valaddr_reg:x3; val_offset:75393*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75393*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25132: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc18007ff; valaddr_reg:x3; val_offset:75396*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75396*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25133: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1800fff; valaddr_reg:x3; val_offset:75399*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75399*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25134: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1801fff; valaddr_reg:x3; val_offset:75402*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75402*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25135: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1803fff; valaddr_reg:x3; val_offset:75405*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75405*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25136: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1807fff; valaddr_reg:x3; val_offset:75408*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75408*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25137: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc180ffff; valaddr_reg:x3; val_offset:75411*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75411*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25138: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc181ffff; valaddr_reg:x3; val_offset:75414*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75414*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25139: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc183ffff; valaddr_reg:x3; val_offset:75417*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75417*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25140: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc187ffff; valaddr_reg:x3; val_offset:75420*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75420*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25141: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc18fffff; valaddr_reg:x3; val_offset:75423*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75423*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25142: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc19fffff; valaddr_reg:x3; val_offset:75426*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75426*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25143: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1bfffff; valaddr_reg:x3; val_offset:75429*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75429*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25144: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1c00000; valaddr_reg:x3; val_offset:75432*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75432*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25145: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1e00000; valaddr_reg:x3; val_offset:75435*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75435*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25146: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1f00000; valaddr_reg:x3; val_offset:75438*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75438*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25147: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1f80000; valaddr_reg:x3; val_offset:75441*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75441*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25148: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fc0000; valaddr_reg:x3; val_offset:75444*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75444*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25149: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fe0000; valaddr_reg:x3; val_offset:75447*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75447*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25150: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ff0000; valaddr_reg:x3; val_offset:75450*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75450*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25151: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ff8000; valaddr_reg:x3; val_offset:75453*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75453*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25152: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ffc000; valaddr_reg:x3; val_offset:75456*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75456*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25153: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ffe000; valaddr_reg:x3; val_offset:75459*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75459*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25154: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fff000; valaddr_reg:x3; val_offset:75462*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75462*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25155: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fff800; valaddr_reg:x3; val_offset:75465*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75465*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25156: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fffc00; valaddr_reg:x3; val_offset:75468*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75468*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25157: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fffe00; valaddr_reg:x3; val_offset:75471*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75471*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25158: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ffff00; valaddr_reg:x3; val_offset:75474*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75474*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25159: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ffff80; valaddr_reg:x3; val_offset:75477*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75477*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25160: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ffffc0; valaddr_reg:x3; val_offset:75480*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75480*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25161: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ffffe0; valaddr_reg:x3; val_offset:75483*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75483*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25162: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fffff0; valaddr_reg:x3; val_offset:75486*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75486*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25163: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fffff8; valaddr_reg:x3; val_offset:75489*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75489*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25164: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fffffc; valaddr_reg:x3; val_offset:75492*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75492*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25165: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1fffffe; valaddr_reg:x3; val_offset:75495*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75495*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25166: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x77a83e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x4227ec and fs3 == 1 and fe3 == 0x83 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef7a83e; op2val:0x804227ec; +op3val:0xc1ffffff; valaddr_reg:x3; val_offset:75498*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75498*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25167: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3f800001; valaddr_reg:x3; val_offset:75501*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75501*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25168: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3f800003; valaddr_reg:x3; val_offset:75504*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75504*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25169: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3f800007; valaddr_reg:x3; val_offset:75507*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75507*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25170: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3f999999; valaddr_reg:x3; val_offset:75510*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75510*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25171: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:75513*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75513*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25172: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:75516*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75516*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25173: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:75519*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75519*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25174: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:75522*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75522*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25175: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:75525*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75525*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25176: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:75528*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75528*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25177: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:75531*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75531*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25178: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:75534*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75534*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25179: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:75537*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75537*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25180: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:75540*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75540*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25181: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:75543*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75543*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25182: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:75546*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75546*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25183: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c000000; valaddr_reg:x3; val_offset:75549*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75549*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25184: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c000001; valaddr_reg:x3; val_offset:75552*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75552*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25185: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c000003; valaddr_reg:x3; val_offset:75555*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75555*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25186: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c000007; valaddr_reg:x3; val_offset:75558*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75558*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25187: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c00000f; valaddr_reg:x3; val_offset:75561*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75561*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25188: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c00001f; valaddr_reg:x3; val_offset:75564*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75564*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25189: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c00003f; valaddr_reg:x3; val_offset:75567*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75567*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25190: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c00007f; valaddr_reg:x3; val_offset:75570*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75570*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25191: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c0000ff; valaddr_reg:x3; val_offset:75573*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75573*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25192: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c0001ff; valaddr_reg:x3; val_offset:75576*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75576*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25193: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c0003ff; valaddr_reg:x3; val_offset:75579*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75579*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25194: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c0007ff; valaddr_reg:x3; val_offset:75582*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75582*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25195: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c000fff; valaddr_reg:x3; val_offset:75585*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75585*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25196: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c001fff; valaddr_reg:x3; val_offset:75588*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75588*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25197: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c003fff; valaddr_reg:x3; val_offset:75591*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75591*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25198: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c007fff; valaddr_reg:x3; val_offset:75594*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75594*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25199: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c00ffff; valaddr_reg:x3; val_offset:75597*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75597*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25200: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c01ffff; valaddr_reg:x3; val_offset:75600*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75600*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25201: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c03ffff; valaddr_reg:x3; val_offset:75603*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75603*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25202: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c07ffff; valaddr_reg:x3; val_offset:75606*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75606*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25203: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c0fffff; valaddr_reg:x3; val_offset:75609*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75609*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25204: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c1fffff; valaddr_reg:x3; val_offset:75612*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75612*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25205: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c3fffff; valaddr_reg:x3; val_offset:75615*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75615*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25206: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c400000; valaddr_reg:x3; val_offset:75618*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75618*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25207: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c600000; valaddr_reg:x3; val_offset:75621*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75621*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25208: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c700000; valaddr_reg:x3; val_offset:75624*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75624*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25209: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c780000; valaddr_reg:x3; val_offset:75627*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75627*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25210: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7c0000; valaddr_reg:x3; val_offset:75630*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75630*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25211: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7e0000; valaddr_reg:x3; val_offset:75633*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75633*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25212: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7f0000; valaddr_reg:x3; val_offset:75636*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75636*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25213: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7f8000; valaddr_reg:x3; val_offset:75639*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75639*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25214: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7fc000; valaddr_reg:x3; val_offset:75642*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75642*0 + 3*196*FLEN/8, x4, x1, x2) + +inst_25215: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7fe000; valaddr_reg:x3; val_offset:75645*0 + 3*196*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75645*0 + 3*196*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380543488,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380576256,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380592640,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380600832,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380604928,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380606976,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380608000,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380608512,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380608768,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380608896,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380608960,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380608992,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380609008,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380609016,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380609020,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380609022,32,FLEN) +NAN_BOXED(2130139616,32,FLEN) +NAN_BOXED(2151824610,32,FLEN) +NAN_BOXED(3380609023,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391296,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391297,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391299,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391303,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391311,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391327,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391359,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391423,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391551,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246391807,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246392319,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246393343,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246395391,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246399487,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246407679,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246424063,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246456831,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246522367,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246653439,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3246915583,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3247439871,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3248488447,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3250585599,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3250585600,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3252682752,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3253731328,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254255616,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254517760,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254648832,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254714368,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254747136,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254763520,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254771712,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254775808,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254777856,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254778880,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779392,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779648,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779776,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779840,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779872,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779888,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779896,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779900,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779902,32,FLEN) +NAN_BOXED(2130159678,32,FLEN) +NAN_BOXED(2151819244,32,FLEN) +NAN_BOXED(3254779903,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068416,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068417,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068419,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068423,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068431,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068447,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068479,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068543,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068671,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275068927,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275069439,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275070463,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275072511,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275076607,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275084799,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275101183,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275133951,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275199487,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275330559,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1275592703,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1276116991,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1277165567,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1279262719,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1279262720,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1281359872,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1282408448,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1282932736,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283194880,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283325952,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283391488,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283424256,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283440640,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283448832,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-198.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-198.S new file mode 100644 index 000000000..2a6849677 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-198.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_25216: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7ff000; valaddr_reg:x3; val_offset:75648*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75648*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25217: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7ff800; valaddr_reg:x3; val_offset:75651*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75651*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25218: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7ffc00; valaddr_reg:x3; val_offset:75654*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75654*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25219: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7ffe00; valaddr_reg:x3; val_offset:75657*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75657*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25220: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7fff00; valaddr_reg:x3; val_offset:75660*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75660*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25221: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7fff80; valaddr_reg:x3; val_offset:75663*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75663*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25222: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7fffc0; valaddr_reg:x3; val_offset:75666*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75666*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25223: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7fffe0; valaddr_reg:x3; val_offset:75669*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75669*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25224: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7ffff0; valaddr_reg:x3; val_offset:75672*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75672*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25225: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7ffff8; valaddr_reg:x3; val_offset:75675*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75675*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25226: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7ffffc; valaddr_reg:x3; val_offset:75678*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75678*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25227: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7ffffe; valaddr_reg:x3; val_offset:75681*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75681*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25228: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7930c1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x41bfb8 and fs3 == 0 and fe3 == 0x98 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ef930c1; op2val:0x41bfb8; +op3val:0x4c7fffff; valaddr_reg:x3; val_offset:75684*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75684*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25229: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbf800001; valaddr_reg:x3; val_offset:75687*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75687*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25230: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbf800003; valaddr_reg:x3; val_offset:75690*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75690*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25231: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbf800007; valaddr_reg:x3; val_offset:75693*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75693*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25232: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbf999999; valaddr_reg:x3; val_offset:75696*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75696*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25233: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:75699*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75699*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25234: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:75702*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75702*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25235: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:75705*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75705*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25236: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:75708*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75708*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25237: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:75711*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75711*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25238: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:75714*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75714*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25239: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:75717*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75717*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25240: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:75720*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75720*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25241: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:75723*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75723*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25242: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:75726*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75726*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25243: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:75729*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75729*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25244: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:75732*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75732*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25245: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0800000; valaddr_reg:x3; val_offset:75735*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75735*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25246: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0800001; valaddr_reg:x3; val_offset:75738*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75738*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25247: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0800003; valaddr_reg:x3; val_offset:75741*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75741*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25248: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0800007; valaddr_reg:x3; val_offset:75744*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75744*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25249: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc080000f; valaddr_reg:x3; val_offset:75747*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75747*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25250: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc080001f; valaddr_reg:x3; val_offset:75750*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75750*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25251: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc080003f; valaddr_reg:x3; val_offset:75753*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75753*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25252: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc080007f; valaddr_reg:x3; val_offset:75756*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75756*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25253: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc08000ff; valaddr_reg:x3; val_offset:75759*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75759*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25254: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc08001ff; valaddr_reg:x3; val_offset:75762*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75762*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25255: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc08003ff; valaddr_reg:x3; val_offset:75765*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75765*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25256: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc08007ff; valaddr_reg:x3; val_offset:75768*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75768*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25257: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0800fff; valaddr_reg:x3; val_offset:75771*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75771*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25258: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0801fff; valaddr_reg:x3; val_offset:75774*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75774*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25259: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0803fff; valaddr_reg:x3; val_offset:75777*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75777*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25260: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0807fff; valaddr_reg:x3; val_offset:75780*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75780*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25261: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc080ffff; valaddr_reg:x3; val_offset:75783*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75783*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25262: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc081ffff; valaddr_reg:x3; val_offset:75786*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75786*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25263: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc083ffff; valaddr_reg:x3; val_offset:75789*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75789*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25264: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc087ffff; valaddr_reg:x3; val_offset:75792*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75792*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25265: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc08fffff; valaddr_reg:x3; val_offset:75795*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75795*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25266: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc09fffff; valaddr_reg:x3; val_offset:75798*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75798*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25267: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0bfffff; valaddr_reg:x3; val_offset:75801*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75801*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25268: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0c00000; valaddr_reg:x3; val_offset:75804*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75804*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25269: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0e00000; valaddr_reg:x3; val_offset:75807*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75807*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25270: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0f00000; valaddr_reg:x3; val_offset:75810*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75810*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25271: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0f80000; valaddr_reg:x3; val_offset:75813*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75813*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25272: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fc0000; valaddr_reg:x3; val_offset:75816*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75816*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25273: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fe0000; valaddr_reg:x3; val_offset:75819*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75819*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25274: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ff0000; valaddr_reg:x3; val_offset:75822*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75822*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25275: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ff8000; valaddr_reg:x3; val_offset:75825*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75825*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25276: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ffc000; valaddr_reg:x3; val_offset:75828*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75828*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25277: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ffe000; valaddr_reg:x3; val_offset:75831*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75831*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25278: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fff000; valaddr_reg:x3; val_offset:75834*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75834*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25279: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fff800; valaddr_reg:x3; val_offset:75837*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75837*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25280: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fffc00; valaddr_reg:x3; val_offset:75840*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75840*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25281: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fffe00; valaddr_reg:x3; val_offset:75843*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75843*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25282: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ffff00; valaddr_reg:x3; val_offset:75846*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75846*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25283: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ffff80; valaddr_reg:x3; val_offset:75849*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75849*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25284: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ffffc0; valaddr_reg:x3; val_offset:75852*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75852*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25285: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ffffe0; valaddr_reg:x3; val_offset:75855*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75855*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25286: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fffff0; valaddr_reg:x3; val_offset:75858*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75858*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25287: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fffff8; valaddr_reg:x3; val_offset:75861*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75861*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25288: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fffffc; valaddr_reg:x3; val_offset:75864*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75864*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25289: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0fffffe; valaddr_reg:x3; val_offset:75867*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75867*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25290: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7af83f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x414864 and fs3 == 1 and fe3 == 0x81 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efaf83f; op2val:0x80414864; +op3val:0xc0ffffff; valaddr_reg:x3; val_offset:75870*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75870*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25291: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:75873*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75873*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25292: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:75876*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75876*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25293: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:75879*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75879*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25294: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:75882*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75882*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25295: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:75885*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75885*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25296: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:75888*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75888*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25297: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:75891*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75891*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25298: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:75894*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75894*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25299: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:75897*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75897*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25300: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:75900*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75900*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25301: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:75903*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75903*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25302: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:75906*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75906*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25303: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:75909*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75909*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25304: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:75912*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75912*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25305: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:75915*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75915*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25306: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:75918*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75918*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25307: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10000000; valaddr_reg:x3; val_offset:75921*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75921*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25308: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10000001; valaddr_reg:x3; val_offset:75924*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75924*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25309: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10000003; valaddr_reg:x3; val_offset:75927*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75927*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25310: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10000007; valaddr_reg:x3; val_offset:75930*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75930*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25311: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1000000f; valaddr_reg:x3; val_offset:75933*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75933*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25312: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1000001f; valaddr_reg:x3; val_offset:75936*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75936*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25313: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1000003f; valaddr_reg:x3; val_offset:75939*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75939*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25314: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1000007f; valaddr_reg:x3; val_offset:75942*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75942*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25315: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x100000ff; valaddr_reg:x3; val_offset:75945*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75945*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25316: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x100001ff; valaddr_reg:x3; val_offset:75948*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75948*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25317: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x100003ff; valaddr_reg:x3; val_offset:75951*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75951*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25318: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x100007ff; valaddr_reg:x3; val_offset:75954*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75954*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25319: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10000fff; valaddr_reg:x3; val_offset:75957*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75957*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25320: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10001fff; valaddr_reg:x3; val_offset:75960*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75960*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25321: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10003fff; valaddr_reg:x3; val_offset:75963*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75963*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25322: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10007fff; valaddr_reg:x3; val_offset:75966*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75966*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25323: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1000ffff; valaddr_reg:x3; val_offset:75969*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75969*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25324: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1001ffff; valaddr_reg:x3; val_offset:75972*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75972*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25325: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1003ffff; valaddr_reg:x3; val_offset:75975*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75975*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25326: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x1007ffff; valaddr_reg:x3; val_offset:75978*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75978*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25327: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x100fffff; valaddr_reg:x3; val_offset:75981*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75981*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25328: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x101fffff; valaddr_reg:x3; val_offset:75984*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75984*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25329: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x103fffff; valaddr_reg:x3; val_offset:75987*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75987*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25330: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10400000; valaddr_reg:x3; val_offset:75990*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75990*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25331: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10600000; valaddr_reg:x3; val_offset:75993*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75993*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25332: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10700000; valaddr_reg:x3; val_offset:75996*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75996*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25333: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x10780000; valaddr_reg:x3; val_offset:75999*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 75999*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25334: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107c0000; valaddr_reg:x3; val_offset:76002*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76002*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25335: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107e0000; valaddr_reg:x3; val_offset:76005*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76005*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25336: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107f0000; valaddr_reg:x3; val_offset:76008*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76008*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25337: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107f8000; valaddr_reg:x3; val_offset:76011*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76011*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25338: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107fc000; valaddr_reg:x3; val_offset:76014*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76014*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25339: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107fe000; valaddr_reg:x3; val_offset:76017*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76017*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25340: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107ff000; valaddr_reg:x3; val_offset:76020*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76020*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25341: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107ff800; valaddr_reg:x3; val_offset:76023*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76023*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25342: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107ffc00; valaddr_reg:x3; val_offset:76026*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76026*0 + 3*197*FLEN/8, x4, x1, x2) + +inst_25343: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107ffe00; valaddr_reg:x3; val_offset:76029*0 + 3*197*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76029*0 + 3*197*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283452928,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283454976,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283456000,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283456512,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283456768,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283456896,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283456960,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283456992,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283457008,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283457016,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283457020,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283457022,32,FLEN) +NAN_BOXED(2130260161,32,FLEN) +NAN_BOXED(4308920,32,FLEN) +NAN_BOXED(1283457023,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614080,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614081,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614083,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614087,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614095,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614111,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614143,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614207,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614335,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229614591,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229615103,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229616127,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229618175,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229622271,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229630463,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229646847,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229679615,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229745151,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3229876223,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3230138367,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3230662655,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3231711231,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3233808383,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3233808384,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3235905536,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3236954112,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3237478400,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3237740544,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3237871616,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3237937152,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3237969920,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3237986304,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3237994496,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3237998592,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238000640,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238001664,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002176,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002432,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002560,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002624,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002656,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002672,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002680,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002684,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002686,32,FLEN) +NAN_BOXED(2130376767,32,FLEN) +NAN_BOXED(2151762020,32,FLEN) +NAN_BOXED(3238002687,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435456,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435457,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435459,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435463,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435471,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435487,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435519,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435583,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435711,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435967,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268436479,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268437503,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268439551,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268443647,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268451839,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268468223,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268500991,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268566527,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268697599,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268959743,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(269484031,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(270532607,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(272629759,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(272629760,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(274726912,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(275775488,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276299776,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276561920,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276692992,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276758528,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276791296,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276807680,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276815872,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276819968,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276822016,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823040,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823552,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-199.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-199.S new file mode 100644 index 000000000..693eadb08 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-199.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_25344: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107fff00; valaddr_reg:x3; val_offset:76032*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76032*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25345: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107fff80; valaddr_reg:x3; val_offset:76035*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76035*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25346: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107fffc0; valaddr_reg:x3; val_offset:76038*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76038*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25347: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107fffe0; valaddr_reg:x3; val_offset:76041*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76041*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25348: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107ffff0; valaddr_reg:x3; val_offset:76044*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76044*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25349: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107ffff8; valaddr_reg:x3; val_offset:76047*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76047*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25350: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107ffffc; valaddr_reg:x3; val_offset:76050*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76050*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25351: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107ffffe; valaddr_reg:x3; val_offset:76053*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76053*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25352: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7befa5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efbefa5; op2val:0x0; +op3val:0x107fffff; valaddr_reg:x3; val_offset:76056*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76056*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25353: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3f800001; valaddr_reg:x3; val_offset:76059*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76059*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25354: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3f800003; valaddr_reg:x3; val_offset:76062*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76062*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25355: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3f800007; valaddr_reg:x3; val_offset:76065*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76065*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25356: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3f999999; valaddr_reg:x3; val_offset:76068*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76068*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25357: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:76071*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76071*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25358: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:76074*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76074*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25359: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:76077*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76077*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25360: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:76080*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76080*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25361: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:76083*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76083*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25362: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:76086*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76086*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25363: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:76089*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76089*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25364: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:76092*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76092*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25365: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:76095*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76095*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25366: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:76098*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76098*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25367: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:76101*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76101*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25368: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:76104*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76104*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25369: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d000000; valaddr_reg:x3; val_offset:76107*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76107*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25370: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d000001; valaddr_reg:x3; val_offset:76110*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76110*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25371: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d000003; valaddr_reg:x3; val_offset:76113*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76113*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25372: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d000007; valaddr_reg:x3; val_offset:76116*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76116*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25373: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d00000f; valaddr_reg:x3; val_offset:76119*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76119*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25374: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d00001f; valaddr_reg:x3; val_offset:76122*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76122*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25375: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d00003f; valaddr_reg:x3; val_offset:76125*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76125*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25376: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d00007f; valaddr_reg:x3; val_offset:76128*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76128*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25377: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d0000ff; valaddr_reg:x3; val_offset:76131*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76131*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25378: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d0001ff; valaddr_reg:x3; val_offset:76134*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76134*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25379: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d0003ff; valaddr_reg:x3; val_offset:76137*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76137*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25380: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d0007ff; valaddr_reg:x3; val_offset:76140*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76140*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25381: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d000fff; valaddr_reg:x3; val_offset:76143*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76143*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25382: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d001fff; valaddr_reg:x3; val_offset:76146*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76146*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25383: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d003fff; valaddr_reg:x3; val_offset:76149*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76149*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25384: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d007fff; valaddr_reg:x3; val_offset:76152*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76152*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25385: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d00ffff; valaddr_reg:x3; val_offset:76155*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76155*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25386: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d01ffff; valaddr_reg:x3; val_offset:76158*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76158*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25387: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d03ffff; valaddr_reg:x3; val_offset:76161*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76161*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25388: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d07ffff; valaddr_reg:x3; val_offset:76164*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76164*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25389: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d0fffff; valaddr_reg:x3; val_offset:76167*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76167*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25390: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d1fffff; valaddr_reg:x3; val_offset:76170*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76170*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25391: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d3fffff; valaddr_reg:x3; val_offset:76173*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76173*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25392: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d400000; valaddr_reg:x3; val_offset:76176*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76176*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25393: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d600000; valaddr_reg:x3; val_offset:76179*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76179*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25394: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d700000; valaddr_reg:x3; val_offset:76182*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76182*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25395: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d780000; valaddr_reg:x3; val_offset:76185*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76185*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25396: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7c0000; valaddr_reg:x3; val_offset:76188*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76188*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25397: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7e0000; valaddr_reg:x3; val_offset:76191*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76191*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25398: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7f0000; valaddr_reg:x3; val_offset:76194*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76194*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25399: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7f8000; valaddr_reg:x3; val_offset:76197*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76197*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25400: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7fc000; valaddr_reg:x3; val_offset:76200*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76200*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25401: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7fe000; valaddr_reg:x3; val_offset:76203*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76203*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25402: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7ff000; valaddr_reg:x3; val_offset:76206*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76206*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25403: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7ff800; valaddr_reg:x3; val_offset:76209*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76209*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25404: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7ffc00; valaddr_reg:x3; val_offset:76212*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76212*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25405: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7ffe00; valaddr_reg:x3; val_offset:76215*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76215*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25406: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7fff00; valaddr_reg:x3; val_offset:76218*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76218*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25407: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7fff80; valaddr_reg:x3; val_offset:76221*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76221*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25408: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7fffc0; valaddr_reg:x3; val_offset:76224*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76224*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25409: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7fffe0; valaddr_reg:x3; val_offset:76227*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76227*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25410: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7ffff0; valaddr_reg:x3; val_offset:76230*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76230*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25411: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7ffff8; valaddr_reg:x3; val_offset:76233*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76233*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25412: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7ffffc; valaddr_reg:x3; val_offset:76236*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76236*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25413: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7ffffe; valaddr_reg:x3; val_offset:76239*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76239*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25414: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7c864c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x40e17c and fs3 == 0 and fe3 == 0x9a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efc864c; op2val:0x40e17c; +op3val:0x4d7fffff; valaddr_reg:x3; val_offset:76242*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76242*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25415: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67000000; valaddr_reg:x3; val_offset:76245*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76245*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25416: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67000001; valaddr_reg:x3; val_offset:76248*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76248*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25417: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67000003; valaddr_reg:x3; val_offset:76251*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76251*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25418: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67000007; valaddr_reg:x3; val_offset:76254*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76254*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25419: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x6700000f; valaddr_reg:x3; val_offset:76257*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76257*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25420: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x6700001f; valaddr_reg:x3; val_offset:76260*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76260*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25421: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x6700003f; valaddr_reg:x3; val_offset:76263*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76263*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25422: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x6700007f; valaddr_reg:x3; val_offset:76266*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76266*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25423: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x670000ff; valaddr_reg:x3; val_offset:76269*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76269*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25424: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x670001ff; valaddr_reg:x3; val_offset:76272*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76272*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25425: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x670003ff; valaddr_reg:x3; val_offset:76275*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76275*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25426: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x670007ff; valaddr_reg:x3; val_offset:76278*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76278*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25427: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67000fff; valaddr_reg:x3; val_offset:76281*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76281*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25428: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67001fff; valaddr_reg:x3; val_offset:76284*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76284*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25429: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67003fff; valaddr_reg:x3; val_offset:76287*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76287*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25430: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67007fff; valaddr_reg:x3; val_offset:76290*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76290*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25431: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x6700ffff; valaddr_reg:x3; val_offset:76293*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76293*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25432: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x6701ffff; valaddr_reg:x3; val_offset:76296*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76296*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25433: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x6703ffff; valaddr_reg:x3; val_offset:76299*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76299*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25434: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x6707ffff; valaddr_reg:x3; val_offset:76302*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76302*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25435: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x670fffff; valaddr_reg:x3; val_offset:76305*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76305*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25436: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x671fffff; valaddr_reg:x3; val_offset:76308*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76308*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25437: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x673fffff; valaddr_reg:x3; val_offset:76311*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76311*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25438: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67400000; valaddr_reg:x3; val_offset:76314*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76314*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25439: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67600000; valaddr_reg:x3; val_offset:76317*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76317*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25440: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67700000; valaddr_reg:x3; val_offset:76320*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76320*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25441: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x67780000; valaddr_reg:x3; val_offset:76323*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76323*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25442: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677c0000; valaddr_reg:x3; val_offset:76326*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76326*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25443: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677e0000; valaddr_reg:x3; val_offset:76329*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76329*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25444: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677f0000; valaddr_reg:x3; val_offset:76332*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76332*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25445: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677f8000; valaddr_reg:x3; val_offset:76335*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76335*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25446: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677fc000; valaddr_reg:x3; val_offset:76338*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76338*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25447: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677fe000; valaddr_reg:x3; val_offset:76341*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76341*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25448: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677ff000; valaddr_reg:x3; val_offset:76344*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76344*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25449: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677ff800; valaddr_reg:x3; val_offset:76347*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76347*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25450: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677ffc00; valaddr_reg:x3; val_offset:76350*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76350*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25451: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677ffe00; valaddr_reg:x3; val_offset:76353*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76353*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25452: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677fff00; valaddr_reg:x3; val_offset:76356*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76356*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25453: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677fff80; valaddr_reg:x3; val_offset:76359*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76359*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25454: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677fffc0; valaddr_reg:x3; val_offset:76362*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76362*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25455: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677fffe0; valaddr_reg:x3; val_offset:76365*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76365*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25456: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677ffff0; valaddr_reg:x3; val_offset:76368*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76368*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25457: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677ffff8; valaddr_reg:x3; val_offset:76371*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76371*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25458: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677ffffc; valaddr_reg:x3; val_offset:76374*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76374*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25459: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677ffffe; valaddr_reg:x3; val_offset:76377*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76377*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25460: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xce and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x677fffff; valaddr_reg:x3; val_offset:76380*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76380*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25461: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f000001; valaddr_reg:x3; val_offset:76383*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76383*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25462: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f000003; valaddr_reg:x3; val_offset:76386*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76386*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25463: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f000007; valaddr_reg:x3; val_offset:76389*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76389*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25464: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f199999; valaddr_reg:x3; val_offset:76392*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76392*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25465: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f249249; valaddr_reg:x3; val_offset:76395*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76395*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25466: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f333333; valaddr_reg:x3; val_offset:76398*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76398*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25467: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:76401*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76401*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25468: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:76404*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76404*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25469: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f444444; valaddr_reg:x3; val_offset:76407*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76407*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25470: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:76410*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76410*0 + 3*198*FLEN/8, x4, x1, x2) + +inst_25471: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:76413*0 + 3*198*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76413*0 + 3*198*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823808,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823936,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824000,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824032,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824048,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824056,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824060,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824062,32,FLEN) +NAN_BOXED(2130440101,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824063,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845632,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845633,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845635,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845639,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845647,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845663,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845695,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845759,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291845887,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291846143,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291846655,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291847679,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291849727,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291853823,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291862015,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291878399,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291911167,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1291976703,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1292107775,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1292369919,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1292894207,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1293942783,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1296039935,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1296039936,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1298137088,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1299185664,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1299709952,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1299972096,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300103168,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300168704,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300201472,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300217856,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300226048,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300230144,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300232192,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300233216,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300233728,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300233984,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300234112,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300234176,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300234208,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300234224,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300234232,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300234236,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300234238,32,FLEN) +NAN_BOXED(2130478668,32,FLEN) +NAN_BOXED(4252028,32,FLEN) +NAN_BOXED(1300234239,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053248,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053249,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053251,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053255,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053263,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053279,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053311,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053375,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053503,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728053759,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728054271,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728055295,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728057343,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728061439,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728069631,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728086015,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728118783,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728184319,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728315391,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1728577535,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1729101823,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1730150399,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1732247551,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1732247552,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1734344704,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1735393280,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1735917568,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736179712,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736310784,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736376320,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736409088,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736425472,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736433664,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736437760,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736439808,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736440832,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441344,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441600,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441728,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441792,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441824,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441840,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441848,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441852,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441854,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(1736441855,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-20.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-20.S new file mode 100644 index 000000000..1e10d8cfa --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-20.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_2432: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf00ffff; valaddr_reg:x3; val_offset:7296*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7296*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2433: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf01ffff; valaddr_reg:x3; val_offset:7299*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7299*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2434: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf03ffff; valaddr_reg:x3; val_offset:7302*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7302*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2435: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf07ffff; valaddr_reg:x3; val_offset:7305*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7305*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2436: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf0fffff; valaddr_reg:x3; val_offset:7308*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7308*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2437: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf1fffff; valaddr_reg:x3; val_offset:7311*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7311*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2438: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf3fffff; valaddr_reg:x3; val_offset:7314*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7314*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2439: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf400000; valaddr_reg:x3; val_offset:7317*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7317*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2440: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf600000; valaddr_reg:x3; val_offset:7320*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7320*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2441: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf700000; valaddr_reg:x3; val_offset:7323*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7323*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2442: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf780000; valaddr_reg:x3; val_offset:7326*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7326*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2443: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7c0000; valaddr_reg:x3; val_offset:7329*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7329*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2444: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7e0000; valaddr_reg:x3; val_offset:7332*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7332*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2445: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7f0000; valaddr_reg:x3; val_offset:7335*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7335*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2446: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7f8000; valaddr_reg:x3; val_offset:7338*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7338*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2447: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7fc000; valaddr_reg:x3; val_offset:7341*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7341*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2448: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7fe000; valaddr_reg:x3; val_offset:7344*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7344*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2449: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7ff000; valaddr_reg:x3; val_offset:7347*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7347*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2450: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7ff800; valaddr_reg:x3; val_offset:7350*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7350*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2451: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7ffc00; valaddr_reg:x3; val_offset:7353*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7353*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2452: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7ffe00; valaddr_reg:x3; val_offset:7356*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7356*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2453: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7fff00; valaddr_reg:x3; val_offset:7359*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7359*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2454: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7fff80; valaddr_reg:x3; val_offset:7362*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7362*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2455: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7fffc0; valaddr_reg:x3; val_offset:7365*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7365*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2456: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7fffe0; valaddr_reg:x3; val_offset:7368*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7368*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2457: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7ffff0; valaddr_reg:x3; val_offset:7371*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7371*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2458: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7ffff8; valaddr_reg:x3; val_offset:7374*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7374*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2459: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7ffffc; valaddr_reg:x3; val_offset:7377*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7377*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2460: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7ffffe; valaddr_reg:x3; val_offset:7380*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7380*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2461: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x3f52a8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d3f52a8; op2val:0x0; +op3val:0xf7fffff; valaddr_reg:x3; val_offset:7383*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7383*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2462: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab800000; valaddr_reg:x3; val_offset:7386*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7386*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2463: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab800001; valaddr_reg:x3; val_offset:7389*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7389*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2464: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab800003; valaddr_reg:x3; val_offset:7392*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7392*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2465: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab800007; valaddr_reg:x3; val_offset:7395*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7395*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2466: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab80000f; valaddr_reg:x3; val_offset:7398*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7398*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2467: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab80001f; valaddr_reg:x3; val_offset:7401*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7401*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2468: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab80003f; valaddr_reg:x3; val_offset:7404*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7404*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2469: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab80007f; valaddr_reg:x3; val_offset:7407*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7407*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2470: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab8000ff; valaddr_reg:x3; val_offset:7410*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7410*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2471: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab8001ff; valaddr_reg:x3; val_offset:7413*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7413*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2472: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab8003ff; valaddr_reg:x3; val_offset:7416*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7416*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2473: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab8007ff; valaddr_reg:x3; val_offset:7419*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7419*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2474: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab800fff; valaddr_reg:x3; val_offset:7422*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7422*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2475: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab801fff; valaddr_reg:x3; val_offset:7425*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7425*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2476: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab803fff; valaddr_reg:x3; val_offset:7428*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7428*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2477: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab807fff; valaddr_reg:x3; val_offset:7431*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7431*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2478: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab80ffff; valaddr_reg:x3; val_offset:7434*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7434*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2479: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab81ffff; valaddr_reg:x3; val_offset:7437*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7437*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2480: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab83ffff; valaddr_reg:x3; val_offset:7440*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7440*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2481: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab87ffff; valaddr_reg:x3; val_offset:7443*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7443*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2482: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab8fffff; valaddr_reg:x3; val_offset:7446*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7446*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2483: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xab9fffff; valaddr_reg:x3; val_offset:7449*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7449*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2484: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabbfffff; valaddr_reg:x3; val_offset:7452*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7452*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2485: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabc00000; valaddr_reg:x3; val_offset:7455*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7455*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2486: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabe00000; valaddr_reg:x3; val_offset:7458*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7458*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2487: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabf00000; valaddr_reg:x3; val_offset:7461*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7461*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2488: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabf80000; valaddr_reg:x3; val_offset:7464*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7464*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2489: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfc0000; valaddr_reg:x3; val_offset:7467*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7467*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2490: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfe0000; valaddr_reg:x3; val_offset:7470*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7470*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2491: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabff0000; valaddr_reg:x3; val_offset:7473*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7473*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2492: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabff8000; valaddr_reg:x3; val_offset:7476*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7476*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2493: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabffc000; valaddr_reg:x3; val_offset:7479*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7479*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2494: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabffe000; valaddr_reg:x3; val_offset:7482*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7482*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2495: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfff000; valaddr_reg:x3; val_offset:7485*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7485*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2496: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfff800; valaddr_reg:x3; val_offset:7488*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7488*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2497: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfffc00; valaddr_reg:x3; val_offset:7491*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7491*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2498: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfffe00; valaddr_reg:x3; val_offset:7494*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7494*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2499: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabffff00; valaddr_reg:x3; val_offset:7497*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7497*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2500: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabffff80; valaddr_reg:x3; val_offset:7500*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7500*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2501: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabffffc0; valaddr_reg:x3; val_offset:7503*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7503*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2502: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabffffe0; valaddr_reg:x3; val_offset:7506*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7506*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2503: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfffff0; valaddr_reg:x3; val_offset:7509*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7509*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2504: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfffff8; valaddr_reg:x3; val_offset:7512*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7512*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2505: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfffffc; valaddr_reg:x3; val_offset:7515*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7515*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2506: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabfffffe; valaddr_reg:x3; val_offset:7518*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7518*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2507: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x57 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xabffffff; valaddr_reg:x3; val_offset:7521*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7521*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2508: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbf800001; valaddr_reg:x3; val_offset:7524*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7524*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2509: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbf800003; valaddr_reg:x3; val_offset:7527*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7527*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2510: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbf800007; valaddr_reg:x3; val_offset:7530*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7530*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2511: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbf999999; valaddr_reg:x3; val_offset:7533*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7533*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2512: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:7536*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7536*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2513: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:7539*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7539*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2514: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:7542*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7542*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2515: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:7545*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7545*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2516: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:7548*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7548*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2517: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:7551*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7551*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2518: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:7554*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7554*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2519: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:7557*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7557*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2520: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:7560*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7560*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2521: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:7563*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7563*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2522: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:7566*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7566*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2523: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x44423c and fs2 == 1 and fe2 == 0x03 and fm2 == 0x26f698 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d44423c; op2val:0x81a6f698; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:7569*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7569*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2524: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:7572*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7572*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2525: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:7575*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7575*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2526: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:7578*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7578*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2527: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:7581*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7581*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2528: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:7584*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7584*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2529: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:7587*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7587*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2530: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:7590*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7590*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2531: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:7593*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7593*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2532: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:7596*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7596*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2533: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:7599*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7599*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2534: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:7602*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7602*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2535: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:7605*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7605*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2536: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:7608*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7608*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2537: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:7611*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7611*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2538: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:7614*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7614*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2539: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:7617*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7617*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2540: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf000000; valaddr_reg:x3; val_offset:7620*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7620*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2541: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf000001; valaddr_reg:x3; val_offset:7623*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7623*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2542: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf000003; valaddr_reg:x3; val_offset:7626*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7626*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2543: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf000007; valaddr_reg:x3; val_offset:7629*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7629*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2544: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf00000f; valaddr_reg:x3; val_offset:7632*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7632*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2545: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf00001f; valaddr_reg:x3; val_offset:7635*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7635*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2546: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf00003f; valaddr_reg:x3; val_offset:7638*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7638*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2547: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf00007f; valaddr_reg:x3; val_offset:7641*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7641*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2548: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf0000ff; valaddr_reg:x3; val_offset:7644*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7644*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2549: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf0001ff; valaddr_reg:x3; val_offset:7647*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7647*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2550: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf0003ff; valaddr_reg:x3; val_offset:7650*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7650*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2551: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf0007ff; valaddr_reg:x3; val_offset:7653*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7653*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2552: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf000fff; valaddr_reg:x3; val_offset:7656*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7656*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2553: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf001fff; valaddr_reg:x3; val_offset:7659*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7659*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2554: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf003fff; valaddr_reg:x3; val_offset:7662*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7662*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2555: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf007fff; valaddr_reg:x3; val_offset:7665*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7665*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2556: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf00ffff; valaddr_reg:x3; val_offset:7668*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7668*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2557: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf01ffff; valaddr_reg:x3; val_offset:7671*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7671*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2558: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf03ffff; valaddr_reg:x3; val_offset:7674*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7674*0 + 3*19*FLEN/8, x4, x1, x2) + +inst_2559: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf07ffff; valaddr_reg:x3; val_offset:7677*0 + 3*19*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7677*0 + 3*19*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251723775,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251789311,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251920383,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(252182527,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(252706815,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(253755391,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255852543,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255852544,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(257949696,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(258998272,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259522560,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259784704,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259915776,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259981312,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260014080,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260030464,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260038656,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260042752,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260044800,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260045824,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046336,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046592,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046720,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046784,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046816,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046832,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046840,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046844,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046846,32,FLEN) +NAN_BOXED(2101301928,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046847,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292544,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292545,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292547,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292551,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292559,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292575,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292607,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292671,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877292799,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877293055,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877293567,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877294591,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877296639,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877300735,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877308927,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877325311,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877358079,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877423615,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877554687,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2877816831,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2878341119,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2879389695,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2881486847,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2881486848,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2883584000,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2884632576,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885156864,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885419008,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885550080,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885615616,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885648384,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885664768,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885672960,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885677056,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885679104,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885680128,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885680640,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885680896,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885681024,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885681088,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885681120,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885681136,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885681144,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885681148,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885681150,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(2885681151,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2101625404,32,FLEN) +NAN_BOXED(2175202968,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658240,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658241,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658243,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658247,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658255,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658271,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658303,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658367,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658495,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658751,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251659263,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251660287,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251662335,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251666431,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251674623,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251691007,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251723775,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251789311,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251920383,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(252182527,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-200.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-200.S new file mode 100644 index 000000000..b4646c7aa --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-200.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_25472: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f666666; valaddr_reg:x3; val_offset:76416*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76416*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25473: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:76419*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76419*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25474: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:76422*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76422*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25475: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:76425*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76425*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25476: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7d1026 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x017c49 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efd1026; op2val:0x40017c49; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:76428*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76428*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25477: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77800000; valaddr_reg:x3; val_offset:76431*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76431*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25478: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77800001; valaddr_reg:x3; val_offset:76434*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76434*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25479: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77800003; valaddr_reg:x3; val_offset:76437*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76437*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25480: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77800007; valaddr_reg:x3; val_offset:76440*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76440*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25481: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7780000f; valaddr_reg:x3; val_offset:76443*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76443*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25482: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7780001f; valaddr_reg:x3; val_offset:76446*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76446*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25483: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7780003f; valaddr_reg:x3; val_offset:76449*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76449*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25484: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7780007f; valaddr_reg:x3; val_offset:76452*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76452*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25485: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x778000ff; valaddr_reg:x3; val_offset:76455*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76455*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25486: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x778001ff; valaddr_reg:x3; val_offset:76458*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76458*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25487: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x778003ff; valaddr_reg:x3; val_offset:76461*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76461*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25488: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x778007ff; valaddr_reg:x3; val_offset:76464*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76464*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25489: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77800fff; valaddr_reg:x3; val_offset:76467*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76467*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25490: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77801fff; valaddr_reg:x3; val_offset:76470*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76470*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25491: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77803fff; valaddr_reg:x3; val_offset:76473*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76473*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25492: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77807fff; valaddr_reg:x3; val_offset:76476*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76476*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25493: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7780ffff; valaddr_reg:x3; val_offset:76479*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76479*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25494: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7781ffff; valaddr_reg:x3; val_offset:76482*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76482*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25495: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7783ffff; valaddr_reg:x3; val_offset:76485*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76485*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25496: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7787ffff; valaddr_reg:x3; val_offset:76488*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76488*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25497: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x778fffff; valaddr_reg:x3; val_offset:76491*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76491*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25498: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x779fffff; valaddr_reg:x3; val_offset:76494*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76494*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25499: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77bfffff; valaddr_reg:x3; val_offset:76497*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76497*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25500: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77c00000; valaddr_reg:x3; val_offset:76500*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76500*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25501: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77e00000; valaddr_reg:x3; val_offset:76503*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76503*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25502: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77f00000; valaddr_reg:x3; val_offset:76506*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76506*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25503: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77f80000; valaddr_reg:x3; val_offset:76509*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76509*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25504: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fc0000; valaddr_reg:x3; val_offset:76512*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76512*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25505: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fe0000; valaddr_reg:x3; val_offset:76515*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76515*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25506: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ff0000; valaddr_reg:x3; val_offset:76518*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76518*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25507: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ff8000; valaddr_reg:x3; val_offset:76521*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76521*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25508: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ffc000; valaddr_reg:x3; val_offset:76524*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76524*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25509: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ffe000; valaddr_reg:x3; val_offset:76527*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76527*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25510: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fff000; valaddr_reg:x3; val_offset:76530*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76530*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25511: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fff800; valaddr_reg:x3; val_offset:76533*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76533*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25512: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fffc00; valaddr_reg:x3; val_offset:76536*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76536*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25513: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fffe00; valaddr_reg:x3; val_offset:76539*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76539*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25514: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ffff00; valaddr_reg:x3; val_offset:76542*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76542*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25515: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ffff80; valaddr_reg:x3; val_offset:76545*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76545*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25516: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ffffc0; valaddr_reg:x3; val_offset:76548*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76548*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25517: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ffffe0; valaddr_reg:x3; val_offset:76551*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76551*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25518: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fffff0; valaddr_reg:x3; val_offset:76554*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76554*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25519: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fffff8; valaddr_reg:x3; val_offset:76557*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76557*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25520: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fffffc; valaddr_reg:x3; val_offset:76560*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76560*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25521: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77fffffe; valaddr_reg:x3; val_offset:76563*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76563*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25522: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xef and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x77ffffff; valaddr_reg:x3; val_offset:76566*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76566*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25523: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f000001; valaddr_reg:x3; val_offset:76569*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76569*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25524: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f000003; valaddr_reg:x3; val_offset:76572*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76572*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25525: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f000007; valaddr_reg:x3; val_offset:76575*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76575*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25526: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f199999; valaddr_reg:x3; val_offset:76578*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76578*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25527: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f249249; valaddr_reg:x3; val_offset:76581*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76581*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25528: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f333333; valaddr_reg:x3; val_offset:76584*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76584*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25529: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:76587*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76587*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25530: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:76590*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76590*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25531: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f444444; valaddr_reg:x3; val_offset:76593*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76593*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25532: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:76596*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76596*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25533: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:76599*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76599*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25534: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f666666; valaddr_reg:x3; val_offset:76602*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76602*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25535: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:76605*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76605*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25536: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:76608*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76608*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25537: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:76611*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76611*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25538: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7eaac4 and fs2 == 0 and fe2 == 0x80 and fm2 == 0x00ab81 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efeaac4; op2val:0x4000ab81; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:76614*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76614*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25539: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:76617*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76617*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25540: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:76620*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76620*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25541: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:76623*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76623*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25542: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:76626*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76626*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25543: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:76629*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76629*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25544: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:76632*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76632*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25545: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:76635*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76635*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25546: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:76638*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76638*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25547: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:76641*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76641*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25548: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:76644*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76644*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25549: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:76647*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76647*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25550: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:76650*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76650*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25551: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:76653*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76653*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25552: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:76656*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76656*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25553: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:76659*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76659*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25554: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:76662*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76662*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25555: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49000000; valaddr_reg:x3; val_offset:76665*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76665*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25556: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49000001; valaddr_reg:x3; val_offset:76668*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76668*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25557: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49000003; valaddr_reg:x3; val_offset:76671*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76671*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25558: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49000007; valaddr_reg:x3; val_offset:76674*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76674*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25559: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x4900000f; valaddr_reg:x3; val_offset:76677*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76677*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25560: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x4900001f; valaddr_reg:x3; val_offset:76680*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76680*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25561: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x4900003f; valaddr_reg:x3; val_offset:76683*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76683*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25562: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x4900007f; valaddr_reg:x3; val_offset:76686*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76686*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25563: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x490000ff; valaddr_reg:x3; val_offset:76689*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76689*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25564: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x490001ff; valaddr_reg:x3; val_offset:76692*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76692*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25565: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x490003ff; valaddr_reg:x3; val_offset:76695*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76695*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25566: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x490007ff; valaddr_reg:x3; val_offset:76698*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76698*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25567: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49000fff; valaddr_reg:x3; val_offset:76701*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76701*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25568: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49001fff; valaddr_reg:x3; val_offset:76704*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76704*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25569: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49003fff; valaddr_reg:x3; val_offset:76707*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76707*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25570: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49007fff; valaddr_reg:x3; val_offset:76710*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76710*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25571: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x4900ffff; valaddr_reg:x3; val_offset:76713*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76713*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25572: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x4901ffff; valaddr_reg:x3; val_offset:76716*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76716*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25573: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x4903ffff; valaddr_reg:x3; val_offset:76719*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76719*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25574: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x4907ffff; valaddr_reg:x3; val_offset:76722*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76722*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25575: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x490fffff; valaddr_reg:x3; val_offset:76725*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76725*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25576: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x491fffff; valaddr_reg:x3; val_offset:76728*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76728*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25577: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x493fffff; valaddr_reg:x3; val_offset:76731*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76731*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25578: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49400000; valaddr_reg:x3; val_offset:76734*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76734*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25579: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49600000; valaddr_reg:x3; val_offset:76737*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76737*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25580: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49700000; valaddr_reg:x3; val_offset:76740*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76740*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25581: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x49780000; valaddr_reg:x3; val_offset:76743*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76743*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25582: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497c0000; valaddr_reg:x3; val_offset:76746*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76746*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25583: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497e0000; valaddr_reg:x3; val_offset:76749*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76749*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25584: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497f0000; valaddr_reg:x3; val_offset:76752*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76752*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25585: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497f8000; valaddr_reg:x3; val_offset:76755*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76755*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25586: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497fc000; valaddr_reg:x3; val_offset:76758*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76758*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25587: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497fe000; valaddr_reg:x3; val_offset:76761*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76761*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25588: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497ff000; valaddr_reg:x3; val_offset:76764*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76764*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25589: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497ff800; valaddr_reg:x3; val_offset:76767*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76767*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25590: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497ffc00; valaddr_reg:x3; val_offset:76770*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76770*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25591: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497ffe00; valaddr_reg:x3; val_offset:76773*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76773*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25592: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497fff00; valaddr_reg:x3; val_offset:76776*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76776*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25593: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497fff80; valaddr_reg:x3; val_offset:76779*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76779*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25594: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497fffc0; valaddr_reg:x3; val_offset:76782*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76782*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25595: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497fffe0; valaddr_reg:x3; val_offset:76785*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76785*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25596: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497ffff0; valaddr_reg:x3; val_offset:76788*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76788*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25597: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497ffff8; valaddr_reg:x3; val_offset:76791*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76791*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25598: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497ffffc; valaddr_reg:x3; val_offset:76794*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76794*0 + 3*199*FLEN/8, x4, x1, x2) + +inst_25599: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497ffffe; valaddr_reg:x3; val_offset:76797*0 + 3*199*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76797*0 + 3*199*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2130513958,32,FLEN) +NAN_BOXED(1073839177,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877312,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877313,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877315,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877319,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877327,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877343,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877375,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877439,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877567,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004877823,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004878335,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004879359,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004881407,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004885503,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004893695,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004910079,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2004942847,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2005008383,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2005139455,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2005401599,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2005925887,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2006974463,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2009071615,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2009071616,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2011168768,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2012217344,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2012741632,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013003776,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013134848,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013200384,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013233152,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013249536,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013257728,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013261824,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013263872,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013264896,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265408,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265664,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265792,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265856,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265888,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265904,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265912,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265916,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265918,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2013265919,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2130619076,32,FLEN) +NAN_BOXED(1073785729,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224736768,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224736769,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224736771,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224736775,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224736783,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224736799,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224736831,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224736895,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224737023,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224737279,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224737791,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224738815,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224740863,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224744959,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224753151,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224769535,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224802303,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224867839,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1224998911,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1225261055,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1225785343,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1226833919,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1228931071,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1228931072,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1231028224,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1232076800,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1232601088,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1232863232,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1232994304,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233059840,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233092608,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233108992,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233117184,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233121280,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233123328,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233124352,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233124864,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125120,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125248,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125312,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125344,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125360,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125368,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125372,32,FLEN) +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125374,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-201.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-201.S new file mode 100644 index 000000000..e75478d6c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-201.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_25600: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7f97b6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x401a1d and fs3 == 0 and fe3 == 0x92 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7eff97b6; op2val:0x401a1d; +op3val:0x497fffff; valaddr_reg:x3; val_offset:76800*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76800*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25601: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:76803*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76803*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25602: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:76806*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76806*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25603: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:76809*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76809*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25604: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:76812*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76812*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25605: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:76815*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76815*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25606: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:76818*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76818*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25607: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:76821*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76821*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25608: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:76824*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76824*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25609: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:76827*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76827*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25610: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:76830*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76830*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25611: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:76833*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76833*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25612: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:76836*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76836*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25613: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:76839*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76839*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25614: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:76842*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76842*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25615: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:76845*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76845*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25616: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:76848*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76848*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25617: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88000000; valaddr_reg:x3; val_offset:76851*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76851*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25618: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88000001; valaddr_reg:x3; val_offset:76854*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76854*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25619: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88000003; valaddr_reg:x3; val_offset:76857*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76857*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25620: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88000007; valaddr_reg:x3; val_offset:76860*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76860*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25621: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x8800000f; valaddr_reg:x3; val_offset:76863*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76863*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25622: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x8800001f; valaddr_reg:x3; val_offset:76866*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76866*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25623: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x8800003f; valaddr_reg:x3; val_offset:76869*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76869*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25624: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x8800007f; valaddr_reg:x3; val_offset:76872*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76872*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25625: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x880000ff; valaddr_reg:x3; val_offset:76875*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76875*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25626: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x880001ff; valaddr_reg:x3; val_offset:76878*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76878*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25627: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x880003ff; valaddr_reg:x3; val_offset:76881*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76881*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25628: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x880007ff; valaddr_reg:x3; val_offset:76884*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76884*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25629: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88000fff; valaddr_reg:x3; val_offset:76887*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76887*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25630: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88001fff; valaddr_reg:x3; val_offset:76890*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76890*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25631: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88003fff; valaddr_reg:x3; val_offset:76893*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76893*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25632: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88007fff; valaddr_reg:x3; val_offset:76896*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76896*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25633: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x8800ffff; valaddr_reg:x3; val_offset:76899*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76899*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25634: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x8801ffff; valaddr_reg:x3; val_offset:76902*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76902*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25635: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x8803ffff; valaddr_reg:x3; val_offset:76905*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76905*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25636: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x8807ffff; valaddr_reg:x3; val_offset:76908*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76908*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25637: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x880fffff; valaddr_reg:x3; val_offset:76911*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76911*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25638: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x881fffff; valaddr_reg:x3; val_offset:76914*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76914*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25639: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x883fffff; valaddr_reg:x3; val_offset:76917*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76917*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25640: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88400000; valaddr_reg:x3; val_offset:76920*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76920*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25641: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88600000; valaddr_reg:x3; val_offset:76923*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76923*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25642: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88700000; valaddr_reg:x3; val_offset:76926*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76926*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25643: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x88780000; valaddr_reg:x3; val_offset:76929*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76929*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25644: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887c0000; valaddr_reg:x3; val_offset:76932*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76932*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25645: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887e0000; valaddr_reg:x3; val_offset:76935*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76935*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25646: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887f0000; valaddr_reg:x3; val_offset:76938*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76938*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25647: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887f8000; valaddr_reg:x3; val_offset:76941*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76941*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25648: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887fc000; valaddr_reg:x3; val_offset:76944*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76944*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25649: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887fe000; valaddr_reg:x3; val_offset:76947*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76947*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25650: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887ff000; valaddr_reg:x3; val_offset:76950*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76950*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25651: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887ff800; valaddr_reg:x3; val_offset:76953*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76953*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25652: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887ffc00; valaddr_reg:x3; val_offset:76956*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76956*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25653: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887ffe00; valaddr_reg:x3; val_offset:76959*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76959*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25654: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887fff00; valaddr_reg:x3; val_offset:76962*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76962*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25655: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887fff80; valaddr_reg:x3; val_offset:76965*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76965*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25656: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887fffc0; valaddr_reg:x3; val_offset:76968*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76968*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25657: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887fffe0; valaddr_reg:x3; val_offset:76971*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76971*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25658: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887ffff0; valaddr_reg:x3; val_offset:76974*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76974*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25659: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887ffff8; valaddr_reg:x3; val_offset:76977*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76977*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25660: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887ffffc; valaddr_reg:x3; val_offset:76980*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76980*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25661: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887ffffe; valaddr_reg:x3; val_offset:76983*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76983*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25662: +// fs1 == 0 and fe1 == 0xfd and fm1 == 0x7ff0b5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7efff0b5; op2val:0x80000000; +op3val:0x887fffff; valaddr_reg:x3; val_offset:76986*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76986*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:76989*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76989*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:76992*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76992*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:76995*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76995*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:76998*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 76998*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:77001*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77001*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:77004*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77004*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:77007*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77007*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:77010*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77010*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:77013*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77013*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:77016*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77016*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:77019*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77019*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:77022*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77022*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:77025*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77025*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:77028*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77028*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:77031*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77031*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:77034*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77034*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80800000; valaddr_reg:x3; val_offset:77037*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77037*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:77040*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77040*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:77043*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77043*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:77046*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77046*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8080000f; valaddr_reg:x3; val_offset:77049*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77049*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8080001f; valaddr_reg:x3; val_offset:77052*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77052*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8080003f; valaddr_reg:x3; val_offset:77055*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77055*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8080007f; valaddr_reg:x3; val_offset:77058*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77058*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x808000ff; valaddr_reg:x3; val_offset:77061*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77061*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x808001ff; valaddr_reg:x3; val_offset:77064*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77064*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x808003ff; valaddr_reg:x3; val_offset:77067*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77067*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x808007ff; valaddr_reg:x3; val_offset:77070*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77070*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80800fff; valaddr_reg:x3; val_offset:77073*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77073*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80801fff; valaddr_reg:x3; val_offset:77076*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77076*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80803fff; valaddr_reg:x3; val_offset:77079*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77079*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80807fff; valaddr_reg:x3; val_offset:77082*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77082*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8080ffff; valaddr_reg:x3; val_offset:77085*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77085*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8081ffff; valaddr_reg:x3; val_offset:77088*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77088*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8083ffff; valaddr_reg:x3; val_offset:77091*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77091*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x8087ffff; valaddr_reg:x3; val_offset:77094*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77094*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x808fffff; valaddr_reg:x3; val_offset:77097*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77097*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x809fffff; valaddr_reg:x3; val_offset:77100*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77100*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80bfffff; valaddr_reg:x3; val_offset:77103*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77103*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80c00000; valaddr_reg:x3; val_offset:77106*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77106*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80e00000; valaddr_reg:x3; val_offset:77109*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77109*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80f00000; valaddr_reg:x3; val_offset:77112*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77112*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80f80000; valaddr_reg:x3; val_offset:77115*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77115*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fc0000; valaddr_reg:x3; val_offset:77118*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77118*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fe0000; valaddr_reg:x3; val_offset:77121*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77121*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ff0000; valaddr_reg:x3; val_offset:77124*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77124*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ff8000; valaddr_reg:x3; val_offset:77127*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77127*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ffc000; valaddr_reg:x3; val_offset:77130*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77130*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ffe000; valaddr_reg:x3; val_offset:77133*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77133*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fff000; valaddr_reg:x3; val_offset:77136*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77136*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fff800; valaddr_reg:x3; val_offset:77139*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77139*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fffc00; valaddr_reg:x3; val_offset:77142*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77142*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fffe00; valaddr_reg:x3; val_offset:77145*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77145*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ffff00; valaddr_reg:x3; val_offset:77148*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77148*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ffff80; valaddr_reg:x3; val_offset:77151*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77151*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ffffc0; valaddr_reg:x3; val_offset:77154*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77154*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ffffe0; valaddr_reg:x3; val_offset:77157*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77157*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fffff0; valaddr_reg:x3; val_offset:77160*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77160*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:77163*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77163*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:77166*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77166*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:77169*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77169*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x004910 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f004910; op2val:0x80000000; +op3val:0x80ffffff; valaddr_reg:x3; val_offset:77172*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77172*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:77175*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77175*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:77178*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77178*0 + 3*200*FLEN/8, x4, x1, x2) + +inst_25727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:77181*0 + 3*200*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77181*0 + 3*200*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130679734,32,FLEN) +NAN_BOXED(4200989,32,FLEN) +NAN_BOXED(1233125375,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701376,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701377,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701379,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701383,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701391,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701407,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701439,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701503,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701631,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701887,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281702399,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281703423,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281705471,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281709567,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281717759,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281734143,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281766911,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281832447,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281963519,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2282225663,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2282749951,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2283798527,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2285895679,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2285895680,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2287992832,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289041408,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289565696,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289827840,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289958912,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290024448,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290057216,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290073600,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290081792,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290085888,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290087936,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290088960,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089472,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089728,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089856,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089920,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089952,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089968,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089976,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089980,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089982,32,FLEN) +NAN_BOXED(2130702517,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089983,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872256,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872271,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872287,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872319,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872383,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872511,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872767,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155873279,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155874303,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155876351,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155880447,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155888639,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155905023,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155937791,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156003327,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156134399,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156396543,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156920831,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157969407,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160066559,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160066560,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162163712,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163212288,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163736576,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163998720,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164129792,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164195328,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164228096,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164244480,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164252672,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164256768,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164258816,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164259840,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260352,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260608,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260736,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260800,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260832,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260848,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2130725136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260863,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-202.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-202.S new file mode 100644 index 000000000..b4b9ad5c9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-202.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_25728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:77184*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77184*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:77187*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77187*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:77190*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77190*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:77193*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77193*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:77196*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77196*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:77199*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77199*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:77202*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77202*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:77205*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77205*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:77208*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77208*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:77211*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77211*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:77214*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77214*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:77217*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77217*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:77220*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77220*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2800000; valaddr_reg:x3; val_offset:77223*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77223*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2800001; valaddr_reg:x3; val_offset:77226*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77226*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2800003; valaddr_reg:x3; val_offset:77229*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77229*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2800007; valaddr_reg:x3; val_offset:77232*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77232*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x280000f; valaddr_reg:x3; val_offset:77235*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77235*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x280001f; valaddr_reg:x3; val_offset:77238*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77238*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x280003f; valaddr_reg:x3; val_offset:77241*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77241*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x280007f; valaddr_reg:x3; val_offset:77244*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77244*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x28000ff; valaddr_reg:x3; val_offset:77247*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77247*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x28001ff; valaddr_reg:x3; val_offset:77250*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77250*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x28003ff; valaddr_reg:x3; val_offset:77253*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77253*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x28007ff; valaddr_reg:x3; val_offset:77256*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77256*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2800fff; valaddr_reg:x3; val_offset:77259*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77259*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2801fff; valaddr_reg:x3; val_offset:77262*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77262*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2803fff; valaddr_reg:x3; val_offset:77265*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77265*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2807fff; valaddr_reg:x3; val_offset:77268*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77268*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x280ffff; valaddr_reg:x3; val_offset:77271*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77271*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x281ffff; valaddr_reg:x3; val_offset:77274*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77274*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x283ffff; valaddr_reg:x3; val_offset:77277*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77277*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x287ffff; valaddr_reg:x3; val_offset:77280*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77280*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x28fffff; valaddr_reg:x3; val_offset:77283*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77283*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x29fffff; valaddr_reg:x3; val_offset:77286*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77286*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2bfffff; valaddr_reg:x3; val_offset:77289*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77289*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2c00000; valaddr_reg:x3; val_offset:77292*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77292*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2e00000; valaddr_reg:x3; val_offset:77295*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77295*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2f00000; valaddr_reg:x3; val_offset:77298*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77298*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2f80000; valaddr_reg:x3; val_offset:77301*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77301*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fc0000; valaddr_reg:x3; val_offset:77304*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77304*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fe0000; valaddr_reg:x3; val_offset:77307*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77307*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ff0000; valaddr_reg:x3; val_offset:77310*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77310*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ff8000; valaddr_reg:x3; val_offset:77313*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77313*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ffc000; valaddr_reg:x3; val_offset:77316*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77316*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ffe000; valaddr_reg:x3; val_offset:77319*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77319*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fff000; valaddr_reg:x3; val_offset:77322*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77322*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fff800; valaddr_reg:x3; val_offset:77325*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77325*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fffc00; valaddr_reg:x3; val_offset:77328*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77328*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fffe00; valaddr_reg:x3; val_offset:77331*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77331*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ffff00; valaddr_reg:x3; val_offset:77334*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77334*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ffff80; valaddr_reg:x3; val_offset:77337*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77337*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ffffc0; valaddr_reg:x3; val_offset:77340*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77340*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ffffe0; valaddr_reg:x3; val_offset:77343*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77343*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fffff0; valaddr_reg:x3; val_offset:77346*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77346*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fffff8; valaddr_reg:x3; val_offset:77349*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77349*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fffffc; valaddr_reg:x3; val_offset:77352*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77352*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2fffffe; valaddr_reg:x3; val_offset:77355*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77355*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x00a730 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f00a730; op2val:0x0; +op3val:0x2ffffff; valaddr_reg:x3; val_offset:77358*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77358*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0000000; valaddr_reg:x3; val_offset:77361*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77361*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0000001; valaddr_reg:x3; val_offset:77364*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77364*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0000003; valaddr_reg:x3; val_offset:77367*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77367*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0000007; valaddr_reg:x3; val_offset:77370*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77370*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa000000f; valaddr_reg:x3; val_offset:77373*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77373*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa000001f; valaddr_reg:x3; val_offset:77376*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77376*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa000003f; valaddr_reg:x3; val_offset:77379*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77379*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa000007f; valaddr_reg:x3; val_offset:77382*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77382*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa00000ff; valaddr_reg:x3; val_offset:77385*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77385*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa00001ff; valaddr_reg:x3; val_offset:77388*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77388*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa00003ff; valaddr_reg:x3; val_offset:77391*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77391*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa00007ff; valaddr_reg:x3; val_offset:77394*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77394*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0000fff; valaddr_reg:x3; val_offset:77397*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77397*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0001fff; valaddr_reg:x3; val_offset:77400*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77400*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0003fff; valaddr_reg:x3; val_offset:77403*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77403*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0007fff; valaddr_reg:x3; val_offset:77406*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77406*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa000ffff; valaddr_reg:x3; val_offset:77409*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77409*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa001ffff; valaddr_reg:x3; val_offset:77412*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77412*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa003ffff; valaddr_reg:x3; val_offset:77415*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77415*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa007ffff; valaddr_reg:x3; val_offset:77418*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77418*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa00fffff; valaddr_reg:x3; val_offset:77421*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77421*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa01fffff; valaddr_reg:x3; val_offset:77424*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77424*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa03fffff; valaddr_reg:x3; val_offset:77427*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77427*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0400000; valaddr_reg:x3; val_offset:77430*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77430*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0600000; valaddr_reg:x3; val_offset:77433*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77433*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0700000; valaddr_reg:x3; val_offset:77436*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77436*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa0780000; valaddr_reg:x3; val_offset:77439*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77439*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07c0000; valaddr_reg:x3; val_offset:77442*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77442*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07e0000; valaddr_reg:x3; val_offset:77445*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77445*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07f0000; valaddr_reg:x3; val_offset:77448*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77448*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07f8000; valaddr_reg:x3; val_offset:77451*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77451*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07fc000; valaddr_reg:x3; val_offset:77454*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77454*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07fe000; valaddr_reg:x3; val_offset:77457*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77457*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07ff000; valaddr_reg:x3; val_offset:77460*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77460*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07ff800; valaddr_reg:x3; val_offset:77463*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77463*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07ffc00; valaddr_reg:x3; val_offset:77466*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77466*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07ffe00; valaddr_reg:x3; val_offset:77469*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77469*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07fff00; valaddr_reg:x3; val_offset:77472*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77472*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07fff80; valaddr_reg:x3; val_offset:77475*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77475*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07fffc0; valaddr_reg:x3; val_offset:77478*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77478*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07fffe0; valaddr_reg:x3; val_offset:77481*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77481*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07ffff0; valaddr_reg:x3; val_offset:77484*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77484*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07ffff8; valaddr_reg:x3; val_offset:77487*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77487*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07ffffc; valaddr_reg:x3; val_offset:77490*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77490*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07ffffe; valaddr_reg:x3; val_offset:77493*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77493*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x40 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xa07fffff; valaddr_reg:x3; val_offset:77496*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77496*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbf800001; valaddr_reg:x3; val_offset:77499*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77499*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbf800003; valaddr_reg:x3; val_offset:77502*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77502*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbf800007; valaddr_reg:x3; val_offset:77505*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77505*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbf999999; valaddr_reg:x3; val_offset:77508*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77508*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:77511*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77511*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:77514*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77514*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:77517*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77517*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:77520*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77520*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:77523*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77523*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:77526*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77526*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:77529*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77529*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:77532*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77532*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:77535*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77535*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:77538*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77538*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:77541*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77541*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x014b20 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5c17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f014b20; op2val:0x803f5c17; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:77544*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77544*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:77547*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77547*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:77550*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77550*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:77553*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77553*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:77556*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77556*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:77559*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77559*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:77562*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77562*0 + 3*201*FLEN/8, x4, x1, x2) + +inst_25855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:77565*0 + 3*201*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77565*0 + 3*201*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943040,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943041,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943043,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943047,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943055,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943071,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943103,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943167,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943295,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943551,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41944063,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41945087,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41947135,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41951231,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41959423,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41975807,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42008575,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42074111,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42205183,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42467327,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42991615,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(44040191,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(46137343,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(46137344,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(48234496,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(49283072,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(49807360,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50069504,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50200576,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50266112,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50298880,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50315264,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50323456,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50327552,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50329600,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50330624,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331136,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331392,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331520,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331584,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331616,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331632,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331640,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331644,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331646,32,FLEN) +NAN_BOXED(2130749232,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331647,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354560,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354561,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354563,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354567,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354575,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354591,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354623,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354687,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684354815,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684355071,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684355583,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684356607,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684358655,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684362751,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684370943,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684387327,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684420095,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684485631,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684616703,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2684878847,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2685403135,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2686451711,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2688548863,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2688548864,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2690646016,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2691694592,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692218880,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692481024,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692612096,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692677632,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692710400,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692726784,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692734976,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692739072,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692741120,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692742144,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692742656,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692742912,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692743040,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692743104,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692743136,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692743152,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692743160,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692743164,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692743166,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(2692743167,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2130791200,32,FLEN) +NAN_BOXED(2151635991,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-203.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-203.S new file mode 100644 index 000000000..f49421d70 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-203.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_25856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:77568*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77568*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:77571*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77571*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:77574*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77574*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:77577*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77577*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:77580*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77580*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:77583*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77583*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:77586*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77586*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:77589*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77589*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:77592*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77592*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2800000; valaddr_reg:x3; val_offset:77595*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77595*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2800001; valaddr_reg:x3; val_offset:77598*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77598*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2800003; valaddr_reg:x3; val_offset:77601*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77601*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2800007; valaddr_reg:x3; val_offset:77604*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77604*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x280000f; valaddr_reg:x3; val_offset:77607*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77607*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x280001f; valaddr_reg:x3; val_offset:77610*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77610*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x280003f; valaddr_reg:x3; val_offset:77613*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77613*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x280007f; valaddr_reg:x3; val_offset:77616*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77616*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x28000ff; valaddr_reg:x3; val_offset:77619*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77619*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x28001ff; valaddr_reg:x3; val_offset:77622*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77622*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x28003ff; valaddr_reg:x3; val_offset:77625*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77625*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x28007ff; valaddr_reg:x3; val_offset:77628*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77628*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2800fff; valaddr_reg:x3; val_offset:77631*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77631*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2801fff; valaddr_reg:x3; val_offset:77634*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77634*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2803fff; valaddr_reg:x3; val_offset:77637*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77637*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2807fff; valaddr_reg:x3; val_offset:77640*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77640*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x280ffff; valaddr_reg:x3; val_offset:77643*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77643*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x281ffff; valaddr_reg:x3; val_offset:77646*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77646*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x283ffff; valaddr_reg:x3; val_offset:77649*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77649*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x287ffff; valaddr_reg:x3; val_offset:77652*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77652*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x28fffff; valaddr_reg:x3; val_offset:77655*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77655*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x29fffff; valaddr_reg:x3; val_offset:77658*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77658*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2bfffff; valaddr_reg:x3; val_offset:77661*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77661*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2c00000; valaddr_reg:x3; val_offset:77664*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77664*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2e00000; valaddr_reg:x3; val_offset:77667*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77667*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2f00000; valaddr_reg:x3; val_offset:77670*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77670*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2f80000; valaddr_reg:x3; val_offset:77673*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77673*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fc0000; valaddr_reg:x3; val_offset:77676*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77676*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fe0000; valaddr_reg:x3; val_offset:77679*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77679*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ff0000; valaddr_reg:x3; val_offset:77682*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77682*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ff8000; valaddr_reg:x3; val_offset:77685*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77685*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ffc000; valaddr_reg:x3; val_offset:77688*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77688*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ffe000; valaddr_reg:x3; val_offset:77691*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77691*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fff000; valaddr_reg:x3; val_offset:77694*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77694*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fff800; valaddr_reg:x3; val_offset:77697*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77697*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fffc00; valaddr_reg:x3; val_offset:77700*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77700*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fffe00; valaddr_reg:x3; val_offset:77703*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77703*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ffff00; valaddr_reg:x3; val_offset:77706*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77706*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ffff80; valaddr_reg:x3; val_offset:77709*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77709*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ffffc0; valaddr_reg:x3; val_offset:77712*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77712*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ffffe0; valaddr_reg:x3; val_offset:77715*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77715*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fffff0; valaddr_reg:x3; val_offset:77718*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77718*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fffff8; valaddr_reg:x3; val_offset:77721*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77721*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fffffc; valaddr_reg:x3; val_offset:77724*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77724*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2fffffe; valaddr_reg:x3; val_offset:77727*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77727*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015206 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015206; op2val:0x0; +op3val:0x2ffffff; valaddr_reg:x3; val_offset:77730*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77730*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7800000; valaddr_reg:x3; val_offset:77733*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77733*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7800001; valaddr_reg:x3; val_offset:77736*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77736*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7800003; valaddr_reg:x3; val_offset:77739*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77739*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7800007; valaddr_reg:x3; val_offset:77742*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77742*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa780000f; valaddr_reg:x3; val_offset:77745*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77745*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa780001f; valaddr_reg:x3; val_offset:77748*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77748*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa780003f; valaddr_reg:x3; val_offset:77751*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77751*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa780007f; valaddr_reg:x3; val_offset:77754*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77754*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa78000ff; valaddr_reg:x3; val_offset:77757*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77757*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa78001ff; valaddr_reg:x3; val_offset:77760*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77760*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa78003ff; valaddr_reg:x3; val_offset:77763*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77763*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa78007ff; valaddr_reg:x3; val_offset:77766*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77766*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7800fff; valaddr_reg:x3; val_offset:77769*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77769*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7801fff; valaddr_reg:x3; val_offset:77772*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77772*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7803fff; valaddr_reg:x3; val_offset:77775*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77775*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7807fff; valaddr_reg:x3; val_offset:77778*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77778*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa780ffff; valaddr_reg:x3; val_offset:77781*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77781*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa781ffff; valaddr_reg:x3; val_offset:77784*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77784*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa783ffff; valaddr_reg:x3; val_offset:77787*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77787*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa787ffff; valaddr_reg:x3; val_offset:77790*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77790*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa78fffff; valaddr_reg:x3; val_offset:77793*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77793*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa79fffff; valaddr_reg:x3; val_offset:77796*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77796*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7bfffff; valaddr_reg:x3; val_offset:77799*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77799*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7c00000; valaddr_reg:x3; val_offset:77802*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77802*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7e00000; valaddr_reg:x3; val_offset:77805*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77805*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7f00000; valaddr_reg:x3; val_offset:77808*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77808*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7f80000; valaddr_reg:x3; val_offset:77811*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77811*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fc0000; valaddr_reg:x3; val_offset:77814*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77814*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fe0000; valaddr_reg:x3; val_offset:77817*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77817*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ff0000; valaddr_reg:x3; val_offset:77820*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77820*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ff8000; valaddr_reg:x3; val_offset:77823*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77823*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ffc000; valaddr_reg:x3; val_offset:77826*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77826*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ffe000; valaddr_reg:x3; val_offset:77829*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77829*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fff000; valaddr_reg:x3; val_offset:77832*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77832*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fff800; valaddr_reg:x3; val_offset:77835*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77835*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fffc00; valaddr_reg:x3; val_offset:77838*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77838*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fffe00; valaddr_reg:x3; val_offset:77841*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77841*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ffff00; valaddr_reg:x3; val_offset:77844*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77844*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ffff80; valaddr_reg:x3; val_offset:77847*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77847*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ffffc0; valaddr_reg:x3; val_offset:77850*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77850*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ffffe0; valaddr_reg:x3; val_offset:77853*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77853*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fffff0; valaddr_reg:x3; val_offset:77856*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77856*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fffff8; valaddr_reg:x3; val_offset:77859*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77859*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fffffc; valaddr_reg:x3; val_offset:77862*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77862*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7fffffe; valaddr_reg:x3; val_offset:77865*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77865*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x4f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xa7ffffff; valaddr_reg:x3; val_offset:77868*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77868*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbf800001; valaddr_reg:x3; val_offset:77871*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77871*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbf800003; valaddr_reg:x3; val_offset:77874*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77874*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbf800007; valaddr_reg:x3; val_offset:77877*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77877*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbf999999; valaddr_reg:x3; val_offset:77880*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77880*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:77883*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77883*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:77886*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77886*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:77889*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77889*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:77892*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77892*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:77895*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77895*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:77898*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77898*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:77901*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77901*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:77904*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77904*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:77907*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77907*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:77910*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77910*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:77913*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77913*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x015d65 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f5324 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f015d65; op2val:0x803f5324; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:77916*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77916*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8800000; valaddr_reg:x3; val_offset:77919*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77919*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8800001; valaddr_reg:x3; val_offset:77922*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77922*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8800003; valaddr_reg:x3; val_offset:77925*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77925*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8800007; valaddr_reg:x3; val_offset:77928*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77928*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb880000f; valaddr_reg:x3; val_offset:77931*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77931*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb880001f; valaddr_reg:x3; val_offset:77934*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77934*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb880003f; valaddr_reg:x3; val_offset:77937*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77937*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb880007f; valaddr_reg:x3; val_offset:77940*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77940*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb88000ff; valaddr_reg:x3; val_offset:77943*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77943*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb88001ff; valaddr_reg:x3; val_offset:77946*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77946*0 + 3*202*FLEN/8, x4, x1, x2) + +inst_25983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb88003ff; valaddr_reg:x3; val_offset:77949*0 + 3*202*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77949*0 + 3*202*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943040,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943041,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943043,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943047,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943055,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943071,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943103,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943167,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943295,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943551,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41944063,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41945087,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41947135,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41951231,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41959423,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41975807,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42008575,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42074111,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42205183,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42467327,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42991615,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(44040191,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(46137343,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(46137344,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(48234496,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(49283072,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(49807360,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50069504,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50200576,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50266112,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50298880,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50315264,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50323456,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50327552,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50329600,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50330624,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331136,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331392,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331520,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331584,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331616,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331632,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331640,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331644,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331646,32,FLEN) +NAN_BOXED(2130792966,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331647,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183680,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183681,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183683,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183687,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183695,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183711,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183743,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183807,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810183935,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810184191,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810184703,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810185727,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810187775,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810191871,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810200063,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810216447,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810249215,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810314751,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810445823,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2810707967,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2811232255,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2812280831,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2814377983,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2814377984,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2816475136,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2817523712,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818048000,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818310144,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818441216,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818506752,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818539520,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818555904,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818564096,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818568192,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818570240,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818571264,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818571776,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572032,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572160,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572224,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572256,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572272,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572280,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572284,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572286,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(2818572287,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2130795877,32,FLEN) +NAN_BOXED(2151633700,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396352,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396353,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396355,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396359,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396367,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396383,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396415,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396479,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396607,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095396863,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095397375,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-204.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-204.S new file mode 100644 index 000000000..bac017af0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-204.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_25984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb88007ff; valaddr_reg:x3; val_offset:77952*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77952*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8800fff; valaddr_reg:x3; val_offset:77955*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77955*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8801fff; valaddr_reg:x3; val_offset:77958*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77958*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8803fff; valaddr_reg:x3; val_offset:77961*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77961*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8807fff; valaddr_reg:x3; val_offset:77964*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77964*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb880ffff; valaddr_reg:x3; val_offset:77967*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77967*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb881ffff; valaddr_reg:x3; val_offset:77970*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77970*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb883ffff; valaddr_reg:x3; val_offset:77973*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77973*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb887ffff; valaddr_reg:x3; val_offset:77976*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77976*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb88fffff; valaddr_reg:x3; val_offset:77979*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77979*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb89fffff; valaddr_reg:x3; val_offset:77982*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77982*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8bfffff; valaddr_reg:x3; val_offset:77985*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77985*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8c00000; valaddr_reg:x3; val_offset:77988*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77988*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8e00000; valaddr_reg:x3; val_offset:77991*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77991*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8f00000; valaddr_reg:x3; val_offset:77994*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77994*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_25999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8f80000; valaddr_reg:x3; val_offset:77997*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 77997*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fc0000; valaddr_reg:x3; val_offset:78000*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78000*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fe0000; valaddr_reg:x3; val_offset:78003*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78003*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ff0000; valaddr_reg:x3; val_offset:78006*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78006*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ff8000; valaddr_reg:x3; val_offset:78009*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78009*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ffc000; valaddr_reg:x3; val_offset:78012*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78012*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ffe000; valaddr_reg:x3; val_offset:78015*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78015*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fff000; valaddr_reg:x3; val_offset:78018*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78018*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fff800; valaddr_reg:x3; val_offset:78021*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78021*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fffc00; valaddr_reg:x3; val_offset:78024*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78024*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fffe00; valaddr_reg:x3; val_offset:78027*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78027*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ffff00; valaddr_reg:x3; val_offset:78030*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78030*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ffff80; valaddr_reg:x3; val_offset:78033*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78033*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ffffc0; valaddr_reg:x3; val_offset:78036*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78036*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ffffe0; valaddr_reg:x3; val_offset:78039*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78039*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fffff0; valaddr_reg:x3; val_offset:78042*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78042*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fffff8; valaddr_reg:x3; val_offset:78045*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78045*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fffffc; valaddr_reg:x3; val_offset:78048*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78048*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8fffffe; valaddr_reg:x3; val_offset:78051*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78051*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x71 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xb8ffffff; valaddr_reg:x3; val_offset:78054*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78054*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbf800001; valaddr_reg:x3; val_offset:78057*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78057*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbf800003; valaddr_reg:x3; val_offset:78060*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78060*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbf800007; valaddr_reg:x3; val_offset:78063*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78063*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbf999999; valaddr_reg:x3; val_offset:78066*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78066*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:78069*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78069*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:78072*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78072*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:78075*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78075*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:78078*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78078*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:78081*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78081*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:78084*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78084*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:78087*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78087*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:78090*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78090*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:78093*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78093*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:78096*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78096*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:78099*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78099*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x01bf0c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3f237c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f01bf0c; op2val:0x803f237c; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:78102*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78102*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef800000; valaddr_reg:x3; val_offset:78105*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78105*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef800001; valaddr_reg:x3; val_offset:78108*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78108*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef800003; valaddr_reg:x3; val_offset:78111*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78111*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef800007; valaddr_reg:x3; val_offset:78114*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78114*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef80000f; valaddr_reg:x3; val_offset:78117*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78117*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef80001f; valaddr_reg:x3; val_offset:78120*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78120*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef80003f; valaddr_reg:x3; val_offset:78123*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78123*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef80007f; valaddr_reg:x3; val_offset:78126*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78126*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef8000ff; valaddr_reg:x3; val_offset:78129*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78129*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef8001ff; valaddr_reg:x3; val_offset:78132*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78132*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef8003ff; valaddr_reg:x3; val_offset:78135*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78135*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef8007ff; valaddr_reg:x3; val_offset:78138*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78138*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef800fff; valaddr_reg:x3; val_offset:78141*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78141*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef801fff; valaddr_reg:x3; val_offset:78144*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78144*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef803fff; valaddr_reg:x3; val_offset:78147*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78147*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef807fff; valaddr_reg:x3; val_offset:78150*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78150*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef80ffff; valaddr_reg:x3; val_offset:78153*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78153*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef81ffff; valaddr_reg:x3; val_offset:78156*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78156*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef83ffff; valaddr_reg:x3; val_offset:78159*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78159*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef87ffff; valaddr_reg:x3; val_offset:78162*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78162*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef8fffff; valaddr_reg:x3; val_offset:78165*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78165*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xef9fffff; valaddr_reg:x3; val_offset:78168*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78168*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefbfffff; valaddr_reg:x3; val_offset:78171*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78171*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefc00000; valaddr_reg:x3; val_offset:78174*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78174*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefe00000; valaddr_reg:x3; val_offset:78177*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78177*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeff00000; valaddr_reg:x3; val_offset:78180*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78180*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeff80000; valaddr_reg:x3; val_offset:78183*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78183*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffc0000; valaddr_reg:x3; val_offset:78186*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78186*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffe0000; valaddr_reg:x3; val_offset:78189*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78189*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefff0000; valaddr_reg:x3; val_offset:78192*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78192*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefff8000; valaddr_reg:x3; val_offset:78195*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78195*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefffc000; valaddr_reg:x3; val_offset:78198*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78198*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefffe000; valaddr_reg:x3; val_offset:78201*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78201*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffff000; valaddr_reg:x3; val_offset:78204*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78204*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffff800; valaddr_reg:x3; val_offset:78207*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78207*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffffc00; valaddr_reg:x3; val_offset:78210*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78210*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffffe00; valaddr_reg:x3; val_offset:78213*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78213*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefffff00; valaddr_reg:x3; val_offset:78216*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78216*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefffff80; valaddr_reg:x3; val_offset:78219*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78219*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefffffc0; valaddr_reg:x3; val_offset:78222*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78222*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefffffe0; valaddr_reg:x3; val_offset:78225*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78225*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffffff0; valaddr_reg:x3; val_offset:78228*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78228*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffffff8; valaddr_reg:x3; val_offset:78231*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78231*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffffffc; valaddr_reg:x3; val_offset:78234*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78234*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xeffffffe; valaddr_reg:x3; val_offset:78237*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78237*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xdf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xefffffff; valaddr_reg:x3; val_offset:78240*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78240*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff000001; valaddr_reg:x3; val_offset:78243*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78243*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff000003; valaddr_reg:x3; val_offset:78246*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78246*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff000007; valaddr_reg:x3; val_offset:78249*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78249*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff199999; valaddr_reg:x3; val_offset:78252*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78252*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff249249; valaddr_reg:x3; val_offset:78255*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78255*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff333333; valaddr_reg:x3; val_offset:78258*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78258*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:78261*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78261*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:78264*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78264*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff444444; valaddr_reg:x3; val_offset:78267*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78267*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:78270*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78270*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:78273*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78273*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff666666; valaddr_reg:x3; val_offset:78276*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78276*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:78279*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78279*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:78282*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78282*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:78285*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78285*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0235d7 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x7ba786 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0235d7; op2val:0xbffba786; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:78288*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78288*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f800000; valaddr_reg:x3; val_offset:78291*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78291*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f800001; valaddr_reg:x3; val_offset:78294*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78294*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f800003; valaddr_reg:x3; val_offset:78297*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78297*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f800007; valaddr_reg:x3; val_offset:78300*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78300*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f80000f; valaddr_reg:x3; val_offset:78303*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78303*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f80001f; valaddr_reg:x3; val_offset:78306*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78306*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f80003f; valaddr_reg:x3; val_offset:78309*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78309*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f80007f; valaddr_reg:x3; val_offset:78312*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78312*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f8000ff; valaddr_reg:x3; val_offset:78315*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78315*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f8001ff; valaddr_reg:x3; val_offset:78318*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78318*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f8003ff; valaddr_reg:x3; val_offset:78321*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78321*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f8007ff; valaddr_reg:x3; val_offset:78324*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78324*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f800fff; valaddr_reg:x3; val_offset:78327*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78327*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f801fff; valaddr_reg:x3; val_offset:78330*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78330*0 + 3*203*FLEN/8, x4, x1, x2) + +inst_26111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f803fff; valaddr_reg:x3; val_offset:78333*0 + 3*203*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78333*0 + 3*203*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095398399,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095400447,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095404543,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095412735,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095429119,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095461887,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095527423,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095658495,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3095920639,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3096444927,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3097493503,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3099590655,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3099590656,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3101687808,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3102736384,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103260672,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103522816,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103653888,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103719424,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103752192,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103768576,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103776768,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103780864,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103782912,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103783936,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784448,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784704,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784832,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784896,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784928,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784944,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784952,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784956,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784958,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3103784959,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2130820876,32,FLEN) +NAN_BOXED(2151621500,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143232,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143233,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143235,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143239,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143247,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143263,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143295,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143359,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143487,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018143743,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018144255,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018145279,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018147327,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018151423,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018159615,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018175999,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018208767,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018274303,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018405375,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4018667519,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4019191807,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4020240383,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4022337535,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4022337536,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4024434688,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4025483264,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026007552,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026269696,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026400768,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026466304,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026499072,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026515456,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026523648,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026527744,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026529792,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026530816,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531328,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531584,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531712,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531776,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531808,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531824,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531832,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531836,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531838,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4026531839,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2130851287,32,FLEN) +NAN_BOXED(3220940678,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482304,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482305,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482307,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482311,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482319,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482335,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482367,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482431,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482559,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528482815,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528483327,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528484351,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528486399,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528490495,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528498687,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-205.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-205.S new file mode 100644 index 000000000..5b6ec5c3a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-205.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_26112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f807fff; valaddr_reg:x3; val_offset:78336*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78336*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f80ffff; valaddr_reg:x3; val_offset:78339*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78339*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f81ffff; valaddr_reg:x3; val_offset:78342*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78342*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f83ffff; valaddr_reg:x3; val_offset:78345*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78345*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f87ffff; valaddr_reg:x3; val_offset:78348*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78348*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f8fffff; valaddr_reg:x3; val_offset:78351*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78351*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1f9fffff; valaddr_reg:x3; val_offset:78354*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78354*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fbfffff; valaddr_reg:x3; val_offset:78357*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78357*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fc00000; valaddr_reg:x3; val_offset:78360*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78360*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fe00000; valaddr_reg:x3; val_offset:78363*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78363*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ff00000; valaddr_reg:x3; val_offset:78366*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78366*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ff80000; valaddr_reg:x3; val_offset:78369*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78369*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffc0000; valaddr_reg:x3; val_offset:78372*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78372*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffe0000; valaddr_reg:x3; val_offset:78375*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78375*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fff0000; valaddr_reg:x3; val_offset:78378*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78378*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fff8000; valaddr_reg:x3; val_offset:78381*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78381*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fffc000; valaddr_reg:x3; val_offset:78384*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78384*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fffe000; valaddr_reg:x3; val_offset:78387*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78387*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffff000; valaddr_reg:x3; val_offset:78390*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78390*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffff800; valaddr_reg:x3; val_offset:78393*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78393*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffffc00; valaddr_reg:x3; val_offset:78396*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78396*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffffe00; valaddr_reg:x3; val_offset:78399*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78399*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fffff00; valaddr_reg:x3; val_offset:78402*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78402*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fffff80; valaddr_reg:x3; val_offset:78405*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78405*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fffffc0; valaddr_reg:x3; val_offset:78408*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78408*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fffffe0; valaddr_reg:x3; val_offset:78411*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78411*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffffff0; valaddr_reg:x3; val_offset:78414*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78414*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffffff8; valaddr_reg:x3; val_offset:78417*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78417*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffffffc; valaddr_reg:x3; val_offset:78420*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78420*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1ffffffe; valaddr_reg:x3; val_offset:78423*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78423*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x3f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x1fffffff; valaddr_reg:x3; val_offset:78426*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78426*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3f800001; valaddr_reg:x3; val_offset:78429*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78429*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3f800003; valaddr_reg:x3; val_offset:78432*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78432*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3f800007; valaddr_reg:x3; val_offset:78435*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78435*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3f999999; valaddr_reg:x3; val_offset:78438*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78438*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:78441*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78441*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:78444*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78444*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:78447*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78447*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:78450*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78450*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:78453*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78453*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:78456*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78456*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:78459*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78459*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:78462*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78462*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:78465*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78465*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:78468*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78468*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:78471*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78471*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0250a3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3edcf1 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0250a3; op2val:0x3edcf1; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:78474*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78474*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b800000; valaddr_reg:x3; val_offset:78477*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78477*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b800001; valaddr_reg:x3; val_offset:78480*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78480*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b800003; valaddr_reg:x3; val_offset:78483*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78483*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b800007; valaddr_reg:x3; val_offset:78486*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78486*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b80000f; valaddr_reg:x3; val_offset:78489*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78489*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b80001f; valaddr_reg:x3; val_offset:78492*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78492*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b80003f; valaddr_reg:x3; val_offset:78495*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78495*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b80007f; valaddr_reg:x3; val_offset:78498*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78498*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b8000ff; valaddr_reg:x3; val_offset:78501*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78501*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b8001ff; valaddr_reg:x3; val_offset:78504*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78504*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b8003ff; valaddr_reg:x3; val_offset:78507*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78507*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b8007ff; valaddr_reg:x3; val_offset:78510*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78510*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b800fff; valaddr_reg:x3; val_offset:78513*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78513*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b801fff; valaddr_reg:x3; val_offset:78516*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78516*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b803fff; valaddr_reg:x3; val_offset:78519*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78519*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b807fff; valaddr_reg:x3; val_offset:78522*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78522*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b80ffff; valaddr_reg:x3; val_offset:78525*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78525*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b81ffff; valaddr_reg:x3; val_offset:78528*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78528*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b83ffff; valaddr_reg:x3; val_offset:78531*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78531*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b87ffff; valaddr_reg:x3; val_offset:78534*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78534*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b8fffff; valaddr_reg:x3; val_offset:78537*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78537*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3b9fffff; valaddr_reg:x3; val_offset:78540*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78540*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bbfffff; valaddr_reg:x3; val_offset:78543*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78543*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bc00000; valaddr_reg:x3; val_offset:78546*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78546*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3be00000; valaddr_reg:x3; val_offset:78549*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78549*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bf00000; valaddr_reg:x3; val_offset:78552*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78552*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bf80000; valaddr_reg:x3; val_offset:78555*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78555*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfc0000; valaddr_reg:x3; val_offset:78558*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78558*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfe0000; valaddr_reg:x3; val_offset:78561*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78561*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bff0000; valaddr_reg:x3; val_offset:78564*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78564*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bff8000; valaddr_reg:x3; val_offset:78567*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78567*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bffc000; valaddr_reg:x3; val_offset:78570*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78570*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bffe000; valaddr_reg:x3; val_offset:78573*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78573*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfff000; valaddr_reg:x3; val_offset:78576*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78576*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfff800; valaddr_reg:x3; val_offset:78579*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78579*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfffc00; valaddr_reg:x3; val_offset:78582*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78582*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfffe00; valaddr_reg:x3; val_offset:78585*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78585*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bffff00; valaddr_reg:x3; val_offset:78588*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78588*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bffff80; valaddr_reg:x3; val_offset:78591*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78591*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bffffc0; valaddr_reg:x3; val_offset:78594*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78594*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bffffe0; valaddr_reg:x3; val_offset:78597*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78597*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfffff0; valaddr_reg:x3; val_offset:78600*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78600*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfffff8; valaddr_reg:x3; val_offset:78603*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78603*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfffffc; valaddr_reg:x3; val_offset:78606*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78606*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bfffffe; valaddr_reg:x3; val_offset:78609*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78609*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x77 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3bffffff; valaddr_reg:x3; val_offset:78612*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78612*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3f800001; valaddr_reg:x3; val_offset:78615*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78615*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3f800003; valaddr_reg:x3; val_offset:78618*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78618*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3f800007; valaddr_reg:x3; val_offset:78621*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78621*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3f999999; valaddr_reg:x3; val_offset:78624*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78624*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:78627*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78627*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:78630*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78630*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:78633*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78633*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:78636*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78636*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:78639*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78639*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:78642*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78642*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:78645*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78645*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:78648*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78648*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:78651*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78651*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:78654*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78654*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:78657*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78657*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x026f45 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ece2e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f026f45; op2val:0x3ece2e; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:78660*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78660*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26000000; valaddr_reg:x3; val_offset:78663*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78663*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26000001; valaddr_reg:x3; val_offset:78666*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78666*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26000003; valaddr_reg:x3; val_offset:78669*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78669*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26000007; valaddr_reg:x3; val_offset:78672*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78672*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x2600000f; valaddr_reg:x3; val_offset:78675*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78675*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x2600001f; valaddr_reg:x3; val_offset:78678*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78678*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x2600003f; valaddr_reg:x3; val_offset:78681*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78681*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x2600007f; valaddr_reg:x3; val_offset:78684*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78684*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x260000ff; valaddr_reg:x3; val_offset:78687*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78687*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x260001ff; valaddr_reg:x3; val_offset:78690*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78690*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x260003ff; valaddr_reg:x3; val_offset:78693*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78693*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x260007ff; valaddr_reg:x3; val_offset:78696*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78696*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26000fff; valaddr_reg:x3; val_offset:78699*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78699*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26001fff; valaddr_reg:x3; val_offset:78702*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78702*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26003fff; valaddr_reg:x3; val_offset:78705*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78705*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26007fff; valaddr_reg:x3; val_offset:78708*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78708*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x2600ffff; valaddr_reg:x3; val_offset:78711*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78711*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x2601ffff; valaddr_reg:x3; val_offset:78714*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78714*0 + 3*204*FLEN/8, x4, x1, x2) + +inst_26239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x2603ffff; valaddr_reg:x3; val_offset:78717*0 + 3*204*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78717*0 + 3*204*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528515071,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528547839,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528613375,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(528744447,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(529006591,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(529530879,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(530579455,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(532676607,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(532676608,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(534773760,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(535822336,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536346624,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536608768,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536739840,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536805376,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536838144,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536854528,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536862720,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536866816,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536868864,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536869888,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870400,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870656,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870784,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870848,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870880,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870896,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870904,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870908,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870910,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(536870911,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130858147,32,FLEN) +NAN_BOXED(4119793,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244352,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244353,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244355,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244359,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244367,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244383,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244415,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244479,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244607,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998244863,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998245375,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998246399,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998248447,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998252543,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998260735,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998277119,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998309887,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998375423,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998506495,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(998768639,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(999292927,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1000341503,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1002438655,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1002438656,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1004535808,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1005584384,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006108672,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006370816,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006501888,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006567424,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006600192,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006616576,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006624768,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006628864,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006630912,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006631936,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632448,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632704,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632832,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632896,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632928,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632944,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632952,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632956,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632958,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1006632959,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130865989,32,FLEN) +NAN_BOXED(4116014,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534208,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534209,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534211,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534215,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534223,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534239,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534271,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534335,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534463,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637534719,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637535231,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637536255,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637538303,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637542399,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637550591,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637566975,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637599743,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637665279,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(637796351,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-206.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-206.S new file mode 100644 index 000000000..b2b7a207c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-206.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_26240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x2607ffff; valaddr_reg:x3; val_offset:78720*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78720*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x260fffff; valaddr_reg:x3; val_offset:78723*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78723*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x261fffff; valaddr_reg:x3; val_offset:78726*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78726*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x263fffff; valaddr_reg:x3; val_offset:78729*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78729*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26400000; valaddr_reg:x3; val_offset:78732*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78732*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26600000; valaddr_reg:x3; val_offset:78735*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78735*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26700000; valaddr_reg:x3; val_offset:78738*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78738*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x26780000; valaddr_reg:x3; val_offset:78741*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78741*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267c0000; valaddr_reg:x3; val_offset:78744*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78744*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267e0000; valaddr_reg:x3; val_offset:78747*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78747*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267f0000; valaddr_reg:x3; val_offset:78750*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78750*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267f8000; valaddr_reg:x3; val_offset:78753*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78753*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267fc000; valaddr_reg:x3; val_offset:78756*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78756*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267fe000; valaddr_reg:x3; val_offset:78759*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78759*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267ff000; valaddr_reg:x3; val_offset:78762*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78762*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267ff800; valaddr_reg:x3; val_offset:78765*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78765*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267ffc00; valaddr_reg:x3; val_offset:78768*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78768*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267ffe00; valaddr_reg:x3; val_offset:78771*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78771*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267fff00; valaddr_reg:x3; val_offset:78774*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78774*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267fff80; valaddr_reg:x3; val_offset:78777*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78777*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267fffc0; valaddr_reg:x3; val_offset:78780*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78780*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267fffe0; valaddr_reg:x3; val_offset:78783*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78783*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267ffff0; valaddr_reg:x3; val_offset:78786*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78786*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267ffff8; valaddr_reg:x3; val_offset:78789*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78789*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267ffffc; valaddr_reg:x3; val_offset:78792*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78792*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267ffffe; valaddr_reg:x3; val_offset:78795*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78795*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x4c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x267fffff; valaddr_reg:x3; val_offset:78798*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78798*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3f800001; valaddr_reg:x3; val_offset:78801*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78801*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3f800003; valaddr_reg:x3; val_offset:78804*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78804*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3f800007; valaddr_reg:x3; val_offset:78807*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78807*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3f999999; valaddr_reg:x3; val_offset:78810*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78810*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:78813*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78813*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:78816*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78816*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:78819*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78819*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:78822*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78822*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:78825*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78825*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:78828*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78828*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:78831*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78831*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:78834*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78834*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:78837*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78837*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:78840*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78840*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:78843*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78843*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x027585 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ecb2c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f027585; op2val:0x3ecb2c; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:78846*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78846*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80000000; valaddr_reg:x3; val_offset:78849*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78849*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:78852*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78852*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:78855*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78855*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:78858*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78858*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x8000000f; valaddr_reg:x3; val_offset:78861*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78861*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x8000001f; valaddr_reg:x3; val_offset:78864*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78864*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x8000003f; valaddr_reg:x3; val_offset:78867*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78867*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x8000007f; valaddr_reg:x3; val_offset:78870*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78870*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x800000ff; valaddr_reg:x3; val_offset:78873*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78873*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x800001ff; valaddr_reg:x3; val_offset:78876*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78876*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x800003ff; valaddr_reg:x3; val_offset:78879*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78879*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x800007ff; valaddr_reg:x3; val_offset:78882*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78882*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80000fff; valaddr_reg:x3; val_offset:78885*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78885*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80001fff; valaddr_reg:x3; val_offset:78888*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78888*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80003fff; valaddr_reg:x3; val_offset:78891*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78891*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80007fff; valaddr_reg:x3; val_offset:78894*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78894*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x8000ffff; valaddr_reg:x3; val_offset:78897*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78897*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x8001ffff; valaddr_reg:x3; val_offset:78900*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78900*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x8003ffff; valaddr_reg:x3; val_offset:78903*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78903*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x8007ffff; valaddr_reg:x3; val_offset:78906*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78906*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x800fffff; valaddr_reg:x3; val_offset:78909*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78909*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x801fffff; valaddr_reg:x3; val_offset:78912*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78912*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x803fffff; valaddr_reg:x3; val_offset:78915*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78915*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80400000; valaddr_reg:x3; val_offset:78918*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78918*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80600000; valaddr_reg:x3; val_offset:78921*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78921*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80700000; valaddr_reg:x3; val_offset:78924*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78924*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80780000; valaddr_reg:x3; val_offset:78927*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78927*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807c0000; valaddr_reg:x3; val_offset:78930*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78930*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807e0000; valaddr_reg:x3; val_offset:78933*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78933*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807f0000; valaddr_reg:x3; val_offset:78936*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78936*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807f8000; valaddr_reg:x3; val_offset:78939*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78939*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807fc000; valaddr_reg:x3; val_offset:78942*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78942*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807fe000; valaddr_reg:x3; val_offset:78945*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78945*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807ff000; valaddr_reg:x3; val_offset:78948*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78948*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807ff800; valaddr_reg:x3; val_offset:78951*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78951*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807ffc00; valaddr_reg:x3; val_offset:78954*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78954*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807ffe00; valaddr_reg:x3; val_offset:78957*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78957*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807fff00; valaddr_reg:x3; val_offset:78960*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78960*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807fff80; valaddr_reg:x3; val_offset:78963*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78963*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807fffc0; valaddr_reg:x3; val_offset:78966*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78966*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807fffe0; valaddr_reg:x3; val_offset:78969*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78969*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807ffff0; valaddr_reg:x3; val_offset:78972*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78972*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:78975*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78975*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:78978*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78978*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:78981*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78981*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x807fffff; valaddr_reg:x3; val_offset:78984*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78984*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:78987*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78987*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:78990*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78990*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:78993*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78993*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:78996*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78996*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:78999*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 78999*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:79002*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79002*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:79005*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79005*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:79008*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79008*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:79011*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79011*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:79014*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79014*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:79017*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79017*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:79020*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79020*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:79023*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79023*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:79026*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79026*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:79029*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79029*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02c0d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02c0d3; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:79032*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79032*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:79035*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79035*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:79038*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79038*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:79041*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79041*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:79044*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79044*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:79047*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79047*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:79050*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79050*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:79053*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79053*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:79056*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79056*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:79059*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79059*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:79062*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79062*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:79065*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79065*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:79068*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79068*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:79071*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79071*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:79074*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79074*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:79077*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79077*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:79080*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79080*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a000000; valaddr_reg:x3; val_offset:79083*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79083*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a000001; valaddr_reg:x3; val_offset:79086*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79086*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a000003; valaddr_reg:x3; val_offset:79089*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79089*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a000007; valaddr_reg:x3; val_offset:79092*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79092*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a00000f; valaddr_reg:x3; val_offset:79095*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79095*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a00001f; valaddr_reg:x3; val_offset:79098*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79098*0 + 3*205*FLEN/8, x4, x1, x2) + +inst_26367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a00003f; valaddr_reg:x3; val_offset:79101*0 + 3*205*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79101*0 + 3*205*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(638058495,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(638582783,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(639631359,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(641728511,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(641728512,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(643825664,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(644874240,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645398528,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645660672,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645791744,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645857280,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645890048,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645906432,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645914624,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645918720,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645920768,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645921792,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922304,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922560,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922688,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922752,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922784,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922800,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922808,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922812,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922814,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(645922815,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130867589,32,FLEN) +NAN_BOXED(4115244,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483663,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483679,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483711,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483775,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483903,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484159,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484671,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147485695,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147487743,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147491839,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147500031,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147516415,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147549183,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147614719,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147745791,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148007935,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148532223,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149580799,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677951,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677952,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153775104,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154823680,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155347968,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155610112,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155741184,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155806720,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155839488,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155855872,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155864064,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155868160,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155870208,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871232,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871744,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872000,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872128,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872192,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872224,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872240,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872255,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2130886867,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241513984,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241513985,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241513987,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241513991,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241513999,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241514015,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241514047,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-207.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-207.S new file mode 100644 index 000000000..5d2eafa36 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-207.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_26368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a00007f; valaddr_reg:x3; val_offset:79104*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79104*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a0000ff; valaddr_reg:x3; val_offset:79107*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79107*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a0001ff; valaddr_reg:x3; val_offset:79110*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79110*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a0003ff; valaddr_reg:x3; val_offset:79113*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79113*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a0007ff; valaddr_reg:x3; val_offset:79116*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79116*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a000fff; valaddr_reg:x3; val_offset:79119*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79119*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a001fff; valaddr_reg:x3; val_offset:79122*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79122*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a003fff; valaddr_reg:x3; val_offset:79125*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79125*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a007fff; valaddr_reg:x3; val_offset:79128*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79128*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a00ffff; valaddr_reg:x3; val_offset:79131*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79131*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a01ffff; valaddr_reg:x3; val_offset:79134*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79134*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a03ffff; valaddr_reg:x3; val_offset:79137*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79137*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a07ffff; valaddr_reg:x3; val_offset:79140*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79140*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a0fffff; valaddr_reg:x3; val_offset:79143*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79143*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a1fffff; valaddr_reg:x3; val_offset:79146*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79146*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a3fffff; valaddr_reg:x3; val_offset:79149*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79149*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a400000; valaddr_reg:x3; val_offset:79152*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79152*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a600000; valaddr_reg:x3; val_offset:79155*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79155*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a700000; valaddr_reg:x3; val_offset:79158*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79158*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a780000; valaddr_reg:x3; val_offset:79161*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79161*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7c0000; valaddr_reg:x3; val_offset:79164*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79164*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7e0000; valaddr_reg:x3; val_offset:79167*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79167*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7f0000; valaddr_reg:x3; val_offset:79170*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79170*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7f8000; valaddr_reg:x3; val_offset:79173*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79173*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7fc000; valaddr_reg:x3; val_offset:79176*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79176*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7fe000; valaddr_reg:x3; val_offset:79179*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79179*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7ff000; valaddr_reg:x3; val_offset:79182*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79182*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7ff800; valaddr_reg:x3; val_offset:79185*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79185*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7ffc00; valaddr_reg:x3; val_offset:79188*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79188*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7ffe00; valaddr_reg:x3; val_offset:79191*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79191*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7fff00; valaddr_reg:x3; val_offset:79194*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79194*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7fff80; valaddr_reg:x3; val_offset:79197*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79197*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7fffc0; valaddr_reg:x3; val_offset:79200*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79200*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7fffe0; valaddr_reg:x3; val_offset:79203*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79203*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7ffff0; valaddr_reg:x3; val_offset:79206*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79206*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7ffff8; valaddr_reg:x3; val_offset:79209*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79209*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7ffffc; valaddr_reg:x3; val_offset:79212*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79212*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7ffffe; valaddr_reg:x3; val_offset:79215*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79215*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x02ce4e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ea08d and fs3 == 0 and fe3 == 0x94 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f02ce4e; op2val:0x3ea08d; +op3val:0x4a7fffff; valaddr_reg:x3; val_offset:79218*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79218*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:79221*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79221*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:79224*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79224*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:79227*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79227*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:79230*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79230*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:79233*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79233*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:79236*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79236*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:79239*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79239*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:79242*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79242*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:79245*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79245*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:79248*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79248*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:79251*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79251*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:79254*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79254*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:79257*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79257*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:79260*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79260*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:79263*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79263*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:79266*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79266*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe800000; valaddr_reg:x3; val_offset:79269*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79269*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe800001; valaddr_reg:x3; val_offset:79272*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79272*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe800003; valaddr_reg:x3; val_offset:79275*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79275*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe800007; valaddr_reg:x3; val_offset:79278*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79278*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe80000f; valaddr_reg:x3; val_offset:79281*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79281*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe80001f; valaddr_reg:x3; val_offset:79284*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79284*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe80003f; valaddr_reg:x3; val_offset:79287*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79287*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe80007f; valaddr_reg:x3; val_offset:79290*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79290*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe8000ff; valaddr_reg:x3; val_offset:79293*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79293*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe8001ff; valaddr_reg:x3; val_offset:79296*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79296*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe8003ff; valaddr_reg:x3; val_offset:79299*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79299*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe8007ff; valaddr_reg:x3; val_offset:79302*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79302*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe800fff; valaddr_reg:x3; val_offset:79305*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79305*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe801fff; valaddr_reg:x3; val_offset:79308*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79308*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe803fff; valaddr_reg:x3; val_offset:79311*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79311*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe807fff; valaddr_reg:x3; val_offset:79314*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79314*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe80ffff; valaddr_reg:x3; val_offset:79317*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79317*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe81ffff; valaddr_reg:x3; val_offset:79320*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79320*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe83ffff; valaddr_reg:x3; val_offset:79323*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79323*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe87ffff; valaddr_reg:x3; val_offset:79326*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79326*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe8fffff; valaddr_reg:x3; val_offset:79329*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79329*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xe9fffff; valaddr_reg:x3; val_offset:79332*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79332*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xebfffff; valaddr_reg:x3; val_offset:79335*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79335*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xec00000; valaddr_reg:x3; val_offset:79338*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79338*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xee00000; valaddr_reg:x3; val_offset:79341*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79341*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xef00000; valaddr_reg:x3; val_offset:79344*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79344*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xef80000; valaddr_reg:x3; val_offset:79347*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79347*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefc0000; valaddr_reg:x3; val_offset:79350*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79350*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefe0000; valaddr_reg:x3; val_offset:79353*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79353*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeff0000; valaddr_reg:x3; val_offset:79356*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79356*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeff8000; valaddr_reg:x3; val_offset:79359*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79359*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeffc000; valaddr_reg:x3; val_offset:79362*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79362*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeffe000; valaddr_reg:x3; val_offset:79365*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79365*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefff000; valaddr_reg:x3; val_offset:79368*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79368*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefff800; valaddr_reg:x3; val_offset:79371*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79371*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefffc00; valaddr_reg:x3; val_offset:79374*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79374*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefffe00; valaddr_reg:x3; val_offset:79377*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79377*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeffff00; valaddr_reg:x3; val_offset:79380*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79380*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeffff80; valaddr_reg:x3; val_offset:79383*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79383*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeffffc0; valaddr_reg:x3; val_offset:79386*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79386*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeffffe0; valaddr_reg:x3; val_offset:79389*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79389*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefffff0; valaddr_reg:x3; val_offset:79392*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79392*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefffff8; valaddr_reg:x3; val_offset:79395*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79395*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefffffc; valaddr_reg:x3; val_offset:79398*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79398*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xefffffe; valaddr_reg:x3; val_offset:79401*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79401*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x030bb1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f030bb1; op2val:0x0; +op3val:0xeffffff; valaddr_reg:x3; val_offset:79404*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79404*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23000000; valaddr_reg:x3; val_offset:79407*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79407*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23000001; valaddr_reg:x3; val_offset:79410*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79410*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23000003; valaddr_reg:x3; val_offset:79413*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79413*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23000007; valaddr_reg:x3; val_offset:79416*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79416*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x2300000f; valaddr_reg:x3; val_offset:79419*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79419*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x2300001f; valaddr_reg:x3; val_offset:79422*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79422*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x2300003f; valaddr_reg:x3; val_offset:79425*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79425*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x2300007f; valaddr_reg:x3; val_offset:79428*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79428*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x230000ff; valaddr_reg:x3; val_offset:79431*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79431*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x230001ff; valaddr_reg:x3; val_offset:79434*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79434*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x230003ff; valaddr_reg:x3; val_offset:79437*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79437*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x230007ff; valaddr_reg:x3; val_offset:79440*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79440*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23000fff; valaddr_reg:x3; val_offset:79443*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79443*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23001fff; valaddr_reg:x3; val_offset:79446*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79446*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23003fff; valaddr_reg:x3; val_offset:79449*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79449*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23007fff; valaddr_reg:x3; val_offset:79452*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79452*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x2300ffff; valaddr_reg:x3; val_offset:79455*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79455*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x2301ffff; valaddr_reg:x3; val_offset:79458*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79458*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x2303ffff; valaddr_reg:x3; val_offset:79461*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79461*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x2307ffff; valaddr_reg:x3; val_offset:79464*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79464*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x230fffff; valaddr_reg:x3; val_offset:79467*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79467*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x231fffff; valaddr_reg:x3; val_offset:79470*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79470*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x233fffff; valaddr_reg:x3; val_offset:79473*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79473*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23400000; valaddr_reg:x3; val_offset:79476*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79476*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23600000; valaddr_reg:x3; val_offset:79479*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79479*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23700000; valaddr_reg:x3; val_offset:79482*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79482*0 + 3*206*FLEN/8, x4, x1, x2) + +inst_26495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x23780000; valaddr_reg:x3; val_offset:79485*0 + 3*206*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79485*0 + 3*206*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241514111,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241514239,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241514495,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241515007,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241516031,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241518079,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241522175,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241530367,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241546751,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241579519,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241645055,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1241776127,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1242038271,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1242562559,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1243611135,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1245708287,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1245708288,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1247805440,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1248854016,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249378304,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249640448,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249771520,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249837056,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249869824,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249886208,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249894400,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249898496,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249900544,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249901568,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902080,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902336,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902464,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902528,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902560,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902576,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902584,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902588,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902590,32,FLEN) +NAN_BOXED(2130890318,32,FLEN) +NAN_BOXED(4104333,32,FLEN) +NAN_BOXED(1249902591,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269632,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269633,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269635,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269639,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269647,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269663,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269695,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269759,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269887,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243270143,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243270655,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243271679,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243273727,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243277823,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243286015,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243302399,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243335167,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243400703,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243531775,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243793919,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(244318207,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(245366783,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(247463935,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(247463936,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(249561088,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(250609664,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251133952,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251396096,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251527168,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251592704,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251625472,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251641856,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251650048,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251654144,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251656192,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657216,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657728,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251657984,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658112,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658176,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658208,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658224,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658232,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658236,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658238,32,FLEN) +NAN_BOXED(2130906033,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658239,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202560,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202561,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202563,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202567,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202575,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202591,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202623,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202687,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587202815,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587203071,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587203583,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587204607,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587206655,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587210751,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587218943,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587235327,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587268095,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587333631,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587464703,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(587726847,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(588251135,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(589299711,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(591396863,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(591396864,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(593494016,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(594542592,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595066880,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-208.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-208.S new file mode 100644 index 000000000..0f0526d66 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-208.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_26496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237c0000; valaddr_reg:x3; val_offset:79488*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79488*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237e0000; valaddr_reg:x3; val_offset:79491*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79491*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237f0000; valaddr_reg:x3; val_offset:79494*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79494*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237f8000; valaddr_reg:x3; val_offset:79497*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79497*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237fc000; valaddr_reg:x3; val_offset:79500*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79500*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237fe000; valaddr_reg:x3; val_offset:79503*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79503*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237ff000; valaddr_reg:x3; val_offset:79506*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79506*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237ff800; valaddr_reg:x3; val_offset:79509*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79509*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237ffc00; valaddr_reg:x3; val_offset:79512*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79512*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237ffe00; valaddr_reg:x3; val_offset:79515*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79515*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237fff00; valaddr_reg:x3; val_offset:79518*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79518*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237fff80; valaddr_reg:x3; val_offset:79521*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79521*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237fffc0; valaddr_reg:x3; val_offset:79524*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79524*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237fffe0; valaddr_reg:x3; val_offset:79527*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79527*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237ffff0; valaddr_reg:x3; val_offset:79530*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79530*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237ffff8; valaddr_reg:x3; val_offset:79533*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79533*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237ffffc; valaddr_reg:x3; val_offset:79536*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79536*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237ffffe; valaddr_reg:x3; val_offset:79539*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79539*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x46 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x237fffff; valaddr_reg:x3; val_offset:79542*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79542*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3f800001; valaddr_reg:x3; val_offset:79545*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79545*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3f800003; valaddr_reg:x3; val_offset:79548*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79548*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3f800007; valaddr_reg:x3; val_offset:79551*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79551*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3f999999; valaddr_reg:x3; val_offset:79554*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79554*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:79557*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79557*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:79560*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79560*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:79563*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79563*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:79566*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79566*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:79569*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79569*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:79572*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79572*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:79575*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79575*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:79578*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79578*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:79581*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79581*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:79584*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79584*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:79587*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79587*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x033b4f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3e6c87 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f033b4f; op2val:0x3e6c87; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:79590*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79590*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3000000; valaddr_reg:x3; val_offset:79593*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79593*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3000001; valaddr_reg:x3; val_offset:79596*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79596*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3000003; valaddr_reg:x3; val_offset:79599*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79599*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3000007; valaddr_reg:x3; val_offset:79602*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79602*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe300000f; valaddr_reg:x3; val_offset:79605*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79605*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe300001f; valaddr_reg:x3; val_offset:79608*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79608*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe300003f; valaddr_reg:x3; val_offset:79611*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79611*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe300007f; valaddr_reg:x3; val_offset:79614*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79614*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe30000ff; valaddr_reg:x3; val_offset:79617*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79617*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe30001ff; valaddr_reg:x3; val_offset:79620*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79620*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe30003ff; valaddr_reg:x3; val_offset:79623*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79623*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe30007ff; valaddr_reg:x3; val_offset:79626*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79626*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3000fff; valaddr_reg:x3; val_offset:79629*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79629*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3001fff; valaddr_reg:x3; val_offset:79632*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79632*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3003fff; valaddr_reg:x3; val_offset:79635*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79635*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3007fff; valaddr_reg:x3; val_offset:79638*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79638*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe300ffff; valaddr_reg:x3; val_offset:79641*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79641*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe301ffff; valaddr_reg:x3; val_offset:79644*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79644*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe303ffff; valaddr_reg:x3; val_offset:79647*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79647*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe307ffff; valaddr_reg:x3; val_offset:79650*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79650*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe30fffff; valaddr_reg:x3; val_offset:79653*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79653*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe31fffff; valaddr_reg:x3; val_offset:79656*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79656*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe33fffff; valaddr_reg:x3; val_offset:79659*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79659*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3400000; valaddr_reg:x3; val_offset:79662*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79662*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3600000; valaddr_reg:x3; val_offset:79665*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79665*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3700000; valaddr_reg:x3; val_offset:79668*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79668*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe3780000; valaddr_reg:x3; val_offset:79671*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79671*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37c0000; valaddr_reg:x3; val_offset:79674*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79674*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37e0000; valaddr_reg:x3; val_offset:79677*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79677*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37f0000; valaddr_reg:x3; val_offset:79680*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79680*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37f8000; valaddr_reg:x3; val_offset:79683*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79683*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37fc000; valaddr_reg:x3; val_offset:79686*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79686*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37fe000; valaddr_reg:x3; val_offset:79689*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79689*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37ff000; valaddr_reg:x3; val_offset:79692*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79692*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37ff800; valaddr_reg:x3; val_offset:79695*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79695*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37ffc00; valaddr_reg:x3; val_offset:79698*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79698*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37ffe00; valaddr_reg:x3; val_offset:79701*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79701*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37fff00; valaddr_reg:x3; val_offset:79704*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79704*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37fff80; valaddr_reg:x3; val_offset:79707*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79707*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37fffc0; valaddr_reg:x3; val_offset:79710*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79710*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37fffe0; valaddr_reg:x3; val_offset:79713*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79713*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37ffff0; valaddr_reg:x3; val_offset:79716*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79716*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37ffff8; valaddr_reg:x3; val_offset:79719*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79719*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37ffffc; valaddr_reg:x3; val_offset:79722*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79722*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37ffffe; valaddr_reg:x3; val_offset:79725*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79725*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xc6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xe37fffff; valaddr_reg:x3; val_offset:79728*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79728*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff000001; valaddr_reg:x3; val_offset:79731*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79731*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff000003; valaddr_reg:x3; val_offset:79734*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79734*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff000007; valaddr_reg:x3; val_offset:79737*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79737*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff199999; valaddr_reg:x3; val_offset:79740*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79740*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff249249; valaddr_reg:x3; val_offset:79743*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79743*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff333333; valaddr_reg:x3; val_offset:79746*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79746*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:79749*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79749*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:79752*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79752*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff444444; valaddr_reg:x3; val_offset:79755*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79755*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:79758*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79758*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:79761*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79761*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff666666; valaddr_reg:x3; val_offset:79764*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79764*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:79767*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79767*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:79770*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79770*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:79773*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79773*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04226b and fs2 == 1 and fe2 == 0x7f and fm2 == 0x77fd64 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04226b; op2val:0xbff7fd64; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:79776*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79776*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb800000; valaddr_reg:x3; val_offset:79779*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79779*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb800001; valaddr_reg:x3; val_offset:79782*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79782*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb800003; valaddr_reg:x3; val_offset:79785*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79785*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb800007; valaddr_reg:x3; val_offset:79788*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79788*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb80000f; valaddr_reg:x3; val_offset:79791*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79791*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb80001f; valaddr_reg:x3; val_offset:79794*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79794*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb80003f; valaddr_reg:x3; val_offset:79797*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79797*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb80007f; valaddr_reg:x3; val_offset:79800*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79800*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb8000ff; valaddr_reg:x3; val_offset:79803*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79803*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb8001ff; valaddr_reg:x3; val_offset:79806*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79806*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb8003ff; valaddr_reg:x3; val_offset:79809*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79809*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb8007ff; valaddr_reg:x3; val_offset:79812*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79812*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb800fff; valaddr_reg:x3; val_offset:79815*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79815*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb801fff; valaddr_reg:x3; val_offset:79818*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79818*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb803fff; valaddr_reg:x3; val_offset:79821*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79821*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb807fff; valaddr_reg:x3; val_offset:79824*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79824*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb80ffff; valaddr_reg:x3; val_offset:79827*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79827*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb81ffff; valaddr_reg:x3; val_offset:79830*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79830*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb83ffff; valaddr_reg:x3; val_offset:79833*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79833*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb87ffff; valaddr_reg:x3; val_offset:79836*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79836*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb8fffff; valaddr_reg:x3; val_offset:79839*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79839*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbb9fffff; valaddr_reg:x3; val_offset:79842*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79842*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbbfffff; valaddr_reg:x3; val_offset:79845*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79845*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbc00000; valaddr_reg:x3; val_offset:79848*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79848*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbe00000; valaddr_reg:x3; val_offset:79851*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79851*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbf00000; valaddr_reg:x3; val_offset:79854*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79854*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbf80000; valaddr_reg:x3; val_offset:79857*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79857*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfc0000; valaddr_reg:x3; val_offset:79860*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79860*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfe0000; valaddr_reg:x3; val_offset:79863*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79863*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbff0000; valaddr_reg:x3; val_offset:79866*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79866*0 + 3*207*FLEN/8, x4, x1, x2) + +inst_26623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbff8000; valaddr_reg:x3; val_offset:79869*0 + 3*207*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79869*0 + 3*207*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595329024,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595460096,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595525632,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595558400,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595574784,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595582976,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595587072,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595589120,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595590144,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595590656,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595590912,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595591040,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595591104,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595591136,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595591152,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595591160,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595591164,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595591166,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(595591167,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2130918223,32,FLEN) +NAN_BOXED(4091015,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428032,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428033,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428035,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428039,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428047,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428063,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428095,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428159,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428287,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808428543,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808429055,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808430079,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808432127,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808436223,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808444415,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808460799,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808493567,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808559103,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808690175,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3808952319,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3809476607,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3810525183,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3812622335,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3812622336,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3814719488,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3815768064,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816292352,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816554496,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816685568,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816751104,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816783872,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816800256,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816808448,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816812544,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816814592,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816815616,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816128,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816384,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816512,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816576,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816608,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816624,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816632,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816636,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816638,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(3816816639,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2130977387,32,FLEN) +NAN_BOXED(3220700516,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728000,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728001,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728003,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728007,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728015,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728031,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728063,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728127,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728255,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145728511,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145729023,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145730047,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145732095,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145736191,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145744383,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145760767,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145793535,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145859071,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3145990143,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3146252287,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3146776575,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3147825151,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3149922303,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3149922304,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3152019456,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3153068032,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3153592320,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3153854464,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3153985536,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154051072,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154083840,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-209.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-209.S new file mode 100644 index 000000000..6da4043cb --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-209.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_26624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbffc000; valaddr_reg:x3; val_offset:79872*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79872*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbffe000; valaddr_reg:x3; val_offset:79875*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79875*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfff000; valaddr_reg:x3; val_offset:79878*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79878*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfff800; valaddr_reg:x3; val_offset:79881*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79881*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfffc00; valaddr_reg:x3; val_offset:79884*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79884*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfffe00; valaddr_reg:x3; val_offset:79887*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79887*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbffff00; valaddr_reg:x3; val_offset:79890*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79890*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbffff80; valaddr_reg:x3; val_offset:79893*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79893*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbffffc0; valaddr_reg:x3; val_offset:79896*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79896*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbffffe0; valaddr_reg:x3; val_offset:79899*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79899*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfffff0; valaddr_reg:x3; val_offset:79902*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79902*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfffff8; valaddr_reg:x3; val_offset:79905*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79905*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfffffc; valaddr_reg:x3; val_offset:79908*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79908*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbfffffe; valaddr_reg:x3; val_offset:79911*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79911*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x77 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbbffffff; valaddr_reg:x3; val_offset:79914*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79914*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbf800001; valaddr_reg:x3; val_offset:79917*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79917*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbf800003; valaddr_reg:x3; val_offset:79920*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79920*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbf800007; valaddr_reg:x3; val_offset:79923*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79923*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbf999999; valaddr_reg:x3; val_offset:79926*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79926*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:79929*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79929*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:79932*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79932*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:79935*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79935*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:79938*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79938*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:79941*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79941*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:79944*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79944*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:79947*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79947*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:79950*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79950*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:79953*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79953*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:79956*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79956*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:79959*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79959*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04331d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3df784 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04331d; op2val:0x803df784; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:79962*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79962*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69800000; valaddr_reg:x3; val_offset:79965*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79965*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69800001; valaddr_reg:x3; val_offset:79968*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79968*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69800003; valaddr_reg:x3; val_offset:79971*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79971*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69800007; valaddr_reg:x3; val_offset:79974*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79974*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x6980000f; valaddr_reg:x3; val_offset:79977*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79977*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x6980001f; valaddr_reg:x3; val_offset:79980*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79980*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x6980003f; valaddr_reg:x3; val_offset:79983*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79983*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x6980007f; valaddr_reg:x3; val_offset:79986*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79986*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x698000ff; valaddr_reg:x3; val_offset:79989*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79989*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x698001ff; valaddr_reg:x3; val_offset:79992*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79992*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x698003ff; valaddr_reg:x3; val_offset:79995*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79995*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x698007ff; valaddr_reg:x3; val_offset:79998*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 79998*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69800fff; valaddr_reg:x3; val_offset:80001*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80001*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69801fff; valaddr_reg:x3; val_offset:80004*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80004*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69803fff; valaddr_reg:x3; val_offset:80007*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80007*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69807fff; valaddr_reg:x3; val_offset:80010*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80010*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x6980ffff; valaddr_reg:x3; val_offset:80013*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80013*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x6981ffff; valaddr_reg:x3; val_offset:80016*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80016*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x6983ffff; valaddr_reg:x3; val_offset:80019*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80019*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x6987ffff; valaddr_reg:x3; val_offset:80022*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80022*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x698fffff; valaddr_reg:x3; val_offset:80025*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80025*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x699fffff; valaddr_reg:x3; val_offset:80028*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80028*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69bfffff; valaddr_reg:x3; val_offset:80031*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80031*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69c00000; valaddr_reg:x3; val_offset:80034*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80034*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69e00000; valaddr_reg:x3; val_offset:80037*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80037*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69f00000; valaddr_reg:x3; val_offset:80040*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80040*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69f80000; valaddr_reg:x3; val_offset:80043*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80043*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fc0000; valaddr_reg:x3; val_offset:80046*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80046*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fe0000; valaddr_reg:x3; val_offset:80049*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80049*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ff0000; valaddr_reg:x3; val_offset:80052*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80052*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ff8000; valaddr_reg:x3; val_offset:80055*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80055*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ffc000; valaddr_reg:x3; val_offset:80058*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80058*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ffe000; valaddr_reg:x3; val_offset:80061*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80061*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fff000; valaddr_reg:x3; val_offset:80064*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80064*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fff800; valaddr_reg:x3; val_offset:80067*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80067*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fffc00; valaddr_reg:x3; val_offset:80070*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80070*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fffe00; valaddr_reg:x3; val_offset:80073*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80073*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ffff00; valaddr_reg:x3; val_offset:80076*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80076*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ffff80; valaddr_reg:x3; val_offset:80079*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80079*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ffffc0; valaddr_reg:x3; val_offset:80082*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80082*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ffffe0; valaddr_reg:x3; val_offset:80085*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80085*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fffff0; valaddr_reg:x3; val_offset:80088*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80088*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fffff8; valaddr_reg:x3; val_offset:80091*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80091*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fffffc; valaddr_reg:x3; val_offset:80094*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80094*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69fffffe; valaddr_reg:x3; val_offset:80097*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80097*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xd3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x69ffffff; valaddr_reg:x3; val_offset:80100*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80100*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f000001; valaddr_reg:x3; val_offset:80103*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80103*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f000003; valaddr_reg:x3; val_offset:80106*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80106*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f000007; valaddr_reg:x3; val_offset:80109*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80109*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f199999; valaddr_reg:x3; val_offset:80112*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80112*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f249249; valaddr_reg:x3; val_offset:80115*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80115*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f333333; valaddr_reg:x3; val_offset:80118*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80118*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:80121*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80121*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:80124*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80124*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f444444; valaddr_reg:x3; val_offset:80127*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80127*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:80130*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80130*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:80133*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80133*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f666666; valaddr_reg:x3; val_offset:80136*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80136*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:80139*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80139*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:80142*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80142*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:80145*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80145*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0460a7 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x7788cd and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0460a7; op2val:0x3ff788cd; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:80148*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80148*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3f800001; valaddr_reg:x3; val_offset:80151*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80151*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3f800003; valaddr_reg:x3; val_offset:80154*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80154*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3f800007; valaddr_reg:x3; val_offset:80157*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80157*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3f999999; valaddr_reg:x3; val_offset:80160*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80160*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:80163*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80163*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:80166*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80166*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:80169*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80169*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:80172*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80172*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:80175*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80175*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:80178*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80178*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:80181*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80181*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:80184*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80184*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:80187*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80187*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:80190*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80190*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:80193*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80193*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:80196*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80196*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e000000; valaddr_reg:x3; val_offset:80199*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80199*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e000001; valaddr_reg:x3; val_offset:80202*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80202*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e000003; valaddr_reg:x3; val_offset:80205*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80205*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e000007; valaddr_reg:x3; val_offset:80208*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80208*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e00000f; valaddr_reg:x3; val_offset:80211*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80211*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e00001f; valaddr_reg:x3; val_offset:80214*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80214*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e00003f; valaddr_reg:x3; val_offset:80217*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80217*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e00007f; valaddr_reg:x3; val_offset:80220*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80220*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e0000ff; valaddr_reg:x3; val_offset:80223*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80223*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e0001ff; valaddr_reg:x3; val_offset:80226*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80226*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e0003ff; valaddr_reg:x3; val_offset:80229*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80229*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e0007ff; valaddr_reg:x3; val_offset:80232*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80232*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e000fff; valaddr_reg:x3; val_offset:80235*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80235*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e001fff; valaddr_reg:x3; val_offset:80238*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80238*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e003fff; valaddr_reg:x3; val_offset:80241*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80241*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e007fff; valaddr_reg:x3; val_offset:80244*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80244*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e00ffff; valaddr_reg:x3; val_offset:80247*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80247*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e01ffff; valaddr_reg:x3; val_offset:80250*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80250*0 + 3*208*FLEN/8, x4, x1, x2) + +inst_26751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e03ffff; valaddr_reg:x3; val_offset:80253*0 + 3*208*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80253*0 + 3*208*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154100224,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154108416,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154112512,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154114560,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154115584,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116096,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116352,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116480,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116544,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116576,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116592,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116600,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116604,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116606,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3154116607,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2130981661,32,FLEN) +NAN_BOXED(2151544708,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996288,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996289,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996291,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996295,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996303,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996319,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996351,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996415,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996543,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769996799,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769997311,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1769998335,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1770000383,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1770004479,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1770012671,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1770029055,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1770061823,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1770127359,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1770258431,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1770520575,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1771044863,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1772093439,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1774190591,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1774190592,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1776287744,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1777336320,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1777860608,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778122752,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778253824,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778319360,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778352128,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778368512,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778376704,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778380800,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778382848,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778383872,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384384,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384640,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384768,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384832,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384864,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384880,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384888,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384892,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384894,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(1778384895,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2130993319,32,FLEN) +NAN_BOXED(1073187021,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308622848,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308622849,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308622851,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308622855,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308622863,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308622879,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308622911,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308622975,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308623103,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308623359,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308623871,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308624895,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308626943,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308631039,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308639231,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308655615,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308688383,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308753919,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1308884991,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-21.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-21.S new file mode 100644 index 000000000..1fada657e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-21.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_2560: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf0fffff; valaddr_reg:x3; val_offset:7680*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7680*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2561: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf1fffff; valaddr_reg:x3; val_offset:7683*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7683*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2562: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf3fffff; valaddr_reg:x3; val_offset:7686*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7686*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2563: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf400000; valaddr_reg:x3; val_offset:7689*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7689*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2564: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf600000; valaddr_reg:x3; val_offset:7692*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7692*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2565: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf700000; valaddr_reg:x3; val_offset:7695*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7695*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2566: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf780000; valaddr_reg:x3; val_offset:7698*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7698*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2567: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7c0000; valaddr_reg:x3; val_offset:7701*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7701*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2568: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7e0000; valaddr_reg:x3; val_offset:7704*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7704*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2569: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7f0000; valaddr_reg:x3; val_offset:7707*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7707*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2570: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7f8000; valaddr_reg:x3; val_offset:7710*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7710*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2571: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7fc000; valaddr_reg:x3; val_offset:7713*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7713*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2572: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7fe000; valaddr_reg:x3; val_offset:7716*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7716*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2573: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7ff000; valaddr_reg:x3; val_offset:7719*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7719*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2574: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7ff800; valaddr_reg:x3; val_offset:7722*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7722*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2575: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7ffc00; valaddr_reg:x3; val_offset:7725*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7725*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2576: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7ffe00; valaddr_reg:x3; val_offset:7728*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7728*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2577: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7fff00; valaddr_reg:x3; val_offset:7731*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7731*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2578: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7fff80; valaddr_reg:x3; val_offset:7734*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7734*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2579: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7fffc0; valaddr_reg:x3; val_offset:7737*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7737*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2580: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7fffe0; valaddr_reg:x3; val_offset:7740*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7740*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2581: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7ffff0; valaddr_reg:x3; val_offset:7743*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7743*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2582: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7ffff8; valaddr_reg:x3; val_offset:7746*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7746*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2583: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7ffffc; valaddr_reg:x3; val_offset:7749*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7749*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2584: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7ffffe; valaddr_reg:x3; val_offset:7752*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7752*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2585: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4a3e7e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4a3e7e; op2val:0x0; +op3val:0xf7fffff; valaddr_reg:x3; val_offset:7755*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7755*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2586: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:7758*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7758*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2587: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:7761*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7761*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2588: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:7764*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7764*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2589: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:7767*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7767*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2590: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:7770*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7770*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2591: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:7773*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7773*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2592: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:7776*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7776*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2593: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:7779*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7779*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2594: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:7782*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7782*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2595: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:7785*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7785*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2596: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:7788*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7788*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2597: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:7791*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7791*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2598: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:7794*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7794*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2599: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:7797*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7797*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2600: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:7800*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7800*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2601: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:7803*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7803*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2602: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa800000; valaddr_reg:x3; val_offset:7806*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7806*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2603: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa800001; valaddr_reg:x3; val_offset:7809*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7809*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2604: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa800003; valaddr_reg:x3; val_offset:7812*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7812*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2605: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa800007; valaddr_reg:x3; val_offset:7815*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7815*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2606: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa80000f; valaddr_reg:x3; val_offset:7818*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7818*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2607: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa80001f; valaddr_reg:x3; val_offset:7821*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7821*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2608: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa80003f; valaddr_reg:x3; val_offset:7824*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7824*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2609: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa80007f; valaddr_reg:x3; val_offset:7827*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7827*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2610: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa8000ff; valaddr_reg:x3; val_offset:7830*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7830*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2611: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa8001ff; valaddr_reg:x3; val_offset:7833*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7833*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2612: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa8003ff; valaddr_reg:x3; val_offset:7836*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7836*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2613: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa8007ff; valaddr_reg:x3; val_offset:7839*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7839*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2614: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa800fff; valaddr_reg:x3; val_offset:7842*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7842*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2615: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa801fff; valaddr_reg:x3; val_offset:7845*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7845*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2616: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa803fff; valaddr_reg:x3; val_offset:7848*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7848*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2617: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa807fff; valaddr_reg:x3; val_offset:7851*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7851*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2618: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa80ffff; valaddr_reg:x3; val_offset:7854*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7854*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2619: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa81ffff; valaddr_reg:x3; val_offset:7857*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7857*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2620: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa83ffff; valaddr_reg:x3; val_offset:7860*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7860*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2621: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa87ffff; valaddr_reg:x3; val_offset:7863*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7863*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2622: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa8fffff; valaddr_reg:x3; val_offset:7866*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7866*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2623: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xa9fffff; valaddr_reg:x3; val_offset:7869*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7869*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2624: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xabfffff; valaddr_reg:x3; val_offset:7872*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7872*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2625: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xac00000; valaddr_reg:x3; val_offset:7875*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7875*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2626: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xae00000; valaddr_reg:x3; val_offset:7878*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7878*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2627: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaf00000; valaddr_reg:x3; val_offset:7881*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7881*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2628: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaf80000; valaddr_reg:x3; val_offset:7884*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7884*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2629: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafc0000; valaddr_reg:x3; val_offset:7887*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7887*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2630: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafe0000; valaddr_reg:x3; val_offset:7890*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7890*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2631: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaff0000; valaddr_reg:x3; val_offset:7893*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7893*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2632: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaff8000; valaddr_reg:x3; val_offset:7896*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7896*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2633: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaffc000; valaddr_reg:x3; val_offset:7899*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7899*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2634: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaffe000; valaddr_reg:x3; val_offset:7902*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7902*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2635: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafff000; valaddr_reg:x3; val_offset:7905*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7905*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2636: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafff800; valaddr_reg:x3; val_offset:7908*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7908*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2637: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafffc00; valaddr_reg:x3; val_offset:7911*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7911*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2638: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafffe00; valaddr_reg:x3; val_offset:7914*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7914*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2639: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaffff00; valaddr_reg:x3; val_offset:7917*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7917*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2640: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaffff80; valaddr_reg:x3; val_offset:7920*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7920*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2641: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaffffc0; valaddr_reg:x3; val_offset:7923*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7923*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2642: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaffffe0; valaddr_reg:x3; val_offset:7926*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7926*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2643: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafffff0; valaddr_reg:x3; val_offset:7929*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7929*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2644: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafffff8; valaddr_reg:x3; val_offset:7932*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7932*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2645: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafffffc; valaddr_reg:x3; val_offset:7935*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7935*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2646: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xafffffe; valaddr_reg:x3; val_offset:7938*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7938*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2647: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x4bdaf1 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d4bdaf1; op2val:0x0; +op3val:0xaffffff; valaddr_reg:x3; val_offset:7941*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7941*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2648: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f000000; valaddr_reg:x3; val_offset:7944*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7944*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2649: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f000001; valaddr_reg:x3; val_offset:7947*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7947*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2650: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f000003; valaddr_reg:x3; val_offset:7950*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7950*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2651: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f000007; valaddr_reg:x3; val_offset:7953*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7953*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2652: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f00000f; valaddr_reg:x3; val_offset:7956*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7956*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2653: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f00001f; valaddr_reg:x3; val_offset:7959*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7959*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2654: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f00003f; valaddr_reg:x3; val_offset:7962*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7962*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2655: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f00007f; valaddr_reg:x3; val_offset:7965*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7965*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2656: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f0000ff; valaddr_reg:x3; val_offset:7968*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7968*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2657: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f0001ff; valaddr_reg:x3; val_offset:7971*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7971*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2658: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f0003ff; valaddr_reg:x3; val_offset:7974*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7974*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2659: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f0007ff; valaddr_reg:x3; val_offset:7977*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7977*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2660: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f000fff; valaddr_reg:x3; val_offset:7980*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7980*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2661: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f001fff; valaddr_reg:x3; val_offset:7983*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7983*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2662: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f003fff; valaddr_reg:x3; val_offset:7986*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7986*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2663: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f007fff; valaddr_reg:x3; val_offset:7989*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7989*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2664: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f00ffff; valaddr_reg:x3; val_offset:7992*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7992*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2665: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f01ffff; valaddr_reg:x3; val_offset:7995*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7995*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2666: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f03ffff; valaddr_reg:x3; val_offset:7998*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 7998*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2667: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f07ffff; valaddr_reg:x3; val_offset:8001*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8001*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2668: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f0fffff; valaddr_reg:x3; val_offset:8004*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8004*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2669: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f1fffff; valaddr_reg:x3; val_offset:8007*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8007*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2670: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f3fffff; valaddr_reg:x3; val_offset:8010*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8010*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2671: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f400000; valaddr_reg:x3; val_offset:8013*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8013*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2672: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f600000; valaddr_reg:x3; val_offset:8016*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8016*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2673: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f700000; valaddr_reg:x3; val_offset:8019*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8019*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2674: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f780000; valaddr_reg:x3; val_offset:8022*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8022*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2675: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7c0000; valaddr_reg:x3; val_offset:8025*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8025*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2676: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7e0000; valaddr_reg:x3; val_offset:8028*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8028*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2677: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7f0000; valaddr_reg:x3; val_offset:8031*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8031*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2678: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7f8000; valaddr_reg:x3; val_offset:8034*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8034*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2679: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7fc000; valaddr_reg:x3; val_offset:8037*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8037*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2680: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7fe000; valaddr_reg:x3; val_offset:8040*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8040*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2681: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7ff000; valaddr_reg:x3; val_offset:8043*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8043*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2682: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7ff800; valaddr_reg:x3; val_offset:8046*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8046*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2683: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7ffc00; valaddr_reg:x3; val_offset:8049*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8049*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2684: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7ffe00; valaddr_reg:x3; val_offset:8052*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8052*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2685: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7fff00; valaddr_reg:x3; val_offset:8055*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8055*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2686: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7fff80; valaddr_reg:x3; val_offset:8058*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8058*0 + 3*20*FLEN/8, x4, x1, x2) + +inst_2687: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7fffc0; valaddr_reg:x3; val_offset:8061*0 + 3*20*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8061*0 + 3*20*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(252706815,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(253755391,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255852543,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255852544,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(257949696,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(258998272,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259522560,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259784704,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259915776,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259981312,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260014080,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260030464,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260038656,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260042752,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260044800,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260045824,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046336,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046592,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046720,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046784,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046816,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046832,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046840,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046844,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046846,32,FLEN) +NAN_BOXED(2102017662,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046847,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160768,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160769,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160771,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160775,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160783,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160799,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160831,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160895,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161023,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161279,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161791,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176162815,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176164863,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176168959,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176177151,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176193535,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176226303,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176291839,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176422911,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176685055,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(177209343,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(178257919,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(180355071,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(180355072,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(182452224,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(183500800,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184025088,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184287232,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184418304,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184483840,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184516608,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184532992,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184541184,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184545280,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184547328,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184548352,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184548864,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549120,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549248,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549312,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549344,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549360,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549368,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549372,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549374,32,FLEN) +NAN_BOXED(2102123249,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549375,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093696,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093697,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093699,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093703,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093711,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093727,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093759,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093823,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520093951,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520094207,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520094719,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520095743,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520097791,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520101887,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520110079,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520126463,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520159231,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520224767,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520355839,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(520617983,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(521142271,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(522190847,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(524287999,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(524288000,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(526385152,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(527433728,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(527958016,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528220160,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528351232,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528416768,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528449536,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528465920,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528474112,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528478208,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528480256,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528481280,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528481792,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482048,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482176,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482240,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-210.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-210.S new file mode 100644 index 000000000..ff4f576f5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-210.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_26752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e07ffff; valaddr_reg:x3; val_offset:80256*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80256*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e0fffff; valaddr_reg:x3; val_offset:80259*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80259*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e1fffff; valaddr_reg:x3; val_offset:80262*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80262*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e3fffff; valaddr_reg:x3; val_offset:80265*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80265*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e400000; valaddr_reg:x3; val_offset:80268*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80268*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e600000; valaddr_reg:x3; val_offset:80271*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80271*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e700000; valaddr_reg:x3; val_offset:80274*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80274*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e780000; valaddr_reg:x3; val_offset:80277*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80277*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7c0000; valaddr_reg:x3; val_offset:80280*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80280*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7e0000; valaddr_reg:x3; val_offset:80283*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80283*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7f0000; valaddr_reg:x3; val_offset:80286*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80286*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7f8000; valaddr_reg:x3; val_offset:80289*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80289*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7fc000; valaddr_reg:x3; val_offset:80292*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80292*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7fe000; valaddr_reg:x3; val_offset:80295*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80295*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7ff000; valaddr_reg:x3; val_offset:80298*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80298*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7ff800; valaddr_reg:x3; val_offset:80301*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80301*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7ffc00; valaddr_reg:x3; val_offset:80304*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80304*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7ffe00; valaddr_reg:x3; val_offset:80307*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80307*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7fff00; valaddr_reg:x3; val_offset:80310*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80310*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7fff80; valaddr_reg:x3; val_offset:80313*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80313*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7fffc0; valaddr_reg:x3; val_offset:80316*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80316*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7fffe0; valaddr_reg:x3; val_offset:80319*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80319*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7ffff0; valaddr_reg:x3; val_offset:80322*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80322*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7ffff8; valaddr_reg:x3; val_offset:80325*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80325*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7ffffc; valaddr_reg:x3; val_offset:80328*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80328*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7ffffe; valaddr_reg:x3; val_offset:80331*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80331*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04a351 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3dc319 and fs3 == 0 and fe3 == 0x9c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04a351; op2val:0x3dc319; +op3val:0x4e7fffff; valaddr_reg:x3; val_offset:80334*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80334*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62800000; valaddr_reg:x3; val_offset:80337*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80337*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62800001; valaddr_reg:x3; val_offset:80340*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80340*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62800003; valaddr_reg:x3; val_offset:80343*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80343*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62800007; valaddr_reg:x3; val_offset:80346*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80346*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x6280000f; valaddr_reg:x3; val_offset:80349*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80349*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x6280001f; valaddr_reg:x3; val_offset:80352*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80352*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x6280003f; valaddr_reg:x3; val_offset:80355*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80355*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x6280007f; valaddr_reg:x3; val_offset:80358*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80358*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x628000ff; valaddr_reg:x3; val_offset:80361*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80361*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x628001ff; valaddr_reg:x3; val_offset:80364*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80364*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x628003ff; valaddr_reg:x3; val_offset:80367*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80367*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x628007ff; valaddr_reg:x3; val_offset:80370*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80370*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62800fff; valaddr_reg:x3; val_offset:80373*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80373*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62801fff; valaddr_reg:x3; val_offset:80376*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80376*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62803fff; valaddr_reg:x3; val_offset:80379*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80379*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62807fff; valaddr_reg:x3; val_offset:80382*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80382*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x6280ffff; valaddr_reg:x3; val_offset:80385*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80385*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x6281ffff; valaddr_reg:x3; val_offset:80388*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80388*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x6283ffff; valaddr_reg:x3; val_offset:80391*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80391*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x6287ffff; valaddr_reg:x3; val_offset:80394*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80394*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x628fffff; valaddr_reg:x3; val_offset:80397*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80397*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x629fffff; valaddr_reg:x3; val_offset:80400*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80400*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62bfffff; valaddr_reg:x3; val_offset:80403*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80403*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62c00000; valaddr_reg:x3; val_offset:80406*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80406*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62e00000; valaddr_reg:x3; val_offset:80409*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80409*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62f00000; valaddr_reg:x3; val_offset:80412*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80412*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62f80000; valaddr_reg:x3; val_offset:80415*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80415*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fc0000; valaddr_reg:x3; val_offset:80418*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80418*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fe0000; valaddr_reg:x3; val_offset:80421*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80421*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ff0000; valaddr_reg:x3; val_offset:80424*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80424*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ff8000; valaddr_reg:x3; val_offset:80427*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80427*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ffc000; valaddr_reg:x3; val_offset:80430*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80430*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ffe000; valaddr_reg:x3; val_offset:80433*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80433*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fff000; valaddr_reg:x3; val_offset:80436*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80436*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fff800; valaddr_reg:x3; val_offset:80439*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80439*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fffc00; valaddr_reg:x3; val_offset:80442*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80442*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fffe00; valaddr_reg:x3; val_offset:80445*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80445*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ffff00; valaddr_reg:x3; val_offset:80448*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80448*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ffff80; valaddr_reg:x3; val_offset:80451*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80451*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ffffc0; valaddr_reg:x3; val_offset:80454*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80454*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ffffe0; valaddr_reg:x3; val_offset:80457*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80457*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fffff0; valaddr_reg:x3; val_offset:80460*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80460*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fffff8; valaddr_reg:x3; val_offset:80463*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80463*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fffffc; valaddr_reg:x3; val_offset:80466*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80466*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62fffffe; valaddr_reg:x3; val_offset:80469*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80469*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xc5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x62ffffff; valaddr_reg:x3; val_offset:80472*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80472*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f000001; valaddr_reg:x3; val_offset:80475*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80475*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f000003; valaddr_reg:x3; val_offset:80478*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80478*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f000007; valaddr_reg:x3; val_offset:80481*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80481*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f199999; valaddr_reg:x3; val_offset:80484*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80484*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f249249; valaddr_reg:x3; val_offset:80487*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80487*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f333333; valaddr_reg:x3; val_offset:80490*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80490*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:80493*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80493*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:80496*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80496*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f444444; valaddr_reg:x3; val_offset:80499*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80499*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:80502*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80502*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:80505*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80505*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f666666; valaddr_reg:x3; val_offset:80508*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80508*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:80511*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80511*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:80514*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80514*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:80517*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80517*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x04d221 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x76b552 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f04d221; op2val:0x3ff6b552; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:80520*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80520*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3f800001; valaddr_reg:x3; val_offset:80523*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80523*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3f800003; valaddr_reg:x3; val_offset:80526*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80526*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3f800007; valaddr_reg:x3; val_offset:80529*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80529*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3f999999; valaddr_reg:x3; val_offset:80532*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80532*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:80535*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80535*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:80538*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80538*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:80541*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80541*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:80544*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80544*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:80547*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80547*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:80550*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80550*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:80553*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80553*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:80556*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80556*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:80559*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80559*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:80562*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80562*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:80565*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80565*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:80568*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80568*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44800000; valaddr_reg:x3; val_offset:80571*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80571*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44800001; valaddr_reg:x3; val_offset:80574*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80574*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44800003; valaddr_reg:x3; val_offset:80577*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80577*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44800007; valaddr_reg:x3; val_offset:80580*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80580*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x4480000f; valaddr_reg:x3; val_offset:80583*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80583*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x4480001f; valaddr_reg:x3; val_offset:80586*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80586*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x4480003f; valaddr_reg:x3; val_offset:80589*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80589*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x4480007f; valaddr_reg:x3; val_offset:80592*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80592*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x448000ff; valaddr_reg:x3; val_offset:80595*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80595*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x448001ff; valaddr_reg:x3; val_offset:80598*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80598*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x448003ff; valaddr_reg:x3; val_offset:80601*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80601*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x448007ff; valaddr_reg:x3; val_offset:80604*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80604*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44800fff; valaddr_reg:x3; val_offset:80607*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80607*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44801fff; valaddr_reg:x3; val_offset:80610*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80610*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44803fff; valaddr_reg:x3; val_offset:80613*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80613*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44807fff; valaddr_reg:x3; val_offset:80616*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80616*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x4480ffff; valaddr_reg:x3; val_offset:80619*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80619*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x4481ffff; valaddr_reg:x3; val_offset:80622*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80622*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x4483ffff; valaddr_reg:x3; val_offset:80625*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80625*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x4487ffff; valaddr_reg:x3; val_offset:80628*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80628*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x448fffff; valaddr_reg:x3; val_offset:80631*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80631*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x449fffff; valaddr_reg:x3; val_offset:80634*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80634*0 + 3*209*FLEN/8, x4, x1, x2) + +inst_26879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44bfffff; valaddr_reg:x3; val_offset:80637*0 + 3*209*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80637*0 + 3*209*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1309147135,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1309671423,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1310719999,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1312817151,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1312817152,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1314914304,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1315962880,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1316487168,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1316749312,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1316880384,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1316945920,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1316978688,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1316995072,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317003264,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317007360,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317009408,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317010432,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317010944,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011200,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011328,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011392,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011424,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011440,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011448,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011452,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011454,32,FLEN) +NAN_BOXED(2131010385,32,FLEN) +NAN_BOXED(4047641,32,FLEN) +NAN_BOXED(1317011455,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652555776,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652555777,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652555779,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652555783,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652555791,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652555807,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652555839,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652555903,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652556031,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652556287,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652556799,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652557823,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652559871,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652563967,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652572159,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652588543,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652621311,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652686847,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1652817919,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1653080063,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1653604351,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1654652927,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1656750079,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1656750080,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1658847232,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1659895808,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660420096,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660682240,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660813312,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660878848,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660911616,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660928000,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660936192,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660940288,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660942336,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660943360,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660943872,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944128,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944256,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944320,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944352,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944368,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944376,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944380,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944382,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(1660944383,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2131022369,32,FLEN) +NAN_BOXED(1073132882,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239296,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239297,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239299,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239303,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239311,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239327,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239359,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239423,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239551,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149239807,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149240319,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149241343,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149243391,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149247487,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149255679,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149272063,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149304831,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149370367,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149501439,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1149763583,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1150287871,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1151336447,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1153433599,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-211.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-211.S new file mode 100644 index 000000000..6e8ab311b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-211.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_26880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44c00000; valaddr_reg:x3; val_offset:80640*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80640*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44e00000; valaddr_reg:x3; val_offset:80643*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80643*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44f00000; valaddr_reg:x3; val_offset:80646*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80646*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44f80000; valaddr_reg:x3; val_offset:80649*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80649*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fc0000; valaddr_reg:x3; val_offset:80652*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80652*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fe0000; valaddr_reg:x3; val_offset:80655*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80655*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ff0000; valaddr_reg:x3; val_offset:80658*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80658*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ff8000; valaddr_reg:x3; val_offset:80661*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80661*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ffc000; valaddr_reg:x3; val_offset:80664*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80664*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ffe000; valaddr_reg:x3; val_offset:80667*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80667*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fff000; valaddr_reg:x3; val_offset:80670*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80670*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fff800; valaddr_reg:x3; val_offset:80673*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80673*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fffc00; valaddr_reg:x3; val_offset:80676*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80676*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fffe00; valaddr_reg:x3; val_offset:80679*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80679*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ffff00; valaddr_reg:x3; val_offset:80682*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80682*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ffff80; valaddr_reg:x3; val_offset:80685*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80685*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ffffc0; valaddr_reg:x3; val_offset:80688*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80688*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ffffe0; valaddr_reg:x3; val_offset:80691*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80691*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fffff0; valaddr_reg:x3; val_offset:80694*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80694*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fffff8; valaddr_reg:x3; val_offset:80697*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80697*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fffffc; valaddr_reg:x3; val_offset:80700*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80700*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44fffffe; valaddr_reg:x3; val_offset:80703*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80703*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x05f534 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d2750 and fs3 == 0 and fe3 == 0x89 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f05f534; op2val:0x3d2750; +op3val:0x44ffffff; valaddr_reg:x3; val_offset:80706*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80706*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:80709*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80709*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:80712*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80712*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:80715*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80715*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:80718*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80718*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:80721*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80721*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:80724*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80724*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:80727*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80727*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:80730*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80730*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:80733*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80733*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:80736*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80736*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:80739*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80739*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:80742*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80742*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:80745*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80745*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:80748*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80748*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:80751*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80751*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:80754*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80754*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b800000; valaddr_reg:x3; val_offset:80757*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80757*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b800001; valaddr_reg:x3; val_offset:80760*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80760*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b800003; valaddr_reg:x3; val_offset:80763*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80763*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b800007; valaddr_reg:x3; val_offset:80766*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80766*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b80000f; valaddr_reg:x3; val_offset:80769*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80769*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b80001f; valaddr_reg:x3; val_offset:80772*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80772*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b80003f; valaddr_reg:x3; val_offset:80775*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80775*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b80007f; valaddr_reg:x3; val_offset:80778*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80778*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b8000ff; valaddr_reg:x3; val_offset:80781*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80781*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b8001ff; valaddr_reg:x3; val_offset:80784*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80784*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b8003ff; valaddr_reg:x3; val_offset:80787*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80787*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b8007ff; valaddr_reg:x3; val_offset:80790*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80790*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b800fff; valaddr_reg:x3; val_offset:80793*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80793*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b801fff; valaddr_reg:x3; val_offset:80796*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80796*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b803fff; valaddr_reg:x3; val_offset:80799*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80799*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b807fff; valaddr_reg:x3; val_offset:80802*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80802*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b80ffff; valaddr_reg:x3; val_offset:80805*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80805*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b81ffff; valaddr_reg:x3; val_offset:80808*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80808*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b83ffff; valaddr_reg:x3; val_offset:80811*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80811*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b87ffff; valaddr_reg:x3; val_offset:80814*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80814*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b8fffff; valaddr_reg:x3; val_offset:80817*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80817*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8b9fffff; valaddr_reg:x3; val_offset:80820*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80820*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bbfffff; valaddr_reg:x3; val_offset:80823*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80823*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bc00000; valaddr_reg:x3; val_offset:80826*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80826*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8be00000; valaddr_reg:x3; val_offset:80829*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80829*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bf00000; valaddr_reg:x3; val_offset:80832*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80832*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bf80000; valaddr_reg:x3; val_offset:80835*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80835*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfc0000; valaddr_reg:x3; val_offset:80838*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80838*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfe0000; valaddr_reg:x3; val_offset:80841*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80841*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bff0000; valaddr_reg:x3; val_offset:80844*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80844*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bff8000; valaddr_reg:x3; val_offset:80847*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80847*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bffc000; valaddr_reg:x3; val_offset:80850*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80850*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bffe000; valaddr_reg:x3; val_offset:80853*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80853*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfff000; valaddr_reg:x3; val_offset:80856*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80856*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfff800; valaddr_reg:x3; val_offset:80859*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80859*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfffc00; valaddr_reg:x3; val_offset:80862*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80862*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfffe00; valaddr_reg:x3; val_offset:80865*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80865*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bffff00; valaddr_reg:x3; val_offset:80868*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80868*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bffff80; valaddr_reg:x3; val_offset:80871*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80871*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bffffc0; valaddr_reg:x3; val_offset:80874*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80874*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bffffe0; valaddr_reg:x3; val_offset:80877*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80877*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfffff0; valaddr_reg:x3; val_offset:80880*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80880*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfffff8; valaddr_reg:x3; val_offset:80883*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80883*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfffffc; valaddr_reg:x3; val_offset:80886*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80886*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bfffffe; valaddr_reg:x3; val_offset:80889*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80889*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x061cca and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f061cca; op2val:0x80000000; +op3val:0x8bffffff; valaddr_reg:x3; val_offset:80892*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80892*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5000000; valaddr_reg:x3; val_offset:80895*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80895*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5000001; valaddr_reg:x3; val_offset:80898*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80898*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5000003; valaddr_reg:x3; val_offset:80901*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80901*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5000007; valaddr_reg:x3; val_offset:80904*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80904*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa500000f; valaddr_reg:x3; val_offset:80907*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80907*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa500001f; valaddr_reg:x3; val_offset:80910*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80910*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa500003f; valaddr_reg:x3; val_offset:80913*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80913*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa500007f; valaddr_reg:x3; val_offset:80916*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80916*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa50000ff; valaddr_reg:x3; val_offset:80919*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80919*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa50001ff; valaddr_reg:x3; val_offset:80922*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80922*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa50003ff; valaddr_reg:x3; val_offset:80925*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80925*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa50007ff; valaddr_reg:x3; val_offset:80928*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80928*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5000fff; valaddr_reg:x3; val_offset:80931*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80931*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5001fff; valaddr_reg:x3; val_offset:80934*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80934*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5003fff; valaddr_reg:x3; val_offset:80937*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80937*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5007fff; valaddr_reg:x3; val_offset:80940*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80940*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa500ffff; valaddr_reg:x3; val_offset:80943*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80943*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa501ffff; valaddr_reg:x3; val_offset:80946*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80946*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa503ffff; valaddr_reg:x3; val_offset:80949*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80949*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa507ffff; valaddr_reg:x3; val_offset:80952*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80952*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa50fffff; valaddr_reg:x3; val_offset:80955*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80955*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa51fffff; valaddr_reg:x3; val_offset:80958*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80958*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa53fffff; valaddr_reg:x3; val_offset:80961*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80961*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5400000; valaddr_reg:x3; val_offset:80964*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80964*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5600000; valaddr_reg:x3; val_offset:80967*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80967*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5700000; valaddr_reg:x3; val_offset:80970*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80970*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa5780000; valaddr_reg:x3; val_offset:80973*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80973*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57c0000; valaddr_reg:x3; val_offset:80976*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80976*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57e0000; valaddr_reg:x3; val_offset:80979*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80979*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57f0000; valaddr_reg:x3; val_offset:80982*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80982*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57f8000; valaddr_reg:x3; val_offset:80985*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80985*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57fc000; valaddr_reg:x3; val_offset:80988*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80988*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57fe000; valaddr_reg:x3; val_offset:80991*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80991*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57ff000; valaddr_reg:x3; val_offset:80994*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80994*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_26999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57ff800; valaddr_reg:x3; val_offset:80997*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 80997*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_27000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57ffc00; valaddr_reg:x3; val_offset:81000*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81000*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_27001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57ffe00; valaddr_reg:x3; val_offset:81003*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81003*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_27002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57fff00; valaddr_reg:x3; val_offset:81006*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81006*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_27003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57fff80; valaddr_reg:x3; val_offset:81009*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81009*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_27004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57fffc0; valaddr_reg:x3; val_offset:81012*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81012*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_27005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57fffe0; valaddr_reg:x3; val_offset:81015*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81015*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_27006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57ffff0; valaddr_reg:x3; val_offset:81018*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81018*0 + 3*210*FLEN/8, x4, x1, x2) + +inst_27007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57ffff8; valaddr_reg:x3; val_offset:81021*0 + 3*210*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81021*0 + 3*210*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1153433600,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1155530752,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1156579328,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157103616,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157365760,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157496832,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157562368,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157595136,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157611520,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157619712,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157623808,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157625856,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157626880,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627392,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627648,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627776,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627840,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627872,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627888,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627896,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627900,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627902,32,FLEN) +NAN_BOXED(2131096884,32,FLEN) +NAN_BOXED(4007760,32,FLEN) +NAN_BOXED(1157627903,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421632,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421633,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421635,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421639,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421647,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421663,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421695,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421759,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421887,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340422143,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340422655,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340423679,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340425727,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340429823,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340438015,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340454399,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340487167,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340552703,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340683775,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340945919,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2341470207,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2342518783,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2344615935,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2344615936,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2346713088,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2347761664,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348285952,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348548096,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348679168,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348744704,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348777472,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348793856,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348802048,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348806144,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348808192,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809216,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809728,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809984,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810112,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810176,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810208,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810224,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810232,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810236,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810238,32,FLEN) +NAN_BOXED(2131107018,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810239,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240640,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240641,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240643,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240647,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240655,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240671,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240703,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240767,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768240895,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768241151,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768241663,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768242687,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768244735,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768248831,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768257023,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768273407,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768306175,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768371711,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768502783,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2768764927,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2769289215,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2770337791,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2772434943,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2772434944,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2774532096,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2775580672,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776104960,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776367104,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776498176,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776563712,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776596480,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776612864,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776621056,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776625152,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776627200,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776628224,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776628736,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776628992,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776629120,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776629184,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776629216,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776629232,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776629240,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-212.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-212.S new file mode 100644 index 000000000..0ca9ba837 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-212.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_27008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57ffffc; valaddr_reg:x3; val_offset:81024*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81024*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57ffffe; valaddr_reg:x3; val_offset:81027*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81027*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x4a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xa57fffff; valaddr_reg:x3; val_offset:81030*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81030*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbf800001; valaddr_reg:x3; val_offset:81033*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81033*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbf800003; valaddr_reg:x3; val_offset:81036*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81036*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbf800007; valaddr_reg:x3; val_offset:81039*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81039*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbf999999; valaddr_reg:x3; val_offset:81042*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81042*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:81045*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81045*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:81048*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81048*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:81051*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81051*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:81054*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81054*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:81057*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81057*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:81060*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81060*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:81063*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81063*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:81066*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81066*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:81069*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81069*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:81072*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81072*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:81075*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81075*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0620bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3d1377 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0620bc; op2val:0x803d1377; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:81078*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81078*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea800000; valaddr_reg:x3; val_offset:81081*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81081*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea800001; valaddr_reg:x3; val_offset:81084*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81084*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea800003; valaddr_reg:x3; val_offset:81087*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81087*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea800007; valaddr_reg:x3; val_offset:81090*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81090*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea80000f; valaddr_reg:x3; val_offset:81093*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81093*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea80001f; valaddr_reg:x3; val_offset:81096*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81096*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea80003f; valaddr_reg:x3; val_offset:81099*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81099*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea80007f; valaddr_reg:x3; val_offset:81102*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81102*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea8000ff; valaddr_reg:x3; val_offset:81105*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81105*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea8001ff; valaddr_reg:x3; val_offset:81108*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81108*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea8003ff; valaddr_reg:x3; val_offset:81111*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81111*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea8007ff; valaddr_reg:x3; val_offset:81114*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81114*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea800fff; valaddr_reg:x3; val_offset:81117*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81117*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea801fff; valaddr_reg:x3; val_offset:81120*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81120*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea803fff; valaddr_reg:x3; val_offset:81123*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81123*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea807fff; valaddr_reg:x3; val_offset:81126*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81126*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea80ffff; valaddr_reg:x3; val_offset:81129*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81129*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea81ffff; valaddr_reg:x3; val_offset:81132*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81132*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea83ffff; valaddr_reg:x3; val_offset:81135*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81135*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea87ffff; valaddr_reg:x3; val_offset:81138*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81138*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea8fffff; valaddr_reg:x3; val_offset:81141*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81141*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xea9fffff; valaddr_reg:x3; val_offset:81144*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81144*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeabfffff; valaddr_reg:x3; val_offset:81147*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81147*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeac00000; valaddr_reg:x3; val_offset:81150*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81150*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeae00000; valaddr_reg:x3; val_offset:81153*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81153*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaf00000; valaddr_reg:x3; val_offset:81156*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81156*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaf80000; valaddr_reg:x3; val_offset:81159*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81159*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafc0000; valaddr_reg:x3; val_offset:81162*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81162*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafe0000; valaddr_reg:x3; val_offset:81165*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81165*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaff0000; valaddr_reg:x3; val_offset:81168*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81168*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaff8000; valaddr_reg:x3; val_offset:81171*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81171*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaffc000; valaddr_reg:x3; val_offset:81174*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81174*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaffe000; valaddr_reg:x3; val_offset:81177*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81177*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafff000; valaddr_reg:x3; val_offset:81180*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81180*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafff800; valaddr_reg:x3; val_offset:81183*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81183*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafffc00; valaddr_reg:x3; val_offset:81186*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81186*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafffe00; valaddr_reg:x3; val_offset:81189*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81189*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaffff00; valaddr_reg:x3; val_offset:81192*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81192*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaffff80; valaddr_reg:x3; val_offset:81195*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81195*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaffffc0; valaddr_reg:x3; val_offset:81198*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81198*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaffffe0; valaddr_reg:x3; val_offset:81201*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81201*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafffff0; valaddr_reg:x3; val_offset:81204*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81204*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafffff8; valaddr_reg:x3; val_offset:81207*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81207*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafffffc; valaddr_reg:x3; val_offset:81210*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81210*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeafffffe; valaddr_reg:x3; val_offset:81213*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81213*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xd5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xeaffffff; valaddr_reg:x3; val_offset:81216*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81216*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff000001; valaddr_reg:x3; val_offset:81219*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81219*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff000003; valaddr_reg:x3; val_offset:81222*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81222*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff000007; valaddr_reg:x3; val_offset:81225*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81225*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff199999; valaddr_reg:x3; val_offset:81228*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81228*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff249249; valaddr_reg:x3; val_offset:81231*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81231*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff333333; valaddr_reg:x3; val_offset:81234*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81234*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:81237*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81237*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:81240*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81240*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff444444; valaddr_reg:x3; val_offset:81243*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81243*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:81246*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81246*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:81249*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81249*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff666666; valaddr_reg:x3; val_offset:81252*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81252*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:81255*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81255*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:81258*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81258*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:81261*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81261*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0634d6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x742945 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0634d6; op2val:0xbff42945; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:81264*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81264*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22000000; valaddr_reg:x3; val_offset:81267*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81267*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22000001; valaddr_reg:x3; val_offset:81270*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81270*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22000003; valaddr_reg:x3; val_offset:81273*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81273*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22000007; valaddr_reg:x3; val_offset:81276*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81276*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x2200000f; valaddr_reg:x3; val_offset:81279*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81279*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x2200001f; valaddr_reg:x3; val_offset:81282*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81282*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x2200003f; valaddr_reg:x3; val_offset:81285*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81285*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x2200007f; valaddr_reg:x3; val_offset:81288*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81288*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x220000ff; valaddr_reg:x3; val_offset:81291*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81291*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x220001ff; valaddr_reg:x3; val_offset:81294*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81294*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x220003ff; valaddr_reg:x3; val_offset:81297*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81297*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x220007ff; valaddr_reg:x3; val_offset:81300*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81300*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22000fff; valaddr_reg:x3; val_offset:81303*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81303*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22001fff; valaddr_reg:x3; val_offset:81306*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81306*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22003fff; valaddr_reg:x3; val_offset:81309*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81309*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22007fff; valaddr_reg:x3; val_offset:81312*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81312*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x2200ffff; valaddr_reg:x3; val_offset:81315*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81315*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x2201ffff; valaddr_reg:x3; val_offset:81318*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81318*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x2203ffff; valaddr_reg:x3; val_offset:81321*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81321*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x2207ffff; valaddr_reg:x3; val_offset:81324*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81324*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x220fffff; valaddr_reg:x3; val_offset:81327*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81327*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x221fffff; valaddr_reg:x3; val_offset:81330*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81330*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x223fffff; valaddr_reg:x3; val_offset:81333*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81333*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22400000; valaddr_reg:x3; val_offset:81336*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81336*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22600000; valaddr_reg:x3; val_offset:81339*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81339*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22700000; valaddr_reg:x3; val_offset:81342*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81342*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x22780000; valaddr_reg:x3; val_offset:81345*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81345*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227c0000; valaddr_reg:x3; val_offset:81348*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81348*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227e0000; valaddr_reg:x3; val_offset:81351*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81351*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227f0000; valaddr_reg:x3; val_offset:81354*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81354*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227f8000; valaddr_reg:x3; val_offset:81357*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81357*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227fc000; valaddr_reg:x3; val_offset:81360*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81360*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227fe000; valaddr_reg:x3; val_offset:81363*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81363*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227ff000; valaddr_reg:x3; val_offset:81366*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81366*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227ff800; valaddr_reg:x3; val_offset:81369*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81369*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227ffc00; valaddr_reg:x3; val_offset:81372*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81372*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227ffe00; valaddr_reg:x3; val_offset:81375*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81375*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227fff00; valaddr_reg:x3; val_offset:81378*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81378*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227fff80; valaddr_reg:x3; val_offset:81381*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81381*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227fffc0; valaddr_reg:x3; val_offset:81384*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81384*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227fffe0; valaddr_reg:x3; val_offset:81387*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81387*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227ffff0; valaddr_reg:x3; val_offset:81390*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81390*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227ffff8; valaddr_reg:x3; val_offset:81393*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81393*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227ffffc; valaddr_reg:x3; val_offset:81396*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81396*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227ffffe; valaddr_reg:x3; val_offset:81399*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81399*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x44 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x227fffff; valaddr_reg:x3; val_offset:81402*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81402*0 + 3*211*FLEN/8, x4, x1, x2) + +inst_27135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3f800001; valaddr_reg:x3; val_offset:81405*0 + 3*211*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81405*0 + 3*211*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776629244,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776629246,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(2776629247,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2131108028,32,FLEN) +NAN_BOXED(2151486327,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257152,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257153,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257155,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257159,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257167,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257183,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257215,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257279,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257407,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934257663,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934258175,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934259199,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934261247,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934265343,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934273535,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934289919,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934322687,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934388223,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934519295,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3934781439,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3935305727,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3936354303,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3938451455,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3938451456,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3940548608,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3941597184,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942121472,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942383616,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942514688,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942580224,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942612992,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942629376,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942637568,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942641664,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942643712,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942644736,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645248,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645504,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645632,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645696,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645728,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645744,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645752,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645756,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645758,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(3942645759,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2131113174,32,FLEN) +NAN_BOXED(3220449605,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425344,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425345,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425347,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425351,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425359,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425375,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425407,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425471,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425599,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570425855,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570426367,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570427391,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570429439,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570433535,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570441727,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570458111,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570490879,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570556415,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570687487,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(570949631,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(571473919,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(572522495,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(574619647,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(574619648,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(576716800,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(577765376,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578289664,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578551808,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578682880,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578748416,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578781184,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578797568,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578805760,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578809856,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578811904,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578812928,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813440,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813696,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813824,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813888,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813920,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813936,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813944,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813948,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813950,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(578813951,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-213.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-213.S new file mode 100644 index 000000000..f3ed20ac7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-213.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_27136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3f800003; valaddr_reg:x3; val_offset:81408*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81408*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3f800007; valaddr_reg:x3; val_offset:81411*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81411*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3f999999; valaddr_reg:x3; val_offset:81414*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81414*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:81417*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81417*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:81420*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81420*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:81423*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81423*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:81426*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81426*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:81429*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81429*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:81432*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81432*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:81435*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81435*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:81438*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81438*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:81441*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81441*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:81444*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81444*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:81447*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81447*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06451c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02eb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06451c; op2val:0x3d02eb; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:81450*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81450*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3f800001; valaddr_reg:x3; val_offset:81453*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81453*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3f800003; valaddr_reg:x3; val_offset:81456*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81456*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3f800007; valaddr_reg:x3; val_offset:81459*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81459*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3f999999; valaddr_reg:x3; val_offset:81462*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81462*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:81465*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81465*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:81468*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81468*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:81471*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81471*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:81474*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81474*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:81477*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81477*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:81480*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81480*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:81483*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81483*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:81486*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81486*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:81489*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81489*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:81492*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81492*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:81495*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81495*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:81498*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81498*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41000000; valaddr_reg:x3; val_offset:81501*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81501*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41000001; valaddr_reg:x3; val_offset:81504*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81504*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41000003; valaddr_reg:x3; val_offset:81507*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81507*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41000007; valaddr_reg:x3; val_offset:81510*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81510*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x4100000f; valaddr_reg:x3; val_offset:81513*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81513*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x4100001f; valaddr_reg:x3; val_offset:81516*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81516*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x4100003f; valaddr_reg:x3; val_offset:81519*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81519*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x4100007f; valaddr_reg:x3; val_offset:81522*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81522*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x410000ff; valaddr_reg:x3; val_offset:81525*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81525*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x410001ff; valaddr_reg:x3; val_offset:81528*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81528*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x410003ff; valaddr_reg:x3; val_offset:81531*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81531*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x410007ff; valaddr_reg:x3; val_offset:81534*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81534*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41000fff; valaddr_reg:x3; val_offset:81537*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81537*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41001fff; valaddr_reg:x3; val_offset:81540*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81540*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41003fff; valaddr_reg:x3; val_offset:81543*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81543*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41007fff; valaddr_reg:x3; val_offset:81546*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81546*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x4100ffff; valaddr_reg:x3; val_offset:81549*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81549*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x4101ffff; valaddr_reg:x3; val_offset:81552*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81552*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x4103ffff; valaddr_reg:x3; val_offset:81555*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81555*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x4107ffff; valaddr_reg:x3; val_offset:81558*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81558*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x410fffff; valaddr_reg:x3; val_offset:81561*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81561*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x411fffff; valaddr_reg:x3; val_offset:81564*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81564*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x413fffff; valaddr_reg:x3; val_offset:81567*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81567*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41400000; valaddr_reg:x3; val_offset:81570*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81570*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41600000; valaddr_reg:x3; val_offset:81573*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81573*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41700000; valaddr_reg:x3; val_offset:81576*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81576*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x41780000; valaddr_reg:x3; val_offset:81579*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81579*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417c0000; valaddr_reg:x3; val_offset:81582*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81582*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417e0000; valaddr_reg:x3; val_offset:81585*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81585*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417f0000; valaddr_reg:x3; val_offset:81588*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81588*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417f8000; valaddr_reg:x3; val_offset:81591*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81591*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417fc000; valaddr_reg:x3; val_offset:81594*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81594*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417fe000; valaddr_reg:x3; val_offset:81597*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81597*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417ff000; valaddr_reg:x3; val_offset:81600*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81600*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417ff800; valaddr_reg:x3; val_offset:81603*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81603*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417ffc00; valaddr_reg:x3; val_offset:81606*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81606*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417ffe00; valaddr_reg:x3; val_offset:81609*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81609*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417fff00; valaddr_reg:x3; val_offset:81612*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81612*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417fff80; valaddr_reg:x3; val_offset:81615*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81615*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417fffc0; valaddr_reg:x3; val_offset:81618*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81618*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417fffe0; valaddr_reg:x3; val_offset:81621*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81621*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417ffff0; valaddr_reg:x3; val_offset:81624*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81624*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417ffff8; valaddr_reg:x3; val_offset:81627*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81627*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417ffffc; valaddr_reg:x3; val_offset:81630*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81630*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417ffffe; valaddr_reg:x3; val_offset:81633*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81633*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x064520 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3d02e9 and fs3 == 0 and fe3 == 0x82 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f064520; op2val:0x3d02e9; +op3val:0x417fffff; valaddr_reg:x3; val_offset:81636*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81636*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:81639*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81639*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:81642*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81642*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:81645*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81645*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:81648*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81648*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:81651*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81651*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:81654*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81654*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:81657*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81657*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:81660*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81660*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:81663*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81663*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:81666*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81666*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:81669*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81669*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:81672*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81672*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:81675*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81675*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:81678*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81678*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:81681*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81681*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:81684*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81684*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa000000; valaddr_reg:x3; val_offset:81687*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81687*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa000001; valaddr_reg:x3; val_offset:81690*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81690*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa000003; valaddr_reg:x3; val_offset:81693*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81693*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa000007; valaddr_reg:x3; val_offset:81696*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81696*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa00000f; valaddr_reg:x3; val_offset:81699*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81699*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa00001f; valaddr_reg:x3; val_offset:81702*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81702*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa00003f; valaddr_reg:x3; val_offset:81705*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81705*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa00007f; valaddr_reg:x3; val_offset:81708*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81708*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa0000ff; valaddr_reg:x3; val_offset:81711*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81711*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa0001ff; valaddr_reg:x3; val_offset:81714*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81714*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa0003ff; valaddr_reg:x3; val_offset:81717*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81717*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa0007ff; valaddr_reg:x3; val_offset:81720*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81720*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa000fff; valaddr_reg:x3; val_offset:81723*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81723*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa001fff; valaddr_reg:x3; val_offset:81726*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81726*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa003fff; valaddr_reg:x3; val_offset:81729*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81729*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa007fff; valaddr_reg:x3; val_offset:81732*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81732*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa00ffff; valaddr_reg:x3; val_offset:81735*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81735*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa01ffff; valaddr_reg:x3; val_offset:81738*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81738*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa03ffff; valaddr_reg:x3; val_offset:81741*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81741*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa07ffff; valaddr_reg:x3; val_offset:81744*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81744*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa0fffff; valaddr_reg:x3; val_offset:81747*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81747*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa1fffff; valaddr_reg:x3; val_offset:81750*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81750*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa3fffff; valaddr_reg:x3; val_offset:81753*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81753*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa400000; valaddr_reg:x3; val_offset:81756*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81756*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa600000; valaddr_reg:x3; val_offset:81759*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81759*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa700000; valaddr_reg:x3; val_offset:81762*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81762*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa780000; valaddr_reg:x3; val_offset:81765*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81765*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7c0000; valaddr_reg:x3; val_offset:81768*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81768*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7e0000; valaddr_reg:x3; val_offset:81771*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81771*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7f0000; valaddr_reg:x3; val_offset:81774*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81774*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7f8000; valaddr_reg:x3; val_offset:81777*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81777*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7fc000; valaddr_reg:x3; val_offset:81780*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81780*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7fe000; valaddr_reg:x3; val_offset:81783*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81783*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7ff000; valaddr_reg:x3; val_offset:81786*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81786*0 + 3*212*FLEN/8, x4, x1, x2) + +inst_27263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7ff800; valaddr_reg:x3; val_offset:81789*0 + 3*212*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81789*0 + 3*212*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131117340,32,FLEN) +NAN_BOXED(3998443,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519040,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519041,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519043,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519047,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519055,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519071,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519103,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519167,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519295,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090519551,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090520063,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090521087,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090523135,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090527231,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090535423,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090551807,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090584575,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090650111,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1090781183,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1091043327,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1091567615,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1092616191,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1094713343,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1094713344,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1096810496,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1097859072,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098383360,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098645504,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098776576,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098842112,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098874880,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098891264,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098899456,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098903552,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098905600,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098906624,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907136,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907392,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907520,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907584,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907616,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907632,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907640,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907644,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907646,32,FLEN) +NAN_BOXED(2131117344,32,FLEN) +NAN_BOXED(3998441,32,FLEN) +NAN_BOXED(1098907647,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772160,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772161,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772163,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772167,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772175,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772191,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772223,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772287,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772415,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772671,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167773183,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167774207,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167776255,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167780351,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167788543,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167804927,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167837695,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167903231,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168034303,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168296447,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168820735,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(169869311,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(171966463,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(171966464,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(174063616,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175112192,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175636480,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175898624,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176029696,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176095232,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176128000,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176144384,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176152576,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176156672,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176158720,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-214.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-214.S new file mode 100644 index 000000000..8a86cc670 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-214.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_27264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7ffc00; valaddr_reg:x3; val_offset:81792*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81792*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7ffe00; valaddr_reg:x3; val_offset:81795*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81795*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7fff00; valaddr_reg:x3; val_offset:81798*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81798*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7fff80; valaddr_reg:x3; val_offset:81801*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81801*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7fffc0; valaddr_reg:x3; val_offset:81804*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81804*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7fffe0; valaddr_reg:x3; val_offset:81807*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81807*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7ffff0; valaddr_reg:x3; val_offset:81810*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81810*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7ffff8; valaddr_reg:x3; val_offset:81813*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81813*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7ffffc; valaddr_reg:x3; val_offset:81816*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81816*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7ffffe; valaddr_reg:x3; val_offset:81819*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81819*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x065281 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f065281; op2val:0x0; +op3val:0xa7fffff; valaddr_reg:x3; val_offset:81822*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81822*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29000000; valaddr_reg:x3; val_offset:81825*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81825*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29000001; valaddr_reg:x3; val_offset:81828*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81828*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29000003; valaddr_reg:x3; val_offset:81831*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81831*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29000007; valaddr_reg:x3; val_offset:81834*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81834*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x2900000f; valaddr_reg:x3; val_offset:81837*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81837*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x2900001f; valaddr_reg:x3; val_offset:81840*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81840*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x2900003f; valaddr_reg:x3; val_offset:81843*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81843*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x2900007f; valaddr_reg:x3; val_offset:81846*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81846*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x290000ff; valaddr_reg:x3; val_offset:81849*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81849*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x290001ff; valaddr_reg:x3; val_offset:81852*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81852*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x290003ff; valaddr_reg:x3; val_offset:81855*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81855*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x290007ff; valaddr_reg:x3; val_offset:81858*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81858*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29000fff; valaddr_reg:x3; val_offset:81861*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81861*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29001fff; valaddr_reg:x3; val_offset:81864*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81864*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29003fff; valaddr_reg:x3; val_offset:81867*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81867*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29007fff; valaddr_reg:x3; val_offset:81870*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81870*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x2900ffff; valaddr_reg:x3; val_offset:81873*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81873*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x2901ffff; valaddr_reg:x3; val_offset:81876*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81876*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x2903ffff; valaddr_reg:x3; val_offset:81879*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81879*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x2907ffff; valaddr_reg:x3; val_offset:81882*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81882*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x290fffff; valaddr_reg:x3; val_offset:81885*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81885*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x291fffff; valaddr_reg:x3; val_offset:81888*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81888*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x293fffff; valaddr_reg:x3; val_offset:81891*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81891*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29400000; valaddr_reg:x3; val_offset:81894*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81894*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29600000; valaddr_reg:x3; val_offset:81897*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81897*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29700000; valaddr_reg:x3; val_offset:81900*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81900*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x29780000; valaddr_reg:x3; val_offset:81903*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81903*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297c0000; valaddr_reg:x3; val_offset:81906*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81906*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297e0000; valaddr_reg:x3; val_offset:81909*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81909*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297f0000; valaddr_reg:x3; val_offset:81912*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81912*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297f8000; valaddr_reg:x3; val_offset:81915*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81915*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297fc000; valaddr_reg:x3; val_offset:81918*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81918*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297fe000; valaddr_reg:x3; val_offset:81921*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81921*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297ff000; valaddr_reg:x3; val_offset:81924*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81924*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297ff800; valaddr_reg:x3; val_offset:81927*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81927*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297ffc00; valaddr_reg:x3; val_offset:81930*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81930*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297ffe00; valaddr_reg:x3; val_offset:81933*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81933*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297fff00; valaddr_reg:x3; val_offset:81936*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81936*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297fff80; valaddr_reg:x3; val_offset:81939*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81939*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297fffc0; valaddr_reg:x3; val_offset:81942*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81942*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297fffe0; valaddr_reg:x3; val_offset:81945*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81945*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297ffff0; valaddr_reg:x3; val_offset:81948*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81948*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297ffff8; valaddr_reg:x3; val_offset:81951*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81951*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297ffffc; valaddr_reg:x3; val_offset:81954*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81954*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297ffffe; valaddr_reg:x3; val_offset:81957*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81957*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x52 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x297fffff; valaddr_reg:x3; val_offset:81960*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81960*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3f800001; valaddr_reg:x3; val_offset:81963*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81963*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3f800003; valaddr_reg:x3; val_offset:81966*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81966*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3f800007; valaddr_reg:x3; val_offset:81969*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81969*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3f999999; valaddr_reg:x3; val_offset:81972*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81972*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:81975*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81975*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:81978*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81978*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:81981*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81981*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:81984*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81984*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:81987*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81987*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:81990*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81990*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:81993*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81993*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:81996*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81996*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:81999*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 81999*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:82002*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82002*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:82005*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82005*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06717b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3ceec8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06717b; op2val:0x3ceec8; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:82008*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82008*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac000000; valaddr_reg:x3; val_offset:82011*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82011*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac000001; valaddr_reg:x3; val_offset:82014*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82014*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac000003; valaddr_reg:x3; val_offset:82017*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82017*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac000007; valaddr_reg:x3; val_offset:82020*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82020*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac00000f; valaddr_reg:x3; val_offset:82023*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82023*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac00001f; valaddr_reg:x3; val_offset:82026*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82026*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac00003f; valaddr_reg:x3; val_offset:82029*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82029*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac00007f; valaddr_reg:x3; val_offset:82032*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82032*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac0000ff; valaddr_reg:x3; val_offset:82035*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82035*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac0001ff; valaddr_reg:x3; val_offset:82038*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82038*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac0003ff; valaddr_reg:x3; val_offset:82041*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82041*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac0007ff; valaddr_reg:x3; val_offset:82044*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82044*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac000fff; valaddr_reg:x3; val_offset:82047*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82047*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac001fff; valaddr_reg:x3; val_offset:82050*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82050*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac003fff; valaddr_reg:x3; val_offset:82053*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82053*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac007fff; valaddr_reg:x3; val_offset:82056*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82056*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac00ffff; valaddr_reg:x3; val_offset:82059*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82059*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac01ffff; valaddr_reg:x3; val_offset:82062*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82062*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac03ffff; valaddr_reg:x3; val_offset:82065*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82065*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac07ffff; valaddr_reg:x3; val_offset:82068*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82068*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac0fffff; valaddr_reg:x3; val_offset:82071*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82071*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac1fffff; valaddr_reg:x3; val_offset:82074*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82074*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac3fffff; valaddr_reg:x3; val_offset:82077*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82077*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac400000; valaddr_reg:x3; val_offset:82080*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82080*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac600000; valaddr_reg:x3; val_offset:82083*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82083*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac700000; valaddr_reg:x3; val_offset:82086*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82086*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac780000; valaddr_reg:x3; val_offset:82089*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82089*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7c0000; valaddr_reg:x3; val_offset:82092*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82092*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7e0000; valaddr_reg:x3; val_offset:82095*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82095*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7f0000; valaddr_reg:x3; val_offset:82098*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82098*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7f8000; valaddr_reg:x3; val_offset:82101*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82101*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7fc000; valaddr_reg:x3; val_offset:82104*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82104*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7fe000; valaddr_reg:x3; val_offset:82107*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82107*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7ff000; valaddr_reg:x3; val_offset:82110*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82110*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7ff800; valaddr_reg:x3; val_offset:82113*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82113*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7ffc00; valaddr_reg:x3; val_offset:82116*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82116*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7ffe00; valaddr_reg:x3; val_offset:82119*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82119*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7fff00; valaddr_reg:x3; val_offset:82122*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82122*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7fff80; valaddr_reg:x3; val_offset:82125*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82125*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7fffc0; valaddr_reg:x3; val_offset:82128*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82128*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7fffe0; valaddr_reg:x3; val_offset:82131*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82131*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7ffff0; valaddr_reg:x3; val_offset:82134*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82134*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7ffff8; valaddr_reg:x3; val_offset:82137*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82137*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7ffffc; valaddr_reg:x3; val_offset:82140*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82140*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7ffffe; valaddr_reg:x3; val_offset:82143*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82143*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x58 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xac7fffff; valaddr_reg:x3; val_offset:82146*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82146*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbf800001; valaddr_reg:x3; val_offset:82149*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82149*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbf800003; valaddr_reg:x3; val_offset:82152*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82152*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbf800007; valaddr_reg:x3; val_offset:82155*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82155*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbf999999; valaddr_reg:x3; val_offset:82158*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82158*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:82161*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82161*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:82164*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82164*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:82167*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82167*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:82170*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82170*0 + 3*213*FLEN/8, x4, x1, x2) + +inst_27391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:82173*0 + 3*213*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82173*0 + 3*213*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176159744,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160256,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160512,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160640,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160704,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160736,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160752,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160760,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160764,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160766,32,FLEN) +NAN_BOXED(2131120769,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160767,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687865856,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687865857,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687865859,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687865863,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687865871,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687865887,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687865919,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687865983,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687866111,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687866367,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687866879,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687867903,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687869951,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687874047,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687882239,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687898623,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687931391,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(687996927,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(688127999,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(688390143,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(688914431,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(689963007,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(692060159,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(692060160,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(694157312,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(695205888,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(695730176,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(695992320,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696123392,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696188928,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696221696,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696238080,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696246272,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696250368,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696252416,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696253440,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696253952,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254208,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254336,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254400,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254432,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254448,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254456,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254460,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254462,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(696254463,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131128699,32,FLEN) +NAN_BOXED(3993288,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681152,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681153,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681155,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681159,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681167,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681183,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681215,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681279,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681407,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885681663,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885682175,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885683199,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885685247,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885689343,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885697535,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885713919,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885746687,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885812223,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2885943295,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2886205439,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2886729727,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2887778303,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2889875455,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2889875456,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2891972608,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2893021184,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2893545472,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2893807616,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2893938688,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894004224,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894036992,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894053376,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894061568,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894065664,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894067712,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894068736,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069248,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069504,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069632,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069696,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069728,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069744,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069752,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069756,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069758,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(2894069759,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-215.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-215.S new file mode 100644 index 000000000..84aa22c1e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-215.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_27392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:82176*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82176*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:82179*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82179*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:82182*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82182*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:82185*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82185*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:82188*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82188*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:82191*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82191*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06b0eb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3cd216 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06b0eb; op2val:0x803cd216; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:82194*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82194*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79800000; valaddr_reg:x3; val_offset:82197*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82197*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79800001; valaddr_reg:x3; val_offset:82200*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82200*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79800003; valaddr_reg:x3; val_offset:82203*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82203*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79800007; valaddr_reg:x3; val_offset:82206*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82206*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7980000f; valaddr_reg:x3; val_offset:82209*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82209*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7980001f; valaddr_reg:x3; val_offset:82212*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82212*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7980003f; valaddr_reg:x3; val_offset:82215*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82215*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7980007f; valaddr_reg:x3; val_offset:82218*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82218*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x798000ff; valaddr_reg:x3; val_offset:82221*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82221*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x798001ff; valaddr_reg:x3; val_offset:82224*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82224*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x798003ff; valaddr_reg:x3; val_offset:82227*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82227*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x798007ff; valaddr_reg:x3; val_offset:82230*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82230*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79800fff; valaddr_reg:x3; val_offset:82233*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82233*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79801fff; valaddr_reg:x3; val_offset:82236*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82236*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79803fff; valaddr_reg:x3; val_offset:82239*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82239*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79807fff; valaddr_reg:x3; val_offset:82242*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82242*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7980ffff; valaddr_reg:x3; val_offset:82245*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82245*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7981ffff; valaddr_reg:x3; val_offset:82248*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82248*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7983ffff; valaddr_reg:x3; val_offset:82251*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82251*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7987ffff; valaddr_reg:x3; val_offset:82254*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82254*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x798fffff; valaddr_reg:x3; val_offset:82257*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82257*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x799fffff; valaddr_reg:x3; val_offset:82260*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82260*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79bfffff; valaddr_reg:x3; val_offset:82263*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82263*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79c00000; valaddr_reg:x3; val_offset:82266*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82266*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79e00000; valaddr_reg:x3; val_offset:82269*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82269*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79f00000; valaddr_reg:x3; val_offset:82272*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82272*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79f80000; valaddr_reg:x3; val_offset:82275*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82275*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fc0000; valaddr_reg:x3; val_offset:82278*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82278*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fe0000; valaddr_reg:x3; val_offset:82281*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82281*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ff0000; valaddr_reg:x3; val_offset:82284*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82284*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ff8000; valaddr_reg:x3; val_offset:82287*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82287*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ffc000; valaddr_reg:x3; val_offset:82290*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82290*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ffe000; valaddr_reg:x3; val_offset:82293*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82293*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fff000; valaddr_reg:x3; val_offset:82296*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82296*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fff800; valaddr_reg:x3; val_offset:82299*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82299*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fffc00; valaddr_reg:x3; val_offset:82302*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82302*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fffe00; valaddr_reg:x3; val_offset:82305*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82305*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ffff00; valaddr_reg:x3; val_offset:82308*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82308*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ffff80; valaddr_reg:x3; val_offset:82311*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82311*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ffffc0; valaddr_reg:x3; val_offset:82314*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82314*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ffffe0; valaddr_reg:x3; val_offset:82317*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82317*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fffff0; valaddr_reg:x3; val_offset:82320*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82320*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fffff8; valaddr_reg:x3; val_offset:82323*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82323*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fffffc; valaddr_reg:x3; val_offset:82326*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82326*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79fffffe; valaddr_reg:x3; val_offset:82329*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82329*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xf3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x79ffffff; valaddr_reg:x3; val_offset:82332*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82332*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f000001; valaddr_reg:x3; val_offset:82335*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82335*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f000003; valaddr_reg:x3; val_offset:82338*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82338*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f000007; valaddr_reg:x3; val_offset:82341*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82341*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f199999; valaddr_reg:x3; val_offset:82344*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82344*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f249249; valaddr_reg:x3; val_offset:82347*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82347*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f333333; valaddr_reg:x3; val_offset:82350*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82350*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:82353*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82353*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:82356*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82356*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f444444; valaddr_reg:x3; val_offset:82359*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82359*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:82362*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82362*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:82365*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82365*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f666666; valaddr_reg:x3; val_offset:82368*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82368*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:82371*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82371*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:82374*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82374*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:82377*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82377*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x06d108 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x730e63 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f06d108; op2val:0x3ff30e63; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:82380*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82380*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:82383*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82383*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:82386*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82386*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:82389*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82389*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:82392*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82392*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:82395*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82395*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:82398*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82398*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:82401*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82401*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:82404*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82404*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:82407*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82407*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:82410*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82410*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:82413*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82413*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:82416*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82416*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:82419*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82419*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:82422*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82422*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:82425*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82425*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:82428*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82428*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7800000; valaddr_reg:x3; val_offset:82431*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82431*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7800001; valaddr_reg:x3; val_offset:82434*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82434*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7800003; valaddr_reg:x3; val_offset:82437*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82437*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7800007; valaddr_reg:x3; val_offset:82440*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82440*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x780000f; valaddr_reg:x3; val_offset:82443*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82443*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x780001f; valaddr_reg:x3; val_offset:82446*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82446*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x780003f; valaddr_reg:x3; val_offset:82449*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82449*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x780007f; valaddr_reg:x3; val_offset:82452*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82452*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x78000ff; valaddr_reg:x3; val_offset:82455*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82455*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x78001ff; valaddr_reg:x3; val_offset:82458*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82458*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x78003ff; valaddr_reg:x3; val_offset:82461*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82461*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x78007ff; valaddr_reg:x3; val_offset:82464*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82464*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7800fff; valaddr_reg:x3; val_offset:82467*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82467*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7801fff; valaddr_reg:x3; val_offset:82470*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82470*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7803fff; valaddr_reg:x3; val_offset:82473*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82473*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7807fff; valaddr_reg:x3; val_offset:82476*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82476*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x780ffff; valaddr_reg:x3; val_offset:82479*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82479*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x781ffff; valaddr_reg:x3; val_offset:82482*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82482*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x783ffff; valaddr_reg:x3; val_offset:82485*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82485*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x787ffff; valaddr_reg:x3; val_offset:82488*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82488*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x78fffff; valaddr_reg:x3; val_offset:82491*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82491*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x79fffff; valaddr_reg:x3; val_offset:82494*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82494*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7bfffff; valaddr_reg:x3; val_offset:82497*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82497*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7c00000; valaddr_reg:x3; val_offset:82500*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82500*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7e00000; valaddr_reg:x3; val_offset:82503*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82503*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7f00000; valaddr_reg:x3; val_offset:82506*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82506*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7f80000; valaddr_reg:x3; val_offset:82509*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82509*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fc0000; valaddr_reg:x3; val_offset:82512*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82512*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fe0000; valaddr_reg:x3; val_offset:82515*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82515*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ff0000; valaddr_reg:x3; val_offset:82518*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82518*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ff8000; valaddr_reg:x3; val_offset:82521*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82521*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffc000; valaddr_reg:x3; val_offset:82524*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82524*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffe000; valaddr_reg:x3; val_offset:82527*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82527*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fff000; valaddr_reg:x3; val_offset:82530*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82530*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fff800; valaddr_reg:x3; val_offset:82533*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82533*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fffc00; valaddr_reg:x3; val_offset:82536*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82536*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fffe00; valaddr_reg:x3; val_offset:82539*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82539*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffff00; valaddr_reg:x3; val_offset:82542*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82542*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffff80; valaddr_reg:x3; val_offset:82545*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82545*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffffc0; valaddr_reg:x3; val_offset:82548*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82548*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffffe0; valaddr_reg:x3; val_offset:82551*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82551*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fffff0; valaddr_reg:x3; val_offset:82554*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82554*0 + 3*214*FLEN/8, x4, x1, x2) + +inst_27519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fffff8; valaddr_reg:x3; val_offset:82557*0 + 3*214*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82557*0 + 3*214*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2131144939,32,FLEN) +NAN_BOXED(2151469590,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431744,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431745,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431747,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431751,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431759,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431775,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431807,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431871,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038431999,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038432255,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038432767,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038433791,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038435839,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038439935,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038448127,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038464511,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038497279,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038562815,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038693887,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2038956031,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2039480319,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2040528895,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2042626047,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2042626048,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2044723200,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2045771776,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046296064,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046558208,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046689280,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046754816,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046787584,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046803968,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046812160,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046816256,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046818304,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046819328,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046819840,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820096,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820224,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820288,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820320,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820336,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820344,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820348,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820350,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2046820351,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2131153160,32,FLEN) +NAN_BOXED(1072893539,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829120,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829121,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829123,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829127,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829135,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829151,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829183,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829247,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829375,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829631,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125830143,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125831167,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125833215,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125837311,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125845503,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125861887,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125894655,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125960191,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126091263,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126353407,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126877695,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127926271,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(130023423,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(130023424,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(132120576,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133169152,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133693440,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133955584,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134086656,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134152192,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134184960,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134201344,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134209536,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134213632,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134215680,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134216704,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217216,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217472,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217600,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217664,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217696,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217712,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217720,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-216.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-216.S new file mode 100644 index 000000000..d1932327c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-216.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_27520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fffffc; valaddr_reg:x3; val_offset:82560*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82560*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7fffffe; valaddr_reg:x3; val_offset:82563*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82563*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0764a0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0764a0; op2val:0x0; +op3val:0x7ffffff; valaddr_reg:x3; val_offset:82566*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82566*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e000000; valaddr_reg:x3; val_offset:82569*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82569*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e000001; valaddr_reg:x3; val_offset:82572*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82572*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e000003; valaddr_reg:x3; val_offset:82575*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82575*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e000007; valaddr_reg:x3; val_offset:82578*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82578*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e00000f; valaddr_reg:x3; val_offset:82581*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82581*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e00001f; valaddr_reg:x3; val_offset:82584*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82584*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e00003f; valaddr_reg:x3; val_offset:82587*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82587*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e00007f; valaddr_reg:x3; val_offset:82590*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82590*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e0000ff; valaddr_reg:x3; val_offset:82593*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82593*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e0001ff; valaddr_reg:x3; val_offset:82596*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82596*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e0003ff; valaddr_reg:x3; val_offset:82599*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82599*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e0007ff; valaddr_reg:x3; val_offset:82602*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82602*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e000fff; valaddr_reg:x3; val_offset:82605*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82605*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e001fff; valaddr_reg:x3; val_offset:82608*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82608*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e003fff; valaddr_reg:x3; val_offset:82611*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82611*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e007fff; valaddr_reg:x3; val_offset:82614*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82614*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e00ffff; valaddr_reg:x3; val_offset:82617*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82617*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e01ffff; valaddr_reg:x3; val_offset:82620*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82620*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e03ffff; valaddr_reg:x3; val_offset:82623*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82623*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e07ffff; valaddr_reg:x3; val_offset:82626*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82626*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e0fffff; valaddr_reg:x3; val_offset:82629*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82629*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e1fffff; valaddr_reg:x3; val_offset:82632*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82632*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e3fffff; valaddr_reg:x3; val_offset:82635*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82635*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e400000; valaddr_reg:x3; val_offset:82638*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82638*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e600000; valaddr_reg:x3; val_offset:82641*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82641*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e700000; valaddr_reg:x3; val_offset:82644*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82644*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e780000; valaddr_reg:x3; val_offset:82647*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82647*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7c0000; valaddr_reg:x3; val_offset:82650*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82650*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7e0000; valaddr_reg:x3; val_offset:82653*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82653*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7f0000; valaddr_reg:x3; val_offset:82656*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82656*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7f8000; valaddr_reg:x3; val_offset:82659*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82659*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7fc000; valaddr_reg:x3; val_offset:82662*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82662*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7fe000; valaddr_reg:x3; val_offset:82665*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82665*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7ff000; valaddr_reg:x3; val_offset:82668*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82668*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7ff800; valaddr_reg:x3; val_offset:82671*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82671*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7ffc00; valaddr_reg:x3; val_offset:82674*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82674*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7ffe00; valaddr_reg:x3; val_offset:82677*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82677*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7fff00; valaddr_reg:x3; val_offset:82680*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82680*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7fff80; valaddr_reg:x3; val_offset:82683*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82683*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7fffc0; valaddr_reg:x3; val_offset:82686*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82686*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7fffe0; valaddr_reg:x3; val_offset:82689*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82689*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7ffff0; valaddr_reg:x3; val_offset:82692*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82692*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7ffff8; valaddr_reg:x3; val_offset:82695*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82695*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7ffffc; valaddr_reg:x3; val_offset:82698*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82698*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7ffffe; valaddr_reg:x3; val_offset:82701*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82701*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x5c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x2e7fffff; valaddr_reg:x3; val_offset:82704*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82704*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3f800001; valaddr_reg:x3; val_offset:82707*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82707*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3f800003; valaddr_reg:x3; val_offset:82710*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82710*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3f800007; valaddr_reg:x3; val_offset:82713*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82713*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3f999999; valaddr_reg:x3; val_offset:82716*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82716*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:82719*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82719*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:82722*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82722*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:82725*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82725*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:82728*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82728*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:82731*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82731*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:82734*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82734*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:82737*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82737*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:82740*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82740*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:82743*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82743*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:82746*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82746*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:82749*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82749*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x076c88 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3c7dd3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f076c88; op2val:0x3c7dd3; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:82752*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82752*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee800000; valaddr_reg:x3; val_offset:82755*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82755*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee800001; valaddr_reg:x3; val_offset:82758*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82758*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee800003; valaddr_reg:x3; val_offset:82761*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82761*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee800007; valaddr_reg:x3; val_offset:82764*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82764*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee80000f; valaddr_reg:x3; val_offset:82767*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82767*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee80001f; valaddr_reg:x3; val_offset:82770*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82770*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee80003f; valaddr_reg:x3; val_offset:82773*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82773*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee80007f; valaddr_reg:x3; val_offset:82776*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82776*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee8000ff; valaddr_reg:x3; val_offset:82779*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82779*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee8001ff; valaddr_reg:x3; val_offset:82782*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82782*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee8003ff; valaddr_reg:x3; val_offset:82785*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82785*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee8007ff; valaddr_reg:x3; val_offset:82788*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82788*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee800fff; valaddr_reg:x3; val_offset:82791*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82791*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee801fff; valaddr_reg:x3; val_offset:82794*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82794*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee803fff; valaddr_reg:x3; val_offset:82797*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82797*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee807fff; valaddr_reg:x3; val_offset:82800*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82800*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee80ffff; valaddr_reg:x3; val_offset:82803*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82803*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee81ffff; valaddr_reg:x3; val_offset:82806*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82806*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee83ffff; valaddr_reg:x3; val_offset:82809*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82809*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee87ffff; valaddr_reg:x3; val_offset:82812*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82812*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee8fffff; valaddr_reg:x3; val_offset:82815*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82815*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xee9fffff; valaddr_reg:x3; val_offset:82818*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82818*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeebfffff; valaddr_reg:x3; val_offset:82821*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82821*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeec00000; valaddr_reg:x3; val_offset:82824*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82824*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeee00000; valaddr_reg:x3; val_offset:82827*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82827*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeef00000; valaddr_reg:x3; val_offset:82830*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82830*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeef80000; valaddr_reg:x3; val_offset:82833*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82833*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefc0000; valaddr_reg:x3; val_offset:82836*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82836*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefe0000; valaddr_reg:x3; val_offset:82839*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82839*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeff0000; valaddr_reg:x3; val_offset:82842*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82842*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeff8000; valaddr_reg:x3; val_offset:82845*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82845*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeffc000; valaddr_reg:x3; val_offset:82848*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82848*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeffe000; valaddr_reg:x3; val_offset:82851*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82851*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefff000; valaddr_reg:x3; val_offset:82854*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82854*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefff800; valaddr_reg:x3; val_offset:82857*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82857*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefffc00; valaddr_reg:x3; val_offset:82860*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82860*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefffe00; valaddr_reg:x3; val_offset:82863*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82863*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeffff00; valaddr_reg:x3; val_offset:82866*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82866*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeffff80; valaddr_reg:x3; val_offset:82869*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82869*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeffffc0; valaddr_reg:x3; val_offset:82872*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82872*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeffffe0; valaddr_reg:x3; val_offset:82875*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82875*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefffff0; valaddr_reg:x3; val_offset:82878*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82878*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefffff8; valaddr_reg:x3; val_offset:82881*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82881*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefffffc; valaddr_reg:x3; val_offset:82884*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82884*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeefffffe; valaddr_reg:x3; val_offset:82887*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82887*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xdd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xeeffffff; valaddr_reg:x3; val_offset:82890*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82890*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff000001; valaddr_reg:x3; val_offset:82893*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82893*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff000003; valaddr_reg:x3; val_offset:82896*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82896*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff000007; valaddr_reg:x3; val_offset:82899*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82899*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff199999; valaddr_reg:x3; val_offset:82902*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82902*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff249249; valaddr_reg:x3; val_offset:82905*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82905*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff333333; valaddr_reg:x3; val_offset:82908*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82908*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:82911*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82911*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:82914*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82914*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff444444; valaddr_reg:x3; val_offset:82917*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82917*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:82920*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82920*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:82923*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82923*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff666666; valaddr_reg:x3; val_offset:82926*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82926*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:82929*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82929*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:82932*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82932*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:82935*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82935*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x079bc3 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x71a308 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f079bc3; op2val:0xbff1a308; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:82938*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82938*0 + 3*215*FLEN/8, x4, x1, x2) + +inst_27647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:82941*0 + 3*215*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82941*0 + 3*215*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217724,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217726,32,FLEN) +NAN_BOXED(2131190944,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217727,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771751936,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771751937,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771751939,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771751943,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771751951,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771751967,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771751999,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771752063,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771752191,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771752447,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771752959,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771753983,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771756031,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771760127,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771768319,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771784703,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771817471,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(771883007,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(772014079,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(772276223,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(772800511,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(773849087,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(775946239,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(775946240,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(778043392,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(779091968,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(779616256,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(779878400,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780009472,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780075008,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780107776,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780124160,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780132352,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780136448,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780138496,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780139520,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140032,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140288,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140416,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140480,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140512,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140528,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140536,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140540,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140542,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(780140543,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131192968,32,FLEN) +NAN_BOXED(3964371,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366016,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366017,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366019,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366023,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366031,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366047,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366079,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366143,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366271,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001366527,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001367039,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001368063,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001370111,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001374207,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001382399,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001398783,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001431551,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001497087,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001628159,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4001890303,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4002414591,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4003463167,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4005560319,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4005560320,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4007657472,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4008706048,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009230336,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009492480,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009623552,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009689088,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009721856,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009738240,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009746432,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009750528,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009752576,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009753600,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754112,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754368,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754496,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754560,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754592,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754608,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754616,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754620,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754622,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4009754623,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2131205059,32,FLEN) +NAN_BOXED(3220284168,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-217.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-217.S new file mode 100644 index 000000000..5f0f59733 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-217.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_27648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:82944*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82944*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:82947*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82947*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:82950*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82950*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:82953*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82953*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:82956*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82956*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:82959*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82959*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:82962*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82962*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:82965*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82965*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:82968*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82968*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:82971*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82971*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:82974*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82974*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:82977*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82977*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:82980*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82980*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:82983*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82983*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:82986*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82986*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a000000; valaddr_reg:x3; val_offset:82989*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82989*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a000001; valaddr_reg:x3; val_offset:82992*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82992*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a000003; valaddr_reg:x3; val_offset:82995*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82995*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a000007; valaddr_reg:x3; val_offset:82998*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 82998*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a00000f; valaddr_reg:x3; val_offset:83001*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83001*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a00001f; valaddr_reg:x3; val_offset:83004*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83004*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a00003f; valaddr_reg:x3; val_offset:83007*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83007*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a00007f; valaddr_reg:x3; val_offset:83010*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83010*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a0000ff; valaddr_reg:x3; val_offset:83013*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83013*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a0001ff; valaddr_reg:x3; val_offset:83016*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83016*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a0003ff; valaddr_reg:x3; val_offset:83019*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83019*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a0007ff; valaddr_reg:x3; val_offset:83022*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83022*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a000fff; valaddr_reg:x3; val_offset:83025*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83025*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a001fff; valaddr_reg:x3; val_offset:83028*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83028*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a003fff; valaddr_reg:x3; val_offset:83031*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83031*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a007fff; valaddr_reg:x3; val_offset:83034*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83034*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a00ffff; valaddr_reg:x3; val_offset:83037*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83037*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a01ffff; valaddr_reg:x3; val_offset:83040*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83040*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a03ffff; valaddr_reg:x3; val_offset:83043*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83043*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a07ffff; valaddr_reg:x3; val_offset:83046*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83046*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a0fffff; valaddr_reg:x3; val_offset:83049*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83049*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a1fffff; valaddr_reg:x3; val_offset:83052*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83052*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a3fffff; valaddr_reg:x3; val_offset:83055*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83055*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a400000; valaddr_reg:x3; val_offset:83058*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83058*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a600000; valaddr_reg:x3; val_offset:83061*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83061*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a700000; valaddr_reg:x3; val_offset:83064*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83064*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a780000; valaddr_reg:x3; val_offset:83067*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83067*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7c0000; valaddr_reg:x3; val_offset:83070*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83070*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7e0000; valaddr_reg:x3; val_offset:83073*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83073*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7f0000; valaddr_reg:x3; val_offset:83076*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83076*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7f8000; valaddr_reg:x3; val_offset:83079*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83079*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7fc000; valaddr_reg:x3; val_offset:83082*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83082*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7fe000; valaddr_reg:x3; val_offset:83085*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83085*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7ff000; valaddr_reg:x3; val_offset:83088*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83088*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7ff800; valaddr_reg:x3; val_offset:83091*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83091*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:83094*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83094*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:83097*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83097*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7fff00; valaddr_reg:x3; val_offset:83100*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83100*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7fff80; valaddr_reg:x3; val_offset:83103*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83103*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:83106*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83106*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:83109*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83109*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:83112*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83112*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:83115*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83115*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:83118*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83118*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:83121*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83121*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07a8e7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07a8e7; op2val:0x80000000; +op3val:0x8a7fffff; valaddr_reg:x3; val_offset:83124*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83124*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c800000; valaddr_reg:x3; val_offset:83127*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83127*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c800001; valaddr_reg:x3; val_offset:83130*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83130*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c800003; valaddr_reg:x3; val_offset:83133*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83133*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c800007; valaddr_reg:x3; val_offset:83136*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83136*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c80000f; valaddr_reg:x3; val_offset:83139*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83139*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c80001f; valaddr_reg:x3; val_offset:83142*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83142*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c80003f; valaddr_reg:x3; val_offset:83145*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83145*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c80007f; valaddr_reg:x3; val_offset:83148*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83148*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c8000ff; valaddr_reg:x3; val_offset:83151*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83151*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c8001ff; valaddr_reg:x3; val_offset:83154*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83154*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c8003ff; valaddr_reg:x3; val_offset:83157*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83157*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c8007ff; valaddr_reg:x3; val_offset:83160*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83160*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c800fff; valaddr_reg:x3; val_offset:83163*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83163*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c801fff; valaddr_reg:x3; val_offset:83166*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83166*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c803fff; valaddr_reg:x3; val_offset:83169*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83169*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c807fff; valaddr_reg:x3; val_offset:83172*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83172*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c80ffff; valaddr_reg:x3; val_offset:83175*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83175*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c81ffff; valaddr_reg:x3; val_offset:83178*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83178*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c83ffff; valaddr_reg:x3; val_offset:83181*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83181*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c87ffff; valaddr_reg:x3; val_offset:83184*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83184*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c8fffff; valaddr_reg:x3; val_offset:83187*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83187*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6c9fffff; valaddr_reg:x3; val_offset:83190*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83190*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cbfffff; valaddr_reg:x3; val_offset:83193*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83193*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cc00000; valaddr_reg:x3; val_offset:83196*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83196*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6ce00000; valaddr_reg:x3; val_offset:83199*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83199*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cf00000; valaddr_reg:x3; val_offset:83202*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83202*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cf80000; valaddr_reg:x3; val_offset:83205*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83205*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfc0000; valaddr_reg:x3; val_offset:83208*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83208*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfe0000; valaddr_reg:x3; val_offset:83211*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83211*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cff0000; valaddr_reg:x3; val_offset:83214*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83214*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cff8000; valaddr_reg:x3; val_offset:83217*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83217*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cffc000; valaddr_reg:x3; val_offset:83220*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83220*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cffe000; valaddr_reg:x3; val_offset:83223*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83223*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfff000; valaddr_reg:x3; val_offset:83226*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83226*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfff800; valaddr_reg:x3; val_offset:83229*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83229*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfffc00; valaddr_reg:x3; val_offset:83232*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83232*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfffe00; valaddr_reg:x3; val_offset:83235*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83235*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cffff00; valaddr_reg:x3; val_offset:83238*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83238*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cffff80; valaddr_reg:x3; val_offset:83241*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83241*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cffffc0; valaddr_reg:x3; val_offset:83244*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83244*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cffffe0; valaddr_reg:x3; val_offset:83247*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83247*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfffff0; valaddr_reg:x3; val_offset:83250*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83250*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfffff8; valaddr_reg:x3; val_offset:83253*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83253*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfffffc; valaddr_reg:x3; val_offset:83256*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83256*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cfffffe; valaddr_reg:x3; val_offset:83259*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83259*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xd9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x6cffffff; valaddr_reg:x3; val_offset:83262*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83262*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f000001; valaddr_reg:x3; val_offset:83265*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83265*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f000003; valaddr_reg:x3; val_offset:83268*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83268*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f000007; valaddr_reg:x3; val_offset:83271*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83271*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f199999; valaddr_reg:x3; val_offset:83274*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83274*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f249249; valaddr_reg:x3; val_offset:83277*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83277*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f333333; valaddr_reg:x3; val_offset:83280*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83280*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:83283*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83283*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:83286*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83286*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f444444; valaddr_reg:x3; val_offset:83289*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83289*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:83292*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83292*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:83295*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83295*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f666666; valaddr_reg:x3; val_offset:83298*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83298*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:83301*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83301*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:83304*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83304*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:83307*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83307*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x07d614 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x713b4b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f07d614; op2val:0x3ff13b4b; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:83310*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83310*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa800000; valaddr_reg:x3; val_offset:83313*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83313*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa800001; valaddr_reg:x3; val_offset:83316*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83316*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa800003; valaddr_reg:x3; val_offset:83319*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83319*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa800007; valaddr_reg:x3; val_offset:83322*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83322*0 + 3*216*FLEN/8, x4, x1, x2) + +inst_27775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa80000f; valaddr_reg:x3; val_offset:83325*0 + 3*216*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83325*0 + 3*216*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255808,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255809,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255811,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255815,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255823,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255839,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255871,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255935,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256063,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256319,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256831,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315257855,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315259903,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315263999,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315272191,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315288575,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315321343,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315386879,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315517951,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315780095,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2316304383,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2317352959,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2319450111,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2319450112,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2321547264,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2322595840,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323120128,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323382272,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323513344,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323578880,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323611648,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323628032,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323636224,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323640320,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323642368,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323643392,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323643904,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644160,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644288,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644352,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644384,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644400,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644408,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644412,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644414,32,FLEN) +NAN_BOXED(2131208423,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644415,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820327936,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820327937,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820327939,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820327943,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820327951,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820327967,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820327999,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820328063,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820328191,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820328447,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820328959,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820329983,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820332031,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820336127,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820344319,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820360703,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820393471,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820459007,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820590079,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1820852223,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1821376511,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1822425087,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1824522239,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1824522240,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1826619392,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1827667968,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828192256,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828454400,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828585472,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828651008,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828683776,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828700160,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828708352,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828712448,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828714496,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828715520,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716032,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716288,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716416,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716480,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716512,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716528,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716536,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716540,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716542,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(1828716543,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2131219988,32,FLEN) +NAN_BOXED(1072773963,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515328,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515329,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515331,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515335,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515343,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-218.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-218.S new file mode 100644 index 000000000..229ab37f3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-218.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_27776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa80001f; valaddr_reg:x3; val_offset:83328*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83328*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa80003f; valaddr_reg:x3; val_offset:83331*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83331*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa80007f; valaddr_reg:x3; val_offset:83334*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83334*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa8000ff; valaddr_reg:x3; val_offset:83337*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83337*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa8001ff; valaddr_reg:x3; val_offset:83340*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83340*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa8003ff; valaddr_reg:x3; val_offset:83343*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83343*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa8007ff; valaddr_reg:x3; val_offset:83346*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83346*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa800fff; valaddr_reg:x3; val_offset:83349*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83349*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa801fff; valaddr_reg:x3; val_offset:83352*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83352*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa803fff; valaddr_reg:x3; val_offset:83355*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83355*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa807fff; valaddr_reg:x3; val_offset:83358*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83358*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa80ffff; valaddr_reg:x3; val_offset:83361*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83361*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa81ffff; valaddr_reg:x3; val_offset:83364*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83364*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa83ffff; valaddr_reg:x3; val_offset:83367*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83367*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa87ffff; valaddr_reg:x3; val_offset:83370*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83370*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa8fffff; valaddr_reg:x3; val_offset:83373*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83373*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaa9fffff; valaddr_reg:x3; val_offset:83376*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83376*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaabfffff; valaddr_reg:x3; val_offset:83379*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83379*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaac00000; valaddr_reg:x3; val_offset:83382*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83382*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaae00000; valaddr_reg:x3; val_offset:83385*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83385*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaf00000; valaddr_reg:x3; val_offset:83388*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83388*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaf80000; valaddr_reg:x3; val_offset:83391*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83391*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafc0000; valaddr_reg:x3; val_offset:83394*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83394*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafe0000; valaddr_reg:x3; val_offset:83397*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83397*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaff0000; valaddr_reg:x3; val_offset:83400*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83400*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaff8000; valaddr_reg:x3; val_offset:83403*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83403*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaffc000; valaddr_reg:x3; val_offset:83406*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83406*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaffe000; valaddr_reg:x3; val_offset:83409*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83409*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafff000; valaddr_reg:x3; val_offset:83412*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83412*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafff800; valaddr_reg:x3; val_offset:83415*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83415*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafffc00; valaddr_reg:x3; val_offset:83418*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83418*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafffe00; valaddr_reg:x3; val_offset:83421*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83421*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaffff00; valaddr_reg:x3; val_offset:83424*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83424*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaffff80; valaddr_reg:x3; val_offset:83427*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83427*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaffffc0; valaddr_reg:x3; val_offset:83430*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83430*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaffffe0; valaddr_reg:x3; val_offset:83433*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83433*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafffff0; valaddr_reg:x3; val_offset:83436*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83436*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafffff8; valaddr_reg:x3; val_offset:83439*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83439*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafffffc; valaddr_reg:x3; val_offset:83442*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83442*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaafffffe; valaddr_reg:x3; val_offset:83445*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83445*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x55 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xaaffffff; valaddr_reg:x3; val_offset:83448*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83448*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbf800001; valaddr_reg:x3; val_offset:83451*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83451*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbf800003; valaddr_reg:x3; val_offset:83454*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83454*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbf800007; valaddr_reg:x3; val_offset:83457*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83457*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbf999999; valaddr_reg:x3; val_offset:83460*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83460*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:83463*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83463*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:83466*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83466*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:83469*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83469*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:83472*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83472*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:83475*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83475*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:83478*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83478*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:83481*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83481*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:83484*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83484*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:83487*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83487*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:83490*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83490*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:83493*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83493*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x082110 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c2d9a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f082110; op2val:0x803c2d9a; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:83496*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83496*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7000000; valaddr_reg:x3; val_offset:83499*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83499*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7000001; valaddr_reg:x3; val_offset:83502*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83502*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7000003; valaddr_reg:x3; val_offset:83505*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83505*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7000007; valaddr_reg:x3; val_offset:83508*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83508*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa700000f; valaddr_reg:x3; val_offset:83511*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83511*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa700001f; valaddr_reg:x3; val_offset:83514*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83514*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa700003f; valaddr_reg:x3; val_offset:83517*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83517*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa700007f; valaddr_reg:x3; val_offset:83520*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83520*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa70000ff; valaddr_reg:x3; val_offset:83523*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83523*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa70001ff; valaddr_reg:x3; val_offset:83526*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83526*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa70003ff; valaddr_reg:x3; val_offset:83529*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83529*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa70007ff; valaddr_reg:x3; val_offset:83532*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83532*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7000fff; valaddr_reg:x3; val_offset:83535*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83535*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7001fff; valaddr_reg:x3; val_offset:83538*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83538*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7003fff; valaddr_reg:x3; val_offset:83541*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83541*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7007fff; valaddr_reg:x3; val_offset:83544*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83544*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa700ffff; valaddr_reg:x3; val_offset:83547*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83547*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa701ffff; valaddr_reg:x3; val_offset:83550*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83550*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa703ffff; valaddr_reg:x3; val_offset:83553*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83553*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa707ffff; valaddr_reg:x3; val_offset:83556*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83556*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa70fffff; valaddr_reg:x3; val_offset:83559*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83559*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa71fffff; valaddr_reg:x3; val_offset:83562*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83562*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa73fffff; valaddr_reg:x3; val_offset:83565*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83565*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7400000; valaddr_reg:x3; val_offset:83568*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83568*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7600000; valaddr_reg:x3; val_offset:83571*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83571*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7700000; valaddr_reg:x3; val_offset:83574*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83574*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa7780000; valaddr_reg:x3; val_offset:83577*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83577*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77c0000; valaddr_reg:x3; val_offset:83580*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83580*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77e0000; valaddr_reg:x3; val_offset:83583*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83583*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77f0000; valaddr_reg:x3; val_offset:83586*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83586*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77f8000; valaddr_reg:x3; val_offset:83589*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83589*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77fc000; valaddr_reg:x3; val_offset:83592*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83592*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77fe000; valaddr_reg:x3; val_offset:83595*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83595*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77ff000; valaddr_reg:x3; val_offset:83598*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83598*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77ff800; valaddr_reg:x3; val_offset:83601*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83601*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77ffc00; valaddr_reg:x3; val_offset:83604*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83604*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77ffe00; valaddr_reg:x3; val_offset:83607*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83607*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77fff00; valaddr_reg:x3; val_offset:83610*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83610*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77fff80; valaddr_reg:x3; val_offset:83613*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83613*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77fffc0; valaddr_reg:x3; val_offset:83616*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83616*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77fffe0; valaddr_reg:x3; val_offset:83619*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83619*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77ffff0; valaddr_reg:x3; val_offset:83622*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83622*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77ffff8; valaddr_reg:x3; val_offset:83625*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83625*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77ffffc; valaddr_reg:x3; val_offset:83628*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83628*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77ffffe; valaddr_reg:x3; val_offset:83631*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83631*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x4e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xa77fffff; valaddr_reg:x3; val_offset:83634*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83634*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbf800001; valaddr_reg:x3; val_offset:83637*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83637*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbf800003; valaddr_reg:x3; val_offset:83640*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83640*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbf800007; valaddr_reg:x3; val_offset:83643*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83643*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbf999999; valaddr_reg:x3; val_offset:83646*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83646*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:83649*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83649*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:83652*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83652*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:83655*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83655*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:83658*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83658*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:83661*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83661*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:83664*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83664*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:83667*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83667*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:83670*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83670*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:83673*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83673*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:83676*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83676*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:83679*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83679*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x08631e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3c1075 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f08631e; op2val:0x803c1075; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:83682*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83682*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:83685*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83685*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:83688*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83688*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:83691*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83691*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:83694*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83694*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:83697*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83697*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:83700*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83700*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:83703*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83703*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:83706*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83706*0 + 3*217*FLEN/8, x4, x1, x2) + +inst_27903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:83709*0 + 3*217*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83709*0 + 3*217*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515359,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515391,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515455,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515583,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860515839,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860516351,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860517375,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860519423,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860523519,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860531711,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860548095,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860580863,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860646399,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2860777471,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2861039615,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2861563903,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2862612479,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2864709631,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2864709632,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2866806784,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2867855360,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868379648,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868641792,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868772864,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868838400,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868871168,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868887552,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868895744,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868899840,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868901888,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868902912,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903424,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903680,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903808,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903872,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903904,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903920,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903928,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903932,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903934,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(2868903935,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2131239184,32,FLEN) +NAN_BOXED(2151427482,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795072,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795073,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795075,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795079,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795087,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795103,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795135,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795199,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795327,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801795583,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801796095,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801797119,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801799167,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801803263,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801811455,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801827839,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801860607,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2801926143,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2802057215,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2802319359,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2802843647,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2803892223,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2805989375,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2805989376,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2808086528,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2809135104,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2809659392,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2809921536,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810052608,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810118144,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810150912,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810167296,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810175488,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810179584,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810181632,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810182656,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183168,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183424,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183552,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183616,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183648,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183664,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183672,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183676,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183678,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(2810183679,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2131256094,32,FLEN) +NAN_BOXED(2151420021,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-219.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-219.S new file mode 100644 index 000000000..b9b5638f6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-219.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_27904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:83712*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83712*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:83715*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83715*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:83718*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83718*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:83721*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83721*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:83724*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83724*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:83727*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83727*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:83730*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83730*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82000000; valaddr_reg:x3; val_offset:83733*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83733*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82000001; valaddr_reg:x3; val_offset:83736*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83736*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82000003; valaddr_reg:x3; val_offset:83739*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83739*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82000007; valaddr_reg:x3; val_offset:83742*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83742*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8200000f; valaddr_reg:x3; val_offset:83745*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83745*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8200001f; valaddr_reg:x3; val_offset:83748*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83748*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8200003f; valaddr_reg:x3; val_offset:83751*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83751*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8200007f; valaddr_reg:x3; val_offset:83754*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83754*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x820000ff; valaddr_reg:x3; val_offset:83757*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83757*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x820001ff; valaddr_reg:x3; val_offset:83760*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83760*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x820003ff; valaddr_reg:x3; val_offset:83763*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83763*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x820007ff; valaddr_reg:x3; val_offset:83766*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83766*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82000fff; valaddr_reg:x3; val_offset:83769*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83769*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82001fff; valaddr_reg:x3; val_offset:83772*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83772*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82003fff; valaddr_reg:x3; val_offset:83775*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83775*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82007fff; valaddr_reg:x3; val_offset:83778*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83778*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8200ffff; valaddr_reg:x3; val_offset:83781*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83781*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8201ffff; valaddr_reg:x3; val_offset:83784*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83784*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8203ffff; valaddr_reg:x3; val_offset:83787*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83787*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x8207ffff; valaddr_reg:x3; val_offset:83790*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83790*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x820fffff; valaddr_reg:x3; val_offset:83793*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83793*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x821fffff; valaddr_reg:x3; val_offset:83796*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83796*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x823fffff; valaddr_reg:x3; val_offset:83799*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83799*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82400000; valaddr_reg:x3; val_offset:83802*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83802*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82600000; valaddr_reg:x3; val_offset:83805*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83805*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82700000; valaddr_reg:x3; val_offset:83808*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83808*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x82780000; valaddr_reg:x3; val_offset:83811*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83811*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827c0000; valaddr_reg:x3; val_offset:83814*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83814*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827e0000; valaddr_reg:x3; val_offset:83817*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83817*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827f0000; valaddr_reg:x3; val_offset:83820*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83820*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827f8000; valaddr_reg:x3; val_offset:83823*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83823*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827fc000; valaddr_reg:x3; val_offset:83826*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83826*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827fe000; valaddr_reg:x3; val_offset:83829*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83829*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827ff000; valaddr_reg:x3; val_offset:83832*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83832*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827ff800; valaddr_reg:x3; val_offset:83835*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83835*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827ffc00; valaddr_reg:x3; val_offset:83838*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83838*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827ffe00; valaddr_reg:x3; val_offset:83841*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83841*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827fff00; valaddr_reg:x3; val_offset:83844*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83844*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827fff80; valaddr_reg:x3; val_offset:83847*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83847*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827fffc0; valaddr_reg:x3; val_offset:83850*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83850*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827fffe0; valaddr_reg:x3; val_offset:83853*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83853*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827ffff0; valaddr_reg:x3; val_offset:83856*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83856*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827ffff8; valaddr_reg:x3; val_offset:83859*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83859*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827ffffc; valaddr_reg:x3; val_offset:83862*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83862*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827ffffe; valaddr_reg:x3; val_offset:83865*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83865*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x092a80 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f092a80; op2val:0x80000000; +op3val:0x827fffff; valaddr_reg:x3; val_offset:83868*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83868*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:83871*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83871*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:83874*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83874*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:83877*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83877*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:83880*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83880*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:83883*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83883*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:83886*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83886*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:83889*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83889*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:83892*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83892*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:83895*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83895*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:83898*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83898*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:83901*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83901*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:83904*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83904*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:83907*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83907*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:83910*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83910*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:83913*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83913*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:83916*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83916*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2000000; valaddr_reg:x3; val_offset:83919*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83919*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2000001; valaddr_reg:x3; val_offset:83922*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83922*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2000003; valaddr_reg:x3; val_offset:83925*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83925*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2000007; valaddr_reg:x3; val_offset:83928*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83928*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x200000f; valaddr_reg:x3; val_offset:83931*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83931*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x200001f; valaddr_reg:x3; val_offset:83934*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83934*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x200003f; valaddr_reg:x3; val_offset:83937*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83937*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x200007f; valaddr_reg:x3; val_offset:83940*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83940*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x20000ff; valaddr_reg:x3; val_offset:83943*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83943*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x20001ff; valaddr_reg:x3; val_offset:83946*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83946*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x20003ff; valaddr_reg:x3; val_offset:83949*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83949*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x20007ff; valaddr_reg:x3; val_offset:83952*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83952*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2000fff; valaddr_reg:x3; val_offset:83955*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83955*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2001fff; valaddr_reg:x3; val_offset:83958*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83958*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2003fff; valaddr_reg:x3; val_offset:83961*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83961*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2007fff; valaddr_reg:x3; val_offset:83964*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83964*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x200ffff; valaddr_reg:x3; val_offset:83967*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83967*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x201ffff; valaddr_reg:x3; val_offset:83970*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83970*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x203ffff; valaddr_reg:x3; val_offset:83973*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83973*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x207ffff; valaddr_reg:x3; val_offset:83976*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83976*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x20fffff; valaddr_reg:x3; val_offset:83979*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83979*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x21fffff; valaddr_reg:x3; val_offset:83982*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83982*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x23fffff; valaddr_reg:x3; val_offset:83985*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83985*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2400000; valaddr_reg:x3; val_offset:83988*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83988*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2600000; valaddr_reg:x3; val_offset:83991*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83991*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2700000; valaddr_reg:x3; val_offset:83994*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83994*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_27999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x2780000; valaddr_reg:x3; val_offset:83997*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 83997*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27c0000; valaddr_reg:x3; val_offset:84000*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84000*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27e0000; valaddr_reg:x3; val_offset:84003*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84003*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27f0000; valaddr_reg:x3; val_offset:84006*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84006*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27f8000; valaddr_reg:x3; val_offset:84009*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84009*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27fc000; valaddr_reg:x3; val_offset:84012*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84012*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27fe000; valaddr_reg:x3; val_offset:84015*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84015*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27ff000; valaddr_reg:x3; val_offset:84018*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84018*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27ff800; valaddr_reg:x3; val_offset:84021*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84021*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27ffc00; valaddr_reg:x3; val_offset:84024*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84024*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27ffe00; valaddr_reg:x3; val_offset:84027*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84027*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27fff00; valaddr_reg:x3; val_offset:84030*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84030*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27fff80; valaddr_reg:x3; val_offset:84033*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84033*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27fffc0; valaddr_reg:x3; val_offset:84036*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84036*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27fffe0; valaddr_reg:x3; val_offset:84039*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84039*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27ffff0; valaddr_reg:x3; val_offset:84042*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84042*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27ffff8; valaddr_reg:x3; val_offset:84045*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84045*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27ffffc; valaddr_reg:x3; val_offset:84048*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84048*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27ffffe; valaddr_reg:x3; val_offset:84051*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84051*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09b342 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09b342; op2val:0x0; +op3val:0x27fffff; valaddr_reg:x3; val_offset:84054*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84054*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39800000; valaddr_reg:x3; val_offset:84057*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84057*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39800001; valaddr_reg:x3; val_offset:84060*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84060*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39800003; valaddr_reg:x3; val_offset:84063*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84063*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39800007; valaddr_reg:x3; val_offset:84066*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84066*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3980000f; valaddr_reg:x3; val_offset:84069*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84069*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3980001f; valaddr_reg:x3; val_offset:84072*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84072*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3980003f; valaddr_reg:x3; val_offset:84075*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84075*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3980007f; valaddr_reg:x3; val_offset:84078*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84078*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x398000ff; valaddr_reg:x3; val_offset:84081*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84081*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x398001ff; valaddr_reg:x3; val_offset:84084*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84084*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x398003ff; valaddr_reg:x3; val_offset:84087*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84087*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x398007ff; valaddr_reg:x3; val_offset:84090*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84090*0 + 3*218*FLEN/8, x4, x1, x2) + +inst_28031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39800fff; valaddr_reg:x3; val_offset:84093*0 + 3*218*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84093*0 + 3*218*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038080,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038081,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038083,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038087,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038095,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038111,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038143,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038207,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038335,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038591,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181039103,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181040127,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181042175,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181046271,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181054463,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181070847,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181103615,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181169151,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181300223,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181562367,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2182086655,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2183135231,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2185232383,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2185232384,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2187329536,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2188378112,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2188902400,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189164544,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189295616,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189361152,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189393920,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189410304,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189418496,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189422592,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189424640,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189425664,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426176,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426432,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426560,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426624,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426656,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426672,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426680,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426684,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426686,32,FLEN) +NAN_BOXED(2131307136,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426687,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554432,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554433,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554435,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554439,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554447,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554463,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554495,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554559,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554687,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554943,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33555455,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33556479,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33558527,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33562623,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33570815,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33587199,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33619967,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33685503,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33816575,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(34078719,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(34603007,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(35651583,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(37748735,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(37748736,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(39845888,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(40894464,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41418752,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41680896,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41811968,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41877504,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41910272,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41926656,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41934848,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41938944,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41940992,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942016,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942528,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942784,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942912,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942976,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943008,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943024,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943032,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943036,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943038,32,FLEN) +NAN_BOXED(2131342146,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943039,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964689920,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964689921,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964689923,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964689927,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964689935,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964689951,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964689983,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964690047,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964690175,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964690431,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964690943,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964691967,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964694015,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-22.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-22.S new file mode 100644 index 000000000..45f89d146 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-22.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_2688: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7fffe0; valaddr_reg:x3; val_offset:8064*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8064*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2689: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7ffff0; valaddr_reg:x3; val_offset:8067*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8067*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2690: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7ffff8; valaddr_reg:x3; val_offset:8070*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8070*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2691: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7ffffc; valaddr_reg:x3; val_offset:8073*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8073*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2692: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7ffffe; valaddr_reg:x3; val_offset:8076*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8076*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2693: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x3e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x1f7fffff; valaddr_reg:x3; val_offset:8079*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8079*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2694: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3f800001; valaddr_reg:x3; val_offset:8082*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8082*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2695: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3f800003; valaddr_reg:x3; val_offset:8085*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8085*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2696: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3f800007; valaddr_reg:x3; val_offset:8088*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8088*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2697: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3f999999; valaddr_reg:x3; val_offset:8091*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8091*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2698: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:8094*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8094*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2699: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:8097*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8097*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2700: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:8100*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8100*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2701: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:8103*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8103*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2702: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:8106*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8106*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2703: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:8109*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8109*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2704: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:8112*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8112*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2705: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:8115*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8115*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2706: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:8118*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8118*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2707: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:8121*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8121*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2708: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:8124*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8124*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2709: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x543ad9 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1a660c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d543ad9; op2val:0x19a660c; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:8127*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8127*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2710: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d800000; valaddr_reg:x3; val_offset:8130*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8130*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2711: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d800001; valaddr_reg:x3; val_offset:8133*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8133*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2712: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d800003; valaddr_reg:x3; val_offset:8136*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8136*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2713: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d800007; valaddr_reg:x3; val_offset:8139*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8139*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2714: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d80000f; valaddr_reg:x3; val_offset:8142*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8142*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2715: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d80001f; valaddr_reg:x3; val_offset:8145*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8145*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2716: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d80003f; valaddr_reg:x3; val_offset:8148*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8148*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2717: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d80007f; valaddr_reg:x3; val_offset:8151*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8151*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2718: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d8000ff; valaddr_reg:x3; val_offset:8154*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8154*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2719: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d8001ff; valaddr_reg:x3; val_offset:8157*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8157*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2720: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d8003ff; valaddr_reg:x3; val_offset:8160*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8160*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2721: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d8007ff; valaddr_reg:x3; val_offset:8163*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8163*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2722: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d800fff; valaddr_reg:x3; val_offset:8166*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8166*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2723: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d801fff; valaddr_reg:x3; val_offset:8169*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8169*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2724: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d803fff; valaddr_reg:x3; val_offset:8172*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8172*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2725: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d807fff; valaddr_reg:x3; val_offset:8175*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8175*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2726: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d80ffff; valaddr_reg:x3; val_offset:8178*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8178*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2727: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d81ffff; valaddr_reg:x3; val_offset:8181*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8181*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2728: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d83ffff; valaddr_reg:x3; val_offset:8184*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8184*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2729: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d87ffff; valaddr_reg:x3; val_offset:8187*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8187*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2730: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d8fffff; valaddr_reg:x3; val_offset:8190*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8190*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2731: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3d9fffff; valaddr_reg:x3; val_offset:8193*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8193*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2732: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dbfffff; valaddr_reg:x3; val_offset:8196*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8196*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2733: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dc00000; valaddr_reg:x3; val_offset:8199*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8199*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2734: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3de00000; valaddr_reg:x3; val_offset:8202*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8202*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2735: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3df00000; valaddr_reg:x3; val_offset:8205*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8205*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2736: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3df80000; valaddr_reg:x3; val_offset:8208*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8208*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2737: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfc0000; valaddr_reg:x3; val_offset:8211*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8211*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2738: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfe0000; valaddr_reg:x3; val_offset:8214*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8214*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2739: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dff0000; valaddr_reg:x3; val_offset:8217*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8217*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2740: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dff8000; valaddr_reg:x3; val_offset:8220*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8220*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2741: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dffc000; valaddr_reg:x3; val_offset:8223*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8223*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2742: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dffe000; valaddr_reg:x3; val_offset:8226*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8226*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2743: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfff000; valaddr_reg:x3; val_offset:8229*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8229*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2744: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfff800; valaddr_reg:x3; val_offset:8232*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8232*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2745: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfffc00; valaddr_reg:x3; val_offset:8235*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8235*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2746: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfffe00; valaddr_reg:x3; val_offset:8238*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8238*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2747: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dffff00; valaddr_reg:x3; val_offset:8241*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8241*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2748: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dffff80; valaddr_reg:x3; val_offset:8244*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8244*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2749: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dffffc0; valaddr_reg:x3; val_offset:8247*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8247*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2750: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dffffe0; valaddr_reg:x3; val_offset:8250*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8250*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2751: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfffff0; valaddr_reg:x3; val_offset:8253*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8253*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2752: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfffff8; valaddr_reg:x3; val_offset:8256*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8256*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2753: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfffffc; valaddr_reg:x3; val_offset:8259*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8259*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2754: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dfffffe; valaddr_reg:x3; val_offset:8262*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8262*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2755: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3dffffff; valaddr_reg:x3; val_offset:8265*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8265*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2756: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3f800001; valaddr_reg:x3; val_offset:8268*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8268*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2757: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3f800003; valaddr_reg:x3; val_offset:8271*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8271*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2758: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3f800007; valaddr_reg:x3; val_offset:8274*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8274*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2759: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3f999999; valaddr_reg:x3; val_offset:8277*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8277*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2760: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:8280*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8280*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2761: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:8283*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8283*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2762: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:8286*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8286*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2763: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:8289*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8289*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2764: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:8292*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8292*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2765: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:8295*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8295*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2766: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:8298*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8298*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2767: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:8301*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8301*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2768: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:8304*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8304*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2769: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:8307*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8307*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2770: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:8310*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8310*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2771: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x570d9e and fs2 == 0 and fe2 == 0x03 and fm2 == 0x185f20 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d570d9e; op2val:0x1985f20; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:8313*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8313*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2772: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:8316*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8316*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2773: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:8319*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8319*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2774: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:8322*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8322*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2775: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:8325*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8325*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2776: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:8328*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8328*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2777: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:8331*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8331*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2778: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:8334*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8334*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2779: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:8337*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8337*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2780: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:8340*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8340*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2781: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:8343*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8343*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2782: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:8346*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8346*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2783: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:8349*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8349*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2784: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:8352*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8352*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2785: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:8355*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8355*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2786: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:8358*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8358*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2787: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:8361*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8361*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2788: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4800000; valaddr_reg:x3; val_offset:8364*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8364*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2789: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4800001; valaddr_reg:x3; val_offset:8367*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8367*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2790: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4800003; valaddr_reg:x3; val_offset:8370*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8370*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2791: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4800007; valaddr_reg:x3; val_offset:8373*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8373*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2792: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x480000f; valaddr_reg:x3; val_offset:8376*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8376*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2793: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x480001f; valaddr_reg:x3; val_offset:8379*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8379*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2794: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x480003f; valaddr_reg:x3; val_offset:8382*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8382*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2795: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x480007f; valaddr_reg:x3; val_offset:8385*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8385*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2796: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x48000ff; valaddr_reg:x3; val_offset:8388*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8388*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2797: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x48001ff; valaddr_reg:x3; val_offset:8391*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8391*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2798: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x48003ff; valaddr_reg:x3; val_offset:8394*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8394*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2799: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x48007ff; valaddr_reg:x3; val_offset:8397*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8397*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2800: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4800fff; valaddr_reg:x3; val_offset:8400*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8400*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2801: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4801fff; valaddr_reg:x3; val_offset:8403*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8403*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2802: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4803fff; valaddr_reg:x3; val_offset:8406*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8406*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2803: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4807fff; valaddr_reg:x3; val_offset:8409*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8409*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2804: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x480ffff; valaddr_reg:x3; val_offset:8412*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8412*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2805: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x481ffff; valaddr_reg:x3; val_offset:8415*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8415*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2806: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x483ffff; valaddr_reg:x3; val_offset:8418*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8418*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2807: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x487ffff; valaddr_reg:x3; val_offset:8421*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8421*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2808: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x48fffff; valaddr_reg:x3; val_offset:8424*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8424*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2809: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x49fffff; valaddr_reg:x3; val_offset:8427*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8427*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2810: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4bfffff; valaddr_reg:x3; val_offset:8430*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8430*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2811: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4c00000; valaddr_reg:x3; val_offset:8433*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8433*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2812: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4e00000; valaddr_reg:x3; val_offset:8436*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8436*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2813: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4f00000; valaddr_reg:x3; val_offset:8439*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8439*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2814: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4f80000; valaddr_reg:x3; val_offset:8442*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8442*0 + 3*21*FLEN/8, x4, x1, x2) + +inst_2815: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fc0000; valaddr_reg:x3; val_offset:8445*0 + 3*21*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8445*0 + 3*21*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482272,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482288,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482296,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482300,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482302,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(528482303,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2102672089,32,FLEN) +NAN_BOXED(26895884,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031798784,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031798785,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031798787,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031798791,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031798799,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031798815,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031798847,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031798911,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031799039,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031799295,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031799807,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031800831,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031802879,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031806975,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031815167,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031831551,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031864319,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1031929855,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1032060927,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1032323071,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1032847359,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1033895935,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1035993087,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1035993088,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1038090240,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1039138816,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1039663104,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1039925248,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040056320,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040121856,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040154624,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040171008,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040179200,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040183296,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040185344,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040186368,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040186880,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187136,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187264,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187328,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187360,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187376,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187384,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187388,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187390,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1040187391,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2102857118,32,FLEN) +NAN_BOXED(26763040,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497472,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497473,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497475,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497479,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497487,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497503,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497535,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497599,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497727,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497983,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75498495,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75499519,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75501567,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75505663,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75513855,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75530239,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75563007,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75628543,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75759615,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(76021759,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(76546047,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(77594623,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(79691775,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(79691776,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(81788928,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(82837504,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83361792,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83623936,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-220.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-220.S new file mode 100644 index 000000000..521f0e16c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-220.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_28032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39801fff; valaddr_reg:x3; val_offset:84096*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84096*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39803fff; valaddr_reg:x3; val_offset:84099*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84099*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39807fff; valaddr_reg:x3; val_offset:84102*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84102*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3980ffff; valaddr_reg:x3; val_offset:84105*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84105*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3981ffff; valaddr_reg:x3; val_offset:84108*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84108*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3983ffff; valaddr_reg:x3; val_offset:84111*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84111*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3987ffff; valaddr_reg:x3; val_offset:84114*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84114*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x398fffff; valaddr_reg:x3; val_offset:84117*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84117*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x399fffff; valaddr_reg:x3; val_offset:84120*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84120*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39bfffff; valaddr_reg:x3; val_offset:84123*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84123*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39c00000; valaddr_reg:x3; val_offset:84126*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84126*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39e00000; valaddr_reg:x3; val_offset:84129*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84129*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39f00000; valaddr_reg:x3; val_offset:84132*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84132*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39f80000; valaddr_reg:x3; val_offset:84135*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84135*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fc0000; valaddr_reg:x3; val_offset:84138*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84138*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fe0000; valaddr_reg:x3; val_offset:84141*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84141*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ff0000; valaddr_reg:x3; val_offset:84144*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84144*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ff8000; valaddr_reg:x3; val_offset:84147*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84147*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ffc000; valaddr_reg:x3; val_offset:84150*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84150*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ffe000; valaddr_reg:x3; val_offset:84153*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84153*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fff000; valaddr_reg:x3; val_offset:84156*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84156*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fff800; valaddr_reg:x3; val_offset:84159*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84159*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fffc00; valaddr_reg:x3; val_offset:84162*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84162*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fffe00; valaddr_reg:x3; val_offset:84165*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84165*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ffff00; valaddr_reg:x3; val_offset:84168*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84168*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ffff80; valaddr_reg:x3; val_offset:84171*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84171*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ffffc0; valaddr_reg:x3; val_offset:84174*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84174*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ffffe0; valaddr_reg:x3; val_offset:84177*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84177*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fffff0; valaddr_reg:x3; val_offset:84180*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84180*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fffff8; valaddr_reg:x3; val_offset:84183*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84183*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fffffc; valaddr_reg:x3; val_offset:84186*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84186*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39fffffe; valaddr_reg:x3; val_offset:84189*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84189*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x73 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x39ffffff; valaddr_reg:x3; val_offset:84192*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84192*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3f800001; valaddr_reg:x3; val_offset:84195*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84195*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3f800003; valaddr_reg:x3; val_offset:84198*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84198*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3f800007; valaddr_reg:x3; val_offset:84201*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84201*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3f999999; valaddr_reg:x3; val_offset:84204*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84204*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:84207*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84207*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:84210*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84210*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:84213*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84213*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:84216*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84216*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:84219*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84219*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:84222*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84222*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:84225*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84225*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:84228*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84228*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:84231*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84231*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:84234*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84234*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:84237*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84237*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e0b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3b6a3a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e0b4; op2val:0x3b6a3a; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:84240*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84240*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:84243*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84243*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:84246*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84246*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:84249*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84249*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:84252*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84252*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:84255*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84255*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:84258*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84258*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:84261*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84261*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:84264*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84264*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:84267*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84267*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:84270*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84270*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:84273*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84273*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:84276*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84276*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:84279*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84279*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:84282*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84282*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:84285*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84285*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:84288*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84288*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9800000; valaddr_reg:x3; val_offset:84291*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84291*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9800001; valaddr_reg:x3; val_offset:84294*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84294*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9800003; valaddr_reg:x3; val_offset:84297*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84297*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9800007; valaddr_reg:x3; val_offset:84300*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84300*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x980000f; valaddr_reg:x3; val_offset:84303*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84303*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x980001f; valaddr_reg:x3; val_offset:84306*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84306*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x980003f; valaddr_reg:x3; val_offset:84309*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84309*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x980007f; valaddr_reg:x3; val_offset:84312*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84312*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x98000ff; valaddr_reg:x3; val_offset:84315*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84315*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x98001ff; valaddr_reg:x3; val_offset:84318*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84318*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x98003ff; valaddr_reg:x3; val_offset:84321*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84321*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x98007ff; valaddr_reg:x3; val_offset:84324*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84324*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9800fff; valaddr_reg:x3; val_offset:84327*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84327*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9801fff; valaddr_reg:x3; val_offset:84330*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84330*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9803fff; valaddr_reg:x3; val_offset:84333*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84333*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9807fff; valaddr_reg:x3; val_offset:84336*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84336*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x980ffff; valaddr_reg:x3; val_offset:84339*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84339*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x981ffff; valaddr_reg:x3; val_offset:84342*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84342*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x983ffff; valaddr_reg:x3; val_offset:84345*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84345*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x987ffff; valaddr_reg:x3; val_offset:84348*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84348*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x98fffff; valaddr_reg:x3; val_offset:84351*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84351*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x99fffff; valaddr_reg:x3; val_offset:84354*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84354*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9bfffff; valaddr_reg:x3; val_offset:84357*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84357*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9c00000; valaddr_reg:x3; val_offset:84360*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84360*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9e00000; valaddr_reg:x3; val_offset:84363*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84363*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9f00000; valaddr_reg:x3; val_offset:84366*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84366*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9f80000; valaddr_reg:x3; val_offset:84369*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84369*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fc0000; valaddr_reg:x3; val_offset:84372*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84372*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fe0000; valaddr_reg:x3; val_offset:84375*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84375*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ff0000; valaddr_reg:x3; val_offset:84378*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84378*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ff8000; valaddr_reg:x3; val_offset:84381*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84381*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ffc000; valaddr_reg:x3; val_offset:84384*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84384*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ffe000; valaddr_reg:x3; val_offset:84387*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84387*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fff000; valaddr_reg:x3; val_offset:84390*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84390*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fff800; valaddr_reg:x3; val_offset:84393*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84393*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fffc00; valaddr_reg:x3; val_offset:84396*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84396*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fffe00; valaddr_reg:x3; val_offset:84399*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84399*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ffff00; valaddr_reg:x3; val_offset:84402*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84402*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ffff80; valaddr_reg:x3; val_offset:84405*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84405*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ffffc0; valaddr_reg:x3; val_offset:84408*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84408*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ffffe0; valaddr_reg:x3; val_offset:84411*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84411*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fffff0; valaddr_reg:x3; val_offset:84414*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84414*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fffff8; valaddr_reg:x3; val_offset:84417*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84417*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fffffc; valaddr_reg:x3; val_offset:84420*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84420*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9fffffe; valaddr_reg:x3; val_offset:84423*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84423*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x09e19b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f09e19b; op2val:0x0; +op3val:0x9ffffff; valaddr_reg:x3; val_offset:84426*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84426*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a800000; valaddr_reg:x3; val_offset:84429*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84429*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a800001; valaddr_reg:x3; val_offset:84432*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84432*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a800003; valaddr_reg:x3; val_offset:84435*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84435*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a800007; valaddr_reg:x3; val_offset:84438*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84438*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a80000f; valaddr_reg:x3; val_offset:84441*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84441*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a80001f; valaddr_reg:x3; val_offset:84444*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84444*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a80003f; valaddr_reg:x3; val_offset:84447*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84447*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a80007f; valaddr_reg:x3; val_offset:84450*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84450*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a8000ff; valaddr_reg:x3; val_offset:84453*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84453*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a8001ff; valaddr_reg:x3; val_offset:84456*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84456*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a8003ff; valaddr_reg:x3; val_offset:84459*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84459*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a8007ff; valaddr_reg:x3; val_offset:84462*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84462*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a800fff; valaddr_reg:x3; val_offset:84465*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84465*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a801fff; valaddr_reg:x3; val_offset:84468*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84468*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a803fff; valaddr_reg:x3; val_offset:84471*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84471*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a807fff; valaddr_reg:x3; val_offset:84474*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84474*0 + 3*219*FLEN/8, x4, x1, x2) + +inst_28159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a80ffff; valaddr_reg:x3; val_offset:84477*0 + 3*219*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84477*0 + 3*219*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964698111,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964706303,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964722687,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964755455,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964820991,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(964952063,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(965214207,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(965738495,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(966787071,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(968884223,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(968884224,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(970981376,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(972029952,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(972554240,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(972816384,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(972947456,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973012992,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973045760,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973062144,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973070336,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973074432,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973076480,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973077504,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078016,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078272,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078400,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078464,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078496,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078512,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078520,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078524,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078526,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(973078527,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131353780,32,FLEN) +NAN_BOXED(3893818,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383552,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383553,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383555,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383559,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383567,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383583,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383615,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383679,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383807,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159384063,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159384575,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159385599,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159387647,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159391743,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159399935,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159416319,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159449087,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159514623,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159645695,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159907839,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(160432127,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(161480703,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(163577855,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(163577856,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(165675008,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(166723584,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167247872,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167510016,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167641088,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167706624,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167739392,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167755776,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167763968,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167768064,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167770112,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771136,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771648,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771904,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772032,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772096,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772128,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772144,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772152,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772156,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772158,32,FLEN) +NAN_BOXED(2131354011,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772159,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467136,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467137,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467139,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467143,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467151,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467167,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467199,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467263,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467391,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981467647,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981468159,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981469183,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981471231,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981475327,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981483519,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981499903,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981532671,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-221.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-221.S new file mode 100644 index 000000000..e1bc4cee2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-221.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_28160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a81ffff; valaddr_reg:x3; val_offset:84480*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84480*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a83ffff; valaddr_reg:x3; val_offset:84483*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84483*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a87ffff; valaddr_reg:x3; val_offset:84486*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84486*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a8fffff; valaddr_reg:x3; val_offset:84489*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84489*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3a9fffff; valaddr_reg:x3; val_offset:84492*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84492*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3abfffff; valaddr_reg:x3; val_offset:84495*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84495*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3ac00000; valaddr_reg:x3; val_offset:84498*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84498*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3ae00000; valaddr_reg:x3; val_offset:84501*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84501*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3af00000; valaddr_reg:x3; val_offset:84504*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84504*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3af80000; valaddr_reg:x3; val_offset:84507*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84507*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afc0000; valaddr_reg:x3; val_offset:84510*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84510*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afe0000; valaddr_reg:x3; val_offset:84513*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84513*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3aff0000; valaddr_reg:x3; val_offset:84516*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84516*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3aff8000; valaddr_reg:x3; val_offset:84519*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84519*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3affc000; valaddr_reg:x3; val_offset:84522*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84522*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3affe000; valaddr_reg:x3; val_offset:84525*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84525*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afff000; valaddr_reg:x3; val_offset:84528*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84528*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afff800; valaddr_reg:x3; val_offset:84531*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84531*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afffc00; valaddr_reg:x3; val_offset:84534*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84534*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afffe00; valaddr_reg:x3; val_offset:84537*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84537*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3affff00; valaddr_reg:x3; val_offset:84540*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84540*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3affff80; valaddr_reg:x3; val_offset:84543*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84543*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3affffc0; valaddr_reg:x3; val_offset:84546*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84546*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3affffe0; valaddr_reg:x3; val_offset:84549*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84549*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afffff0; valaddr_reg:x3; val_offset:84552*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84552*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afffff8; valaddr_reg:x3; val_offset:84555*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84555*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afffffc; valaddr_reg:x3; val_offset:84558*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84558*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3afffffe; valaddr_reg:x3; val_offset:84561*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84561*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x75 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3affffff; valaddr_reg:x3; val_offset:84564*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84564*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3f800001; valaddr_reg:x3; val_offset:84567*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84567*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3f800003; valaddr_reg:x3; val_offset:84570*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84570*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3f800007; valaddr_reg:x3; val_offset:84573*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84573*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3f999999; valaddr_reg:x3; val_offset:84576*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84576*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:84579*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84579*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:84582*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84582*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:84585*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84585*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:84588*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84588*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:84591*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84591*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:84594*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84594*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:84597*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84597*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:84600*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84600*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:84603*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84603*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:84606*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84606*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:84609*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84609*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0b9d21 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3aad18 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0b9d21; op2val:0x3aad18; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:84612*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84612*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde800000; valaddr_reg:x3; val_offset:84615*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84615*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde800001; valaddr_reg:x3; val_offset:84618*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84618*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde800003; valaddr_reg:x3; val_offset:84621*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84621*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde800007; valaddr_reg:x3; val_offset:84624*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84624*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde80000f; valaddr_reg:x3; val_offset:84627*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84627*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde80001f; valaddr_reg:x3; val_offset:84630*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84630*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde80003f; valaddr_reg:x3; val_offset:84633*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84633*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde80007f; valaddr_reg:x3; val_offset:84636*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84636*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde8000ff; valaddr_reg:x3; val_offset:84639*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84639*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde8001ff; valaddr_reg:x3; val_offset:84642*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84642*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde8003ff; valaddr_reg:x3; val_offset:84645*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84645*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde8007ff; valaddr_reg:x3; val_offset:84648*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84648*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde800fff; valaddr_reg:x3; val_offset:84651*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84651*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde801fff; valaddr_reg:x3; val_offset:84654*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84654*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde803fff; valaddr_reg:x3; val_offset:84657*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84657*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde807fff; valaddr_reg:x3; val_offset:84660*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84660*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde80ffff; valaddr_reg:x3; val_offset:84663*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84663*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde81ffff; valaddr_reg:x3; val_offset:84666*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84666*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde83ffff; valaddr_reg:x3; val_offset:84669*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84669*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde87ffff; valaddr_reg:x3; val_offset:84672*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84672*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde8fffff; valaddr_reg:x3; val_offset:84675*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84675*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xde9fffff; valaddr_reg:x3; val_offset:84678*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84678*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdebfffff; valaddr_reg:x3; val_offset:84681*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84681*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdec00000; valaddr_reg:x3; val_offset:84684*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84684*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdee00000; valaddr_reg:x3; val_offset:84687*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84687*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdef00000; valaddr_reg:x3; val_offset:84690*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84690*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdef80000; valaddr_reg:x3; val_offset:84693*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84693*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefc0000; valaddr_reg:x3; val_offset:84696*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84696*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefe0000; valaddr_reg:x3; val_offset:84699*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84699*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeff0000; valaddr_reg:x3; val_offset:84702*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84702*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeff8000; valaddr_reg:x3; val_offset:84705*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84705*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeffc000; valaddr_reg:x3; val_offset:84708*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84708*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeffe000; valaddr_reg:x3; val_offset:84711*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84711*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefff000; valaddr_reg:x3; val_offset:84714*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84714*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefff800; valaddr_reg:x3; val_offset:84717*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84717*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefffc00; valaddr_reg:x3; val_offset:84720*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84720*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefffe00; valaddr_reg:x3; val_offset:84723*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84723*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeffff00; valaddr_reg:x3; val_offset:84726*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84726*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeffff80; valaddr_reg:x3; val_offset:84729*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84729*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeffffc0; valaddr_reg:x3; val_offset:84732*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84732*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeffffe0; valaddr_reg:x3; val_offset:84735*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84735*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefffff0; valaddr_reg:x3; val_offset:84738*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84738*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefffff8; valaddr_reg:x3; val_offset:84741*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84741*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefffffc; valaddr_reg:x3; val_offset:84744*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84744*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdefffffe; valaddr_reg:x3; val_offset:84747*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84747*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xbd and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xdeffffff; valaddr_reg:x3; val_offset:84750*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84750*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff000001; valaddr_reg:x3; val_offset:84753*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84753*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff000003; valaddr_reg:x3; val_offset:84756*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84756*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff000007; valaddr_reg:x3; val_offset:84759*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84759*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff199999; valaddr_reg:x3; val_offset:84762*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84762*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff249249; valaddr_reg:x3; val_offset:84765*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84765*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff333333; valaddr_reg:x3; val_offset:84768*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84768*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:84771*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84771*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:84774*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84774*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff444444; valaddr_reg:x3; val_offset:84777*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84777*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:84780*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84780*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:84783*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84783*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff666666; valaddr_reg:x3; val_offset:84786*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84786*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:84789*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84789*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:84792*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84792*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:84795*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84795*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0bcf86 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6a5fc6 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0bcf86; op2val:0xbfea5fc6; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:84798*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84798*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x0; valaddr_reg:x3; val_offset:84801*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84801*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:84804*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84804*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:84807*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84807*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:84810*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84810*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xf; valaddr_reg:x3; val_offset:84813*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84813*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x1f; valaddr_reg:x3; val_offset:84816*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84816*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x3f; valaddr_reg:x3; val_offset:84819*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84819*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7f; valaddr_reg:x3; val_offset:84822*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84822*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xff; valaddr_reg:x3; val_offset:84825*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84825*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x1ff; valaddr_reg:x3; val_offset:84828*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84828*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x3ff; valaddr_reg:x3; val_offset:84831*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84831*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ff; valaddr_reg:x3; val_offset:84834*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84834*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xfff; valaddr_reg:x3; val_offset:84837*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84837*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x1fff; valaddr_reg:x3; val_offset:84840*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84840*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x3fff; valaddr_reg:x3; val_offset:84843*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84843*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7fff; valaddr_reg:x3; val_offset:84846*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84846*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xffff; valaddr_reg:x3; val_offset:84849*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84849*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x1ffff; valaddr_reg:x3; val_offset:84852*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84852*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x3ffff; valaddr_reg:x3; val_offset:84855*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84855*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ffff; valaddr_reg:x3; val_offset:84858*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84858*0 + 3*220*FLEN/8, x4, x1, x2) + +inst_28287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xfffff; valaddr_reg:x3; val_offset:84861*0 + 3*220*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84861*0 + 3*220*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981598207,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981729279,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(981991423,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(982515711,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(983564287,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(985661439,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(985661440,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(987758592,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(988807168,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989331456,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989593600,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989724672,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989790208,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989822976,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989839360,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989847552,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989851648,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989853696,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989854720,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855232,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855488,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855616,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855680,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855712,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855728,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855736,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855740,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855742,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(989855743,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131467553,32,FLEN) +NAN_BOXED(3845400,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930560,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930561,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930563,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930567,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930575,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930591,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930623,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930687,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732930815,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732931071,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732931583,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732932607,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732934655,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732938751,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732946943,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732963327,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3732996095,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3733061631,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3733192703,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3733454847,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3733979135,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3735027711,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3737124863,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3737124864,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3739222016,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3740270592,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3740794880,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741057024,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741188096,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741253632,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741286400,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741302784,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741310976,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741315072,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741317120,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741318144,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741318656,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741318912,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741319040,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741319104,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741319136,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741319152,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741319160,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741319164,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741319166,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(3741319167,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2131480454,32,FLEN) +NAN_BOXED(3219808198,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(63,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(511,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1023,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2047,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4095,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8191,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16383,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32767,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65535,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(131071,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(524287,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1048575,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-222.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-222.S new file mode 100644 index 000000000..78a8c65cf --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-222.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_28288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x1fffff; valaddr_reg:x3; val_offset:84864*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84864*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x3fffff; valaddr_reg:x3; val_offset:84867*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84867*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x400000; valaddr_reg:x3; val_offset:84870*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84870*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x600000; valaddr_reg:x3; val_offset:84873*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84873*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x700000; valaddr_reg:x3; val_offset:84876*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84876*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x780000; valaddr_reg:x3; val_offset:84879*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84879*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7c0000; valaddr_reg:x3; val_offset:84882*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84882*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7e0000; valaddr_reg:x3; val_offset:84885*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84885*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7f0000; valaddr_reg:x3; val_offset:84888*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84888*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7f8000; valaddr_reg:x3; val_offset:84891*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84891*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7fc000; valaddr_reg:x3; val_offset:84894*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84894*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7fe000; valaddr_reg:x3; val_offset:84897*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84897*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ff000; valaddr_reg:x3; val_offset:84900*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84900*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ff800; valaddr_reg:x3; val_offset:84903*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84903*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ffc00; valaddr_reg:x3; val_offset:84906*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84906*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ffe00; valaddr_reg:x3; val_offset:84909*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84909*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7fff00; valaddr_reg:x3; val_offset:84912*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84912*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7fff80; valaddr_reg:x3; val_offset:84915*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84915*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7fffc0; valaddr_reg:x3; val_offset:84918*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84918*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7fffe0; valaddr_reg:x3; val_offset:84921*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84921*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ffff0; valaddr_reg:x3; val_offset:84924*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84924*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:84927*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84927*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:84930*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84930*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:84933*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84933*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x7fffff; valaddr_reg:x3; val_offset:84936*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84936*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:84939*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84939*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:84942*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84942*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:84945*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84945*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:84948*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84948*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:84951*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84951*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:84954*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84954*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:84957*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84957*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:84960*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84960*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:84963*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84963*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:84966*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84966*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:84969*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84969*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:84972*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84972*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:84975*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84975*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:84978*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84978*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:84981*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84981*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c0df5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c0df5; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:84984*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84984*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67800000; valaddr_reg:x3; val_offset:84987*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84987*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67800001; valaddr_reg:x3; val_offset:84990*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84990*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67800003; valaddr_reg:x3; val_offset:84993*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84993*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67800007; valaddr_reg:x3; val_offset:84996*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84996*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x6780000f; valaddr_reg:x3; val_offset:84999*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 84999*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x6780001f; valaddr_reg:x3; val_offset:85002*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85002*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x6780003f; valaddr_reg:x3; val_offset:85005*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85005*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x6780007f; valaddr_reg:x3; val_offset:85008*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85008*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x678000ff; valaddr_reg:x3; val_offset:85011*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85011*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x678001ff; valaddr_reg:x3; val_offset:85014*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85014*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x678003ff; valaddr_reg:x3; val_offset:85017*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85017*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x678007ff; valaddr_reg:x3; val_offset:85020*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85020*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67800fff; valaddr_reg:x3; val_offset:85023*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85023*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67801fff; valaddr_reg:x3; val_offset:85026*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85026*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67803fff; valaddr_reg:x3; val_offset:85029*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85029*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67807fff; valaddr_reg:x3; val_offset:85032*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85032*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x6780ffff; valaddr_reg:x3; val_offset:85035*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85035*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x6781ffff; valaddr_reg:x3; val_offset:85038*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85038*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x6783ffff; valaddr_reg:x3; val_offset:85041*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85041*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x6787ffff; valaddr_reg:x3; val_offset:85044*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85044*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x678fffff; valaddr_reg:x3; val_offset:85047*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85047*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x679fffff; valaddr_reg:x3; val_offset:85050*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85050*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67bfffff; valaddr_reg:x3; val_offset:85053*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85053*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67c00000; valaddr_reg:x3; val_offset:85056*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85056*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67e00000; valaddr_reg:x3; val_offset:85059*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85059*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67f00000; valaddr_reg:x3; val_offset:85062*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85062*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67f80000; valaddr_reg:x3; val_offset:85065*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85065*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fc0000; valaddr_reg:x3; val_offset:85068*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85068*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fe0000; valaddr_reg:x3; val_offset:85071*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85071*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ff0000; valaddr_reg:x3; val_offset:85074*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85074*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ff8000; valaddr_reg:x3; val_offset:85077*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85077*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ffc000; valaddr_reg:x3; val_offset:85080*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85080*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ffe000; valaddr_reg:x3; val_offset:85083*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85083*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fff000; valaddr_reg:x3; val_offset:85086*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85086*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fff800; valaddr_reg:x3; val_offset:85089*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85089*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fffc00; valaddr_reg:x3; val_offset:85092*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85092*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fffe00; valaddr_reg:x3; val_offset:85095*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85095*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ffff00; valaddr_reg:x3; val_offset:85098*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85098*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ffff80; valaddr_reg:x3; val_offset:85101*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85101*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ffffc0; valaddr_reg:x3; val_offset:85104*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85104*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ffffe0; valaddr_reg:x3; val_offset:85107*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85107*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fffff0; valaddr_reg:x3; val_offset:85110*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85110*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fffff8; valaddr_reg:x3; val_offset:85113*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85113*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fffffc; valaddr_reg:x3; val_offset:85116*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85116*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67fffffe; valaddr_reg:x3; val_offset:85119*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85119*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xcf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x67ffffff; valaddr_reg:x3; val_offset:85122*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85122*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f000001; valaddr_reg:x3; val_offset:85125*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85125*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f000003; valaddr_reg:x3; val_offset:85128*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85128*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f000007; valaddr_reg:x3; val_offset:85131*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85131*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f199999; valaddr_reg:x3; val_offset:85134*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85134*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f249249; valaddr_reg:x3; val_offset:85137*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85137*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f333333; valaddr_reg:x3; val_offset:85140*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85140*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:85143*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85143*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:85146*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85146*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f444444; valaddr_reg:x3; val_offset:85149*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85149*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:85152*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85152*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:85155*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85155*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f666666; valaddr_reg:x3; val_offset:85158*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85158*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:85161*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85161*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:85164*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85164*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:85167*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85167*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0c9040 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x691e6d and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0c9040; op2val:0x3fe91e6d; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:85170*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85170*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:85173*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85173*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:85176*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85176*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:85179*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85179*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:85182*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85182*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:85185*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85185*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:85188*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85188*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:85191*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85191*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:85194*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85194*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:85197*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85197*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:85200*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85200*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:85203*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85203*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:85206*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85206*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:85209*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85209*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:85212*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85212*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:85215*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85215*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:85218*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85218*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb800000; valaddr_reg:x3; val_offset:85221*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85221*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb800001; valaddr_reg:x3; val_offset:85224*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85224*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb800003; valaddr_reg:x3; val_offset:85227*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85227*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb800007; valaddr_reg:x3; val_offset:85230*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85230*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb80000f; valaddr_reg:x3; val_offset:85233*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85233*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb80001f; valaddr_reg:x3; val_offset:85236*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85236*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb80003f; valaddr_reg:x3; val_offset:85239*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85239*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb80007f; valaddr_reg:x3; val_offset:85242*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85242*0 + 3*221*FLEN/8, x4, x1, x2) + +inst_28415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb8000ff; valaddr_reg:x3; val_offset:85245*0 + 3*221*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85245*0 + 3*221*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2097151,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194303,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194304,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6291456,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7340032,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7864320,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8126464,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8257536,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8323072,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8355840,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8372224,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8380416,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8384512,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8386560,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8387584,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388096,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388352,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388480,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388544,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388576,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388592,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388607,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2131496437,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736441856,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736441857,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736441859,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736441863,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736441871,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736441887,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736441919,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736441983,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736442111,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736442367,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736442879,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736443903,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736445951,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736450047,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736458239,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736474623,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736507391,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736572927,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736703999,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1736966143,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1737490431,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1738539007,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1740636159,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1740636160,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1742733312,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1743781888,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744306176,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744568320,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744699392,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744764928,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744797696,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744814080,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744822272,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744826368,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744828416,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744829440,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744829952,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830208,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830336,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830400,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830432,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830448,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830456,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830460,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830462,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(1744830463,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2131529792,32,FLEN) +NAN_BOXED(1072242285,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937984,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937985,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937987,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937991,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937999,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938015,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938047,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938111,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938239,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-223.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-223.S new file mode 100644 index 000000000..cf333e771 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-223.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_28416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb8001ff; valaddr_reg:x3; val_offset:85248*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85248*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb8003ff; valaddr_reg:x3; val_offset:85251*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85251*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb8007ff; valaddr_reg:x3; val_offset:85254*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85254*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb800fff; valaddr_reg:x3; val_offset:85257*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85257*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb801fff; valaddr_reg:x3; val_offset:85260*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85260*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb803fff; valaddr_reg:x3; val_offset:85263*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85263*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb807fff; valaddr_reg:x3; val_offset:85266*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85266*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb80ffff; valaddr_reg:x3; val_offset:85269*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85269*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb81ffff; valaddr_reg:x3; val_offset:85272*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85272*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb83ffff; valaddr_reg:x3; val_offset:85275*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85275*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb87ffff; valaddr_reg:x3; val_offset:85278*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85278*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb8fffff; valaddr_reg:x3; val_offset:85281*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85281*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xb9fffff; valaddr_reg:x3; val_offset:85284*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85284*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbbfffff; valaddr_reg:x3; val_offset:85287*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85287*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbc00000; valaddr_reg:x3; val_offset:85290*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85290*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbe00000; valaddr_reg:x3; val_offset:85293*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85293*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbf00000; valaddr_reg:x3; val_offset:85296*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85296*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbf80000; valaddr_reg:x3; val_offset:85299*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85299*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfc0000; valaddr_reg:x3; val_offset:85302*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85302*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfe0000; valaddr_reg:x3; val_offset:85305*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85305*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbff0000; valaddr_reg:x3; val_offset:85308*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85308*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbff8000; valaddr_reg:x3; val_offset:85311*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85311*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbffc000; valaddr_reg:x3; val_offset:85314*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85314*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbffe000; valaddr_reg:x3; val_offset:85317*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85317*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfff000; valaddr_reg:x3; val_offset:85320*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85320*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfff800; valaddr_reg:x3; val_offset:85323*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85323*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfffc00; valaddr_reg:x3; val_offset:85326*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85326*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfffe00; valaddr_reg:x3; val_offset:85329*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85329*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbffff00; valaddr_reg:x3; val_offset:85332*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85332*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbffff80; valaddr_reg:x3; val_offset:85335*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85335*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbffffc0; valaddr_reg:x3; val_offset:85338*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85338*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbffffe0; valaddr_reg:x3; val_offset:85341*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85341*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfffff0; valaddr_reg:x3; val_offset:85344*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85344*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfffff8; valaddr_reg:x3; val_offset:85347*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85347*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfffffc; valaddr_reg:x3; val_offset:85350*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85350*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbfffffe; valaddr_reg:x3; val_offset:85353*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85353*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0d127a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0d127a; op2val:0x0; +op3val:0xbffffff; valaddr_reg:x3; val_offset:85356*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85356*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3f800001; valaddr_reg:x3; val_offset:85359*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85359*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3f800003; valaddr_reg:x3; val_offset:85362*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85362*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3f800007; valaddr_reg:x3; val_offset:85365*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85365*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3f999999; valaddr_reg:x3; val_offset:85368*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85368*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:85371*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85371*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:85374*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85374*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:85377*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85377*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:85380*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85380*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:85383*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85383*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:85386*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85386*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:85389*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85389*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:85392*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85392*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:85395*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85395*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:85398*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85398*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:85401*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85401*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:85404*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85404*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f800000; valaddr_reg:x3; val_offset:85407*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85407*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f800001; valaddr_reg:x3; val_offset:85410*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85410*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f800003; valaddr_reg:x3; val_offset:85413*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85413*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f800007; valaddr_reg:x3; val_offset:85416*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85416*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f80000f; valaddr_reg:x3; val_offset:85419*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85419*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f80001f; valaddr_reg:x3; val_offset:85422*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85422*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f80003f; valaddr_reg:x3; val_offset:85425*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85425*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f80007f; valaddr_reg:x3; val_offset:85428*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85428*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f8000ff; valaddr_reg:x3; val_offset:85431*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85431*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f8001ff; valaddr_reg:x3; val_offset:85434*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85434*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f8003ff; valaddr_reg:x3; val_offset:85437*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85437*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f8007ff; valaddr_reg:x3; val_offset:85440*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85440*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f800fff; valaddr_reg:x3; val_offset:85443*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85443*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f801fff; valaddr_reg:x3; val_offset:85446*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85446*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f803fff; valaddr_reg:x3; val_offset:85449*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85449*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f807fff; valaddr_reg:x3; val_offset:85452*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85452*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f80ffff; valaddr_reg:x3; val_offset:85455*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85455*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f81ffff; valaddr_reg:x3; val_offset:85458*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85458*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f83ffff; valaddr_reg:x3; val_offset:85461*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85461*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f87ffff; valaddr_reg:x3; val_offset:85464*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85464*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f8fffff; valaddr_reg:x3; val_offset:85467*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85467*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4f9fffff; valaddr_reg:x3; val_offset:85470*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85470*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fbfffff; valaddr_reg:x3; val_offset:85473*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85473*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fc00000; valaddr_reg:x3; val_offset:85476*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85476*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fe00000; valaddr_reg:x3; val_offset:85479*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85479*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ff00000; valaddr_reg:x3; val_offset:85482*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85482*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ff80000; valaddr_reg:x3; val_offset:85485*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85485*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffc0000; valaddr_reg:x3; val_offset:85488*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85488*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffe0000; valaddr_reg:x3; val_offset:85491*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85491*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fff0000; valaddr_reg:x3; val_offset:85494*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85494*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fff8000; valaddr_reg:x3; val_offset:85497*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85497*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fffc000; valaddr_reg:x3; val_offset:85500*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85500*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fffe000; valaddr_reg:x3; val_offset:85503*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85503*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffff000; valaddr_reg:x3; val_offset:85506*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85506*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffff800; valaddr_reg:x3; val_offset:85509*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85509*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffffc00; valaddr_reg:x3; val_offset:85512*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85512*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffffe00; valaddr_reg:x3; val_offset:85515*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85515*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fffff00; valaddr_reg:x3; val_offset:85518*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85518*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fffff80; valaddr_reg:x3; val_offset:85521*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85521*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fffffc0; valaddr_reg:x3; val_offset:85524*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85524*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fffffe0; valaddr_reg:x3; val_offset:85527*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85527*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffffff0; valaddr_reg:x3; val_offset:85530*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85530*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffffff8; valaddr_reg:x3; val_offset:85533*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85533*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffffffc; valaddr_reg:x3; val_offset:85536*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85536*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4ffffffe; valaddr_reg:x3; val_offset:85539*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85539*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0de41e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x39bc03 and fs3 == 0 and fe3 == 0x9f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0de41e; op2val:0x39bc03; +op3val:0x4fffffff; valaddr_reg:x3; val_offset:85542*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85542*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:85545*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85545*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:85548*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85548*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:85551*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85551*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:85554*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85554*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:85557*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85557*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:85560*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85560*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:85563*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85563*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:85566*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85566*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:85569*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85569*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:85572*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85572*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:85575*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85575*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:85578*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85578*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:85581*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85581*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:85584*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85584*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:85587*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85587*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:85590*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85590*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a000000; valaddr_reg:x3; val_offset:85593*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85593*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a000001; valaddr_reg:x3; val_offset:85596*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85596*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a000003; valaddr_reg:x3; val_offset:85599*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85599*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a000007; valaddr_reg:x3; val_offset:85602*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85602*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a00000f; valaddr_reg:x3; val_offset:85605*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85605*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a00001f; valaddr_reg:x3; val_offset:85608*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85608*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a00003f; valaddr_reg:x3; val_offset:85611*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85611*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a00007f; valaddr_reg:x3; val_offset:85614*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85614*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a0000ff; valaddr_reg:x3; val_offset:85617*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85617*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a0001ff; valaddr_reg:x3; val_offset:85620*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85620*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a0003ff; valaddr_reg:x3; val_offset:85623*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85623*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a0007ff; valaddr_reg:x3; val_offset:85626*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85626*0 + 3*222*FLEN/8, x4, x1, x2) + +inst_28543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a000fff; valaddr_reg:x3; val_offset:85629*0 + 3*222*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85629*0 + 3*222*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938495,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192939007,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192940031,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192942079,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192946175,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192954367,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192970751,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193003519,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193069055,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193200127,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193462271,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193986559,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(195035135,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(197132287,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(197132288,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(199229440,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(200278016,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(200802304,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201064448,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201195520,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201261056,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201293824,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201310208,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201318400,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201322496,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201324544,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201325568,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326080,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326336,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326464,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326528,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326560,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326576,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326584,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326588,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326590,32,FLEN) +NAN_BOXED(2131563130,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326591,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788672,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788673,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788675,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788679,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788687,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788703,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788735,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788799,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333788927,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333789183,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333789695,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333790719,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333792767,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333796863,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333805055,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333821439,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333854207,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1333919743,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1334050815,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1334312959,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1334837247,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1335885823,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1337982975,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1337982976,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1340080128,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1341128704,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1341652992,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1341915136,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342046208,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342111744,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342144512,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342160896,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342169088,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342173184,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342175232,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342176256,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342176768,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177024,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177152,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177216,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177248,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177264,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177272,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177276,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177278,32,FLEN) +NAN_BOXED(2131616798,32,FLEN) +NAN_BOXED(3783683,32,FLEN) +NAN_BOXED(1342177279,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255808,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255809,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255811,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255815,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255823,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255839,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255871,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255935,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256063,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256319,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256831,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315257855,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315259903,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-224.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-224.S new file mode 100644 index 000000000..968b85a51 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-224.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_28544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a001fff; valaddr_reg:x3; val_offset:85632*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85632*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a003fff; valaddr_reg:x3; val_offset:85635*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85635*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a007fff; valaddr_reg:x3; val_offset:85638*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85638*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a00ffff; valaddr_reg:x3; val_offset:85641*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85641*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a01ffff; valaddr_reg:x3; val_offset:85644*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85644*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a03ffff; valaddr_reg:x3; val_offset:85647*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85647*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a07ffff; valaddr_reg:x3; val_offset:85650*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85650*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a0fffff; valaddr_reg:x3; val_offset:85653*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85653*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a1fffff; valaddr_reg:x3; val_offset:85656*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85656*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a3fffff; valaddr_reg:x3; val_offset:85659*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85659*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a400000; valaddr_reg:x3; val_offset:85662*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85662*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a600000; valaddr_reg:x3; val_offset:85665*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85665*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a700000; valaddr_reg:x3; val_offset:85668*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85668*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a780000; valaddr_reg:x3; val_offset:85671*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85671*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7c0000; valaddr_reg:x3; val_offset:85674*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85674*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7e0000; valaddr_reg:x3; val_offset:85677*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85677*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7f0000; valaddr_reg:x3; val_offset:85680*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85680*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7f8000; valaddr_reg:x3; val_offset:85683*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85683*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7fc000; valaddr_reg:x3; val_offset:85686*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85686*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7fe000; valaddr_reg:x3; val_offset:85689*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85689*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7ff000; valaddr_reg:x3; val_offset:85692*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85692*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7ff800; valaddr_reg:x3; val_offset:85695*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85695*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:85698*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85698*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:85701*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85701*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7fff00; valaddr_reg:x3; val_offset:85704*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85704*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7fff80; valaddr_reg:x3; val_offset:85707*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85707*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:85710*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85710*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:85713*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85713*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:85716*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85716*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:85719*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85719*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:85722*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85722*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:85725*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85725*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0e391d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0e391d; op2val:0x80000000; +op3val:0x8a7fffff; valaddr_reg:x3; val_offset:85728*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85728*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68800000; valaddr_reg:x3; val_offset:85731*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85731*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68800001; valaddr_reg:x3; val_offset:85734*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85734*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68800003; valaddr_reg:x3; val_offset:85737*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85737*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68800007; valaddr_reg:x3; val_offset:85740*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85740*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x6880000f; valaddr_reg:x3; val_offset:85743*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85743*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x6880001f; valaddr_reg:x3; val_offset:85746*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85746*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x6880003f; valaddr_reg:x3; val_offset:85749*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85749*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x6880007f; valaddr_reg:x3; val_offset:85752*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85752*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x688000ff; valaddr_reg:x3; val_offset:85755*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85755*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x688001ff; valaddr_reg:x3; val_offset:85758*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85758*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x688003ff; valaddr_reg:x3; val_offset:85761*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85761*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x688007ff; valaddr_reg:x3; val_offset:85764*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85764*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68800fff; valaddr_reg:x3; val_offset:85767*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85767*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68801fff; valaddr_reg:x3; val_offset:85770*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85770*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68803fff; valaddr_reg:x3; val_offset:85773*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85773*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68807fff; valaddr_reg:x3; val_offset:85776*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85776*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x6880ffff; valaddr_reg:x3; val_offset:85779*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85779*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x6881ffff; valaddr_reg:x3; val_offset:85782*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85782*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x6883ffff; valaddr_reg:x3; val_offset:85785*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85785*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x6887ffff; valaddr_reg:x3; val_offset:85788*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85788*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x688fffff; valaddr_reg:x3; val_offset:85791*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85791*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x689fffff; valaddr_reg:x3; val_offset:85794*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85794*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68bfffff; valaddr_reg:x3; val_offset:85797*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85797*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68c00000; valaddr_reg:x3; val_offset:85800*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85800*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68e00000; valaddr_reg:x3; val_offset:85803*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85803*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68f00000; valaddr_reg:x3; val_offset:85806*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85806*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68f80000; valaddr_reg:x3; val_offset:85809*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85809*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fc0000; valaddr_reg:x3; val_offset:85812*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85812*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fe0000; valaddr_reg:x3; val_offset:85815*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85815*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ff0000; valaddr_reg:x3; val_offset:85818*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85818*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ff8000; valaddr_reg:x3; val_offset:85821*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85821*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ffc000; valaddr_reg:x3; val_offset:85824*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85824*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ffe000; valaddr_reg:x3; val_offset:85827*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85827*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fff000; valaddr_reg:x3; val_offset:85830*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85830*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fff800; valaddr_reg:x3; val_offset:85833*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85833*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fffc00; valaddr_reg:x3; val_offset:85836*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85836*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fffe00; valaddr_reg:x3; val_offset:85839*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85839*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ffff00; valaddr_reg:x3; val_offset:85842*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85842*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ffff80; valaddr_reg:x3; val_offset:85845*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85845*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ffffc0; valaddr_reg:x3; val_offset:85848*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85848*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ffffe0; valaddr_reg:x3; val_offset:85851*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85851*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fffff0; valaddr_reg:x3; val_offset:85854*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85854*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fffff8; valaddr_reg:x3; val_offset:85857*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85857*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fffffc; valaddr_reg:x3; val_offset:85860*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85860*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68fffffe; valaddr_reg:x3; val_offset:85863*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85863*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xd1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x68ffffff; valaddr_reg:x3; val_offset:85866*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85866*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f000001; valaddr_reg:x3; val_offset:85869*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85869*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f000003; valaddr_reg:x3; val_offset:85872*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85872*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f000007; valaddr_reg:x3; val_offset:85875*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85875*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f199999; valaddr_reg:x3; val_offset:85878*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85878*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f249249; valaddr_reg:x3; val_offset:85881*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85881*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f333333; valaddr_reg:x3; val_offset:85884*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85884*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:85887*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85887*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:85890*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85890*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f444444; valaddr_reg:x3; val_offset:85893*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85893*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:85896*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85896*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:85899*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85899*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f666666; valaddr_reg:x3; val_offset:85902*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85902*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:85905*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85905*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:85908*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85908*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:85911*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85911*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0f9c8e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x642bca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0f9c8e; op2val:0x3fe42bca; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:85914*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85914*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3000000; valaddr_reg:x3; val_offset:85917*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85917*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3000001; valaddr_reg:x3; val_offset:85920*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85920*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3000003; valaddr_reg:x3; val_offset:85923*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85923*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3000007; valaddr_reg:x3; val_offset:85926*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85926*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa300000f; valaddr_reg:x3; val_offset:85929*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85929*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa300001f; valaddr_reg:x3; val_offset:85932*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85932*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa300003f; valaddr_reg:x3; val_offset:85935*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85935*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa300007f; valaddr_reg:x3; val_offset:85938*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85938*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa30000ff; valaddr_reg:x3; val_offset:85941*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85941*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa30001ff; valaddr_reg:x3; val_offset:85944*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85944*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa30003ff; valaddr_reg:x3; val_offset:85947*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85947*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa30007ff; valaddr_reg:x3; val_offset:85950*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85950*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3000fff; valaddr_reg:x3; val_offset:85953*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85953*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3001fff; valaddr_reg:x3; val_offset:85956*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85956*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3003fff; valaddr_reg:x3; val_offset:85959*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85959*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3007fff; valaddr_reg:x3; val_offset:85962*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85962*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa300ffff; valaddr_reg:x3; val_offset:85965*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85965*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa301ffff; valaddr_reg:x3; val_offset:85968*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85968*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa303ffff; valaddr_reg:x3; val_offset:85971*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85971*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa307ffff; valaddr_reg:x3; val_offset:85974*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85974*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa30fffff; valaddr_reg:x3; val_offset:85977*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85977*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa31fffff; valaddr_reg:x3; val_offset:85980*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85980*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa33fffff; valaddr_reg:x3; val_offset:85983*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85983*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3400000; valaddr_reg:x3; val_offset:85986*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85986*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3600000; valaddr_reg:x3; val_offset:85989*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85989*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3700000; valaddr_reg:x3; val_offset:85992*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85992*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa3780000; valaddr_reg:x3; val_offset:85995*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85995*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37c0000; valaddr_reg:x3; val_offset:85998*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 85998*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37e0000; valaddr_reg:x3; val_offset:86001*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86001*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37f0000; valaddr_reg:x3; val_offset:86004*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86004*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37f8000; valaddr_reg:x3; val_offset:86007*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86007*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37fc000; valaddr_reg:x3; val_offset:86010*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86010*0 + 3*223*FLEN/8, x4, x1, x2) + +inst_28671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37fe000; valaddr_reg:x3; val_offset:86013*0 + 3*223*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86013*0 + 3*223*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315263999,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315272191,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315288575,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315321343,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315386879,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315517951,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315780095,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2316304383,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2317352959,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2319450111,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2319450112,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2321547264,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2322595840,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323120128,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323382272,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323513344,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323578880,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323611648,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323628032,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323636224,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323640320,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323642368,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323643392,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323643904,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644160,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644288,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644352,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644384,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644400,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644408,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644412,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644414,32,FLEN) +NAN_BOXED(2131638557,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644415,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219072,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219073,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219075,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219079,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219087,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219103,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219135,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219199,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219327,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753219583,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753220095,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753221119,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753223167,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753227263,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753235455,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753251839,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753284607,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753350143,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753481215,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1753743359,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1754267647,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1755316223,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1757413375,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1757413376,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1759510528,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1760559104,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761083392,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761345536,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761476608,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761542144,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761574912,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761591296,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761599488,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761603584,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761605632,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761606656,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607168,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607424,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607552,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607616,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607648,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607664,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607672,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607676,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607678,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(1761607679,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2131729550,32,FLEN) +NAN_BOXED(1071918026,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686208,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686209,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686211,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686215,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686223,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686239,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686271,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686335,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686463,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734686719,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734687231,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734688255,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734690303,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734694399,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734702591,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734718975,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734751743,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734817279,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2734948351,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2735210495,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2735734783,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2736783359,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2738880511,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2738880512,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2740977664,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2742026240,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2742550528,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2742812672,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2742943744,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743009280,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743042048,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743058432,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743066624,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-225.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-225.S new file mode 100644 index 000000000..031966e78 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-225.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_28672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37ff000; valaddr_reg:x3; val_offset:86016*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86016*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37ff800; valaddr_reg:x3; val_offset:86019*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86019*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37ffc00; valaddr_reg:x3; val_offset:86022*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86022*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37ffe00; valaddr_reg:x3; val_offset:86025*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86025*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37fff00; valaddr_reg:x3; val_offset:86028*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86028*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37fff80; valaddr_reg:x3; val_offset:86031*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86031*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37fffc0; valaddr_reg:x3; val_offset:86034*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86034*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37fffe0; valaddr_reg:x3; val_offset:86037*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86037*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37ffff0; valaddr_reg:x3; val_offset:86040*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86040*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37ffff8; valaddr_reg:x3; val_offset:86043*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86043*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37ffffc; valaddr_reg:x3; val_offset:86046*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86046*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37ffffe; valaddr_reg:x3; val_offset:86049*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86049*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x46 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xa37fffff; valaddr_reg:x3; val_offset:86052*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86052*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbf800001; valaddr_reg:x3; val_offset:86055*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86055*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbf800003; valaddr_reg:x3; val_offset:86058*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86058*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbf800007; valaddr_reg:x3; val_offset:86061*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86061*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbf999999; valaddr_reg:x3; val_offset:86064*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86064*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:86067*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86067*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:86070*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86070*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:86073*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86073*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:86076*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86076*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:86079*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86079*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:86082*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86082*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:86085*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86085*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:86088*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86088*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:86091*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86091*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:86094*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86094*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:86097*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86097*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0fb593 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x390104 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0fb593; op2val:0x80390104; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:86100*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86100*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:86103*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86103*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:86106*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86106*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:86109*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86109*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:86112*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86112*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:86115*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86115*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:86118*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86118*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:86121*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86121*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:86124*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86124*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:86127*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86127*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:86130*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86130*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:86133*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86133*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:86136*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86136*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:86139*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86139*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:86142*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86142*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:86145*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86145*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:86148*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86148*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10000000; valaddr_reg:x3; val_offset:86151*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86151*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10000001; valaddr_reg:x3; val_offset:86154*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86154*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10000003; valaddr_reg:x3; val_offset:86157*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86157*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10000007; valaddr_reg:x3; val_offset:86160*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86160*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1000000f; valaddr_reg:x3; val_offset:86163*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86163*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1000001f; valaddr_reg:x3; val_offset:86166*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86166*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1000003f; valaddr_reg:x3; val_offset:86169*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86169*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1000007f; valaddr_reg:x3; val_offset:86172*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86172*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x100000ff; valaddr_reg:x3; val_offset:86175*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86175*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x100001ff; valaddr_reg:x3; val_offset:86178*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86178*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x100003ff; valaddr_reg:x3; val_offset:86181*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86181*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x100007ff; valaddr_reg:x3; val_offset:86184*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86184*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10000fff; valaddr_reg:x3; val_offset:86187*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86187*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10001fff; valaddr_reg:x3; val_offset:86190*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86190*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10003fff; valaddr_reg:x3; val_offset:86193*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86193*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10007fff; valaddr_reg:x3; val_offset:86196*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86196*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1000ffff; valaddr_reg:x3; val_offset:86199*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86199*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1001ffff; valaddr_reg:x3; val_offset:86202*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86202*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1003ffff; valaddr_reg:x3; val_offset:86205*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86205*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x1007ffff; valaddr_reg:x3; val_offset:86208*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86208*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x100fffff; valaddr_reg:x3; val_offset:86211*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86211*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x101fffff; valaddr_reg:x3; val_offset:86214*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86214*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x103fffff; valaddr_reg:x3; val_offset:86217*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86217*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10400000; valaddr_reg:x3; val_offset:86220*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86220*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10600000; valaddr_reg:x3; val_offset:86223*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86223*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10700000; valaddr_reg:x3; val_offset:86226*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86226*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x10780000; valaddr_reg:x3; val_offset:86229*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86229*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107c0000; valaddr_reg:x3; val_offset:86232*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86232*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107e0000; valaddr_reg:x3; val_offset:86235*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86235*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107f0000; valaddr_reg:x3; val_offset:86238*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86238*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107f8000; valaddr_reg:x3; val_offset:86241*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86241*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107fc000; valaddr_reg:x3; val_offset:86244*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86244*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107fe000; valaddr_reg:x3; val_offset:86247*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86247*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107ff000; valaddr_reg:x3; val_offset:86250*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86250*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107ff800; valaddr_reg:x3; val_offset:86253*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86253*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107ffc00; valaddr_reg:x3; val_offset:86256*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86256*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107ffe00; valaddr_reg:x3; val_offset:86259*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86259*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107fff00; valaddr_reg:x3; val_offset:86262*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86262*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107fff80; valaddr_reg:x3; val_offset:86265*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86265*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107fffc0; valaddr_reg:x3; val_offset:86268*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86268*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107fffe0; valaddr_reg:x3; val_offset:86271*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86271*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107ffff0; valaddr_reg:x3; val_offset:86274*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86274*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107ffff8; valaddr_reg:x3; val_offset:86277*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86277*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107ffffc; valaddr_reg:x3; val_offset:86280*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86280*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107ffffe; valaddr_reg:x3; val_offset:86283*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86283*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x0ff996 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f0ff996; op2val:0x0; +op3val:0x107fffff; valaddr_reg:x3; val_offset:86286*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86286*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:86289*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86289*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:86292*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86292*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:86295*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86295*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:86298*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86298*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:86301*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86301*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:86304*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86304*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:86307*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86307*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:86310*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86310*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:86313*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86313*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:86316*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86316*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:86319*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86319*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:86322*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86322*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:86325*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86325*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:86328*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86328*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:86331*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86331*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:86334*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86334*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88800000; valaddr_reg:x3; val_offset:86337*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86337*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88800001; valaddr_reg:x3; val_offset:86340*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86340*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88800003; valaddr_reg:x3; val_offset:86343*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86343*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88800007; valaddr_reg:x3; val_offset:86346*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86346*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8880000f; valaddr_reg:x3; val_offset:86349*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86349*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8880001f; valaddr_reg:x3; val_offset:86352*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86352*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8880003f; valaddr_reg:x3; val_offset:86355*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86355*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8880007f; valaddr_reg:x3; val_offset:86358*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86358*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x888000ff; valaddr_reg:x3; val_offset:86361*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86361*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x888001ff; valaddr_reg:x3; val_offset:86364*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86364*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x888003ff; valaddr_reg:x3; val_offset:86367*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86367*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x888007ff; valaddr_reg:x3; val_offset:86370*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86370*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88800fff; valaddr_reg:x3; val_offset:86373*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86373*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88801fff; valaddr_reg:x3; val_offset:86376*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86376*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88803fff; valaddr_reg:x3; val_offset:86379*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86379*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88807fff; valaddr_reg:x3; val_offset:86382*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86382*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8880ffff; valaddr_reg:x3; val_offset:86385*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86385*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8881ffff; valaddr_reg:x3; val_offset:86388*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86388*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8883ffff; valaddr_reg:x3; val_offset:86391*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86391*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x8887ffff; valaddr_reg:x3; val_offset:86394*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86394*0 + 3*224*FLEN/8, x4, x1, x2) + +inst_28799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x888fffff; valaddr_reg:x3; val_offset:86397*0 + 3*224*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86397*0 + 3*224*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743070720,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743072768,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743073792,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074304,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074560,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074688,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074752,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074784,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074800,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074808,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074812,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074814,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(2743074815,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2131735955,32,FLEN) +NAN_BOXED(2151219460,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435456,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435457,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435459,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435463,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435471,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435487,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435519,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435583,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435711,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435967,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268436479,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268437503,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268439551,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268443647,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268451839,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268468223,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268500991,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268566527,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268697599,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268959743,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(269484031,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(270532607,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(272629759,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(272629760,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(274726912,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(275775488,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276299776,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276561920,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276692992,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276758528,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276791296,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276807680,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276815872,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276819968,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276822016,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823040,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823552,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823808,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823936,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824000,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824032,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824048,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824056,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824060,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824062,32,FLEN) +NAN_BOXED(2131753366,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824063,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089984,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089985,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089987,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089991,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089999,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090015,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090047,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090111,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090239,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090495,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290091007,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290092031,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290094079,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290098175,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290106367,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290122751,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290155519,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290221055,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290352127,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290614271,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2291138559,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-226.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-226.S new file mode 100644 index 000000000..3b5ce1971 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-226.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_28800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x889fffff; valaddr_reg:x3; val_offset:86400*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86400*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88bfffff; valaddr_reg:x3; val_offset:86403*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86403*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88c00000; valaddr_reg:x3; val_offset:86406*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86406*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88e00000; valaddr_reg:x3; val_offset:86409*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86409*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88f00000; valaddr_reg:x3; val_offset:86412*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86412*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88f80000; valaddr_reg:x3; val_offset:86415*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86415*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fc0000; valaddr_reg:x3; val_offset:86418*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86418*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fe0000; valaddr_reg:x3; val_offset:86421*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86421*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ff0000; valaddr_reg:x3; val_offset:86424*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86424*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ff8000; valaddr_reg:x3; val_offset:86427*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86427*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ffc000; valaddr_reg:x3; val_offset:86430*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86430*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ffe000; valaddr_reg:x3; val_offset:86433*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86433*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fff000; valaddr_reg:x3; val_offset:86436*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86436*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fff800; valaddr_reg:x3; val_offset:86439*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86439*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fffc00; valaddr_reg:x3; val_offset:86442*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86442*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fffe00; valaddr_reg:x3; val_offset:86445*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86445*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ffff00; valaddr_reg:x3; val_offset:86448*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86448*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ffff80; valaddr_reg:x3; val_offset:86451*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86451*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ffffc0; valaddr_reg:x3; val_offset:86454*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86454*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ffffe0; valaddr_reg:x3; val_offset:86457*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86457*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fffff0; valaddr_reg:x3; val_offset:86460*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86460*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fffff8; valaddr_reg:x3; val_offset:86463*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86463*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fffffc; valaddr_reg:x3; val_offset:86466*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86466*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88fffffe; valaddr_reg:x3; val_offset:86469*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86469*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1077d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1077d9; op2val:0x80000000; +op3val:0x88ffffff; valaddr_reg:x3; val_offset:86472*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86472*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:86475*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86475*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:86478*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86478*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:86481*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86481*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:86484*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86484*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:86487*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86487*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:86490*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86490*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:86493*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86493*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:86496*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86496*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:86499*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86499*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:86502*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86502*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:86505*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86505*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:86508*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86508*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:86511*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86511*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:86514*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86514*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:86517*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86517*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:86520*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86520*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84000000; valaddr_reg:x3; val_offset:86523*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86523*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84000001; valaddr_reg:x3; val_offset:86526*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86526*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84000003; valaddr_reg:x3; val_offset:86529*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86529*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84000007; valaddr_reg:x3; val_offset:86532*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86532*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8400000f; valaddr_reg:x3; val_offset:86535*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86535*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8400001f; valaddr_reg:x3; val_offset:86538*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86538*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8400003f; valaddr_reg:x3; val_offset:86541*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86541*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8400007f; valaddr_reg:x3; val_offset:86544*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86544*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x840000ff; valaddr_reg:x3; val_offset:86547*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86547*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x840001ff; valaddr_reg:x3; val_offset:86550*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86550*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x840003ff; valaddr_reg:x3; val_offset:86553*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86553*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x840007ff; valaddr_reg:x3; val_offset:86556*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86556*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84000fff; valaddr_reg:x3; val_offset:86559*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86559*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84001fff; valaddr_reg:x3; val_offset:86562*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86562*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84003fff; valaddr_reg:x3; val_offset:86565*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86565*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84007fff; valaddr_reg:x3; val_offset:86568*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86568*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8400ffff; valaddr_reg:x3; val_offset:86571*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86571*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8401ffff; valaddr_reg:x3; val_offset:86574*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86574*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8403ffff; valaddr_reg:x3; val_offset:86577*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86577*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x8407ffff; valaddr_reg:x3; val_offset:86580*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86580*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x840fffff; valaddr_reg:x3; val_offset:86583*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86583*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x841fffff; valaddr_reg:x3; val_offset:86586*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86586*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x843fffff; valaddr_reg:x3; val_offset:86589*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86589*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84400000; valaddr_reg:x3; val_offset:86592*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86592*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84600000; valaddr_reg:x3; val_offset:86595*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86595*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84700000; valaddr_reg:x3; val_offset:86598*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86598*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x84780000; valaddr_reg:x3; val_offset:86601*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86601*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847c0000; valaddr_reg:x3; val_offset:86604*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86604*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847e0000; valaddr_reg:x3; val_offset:86607*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86607*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847f0000; valaddr_reg:x3; val_offset:86610*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86610*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847f8000; valaddr_reg:x3; val_offset:86613*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86613*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847fc000; valaddr_reg:x3; val_offset:86616*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86616*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847fe000; valaddr_reg:x3; val_offset:86619*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86619*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847ff000; valaddr_reg:x3; val_offset:86622*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86622*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847ff800; valaddr_reg:x3; val_offset:86625*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86625*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847ffc00; valaddr_reg:x3; val_offset:86628*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86628*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847ffe00; valaddr_reg:x3; val_offset:86631*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86631*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847fff00; valaddr_reg:x3; val_offset:86634*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86634*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847fff80; valaddr_reg:x3; val_offset:86637*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86637*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847fffc0; valaddr_reg:x3; val_offset:86640*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86640*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847fffe0; valaddr_reg:x3; val_offset:86643*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86643*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847ffff0; valaddr_reg:x3; val_offset:86646*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86646*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847ffff8; valaddr_reg:x3; val_offset:86649*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86649*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847ffffc; valaddr_reg:x3; val_offset:86652*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86652*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847ffffe; valaddr_reg:x3; val_offset:86655*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86655*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e2fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e2fe; op2val:0x80000000; +op3val:0x847fffff; valaddr_reg:x3; val_offset:86658*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86658*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7800000; valaddr_reg:x3; val_offset:86661*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86661*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7800001; valaddr_reg:x3; val_offset:86664*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86664*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7800003; valaddr_reg:x3; val_offset:86667*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86667*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7800007; valaddr_reg:x3; val_offset:86670*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86670*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb780000f; valaddr_reg:x3; val_offset:86673*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86673*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb780001f; valaddr_reg:x3; val_offset:86676*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86676*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb780003f; valaddr_reg:x3; val_offset:86679*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86679*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb780007f; valaddr_reg:x3; val_offset:86682*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86682*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb78000ff; valaddr_reg:x3; val_offset:86685*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86685*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb78001ff; valaddr_reg:x3; val_offset:86688*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86688*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb78003ff; valaddr_reg:x3; val_offset:86691*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86691*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb78007ff; valaddr_reg:x3; val_offset:86694*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86694*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7800fff; valaddr_reg:x3; val_offset:86697*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86697*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7801fff; valaddr_reg:x3; val_offset:86700*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86700*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7803fff; valaddr_reg:x3; val_offset:86703*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86703*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7807fff; valaddr_reg:x3; val_offset:86706*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86706*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb780ffff; valaddr_reg:x3; val_offset:86709*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86709*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb781ffff; valaddr_reg:x3; val_offset:86712*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86712*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb783ffff; valaddr_reg:x3; val_offset:86715*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86715*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb787ffff; valaddr_reg:x3; val_offset:86718*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86718*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb78fffff; valaddr_reg:x3; val_offset:86721*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86721*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb79fffff; valaddr_reg:x3; val_offset:86724*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86724*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7bfffff; valaddr_reg:x3; val_offset:86727*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86727*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7c00000; valaddr_reg:x3; val_offset:86730*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86730*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7e00000; valaddr_reg:x3; val_offset:86733*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86733*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7f00000; valaddr_reg:x3; val_offset:86736*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86736*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7f80000; valaddr_reg:x3; val_offset:86739*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86739*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fc0000; valaddr_reg:x3; val_offset:86742*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86742*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fe0000; valaddr_reg:x3; val_offset:86745*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86745*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ff0000; valaddr_reg:x3; val_offset:86748*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86748*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ff8000; valaddr_reg:x3; val_offset:86751*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86751*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ffc000; valaddr_reg:x3; val_offset:86754*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86754*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ffe000; valaddr_reg:x3; val_offset:86757*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86757*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fff000; valaddr_reg:x3; val_offset:86760*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86760*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fff800; valaddr_reg:x3; val_offset:86763*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86763*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fffc00; valaddr_reg:x3; val_offset:86766*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86766*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fffe00; valaddr_reg:x3; val_offset:86769*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86769*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ffff00; valaddr_reg:x3; val_offset:86772*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86772*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ffff80; valaddr_reg:x3; val_offset:86775*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86775*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ffffc0; valaddr_reg:x3; val_offset:86778*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86778*0 + 3*225*FLEN/8, x4, x1, x2) + +inst_28927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ffffe0; valaddr_reg:x3; val_offset:86781*0 + 3*225*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86781*0 + 3*225*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2292187135,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2294284287,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2294284288,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2296381440,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2297430016,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2297954304,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298216448,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298347520,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298413056,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298445824,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298462208,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298470400,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298474496,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298476544,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298477568,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478080,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478336,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478464,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478528,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478560,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478576,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478584,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478588,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478590,32,FLEN) +NAN_BOXED(2131785689,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478591,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592512,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592513,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592515,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592519,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592527,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592543,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592575,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592639,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592767,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214593023,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214593535,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214594559,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214596607,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214600703,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214608895,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214625279,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214658047,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214723583,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214854655,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2215116799,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2215641087,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2216689663,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2218786815,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2218786816,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2220883968,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2221932544,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222456832,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222718976,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222850048,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222915584,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222948352,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222964736,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222972928,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222977024,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222979072,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980096,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980608,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980864,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980992,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981056,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981088,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981104,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981112,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981116,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981118,32,FLEN) +NAN_BOXED(2131813118,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981119,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619136,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619137,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619139,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619143,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619151,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619167,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619199,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619263,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619391,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078619647,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078620159,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078621183,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078623231,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078627327,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078635519,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078651903,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078684671,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078750207,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3078881279,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3079143423,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3079667711,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3080716287,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3082813439,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3082813440,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3084910592,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3085959168,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3086483456,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3086745600,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3086876672,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3086942208,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3086974976,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3086991360,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3086999552,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087003648,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087005696,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087006720,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007232,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007488,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007616,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007680,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007712,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-227.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-227.S new file mode 100644 index 000000000..ec5a47006 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-227.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_28928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fffff0; valaddr_reg:x3; val_offset:86784*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86784*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fffff8; valaddr_reg:x3; val_offset:86787*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86787*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fffffc; valaddr_reg:x3; val_offset:86790*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86790*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7fffffe; valaddr_reg:x3; val_offset:86793*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86793*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x6f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xb7ffffff; valaddr_reg:x3; val_offset:86796*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86796*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbf800001; valaddr_reg:x3; val_offset:86799*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86799*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbf800003; valaddr_reg:x3; val_offset:86802*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86802*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbf800007; valaddr_reg:x3; val_offset:86805*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86805*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbf999999; valaddr_reg:x3; val_offset:86808*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86808*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:86811*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86811*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:86814*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86814*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:86817*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86817*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:86820*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86820*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:86823*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86823*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:86826*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86826*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:86829*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86829*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:86832*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86832*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:86835*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86835*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:86838*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86838*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:86841*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86841*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x10e9a8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3887d3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f10e9a8; op2val:0x803887d3; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:86844*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86844*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7800000; valaddr_reg:x3; val_offset:86847*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86847*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7800001; valaddr_reg:x3; val_offset:86850*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86850*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7800003; valaddr_reg:x3; val_offset:86853*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86853*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7800007; valaddr_reg:x3; val_offset:86856*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86856*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf780000f; valaddr_reg:x3; val_offset:86859*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86859*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf780001f; valaddr_reg:x3; val_offset:86862*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86862*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf780003f; valaddr_reg:x3; val_offset:86865*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86865*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf780007f; valaddr_reg:x3; val_offset:86868*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86868*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf78000ff; valaddr_reg:x3; val_offset:86871*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86871*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf78001ff; valaddr_reg:x3; val_offset:86874*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86874*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf78003ff; valaddr_reg:x3; val_offset:86877*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86877*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf78007ff; valaddr_reg:x3; val_offset:86880*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86880*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7800fff; valaddr_reg:x3; val_offset:86883*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86883*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7801fff; valaddr_reg:x3; val_offset:86886*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86886*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7803fff; valaddr_reg:x3; val_offset:86889*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86889*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7807fff; valaddr_reg:x3; val_offset:86892*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86892*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf780ffff; valaddr_reg:x3; val_offset:86895*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86895*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf781ffff; valaddr_reg:x3; val_offset:86898*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86898*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf783ffff; valaddr_reg:x3; val_offset:86901*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86901*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf787ffff; valaddr_reg:x3; val_offset:86904*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86904*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf78fffff; valaddr_reg:x3; val_offset:86907*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86907*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf79fffff; valaddr_reg:x3; val_offset:86910*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86910*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7bfffff; valaddr_reg:x3; val_offset:86913*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86913*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7c00000; valaddr_reg:x3; val_offset:86916*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86916*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7e00000; valaddr_reg:x3; val_offset:86919*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86919*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7f00000; valaddr_reg:x3; val_offset:86922*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86922*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7f80000; valaddr_reg:x3; val_offset:86925*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86925*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fc0000; valaddr_reg:x3; val_offset:86928*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86928*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fe0000; valaddr_reg:x3; val_offset:86931*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86931*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ff0000; valaddr_reg:x3; val_offset:86934*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86934*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ff8000; valaddr_reg:x3; val_offset:86937*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86937*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ffc000; valaddr_reg:x3; val_offset:86940*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86940*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ffe000; valaddr_reg:x3; val_offset:86943*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86943*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fff000; valaddr_reg:x3; val_offset:86946*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86946*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fff800; valaddr_reg:x3; val_offset:86949*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86949*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fffc00; valaddr_reg:x3; val_offset:86952*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86952*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fffe00; valaddr_reg:x3; val_offset:86955*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86955*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ffff00; valaddr_reg:x3; val_offset:86958*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86958*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ffff80; valaddr_reg:x3; val_offset:86961*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86961*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ffffc0; valaddr_reg:x3; val_offset:86964*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86964*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ffffe0; valaddr_reg:x3; val_offset:86967*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86967*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fffff0; valaddr_reg:x3; val_offset:86970*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86970*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fffff8; valaddr_reg:x3; val_offset:86973*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86973*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fffffc; valaddr_reg:x3; val_offset:86976*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86976*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7fffffe; valaddr_reg:x3; val_offset:86979*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86979*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xef and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xf7ffffff; valaddr_reg:x3; val_offset:86982*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86982*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff000001; valaddr_reg:x3; val_offset:86985*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86985*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff000003; valaddr_reg:x3; val_offset:86988*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86988*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff000007; valaddr_reg:x3; val_offset:86991*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86991*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff199999; valaddr_reg:x3; val_offset:86994*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86994*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_28999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff249249; valaddr_reg:x3; val_offset:86997*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 86997*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff333333; valaddr_reg:x3; val_offset:87000*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87000*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:87003*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87003*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:87006*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87006*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff444444; valaddr_reg:x3; val_offset:87009*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87009*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:87012*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87012*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:87015*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87015*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff666666; valaddr_reg:x3; val_offset:87018*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87018*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:87021*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87021*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:87024*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87024*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:87027*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87027*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1100b6 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x61fb5a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1100b6; op2val:0xbfe1fb5a; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:87030*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87030*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:87033*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87033*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:87036*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87036*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:87039*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87039*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:87042*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87042*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:87045*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87045*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:87048*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87048*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:87051*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87051*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:87054*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87054*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:87057*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87057*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:87060*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87060*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:87063*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87063*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:87066*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87066*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:87069*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87069*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:87072*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87072*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:87075*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87075*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:87078*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87078*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83800000; valaddr_reg:x3; val_offset:87081*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87081*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83800001; valaddr_reg:x3; val_offset:87084*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87084*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83800003; valaddr_reg:x3; val_offset:87087*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87087*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83800007; valaddr_reg:x3; val_offset:87090*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87090*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x8380000f; valaddr_reg:x3; val_offset:87093*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87093*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x8380001f; valaddr_reg:x3; val_offset:87096*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87096*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x8380003f; valaddr_reg:x3; val_offset:87099*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87099*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x8380007f; valaddr_reg:x3; val_offset:87102*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87102*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x838000ff; valaddr_reg:x3; val_offset:87105*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87105*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x838001ff; valaddr_reg:x3; val_offset:87108*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87108*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x838003ff; valaddr_reg:x3; val_offset:87111*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87111*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x838007ff; valaddr_reg:x3; val_offset:87114*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87114*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83800fff; valaddr_reg:x3; val_offset:87117*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87117*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83801fff; valaddr_reg:x3; val_offset:87120*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87120*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83803fff; valaddr_reg:x3; val_offset:87123*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87123*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83807fff; valaddr_reg:x3; val_offset:87126*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87126*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x8380ffff; valaddr_reg:x3; val_offset:87129*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87129*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x8381ffff; valaddr_reg:x3; val_offset:87132*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87132*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x8383ffff; valaddr_reg:x3; val_offset:87135*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87135*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x8387ffff; valaddr_reg:x3; val_offset:87138*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87138*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x838fffff; valaddr_reg:x3; val_offset:87141*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87141*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x839fffff; valaddr_reg:x3; val_offset:87144*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87144*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83bfffff; valaddr_reg:x3; val_offset:87147*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87147*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83c00000; valaddr_reg:x3; val_offset:87150*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87150*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83e00000; valaddr_reg:x3; val_offset:87153*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87153*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83f00000; valaddr_reg:x3; val_offset:87156*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87156*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83f80000; valaddr_reg:x3; val_offset:87159*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87159*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fc0000; valaddr_reg:x3; val_offset:87162*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87162*0 + 3*226*FLEN/8, x4, x1, x2) + +inst_29055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fe0000; valaddr_reg:x3; val_offset:87165*0 + 3*226*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87165*0 + 3*226*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007728,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007736,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007740,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007742,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3087007743,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2131814824,32,FLEN) +NAN_BOXED(2151188435,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152360960,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152360961,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152360963,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152360967,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152360975,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152360991,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152361023,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152361087,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152361215,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152361471,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152361983,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152363007,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152365055,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152369151,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152377343,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152393727,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152426495,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152492031,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152623103,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4152885247,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4153409535,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4154458111,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4156555263,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4156555264,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4158652416,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4159700992,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160225280,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160487424,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160618496,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160684032,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160716800,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160733184,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160741376,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160745472,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160747520,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160748544,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749056,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749312,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749440,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749504,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749536,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749552,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749560,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749564,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749566,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4160749567,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2131820726,32,FLEN) +NAN_BOXED(3219258202,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203904,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203905,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203907,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203911,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203919,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203935,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203967,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204031,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204159,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204415,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204927,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206205951,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206207999,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206212095,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206220287,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206236671,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206269439,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206334975,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206466047,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206728191,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2207252479,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2208301055,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2210398207,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2210398208,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2212495360,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2213543936,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214068224,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214330368,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214461440,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-228.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-228.S new file mode 100644 index 000000000..4e691e422 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-228.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_29056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ff0000; valaddr_reg:x3; val_offset:87168*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87168*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ff8000; valaddr_reg:x3; val_offset:87171*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87171*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ffc000; valaddr_reg:x3; val_offset:87174*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87174*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ffe000; valaddr_reg:x3; val_offset:87177*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87177*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fff000; valaddr_reg:x3; val_offset:87180*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87180*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fff800; valaddr_reg:x3; val_offset:87183*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87183*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fffc00; valaddr_reg:x3; val_offset:87186*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87186*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fffe00; valaddr_reg:x3; val_offset:87189*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87189*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ffff00; valaddr_reg:x3; val_offset:87192*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87192*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ffff80; valaddr_reg:x3; val_offset:87195*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87195*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ffffc0; valaddr_reg:x3; val_offset:87198*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87198*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ffffe0; valaddr_reg:x3; val_offset:87201*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87201*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fffff0; valaddr_reg:x3; val_offset:87204*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87204*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fffff8; valaddr_reg:x3; val_offset:87207*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87207*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fffffc; valaddr_reg:x3; val_offset:87210*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87210*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83fffffe; valaddr_reg:x3; val_offset:87213*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87213*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x114532 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f114532; op2val:0x80000000; +op3val:0x83ffffff; valaddr_reg:x3; val_offset:87216*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87216*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0000000; valaddr_reg:x3; val_offset:87219*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87219*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0000001; valaddr_reg:x3; val_offset:87222*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87222*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0000003; valaddr_reg:x3; val_offset:87225*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87225*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0000007; valaddr_reg:x3; val_offset:87228*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87228*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf000000f; valaddr_reg:x3; val_offset:87231*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87231*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf000001f; valaddr_reg:x3; val_offset:87234*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87234*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf000003f; valaddr_reg:x3; val_offset:87237*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87237*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf000007f; valaddr_reg:x3; val_offset:87240*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87240*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf00000ff; valaddr_reg:x3; val_offset:87243*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87243*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf00001ff; valaddr_reg:x3; val_offset:87246*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87246*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf00003ff; valaddr_reg:x3; val_offset:87249*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87249*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf00007ff; valaddr_reg:x3; val_offset:87252*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87252*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0000fff; valaddr_reg:x3; val_offset:87255*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87255*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0001fff; valaddr_reg:x3; val_offset:87258*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87258*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0003fff; valaddr_reg:x3; val_offset:87261*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87261*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0007fff; valaddr_reg:x3; val_offset:87264*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87264*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf000ffff; valaddr_reg:x3; val_offset:87267*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87267*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf001ffff; valaddr_reg:x3; val_offset:87270*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87270*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf003ffff; valaddr_reg:x3; val_offset:87273*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87273*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf007ffff; valaddr_reg:x3; val_offset:87276*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87276*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf00fffff; valaddr_reg:x3; val_offset:87279*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87279*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf01fffff; valaddr_reg:x3; val_offset:87282*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87282*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf03fffff; valaddr_reg:x3; val_offset:87285*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87285*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0400000; valaddr_reg:x3; val_offset:87288*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87288*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0600000; valaddr_reg:x3; val_offset:87291*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87291*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0700000; valaddr_reg:x3; val_offset:87294*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87294*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf0780000; valaddr_reg:x3; val_offset:87297*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87297*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07c0000; valaddr_reg:x3; val_offset:87300*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87300*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07e0000; valaddr_reg:x3; val_offset:87303*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87303*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07f0000; valaddr_reg:x3; val_offset:87306*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87306*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07f8000; valaddr_reg:x3; val_offset:87309*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87309*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07fc000; valaddr_reg:x3; val_offset:87312*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87312*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07fe000; valaddr_reg:x3; val_offset:87315*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87315*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07ff000; valaddr_reg:x3; val_offset:87318*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87318*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07ff800; valaddr_reg:x3; val_offset:87321*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87321*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07ffc00; valaddr_reg:x3; val_offset:87324*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87324*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07ffe00; valaddr_reg:x3; val_offset:87327*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87327*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07fff00; valaddr_reg:x3; val_offset:87330*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87330*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07fff80; valaddr_reg:x3; val_offset:87333*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87333*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07fffc0; valaddr_reg:x3; val_offset:87336*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87336*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07fffe0; valaddr_reg:x3; val_offset:87339*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87339*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07ffff0; valaddr_reg:x3; val_offset:87342*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87342*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07ffff8; valaddr_reg:x3; val_offset:87345*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87345*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07ffffc; valaddr_reg:x3; val_offset:87348*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87348*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07ffffe; valaddr_reg:x3; val_offset:87351*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87351*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xf07fffff; valaddr_reg:x3; val_offset:87354*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87354*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff000001; valaddr_reg:x3; val_offset:87357*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87357*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff000003; valaddr_reg:x3; val_offset:87360*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87360*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff000007; valaddr_reg:x3; val_offset:87363*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87363*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff199999; valaddr_reg:x3; val_offset:87366*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87366*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff249249; valaddr_reg:x3; val_offset:87369*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87369*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff333333; valaddr_reg:x3; val_offset:87372*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87372*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:87375*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87375*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:87378*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87378*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff444444; valaddr_reg:x3; val_offset:87381*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87381*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:87384*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87384*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:87387*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87387*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff666666; valaddr_reg:x3; val_offset:87390*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87390*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:87393*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87393*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:87396*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87396*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:87399*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87399*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x11efef and fs2 == 1 and fe2 == 0x7f and fm2 == 0x6088ec and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f11efef; op2val:0xbfe088ec; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:87402*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87402*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1000000; valaddr_reg:x3; val_offset:87405*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87405*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1000001; valaddr_reg:x3; val_offset:87408*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87408*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1000003; valaddr_reg:x3; val_offset:87411*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87411*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1000007; valaddr_reg:x3; val_offset:87414*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87414*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf100000f; valaddr_reg:x3; val_offset:87417*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87417*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf100001f; valaddr_reg:x3; val_offset:87420*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87420*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf100003f; valaddr_reg:x3; val_offset:87423*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87423*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf100007f; valaddr_reg:x3; val_offset:87426*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87426*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf10000ff; valaddr_reg:x3; val_offset:87429*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87429*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf10001ff; valaddr_reg:x3; val_offset:87432*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87432*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf10003ff; valaddr_reg:x3; val_offset:87435*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87435*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf10007ff; valaddr_reg:x3; val_offset:87438*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87438*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1000fff; valaddr_reg:x3; val_offset:87441*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87441*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1001fff; valaddr_reg:x3; val_offset:87444*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87444*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1003fff; valaddr_reg:x3; val_offset:87447*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87447*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1007fff; valaddr_reg:x3; val_offset:87450*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87450*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf100ffff; valaddr_reg:x3; val_offset:87453*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87453*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf101ffff; valaddr_reg:x3; val_offset:87456*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87456*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf103ffff; valaddr_reg:x3; val_offset:87459*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87459*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf107ffff; valaddr_reg:x3; val_offset:87462*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87462*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf10fffff; valaddr_reg:x3; val_offset:87465*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87465*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf11fffff; valaddr_reg:x3; val_offset:87468*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87468*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf13fffff; valaddr_reg:x3; val_offset:87471*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87471*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1400000; valaddr_reg:x3; val_offset:87474*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87474*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1600000; valaddr_reg:x3; val_offset:87477*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87477*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1700000; valaddr_reg:x3; val_offset:87480*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87480*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf1780000; valaddr_reg:x3; val_offset:87483*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87483*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17c0000; valaddr_reg:x3; val_offset:87486*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87486*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17e0000; valaddr_reg:x3; val_offset:87489*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87489*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17f0000; valaddr_reg:x3; val_offset:87492*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87492*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17f8000; valaddr_reg:x3; val_offset:87495*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87495*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17fc000; valaddr_reg:x3; val_offset:87498*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87498*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17fe000; valaddr_reg:x3; val_offset:87501*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87501*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17ff000; valaddr_reg:x3; val_offset:87504*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87504*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17ff800; valaddr_reg:x3; val_offset:87507*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87507*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17ffc00; valaddr_reg:x3; val_offset:87510*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87510*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17ffe00; valaddr_reg:x3; val_offset:87513*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87513*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17fff00; valaddr_reg:x3; val_offset:87516*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87516*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17fff80; valaddr_reg:x3; val_offset:87519*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87519*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17fffc0; valaddr_reg:x3; val_offset:87522*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87522*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17fffe0; valaddr_reg:x3; val_offset:87525*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87525*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17ffff0; valaddr_reg:x3; val_offset:87528*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87528*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17ffff8; valaddr_reg:x3; val_offset:87531*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87531*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17ffffc; valaddr_reg:x3; val_offset:87534*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87534*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17ffffe; valaddr_reg:x3; val_offset:87537*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87537*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xe2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xf17fffff; valaddr_reg:x3; val_offset:87540*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87540*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff000001; valaddr_reg:x3; val_offset:87543*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87543*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff000003; valaddr_reg:x3; val_offset:87546*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87546*0 + 3*227*FLEN/8, x4, x1, x2) + +inst_29183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff000007; valaddr_reg:x3; val_offset:87549*0 + 3*227*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87549*0 + 3*227*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214526976,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214559744,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214576128,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214584320,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214588416,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214590464,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214591488,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592000,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592256,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592384,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592448,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592480,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592496,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592504,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592508,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592510,32,FLEN) +NAN_BOXED(2131838258,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592511,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026531840,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026531841,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026531843,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026531847,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026531855,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026531871,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026531903,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026531967,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026532095,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026532351,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026532863,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026533887,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026535935,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026540031,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026548223,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026564607,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026597375,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026662911,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4026793983,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4027056127,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4027580415,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4028628991,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4030726143,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4030726144,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4032823296,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4033871872,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034396160,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034658304,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034789376,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034854912,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034887680,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034904064,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034912256,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034916352,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034918400,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034919424,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034919936,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920192,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920320,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920384,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920416,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920432,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920440,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920444,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920446,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4034920447,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2131881967,32,FLEN) +NAN_BOXED(3219163372,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309056,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309057,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309059,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309063,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309071,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309087,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309119,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309183,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309311,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043309567,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043310079,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043311103,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043313151,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043317247,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043325439,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043341823,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043374591,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043440127,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043571199,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4043833343,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4044357631,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4045406207,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4047503359,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4047503360,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4049600512,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4050649088,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051173376,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051435520,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051566592,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051632128,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051664896,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051681280,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051689472,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051693568,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051695616,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051696640,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697152,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697408,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697536,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697600,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697632,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697648,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697656,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697660,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697662,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4051697663,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-229.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-229.S new file mode 100644 index 000000000..e46a92efc --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-229.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_29184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff199999; valaddr_reg:x3; val_offset:87552*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87552*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff249249; valaddr_reg:x3; val_offset:87555*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87555*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff333333; valaddr_reg:x3; val_offset:87558*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87558*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:87561*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87561*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:87564*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87564*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff444444; valaddr_reg:x3; val_offset:87567*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87567*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:87570*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87570*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:87573*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87573*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff666666; valaddr_reg:x3; val_offset:87576*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87576*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:87579*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87579*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:87582*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87582*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:87585*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87585*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x124d93 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5ff934 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f124d93; op2val:0xbfdff934; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:87588*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87588*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbf800001; valaddr_reg:x3; val_offset:87591*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87591*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbf800003; valaddr_reg:x3; val_offset:87594*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87594*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbf800007; valaddr_reg:x3; val_offset:87597*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87597*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbf999999; valaddr_reg:x3; val_offset:87600*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87600*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:87603*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87603*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:87606*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87606*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:87609*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87609*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:87612*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87612*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:87615*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87615*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:87618*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87618*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:87621*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87621*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:87624*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87624*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:87627*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87627*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:87630*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87630*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:87633*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87633*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:87636*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87636*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf000000; valaddr_reg:x3; val_offset:87639*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87639*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf000001; valaddr_reg:x3; val_offset:87642*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87642*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf000003; valaddr_reg:x3; val_offset:87645*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87645*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf000007; valaddr_reg:x3; val_offset:87648*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87648*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf00000f; valaddr_reg:x3; val_offset:87651*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87651*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf00001f; valaddr_reg:x3; val_offset:87654*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87654*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf00003f; valaddr_reg:x3; val_offset:87657*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87657*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf00007f; valaddr_reg:x3; val_offset:87660*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87660*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf0000ff; valaddr_reg:x3; val_offset:87663*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87663*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf0001ff; valaddr_reg:x3; val_offset:87666*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87666*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf0003ff; valaddr_reg:x3; val_offset:87669*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87669*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf0007ff; valaddr_reg:x3; val_offset:87672*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87672*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf000fff; valaddr_reg:x3; val_offset:87675*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87675*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf001fff; valaddr_reg:x3; val_offset:87678*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87678*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf003fff; valaddr_reg:x3; val_offset:87681*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87681*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf007fff; valaddr_reg:x3; val_offset:87684*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87684*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf00ffff; valaddr_reg:x3; val_offset:87687*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87687*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf01ffff; valaddr_reg:x3; val_offset:87690*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87690*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf03ffff; valaddr_reg:x3; val_offset:87693*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87693*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf07ffff; valaddr_reg:x3; val_offset:87696*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87696*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf0fffff; valaddr_reg:x3; val_offset:87699*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87699*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf1fffff; valaddr_reg:x3; val_offset:87702*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87702*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf3fffff; valaddr_reg:x3; val_offset:87705*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87705*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf400000; valaddr_reg:x3; val_offset:87708*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87708*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf600000; valaddr_reg:x3; val_offset:87711*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87711*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf700000; valaddr_reg:x3; val_offset:87714*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87714*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf780000; valaddr_reg:x3; val_offset:87717*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87717*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7c0000; valaddr_reg:x3; val_offset:87720*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87720*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7e0000; valaddr_reg:x3; val_offset:87723*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87723*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7f0000; valaddr_reg:x3; val_offset:87726*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87726*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7f8000; valaddr_reg:x3; val_offset:87729*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87729*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7fc000; valaddr_reg:x3; val_offset:87732*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87732*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7fe000; valaddr_reg:x3; val_offset:87735*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87735*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7ff000; valaddr_reg:x3; val_offset:87738*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87738*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7ff800; valaddr_reg:x3; val_offset:87741*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87741*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7ffc00; valaddr_reg:x3; val_offset:87744*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87744*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7ffe00; valaddr_reg:x3; val_offset:87747*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87747*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7fff00; valaddr_reg:x3; val_offset:87750*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87750*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7fff80; valaddr_reg:x3; val_offset:87753*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87753*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7fffc0; valaddr_reg:x3; val_offset:87756*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87756*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7fffe0; valaddr_reg:x3; val_offset:87759*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87759*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7ffff0; valaddr_reg:x3; val_offset:87762*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87762*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7ffff8; valaddr_reg:x3; val_offset:87765*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87765*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7ffffc; valaddr_reg:x3; val_offset:87768*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87768*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7ffffe; valaddr_reg:x3; val_offset:87771*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87771*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x125603 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x37fb13 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f125603; op2val:0x8037fb13; +op3val:0xdf7fffff; valaddr_reg:x3; val_offset:87774*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87774*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3f800001; valaddr_reg:x3; val_offset:87777*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87777*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3f800003; valaddr_reg:x3; val_offset:87780*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87780*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3f800007; valaddr_reg:x3; val_offset:87783*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87783*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3f999999; valaddr_reg:x3; val_offset:87786*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87786*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:87789*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87789*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:87792*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87792*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:87795*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87795*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:87798*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87798*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:87801*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87801*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:87804*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87804*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:87807*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87807*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:87810*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87810*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:87813*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87813*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:87816*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87816*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:87819*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87819*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:87822*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87822*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45800000; valaddr_reg:x3; val_offset:87825*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87825*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45800001; valaddr_reg:x3; val_offset:87828*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87828*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45800003; valaddr_reg:x3; val_offset:87831*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87831*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45800007; valaddr_reg:x3; val_offset:87834*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87834*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x4580000f; valaddr_reg:x3; val_offset:87837*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87837*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x4580001f; valaddr_reg:x3; val_offset:87840*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87840*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x4580003f; valaddr_reg:x3; val_offset:87843*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87843*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x4580007f; valaddr_reg:x3; val_offset:87846*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87846*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x458000ff; valaddr_reg:x3; val_offset:87849*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87849*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x458001ff; valaddr_reg:x3; val_offset:87852*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87852*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x458003ff; valaddr_reg:x3; val_offset:87855*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87855*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x458007ff; valaddr_reg:x3; val_offset:87858*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87858*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45800fff; valaddr_reg:x3; val_offset:87861*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87861*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45801fff; valaddr_reg:x3; val_offset:87864*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87864*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45803fff; valaddr_reg:x3; val_offset:87867*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87867*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45807fff; valaddr_reg:x3; val_offset:87870*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87870*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x4580ffff; valaddr_reg:x3; val_offset:87873*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87873*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x4581ffff; valaddr_reg:x3; val_offset:87876*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87876*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x4583ffff; valaddr_reg:x3; val_offset:87879*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87879*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x4587ffff; valaddr_reg:x3; val_offset:87882*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87882*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x458fffff; valaddr_reg:x3; val_offset:87885*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87885*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x459fffff; valaddr_reg:x3; val_offset:87888*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87888*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45bfffff; valaddr_reg:x3; val_offset:87891*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87891*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45c00000; valaddr_reg:x3; val_offset:87894*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87894*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45e00000; valaddr_reg:x3; val_offset:87897*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87897*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45f00000; valaddr_reg:x3; val_offset:87900*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87900*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45f80000; valaddr_reg:x3; val_offset:87903*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87903*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fc0000; valaddr_reg:x3; val_offset:87906*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87906*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fe0000; valaddr_reg:x3; val_offset:87909*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87909*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ff0000; valaddr_reg:x3; val_offset:87912*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87912*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ff8000; valaddr_reg:x3; val_offset:87915*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87915*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ffc000; valaddr_reg:x3; val_offset:87918*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87918*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ffe000; valaddr_reg:x3; val_offset:87921*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87921*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fff000; valaddr_reg:x3; val_offset:87924*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87924*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fff800; valaddr_reg:x3; val_offset:87927*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87927*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fffc00; valaddr_reg:x3; val_offset:87930*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87930*0 + 3*228*FLEN/8, x4, x1, x2) + +inst_29311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fffe00; valaddr_reg:x3; val_offset:87933*0 + 3*228*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87933*0 + 3*228*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2131905939,32,FLEN) +NAN_BOXED(3219126580,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319168,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319169,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319171,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319175,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319183,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319199,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319231,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319295,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319423,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741319679,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741320191,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741321215,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741323263,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741327359,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741335551,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741351935,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741384703,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741450239,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741581311,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3741843455,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3742367743,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3743416319,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3745513471,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3745513472,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3747610624,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3748659200,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749183488,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749445632,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749576704,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749642240,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749675008,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749691392,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749699584,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749703680,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749705728,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749706752,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707264,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707520,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707648,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707712,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707744,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707760,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707768,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707772,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707774,32,FLEN) +NAN_BOXED(2131908099,32,FLEN) +NAN_BOXED(2151152403,32,FLEN) +NAN_BOXED(3749707775,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016512,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016513,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016515,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016519,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016527,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016543,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016575,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016639,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166016767,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166017023,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166017535,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166018559,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166020607,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166024703,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166032895,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166049279,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166082047,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166147583,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166278655,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1166540799,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1167065087,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1168113663,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1170210815,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1170210816,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1172307968,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1173356544,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1173880832,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174142976,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174274048,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174339584,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174372352,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174388736,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174396928,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174401024,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174403072,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174404096,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174404608,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-23.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-23.S new file mode 100644 index 000000000..d90b9142b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-23.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_2816: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fe0000; valaddr_reg:x3; val_offset:8448*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8448*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2817: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ff0000; valaddr_reg:x3; val_offset:8451*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8451*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2818: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ff8000; valaddr_reg:x3; val_offset:8454*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8454*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2819: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ffc000; valaddr_reg:x3; val_offset:8457*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8457*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2820: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ffe000; valaddr_reg:x3; val_offset:8460*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8460*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2821: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fff000; valaddr_reg:x3; val_offset:8463*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8463*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2822: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fff800; valaddr_reg:x3; val_offset:8466*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8466*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2823: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fffc00; valaddr_reg:x3; val_offset:8469*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8469*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2824: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fffe00; valaddr_reg:x3; val_offset:8472*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8472*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2825: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ffff00; valaddr_reg:x3; val_offset:8475*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8475*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2826: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ffff80; valaddr_reg:x3; val_offset:8478*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8478*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2827: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ffffc0; valaddr_reg:x3; val_offset:8481*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8481*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2828: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ffffe0; valaddr_reg:x3; val_offset:8484*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8484*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2829: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fffff0; valaddr_reg:x3; val_offset:8487*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8487*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2830: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fffff8; valaddr_reg:x3; val_offset:8490*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8490*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2831: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fffffc; valaddr_reg:x3; val_offset:8493*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8493*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2832: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4fffffe; valaddr_reg:x3; val_offset:8496*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8496*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2833: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x59b0d6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d59b0d6; op2val:0x0; +op3val:0x4ffffff; valaddr_reg:x3; val_offset:8499*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8499*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2834: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e000000; valaddr_reg:x3; val_offset:8502*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8502*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2835: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e000001; valaddr_reg:x3; val_offset:8505*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8505*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2836: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e000003; valaddr_reg:x3; val_offset:8508*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8508*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2837: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e000007; valaddr_reg:x3; val_offset:8511*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8511*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2838: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e00000f; valaddr_reg:x3; val_offset:8514*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8514*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2839: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e00001f; valaddr_reg:x3; val_offset:8517*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8517*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2840: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e00003f; valaddr_reg:x3; val_offset:8520*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8520*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2841: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e00007f; valaddr_reg:x3; val_offset:8523*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8523*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2842: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e0000ff; valaddr_reg:x3; val_offset:8526*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8526*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2843: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e0001ff; valaddr_reg:x3; val_offset:8529*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8529*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2844: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e0003ff; valaddr_reg:x3; val_offset:8532*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8532*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2845: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e0007ff; valaddr_reg:x3; val_offset:8535*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8535*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2846: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e000fff; valaddr_reg:x3; val_offset:8538*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8538*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2847: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e001fff; valaddr_reg:x3; val_offset:8541*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8541*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2848: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e003fff; valaddr_reg:x3; val_offset:8544*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8544*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2849: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e007fff; valaddr_reg:x3; val_offset:8547*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8547*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2850: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e00ffff; valaddr_reg:x3; val_offset:8550*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8550*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2851: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e01ffff; valaddr_reg:x3; val_offset:8553*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8553*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2852: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e03ffff; valaddr_reg:x3; val_offset:8556*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8556*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2853: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e07ffff; valaddr_reg:x3; val_offset:8559*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8559*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2854: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e0fffff; valaddr_reg:x3; val_offset:8562*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8562*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2855: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e1fffff; valaddr_reg:x3; val_offset:8565*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8565*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2856: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e3fffff; valaddr_reg:x3; val_offset:8568*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8568*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2857: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e400000; valaddr_reg:x3; val_offset:8571*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8571*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2858: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e600000; valaddr_reg:x3; val_offset:8574*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8574*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2859: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e700000; valaddr_reg:x3; val_offset:8577*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8577*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2860: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e780000; valaddr_reg:x3; val_offset:8580*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8580*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2861: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7c0000; valaddr_reg:x3; val_offset:8583*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8583*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2862: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7e0000; valaddr_reg:x3; val_offset:8586*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8586*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2863: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7f0000; valaddr_reg:x3; val_offset:8589*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8589*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2864: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7f8000; valaddr_reg:x3; val_offset:8592*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8592*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2865: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7fc000; valaddr_reg:x3; val_offset:8595*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8595*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2866: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7fe000; valaddr_reg:x3; val_offset:8598*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8598*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2867: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7ff000; valaddr_reg:x3; val_offset:8601*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8601*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2868: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7ff800; valaddr_reg:x3; val_offset:8604*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8604*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2869: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7ffc00; valaddr_reg:x3; val_offset:8607*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8607*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2870: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7ffe00; valaddr_reg:x3; val_offset:8610*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8610*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2871: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7fff00; valaddr_reg:x3; val_offset:8613*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8613*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2872: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7fff80; valaddr_reg:x3; val_offset:8616*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8616*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2873: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7fffc0; valaddr_reg:x3; val_offset:8619*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8619*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2874: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7fffe0; valaddr_reg:x3; val_offset:8622*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8622*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2875: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7ffff0; valaddr_reg:x3; val_offset:8625*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8625*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2876: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7ffff8; valaddr_reg:x3; val_offset:8628*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8628*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2877: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7ffffc; valaddr_reg:x3; val_offset:8631*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8631*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2878: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7ffffe; valaddr_reg:x3; val_offset:8634*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8634*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2879: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3e7fffff; valaddr_reg:x3; val_offset:8637*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8637*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2880: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3f800001; valaddr_reg:x3; val_offset:8640*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8640*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2881: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3f800003; valaddr_reg:x3; val_offset:8643*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8643*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2882: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3f800007; valaddr_reg:x3; val_offset:8646*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8646*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2883: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3f999999; valaddr_reg:x3; val_offset:8649*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8649*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2884: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:8652*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8652*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2885: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:8655*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8655*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2886: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:8658*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8658*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2887: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:8661*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8661*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2888: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:8664*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8664*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2889: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:8667*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8667*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2890: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:8670*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8670*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2891: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:8673*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8673*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2892: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:8676*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8676*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2893: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:8679*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8679*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2894: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:8682*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8682*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2895: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x5d18d6 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x1434d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d5d18d6; op2val:0x19434d8; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:8685*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8685*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2896: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:8688*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8688*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2897: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:8691*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8691*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2898: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:8694*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8694*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2899: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:8697*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8697*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2900: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:8700*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8700*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2901: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:8703*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8703*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2902: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:8706*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8706*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2903: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:8709*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8709*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2904: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:8712*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8712*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2905: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:8715*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8715*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2906: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:8718*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8718*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2907: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:8721*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8721*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2908: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:8724*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8724*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2909: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:8727*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8727*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2910: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:8730*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8730*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2911: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:8733*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8733*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2912: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9800000; valaddr_reg:x3; val_offset:8736*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8736*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2913: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9800001; valaddr_reg:x3; val_offset:8739*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8739*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2914: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9800003; valaddr_reg:x3; val_offset:8742*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8742*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2915: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9800007; valaddr_reg:x3; val_offset:8745*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8745*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2916: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x980000f; valaddr_reg:x3; val_offset:8748*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8748*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2917: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x980001f; valaddr_reg:x3; val_offset:8751*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8751*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2918: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x980003f; valaddr_reg:x3; val_offset:8754*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8754*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2919: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x980007f; valaddr_reg:x3; val_offset:8757*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8757*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2920: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x98000ff; valaddr_reg:x3; val_offset:8760*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8760*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2921: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x98001ff; valaddr_reg:x3; val_offset:8763*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8763*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2922: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x98003ff; valaddr_reg:x3; val_offset:8766*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8766*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2923: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x98007ff; valaddr_reg:x3; val_offset:8769*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8769*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2924: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9800fff; valaddr_reg:x3; val_offset:8772*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8772*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2925: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9801fff; valaddr_reg:x3; val_offset:8775*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8775*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2926: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9803fff; valaddr_reg:x3; val_offset:8778*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8778*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2927: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9807fff; valaddr_reg:x3; val_offset:8781*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8781*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2928: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x980ffff; valaddr_reg:x3; val_offset:8784*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8784*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2929: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x981ffff; valaddr_reg:x3; val_offset:8787*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8787*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2930: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x983ffff; valaddr_reg:x3; val_offset:8790*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8790*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2931: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x987ffff; valaddr_reg:x3; val_offset:8793*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8793*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2932: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x98fffff; valaddr_reg:x3; val_offset:8796*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8796*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2933: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x99fffff; valaddr_reg:x3; val_offset:8799*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8799*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2934: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9bfffff; valaddr_reg:x3; val_offset:8802*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8802*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2935: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9c00000; valaddr_reg:x3; val_offset:8805*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8805*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2936: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9e00000; valaddr_reg:x3; val_offset:8808*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8808*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2937: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9f00000; valaddr_reg:x3; val_offset:8811*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8811*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2938: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9f80000; valaddr_reg:x3; val_offset:8814*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8814*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2939: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fc0000; valaddr_reg:x3; val_offset:8817*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8817*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2940: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fe0000; valaddr_reg:x3; val_offset:8820*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8820*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2941: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ff0000; valaddr_reg:x3; val_offset:8823*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8823*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2942: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ff8000; valaddr_reg:x3; val_offset:8826*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8826*0 + 3*22*FLEN/8, x4, x1, x2) + +inst_2943: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ffc000; valaddr_reg:x3; val_offset:8829*0 + 3*22*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8829*0 + 3*22*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83755008,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83820544,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83853312,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83869696,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83877888,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83881984,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83884032,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885056,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885568,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885824,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885952,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886016,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886048,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886064,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886072,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886076,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886078,32,FLEN) +NAN_BOXED(2103029974,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886079,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187392,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187393,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187395,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187399,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187407,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187423,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187455,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187519,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187647,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040187903,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040188415,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040189439,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040191487,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040195583,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040203775,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040220159,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040252927,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040318463,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040449535,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1040711679,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1041235967,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1042284543,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1044381695,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1044381696,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1046478848,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1047527424,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048051712,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048313856,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048444928,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048510464,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048543232,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048559616,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048567808,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048571904,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048573952,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048574976,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575488,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575744,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575872,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575936,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575968,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575984,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575992,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575996,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575998,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1048575999,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2103253206,32,FLEN) +NAN_BOXED(26490072,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383552,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383553,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383555,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383559,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383567,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383583,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383615,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383679,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383807,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159384063,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159384575,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159385599,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159387647,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159391743,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159399935,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159416319,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159449087,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159514623,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159645695,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159907839,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(160432127,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(161480703,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(163577855,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(163577856,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(165675008,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(166723584,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167247872,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167510016,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167641088,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167706624,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167739392,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167755776,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-230.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-230.S new file mode 100644 index 000000000..0fb03fe38 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-230.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_29312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ffff00; valaddr_reg:x3; val_offset:87936*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87936*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ffff80; valaddr_reg:x3; val_offset:87939*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87939*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ffffc0; valaddr_reg:x3; val_offset:87942*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87942*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ffffe0; valaddr_reg:x3; val_offset:87945*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87945*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fffff0; valaddr_reg:x3; val_offset:87948*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87948*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fffff8; valaddr_reg:x3; val_offset:87951*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87951*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fffffc; valaddr_reg:x3; val_offset:87954*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87954*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45fffffe; valaddr_reg:x3; val_offset:87957*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87957*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1354b4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x379a4c and fs3 == 0 and fe3 == 0x8b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1354b4; op2val:0x379a4c; +op3val:0x45ffffff; valaddr_reg:x3; val_offset:87960*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87960*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5000000; valaddr_reg:x3; val_offset:87963*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87963*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5000001; valaddr_reg:x3; val_offset:87966*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87966*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5000003; valaddr_reg:x3; val_offset:87969*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87969*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5000007; valaddr_reg:x3; val_offset:87972*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87972*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe500000f; valaddr_reg:x3; val_offset:87975*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87975*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe500001f; valaddr_reg:x3; val_offset:87978*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87978*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe500003f; valaddr_reg:x3; val_offset:87981*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87981*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe500007f; valaddr_reg:x3; val_offset:87984*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87984*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe50000ff; valaddr_reg:x3; val_offset:87987*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87987*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe50001ff; valaddr_reg:x3; val_offset:87990*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87990*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe50003ff; valaddr_reg:x3; val_offset:87993*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87993*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe50007ff; valaddr_reg:x3; val_offset:87996*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87996*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5000fff; valaddr_reg:x3; val_offset:87999*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 87999*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5001fff; valaddr_reg:x3; val_offset:88002*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88002*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5003fff; valaddr_reg:x3; val_offset:88005*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88005*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5007fff; valaddr_reg:x3; val_offset:88008*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88008*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe500ffff; valaddr_reg:x3; val_offset:88011*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88011*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe501ffff; valaddr_reg:x3; val_offset:88014*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88014*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe503ffff; valaddr_reg:x3; val_offset:88017*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88017*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe507ffff; valaddr_reg:x3; val_offset:88020*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88020*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe50fffff; valaddr_reg:x3; val_offset:88023*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88023*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe51fffff; valaddr_reg:x3; val_offset:88026*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88026*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe53fffff; valaddr_reg:x3; val_offset:88029*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88029*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5400000; valaddr_reg:x3; val_offset:88032*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88032*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5600000; valaddr_reg:x3; val_offset:88035*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88035*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5700000; valaddr_reg:x3; val_offset:88038*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88038*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe5780000; valaddr_reg:x3; val_offset:88041*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88041*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57c0000; valaddr_reg:x3; val_offset:88044*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88044*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57e0000; valaddr_reg:x3; val_offset:88047*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88047*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57f0000; valaddr_reg:x3; val_offset:88050*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88050*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57f8000; valaddr_reg:x3; val_offset:88053*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88053*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57fc000; valaddr_reg:x3; val_offset:88056*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88056*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57fe000; valaddr_reg:x3; val_offset:88059*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88059*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57ff000; valaddr_reg:x3; val_offset:88062*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88062*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57ff800; valaddr_reg:x3; val_offset:88065*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88065*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57ffc00; valaddr_reg:x3; val_offset:88068*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88068*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57ffe00; valaddr_reg:x3; val_offset:88071*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88071*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57fff00; valaddr_reg:x3; val_offset:88074*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88074*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57fff80; valaddr_reg:x3; val_offset:88077*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88077*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57fffc0; valaddr_reg:x3; val_offset:88080*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88080*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57fffe0; valaddr_reg:x3; val_offset:88083*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88083*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57ffff0; valaddr_reg:x3; val_offset:88086*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88086*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57ffff8; valaddr_reg:x3; val_offset:88089*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88089*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57ffffc; valaddr_reg:x3; val_offset:88092*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88092*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57ffffe; valaddr_reg:x3; val_offset:88095*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88095*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xca and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xe57fffff; valaddr_reg:x3; val_offset:88098*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88098*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff000001; valaddr_reg:x3; val_offset:88101*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88101*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff000003; valaddr_reg:x3; val_offset:88104*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88104*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff000007; valaddr_reg:x3; val_offset:88107*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88107*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff199999; valaddr_reg:x3; val_offset:88110*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88110*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff249249; valaddr_reg:x3; val_offset:88113*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88113*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff333333; valaddr_reg:x3; val_offset:88116*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88116*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:88119*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88119*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:88122*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88122*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff444444; valaddr_reg:x3; val_offset:88125*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88125*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:88128*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88128*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:88131*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88131*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff666666; valaddr_reg:x3; val_offset:88134*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88134*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:88137*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88137*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:88140*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88140*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:88143*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88143*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x136313 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e5383 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f136313; op2val:0xbfde5383; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:88146*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88146*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec800000; valaddr_reg:x3; val_offset:88149*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88149*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec800001; valaddr_reg:x3; val_offset:88152*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88152*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec800003; valaddr_reg:x3; val_offset:88155*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88155*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec800007; valaddr_reg:x3; val_offset:88158*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88158*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec80000f; valaddr_reg:x3; val_offset:88161*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88161*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec80001f; valaddr_reg:x3; val_offset:88164*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88164*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec80003f; valaddr_reg:x3; val_offset:88167*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88167*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec80007f; valaddr_reg:x3; val_offset:88170*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88170*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec8000ff; valaddr_reg:x3; val_offset:88173*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88173*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec8001ff; valaddr_reg:x3; val_offset:88176*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88176*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec8003ff; valaddr_reg:x3; val_offset:88179*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88179*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec8007ff; valaddr_reg:x3; val_offset:88182*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88182*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec800fff; valaddr_reg:x3; val_offset:88185*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88185*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec801fff; valaddr_reg:x3; val_offset:88188*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88188*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec803fff; valaddr_reg:x3; val_offset:88191*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88191*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec807fff; valaddr_reg:x3; val_offset:88194*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88194*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec80ffff; valaddr_reg:x3; val_offset:88197*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88197*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec81ffff; valaddr_reg:x3; val_offset:88200*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88200*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec83ffff; valaddr_reg:x3; val_offset:88203*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88203*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec87ffff; valaddr_reg:x3; val_offset:88206*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88206*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec8fffff; valaddr_reg:x3; val_offset:88209*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88209*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xec9fffff; valaddr_reg:x3; val_offset:88212*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88212*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecbfffff; valaddr_reg:x3; val_offset:88215*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88215*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecc00000; valaddr_reg:x3; val_offset:88218*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88218*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xece00000; valaddr_reg:x3; val_offset:88221*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88221*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecf00000; valaddr_reg:x3; val_offset:88224*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88224*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecf80000; valaddr_reg:x3; val_offset:88227*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88227*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfc0000; valaddr_reg:x3; val_offset:88230*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88230*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfe0000; valaddr_reg:x3; val_offset:88233*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88233*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecff0000; valaddr_reg:x3; val_offset:88236*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88236*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecff8000; valaddr_reg:x3; val_offset:88239*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88239*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecffc000; valaddr_reg:x3; val_offset:88242*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88242*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecffe000; valaddr_reg:x3; val_offset:88245*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88245*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfff000; valaddr_reg:x3; val_offset:88248*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88248*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfff800; valaddr_reg:x3; val_offset:88251*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88251*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfffc00; valaddr_reg:x3; val_offset:88254*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88254*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfffe00; valaddr_reg:x3; val_offset:88257*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88257*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecffff00; valaddr_reg:x3; val_offset:88260*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88260*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecffff80; valaddr_reg:x3; val_offset:88263*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88263*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecffffc0; valaddr_reg:x3; val_offset:88266*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88266*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecffffe0; valaddr_reg:x3; val_offset:88269*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88269*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfffff0; valaddr_reg:x3; val_offset:88272*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88272*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfffff8; valaddr_reg:x3; val_offset:88275*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88275*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfffffc; valaddr_reg:x3; val_offset:88278*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88278*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecfffffe; valaddr_reg:x3; val_offset:88281*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88281*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xd9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xecffffff; valaddr_reg:x3; val_offset:88284*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88284*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff000001; valaddr_reg:x3; val_offset:88287*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88287*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff000003; valaddr_reg:x3; val_offset:88290*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88290*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff000007; valaddr_reg:x3; val_offset:88293*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88293*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff199999; valaddr_reg:x3; val_offset:88296*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88296*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff249249; valaddr_reg:x3; val_offset:88299*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88299*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff333333; valaddr_reg:x3; val_offset:88302*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88302*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:88305*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88305*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:88308*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88308*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff444444; valaddr_reg:x3; val_offset:88311*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88311*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:88314*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88314*0 + 3*229*FLEN/8, x4, x1, x2) + +inst_29439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:88317*0 + 3*229*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88317*0 + 3*229*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174404864,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174404992,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174405056,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174405088,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174405104,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174405112,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174405116,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174405118,32,FLEN) +NAN_BOXED(2131973300,32,FLEN) +NAN_BOXED(3643980,32,FLEN) +NAN_BOXED(1174405119,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982464,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982465,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982467,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982471,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982479,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982495,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982527,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982591,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982719,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841982975,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841983487,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841984511,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841986559,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841990655,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3841998847,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3842015231,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3842047999,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3842113535,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3842244607,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3842506751,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3843031039,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3844079615,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3846176767,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3846176768,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3848273920,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3849322496,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3849846784,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850108928,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850240000,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850305536,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850338304,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850354688,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850362880,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850366976,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850369024,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850370048,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850370560,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850370816,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850370944,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850371008,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850371040,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850371056,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850371064,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850371068,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850371070,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(3850371071,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2131976979,32,FLEN) +NAN_BOXED(3219018627,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811584,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811585,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811587,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811591,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811599,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811615,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811647,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811711,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967811839,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967812095,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967812607,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967813631,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967815679,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967819775,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967827967,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967844351,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967877119,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3967942655,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3968073727,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3968335871,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3968860159,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3969908735,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3972005887,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3972005888,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3974103040,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3975151616,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3975675904,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3975938048,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976069120,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976134656,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976167424,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976183808,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976192000,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976196096,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976198144,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976199168,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976199680,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976199936,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976200064,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976200128,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976200160,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976200176,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976200184,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976200188,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976200190,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(3976200191,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-231.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-231.S new file mode 100644 index 000000000..39b8b7bd9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-231.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_29440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff666666; valaddr_reg:x3; val_offset:88320*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88320*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:88323*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88323*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:88326*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88326*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:88329*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88329*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1393e8 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x5e09f1 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1393e8; op2val:0xbfde09f1; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:88332*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88332*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa000000; valaddr_reg:x3; val_offset:88335*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88335*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa000001; valaddr_reg:x3; val_offset:88338*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88338*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa000003; valaddr_reg:x3; val_offset:88341*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88341*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa000007; valaddr_reg:x3; val_offset:88344*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88344*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa00000f; valaddr_reg:x3; val_offset:88347*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88347*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa00001f; valaddr_reg:x3; val_offset:88350*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88350*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa00003f; valaddr_reg:x3; val_offset:88353*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88353*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa00007f; valaddr_reg:x3; val_offset:88356*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88356*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa0000ff; valaddr_reg:x3; val_offset:88359*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88359*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa0001ff; valaddr_reg:x3; val_offset:88362*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88362*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa0003ff; valaddr_reg:x3; val_offset:88365*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88365*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa0007ff; valaddr_reg:x3; val_offset:88368*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88368*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa000fff; valaddr_reg:x3; val_offset:88371*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88371*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa001fff; valaddr_reg:x3; val_offset:88374*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88374*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa003fff; valaddr_reg:x3; val_offset:88377*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88377*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa007fff; valaddr_reg:x3; val_offset:88380*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88380*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa00ffff; valaddr_reg:x3; val_offset:88383*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88383*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa01ffff; valaddr_reg:x3; val_offset:88386*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88386*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa03ffff; valaddr_reg:x3; val_offset:88389*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88389*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa07ffff; valaddr_reg:x3; val_offset:88392*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88392*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa0fffff; valaddr_reg:x3; val_offset:88395*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88395*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa1fffff; valaddr_reg:x3; val_offset:88398*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88398*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa3fffff; valaddr_reg:x3; val_offset:88401*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88401*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa400000; valaddr_reg:x3; val_offset:88404*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88404*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa600000; valaddr_reg:x3; val_offset:88407*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88407*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa700000; valaddr_reg:x3; val_offset:88410*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88410*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa780000; valaddr_reg:x3; val_offset:88413*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88413*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7c0000; valaddr_reg:x3; val_offset:88416*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88416*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7e0000; valaddr_reg:x3; val_offset:88419*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88419*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7f0000; valaddr_reg:x3; val_offset:88422*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88422*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7f8000; valaddr_reg:x3; val_offset:88425*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88425*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7fc000; valaddr_reg:x3; val_offset:88428*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88428*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7fe000; valaddr_reg:x3; val_offset:88431*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88431*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7ff000; valaddr_reg:x3; val_offset:88434*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88434*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7ff800; valaddr_reg:x3; val_offset:88437*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88437*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7ffc00; valaddr_reg:x3; val_offset:88440*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88440*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7ffe00; valaddr_reg:x3; val_offset:88443*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88443*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7fff00; valaddr_reg:x3; val_offset:88446*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88446*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7fff80; valaddr_reg:x3; val_offset:88449*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88449*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7fffc0; valaddr_reg:x3; val_offset:88452*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88452*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7fffe0; valaddr_reg:x3; val_offset:88455*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88455*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7ffff0; valaddr_reg:x3; val_offset:88458*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88458*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7ffff8; valaddr_reg:x3; val_offset:88461*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88461*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7ffffc; valaddr_reg:x3; val_offset:88464*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88464*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7ffffe; valaddr_reg:x3; val_offset:88467*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88467*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x54 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xaa7fffff; valaddr_reg:x3; val_offset:88470*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88470*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbf800001; valaddr_reg:x3; val_offset:88473*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88473*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbf800003; valaddr_reg:x3; val_offset:88476*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88476*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbf800007; valaddr_reg:x3; val_offset:88479*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88479*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbf999999; valaddr_reg:x3; val_offset:88482*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88482*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:88485*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88485*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:88488*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88488*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:88491*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88491*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:88494*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88494*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:88497*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88497*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:88500*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88500*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:88503*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88503*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:88506*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88506*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:88509*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88509*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:88512*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88512*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:88515*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88515*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x144278 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x374121 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f144278; op2val:0x80374121; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:88518*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88518*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:88521*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88521*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:88524*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88524*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:88527*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88527*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:88530*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88530*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:88533*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88533*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:88536*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88536*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:88539*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88539*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:88542*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88542*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:88545*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88545*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:88548*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88548*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:88551*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88551*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:88554*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88554*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:88557*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88557*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:88560*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88560*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:88563*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88563*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:88566*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88566*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d800000; valaddr_reg:x3; val_offset:88569*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88569*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d800001; valaddr_reg:x3; val_offset:88572*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88572*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d800003; valaddr_reg:x3; val_offset:88575*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88575*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d800007; valaddr_reg:x3; val_offset:88578*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88578*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d80000f; valaddr_reg:x3; val_offset:88581*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88581*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d80001f; valaddr_reg:x3; val_offset:88584*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88584*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d80003f; valaddr_reg:x3; val_offset:88587*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88587*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d80007f; valaddr_reg:x3; val_offset:88590*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88590*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d8000ff; valaddr_reg:x3; val_offset:88593*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88593*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d8001ff; valaddr_reg:x3; val_offset:88596*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88596*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d8003ff; valaddr_reg:x3; val_offset:88599*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88599*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d8007ff; valaddr_reg:x3; val_offset:88602*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88602*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d800fff; valaddr_reg:x3; val_offset:88605*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88605*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d801fff; valaddr_reg:x3; val_offset:88608*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88608*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d803fff; valaddr_reg:x3; val_offset:88611*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88611*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d807fff; valaddr_reg:x3; val_offset:88614*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88614*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d80ffff; valaddr_reg:x3; val_offset:88617*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88617*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d81ffff; valaddr_reg:x3; val_offset:88620*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88620*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d83ffff; valaddr_reg:x3; val_offset:88623*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88623*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d87ffff; valaddr_reg:x3; val_offset:88626*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88626*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d8fffff; valaddr_reg:x3; val_offset:88629*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88629*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8d9fffff; valaddr_reg:x3; val_offset:88632*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88632*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dbfffff; valaddr_reg:x3; val_offset:88635*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88635*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dc00000; valaddr_reg:x3; val_offset:88638*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88638*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8de00000; valaddr_reg:x3; val_offset:88641*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88641*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8df00000; valaddr_reg:x3; val_offset:88644*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88644*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8df80000; valaddr_reg:x3; val_offset:88647*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88647*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfc0000; valaddr_reg:x3; val_offset:88650*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88650*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfe0000; valaddr_reg:x3; val_offset:88653*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88653*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dff0000; valaddr_reg:x3; val_offset:88656*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88656*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dff8000; valaddr_reg:x3; val_offset:88659*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88659*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dffc000; valaddr_reg:x3; val_offset:88662*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88662*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dffe000; valaddr_reg:x3; val_offset:88665*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88665*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfff000; valaddr_reg:x3; val_offset:88668*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88668*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfff800; valaddr_reg:x3; val_offset:88671*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88671*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfffc00; valaddr_reg:x3; val_offset:88674*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88674*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfffe00; valaddr_reg:x3; val_offset:88677*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88677*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dffff00; valaddr_reg:x3; val_offset:88680*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88680*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dffff80; valaddr_reg:x3; val_offset:88683*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88683*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dffffc0; valaddr_reg:x3; val_offset:88686*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88686*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dffffe0; valaddr_reg:x3; val_offset:88689*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88689*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfffff0; valaddr_reg:x3; val_offset:88692*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88692*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfffff8; valaddr_reg:x3; val_offset:88695*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88695*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfffffc; valaddr_reg:x3; val_offset:88698*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88698*0 + 3*230*FLEN/8, x4, x1, x2) + +inst_29567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dfffffe; valaddr_reg:x3; val_offset:88701*0 + 3*230*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88701*0 + 3*230*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2131989480,32,FLEN) +NAN_BOXED(3218999793,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126720,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126721,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126723,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126727,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126735,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126751,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126783,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126847,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852126975,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852127231,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852127743,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852128767,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852130815,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852134911,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852143103,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852159487,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852192255,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852257791,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852388863,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2852651007,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2853175295,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2854223871,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2856321023,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2856321024,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2858418176,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2859466752,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2859991040,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860253184,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860384256,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860449792,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860482560,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860498944,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860507136,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860511232,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860513280,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860514304,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860514816,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515072,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515200,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515264,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515296,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515312,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515320,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515324,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515326,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(2860515327,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132034168,32,FLEN) +NAN_BOXED(2151104801,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976064,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976065,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976067,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976071,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976079,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976095,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976127,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976191,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976319,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976575,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373977087,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373978111,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373980159,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373984255,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373992447,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374008831,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374041599,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374107135,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374238207,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2374500351,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2375024639,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2376073215,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2378170367,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2378170368,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2380267520,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2381316096,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2381840384,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382102528,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382233600,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382299136,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382331904,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382348288,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382356480,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382360576,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382362624,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382363648,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364160,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364416,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364544,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364608,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364640,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364656,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364664,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364668,32,FLEN) +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364670,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-232.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-232.S new file mode 100644 index 000000000..43c7bc214 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-232.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_29568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1450f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1450f1; op2val:0x80000000; +op3val:0x8dffffff; valaddr_reg:x3; val_offset:88704*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88704*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:88707*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88707*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:88710*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88710*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:88713*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88713*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:88716*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88716*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:88719*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88719*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:88722*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88722*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:88725*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88725*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:88728*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88728*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:88731*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88731*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:88734*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88734*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:88737*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88737*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:88740*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88740*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:88743*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88743*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:88746*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88746*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:88749*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88749*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:88752*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88752*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90800000; valaddr_reg:x3; val_offset:88755*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88755*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90800001; valaddr_reg:x3; val_offset:88758*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88758*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90800003; valaddr_reg:x3; val_offset:88761*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88761*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90800007; valaddr_reg:x3; val_offset:88764*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88764*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x9080000f; valaddr_reg:x3; val_offset:88767*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88767*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x9080001f; valaddr_reg:x3; val_offset:88770*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88770*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x9080003f; valaddr_reg:x3; val_offset:88773*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88773*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x9080007f; valaddr_reg:x3; val_offset:88776*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88776*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x908000ff; valaddr_reg:x3; val_offset:88779*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88779*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x908001ff; valaddr_reg:x3; val_offset:88782*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88782*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x908003ff; valaddr_reg:x3; val_offset:88785*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88785*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x908007ff; valaddr_reg:x3; val_offset:88788*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88788*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90800fff; valaddr_reg:x3; val_offset:88791*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88791*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90801fff; valaddr_reg:x3; val_offset:88794*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88794*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90803fff; valaddr_reg:x3; val_offset:88797*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88797*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90807fff; valaddr_reg:x3; val_offset:88800*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88800*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x9080ffff; valaddr_reg:x3; val_offset:88803*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88803*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x9081ffff; valaddr_reg:x3; val_offset:88806*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88806*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x9083ffff; valaddr_reg:x3; val_offset:88809*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88809*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x9087ffff; valaddr_reg:x3; val_offset:88812*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88812*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x908fffff; valaddr_reg:x3; val_offset:88815*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88815*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x909fffff; valaddr_reg:x3; val_offset:88818*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88818*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90bfffff; valaddr_reg:x3; val_offset:88821*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88821*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90c00000; valaddr_reg:x3; val_offset:88824*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88824*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90e00000; valaddr_reg:x3; val_offset:88827*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88827*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90f00000; valaddr_reg:x3; val_offset:88830*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88830*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90f80000; valaddr_reg:x3; val_offset:88833*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88833*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fc0000; valaddr_reg:x3; val_offset:88836*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88836*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fe0000; valaddr_reg:x3; val_offset:88839*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88839*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ff0000; valaddr_reg:x3; val_offset:88842*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88842*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ff8000; valaddr_reg:x3; val_offset:88845*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88845*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ffc000; valaddr_reg:x3; val_offset:88848*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88848*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ffe000; valaddr_reg:x3; val_offset:88851*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88851*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fff000; valaddr_reg:x3; val_offset:88854*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88854*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fff800; valaddr_reg:x3; val_offset:88857*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88857*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fffc00; valaddr_reg:x3; val_offset:88860*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88860*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fffe00; valaddr_reg:x3; val_offset:88863*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88863*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ffff00; valaddr_reg:x3; val_offset:88866*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88866*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ffff80; valaddr_reg:x3; val_offset:88869*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88869*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ffffc0; valaddr_reg:x3; val_offset:88872*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88872*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ffffe0; valaddr_reg:x3; val_offset:88875*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88875*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fffff0; valaddr_reg:x3; val_offset:88878*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88878*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fffff8; valaddr_reg:x3; val_offset:88881*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88881*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fffffc; valaddr_reg:x3; val_offset:88884*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88884*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90fffffe; valaddr_reg:x3; val_offset:88887*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88887*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1492bc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x21 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1492bc; op2val:0x80000000; +op3val:0x90ffffff; valaddr_reg:x3; val_offset:88890*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88890*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:88893*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88893*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:88896*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88896*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:88899*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88899*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:88902*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88902*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:88905*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88905*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:88908*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88908*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:88911*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88911*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:88914*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88914*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:88917*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88917*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:88920*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88920*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:88923*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88923*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:88926*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88926*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:88929*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88929*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:88932*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88932*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:88935*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88935*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:88938*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88938*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa800000; valaddr_reg:x3; val_offset:88941*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88941*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa800001; valaddr_reg:x3; val_offset:88944*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88944*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa800003; valaddr_reg:x3; val_offset:88947*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88947*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa800007; valaddr_reg:x3; val_offset:88950*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88950*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa80000f; valaddr_reg:x3; val_offset:88953*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88953*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa80001f; valaddr_reg:x3; val_offset:88956*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88956*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa80003f; valaddr_reg:x3; val_offset:88959*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88959*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa80007f; valaddr_reg:x3; val_offset:88962*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88962*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa8000ff; valaddr_reg:x3; val_offset:88965*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88965*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa8001ff; valaddr_reg:x3; val_offset:88968*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88968*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa8003ff; valaddr_reg:x3; val_offset:88971*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88971*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa8007ff; valaddr_reg:x3; val_offset:88974*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88974*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa800fff; valaddr_reg:x3; val_offset:88977*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88977*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa801fff; valaddr_reg:x3; val_offset:88980*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88980*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa803fff; valaddr_reg:x3; val_offset:88983*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88983*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa807fff; valaddr_reg:x3; val_offset:88986*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88986*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa80ffff; valaddr_reg:x3; val_offset:88989*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88989*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa81ffff; valaddr_reg:x3; val_offset:88992*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88992*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa83ffff; valaddr_reg:x3; val_offset:88995*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88995*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa87ffff; valaddr_reg:x3; val_offset:88998*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 88998*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa8fffff; valaddr_reg:x3; val_offset:89001*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89001*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xa9fffff; valaddr_reg:x3; val_offset:89004*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89004*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xabfffff; valaddr_reg:x3; val_offset:89007*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89007*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xac00000; valaddr_reg:x3; val_offset:89010*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89010*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xae00000; valaddr_reg:x3; val_offset:89013*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89013*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaf00000; valaddr_reg:x3; val_offset:89016*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89016*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaf80000; valaddr_reg:x3; val_offset:89019*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89019*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafc0000; valaddr_reg:x3; val_offset:89022*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89022*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafe0000; valaddr_reg:x3; val_offset:89025*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89025*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaff0000; valaddr_reg:x3; val_offset:89028*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89028*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaff8000; valaddr_reg:x3; val_offset:89031*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89031*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaffc000; valaddr_reg:x3; val_offset:89034*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89034*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaffe000; valaddr_reg:x3; val_offset:89037*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89037*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafff000; valaddr_reg:x3; val_offset:89040*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89040*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafff800; valaddr_reg:x3; val_offset:89043*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89043*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafffc00; valaddr_reg:x3; val_offset:89046*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89046*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafffe00; valaddr_reg:x3; val_offset:89049*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89049*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaffff00; valaddr_reg:x3; val_offset:89052*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89052*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaffff80; valaddr_reg:x3; val_offset:89055*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89055*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaffffc0; valaddr_reg:x3; val_offset:89058*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89058*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaffffe0; valaddr_reg:x3; val_offset:89061*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89061*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafffff0; valaddr_reg:x3; val_offset:89064*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89064*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafffff8; valaddr_reg:x3; val_offset:89067*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89067*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafffffc; valaddr_reg:x3; val_offset:89070*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89070*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xafffffe; valaddr_reg:x3; val_offset:89073*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89073*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x151296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f151296; op2val:0x0; +op3val:0xaffffff; valaddr_reg:x3; val_offset:89076*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89076*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:89079*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89079*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:89082*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89082*0 + 3*231*FLEN/8, x4, x1, x2) + +inst_29695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:89085*0 + 3*231*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89085*0 + 3*231*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132037873,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364671,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307712,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307713,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307715,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307719,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307727,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307743,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307775,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307839,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307967,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424308223,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424308735,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424309759,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424311807,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424315903,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424324095,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424340479,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424373247,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424438783,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424569855,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424831999,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2425356287,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2426404863,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2428502015,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2428502016,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2430599168,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2431647744,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432172032,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432434176,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432565248,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432630784,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432663552,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432679936,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432688128,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432692224,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432694272,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432695296,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432695808,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696064,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696192,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696256,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696288,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696304,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696312,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696316,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696318,32,FLEN) +NAN_BOXED(2132054716,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2432696319,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160768,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160769,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160771,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160775,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160783,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160799,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160831,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160895,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161023,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161279,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176161791,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176162815,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176164863,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176168959,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176177151,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176193535,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176226303,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176291839,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176422911,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176685055,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(177209343,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(178257919,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(180355071,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(180355072,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(182452224,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(183500800,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184025088,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184287232,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184418304,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184483840,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184516608,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184532992,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184541184,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184545280,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184547328,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184548352,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184548864,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549120,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549248,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549312,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549344,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549360,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549368,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549372,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549374,32,FLEN) +NAN_BOXED(2132087446,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549375,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-233.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-233.S new file mode 100644 index 000000000..98e9228e5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-233.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_29696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:89088*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89088*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:89091*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89091*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:89094*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89094*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:89097*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89097*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:89100*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89100*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:89103*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89103*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:89106*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89106*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:89109*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89109*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:89112*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89112*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:89115*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89115*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:89118*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89118*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:89121*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89121*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:89124*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89124*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b000000; valaddr_reg:x3; val_offset:89127*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89127*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b000001; valaddr_reg:x3; val_offset:89130*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89130*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b000003; valaddr_reg:x3; val_offset:89133*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89133*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b000007; valaddr_reg:x3; val_offset:89136*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89136*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b00000f; valaddr_reg:x3; val_offset:89139*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89139*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b00001f; valaddr_reg:x3; val_offset:89142*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89142*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b00003f; valaddr_reg:x3; val_offset:89145*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89145*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b00007f; valaddr_reg:x3; val_offset:89148*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89148*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b0000ff; valaddr_reg:x3; val_offset:89151*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89151*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b0001ff; valaddr_reg:x3; val_offset:89154*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89154*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b0003ff; valaddr_reg:x3; val_offset:89157*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89157*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b0007ff; valaddr_reg:x3; val_offset:89160*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89160*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b000fff; valaddr_reg:x3; val_offset:89163*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89163*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b001fff; valaddr_reg:x3; val_offset:89166*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89166*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b003fff; valaddr_reg:x3; val_offset:89169*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89169*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b007fff; valaddr_reg:x3; val_offset:89172*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89172*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b00ffff; valaddr_reg:x3; val_offset:89175*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89175*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b01ffff; valaddr_reg:x3; val_offset:89178*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89178*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b03ffff; valaddr_reg:x3; val_offset:89181*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89181*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b07ffff; valaddr_reg:x3; val_offset:89184*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89184*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b0fffff; valaddr_reg:x3; val_offset:89187*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89187*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b1fffff; valaddr_reg:x3; val_offset:89190*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89190*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b3fffff; valaddr_reg:x3; val_offset:89193*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89193*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b400000; valaddr_reg:x3; val_offset:89196*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89196*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b600000; valaddr_reg:x3; val_offset:89199*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89199*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b700000; valaddr_reg:x3; val_offset:89202*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89202*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b780000; valaddr_reg:x3; val_offset:89205*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89205*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7c0000; valaddr_reg:x3; val_offset:89208*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89208*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7e0000; valaddr_reg:x3; val_offset:89211*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89211*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7f0000; valaddr_reg:x3; val_offset:89214*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89214*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7f8000; valaddr_reg:x3; val_offset:89217*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89217*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7fc000; valaddr_reg:x3; val_offset:89220*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89220*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7fe000; valaddr_reg:x3; val_offset:89223*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89223*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7ff000; valaddr_reg:x3; val_offset:89226*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89226*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7ff800; valaddr_reg:x3; val_offset:89229*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89229*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:89232*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89232*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:89235*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89235*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7fff00; valaddr_reg:x3; val_offset:89238*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89238*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7fff80; valaddr_reg:x3; val_offset:89241*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89241*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:89244*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89244*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:89247*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89247*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:89250*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89250*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:89253*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89253*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:89256*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89256*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:89259*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89259*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a4db and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a4db; op2val:0x80000000; +op3val:0x8b7fffff; valaddr_reg:x3; val_offset:89262*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89262*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbf800001; valaddr_reg:x3; val_offset:89265*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89265*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbf800003; valaddr_reg:x3; val_offset:89268*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89268*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbf800007; valaddr_reg:x3; val_offset:89271*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89271*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbf999999; valaddr_reg:x3; val_offset:89274*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89274*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:89277*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89277*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:89280*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89280*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:89283*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89283*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:89286*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89286*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:89289*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89289*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:89292*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89292*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:89295*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89295*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:89298*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89298*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:89301*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89301*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:89304*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89304*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:89307*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89307*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:89310*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89310*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf000000; valaddr_reg:x3; val_offset:89313*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89313*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf000001; valaddr_reg:x3; val_offset:89316*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89316*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf000003; valaddr_reg:x3; val_offset:89319*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89319*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf000007; valaddr_reg:x3; val_offset:89322*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89322*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf00000f; valaddr_reg:x3; val_offset:89325*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89325*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf00001f; valaddr_reg:x3; val_offset:89328*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89328*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf00003f; valaddr_reg:x3; val_offset:89331*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89331*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf00007f; valaddr_reg:x3; val_offset:89334*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89334*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf0000ff; valaddr_reg:x3; val_offset:89337*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89337*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf0001ff; valaddr_reg:x3; val_offset:89340*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89340*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf0003ff; valaddr_reg:x3; val_offset:89343*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89343*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf0007ff; valaddr_reg:x3; val_offset:89346*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89346*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf000fff; valaddr_reg:x3; val_offset:89349*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89349*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf001fff; valaddr_reg:x3; val_offset:89352*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89352*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf003fff; valaddr_reg:x3; val_offset:89355*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89355*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf007fff; valaddr_reg:x3; val_offset:89358*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89358*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf00ffff; valaddr_reg:x3; val_offset:89361*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89361*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf01ffff; valaddr_reg:x3; val_offset:89364*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89364*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf03ffff; valaddr_reg:x3; val_offset:89367*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89367*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf07ffff; valaddr_reg:x3; val_offset:89370*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89370*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf0fffff; valaddr_reg:x3; val_offset:89373*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89373*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf1fffff; valaddr_reg:x3; val_offset:89376*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89376*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf3fffff; valaddr_reg:x3; val_offset:89379*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89379*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf400000; valaddr_reg:x3; val_offset:89382*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89382*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf600000; valaddr_reg:x3; val_offset:89385*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89385*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf700000; valaddr_reg:x3; val_offset:89388*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89388*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf780000; valaddr_reg:x3; val_offset:89391*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89391*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7c0000; valaddr_reg:x3; val_offset:89394*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89394*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7e0000; valaddr_reg:x3; val_offset:89397*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89397*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7f0000; valaddr_reg:x3; val_offset:89400*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89400*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7f8000; valaddr_reg:x3; val_offset:89403*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89403*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7fc000; valaddr_reg:x3; val_offset:89406*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89406*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7fe000; valaddr_reg:x3; val_offset:89409*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89409*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7ff000; valaddr_reg:x3; val_offset:89412*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89412*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7ff800; valaddr_reg:x3; val_offset:89415*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89415*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7ffc00; valaddr_reg:x3; val_offset:89418*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89418*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7ffe00; valaddr_reg:x3; val_offset:89421*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89421*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7fff00; valaddr_reg:x3; val_offset:89424*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89424*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7fff80; valaddr_reg:x3; val_offset:89427*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89427*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7fffc0; valaddr_reg:x3; val_offset:89430*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89430*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7fffe0; valaddr_reg:x3; val_offset:89433*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89433*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7ffff0; valaddr_reg:x3; val_offset:89436*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89436*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7ffff8; valaddr_reg:x3; val_offset:89439*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89439*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7ffffc; valaddr_reg:x3; val_offset:89442*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89442*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7ffffe; valaddr_reg:x3; val_offset:89445*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89445*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x15a5e6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x36bde5 and fs3 == 1 and fe3 == 0x9e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f15a5e6; op2val:0x8036bde5; +op3val:0xcf7fffff; valaddr_reg:x3; val_offset:89448*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89448*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:89451*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89451*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:89454*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89454*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:89457*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89457*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:89460*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89460*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:89463*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89463*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:89466*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89466*0 + 3*232*FLEN/8, x4, x1, x2) + +inst_29823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:89469*0 + 3*232*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89469*0 + 3*232*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033024,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033025,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033027,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033031,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033039,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033055,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033087,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033151,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033279,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033535,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332034047,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332035071,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332037119,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332041215,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332049407,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332065791,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332098559,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332164095,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332295167,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332557311,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2333081599,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2334130175,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2336227327,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2336227328,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2338324480,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2339373056,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2339897344,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340159488,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340290560,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340356096,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340388864,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340405248,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340413440,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340417536,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340419584,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340420608,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421120,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421376,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421504,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421568,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421600,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421616,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421624,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421628,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421630,32,FLEN) +NAN_BOXED(2132124891,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421631,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883712,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883713,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883715,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883719,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883727,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883743,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883775,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883839,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472883967,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472884223,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472884735,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472885759,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472887807,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472891903,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472900095,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472916479,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3472949247,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3473014783,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3473145855,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3473407999,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3473932287,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3474980863,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3477078015,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3477078016,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3479175168,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3480223744,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3480748032,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481010176,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481141248,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481206784,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481239552,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481255936,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481264128,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481268224,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481270272,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481271296,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481271808,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272064,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272192,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272256,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272288,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272304,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272312,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272316,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272318,32,FLEN) +NAN_BOXED(2132125158,32,FLEN) +NAN_BOXED(2151071205,32,FLEN) +NAN_BOXED(3481272319,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-234.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-234.S new file mode 100644 index 000000000..dddd66ea0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-234.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_29824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:89472*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89472*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:89475*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89475*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:89478*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89478*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:89481*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89481*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:89484*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89484*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:89487*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89487*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:89490*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89490*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:89493*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89493*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:89496*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89496*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82800000; valaddr_reg:x3; val_offset:89499*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89499*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82800001; valaddr_reg:x3; val_offset:89502*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89502*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82800003; valaddr_reg:x3; val_offset:89505*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89505*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82800007; valaddr_reg:x3; val_offset:89508*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89508*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x8280000f; valaddr_reg:x3; val_offset:89511*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89511*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x8280001f; valaddr_reg:x3; val_offset:89514*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89514*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x8280003f; valaddr_reg:x3; val_offset:89517*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89517*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x8280007f; valaddr_reg:x3; val_offset:89520*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89520*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x828000ff; valaddr_reg:x3; val_offset:89523*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89523*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x828001ff; valaddr_reg:x3; val_offset:89526*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89526*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x828003ff; valaddr_reg:x3; val_offset:89529*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89529*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x828007ff; valaddr_reg:x3; val_offset:89532*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89532*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82800fff; valaddr_reg:x3; val_offset:89535*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89535*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82801fff; valaddr_reg:x3; val_offset:89538*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89538*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82803fff; valaddr_reg:x3; val_offset:89541*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89541*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82807fff; valaddr_reg:x3; val_offset:89544*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89544*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x8280ffff; valaddr_reg:x3; val_offset:89547*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89547*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x8281ffff; valaddr_reg:x3; val_offset:89550*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89550*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x8283ffff; valaddr_reg:x3; val_offset:89553*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89553*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x8287ffff; valaddr_reg:x3; val_offset:89556*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89556*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x828fffff; valaddr_reg:x3; val_offset:89559*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89559*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x829fffff; valaddr_reg:x3; val_offset:89562*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89562*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82bfffff; valaddr_reg:x3; val_offset:89565*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89565*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82c00000; valaddr_reg:x3; val_offset:89568*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89568*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82e00000; valaddr_reg:x3; val_offset:89571*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89571*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82f00000; valaddr_reg:x3; val_offset:89574*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89574*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82f80000; valaddr_reg:x3; val_offset:89577*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89577*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fc0000; valaddr_reg:x3; val_offset:89580*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89580*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fe0000; valaddr_reg:x3; val_offset:89583*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89583*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ff0000; valaddr_reg:x3; val_offset:89586*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89586*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ff8000; valaddr_reg:x3; val_offset:89589*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89589*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ffc000; valaddr_reg:x3; val_offset:89592*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89592*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ffe000; valaddr_reg:x3; val_offset:89595*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89595*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fff000; valaddr_reg:x3; val_offset:89598*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89598*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fff800; valaddr_reg:x3; val_offset:89601*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89601*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fffc00; valaddr_reg:x3; val_offset:89604*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89604*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fffe00; valaddr_reg:x3; val_offset:89607*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89607*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ffff00; valaddr_reg:x3; val_offset:89610*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89610*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ffff80; valaddr_reg:x3; val_offset:89613*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89613*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ffffc0; valaddr_reg:x3; val_offset:89616*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89616*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ffffe0; valaddr_reg:x3; val_offset:89619*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89619*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fffff0; valaddr_reg:x3; val_offset:89622*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89622*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fffff8; valaddr_reg:x3; val_offset:89625*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89625*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fffffc; valaddr_reg:x3; val_offset:89628*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89628*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82fffffe; valaddr_reg:x3; val_offset:89631*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89631*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x162a78 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f162a78; op2val:0x80000000; +op3val:0x82ffffff; valaddr_reg:x3; val_offset:89634*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89634*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30800000; valaddr_reg:x3; val_offset:89637*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89637*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30800001; valaddr_reg:x3; val_offset:89640*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89640*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30800003; valaddr_reg:x3; val_offset:89643*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89643*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30800007; valaddr_reg:x3; val_offset:89646*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89646*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3080000f; valaddr_reg:x3; val_offset:89649*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89649*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3080001f; valaddr_reg:x3; val_offset:89652*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89652*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3080003f; valaddr_reg:x3; val_offset:89655*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89655*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3080007f; valaddr_reg:x3; val_offset:89658*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89658*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x308000ff; valaddr_reg:x3; val_offset:89661*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89661*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x308001ff; valaddr_reg:x3; val_offset:89664*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89664*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x308003ff; valaddr_reg:x3; val_offset:89667*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89667*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x308007ff; valaddr_reg:x3; val_offset:89670*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89670*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30800fff; valaddr_reg:x3; val_offset:89673*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89673*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30801fff; valaddr_reg:x3; val_offset:89676*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89676*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30803fff; valaddr_reg:x3; val_offset:89679*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89679*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30807fff; valaddr_reg:x3; val_offset:89682*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89682*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3080ffff; valaddr_reg:x3; val_offset:89685*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89685*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3081ffff; valaddr_reg:x3; val_offset:89688*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89688*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3083ffff; valaddr_reg:x3; val_offset:89691*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89691*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3087ffff; valaddr_reg:x3; val_offset:89694*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89694*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x308fffff; valaddr_reg:x3; val_offset:89697*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89697*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x309fffff; valaddr_reg:x3; val_offset:89700*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89700*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30bfffff; valaddr_reg:x3; val_offset:89703*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89703*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30c00000; valaddr_reg:x3; val_offset:89706*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89706*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30e00000; valaddr_reg:x3; val_offset:89709*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89709*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30f00000; valaddr_reg:x3; val_offset:89712*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89712*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30f80000; valaddr_reg:x3; val_offset:89715*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89715*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fc0000; valaddr_reg:x3; val_offset:89718*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89718*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fe0000; valaddr_reg:x3; val_offset:89721*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89721*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ff0000; valaddr_reg:x3; val_offset:89724*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89724*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ff8000; valaddr_reg:x3; val_offset:89727*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89727*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ffc000; valaddr_reg:x3; val_offset:89730*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89730*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ffe000; valaddr_reg:x3; val_offset:89733*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89733*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fff000; valaddr_reg:x3; val_offset:89736*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89736*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fff800; valaddr_reg:x3; val_offset:89739*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89739*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fffc00; valaddr_reg:x3; val_offset:89742*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89742*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fffe00; valaddr_reg:x3; val_offset:89745*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89745*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ffff00; valaddr_reg:x3; val_offset:89748*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89748*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ffff80; valaddr_reg:x3; val_offset:89751*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89751*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ffffc0; valaddr_reg:x3; val_offset:89754*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89754*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ffffe0; valaddr_reg:x3; val_offset:89757*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89757*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fffff0; valaddr_reg:x3; val_offset:89760*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89760*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fffff8; valaddr_reg:x3; val_offset:89763*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89763*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fffffc; valaddr_reg:x3; val_offset:89766*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89766*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30fffffe; valaddr_reg:x3; val_offset:89769*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89769*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x61 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x30ffffff; valaddr_reg:x3; val_offset:89772*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89772*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3f800001; valaddr_reg:x3; val_offset:89775*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89775*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3f800003; valaddr_reg:x3; val_offset:89778*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89778*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3f800007; valaddr_reg:x3; val_offset:89781*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89781*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3f999999; valaddr_reg:x3; val_offset:89784*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89784*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:89787*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89787*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:89790*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89790*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:89793*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89793*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:89796*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89796*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:89799*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89799*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:89802*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89802*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:89805*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89805*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:89808*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89808*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:89811*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89811*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:89814*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89814*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:89817*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89817*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x165bd6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x367ba7 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f165bd6; op2val:0x367ba7; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:89820*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89820*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:89823*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89823*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:89826*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89826*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:89829*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89829*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:89832*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89832*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:89835*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89835*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:89838*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89838*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:89841*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89841*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:89844*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89844*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:89847*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89847*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:89850*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89850*0 + 3*233*FLEN/8, x4, x1, x2) + +inst_29951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:89853*0 + 3*233*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89853*0 + 3*233*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426688,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426689,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426691,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426695,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426703,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426719,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426751,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426815,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426943,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189427199,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189427711,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189428735,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189430783,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189434879,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189443071,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189459455,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189492223,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189557759,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189688831,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189950975,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2190475263,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2191523839,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2193620991,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2193620992,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2195718144,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2196766720,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197291008,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197553152,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197684224,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197749760,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197782528,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197798912,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197807104,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197811200,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197813248,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197814272,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197814784,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815040,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815168,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815232,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815264,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815280,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815288,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815292,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815294,32,FLEN) +NAN_BOXED(2132159096,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815295,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813694976,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813694977,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813694979,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813694983,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813694991,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813695007,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813695039,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813695103,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813695231,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813695487,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813695999,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813697023,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813699071,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813703167,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813711359,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813727743,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813760511,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813826047,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(813957119,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(814219263,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(814743551,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(815792127,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(817889279,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(817889280,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(819986432,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(821035008,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(821559296,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(821821440,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(821952512,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822018048,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822050816,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822067200,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822075392,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822079488,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822081536,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822082560,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083072,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083328,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083456,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083520,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083552,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083568,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083576,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083580,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083582,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(822083583,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132171734,32,FLEN) +NAN_BOXED(3570599,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-235.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-235.S new file mode 100644 index 000000000..10aec7696 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-235.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_29952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:89856*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89856*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:89859*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89859*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:89862*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89862*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:89865*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89865*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:89868*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89868*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8000000; valaddr_reg:x3; val_offset:89871*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89871*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8000001; valaddr_reg:x3; val_offset:89874*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89874*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8000003; valaddr_reg:x3; val_offset:89877*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89877*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8000007; valaddr_reg:x3; val_offset:89880*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89880*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x800000f; valaddr_reg:x3; val_offset:89883*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89883*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x800001f; valaddr_reg:x3; val_offset:89886*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89886*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x800003f; valaddr_reg:x3; val_offset:89889*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89889*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x800007f; valaddr_reg:x3; val_offset:89892*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89892*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x80000ff; valaddr_reg:x3; val_offset:89895*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89895*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x80001ff; valaddr_reg:x3; val_offset:89898*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89898*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x80003ff; valaddr_reg:x3; val_offset:89901*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89901*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x80007ff; valaddr_reg:x3; val_offset:89904*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89904*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8000fff; valaddr_reg:x3; val_offset:89907*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89907*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8001fff; valaddr_reg:x3; val_offset:89910*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89910*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8003fff; valaddr_reg:x3; val_offset:89913*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89913*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8007fff; valaddr_reg:x3; val_offset:89916*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89916*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x800ffff; valaddr_reg:x3; val_offset:89919*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89919*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x801ffff; valaddr_reg:x3; val_offset:89922*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89922*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x803ffff; valaddr_reg:x3; val_offset:89925*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89925*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x807ffff; valaddr_reg:x3; val_offset:89928*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89928*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x80fffff; valaddr_reg:x3; val_offset:89931*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89931*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x81fffff; valaddr_reg:x3; val_offset:89934*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89934*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x83fffff; valaddr_reg:x3; val_offset:89937*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89937*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8400000; valaddr_reg:x3; val_offset:89940*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89940*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8600000; valaddr_reg:x3; val_offset:89943*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89943*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8700000; valaddr_reg:x3; val_offset:89946*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89946*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x8780000; valaddr_reg:x3; val_offset:89949*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89949*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87c0000; valaddr_reg:x3; val_offset:89952*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89952*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87e0000; valaddr_reg:x3; val_offset:89955*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89955*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87f0000; valaddr_reg:x3; val_offset:89958*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89958*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87f8000; valaddr_reg:x3; val_offset:89961*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89961*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87fc000; valaddr_reg:x3; val_offset:89964*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89964*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87fe000; valaddr_reg:x3; val_offset:89967*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89967*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87ff000; valaddr_reg:x3; val_offset:89970*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89970*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87ff800; valaddr_reg:x3; val_offset:89973*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89973*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87ffc00; valaddr_reg:x3; val_offset:89976*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89976*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87ffe00; valaddr_reg:x3; val_offset:89979*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89979*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87fff00; valaddr_reg:x3; val_offset:89982*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89982*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87fff80; valaddr_reg:x3; val_offset:89985*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89985*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87fffc0; valaddr_reg:x3; val_offset:89988*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89988*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87fffe0; valaddr_reg:x3; val_offset:89991*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89991*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87ffff0; valaddr_reg:x3; val_offset:89994*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89994*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_29999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87ffff8; valaddr_reg:x3; val_offset:89997*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 89997*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87ffffc; valaddr_reg:x3; val_offset:90000*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90000*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87ffffe; valaddr_reg:x3; val_offset:90003*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90003*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x168f5a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f168f5a; op2val:0x0; +op3val:0x87fffff; valaddr_reg:x3; val_offset:90006*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90006*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:90009*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90009*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:90012*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90012*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:90015*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90015*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:90018*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90018*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:90021*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90021*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:90024*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90024*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:90027*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90027*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:90030*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90030*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:90033*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90033*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:90036*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90036*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:90039*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90039*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:90042*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90042*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:90045*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90045*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:90048*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90048*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:90051*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90051*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:90054*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90054*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81800000; valaddr_reg:x3; val_offset:90057*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90057*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81800001; valaddr_reg:x3; val_offset:90060*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90060*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81800003; valaddr_reg:x3; val_offset:90063*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90063*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81800007; valaddr_reg:x3; val_offset:90066*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90066*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x8180000f; valaddr_reg:x3; val_offset:90069*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90069*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x8180001f; valaddr_reg:x3; val_offset:90072*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90072*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x8180003f; valaddr_reg:x3; val_offset:90075*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90075*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x8180007f; valaddr_reg:x3; val_offset:90078*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90078*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x818000ff; valaddr_reg:x3; val_offset:90081*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90081*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x818001ff; valaddr_reg:x3; val_offset:90084*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90084*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x818003ff; valaddr_reg:x3; val_offset:90087*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90087*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x818007ff; valaddr_reg:x3; val_offset:90090*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90090*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81800fff; valaddr_reg:x3; val_offset:90093*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90093*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81801fff; valaddr_reg:x3; val_offset:90096*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90096*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81803fff; valaddr_reg:x3; val_offset:90099*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90099*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81807fff; valaddr_reg:x3; val_offset:90102*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90102*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x8180ffff; valaddr_reg:x3; val_offset:90105*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90105*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x8181ffff; valaddr_reg:x3; val_offset:90108*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90108*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x8183ffff; valaddr_reg:x3; val_offset:90111*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90111*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x8187ffff; valaddr_reg:x3; val_offset:90114*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90114*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x818fffff; valaddr_reg:x3; val_offset:90117*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90117*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x819fffff; valaddr_reg:x3; val_offset:90120*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90120*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81bfffff; valaddr_reg:x3; val_offset:90123*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90123*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81c00000; valaddr_reg:x3; val_offset:90126*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90126*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81e00000; valaddr_reg:x3; val_offset:90129*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90129*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81f00000; valaddr_reg:x3; val_offset:90132*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90132*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81f80000; valaddr_reg:x3; val_offset:90135*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90135*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fc0000; valaddr_reg:x3; val_offset:90138*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90138*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fe0000; valaddr_reg:x3; val_offset:90141*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90141*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ff0000; valaddr_reg:x3; val_offset:90144*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90144*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ff8000; valaddr_reg:x3; val_offset:90147*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90147*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ffc000; valaddr_reg:x3; val_offset:90150*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90150*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ffe000; valaddr_reg:x3; val_offset:90153*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90153*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fff000; valaddr_reg:x3; val_offset:90156*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90156*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fff800; valaddr_reg:x3; val_offset:90159*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90159*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fffc00; valaddr_reg:x3; val_offset:90162*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90162*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fffe00; valaddr_reg:x3; val_offset:90165*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90165*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ffff00; valaddr_reg:x3; val_offset:90168*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90168*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ffff80; valaddr_reg:x3; val_offset:90171*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90171*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ffffc0; valaddr_reg:x3; val_offset:90174*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90174*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ffffe0; valaddr_reg:x3; val_offset:90177*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90177*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fffff0; valaddr_reg:x3; val_offset:90180*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90180*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fffff8; valaddr_reg:x3; val_offset:90183*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90183*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fffffc; valaddr_reg:x3; val_offset:90186*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90186*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81fffffe; valaddr_reg:x3; val_offset:90189*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90189*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x16d05c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f16d05c; op2val:0x80000000; +op3val:0x81ffffff; valaddr_reg:x3; val_offset:90192*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90192*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:90195*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90195*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:90198*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90198*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:90201*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90201*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:90204*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90204*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:90207*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90207*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:90210*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90210*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:90213*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90213*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:90216*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90216*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:90219*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90219*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:90222*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90222*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:90225*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90225*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:90228*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90228*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:90231*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90231*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:90234*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90234*0 + 3*234*FLEN/8, x4, x1, x2) + +inst_30079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:90237*0 + 3*234*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90237*0 + 3*234*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217728,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217729,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217731,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217735,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217743,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217759,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217791,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217855,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217983,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134218239,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134218751,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134219775,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134221823,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134225919,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134234111,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134250495,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134283263,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134348799,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134479871,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134742015,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(135266303,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(136314879,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(138412031,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(138412032,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(140509184,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(141557760,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142082048,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142344192,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142475264,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142540800,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142573568,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142589952,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142598144,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142602240,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142604288,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142605312,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142605824,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606080,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606208,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606272,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606304,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606320,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606328,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606332,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606334,32,FLEN) +NAN_BOXED(2132184922,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606335,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649472,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649473,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649475,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649479,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649487,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649503,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649535,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649599,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649727,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649983,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172650495,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172651519,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172653567,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172657663,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172665855,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172682239,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172715007,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172780543,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172911615,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2173173759,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2173698047,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2174746623,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2176843775,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2176843776,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2178940928,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2179989504,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180513792,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180775936,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180907008,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180972544,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181005312,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181021696,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181029888,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181033984,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181036032,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037056,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037568,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037824,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037952,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038016,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038048,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038064,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038072,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038076,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038078,32,FLEN) +NAN_BOXED(2132201564,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038079,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-236.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-236.S new file mode 100644 index 000000000..ac5673ec0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-236.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_30080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:90240*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90240*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81800000; valaddr_reg:x3; val_offset:90243*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90243*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81800001; valaddr_reg:x3; val_offset:90246*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90246*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81800003; valaddr_reg:x3; val_offset:90249*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90249*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81800007; valaddr_reg:x3; val_offset:90252*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90252*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8180000f; valaddr_reg:x3; val_offset:90255*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90255*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8180001f; valaddr_reg:x3; val_offset:90258*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90258*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8180003f; valaddr_reg:x3; val_offset:90261*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90261*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8180007f; valaddr_reg:x3; val_offset:90264*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90264*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x818000ff; valaddr_reg:x3; val_offset:90267*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90267*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x818001ff; valaddr_reg:x3; val_offset:90270*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90270*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x818003ff; valaddr_reg:x3; val_offset:90273*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90273*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x818007ff; valaddr_reg:x3; val_offset:90276*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90276*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81800fff; valaddr_reg:x3; val_offset:90279*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90279*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81801fff; valaddr_reg:x3; val_offset:90282*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90282*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81803fff; valaddr_reg:x3; val_offset:90285*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90285*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81807fff; valaddr_reg:x3; val_offset:90288*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90288*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8180ffff; valaddr_reg:x3; val_offset:90291*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90291*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8181ffff; valaddr_reg:x3; val_offset:90294*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90294*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8183ffff; valaddr_reg:x3; val_offset:90297*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90297*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x8187ffff; valaddr_reg:x3; val_offset:90300*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90300*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x818fffff; valaddr_reg:x3; val_offset:90303*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90303*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x819fffff; valaddr_reg:x3; val_offset:90306*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90306*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81bfffff; valaddr_reg:x3; val_offset:90309*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90309*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81c00000; valaddr_reg:x3; val_offset:90312*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90312*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81e00000; valaddr_reg:x3; val_offset:90315*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90315*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81f00000; valaddr_reg:x3; val_offset:90318*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90318*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81f80000; valaddr_reg:x3; val_offset:90321*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90321*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fc0000; valaddr_reg:x3; val_offset:90324*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90324*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fe0000; valaddr_reg:x3; val_offset:90327*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90327*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ff0000; valaddr_reg:x3; val_offset:90330*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90330*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ff8000; valaddr_reg:x3; val_offset:90333*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90333*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ffc000; valaddr_reg:x3; val_offset:90336*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90336*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ffe000; valaddr_reg:x3; val_offset:90339*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90339*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fff000; valaddr_reg:x3; val_offset:90342*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90342*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fff800; valaddr_reg:x3; val_offset:90345*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90345*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fffc00; valaddr_reg:x3; val_offset:90348*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90348*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fffe00; valaddr_reg:x3; val_offset:90351*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90351*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ffff00; valaddr_reg:x3; val_offset:90354*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90354*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ffff80; valaddr_reg:x3; val_offset:90357*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90357*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ffffc0; valaddr_reg:x3; val_offset:90360*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90360*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ffffe0; valaddr_reg:x3; val_offset:90363*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90363*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fffff0; valaddr_reg:x3; val_offset:90366*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90366*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fffff8; valaddr_reg:x3; val_offset:90369*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90369*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fffffc; valaddr_reg:x3; val_offset:90372*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90372*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81fffffe; valaddr_reg:x3; val_offset:90375*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90375*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1759f7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1759f7; op2val:0x80000000; +op3val:0x81ffffff; valaddr_reg:x3; val_offset:90378*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90378*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:90381*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90381*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:90384*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90384*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:90387*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90387*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:90390*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90390*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:90393*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90393*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:90396*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90396*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:90399*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90399*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:90402*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90402*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:90405*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90405*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:90408*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90408*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:90411*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90411*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:90414*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90414*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:90417*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90417*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:90420*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90420*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:90423*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90423*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:90426*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90426*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf800000; valaddr_reg:x3; val_offset:90429*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90429*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf800001; valaddr_reg:x3; val_offset:90432*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90432*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf800003; valaddr_reg:x3; val_offset:90435*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90435*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf800007; valaddr_reg:x3; val_offset:90438*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90438*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf80000f; valaddr_reg:x3; val_offset:90441*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90441*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf80001f; valaddr_reg:x3; val_offset:90444*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90444*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf80003f; valaddr_reg:x3; val_offset:90447*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90447*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf80007f; valaddr_reg:x3; val_offset:90450*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90450*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf8000ff; valaddr_reg:x3; val_offset:90453*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90453*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf8001ff; valaddr_reg:x3; val_offset:90456*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90456*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf8003ff; valaddr_reg:x3; val_offset:90459*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90459*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf8007ff; valaddr_reg:x3; val_offset:90462*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90462*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf800fff; valaddr_reg:x3; val_offset:90465*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90465*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf801fff; valaddr_reg:x3; val_offset:90468*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90468*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf803fff; valaddr_reg:x3; val_offset:90471*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90471*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf807fff; valaddr_reg:x3; val_offset:90474*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90474*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf80ffff; valaddr_reg:x3; val_offset:90477*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90477*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf81ffff; valaddr_reg:x3; val_offset:90480*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90480*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf83ffff; valaddr_reg:x3; val_offset:90483*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90483*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf87ffff; valaddr_reg:x3; val_offset:90486*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90486*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf8fffff; valaddr_reg:x3; val_offset:90489*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90489*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xf9fffff; valaddr_reg:x3; val_offset:90492*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90492*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfbfffff; valaddr_reg:x3; val_offset:90495*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90495*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfc00000; valaddr_reg:x3; val_offset:90498*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90498*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfe00000; valaddr_reg:x3; val_offset:90501*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90501*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xff00000; valaddr_reg:x3; val_offset:90504*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90504*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xff80000; valaddr_reg:x3; val_offset:90507*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90507*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffc0000; valaddr_reg:x3; val_offset:90510*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90510*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffe0000; valaddr_reg:x3; val_offset:90513*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90513*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfff0000; valaddr_reg:x3; val_offset:90516*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90516*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfff8000; valaddr_reg:x3; val_offset:90519*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90519*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffc000; valaddr_reg:x3; val_offset:90522*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90522*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffe000; valaddr_reg:x3; val_offset:90525*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90525*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffff000; valaddr_reg:x3; val_offset:90528*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90528*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffff800; valaddr_reg:x3; val_offset:90531*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90531*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffffc00; valaddr_reg:x3; val_offset:90534*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90534*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffffe00; valaddr_reg:x3; val_offset:90537*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90537*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffff00; valaddr_reg:x3; val_offset:90540*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90540*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffff80; valaddr_reg:x3; val_offset:90543*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90543*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffffc0; valaddr_reg:x3; val_offset:90546*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90546*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffffe0; valaddr_reg:x3; val_offset:90549*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90549*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffffff0; valaddr_reg:x3; val_offset:90552*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90552*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffffff8; valaddr_reg:x3; val_offset:90555*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90555*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffffffc; valaddr_reg:x3; val_offset:90558*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90558*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xffffffe; valaddr_reg:x3; val_offset:90561*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90561*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17679e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17679e; op2val:0x0; +op3val:0xfffffff; valaddr_reg:x3; val_offset:90564*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90564*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3f800001; valaddr_reg:x3; val_offset:90567*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90567*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3f800003; valaddr_reg:x3; val_offset:90570*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90570*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3f800007; valaddr_reg:x3; val_offset:90573*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90573*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3f999999; valaddr_reg:x3; val_offset:90576*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90576*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:90579*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90579*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:90582*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90582*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:90585*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90585*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:90588*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90588*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:90591*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90591*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:90594*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90594*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:90597*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90597*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:90600*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90600*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:90603*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90603*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:90606*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90606*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:90609*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90609*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:90612*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90612*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46000000; valaddr_reg:x3; val_offset:90615*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90615*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46000001; valaddr_reg:x3; val_offset:90618*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90618*0 + 3*235*FLEN/8, x4, x1, x2) + +inst_30207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46000003; valaddr_reg:x3; val_offset:90621*0 + 3*235*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90621*0 + 3*235*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649472,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649473,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649475,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649479,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649487,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649503,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649535,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649599,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649727,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649983,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172650495,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172651519,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172653567,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172657663,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172665855,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172682239,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172715007,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172780543,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172911615,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2173173759,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2173698047,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2174746623,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2176843775,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2176843776,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2178940928,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2179989504,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180513792,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180775936,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180907008,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180972544,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181005312,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181021696,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181029888,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181033984,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181036032,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037056,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037568,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037824,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037952,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038016,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038048,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038064,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038072,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038076,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038078,32,FLEN) +NAN_BOXED(2132236791,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038079,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046848,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046849,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046851,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046855,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046863,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046879,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046911,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046975,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047103,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047359,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047871,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260048895,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260050943,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260055039,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260063231,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260079615,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260112383,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260177919,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260308991,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260571135,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(261095423,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143999,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(264241151,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(264241152,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(266338304,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(267386880,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(267911168,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268173312,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268304384,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268369920,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268402688,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268419072,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268427264,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268431360,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268433408,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268434432,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268434944,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435200,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435328,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435392,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435424,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435440,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435448,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435452,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435454,32,FLEN) +NAN_BOXED(2132240286,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435455,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405120,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405121,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405123,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-237.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-237.S new file mode 100644 index 000000000..d7c96cc0d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-237.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_30208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46000007; valaddr_reg:x3; val_offset:90624*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90624*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x4600000f; valaddr_reg:x3; val_offset:90627*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90627*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x4600001f; valaddr_reg:x3; val_offset:90630*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90630*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x4600003f; valaddr_reg:x3; val_offset:90633*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90633*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x4600007f; valaddr_reg:x3; val_offset:90636*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90636*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x460000ff; valaddr_reg:x3; val_offset:90639*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90639*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x460001ff; valaddr_reg:x3; val_offset:90642*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90642*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x460003ff; valaddr_reg:x3; val_offset:90645*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90645*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x460007ff; valaddr_reg:x3; val_offset:90648*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90648*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46000fff; valaddr_reg:x3; val_offset:90651*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90651*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46001fff; valaddr_reg:x3; val_offset:90654*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90654*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46003fff; valaddr_reg:x3; val_offset:90657*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90657*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46007fff; valaddr_reg:x3; val_offset:90660*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90660*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x4600ffff; valaddr_reg:x3; val_offset:90663*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90663*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x4601ffff; valaddr_reg:x3; val_offset:90666*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90666*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x4603ffff; valaddr_reg:x3; val_offset:90669*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90669*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x4607ffff; valaddr_reg:x3; val_offset:90672*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90672*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x460fffff; valaddr_reg:x3; val_offset:90675*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90675*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x461fffff; valaddr_reg:x3; val_offset:90678*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90678*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x463fffff; valaddr_reg:x3; val_offset:90681*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90681*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46400000; valaddr_reg:x3; val_offset:90684*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90684*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46600000; valaddr_reg:x3; val_offset:90687*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90687*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46700000; valaddr_reg:x3; val_offset:90690*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90690*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x46780000; valaddr_reg:x3; val_offset:90693*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90693*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467c0000; valaddr_reg:x3; val_offset:90696*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90696*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467e0000; valaddr_reg:x3; val_offset:90699*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90699*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467f0000; valaddr_reg:x3; val_offset:90702*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90702*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467f8000; valaddr_reg:x3; val_offset:90705*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90705*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467fc000; valaddr_reg:x3; val_offset:90708*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90708*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467fe000; valaddr_reg:x3; val_offset:90711*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90711*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467ff000; valaddr_reg:x3; val_offset:90714*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90714*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467ff800; valaddr_reg:x3; val_offset:90717*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90717*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467ffc00; valaddr_reg:x3; val_offset:90720*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90720*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467ffe00; valaddr_reg:x3; val_offset:90723*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90723*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467fff00; valaddr_reg:x3; val_offset:90726*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90726*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467fff80; valaddr_reg:x3; val_offset:90729*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90729*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467fffc0; valaddr_reg:x3; val_offset:90732*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90732*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467fffe0; valaddr_reg:x3; val_offset:90735*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90735*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467ffff0; valaddr_reg:x3; val_offset:90738*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90738*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467ffff8; valaddr_reg:x3; val_offset:90741*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90741*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467ffffc; valaddr_reg:x3; val_offset:90744*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90744*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467ffffe; valaddr_reg:x3; val_offset:90747*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90747*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x176ba3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3619db and fs3 == 0 and fe3 == 0x8c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f176ba3; op2val:0x3619db; +op3val:0x467fffff; valaddr_reg:x3; val_offset:90750*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90750*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:90753*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90753*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:90756*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90756*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:90759*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90759*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:90762*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90762*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:90765*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90765*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:90768*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90768*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:90771*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90771*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:90774*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90774*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:90777*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90777*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:90780*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90780*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:90783*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90783*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:90786*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90786*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:90789*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90789*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:90792*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90792*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:90795*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90795*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:90798*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90798*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84800000; valaddr_reg:x3; val_offset:90801*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90801*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84800001; valaddr_reg:x3; val_offset:90804*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90804*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84800003; valaddr_reg:x3; val_offset:90807*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90807*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84800007; valaddr_reg:x3; val_offset:90810*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90810*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x8480000f; valaddr_reg:x3; val_offset:90813*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90813*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x8480001f; valaddr_reg:x3; val_offset:90816*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90816*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x8480003f; valaddr_reg:x3; val_offset:90819*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90819*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x8480007f; valaddr_reg:x3; val_offset:90822*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90822*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x848000ff; valaddr_reg:x3; val_offset:90825*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90825*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x848001ff; valaddr_reg:x3; val_offset:90828*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90828*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x848003ff; valaddr_reg:x3; val_offset:90831*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90831*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x848007ff; valaddr_reg:x3; val_offset:90834*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90834*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84800fff; valaddr_reg:x3; val_offset:90837*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90837*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84801fff; valaddr_reg:x3; val_offset:90840*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90840*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84803fff; valaddr_reg:x3; val_offset:90843*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90843*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84807fff; valaddr_reg:x3; val_offset:90846*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90846*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x8480ffff; valaddr_reg:x3; val_offset:90849*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90849*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x8481ffff; valaddr_reg:x3; val_offset:90852*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90852*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x8483ffff; valaddr_reg:x3; val_offset:90855*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90855*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x8487ffff; valaddr_reg:x3; val_offset:90858*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90858*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x848fffff; valaddr_reg:x3; val_offset:90861*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90861*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x849fffff; valaddr_reg:x3; val_offset:90864*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90864*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84bfffff; valaddr_reg:x3; val_offset:90867*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90867*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84c00000; valaddr_reg:x3; val_offset:90870*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90870*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84e00000; valaddr_reg:x3; val_offset:90873*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90873*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84f00000; valaddr_reg:x3; val_offset:90876*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90876*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84f80000; valaddr_reg:x3; val_offset:90879*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90879*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fc0000; valaddr_reg:x3; val_offset:90882*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90882*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fe0000; valaddr_reg:x3; val_offset:90885*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90885*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ff0000; valaddr_reg:x3; val_offset:90888*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90888*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ff8000; valaddr_reg:x3; val_offset:90891*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90891*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ffc000; valaddr_reg:x3; val_offset:90894*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90894*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ffe000; valaddr_reg:x3; val_offset:90897*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90897*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fff000; valaddr_reg:x3; val_offset:90900*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90900*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fff800; valaddr_reg:x3; val_offset:90903*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90903*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fffc00; valaddr_reg:x3; val_offset:90906*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90906*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fffe00; valaddr_reg:x3; val_offset:90909*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90909*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ffff00; valaddr_reg:x3; val_offset:90912*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90912*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ffff80; valaddr_reg:x3; val_offset:90915*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90915*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ffffc0; valaddr_reg:x3; val_offset:90918*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90918*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ffffe0; valaddr_reg:x3; val_offset:90921*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90921*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fffff0; valaddr_reg:x3; val_offset:90924*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90924*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fffff8; valaddr_reg:x3; val_offset:90927*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90927*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fffffc; valaddr_reg:x3; val_offset:90930*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90930*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84fffffe; valaddr_reg:x3; val_offset:90933*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90933*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x179863 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f179863; op2val:0x80000000; +op3val:0x84ffffff; valaddr_reg:x3; val_offset:90936*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90936*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f000001; valaddr_reg:x3; val_offset:90939*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90939*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f000003; valaddr_reg:x3; val_offset:90942*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90942*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f000007; valaddr_reg:x3; val_offset:90945*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90945*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f199999; valaddr_reg:x3; val_offset:90948*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90948*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f249249; valaddr_reg:x3; val_offset:90951*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90951*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f333333; valaddr_reg:x3; val_offset:90954*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90954*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:90957*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90957*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:90960*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90960*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f444444; valaddr_reg:x3; val_offset:90963*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90963*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:90966*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90966*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:90969*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90969*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f666666; valaddr_reg:x3; val_offset:90972*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90972*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:90975*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90975*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:90978*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90978*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:90981*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90981*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:90984*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90984*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x17f015 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x57aaca and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f17f015; op2val:0x3fd7aaca; +op3val:0x7f7fffff; valaddr_reg:x3; val_offset:90987*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90987*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9800000; valaddr_reg:x3; val_offset:90990*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90990*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9800001; valaddr_reg:x3; val_offset:90993*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90993*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9800003; valaddr_reg:x3; val_offset:90996*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90996*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9800007; valaddr_reg:x3; val_offset:90999*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 90999*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf980000f; valaddr_reg:x3; val_offset:91002*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91002*0 + 3*236*FLEN/8, x4, x1, x2) + +inst_30335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf980001f; valaddr_reg:x3; val_offset:91005*0 + 3*236*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91005*0 + 3*236*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405127,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405135,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405151,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405183,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405247,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405375,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174405631,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174406143,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174407167,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174409215,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174413311,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174421503,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174437887,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174470655,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174536191,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174667263,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1174929407,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1175453695,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1176502271,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1178599423,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1178599424,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1180696576,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1181745152,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182269440,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182531584,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182662656,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182728192,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182760960,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182777344,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182785536,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182789632,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182791680,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182792704,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793216,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793472,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793600,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793664,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793696,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793712,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793720,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793724,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793726,32,FLEN) +NAN_BOXED(2132241315,32,FLEN) +NAN_BOXED(3545563,32,FLEN) +NAN_BOXED(1182793727,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981120,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981121,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981123,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981127,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981135,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981151,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981183,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981247,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981375,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981631,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222982143,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222983167,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222985215,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222989311,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222997503,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223013887,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223046655,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223112191,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223243263,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223505407,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2224029695,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2225078271,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2227175423,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2227175424,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2229272576,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2230321152,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2230845440,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231107584,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231238656,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231304192,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231336960,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231353344,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231361536,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231365632,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231367680,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231368704,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369216,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369472,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369600,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369664,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369696,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369712,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369720,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369724,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369726,32,FLEN) +NAN_BOXED(2132252771,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369727,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2132275221,32,FLEN) +NAN_BOXED(1071098570,32,FLEN) +NAN_BOXED(2139095039,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915392,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915393,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915395,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915399,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915407,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915423,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-238.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-238.S new file mode 100644 index 000000000..e0399ecc7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-238.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_30336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf980003f; valaddr_reg:x3; val_offset:91008*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91008*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf980007f; valaddr_reg:x3; val_offset:91011*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91011*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf98000ff; valaddr_reg:x3; val_offset:91014*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91014*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf98001ff; valaddr_reg:x3; val_offset:91017*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91017*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf98003ff; valaddr_reg:x3; val_offset:91020*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91020*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf98007ff; valaddr_reg:x3; val_offset:91023*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91023*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9800fff; valaddr_reg:x3; val_offset:91026*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91026*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9801fff; valaddr_reg:x3; val_offset:91029*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91029*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9803fff; valaddr_reg:x3; val_offset:91032*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91032*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9807fff; valaddr_reg:x3; val_offset:91035*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91035*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf980ffff; valaddr_reg:x3; val_offset:91038*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91038*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf981ffff; valaddr_reg:x3; val_offset:91041*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91041*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf983ffff; valaddr_reg:x3; val_offset:91044*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91044*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf987ffff; valaddr_reg:x3; val_offset:91047*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91047*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf98fffff; valaddr_reg:x3; val_offset:91050*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91050*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf99fffff; valaddr_reg:x3; val_offset:91053*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91053*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9bfffff; valaddr_reg:x3; val_offset:91056*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91056*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9c00000; valaddr_reg:x3; val_offset:91059*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91059*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9e00000; valaddr_reg:x3; val_offset:91062*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91062*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9f00000; valaddr_reg:x3; val_offset:91065*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91065*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9f80000; valaddr_reg:x3; val_offset:91068*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91068*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fc0000; valaddr_reg:x3; val_offset:91071*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91071*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fe0000; valaddr_reg:x3; val_offset:91074*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91074*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ff0000; valaddr_reg:x3; val_offset:91077*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91077*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ff8000; valaddr_reg:x3; val_offset:91080*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91080*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ffc000; valaddr_reg:x3; val_offset:91083*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91083*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ffe000; valaddr_reg:x3; val_offset:91086*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91086*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fff000; valaddr_reg:x3; val_offset:91089*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91089*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fff800; valaddr_reg:x3; val_offset:91092*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91092*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fffc00; valaddr_reg:x3; val_offset:91095*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91095*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fffe00; valaddr_reg:x3; val_offset:91098*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91098*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ffff00; valaddr_reg:x3; val_offset:91101*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91101*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ffff80; valaddr_reg:x3; val_offset:91104*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91104*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ffffc0; valaddr_reg:x3; val_offset:91107*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91107*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ffffe0; valaddr_reg:x3; val_offset:91110*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91110*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fffff0; valaddr_reg:x3; val_offset:91113*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91113*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fffff8; valaddr_reg:x3; val_offset:91116*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91116*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fffffc; valaddr_reg:x3; val_offset:91119*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91119*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9fffffe; valaddr_reg:x3; val_offset:91122*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91122*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xf3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xf9ffffff; valaddr_reg:x3; val_offset:91125*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91125*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff000001; valaddr_reg:x3; val_offset:91128*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91128*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff000003; valaddr_reg:x3; val_offset:91131*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91131*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff000007; valaddr_reg:x3; val_offset:91134*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91134*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff199999; valaddr_reg:x3; val_offset:91137*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91137*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff249249; valaddr_reg:x3; val_offset:91140*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91140*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff333333; valaddr_reg:x3; val_offset:91143*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91143*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:91146*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91146*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:91149*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91149*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff444444; valaddr_reg:x3; val_offset:91152*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91152*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:91155*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91155*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:91158*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91158*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff666666; valaddr_reg:x3; val_offset:91161*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91161*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:91164*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91164*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:91167*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91167*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:91170*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91170*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x181c01 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x576c84 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f181c01; op2val:0xbfd76c84; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:91173*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91173*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:91176*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91176*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:91179*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91179*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:91182*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91182*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:91185*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91185*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:91188*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91188*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:91191*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91191*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:91194*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91194*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:91197*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91197*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:91200*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91200*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:91203*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91203*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:91206*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91206*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:91209*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91209*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:91212*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91212*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:91215*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91215*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:91218*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91218*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:91221*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91221*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81800000; valaddr_reg:x3; val_offset:91224*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91224*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81800001; valaddr_reg:x3; val_offset:91227*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91227*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81800003; valaddr_reg:x3; val_offset:91230*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91230*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81800007; valaddr_reg:x3; val_offset:91233*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91233*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8180000f; valaddr_reg:x3; val_offset:91236*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91236*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8180001f; valaddr_reg:x3; val_offset:91239*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91239*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8180003f; valaddr_reg:x3; val_offset:91242*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91242*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8180007f; valaddr_reg:x3; val_offset:91245*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91245*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x818000ff; valaddr_reg:x3; val_offset:91248*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91248*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x818001ff; valaddr_reg:x3; val_offset:91251*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91251*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x818003ff; valaddr_reg:x3; val_offset:91254*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91254*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x818007ff; valaddr_reg:x3; val_offset:91257*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91257*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81800fff; valaddr_reg:x3; val_offset:91260*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91260*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81801fff; valaddr_reg:x3; val_offset:91263*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91263*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81803fff; valaddr_reg:x3; val_offset:91266*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91266*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81807fff; valaddr_reg:x3; val_offset:91269*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91269*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8180ffff; valaddr_reg:x3; val_offset:91272*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91272*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8181ffff; valaddr_reg:x3; val_offset:91275*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91275*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8183ffff; valaddr_reg:x3; val_offset:91278*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91278*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x8187ffff; valaddr_reg:x3; val_offset:91281*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91281*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x818fffff; valaddr_reg:x3; val_offset:91284*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91284*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x819fffff; valaddr_reg:x3; val_offset:91287*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91287*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81bfffff; valaddr_reg:x3; val_offset:91290*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91290*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81c00000; valaddr_reg:x3; val_offset:91293*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91293*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81e00000; valaddr_reg:x3; val_offset:91296*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91296*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81f00000; valaddr_reg:x3; val_offset:91299*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91299*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81f80000; valaddr_reg:x3; val_offset:91302*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91302*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fc0000; valaddr_reg:x3; val_offset:91305*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91305*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fe0000; valaddr_reg:x3; val_offset:91308*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91308*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ff0000; valaddr_reg:x3; val_offset:91311*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91311*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ff8000; valaddr_reg:x3; val_offset:91314*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91314*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ffc000; valaddr_reg:x3; val_offset:91317*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91317*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ffe000; valaddr_reg:x3; val_offset:91320*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91320*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fff000; valaddr_reg:x3; val_offset:91323*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91323*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fff800; valaddr_reg:x3; val_offset:91326*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91326*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fffc00; valaddr_reg:x3; val_offset:91329*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91329*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fffe00; valaddr_reg:x3; val_offset:91332*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91332*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ffff00; valaddr_reg:x3; val_offset:91335*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91335*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ffff80; valaddr_reg:x3; val_offset:91338*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91338*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ffffc0; valaddr_reg:x3; val_offset:91341*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91341*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ffffe0; valaddr_reg:x3; val_offset:91344*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91344*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fffff0; valaddr_reg:x3; val_offset:91347*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91347*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fffff8; valaddr_reg:x3; val_offset:91350*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91350*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fffffc; valaddr_reg:x3; val_offset:91353*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91353*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81fffffe; valaddr_reg:x3; val_offset:91356*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91356*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1879d2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1879d2; op2val:0x80000000; +op3val:0x81ffffff; valaddr_reg:x3; val_offset:91359*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91359*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3800000; valaddr_reg:x3; val_offset:91362*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91362*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3800001; valaddr_reg:x3; val_offset:91365*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91365*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3800003; valaddr_reg:x3; val_offset:91368*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91368*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3800007; valaddr_reg:x3; val_offset:91371*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91371*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe380000f; valaddr_reg:x3; val_offset:91374*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91374*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe380001f; valaddr_reg:x3; val_offset:91377*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91377*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe380003f; valaddr_reg:x3; val_offset:91380*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91380*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe380007f; valaddr_reg:x3; val_offset:91383*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91383*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe38000ff; valaddr_reg:x3; val_offset:91386*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91386*0 + 3*237*FLEN/8, x4, x1, x2) + +inst_30463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe38001ff; valaddr_reg:x3; val_offset:91389*0 + 3*237*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91389*0 + 3*237*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915455,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915519,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915647,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185915903,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185916415,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185917439,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185919487,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185923583,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185931775,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185948159,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4185980927,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4186046463,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4186177535,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4186439679,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4186963967,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4188012543,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4190109695,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4190109696,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4192206848,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4193255424,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4193779712,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194041856,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194172928,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194238464,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194271232,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194287616,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194295808,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194299904,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194301952,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194302976,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303488,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303744,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303872,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303936,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303968,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303984,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303992,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303996,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303998,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4194303999,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2132286465,32,FLEN) +NAN_BOXED(3218566276,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649472,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649473,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649475,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649479,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649487,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649503,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649535,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649599,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649727,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649983,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172650495,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172651519,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172653567,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172657663,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172665855,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172682239,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172715007,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172780543,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172911615,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2173173759,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2173698047,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2174746623,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2176843775,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2176843776,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2178940928,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2179989504,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180513792,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180775936,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180907008,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2180972544,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181005312,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181021696,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181029888,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181033984,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181036032,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037056,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037568,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037824,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181037952,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038016,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038048,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038064,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038072,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038076,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038078,32,FLEN) +NAN_BOXED(2132310482,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038079,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816640,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816641,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816643,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816647,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816655,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816671,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816703,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816767,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816816895,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816817151,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-239.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-239.S new file mode 100644 index 000000000..190126fb8 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-239.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_30464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe38003ff; valaddr_reg:x3; val_offset:91392*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91392*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe38007ff; valaddr_reg:x3; val_offset:91395*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91395*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3800fff; valaddr_reg:x3; val_offset:91398*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91398*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3801fff; valaddr_reg:x3; val_offset:91401*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91401*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3803fff; valaddr_reg:x3; val_offset:91404*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91404*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3807fff; valaddr_reg:x3; val_offset:91407*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91407*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe380ffff; valaddr_reg:x3; val_offset:91410*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91410*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe381ffff; valaddr_reg:x3; val_offset:91413*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91413*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe383ffff; valaddr_reg:x3; val_offset:91416*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91416*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe387ffff; valaddr_reg:x3; val_offset:91419*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91419*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe38fffff; valaddr_reg:x3; val_offset:91422*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91422*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe39fffff; valaddr_reg:x3; val_offset:91425*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91425*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3bfffff; valaddr_reg:x3; val_offset:91428*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91428*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3c00000; valaddr_reg:x3; val_offset:91431*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91431*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3e00000; valaddr_reg:x3; val_offset:91434*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91434*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3f00000; valaddr_reg:x3; val_offset:91437*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91437*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3f80000; valaddr_reg:x3; val_offset:91440*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91440*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fc0000; valaddr_reg:x3; val_offset:91443*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91443*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fe0000; valaddr_reg:x3; val_offset:91446*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91446*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ff0000; valaddr_reg:x3; val_offset:91449*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91449*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ff8000; valaddr_reg:x3; val_offset:91452*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91452*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ffc000; valaddr_reg:x3; val_offset:91455*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91455*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ffe000; valaddr_reg:x3; val_offset:91458*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91458*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fff000; valaddr_reg:x3; val_offset:91461*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91461*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fff800; valaddr_reg:x3; val_offset:91464*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91464*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fffc00; valaddr_reg:x3; val_offset:91467*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91467*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fffe00; valaddr_reg:x3; val_offset:91470*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91470*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ffff00; valaddr_reg:x3; val_offset:91473*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91473*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ffff80; valaddr_reg:x3; val_offset:91476*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91476*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ffffc0; valaddr_reg:x3; val_offset:91479*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91479*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ffffe0; valaddr_reg:x3; val_offset:91482*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91482*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fffff0; valaddr_reg:x3; val_offset:91485*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91485*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fffff8; valaddr_reg:x3; val_offset:91488*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91488*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fffffc; valaddr_reg:x3; val_offset:91491*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91491*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3fffffe; valaddr_reg:x3; val_offset:91494*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91494*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xc7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xe3ffffff; valaddr_reg:x3; val_offset:91497*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91497*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff000001; valaddr_reg:x3; val_offset:91500*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91500*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff000003; valaddr_reg:x3; val_offset:91503*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91503*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff000007; valaddr_reg:x3; val_offset:91506*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91506*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff199999; valaddr_reg:x3; val_offset:91509*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91509*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff249249; valaddr_reg:x3; val_offset:91512*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91512*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff333333; valaddr_reg:x3; val_offset:91515*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91515*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:91518*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91518*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:91521*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91521*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff444444; valaddr_reg:x3; val_offset:91524*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91524*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:91527*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91527*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:91530*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91530*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff666666; valaddr_reg:x3; val_offset:91533*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91533*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:91536*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91536*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:91539*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91539*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:91542*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91542*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18c423 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x567f6c and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18c423; op2val:0xbfd67f6c; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:91545*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91545*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1800000; valaddr_reg:x3; val_offset:91548*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91548*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1800001; valaddr_reg:x3; val_offset:91551*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91551*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1800003; valaddr_reg:x3; val_offset:91554*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91554*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1800007; valaddr_reg:x3; val_offset:91557*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91557*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe180000f; valaddr_reg:x3; val_offset:91560*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91560*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe180001f; valaddr_reg:x3; val_offset:91563*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91563*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe180003f; valaddr_reg:x3; val_offset:91566*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91566*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe180007f; valaddr_reg:x3; val_offset:91569*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91569*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe18000ff; valaddr_reg:x3; val_offset:91572*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91572*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe18001ff; valaddr_reg:x3; val_offset:91575*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91575*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe18003ff; valaddr_reg:x3; val_offset:91578*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91578*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe18007ff; valaddr_reg:x3; val_offset:91581*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91581*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1800fff; valaddr_reg:x3; val_offset:91584*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91584*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1801fff; valaddr_reg:x3; val_offset:91587*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91587*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1803fff; valaddr_reg:x3; val_offset:91590*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91590*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1807fff; valaddr_reg:x3; val_offset:91593*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91593*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe180ffff; valaddr_reg:x3; val_offset:91596*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91596*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe181ffff; valaddr_reg:x3; val_offset:91599*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91599*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe183ffff; valaddr_reg:x3; val_offset:91602*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91602*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe187ffff; valaddr_reg:x3; val_offset:91605*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91605*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe18fffff; valaddr_reg:x3; val_offset:91608*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91608*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe19fffff; valaddr_reg:x3; val_offset:91611*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91611*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1bfffff; valaddr_reg:x3; val_offset:91614*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91614*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1c00000; valaddr_reg:x3; val_offset:91617*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91617*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1e00000; valaddr_reg:x3; val_offset:91620*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91620*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1f00000; valaddr_reg:x3; val_offset:91623*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91623*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1f80000; valaddr_reg:x3; val_offset:91626*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91626*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fc0000; valaddr_reg:x3; val_offset:91629*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91629*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fe0000; valaddr_reg:x3; val_offset:91632*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91632*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ff0000; valaddr_reg:x3; val_offset:91635*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91635*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ff8000; valaddr_reg:x3; val_offset:91638*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91638*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ffc000; valaddr_reg:x3; val_offset:91641*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91641*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ffe000; valaddr_reg:x3; val_offset:91644*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91644*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fff000; valaddr_reg:x3; val_offset:91647*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91647*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fff800; valaddr_reg:x3; val_offset:91650*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91650*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fffc00; valaddr_reg:x3; val_offset:91653*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91653*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fffe00; valaddr_reg:x3; val_offset:91656*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91656*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ffff00; valaddr_reg:x3; val_offset:91659*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91659*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ffff80; valaddr_reg:x3; val_offset:91662*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91662*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ffffc0; valaddr_reg:x3; val_offset:91665*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91665*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ffffe0; valaddr_reg:x3; val_offset:91668*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91668*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fffff0; valaddr_reg:x3; val_offset:91671*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91671*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fffff8; valaddr_reg:x3; val_offset:91674*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91674*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fffffc; valaddr_reg:x3; val_offset:91677*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91677*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1fffffe; valaddr_reg:x3; val_offset:91680*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91680*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xc3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xe1ffffff; valaddr_reg:x3; val_offset:91683*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91683*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff000001; valaddr_reg:x3; val_offset:91686*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91686*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff000003; valaddr_reg:x3; val_offset:91689*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91689*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff000007; valaddr_reg:x3; val_offset:91692*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91692*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff199999; valaddr_reg:x3; val_offset:91695*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91695*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff249249; valaddr_reg:x3; val_offset:91698*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91698*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff333333; valaddr_reg:x3; val_offset:91701*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91701*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:91704*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91704*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:91707*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91707*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff444444; valaddr_reg:x3; val_offset:91710*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91710*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:91713*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91713*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:91716*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91716*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff666666; valaddr_reg:x3; val_offset:91719*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91719*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:91722*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91722*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:91725*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91725*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:91728*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91728*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x18ee67 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x564424 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f18ee67; op2val:0xbfd64424; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:91731*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91731*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:91734*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91734*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:91737*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91737*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:91740*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91740*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:91743*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91743*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:91746*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91746*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:91749*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91749*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:91752*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91752*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:91755*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91755*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:91758*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91758*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:91761*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91761*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:91764*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91764*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:91767*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91767*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:91770*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91770*0 + 3*238*FLEN/8, x4, x1, x2) + +inst_30591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:91773*0 + 3*238*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91773*0 + 3*238*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816817663,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816818687,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816820735,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816824831,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816833023,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816849407,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816882175,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3816947711,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3817078783,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3817340927,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3817865215,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3818913791,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3821010943,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3821010944,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3823108096,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3824156672,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3824680960,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3824943104,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825074176,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825139712,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825172480,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825188864,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825197056,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825201152,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825203200,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825204224,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825204736,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825204992,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825205120,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825205184,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825205216,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825205232,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825205240,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825205244,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825205246,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(3825205247,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2132329507,32,FLEN) +NAN_BOXED(3218505580,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262208,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262209,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262211,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262215,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262223,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262239,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262271,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262335,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262463,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783262719,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783263231,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783264255,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783266303,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783270399,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783278591,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783294975,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783327743,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783393279,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783524351,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3783786495,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3784310783,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3785359359,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3787456511,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3787456512,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3789553664,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3790602240,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791126528,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791388672,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791519744,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791585280,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791618048,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791634432,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791642624,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791646720,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791648768,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791649792,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650304,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650560,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650688,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650752,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650784,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650800,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650808,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650812,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650814,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(3791650815,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2132340327,32,FLEN) +NAN_BOXED(3218490404,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-24.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-24.S new file mode 100644 index 000000000..c772567fa --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-24.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_2944: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ffe000; valaddr_reg:x3; val_offset:8832*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8832*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2945: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fff000; valaddr_reg:x3; val_offset:8835*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8835*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2946: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fff800; valaddr_reg:x3; val_offset:8838*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8838*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2947: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fffc00; valaddr_reg:x3; val_offset:8841*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8841*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2948: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fffe00; valaddr_reg:x3; val_offset:8844*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8844*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2949: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ffff00; valaddr_reg:x3; val_offset:8847*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8847*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2950: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ffff80; valaddr_reg:x3; val_offset:8850*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8850*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2951: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ffffc0; valaddr_reg:x3; val_offset:8853*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8853*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2952: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ffffe0; valaddr_reg:x3; val_offset:8856*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8856*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2953: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fffff0; valaddr_reg:x3; val_offset:8859*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8859*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2954: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fffff8; valaddr_reg:x3; val_offset:8862*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8862*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2955: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fffffc; valaddr_reg:x3; val_offset:8865*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8865*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2956: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9fffffe; valaddr_reg:x3; val_offset:8868*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8868*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2957: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x628968 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d628968; op2val:0x0; +op3val:0x9ffffff; valaddr_reg:x3; val_offset:8871*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8871*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2958: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34000000; valaddr_reg:x3; val_offset:8874*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8874*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2959: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34000001; valaddr_reg:x3; val_offset:8877*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8877*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2960: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34000003; valaddr_reg:x3; val_offset:8880*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8880*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2961: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34000007; valaddr_reg:x3; val_offset:8883*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8883*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2962: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3400000f; valaddr_reg:x3; val_offset:8886*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8886*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2963: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3400001f; valaddr_reg:x3; val_offset:8889*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8889*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2964: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3400003f; valaddr_reg:x3; val_offset:8892*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8892*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2965: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3400007f; valaddr_reg:x3; val_offset:8895*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8895*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2966: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x340000ff; valaddr_reg:x3; val_offset:8898*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8898*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2967: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x340001ff; valaddr_reg:x3; val_offset:8901*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8901*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2968: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x340003ff; valaddr_reg:x3; val_offset:8904*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8904*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2969: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x340007ff; valaddr_reg:x3; val_offset:8907*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8907*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2970: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34000fff; valaddr_reg:x3; val_offset:8910*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8910*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2971: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34001fff; valaddr_reg:x3; val_offset:8913*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8913*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2972: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34003fff; valaddr_reg:x3; val_offset:8916*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8916*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2973: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34007fff; valaddr_reg:x3; val_offset:8919*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8919*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2974: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3400ffff; valaddr_reg:x3; val_offset:8922*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8922*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2975: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3401ffff; valaddr_reg:x3; val_offset:8925*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8925*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2976: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3403ffff; valaddr_reg:x3; val_offset:8928*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8928*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2977: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3407ffff; valaddr_reg:x3; val_offset:8931*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8931*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2978: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x340fffff; valaddr_reg:x3; val_offset:8934*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8934*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2979: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x341fffff; valaddr_reg:x3; val_offset:8937*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8937*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2980: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x343fffff; valaddr_reg:x3; val_offset:8940*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8940*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2981: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34400000; valaddr_reg:x3; val_offset:8943*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8943*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2982: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34600000; valaddr_reg:x3; val_offset:8946*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8946*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2983: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34700000; valaddr_reg:x3; val_offset:8949*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8949*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2984: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x34780000; valaddr_reg:x3; val_offset:8952*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8952*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2985: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347c0000; valaddr_reg:x3; val_offset:8955*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8955*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2986: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347e0000; valaddr_reg:x3; val_offset:8958*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8958*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2987: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347f0000; valaddr_reg:x3; val_offset:8961*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8961*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2988: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347f8000; valaddr_reg:x3; val_offset:8964*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8964*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2989: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347fc000; valaddr_reg:x3; val_offset:8967*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8967*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2990: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347fe000; valaddr_reg:x3; val_offset:8970*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8970*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2991: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347ff000; valaddr_reg:x3; val_offset:8973*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8973*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2992: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347ff800; valaddr_reg:x3; val_offset:8976*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8976*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2993: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347ffc00; valaddr_reg:x3; val_offset:8979*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8979*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2994: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347ffe00; valaddr_reg:x3; val_offset:8982*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8982*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2995: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347fff00; valaddr_reg:x3; val_offset:8985*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8985*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2996: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347fff80; valaddr_reg:x3; val_offset:8988*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8988*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2997: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347fffc0; valaddr_reg:x3; val_offset:8991*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8991*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2998: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347fffe0; valaddr_reg:x3; val_offset:8994*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8994*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_2999: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347ffff0; valaddr_reg:x3; val_offset:8997*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 8997*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3000: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347ffff8; valaddr_reg:x3; val_offset:9000*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9000*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3001: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347ffffc; valaddr_reg:x3; val_offset:9003*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9003*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3002: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347ffffe; valaddr_reg:x3; val_offset:9006*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9006*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3003: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x68 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x347fffff; valaddr_reg:x3; val_offset:9009*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9009*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3004: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3f800001; valaddr_reg:x3; val_offset:9012*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9012*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3005: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3f800003; valaddr_reg:x3; val_offset:9015*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9015*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3006: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3f800007; valaddr_reg:x3; val_offset:9018*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9018*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3007: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3f999999; valaddr_reg:x3; val_offset:9021*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9021*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3008: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:9024*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9024*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3009: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:9027*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9027*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3010: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:9030*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9030*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3011: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:9033*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9033*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3012: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:9036*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9036*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3013: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:9039*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9039*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3014: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:9042*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9042*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3015: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:9045*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9045*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3016: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:9048*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9048*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3017: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:9051*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9051*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3018: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:9054*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9054*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3019: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x635185 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x102673 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d635185; op2val:0x1902673; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:9057*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9057*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3020: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:9060*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9060*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3021: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:9063*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9063*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3022: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:9066*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9066*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3023: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:9069*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9069*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3024: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:9072*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9072*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3025: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:9075*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9075*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3026: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:9078*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9078*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3027: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:9081*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9081*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3028: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:9084*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9084*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3029: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:9087*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9087*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3030: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:9090*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9090*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3031: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:9093*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9093*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3032: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:9096*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9096*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3033: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:9099*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9099*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3034: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:9102*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9102*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3035: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:9105*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9105*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3036: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85000000; valaddr_reg:x3; val_offset:9108*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9108*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3037: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85000001; valaddr_reg:x3; val_offset:9111*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9111*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3038: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85000003; valaddr_reg:x3; val_offset:9114*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9114*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3039: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85000007; valaddr_reg:x3; val_offset:9117*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9117*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3040: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x8500000f; valaddr_reg:x3; val_offset:9120*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9120*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3041: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x8500001f; valaddr_reg:x3; val_offset:9123*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9123*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3042: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x8500003f; valaddr_reg:x3; val_offset:9126*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9126*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3043: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x8500007f; valaddr_reg:x3; val_offset:9129*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9129*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3044: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x850000ff; valaddr_reg:x3; val_offset:9132*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9132*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3045: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x850001ff; valaddr_reg:x3; val_offset:9135*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9135*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3046: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x850003ff; valaddr_reg:x3; val_offset:9138*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9138*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3047: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x850007ff; valaddr_reg:x3; val_offset:9141*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9141*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3048: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85000fff; valaddr_reg:x3; val_offset:9144*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9144*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3049: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85001fff; valaddr_reg:x3; val_offset:9147*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9147*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3050: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85003fff; valaddr_reg:x3; val_offset:9150*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9150*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3051: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85007fff; valaddr_reg:x3; val_offset:9153*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9153*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3052: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x8500ffff; valaddr_reg:x3; val_offset:9156*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9156*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3053: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x8501ffff; valaddr_reg:x3; val_offset:9159*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9159*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3054: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x8503ffff; valaddr_reg:x3; val_offset:9162*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9162*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3055: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x8507ffff; valaddr_reg:x3; val_offset:9165*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9165*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3056: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x850fffff; valaddr_reg:x3; val_offset:9168*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9168*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3057: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x851fffff; valaddr_reg:x3; val_offset:9171*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9171*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3058: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x853fffff; valaddr_reg:x3; val_offset:9174*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9174*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3059: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85400000; valaddr_reg:x3; val_offset:9177*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9177*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3060: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85600000; valaddr_reg:x3; val_offset:9180*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9180*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3061: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85700000; valaddr_reg:x3; val_offset:9183*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9183*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3062: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x85780000; valaddr_reg:x3; val_offset:9186*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9186*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3063: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857c0000; valaddr_reg:x3; val_offset:9189*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9189*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3064: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857e0000; valaddr_reg:x3; val_offset:9192*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9192*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3065: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857f0000; valaddr_reg:x3; val_offset:9195*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9195*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3066: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857f8000; valaddr_reg:x3; val_offset:9198*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9198*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3067: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857fc000; valaddr_reg:x3; val_offset:9201*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9201*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3068: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857fe000; valaddr_reg:x3; val_offset:9204*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9204*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3069: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857ff000; valaddr_reg:x3; val_offset:9207*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9207*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3070: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857ff800; valaddr_reg:x3; val_offset:9210*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9210*0 + 3*23*FLEN/8, x4, x1, x2) + +inst_3071: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857ffc00; valaddr_reg:x3; val_offset:9213*0 + 3*23*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9213*0 + 3*23*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167763968,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167768064,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167770112,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771136,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771648,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167771904,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772032,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772096,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772128,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772144,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772152,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772156,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772158,32,FLEN) +NAN_BOXED(2103609704,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772159,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415232,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415233,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415235,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415239,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415247,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415263,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415295,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415359,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415487,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872415743,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872416255,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872417279,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872419327,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872423423,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872431615,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872447999,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872480767,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872546303,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872677375,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(872939519,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(873463807,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(874512383,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(876609535,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(876609536,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(878706688,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(879755264,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880279552,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880541696,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880672768,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880738304,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880771072,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880787456,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880795648,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880799744,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880801792,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880802816,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803328,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803584,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803712,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803776,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803808,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803824,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803832,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803836,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803838,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(880803839,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2103660933,32,FLEN) +NAN_BOXED(26224243,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369728,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369729,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369731,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369735,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369743,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369759,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369791,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369855,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369983,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231370239,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231370751,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231371775,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231373823,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231377919,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231386111,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231402495,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231435263,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231500799,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231631871,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231894015,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2232418303,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2233466879,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2235564031,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2235564032,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2237661184,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2238709760,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239234048,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239496192,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239627264,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239692800,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239725568,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239741952,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239750144,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239754240,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239756288,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239757312,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-240.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-240.S new file mode 100644 index 000000000..855c165aa --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-240.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_30592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:91776*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91776*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:91779*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91779*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b800000; valaddr_reg:x3; val_offset:91782*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91782*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b800001; valaddr_reg:x3; val_offset:91785*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91785*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b800003; valaddr_reg:x3; val_offset:91788*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91788*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b800007; valaddr_reg:x3; val_offset:91791*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91791*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b80000f; valaddr_reg:x3; val_offset:91794*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91794*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b80001f; valaddr_reg:x3; val_offset:91797*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91797*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b80003f; valaddr_reg:x3; val_offset:91800*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91800*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b80007f; valaddr_reg:x3; val_offset:91803*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91803*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b8000ff; valaddr_reg:x3; val_offset:91806*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91806*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b8001ff; valaddr_reg:x3; val_offset:91809*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91809*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b8003ff; valaddr_reg:x3; val_offset:91812*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91812*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b8007ff; valaddr_reg:x3; val_offset:91815*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91815*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b800fff; valaddr_reg:x3; val_offset:91818*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91818*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b801fff; valaddr_reg:x3; val_offset:91821*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91821*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b803fff; valaddr_reg:x3; val_offset:91824*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91824*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b807fff; valaddr_reg:x3; val_offset:91827*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91827*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b80ffff; valaddr_reg:x3; val_offset:91830*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91830*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b81ffff; valaddr_reg:x3; val_offset:91833*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91833*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b83ffff; valaddr_reg:x3; val_offset:91836*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91836*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b87ffff; valaddr_reg:x3; val_offset:91839*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91839*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b8fffff; valaddr_reg:x3; val_offset:91842*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91842*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8b9fffff; valaddr_reg:x3; val_offset:91845*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91845*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bbfffff; valaddr_reg:x3; val_offset:91848*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91848*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bc00000; valaddr_reg:x3; val_offset:91851*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91851*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8be00000; valaddr_reg:x3; val_offset:91854*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91854*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bf00000; valaddr_reg:x3; val_offset:91857*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91857*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bf80000; valaddr_reg:x3; val_offset:91860*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91860*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfc0000; valaddr_reg:x3; val_offset:91863*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91863*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfe0000; valaddr_reg:x3; val_offset:91866*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91866*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bff0000; valaddr_reg:x3; val_offset:91869*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91869*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bff8000; valaddr_reg:x3; val_offset:91872*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91872*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bffc000; valaddr_reg:x3; val_offset:91875*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91875*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bffe000; valaddr_reg:x3; val_offset:91878*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91878*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfff000; valaddr_reg:x3; val_offset:91881*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91881*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfff800; valaddr_reg:x3; val_offset:91884*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91884*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfffc00; valaddr_reg:x3; val_offset:91887*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91887*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfffe00; valaddr_reg:x3; val_offset:91890*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91890*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bffff00; valaddr_reg:x3; val_offset:91893*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91893*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bffff80; valaddr_reg:x3; val_offset:91896*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91896*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bffffc0; valaddr_reg:x3; val_offset:91899*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91899*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bffffe0; valaddr_reg:x3; val_offset:91902*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91902*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfffff0; valaddr_reg:x3; val_offset:91905*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91905*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfffff8; valaddr_reg:x3; val_offset:91908*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91908*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfffffc; valaddr_reg:x3; val_offset:91911*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91911*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bfffffe; valaddr_reg:x3; val_offset:91914*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91914*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x191b6f and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f191b6f; op2val:0x80000000; +op3val:0x8bffffff; valaddr_reg:x3; val_offset:91917*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91917*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80000000; valaddr_reg:x3; val_offset:91920*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91920*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:91923*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91923*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:91926*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91926*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:91929*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91929*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x8000000f; valaddr_reg:x3; val_offset:91932*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91932*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x8000001f; valaddr_reg:x3; val_offset:91935*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91935*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x8000003f; valaddr_reg:x3; val_offset:91938*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91938*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x8000007f; valaddr_reg:x3; val_offset:91941*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91941*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x800000ff; valaddr_reg:x3; val_offset:91944*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91944*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x800001ff; valaddr_reg:x3; val_offset:91947*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91947*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x800003ff; valaddr_reg:x3; val_offset:91950*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91950*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x800007ff; valaddr_reg:x3; val_offset:91953*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91953*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80000fff; valaddr_reg:x3; val_offset:91956*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91956*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80001fff; valaddr_reg:x3; val_offset:91959*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91959*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80003fff; valaddr_reg:x3; val_offset:91962*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91962*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80007fff; valaddr_reg:x3; val_offset:91965*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91965*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x8000ffff; valaddr_reg:x3; val_offset:91968*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91968*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x8001ffff; valaddr_reg:x3; val_offset:91971*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91971*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x8003ffff; valaddr_reg:x3; val_offset:91974*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91974*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x8007ffff; valaddr_reg:x3; val_offset:91977*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91977*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x800fffff; valaddr_reg:x3; val_offset:91980*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91980*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x801fffff; valaddr_reg:x3; val_offset:91983*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91983*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x803fffff; valaddr_reg:x3; val_offset:91986*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91986*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80400000; valaddr_reg:x3; val_offset:91989*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91989*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80600000; valaddr_reg:x3; val_offset:91992*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91992*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80700000; valaddr_reg:x3; val_offset:91995*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91995*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80780000; valaddr_reg:x3; val_offset:91998*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 91998*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807c0000; valaddr_reg:x3; val_offset:92001*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92001*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807e0000; valaddr_reg:x3; val_offset:92004*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92004*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807f0000; valaddr_reg:x3; val_offset:92007*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92007*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807f8000; valaddr_reg:x3; val_offset:92010*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92010*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807fc000; valaddr_reg:x3; val_offset:92013*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92013*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807fe000; valaddr_reg:x3; val_offset:92016*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92016*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807ff000; valaddr_reg:x3; val_offset:92019*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92019*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807ff800; valaddr_reg:x3; val_offset:92022*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92022*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807ffc00; valaddr_reg:x3; val_offset:92025*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92025*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807ffe00; valaddr_reg:x3; val_offset:92028*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92028*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807fff00; valaddr_reg:x3; val_offset:92031*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92031*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807fff80; valaddr_reg:x3; val_offset:92034*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92034*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807fffc0; valaddr_reg:x3; val_offset:92037*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92037*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807fffe0; valaddr_reg:x3; val_offset:92040*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92040*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807ffff0; valaddr_reg:x3; val_offset:92043*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92043*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:92046*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92046*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:92049*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92049*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:92052*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92052*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x807fffff; valaddr_reg:x3; val_offset:92055*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92055*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:92058*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92058*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:92061*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92061*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:92064*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92064*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:92067*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92067*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:92070*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92070*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:92073*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92073*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:92076*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92076*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:92079*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92079*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:92082*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92082*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:92085*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92085*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:92088*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92088*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:92091*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92091*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:92094*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92094*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:92097*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92097*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:92100*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92100*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197937 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197937; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:92103*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92103*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:92106*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92106*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:92109*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92109*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:92112*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92112*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:92115*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92115*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:92118*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92118*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:92121*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92121*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:92124*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92124*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:92127*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92127*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:92130*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92130*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:92133*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92133*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:92136*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92136*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:92139*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92139*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:92142*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92142*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:92145*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92145*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:92148*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92148*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:92151*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92151*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6000000; valaddr_reg:x3; val_offset:92154*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92154*0 + 3*239*FLEN/8, x4, x1, x2) + +inst_30719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6000001; valaddr_reg:x3; val_offset:92157*0 + 3*239*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92157*0 + 3*239*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421632,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421633,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421635,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421639,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421647,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421663,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421695,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421759,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421887,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340422143,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340422655,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340423679,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340425727,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340429823,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340438015,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340454399,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340487167,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340552703,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340683775,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340945919,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2341470207,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2342518783,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2344615935,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2344615936,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2346713088,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2347761664,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348285952,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348548096,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348679168,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348744704,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348777472,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348793856,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348802048,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348806144,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348808192,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809216,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809728,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348809984,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810112,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810176,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810208,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810224,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810232,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810236,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810238,32,FLEN) +NAN_BOXED(2132351855,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810239,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483663,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483679,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483711,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483775,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483903,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484159,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484671,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147485695,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147487743,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147491839,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147500031,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147516415,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147549183,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147614719,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147745791,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148007935,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148532223,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149580799,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677951,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677952,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153775104,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154823680,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155347968,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155610112,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155741184,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155806720,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155839488,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155855872,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155864064,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155868160,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155870208,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871232,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871744,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872000,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872128,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872192,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872224,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872240,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872255,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2132375863,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663296,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663297,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-241.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-241.S new file mode 100644 index 000000000..b3bb10f6e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-241.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_30720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6000003; valaddr_reg:x3; val_offset:92160*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92160*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6000007; valaddr_reg:x3; val_offset:92163*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92163*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x600000f; valaddr_reg:x3; val_offset:92166*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92166*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x600001f; valaddr_reg:x3; val_offset:92169*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92169*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x600003f; valaddr_reg:x3; val_offset:92172*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92172*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x600007f; valaddr_reg:x3; val_offset:92175*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92175*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x60000ff; valaddr_reg:x3; val_offset:92178*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92178*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x60001ff; valaddr_reg:x3; val_offset:92181*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92181*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x60003ff; valaddr_reg:x3; val_offset:92184*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92184*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x60007ff; valaddr_reg:x3; val_offset:92187*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92187*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6000fff; valaddr_reg:x3; val_offset:92190*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92190*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6001fff; valaddr_reg:x3; val_offset:92193*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92193*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6003fff; valaddr_reg:x3; val_offset:92196*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92196*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6007fff; valaddr_reg:x3; val_offset:92199*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92199*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x600ffff; valaddr_reg:x3; val_offset:92202*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92202*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x601ffff; valaddr_reg:x3; val_offset:92205*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92205*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x603ffff; valaddr_reg:x3; val_offset:92208*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92208*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x607ffff; valaddr_reg:x3; val_offset:92211*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92211*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x60fffff; valaddr_reg:x3; val_offset:92214*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92214*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x61fffff; valaddr_reg:x3; val_offset:92217*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92217*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x63fffff; valaddr_reg:x3; val_offset:92220*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92220*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6400000; valaddr_reg:x3; val_offset:92223*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92223*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6600000; valaddr_reg:x3; val_offset:92226*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92226*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6700000; valaddr_reg:x3; val_offset:92229*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92229*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x6780000; valaddr_reg:x3; val_offset:92232*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92232*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67c0000; valaddr_reg:x3; val_offset:92235*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92235*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67e0000; valaddr_reg:x3; val_offset:92238*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92238*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67f0000; valaddr_reg:x3; val_offset:92241*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92241*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67f8000; valaddr_reg:x3; val_offset:92244*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92244*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67fc000; valaddr_reg:x3; val_offset:92247*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92247*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67fe000; valaddr_reg:x3; val_offset:92250*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92250*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67ff000; valaddr_reg:x3; val_offset:92253*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92253*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67ff800; valaddr_reg:x3; val_offset:92256*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92256*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67ffc00; valaddr_reg:x3; val_offset:92259*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92259*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67ffe00; valaddr_reg:x3; val_offset:92262*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92262*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67fff00; valaddr_reg:x3; val_offset:92265*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92265*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67fff80; valaddr_reg:x3; val_offset:92268*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92268*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67fffc0; valaddr_reg:x3; val_offset:92271*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92271*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67fffe0; valaddr_reg:x3; val_offset:92274*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92274*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67ffff0; valaddr_reg:x3; val_offset:92277*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92277*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67ffff8; valaddr_reg:x3; val_offset:92280*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92280*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67ffffc; valaddr_reg:x3; val_offset:92283*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92283*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67ffffe; valaddr_reg:x3; val_offset:92286*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92286*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x197c3b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f197c3b; op2val:0x0; +op3val:0x67fffff; valaddr_reg:x3; val_offset:92289*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92289*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf000000; valaddr_reg:x3; val_offset:92292*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92292*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf000001; valaddr_reg:x3; val_offset:92295*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92295*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf000003; valaddr_reg:x3; val_offset:92298*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92298*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf000007; valaddr_reg:x3; val_offset:92301*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92301*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf00000f; valaddr_reg:x3; val_offset:92304*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92304*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf00001f; valaddr_reg:x3; val_offset:92307*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92307*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf00003f; valaddr_reg:x3; val_offset:92310*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92310*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf00007f; valaddr_reg:x3; val_offset:92313*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92313*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf0000ff; valaddr_reg:x3; val_offset:92316*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92316*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf0001ff; valaddr_reg:x3; val_offset:92319*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92319*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf0003ff; valaddr_reg:x3; val_offset:92322*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92322*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf0007ff; valaddr_reg:x3; val_offset:92325*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92325*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf000fff; valaddr_reg:x3; val_offset:92328*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92328*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf001fff; valaddr_reg:x3; val_offset:92331*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92331*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf003fff; valaddr_reg:x3; val_offset:92334*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92334*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf007fff; valaddr_reg:x3; val_offset:92337*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92337*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf00ffff; valaddr_reg:x3; val_offset:92340*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92340*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf01ffff; valaddr_reg:x3; val_offset:92343*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92343*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf03ffff; valaddr_reg:x3; val_offset:92346*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92346*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf07ffff; valaddr_reg:x3; val_offset:92349*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92349*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf0fffff; valaddr_reg:x3; val_offset:92352*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92352*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf1fffff; valaddr_reg:x3; val_offset:92355*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92355*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf3fffff; valaddr_reg:x3; val_offset:92358*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92358*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf400000; valaddr_reg:x3; val_offset:92361*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92361*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf600000; valaddr_reg:x3; val_offset:92364*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92364*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf700000; valaddr_reg:x3; val_offset:92367*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92367*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf780000; valaddr_reg:x3; val_offset:92370*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92370*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7c0000; valaddr_reg:x3; val_offset:92373*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92373*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7e0000; valaddr_reg:x3; val_offset:92376*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92376*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7f0000; valaddr_reg:x3; val_offset:92379*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92379*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7f8000; valaddr_reg:x3; val_offset:92382*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92382*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7fc000; valaddr_reg:x3; val_offset:92385*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92385*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7fe000; valaddr_reg:x3; val_offset:92388*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92388*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7ff000; valaddr_reg:x3; val_offset:92391*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92391*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7ff800; valaddr_reg:x3; val_offset:92394*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92394*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7ffc00; valaddr_reg:x3; val_offset:92397*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92397*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7ffe00; valaddr_reg:x3; val_offset:92400*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92400*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7fff00; valaddr_reg:x3; val_offset:92403*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92403*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7fff80; valaddr_reg:x3; val_offset:92406*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92406*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7fffc0; valaddr_reg:x3; val_offset:92409*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92409*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7fffe0; valaddr_reg:x3; val_offset:92412*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92412*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7ffff0; valaddr_reg:x3; val_offset:92415*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92415*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7ffff8; valaddr_reg:x3; val_offset:92418*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92418*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7ffffc; valaddr_reg:x3; val_offset:92421*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92421*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7ffffe; valaddr_reg:x3; val_offset:92424*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92424*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf7fffff; valaddr_reg:x3; val_offset:92427*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92427*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf800001; valaddr_reg:x3; val_offset:92430*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92430*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf800003; valaddr_reg:x3; val_offset:92433*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92433*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf800007; valaddr_reg:x3; val_offset:92436*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92436*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbf999999; valaddr_reg:x3; val_offset:92439*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92439*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:92442*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92442*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:92445*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92445*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:92448*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92448*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:92451*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92451*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:92454*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92454*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:92457*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92457*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:92460*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92460*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:92463*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92463*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:92466*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92466*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:92469*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92469*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:92472*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92472*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1990f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x355854 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1990f9; op2val:0x80355854; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:92475*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92475*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:92478*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92478*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:92481*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92481*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:92484*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92484*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:92487*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92487*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:92490*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92490*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:92493*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92493*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:92496*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92496*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:92499*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92499*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:92502*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92502*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:92505*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92505*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:92508*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92508*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:92511*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92511*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:92514*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92514*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:92517*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92517*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:92520*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92520*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:92523*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92523*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86000000; valaddr_reg:x3; val_offset:92526*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92526*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86000001; valaddr_reg:x3; val_offset:92529*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92529*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86000003; valaddr_reg:x3; val_offset:92532*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92532*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86000007; valaddr_reg:x3; val_offset:92535*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92535*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8600000f; valaddr_reg:x3; val_offset:92538*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92538*0 + 3*240*FLEN/8, x4, x1, x2) + +inst_30847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8600001f; valaddr_reg:x3; val_offset:92541*0 + 3*240*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92541*0 + 3*240*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663299,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663303,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663311,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663327,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663359,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663423,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663551,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663807,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100664319,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100665343,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100667391,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100671487,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100679679,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100696063,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100728831,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100794367,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100925439,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(101187583,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(101711871,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(102760447,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(104857599,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(104857600,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(106954752,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108003328,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108527616,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108789760,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108920832,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108986368,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109019136,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109035520,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109043712,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109047808,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109049856,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109050880,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051392,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051648,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051776,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051840,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051872,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051888,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051896,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051900,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051902,32,FLEN) +NAN_BOXED(2132376635,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051903,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448256,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448257,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448259,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448263,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448271,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448287,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448319,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448383,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448511,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204448767,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204449279,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204450303,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204452351,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204456447,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204464639,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204481023,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204513791,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204579327,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204710399,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3204972543,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3205496831,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3206545407,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3208642559,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3208642560,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3210739712,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3211788288,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212312576,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212574720,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212705792,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212771328,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212804096,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212820480,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212828672,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212832768,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212834816,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212835840,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836352,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836608,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836736,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836800,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836832,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836848,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836856,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836860,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836862,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836863,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132381945,32,FLEN) +NAN_BOXED(2150979668,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146944,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146945,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146947,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146951,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146959,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146975,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-242.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-242.S new file mode 100644 index 000000000..a64253616 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-242.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_30848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8600003f; valaddr_reg:x3; val_offset:92544*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92544*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8600007f; valaddr_reg:x3; val_offset:92547*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92547*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x860000ff; valaddr_reg:x3; val_offset:92550*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92550*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x860001ff; valaddr_reg:x3; val_offset:92553*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92553*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x860003ff; valaddr_reg:x3; val_offset:92556*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92556*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x860007ff; valaddr_reg:x3; val_offset:92559*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92559*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86000fff; valaddr_reg:x3; val_offset:92562*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92562*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86001fff; valaddr_reg:x3; val_offset:92565*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92565*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86003fff; valaddr_reg:x3; val_offset:92568*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92568*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86007fff; valaddr_reg:x3; val_offset:92571*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92571*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8600ffff; valaddr_reg:x3; val_offset:92574*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92574*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8601ffff; valaddr_reg:x3; val_offset:92577*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92577*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8603ffff; valaddr_reg:x3; val_offset:92580*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92580*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x8607ffff; valaddr_reg:x3; val_offset:92583*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92583*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x860fffff; valaddr_reg:x3; val_offset:92586*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92586*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x861fffff; valaddr_reg:x3; val_offset:92589*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92589*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x863fffff; valaddr_reg:x3; val_offset:92592*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92592*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86400000; valaddr_reg:x3; val_offset:92595*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92595*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86600000; valaddr_reg:x3; val_offset:92598*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92598*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86700000; valaddr_reg:x3; val_offset:92601*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92601*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x86780000; valaddr_reg:x3; val_offset:92604*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92604*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867c0000; valaddr_reg:x3; val_offset:92607*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92607*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867e0000; valaddr_reg:x3; val_offset:92610*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92610*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867f0000; valaddr_reg:x3; val_offset:92613*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92613*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867f8000; valaddr_reg:x3; val_offset:92616*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92616*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867fc000; valaddr_reg:x3; val_offset:92619*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92619*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867fe000; valaddr_reg:x3; val_offset:92622*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92622*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867ff000; valaddr_reg:x3; val_offset:92625*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92625*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867ff800; valaddr_reg:x3; val_offset:92628*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92628*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867ffc00; valaddr_reg:x3; val_offset:92631*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92631*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867ffe00; valaddr_reg:x3; val_offset:92634*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92634*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867fff00; valaddr_reg:x3; val_offset:92637*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92637*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867fff80; valaddr_reg:x3; val_offset:92640*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92640*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867fffc0; valaddr_reg:x3; val_offset:92643*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92643*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867fffe0; valaddr_reg:x3; val_offset:92646*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92646*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867ffff0; valaddr_reg:x3; val_offset:92649*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92649*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867ffff8; valaddr_reg:x3; val_offset:92652*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92652*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867ffffc; valaddr_reg:x3; val_offset:92655*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92655*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867ffffe; valaddr_reg:x3; val_offset:92658*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92658*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1a35e0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1a35e0; op2val:0x80000000; +op3val:0x867fffff; valaddr_reg:x3; val_offset:92661*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92661*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:92664*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92664*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:92667*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92667*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:92670*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92670*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:92673*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92673*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:92676*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92676*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:92679*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92679*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:92682*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92682*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:92685*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92685*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:92688*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92688*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:92691*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92691*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:92694*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92694*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:92697*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92697*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:92700*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92700*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:92703*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92703*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:92706*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92706*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:92709*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92709*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa000000; valaddr_reg:x3; val_offset:92712*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92712*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa000001; valaddr_reg:x3; val_offset:92715*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92715*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa000003; valaddr_reg:x3; val_offset:92718*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92718*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa000007; valaddr_reg:x3; val_offset:92721*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92721*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa00000f; valaddr_reg:x3; val_offset:92724*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92724*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa00001f; valaddr_reg:x3; val_offset:92727*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92727*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa00003f; valaddr_reg:x3; val_offset:92730*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92730*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa00007f; valaddr_reg:x3; val_offset:92733*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92733*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa0000ff; valaddr_reg:x3; val_offset:92736*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92736*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa0001ff; valaddr_reg:x3; val_offset:92739*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92739*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa0003ff; valaddr_reg:x3; val_offset:92742*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92742*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa0007ff; valaddr_reg:x3; val_offset:92745*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92745*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa000fff; valaddr_reg:x3; val_offset:92748*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92748*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa001fff; valaddr_reg:x3; val_offset:92751*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92751*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa003fff; valaddr_reg:x3; val_offset:92754*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92754*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa007fff; valaddr_reg:x3; val_offset:92757*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92757*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa00ffff; valaddr_reg:x3; val_offset:92760*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92760*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa01ffff; valaddr_reg:x3; val_offset:92763*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92763*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa03ffff; valaddr_reg:x3; val_offset:92766*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92766*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa07ffff; valaddr_reg:x3; val_offset:92769*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92769*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa0fffff; valaddr_reg:x3; val_offset:92772*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92772*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa1fffff; valaddr_reg:x3; val_offset:92775*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92775*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa3fffff; valaddr_reg:x3; val_offset:92778*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92778*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa400000; valaddr_reg:x3; val_offset:92781*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92781*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa600000; valaddr_reg:x3; val_offset:92784*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92784*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa700000; valaddr_reg:x3; val_offset:92787*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92787*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa780000; valaddr_reg:x3; val_offset:92790*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92790*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7c0000; valaddr_reg:x3; val_offset:92793*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92793*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7e0000; valaddr_reg:x3; val_offset:92796*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92796*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7f0000; valaddr_reg:x3; val_offset:92799*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92799*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7f8000; valaddr_reg:x3; val_offset:92802*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92802*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7fc000; valaddr_reg:x3; val_offset:92805*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92805*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7fe000; valaddr_reg:x3; val_offset:92808*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92808*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7ff000; valaddr_reg:x3; val_offset:92811*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92811*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7ff800; valaddr_reg:x3; val_offset:92814*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92814*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7ffc00; valaddr_reg:x3; val_offset:92817*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92817*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7ffe00; valaddr_reg:x3; val_offset:92820*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92820*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7fff00; valaddr_reg:x3; val_offset:92823*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92823*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7fff80; valaddr_reg:x3; val_offset:92826*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92826*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7fffc0; valaddr_reg:x3; val_offset:92829*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92829*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7fffe0; valaddr_reg:x3; val_offset:92832*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92832*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7ffff0; valaddr_reg:x3; val_offset:92835*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92835*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7ffff8; valaddr_reg:x3; val_offset:92838*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92838*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7ffffc; valaddr_reg:x3; val_offset:92841*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92841*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7ffffe; valaddr_reg:x3; val_offset:92844*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92844*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1af462 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1af462; op2val:0x0; +op3val:0xa7fffff; valaddr_reg:x3; val_offset:92847*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92847*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80800000; valaddr_reg:x3; val_offset:92850*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92850*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:92853*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92853*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:92856*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92856*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:92859*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92859*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x8080000f; valaddr_reg:x3; val_offset:92862*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92862*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x8080001f; valaddr_reg:x3; val_offset:92865*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92865*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x8080003f; valaddr_reg:x3; val_offset:92868*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92868*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x8080007f; valaddr_reg:x3; val_offset:92871*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92871*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x808000ff; valaddr_reg:x3; val_offset:92874*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92874*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x808001ff; valaddr_reg:x3; val_offset:92877*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92877*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x808003ff; valaddr_reg:x3; val_offset:92880*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92880*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x808007ff; valaddr_reg:x3; val_offset:92883*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92883*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80800fff; valaddr_reg:x3; val_offset:92886*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92886*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80801fff; valaddr_reg:x3; val_offset:92889*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92889*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80803fff; valaddr_reg:x3; val_offset:92892*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92892*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80807fff; valaddr_reg:x3; val_offset:92895*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92895*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x8080ffff; valaddr_reg:x3; val_offset:92898*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92898*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x8081ffff; valaddr_reg:x3; val_offset:92901*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92901*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x8083ffff; valaddr_reg:x3; val_offset:92904*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92904*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x8087ffff; valaddr_reg:x3; val_offset:92907*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92907*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x808fffff; valaddr_reg:x3; val_offset:92910*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92910*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:92913*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92913*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x809fffff; valaddr_reg:x3; val_offset:92916*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92916*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:92919*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92919*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:92922*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92922*0 + 3*241*FLEN/8, x4, x1, x2) + +inst_30975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:92925*0 + 3*241*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92925*0 + 3*241*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147007,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147071,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147199,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147455,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147967,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248148991,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248151039,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248155135,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248163327,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248179711,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248212479,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248278015,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248409087,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248671231,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2249195519,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2250244095,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2252341247,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2252341248,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2254438400,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2255486976,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256011264,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256273408,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256404480,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256470016,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256502784,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256519168,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256527360,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256531456,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256533504,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256534528,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535040,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535296,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535424,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535488,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535520,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535536,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535544,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535548,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535550,32,FLEN) +NAN_BOXED(2132424160,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535551,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772160,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772161,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772163,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772167,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772175,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772191,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772223,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772287,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772415,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772671,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167773183,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167774207,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167776255,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167780351,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167788543,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167804927,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167837695,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167903231,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168034303,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168296447,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168820735,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(169869311,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(171966463,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(171966464,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(174063616,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175112192,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175636480,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175898624,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176029696,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176095232,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176128000,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176144384,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176152576,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176156672,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176158720,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176159744,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160256,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160512,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160640,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160704,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160736,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160752,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160760,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160764,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160766,32,FLEN) +NAN_BOXED(2132472930,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160767,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872256,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872271,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872287,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872319,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872383,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872511,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872767,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155873279,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155874303,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155876351,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155880447,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155888639,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155905023,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155937791,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156003327,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156134399,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156396543,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156920831,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157969407,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-243.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-243.S new file mode 100644 index 000000000..2e01f9f07 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-243.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_30976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:92928*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92928*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80bfffff; valaddr_reg:x3; val_offset:92931*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92931*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80c00000; valaddr_reg:x3; val_offset:92934*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92934*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:92937*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92937*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:92940*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92940*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:92943*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92943*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80e00000; valaddr_reg:x3; val_offset:92946*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92946*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:92949*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92949*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:92952*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92952*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80f00000; valaddr_reg:x3; val_offset:92955*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92955*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80f80000; valaddr_reg:x3; val_offset:92958*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92958*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fc0000; valaddr_reg:x3; val_offset:92961*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92961*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fe0000; valaddr_reg:x3; val_offset:92964*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92964*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ff0000; valaddr_reg:x3; val_offset:92967*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92967*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ff8000; valaddr_reg:x3; val_offset:92970*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92970*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ffc000; valaddr_reg:x3; val_offset:92973*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92973*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ffe000; valaddr_reg:x3; val_offset:92976*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92976*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fff000; valaddr_reg:x3; val_offset:92979*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92979*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fff800; valaddr_reg:x3; val_offset:92982*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92982*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fffc00; valaddr_reg:x3; val_offset:92985*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92985*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fffe00; valaddr_reg:x3; val_offset:92988*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92988*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ffff00; valaddr_reg:x3; val_offset:92991*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92991*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ffff80; valaddr_reg:x3; val_offset:92994*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92994*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_30999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ffffc0; valaddr_reg:x3; val_offset:92997*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 92997*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ffffe0; valaddr_reg:x3; val_offset:93000*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93000*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fffff0; valaddr_reg:x3; val_offset:93003*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93003*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:93006*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93006*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:93009*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93009*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:93012*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93012*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1b9172 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1b9172; op2val:0x80000000; +op3val:0x80ffffff; valaddr_reg:x3; val_offset:93015*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93015*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:93018*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93018*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:93021*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93021*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:93024*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93024*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:93027*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93027*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:93030*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93030*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:93033*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93033*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:93036*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93036*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:93039*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93039*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:93042*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93042*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:93045*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93045*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:93048*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93048*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:93051*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93051*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:93054*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93054*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:93057*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93057*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:93060*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93060*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:93063*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93063*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b000000; valaddr_reg:x3; val_offset:93066*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93066*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b000001; valaddr_reg:x3; val_offset:93069*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93069*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b000003; valaddr_reg:x3; val_offset:93072*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93072*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b000007; valaddr_reg:x3; val_offset:93075*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93075*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b00000f; valaddr_reg:x3; val_offset:93078*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93078*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b00001f; valaddr_reg:x3; val_offset:93081*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93081*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b00003f; valaddr_reg:x3; val_offset:93084*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93084*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b00007f; valaddr_reg:x3; val_offset:93087*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93087*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b0000ff; valaddr_reg:x3; val_offset:93090*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93090*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b0001ff; valaddr_reg:x3; val_offset:93093*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93093*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b0003ff; valaddr_reg:x3; val_offset:93096*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93096*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b0007ff; valaddr_reg:x3; val_offset:93099*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93099*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b000fff; valaddr_reg:x3; val_offset:93102*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93102*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b001fff; valaddr_reg:x3; val_offset:93105*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93105*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b003fff; valaddr_reg:x3; val_offset:93108*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93108*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b007fff; valaddr_reg:x3; val_offset:93111*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93111*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b00ffff; valaddr_reg:x3; val_offset:93114*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93114*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b01ffff; valaddr_reg:x3; val_offset:93117*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93117*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b03ffff; valaddr_reg:x3; val_offset:93120*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93120*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b07ffff; valaddr_reg:x3; val_offset:93123*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93123*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b0fffff; valaddr_reg:x3; val_offset:93126*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93126*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b1fffff; valaddr_reg:x3; val_offset:93129*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93129*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b3fffff; valaddr_reg:x3; val_offset:93132*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93132*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b400000; valaddr_reg:x3; val_offset:93135*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93135*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b600000; valaddr_reg:x3; val_offset:93138*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93138*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b700000; valaddr_reg:x3; val_offset:93141*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93141*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b780000; valaddr_reg:x3; val_offset:93144*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93144*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7c0000; valaddr_reg:x3; val_offset:93147*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93147*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7e0000; valaddr_reg:x3; val_offset:93150*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93150*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7f0000; valaddr_reg:x3; val_offset:93153*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93153*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7f8000; valaddr_reg:x3; val_offset:93156*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93156*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7fc000; valaddr_reg:x3; val_offset:93159*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93159*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7fe000; valaddr_reg:x3; val_offset:93162*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93162*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7ff000; valaddr_reg:x3; val_offset:93165*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93165*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7ff800; valaddr_reg:x3; val_offset:93168*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93168*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:93171*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93171*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:93174*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93174*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7fff00; valaddr_reg:x3; val_offset:93177*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93177*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7fff80; valaddr_reg:x3; val_offset:93180*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93180*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:93183*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93183*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:93186*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93186*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:93189*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93189*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:93192*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93192*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:93195*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93195*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:93198*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93198*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1c60ac and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1c60ac; op2val:0x80000000; +op3val:0x8b7fffff; valaddr_reg:x3; val_offset:93201*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93201*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32000000; valaddr_reg:x3; val_offset:93204*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93204*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32000001; valaddr_reg:x3; val_offset:93207*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93207*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32000003; valaddr_reg:x3; val_offset:93210*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93210*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32000007; valaddr_reg:x3; val_offset:93213*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93213*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3200000f; valaddr_reg:x3; val_offset:93216*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93216*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3200001f; valaddr_reg:x3; val_offset:93219*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93219*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3200003f; valaddr_reg:x3; val_offset:93222*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93222*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3200007f; valaddr_reg:x3; val_offset:93225*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93225*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x320000ff; valaddr_reg:x3; val_offset:93228*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93228*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x320001ff; valaddr_reg:x3; val_offset:93231*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93231*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x320003ff; valaddr_reg:x3; val_offset:93234*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93234*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x320007ff; valaddr_reg:x3; val_offset:93237*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93237*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32000fff; valaddr_reg:x3; val_offset:93240*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93240*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32001fff; valaddr_reg:x3; val_offset:93243*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93243*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32003fff; valaddr_reg:x3; val_offset:93246*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93246*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32007fff; valaddr_reg:x3; val_offset:93249*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93249*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3200ffff; valaddr_reg:x3; val_offset:93252*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93252*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3201ffff; valaddr_reg:x3; val_offset:93255*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93255*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3203ffff; valaddr_reg:x3; val_offset:93258*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93258*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3207ffff; valaddr_reg:x3; val_offset:93261*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93261*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x320fffff; valaddr_reg:x3; val_offset:93264*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93264*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x321fffff; valaddr_reg:x3; val_offset:93267*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93267*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x323fffff; valaddr_reg:x3; val_offset:93270*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93270*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32400000; valaddr_reg:x3; val_offset:93273*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93273*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32600000; valaddr_reg:x3; val_offset:93276*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93276*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32700000; valaddr_reg:x3; val_offset:93279*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93279*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x32780000; valaddr_reg:x3; val_offset:93282*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93282*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327c0000; valaddr_reg:x3; val_offset:93285*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93285*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327e0000; valaddr_reg:x3; val_offset:93288*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93288*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327f0000; valaddr_reg:x3; val_offset:93291*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93291*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327f8000; valaddr_reg:x3; val_offset:93294*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93294*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327fc000; valaddr_reg:x3; val_offset:93297*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93297*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327fe000; valaddr_reg:x3; val_offset:93300*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93300*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327ff000; valaddr_reg:x3; val_offset:93303*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93303*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327ff800; valaddr_reg:x3; val_offset:93306*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93306*0 + 3*242*FLEN/8, x4, x1, x2) + +inst_31103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327ffc00; valaddr_reg:x3; val_offset:93309*0 + 3*242*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93309*0 + 3*242*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160066559,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160066560,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162163712,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163212288,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163736576,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163998720,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164129792,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164195328,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164228096,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164244480,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164252672,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164256768,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164258816,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164259840,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260352,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260608,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260736,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260800,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260832,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260848,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2132513138,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260863,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033024,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033025,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033027,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033031,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033039,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033055,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033087,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033151,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033279,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033535,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332034047,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332035071,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332037119,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332041215,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332049407,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332065791,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332098559,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332164095,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332295167,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332557311,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2333081599,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2334130175,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2336227327,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2336227328,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2338324480,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2339373056,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2339897344,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340159488,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340290560,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340356096,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340388864,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340405248,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340413440,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340417536,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340419584,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340420608,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421120,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421376,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421504,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421568,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421600,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421616,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421624,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421628,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421630,32,FLEN) +NAN_BOXED(2132566188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421631,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838860800,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838860801,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838860803,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838860807,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838860815,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838860831,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838860863,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838860927,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838861055,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838861311,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838861823,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838862847,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838864895,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838868991,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838877183,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838893567,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838926335,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(838991871,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(839122943,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(839385087,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(839909375,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(840957951,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(843055103,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(843055104,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(845152256,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(846200832,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(846725120,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(846987264,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847118336,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847183872,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847216640,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847233024,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847241216,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847245312,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847247360,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847248384,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-244.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-244.S new file mode 100644 index 000000000..8368fa92b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-244.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_31104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327ffe00; valaddr_reg:x3; val_offset:93312*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93312*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327fff00; valaddr_reg:x3; val_offset:93315*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93315*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327fff80; valaddr_reg:x3; val_offset:93318*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93318*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327fffc0; valaddr_reg:x3; val_offset:93321*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93321*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327fffe0; valaddr_reg:x3; val_offset:93324*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93324*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327ffff0; valaddr_reg:x3; val_offset:93327*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93327*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327ffff8; valaddr_reg:x3; val_offset:93330*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93330*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327ffffc; valaddr_reg:x3; val_offset:93333*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93333*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327ffffe; valaddr_reg:x3; val_offset:93336*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93336*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x64 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x327fffff; valaddr_reg:x3; val_offset:93339*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93339*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3f800001; valaddr_reg:x3; val_offset:93342*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93342*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3f800003; valaddr_reg:x3; val_offset:93345*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93345*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3f800007; valaddr_reg:x3; val_offset:93348*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93348*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3f999999; valaddr_reg:x3; val_offset:93351*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93351*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:93354*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93354*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:93357*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93357*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:93360*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93360*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:93363*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93363*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:93366*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93366*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:93369*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93369*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:93372*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93372*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:93375*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93375*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:93378*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93378*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:93381*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93381*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:93384*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93384*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ce318 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x343744 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ce318; op2val:0x343744; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:93387*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93387*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbf800001; valaddr_reg:x3; val_offset:93390*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93390*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbf800003; valaddr_reg:x3; val_offset:93393*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93393*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbf800007; valaddr_reg:x3; val_offset:93396*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93396*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbf999999; valaddr_reg:x3; val_offset:93399*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93399*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:93402*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93402*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:93405*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93405*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:93408*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93408*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:93411*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93411*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:93414*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93414*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:93417*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93417*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:93420*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93420*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:93423*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93423*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:93426*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93426*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:93429*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93429*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:93432*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93432*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:93435*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93435*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1000000; valaddr_reg:x3; val_offset:93438*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93438*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1000001; valaddr_reg:x3; val_offset:93441*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93441*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1000003; valaddr_reg:x3; val_offset:93444*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93444*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1000007; valaddr_reg:x3; val_offset:93447*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93447*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc100000f; valaddr_reg:x3; val_offset:93450*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93450*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc100001f; valaddr_reg:x3; val_offset:93453*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93453*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc100003f; valaddr_reg:x3; val_offset:93456*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93456*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc100007f; valaddr_reg:x3; val_offset:93459*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93459*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc10000ff; valaddr_reg:x3; val_offset:93462*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93462*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc10001ff; valaddr_reg:x3; val_offset:93465*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93465*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc10003ff; valaddr_reg:x3; val_offset:93468*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93468*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc10007ff; valaddr_reg:x3; val_offset:93471*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93471*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1000fff; valaddr_reg:x3; val_offset:93474*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93474*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1001fff; valaddr_reg:x3; val_offset:93477*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93477*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1003fff; valaddr_reg:x3; val_offset:93480*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93480*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1007fff; valaddr_reg:x3; val_offset:93483*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93483*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc100ffff; valaddr_reg:x3; val_offset:93486*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93486*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc101ffff; valaddr_reg:x3; val_offset:93489*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93489*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc103ffff; valaddr_reg:x3; val_offset:93492*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93492*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc107ffff; valaddr_reg:x3; val_offset:93495*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93495*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc10fffff; valaddr_reg:x3; val_offset:93498*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93498*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc11fffff; valaddr_reg:x3; val_offset:93501*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93501*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc13fffff; valaddr_reg:x3; val_offset:93504*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93504*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1400000; valaddr_reg:x3; val_offset:93507*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93507*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1600000; valaddr_reg:x3; val_offset:93510*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93510*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1700000; valaddr_reg:x3; val_offset:93513*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93513*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc1780000; valaddr_reg:x3; val_offset:93516*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93516*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17c0000; valaddr_reg:x3; val_offset:93519*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93519*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17e0000; valaddr_reg:x3; val_offset:93522*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93522*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17f0000; valaddr_reg:x3; val_offset:93525*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93525*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17f8000; valaddr_reg:x3; val_offset:93528*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93528*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17fc000; valaddr_reg:x3; val_offset:93531*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93531*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17fe000; valaddr_reg:x3; val_offset:93534*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93534*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17ff000; valaddr_reg:x3; val_offset:93537*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93537*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17ff800; valaddr_reg:x3; val_offset:93540*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93540*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17ffc00; valaddr_reg:x3; val_offset:93543*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93543*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17ffe00; valaddr_reg:x3; val_offset:93546*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93546*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17fff00; valaddr_reg:x3; val_offset:93549*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93549*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17fff80; valaddr_reg:x3; val_offset:93552*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93552*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17fffc0; valaddr_reg:x3; val_offset:93555*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93555*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17fffe0; valaddr_reg:x3; val_offset:93558*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93558*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17ffff0; valaddr_reg:x3; val_offset:93561*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93561*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17ffff8; valaddr_reg:x3; val_offset:93564*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93564*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17ffffc; valaddr_reg:x3; val_offset:93567*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93567*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17ffffe; valaddr_reg:x3; val_offset:93570*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93570*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1cea9c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3434c4 and fs3 == 1 and fe3 == 0x82 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1cea9c; op2val:0x803434c4; +op3val:0xc17fffff; valaddr_reg:x3; val_offset:93573*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93573*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:93576*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93576*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:93579*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93579*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:93582*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93582*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:93585*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93585*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:93588*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93588*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:93591*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93591*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:93594*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93594*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:93597*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93597*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:93600*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93600*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:93603*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93603*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:93606*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93606*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:93609*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93609*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:93612*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93612*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:93615*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93615*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:93618*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93618*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:93621*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93621*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6000000; valaddr_reg:x3; val_offset:93624*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93624*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6000001; valaddr_reg:x3; val_offset:93627*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93627*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6000003; valaddr_reg:x3; val_offset:93630*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93630*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6000007; valaddr_reg:x3; val_offset:93633*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93633*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x600000f; valaddr_reg:x3; val_offset:93636*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93636*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x600001f; valaddr_reg:x3; val_offset:93639*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93639*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x600003f; valaddr_reg:x3; val_offset:93642*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93642*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x600007f; valaddr_reg:x3; val_offset:93645*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93645*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x60000ff; valaddr_reg:x3; val_offset:93648*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93648*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x60001ff; valaddr_reg:x3; val_offset:93651*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93651*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x60003ff; valaddr_reg:x3; val_offset:93654*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93654*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x60007ff; valaddr_reg:x3; val_offset:93657*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93657*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6000fff; valaddr_reg:x3; val_offset:93660*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93660*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6001fff; valaddr_reg:x3; val_offset:93663*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93663*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6003fff; valaddr_reg:x3; val_offset:93666*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93666*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6007fff; valaddr_reg:x3; val_offset:93669*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93669*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x600ffff; valaddr_reg:x3; val_offset:93672*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93672*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x601ffff; valaddr_reg:x3; val_offset:93675*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93675*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x603ffff; valaddr_reg:x3; val_offset:93678*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93678*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x607ffff; valaddr_reg:x3; val_offset:93681*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93681*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x60fffff; valaddr_reg:x3; val_offset:93684*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93684*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x61fffff; valaddr_reg:x3; val_offset:93687*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93687*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x63fffff; valaddr_reg:x3; val_offset:93690*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93690*0 + 3*243*FLEN/8, x4, x1, x2) + +inst_31231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6400000; valaddr_reg:x3; val_offset:93693*0 + 3*243*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93693*0 + 3*243*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847248896,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249152,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249280,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249344,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249376,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249392,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249400,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249404,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249406,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(847249407,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132599576,32,FLEN) +NAN_BOXED(3422020,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002688,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002689,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002691,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002695,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002703,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002719,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002751,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002815,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238002943,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238003199,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238003711,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238004735,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238006783,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238010879,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238019071,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238035455,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238068223,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238133759,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238264831,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3238526975,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3239051263,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3240099839,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3242196991,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3242196992,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3244294144,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3245342720,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3245867008,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246129152,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246260224,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246325760,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246358528,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246374912,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246383104,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246387200,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246389248,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246390272,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246390784,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391040,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391168,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391232,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391264,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391280,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391288,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391292,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391294,32,FLEN) +NAN_BOXED(2132601500,32,FLEN) +NAN_BOXED(2150905028,32,FLEN) +NAN_BOXED(3246391295,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663296,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663297,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663299,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663303,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663311,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663327,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663359,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663423,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663551,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663807,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100664319,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100665343,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100667391,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100671487,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100679679,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100696063,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100728831,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100794367,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100925439,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(101187583,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(101711871,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(102760447,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(104857599,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(104857600,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-245.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-245.S new file mode 100644 index 000000000..4209ed540 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-245.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_31232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6600000; valaddr_reg:x3; val_offset:93696*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93696*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6700000; valaddr_reg:x3; val_offset:93699*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93699*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x6780000; valaddr_reg:x3; val_offset:93702*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93702*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67c0000; valaddr_reg:x3; val_offset:93705*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93705*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67e0000; valaddr_reg:x3; val_offset:93708*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93708*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67f0000; valaddr_reg:x3; val_offset:93711*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93711*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67f8000; valaddr_reg:x3; val_offset:93714*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93714*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67fc000; valaddr_reg:x3; val_offset:93717*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93717*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67fe000; valaddr_reg:x3; val_offset:93720*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93720*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67ff000; valaddr_reg:x3; val_offset:93723*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93723*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67ff800; valaddr_reg:x3; val_offset:93726*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93726*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67ffc00; valaddr_reg:x3; val_offset:93729*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93729*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67ffe00; valaddr_reg:x3; val_offset:93732*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93732*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67fff00; valaddr_reg:x3; val_offset:93735*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93735*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67fff80; valaddr_reg:x3; val_offset:93738*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93738*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67fffc0; valaddr_reg:x3; val_offset:93741*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93741*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67fffe0; valaddr_reg:x3; val_offset:93744*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93744*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67ffff0; valaddr_reg:x3; val_offset:93747*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93747*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67ffff8; valaddr_reg:x3; val_offset:93750*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93750*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67ffffc; valaddr_reg:x3; val_offset:93753*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93753*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67ffffe; valaddr_reg:x3; val_offset:93756*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93756*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d1427 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d1427; op2val:0x0; +op3val:0x67fffff; valaddr_reg:x3; val_offset:93759*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93759*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:93762*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93762*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:93765*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93765*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:93768*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93768*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:93771*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93771*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:93774*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93774*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:93777*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93777*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:93780*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93780*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:93783*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93783*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:93786*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93786*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:93789*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93789*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:93792*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93792*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:93795*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93795*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:93798*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93798*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:93801*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93801*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:93804*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93804*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:93807*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93807*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a000000; valaddr_reg:x3; val_offset:93810*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93810*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a000001; valaddr_reg:x3; val_offset:93813*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93813*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a000003; valaddr_reg:x3; val_offset:93816*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93816*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a000007; valaddr_reg:x3; val_offset:93819*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93819*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a00000f; valaddr_reg:x3; val_offset:93822*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93822*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a00001f; valaddr_reg:x3; val_offset:93825*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93825*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a00003f; valaddr_reg:x3; val_offset:93828*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93828*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a00007f; valaddr_reg:x3; val_offset:93831*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93831*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a0000ff; valaddr_reg:x3; val_offset:93834*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93834*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a0001ff; valaddr_reg:x3; val_offset:93837*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93837*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a0003ff; valaddr_reg:x3; val_offset:93840*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93840*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a0007ff; valaddr_reg:x3; val_offset:93843*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93843*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a000fff; valaddr_reg:x3; val_offset:93846*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93846*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a001fff; valaddr_reg:x3; val_offset:93849*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93849*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a003fff; valaddr_reg:x3; val_offset:93852*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93852*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a007fff; valaddr_reg:x3; val_offset:93855*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93855*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a00ffff; valaddr_reg:x3; val_offset:93858*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93858*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a01ffff; valaddr_reg:x3; val_offset:93861*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93861*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a03ffff; valaddr_reg:x3; val_offset:93864*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93864*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a07ffff; valaddr_reg:x3; val_offset:93867*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93867*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a0fffff; valaddr_reg:x3; val_offset:93870*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93870*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a1fffff; valaddr_reg:x3; val_offset:93873*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93873*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a3fffff; valaddr_reg:x3; val_offset:93876*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93876*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a400000; valaddr_reg:x3; val_offset:93879*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93879*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a600000; valaddr_reg:x3; val_offset:93882*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93882*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a700000; valaddr_reg:x3; val_offset:93885*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93885*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a780000; valaddr_reg:x3; val_offset:93888*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93888*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7c0000; valaddr_reg:x3; val_offset:93891*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93891*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7e0000; valaddr_reg:x3; val_offset:93894*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93894*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7f0000; valaddr_reg:x3; val_offset:93897*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93897*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7f8000; valaddr_reg:x3; val_offset:93900*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93900*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7fc000; valaddr_reg:x3; val_offset:93903*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93903*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7fe000; valaddr_reg:x3; val_offset:93906*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93906*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7ff000; valaddr_reg:x3; val_offset:93909*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93909*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7ff800; valaddr_reg:x3; val_offset:93912*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93912*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:93915*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93915*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:93918*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93918*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7fff00; valaddr_reg:x3; val_offset:93921*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93921*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7fff80; valaddr_reg:x3; val_offset:93924*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93924*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:93927*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93927*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:93930*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93930*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:93933*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93933*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:93936*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93936*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:93939*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93939*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:93942*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93942*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1d52dc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1d52dc; op2val:0x80000000; +op3val:0x8a7fffff; valaddr_reg:x3; val_offset:93945*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93945*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:93948*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93948*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:93951*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93951*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:93954*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93954*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:93957*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93957*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:93960*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93960*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:93963*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93963*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:93966*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93966*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:93969*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93969*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:93972*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93972*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:93975*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93975*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:93978*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93978*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:93981*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93981*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:93984*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93984*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:93987*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93987*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:93990*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93990*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:93993*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93993*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86800000; valaddr_reg:x3; val_offset:93996*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93996*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86800001; valaddr_reg:x3; val_offset:93999*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 93999*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86800003; valaddr_reg:x3; val_offset:94002*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94002*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86800007; valaddr_reg:x3; val_offset:94005*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94005*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8680000f; valaddr_reg:x3; val_offset:94008*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94008*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8680001f; valaddr_reg:x3; val_offset:94011*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94011*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8680003f; valaddr_reg:x3; val_offset:94014*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94014*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8680007f; valaddr_reg:x3; val_offset:94017*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94017*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x868000ff; valaddr_reg:x3; val_offset:94020*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94020*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x868001ff; valaddr_reg:x3; val_offset:94023*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94023*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x868003ff; valaddr_reg:x3; val_offset:94026*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94026*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x868007ff; valaddr_reg:x3; val_offset:94029*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94029*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86800fff; valaddr_reg:x3; val_offset:94032*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94032*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86801fff; valaddr_reg:x3; val_offset:94035*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94035*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86803fff; valaddr_reg:x3; val_offset:94038*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94038*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86807fff; valaddr_reg:x3; val_offset:94041*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94041*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8680ffff; valaddr_reg:x3; val_offset:94044*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94044*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8681ffff; valaddr_reg:x3; val_offset:94047*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94047*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8683ffff; valaddr_reg:x3; val_offset:94050*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94050*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x8687ffff; valaddr_reg:x3; val_offset:94053*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94053*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x868fffff; valaddr_reg:x3; val_offset:94056*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94056*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x869fffff; valaddr_reg:x3; val_offset:94059*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94059*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86bfffff; valaddr_reg:x3; val_offset:94062*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94062*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86c00000; valaddr_reg:x3; val_offset:94065*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94065*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86e00000; valaddr_reg:x3; val_offset:94068*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94068*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86f00000; valaddr_reg:x3; val_offset:94071*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94071*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86f80000; valaddr_reg:x3; val_offset:94074*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94074*0 + 3*244*FLEN/8, x4, x1, x2) + +inst_31359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fc0000; valaddr_reg:x3; val_offset:94077*0 + 3*244*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94077*0 + 3*244*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(106954752,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108003328,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108527616,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108789760,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108920832,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(108986368,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109019136,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109035520,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109043712,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109047808,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109049856,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109050880,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051392,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051648,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051776,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051840,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051872,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051888,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051896,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051900,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051902,32,FLEN) +NAN_BOXED(2132612135,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051903,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255808,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255809,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255811,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255815,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255823,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255839,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255871,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255935,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256063,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256319,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256831,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315257855,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315259903,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315263999,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315272191,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315288575,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315321343,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315386879,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315517951,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315780095,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2316304383,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2317352959,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2319450111,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2319450112,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2321547264,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2322595840,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323120128,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323382272,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323513344,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323578880,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323611648,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323628032,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323636224,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323640320,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323642368,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323643392,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323643904,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644160,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644288,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644352,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644384,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644400,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644408,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644412,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644414,32,FLEN) +NAN_BOXED(2132628188,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644415,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535552,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535553,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535555,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535559,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535567,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535583,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535615,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535679,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535807,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256536063,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256536575,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256537599,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256539647,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256543743,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256551935,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256568319,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256601087,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256666623,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256797695,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2257059839,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2257584127,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2258632703,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2260729855,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2260729856,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2262827008,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2263875584,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264399872,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264662016,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-246.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-246.S new file mode 100644 index 000000000..170c99581 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-246.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_31360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fe0000; valaddr_reg:x3; val_offset:94080*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94080*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ff0000; valaddr_reg:x3; val_offset:94083*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94083*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ff8000; valaddr_reg:x3; val_offset:94086*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94086*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ffc000; valaddr_reg:x3; val_offset:94089*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94089*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ffe000; valaddr_reg:x3; val_offset:94092*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94092*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fff000; valaddr_reg:x3; val_offset:94095*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94095*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fff800; valaddr_reg:x3; val_offset:94098*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94098*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fffc00; valaddr_reg:x3; val_offset:94101*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94101*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fffe00; valaddr_reg:x3; val_offset:94104*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94104*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ffff00; valaddr_reg:x3; val_offset:94107*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94107*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ffff80; valaddr_reg:x3; val_offset:94110*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94110*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ffffc0; valaddr_reg:x3; val_offset:94113*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94113*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ffffe0; valaddr_reg:x3; val_offset:94116*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94116*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fffff0; valaddr_reg:x3; val_offset:94119*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94119*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fffff8; valaddr_reg:x3; val_offset:94122*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94122*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fffffc; valaddr_reg:x3; val_offset:94125*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94125*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86fffffe; valaddr_reg:x3; val_offset:94128*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94128*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1dd1fe and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1dd1fe; op2val:0x80000000; +op3val:0x86ffffff; valaddr_reg:x3; val_offset:94131*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94131*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1000000; valaddr_reg:x3; val_offset:94134*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94134*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1000001; valaddr_reg:x3; val_offset:94137*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94137*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1000003; valaddr_reg:x3; val_offset:94140*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94140*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1000007; valaddr_reg:x3; val_offset:94143*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94143*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb100000f; valaddr_reg:x3; val_offset:94146*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94146*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb100001f; valaddr_reg:x3; val_offset:94149*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94149*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb100003f; valaddr_reg:x3; val_offset:94152*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94152*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb100007f; valaddr_reg:x3; val_offset:94155*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94155*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb10000ff; valaddr_reg:x3; val_offset:94158*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94158*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb10001ff; valaddr_reg:x3; val_offset:94161*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94161*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb10003ff; valaddr_reg:x3; val_offset:94164*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94164*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb10007ff; valaddr_reg:x3; val_offset:94167*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94167*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1000fff; valaddr_reg:x3; val_offset:94170*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94170*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1001fff; valaddr_reg:x3; val_offset:94173*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94173*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1003fff; valaddr_reg:x3; val_offset:94176*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94176*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1007fff; valaddr_reg:x3; val_offset:94179*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94179*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb100ffff; valaddr_reg:x3; val_offset:94182*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94182*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb101ffff; valaddr_reg:x3; val_offset:94185*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94185*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb103ffff; valaddr_reg:x3; val_offset:94188*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94188*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb107ffff; valaddr_reg:x3; val_offset:94191*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94191*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb10fffff; valaddr_reg:x3; val_offset:94194*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94194*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb11fffff; valaddr_reg:x3; val_offset:94197*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94197*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb13fffff; valaddr_reg:x3; val_offset:94200*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94200*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1400000; valaddr_reg:x3; val_offset:94203*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94203*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1600000; valaddr_reg:x3; val_offset:94206*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94206*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1700000; valaddr_reg:x3; val_offset:94209*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94209*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb1780000; valaddr_reg:x3; val_offset:94212*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94212*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17c0000; valaddr_reg:x3; val_offset:94215*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94215*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17e0000; valaddr_reg:x3; val_offset:94218*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94218*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17f0000; valaddr_reg:x3; val_offset:94221*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94221*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17f8000; valaddr_reg:x3; val_offset:94224*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94224*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17fc000; valaddr_reg:x3; val_offset:94227*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94227*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17fe000; valaddr_reg:x3; val_offset:94230*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94230*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17ff000; valaddr_reg:x3; val_offset:94233*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94233*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17ff800; valaddr_reg:x3; val_offset:94236*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94236*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17ffc00; valaddr_reg:x3; val_offset:94239*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94239*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17ffe00; valaddr_reg:x3; val_offset:94242*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94242*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17fff00; valaddr_reg:x3; val_offset:94245*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94245*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17fff80; valaddr_reg:x3; val_offset:94248*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94248*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17fffc0; valaddr_reg:x3; val_offset:94251*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94251*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17fffe0; valaddr_reg:x3; val_offset:94254*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94254*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17ffff0; valaddr_reg:x3; val_offset:94257*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94257*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17ffff8; valaddr_reg:x3; val_offset:94260*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94260*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17ffffc; valaddr_reg:x3; val_offset:94263*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94263*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17ffffe; valaddr_reg:x3; val_offset:94266*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94266*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x62 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xb17fffff; valaddr_reg:x3; val_offset:94269*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94269*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbf800001; valaddr_reg:x3; val_offset:94272*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94272*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbf800003; valaddr_reg:x3; val_offset:94275*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94275*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbf800007; valaddr_reg:x3; val_offset:94278*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94278*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbf999999; valaddr_reg:x3; val_offset:94281*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94281*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:94284*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94284*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:94287*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94287*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:94290*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94290*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:94293*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94293*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:94296*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94296*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:94299*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94299*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:94302*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94302*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:94305*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94305*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:94308*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94308*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:94311*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94311*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:94314*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94314*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1df653 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x33dc49 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1df653; op2val:0x8033dc49; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:94317*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94317*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80000000; valaddr_reg:x3; val_offset:94320*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94320*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:94323*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94323*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:94326*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94326*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:94329*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94329*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8000000f; valaddr_reg:x3; val_offset:94332*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94332*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8000001f; valaddr_reg:x3; val_offset:94335*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94335*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8000003f; valaddr_reg:x3; val_offset:94338*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94338*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8000007f; valaddr_reg:x3; val_offset:94341*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94341*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x800000ff; valaddr_reg:x3; val_offset:94344*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94344*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x800001ff; valaddr_reg:x3; val_offset:94347*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94347*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x800003ff; valaddr_reg:x3; val_offset:94350*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94350*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x800007ff; valaddr_reg:x3; val_offset:94353*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94353*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80000fff; valaddr_reg:x3; val_offset:94356*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94356*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80001fff; valaddr_reg:x3; val_offset:94359*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94359*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80003fff; valaddr_reg:x3; val_offset:94362*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94362*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80007fff; valaddr_reg:x3; val_offset:94365*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94365*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8000ffff; valaddr_reg:x3; val_offset:94368*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94368*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8001ffff; valaddr_reg:x3; val_offset:94371*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94371*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8003ffff; valaddr_reg:x3; val_offset:94374*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94374*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8007ffff; valaddr_reg:x3; val_offset:94377*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94377*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x800fffff; valaddr_reg:x3; val_offset:94380*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94380*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:94383*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94383*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x801fffff; valaddr_reg:x3; val_offset:94386*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94386*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:94389*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94389*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:94392*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94392*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:94395*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94395*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:94398*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94398*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x803fffff; valaddr_reg:x3; val_offset:94401*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94401*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80400000; valaddr_reg:x3; val_offset:94404*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94404*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:94407*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94407*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:94410*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94410*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:94413*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94413*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80600000; valaddr_reg:x3; val_offset:94416*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94416*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:94419*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94419*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:94422*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94422*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80700000; valaddr_reg:x3; val_offset:94425*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94425*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x80780000; valaddr_reg:x3; val_offset:94428*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94428*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807c0000; valaddr_reg:x3; val_offset:94431*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94431*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807e0000; valaddr_reg:x3; val_offset:94434*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94434*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807f0000; valaddr_reg:x3; val_offset:94437*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94437*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807f8000; valaddr_reg:x3; val_offset:94440*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94440*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807fc000; valaddr_reg:x3; val_offset:94443*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94443*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807fe000; valaddr_reg:x3; val_offset:94446*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94446*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807ff000; valaddr_reg:x3; val_offset:94449*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94449*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807ff800; valaddr_reg:x3; val_offset:94452*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94452*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807ffc00; valaddr_reg:x3; val_offset:94455*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94455*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807ffe00; valaddr_reg:x3; val_offset:94458*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94458*0 + 3*245*FLEN/8, x4, x1, x2) + +inst_31487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807fff00; valaddr_reg:x3; val_offset:94461*0 + 3*245*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94461*0 + 3*245*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264793088,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264858624,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264891392,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264907776,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264915968,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264920064,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264922112,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923136,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923648,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923904,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924032,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924096,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924128,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924144,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924152,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924156,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924158,32,FLEN) +NAN_BOXED(2132660734,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924159,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567232,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567233,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567235,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567239,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567247,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567263,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567295,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567359,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567487,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969567743,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969568255,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969569279,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969571327,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969575423,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969583615,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969599999,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969632767,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969698303,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2969829375,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2970091519,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2970615807,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2971664383,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2973761535,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2973761536,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2975858688,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2976907264,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977431552,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977693696,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977824768,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977890304,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977923072,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977939456,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977947648,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977951744,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977953792,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977954816,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955328,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955584,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955712,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955776,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955808,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955824,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955832,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955836,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955838,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(2977955839,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132670035,32,FLEN) +NAN_BOXED(2150882377,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483663,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483679,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483711,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483775,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483903,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484159,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484671,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147485695,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147487743,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147491839,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147500031,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147516415,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147549183,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147614719,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147745791,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148007935,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148532223,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149580799,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677951,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677952,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153775104,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154823680,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155347968,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155610112,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155741184,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155806720,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155839488,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155855872,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155864064,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155868160,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155870208,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871232,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871744,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872000,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-247.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-247.S new file mode 100644 index 000000000..35bacb51a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-247.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_31488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807fff80; valaddr_reg:x3; val_offset:94464*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94464*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807fffc0; valaddr_reg:x3; val_offset:94467*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94467*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807fffe0; valaddr_reg:x3; val_offset:94470*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94470*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807ffff0; valaddr_reg:x3; val_offset:94473*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94473*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:94476*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94476*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:94479*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94479*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:94482*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94482*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e5ec7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e5ec7; op2val:0x80000000; +op3val:0x807fffff; valaddr_reg:x3; val_offset:94485*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94485*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:94488*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94488*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:94491*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94491*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:94494*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94494*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:94497*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94497*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:94500*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94500*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:94503*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94503*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:94506*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94506*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:94509*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94509*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:94512*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94512*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:94515*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94515*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:94518*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94518*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:94521*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94521*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:94524*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94524*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:94527*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94527*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:94530*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94530*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:94533*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94533*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d000000; valaddr_reg:x3; val_offset:94536*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94536*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d000001; valaddr_reg:x3; val_offset:94539*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94539*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d000003; valaddr_reg:x3; val_offset:94542*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94542*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d000007; valaddr_reg:x3; val_offset:94545*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94545*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d00000f; valaddr_reg:x3; val_offset:94548*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94548*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d00001f; valaddr_reg:x3; val_offset:94551*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94551*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d00003f; valaddr_reg:x3; val_offset:94554*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94554*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d00007f; valaddr_reg:x3; val_offset:94557*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94557*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d0000ff; valaddr_reg:x3; val_offset:94560*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94560*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d0001ff; valaddr_reg:x3; val_offset:94563*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94563*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d0003ff; valaddr_reg:x3; val_offset:94566*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94566*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d0007ff; valaddr_reg:x3; val_offset:94569*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94569*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d000fff; valaddr_reg:x3; val_offset:94572*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94572*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d001fff; valaddr_reg:x3; val_offset:94575*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94575*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d003fff; valaddr_reg:x3; val_offset:94578*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94578*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d007fff; valaddr_reg:x3; val_offset:94581*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94581*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d00ffff; valaddr_reg:x3; val_offset:94584*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94584*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d01ffff; valaddr_reg:x3; val_offset:94587*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94587*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d03ffff; valaddr_reg:x3; val_offset:94590*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94590*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d07ffff; valaddr_reg:x3; val_offset:94593*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94593*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d0fffff; valaddr_reg:x3; val_offset:94596*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94596*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d1fffff; valaddr_reg:x3; val_offset:94599*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94599*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d3fffff; valaddr_reg:x3; val_offset:94602*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94602*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d400000; valaddr_reg:x3; val_offset:94605*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94605*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d600000; valaddr_reg:x3; val_offset:94608*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94608*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d700000; valaddr_reg:x3; val_offset:94611*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94611*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d780000; valaddr_reg:x3; val_offset:94614*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94614*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7c0000; valaddr_reg:x3; val_offset:94617*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94617*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7e0000; valaddr_reg:x3; val_offset:94620*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94620*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7f0000; valaddr_reg:x3; val_offset:94623*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94623*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7f8000; valaddr_reg:x3; val_offset:94626*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94626*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7fc000; valaddr_reg:x3; val_offset:94629*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94629*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7fe000; valaddr_reg:x3; val_offset:94632*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94632*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7ff000; valaddr_reg:x3; val_offset:94635*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94635*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7ff800; valaddr_reg:x3; val_offset:94638*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94638*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:94641*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94641*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:94644*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94644*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7fff00; valaddr_reg:x3; val_offset:94647*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94647*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7fff80; valaddr_reg:x3; val_offset:94650*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94650*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:94653*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94653*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:94656*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94656*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:94659*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94659*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:94662*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94662*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:94665*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94665*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:94668*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94668*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e6765 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e6765; op2val:0x80000000; +op3val:0x8d7fffff; valaddr_reg:x3; val_offset:94671*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94671*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26800000; valaddr_reg:x3; val_offset:94674*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94674*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26800001; valaddr_reg:x3; val_offset:94677*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94677*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26800003; valaddr_reg:x3; val_offset:94680*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94680*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26800007; valaddr_reg:x3; val_offset:94683*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94683*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x2680000f; valaddr_reg:x3; val_offset:94686*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94686*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x2680001f; valaddr_reg:x3; val_offset:94689*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94689*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x2680003f; valaddr_reg:x3; val_offset:94692*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94692*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x2680007f; valaddr_reg:x3; val_offset:94695*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94695*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x268000ff; valaddr_reg:x3; val_offset:94698*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94698*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x268001ff; valaddr_reg:x3; val_offset:94701*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94701*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x268003ff; valaddr_reg:x3; val_offset:94704*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94704*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x268007ff; valaddr_reg:x3; val_offset:94707*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94707*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26800fff; valaddr_reg:x3; val_offset:94710*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94710*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26801fff; valaddr_reg:x3; val_offset:94713*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94713*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26803fff; valaddr_reg:x3; val_offset:94716*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94716*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26807fff; valaddr_reg:x3; val_offset:94719*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94719*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x2680ffff; valaddr_reg:x3; val_offset:94722*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94722*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x2681ffff; valaddr_reg:x3; val_offset:94725*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94725*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x2683ffff; valaddr_reg:x3; val_offset:94728*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94728*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x2687ffff; valaddr_reg:x3; val_offset:94731*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94731*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x268fffff; valaddr_reg:x3; val_offset:94734*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94734*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x269fffff; valaddr_reg:x3; val_offset:94737*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94737*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26bfffff; valaddr_reg:x3; val_offset:94740*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94740*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26c00000; valaddr_reg:x3; val_offset:94743*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94743*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26e00000; valaddr_reg:x3; val_offset:94746*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94746*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26f00000; valaddr_reg:x3; val_offset:94749*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94749*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26f80000; valaddr_reg:x3; val_offset:94752*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94752*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fc0000; valaddr_reg:x3; val_offset:94755*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94755*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fe0000; valaddr_reg:x3; val_offset:94758*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94758*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ff0000; valaddr_reg:x3; val_offset:94761*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94761*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ff8000; valaddr_reg:x3; val_offset:94764*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94764*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ffc000; valaddr_reg:x3; val_offset:94767*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94767*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ffe000; valaddr_reg:x3; val_offset:94770*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94770*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fff000; valaddr_reg:x3; val_offset:94773*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94773*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fff800; valaddr_reg:x3; val_offset:94776*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94776*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fffc00; valaddr_reg:x3; val_offset:94779*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94779*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fffe00; valaddr_reg:x3; val_offset:94782*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94782*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ffff00; valaddr_reg:x3; val_offset:94785*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94785*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ffff80; valaddr_reg:x3; val_offset:94788*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94788*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ffffc0; valaddr_reg:x3; val_offset:94791*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94791*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ffffe0; valaddr_reg:x3; val_offset:94794*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94794*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fffff0; valaddr_reg:x3; val_offset:94797*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94797*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fffff8; valaddr_reg:x3; val_offset:94800*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94800*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fffffc; valaddr_reg:x3; val_offset:94803*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94803*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26fffffe; valaddr_reg:x3; val_offset:94806*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94806*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x4d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x26ffffff; valaddr_reg:x3; val_offset:94809*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94809*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3f800001; valaddr_reg:x3; val_offset:94812*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94812*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3f800003; valaddr_reg:x3; val_offset:94815*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94815*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3f800007; valaddr_reg:x3; val_offset:94818*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94818*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3f999999; valaddr_reg:x3; val_offset:94821*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94821*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:94824*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94824*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:94827*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94827*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:94830*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94830*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:94833*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94833*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:94836*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94836*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:94839*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94839*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:94842*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94842*0 + 3*246*FLEN/8, x4, x1, x2) + +inst_31615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:94845*0 + 3*246*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94845*0 + 3*246*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872128,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872192,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872224,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872240,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132696775,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872255,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587456,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587457,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587459,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587463,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587471,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587487,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587519,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587583,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587711,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587967,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365588479,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365589503,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365591551,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365595647,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365603839,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365620223,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365652991,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365718527,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365849599,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2366111743,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2366636031,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2367684607,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2369781759,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2369781760,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2371878912,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2372927488,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373451776,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373713920,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373844992,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373910528,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373943296,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373959680,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373967872,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373971968,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373974016,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975040,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975552,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975808,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975936,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976000,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976032,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976048,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976056,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976060,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976062,32,FLEN) +NAN_BOXED(2132698981,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976063,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645922816,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645922817,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645922819,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645922823,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645922831,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645922847,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645922879,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645922943,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645923071,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645923327,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645923839,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645924863,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645926911,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645931007,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645939199,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645955583,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(645988351,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(646053887,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(646184959,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(646447103,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(646971391,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(648019967,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(650117119,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(650117120,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(652214272,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(653262848,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(653787136,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654049280,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654180352,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654245888,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654278656,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654295040,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654303232,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654307328,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654309376,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654310400,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654310912,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311168,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311296,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311360,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311392,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311408,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311416,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311420,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311422,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(654311423,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-248.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-248.S new file mode 100644 index 000000000..8629823d7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-248.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_31616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:94848*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94848*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:94851*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94851*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:94854*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94854*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1e7357 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x33b35f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1e7357; op2val:0x33b35f; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:94857*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94857*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:94860*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94860*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:94863*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94863*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:94866*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94866*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:94869*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94869*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:94872*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94872*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:94875*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94875*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:94878*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94878*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:94881*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94881*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:94884*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94884*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:94887*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94887*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:94890*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94890*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:94893*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94893*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:94896*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94896*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:94899*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94899*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:94902*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94902*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:94905*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94905*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e000000; valaddr_reg:x3; val_offset:94908*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94908*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e000001; valaddr_reg:x3; val_offset:94911*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94911*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e000003; valaddr_reg:x3; val_offset:94914*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94914*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e000007; valaddr_reg:x3; val_offset:94917*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94917*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e00000f; valaddr_reg:x3; val_offset:94920*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94920*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e00001f; valaddr_reg:x3; val_offset:94923*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94923*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e00003f; valaddr_reg:x3; val_offset:94926*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94926*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e00007f; valaddr_reg:x3; val_offset:94929*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94929*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e0000ff; valaddr_reg:x3; val_offset:94932*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94932*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e0001ff; valaddr_reg:x3; val_offset:94935*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94935*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e0003ff; valaddr_reg:x3; val_offset:94938*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94938*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e0007ff; valaddr_reg:x3; val_offset:94941*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94941*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e000fff; valaddr_reg:x3; val_offset:94944*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94944*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e001fff; valaddr_reg:x3; val_offset:94947*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94947*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e003fff; valaddr_reg:x3; val_offset:94950*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94950*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e007fff; valaddr_reg:x3; val_offset:94953*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94953*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e00ffff; valaddr_reg:x3; val_offset:94956*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94956*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e01ffff; valaddr_reg:x3; val_offset:94959*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94959*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e03ffff; valaddr_reg:x3; val_offset:94962*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94962*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e07ffff; valaddr_reg:x3; val_offset:94965*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94965*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e0fffff; valaddr_reg:x3; val_offset:94968*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94968*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e1fffff; valaddr_reg:x3; val_offset:94971*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94971*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e3fffff; valaddr_reg:x3; val_offset:94974*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94974*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e400000; valaddr_reg:x3; val_offset:94977*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94977*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e600000; valaddr_reg:x3; val_offset:94980*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94980*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e700000; valaddr_reg:x3; val_offset:94983*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94983*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e780000; valaddr_reg:x3; val_offset:94986*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94986*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7c0000; valaddr_reg:x3; val_offset:94989*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94989*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7e0000; valaddr_reg:x3; val_offset:94992*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94992*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7f0000; valaddr_reg:x3; val_offset:94995*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94995*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7f8000; valaddr_reg:x3; val_offset:94998*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 94998*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7fc000; valaddr_reg:x3; val_offset:95001*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95001*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7fe000; valaddr_reg:x3; val_offset:95004*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95004*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7ff000; valaddr_reg:x3; val_offset:95007*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95007*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7ff800; valaddr_reg:x3; val_offset:95010*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95010*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7ffc00; valaddr_reg:x3; val_offset:95013*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95013*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7ffe00; valaddr_reg:x3; val_offset:95016*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95016*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7fff00; valaddr_reg:x3; val_offset:95019*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95019*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7fff80; valaddr_reg:x3; val_offset:95022*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95022*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7fffc0; valaddr_reg:x3; val_offset:95025*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95025*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7fffe0; valaddr_reg:x3; val_offset:95028*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95028*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7ffff0; valaddr_reg:x3; val_offset:95031*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95031*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7ffff8; valaddr_reg:x3; val_offset:95034*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95034*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7ffffc; valaddr_reg:x3; val_offset:95037*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95037*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7ffffe; valaddr_reg:x3; val_offset:95040*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95040*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1ec80b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1ec80b; op2val:0x80000000; +op3val:0x8e7fffff; valaddr_reg:x3; val_offset:95043*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95043*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3800000; valaddr_reg:x3; val_offset:95046*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95046*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3800001; valaddr_reg:x3; val_offset:95049*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95049*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3800003; valaddr_reg:x3; val_offset:95052*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95052*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3800007; valaddr_reg:x3; val_offset:95055*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95055*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa380000f; valaddr_reg:x3; val_offset:95058*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95058*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa380001f; valaddr_reg:x3; val_offset:95061*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95061*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa380003f; valaddr_reg:x3; val_offset:95064*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95064*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa380007f; valaddr_reg:x3; val_offset:95067*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95067*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa38000ff; valaddr_reg:x3; val_offset:95070*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95070*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa38001ff; valaddr_reg:x3; val_offset:95073*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95073*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa38003ff; valaddr_reg:x3; val_offset:95076*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95076*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa38007ff; valaddr_reg:x3; val_offset:95079*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95079*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3800fff; valaddr_reg:x3; val_offset:95082*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95082*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3801fff; valaddr_reg:x3; val_offset:95085*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95085*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3803fff; valaddr_reg:x3; val_offset:95088*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95088*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3807fff; valaddr_reg:x3; val_offset:95091*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95091*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa380ffff; valaddr_reg:x3; val_offset:95094*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95094*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa381ffff; valaddr_reg:x3; val_offset:95097*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95097*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa383ffff; valaddr_reg:x3; val_offset:95100*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95100*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa387ffff; valaddr_reg:x3; val_offset:95103*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95103*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa38fffff; valaddr_reg:x3; val_offset:95106*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95106*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa39fffff; valaddr_reg:x3; val_offset:95109*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95109*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3bfffff; valaddr_reg:x3; val_offset:95112*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95112*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3c00000; valaddr_reg:x3; val_offset:95115*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95115*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3e00000; valaddr_reg:x3; val_offset:95118*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95118*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3f00000; valaddr_reg:x3; val_offset:95121*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95121*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3f80000; valaddr_reg:x3; val_offset:95124*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95124*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fc0000; valaddr_reg:x3; val_offset:95127*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95127*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fe0000; valaddr_reg:x3; val_offset:95130*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95130*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ff0000; valaddr_reg:x3; val_offset:95133*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95133*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ff8000; valaddr_reg:x3; val_offset:95136*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95136*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ffc000; valaddr_reg:x3; val_offset:95139*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95139*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ffe000; valaddr_reg:x3; val_offset:95142*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95142*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fff000; valaddr_reg:x3; val_offset:95145*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95145*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fff800; valaddr_reg:x3; val_offset:95148*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95148*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fffc00; valaddr_reg:x3; val_offset:95151*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95151*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fffe00; valaddr_reg:x3; val_offset:95154*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95154*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ffff00; valaddr_reg:x3; val_offset:95157*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95157*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ffff80; valaddr_reg:x3; val_offset:95160*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95160*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ffffc0; valaddr_reg:x3; val_offset:95163*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95163*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ffffe0; valaddr_reg:x3; val_offset:95166*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95166*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fffff0; valaddr_reg:x3; val_offset:95169*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95169*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fffff8; valaddr_reg:x3; val_offset:95172*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95172*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fffffc; valaddr_reg:x3; val_offset:95175*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95175*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3fffffe; valaddr_reg:x3; val_offset:95178*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95178*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x47 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xa3ffffff; valaddr_reg:x3; val_offset:95181*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95181*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbf800001; valaddr_reg:x3; val_offset:95184*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95184*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbf800003; valaddr_reg:x3; val_offset:95187*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95187*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbf800007; valaddr_reg:x3; val_offset:95190*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95190*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbf999999; valaddr_reg:x3; val_offset:95193*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95193*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:95196*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95196*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:95199*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95199*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:95202*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95202*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:95205*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95205*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:95208*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95208*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:95211*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95211*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:95214*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95214*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:95217*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95217*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:95220*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95220*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:95223*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95223*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:95226*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95226*0 + 3*247*FLEN/8, x4, x1, x2) + +inst_31743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f263a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x337942 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f263a; op2val:0x80337942; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:95229*0 + 3*247*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95229*0 + 3*247*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132702039,32,FLEN) +NAN_BOXED(3388255,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364672,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364673,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364675,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364679,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364687,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364703,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364735,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364799,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382364927,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382365183,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382365695,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382366719,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382368767,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382372863,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382381055,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382397439,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382430207,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382495743,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382626815,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2382888959,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2383413247,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2384461823,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2386558975,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2386558976,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2388656128,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2389704704,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390228992,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390491136,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390622208,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390687744,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390720512,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390736896,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390745088,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390749184,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390751232,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390752256,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390752768,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753024,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753152,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753216,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753248,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753264,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753272,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753276,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753278,32,FLEN) +NAN_BOXED(2132723723,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753279,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743074816,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743074817,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743074819,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743074823,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743074831,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743074847,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743074879,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743074943,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743075071,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743075327,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743075839,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743076863,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743078911,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743083007,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743091199,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743107583,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743140351,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743205887,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743336959,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2743599103,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2744123391,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2745171967,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2747269119,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2747269120,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2749366272,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2750414848,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2750939136,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751201280,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751332352,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751397888,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751430656,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751447040,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751455232,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751459328,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751461376,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751462400,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751462912,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463168,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463296,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463360,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463392,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463408,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463416,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463420,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463422,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(2751463423,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132747834,32,FLEN) +NAN_BOXED(2150857026,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-249.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-249.S new file mode 100644 index 000000000..79db7eeb8 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-249.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_31744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22800000; valaddr_reg:x3; val_offset:95232*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95232*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22800001; valaddr_reg:x3; val_offset:95235*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95235*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22800003; valaddr_reg:x3; val_offset:95238*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95238*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22800007; valaddr_reg:x3; val_offset:95241*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95241*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x2280000f; valaddr_reg:x3; val_offset:95244*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95244*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x2280001f; valaddr_reg:x3; val_offset:95247*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95247*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x2280003f; valaddr_reg:x3; val_offset:95250*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95250*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x2280007f; valaddr_reg:x3; val_offset:95253*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95253*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x228000ff; valaddr_reg:x3; val_offset:95256*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95256*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x228001ff; valaddr_reg:x3; val_offset:95259*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95259*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x228003ff; valaddr_reg:x3; val_offset:95262*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95262*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x228007ff; valaddr_reg:x3; val_offset:95265*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95265*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22800fff; valaddr_reg:x3; val_offset:95268*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95268*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22801fff; valaddr_reg:x3; val_offset:95271*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95271*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22803fff; valaddr_reg:x3; val_offset:95274*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95274*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22807fff; valaddr_reg:x3; val_offset:95277*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95277*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x2280ffff; valaddr_reg:x3; val_offset:95280*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95280*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x2281ffff; valaddr_reg:x3; val_offset:95283*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95283*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x2283ffff; valaddr_reg:x3; val_offset:95286*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95286*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x2287ffff; valaddr_reg:x3; val_offset:95289*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95289*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x228fffff; valaddr_reg:x3; val_offset:95292*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95292*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x229fffff; valaddr_reg:x3; val_offset:95295*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95295*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22bfffff; valaddr_reg:x3; val_offset:95298*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95298*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22c00000; valaddr_reg:x3; val_offset:95301*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95301*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22e00000; valaddr_reg:x3; val_offset:95304*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95304*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22f00000; valaddr_reg:x3; val_offset:95307*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95307*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22f80000; valaddr_reg:x3; val_offset:95310*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95310*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fc0000; valaddr_reg:x3; val_offset:95313*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95313*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fe0000; valaddr_reg:x3; val_offset:95316*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95316*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ff0000; valaddr_reg:x3; val_offset:95319*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95319*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ff8000; valaddr_reg:x3; val_offset:95322*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95322*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ffc000; valaddr_reg:x3; val_offset:95325*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95325*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ffe000; valaddr_reg:x3; val_offset:95328*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95328*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fff000; valaddr_reg:x3; val_offset:95331*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95331*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fff800; valaddr_reg:x3; val_offset:95334*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95334*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fffc00; valaddr_reg:x3; val_offset:95337*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95337*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fffe00; valaddr_reg:x3; val_offset:95340*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95340*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ffff00; valaddr_reg:x3; val_offset:95343*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95343*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ffff80; valaddr_reg:x3; val_offset:95346*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95346*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ffffc0; valaddr_reg:x3; val_offset:95349*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95349*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ffffe0; valaddr_reg:x3; val_offset:95352*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95352*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fffff0; valaddr_reg:x3; val_offset:95355*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95355*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fffff8; valaddr_reg:x3; val_offset:95358*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95358*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fffffc; valaddr_reg:x3; val_offset:95361*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95361*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22fffffe; valaddr_reg:x3; val_offset:95364*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95364*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x45 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x22ffffff; valaddr_reg:x3; val_offset:95367*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95367*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3f800001; valaddr_reg:x3; val_offset:95370*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95370*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3f800003; valaddr_reg:x3; val_offset:95373*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95373*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3f800007; valaddr_reg:x3; val_offset:95376*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95376*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3f999999; valaddr_reg:x3; val_offset:95379*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95379*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:95382*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95382*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:95385*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95385*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:95388*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95388*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:95391*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95391*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:95394*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95394*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:95397*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95397*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:95400*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95400*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:95403*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95403*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:95406*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95406*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:95409*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95409*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:95412*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95412*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f3cbe and fs2 == 0 and fe2 == 0x00 and fm2 == 0x3371fb and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f3cbe; op2val:0x3371fb; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:95415*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95415*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:95418*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95418*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:95421*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95421*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:95424*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95424*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:95427*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95427*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:95430*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95430*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:95433*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95433*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:95436*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95436*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:95439*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95439*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:95442*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95442*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:95445*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95445*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:95448*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95448*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:95451*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95451*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:95454*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95454*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:95457*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95457*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:95460*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95460*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:95463*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95463*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2000000; valaddr_reg:x3; val_offset:95466*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95466*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2000001; valaddr_reg:x3; val_offset:95469*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95469*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2000003; valaddr_reg:x3; val_offset:95472*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95472*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2000007; valaddr_reg:x3; val_offset:95475*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95475*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x200000f; valaddr_reg:x3; val_offset:95478*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95478*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x200001f; valaddr_reg:x3; val_offset:95481*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95481*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x200003f; valaddr_reg:x3; val_offset:95484*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95484*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x200007f; valaddr_reg:x3; val_offset:95487*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95487*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x20000ff; valaddr_reg:x3; val_offset:95490*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95490*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x20001ff; valaddr_reg:x3; val_offset:95493*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95493*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x20003ff; valaddr_reg:x3; val_offset:95496*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95496*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x20007ff; valaddr_reg:x3; val_offset:95499*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95499*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2000fff; valaddr_reg:x3; val_offset:95502*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95502*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2001fff; valaddr_reg:x3; val_offset:95505*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95505*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2003fff; valaddr_reg:x3; val_offset:95508*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95508*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2007fff; valaddr_reg:x3; val_offset:95511*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95511*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x200ffff; valaddr_reg:x3; val_offset:95514*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95514*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x201ffff; valaddr_reg:x3; val_offset:95517*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95517*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x203ffff; valaddr_reg:x3; val_offset:95520*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95520*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x207ffff; valaddr_reg:x3; val_offset:95523*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95523*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x20fffff; valaddr_reg:x3; val_offset:95526*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95526*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x21fffff; valaddr_reg:x3; val_offset:95529*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95529*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x23fffff; valaddr_reg:x3; val_offset:95532*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95532*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2400000; valaddr_reg:x3; val_offset:95535*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95535*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2600000; valaddr_reg:x3; val_offset:95538*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95538*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2700000; valaddr_reg:x3; val_offset:95541*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95541*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x2780000; valaddr_reg:x3; val_offset:95544*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95544*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27c0000; valaddr_reg:x3; val_offset:95547*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95547*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27e0000; valaddr_reg:x3; val_offset:95550*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95550*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27f0000; valaddr_reg:x3; val_offset:95553*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95553*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27f8000; valaddr_reg:x3; val_offset:95556*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95556*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27fc000; valaddr_reg:x3; val_offset:95559*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95559*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27fe000; valaddr_reg:x3; val_offset:95562*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95562*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27ff000; valaddr_reg:x3; val_offset:95565*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95565*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27ff800; valaddr_reg:x3; val_offset:95568*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95568*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27ffc00; valaddr_reg:x3; val_offset:95571*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95571*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27ffe00; valaddr_reg:x3; val_offset:95574*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95574*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27fff00; valaddr_reg:x3; val_offset:95577*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95577*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27fff80; valaddr_reg:x3; val_offset:95580*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95580*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27fffc0; valaddr_reg:x3; val_offset:95583*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95583*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27fffe0; valaddr_reg:x3; val_offset:95586*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95586*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27ffff0; valaddr_reg:x3; val_offset:95589*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95589*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27ffff8; valaddr_reg:x3; val_offset:95592*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95592*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27ffffc; valaddr_reg:x3; val_offset:95595*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95595*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27ffffe; valaddr_reg:x3; val_offset:95598*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95598*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f54ed and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f54ed; op2val:0x0; +op3val:0x27fffff; valaddr_reg:x3; val_offset:95601*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95601*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35800000; valaddr_reg:x3; val_offset:95604*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95604*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35800001; valaddr_reg:x3; val_offset:95607*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95607*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35800003; valaddr_reg:x3; val_offset:95610*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95610*0 + 3*248*FLEN/8, x4, x1, x2) + +inst_31871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35800007; valaddr_reg:x3; val_offset:95613*0 + 3*248*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95613*0 + 3*248*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578813952,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578813953,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578813955,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578813959,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578813967,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578813983,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578814015,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578814079,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578814207,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578814463,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578814975,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578815999,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578818047,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578822143,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578830335,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578846719,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578879487,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(578945023,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(579076095,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(579338239,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(579862527,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(580911103,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(583008255,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(583008256,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(585105408,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(586153984,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(586678272,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(586940416,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587071488,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587137024,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587169792,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587186176,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587194368,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587198464,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587200512,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587201536,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202048,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202304,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202432,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202496,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202528,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202544,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202552,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202556,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202558,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(587202559,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132753598,32,FLEN) +NAN_BOXED(3371515,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554432,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554433,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554435,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554439,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554447,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554463,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554495,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554559,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554687,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554943,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33555455,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33556479,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33558527,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33562623,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33570815,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33587199,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33619967,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33685503,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33816575,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(34078719,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(34603007,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(35651583,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(37748735,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(37748736,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(39845888,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(40894464,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41418752,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41680896,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41811968,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41877504,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41910272,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41926656,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41934848,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41938944,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41940992,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942016,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942528,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942784,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942912,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41942976,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943008,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943024,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943032,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943036,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943038,32,FLEN) +NAN_BOXED(2132759789,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943039,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581056,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581057,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581059,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581063,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-25.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-25.S new file mode 100644 index 000000000..f16a96f1e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-25.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_3072: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857ffe00; valaddr_reg:x3; val_offset:9216*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9216*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3073: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857fff00; valaddr_reg:x3; val_offset:9219*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9219*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3074: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857fff80; valaddr_reg:x3; val_offset:9222*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9222*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3075: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857fffc0; valaddr_reg:x3; val_offset:9225*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9225*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3076: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857fffe0; valaddr_reg:x3; val_offset:9228*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9228*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3077: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857ffff0; valaddr_reg:x3; val_offset:9231*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9231*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3078: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857ffff8; valaddr_reg:x3; val_offset:9234*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9234*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3079: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857ffffc; valaddr_reg:x3; val_offset:9237*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9237*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3080: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857ffffe; valaddr_reg:x3; val_offset:9240*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9240*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3081: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x677175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d677175; op2val:0x80000000; +op3val:0x857fffff; valaddr_reg:x3; val_offset:9243*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9243*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3082: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:9246*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9246*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3083: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:9249*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9249*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3084: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:9252*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9252*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3085: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:9255*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9255*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3086: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:9258*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9258*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3087: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:9261*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9261*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3088: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:9264*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9264*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3089: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:9267*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9267*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3090: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:9270*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9270*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3091: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:9273*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9273*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3092: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:9276*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9276*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3093: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:9279*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9279*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3094: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:9282*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9282*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3095: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:9285*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9285*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3096: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:9288*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9288*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3097: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:9291*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9291*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3098: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83000000; valaddr_reg:x3; val_offset:9294*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9294*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3099: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83000001; valaddr_reg:x3; val_offset:9297*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9297*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3100: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83000003; valaddr_reg:x3; val_offset:9300*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9300*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3101: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83000007; valaddr_reg:x3; val_offset:9303*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9303*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3102: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8300000f; valaddr_reg:x3; val_offset:9306*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9306*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3103: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8300001f; valaddr_reg:x3; val_offset:9309*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9309*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3104: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8300003f; valaddr_reg:x3; val_offset:9312*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9312*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3105: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8300007f; valaddr_reg:x3; val_offset:9315*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9315*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3106: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x830000ff; valaddr_reg:x3; val_offset:9318*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9318*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3107: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x830001ff; valaddr_reg:x3; val_offset:9321*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9321*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3108: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x830003ff; valaddr_reg:x3; val_offset:9324*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9324*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3109: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x830007ff; valaddr_reg:x3; val_offset:9327*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9327*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3110: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83000fff; valaddr_reg:x3; val_offset:9330*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9330*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3111: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83001fff; valaddr_reg:x3; val_offset:9333*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9333*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3112: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83003fff; valaddr_reg:x3; val_offset:9336*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9336*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3113: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83007fff; valaddr_reg:x3; val_offset:9339*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9339*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3114: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8300ffff; valaddr_reg:x3; val_offset:9342*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9342*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3115: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8301ffff; valaddr_reg:x3; val_offset:9345*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9345*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3116: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8303ffff; valaddr_reg:x3; val_offset:9348*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9348*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3117: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x8307ffff; valaddr_reg:x3; val_offset:9351*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9351*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3118: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x830fffff; valaddr_reg:x3; val_offset:9354*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9354*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3119: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x831fffff; valaddr_reg:x3; val_offset:9357*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9357*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3120: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x833fffff; valaddr_reg:x3; val_offset:9360*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9360*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3121: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83400000; valaddr_reg:x3; val_offset:9363*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9363*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3122: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83600000; valaddr_reg:x3; val_offset:9366*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9366*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3123: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83700000; valaddr_reg:x3; val_offset:9369*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9369*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3124: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x83780000; valaddr_reg:x3; val_offset:9372*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9372*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3125: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837c0000; valaddr_reg:x3; val_offset:9375*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9375*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3126: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837e0000; valaddr_reg:x3; val_offset:9378*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9378*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3127: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837f0000; valaddr_reg:x3; val_offset:9381*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9381*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3128: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837f8000; valaddr_reg:x3; val_offset:9384*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9384*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3129: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837fc000; valaddr_reg:x3; val_offset:9387*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9387*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3130: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837fe000; valaddr_reg:x3; val_offset:9390*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9390*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3131: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837ff000; valaddr_reg:x3; val_offset:9393*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9393*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3132: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837ff800; valaddr_reg:x3; val_offset:9396*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9396*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3133: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837ffc00; valaddr_reg:x3; val_offset:9399*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9399*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3134: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837ffe00; valaddr_reg:x3; val_offset:9402*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9402*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3135: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837fff00; valaddr_reg:x3; val_offset:9405*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9405*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3136: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837fff80; valaddr_reg:x3; val_offset:9408*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9408*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3137: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837fffc0; valaddr_reg:x3; val_offset:9411*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9411*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3138: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837fffe0; valaddr_reg:x3; val_offset:9414*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9414*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3139: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837ffff0; valaddr_reg:x3; val_offset:9417*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9417*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3140: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837ffff8; valaddr_reg:x3; val_offset:9420*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9420*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3141: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837ffffc; valaddr_reg:x3; val_offset:9423*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9423*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3142: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837ffffe; valaddr_reg:x3; val_offset:9426*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9426*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3143: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x6a9275 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d6a9275; op2val:0x80000000; +op3val:0x837fffff; valaddr_reg:x3; val_offset:9429*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9429*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3144: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3f800001; valaddr_reg:x3; val_offset:9432*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9432*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3145: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3f800003; valaddr_reg:x3; val_offset:9435*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9435*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3146: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3f800007; valaddr_reg:x3; val_offset:9438*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9438*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3147: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3f999999; valaddr_reg:x3; val_offset:9441*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9441*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3148: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:9444*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9444*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3149: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:9447*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9447*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3150: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:9450*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9450*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3151: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:9453*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9453*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3152: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:9456*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9456*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3153: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:9459*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9459*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3154: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:9462*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9462*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3155: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:9465*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9465*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3156: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:9468*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9468*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3157: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:9471*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9471*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3158: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:9474*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9474*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3159: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:9477*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9477*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3160: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f000000; valaddr_reg:x3; val_offset:9480*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9480*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3161: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f000001; valaddr_reg:x3; val_offset:9483*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9483*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3162: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f000003; valaddr_reg:x3; val_offset:9486*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9486*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3163: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f000007; valaddr_reg:x3; val_offset:9489*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9489*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3164: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f00000f; valaddr_reg:x3; val_offset:9492*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9492*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3165: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f00001f; valaddr_reg:x3; val_offset:9495*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9495*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3166: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f00003f; valaddr_reg:x3; val_offset:9498*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9498*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3167: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f00007f; valaddr_reg:x3; val_offset:9501*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9501*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3168: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f0000ff; valaddr_reg:x3; val_offset:9504*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9504*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3169: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f0001ff; valaddr_reg:x3; val_offset:9507*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9507*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3170: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f0003ff; valaddr_reg:x3; val_offset:9510*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9510*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3171: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f0007ff; valaddr_reg:x3; val_offset:9513*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9513*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3172: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f000fff; valaddr_reg:x3; val_offset:9516*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9516*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3173: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f001fff; valaddr_reg:x3; val_offset:9519*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9519*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3174: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f003fff; valaddr_reg:x3; val_offset:9522*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9522*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3175: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f007fff; valaddr_reg:x3; val_offset:9525*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9525*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3176: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f00ffff; valaddr_reg:x3; val_offset:9528*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9528*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3177: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f01ffff; valaddr_reg:x3; val_offset:9531*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9531*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3178: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f03ffff; valaddr_reg:x3; val_offset:9534*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9534*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3179: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f07ffff; valaddr_reg:x3; val_offset:9537*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9537*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3180: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f0fffff; valaddr_reg:x3; val_offset:9540*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9540*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3181: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f1fffff; valaddr_reg:x3; val_offset:9543*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9543*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3182: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f3fffff; valaddr_reg:x3; val_offset:9546*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9546*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3183: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f400000; valaddr_reg:x3; val_offset:9549*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9549*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3184: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f600000; valaddr_reg:x3; val_offset:9552*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9552*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3185: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f700000; valaddr_reg:x3; val_offset:9555*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9555*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3186: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f780000; valaddr_reg:x3; val_offset:9558*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9558*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3187: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7c0000; valaddr_reg:x3; val_offset:9561*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9561*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3188: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7e0000; valaddr_reg:x3; val_offset:9564*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9564*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3189: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7f0000; valaddr_reg:x3; val_offset:9567*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9567*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3190: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7f8000; valaddr_reg:x3; val_offset:9570*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9570*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3191: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7fc000; valaddr_reg:x3; val_offset:9573*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9573*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3192: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7fe000; valaddr_reg:x3; val_offset:9576*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9576*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3193: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7ff000; valaddr_reg:x3; val_offset:9579*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9579*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3194: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7ff800; valaddr_reg:x3; val_offset:9582*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9582*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3195: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7ffc00; valaddr_reg:x3; val_offset:9585*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9585*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3196: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7ffe00; valaddr_reg:x3; val_offset:9588*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9588*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3197: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7fff00; valaddr_reg:x3; val_offset:9591*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9591*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3198: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7fff80; valaddr_reg:x3; val_offset:9594*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9594*0 + 3*24*FLEN/8, x4, x1, x2) + +inst_3199: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7fffc0; valaddr_reg:x3; val_offset:9597*0 + 3*24*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9597*0 + 3*24*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239757824,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758080,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758208,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758272,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758304,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758320,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758328,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758332,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758334,32,FLEN) +NAN_BOXED(2103931253,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758335,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815296,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815297,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815299,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815303,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815311,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815327,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815359,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815423,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815551,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815807,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197816319,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197817343,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197819391,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197823487,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197831679,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197848063,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197880831,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197946367,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198077439,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198339583,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198863871,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2199912447,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2202009599,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2202009600,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2204106752,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205155328,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205679616,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205941760,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206072832,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206138368,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206171136,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206187520,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206195712,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206199808,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206201856,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206202880,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203392,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203648,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203776,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203840,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203872,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203888,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203896,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203900,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203902,32,FLEN) +NAN_BOXED(2104136309,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203903,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400064,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400065,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400067,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400071,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400079,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400095,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400127,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400191,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400319,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325400575,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325401087,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325402111,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325404159,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325408255,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325416447,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325432831,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325465599,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325531135,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325662207,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1325924351,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1326448639,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1327497215,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1329594367,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1329594368,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1331691520,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1332740096,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333264384,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333526528,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333657600,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333723136,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333755904,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333772288,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333780480,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333784576,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333786624,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333787648,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788160,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788416,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788544,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788608,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-250.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-250.S new file mode 100644 index 000000000..0f1720f81 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-250.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_31872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3580000f; valaddr_reg:x3; val_offset:95616*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95616*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3580001f; valaddr_reg:x3; val_offset:95619*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95619*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3580003f; valaddr_reg:x3; val_offset:95622*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95622*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3580007f; valaddr_reg:x3; val_offset:95625*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95625*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x358000ff; valaddr_reg:x3; val_offset:95628*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95628*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x358001ff; valaddr_reg:x3; val_offset:95631*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95631*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x358003ff; valaddr_reg:x3; val_offset:95634*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95634*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x358007ff; valaddr_reg:x3; val_offset:95637*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95637*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35800fff; valaddr_reg:x3; val_offset:95640*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95640*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35801fff; valaddr_reg:x3; val_offset:95643*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95643*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35803fff; valaddr_reg:x3; val_offset:95646*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95646*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35807fff; valaddr_reg:x3; val_offset:95649*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95649*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3580ffff; valaddr_reg:x3; val_offset:95652*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95652*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3581ffff; valaddr_reg:x3; val_offset:95655*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95655*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3583ffff; valaddr_reg:x3; val_offset:95658*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95658*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3587ffff; valaddr_reg:x3; val_offset:95661*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95661*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x358fffff; valaddr_reg:x3; val_offset:95664*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95664*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x359fffff; valaddr_reg:x3; val_offset:95667*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95667*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35bfffff; valaddr_reg:x3; val_offset:95670*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95670*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35c00000; valaddr_reg:x3; val_offset:95673*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95673*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35e00000; valaddr_reg:x3; val_offset:95676*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95676*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35f00000; valaddr_reg:x3; val_offset:95679*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95679*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35f80000; valaddr_reg:x3; val_offset:95682*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95682*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fc0000; valaddr_reg:x3; val_offset:95685*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95685*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fe0000; valaddr_reg:x3; val_offset:95688*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95688*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ff0000; valaddr_reg:x3; val_offset:95691*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95691*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ff8000; valaddr_reg:x3; val_offset:95694*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95694*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ffc000; valaddr_reg:x3; val_offset:95697*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95697*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ffe000; valaddr_reg:x3; val_offset:95700*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95700*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fff000; valaddr_reg:x3; val_offset:95703*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95703*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fff800; valaddr_reg:x3; val_offset:95706*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95706*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fffc00; valaddr_reg:x3; val_offset:95709*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95709*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fffe00; valaddr_reg:x3; val_offset:95712*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95712*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ffff00; valaddr_reg:x3; val_offset:95715*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95715*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ffff80; valaddr_reg:x3; val_offset:95718*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95718*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ffffc0; valaddr_reg:x3; val_offset:95721*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95721*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ffffe0; valaddr_reg:x3; val_offset:95724*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95724*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fffff0; valaddr_reg:x3; val_offset:95727*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95727*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fffff8; valaddr_reg:x3; val_offset:95730*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95730*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fffffc; valaddr_reg:x3; val_offset:95733*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95733*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35fffffe; valaddr_reg:x3; val_offset:95736*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95736*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x6b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x35ffffff; valaddr_reg:x3; val_offset:95739*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95739*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3f800001; valaddr_reg:x3; val_offset:95742*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95742*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3f800003; valaddr_reg:x3; val_offset:95745*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95745*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3f800007; valaddr_reg:x3; val_offset:95748*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95748*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3f999999; valaddr_reg:x3; val_offset:95751*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95751*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:95754*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95754*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:95757*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95757*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:95760*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95760*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:95763*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95763*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:95766*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95766*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:95769*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95769*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:95772*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95772*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:95775*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95775*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:95778*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95778*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:95781*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95781*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:95784*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95784*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f6064 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x336679 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f6064; op2val:0x336679; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:95787*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95787*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64000000; valaddr_reg:x3; val_offset:95790*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95790*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64000001; valaddr_reg:x3; val_offset:95793*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95793*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64000003; valaddr_reg:x3; val_offset:95796*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95796*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64000007; valaddr_reg:x3; val_offset:95799*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95799*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x6400000f; valaddr_reg:x3; val_offset:95802*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95802*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x6400001f; valaddr_reg:x3; val_offset:95805*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95805*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x6400003f; valaddr_reg:x3; val_offset:95808*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95808*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x6400007f; valaddr_reg:x3; val_offset:95811*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95811*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x640000ff; valaddr_reg:x3; val_offset:95814*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95814*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x640001ff; valaddr_reg:x3; val_offset:95817*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95817*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x640003ff; valaddr_reg:x3; val_offset:95820*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95820*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x640007ff; valaddr_reg:x3; val_offset:95823*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95823*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64000fff; valaddr_reg:x3; val_offset:95826*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95826*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64001fff; valaddr_reg:x3; val_offset:95829*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95829*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64003fff; valaddr_reg:x3; val_offset:95832*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95832*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64007fff; valaddr_reg:x3; val_offset:95835*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95835*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x6400ffff; valaddr_reg:x3; val_offset:95838*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95838*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x6401ffff; valaddr_reg:x3; val_offset:95841*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95841*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x6403ffff; valaddr_reg:x3; val_offset:95844*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95844*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x6407ffff; valaddr_reg:x3; val_offset:95847*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95847*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x640fffff; valaddr_reg:x3; val_offset:95850*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95850*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x641fffff; valaddr_reg:x3; val_offset:95853*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95853*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x643fffff; valaddr_reg:x3; val_offset:95856*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95856*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64400000; valaddr_reg:x3; val_offset:95859*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95859*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64600000; valaddr_reg:x3; val_offset:95862*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95862*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64700000; valaddr_reg:x3; val_offset:95865*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95865*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x64780000; valaddr_reg:x3; val_offset:95868*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95868*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647c0000; valaddr_reg:x3; val_offset:95871*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95871*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647e0000; valaddr_reg:x3; val_offset:95874*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95874*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647f0000; valaddr_reg:x3; val_offset:95877*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95877*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647f8000; valaddr_reg:x3; val_offset:95880*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95880*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647fc000; valaddr_reg:x3; val_offset:95883*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95883*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647fe000; valaddr_reg:x3; val_offset:95886*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95886*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647ff000; valaddr_reg:x3; val_offset:95889*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95889*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647ff800; valaddr_reg:x3; val_offset:95892*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95892*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647ffc00; valaddr_reg:x3; val_offset:95895*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95895*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647ffe00; valaddr_reg:x3; val_offset:95898*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95898*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647fff00; valaddr_reg:x3; val_offset:95901*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95901*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647fff80; valaddr_reg:x3; val_offset:95904*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95904*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647fffc0; valaddr_reg:x3; val_offset:95907*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95907*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647fffe0; valaddr_reg:x3; val_offset:95910*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95910*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647ffff0; valaddr_reg:x3; val_offset:95913*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95913*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647ffff8; valaddr_reg:x3; val_offset:95916*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95916*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647ffffc; valaddr_reg:x3; val_offset:95919*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95919*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647ffffe; valaddr_reg:x3; val_offset:95922*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95922*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xc8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x647fffff; valaddr_reg:x3; val_offset:95925*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95925*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f000001; valaddr_reg:x3; val_offset:95928*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95928*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f000003; valaddr_reg:x3; val_offset:95931*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95931*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f000007; valaddr_reg:x3; val_offset:95934*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95934*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f199999; valaddr_reg:x3; val_offset:95937*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95937*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f249249; valaddr_reg:x3; val_offset:95940*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95940*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f333333; valaddr_reg:x3; val_offset:95943*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95943*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:95946*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95946*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:95949*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95949*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f444444; valaddr_reg:x3; val_offset:95952*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95952*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:95955*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95955*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:95958*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95958*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f666666; valaddr_reg:x3; val_offset:95961*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95961*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:95964*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95964*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:95967*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95967*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:95970*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95970*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x1f696e and fs2 == 0 and fe2 == 0x7f and fm2 == 0x4d8e3c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f1f696e; op2val:0x3fcd8e3c; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:95973*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95973*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37000000; valaddr_reg:x3; val_offset:95976*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95976*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37000001; valaddr_reg:x3; val_offset:95979*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95979*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37000003; valaddr_reg:x3; val_offset:95982*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95982*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37000007; valaddr_reg:x3; val_offset:95985*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95985*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3700000f; valaddr_reg:x3; val_offset:95988*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95988*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3700001f; valaddr_reg:x3; val_offset:95991*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95991*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3700003f; valaddr_reg:x3; val_offset:95994*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95994*0 + 3*249*FLEN/8, x4, x1, x2) + +inst_31999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3700007f; valaddr_reg:x3; val_offset:95997*0 + 3*249*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 95997*0 + 3*249*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581071,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581087,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581119,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581183,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581311,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897581567,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897582079,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897583103,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897585151,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897589247,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897597439,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897613823,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897646591,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897712127,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(897843199,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(898105343,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(898629631,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(899678207,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(901775359,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(901775360,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(903872512,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(904921088,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905445376,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905707520,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905838592,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905904128,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905936896,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905953280,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905961472,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905965568,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905967616,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905968640,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969152,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969408,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969536,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969600,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969632,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969648,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969656,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969660,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969662,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(905969663,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132762724,32,FLEN) +NAN_BOXED(3368569,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721600,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721601,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721603,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721607,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721615,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721631,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721663,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721727,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677721855,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677722111,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677722623,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677723647,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677725695,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677729791,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677737983,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677754367,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677787135,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677852671,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1677983743,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1678245887,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1678770175,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1679818751,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1681915903,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1681915904,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1684013056,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1685061632,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1685585920,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1685848064,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1685979136,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686044672,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686077440,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686093824,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686102016,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686106112,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686108160,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686109184,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686109696,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686109952,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686110080,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686110144,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686110176,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686110192,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686110200,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686110204,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686110206,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(1686110207,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2132765038,32,FLEN) +NAN_BOXED(1070435900,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922746880,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922746881,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922746883,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922746887,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922746895,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922746911,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922746943,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922747007,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-251.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-251.S new file mode 100644 index 000000000..e2e4f022b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-251.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_32000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x370000ff; valaddr_reg:x3; val_offset:96000*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96000*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x370001ff; valaddr_reg:x3; val_offset:96003*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96003*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x370003ff; valaddr_reg:x3; val_offset:96006*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96006*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x370007ff; valaddr_reg:x3; val_offset:96009*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96009*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37000fff; valaddr_reg:x3; val_offset:96012*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96012*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37001fff; valaddr_reg:x3; val_offset:96015*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96015*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37003fff; valaddr_reg:x3; val_offset:96018*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96018*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37007fff; valaddr_reg:x3; val_offset:96021*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96021*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3700ffff; valaddr_reg:x3; val_offset:96024*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96024*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3701ffff; valaddr_reg:x3; val_offset:96027*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96027*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3703ffff; valaddr_reg:x3; val_offset:96030*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96030*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3707ffff; valaddr_reg:x3; val_offset:96033*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96033*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x370fffff; valaddr_reg:x3; val_offset:96036*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96036*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x371fffff; valaddr_reg:x3; val_offset:96039*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96039*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x373fffff; valaddr_reg:x3; val_offset:96042*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96042*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37400000; valaddr_reg:x3; val_offset:96045*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96045*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37600000; valaddr_reg:x3; val_offset:96048*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96048*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37700000; valaddr_reg:x3; val_offset:96051*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96051*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x37780000; valaddr_reg:x3; val_offset:96054*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96054*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377c0000; valaddr_reg:x3; val_offset:96057*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96057*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377e0000; valaddr_reg:x3; val_offset:96060*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96060*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377f0000; valaddr_reg:x3; val_offset:96063*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96063*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377f8000; valaddr_reg:x3; val_offset:96066*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96066*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377fc000; valaddr_reg:x3; val_offset:96069*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96069*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377fe000; valaddr_reg:x3; val_offset:96072*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96072*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377ff000; valaddr_reg:x3; val_offset:96075*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96075*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377ff800; valaddr_reg:x3; val_offset:96078*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96078*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377ffc00; valaddr_reg:x3; val_offset:96081*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96081*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377ffe00; valaddr_reg:x3; val_offset:96084*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96084*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377fff00; valaddr_reg:x3; val_offset:96087*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96087*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377fff80; valaddr_reg:x3; val_offset:96090*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96090*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377fffc0; valaddr_reg:x3; val_offset:96093*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96093*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377fffe0; valaddr_reg:x3; val_offset:96096*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96096*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377ffff0; valaddr_reg:x3; val_offset:96099*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96099*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377ffff8; valaddr_reg:x3; val_offset:96102*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96102*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377ffffc; valaddr_reg:x3; val_offset:96105*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96105*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377ffffe; valaddr_reg:x3; val_offset:96108*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96108*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x6e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x377fffff; valaddr_reg:x3; val_offset:96111*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96111*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3f800001; valaddr_reg:x3; val_offset:96114*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96114*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3f800003; valaddr_reg:x3; val_offset:96117*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96117*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3f800007; valaddr_reg:x3; val_offset:96120*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96120*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3f999999; valaddr_reg:x3; val_offset:96123*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96123*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:96126*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96126*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:96129*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96129*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:96132*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96132*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:96135*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96135*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:96138*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96138*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:96141*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96141*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:96144*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96144*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:96147*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96147*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:96150*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96150*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:96153*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96153*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:96156*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96156*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20191e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x332b2a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20191e; op2val:0x332b2a; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:96159*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96159*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d000000; valaddr_reg:x3; val_offset:96162*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96162*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d000001; valaddr_reg:x3; val_offset:96165*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96165*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d000003; valaddr_reg:x3; val_offset:96168*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96168*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d000007; valaddr_reg:x3; val_offset:96171*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96171*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d00000f; valaddr_reg:x3; val_offset:96174*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96174*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d00001f; valaddr_reg:x3; val_offset:96177*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96177*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d00003f; valaddr_reg:x3; val_offset:96180*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96180*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d00007f; valaddr_reg:x3; val_offset:96183*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96183*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d0000ff; valaddr_reg:x3; val_offset:96186*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96186*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d0001ff; valaddr_reg:x3; val_offset:96189*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96189*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d0003ff; valaddr_reg:x3; val_offset:96192*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96192*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d0007ff; valaddr_reg:x3; val_offset:96195*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96195*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d000fff; valaddr_reg:x3; val_offset:96198*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96198*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d001fff; valaddr_reg:x3; val_offset:96201*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96201*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d003fff; valaddr_reg:x3; val_offset:96204*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96204*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d007fff; valaddr_reg:x3; val_offset:96207*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96207*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d00ffff; valaddr_reg:x3; val_offset:96210*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96210*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d01ffff; valaddr_reg:x3; val_offset:96213*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96213*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d03ffff; valaddr_reg:x3; val_offset:96216*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96216*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d07ffff; valaddr_reg:x3; val_offset:96219*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96219*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d0fffff; valaddr_reg:x3; val_offset:96222*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96222*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d1fffff; valaddr_reg:x3; val_offset:96225*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96225*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d3fffff; valaddr_reg:x3; val_offset:96228*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96228*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d400000; valaddr_reg:x3; val_offset:96231*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96231*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d600000; valaddr_reg:x3; val_offset:96234*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96234*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d700000; valaddr_reg:x3; val_offset:96237*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96237*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d780000; valaddr_reg:x3; val_offset:96240*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96240*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7c0000; valaddr_reg:x3; val_offset:96243*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96243*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7e0000; valaddr_reg:x3; val_offset:96246*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96246*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7f0000; valaddr_reg:x3; val_offset:96249*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96249*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7f8000; valaddr_reg:x3; val_offset:96252*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96252*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7fc000; valaddr_reg:x3; val_offset:96255*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96255*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7fe000; valaddr_reg:x3; val_offset:96258*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96258*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7ff000; valaddr_reg:x3; val_offset:96261*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96261*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7ff800; valaddr_reg:x3; val_offset:96264*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96264*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7ffc00; valaddr_reg:x3; val_offset:96267*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96267*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7ffe00; valaddr_reg:x3; val_offset:96270*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96270*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7fff00; valaddr_reg:x3; val_offset:96273*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96273*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7fff80; valaddr_reg:x3; val_offset:96276*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96276*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7fffc0; valaddr_reg:x3; val_offset:96279*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96279*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7fffe0; valaddr_reg:x3; val_offset:96282*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96282*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7ffff0; valaddr_reg:x3; val_offset:96285*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96285*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7ffff8; valaddr_reg:x3; val_offset:96288*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96288*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7ffffc; valaddr_reg:x3; val_offset:96291*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96291*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7ffffe; valaddr_reg:x3; val_offset:96294*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96294*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3d7fffff; valaddr_reg:x3; val_offset:96297*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96297*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3f800001; valaddr_reg:x3; val_offset:96300*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96300*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3f800003; valaddr_reg:x3; val_offset:96303*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96303*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3f800007; valaddr_reg:x3; val_offset:96306*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96306*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3f999999; valaddr_reg:x3; val_offset:96309*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96309*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:96312*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96312*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:96315*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96315*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:96318*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96318*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:96321*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96321*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:96324*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96324*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:96327*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96327*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:96330*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96330*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:96333*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96333*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:96336*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96336*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:96339*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96339*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:96342*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96342*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x207e49 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x330ae9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f207e49; op2val:0x330ae9; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:96345*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96345*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4000000; valaddr_reg:x3; val_offset:96348*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96348*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4000001; valaddr_reg:x3; val_offset:96351*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96351*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4000003; valaddr_reg:x3; val_offset:96354*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96354*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4000007; valaddr_reg:x3; val_offset:96357*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96357*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb400000f; valaddr_reg:x3; val_offset:96360*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96360*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb400001f; valaddr_reg:x3; val_offset:96363*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96363*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb400003f; valaddr_reg:x3; val_offset:96366*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96366*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb400007f; valaddr_reg:x3; val_offset:96369*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96369*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb40000ff; valaddr_reg:x3; val_offset:96372*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96372*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb40001ff; valaddr_reg:x3; val_offset:96375*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96375*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb40003ff; valaddr_reg:x3; val_offset:96378*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96378*0 + 3*250*FLEN/8, x4, x1, x2) + +inst_32127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb40007ff; valaddr_reg:x3; val_offset:96381*0 + 3*250*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96381*0 + 3*250*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922747135,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922747391,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922747903,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922748927,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922750975,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922755071,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922763263,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922779647,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922812415,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(922877951,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(923009023,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(923271167,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(923795455,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(924844031,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(926941183,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(926941184,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(929038336,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(930086912,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(930611200,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(930873344,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931004416,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931069952,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931102720,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931119104,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931127296,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931131392,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931133440,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931134464,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931134976,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135232,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135360,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135424,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135456,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135472,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135480,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135484,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135486,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(931135487,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132810014,32,FLEN) +NAN_BOXED(3353386,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410176,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410177,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410179,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410183,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410191,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410207,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410239,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410303,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410431,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023410687,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023411199,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023412223,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023414271,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023418367,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023426559,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023442943,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023475711,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023541247,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023672319,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1023934463,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1024458751,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1025507327,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1027604479,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1027604480,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1029701632,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1030750208,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031274496,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031536640,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031667712,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031733248,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031766016,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031782400,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031790592,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031794688,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031796736,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031797760,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798272,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798528,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798656,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798720,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798752,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798768,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798776,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798780,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798782,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1031798783,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132835913,32,FLEN) +NAN_BOXED(3345129,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019898880,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019898881,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019898883,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019898887,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019898895,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019898911,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019898943,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019899007,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019899135,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019899391,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019899903,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019900927,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-252.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-252.S new file mode 100644 index 000000000..cecefc285 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-252.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_32128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4000fff; valaddr_reg:x3; val_offset:96384*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96384*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4001fff; valaddr_reg:x3; val_offset:96387*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96387*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4003fff; valaddr_reg:x3; val_offset:96390*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96390*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4007fff; valaddr_reg:x3; val_offset:96393*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96393*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb400ffff; valaddr_reg:x3; val_offset:96396*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96396*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb401ffff; valaddr_reg:x3; val_offset:96399*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96399*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb403ffff; valaddr_reg:x3; val_offset:96402*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96402*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb407ffff; valaddr_reg:x3; val_offset:96405*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96405*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb40fffff; valaddr_reg:x3; val_offset:96408*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96408*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb41fffff; valaddr_reg:x3; val_offset:96411*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96411*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb43fffff; valaddr_reg:x3; val_offset:96414*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96414*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4400000; valaddr_reg:x3; val_offset:96417*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96417*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4600000; valaddr_reg:x3; val_offset:96420*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96420*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4700000; valaddr_reg:x3; val_offset:96423*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96423*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb4780000; valaddr_reg:x3; val_offset:96426*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96426*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47c0000; valaddr_reg:x3; val_offset:96429*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96429*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47e0000; valaddr_reg:x3; val_offset:96432*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96432*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47f0000; valaddr_reg:x3; val_offset:96435*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96435*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47f8000; valaddr_reg:x3; val_offset:96438*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96438*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47fc000; valaddr_reg:x3; val_offset:96441*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96441*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47fe000; valaddr_reg:x3; val_offset:96444*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96444*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47ff000; valaddr_reg:x3; val_offset:96447*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96447*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47ff800; valaddr_reg:x3; val_offset:96450*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96450*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47ffc00; valaddr_reg:x3; val_offset:96453*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96453*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47ffe00; valaddr_reg:x3; val_offset:96456*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96456*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47fff00; valaddr_reg:x3; val_offset:96459*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96459*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47fff80; valaddr_reg:x3; val_offset:96462*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96462*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47fffc0; valaddr_reg:x3; val_offset:96465*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96465*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47fffe0; valaddr_reg:x3; val_offset:96468*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96468*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47ffff0; valaddr_reg:x3; val_offset:96471*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96471*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47ffff8; valaddr_reg:x3; val_offset:96474*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96474*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47ffffc; valaddr_reg:x3; val_offset:96477*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96477*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47ffffe; valaddr_reg:x3; val_offset:96480*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96480*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x68 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xb47fffff; valaddr_reg:x3; val_offset:96483*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96483*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbf800001; valaddr_reg:x3; val_offset:96486*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96486*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbf800003; valaddr_reg:x3; val_offset:96489*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96489*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbf800007; valaddr_reg:x3; val_offset:96492*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96492*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbf999999; valaddr_reg:x3; val_offset:96495*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96495*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:96498*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96498*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:96501*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96501*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:96504*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96504*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:96507*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96507*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:96510*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96510*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:96513*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96513*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:96516*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96516*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:96519*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96519*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:96522*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96522*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:96525*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96525*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:96528*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96528*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20ca43 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32f2cb and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20ca43; op2val:0x8032f2cb; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:96531*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96531*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0000000; valaddr_reg:x3; val_offset:96534*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96534*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0000001; valaddr_reg:x3; val_offset:96537*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96537*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0000003; valaddr_reg:x3; val_offset:96540*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96540*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0000007; valaddr_reg:x3; val_offset:96543*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96543*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb000000f; valaddr_reg:x3; val_offset:96546*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96546*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb000001f; valaddr_reg:x3; val_offset:96549*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96549*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb000003f; valaddr_reg:x3; val_offset:96552*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96552*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb000007f; valaddr_reg:x3; val_offset:96555*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96555*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb00000ff; valaddr_reg:x3; val_offset:96558*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96558*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb00001ff; valaddr_reg:x3; val_offset:96561*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96561*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb00003ff; valaddr_reg:x3; val_offset:96564*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96564*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb00007ff; valaddr_reg:x3; val_offset:96567*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96567*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0000fff; valaddr_reg:x3; val_offset:96570*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96570*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0001fff; valaddr_reg:x3; val_offset:96573*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96573*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0003fff; valaddr_reg:x3; val_offset:96576*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96576*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0007fff; valaddr_reg:x3; val_offset:96579*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96579*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb000ffff; valaddr_reg:x3; val_offset:96582*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96582*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb001ffff; valaddr_reg:x3; val_offset:96585*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96585*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb003ffff; valaddr_reg:x3; val_offset:96588*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96588*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb007ffff; valaddr_reg:x3; val_offset:96591*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96591*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb00fffff; valaddr_reg:x3; val_offset:96594*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96594*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb01fffff; valaddr_reg:x3; val_offset:96597*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96597*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb03fffff; valaddr_reg:x3; val_offset:96600*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96600*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0400000; valaddr_reg:x3; val_offset:96603*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96603*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0600000; valaddr_reg:x3; val_offset:96606*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96606*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0700000; valaddr_reg:x3; val_offset:96609*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96609*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb0780000; valaddr_reg:x3; val_offset:96612*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96612*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07c0000; valaddr_reg:x3; val_offset:96615*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96615*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07e0000; valaddr_reg:x3; val_offset:96618*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96618*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07f0000; valaddr_reg:x3; val_offset:96621*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96621*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07f8000; valaddr_reg:x3; val_offset:96624*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96624*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07fc000; valaddr_reg:x3; val_offset:96627*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96627*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07fe000; valaddr_reg:x3; val_offset:96630*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96630*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07ff000; valaddr_reg:x3; val_offset:96633*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96633*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07ff800; valaddr_reg:x3; val_offset:96636*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96636*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07ffc00; valaddr_reg:x3; val_offset:96639*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96639*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07ffe00; valaddr_reg:x3; val_offset:96642*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96642*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07fff00; valaddr_reg:x3; val_offset:96645*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96645*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07fff80; valaddr_reg:x3; val_offset:96648*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96648*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07fffc0; valaddr_reg:x3; val_offset:96651*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96651*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07fffe0; valaddr_reg:x3; val_offset:96654*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96654*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07ffff0; valaddr_reg:x3; val_offset:96657*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96657*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07ffff8; valaddr_reg:x3; val_offset:96660*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96660*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07ffffc; valaddr_reg:x3; val_offset:96663*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96663*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07ffffe; valaddr_reg:x3; val_offset:96666*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96666*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x60 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xb07fffff; valaddr_reg:x3; val_offset:96669*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96669*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbf800001; valaddr_reg:x3; val_offset:96672*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96672*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbf800003; valaddr_reg:x3; val_offset:96675*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96675*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbf800007; valaddr_reg:x3; val_offset:96678*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96678*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbf999999; valaddr_reg:x3; val_offset:96681*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96681*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:96684*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96684*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:96687*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96687*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:96690*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96690*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:96693*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96693*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:96696*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96696*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:96699*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96699*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:96702*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96702*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:96705*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96705*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:96708*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96708*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:96711*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96711*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:96714*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96714*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20d870 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x32ee4d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20d870; op2val:0x8032ee4d; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:96717*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96717*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23800000; valaddr_reg:x3; val_offset:96720*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96720*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23800001; valaddr_reg:x3; val_offset:96723*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96723*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23800003; valaddr_reg:x3; val_offset:96726*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96726*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23800007; valaddr_reg:x3; val_offset:96729*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96729*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x2380000f; valaddr_reg:x3; val_offset:96732*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96732*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x2380001f; valaddr_reg:x3; val_offset:96735*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96735*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x2380003f; valaddr_reg:x3; val_offset:96738*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96738*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x2380007f; valaddr_reg:x3; val_offset:96741*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96741*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x238000ff; valaddr_reg:x3; val_offset:96744*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96744*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x238001ff; valaddr_reg:x3; val_offset:96747*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96747*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x238003ff; valaddr_reg:x3; val_offset:96750*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96750*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x238007ff; valaddr_reg:x3; val_offset:96753*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96753*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23800fff; valaddr_reg:x3; val_offset:96756*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96756*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23801fff; valaddr_reg:x3; val_offset:96759*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96759*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23803fff; valaddr_reg:x3; val_offset:96762*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96762*0 + 3*251*FLEN/8, x4, x1, x2) + +inst_32255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23807fff; valaddr_reg:x3; val_offset:96765*0 + 3*251*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96765*0 + 3*251*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019902975,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019907071,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019915263,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019931647,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3019964415,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3020029951,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3020161023,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3020423167,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3020947455,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3021996031,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3024093183,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3024093184,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3026190336,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3027238912,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3027763200,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028025344,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028156416,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028221952,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028254720,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028271104,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028279296,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028283392,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028285440,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028286464,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028286976,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287232,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287360,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287424,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287456,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287472,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287480,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287484,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287486,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3028287487,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132855363,32,FLEN) +NAN_BOXED(2150822603,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790016,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790017,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790019,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790023,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790031,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790047,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790079,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790143,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790271,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952790527,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952791039,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952792063,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952794111,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952798207,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952806399,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952822783,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952855551,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2952921087,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2953052159,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2953314303,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2953838591,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2954887167,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2956984319,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2956984320,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2959081472,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2960130048,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2960654336,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2960916480,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961047552,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961113088,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961145856,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961162240,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961170432,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961174528,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961176576,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961177600,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178112,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178368,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178496,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178560,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178592,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178608,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178616,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178620,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178622,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(2961178623,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132858992,32,FLEN) +NAN_BOXED(2150821453,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591168,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591169,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591171,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591175,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591183,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591199,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591231,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591295,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591423,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595591679,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595592191,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595593215,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595595263,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595599359,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595607551,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595623935,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-253.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-253.S new file mode 100644 index 000000000..6a566c9c5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-253.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_32256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x2380ffff; valaddr_reg:x3; val_offset:96768*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96768*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x2381ffff; valaddr_reg:x3; val_offset:96771*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96771*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x2383ffff; valaddr_reg:x3; val_offset:96774*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96774*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x2387ffff; valaddr_reg:x3; val_offset:96777*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96777*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x238fffff; valaddr_reg:x3; val_offset:96780*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96780*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x239fffff; valaddr_reg:x3; val_offset:96783*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96783*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23bfffff; valaddr_reg:x3; val_offset:96786*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96786*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23c00000; valaddr_reg:x3; val_offset:96789*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96789*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23e00000; valaddr_reg:x3; val_offset:96792*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96792*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23f00000; valaddr_reg:x3; val_offset:96795*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96795*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23f80000; valaddr_reg:x3; val_offset:96798*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96798*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fc0000; valaddr_reg:x3; val_offset:96801*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96801*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fe0000; valaddr_reg:x3; val_offset:96804*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96804*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ff0000; valaddr_reg:x3; val_offset:96807*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96807*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ff8000; valaddr_reg:x3; val_offset:96810*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96810*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ffc000; valaddr_reg:x3; val_offset:96813*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96813*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ffe000; valaddr_reg:x3; val_offset:96816*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96816*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fff000; valaddr_reg:x3; val_offset:96819*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96819*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fff800; valaddr_reg:x3; val_offset:96822*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96822*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fffc00; valaddr_reg:x3; val_offset:96825*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96825*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fffe00; valaddr_reg:x3; val_offset:96828*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96828*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ffff00; valaddr_reg:x3; val_offset:96831*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96831*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ffff80; valaddr_reg:x3; val_offset:96834*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96834*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ffffc0; valaddr_reg:x3; val_offset:96837*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96837*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ffffe0; valaddr_reg:x3; val_offset:96840*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96840*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fffff0; valaddr_reg:x3; val_offset:96843*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96843*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fffff8; valaddr_reg:x3; val_offset:96846*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96846*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fffffc; valaddr_reg:x3; val_offset:96849*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96849*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23fffffe; valaddr_reg:x3; val_offset:96852*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96852*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x23ffffff; valaddr_reg:x3; val_offset:96855*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96855*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3f800001; valaddr_reg:x3; val_offset:96858*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96858*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3f800003; valaddr_reg:x3; val_offset:96861*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96861*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3f800007; valaddr_reg:x3; val_offset:96864*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96864*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3f999999; valaddr_reg:x3; val_offset:96867*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96867*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:96870*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96870*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:96873*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96873*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:96876*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96876*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:96879*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96879*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:96882*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96882*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:96885*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96885*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:96888*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96888*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:96891*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96891*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:96894*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96894*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:96897*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96897*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:96900*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96900*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x20dec0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x32ec4e and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f20dec0; op2val:0x32ec4e; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:96903*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96903*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:96906*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96906*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:96909*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96909*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:96912*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96912*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:96915*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96915*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:96918*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96918*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:96921*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96921*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:96924*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96924*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:96927*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96927*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:96930*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96930*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:96933*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96933*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:96936*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96936*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:96939*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96939*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:96942*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96942*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:96945*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96945*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:96948*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96948*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:96951*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96951*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8000000; valaddr_reg:x3; val_offset:96954*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96954*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8000001; valaddr_reg:x3; val_offset:96957*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96957*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8000003; valaddr_reg:x3; val_offset:96960*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96960*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8000007; valaddr_reg:x3; val_offset:96963*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96963*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x800000f; valaddr_reg:x3; val_offset:96966*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96966*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x800001f; valaddr_reg:x3; val_offset:96969*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96969*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x800003f; valaddr_reg:x3; val_offset:96972*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96972*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x800007f; valaddr_reg:x3; val_offset:96975*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96975*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x80000ff; valaddr_reg:x3; val_offset:96978*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96978*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x80001ff; valaddr_reg:x3; val_offset:96981*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96981*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x80003ff; valaddr_reg:x3; val_offset:96984*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96984*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x80007ff; valaddr_reg:x3; val_offset:96987*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96987*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8000fff; valaddr_reg:x3; val_offset:96990*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96990*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8001fff; valaddr_reg:x3; val_offset:96993*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96993*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8003fff; valaddr_reg:x3; val_offset:96996*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96996*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8007fff; valaddr_reg:x3; val_offset:96999*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 96999*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x800ffff; valaddr_reg:x3; val_offset:97002*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97002*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x801ffff; valaddr_reg:x3; val_offset:97005*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97005*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x803ffff; valaddr_reg:x3; val_offset:97008*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97008*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x807ffff; valaddr_reg:x3; val_offset:97011*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97011*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x80fffff; valaddr_reg:x3; val_offset:97014*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97014*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x81fffff; valaddr_reg:x3; val_offset:97017*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97017*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x83fffff; valaddr_reg:x3; val_offset:97020*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97020*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8400000; valaddr_reg:x3; val_offset:97023*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97023*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8600000; valaddr_reg:x3; val_offset:97026*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97026*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8700000; valaddr_reg:x3; val_offset:97029*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97029*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x8780000; valaddr_reg:x3; val_offset:97032*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97032*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87c0000; valaddr_reg:x3; val_offset:97035*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97035*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87e0000; valaddr_reg:x3; val_offset:97038*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97038*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87f0000; valaddr_reg:x3; val_offset:97041*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97041*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87f8000; valaddr_reg:x3; val_offset:97044*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97044*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87fc000; valaddr_reg:x3; val_offset:97047*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97047*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87fe000; valaddr_reg:x3; val_offset:97050*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97050*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87ff000; valaddr_reg:x3; val_offset:97053*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97053*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87ff800; valaddr_reg:x3; val_offset:97056*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97056*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87ffc00; valaddr_reg:x3; val_offset:97059*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97059*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87ffe00; valaddr_reg:x3; val_offset:97062*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97062*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87fff00; valaddr_reg:x3; val_offset:97065*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97065*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87fff80; valaddr_reg:x3; val_offset:97068*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97068*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87fffc0; valaddr_reg:x3; val_offset:97071*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97071*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87fffe0; valaddr_reg:x3; val_offset:97074*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97074*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87ffff0; valaddr_reg:x3; val_offset:97077*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97077*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87ffff8; valaddr_reg:x3; val_offset:97080*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97080*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87ffffc; valaddr_reg:x3; val_offset:97083*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97083*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87ffffe; valaddr_reg:x3; val_offset:97086*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97086*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x217160 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f217160; op2val:0x0; +op3val:0x87fffff; valaddr_reg:x3; val_offset:97089*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97089*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:97092*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97092*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:97095*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97095*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:97098*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97098*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:97101*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97101*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:97104*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97104*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:97107*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97107*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:97110*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97110*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:97113*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97113*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:97116*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97116*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:97119*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97119*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:97122*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97122*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:97125*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97125*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:97128*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97128*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:97131*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97131*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:97134*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97134*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:97137*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97137*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8800000; valaddr_reg:x3; val_offset:97140*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97140*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8800001; valaddr_reg:x3; val_offset:97143*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97143*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8800003; valaddr_reg:x3; val_offset:97146*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97146*0 + 3*252*FLEN/8, x4, x1, x2) + +inst_32383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8800007; valaddr_reg:x3; val_offset:97149*0 + 3*252*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97149*0 + 3*252*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595656703,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595722239,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(595853311,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(596115455,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(596639743,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(597688319,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(599785471,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(599785472,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(601882624,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(602931200,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603455488,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603717632,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603848704,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603914240,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603947008,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603963392,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603971584,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603975680,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603977728,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603978752,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979264,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979520,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979648,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979712,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979744,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979760,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979768,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979772,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979774,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(603979775,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2132860608,32,FLEN) +NAN_BOXED(3337294,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217728,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217729,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217731,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217735,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217743,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217759,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217791,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217855,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217983,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134218239,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134218751,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134219775,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134221823,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134225919,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134234111,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134250495,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134283263,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134348799,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134479871,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134742015,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(135266303,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(136314879,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(138412031,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(138412032,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(140509184,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(141557760,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142082048,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142344192,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142475264,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142540800,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142573568,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142589952,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142598144,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142602240,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142604288,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142605312,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142605824,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606080,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606208,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606272,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606304,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606320,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606328,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606332,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606334,32,FLEN) +NAN_BOXED(2132898144,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606335,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606336,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606337,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606339,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606343,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-254.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-254.S new file mode 100644 index 000000000..063b59d8c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-254.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_32384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x880000f; valaddr_reg:x3; val_offset:97152*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97152*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x880001f; valaddr_reg:x3; val_offset:97155*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97155*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x880003f; valaddr_reg:x3; val_offset:97158*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97158*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x880007f; valaddr_reg:x3; val_offset:97161*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97161*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x88000ff; valaddr_reg:x3; val_offset:97164*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97164*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x88001ff; valaddr_reg:x3; val_offset:97167*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97167*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x88003ff; valaddr_reg:x3; val_offset:97170*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97170*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x88007ff; valaddr_reg:x3; val_offset:97173*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97173*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8800fff; valaddr_reg:x3; val_offset:97176*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97176*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8801fff; valaddr_reg:x3; val_offset:97179*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97179*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8803fff; valaddr_reg:x3; val_offset:97182*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97182*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8807fff; valaddr_reg:x3; val_offset:97185*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97185*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x880ffff; valaddr_reg:x3; val_offset:97188*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97188*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x881ffff; valaddr_reg:x3; val_offset:97191*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97191*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x883ffff; valaddr_reg:x3; val_offset:97194*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97194*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x887ffff; valaddr_reg:x3; val_offset:97197*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97197*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x88fffff; valaddr_reg:x3; val_offset:97200*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97200*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x89fffff; valaddr_reg:x3; val_offset:97203*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97203*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8bfffff; valaddr_reg:x3; val_offset:97206*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97206*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8c00000; valaddr_reg:x3; val_offset:97209*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97209*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8e00000; valaddr_reg:x3; val_offset:97212*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97212*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8f00000; valaddr_reg:x3; val_offset:97215*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97215*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8f80000; valaddr_reg:x3; val_offset:97218*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97218*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fc0000; valaddr_reg:x3; val_offset:97221*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97221*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fe0000; valaddr_reg:x3; val_offset:97224*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97224*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ff0000; valaddr_reg:x3; val_offset:97227*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97227*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ff8000; valaddr_reg:x3; val_offset:97230*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97230*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ffc000; valaddr_reg:x3; val_offset:97233*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97233*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ffe000; valaddr_reg:x3; val_offset:97236*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97236*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fff000; valaddr_reg:x3; val_offset:97239*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97239*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fff800; valaddr_reg:x3; val_offset:97242*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97242*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fffc00; valaddr_reg:x3; val_offset:97245*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97245*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fffe00; valaddr_reg:x3; val_offset:97248*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97248*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ffff00; valaddr_reg:x3; val_offset:97251*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97251*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ffff80; valaddr_reg:x3; val_offset:97254*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97254*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ffffc0; valaddr_reg:x3; val_offset:97257*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97257*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ffffe0; valaddr_reg:x3; val_offset:97260*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97260*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fffff0; valaddr_reg:x3; val_offset:97263*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97263*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fffff8; valaddr_reg:x3; val_offset:97266*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97266*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fffffc; valaddr_reg:x3; val_offset:97269*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97269*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8fffffe; valaddr_reg:x3; val_offset:97272*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97272*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x21ba5d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f21ba5d; op2val:0x0; +op3val:0x8ffffff; valaddr_reg:x3; val_offset:97275*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97275*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:97278*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97278*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:97281*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97281*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:97284*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97284*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:97287*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97287*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:97290*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97290*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:97293*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97293*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:97296*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97296*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:97299*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97299*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:97302*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97302*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:97305*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97305*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:97308*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97308*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:97311*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97311*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:97314*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97314*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:97317*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97317*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:97320*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97320*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:97323*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97323*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe000000; valaddr_reg:x3; val_offset:97326*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97326*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe000001; valaddr_reg:x3; val_offset:97329*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97329*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe000003; valaddr_reg:x3; val_offset:97332*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97332*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe000007; valaddr_reg:x3; val_offset:97335*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97335*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe00000f; valaddr_reg:x3; val_offset:97338*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97338*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe00001f; valaddr_reg:x3; val_offset:97341*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97341*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe00003f; valaddr_reg:x3; val_offset:97344*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97344*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe00007f; valaddr_reg:x3; val_offset:97347*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97347*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe0000ff; valaddr_reg:x3; val_offset:97350*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97350*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe0001ff; valaddr_reg:x3; val_offset:97353*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97353*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe0003ff; valaddr_reg:x3; val_offset:97356*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97356*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe0007ff; valaddr_reg:x3; val_offset:97359*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97359*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe000fff; valaddr_reg:x3; val_offset:97362*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97362*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe001fff; valaddr_reg:x3; val_offset:97365*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97365*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe003fff; valaddr_reg:x3; val_offset:97368*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97368*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe007fff; valaddr_reg:x3; val_offset:97371*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97371*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe00ffff; valaddr_reg:x3; val_offset:97374*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97374*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe01ffff; valaddr_reg:x3; val_offset:97377*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97377*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe03ffff; valaddr_reg:x3; val_offset:97380*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97380*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe07ffff; valaddr_reg:x3; val_offset:97383*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97383*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe0fffff; valaddr_reg:x3; val_offset:97386*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97386*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe1fffff; valaddr_reg:x3; val_offset:97389*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97389*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe3fffff; valaddr_reg:x3; val_offset:97392*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97392*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe400000; valaddr_reg:x3; val_offset:97395*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97395*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe600000; valaddr_reg:x3; val_offset:97398*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97398*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe700000; valaddr_reg:x3; val_offset:97401*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97401*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe780000; valaddr_reg:x3; val_offset:97404*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97404*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7c0000; valaddr_reg:x3; val_offset:97407*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97407*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7e0000; valaddr_reg:x3; val_offset:97410*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97410*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7f0000; valaddr_reg:x3; val_offset:97413*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97413*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7f8000; valaddr_reg:x3; val_offset:97416*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97416*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7fc000; valaddr_reg:x3; val_offset:97419*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97419*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7fe000; valaddr_reg:x3; val_offset:97422*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97422*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7ff000; valaddr_reg:x3; val_offset:97425*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97425*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7ff800; valaddr_reg:x3; val_offset:97428*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97428*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7ffc00; valaddr_reg:x3; val_offset:97431*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97431*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7ffe00; valaddr_reg:x3; val_offset:97434*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97434*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7fff00; valaddr_reg:x3; val_offset:97437*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97437*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7fff80; valaddr_reg:x3; val_offset:97440*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97440*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7fffc0; valaddr_reg:x3; val_offset:97443*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97443*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7fffe0; valaddr_reg:x3; val_offset:97446*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97446*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7ffff0; valaddr_reg:x3; val_offset:97449*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97449*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7ffff8; valaddr_reg:x3; val_offset:97452*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97452*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7ffffc; valaddr_reg:x3; val_offset:97455*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97455*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7ffffe; valaddr_reg:x3; val_offset:97458*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97458*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x220a0f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f220a0f; op2val:0x0; +op3val:0xe7fffff; valaddr_reg:x3; val_offset:97461*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97461*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x0; valaddr_reg:x3; val_offset:97464*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97464*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:97467*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97467*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:97470*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97470*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:97473*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97473*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0xf; valaddr_reg:x3; val_offset:97476*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97476*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x1f; valaddr_reg:x3; val_offset:97479*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97479*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x3f; valaddr_reg:x3; val_offset:97482*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97482*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7f; valaddr_reg:x3; val_offset:97485*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97485*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0xff; valaddr_reg:x3; val_offset:97488*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97488*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x1ff; valaddr_reg:x3; val_offset:97491*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97491*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x3ff; valaddr_reg:x3; val_offset:97494*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97494*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ff; valaddr_reg:x3; val_offset:97497*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97497*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0xfff; valaddr_reg:x3; val_offset:97500*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97500*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x1fff; valaddr_reg:x3; val_offset:97503*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97503*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x3fff; valaddr_reg:x3; val_offset:97506*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97506*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7fff; valaddr_reg:x3; val_offset:97509*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97509*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0xffff; valaddr_reg:x3; val_offset:97512*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97512*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x1ffff; valaddr_reg:x3; val_offset:97515*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97515*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x3ffff; valaddr_reg:x3; val_offset:97518*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97518*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ffff; valaddr_reg:x3; val_offset:97521*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97521*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0xfffff; valaddr_reg:x3; val_offset:97524*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97524*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:97527*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97527*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x1fffff; valaddr_reg:x3; val_offset:97530*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97530*0 + 3*253*FLEN/8, x4, x1, x2) + +inst_32511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:97533*0 + 3*253*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97533*0 + 3*253*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606351,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606367,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606399,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606463,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606591,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606847,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142607359,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142608383,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142610431,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142614527,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142622719,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142639103,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142671871,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142737407,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142868479,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(143130623,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(143654911,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(144703487,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(146800639,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(146800640,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(148897792,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(149946368,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150470656,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150732800,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150863872,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150929408,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150962176,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150978560,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150986752,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150990848,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150992896,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150993920,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994432,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994688,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994816,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994880,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994912,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994928,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994936,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994940,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994942,32,FLEN) +NAN_BOXED(2132916829,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994943,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881024,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881025,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881027,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881031,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881039,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881055,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881087,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881151,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881279,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881535,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234882047,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234883071,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234885119,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234889215,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234897407,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234913791,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234946559,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235012095,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235143167,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235405311,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235929599,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(236978175,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(239075327,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(239075328,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(241172480,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(242221056,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(242745344,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243007488,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243138560,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243204096,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243236864,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243253248,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243261440,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243265536,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243267584,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243268608,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269120,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269376,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269504,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269568,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269600,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269616,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269624,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269628,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269630,32,FLEN) +NAN_BOXED(2132937231,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269631,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(63,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(511,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1023,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2047,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4095,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8191,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16383,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32767,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65535,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(131071,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(524287,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1048575,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2097151,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-255.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-255.S new file mode 100644 index 000000000..96508a7a8 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-255.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_32512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:97536*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97536*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:97539*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97539*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:97542*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97542*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x3fffff; valaddr_reg:x3; val_offset:97545*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97545*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x400000; valaddr_reg:x3; val_offset:97548*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97548*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:97551*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97551*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:97554*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97554*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:97557*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97557*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x600000; valaddr_reg:x3; val_offset:97560*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97560*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:97563*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97563*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:97566*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97566*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x700000; valaddr_reg:x3; val_offset:97569*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97569*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x780000; valaddr_reg:x3; val_offset:97572*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97572*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7c0000; valaddr_reg:x3; val_offset:97575*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97575*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7e0000; valaddr_reg:x3; val_offset:97578*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97578*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7f0000; valaddr_reg:x3; val_offset:97581*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97581*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7f8000; valaddr_reg:x3; val_offset:97584*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97584*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7fc000; valaddr_reg:x3; val_offset:97587*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97587*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7fe000; valaddr_reg:x3; val_offset:97590*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97590*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ff000; valaddr_reg:x3; val_offset:97593*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97593*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ff800; valaddr_reg:x3; val_offset:97596*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97596*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ffc00; valaddr_reg:x3; val_offset:97599*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97599*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ffe00; valaddr_reg:x3; val_offset:97602*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97602*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7fff00; valaddr_reg:x3; val_offset:97605*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97605*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7fff80; valaddr_reg:x3; val_offset:97608*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97608*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7fffc0; valaddr_reg:x3; val_offset:97611*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97611*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7fffe0; valaddr_reg:x3; val_offset:97614*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97614*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ffff0; valaddr_reg:x3; val_offset:97617*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97617*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:97620*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97620*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:97623*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97623*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:97626*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97626*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x222105 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f222105; op2val:0x0; +op3val:0x7fffff; valaddr_reg:x3; val_offset:97629*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97629*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:97632*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97632*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:97635*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97635*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:97638*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97638*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:97641*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97641*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:97644*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97644*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:97647*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97647*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:97650*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97650*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:97653*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97653*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:97656*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97656*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:97659*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97659*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:97662*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97662*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:97665*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97665*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:97668*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97668*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:97671*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97671*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:97674*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97674*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:97677*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97677*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86800000; valaddr_reg:x3; val_offset:97680*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97680*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86800001; valaddr_reg:x3; val_offset:97683*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97683*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86800003; valaddr_reg:x3; val_offset:97686*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97686*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86800007; valaddr_reg:x3; val_offset:97689*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97689*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8680000f; valaddr_reg:x3; val_offset:97692*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97692*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8680001f; valaddr_reg:x3; val_offset:97695*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97695*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8680003f; valaddr_reg:x3; val_offset:97698*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97698*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8680007f; valaddr_reg:x3; val_offset:97701*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97701*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x868000ff; valaddr_reg:x3; val_offset:97704*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97704*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x868001ff; valaddr_reg:x3; val_offset:97707*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97707*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x868003ff; valaddr_reg:x3; val_offset:97710*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97710*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x868007ff; valaddr_reg:x3; val_offset:97713*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97713*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86800fff; valaddr_reg:x3; val_offset:97716*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97716*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86801fff; valaddr_reg:x3; val_offset:97719*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97719*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86803fff; valaddr_reg:x3; val_offset:97722*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97722*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86807fff; valaddr_reg:x3; val_offset:97725*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97725*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8680ffff; valaddr_reg:x3; val_offset:97728*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97728*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8681ffff; valaddr_reg:x3; val_offset:97731*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97731*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8683ffff; valaddr_reg:x3; val_offset:97734*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97734*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x8687ffff; valaddr_reg:x3; val_offset:97737*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97737*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x868fffff; valaddr_reg:x3; val_offset:97740*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97740*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x869fffff; valaddr_reg:x3; val_offset:97743*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97743*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86bfffff; valaddr_reg:x3; val_offset:97746*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97746*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86c00000; valaddr_reg:x3; val_offset:97749*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97749*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86e00000; valaddr_reg:x3; val_offset:97752*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97752*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86f00000; valaddr_reg:x3; val_offset:97755*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97755*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86f80000; valaddr_reg:x3; val_offset:97758*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97758*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fc0000; valaddr_reg:x3; val_offset:97761*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97761*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fe0000; valaddr_reg:x3; val_offset:97764*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97764*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ff0000; valaddr_reg:x3; val_offset:97767*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97767*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ff8000; valaddr_reg:x3; val_offset:97770*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97770*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ffc000; valaddr_reg:x3; val_offset:97773*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97773*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ffe000; valaddr_reg:x3; val_offset:97776*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97776*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fff000; valaddr_reg:x3; val_offset:97779*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97779*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fff800; valaddr_reg:x3; val_offset:97782*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97782*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fffc00; valaddr_reg:x3; val_offset:97785*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97785*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fffe00; valaddr_reg:x3; val_offset:97788*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97788*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ffff00; valaddr_reg:x3; val_offset:97791*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97791*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ffff80; valaddr_reg:x3; val_offset:97794*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97794*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ffffc0; valaddr_reg:x3; val_offset:97797*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97797*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ffffe0; valaddr_reg:x3; val_offset:97800*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97800*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fffff0; valaddr_reg:x3; val_offset:97803*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97803*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fffff8; valaddr_reg:x3; val_offset:97806*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97806*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fffffc; valaddr_reg:x3; val_offset:97809*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97809*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86fffffe; valaddr_reg:x3; val_offset:97812*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97812*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x22559e and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f22559e; op2val:0x80000000; +op3val:0x86ffffff; valaddr_reg:x3; val_offset:97815*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97815*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbf800001; valaddr_reg:x3; val_offset:97818*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97818*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbf800003; valaddr_reg:x3; val_offset:97821*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97821*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbf800007; valaddr_reg:x3; val_offset:97824*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97824*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbf999999; valaddr_reg:x3; val_offset:97827*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97827*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:97830*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97830*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:97833*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97833*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:97836*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97836*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:97839*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97839*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:97842*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97842*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:97845*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97845*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:97848*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97848*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:97851*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97851*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:97854*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97854*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:97857*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97857*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:97860*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97860*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:97863*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97863*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7000000; valaddr_reg:x3; val_offset:97866*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97866*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7000001; valaddr_reg:x3; val_offset:97869*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97869*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7000003; valaddr_reg:x3; val_offset:97872*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97872*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7000007; valaddr_reg:x3; val_offset:97875*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97875*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc700000f; valaddr_reg:x3; val_offset:97878*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97878*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc700001f; valaddr_reg:x3; val_offset:97881*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97881*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc700003f; valaddr_reg:x3; val_offset:97884*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97884*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc700007f; valaddr_reg:x3; val_offset:97887*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97887*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc70000ff; valaddr_reg:x3; val_offset:97890*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97890*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc70001ff; valaddr_reg:x3; val_offset:97893*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97893*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc70003ff; valaddr_reg:x3; val_offset:97896*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97896*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc70007ff; valaddr_reg:x3; val_offset:97899*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97899*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7000fff; valaddr_reg:x3; val_offset:97902*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97902*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7001fff; valaddr_reg:x3; val_offset:97905*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97905*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7003fff; valaddr_reg:x3; val_offset:97908*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97908*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7007fff; valaddr_reg:x3; val_offset:97911*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97911*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc700ffff; valaddr_reg:x3; val_offset:97914*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97914*0 + 3*254*FLEN/8, x4, x1, x2) + +inst_32639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc701ffff; valaddr_reg:x3; val_offset:97917*0 + 3*254*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97917*0 + 3*254*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194303,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194304,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6291456,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7340032,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7864320,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8126464,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8257536,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8323072,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8355840,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8372224,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8380416,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8384512,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8386560,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8387584,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388096,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388352,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388480,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388544,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388576,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388592,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2132943109,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388607,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535552,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535553,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535555,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535559,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535567,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535583,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535615,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535679,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535807,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256536063,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256536575,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256537599,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256539647,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256543743,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256551935,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256568319,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256601087,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256666623,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256797695,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2257059839,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2257584127,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2258632703,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2260729855,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2260729856,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2262827008,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2263875584,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264399872,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264662016,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264793088,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264858624,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264891392,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264907776,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264915968,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264920064,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264922112,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923136,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923648,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264923904,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924032,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924096,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924128,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924144,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924152,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924156,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924158,32,FLEN) +NAN_BOXED(2132956574,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924159,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338665984,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338665985,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338665987,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338665991,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338665999,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338666015,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338666047,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338666111,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338666239,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338666495,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338667007,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338668031,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338670079,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338674175,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338682367,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338698751,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338731519,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338797055,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-256.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-256.S new file mode 100644 index 000000000..0a0fd5d6c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-256.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_32640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc703ffff; valaddr_reg:x3; val_offset:97920*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97920*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc707ffff; valaddr_reg:x3; val_offset:97923*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97923*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc70fffff; valaddr_reg:x3; val_offset:97926*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97926*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc71fffff; valaddr_reg:x3; val_offset:97929*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97929*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc73fffff; valaddr_reg:x3; val_offset:97932*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97932*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7400000; valaddr_reg:x3; val_offset:97935*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97935*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7600000; valaddr_reg:x3; val_offset:97938*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97938*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7700000; valaddr_reg:x3; val_offset:97941*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97941*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc7780000; valaddr_reg:x3; val_offset:97944*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97944*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77c0000; valaddr_reg:x3; val_offset:97947*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97947*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77e0000; valaddr_reg:x3; val_offset:97950*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97950*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77f0000; valaddr_reg:x3; val_offset:97953*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97953*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77f8000; valaddr_reg:x3; val_offset:97956*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97956*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77fc000; valaddr_reg:x3; val_offset:97959*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97959*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77fe000; valaddr_reg:x3; val_offset:97962*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97962*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77ff000; valaddr_reg:x3; val_offset:97965*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97965*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77ff800; valaddr_reg:x3; val_offset:97968*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97968*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77ffc00; valaddr_reg:x3; val_offset:97971*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97971*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77ffe00; valaddr_reg:x3; val_offset:97974*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97974*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77fff00; valaddr_reg:x3; val_offset:97977*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97977*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77fff80; valaddr_reg:x3; val_offset:97980*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97980*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77fffc0; valaddr_reg:x3; val_offset:97983*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97983*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77fffe0; valaddr_reg:x3; val_offset:97986*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97986*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77ffff0; valaddr_reg:x3; val_offset:97989*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97989*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77ffff8; valaddr_reg:x3; val_offset:97992*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97992*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77ffffc; valaddr_reg:x3; val_offset:97995*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97995*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77ffffe; valaddr_reg:x3; val_offset:97998*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 97998*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x228047 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x326976 and fs3 == 1 and fe3 == 0x8e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f228047; op2val:0x80326976; +op3val:0xc77fffff; valaddr_reg:x3; val_offset:98001*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98001*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbf800001; valaddr_reg:x3; val_offset:98004*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98004*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbf800003; valaddr_reg:x3; val_offset:98007*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98007*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbf800007; valaddr_reg:x3; val_offset:98010*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98010*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbf999999; valaddr_reg:x3; val_offset:98013*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98013*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:98016*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98016*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:98019*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98019*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:98022*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98022*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:98025*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98025*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:98028*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98028*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:98031*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98031*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:98034*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98034*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:98037*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98037*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:98040*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98040*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:98043*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98043*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:98046*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98046*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:98049*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98049*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6800000; valaddr_reg:x3; val_offset:98052*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98052*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6800001; valaddr_reg:x3; val_offset:98055*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98055*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6800003; valaddr_reg:x3; val_offset:98058*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98058*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6800007; valaddr_reg:x3; val_offset:98061*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98061*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc680000f; valaddr_reg:x3; val_offset:98064*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98064*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc680001f; valaddr_reg:x3; val_offset:98067*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98067*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc680003f; valaddr_reg:x3; val_offset:98070*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98070*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc680007f; valaddr_reg:x3; val_offset:98073*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98073*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc68000ff; valaddr_reg:x3; val_offset:98076*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98076*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc68001ff; valaddr_reg:x3; val_offset:98079*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98079*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc68003ff; valaddr_reg:x3; val_offset:98082*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98082*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc68007ff; valaddr_reg:x3; val_offset:98085*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98085*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6800fff; valaddr_reg:x3; val_offset:98088*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98088*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6801fff; valaddr_reg:x3; val_offset:98091*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98091*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6803fff; valaddr_reg:x3; val_offset:98094*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98094*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6807fff; valaddr_reg:x3; val_offset:98097*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98097*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc680ffff; valaddr_reg:x3; val_offset:98100*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98100*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc681ffff; valaddr_reg:x3; val_offset:98103*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98103*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc683ffff; valaddr_reg:x3; val_offset:98106*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98106*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc687ffff; valaddr_reg:x3; val_offset:98109*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98109*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc68fffff; valaddr_reg:x3; val_offset:98112*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98112*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc69fffff; valaddr_reg:x3; val_offset:98115*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98115*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6bfffff; valaddr_reg:x3; val_offset:98118*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98118*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6c00000; valaddr_reg:x3; val_offset:98121*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98121*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6e00000; valaddr_reg:x3; val_offset:98124*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98124*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6f00000; valaddr_reg:x3; val_offset:98127*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98127*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6f80000; valaddr_reg:x3; val_offset:98130*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98130*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fc0000; valaddr_reg:x3; val_offset:98133*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98133*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fe0000; valaddr_reg:x3; val_offset:98136*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98136*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ff0000; valaddr_reg:x3; val_offset:98139*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98139*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ff8000; valaddr_reg:x3; val_offset:98142*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98142*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ffc000; valaddr_reg:x3; val_offset:98145*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98145*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ffe000; valaddr_reg:x3; val_offset:98148*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98148*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fff000; valaddr_reg:x3; val_offset:98151*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98151*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fff800; valaddr_reg:x3; val_offset:98154*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98154*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fffc00; valaddr_reg:x3; val_offset:98157*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98157*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fffe00; valaddr_reg:x3; val_offset:98160*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98160*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ffff00; valaddr_reg:x3; val_offset:98163*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98163*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ffff80; valaddr_reg:x3; val_offset:98166*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98166*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ffffc0; valaddr_reg:x3; val_offset:98169*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98169*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ffffe0; valaddr_reg:x3; val_offset:98172*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98172*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fffff0; valaddr_reg:x3; val_offset:98175*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98175*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fffff8; valaddr_reg:x3; val_offset:98178*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98178*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fffffc; valaddr_reg:x3; val_offset:98181*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98181*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6fffffe; valaddr_reg:x3; val_offset:98184*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98184*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x231790 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x323ab3 and fs3 == 1 and fe3 == 0x8d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f231790; op2val:0x80323ab3; +op3val:0xc6ffffff; valaddr_reg:x3; val_offset:98187*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98187*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:98190*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98190*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:98193*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98193*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:98196*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98196*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:98199*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98199*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:98202*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98202*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:98205*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98205*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:98208*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98208*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:98211*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98211*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:98214*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98214*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:98217*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98217*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:98220*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98220*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:98223*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98223*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:98226*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98226*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:98229*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98229*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:98232*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98232*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:98235*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98235*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa000000; valaddr_reg:x3; val_offset:98238*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98238*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa000001; valaddr_reg:x3; val_offset:98241*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98241*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa000003; valaddr_reg:x3; val_offset:98244*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98244*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa000007; valaddr_reg:x3; val_offset:98247*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98247*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa00000f; valaddr_reg:x3; val_offset:98250*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98250*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa00001f; valaddr_reg:x3; val_offset:98253*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98253*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa00003f; valaddr_reg:x3; val_offset:98256*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98256*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa00007f; valaddr_reg:x3; val_offset:98259*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98259*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa0000ff; valaddr_reg:x3; val_offset:98262*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98262*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa0001ff; valaddr_reg:x3; val_offset:98265*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98265*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa0003ff; valaddr_reg:x3; val_offset:98268*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98268*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa0007ff; valaddr_reg:x3; val_offset:98271*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98271*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa000fff; valaddr_reg:x3; val_offset:98274*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98274*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa001fff; valaddr_reg:x3; val_offset:98277*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98277*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa003fff; valaddr_reg:x3; val_offset:98280*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98280*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa007fff; valaddr_reg:x3; val_offset:98283*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98283*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa00ffff; valaddr_reg:x3; val_offset:98286*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98286*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa01ffff; valaddr_reg:x3; val_offset:98289*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98289*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa03ffff; valaddr_reg:x3; val_offset:98292*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98292*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa07ffff; valaddr_reg:x3; val_offset:98295*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98295*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa0fffff; valaddr_reg:x3; val_offset:98298*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98298*0 + 3*255*FLEN/8, x4, x1, x2) + +inst_32767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa1fffff; valaddr_reg:x3; val_offset:98301*0 + 3*255*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98301*0 + 3*255*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3338928127,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3339190271,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3339714559,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3340763135,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3342860287,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3342860288,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3344957440,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3346006016,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3346530304,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3346792448,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3346923520,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3346989056,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347021824,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347038208,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347046400,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347050496,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347052544,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347053568,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054080,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054336,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054464,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054528,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054560,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054576,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054584,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054588,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054590,32,FLEN) +NAN_BOXED(2132967495,32,FLEN) +NAN_BOXED(2150787446,32,FLEN) +NAN_BOXED(3347054591,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277376,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277377,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277379,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277383,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277391,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277407,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277439,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277503,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277631,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330277887,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330278399,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330279423,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330281471,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330285567,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330293759,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330310143,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330342911,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330408447,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330539519,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3330801663,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3331325951,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3332374527,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3334471679,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3334471680,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3336568832,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3337617408,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338141696,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338403840,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338534912,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338600448,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338633216,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338649600,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338657792,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338661888,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338663936,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338664960,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665472,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665728,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665856,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665920,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665952,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665968,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665976,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665980,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665982,32,FLEN) +NAN_BOXED(2133006224,32,FLEN) +NAN_BOXED(2150775475,32,FLEN) +NAN_BOXED(3338665983,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772160,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772161,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772163,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772167,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772175,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772191,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772223,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772287,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772415,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167772671,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167773183,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167774207,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167776255,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167780351,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167788543,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167804927,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167837695,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(167903231,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168034303,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168296447,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(168820735,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(169869311,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-257.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-257.S new file mode 100644 index 000000000..fb5965c54 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-257.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_32768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa3fffff; valaddr_reg:x3; val_offset:98304*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98304*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa400000; valaddr_reg:x3; val_offset:98307*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98307*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa600000; valaddr_reg:x3; val_offset:98310*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98310*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa700000; valaddr_reg:x3; val_offset:98313*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98313*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa780000; valaddr_reg:x3; val_offset:98316*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98316*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7c0000; valaddr_reg:x3; val_offset:98319*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98319*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7e0000; valaddr_reg:x3; val_offset:98322*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98322*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7f0000; valaddr_reg:x3; val_offset:98325*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98325*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7f8000; valaddr_reg:x3; val_offset:98328*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98328*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7fc000; valaddr_reg:x3; val_offset:98331*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98331*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7fe000; valaddr_reg:x3; val_offset:98334*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98334*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7ff000; valaddr_reg:x3; val_offset:98337*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98337*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7ff800; valaddr_reg:x3; val_offset:98340*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98340*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7ffc00; valaddr_reg:x3; val_offset:98343*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98343*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7ffe00; valaddr_reg:x3; val_offset:98346*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98346*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7fff00; valaddr_reg:x3; val_offset:98349*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98349*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7fff80; valaddr_reg:x3; val_offset:98352*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98352*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7fffc0; valaddr_reg:x3; val_offset:98355*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98355*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7fffe0; valaddr_reg:x3; val_offset:98358*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98358*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7ffff0; valaddr_reg:x3; val_offset:98361*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98361*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7ffff8; valaddr_reg:x3; val_offset:98364*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98364*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7ffffc; valaddr_reg:x3; val_offset:98367*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98367*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7ffffe; valaddr_reg:x3; val_offset:98370*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98370*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x234a7c and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f234a7c; op2val:0x0; +op3val:0xa7fffff; valaddr_reg:x3; val_offset:98373*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98373*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbf800001; valaddr_reg:x3; val_offset:98376*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98376*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbf800003; valaddr_reg:x3; val_offset:98379*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98379*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbf800007; valaddr_reg:x3; val_offset:98382*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98382*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbf999999; valaddr_reg:x3; val_offset:98385*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98385*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:98388*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98388*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:98391*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98391*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:98394*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98394*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:98397*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98397*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:98400*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98400*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:98403*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98403*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:98406*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98406*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:98409*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98409*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:98412*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98412*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:98415*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98415*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:98418*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98418*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:98421*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98421*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3000000; valaddr_reg:x3; val_offset:98424*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98424*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3000001; valaddr_reg:x3; val_offset:98427*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98427*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3000003; valaddr_reg:x3; val_offset:98430*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98430*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3000007; valaddr_reg:x3; val_offset:98433*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98433*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc300000f; valaddr_reg:x3; val_offset:98436*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98436*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc300001f; valaddr_reg:x3; val_offset:98439*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98439*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc300003f; valaddr_reg:x3; val_offset:98442*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98442*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc300007f; valaddr_reg:x3; val_offset:98445*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98445*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc30000ff; valaddr_reg:x3; val_offset:98448*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98448*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc30001ff; valaddr_reg:x3; val_offset:98451*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98451*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc30003ff; valaddr_reg:x3; val_offset:98454*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98454*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc30007ff; valaddr_reg:x3; val_offset:98457*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98457*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3000fff; valaddr_reg:x3; val_offset:98460*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98460*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3001fff; valaddr_reg:x3; val_offset:98463*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98463*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3003fff; valaddr_reg:x3; val_offset:98466*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98466*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3007fff; valaddr_reg:x3; val_offset:98469*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98469*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc300ffff; valaddr_reg:x3; val_offset:98472*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98472*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc301ffff; valaddr_reg:x3; val_offset:98475*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98475*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc303ffff; valaddr_reg:x3; val_offset:98478*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98478*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc307ffff; valaddr_reg:x3; val_offset:98481*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98481*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc30fffff; valaddr_reg:x3; val_offset:98484*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98484*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc31fffff; valaddr_reg:x3; val_offset:98487*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98487*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc33fffff; valaddr_reg:x3; val_offset:98490*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98490*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3400000; valaddr_reg:x3; val_offset:98493*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98493*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3600000; valaddr_reg:x3; val_offset:98496*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98496*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3700000; valaddr_reg:x3; val_offset:98499*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98499*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc3780000; valaddr_reg:x3; val_offset:98502*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98502*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37c0000; valaddr_reg:x3; val_offset:98505*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98505*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37e0000; valaddr_reg:x3; val_offset:98508*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98508*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37f0000; valaddr_reg:x3; val_offset:98511*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98511*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37f8000; valaddr_reg:x3; val_offset:98514*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98514*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37fc000; valaddr_reg:x3; val_offset:98517*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98517*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37fe000; valaddr_reg:x3; val_offset:98520*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98520*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37ff000; valaddr_reg:x3; val_offset:98523*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98523*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37ff800; valaddr_reg:x3; val_offset:98526*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98526*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37ffc00; valaddr_reg:x3; val_offset:98529*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98529*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37ffe00; valaddr_reg:x3; val_offset:98532*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98532*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37fff00; valaddr_reg:x3; val_offset:98535*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98535*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37fff80; valaddr_reg:x3; val_offset:98538*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98538*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37fffc0; valaddr_reg:x3; val_offset:98541*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98541*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37fffe0; valaddr_reg:x3; val_offset:98544*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98544*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37ffff0; valaddr_reg:x3; val_offset:98547*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98547*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37ffff8; valaddr_reg:x3; val_offset:98550*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98550*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37ffffc; valaddr_reg:x3; val_offset:98553*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98553*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37ffffe; valaddr_reg:x3; val_offset:98556*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98556*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x237022 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x321f7b and fs3 == 1 and fe3 == 0x86 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f237022; op2val:0x80321f7b; +op3val:0xc37fffff; valaddr_reg:x3; val_offset:98559*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98559*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:98562*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98562*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:98565*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98565*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:98568*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98568*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:98571*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98571*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:98574*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98574*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:98577*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98577*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:98580*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98580*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:98583*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98583*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:98586*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98586*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:98589*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98589*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:98592*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98592*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:98595*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98595*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:98598*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98598*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:98601*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98601*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:98604*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98604*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:98607*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98607*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87000000; valaddr_reg:x3; val_offset:98610*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98610*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87000001; valaddr_reg:x3; val_offset:98613*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98613*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87000003; valaddr_reg:x3; val_offset:98616*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98616*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87000007; valaddr_reg:x3; val_offset:98619*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98619*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8700000f; valaddr_reg:x3; val_offset:98622*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98622*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8700001f; valaddr_reg:x3; val_offset:98625*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98625*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8700003f; valaddr_reg:x3; val_offset:98628*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98628*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8700007f; valaddr_reg:x3; val_offset:98631*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98631*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x870000ff; valaddr_reg:x3; val_offset:98634*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98634*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x870001ff; valaddr_reg:x3; val_offset:98637*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98637*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x870003ff; valaddr_reg:x3; val_offset:98640*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98640*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x870007ff; valaddr_reg:x3; val_offset:98643*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98643*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87000fff; valaddr_reg:x3; val_offset:98646*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98646*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87001fff; valaddr_reg:x3; val_offset:98649*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98649*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87003fff; valaddr_reg:x3; val_offset:98652*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98652*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87007fff; valaddr_reg:x3; val_offset:98655*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98655*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8700ffff; valaddr_reg:x3; val_offset:98658*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98658*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8701ffff; valaddr_reg:x3; val_offset:98661*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98661*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8703ffff; valaddr_reg:x3; val_offset:98664*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98664*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x8707ffff; valaddr_reg:x3; val_offset:98667*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98667*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x870fffff; valaddr_reg:x3; val_offset:98670*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98670*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x871fffff; valaddr_reg:x3; val_offset:98673*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98673*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x873fffff; valaddr_reg:x3; val_offset:98676*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98676*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87400000; valaddr_reg:x3; val_offset:98679*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98679*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87600000; valaddr_reg:x3; val_offset:98682*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98682*0 + 3*256*FLEN/8, x4, x1, x2) + +inst_32895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87700000; valaddr_reg:x3; val_offset:98685*0 + 3*256*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98685*0 + 3*256*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(171966463,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(171966464,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(174063616,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175112192,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175636480,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(175898624,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176029696,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176095232,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176128000,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176144384,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176152576,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176156672,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176158720,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176159744,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160256,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160512,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160640,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160704,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160736,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160752,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160760,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160764,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160766,32,FLEN) +NAN_BOXED(2133019260,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(176160767,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557120,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557121,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557123,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557127,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557135,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557151,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557183,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557247,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557375,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271557631,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271558143,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271559167,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271561215,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271565311,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271573503,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271589887,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271622655,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271688191,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3271819263,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3272081407,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3272605695,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3273654271,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3275751423,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3275751424,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3277848576,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3278897152,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279421440,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279683584,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279814656,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279880192,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279912960,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279929344,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279937536,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279941632,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279943680,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279944704,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945216,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945472,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945600,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945664,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945696,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945712,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945720,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945724,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945726,32,FLEN) +NAN_BOXED(2133028898,32,FLEN) +NAN_BOXED(2150768507,32,FLEN) +NAN_BOXED(3279945727,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924160,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924161,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924163,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924167,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924175,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924191,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924223,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924287,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924415,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924671,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264925183,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264926207,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264928255,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264932351,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264940543,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264956927,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264989695,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265055231,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265186303,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265448447,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265972735,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2267021311,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2269118463,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2269118464,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2271215616,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2272264192,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-258.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-258.S new file mode 100644 index 000000000..681e1dc70 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-258.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_32896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x87780000; valaddr_reg:x3; val_offset:98688*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98688*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877c0000; valaddr_reg:x3; val_offset:98691*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98691*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877e0000; valaddr_reg:x3; val_offset:98694*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98694*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877f0000; valaddr_reg:x3; val_offset:98697*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98697*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877f8000; valaddr_reg:x3; val_offset:98700*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98700*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877fc000; valaddr_reg:x3; val_offset:98703*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98703*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877fe000; valaddr_reg:x3; val_offset:98706*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98706*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877ff000; valaddr_reg:x3; val_offset:98709*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98709*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877ff800; valaddr_reg:x3; val_offset:98712*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98712*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877ffc00; valaddr_reg:x3; val_offset:98715*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98715*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877ffe00; valaddr_reg:x3; val_offset:98718*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98718*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877fff00; valaddr_reg:x3; val_offset:98721*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98721*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877fff80; valaddr_reg:x3; val_offset:98724*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98724*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877fffc0; valaddr_reg:x3; val_offset:98727*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98727*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877fffe0; valaddr_reg:x3; val_offset:98730*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98730*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877ffff0; valaddr_reg:x3; val_offset:98733*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98733*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877ffff8; valaddr_reg:x3; val_offset:98736*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98736*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877ffffc; valaddr_reg:x3; val_offset:98739*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98739*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877ffffe; valaddr_reg:x3; val_offset:98742*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98742*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23bfb5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23bfb5; op2val:0x80000000; +op3val:0x877fffff; valaddr_reg:x3; val_offset:98745*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98745*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1800000; valaddr_reg:x3; val_offset:98748*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98748*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1800001; valaddr_reg:x3; val_offset:98751*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98751*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1800003; valaddr_reg:x3; val_offset:98754*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98754*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1800007; valaddr_reg:x3; val_offset:98757*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98757*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa180000f; valaddr_reg:x3; val_offset:98760*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98760*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa180001f; valaddr_reg:x3; val_offset:98763*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98763*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa180003f; valaddr_reg:x3; val_offset:98766*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98766*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa180007f; valaddr_reg:x3; val_offset:98769*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98769*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa18000ff; valaddr_reg:x3; val_offset:98772*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98772*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa18001ff; valaddr_reg:x3; val_offset:98775*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98775*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa18003ff; valaddr_reg:x3; val_offset:98778*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98778*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa18007ff; valaddr_reg:x3; val_offset:98781*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98781*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1800fff; valaddr_reg:x3; val_offset:98784*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98784*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1801fff; valaddr_reg:x3; val_offset:98787*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98787*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1803fff; valaddr_reg:x3; val_offset:98790*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98790*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1807fff; valaddr_reg:x3; val_offset:98793*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98793*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa180ffff; valaddr_reg:x3; val_offset:98796*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98796*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa181ffff; valaddr_reg:x3; val_offset:98799*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98799*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa183ffff; valaddr_reg:x3; val_offset:98802*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98802*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa187ffff; valaddr_reg:x3; val_offset:98805*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98805*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa18fffff; valaddr_reg:x3; val_offset:98808*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98808*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa19fffff; valaddr_reg:x3; val_offset:98811*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98811*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1bfffff; valaddr_reg:x3; val_offset:98814*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98814*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1c00000; valaddr_reg:x3; val_offset:98817*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98817*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1e00000; valaddr_reg:x3; val_offset:98820*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98820*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1f00000; valaddr_reg:x3; val_offset:98823*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98823*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1f80000; valaddr_reg:x3; val_offset:98826*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98826*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fc0000; valaddr_reg:x3; val_offset:98829*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98829*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fe0000; valaddr_reg:x3; val_offset:98832*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98832*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ff0000; valaddr_reg:x3; val_offset:98835*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98835*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ff8000; valaddr_reg:x3; val_offset:98838*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98838*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ffc000; valaddr_reg:x3; val_offset:98841*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98841*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ffe000; valaddr_reg:x3; val_offset:98844*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98844*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fff000; valaddr_reg:x3; val_offset:98847*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98847*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fff800; valaddr_reg:x3; val_offset:98850*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98850*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fffc00; valaddr_reg:x3; val_offset:98853*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98853*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fffe00; valaddr_reg:x3; val_offset:98856*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98856*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ffff00; valaddr_reg:x3; val_offset:98859*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98859*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ffff80; valaddr_reg:x3; val_offset:98862*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98862*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ffffc0; valaddr_reg:x3; val_offset:98865*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98865*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ffffe0; valaddr_reg:x3; val_offset:98868*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98868*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fffff0; valaddr_reg:x3; val_offset:98871*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98871*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fffff8; valaddr_reg:x3; val_offset:98874*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98874*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fffffc; valaddr_reg:x3; val_offset:98877*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98877*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1fffffe; valaddr_reg:x3; val_offset:98880*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98880*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x43 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xa1ffffff; valaddr_reg:x3; val_offset:98883*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98883*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbf800001; valaddr_reg:x3; val_offset:98886*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98886*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbf800003; valaddr_reg:x3; val_offset:98889*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98889*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbf800007; valaddr_reg:x3; val_offset:98892*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98892*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbf999999; valaddr_reg:x3; val_offset:98895*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98895*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:98898*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98898*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:98901*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98901*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:98904*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98904*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:98907*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98907*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:98910*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98910*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:98913*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98913*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:98916*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98916*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:98919*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98919*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:98922*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98922*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:98925*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98925*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:98928*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98928*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x23ecb7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x31f963 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f23ecb7; op2val:0x8031f963; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:98931*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98931*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31000000; valaddr_reg:x3; val_offset:98934*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98934*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31000001; valaddr_reg:x3; val_offset:98937*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98937*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31000003; valaddr_reg:x3; val_offset:98940*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98940*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31000007; valaddr_reg:x3; val_offset:98943*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98943*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3100000f; valaddr_reg:x3; val_offset:98946*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98946*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3100001f; valaddr_reg:x3; val_offset:98949*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98949*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3100003f; valaddr_reg:x3; val_offset:98952*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98952*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3100007f; valaddr_reg:x3; val_offset:98955*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98955*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x310000ff; valaddr_reg:x3; val_offset:98958*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98958*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x310001ff; valaddr_reg:x3; val_offset:98961*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98961*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x310003ff; valaddr_reg:x3; val_offset:98964*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98964*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x310007ff; valaddr_reg:x3; val_offset:98967*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98967*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31000fff; valaddr_reg:x3; val_offset:98970*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98970*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31001fff; valaddr_reg:x3; val_offset:98973*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98973*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31003fff; valaddr_reg:x3; val_offset:98976*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98976*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31007fff; valaddr_reg:x3; val_offset:98979*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98979*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3100ffff; valaddr_reg:x3; val_offset:98982*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98982*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3101ffff; valaddr_reg:x3; val_offset:98985*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98985*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3103ffff; valaddr_reg:x3; val_offset:98988*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98988*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3107ffff; valaddr_reg:x3; val_offset:98991*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98991*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x310fffff; valaddr_reg:x3; val_offset:98994*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98994*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_32999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x311fffff; valaddr_reg:x3; val_offset:98997*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 98997*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x313fffff; valaddr_reg:x3; val_offset:99000*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99000*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31400000; valaddr_reg:x3; val_offset:99003*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99003*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31600000; valaddr_reg:x3; val_offset:99006*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99006*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31700000; valaddr_reg:x3; val_offset:99009*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99009*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x31780000; valaddr_reg:x3; val_offset:99012*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99012*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317c0000; valaddr_reg:x3; val_offset:99015*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99015*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317e0000; valaddr_reg:x3; val_offset:99018*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99018*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317f0000; valaddr_reg:x3; val_offset:99021*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99021*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317f8000; valaddr_reg:x3; val_offset:99024*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99024*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317fc000; valaddr_reg:x3; val_offset:99027*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99027*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317fe000; valaddr_reg:x3; val_offset:99030*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99030*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317ff000; valaddr_reg:x3; val_offset:99033*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99033*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317ff800; valaddr_reg:x3; val_offset:99036*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99036*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317ffc00; valaddr_reg:x3; val_offset:99039*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99039*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317ffe00; valaddr_reg:x3; val_offset:99042*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99042*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317fff00; valaddr_reg:x3; val_offset:99045*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99045*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317fff80; valaddr_reg:x3; val_offset:99048*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99048*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317fffc0; valaddr_reg:x3; val_offset:99051*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99051*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317fffe0; valaddr_reg:x3; val_offset:99054*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99054*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317ffff0; valaddr_reg:x3; val_offset:99057*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99057*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317ffff8; valaddr_reg:x3; val_offset:99060*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99060*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317ffffc; valaddr_reg:x3; val_offset:99063*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99063*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317ffffe; valaddr_reg:x3; val_offset:99066*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99066*0 + 3*257*FLEN/8, x4, x1, x2) + +inst_33023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x62 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x317fffff; valaddr_reg:x3; val_offset:99069*0 + 3*257*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99069*0 + 3*257*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2272788480,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273050624,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273181696,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273247232,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273280000,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273296384,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273304576,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273308672,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273310720,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273311744,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312256,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312512,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312640,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312704,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312736,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312752,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312760,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312764,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312766,32,FLEN) +NAN_BOXED(2133049269,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312767,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520384,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520385,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520387,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520391,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520399,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520415,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520447,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520511,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520639,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709520895,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709521407,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709522431,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709524479,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709528575,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709536767,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709553151,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709585919,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709651455,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2709782527,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2710044671,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2710568959,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2711617535,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2713714687,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2713714688,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2715811840,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2716860416,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717384704,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717646848,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717777920,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717843456,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717876224,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717892608,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717900800,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717904896,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717906944,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717907968,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908480,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908736,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908864,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908928,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908960,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908976,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908984,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908988,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908990,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(2717908991,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133060791,32,FLEN) +NAN_BOXED(2150758755,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083584,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083585,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083587,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083591,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083599,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083615,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083647,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083711,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822083839,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822084095,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822084607,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822085631,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822087679,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822091775,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822099967,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822116351,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822149119,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822214655,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822345727,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(822607871,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(823132159,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(824180735,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(826277887,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(826277888,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(828375040,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(829423616,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(829947904,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830210048,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830341120,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830406656,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830439424,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830455808,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830464000,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830468096,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830470144,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830471168,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830471680,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830471936,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830472064,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830472128,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830472160,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830472176,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830472184,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830472188,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830472190,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(830472191,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-259.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-259.S new file mode 100644 index 000000000..55ded3c76 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-259.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_33024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3f800001; valaddr_reg:x3; val_offset:99072*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99072*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3f800003; valaddr_reg:x3; val_offset:99075*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99075*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3f800007; valaddr_reg:x3; val_offset:99078*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99078*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3f999999; valaddr_reg:x3; val_offset:99081*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99081*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:99084*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99084*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:99087*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99087*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:99090*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99090*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:99093*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99093*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:99096*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99096*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:99099*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99099*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:99102*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99102*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:99105*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99105*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:99108*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99108*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:99111*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99111*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:99114*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99114*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2438d0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x31e23b and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2438d0; op2val:0x31e23b; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:99117*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99117*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78000000; valaddr_reg:x3; val_offset:99120*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99120*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78000001; valaddr_reg:x3; val_offset:99123*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99123*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78000003; valaddr_reg:x3; val_offset:99126*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99126*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78000007; valaddr_reg:x3; val_offset:99129*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99129*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7800000f; valaddr_reg:x3; val_offset:99132*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99132*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7800001f; valaddr_reg:x3; val_offset:99135*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99135*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7800003f; valaddr_reg:x3; val_offset:99138*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99138*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7800007f; valaddr_reg:x3; val_offset:99141*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99141*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x780000ff; valaddr_reg:x3; val_offset:99144*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99144*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x780001ff; valaddr_reg:x3; val_offset:99147*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99147*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x780003ff; valaddr_reg:x3; val_offset:99150*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99150*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x780007ff; valaddr_reg:x3; val_offset:99153*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99153*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78000fff; valaddr_reg:x3; val_offset:99156*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99156*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78001fff; valaddr_reg:x3; val_offset:99159*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99159*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78003fff; valaddr_reg:x3; val_offset:99162*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99162*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78007fff; valaddr_reg:x3; val_offset:99165*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99165*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7800ffff; valaddr_reg:x3; val_offset:99168*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99168*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7801ffff; valaddr_reg:x3; val_offset:99171*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99171*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7803ffff; valaddr_reg:x3; val_offset:99174*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99174*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7807ffff; valaddr_reg:x3; val_offset:99177*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99177*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x780fffff; valaddr_reg:x3; val_offset:99180*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99180*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x781fffff; valaddr_reg:x3; val_offset:99183*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99183*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x783fffff; valaddr_reg:x3; val_offset:99186*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99186*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78400000; valaddr_reg:x3; val_offset:99189*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99189*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78600000; valaddr_reg:x3; val_offset:99192*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99192*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78700000; valaddr_reg:x3; val_offset:99195*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99195*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x78780000; valaddr_reg:x3; val_offset:99198*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99198*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787c0000; valaddr_reg:x3; val_offset:99201*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99201*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787e0000; valaddr_reg:x3; val_offset:99204*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99204*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787f0000; valaddr_reg:x3; val_offset:99207*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99207*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787f8000; valaddr_reg:x3; val_offset:99210*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99210*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787fc000; valaddr_reg:x3; val_offset:99213*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99213*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787fe000; valaddr_reg:x3; val_offset:99216*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99216*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787ff000; valaddr_reg:x3; val_offset:99219*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99219*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787ff800; valaddr_reg:x3; val_offset:99222*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99222*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787ffc00; valaddr_reg:x3; val_offset:99225*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99225*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787ffe00; valaddr_reg:x3; val_offset:99228*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99228*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787fff00; valaddr_reg:x3; val_offset:99231*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99231*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787fff80; valaddr_reg:x3; val_offset:99234*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99234*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787fffc0; valaddr_reg:x3; val_offset:99237*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99237*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787fffe0; valaddr_reg:x3; val_offset:99240*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99240*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787ffff0; valaddr_reg:x3; val_offset:99243*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99243*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787ffff8; valaddr_reg:x3; val_offset:99246*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99246*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787ffffc; valaddr_reg:x3; val_offset:99249*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99249*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787ffffe; valaddr_reg:x3; val_offset:99252*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99252*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xf0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x787fffff; valaddr_reg:x3; val_offset:99255*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99255*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f000001; valaddr_reg:x3; val_offset:99258*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99258*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f000003; valaddr_reg:x3; val_offset:99261*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99261*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f000007; valaddr_reg:x3; val_offset:99264*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99264*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f199999; valaddr_reg:x3; val_offset:99267*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99267*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f249249; valaddr_reg:x3; val_offset:99270*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99270*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f333333; valaddr_reg:x3; val_offset:99273*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99273*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:99276*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99276*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:99279*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99279*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f444444; valaddr_reg:x3; val_offset:99282*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99282*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:99285*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99285*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:99288*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99288*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f666666; valaddr_reg:x3; val_offset:99291*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99291*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:99294*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99294*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:99297*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99297*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:99300*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99300*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x254e9f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x463997 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f254e9f; op2val:0x3fc63997; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:99303*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99303*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:99306*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99306*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:99309*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99309*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:99312*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99312*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:99315*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99315*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:99318*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99318*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:99321*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99321*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:99324*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99324*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:99327*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99327*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:99330*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99330*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:99333*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99333*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:99336*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99336*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:99339*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99339*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:99342*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99342*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:99345*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99345*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:99348*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99348*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:99351*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99351*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1800000; valaddr_reg:x3; val_offset:99354*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99354*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1800001; valaddr_reg:x3; val_offset:99357*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99357*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1800003; valaddr_reg:x3; val_offset:99360*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99360*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1800007; valaddr_reg:x3; val_offset:99363*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99363*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x180000f; valaddr_reg:x3; val_offset:99366*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99366*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x180001f; valaddr_reg:x3; val_offset:99369*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99369*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x180003f; valaddr_reg:x3; val_offset:99372*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99372*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x180007f; valaddr_reg:x3; val_offset:99375*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99375*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x18000ff; valaddr_reg:x3; val_offset:99378*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99378*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x18001ff; valaddr_reg:x3; val_offset:99381*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99381*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x18003ff; valaddr_reg:x3; val_offset:99384*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99384*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x18007ff; valaddr_reg:x3; val_offset:99387*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99387*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1800fff; valaddr_reg:x3; val_offset:99390*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99390*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1801fff; valaddr_reg:x3; val_offset:99393*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99393*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1803fff; valaddr_reg:x3; val_offset:99396*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99396*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1807fff; valaddr_reg:x3; val_offset:99399*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99399*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x180ffff; valaddr_reg:x3; val_offset:99402*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99402*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x181ffff; valaddr_reg:x3; val_offset:99405*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99405*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x183ffff; valaddr_reg:x3; val_offset:99408*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99408*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x187ffff; valaddr_reg:x3; val_offset:99411*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99411*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x18fffff; valaddr_reg:x3; val_offset:99414*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99414*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x19fffff; valaddr_reg:x3; val_offset:99417*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99417*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1bfffff; valaddr_reg:x3; val_offset:99420*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99420*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1c00000; valaddr_reg:x3; val_offset:99423*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99423*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1e00000; valaddr_reg:x3; val_offset:99426*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99426*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1f00000; valaddr_reg:x3; val_offset:99429*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99429*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1f80000; valaddr_reg:x3; val_offset:99432*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99432*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fc0000; valaddr_reg:x3; val_offset:99435*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99435*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fe0000; valaddr_reg:x3; val_offset:99438*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99438*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ff0000; valaddr_reg:x3; val_offset:99441*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99441*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ff8000; valaddr_reg:x3; val_offset:99444*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99444*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ffc000; valaddr_reg:x3; val_offset:99447*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99447*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ffe000; valaddr_reg:x3; val_offset:99450*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99450*0 + 3*258*FLEN/8, x4, x1, x2) + +inst_33151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fff000; valaddr_reg:x3; val_offset:99453*0 + 3*258*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99453*0 + 3*258*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2133080272,32,FLEN) +NAN_BOXED(3269179,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013265920,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013265921,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013265923,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013265927,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013265935,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013265951,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013265983,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013266047,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013266175,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013266431,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013266943,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013267967,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013270015,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013274111,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013282303,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013298687,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013331455,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013396991,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013528063,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2013790207,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2014314495,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2015363071,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2017460223,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2017460224,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2019557376,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2020605952,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021130240,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021392384,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021523456,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021588992,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021621760,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021638144,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021646336,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021650432,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021652480,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021653504,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654016,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654272,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654400,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654464,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654496,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654512,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654520,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654524,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654526,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2021654527,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2133151391,32,FLEN) +NAN_BOXED(1069955479,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165824,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165825,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165827,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165831,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165839,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165855,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165887,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165951,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166079,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166335,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166847,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25167871,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25169919,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25174015,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25182207,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25198591,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25231359,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25296895,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25427967,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25690111,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(26214399,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(27262975,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(29360127,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(29360128,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31457280,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32505856,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33030144,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33292288,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33423360,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33488896,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33521664,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33538048,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33546240,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33550336,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-26.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-26.S new file mode 100644 index 000000000..2168c2cce --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-26.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_3200: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7fffe0; valaddr_reg:x3; val_offset:9600*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9600*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3201: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7ffff0; valaddr_reg:x3; val_offset:9603*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9603*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3202: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7ffff8; valaddr_reg:x3; val_offset:9606*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9606*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3203: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7ffffc; valaddr_reg:x3; val_offset:9609*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9609*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3204: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7ffffe; valaddr_reg:x3; val_offset:9612*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9612*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3205: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x72ea27 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x06e525 and fs3 == 0 and fe3 == 0x9e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d72ea27; op2val:0x186e525; +op3val:0x4f7fffff; valaddr_reg:x3; val_offset:9615*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9615*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3206: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21800000; valaddr_reg:x3; val_offset:9618*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9618*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3207: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21800001; valaddr_reg:x3; val_offset:9621*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9621*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3208: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21800003; valaddr_reg:x3; val_offset:9624*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9624*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3209: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21800007; valaddr_reg:x3; val_offset:9627*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9627*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3210: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x2180000f; valaddr_reg:x3; val_offset:9630*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9630*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3211: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x2180001f; valaddr_reg:x3; val_offset:9633*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9633*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3212: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x2180003f; valaddr_reg:x3; val_offset:9636*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9636*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3213: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x2180007f; valaddr_reg:x3; val_offset:9639*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9639*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3214: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x218000ff; valaddr_reg:x3; val_offset:9642*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9642*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3215: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x218001ff; valaddr_reg:x3; val_offset:9645*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9645*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3216: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x218003ff; valaddr_reg:x3; val_offset:9648*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9648*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3217: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x218007ff; valaddr_reg:x3; val_offset:9651*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9651*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3218: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21800fff; valaddr_reg:x3; val_offset:9654*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9654*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3219: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21801fff; valaddr_reg:x3; val_offset:9657*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9657*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3220: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21803fff; valaddr_reg:x3; val_offset:9660*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9660*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3221: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21807fff; valaddr_reg:x3; val_offset:9663*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9663*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3222: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x2180ffff; valaddr_reg:x3; val_offset:9666*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9666*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3223: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x2181ffff; valaddr_reg:x3; val_offset:9669*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9669*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3224: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x2183ffff; valaddr_reg:x3; val_offset:9672*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9672*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3225: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x2187ffff; valaddr_reg:x3; val_offset:9675*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9675*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3226: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x218fffff; valaddr_reg:x3; val_offset:9678*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9678*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3227: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x219fffff; valaddr_reg:x3; val_offset:9681*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9681*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3228: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21bfffff; valaddr_reg:x3; val_offset:9684*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9684*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3229: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21c00000; valaddr_reg:x3; val_offset:9687*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9687*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3230: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21e00000; valaddr_reg:x3; val_offset:9690*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9690*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3231: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21f00000; valaddr_reg:x3; val_offset:9693*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9693*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3232: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21f80000; valaddr_reg:x3; val_offset:9696*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9696*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3233: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fc0000; valaddr_reg:x3; val_offset:9699*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9699*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3234: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fe0000; valaddr_reg:x3; val_offset:9702*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9702*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3235: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ff0000; valaddr_reg:x3; val_offset:9705*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9705*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3236: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ff8000; valaddr_reg:x3; val_offset:9708*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9708*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3237: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ffc000; valaddr_reg:x3; val_offset:9711*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9711*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3238: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ffe000; valaddr_reg:x3; val_offset:9714*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9714*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3239: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fff000; valaddr_reg:x3; val_offset:9717*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9717*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3240: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fff800; valaddr_reg:x3; val_offset:9720*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9720*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3241: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fffc00; valaddr_reg:x3; val_offset:9723*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9723*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3242: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fffe00; valaddr_reg:x3; val_offset:9726*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9726*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3243: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ffff00; valaddr_reg:x3; val_offset:9729*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9729*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3244: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ffff80; valaddr_reg:x3; val_offset:9732*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9732*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3245: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ffffc0; valaddr_reg:x3; val_offset:9735*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9735*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3246: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ffffe0; valaddr_reg:x3; val_offset:9738*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9738*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3247: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fffff0; valaddr_reg:x3; val_offset:9741*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9741*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3248: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fffff8; valaddr_reg:x3; val_offset:9744*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9744*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3249: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fffffc; valaddr_reg:x3; val_offset:9747*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9747*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3250: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21fffffe; valaddr_reg:x3; val_offset:9750*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9750*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3251: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x43 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x21ffffff; valaddr_reg:x3; val_offset:9753*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9753*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3252: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3f800001; valaddr_reg:x3; val_offset:9756*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9756*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3253: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3f800003; valaddr_reg:x3; val_offset:9759*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9759*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3254: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3f800007; valaddr_reg:x3; val_offset:9762*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9762*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3255: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3f999999; valaddr_reg:x3; val_offset:9765*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9765*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3256: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:9768*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9768*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3257: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:9771*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9771*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3258: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:9774*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9774*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3259: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:9777*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9777*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3260: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:9780*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9780*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3261: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:9783*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9783*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3262: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:9786*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9786*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3263: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:9789*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9789*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3264: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:9792*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9792*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3265: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:9795*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9795*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3266: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:9798*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9798*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3267: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x7685d7 and fs2 == 0 and fe2 == 0x03 and fm2 == 0x04ebb6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d7685d7; op2val:0x184ebb6; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:9801*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9801*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3268: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:9804*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9804*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3269: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:9807*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9807*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3270: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:9810*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9810*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3271: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:9813*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9813*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3272: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:9816*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9816*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3273: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:9819*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9819*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3274: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:9822*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9822*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3275: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:9825*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9825*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3276: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:9828*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9828*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3277: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:9831*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9831*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3278: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:9834*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9834*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3279: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:9837*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9837*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3280: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:9840*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9840*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3281: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:9843*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9843*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3282: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:9846*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9846*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3283: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:9849*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9849*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3284: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87000000; valaddr_reg:x3; val_offset:9852*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9852*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3285: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87000001; valaddr_reg:x3; val_offset:9855*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9855*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3286: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87000003; valaddr_reg:x3; val_offset:9858*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9858*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3287: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87000007; valaddr_reg:x3; val_offset:9861*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9861*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3288: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8700000f; valaddr_reg:x3; val_offset:9864*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9864*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3289: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8700001f; valaddr_reg:x3; val_offset:9867*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9867*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3290: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8700003f; valaddr_reg:x3; val_offset:9870*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9870*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3291: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8700007f; valaddr_reg:x3; val_offset:9873*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9873*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3292: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x870000ff; valaddr_reg:x3; val_offset:9876*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9876*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3293: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x870001ff; valaddr_reg:x3; val_offset:9879*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9879*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3294: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x870003ff; valaddr_reg:x3; val_offset:9882*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9882*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3295: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x870007ff; valaddr_reg:x3; val_offset:9885*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9885*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3296: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87000fff; valaddr_reg:x3; val_offset:9888*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9888*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3297: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87001fff; valaddr_reg:x3; val_offset:9891*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9891*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3298: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87003fff; valaddr_reg:x3; val_offset:9894*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9894*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3299: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87007fff; valaddr_reg:x3; val_offset:9897*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9897*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3300: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8700ffff; valaddr_reg:x3; val_offset:9900*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9900*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3301: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8701ffff; valaddr_reg:x3; val_offset:9903*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9903*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3302: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8703ffff; valaddr_reg:x3; val_offset:9906*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9906*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3303: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x8707ffff; valaddr_reg:x3; val_offset:9909*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9909*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3304: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x870fffff; valaddr_reg:x3; val_offset:9912*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9912*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3305: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x871fffff; valaddr_reg:x3; val_offset:9915*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9915*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3306: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x873fffff; valaddr_reg:x3; val_offset:9918*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9918*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3307: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87400000; valaddr_reg:x3; val_offset:9921*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9921*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3308: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87600000; valaddr_reg:x3; val_offset:9924*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9924*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3309: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87700000; valaddr_reg:x3; val_offset:9927*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9927*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3310: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x87780000; valaddr_reg:x3; val_offset:9930*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9930*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3311: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877c0000; valaddr_reg:x3; val_offset:9933*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9933*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3312: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877e0000; valaddr_reg:x3; val_offset:9936*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9936*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3313: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877f0000; valaddr_reg:x3; val_offset:9939*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9939*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3314: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877f8000; valaddr_reg:x3; val_offset:9942*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9942*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3315: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877fc000; valaddr_reg:x3; val_offset:9945*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9945*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3316: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877fe000; valaddr_reg:x3; val_offset:9948*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9948*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3317: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877ff000; valaddr_reg:x3; val_offset:9951*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9951*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3318: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877ff800; valaddr_reg:x3; val_offset:9954*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9954*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3319: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877ffc00; valaddr_reg:x3; val_offset:9957*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9957*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3320: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877ffe00; valaddr_reg:x3; val_offset:9960*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9960*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3321: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877fff00; valaddr_reg:x3; val_offset:9963*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9963*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3322: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877fff80; valaddr_reg:x3; val_offset:9966*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9966*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3323: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877fffc0; valaddr_reg:x3; val_offset:9969*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9969*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3324: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877fffe0; valaddr_reg:x3; val_offset:9972*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9972*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3325: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877ffff0; valaddr_reg:x3; val_offset:9975*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9975*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3326: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877ffff8; valaddr_reg:x3; val_offset:9978*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9978*0 + 3*25*FLEN/8, x4, x1, x2) + +inst_3327: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877ffffc; valaddr_reg:x3; val_offset:9981*0 + 3*25*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9981*0 + 3*25*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788640,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788656,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788664,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788668,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788670,32,FLEN) +NAN_BOXED(2104683047,32,FLEN) +NAN_BOXED(25617701,32,FLEN) +NAN_BOXED(1333788671,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036736,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036737,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036739,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036743,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036751,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036767,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036799,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036863,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562036991,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562037247,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562037759,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562038783,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562040831,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562044927,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562053119,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562069503,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562102271,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562167807,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562298879,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(562561023,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(563085311,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(564133887,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(566231039,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(566231040,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(568328192,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(569376768,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(569901056,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570163200,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570294272,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570359808,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570392576,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570408960,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570417152,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570421248,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570423296,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570424320,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570424832,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425088,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425216,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425280,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425312,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425328,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425336,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425340,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425342,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(570425343,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2104919511,32,FLEN) +NAN_BOXED(25488310,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924160,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924161,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924163,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924167,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924175,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924191,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924223,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924287,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924415,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924671,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264925183,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264926207,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264928255,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264932351,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264940543,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264956927,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264989695,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265055231,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265186303,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265448447,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265972735,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2267021311,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2269118463,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2269118464,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2271215616,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2272264192,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2272788480,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273050624,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273181696,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273247232,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273280000,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273296384,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273304576,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273308672,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273310720,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273311744,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312256,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312512,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312640,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312704,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312736,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312752,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312760,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312764,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-260.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-260.S new file mode 100644 index 000000000..b5ef5b304 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-260.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_33152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fff800; valaddr_reg:x3; val_offset:99456*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99456*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fffc00; valaddr_reg:x3; val_offset:99459*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99459*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fffe00; valaddr_reg:x3; val_offset:99462*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99462*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ffff00; valaddr_reg:x3; val_offset:99465*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99465*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ffff80; valaddr_reg:x3; val_offset:99468*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99468*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ffffc0; valaddr_reg:x3; val_offset:99471*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99471*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ffffe0; valaddr_reg:x3; val_offset:99474*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99474*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fffff0; valaddr_reg:x3; val_offset:99477*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99477*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fffff8; valaddr_reg:x3; val_offset:99480*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99480*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fffffc; valaddr_reg:x3; val_offset:99483*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99483*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1fffffe; valaddr_reg:x3; val_offset:99486*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99486*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25c228 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25c228; op2val:0x0; +op3val:0x1ffffff; valaddr_reg:x3; val_offset:99489*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99489*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60000000; valaddr_reg:x3; val_offset:99492*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99492*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60000001; valaddr_reg:x3; val_offset:99495*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99495*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60000003; valaddr_reg:x3; val_offset:99498*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99498*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60000007; valaddr_reg:x3; val_offset:99501*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99501*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x6000000f; valaddr_reg:x3; val_offset:99504*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99504*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x6000001f; valaddr_reg:x3; val_offset:99507*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99507*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x6000003f; valaddr_reg:x3; val_offset:99510*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99510*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x6000007f; valaddr_reg:x3; val_offset:99513*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99513*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x600000ff; valaddr_reg:x3; val_offset:99516*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99516*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x600001ff; valaddr_reg:x3; val_offset:99519*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99519*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x600003ff; valaddr_reg:x3; val_offset:99522*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99522*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x600007ff; valaddr_reg:x3; val_offset:99525*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99525*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60000fff; valaddr_reg:x3; val_offset:99528*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99528*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60001fff; valaddr_reg:x3; val_offset:99531*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99531*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60003fff; valaddr_reg:x3; val_offset:99534*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99534*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60007fff; valaddr_reg:x3; val_offset:99537*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99537*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x6000ffff; valaddr_reg:x3; val_offset:99540*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99540*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x6001ffff; valaddr_reg:x3; val_offset:99543*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99543*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x6003ffff; valaddr_reg:x3; val_offset:99546*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99546*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x6007ffff; valaddr_reg:x3; val_offset:99549*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99549*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x600fffff; valaddr_reg:x3; val_offset:99552*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99552*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x601fffff; valaddr_reg:x3; val_offset:99555*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99555*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x603fffff; valaddr_reg:x3; val_offset:99558*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99558*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60400000; valaddr_reg:x3; val_offset:99561*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99561*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60600000; valaddr_reg:x3; val_offset:99564*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99564*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60700000; valaddr_reg:x3; val_offset:99567*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99567*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x60780000; valaddr_reg:x3; val_offset:99570*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99570*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607c0000; valaddr_reg:x3; val_offset:99573*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99573*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607e0000; valaddr_reg:x3; val_offset:99576*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99576*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607f0000; valaddr_reg:x3; val_offset:99579*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99579*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607f8000; valaddr_reg:x3; val_offset:99582*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99582*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607fc000; valaddr_reg:x3; val_offset:99585*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99585*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607fe000; valaddr_reg:x3; val_offset:99588*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99588*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607ff000; valaddr_reg:x3; val_offset:99591*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99591*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607ff800; valaddr_reg:x3; val_offset:99594*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99594*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607ffc00; valaddr_reg:x3; val_offset:99597*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99597*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607ffe00; valaddr_reg:x3; val_offset:99600*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99600*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607fff00; valaddr_reg:x3; val_offset:99603*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99603*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607fff80; valaddr_reg:x3; val_offset:99606*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99606*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607fffc0; valaddr_reg:x3; val_offset:99609*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99609*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607fffe0; valaddr_reg:x3; val_offset:99612*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99612*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607ffff0; valaddr_reg:x3; val_offset:99615*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99615*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607ffff8; valaddr_reg:x3; val_offset:99618*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99618*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607ffffc; valaddr_reg:x3; val_offset:99621*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99621*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607ffffe; valaddr_reg:x3; val_offset:99624*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99624*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xc0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x607fffff; valaddr_reg:x3; val_offset:99627*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99627*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f000001; valaddr_reg:x3; val_offset:99630*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99630*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f000003; valaddr_reg:x3; val_offset:99633*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99633*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f000007; valaddr_reg:x3; val_offset:99636*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99636*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f199999; valaddr_reg:x3; val_offset:99639*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99639*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f249249; valaddr_reg:x3; val_offset:99642*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99642*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f333333; valaddr_reg:x3; val_offset:99645*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99645*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:99648*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99648*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:99651*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99651*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f444444; valaddr_reg:x3; val_offset:99654*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99654*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:99657*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99657*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:99660*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99660*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f666666; valaddr_reg:x3; val_offset:99663*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99663*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:99666*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99666*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:99669*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99669*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:99672*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99672*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x25e629 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x458486 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f25e629; op2val:0x3fc58486; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:99675*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99675*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:99678*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99678*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:99681*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99681*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:99684*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99684*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:99687*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99687*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:99690*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99690*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:99693*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99693*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:99696*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99696*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:99699*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99699*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:99702*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99702*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:99705*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99705*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:99708*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99708*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:99711*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99711*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:99714*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99714*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:99717*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99717*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:99720*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99720*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:99723*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99723*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88800000; valaddr_reg:x3; val_offset:99726*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99726*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88800001; valaddr_reg:x3; val_offset:99729*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99729*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88800003; valaddr_reg:x3; val_offset:99732*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99732*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88800007; valaddr_reg:x3; val_offset:99735*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99735*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8880000f; valaddr_reg:x3; val_offset:99738*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99738*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8880001f; valaddr_reg:x3; val_offset:99741*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99741*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8880003f; valaddr_reg:x3; val_offset:99744*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99744*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8880007f; valaddr_reg:x3; val_offset:99747*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99747*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x888000ff; valaddr_reg:x3; val_offset:99750*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99750*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x888001ff; valaddr_reg:x3; val_offset:99753*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99753*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x888003ff; valaddr_reg:x3; val_offset:99756*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99756*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x888007ff; valaddr_reg:x3; val_offset:99759*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99759*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88800fff; valaddr_reg:x3; val_offset:99762*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99762*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88801fff; valaddr_reg:x3; val_offset:99765*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99765*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88803fff; valaddr_reg:x3; val_offset:99768*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99768*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88807fff; valaddr_reg:x3; val_offset:99771*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99771*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8880ffff; valaddr_reg:x3; val_offset:99774*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99774*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8881ffff; valaddr_reg:x3; val_offset:99777*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99777*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8883ffff; valaddr_reg:x3; val_offset:99780*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99780*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x8887ffff; valaddr_reg:x3; val_offset:99783*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99783*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x888fffff; valaddr_reg:x3; val_offset:99786*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99786*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x889fffff; valaddr_reg:x3; val_offset:99789*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99789*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88bfffff; valaddr_reg:x3; val_offset:99792*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99792*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88c00000; valaddr_reg:x3; val_offset:99795*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99795*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88e00000; valaddr_reg:x3; val_offset:99798*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99798*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88f00000; valaddr_reg:x3; val_offset:99801*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99801*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88f80000; valaddr_reg:x3; val_offset:99804*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99804*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fc0000; valaddr_reg:x3; val_offset:99807*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99807*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fe0000; valaddr_reg:x3; val_offset:99810*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99810*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ff0000; valaddr_reg:x3; val_offset:99813*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99813*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ff8000; valaddr_reg:x3; val_offset:99816*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99816*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ffc000; valaddr_reg:x3; val_offset:99819*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99819*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ffe000; valaddr_reg:x3; val_offset:99822*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99822*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fff000; valaddr_reg:x3; val_offset:99825*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99825*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fff800; valaddr_reg:x3; val_offset:99828*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99828*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fffc00; valaddr_reg:x3; val_offset:99831*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99831*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fffe00; valaddr_reg:x3; val_offset:99834*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99834*0 + 3*259*FLEN/8, x4, x1, x2) + +inst_33279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ffff00; valaddr_reg:x3; val_offset:99837*0 + 3*259*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99837*0 + 3*259*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33552384,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33553408,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33553920,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554176,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554304,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554368,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554400,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554416,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554424,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554428,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554430,32,FLEN) +NAN_BOXED(2133180968,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554431,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612736,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612737,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612739,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612743,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612751,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612767,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612799,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612863,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610612991,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610613247,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610613759,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610614783,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610616831,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610620927,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610629119,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610645503,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610678271,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610743807,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1610874879,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1611137023,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1611661311,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1612709887,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1614807039,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1614807040,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1616904192,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1617952768,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618477056,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618739200,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618870272,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618935808,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618968576,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618984960,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618993152,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618997248,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1618999296,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619000320,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619000832,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001088,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001216,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001280,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001312,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001328,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001336,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001340,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001342,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(1619001343,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2133190185,32,FLEN) +NAN_BOXED(1069909126,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089984,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089985,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089987,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089991,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089999,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090015,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090047,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090111,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090239,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090495,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290091007,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290092031,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290094079,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290098175,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290106367,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290122751,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290155519,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290221055,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290352127,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290614271,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2291138559,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2292187135,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2294284287,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2294284288,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2296381440,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2297430016,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2297954304,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298216448,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298347520,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298413056,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298445824,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298462208,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298470400,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298474496,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298476544,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298477568,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478080,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478336,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-261.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-261.S new file mode 100644 index 000000000..02b267242 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-261.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_33280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ffff80; valaddr_reg:x3; val_offset:99840*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99840*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ffffc0; valaddr_reg:x3; val_offset:99843*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99843*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ffffe0; valaddr_reg:x3; val_offset:99846*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99846*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fffff0; valaddr_reg:x3; val_offset:99849*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99849*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fffff8; valaddr_reg:x3; val_offset:99852*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99852*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fffffc; valaddr_reg:x3; val_offset:99855*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99855*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88fffffe; valaddr_reg:x3; val_offset:99858*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99858*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x260981 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f260981; op2val:0x80000000; +op3val:0x88ffffff; valaddr_reg:x3; val_offset:99861*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99861*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:99864*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99864*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:99867*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99867*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:99870*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99870*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:99873*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99873*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:99876*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99876*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:99879*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99879*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:99882*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99882*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:99885*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99885*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:99888*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99888*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:99891*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99891*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:99894*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99894*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:99897*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99897*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:99900*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99900*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:99903*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99903*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:99906*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99906*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:99909*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99909*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82000000; valaddr_reg:x3; val_offset:99912*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99912*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82000001; valaddr_reg:x3; val_offset:99915*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99915*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82000003; valaddr_reg:x3; val_offset:99918*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99918*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82000007; valaddr_reg:x3; val_offset:99921*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99921*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8200000f; valaddr_reg:x3; val_offset:99924*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99924*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8200001f; valaddr_reg:x3; val_offset:99927*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99927*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8200003f; valaddr_reg:x3; val_offset:99930*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99930*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8200007f; valaddr_reg:x3; val_offset:99933*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99933*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x820000ff; valaddr_reg:x3; val_offset:99936*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99936*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x820001ff; valaddr_reg:x3; val_offset:99939*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99939*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x820003ff; valaddr_reg:x3; val_offset:99942*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99942*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x820007ff; valaddr_reg:x3; val_offset:99945*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99945*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82000fff; valaddr_reg:x3; val_offset:99948*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99948*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82001fff; valaddr_reg:x3; val_offset:99951*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99951*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82003fff; valaddr_reg:x3; val_offset:99954*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99954*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82007fff; valaddr_reg:x3; val_offset:99957*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99957*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8200ffff; valaddr_reg:x3; val_offset:99960*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99960*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8201ffff; valaddr_reg:x3; val_offset:99963*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99963*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8203ffff; valaddr_reg:x3; val_offset:99966*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99966*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x8207ffff; valaddr_reg:x3; val_offset:99969*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99969*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x820fffff; valaddr_reg:x3; val_offset:99972*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99972*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x821fffff; valaddr_reg:x3; val_offset:99975*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99975*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x823fffff; valaddr_reg:x3; val_offset:99978*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99978*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82400000; valaddr_reg:x3; val_offset:99981*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99981*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82600000; valaddr_reg:x3; val_offset:99984*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99984*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82700000; valaddr_reg:x3; val_offset:99987*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99987*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x82780000; valaddr_reg:x3; val_offset:99990*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99990*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827c0000; valaddr_reg:x3; val_offset:99993*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99993*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827e0000; valaddr_reg:x3; val_offset:99996*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99996*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827f0000; valaddr_reg:x3; val_offset:99999*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 99999*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827f8000; valaddr_reg:x3; val_offset:100002*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100002*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827fc000; valaddr_reg:x3; val_offset:100005*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100005*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827fe000; valaddr_reg:x3; val_offset:100008*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100008*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827ff000; valaddr_reg:x3; val_offset:100011*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100011*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827ff800; valaddr_reg:x3; val_offset:100014*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100014*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827ffc00; valaddr_reg:x3; val_offset:100017*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100017*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827ffe00; valaddr_reg:x3; val_offset:100020*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100020*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827fff00; valaddr_reg:x3; val_offset:100023*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100023*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827fff80; valaddr_reg:x3; val_offset:100026*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100026*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827fffc0; valaddr_reg:x3; val_offset:100029*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100029*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827fffe0; valaddr_reg:x3; val_offset:100032*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100032*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827ffff0; valaddr_reg:x3; val_offset:100035*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100035*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827ffff8; valaddr_reg:x3; val_offset:100038*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100038*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827ffffc; valaddr_reg:x3; val_offset:100041*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100041*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827ffffe; valaddr_reg:x3; val_offset:100044*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100044*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x269468 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f269468; op2val:0x80000000; +op3val:0x827fffff; valaddr_reg:x3; val_offset:100047*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100047*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:100050*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100050*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:100053*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100053*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:100056*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100056*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:100059*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100059*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:100062*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100062*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:100065*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100065*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:100068*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100068*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:100071*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100071*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:100074*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100074*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:100077*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100077*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:100080*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100080*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:100083*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100083*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:100086*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100086*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:100089*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100089*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:100092*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100092*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:100095*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100095*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb800000; valaddr_reg:x3; val_offset:100098*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100098*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb800001; valaddr_reg:x3; val_offset:100101*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100101*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb800003; valaddr_reg:x3; val_offset:100104*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100104*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb800007; valaddr_reg:x3; val_offset:100107*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100107*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb80000f; valaddr_reg:x3; val_offset:100110*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100110*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb80001f; valaddr_reg:x3; val_offset:100113*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100113*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb80003f; valaddr_reg:x3; val_offset:100116*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100116*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb80007f; valaddr_reg:x3; val_offset:100119*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100119*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb8000ff; valaddr_reg:x3; val_offset:100122*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100122*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb8001ff; valaddr_reg:x3; val_offset:100125*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100125*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb8003ff; valaddr_reg:x3; val_offset:100128*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100128*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb8007ff; valaddr_reg:x3; val_offset:100131*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100131*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb800fff; valaddr_reg:x3; val_offset:100134*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100134*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb801fff; valaddr_reg:x3; val_offset:100137*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100137*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb803fff; valaddr_reg:x3; val_offset:100140*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100140*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb807fff; valaddr_reg:x3; val_offset:100143*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100143*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb80ffff; valaddr_reg:x3; val_offset:100146*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100146*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb81ffff; valaddr_reg:x3; val_offset:100149*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100149*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb83ffff; valaddr_reg:x3; val_offset:100152*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100152*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb87ffff; valaddr_reg:x3; val_offset:100155*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100155*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb8fffff; valaddr_reg:x3; val_offset:100158*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100158*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xb9fffff; valaddr_reg:x3; val_offset:100161*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100161*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbbfffff; valaddr_reg:x3; val_offset:100164*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100164*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbc00000; valaddr_reg:x3; val_offset:100167*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100167*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbe00000; valaddr_reg:x3; val_offset:100170*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100170*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbf00000; valaddr_reg:x3; val_offset:100173*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100173*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbf80000; valaddr_reg:x3; val_offset:100176*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100176*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfc0000; valaddr_reg:x3; val_offset:100179*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100179*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfe0000; valaddr_reg:x3; val_offset:100182*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100182*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbff0000; valaddr_reg:x3; val_offset:100185*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100185*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbff8000; valaddr_reg:x3; val_offset:100188*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100188*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbffc000; valaddr_reg:x3; val_offset:100191*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100191*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbffe000; valaddr_reg:x3; val_offset:100194*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100194*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfff000; valaddr_reg:x3; val_offset:100197*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100197*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfff800; valaddr_reg:x3; val_offset:100200*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100200*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfffc00; valaddr_reg:x3; val_offset:100203*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100203*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfffe00; valaddr_reg:x3; val_offset:100206*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100206*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbffff00; valaddr_reg:x3; val_offset:100209*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100209*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbffff80; valaddr_reg:x3; val_offset:100212*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100212*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbffffc0; valaddr_reg:x3; val_offset:100215*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100215*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbffffe0; valaddr_reg:x3; val_offset:100218*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100218*0 + 3*260*FLEN/8, x4, x1, x2) + +inst_33407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfffff0; valaddr_reg:x3; val_offset:100221*0 + 3*260*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100221*0 + 3*260*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478464,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478528,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478560,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478576,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478584,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478588,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478590,32,FLEN) +NAN_BOXED(2133199233,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478591,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038080,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038081,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038083,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038087,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038095,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038111,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038143,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038207,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038335,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038591,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181039103,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181040127,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181042175,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181046271,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181054463,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181070847,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181103615,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181169151,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181300223,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181562367,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2182086655,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2183135231,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2185232383,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2185232384,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2187329536,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2188378112,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2188902400,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189164544,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189295616,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189361152,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189393920,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189410304,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189418496,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189422592,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189424640,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189425664,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426176,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426432,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426560,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426624,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426656,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426672,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426680,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426684,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426686,32,FLEN) +NAN_BOXED(2133234792,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426687,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937984,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937985,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937987,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937991,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937999,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938015,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938047,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938111,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938239,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938495,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192939007,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192940031,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192942079,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192946175,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192954367,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192970751,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193003519,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193069055,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193200127,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193462271,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193986559,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(195035135,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(197132287,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(197132288,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(199229440,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(200278016,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(200802304,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201064448,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201195520,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201261056,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201293824,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201310208,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201318400,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201322496,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201324544,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201325568,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326080,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326336,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326464,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326528,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326560,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326576,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-262.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-262.S new file mode 100644 index 000000000..ab82650f2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-262.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_33408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfffff8; valaddr_reg:x3; val_offset:100224*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100224*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfffffc; valaddr_reg:x3; val_offset:100227*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100227*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbfffffe; valaddr_reg:x3; val_offset:100230*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100230*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x26d3f0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f26d3f0; op2val:0x0; +op3val:0xbffffff; valaddr_reg:x3; val_offset:100233*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100233*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:100236*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100236*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:100239*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100239*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:100242*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100242*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:100245*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100245*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:100248*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100248*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:100251*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100251*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:100254*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100254*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:100257*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100257*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:100260*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100260*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:100263*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100263*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:100266*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100266*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:100269*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100269*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:100272*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100272*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:100275*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100275*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:100278*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100278*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:100281*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100281*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83800000; valaddr_reg:x3; val_offset:100284*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100284*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83800001; valaddr_reg:x3; val_offset:100287*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100287*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83800003; valaddr_reg:x3; val_offset:100290*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100290*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83800007; valaddr_reg:x3; val_offset:100293*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100293*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8380000f; valaddr_reg:x3; val_offset:100296*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100296*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8380001f; valaddr_reg:x3; val_offset:100299*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100299*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8380003f; valaddr_reg:x3; val_offset:100302*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100302*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8380007f; valaddr_reg:x3; val_offset:100305*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100305*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x838000ff; valaddr_reg:x3; val_offset:100308*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100308*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x838001ff; valaddr_reg:x3; val_offset:100311*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100311*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x838003ff; valaddr_reg:x3; val_offset:100314*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100314*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x838007ff; valaddr_reg:x3; val_offset:100317*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100317*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83800fff; valaddr_reg:x3; val_offset:100320*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100320*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83801fff; valaddr_reg:x3; val_offset:100323*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100323*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83803fff; valaddr_reg:x3; val_offset:100326*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100326*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83807fff; valaddr_reg:x3; val_offset:100329*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100329*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8380ffff; valaddr_reg:x3; val_offset:100332*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100332*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8381ffff; valaddr_reg:x3; val_offset:100335*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100335*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8383ffff; valaddr_reg:x3; val_offset:100338*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100338*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x8387ffff; valaddr_reg:x3; val_offset:100341*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100341*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x838fffff; valaddr_reg:x3; val_offset:100344*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100344*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x839fffff; valaddr_reg:x3; val_offset:100347*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100347*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83bfffff; valaddr_reg:x3; val_offset:100350*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100350*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83c00000; valaddr_reg:x3; val_offset:100353*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100353*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83e00000; valaddr_reg:x3; val_offset:100356*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100356*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83f00000; valaddr_reg:x3; val_offset:100359*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100359*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83f80000; valaddr_reg:x3; val_offset:100362*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100362*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fc0000; valaddr_reg:x3; val_offset:100365*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100365*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fe0000; valaddr_reg:x3; val_offset:100368*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100368*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ff0000; valaddr_reg:x3; val_offset:100371*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100371*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ff8000; valaddr_reg:x3; val_offset:100374*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100374*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ffc000; valaddr_reg:x3; val_offset:100377*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100377*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ffe000; valaddr_reg:x3; val_offset:100380*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100380*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fff000; valaddr_reg:x3; val_offset:100383*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100383*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fff800; valaddr_reg:x3; val_offset:100386*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100386*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fffc00; valaddr_reg:x3; val_offset:100389*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100389*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fffe00; valaddr_reg:x3; val_offset:100392*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100392*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ffff00; valaddr_reg:x3; val_offset:100395*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100395*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ffff80; valaddr_reg:x3; val_offset:100398*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100398*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ffffc0; valaddr_reg:x3; val_offset:100401*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100401*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ffffe0; valaddr_reg:x3; val_offset:100404*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100404*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fffff0; valaddr_reg:x3; val_offset:100407*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100407*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fffff8; valaddr_reg:x3; val_offset:100410*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100410*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fffffc; valaddr_reg:x3; val_offset:100413*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100413*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83fffffe; valaddr_reg:x3; val_offset:100416*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100416*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x272166 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f272166; op2val:0x80000000; +op3val:0x83ffffff; valaddr_reg:x3; val_offset:100419*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100419*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbf800001; valaddr_reg:x3; val_offset:100422*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100422*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbf800003; valaddr_reg:x3; val_offset:100425*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100425*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbf800007; valaddr_reg:x3; val_offset:100428*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100428*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbf999999; valaddr_reg:x3; val_offset:100431*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100431*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:100434*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100434*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:100437*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100437*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:100440*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100440*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:100443*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100443*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:100446*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100446*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:100449*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100449*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:100452*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100452*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:100455*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100455*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:100458*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100458*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:100461*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100461*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:100464*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100464*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:100467*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100467*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca800000; valaddr_reg:x3; val_offset:100470*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100470*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca800001; valaddr_reg:x3; val_offset:100473*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100473*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca800003; valaddr_reg:x3; val_offset:100476*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100476*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca800007; valaddr_reg:x3; val_offset:100479*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100479*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca80000f; valaddr_reg:x3; val_offset:100482*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100482*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca80001f; valaddr_reg:x3; val_offset:100485*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100485*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca80003f; valaddr_reg:x3; val_offset:100488*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100488*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca80007f; valaddr_reg:x3; val_offset:100491*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100491*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca8000ff; valaddr_reg:x3; val_offset:100494*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100494*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca8001ff; valaddr_reg:x3; val_offset:100497*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100497*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca8003ff; valaddr_reg:x3; val_offset:100500*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100500*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca8007ff; valaddr_reg:x3; val_offset:100503*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100503*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca800fff; valaddr_reg:x3; val_offset:100506*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100506*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca801fff; valaddr_reg:x3; val_offset:100509*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100509*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca803fff; valaddr_reg:x3; val_offset:100512*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100512*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca807fff; valaddr_reg:x3; val_offset:100515*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100515*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca80ffff; valaddr_reg:x3; val_offset:100518*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100518*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca81ffff; valaddr_reg:x3; val_offset:100521*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100521*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca83ffff; valaddr_reg:x3; val_offset:100524*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100524*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca87ffff; valaddr_reg:x3; val_offset:100527*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100527*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca8fffff; valaddr_reg:x3; val_offset:100530*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100530*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xca9fffff; valaddr_reg:x3; val_offset:100533*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100533*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcabfffff; valaddr_reg:x3; val_offset:100536*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100536*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcac00000; valaddr_reg:x3; val_offset:100539*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100539*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcae00000; valaddr_reg:x3; val_offset:100542*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100542*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaf00000; valaddr_reg:x3; val_offset:100545*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100545*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaf80000; valaddr_reg:x3; val_offset:100548*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100548*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafc0000; valaddr_reg:x3; val_offset:100551*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100551*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafe0000; valaddr_reg:x3; val_offset:100554*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100554*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaff0000; valaddr_reg:x3; val_offset:100557*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100557*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaff8000; valaddr_reg:x3; val_offset:100560*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100560*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaffc000; valaddr_reg:x3; val_offset:100563*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100563*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaffe000; valaddr_reg:x3; val_offset:100566*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100566*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafff000; valaddr_reg:x3; val_offset:100569*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100569*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafff800; valaddr_reg:x3; val_offset:100572*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100572*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafffc00; valaddr_reg:x3; val_offset:100575*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100575*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafffe00; valaddr_reg:x3; val_offset:100578*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100578*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaffff00; valaddr_reg:x3; val_offset:100581*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100581*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaffff80; valaddr_reg:x3; val_offset:100584*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100584*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaffffc0; valaddr_reg:x3; val_offset:100587*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100587*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaffffe0; valaddr_reg:x3; val_offset:100590*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100590*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafffff0; valaddr_reg:x3; val_offset:100593*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100593*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafffff8; valaddr_reg:x3; val_offset:100596*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100596*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafffffc; valaddr_reg:x3; val_offset:100599*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100599*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcafffffe; valaddr_reg:x3; val_offset:100602*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100602*0 + 3*261*FLEN/8, x4, x1, x2) + +inst_33535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x274f94 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f676 and fs3 == 1 and fe3 == 0x95 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f274f94; op2val:0x8030f676; +op3val:0xcaffffff; valaddr_reg:x3; val_offset:100605*0 + 3*261*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100605*0 + 3*261*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326584,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326588,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326590,32,FLEN) +NAN_BOXED(2133251056,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326591,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203904,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203905,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203907,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203911,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203919,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203935,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203967,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204031,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204159,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204415,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204927,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206205951,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206207999,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206212095,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206220287,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206236671,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206269439,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206334975,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206466047,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206728191,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2207252479,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2208301055,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2210398207,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2210398208,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2212495360,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2213543936,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214068224,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214330368,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214461440,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214526976,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214559744,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214576128,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214584320,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214588416,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214590464,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214591488,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592000,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592256,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592384,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592448,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592480,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592496,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592504,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592508,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592510,32,FLEN) +NAN_BOXED(2133270886,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592511,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386240,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386241,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386243,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386247,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386255,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386271,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386303,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386367,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386495,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397386751,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397387263,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397388287,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397390335,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397394431,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397402623,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397419007,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397451775,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397517311,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397648383,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3397910527,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3398434815,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3399483391,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3401580543,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3401580544,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3403677696,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3404726272,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405250560,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405512704,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405643776,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405709312,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405742080,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405758464,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405766656,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405770752,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405772800,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405773824,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774336,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774592,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774720,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774784,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774816,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774832,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774840,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774844,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774846,32,FLEN) +NAN_BOXED(2133282708,32,FLEN) +NAN_BOXED(2150692470,32,FLEN) +NAN_BOXED(3405774847,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-263.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-263.S new file mode 100644 index 000000000..4cf5cce3d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-263.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_33536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9000000; valaddr_reg:x3; val_offset:100608*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100608*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9000001; valaddr_reg:x3; val_offset:100611*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100611*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9000003; valaddr_reg:x3; val_offset:100614*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100614*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9000007; valaddr_reg:x3; val_offset:100617*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100617*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa900000f; valaddr_reg:x3; val_offset:100620*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100620*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa900001f; valaddr_reg:x3; val_offset:100623*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100623*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa900003f; valaddr_reg:x3; val_offset:100626*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100626*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa900007f; valaddr_reg:x3; val_offset:100629*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100629*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa90000ff; valaddr_reg:x3; val_offset:100632*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100632*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa90001ff; valaddr_reg:x3; val_offset:100635*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100635*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa90003ff; valaddr_reg:x3; val_offset:100638*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100638*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa90007ff; valaddr_reg:x3; val_offset:100641*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100641*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9000fff; valaddr_reg:x3; val_offset:100644*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100644*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9001fff; valaddr_reg:x3; val_offset:100647*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100647*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9003fff; valaddr_reg:x3; val_offset:100650*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100650*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9007fff; valaddr_reg:x3; val_offset:100653*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100653*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa900ffff; valaddr_reg:x3; val_offset:100656*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100656*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa901ffff; valaddr_reg:x3; val_offset:100659*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100659*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa903ffff; valaddr_reg:x3; val_offset:100662*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100662*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa907ffff; valaddr_reg:x3; val_offset:100665*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100665*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa90fffff; valaddr_reg:x3; val_offset:100668*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100668*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa91fffff; valaddr_reg:x3; val_offset:100671*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100671*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa93fffff; valaddr_reg:x3; val_offset:100674*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100674*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9400000; valaddr_reg:x3; val_offset:100677*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100677*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9600000; valaddr_reg:x3; val_offset:100680*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100680*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9700000; valaddr_reg:x3; val_offset:100683*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100683*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa9780000; valaddr_reg:x3; val_offset:100686*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100686*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97c0000; valaddr_reg:x3; val_offset:100689*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100689*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97e0000; valaddr_reg:x3; val_offset:100692*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100692*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97f0000; valaddr_reg:x3; val_offset:100695*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100695*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97f8000; valaddr_reg:x3; val_offset:100698*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100698*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97fc000; valaddr_reg:x3; val_offset:100701*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100701*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97fe000; valaddr_reg:x3; val_offset:100704*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100704*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97ff000; valaddr_reg:x3; val_offset:100707*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100707*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97ff800; valaddr_reg:x3; val_offset:100710*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100710*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97ffc00; valaddr_reg:x3; val_offset:100713*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100713*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97ffe00; valaddr_reg:x3; val_offset:100716*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100716*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97fff00; valaddr_reg:x3; val_offset:100719*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100719*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97fff80; valaddr_reg:x3; val_offset:100722*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100722*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97fffc0; valaddr_reg:x3; val_offset:100725*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100725*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97fffe0; valaddr_reg:x3; val_offset:100728*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100728*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97ffff0; valaddr_reg:x3; val_offset:100731*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100731*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97ffff8; valaddr_reg:x3; val_offset:100734*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100734*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97ffffc; valaddr_reg:x3; val_offset:100737*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100737*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97ffffe; valaddr_reg:x3; val_offset:100740*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100740*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x52 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xa97fffff; valaddr_reg:x3; val_offset:100743*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100743*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbf800001; valaddr_reg:x3; val_offset:100746*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100746*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbf800003; valaddr_reg:x3; val_offset:100749*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100749*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbf800007; valaddr_reg:x3; val_offset:100752*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100752*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbf999999; valaddr_reg:x3; val_offset:100755*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100755*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:100758*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100758*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:100761*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100761*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:100764*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100764*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:100767*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100767*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:100770*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100770*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:100773*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100773*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:100776*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100776*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:100779*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100779*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:100782*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100782*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:100785*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100785*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:100788*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100788*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x275d37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30f279 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f275d37; op2val:0x8030f279; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:100791*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100791*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:100794*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100794*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:100797*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100797*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:100800*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100800*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:100803*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100803*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:100806*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100806*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:100809*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100809*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:100812*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100812*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:100815*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100815*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:100818*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100818*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:100821*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100821*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:100824*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100824*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:100827*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100827*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:100830*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100830*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:100833*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100833*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:100836*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100836*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:100839*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100839*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0000000; valaddr_reg:x3; val_offset:100842*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100842*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0000001; valaddr_reg:x3; val_offset:100845*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100845*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0000003; valaddr_reg:x3; val_offset:100848*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100848*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0000007; valaddr_reg:x3; val_offset:100851*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100851*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf000000f; valaddr_reg:x3; val_offset:100854*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100854*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf000001f; valaddr_reg:x3; val_offset:100857*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100857*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf000003f; valaddr_reg:x3; val_offset:100860*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100860*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf000007f; valaddr_reg:x3; val_offset:100863*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100863*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf00000ff; valaddr_reg:x3; val_offset:100866*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100866*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf00001ff; valaddr_reg:x3; val_offset:100869*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100869*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf00003ff; valaddr_reg:x3; val_offset:100872*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100872*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf00007ff; valaddr_reg:x3; val_offset:100875*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100875*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0000fff; valaddr_reg:x3; val_offset:100878*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100878*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0001fff; valaddr_reg:x3; val_offset:100881*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100881*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0003fff; valaddr_reg:x3; val_offset:100884*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100884*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0007fff; valaddr_reg:x3; val_offset:100887*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100887*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf000ffff; valaddr_reg:x3; val_offset:100890*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100890*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf001ffff; valaddr_reg:x3; val_offset:100893*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100893*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf003ffff; valaddr_reg:x3; val_offset:100896*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100896*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf007ffff; valaddr_reg:x3; val_offset:100899*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100899*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf00fffff; valaddr_reg:x3; val_offset:100902*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100902*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf01fffff; valaddr_reg:x3; val_offset:100905*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100905*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf03fffff; valaddr_reg:x3; val_offset:100908*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100908*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0400000; valaddr_reg:x3; val_offset:100911*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100911*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0600000; valaddr_reg:x3; val_offset:100914*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100914*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0700000; valaddr_reg:x3; val_offset:100917*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100917*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf0780000; valaddr_reg:x3; val_offset:100920*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100920*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07c0000; valaddr_reg:x3; val_offset:100923*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100923*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07e0000; valaddr_reg:x3; val_offset:100926*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100926*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07f0000; valaddr_reg:x3; val_offset:100929*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100929*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07f8000; valaddr_reg:x3; val_offset:100932*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100932*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07fc000; valaddr_reg:x3; val_offset:100935*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100935*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07fe000; valaddr_reg:x3; val_offset:100938*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100938*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07ff000; valaddr_reg:x3; val_offset:100941*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100941*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07ff800; valaddr_reg:x3; val_offset:100944*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100944*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07ffc00; valaddr_reg:x3; val_offset:100947*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100947*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07ffe00; valaddr_reg:x3; val_offset:100950*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100950*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07fff00; valaddr_reg:x3; val_offset:100953*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100953*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07fff80; valaddr_reg:x3; val_offset:100956*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100956*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07fffc0; valaddr_reg:x3; val_offset:100959*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100959*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07fffe0; valaddr_reg:x3; val_offset:100962*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100962*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07ffff0; valaddr_reg:x3; val_offset:100965*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100965*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07ffff8; valaddr_reg:x3; val_offset:100968*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100968*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07ffffc; valaddr_reg:x3; val_offset:100971*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100971*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07ffffe; valaddr_reg:x3; val_offset:100974*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100974*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2786d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0xe0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2786d3; op2val:0x80000000; +op3val:0xf07fffff; valaddr_reg:x3; val_offset:100977*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100977*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8000000; valaddr_reg:x3; val_offset:100980*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100980*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8000001; valaddr_reg:x3; val_offset:100983*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100983*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8000003; valaddr_reg:x3; val_offset:100986*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100986*0 + 3*262*FLEN/8, x4, x1, x2) + +inst_33663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8000007; valaddr_reg:x3; val_offset:100989*0 + 3*262*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100989*0 + 3*262*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349504,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349505,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349507,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349511,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349519,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349535,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349567,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349631,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835349759,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835350015,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835350527,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835351551,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835353599,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835357695,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835365887,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835382271,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835415039,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835480575,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835611647,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2835873791,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2836398079,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2837446655,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2839543807,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2839543808,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2841640960,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2842689536,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843213824,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843475968,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843607040,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843672576,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843705344,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843721728,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843729920,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843734016,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843736064,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843737088,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843737600,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843737856,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843737984,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843738048,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843738080,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843738096,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843738104,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843738108,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843738110,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(2843738111,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133286199,32,FLEN) +NAN_BOXED(2150691449,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026531840,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026531841,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026531843,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026531847,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026531855,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026531871,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026531903,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026531967,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026532095,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026532351,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026532863,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026533887,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026535935,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026540031,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026548223,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026564607,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026597375,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026662911,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4026793983,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4027056127,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4027580415,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4028628991,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4030726143,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4030726144,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4032823296,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4033871872,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034396160,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034658304,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034789376,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034854912,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034887680,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034904064,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034912256,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034916352,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034918400,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034919424,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034919936,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920192,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920320,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920384,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920416,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920432,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920440,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920444,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920446,32,FLEN) +NAN_BOXED(2133296851,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(4034920447,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572288,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572289,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572291,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572295,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-264.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-264.S new file mode 100644 index 000000000..bc296146f --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-264.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_33664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa800000f; valaddr_reg:x3; val_offset:100992*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100992*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa800001f; valaddr_reg:x3; val_offset:100995*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100995*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa800003f; valaddr_reg:x3; val_offset:100998*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 100998*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa800007f; valaddr_reg:x3; val_offset:101001*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101001*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa80000ff; valaddr_reg:x3; val_offset:101004*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101004*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa80001ff; valaddr_reg:x3; val_offset:101007*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101007*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa80003ff; valaddr_reg:x3; val_offset:101010*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101010*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa80007ff; valaddr_reg:x3; val_offset:101013*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101013*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8000fff; valaddr_reg:x3; val_offset:101016*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101016*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8001fff; valaddr_reg:x3; val_offset:101019*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101019*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8003fff; valaddr_reg:x3; val_offset:101022*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101022*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8007fff; valaddr_reg:x3; val_offset:101025*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101025*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa800ffff; valaddr_reg:x3; val_offset:101028*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101028*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa801ffff; valaddr_reg:x3; val_offset:101031*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101031*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa803ffff; valaddr_reg:x3; val_offset:101034*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101034*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa807ffff; valaddr_reg:x3; val_offset:101037*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101037*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa80fffff; valaddr_reg:x3; val_offset:101040*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101040*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa81fffff; valaddr_reg:x3; val_offset:101043*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101043*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa83fffff; valaddr_reg:x3; val_offset:101046*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101046*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8400000; valaddr_reg:x3; val_offset:101049*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101049*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8600000; valaddr_reg:x3; val_offset:101052*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101052*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8700000; valaddr_reg:x3; val_offset:101055*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101055*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa8780000; valaddr_reg:x3; val_offset:101058*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101058*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87c0000; valaddr_reg:x3; val_offset:101061*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101061*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87e0000; valaddr_reg:x3; val_offset:101064*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101064*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87f0000; valaddr_reg:x3; val_offset:101067*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101067*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87f8000; valaddr_reg:x3; val_offset:101070*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101070*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87fc000; valaddr_reg:x3; val_offset:101073*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101073*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87fe000; valaddr_reg:x3; val_offset:101076*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101076*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87ff000; valaddr_reg:x3; val_offset:101079*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101079*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87ff800; valaddr_reg:x3; val_offset:101082*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101082*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87ffc00; valaddr_reg:x3; val_offset:101085*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101085*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87ffe00; valaddr_reg:x3; val_offset:101088*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101088*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87fff00; valaddr_reg:x3; val_offset:101091*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101091*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87fff80; valaddr_reg:x3; val_offset:101094*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101094*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87fffc0; valaddr_reg:x3; val_offset:101097*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101097*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87fffe0; valaddr_reg:x3; val_offset:101100*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101100*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87ffff0; valaddr_reg:x3; val_offset:101103*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101103*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87ffff8; valaddr_reg:x3; val_offset:101106*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101106*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87ffffc; valaddr_reg:x3; val_offset:101109*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101109*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87ffffe; valaddr_reg:x3; val_offset:101112*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101112*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x50 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xa87fffff; valaddr_reg:x3; val_offset:101115*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101115*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbf800001; valaddr_reg:x3; val_offset:101118*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101118*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbf800003; valaddr_reg:x3; val_offset:101121*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101121*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbf800007; valaddr_reg:x3; val_offset:101124*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101124*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbf999999; valaddr_reg:x3; val_offset:101127*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101127*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:101130*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101130*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:101133*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101133*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:101136*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101136*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:101139*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101139*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:101142*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101142*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:101145*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101145*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:101148*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101148*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:101151*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101151*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:101154*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101154*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:101157*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101157*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:101160*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101160*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27e945 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x30c9a5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27e945; op2val:0x8030c9a5; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:101163*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101163*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3f800001; valaddr_reg:x3; val_offset:101166*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101166*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3f800003; valaddr_reg:x3; val_offset:101169*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101169*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3f800007; valaddr_reg:x3; val_offset:101172*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101172*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3f999999; valaddr_reg:x3; val_offset:101175*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101175*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:101178*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101178*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:101181*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101181*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:101184*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101184*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:101187*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101187*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:101190*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101190*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:101193*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101193*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:101196*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101196*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:101199*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101199*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:101202*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101202*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:101205*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101205*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:101208*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101208*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:101211*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101211*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b000000; valaddr_reg:x3; val_offset:101214*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101214*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b000001; valaddr_reg:x3; val_offset:101217*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101217*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b000003; valaddr_reg:x3; val_offset:101220*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101220*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b000007; valaddr_reg:x3; val_offset:101223*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101223*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b00000f; valaddr_reg:x3; val_offset:101226*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101226*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b00001f; valaddr_reg:x3; val_offset:101229*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101229*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b00003f; valaddr_reg:x3; val_offset:101232*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101232*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b00007f; valaddr_reg:x3; val_offset:101235*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101235*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b0000ff; valaddr_reg:x3; val_offset:101238*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101238*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b0001ff; valaddr_reg:x3; val_offset:101241*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101241*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b0003ff; valaddr_reg:x3; val_offset:101244*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101244*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b0007ff; valaddr_reg:x3; val_offset:101247*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101247*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b000fff; valaddr_reg:x3; val_offset:101250*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101250*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b001fff; valaddr_reg:x3; val_offset:101253*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101253*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b003fff; valaddr_reg:x3; val_offset:101256*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101256*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b007fff; valaddr_reg:x3; val_offset:101259*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101259*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b00ffff; valaddr_reg:x3; val_offset:101262*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101262*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b01ffff; valaddr_reg:x3; val_offset:101265*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101265*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b03ffff; valaddr_reg:x3; val_offset:101268*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101268*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b07ffff; valaddr_reg:x3; val_offset:101271*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101271*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b0fffff; valaddr_reg:x3; val_offset:101274*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101274*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b1fffff; valaddr_reg:x3; val_offset:101277*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101277*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b3fffff; valaddr_reg:x3; val_offset:101280*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101280*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b400000; valaddr_reg:x3; val_offset:101283*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101283*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b600000; valaddr_reg:x3; val_offset:101286*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101286*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b700000; valaddr_reg:x3; val_offset:101289*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101289*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b780000; valaddr_reg:x3; val_offset:101292*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101292*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7c0000; valaddr_reg:x3; val_offset:101295*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101295*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7e0000; valaddr_reg:x3; val_offset:101298*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101298*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7f0000; valaddr_reg:x3; val_offset:101301*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101301*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7f8000; valaddr_reg:x3; val_offset:101304*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101304*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7fc000; valaddr_reg:x3; val_offset:101307*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101307*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7fe000; valaddr_reg:x3; val_offset:101310*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101310*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7ff000; valaddr_reg:x3; val_offset:101313*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101313*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7ff800; valaddr_reg:x3; val_offset:101316*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101316*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7ffc00; valaddr_reg:x3; val_offset:101319*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101319*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7ffe00; valaddr_reg:x3; val_offset:101322*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101322*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7fff00; valaddr_reg:x3; val_offset:101325*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101325*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7fff80; valaddr_reg:x3; val_offset:101328*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101328*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7fffc0; valaddr_reg:x3; val_offset:101331*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101331*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7fffe0; valaddr_reg:x3; val_offset:101334*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101334*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7ffff0; valaddr_reg:x3; val_offset:101337*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101337*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7ffff8; valaddr_reg:x3; val_offset:101340*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101340*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7ffffc; valaddr_reg:x3; val_offset:101343*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101343*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7ffffe; valaddr_reg:x3; val_offset:101346*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101346*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x27f666 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x30c5d5 and fs3 == 0 and fe3 == 0x96 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f27f666; op2val:0x30c5d5; +op3val:0x4b7fffff; valaddr_reg:x3; val_offset:101349*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101349*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:101352*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101352*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:101355*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101355*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:101358*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101358*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:101361*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101361*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:101364*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101364*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:101367*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101367*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:101370*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101370*0 + 3*263*FLEN/8, x4, x1, x2) + +inst_33791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:101373*0 + 3*263*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101373*0 + 3*263*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572303,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572319,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572351,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572415,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572543,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818572799,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818573311,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818574335,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818576383,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818580479,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818588671,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818605055,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818637823,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818703359,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2818834431,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2819096575,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2819620863,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2820669439,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2822766591,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2822766592,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2824863744,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2825912320,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826436608,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826698752,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826829824,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826895360,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826928128,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826944512,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826952704,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826956800,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826958848,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826959872,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960384,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960640,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960768,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960832,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960864,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960880,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960888,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960892,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960894,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(2826960895,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133322053,32,FLEN) +NAN_BOXED(2150680997,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291200,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291201,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291203,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291207,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291215,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291231,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291263,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291327,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291455,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258291711,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258292223,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258293247,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258295295,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258299391,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258307583,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258323967,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258356735,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258422271,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258553343,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1258815487,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1259339775,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1260388351,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1262485503,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1262485504,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1264582656,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1265631232,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266155520,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266417664,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266548736,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266614272,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266647040,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266663424,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266671616,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266675712,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266677760,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266678784,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679296,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679552,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679680,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679744,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679776,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679792,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679800,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679804,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679806,32,FLEN) +NAN_BOXED(2133325414,32,FLEN) +NAN_BOXED(3196373,32,FLEN) +NAN_BOXED(1266679807,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-265.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-265.S new file mode 100644 index 000000000..b5c44719a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-265.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_33792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:101376*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101376*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:101379*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101379*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:101382*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101382*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:101385*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101385*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:101388*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101388*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:101391*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101391*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:101394*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101394*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:101397*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101397*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46800000; valaddr_reg:x3; val_offset:101400*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101400*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46800001; valaddr_reg:x3; val_offset:101403*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101403*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46800003; valaddr_reg:x3; val_offset:101406*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101406*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46800007; valaddr_reg:x3; val_offset:101409*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101409*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4680000f; valaddr_reg:x3; val_offset:101412*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101412*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4680001f; valaddr_reg:x3; val_offset:101415*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101415*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4680003f; valaddr_reg:x3; val_offset:101418*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101418*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4680007f; valaddr_reg:x3; val_offset:101421*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101421*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x468000ff; valaddr_reg:x3; val_offset:101424*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101424*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x468001ff; valaddr_reg:x3; val_offset:101427*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101427*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x468003ff; valaddr_reg:x3; val_offset:101430*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101430*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x468007ff; valaddr_reg:x3; val_offset:101433*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101433*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46800fff; valaddr_reg:x3; val_offset:101436*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101436*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46801fff; valaddr_reg:x3; val_offset:101439*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101439*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46803fff; valaddr_reg:x3; val_offset:101442*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101442*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46807fff; valaddr_reg:x3; val_offset:101445*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101445*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4680ffff; valaddr_reg:x3; val_offset:101448*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101448*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4681ffff; valaddr_reg:x3; val_offset:101451*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101451*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4683ffff; valaddr_reg:x3; val_offset:101454*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101454*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x4687ffff; valaddr_reg:x3; val_offset:101457*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101457*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x468fffff; valaddr_reg:x3; val_offset:101460*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101460*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x469fffff; valaddr_reg:x3; val_offset:101463*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101463*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46bfffff; valaddr_reg:x3; val_offset:101466*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101466*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46c00000; valaddr_reg:x3; val_offset:101469*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101469*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46e00000; valaddr_reg:x3; val_offset:101472*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101472*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46f00000; valaddr_reg:x3; val_offset:101475*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101475*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46f80000; valaddr_reg:x3; val_offset:101478*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101478*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fc0000; valaddr_reg:x3; val_offset:101481*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101481*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fe0000; valaddr_reg:x3; val_offset:101484*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101484*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ff0000; valaddr_reg:x3; val_offset:101487*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101487*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ff8000; valaddr_reg:x3; val_offset:101490*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101490*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ffc000; valaddr_reg:x3; val_offset:101493*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101493*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ffe000; valaddr_reg:x3; val_offset:101496*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101496*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fff000; valaddr_reg:x3; val_offset:101499*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101499*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fff800; valaddr_reg:x3; val_offset:101502*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101502*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fffc00; valaddr_reg:x3; val_offset:101505*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101505*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fffe00; valaddr_reg:x3; val_offset:101508*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101508*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ffff00; valaddr_reg:x3; val_offset:101511*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101511*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ffff80; valaddr_reg:x3; val_offset:101514*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101514*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ffffc0; valaddr_reg:x3; val_offset:101517*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101517*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ffffe0; valaddr_reg:x3; val_offset:101520*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101520*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fffff0; valaddr_reg:x3; val_offset:101523*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101523*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fffff8; valaddr_reg:x3; val_offset:101526*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101526*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fffffc; valaddr_reg:x3; val_offset:101529*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101529*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46fffffe; valaddr_reg:x3; val_offset:101532*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101532*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x288293 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f288293; op2val:0x0; +op3val:0x46ffffff; valaddr_reg:x3; val_offset:101535*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101535*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70000000; valaddr_reg:x3; val_offset:101538*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101538*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70000001; valaddr_reg:x3; val_offset:101541*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101541*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70000003; valaddr_reg:x3; val_offset:101544*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101544*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70000007; valaddr_reg:x3; val_offset:101547*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101547*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7000000f; valaddr_reg:x3; val_offset:101550*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101550*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7000001f; valaddr_reg:x3; val_offset:101553*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101553*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7000003f; valaddr_reg:x3; val_offset:101556*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101556*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7000007f; valaddr_reg:x3; val_offset:101559*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101559*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x700000ff; valaddr_reg:x3; val_offset:101562*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101562*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x700001ff; valaddr_reg:x3; val_offset:101565*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101565*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x700003ff; valaddr_reg:x3; val_offset:101568*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101568*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x700007ff; valaddr_reg:x3; val_offset:101571*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101571*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70000fff; valaddr_reg:x3; val_offset:101574*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101574*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70001fff; valaddr_reg:x3; val_offset:101577*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101577*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70003fff; valaddr_reg:x3; val_offset:101580*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101580*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70007fff; valaddr_reg:x3; val_offset:101583*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101583*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7000ffff; valaddr_reg:x3; val_offset:101586*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101586*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7001ffff; valaddr_reg:x3; val_offset:101589*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101589*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7003ffff; valaddr_reg:x3; val_offset:101592*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101592*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7007ffff; valaddr_reg:x3; val_offset:101595*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101595*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x700fffff; valaddr_reg:x3; val_offset:101598*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101598*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x701fffff; valaddr_reg:x3; val_offset:101601*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101601*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x703fffff; valaddr_reg:x3; val_offset:101604*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101604*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70400000; valaddr_reg:x3; val_offset:101607*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101607*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70600000; valaddr_reg:x3; val_offset:101610*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101610*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70700000; valaddr_reg:x3; val_offset:101613*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101613*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x70780000; valaddr_reg:x3; val_offset:101616*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101616*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707c0000; valaddr_reg:x3; val_offset:101619*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101619*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707e0000; valaddr_reg:x3; val_offset:101622*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101622*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707f0000; valaddr_reg:x3; val_offset:101625*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101625*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707f8000; valaddr_reg:x3; val_offset:101628*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101628*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707fc000; valaddr_reg:x3; val_offset:101631*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101631*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707fe000; valaddr_reg:x3; val_offset:101634*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101634*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707ff000; valaddr_reg:x3; val_offset:101637*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101637*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707ff800; valaddr_reg:x3; val_offset:101640*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101640*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707ffc00; valaddr_reg:x3; val_offset:101643*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101643*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707ffe00; valaddr_reg:x3; val_offset:101646*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101646*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707fff00; valaddr_reg:x3; val_offset:101649*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101649*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707fff80; valaddr_reg:x3; val_offset:101652*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101652*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707fffc0; valaddr_reg:x3; val_offset:101655*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101655*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707fffe0; valaddr_reg:x3; val_offset:101658*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101658*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707ffff0; valaddr_reg:x3; val_offset:101661*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101661*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707ffff8; valaddr_reg:x3; val_offset:101664*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101664*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707ffffc; valaddr_reg:x3; val_offset:101667*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101667*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707ffffe; valaddr_reg:x3; val_offset:101670*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101670*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xe0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x707fffff; valaddr_reg:x3; val_offset:101673*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101673*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f000001; valaddr_reg:x3; val_offset:101676*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101676*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f000003; valaddr_reg:x3; val_offset:101679*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101679*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f000007; valaddr_reg:x3; val_offset:101682*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101682*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f199999; valaddr_reg:x3; val_offset:101685*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101685*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f249249; valaddr_reg:x3; val_offset:101688*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101688*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f333333; valaddr_reg:x3; val_offset:101691*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101691*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:101694*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101694*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:101697*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101697*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f444444; valaddr_reg:x3; val_offset:101700*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101700*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:101703*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101703*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:101706*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101706*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f666666; valaddr_reg:x3; val_offset:101709*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101709*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:101712*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101712*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:101715*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101715*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:101718*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101718*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x28a79f and fs2 == 0 and fe2 == 0x7f and fm2 == 0x424a55 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f28a79f; op2val:0x3fc24a55; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:101721*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101721*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:101724*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101724*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:101727*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101727*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:101730*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101730*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:101733*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101733*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:101736*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101736*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:101739*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101739*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:101742*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101742*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:101745*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101745*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:101748*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101748*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:101751*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101751*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:101754*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101754*0 + 3*264*FLEN/8, x4, x1, x2) + +inst_33919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:101757*0 + 3*264*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101757*0 + 3*264*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793728,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793729,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793731,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793735,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793743,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793759,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793791,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793855,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182793983,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182794239,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182794751,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182795775,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182797823,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182801919,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182810111,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182826495,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182859263,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1182924799,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1183055871,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1183318015,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1183842303,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1184890879,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1186988031,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1186988032,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1189085184,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1190133760,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1190658048,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1190920192,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191051264,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191116800,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191149568,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191165952,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191174144,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191178240,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191180288,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191181312,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191181824,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182080,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182208,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182272,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182304,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182320,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182328,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182332,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182334,32,FLEN) +NAN_BOXED(2133361299,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1191182335,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048192,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048193,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048195,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048199,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048207,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048223,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048255,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048319,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048447,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879048703,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879049215,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879050239,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879052287,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879056383,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879064575,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879080959,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879113727,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879179263,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879310335,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1879572479,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1880096767,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1881145343,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1883242495,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1883242496,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1885339648,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1886388224,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1886912512,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887174656,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887305728,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887371264,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887404032,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887420416,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887428608,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887432704,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887434752,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887435776,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436288,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436544,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436672,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436736,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436768,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436784,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436792,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436796,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436798,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(1887436799,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2133370783,32,FLEN) +NAN_BOXED(1069697621,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-266.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-266.S new file mode 100644 index 000000000..e999bb5c1 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-266.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_33920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:101760*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101760*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:101763*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101763*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:101766*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101766*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:101769*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101769*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb800000; valaddr_reg:x3; val_offset:101772*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101772*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb800001; valaddr_reg:x3; val_offset:101775*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101775*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb800003; valaddr_reg:x3; val_offset:101778*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101778*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb800007; valaddr_reg:x3; val_offset:101781*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101781*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb80000f; valaddr_reg:x3; val_offset:101784*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101784*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb80001f; valaddr_reg:x3; val_offset:101787*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101787*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb80003f; valaddr_reg:x3; val_offset:101790*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101790*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb80007f; valaddr_reg:x3; val_offset:101793*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101793*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb8000ff; valaddr_reg:x3; val_offset:101796*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101796*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb8001ff; valaddr_reg:x3; val_offset:101799*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101799*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb8003ff; valaddr_reg:x3; val_offset:101802*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101802*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb8007ff; valaddr_reg:x3; val_offset:101805*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101805*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb800fff; valaddr_reg:x3; val_offset:101808*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101808*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb801fff; valaddr_reg:x3; val_offset:101811*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101811*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb803fff; valaddr_reg:x3; val_offset:101814*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101814*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb807fff; valaddr_reg:x3; val_offset:101817*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101817*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb80ffff; valaddr_reg:x3; val_offset:101820*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101820*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb81ffff; valaddr_reg:x3; val_offset:101823*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101823*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb83ffff; valaddr_reg:x3; val_offset:101826*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101826*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb87ffff; valaddr_reg:x3; val_offset:101829*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101829*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb8fffff; valaddr_reg:x3; val_offset:101832*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101832*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xb9fffff; valaddr_reg:x3; val_offset:101835*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101835*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbbfffff; valaddr_reg:x3; val_offset:101838*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101838*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbc00000; valaddr_reg:x3; val_offset:101841*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101841*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbe00000; valaddr_reg:x3; val_offset:101844*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101844*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbf00000; valaddr_reg:x3; val_offset:101847*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101847*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbf80000; valaddr_reg:x3; val_offset:101850*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101850*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfc0000; valaddr_reg:x3; val_offset:101853*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101853*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfe0000; valaddr_reg:x3; val_offset:101856*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101856*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbff0000; valaddr_reg:x3; val_offset:101859*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101859*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbff8000; valaddr_reg:x3; val_offset:101862*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101862*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbffc000; valaddr_reg:x3; val_offset:101865*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101865*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbffe000; valaddr_reg:x3; val_offset:101868*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101868*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfff000; valaddr_reg:x3; val_offset:101871*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101871*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfff800; valaddr_reg:x3; val_offset:101874*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101874*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfffc00; valaddr_reg:x3; val_offset:101877*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101877*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfffe00; valaddr_reg:x3; val_offset:101880*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101880*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbffff00; valaddr_reg:x3; val_offset:101883*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101883*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbffff80; valaddr_reg:x3; val_offset:101886*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101886*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbffffc0; valaddr_reg:x3; val_offset:101889*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101889*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbffffe0; valaddr_reg:x3; val_offset:101892*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101892*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfffff0; valaddr_reg:x3; val_offset:101895*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101895*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfffff8; valaddr_reg:x3; val_offset:101898*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101898*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfffffc; valaddr_reg:x3; val_offset:101901*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101901*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbfffffe; valaddr_reg:x3; val_offset:101904*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101904*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x293481 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x17 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f293481; op2val:0x0; +op3val:0xbffffff; valaddr_reg:x3; val_offset:101907*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101907*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3000000; valaddr_reg:x3; val_offset:101910*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101910*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3000001; valaddr_reg:x3; val_offset:101913*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101913*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3000003; valaddr_reg:x3; val_offset:101916*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101916*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3000007; valaddr_reg:x3; val_offset:101919*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101919*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf300000f; valaddr_reg:x3; val_offset:101922*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101922*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf300001f; valaddr_reg:x3; val_offset:101925*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101925*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf300003f; valaddr_reg:x3; val_offset:101928*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101928*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf300007f; valaddr_reg:x3; val_offset:101931*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101931*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf30000ff; valaddr_reg:x3; val_offset:101934*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101934*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf30001ff; valaddr_reg:x3; val_offset:101937*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101937*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf30003ff; valaddr_reg:x3; val_offset:101940*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101940*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf30007ff; valaddr_reg:x3; val_offset:101943*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101943*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3000fff; valaddr_reg:x3; val_offset:101946*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101946*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3001fff; valaddr_reg:x3; val_offset:101949*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101949*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3003fff; valaddr_reg:x3; val_offset:101952*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101952*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3007fff; valaddr_reg:x3; val_offset:101955*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101955*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf300ffff; valaddr_reg:x3; val_offset:101958*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101958*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf301ffff; valaddr_reg:x3; val_offset:101961*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101961*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf303ffff; valaddr_reg:x3; val_offset:101964*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101964*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf307ffff; valaddr_reg:x3; val_offset:101967*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101967*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf30fffff; valaddr_reg:x3; val_offset:101970*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101970*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf31fffff; valaddr_reg:x3; val_offset:101973*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101973*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf33fffff; valaddr_reg:x3; val_offset:101976*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101976*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3400000; valaddr_reg:x3; val_offset:101979*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101979*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3600000; valaddr_reg:x3; val_offset:101982*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101982*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3700000; valaddr_reg:x3; val_offset:101985*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101985*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf3780000; valaddr_reg:x3; val_offset:101988*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101988*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37c0000; valaddr_reg:x3; val_offset:101991*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101991*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37e0000; valaddr_reg:x3; val_offset:101994*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101994*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_33999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37f0000; valaddr_reg:x3; val_offset:101997*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 101997*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37f8000; valaddr_reg:x3; val_offset:102000*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102000*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37fc000; valaddr_reg:x3; val_offset:102003*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102003*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37fe000; valaddr_reg:x3; val_offset:102006*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102006*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37ff000; valaddr_reg:x3; val_offset:102009*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102009*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37ff800; valaddr_reg:x3; val_offset:102012*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102012*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37ffc00; valaddr_reg:x3; val_offset:102015*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102015*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37ffe00; valaddr_reg:x3; val_offset:102018*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102018*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37fff00; valaddr_reg:x3; val_offset:102021*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102021*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37fff80; valaddr_reg:x3; val_offset:102024*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102024*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37fffc0; valaddr_reg:x3; val_offset:102027*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102027*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37fffe0; valaddr_reg:x3; val_offset:102030*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102030*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37ffff0; valaddr_reg:x3; val_offset:102033*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102033*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37ffff8; valaddr_reg:x3; val_offset:102036*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102036*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37ffffc; valaddr_reg:x3; val_offset:102039*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102039*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37ffffe; valaddr_reg:x3; val_offset:102042*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102042*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xe6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xf37fffff; valaddr_reg:x3; val_offset:102045*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102045*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff000001; valaddr_reg:x3; val_offset:102048*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102048*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff000003; valaddr_reg:x3; val_offset:102051*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102051*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff000007; valaddr_reg:x3; val_offset:102054*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102054*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff199999; valaddr_reg:x3; val_offset:102057*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102057*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff249249; valaddr_reg:x3; val_offset:102060*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102060*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff333333; valaddr_reg:x3; val_offset:102063*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102063*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:102066*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102066*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:102069*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102069*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff444444; valaddr_reg:x3; val_offset:102072*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102072*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:102075*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102075*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:102078*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102078*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff666666; valaddr_reg:x3; val_offset:102081*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102081*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:102084*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102084*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:102087*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102087*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:102090*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102090*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29ac81 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x411f99 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29ac81; op2val:0xbfc11f99; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:102093*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102093*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad000000; valaddr_reg:x3; val_offset:102096*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102096*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad000001; valaddr_reg:x3; val_offset:102099*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102099*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad000003; valaddr_reg:x3; val_offset:102102*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102102*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad000007; valaddr_reg:x3; val_offset:102105*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102105*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad00000f; valaddr_reg:x3; val_offset:102108*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102108*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad00001f; valaddr_reg:x3; val_offset:102111*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102111*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad00003f; valaddr_reg:x3; val_offset:102114*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102114*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad00007f; valaddr_reg:x3; val_offset:102117*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102117*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad0000ff; valaddr_reg:x3; val_offset:102120*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102120*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad0001ff; valaddr_reg:x3; val_offset:102123*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102123*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad0003ff; valaddr_reg:x3; val_offset:102126*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102126*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad0007ff; valaddr_reg:x3; val_offset:102129*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102129*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad000fff; valaddr_reg:x3; val_offset:102132*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102132*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad001fff; valaddr_reg:x3; val_offset:102135*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102135*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad003fff; valaddr_reg:x3; val_offset:102138*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102138*0 + 3*265*FLEN/8, x4, x1, x2) + +inst_34047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad007fff; valaddr_reg:x3; val_offset:102141*0 + 3*265*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102141*0 + 3*265*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937984,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937985,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937987,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937991,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937999,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938015,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938047,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938111,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938239,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192938495,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192939007,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192940031,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192942079,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192946175,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192954367,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192970751,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193003519,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193069055,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193200127,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193462271,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(193986559,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(195035135,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(197132287,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(197132288,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(199229440,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(200278016,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(200802304,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201064448,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201195520,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201261056,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201293824,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201310208,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201318400,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201322496,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201324544,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201325568,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326080,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326336,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326464,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326528,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326560,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326576,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326584,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326588,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326590,32,FLEN) +NAN_BOXED(2133406849,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326591,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863488,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863489,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863491,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863495,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863503,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863519,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863551,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863615,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863743,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076863999,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076864511,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076865535,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076867583,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076871679,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076879871,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076896255,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076929023,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4076994559,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4077125631,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4077387775,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4077912063,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4078960639,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4081057791,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4081057792,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4083154944,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4084203520,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4084727808,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4084989952,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085121024,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085186560,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085219328,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085235712,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085243904,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085248000,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085250048,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085251072,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085251584,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085251840,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085251968,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085252032,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085252064,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085252080,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085252088,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085252092,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085252094,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4085252095,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2133437569,32,FLEN) +NAN_BOXED(3217104793,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458368,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458369,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458371,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458375,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458383,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458399,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458431,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458495,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458623,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902458879,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902459391,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902460415,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902462463,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902466559,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902474751,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902491135,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-267.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-267.S new file mode 100644 index 000000000..fe45b0a0b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-267.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_34048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad00ffff; valaddr_reg:x3; val_offset:102144*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102144*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad01ffff; valaddr_reg:x3; val_offset:102147*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102147*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad03ffff; valaddr_reg:x3; val_offset:102150*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102150*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad07ffff; valaddr_reg:x3; val_offset:102153*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102153*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad0fffff; valaddr_reg:x3; val_offset:102156*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102156*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad1fffff; valaddr_reg:x3; val_offset:102159*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102159*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad3fffff; valaddr_reg:x3; val_offset:102162*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102162*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad400000; valaddr_reg:x3; val_offset:102165*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102165*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad600000; valaddr_reg:x3; val_offset:102168*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102168*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad700000; valaddr_reg:x3; val_offset:102171*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102171*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad780000; valaddr_reg:x3; val_offset:102174*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102174*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7c0000; valaddr_reg:x3; val_offset:102177*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102177*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7e0000; valaddr_reg:x3; val_offset:102180*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102180*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7f0000; valaddr_reg:x3; val_offset:102183*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102183*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7f8000; valaddr_reg:x3; val_offset:102186*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102186*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7fc000; valaddr_reg:x3; val_offset:102189*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102189*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7fe000; valaddr_reg:x3; val_offset:102192*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102192*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7ff000; valaddr_reg:x3; val_offset:102195*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102195*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7ff800; valaddr_reg:x3; val_offset:102198*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102198*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7ffc00; valaddr_reg:x3; val_offset:102201*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102201*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7ffe00; valaddr_reg:x3; val_offset:102204*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102204*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7fff00; valaddr_reg:x3; val_offset:102207*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102207*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7fff80; valaddr_reg:x3; val_offset:102210*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102210*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7fffc0; valaddr_reg:x3; val_offset:102213*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102213*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7fffe0; valaddr_reg:x3; val_offset:102216*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102216*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7ffff0; valaddr_reg:x3; val_offset:102219*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102219*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7ffff8; valaddr_reg:x3; val_offset:102222*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102222*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7ffffc; valaddr_reg:x3; val_offset:102225*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102225*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7ffffe; valaddr_reg:x3; val_offset:102228*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102228*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x5a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xad7fffff; valaddr_reg:x3; val_offset:102231*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102231*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbf800001; valaddr_reg:x3; val_offset:102234*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102234*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbf800003; valaddr_reg:x3; val_offset:102237*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102237*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbf800007; valaddr_reg:x3; val_offset:102240*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102240*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbf999999; valaddr_reg:x3; val_offset:102243*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102243*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:102246*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102246*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:102249*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102249*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:102252*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102252*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:102255*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102255*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:102258*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102258*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:102261*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102261*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:102264*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102264*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:102267*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102267*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:102270*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102270*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:102273*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102273*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:102276*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102276*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29e8d7 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x3036c1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29e8d7; op2val:0x803036c1; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:102279*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102279*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:102282*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102282*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:102285*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102285*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:102288*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102288*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:102291*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102291*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:102294*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102294*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:102297*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102297*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:102300*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102300*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:102303*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102303*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:102306*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102306*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:102309*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102309*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:102312*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102312*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:102315*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102315*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:102318*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102318*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:102321*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102321*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:102324*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102324*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:102327*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102327*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89800000; valaddr_reg:x3; val_offset:102330*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102330*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89800001; valaddr_reg:x3; val_offset:102333*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102333*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89800003; valaddr_reg:x3; val_offset:102336*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102336*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89800007; valaddr_reg:x3; val_offset:102339*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102339*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8980000f; valaddr_reg:x3; val_offset:102342*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102342*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8980001f; valaddr_reg:x3; val_offset:102345*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102345*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8980003f; valaddr_reg:x3; val_offset:102348*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102348*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8980007f; valaddr_reg:x3; val_offset:102351*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102351*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x898000ff; valaddr_reg:x3; val_offset:102354*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102354*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x898001ff; valaddr_reg:x3; val_offset:102357*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102357*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x898003ff; valaddr_reg:x3; val_offset:102360*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102360*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x898007ff; valaddr_reg:x3; val_offset:102363*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102363*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89800fff; valaddr_reg:x3; val_offset:102366*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102366*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89801fff; valaddr_reg:x3; val_offset:102369*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102369*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89803fff; valaddr_reg:x3; val_offset:102372*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102372*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89807fff; valaddr_reg:x3; val_offset:102375*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102375*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8980ffff; valaddr_reg:x3; val_offset:102378*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102378*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8981ffff; valaddr_reg:x3; val_offset:102381*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102381*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8983ffff; valaddr_reg:x3; val_offset:102384*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102384*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x8987ffff; valaddr_reg:x3; val_offset:102387*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102387*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x898fffff; valaddr_reg:x3; val_offset:102390*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102390*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x899fffff; valaddr_reg:x3; val_offset:102393*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102393*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89bfffff; valaddr_reg:x3; val_offset:102396*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102396*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89c00000; valaddr_reg:x3; val_offset:102399*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102399*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89e00000; valaddr_reg:x3; val_offset:102402*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102402*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89f00000; valaddr_reg:x3; val_offset:102405*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102405*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89f80000; valaddr_reg:x3; val_offset:102408*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102408*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fc0000; valaddr_reg:x3; val_offset:102411*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102411*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fe0000; valaddr_reg:x3; val_offset:102414*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102414*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ff0000; valaddr_reg:x3; val_offset:102417*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102417*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ff8000; valaddr_reg:x3; val_offset:102420*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102420*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ffc000; valaddr_reg:x3; val_offset:102423*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102423*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ffe000; valaddr_reg:x3; val_offset:102426*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102426*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fff000; valaddr_reg:x3; val_offset:102429*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102429*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fff800; valaddr_reg:x3; val_offset:102432*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102432*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fffc00; valaddr_reg:x3; val_offset:102435*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102435*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fffe00; valaddr_reg:x3; val_offset:102438*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102438*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ffff00; valaddr_reg:x3; val_offset:102441*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102441*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ffff80; valaddr_reg:x3; val_offset:102444*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102444*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ffffc0; valaddr_reg:x3; val_offset:102447*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102447*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ffffe0; valaddr_reg:x3; val_offset:102450*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102450*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fffff0; valaddr_reg:x3; val_offset:102453*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102453*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fffff8; valaddr_reg:x3; val_offset:102456*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102456*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fffffc; valaddr_reg:x3; val_offset:102459*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102459*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89fffffe; valaddr_reg:x3; val_offset:102462*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102462*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x29f80d and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f29f80d; op2val:0x80000000; +op3val:0x89ffffff; valaddr_reg:x3; val_offset:102465*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102465*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:102468*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102468*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:102471*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102471*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:102474*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102474*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:102477*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102477*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:102480*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102480*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:102483*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102483*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:102486*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102486*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:102489*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102489*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:102492*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102492*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:102495*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102495*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:102498*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102498*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:102501*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102501*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:102504*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102504*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:102507*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102507*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:102510*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102510*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:102513*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102513*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a800000; valaddr_reg:x3; val_offset:102516*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102516*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a800001; valaddr_reg:x3; val_offset:102519*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102519*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a800003; valaddr_reg:x3; val_offset:102522*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102522*0 + 3*266*FLEN/8, x4, x1, x2) + +inst_34175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a800007; valaddr_reg:x3; val_offset:102525*0 + 3*266*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102525*0 + 3*266*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902523903,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902589439,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902720511,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2902982655,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2903506943,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2904555519,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2906652671,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2906652672,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2908749824,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2909798400,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910322688,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910584832,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910715904,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910781440,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910814208,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910830592,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910838784,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910842880,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910844928,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910845952,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846464,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846720,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846848,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846912,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846944,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846960,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846968,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846972,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846974,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(2910846975,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133453015,32,FLEN) +NAN_BOXED(2150643393,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867200,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867201,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867203,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867207,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867215,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867231,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867263,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867327,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867455,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867711,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306868223,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306869247,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306871295,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306875391,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306883583,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306899967,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306932735,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306998271,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307129343,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307391487,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307915775,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2308964351,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2311061503,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2311061504,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2313158656,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314207232,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314731520,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314993664,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315124736,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315190272,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315223040,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315239424,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315247616,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315251712,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315253760,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315254784,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255296,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255552,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255680,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255744,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255776,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255792,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255800,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255804,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255806,32,FLEN) +NAN_BOXED(2133456909,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255807,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644416,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644417,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644419,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644423,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-268.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-268.S new file mode 100644 index 000000000..9fc3443f4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-268.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_34176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a80000f; valaddr_reg:x3; val_offset:102528*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102528*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a80001f; valaddr_reg:x3; val_offset:102531*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102531*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a80003f; valaddr_reg:x3; val_offset:102534*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102534*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a80007f; valaddr_reg:x3; val_offset:102537*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102537*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a8000ff; valaddr_reg:x3; val_offset:102540*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102540*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a8001ff; valaddr_reg:x3; val_offset:102543*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102543*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a8003ff; valaddr_reg:x3; val_offset:102546*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102546*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a8007ff; valaddr_reg:x3; val_offset:102549*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102549*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a800fff; valaddr_reg:x3; val_offset:102552*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102552*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a801fff; valaddr_reg:x3; val_offset:102555*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102555*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a803fff; valaddr_reg:x3; val_offset:102558*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102558*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a807fff; valaddr_reg:x3; val_offset:102561*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102561*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a80ffff; valaddr_reg:x3; val_offset:102564*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102564*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a81ffff; valaddr_reg:x3; val_offset:102567*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102567*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a83ffff; valaddr_reg:x3; val_offset:102570*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102570*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a87ffff; valaddr_reg:x3; val_offset:102573*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102573*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a8fffff; valaddr_reg:x3; val_offset:102576*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102576*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8a9fffff; valaddr_reg:x3; val_offset:102579*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102579*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8abfffff; valaddr_reg:x3; val_offset:102582*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102582*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8ac00000; valaddr_reg:x3; val_offset:102585*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102585*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8ae00000; valaddr_reg:x3; val_offset:102588*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102588*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8af00000; valaddr_reg:x3; val_offset:102591*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102591*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8af80000; valaddr_reg:x3; val_offset:102594*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102594*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afc0000; valaddr_reg:x3; val_offset:102597*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102597*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afe0000; valaddr_reg:x3; val_offset:102600*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102600*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8aff0000; valaddr_reg:x3; val_offset:102603*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102603*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8aff8000; valaddr_reg:x3; val_offset:102606*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102606*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8affc000; valaddr_reg:x3; val_offset:102609*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102609*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8affe000; valaddr_reg:x3; val_offset:102612*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102612*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afff000; valaddr_reg:x3; val_offset:102615*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102615*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afff800; valaddr_reg:x3; val_offset:102618*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102618*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afffc00; valaddr_reg:x3; val_offset:102621*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102621*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afffe00; valaddr_reg:x3; val_offset:102624*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102624*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8affff00; valaddr_reg:x3; val_offset:102627*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102627*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8affff80; valaddr_reg:x3; val_offset:102630*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102630*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8affffc0; valaddr_reg:x3; val_offset:102633*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102633*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8affffe0; valaddr_reg:x3; val_offset:102636*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102636*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afffff0; valaddr_reg:x3; val_offset:102639*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102639*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afffff8; valaddr_reg:x3; val_offset:102642*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102642*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afffffc; valaddr_reg:x3; val_offset:102645*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102645*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8afffffe; valaddr_reg:x3; val_offset:102648*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102648*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aa4ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aa4ec; op2val:0x80000000; +op3val:0x8affffff; valaddr_reg:x3; val_offset:102651*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102651*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:102654*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102654*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:102657*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102657*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:102660*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102660*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:102663*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102663*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:102666*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102666*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:102669*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102669*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:102672*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102672*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:102675*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102675*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:102678*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102678*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:102681*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102681*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:102684*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102684*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:102687*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102687*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:102690*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102690*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:102693*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102693*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:102696*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102696*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:102699*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102699*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71800000; valaddr_reg:x3; val_offset:102702*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102702*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71800001; valaddr_reg:x3; val_offset:102705*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102705*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71800003; valaddr_reg:x3; val_offset:102708*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102708*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71800007; valaddr_reg:x3; val_offset:102711*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102711*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7180000f; valaddr_reg:x3; val_offset:102714*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102714*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7180001f; valaddr_reg:x3; val_offset:102717*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102717*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7180003f; valaddr_reg:x3; val_offset:102720*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102720*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7180007f; valaddr_reg:x3; val_offset:102723*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102723*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x718000ff; valaddr_reg:x3; val_offset:102726*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102726*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x718001ff; valaddr_reg:x3; val_offset:102729*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102729*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x718003ff; valaddr_reg:x3; val_offset:102732*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102732*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x718007ff; valaddr_reg:x3; val_offset:102735*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102735*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71800fff; valaddr_reg:x3; val_offset:102738*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102738*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71801fff; valaddr_reg:x3; val_offset:102741*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102741*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71803fff; valaddr_reg:x3; val_offset:102744*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102744*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71807fff; valaddr_reg:x3; val_offset:102747*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102747*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7180ffff; valaddr_reg:x3; val_offset:102750*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102750*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7181ffff; valaddr_reg:x3; val_offset:102753*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102753*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7183ffff; valaddr_reg:x3; val_offset:102756*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102756*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x7187ffff; valaddr_reg:x3; val_offset:102759*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102759*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x718fffff; valaddr_reg:x3; val_offset:102762*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102762*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x719fffff; valaddr_reg:x3; val_offset:102765*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102765*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71bfffff; valaddr_reg:x3; val_offset:102768*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102768*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71c00000; valaddr_reg:x3; val_offset:102771*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102771*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71e00000; valaddr_reg:x3; val_offset:102774*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102774*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71f00000; valaddr_reg:x3; val_offset:102777*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102777*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71f80000; valaddr_reg:x3; val_offset:102780*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102780*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fc0000; valaddr_reg:x3; val_offset:102783*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102783*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fe0000; valaddr_reg:x3; val_offset:102786*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102786*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ff0000; valaddr_reg:x3; val_offset:102789*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102789*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ff8000; valaddr_reg:x3; val_offset:102792*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102792*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ffc000; valaddr_reg:x3; val_offset:102795*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102795*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ffe000; valaddr_reg:x3; val_offset:102798*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102798*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fff000; valaddr_reg:x3; val_offset:102801*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102801*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fff800; valaddr_reg:x3; val_offset:102804*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102804*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fffc00; valaddr_reg:x3; val_offset:102807*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102807*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fffe00; valaddr_reg:x3; val_offset:102810*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102810*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ffff00; valaddr_reg:x3; val_offset:102813*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102813*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ffff80; valaddr_reg:x3; val_offset:102816*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102816*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ffffc0; valaddr_reg:x3; val_offset:102819*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102819*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ffffe0; valaddr_reg:x3; val_offset:102822*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102822*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fffff0; valaddr_reg:x3; val_offset:102825*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102825*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fffff8; valaddr_reg:x3; val_offset:102828*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102828*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fffffc; valaddr_reg:x3; val_offset:102831*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102831*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71fffffe; valaddr_reg:x3; val_offset:102834*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102834*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2aed44 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0xe3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2aed44; op2val:0x0; +op3val:0x71ffffff; valaddr_reg:x3; val_offset:102837*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102837*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:102840*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102840*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:102843*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102843*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:102846*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102846*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:102849*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102849*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:102852*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102852*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:102855*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102855*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:102858*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102858*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:102861*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102861*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:102864*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102864*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:102867*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102867*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:102870*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102870*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:102873*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102873*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:102876*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102876*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:102879*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102879*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:102882*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102882*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:102885*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102885*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3800000; valaddr_reg:x3; val_offset:102888*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102888*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3800001; valaddr_reg:x3; val_offset:102891*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102891*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3800003; valaddr_reg:x3; val_offset:102894*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102894*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3800007; valaddr_reg:x3; val_offset:102897*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102897*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x380000f; valaddr_reg:x3; val_offset:102900*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102900*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x380001f; valaddr_reg:x3; val_offset:102903*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102903*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x380003f; valaddr_reg:x3; val_offset:102906*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102906*0 + 3*267*FLEN/8, x4, x1, x2) + +inst_34303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x380007f; valaddr_reg:x3; val_offset:102909*0 + 3*267*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102909*0 + 3*267*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644431,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644447,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644479,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644543,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644671,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644927,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323645439,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323646463,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323648511,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323652607,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323660799,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323677183,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323709951,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323775487,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323906559,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2324168703,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2324692991,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2325741567,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2327838719,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2327838720,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2329935872,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2330984448,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331508736,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331770880,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331901952,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331967488,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332000256,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332016640,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332024832,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332028928,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332030976,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032000,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032512,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032768,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032896,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032960,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032992,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033008,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033016,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033020,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033022,32,FLEN) +NAN_BOXED(2133501164,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033023,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214016,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214017,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214019,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214023,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214031,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214047,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214079,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214143,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214271,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904214527,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904215039,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904216063,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904218111,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904222207,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904230399,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904246783,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904279551,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904345087,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904476159,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1904738303,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1905262591,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1906311167,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1908408319,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1908408320,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1910505472,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1911554048,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912078336,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912340480,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912471552,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912537088,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912569856,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912586240,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912594432,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912598528,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912600576,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912601600,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602112,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602368,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602496,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602560,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602592,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602608,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602616,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602620,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602622,32,FLEN) +NAN_BOXED(2133519684,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1912602623,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720256,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720257,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720259,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720263,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720271,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720287,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720319,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720383,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-269.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-269.S new file mode 100644 index 000000000..84d42bcc9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-269.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_34304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x38000ff; valaddr_reg:x3; val_offset:102912*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102912*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x38001ff; valaddr_reg:x3; val_offset:102915*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102915*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x38003ff; valaddr_reg:x3; val_offset:102918*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102918*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x38007ff; valaddr_reg:x3; val_offset:102921*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102921*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3800fff; valaddr_reg:x3; val_offset:102924*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102924*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3801fff; valaddr_reg:x3; val_offset:102927*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102927*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3803fff; valaddr_reg:x3; val_offset:102930*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102930*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3807fff; valaddr_reg:x3; val_offset:102933*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102933*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x380ffff; valaddr_reg:x3; val_offset:102936*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102936*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x381ffff; valaddr_reg:x3; val_offset:102939*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102939*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x383ffff; valaddr_reg:x3; val_offset:102942*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102942*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x387ffff; valaddr_reg:x3; val_offset:102945*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102945*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x38fffff; valaddr_reg:x3; val_offset:102948*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102948*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x39fffff; valaddr_reg:x3; val_offset:102951*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102951*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3bfffff; valaddr_reg:x3; val_offset:102954*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102954*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3c00000; valaddr_reg:x3; val_offset:102957*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102957*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3e00000; valaddr_reg:x3; val_offset:102960*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102960*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3f00000; valaddr_reg:x3; val_offset:102963*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102963*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3f80000; valaddr_reg:x3; val_offset:102966*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102966*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fc0000; valaddr_reg:x3; val_offset:102969*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102969*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fe0000; valaddr_reg:x3; val_offset:102972*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102972*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ff0000; valaddr_reg:x3; val_offset:102975*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102975*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ff8000; valaddr_reg:x3; val_offset:102978*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102978*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ffc000; valaddr_reg:x3; val_offset:102981*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102981*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ffe000; valaddr_reg:x3; val_offset:102984*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102984*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fff000; valaddr_reg:x3; val_offset:102987*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102987*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fff800; valaddr_reg:x3; val_offset:102990*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102990*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fffc00; valaddr_reg:x3; val_offset:102993*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102993*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fffe00; valaddr_reg:x3; val_offset:102996*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102996*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ffff00; valaddr_reg:x3; val_offset:102999*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 102999*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ffff80; valaddr_reg:x3; val_offset:103002*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103002*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ffffc0; valaddr_reg:x3; val_offset:103005*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103005*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ffffe0; valaddr_reg:x3; val_offset:103008*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103008*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fffff0; valaddr_reg:x3; val_offset:103011*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103011*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fffff8; valaddr_reg:x3; val_offset:103014*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103014*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fffffc; valaddr_reg:x3; val_offset:103017*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103017*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3fffffe; valaddr_reg:x3; val_offset:103020*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103020*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b32e7 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b32e7; op2val:0x0; +op3val:0x3ffffff; valaddr_reg:x3; val_offset:103023*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103023*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1000000; valaddr_reg:x3; val_offset:103026*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103026*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1000001; valaddr_reg:x3; val_offset:103029*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103029*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1000003; valaddr_reg:x3; val_offset:103032*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103032*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1000007; valaddr_reg:x3; val_offset:103035*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103035*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa100000f; valaddr_reg:x3; val_offset:103038*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103038*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa100001f; valaddr_reg:x3; val_offset:103041*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103041*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa100003f; valaddr_reg:x3; val_offset:103044*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103044*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa100007f; valaddr_reg:x3; val_offset:103047*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103047*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa10000ff; valaddr_reg:x3; val_offset:103050*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103050*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa10001ff; valaddr_reg:x3; val_offset:103053*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103053*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa10003ff; valaddr_reg:x3; val_offset:103056*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103056*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa10007ff; valaddr_reg:x3; val_offset:103059*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103059*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1000fff; valaddr_reg:x3; val_offset:103062*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103062*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1001fff; valaddr_reg:x3; val_offset:103065*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103065*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1003fff; valaddr_reg:x3; val_offset:103068*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103068*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1007fff; valaddr_reg:x3; val_offset:103071*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103071*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa100ffff; valaddr_reg:x3; val_offset:103074*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103074*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa101ffff; valaddr_reg:x3; val_offset:103077*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103077*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa103ffff; valaddr_reg:x3; val_offset:103080*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103080*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa107ffff; valaddr_reg:x3; val_offset:103083*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103083*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa10fffff; valaddr_reg:x3; val_offset:103086*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103086*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa11fffff; valaddr_reg:x3; val_offset:103089*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103089*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa13fffff; valaddr_reg:x3; val_offset:103092*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103092*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1400000; valaddr_reg:x3; val_offset:103095*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103095*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1600000; valaddr_reg:x3; val_offset:103098*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103098*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1700000; valaddr_reg:x3; val_offset:103101*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103101*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa1780000; valaddr_reg:x3; val_offset:103104*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103104*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17c0000; valaddr_reg:x3; val_offset:103107*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103107*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17e0000; valaddr_reg:x3; val_offset:103110*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103110*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17f0000; valaddr_reg:x3; val_offset:103113*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103113*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17f8000; valaddr_reg:x3; val_offset:103116*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103116*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17fc000; valaddr_reg:x3; val_offset:103119*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103119*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17fe000; valaddr_reg:x3; val_offset:103122*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103122*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17ff000; valaddr_reg:x3; val_offset:103125*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103125*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17ff800; valaddr_reg:x3; val_offset:103128*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103128*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17ffc00; valaddr_reg:x3; val_offset:103131*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103131*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17ffe00; valaddr_reg:x3; val_offset:103134*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103134*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17fff00; valaddr_reg:x3; val_offset:103137*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103137*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17fff80; valaddr_reg:x3; val_offset:103140*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103140*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17fffc0; valaddr_reg:x3; val_offset:103143*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103143*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17fffe0; valaddr_reg:x3; val_offset:103146*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103146*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17ffff0; valaddr_reg:x3; val_offset:103149*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103149*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17ffff8; valaddr_reg:x3; val_offset:103152*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103152*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17ffffc; valaddr_reg:x3; val_offset:103155*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103155*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17ffffe; valaddr_reg:x3; val_offset:103158*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103158*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x42 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xa17fffff; valaddr_reg:x3; val_offset:103161*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103161*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbf800001; valaddr_reg:x3; val_offset:103164*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103164*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbf800003; valaddr_reg:x3; val_offset:103167*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103167*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbf800007; valaddr_reg:x3; val_offset:103170*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103170*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbf999999; valaddr_reg:x3; val_offset:103173*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103173*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:103176*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103176*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:103179*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103179*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:103182*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103182*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:103185*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103185*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:103188*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103188*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:103191*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103191*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:103194*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103194*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:103197*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103197*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:103200*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103200*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:103203*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103203*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:103206*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103206*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2b40ce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2fd5ea and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2b40ce; op2val:0x802fd5ea; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:103209*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103209*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:103212*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103212*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:103215*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103215*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:103218*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103218*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:103221*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103221*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:103224*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103224*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:103227*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103227*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:103230*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103230*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:103233*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103233*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:103236*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103236*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:103239*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103239*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:103242*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103242*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:103245*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103245*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:103248*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103248*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:103251*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103251*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:103254*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103254*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:103257*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103257*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc000000; valaddr_reg:x3; val_offset:103260*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103260*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc000001; valaddr_reg:x3; val_offset:103263*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103263*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc000003; valaddr_reg:x3; val_offset:103266*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103266*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc000007; valaddr_reg:x3; val_offset:103269*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103269*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc00000f; valaddr_reg:x3; val_offset:103272*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103272*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc00001f; valaddr_reg:x3; val_offset:103275*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103275*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc00003f; valaddr_reg:x3; val_offset:103278*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103278*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc00007f; valaddr_reg:x3; val_offset:103281*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103281*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc0000ff; valaddr_reg:x3; val_offset:103284*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103284*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc0001ff; valaddr_reg:x3; val_offset:103287*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103287*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc0003ff; valaddr_reg:x3; val_offset:103290*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103290*0 + 3*268*FLEN/8, x4, x1, x2) + +inst_34431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc0007ff; valaddr_reg:x3; val_offset:103293*0 + 3*268*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103293*0 + 3*268*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720511,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720767,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58721279,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58722303,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58724351,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58728447,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58736639,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58753023,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58785791,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58851327,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58982399,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(59244543,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(59768831,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(60817407,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(62914559,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(62914560,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65011712,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66060288,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66584576,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66846720,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66977792,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67043328,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67076096,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67092480,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67100672,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67104768,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67106816,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67107840,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108352,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108608,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108736,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108800,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108832,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108848,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108856,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108860,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108862,32,FLEN) +NAN_BOXED(2133537511,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108863,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701131776,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701131777,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701131779,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701131783,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701131791,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701131807,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701131839,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701131903,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701132031,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701132287,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701132799,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701133823,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701135871,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701139967,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701148159,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701164543,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701197311,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701262847,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701393919,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2701656063,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2702180351,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2703228927,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2705326079,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2705326080,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2707423232,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2708471808,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2708996096,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709258240,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709389312,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709454848,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709487616,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709504000,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709512192,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709516288,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709518336,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709519360,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709519872,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520128,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520256,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520320,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520352,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520368,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520376,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520380,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520382,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(2709520383,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133541070,32,FLEN) +NAN_BOXED(2150618602,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326592,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326593,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326595,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326599,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326607,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326623,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326655,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326719,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326847,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201327103,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201327615,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201328639,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-27.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-27.S new file mode 100644 index 000000000..9df96a2de --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-27.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_3328: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877ffffe; valaddr_reg:x3; val_offset:9984*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9984*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3329: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x772129 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d772129; op2val:0x80000000; +op3val:0x877fffff; valaddr_reg:x3; val_offset:9987*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9987*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3330: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4000000; valaddr_reg:x3; val_offset:9990*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9990*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3331: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4000001; valaddr_reg:x3; val_offset:9993*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9993*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3332: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4000003; valaddr_reg:x3; val_offset:9996*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9996*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3333: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4000007; valaddr_reg:x3; val_offset:9999*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 9999*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3334: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa400000f; valaddr_reg:x3; val_offset:10002*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10002*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3335: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa400001f; valaddr_reg:x3; val_offset:10005*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10005*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3336: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa400003f; valaddr_reg:x3; val_offset:10008*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10008*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3337: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa400007f; valaddr_reg:x3; val_offset:10011*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10011*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3338: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa40000ff; valaddr_reg:x3; val_offset:10014*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10014*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3339: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa40001ff; valaddr_reg:x3; val_offset:10017*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10017*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3340: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa40003ff; valaddr_reg:x3; val_offset:10020*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10020*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3341: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa40007ff; valaddr_reg:x3; val_offset:10023*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10023*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3342: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4000fff; valaddr_reg:x3; val_offset:10026*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10026*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3343: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4001fff; valaddr_reg:x3; val_offset:10029*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10029*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3344: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4003fff; valaddr_reg:x3; val_offset:10032*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10032*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3345: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4007fff; valaddr_reg:x3; val_offset:10035*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10035*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3346: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa400ffff; valaddr_reg:x3; val_offset:10038*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10038*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3347: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa401ffff; valaddr_reg:x3; val_offset:10041*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10041*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3348: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa403ffff; valaddr_reg:x3; val_offset:10044*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10044*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3349: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa407ffff; valaddr_reg:x3; val_offset:10047*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10047*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3350: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa40fffff; valaddr_reg:x3; val_offset:10050*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10050*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3351: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa41fffff; valaddr_reg:x3; val_offset:10053*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10053*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3352: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa43fffff; valaddr_reg:x3; val_offset:10056*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10056*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3353: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4400000; valaddr_reg:x3; val_offset:10059*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10059*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3354: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4600000; valaddr_reg:x3; val_offset:10062*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10062*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3355: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4700000; valaddr_reg:x3; val_offset:10065*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10065*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3356: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa4780000; valaddr_reg:x3; val_offset:10068*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10068*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3357: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47c0000; valaddr_reg:x3; val_offset:10071*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10071*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3358: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47e0000; valaddr_reg:x3; val_offset:10074*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10074*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3359: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47f0000; valaddr_reg:x3; val_offset:10077*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10077*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3360: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47f8000; valaddr_reg:x3; val_offset:10080*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10080*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3361: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47fc000; valaddr_reg:x3; val_offset:10083*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10083*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3362: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47fe000; valaddr_reg:x3; val_offset:10086*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10086*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3363: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47ff000; valaddr_reg:x3; val_offset:10089*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10089*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3364: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47ff800; valaddr_reg:x3; val_offset:10092*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10092*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3365: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47ffc00; valaddr_reg:x3; val_offset:10095*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10095*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3366: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47ffe00; valaddr_reg:x3; val_offset:10098*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10098*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3367: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47fff00; valaddr_reg:x3; val_offset:10101*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10101*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3368: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47fff80; valaddr_reg:x3; val_offset:10104*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10104*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3369: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47fffc0; valaddr_reg:x3; val_offset:10107*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10107*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3370: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47fffe0; valaddr_reg:x3; val_offset:10110*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10110*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3371: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47ffff0; valaddr_reg:x3; val_offset:10113*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10113*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3372: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47ffff8; valaddr_reg:x3; val_offset:10116*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10116*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3373: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47ffffc; valaddr_reg:x3; val_offset:10119*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10119*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3374: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47ffffe; valaddr_reg:x3; val_offset:10122*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10122*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3375: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x48 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xa47fffff; valaddr_reg:x3; val_offset:10125*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10125*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3376: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbf800001; valaddr_reg:x3; val_offset:10128*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10128*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3377: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbf800003; valaddr_reg:x3; val_offset:10131*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10131*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3378: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbf800007; valaddr_reg:x3; val_offset:10134*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10134*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3379: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbf999999; valaddr_reg:x3; val_offset:10137*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10137*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3380: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:10140*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10140*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3381: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:10143*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10143*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3382: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:10146*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10146*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3383: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:10149*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10149*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3384: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:10152*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10152*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3385: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:10155*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10155*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3386: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:10158*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10158*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3387: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:10161*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10161*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3388: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:10164*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10164*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3389: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:10167*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10167*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3390: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:10170*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10170*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3391: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x77fb3b and fs2 == 1 and fe2 == 0x03 and fm2 == 0x042392 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d77fb3b; op2val:0x81842392; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:10173*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10173*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3392: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72000000; valaddr_reg:x3; val_offset:10176*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10176*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3393: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72000001; valaddr_reg:x3; val_offset:10179*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10179*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3394: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72000003; valaddr_reg:x3; val_offset:10182*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10182*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3395: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72000007; valaddr_reg:x3; val_offset:10185*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10185*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3396: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7200000f; valaddr_reg:x3; val_offset:10188*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10188*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3397: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7200001f; valaddr_reg:x3; val_offset:10191*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10191*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3398: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7200003f; valaddr_reg:x3; val_offset:10194*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10194*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3399: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7200007f; valaddr_reg:x3; val_offset:10197*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10197*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3400: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x720000ff; valaddr_reg:x3; val_offset:10200*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10200*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3401: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x720001ff; valaddr_reg:x3; val_offset:10203*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10203*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3402: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x720003ff; valaddr_reg:x3; val_offset:10206*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10206*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3403: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x720007ff; valaddr_reg:x3; val_offset:10209*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10209*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3404: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72000fff; valaddr_reg:x3; val_offset:10212*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10212*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3405: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72001fff; valaddr_reg:x3; val_offset:10215*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10215*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3406: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72003fff; valaddr_reg:x3; val_offset:10218*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10218*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3407: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72007fff; valaddr_reg:x3; val_offset:10221*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10221*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3408: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7200ffff; valaddr_reg:x3; val_offset:10224*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10224*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3409: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7201ffff; valaddr_reg:x3; val_offset:10227*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10227*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3410: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7203ffff; valaddr_reg:x3; val_offset:10230*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10230*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3411: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7207ffff; valaddr_reg:x3; val_offset:10233*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10233*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3412: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x720fffff; valaddr_reg:x3; val_offset:10236*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10236*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3413: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x721fffff; valaddr_reg:x3; val_offset:10239*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10239*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3414: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x723fffff; valaddr_reg:x3; val_offset:10242*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10242*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3415: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72400000; valaddr_reg:x3; val_offset:10245*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10245*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3416: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72600000; valaddr_reg:x3; val_offset:10248*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10248*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3417: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72700000; valaddr_reg:x3; val_offset:10251*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10251*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3418: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x72780000; valaddr_reg:x3; val_offset:10254*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10254*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3419: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727c0000; valaddr_reg:x3; val_offset:10257*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10257*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3420: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727e0000; valaddr_reg:x3; val_offset:10260*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10260*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3421: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727f0000; valaddr_reg:x3; val_offset:10263*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10263*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3422: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727f8000; valaddr_reg:x3; val_offset:10266*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10266*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3423: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727fc000; valaddr_reg:x3; val_offset:10269*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10269*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3424: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727fe000; valaddr_reg:x3; val_offset:10272*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10272*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3425: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727ff000; valaddr_reg:x3; val_offset:10275*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10275*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3426: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727ff800; valaddr_reg:x3; val_offset:10278*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10278*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3427: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727ffc00; valaddr_reg:x3; val_offset:10281*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10281*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3428: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727ffe00; valaddr_reg:x3; val_offset:10284*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10284*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3429: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727fff00; valaddr_reg:x3; val_offset:10287*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10287*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3430: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727fff80; valaddr_reg:x3; val_offset:10290*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10290*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3431: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727fffc0; valaddr_reg:x3; val_offset:10293*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10293*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3432: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727fffe0; valaddr_reg:x3; val_offset:10296*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10296*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3433: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727ffff0; valaddr_reg:x3; val_offset:10299*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10299*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3434: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727ffff8; valaddr_reg:x3; val_offset:10302*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10302*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3435: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727ffffc; valaddr_reg:x3; val_offset:10305*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10305*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3436: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727ffffe; valaddr_reg:x3; val_offset:10308*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10308*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3437: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xe4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x727fffff; valaddr_reg:x3; val_offset:10311*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10311*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3438: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f000001; valaddr_reg:x3; val_offset:10314*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10314*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3439: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f000003; valaddr_reg:x3; val_offset:10317*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10317*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3440: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f000007; valaddr_reg:x3; val_offset:10320*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10320*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3441: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f199999; valaddr_reg:x3; val_offset:10323*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10323*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3442: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f249249; valaddr_reg:x3; val_offset:10326*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10326*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3443: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f333333; valaddr_reg:x3; val_offset:10329*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10329*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3444: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:10332*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10332*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3445: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:10335*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10335*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3446: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f444444; valaddr_reg:x3; val_offset:10338*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10338*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3447: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:10341*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10341*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3448: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:10344*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10344*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3449: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f666666; valaddr_reg:x3; val_offset:10347*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10347*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3450: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:10350*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10350*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3451: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:10353*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10353*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3452: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:10356*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10356*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3453: +// fs1 == 0 and fe1 == 0xfa and fm1 == 0x783eca and fs2 == 0 and fe2 == 0x83 and fm2 == 0x03ff9c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d783eca; op2val:0x4183ff9c; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:10359*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10359*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3454: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:10362*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10362*0 + 3*26*FLEN/8, x4, x1, x2) + +inst_3455: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:10365*0 + 3*26*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10365*0 + 3*26*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312766,32,FLEN) +NAN_BOXED(2104959273,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312767,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463424,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463425,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463427,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463431,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463439,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463455,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463487,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463551,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463679,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751463935,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751464447,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751465471,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751467519,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751471615,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751479807,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751496191,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751528959,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751594495,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751725567,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2751987711,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2752511999,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2753560575,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2755657727,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2755657728,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2757754880,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2758803456,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759327744,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759589888,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759720960,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759786496,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759819264,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759835648,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759843840,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759847936,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759849984,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759851008,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759851520,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759851776,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759851904,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759851968,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759852000,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759852016,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759852024,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759852028,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759852030,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(2759852031,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2105015099,32,FLEN) +NAN_BOXED(2172920722,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602624,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602625,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602627,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602631,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602639,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602655,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602687,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602751,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912602879,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912603135,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912603647,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912604671,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912606719,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912610815,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912619007,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912635391,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912668159,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912733695,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1912864767,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1913126911,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1913651199,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1914699775,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1916796927,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1916796928,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1918894080,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1919942656,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920466944,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920729088,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920860160,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920925696,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920958464,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920974848,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920983040,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920987136,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920989184,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920990208,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920990720,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920990976,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920991104,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920991168,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920991200,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920991216,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920991224,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920991228,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920991230,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(1920991231,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2105032394,32,FLEN) +NAN_BOXED(1099169692,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-270.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-270.S new file mode 100644 index 000000000..4756e130a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-270.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_34432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc000fff; valaddr_reg:x3; val_offset:103296*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103296*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc001fff; valaddr_reg:x3; val_offset:103299*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103299*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc003fff; valaddr_reg:x3; val_offset:103302*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103302*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc007fff; valaddr_reg:x3; val_offset:103305*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103305*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc00ffff; valaddr_reg:x3; val_offset:103308*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103308*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc01ffff; valaddr_reg:x3; val_offset:103311*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103311*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc03ffff; valaddr_reg:x3; val_offset:103314*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103314*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc07ffff; valaddr_reg:x3; val_offset:103317*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103317*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc0fffff; valaddr_reg:x3; val_offset:103320*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103320*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc1fffff; valaddr_reg:x3; val_offset:103323*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103323*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc3fffff; valaddr_reg:x3; val_offset:103326*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103326*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc400000; valaddr_reg:x3; val_offset:103329*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103329*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc600000; valaddr_reg:x3; val_offset:103332*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103332*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc700000; valaddr_reg:x3; val_offset:103335*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103335*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc780000; valaddr_reg:x3; val_offset:103338*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103338*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7c0000; valaddr_reg:x3; val_offset:103341*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103341*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7e0000; valaddr_reg:x3; val_offset:103344*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103344*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7f0000; valaddr_reg:x3; val_offset:103347*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103347*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7f8000; valaddr_reg:x3; val_offset:103350*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103350*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7fc000; valaddr_reg:x3; val_offset:103353*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103353*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7fe000; valaddr_reg:x3; val_offset:103356*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103356*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7ff000; valaddr_reg:x3; val_offset:103359*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103359*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7ff800; valaddr_reg:x3; val_offset:103362*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103362*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7ffc00; valaddr_reg:x3; val_offset:103365*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103365*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7ffe00; valaddr_reg:x3; val_offset:103368*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103368*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7fff00; valaddr_reg:x3; val_offset:103371*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103371*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7fff80; valaddr_reg:x3; val_offset:103374*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103374*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7fffc0; valaddr_reg:x3; val_offset:103377*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103377*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7fffe0; valaddr_reg:x3; val_offset:103380*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103380*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7ffff0; valaddr_reg:x3; val_offset:103383*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103383*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7ffff8; valaddr_reg:x3; val_offset:103386*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103386*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7ffffc; valaddr_reg:x3; val_offset:103389*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103389*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7ffffe; valaddr_reg:x3; val_offset:103392*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103392*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2bb989 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2bb989; op2val:0x0; +op3val:0xc7fffff; valaddr_reg:x3; val_offset:103395*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103395*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:103398*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103398*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:103401*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103401*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:103404*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103404*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:103407*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103407*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:103410*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103410*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:103413*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103413*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:103416*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103416*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:103419*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103419*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:103422*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103422*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:103425*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103425*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:103428*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103428*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:103431*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103431*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:103434*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103434*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:103437*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103437*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:103440*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103440*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:103443*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103443*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5800000; valaddr_reg:x3; val_offset:103446*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103446*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5800001; valaddr_reg:x3; val_offset:103449*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103449*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5800003; valaddr_reg:x3; val_offset:103452*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103452*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5800007; valaddr_reg:x3; val_offset:103455*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103455*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x580000f; valaddr_reg:x3; val_offset:103458*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103458*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x580001f; valaddr_reg:x3; val_offset:103461*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103461*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x580003f; valaddr_reg:x3; val_offset:103464*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103464*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x580007f; valaddr_reg:x3; val_offset:103467*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103467*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x58000ff; valaddr_reg:x3; val_offset:103470*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103470*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x58001ff; valaddr_reg:x3; val_offset:103473*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103473*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x58003ff; valaddr_reg:x3; val_offset:103476*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103476*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x58007ff; valaddr_reg:x3; val_offset:103479*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103479*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5800fff; valaddr_reg:x3; val_offset:103482*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103482*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5801fff; valaddr_reg:x3; val_offset:103485*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103485*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5803fff; valaddr_reg:x3; val_offset:103488*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103488*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5807fff; valaddr_reg:x3; val_offset:103491*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103491*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x580ffff; valaddr_reg:x3; val_offset:103494*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103494*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x581ffff; valaddr_reg:x3; val_offset:103497*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103497*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x583ffff; valaddr_reg:x3; val_offset:103500*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103500*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x587ffff; valaddr_reg:x3; val_offset:103503*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103503*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x58fffff; valaddr_reg:x3; val_offset:103506*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103506*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x59fffff; valaddr_reg:x3; val_offset:103509*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103509*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5bfffff; valaddr_reg:x3; val_offset:103512*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103512*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5c00000; valaddr_reg:x3; val_offset:103515*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103515*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5e00000; valaddr_reg:x3; val_offset:103518*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103518*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5f00000; valaddr_reg:x3; val_offset:103521*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103521*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5f80000; valaddr_reg:x3; val_offset:103524*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103524*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fc0000; valaddr_reg:x3; val_offset:103527*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103527*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fe0000; valaddr_reg:x3; val_offset:103530*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103530*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ff0000; valaddr_reg:x3; val_offset:103533*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103533*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ff8000; valaddr_reg:x3; val_offset:103536*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103536*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ffc000; valaddr_reg:x3; val_offset:103539*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103539*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ffe000; valaddr_reg:x3; val_offset:103542*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103542*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fff000; valaddr_reg:x3; val_offset:103545*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103545*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fff800; valaddr_reg:x3; val_offset:103548*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103548*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fffc00; valaddr_reg:x3; val_offset:103551*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103551*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fffe00; valaddr_reg:x3; val_offset:103554*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103554*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ffff00; valaddr_reg:x3; val_offset:103557*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103557*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ffff80; valaddr_reg:x3; val_offset:103560*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103560*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ffffc0; valaddr_reg:x3; val_offset:103563*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103563*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ffffe0; valaddr_reg:x3; val_offset:103566*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103566*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fffff0; valaddr_reg:x3; val_offset:103569*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103569*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fffff8; valaddr_reg:x3; val_offset:103572*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103572*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fffffc; valaddr_reg:x3; val_offset:103575*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103575*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5fffffe; valaddr_reg:x3; val_offset:103578*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103578*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2c9c0a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2c9c0a; op2val:0x0; +op3val:0x5ffffff; valaddr_reg:x3; val_offset:103581*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103581*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3f800001; valaddr_reg:x3; val_offset:103584*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103584*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3f800003; valaddr_reg:x3; val_offset:103587*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103587*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3f800007; valaddr_reg:x3; val_offset:103590*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103590*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3f999999; valaddr_reg:x3; val_offset:103593*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103593*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:103596*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103596*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:103599*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103599*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:103602*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103602*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:103605*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103605*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:103608*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103608*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:103611*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103611*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:103614*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103614*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:103617*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103617*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:103620*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103620*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:103623*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103623*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:103626*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103626*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:103629*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103629*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a800000; valaddr_reg:x3; val_offset:103632*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103632*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a800001; valaddr_reg:x3; val_offset:103635*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103635*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a800003; valaddr_reg:x3; val_offset:103638*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103638*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a800007; valaddr_reg:x3; val_offset:103641*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103641*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a80000f; valaddr_reg:x3; val_offset:103644*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103644*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a80001f; valaddr_reg:x3; val_offset:103647*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103647*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a80003f; valaddr_reg:x3; val_offset:103650*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103650*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a80007f; valaddr_reg:x3; val_offset:103653*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103653*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a8000ff; valaddr_reg:x3; val_offset:103656*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103656*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a8001ff; valaddr_reg:x3; val_offset:103659*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103659*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a8003ff; valaddr_reg:x3; val_offset:103662*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103662*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a8007ff; valaddr_reg:x3; val_offset:103665*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103665*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a800fff; valaddr_reg:x3; val_offset:103668*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103668*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a801fff; valaddr_reg:x3; val_offset:103671*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103671*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a803fff; valaddr_reg:x3; val_offset:103674*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103674*0 + 3*269*FLEN/8, x4, x1, x2) + +inst_34559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a807fff; valaddr_reg:x3; val_offset:103677*0 + 3*269*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103677*0 + 3*269*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201330687,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201334783,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201342975,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201359359,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201392127,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201457663,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201588735,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201850879,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(202375167,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(203423743,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(205520895,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(205520896,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(207618048,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(208666624,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209190912,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209453056,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209584128,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209649664,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209682432,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209698816,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209707008,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209711104,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209713152,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714176,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714688,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714944,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715072,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715136,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715168,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715184,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715192,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715196,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715198,32,FLEN) +NAN_BOXED(2133571977,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715199,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274688,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274689,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274691,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274695,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274703,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274719,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274751,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274815,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274943,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92275199,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92275711,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92276735,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92278783,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92282879,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92291071,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92307455,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92340223,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92405759,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92536831,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92798975,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(93323263,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(94371839,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(96468991,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(96468992,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(98566144,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(99614720,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100139008,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100401152,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100532224,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100597760,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100630528,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100646912,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100655104,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100659200,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100661248,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100662272,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100662784,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663040,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663168,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663232,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663264,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663280,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663288,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663292,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663294,32,FLEN) +NAN_BOXED(2133629962,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663295,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902592,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902593,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902595,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902599,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902607,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902623,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902655,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902719,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249902847,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249903103,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249903615,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249904639,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249906687,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249910783,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249918975,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249935359,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-271.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-271.S new file mode 100644 index 000000000..957b0c70c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-271.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_34560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a80ffff; valaddr_reg:x3; val_offset:103680*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103680*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a81ffff; valaddr_reg:x3; val_offset:103683*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103683*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a83ffff; valaddr_reg:x3; val_offset:103686*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103686*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a87ffff; valaddr_reg:x3; val_offset:103689*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103689*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a8fffff; valaddr_reg:x3; val_offset:103692*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103692*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4a9fffff; valaddr_reg:x3; val_offset:103695*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103695*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4abfffff; valaddr_reg:x3; val_offset:103698*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103698*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4ac00000; valaddr_reg:x3; val_offset:103701*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103701*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4ae00000; valaddr_reg:x3; val_offset:103704*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103704*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4af00000; valaddr_reg:x3; val_offset:103707*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103707*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4af80000; valaddr_reg:x3; val_offset:103710*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103710*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afc0000; valaddr_reg:x3; val_offset:103713*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103713*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afe0000; valaddr_reg:x3; val_offset:103716*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103716*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4aff0000; valaddr_reg:x3; val_offset:103719*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103719*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4aff8000; valaddr_reg:x3; val_offset:103722*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103722*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4affc000; valaddr_reg:x3; val_offset:103725*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103725*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4affe000; valaddr_reg:x3; val_offset:103728*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103728*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afff000; valaddr_reg:x3; val_offset:103731*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103731*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afff800; valaddr_reg:x3; val_offset:103734*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103734*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afffc00; valaddr_reg:x3; val_offset:103737*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103737*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afffe00; valaddr_reg:x3; val_offset:103740*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103740*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4affff00; valaddr_reg:x3; val_offset:103743*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103743*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4affff80; valaddr_reg:x3; val_offset:103746*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103746*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4affffc0; valaddr_reg:x3; val_offset:103749*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103749*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4affffe0; valaddr_reg:x3; val_offset:103752*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103752*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afffff0; valaddr_reg:x3; val_offset:103755*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103755*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afffff8; valaddr_reg:x3; val_offset:103758*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103758*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afffffc; valaddr_reg:x3; val_offset:103761*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103761*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4afffffe; valaddr_reg:x3; val_offset:103764*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103764*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cd19e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f66f9 and fs3 == 0 and fe3 == 0x95 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cd19e; op2val:0x2f66f9; +op3val:0x4affffff; valaddr_reg:x3; val_offset:103767*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103767*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68000000; valaddr_reg:x3; val_offset:103770*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103770*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68000001; valaddr_reg:x3; val_offset:103773*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103773*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68000003; valaddr_reg:x3; val_offset:103776*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103776*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68000007; valaddr_reg:x3; val_offset:103779*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103779*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x6800000f; valaddr_reg:x3; val_offset:103782*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103782*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x6800001f; valaddr_reg:x3; val_offset:103785*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103785*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x6800003f; valaddr_reg:x3; val_offset:103788*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103788*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x6800007f; valaddr_reg:x3; val_offset:103791*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103791*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x680000ff; valaddr_reg:x3; val_offset:103794*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103794*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x680001ff; valaddr_reg:x3; val_offset:103797*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103797*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x680003ff; valaddr_reg:x3; val_offset:103800*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103800*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x680007ff; valaddr_reg:x3; val_offset:103803*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103803*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68000fff; valaddr_reg:x3; val_offset:103806*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103806*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68001fff; valaddr_reg:x3; val_offset:103809*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103809*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68003fff; valaddr_reg:x3; val_offset:103812*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103812*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68007fff; valaddr_reg:x3; val_offset:103815*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103815*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x6800ffff; valaddr_reg:x3; val_offset:103818*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103818*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x6801ffff; valaddr_reg:x3; val_offset:103821*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103821*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x6803ffff; valaddr_reg:x3; val_offset:103824*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103824*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x6807ffff; valaddr_reg:x3; val_offset:103827*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103827*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x680fffff; valaddr_reg:x3; val_offset:103830*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103830*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x681fffff; valaddr_reg:x3; val_offset:103833*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103833*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x683fffff; valaddr_reg:x3; val_offset:103836*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103836*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68400000; valaddr_reg:x3; val_offset:103839*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103839*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68600000; valaddr_reg:x3; val_offset:103842*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103842*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68700000; valaddr_reg:x3; val_offset:103845*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103845*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x68780000; valaddr_reg:x3; val_offset:103848*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103848*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687c0000; valaddr_reg:x3; val_offset:103851*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103851*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687e0000; valaddr_reg:x3; val_offset:103854*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103854*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687f0000; valaddr_reg:x3; val_offset:103857*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103857*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687f8000; valaddr_reg:x3; val_offset:103860*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103860*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687fc000; valaddr_reg:x3; val_offset:103863*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103863*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687fe000; valaddr_reg:x3; val_offset:103866*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103866*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687ff000; valaddr_reg:x3; val_offset:103869*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103869*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687ff800; valaddr_reg:x3; val_offset:103872*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103872*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687ffc00; valaddr_reg:x3; val_offset:103875*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103875*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687ffe00; valaddr_reg:x3; val_offset:103878*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103878*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687fff00; valaddr_reg:x3; val_offset:103881*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103881*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687fff80; valaddr_reg:x3; val_offset:103884*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103884*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687fffc0; valaddr_reg:x3; val_offset:103887*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103887*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687fffe0; valaddr_reg:x3; val_offset:103890*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103890*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687ffff0; valaddr_reg:x3; val_offset:103893*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103893*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687ffff8; valaddr_reg:x3; val_offset:103896*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103896*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687ffffc; valaddr_reg:x3; val_offset:103899*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103899*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687ffffe; valaddr_reg:x3; val_offset:103902*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103902*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xd0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x687fffff; valaddr_reg:x3; val_offset:103905*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103905*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f000001; valaddr_reg:x3; val_offset:103908*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103908*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f000003; valaddr_reg:x3; val_offset:103911*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103911*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f000007; valaddr_reg:x3; val_offset:103914*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103914*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f199999; valaddr_reg:x3; val_offset:103917*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103917*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f249249; valaddr_reg:x3; val_offset:103920*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103920*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f333333; valaddr_reg:x3; val_offset:103923*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103923*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:103926*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103926*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:103929*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103929*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f444444; valaddr_reg:x3; val_offset:103932*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103932*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:103935*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103935*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:103938*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103938*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f666666; valaddr_reg:x3; val_offset:103941*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103941*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:103944*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103944*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:103947*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103947*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:103950*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103950*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2cf93a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3d7079 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2cf93a; op2val:0x3fbd7079; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:103953*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103953*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:103956*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103956*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:103959*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103959*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:103962*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103962*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:103965*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103965*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:103968*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103968*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:103971*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103971*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:103974*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103974*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:103977*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103977*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:103980*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103980*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:103983*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103983*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:103986*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103986*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:103989*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103989*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:103992*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103992*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:103995*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103995*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:103998*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 103998*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:104001*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104001*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87000000; valaddr_reg:x3; val_offset:104004*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104004*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87000001; valaddr_reg:x3; val_offset:104007*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104007*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87000003; valaddr_reg:x3; val_offset:104010*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104010*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87000007; valaddr_reg:x3; val_offset:104013*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104013*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x8700000f; valaddr_reg:x3; val_offset:104016*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104016*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x8700001f; valaddr_reg:x3; val_offset:104019*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104019*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x8700003f; valaddr_reg:x3; val_offset:104022*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104022*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x8700007f; valaddr_reg:x3; val_offset:104025*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104025*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x870000ff; valaddr_reg:x3; val_offset:104028*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104028*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x870001ff; valaddr_reg:x3; val_offset:104031*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104031*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x870003ff; valaddr_reg:x3; val_offset:104034*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104034*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x870007ff; valaddr_reg:x3; val_offset:104037*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104037*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87000fff; valaddr_reg:x3; val_offset:104040*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104040*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87001fff; valaddr_reg:x3; val_offset:104043*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104043*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87003fff; valaddr_reg:x3; val_offset:104046*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104046*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87007fff; valaddr_reg:x3; val_offset:104049*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104049*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x8700ffff; valaddr_reg:x3; val_offset:104052*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104052*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x8701ffff; valaddr_reg:x3; val_offset:104055*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104055*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x8703ffff; valaddr_reg:x3; val_offset:104058*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104058*0 + 3*270*FLEN/8, x4, x1, x2) + +inst_34687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x8707ffff; valaddr_reg:x3; val_offset:104061*0 + 3*270*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104061*0 + 3*270*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1249968127,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1250033663,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1250164735,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1250426879,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1250951167,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1251999743,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1254096895,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1254096896,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1256194048,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1257242624,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1257766912,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258029056,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258160128,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258225664,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258258432,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258274816,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258283008,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258287104,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258289152,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258290176,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258290688,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258290944,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258291072,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258291136,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258291168,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258291184,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258291192,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258291196,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258291198,32,FLEN) +NAN_BOXED(2133643678,32,FLEN) +NAN_BOXED(3106553,32,FLEN) +NAN_BOXED(1258291199,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830464,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830465,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830467,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830471,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830479,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830495,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830527,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830591,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830719,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744830975,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744831487,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744832511,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744834559,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744838655,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744846847,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744863231,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744895999,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1744961535,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1745092607,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1745354751,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1745879039,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1746927615,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1749024767,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1749024768,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1751121920,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1752170496,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1752694784,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1752956928,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753088000,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753153536,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753186304,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753202688,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753210880,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753214976,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753217024,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753218048,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753218560,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753218816,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753218944,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753219008,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753219040,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753219056,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753219064,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753219068,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753219070,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(1753219071,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2133653818,32,FLEN) +NAN_BOXED(1069379705,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924160,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924161,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924163,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924167,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924175,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924191,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924223,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924287,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924415,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924671,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264925183,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264926207,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264928255,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264932351,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264940543,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264956927,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264989695,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265055231,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265186303,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265448447,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-272.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-272.S new file mode 100644 index 000000000..fc6bc0a51 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-272.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_34688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x870fffff; valaddr_reg:x3; val_offset:104064*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104064*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x871fffff; valaddr_reg:x3; val_offset:104067*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104067*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x873fffff; valaddr_reg:x3; val_offset:104070*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104070*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87400000; valaddr_reg:x3; val_offset:104073*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104073*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87600000; valaddr_reg:x3; val_offset:104076*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104076*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87700000; valaddr_reg:x3; val_offset:104079*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104079*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x87780000; valaddr_reg:x3; val_offset:104082*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104082*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877c0000; valaddr_reg:x3; val_offset:104085*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104085*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877e0000; valaddr_reg:x3; val_offset:104088*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104088*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877f0000; valaddr_reg:x3; val_offset:104091*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104091*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877f8000; valaddr_reg:x3; val_offset:104094*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104094*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877fc000; valaddr_reg:x3; val_offset:104097*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104097*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877fe000; valaddr_reg:x3; val_offset:104100*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104100*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877ff000; valaddr_reg:x3; val_offset:104103*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104103*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877ff800; valaddr_reg:x3; val_offset:104106*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104106*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877ffc00; valaddr_reg:x3; val_offset:104109*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104109*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877ffe00; valaddr_reg:x3; val_offset:104112*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104112*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877fff00; valaddr_reg:x3; val_offset:104115*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104115*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877fff80; valaddr_reg:x3; val_offset:104118*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104118*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877fffc0; valaddr_reg:x3; val_offset:104121*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104121*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877fffe0; valaddr_reg:x3; val_offset:104124*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104124*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877ffff0; valaddr_reg:x3; val_offset:104127*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104127*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877ffff8; valaddr_reg:x3; val_offset:104130*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104130*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877ffffc; valaddr_reg:x3; val_offset:104133*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104133*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877ffffe; valaddr_reg:x3; val_offset:104136*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104136*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d0175 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d0175; op2val:0x80000000; +op3val:0x877fffff; valaddr_reg:x3; val_offset:104139*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104139*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:104142*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104142*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:104145*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104145*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:104148*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104148*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:104151*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104151*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:104154*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104154*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:104157*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104157*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:104160*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104160*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:104163*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104163*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:104166*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104166*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:104169*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104169*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:104172*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104172*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:104175*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104175*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:104178*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104178*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:104181*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104181*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:104184*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104184*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:104187*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104187*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85000000; valaddr_reg:x3; val_offset:104190*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104190*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85000001; valaddr_reg:x3; val_offset:104193*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104193*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85000003; valaddr_reg:x3; val_offset:104196*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104196*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85000007; valaddr_reg:x3; val_offset:104199*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104199*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8500000f; valaddr_reg:x3; val_offset:104202*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104202*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8500001f; valaddr_reg:x3; val_offset:104205*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104205*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8500003f; valaddr_reg:x3; val_offset:104208*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104208*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8500007f; valaddr_reg:x3; val_offset:104211*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104211*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x850000ff; valaddr_reg:x3; val_offset:104214*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104214*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x850001ff; valaddr_reg:x3; val_offset:104217*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104217*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x850003ff; valaddr_reg:x3; val_offset:104220*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104220*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x850007ff; valaddr_reg:x3; val_offset:104223*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104223*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85000fff; valaddr_reg:x3; val_offset:104226*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104226*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85001fff; valaddr_reg:x3; val_offset:104229*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104229*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85003fff; valaddr_reg:x3; val_offset:104232*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104232*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85007fff; valaddr_reg:x3; val_offset:104235*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104235*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8500ffff; valaddr_reg:x3; val_offset:104238*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104238*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8501ffff; valaddr_reg:x3; val_offset:104241*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104241*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8503ffff; valaddr_reg:x3; val_offset:104244*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104244*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x8507ffff; valaddr_reg:x3; val_offset:104247*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104247*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x850fffff; valaddr_reg:x3; val_offset:104250*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104250*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x851fffff; valaddr_reg:x3; val_offset:104253*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104253*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x853fffff; valaddr_reg:x3; val_offset:104256*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104256*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85400000; valaddr_reg:x3; val_offset:104259*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104259*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85600000; valaddr_reg:x3; val_offset:104262*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104262*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85700000; valaddr_reg:x3; val_offset:104265*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104265*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x85780000; valaddr_reg:x3; val_offset:104268*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104268*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857c0000; valaddr_reg:x3; val_offset:104271*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104271*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857e0000; valaddr_reg:x3; val_offset:104274*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104274*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857f0000; valaddr_reg:x3; val_offset:104277*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104277*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857f8000; valaddr_reg:x3; val_offset:104280*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104280*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857fc000; valaddr_reg:x3; val_offset:104283*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104283*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857fe000; valaddr_reg:x3; val_offset:104286*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104286*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857ff000; valaddr_reg:x3; val_offset:104289*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104289*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857ff800; valaddr_reg:x3; val_offset:104292*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104292*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857ffc00; valaddr_reg:x3; val_offset:104295*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104295*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857ffe00; valaddr_reg:x3; val_offset:104298*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104298*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857fff00; valaddr_reg:x3; val_offset:104301*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104301*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857fff80; valaddr_reg:x3; val_offset:104304*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104304*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857fffc0; valaddr_reg:x3; val_offset:104307*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104307*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857fffe0; valaddr_reg:x3; val_offset:104310*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104310*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857ffff0; valaddr_reg:x3; val_offset:104313*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104313*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857ffff8; valaddr_reg:x3; val_offset:104316*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104316*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857ffffc; valaddr_reg:x3; val_offset:104319*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104319*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857ffffe; valaddr_reg:x3; val_offset:104322*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104322*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d04c4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d04c4; op2val:0x80000000; +op3val:0x857fffff; valaddr_reg:x3; val_offset:104325*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104325*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:104328*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104328*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:104331*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104331*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:104334*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104334*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:104337*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104337*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:104340*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104340*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:104343*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104343*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:104346*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104346*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:104349*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104349*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:104352*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104352*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:104355*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104355*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:104358*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104358*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:104361*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104361*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:104364*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104364*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:104367*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104367*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:104370*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104370*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:104373*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104373*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43800000; valaddr_reg:x3; val_offset:104376*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104376*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43800001; valaddr_reg:x3; val_offset:104379*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104379*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43800003; valaddr_reg:x3; val_offset:104382*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104382*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43800007; valaddr_reg:x3; val_offset:104385*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104385*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x4380000f; valaddr_reg:x3; val_offset:104388*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104388*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x4380001f; valaddr_reg:x3; val_offset:104391*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104391*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x4380003f; valaddr_reg:x3; val_offset:104394*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104394*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x4380007f; valaddr_reg:x3; val_offset:104397*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104397*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x438000ff; valaddr_reg:x3; val_offset:104400*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104400*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x438001ff; valaddr_reg:x3; val_offset:104403*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104403*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x438003ff; valaddr_reg:x3; val_offset:104406*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104406*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x438007ff; valaddr_reg:x3; val_offset:104409*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104409*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43800fff; valaddr_reg:x3; val_offset:104412*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104412*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43801fff; valaddr_reg:x3; val_offset:104415*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104415*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43803fff; valaddr_reg:x3; val_offset:104418*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104418*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43807fff; valaddr_reg:x3; val_offset:104421*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104421*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x4380ffff; valaddr_reg:x3; val_offset:104424*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104424*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x4381ffff; valaddr_reg:x3; val_offset:104427*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104427*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x4383ffff; valaddr_reg:x3; val_offset:104430*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104430*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x4387ffff; valaddr_reg:x3; val_offset:104433*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104433*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x438fffff; valaddr_reg:x3; val_offset:104436*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104436*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x439fffff; valaddr_reg:x3; val_offset:104439*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104439*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43bfffff; valaddr_reg:x3; val_offset:104442*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104442*0 + 3*271*FLEN/8, x4, x1, x2) + +inst_34815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43c00000; valaddr_reg:x3; val_offset:104445*0 + 3*271*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104445*0 + 3*271*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265972735,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2267021311,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2269118463,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2269118464,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2271215616,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2272264192,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2272788480,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273050624,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273181696,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273247232,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273280000,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273296384,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273304576,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273308672,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273310720,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273311744,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312256,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312512,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312640,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312704,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312736,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312752,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312760,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312764,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312766,32,FLEN) +NAN_BOXED(2133655925,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312767,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369728,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369729,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369731,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369735,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369743,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369759,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369791,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369855,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369983,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231370239,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231370751,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231371775,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231373823,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231377919,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231386111,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231402495,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231435263,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231500799,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231631871,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231894015,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2232418303,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2233466879,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2235564031,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2235564032,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2237661184,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2238709760,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239234048,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239496192,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239627264,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239692800,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239725568,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239741952,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239750144,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239754240,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239756288,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239757312,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239757824,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758080,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758208,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758272,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758304,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758320,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758328,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758332,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758334,32,FLEN) +NAN_BOXED(2133656772,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758335,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462080,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462081,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462083,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462087,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462095,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462111,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462143,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462207,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462335,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132462591,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132463103,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132464127,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132466175,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132470271,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132478463,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132494847,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132527615,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132593151,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132724223,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1132986367,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1133510655,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1134559231,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1136656383,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1136656384,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-273.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-273.S new file mode 100644 index 000000000..3e348dfd5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-273.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_34816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43e00000; valaddr_reg:x3; val_offset:104448*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104448*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43f00000; valaddr_reg:x3; val_offset:104451*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104451*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43f80000; valaddr_reg:x3; val_offset:104454*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104454*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fc0000; valaddr_reg:x3; val_offset:104457*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104457*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fe0000; valaddr_reg:x3; val_offset:104460*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104460*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ff0000; valaddr_reg:x3; val_offset:104463*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104463*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ff8000; valaddr_reg:x3; val_offset:104466*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104466*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ffc000; valaddr_reg:x3; val_offset:104469*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104469*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ffe000; valaddr_reg:x3; val_offset:104472*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104472*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fff000; valaddr_reg:x3; val_offset:104475*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104475*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fff800; valaddr_reg:x3; val_offset:104478*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104478*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fffc00; valaddr_reg:x3; val_offset:104481*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104481*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fffe00; valaddr_reg:x3; val_offset:104484*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104484*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ffff00; valaddr_reg:x3; val_offset:104487*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104487*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ffff80; valaddr_reg:x3; val_offset:104490*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104490*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ffffc0; valaddr_reg:x3; val_offset:104493*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104493*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ffffe0; valaddr_reg:x3; val_offset:104496*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104496*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fffff0; valaddr_reg:x3; val_offset:104499*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104499*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fffff8; valaddr_reg:x3; val_offset:104502*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104502*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fffffc; valaddr_reg:x3; val_offset:104505*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104505*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43fffffe; valaddr_reg:x3; val_offset:104508*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104508*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2d3e0e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f494d and fs3 == 0 and fe3 == 0x87 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2d3e0e; op2val:0x2f494d; +op3val:0x43ffffff; valaddr_reg:x3; val_offset:104511*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104511*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3f800001; valaddr_reg:x3; val_offset:104514*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104514*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3f800003; valaddr_reg:x3; val_offset:104517*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104517*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3f800007; valaddr_reg:x3; val_offset:104520*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104520*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3f999999; valaddr_reg:x3; val_offset:104523*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104523*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:104526*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104526*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:104529*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104529*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:104532*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104532*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:104535*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104535*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:104538*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104538*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:104541*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104541*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:104544*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104544*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:104547*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104547*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:104550*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104550*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:104553*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104553*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:104556*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104556*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:104559*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104559*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42800000; valaddr_reg:x3; val_offset:104562*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104562*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42800001; valaddr_reg:x3; val_offset:104565*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104565*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42800003; valaddr_reg:x3; val_offset:104568*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104568*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42800007; valaddr_reg:x3; val_offset:104571*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104571*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x4280000f; valaddr_reg:x3; val_offset:104574*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104574*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x4280001f; valaddr_reg:x3; val_offset:104577*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104577*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x4280003f; valaddr_reg:x3; val_offset:104580*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104580*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x4280007f; valaddr_reg:x3; val_offset:104583*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104583*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x428000ff; valaddr_reg:x3; val_offset:104586*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104586*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x428001ff; valaddr_reg:x3; val_offset:104589*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104589*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x428003ff; valaddr_reg:x3; val_offset:104592*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104592*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x428007ff; valaddr_reg:x3; val_offset:104595*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104595*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42800fff; valaddr_reg:x3; val_offset:104598*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104598*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42801fff; valaddr_reg:x3; val_offset:104601*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104601*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42803fff; valaddr_reg:x3; val_offset:104604*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104604*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42807fff; valaddr_reg:x3; val_offset:104607*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104607*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x4280ffff; valaddr_reg:x3; val_offset:104610*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104610*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x4281ffff; valaddr_reg:x3; val_offset:104613*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104613*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x4283ffff; valaddr_reg:x3; val_offset:104616*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104616*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x4287ffff; valaddr_reg:x3; val_offset:104619*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104619*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x428fffff; valaddr_reg:x3; val_offset:104622*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104622*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x429fffff; valaddr_reg:x3; val_offset:104625*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104625*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42bfffff; valaddr_reg:x3; val_offset:104628*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104628*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42c00000; valaddr_reg:x3; val_offset:104631*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104631*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42e00000; valaddr_reg:x3; val_offset:104634*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104634*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42f00000; valaddr_reg:x3; val_offset:104637*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104637*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42f80000; valaddr_reg:x3; val_offset:104640*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104640*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fc0000; valaddr_reg:x3; val_offset:104643*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104643*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fe0000; valaddr_reg:x3; val_offset:104646*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104646*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ff0000; valaddr_reg:x3; val_offset:104649*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104649*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ff8000; valaddr_reg:x3; val_offset:104652*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104652*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ffc000; valaddr_reg:x3; val_offset:104655*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104655*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ffe000; valaddr_reg:x3; val_offset:104658*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104658*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fff000; valaddr_reg:x3; val_offset:104661*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104661*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fff800; valaddr_reg:x3; val_offset:104664*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104664*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fffc00; valaddr_reg:x3; val_offset:104667*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104667*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fffe00; valaddr_reg:x3; val_offset:104670*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104670*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ffff00; valaddr_reg:x3; val_offset:104673*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104673*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ffff80; valaddr_reg:x3; val_offset:104676*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104676*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ffffc0; valaddr_reg:x3; val_offset:104679*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104679*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ffffe0; valaddr_reg:x3; val_offset:104682*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104682*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fffff0; valaddr_reg:x3; val_offset:104685*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104685*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fffff8; valaddr_reg:x3; val_offset:104688*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104688*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fffffc; valaddr_reg:x3; val_offset:104691*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104691*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42fffffe; valaddr_reg:x3; val_offset:104694*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104694*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2da4ff and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2f2d45 and fs3 == 0 and fe3 == 0x85 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2da4ff; op2val:0x2f2d45; +op3val:0x42ffffff; valaddr_reg:x3; val_offset:104697*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104697*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad800000; valaddr_reg:x3; val_offset:104700*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104700*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad800001; valaddr_reg:x3; val_offset:104703*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104703*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad800003; valaddr_reg:x3; val_offset:104706*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104706*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad800007; valaddr_reg:x3; val_offset:104709*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104709*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad80000f; valaddr_reg:x3; val_offset:104712*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104712*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad80001f; valaddr_reg:x3; val_offset:104715*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104715*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad80003f; valaddr_reg:x3; val_offset:104718*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104718*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad80007f; valaddr_reg:x3; val_offset:104721*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104721*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad8000ff; valaddr_reg:x3; val_offset:104724*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104724*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad8001ff; valaddr_reg:x3; val_offset:104727*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104727*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad8003ff; valaddr_reg:x3; val_offset:104730*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104730*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad8007ff; valaddr_reg:x3; val_offset:104733*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104733*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad800fff; valaddr_reg:x3; val_offset:104736*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104736*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad801fff; valaddr_reg:x3; val_offset:104739*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104739*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad803fff; valaddr_reg:x3; val_offset:104742*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104742*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad807fff; valaddr_reg:x3; val_offset:104745*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104745*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad80ffff; valaddr_reg:x3; val_offset:104748*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104748*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad81ffff; valaddr_reg:x3; val_offset:104751*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104751*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad83ffff; valaddr_reg:x3; val_offset:104754*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104754*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad87ffff; valaddr_reg:x3; val_offset:104757*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104757*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad8fffff; valaddr_reg:x3; val_offset:104760*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104760*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xad9fffff; valaddr_reg:x3; val_offset:104763*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104763*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadbfffff; valaddr_reg:x3; val_offset:104766*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104766*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadc00000; valaddr_reg:x3; val_offset:104769*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104769*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xade00000; valaddr_reg:x3; val_offset:104772*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104772*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadf00000; valaddr_reg:x3; val_offset:104775*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104775*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadf80000; valaddr_reg:x3; val_offset:104778*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104778*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfc0000; valaddr_reg:x3; val_offset:104781*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104781*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfe0000; valaddr_reg:x3; val_offset:104784*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104784*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadff0000; valaddr_reg:x3; val_offset:104787*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104787*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadff8000; valaddr_reg:x3; val_offset:104790*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104790*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadffc000; valaddr_reg:x3; val_offset:104793*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104793*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadffe000; valaddr_reg:x3; val_offset:104796*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104796*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfff000; valaddr_reg:x3; val_offset:104799*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104799*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfff800; valaddr_reg:x3; val_offset:104802*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104802*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfffc00; valaddr_reg:x3; val_offset:104805*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104805*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfffe00; valaddr_reg:x3; val_offset:104808*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104808*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadffff00; valaddr_reg:x3; val_offset:104811*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104811*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadffff80; valaddr_reg:x3; val_offset:104814*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104814*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadffffc0; valaddr_reg:x3; val_offset:104817*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104817*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadffffe0; valaddr_reg:x3; val_offset:104820*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104820*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfffff0; valaddr_reg:x3; val_offset:104823*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104823*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfffff8; valaddr_reg:x3; val_offset:104826*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104826*0 + 3*272*FLEN/8, x4, x1, x2) + +inst_34943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfffffc; valaddr_reg:x3; val_offset:104829*0 + 3*272*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104829*0 + 3*272*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1138753536,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1139802112,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140326400,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140588544,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140719616,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140785152,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140817920,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140834304,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140842496,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140846592,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140848640,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140849664,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850176,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850432,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850560,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850624,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850656,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850672,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850680,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850684,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850686,32,FLEN) +NAN_BOXED(2133671438,32,FLEN) +NAN_BOXED(3098957,32,FLEN) +NAN_BOXED(1140850687,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115684864,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115684865,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115684867,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115684871,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115684879,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115684895,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115684927,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115684991,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115685119,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115685375,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115685887,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115686911,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115688959,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115693055,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115701247,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115717631,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115750399,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115815935,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1115947007,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1116209151,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1116733439,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1117782015,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1119879167,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1119879168,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1121976320,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1123024896,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1123549184,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1123811328,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1123942400,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124007936,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124040704,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124057088,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124065280,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124069376,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124071424,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124072448,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124072960,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073216,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073344,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073408,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073440,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073456,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073464,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073468,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073470,32,FLEN) +NAN_BOXED(2133697791,32,FLEN) +NAN_BOXED(3091781,32,FLEN) +NAN_BOXED(1124073471,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910846976,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910846977,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910846979,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910846983,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910846991,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910847007,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910847039,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910847103,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910847231,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910847487,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910847999,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910849023,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910851071,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910855167,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910863359,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910879743,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910912511,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2910978047,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2911109119,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2911371263,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2911895551,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2912944127,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2915041279,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2915041280,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2917138432,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2918187008,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2918711296,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2918973440,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919104512,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919170048,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919202816,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919219200,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919227392,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919231488,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919233536,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919234560,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235072,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235328,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235456,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235520,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235552,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235568,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235576,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235580,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-274.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-274.S new file mode 100644 index 000000000..b40c785e2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-274.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_34944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadfffffe; valaddr_reg:x3; val_offset:104832*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104832*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x5b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xadffffff; valaddr_reg:x3; val_offset:104835*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104835*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbf800001; valaddr_reg:x3; val_offset:104838*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104838*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbf800003; valaddr_reg:x3; val_offset:104841*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104841*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbf800007; valaddr_reg:x3; val_offset:104844*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104844*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbf999999; valaddr_reg:x3; val_offset:104847*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104847*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:104850*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104850*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:104853*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104853*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:104856*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104856*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:104859*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104859*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:104862*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104862*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:104865*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104865*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:104868*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104868*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:104871*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104871*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:104874*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104874*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:104877*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104877*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:104880*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104880*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e57f9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2efcd7 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e57f9; op2val:0x802efcd7; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:104883*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104883*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:104886*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104886*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:104889*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104889*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:104892*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104892*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:104895*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104895*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:104898*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104898*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:104901*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104901*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:104904*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104904*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:104907*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104907*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:104910*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104910*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:104913*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104913*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:104916*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104916*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:104919*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104919*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:104922*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104922*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:104925*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104925*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:104928*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104928*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:104931*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104931*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7000000; valaddr_reg:x3; val_offset:104934*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104934*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7000001; valaddr_reg:x3; val_offset:104937*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104937*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7000003; valaddr_reg:x3; val_offset:104940*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104940*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7000007; valaddr_reg:x3; val_offset:104943*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104943*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x700000f; valaddr_reg:x3; val_offset:104946*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104946*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x700001f; valaddr_reg:x3; val_offset:104949*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104949*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x700003f; valaddr_reg:x3; val_offset:104952*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104952*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x700007f; valaddr_reg:x3; val_offset:104955*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104955*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x70000ff; valaddr_reg:x3; val_offset:104958*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104958*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x70001ff; valaddr_reg:x3; val_offset:104961*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104961*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x70003ff; valaddr_reg:x3; val_offset:104964*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104964*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x70007ff; valaddr_reg:x3; val_offset:104967*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104967*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7000fff; valaddr_reg:x3; val_offset:104970*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104970*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7001fff; valaddr_reg:x3; val_offset:104973*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104973*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7003fff; valaddr_reg:x3; val_offset:104976*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104976*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7007fff; valaddr_reg:x3; val_offset:104979*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104979*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x700ffff; valaddr_reg:x3; val_offset:104982*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104982*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x701ffff; valaddr_reg:x3; val_offset:104985*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104985*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x703ffff; valaddr_reg:x3; val_offset:104988*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104988*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x707ffff; valaddr_reg:x3; val_offset:104991*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104991*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x70fffff; valaddr_reg:x3; val_offset:104994*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104994*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_34999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x71fffff; valaddr_reg:x3; val_offset:104997*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 104997*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x73fffff; valaddr_reg:x3; val_offset:105000*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105000*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7400000; valaddr_reg:x3; val_offset:105003*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105003*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7600000; valaddr_reg:x3; val_offset:105006*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105006*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7700000; valaddr_reg:x3; val_offset:105009*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105009*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x7780000; valaddr_reg:x3; val_offset:105012*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105012*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77c0000; valaddr_reg:x3; val_offset:105015*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105015*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77e0000; valaddr_reg:x3; val_offset:105018*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105018*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77f0000; valaddr_reg:x3; val_offset:105021*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105021*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77f8000; valaddr_reg:x3; val_offset:105024*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105024*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77fc000; valaddr_reg:x3; val_offset:105027*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105027*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77fe000; valaddr_reg:x3; val_offset:105030*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105030*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77ff000; valaddr_reg:x3; val_offset:105033*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105033*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77ff800; valaddr_reg:x3; val_offset:105036*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105036*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77ffc00; valaddr_reg:x3; val_offset:105039*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105039*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77ffe00; valaddr_reg:x3; val_offset:105042*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105042*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77fff00; valaddr_reg:x3; val_offset:105045*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105045*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77fff80; valaddr_reg:x3; val_offset:105048*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105048*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77fffc0; valaddr_reg:x3; val_offset:105051*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105051*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77fffe0; valaddr_reg:x3; val_offset:105054*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105054*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77ffff0; valaddr_reg:x3; val_offset:105057*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105057*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77ffff8; valaddr_reg:x3; val_offset:105060*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105060*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77ffffc; valaddr_reg:x3; val_offset:105063*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105063*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77ffffe; valaddr_reg:x3; val_offset:105066*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105066*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7655 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7655; op2val:0x0; +op3val:0x77fffff; valaddr_reg:x3; val_offset:105069*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105069*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8000000; valaddr_reg:x3; val_offset:105072*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105072*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8000001; valaddr_reg:x3; val_offset:105075*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105075*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8000003; valaddr_reg:x3; val_offset:105078*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105078*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8000007; valaddr_reg:x3; val_offset:105081*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105081*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf800000f; valaddr_reg:x3; val_offset:105084*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105084*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf800001f; valaddr_reg:x3; val_offset:105087*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105087*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf800003f; valaddr_reg:x3; val_offset:105090*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105090*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf800007f; valaddr_reg:x3; val_offset:105093*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105093*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf80000ff; valaddr_reg:x3; val_offset:105096*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105096*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf80001ff; valaddr_reg:x3; val_offset:105099*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105099*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf80003ff; valaddr_reg:x3; val_offset:105102*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105102*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf80007ff; valaddr_reg:x3; val_offset:105105*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105105*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8000fff; valaddr_reg:x3; val_offset:105108*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105108*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8001fff; valaddr_reg:x3; val_offset:105111*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105111*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8003fff; valaddr_reg:x3; val_offset:105114*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105114*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8007fff; valaddr_reg:x3; val_offset:105117*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105117*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf800ffff; valaddr_reg:x3; val_offset:105120*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105120*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf801ffff; valaddr_reg:x3; val_offset:105123*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105123*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf803ffff; valaddr_reg:x3; val_offset:105126*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105126*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf807ffff; valaddr_reg:x3; val_offset:105129*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105129*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf80fffff; valaddr_reg:x3; val_offset:105132*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105132*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf81fffff; valaddr_reg:x3; val_offset:105135*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105135*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf83fffff; valaddr_reg:x3; val_offset:105138*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105138*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8400000; valaddr_reg:x3; val_offset:105141*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105141*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8600000; valaddr_reg:x3; val_offset:105144*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105144*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8700000; valaddr_reg:x3; val_offset:105147*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105147*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf8780000; valaddr_reg:x3; val_offset:105150*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105150*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87c0000; valaddr_reg:x3; val_offset:105153*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105153*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87e0000; valaddr_reg:x3; val_offset:105156*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105156*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87f0000; valaddr_reg:x3; val_offset:105159*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105159*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87f8000; valaddr_reg:x3; val_offset:105162*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105162*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87fc000; valaddr_reg:x3; val_offset:105165*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105165*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87fe000; valaddr_reg:x3; val_offset:105168*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105168*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87ff000; valaddr_reg:x3; val_offset:105171*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105171*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87ff800; valaddr_reg:x3; val_offset:105174*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105174*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87ffc00; valaddr_reg:x3; val_offset:105177*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105177*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87ffe00; valaddr_reg:x3; val_offset:105180*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105180*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87fff00; valaddr_reg:x3; val_offset:105183*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105183*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87fff80; valaddr_reg:x3; val_offset:105186*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105186*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87fffc0; valaddr_reg:x3; val_offset:105189*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105189*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87fffe0; valaddr_reg:x3; val_offset:105192*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105192*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87ffff0; valaddr_reg:x3; val_offset:105195*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105195*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87ffff8; valaddr_reg:x3; val_offset:105198*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105198*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87ffffc; valaddr_reg:x3; val_offset:105201*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105201*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87ffffe; valaddr_reg:x3; val_offset:105204*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105204*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xf0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xf87fffff; valaddr_reg:x3; val_offset:105207*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105207*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff000001; valaddr_reg:x3; val_offset:105210*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105210*0 + 3*273*FLEN/8, x4, x1, x2) + +inst_35071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff000003; valaddr_reg:x3; val_offset:105213*0 + 3*273*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105213*0 + 3*273*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235582,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(2919235583,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133743609,32,FLEN) +NAN_BOXED(2150563031,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440512,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440513,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440515,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440519,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440527,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440543,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440575,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440639,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440767,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117441023,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117441535,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117442559,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117444607,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117448703,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117456895,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117473279,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117506047,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117571583,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117702655,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117964799,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(118489087,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(119537663,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(121634815,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(121634816,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(123731968,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(124780544,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125304832,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125566976,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125698048,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125763584,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125796352,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125812736,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125820928,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125825024,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125827072,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828096,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828608,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828864,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828992,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829056,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829088,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829104,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829112,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829116,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829118,32,FLEN) +NAN_BOXED(2133751381,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829119,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749568,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749569,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749571,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749575,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749583,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749599,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749631,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749695,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160749823,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160750079,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160750591,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160751615,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160753663,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160757759,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160765951,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160782335,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160815103,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4160880639,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4161011711,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4161273855,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4161798143,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4162846719,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4164943871,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4164943872,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4167041024,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4168089600,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4168613888,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4168876032,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169007104,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169072640,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169105408,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169121792,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169129984,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169134080,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169136128,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169137152,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169137664,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169137920,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169138048,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169138112,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169138144,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169138160,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169138168,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169138172,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169138174,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4169138175,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-275.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-275.S new file mode 100644 index 000000000..680471c27 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-275.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_35072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff000007; valaddr_reg:x3; val_offset:105216*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105216*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff199999; valaddr_reg:x3; val_offset:105219*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105219*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff249249; valaddr_reg:x3; val_offset:105222*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105222*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff333333; valaddr_reg:x3; val_offset:105225*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105225*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:105228*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105228*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:105231*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105231*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff444444; valaddr_reg:x3; val_offset:105234*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105234*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:105237*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105237*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:105240*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105240*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff666666; valaddr_reg:x3; val_offset:105243*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105243*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:105246*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105246*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:105249*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105249*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:105252*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105252*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2e7c12 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3bcc79 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2e7c12; op2val:0xbfbbcc79; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:105255*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105255*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:105258*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105258*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:105261*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105261*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:105264*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105264*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:105267*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105267*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:105270*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105270*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:105273*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105273*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:105276*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105276*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:105279*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105279*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:105282*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105282*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:105285*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105285*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:105288*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105288*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:105291*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105291*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:105294*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105294*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:105297*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105297*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:105300*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105300*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:105303*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105303*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10800000; valaddr_reg:x3; val_offset:105306*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105306*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10800001; valaddr_reg:x3; val_offset:105309*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105309*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10800003; valaddr_reg:x3; val_offset:105312*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105312*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10800007; valaddr_reg:x3; val_offset:105315*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105315*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x1080000f; valaddr_reg:x3; val_offset:105318*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105318*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x1080001f; valaddr_reg:x3; val_offset:105321*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105321*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x1080003f; valaddr_reg:x3; val_offset:105324*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105324*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x1080007f; valaddr_reg:x3; val_offset:105327*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105327*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x108000ff; valaddr_reg:x3; val_offset:105330*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105330*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x108001ff; valaddr_reg:x3; val_offset:105333*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105333*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x108003ff; valaddr_reg:x3; val_offset:105336*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105336*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x108007ff; valaddr_reg:x3; val_offset:105339*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105339*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10800fff; valaddr_reg:x3; val_offset:105342*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105342*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10801fff; valaddr_reg:x3; val_offset:105345*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105345*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10803fff; valaddr_reg:x3; val_offset:105348*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105348*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10807fff; valaddr_reg:x3; val_offset:105351*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105351*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x1080ffff; valaddr_reg:x3; val_offset:105354*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105354*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x1081ffff; valaddr_reg:x3; val_offset:105357*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105357*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x1083ffff; valaddr_reg:x3; val_offset:105360*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105360*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x1087ffff; valaddr_reg:x3; val_offset:105363*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105363*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x108fffff; valaddr_reg:x3; val_offset:105366*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105366*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x109fffff; valaddr_reg:x3; val_offset:105369*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105369*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10bfffff; valaddr_reg:x3; val_offset:105372*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105372*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10c00000; valaddr_reg:x3; val_offset:105375*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105375*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10e00000; valaddr_reg:x3; val_offset:105378*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105378*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10f00000; valaddr_reg:x3; val_offset:105381*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105381*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10f80000; valaddr_reg:x3; val_offset:105384*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105384*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fc0000; valaddr_reg:x3; val_offset:105387*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105387*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fe0000; valaddr_reg:x3; val_offset:105390*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105390*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ff0000; valaddr_reg:x3; val_offset:105393*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105393*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ff8000; valaddr_reg:x3; val_offset:105396*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105396*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ffc000; valaddr_reg:x3; val_offset:105399*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105399*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ffe000; valaddr_reg:x3; val_offset:105402*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105402*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fff000; valaddr_reg:x3; val_offset:105405*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105405*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fff800; valaddr_reg:x3; val_offset:105408*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105408*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fffc00; valaddr_reg:x3; val_offset:105411*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105411*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fffe00; valaddr_reg:x3; val_offset:105414*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105414*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ffff00; valaddr_reg:x3; val_offset:105417*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105417*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ffff80; valaddr_reg:x3; val_offset:105420*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105420*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ffffc0; valaddr_reg:x3; val_offset:105423*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105423*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ffffe0; valaddr_reg:x3; val_offset:105426*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105426*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fffff0; valaddr_reg:x3; val_offset:105429*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105429*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fffff8; valaddr_reg:x3; val_offset:105432*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105432*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fffffc; valaddr_reg:x3; val_offset:105435*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105435*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10fffffe; valaddr_reg:x3; val_offset:105438*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105438*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f0ff8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x21 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f0ff8; op2val:0x0; +op3val:0x10ffffff; valaddr_reg:x3; val_offset:105441*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105441*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe800000; valaddr_reg:x3; val_offset:105444*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105444*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe800001; valaddr_reg:x3; val_offset:105447*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105447*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe800003; valaddr_reg:x3; val_offset:105450*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105450*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe800007; valaddr_reg:x3; val_offset:105453*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105453*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe80000f; valaddr_reg:x3; val_offset:105456*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105456*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe80001f; valaddr_reg:x3; val_offset:105459*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105459*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe80003f; valaddr_reg:x3; val_offset:105462*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105462*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe80007f; valaddr_reg:x3; val_offset:105465*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105465*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe8000ff; valaddr_reg:x3; val_offset:105468*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105468*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe8001ff; valaddr_reg:x3; val_offset:105471*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105471*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe8003ff; valaddr_reg:x3; val_offset:105474*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105474*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe8007ff; valaddr_reg:x3; val_offset:105477*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105477*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe800fff; valaddr_reg:x3; val_offset:105480*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105480*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe801fff; valaddr_reg:x3; val_offset:105483*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105483*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe803fff; valaddr_reg:x3; val_offset:105486*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105486*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe807fff; valaddr_reg:x3; val_offset:105489*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105489*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe80ffff; valaddr_reg:x3; val_offset:105492*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105492*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe81ffff; valaddr_reg:x3; val_offset:105495*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105495*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe83ffff; valaddr_reg:x3; val_offset:105498*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105498*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe87ffff; valaddr_reg:x3; val_offset:105501*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105501*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe8fffff; valaddr_reg:x3; val_offset:105504*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105504*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbe9fffff; valaddr_reg:x3; val_offset:105507*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105507*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbebfffff; valaddr_reg:x3; val_offset:105510*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105510*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbec00000; valaddr_reg:x3; val_offset:105513*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105513*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbee00000; valaddr_reg:x3; val_offset:105516*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105516*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbef00000; valaddr_reg:x3; val_offset:105519*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105519*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbef80000; valaddr_reg:x3; val_offset:105522*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105522*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefc0000; valaddr_reg:x3; val_offset:105525*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105525*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefe0000; valaddr_reg:x3; val_offset:105528*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105528*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeff0000; valaddr_reg:x3; val_offset:105531*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105531*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeff8000; valaddr_reg:x3; val_offset:105534*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105534*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeffc000; valaddr_reg:x3; val_offset:105537*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105537*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeffe000; valaddr_reg:x3; val_offset:105540*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105540*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefff000; valaddr_reg:x3; val_offset:105543*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105543*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefff800; valaddr_reg:x3; val_offset:105546*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105546*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefffc00; valaddr_reg:x3; val_offset:105549*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105549*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefffe00; valaddr_reg:x3; val_offset:105552*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105552*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeffff00; valaddr_reg:x3; val_offset:105555*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105555*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeffff80; valaddr_reg:x3; val_offset:105558*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105558*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeffffc0; valaddr_reg:x3; val_offset:105561*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105561*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeffffe0; valaddr_reg:x3; val_offset:105564*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105564*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefffff0; valaddr_reg:x3; val_offset:105567*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105567*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefffff8; valaddr_reg:x3; val_offset:105570*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105570*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefffffc; valaddr_reg:x3; val_offset:105573*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105573*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbefffffe; valaddr_reg:x3; val_offset:105576*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105576*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbeffffff; valaddr_reg:x3; val_offset:105579*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105579*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbf800001; valaddr_reg:x3; val_offset:105582*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105582*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbf800003; valaddr_reg:x3; val_offset:105585*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105585*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbf800007; valaddr_reg:x3; val_offset:105588*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105588*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbf999999; valaddr_reg:x3; val_offset:105591*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105591*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:105594*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105594*0 + 3*274*FLEN/8, x4, x1, x2) + +inst_35199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:105597*0 + 3*274*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105597*0 + 3*274*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2133752850,32,FLEN) +NAN_BOXED(3216755833,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824064,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824065,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824067,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824071,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824079,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824095,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824127,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824191,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824319,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824575,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276825087,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276826111,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276828159,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276832255,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276840447,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276856831,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276889599,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276955135,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(277086207,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(277348351,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(277872639,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(278921215,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(281018367,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(281018368,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(283115520,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(284164096,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(284688384,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(284950528,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285081600,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285147136,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285179904,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285196288,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285204480,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285208576,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285210624,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285211648,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212160,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212416,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212544,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212608,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212640,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212656,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212664,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212668,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212670,32,FLEN) +NAN_BOXED(2133790712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(285212671,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059648,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059649,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059651,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059655,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059663,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059679,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059711,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059775,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196059903,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196060159,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196060671,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196061695,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196063743,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196067839,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196076031,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196092415,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196125183,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196190719,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196321791,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3196583935,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3197108223,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3198156799,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3200253951,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3200253952,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3202351104,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3203399680,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3203923968,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204186112,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204317184,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204382720,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204415488,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204431872,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204440064,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204444160,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204446208,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204447232,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204447744,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448000,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448128,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448192,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448224,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448240,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448248,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448252,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448254,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3204448255,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-276.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-276.S new file mode 100644 index 000000000..c166d4f23 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-276.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_35200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:105600*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105600*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:105603*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105603*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:105606*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105606*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:105609*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105609*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:105612*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105612*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:105615*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105615*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:105618*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105618*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:105621*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105621*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:105624*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105624*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2f7715 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2eaff4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2f7715; op2val:0x802eaff4; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:105627*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105627*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:105630*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105630*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:105633*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105633*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:105636*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105636*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:105639*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105639*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:105642*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105642*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:105645*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105645*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:105648*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105648*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:105651*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105651*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:105654*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105654*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:105657*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105657*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:105660*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105660*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:105663*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105663*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:105666*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105666*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:105669*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105669*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:105672*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105672*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:105675*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105675*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10000000; valaddr_reg:x3; val_offset:105678*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105678*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10000001; valaddr_reg:x3; val_offset:105681*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105681*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10000003; valaddr_reg:x3; val_offset:105684*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105684*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10000007; valaddr_reg:x3; val_offset:105687*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105687*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1000000f; valaddr_reg:x3; val_offset:105690*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105690*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1000001f; valaddr_reg:x3; val_offset:105693*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105693*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1000003f; valaddr_reg:x3; val_offset:105696*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105696*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1000007f; valaddr_reg:x3; val_offset:105699*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105699*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x100000ff; valaddr_reg:x3; val_offset:105702*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105702*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x100001ff; valaddr_reg:x3; val_offset:105705*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105705*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x100003ff; valaddr_reg:x3; val_offset:105708*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105708*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x100007ff; valaddr_reg:x3; val_offset:105711*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105711*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10000fff; valaddr_reg:x3; val_offset:105714*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105714*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10001fff; valaddr_reg:x3; val_offset:105717*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105717*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10003fff; valaddr_reg:x3; val_offset:105720*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105720*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10007fff; valaddr_reg:x3; val_offset:105723*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105723*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1000ffff; valaddr_reg:x3; val_offset:105726*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105726*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1001ffff; valaddr_reg:x3; val_offset:105729*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105729*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1003ffff; valaddr_reg:x3; val_offset:105732*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105732*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x1007ffff; valaddr_reg:x3; val_offset:105735*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105735*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x100fffff; valaddr_reg:x3; val_offset:105738*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105738*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x101fffff; valaddr_reg:x3; val_offset:105741*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105741*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x103fffff; valaddr_reg:x3; val_offset:105744*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105744*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10400000; valaddr_reg:x3; val_offset:105747*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105747*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10600000; valaddr_reg:x3; val_offset:105750*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105750*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10700000; valaddr_reg:x3; val_offset:105753*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105753*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x10780000; valaddr_reg:x3; val_offset:105756*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105756*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107c0000; valaddr_reg:x3; val_offset:105759*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105759*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107e0000; valaddr_reg:x3; val_offset:105762*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105762*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107f0000; valaddr_reg:x3; val_offset:105765*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105765*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107f8000; valaddr_reg:x3; val_offset:105768*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105768*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107fc000; valaddr_reg:x3; val_offset:105771*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105771*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107fe000; valaddr_reg:x3; val_offset:105774*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105774*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107ff000; valaddr_reg:x3; val_offset:105777*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105777*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107ff800; valaddr_reg:x3; val_offset:105780*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105780*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107ffc00; valaddr_reg:x3; val_offset:105783*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105783*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107ffe00; valaddr_reg:x3; val_offset:105786*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105786*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107fff00; valaddr_reg:x3; val_offset:105789*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105789*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107fff80; valaddr_reg:x3; val_offset:105792*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105792*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107fffc0; valaddr_reg:x3; val_offset:105795*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105795*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107fffe0; valaddr_reg:x3; val_offset:105798*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105798*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107ffff0; valaddr_reg:x3; val_offset:105801*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105801*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107ffff8; valaddr_reg:x3; val_offset:105804*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105804*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107ffffc; valaddr_reg:x3; val_offset:105807*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105807*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107ffffe; valaddr_reg:x3; val_offset:105810*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105810*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x2fdef5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f2fdef5; op2val:0x0; +op3val:0x107fffff; valaddr_reg:x3; val_offset:105813*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105813*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:105816*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105816*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:105819*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105819*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:105822*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105822*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:105825*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105825*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:105828*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105828*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:105831*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105831*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:105834*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105834*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:105837*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105837*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:105840*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105840*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:105843*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105843*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:105846*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105846*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:105849*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105849*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:105852*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105852*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:105855*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105855*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:105858*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105858*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:105861*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105861*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x800000; valaddr_reg:x3; val_offset:105864*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105864*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:105867*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105867*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:105870*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105870*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:105873*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105873*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x80000f; valaddr_reg:x3; val_offset:105876*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105876*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x80001f; valaddr_reg:x3; val_offset:105879*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105879*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x80003f; valaddr_reg:x3; val_offset:105882*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105882*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x80007f; valaddr_reg:x3; val_offset:105885*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105885*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x8000ff; valaddr_reg:x3; val_offset:105888*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105888*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x8001ff; valaddr_reg:x3; val_offset:105891*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105891*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x8003ff; valaddr_reg:x3; val_offset:105894*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105894*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x8007ff; valaddr_reg:x3; val_offset:105897*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105897*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x800fff; valaddr_reg:x3; val_offset:105900*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105900*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x801fff; valaddr_reg:x3; val_offset:105903*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105903*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x803fff; valaddr_reg:x3; val_offset:105906*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105906*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x807fff; valaddr_reg:x3; val_offset:105909*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105909*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x80ffff; valaddr_reg:x3; val_offset:105912*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105912*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x81ffff; valaddr_reg:x3; val_offset:105915*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105915*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x83ffff; valaddr_reg:x3; val_offset:105918*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105918*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x87ffff; valaddr_reg:x3; val_offset:105921*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105921*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x8fffff; valaddr_reg:x3; val_offset:105924*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105924*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0x9fffff; valaddr_reg:x3; val_offset:105927*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105927*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xbfffff; valaddr_reg:x3; val_offset:105930*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105930*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xc00000; valaddr_reg:x3; val_offset:105933*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105933*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xe00000; valaddr_reg:x3; val_offset:105936*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105936*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xf00000; valaddr_reg:x3; val_offset:105939*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105939*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xf80000; valaddr_reg:x3; val_offset:105942*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105942*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfc0000; valaddr_reg:x3; val_offset:105945*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105945*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfe0000; valaddr_reg:x3; val_offset:105948*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105948*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xff0000; valaddr_reg:x3; val_offset:105951*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105951*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xff8000; valaddr_reg:x3; val_offset:105954*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105954*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xffc000; valaddr_reg:x3; val_offset:105957*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105957*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xffe000; valaddr_reg:x3; val_offset:105960*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105960*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfff000; valaddr_reg:x3; val_offset:105963*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105963*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfff800; valaddr_reg:x3; val_offset:105966*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105966*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfffc00; valaddr_reg:x3; val_offset:105969*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105969*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfffe00; valaddr_reg:x3; val_offset:105972*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105972*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xffff00; valaddr_reg:x3; val_offset:105975*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105975*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xffff80; valaddr_reg:x3; val_offset:105978*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105978*0 + 3*275*FLEN/8, x4, x1, x2) + +inst_35327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xffffc0; valaddr_reg:x3; val_offset:105981*0 + 3*275*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105981*0 + 3*275*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133817109,32,FLEN) +NAN_BOXED(2150543348,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435456,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435457,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435459,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435463,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435471,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435487,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435519,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435583,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435711,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435967,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268436479,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268437503,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268439551,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268443647,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268451839,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268468223,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268500991,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268566527,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268697599,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268959743,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(269484031,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(270532607,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(272629759,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(272629760,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(274726912,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(275775488,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276299776,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276561920,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276692992,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276758528,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276791296,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276807680,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276815872,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276819968,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276822016,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823040,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823552,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823808,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823936,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824000,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824032,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824048,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824056,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824060,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824062,32,FLEN) +NAN_BOXED(2133843701,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824063,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388608,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388623,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388639,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388671,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388735,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388863,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8389119,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8389631,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8390655,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8392703,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8396799,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8404991,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8421375,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8454143,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8519679,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8650751,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8912895,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(9437183,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10485759,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12582911,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12582912,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14680064,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15728640,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16252928,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16515072,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16646144,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16711680,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16744448,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16760832,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16769024,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16773120,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16775168,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776192,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776704,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776960,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777088,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777152,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-277.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-277.S new file mode 100644 index 000000000..eb920057c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-277.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_35328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xffffe0; valaddr_reg:x3; val_offset:105984*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105984*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfffff0; valaddr_reg:x3; val_offset:105987*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105987*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:105990*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105990*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:105993*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105993*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:105996*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105996*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3012ad and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3012ad; op2val:0x0; +op3val:0xffffff; valaddr_reg:x3; val_offset:105999*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 105999*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3f800001; valaddr_reg:x3; val_offset:106002*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106002*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3f800003; valaddr_reg:x3; val_offset:106005*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106005*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3f800007; valaddr_reg:x3; val_offset:106008*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106008*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3f999999; valaddr_reg:x3; val_offset:106011*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106011*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:106014*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106014*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:106017*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106017*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:106020*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106020*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:106023*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106023*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:106026*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106026*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:106029*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106029*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:106032*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106032*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:106035*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106035*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:106038*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106038*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:106041*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106041*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:106044*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106044*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:106047*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106047*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b800000; valaddr_reg:x3; val_offset:106050*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106050*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b800001; valaddr_reg:x3; val_offset:106053*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106053*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b800003; valaddr_reg:x3; val_offset:106056*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106056*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b800007; valaddr_reg:x3; val_offset:106059*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106059*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b80000f; valaddr_reg:x3; val_offset:106062*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106062*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b80001f; valaddr_reg:x3; val_offset:106065*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106065*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b80003f; valaddr_reg:x3; val_offset:106068*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106068*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b80007f; valaddr_reg:x3; val_offset:106071*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106071*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b8000ff; valaddr_reg:x3; val_offset:106074*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106074*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b8001ff; valaddr_reg:x3; val_offset:106077*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106077*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b8003ff; valaddr_reg:x3; val_offset:106080*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106080*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b8007ff; valaddr_reg:x3; val_offset:106083*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106083*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b800fff; valaddr_reg:x3; val_offset:106086*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106086*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b801fff; valaddr_reg:x3; val_offset:106089*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106089*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b803fff; valaddr_reg:x3; val_offset:106092*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106092*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b807fff; valaddr_reg:x3; val_offset:106095*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106095*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b80ffff; valaddr_reg:x3; val_offset:106098*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106098*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b81ffff; valaddr_reg:x3; val_offset:106101*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106101*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b83ffff; valaddr_reg:x3; val_offset:106104*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106104*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b87ffff; valaddr_reg:x3; val_offset:106107*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106107*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b8fffff; valaddr_reg:x3; val_offset:106110*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106110*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4b9fffff; valaddr_reg:x3; val_offset:106113*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106113*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bbfffff; valaddr_reg:x3; val_offset:106116*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106116*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bc00000; valaddr_reg:x3; val_offset:106119*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106119*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4be00000; valaddr_reg:x3; val_offset:106122*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106122*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bf00000; valaddr_reg:x3; val_offset:106125*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106125*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bf80000; valaddr_reg:x3; val_offset:106128*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106128*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfc0000; valaddr_reg:x3; val_offset:106131*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106131*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfe0000; valaddr_reg:x3; val_offset:106134*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106134*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bff0000; valaddr_reg:x3; val_offset:106137*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106137*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bff8000; valaddr_reg:x3; val_offset:106140*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106140*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bffc000; valaddr_reg:x3; val_offset:106143*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106143*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bffe000; valaddr_reg:x3; val_offset:106146*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106146*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfff000; valaddr_reg:x3; val_offset:106149*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106149*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfff800; valaddr_reg:x3; val_offset:106152*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106152*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfffc00; valaddr_reg:x3; val_offset:106155*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106155*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfffe00; valaddr_reg:x3; val_offset:106158*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106158*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bffff00; valaddr_reg:x3; val_offset:106161*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106161*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bffff80; valaddr_reg:x3; val_offset:106164*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106164*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bffffc0; valaddr_reg:x3; val_offset:106167*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106167*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bffffe0; valaddr_reg:x3; val_offset:106170*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106170*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfffff0; valaddr_reg:x3; val_offset:106173*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106173*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfffff8; valaddr_reg:x3; val_offset:106176*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106176*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfffffc; valaddr_reg:x3; val_offset:106179*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106179*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bfffffe; valaddr_reg:x3; val_offset:106182*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106182*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x302981 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e80ab and fs3 == 0 and fe3 == 0x97 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f302981; op2val:0x2e80ab; +op3val:0x4bffffff; valaddr_reg:x3; val_offset:106185*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106185*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:106188*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106188*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:106191*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106191*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:106194*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106194*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:106197*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106197*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:106200*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106200*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:106203*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106203*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:106206*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106206*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:106209*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106209*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:106212*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106212*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:106215*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106215*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:106218*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106218*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:106221*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106221*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:106224*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106224*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:106227*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106227*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:106230*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106230*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:106233*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106233*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1800000; valaddr_reg:x3; val_offset:106236*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106236*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1800001; valaddr_reg:x3; val_offset:106239*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106239*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1800003; valaddr_reg:x3; val_offset:106242*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106242*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1800007; valaddr_reg:x3; val_offset:106245*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106245*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x180000f; valaddr_reg:x3; val_offset:106248*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106248*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x180001f; valaddr_reg:x3; val_offset:106251*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106251*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x180003f; valaddr_reg:x3; val_offset:106254*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106254*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x180007f; valaddr_reg:x3; val_offset:106257*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106257*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x18000ff; valaddr_reg:x3; val_offset:106260*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106260*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x18001ff; valaddr_reg:x3; val_offset:106263*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106263*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x18003ff; valaddr_reg:x3; val_offset:106266*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106266*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x18007ff; valaddr_reg:x3; val_offset:106269*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106269*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1800fff; valaddr_reg:x3; val_offset:106272*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106272*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1801fff; valaddr_reg:x3; val_offset:106275*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106275*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1803fff; valaddr_reg:x3; val_offset:106278*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106278*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1807fff; valaddr_reg:x3; val_offset:106281*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106281*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x180ffff; valaddr_reg:x3; val_offset:106284*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106284*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x181ffff; valaddr_reg:x3; val_offset:106287*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106287*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x183ffff; valaddr_reg:x3; val_offset:106290*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106290*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x187ffff; valaddr_reg:x3; val_offset:106293*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106293*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x18fffff; valaddr_reg:x3; val_offset:106296*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106296*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x19fffff; valaddr_reg:x3; val_offset:106299*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106299*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1bfffff; valaddr_reg:x3; val_offset:106302*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106302*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1c00000; valaddr_reg:x3; val_offset:106305*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106305*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1e00000; valaddr_reg:x3; val_offset:106308*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106308*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1f00000; valaddr_reg:x3; val_offset:106311*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106311*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1f80000; valaddr_reg:x3; val_offset:106314*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106314*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fc0000; valaddr_reg:x3; val_offset:106317*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106317*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fe0000; valaddr_reg:x3; val_offset:106320*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106320*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ff0000; valaddr_reg:x3; val_offset:106323*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106323*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ff8000; valaddr_reg:x3; val_offset:106326*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106326*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ffc000; valaddr_reg:x3; val_offset:106329*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106329*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ffe000; valaddr_reg:x3; val_offset:106332*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106332*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fff000; valaddr_reg:x3; val_offset:106335*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106335*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fff800; valaddr_reg:x3; val_offset:106338*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106338*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fffc00; valaddr_reg:x3; val_offset:106341*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106341*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fffe00; valaddr_reg:x3; val_offset:106344*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106344*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ffff00; valaddr_reg:x3; val_offset:106347*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106347*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ffff80; valaddr_reg:x3; val_offset:106350*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106350*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ffffc0; valaddr_reg:x3; val_offset:106353*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106353*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ffffe0; valaddr_reg:x3; val_offset:106356*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106356*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fffff0; valaddr_reg:x3; val_offset:106359*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106359*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fffff8; valaddr_reg:x3; val_offset:106362*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106362*0 + 3*276*FLEN/8, x4, x1, x2) + +inst_35455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fffffc; valaddr_reg:x3; val_offset:106365*0 + 3*276*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106365*0 + 3*276*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777184,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777200,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2133856941,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777215,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266679808,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266679809,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266679811,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266679815,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266679823,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266679839,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266679871,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266679935,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266680063,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266680319,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266680831,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266681855,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266683903,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266687999,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266696191,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266712575,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266745343,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266810879,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1266941951,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1267204095,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1267728383,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1268776959,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1270874111,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1270874112,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1272971264,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1274019840,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1274544128,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1274806272,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1274937344,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275002880,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275035648,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275052032,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275060224,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275064320,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275066368,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275067392,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275067904,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068160,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068288,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068352,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068384,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068400,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068408,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068412,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068414,32,FLEN) +NAN_BOXED(2133862785,32,FLEN) +NAN_BOXED(3047595,32,FLEN) +NAN_BOXED(1275068415,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165824,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165825,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165827,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165831,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165839,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165855,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165887,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165951,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166079,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166335,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166847,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25167871,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25169919,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25174015,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25182207,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25198591,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25231359,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25296895,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25427967,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25690111,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(26214399,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(27262975,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(29360127,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(29360128,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31457280,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32505856,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33030144,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33292288,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33423360,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33488896,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33521664,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33538048,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33546240,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33550336,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33552384,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33553408,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33553920,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554176,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554304,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554368,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554400,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554416,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554424,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554428,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-278.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-278.S new file mode 100644 index 000000000..e8fbb87cb --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-278.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_35456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1fffffe; valaddr_reg:x3; val_offset:106368*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106368*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x304d0d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f304d0d; op2val:0x0; +op3val:0x1ffffff; valaddr_reg:x3; val_offset:106371*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106371*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:106374*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106374*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:106377*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106377*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:106380*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106380*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:106383*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106383*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:106386*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106386*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:106389*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106389*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:106392*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106392*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:106395*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106395*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:106398*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106398*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:106401*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106401*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:106404*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106404*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:106407*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106407*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:106410*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106410*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:106413*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106413*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:106416*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106416*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:106419*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106419*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf800000; valaddr_reg:x3; val_offset:106422*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106422*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf800001; valaddr_reg:x3; val_offset:106425*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106425*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf800003; valaddr_reg:x3; val_offset:106428*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106428*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf800007; valaddr_reg:x3; val_offset:106431*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106431*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf80000f; valaddr_reg:x3; val_offset:106434*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106434*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf80001f; valaddr_reg:x3; val_offset:106437*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106437*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf80003f; valaddr_reg:x3; val_offset:106440*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106440*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf80007f; valaddr_reg:x3; val_offset:106443*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106443*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf8000ff; valaddr_reg:x3; val_offset:106446*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106446*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf8001ff; valaddr_reg:x3; val_offset:106449*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106449*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf8003ff; valaddr_reg:x3; val_offset:106452*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106452*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf8007ff; valaddr_reg:x3; val_offset:106455*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106455*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf800fff; valaddr_reg:x3; val_offset:106458*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106458*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf801fff; valaddr_reg:x3; val_offset:106461*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106461*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf803fff; valaddr_reg:x3; val_offset:106464*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106464*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf807fff; valaddr_reg:x3; val_offset:106467*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106467*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf80ffff; valaddr_reg:x3; val_offset:106470*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106470*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf81ffff; valaddr_reg:x3; val_offset:106473*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106473*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf83ffff; valaddr_reg:x3; val_offset:106476*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106476*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf87ffff; valaddr_reg:x3; val_offset:106479*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106479*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf8fffff; valaddr_reg:x3; val_offset:106482*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106482*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xf9fffff; valaddr_reg:x3; val_offset:106485*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106485*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfbfffff; valaddr_reg:x3; val_offset:106488*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106488*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfc00000; valaddr_reg:x3; val_offset:106491*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106491*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfe00000; valaddr_reg:x3; val_offset:106494*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106494*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xff00000; valaddr_reg:x3; val_offset:106497*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106497*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xff80000; valaddr_reg:x3; val_offset:106500*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106500*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffc0000; valaddr_reg:x3; val_offset:106503*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106503*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffe0000; valaddr_reg:x3; val_offset:106506*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106506*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfff0000; valaddr_reg:x3; val_offset:106509*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106509*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfff8000; valaddr_reg:x3; val_offset:106512*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106512*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfffc000; valaddr_reg:x3; val_offset:106515*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106515*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfffe000; valaddr_reg:x3; val_offset:106518*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106518*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffff000; valaddr_reg:x3; val_offset:106521*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106521*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffff800; valaddr_reg:x3; val_offset:106524*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106524*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffffc00; valaddr_reg:x3; val_offset:106527*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106527*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffffe00; valaddr_reg:x3; val_offset:106530*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106530*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfffff00; valaddr_reg:x3; val_offset:106533*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106533*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfffff80; valaddr_reg:x3; val_offset:106536*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106536*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfffffc0; valaddr_reg:x3; val_offset:106539*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106539*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfffffe0; valaddr_reg:x3; val_offset:106542*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106542*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffffff0; valaddr_reg:x3; val_offset:106545*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106545*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffffff8; valaddr_reg:x3; val_offset:106548*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106548*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffffffc; valaddr_reg:x3; val_offset:106551*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106551*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xffffffe; valaddr_reg:x3; val_offset:106554*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106554*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x305862 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f305862; op2val:0x0; +op3val:0xfffffff; valaddr_reg:x3; val_offset:106557*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106557*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:106560*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106560*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:106563*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106563*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:106566*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106566*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:106569*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106569*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:106572*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106572*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:106575*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106575*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:106578*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106578*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:106581*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106581*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:106584*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106584*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:106587*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106587*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:106590*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106590*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:106593*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106593*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:106596*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106596*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:106599*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106599*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:106602*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106602*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:106605*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106605*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc800000; valaddr_reg:x3; val_offset:106608*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106608*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc800001; valaddr_reg:x3; val_offset:106611*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106611*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc800003; valaddr_reg:x3; val_offset:106614*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106614*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc800007; valaddr_reg:x3; val_offset:106617*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106617*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc80000f; valaddr_reg:x3; val_offset:106620*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106620*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc80001f; valaddr_reg:x3; val_offset:106623*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106623*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc80003f; valaddr_reg:x3; val_offset:106626*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106626*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc80007f; valaddr_reg:x3; val_offset:106629*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106629*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc8000ff; valaddr_reg:x3; val_offset:106632*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106632*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc8001ff; valaddr_reg:x3; val_offset:106635*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106635*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc8003ff; valaddr_reg:x3; val_offset:106638*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106638*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc8007ff; valaddr_reg:x3; val_offset:106641*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106641*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc800fff; valaddr_reg:x3; val_offset:106644*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106644*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc801fff; valaddr_reg:x3; val_offset:106647*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106647*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc803fff; valaddr_reg:x3; val_offset:106650*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106650*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc807fff; valaddr_reg:x3; val_offset:106653*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106653*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc80ffff; valaddr_reg:x3; val_offset:106656*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106656*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc81ffff; valaddr_reg:x3; val_offset:106659*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106659*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc83ffff; valaddr_reg:x3; val_offset:106662*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106662*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc87ffff; valaddr_reg:x3; val_offset:106665*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106665*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc8fffff; valaddr_reg:x3; val_offset:106668*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106668*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xc9fffff; valaddr_reg:x3; val_offset:106671*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106671*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcbfffff; valaddr_reg:x3; val_offset:106674*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106674*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcc00000; valaddr_reg:x3; val_offset:106677*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106677*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xce00000; valaddr_reg:x3; val_offset:106680*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106680*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcf00000; valaddr_reg:x3; val_offset:106683*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106683*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcf80000; valaddr_reg:x3; val_offset:106686*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106686*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfc0000; valaddr_reg:x3; val_offset:106689*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106689*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfe0000; valaddr_reg:x3; val_offset:106692*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106692*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcff0000; valaddr_reg:x3; val_offset:106695*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106695*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcff8000; valaddr_reg:x3; val_offset:106698*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106698*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcffc000; valaddr_reg:x3; val_offset:106701*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106701*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcffe000; valaddr_reg:x3; val_offset:106704*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106704*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfff000; valaddr_reg:x3; val_offset:106707*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106707*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfff800; valaddr_reg:x3; val_offset:106710*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106710*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfffc00; valaddr_reg:x3; val_offset:106713*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106713*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfffe00; valaddr_reg:x3; val_offset:106716*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106716*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcffff00; valaddr_reg:x3; val_offset:106719*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106719*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcffff80; valaddr_reg:x3; val_offset:106722*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106722*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcffffc0; valaddr_reg:x3; val_offset:106725*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106725*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcffffe0; valaddr_reg:x3; val_offset:106728*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106728*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfffff0; valaddr_reg:x3; val_offset:106731*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106731*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfffff8; valaddr_reg:x3; val_offset:106734*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106734*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfffffc; valaddr_reg:x3; val_offset:106737*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106737*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcfffffe; valaddr_reg:x3; val_offset:106740*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106740*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30948b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30948b; op2val:0x0; +op3val:0xcffffff; valaddr_reg:x3; val_offset:106743*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106743*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc000000; valaddr_reg:x3; val_offset:106746*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106746*0 + 3*277*FLEN/8, x4, x1, x2) + +inst_35583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc000001; valaddr_reg:x3; val_offset:106749*0 + 3*277*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106749*0 + 3*277*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554430,32,FLEN) +NAN_BOXED(2133871885,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554431,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046848,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046849,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046851,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046855,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046863,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046879,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046911,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046975,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047103,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047359,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047871,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260048895,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260050943,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260055039,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260063231,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260079615,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260112383,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260177919,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260308991,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260571135,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(261095423,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143999,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(264241151,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(264241152,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(266338304,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(267386880,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(267911168,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268173312,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268304384,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268369920,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268402688,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268419072,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268427264,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268431360,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268433408,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268434432,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268434944,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435200,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435328,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435392,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435424,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435440,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435448,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435452,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435454,32,FLEN) +NAN_BOXED(2133874786,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435455,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715200,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715201,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715203,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715207,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715215,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715231,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715263,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715327,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715455,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715711,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209716223,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209717247,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209719295,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209723391,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209731583,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209747967,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209780735,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209846271,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209977343,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(210239487,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(210763775,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(211812351,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(213909503,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(213909504,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(216006656,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217055232,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217579520,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217841664,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217972736,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218038272,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218071040,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218087424,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218095616,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218099712,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218101760,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218102784,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103296,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103552,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103680,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103744,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103776,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103792,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103800,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103804,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103806,32,FLEN) +NAN_BOXED(2133890187,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103807,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858432,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858433,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-279.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-279.S new file mode 100644 index 000000000..4152b6b93 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-279.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_35584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc000003; valaddr_reg:x3; val_offset:106752*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106752*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc000007; valaddr_reg:x3; val_offset:106755*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106755*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc00000f; valaddr_reg:x3; val_offset:106758*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106758*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc00001f; valaddr_reg:x3; val_offset:106761*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106761*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc00003f; valaddr_reg:x3; val_offset:106764*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106764*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc00007f; valaddr_reg:x3; val_offset:106767*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106767*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc0000ff; valaddr_reg:x3; val_offset:106770*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106770*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc0001ff; valaddr_reg:x3; val_offset:106773*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106773*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc0003ff; valaddr_reg:x3; val_offset:106776*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106776*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc0007ff; valaddr_reg:x3; val_offset:106779*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106779*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc000fff; valaddr_reg:x3; val_offset:106782*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106782*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc001fff; valaddr_reg:x3; val_offset:106785*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106785*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc003fff; valaddr_reg:x3; val_offset:106788*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106788*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc007fff; valaddr_reg:x3; val_offset:106791*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106791*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc00ffff; valaddr_reg:x3; val_offset:106794*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106794*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc01ffff; valaddr_reg:x3; val_offset:106797*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106797*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc03ffff; valaddr_reg:x3; val_offset:106800*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106800*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc07ffff; valaddr_reg:x3; val_offset:106803*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106803*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc0fffff; valaddr_reg:x3; val_offset:106806*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106806*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc1fffff; valaddr_reg:x3; val_offset:106809*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106809*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc3fffff; valaddr_reg:x3; val_offset:106812*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106812*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc400000; valaddr_reg:x3; val_offset:106815*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106815*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc600000; valaddr_reg:x3; val_offset:106818*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106818*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc700000; valaddr_reg:x3; val_offset:106821*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106821*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc780000; valaddr_reg:x3; val_offset:106824*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106824*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7c0000; valaddr_reg:x3; val_offset:106827*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106827*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7e0000; valaddr_reg:x3; val_offset:106830*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106830*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7f0000; valaddr_reg:x3; val_offset:106833*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106833*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7f8000; valaddr_reg:x3; val_offset:106836*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106836*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7fc000; valaddr_reg:x3; val_offset:106839*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106839*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7fe000; valaddr_reg:x3; val_offset:106842*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106842*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7ff000; valaddr_reg:x3; val_offset:106845*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106845*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7ff800; valaddr_reg:x3; val_offset:106848*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106848*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7ffc00; valaddr_reg:x3; val_offset:106851*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106851*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7ffe00; valaddr_reg:x3; val_offset:106854*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106854*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7fff00; valaddr_reg:x3; val_offset:106857*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106857*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7fff80; valaddr_reg:x3; val_offset:106860*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106860*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7fffc0; valaddr_reg:x3; val_offset:106863*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106863*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7fffe0; valaddr_reg:x3; val_offset:106866*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106866*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7ffff0; valaddr_reg:x3; val_offset:106869*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106869*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7ffff8; valaddr_reg:x3; val_offset:106872*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106872*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7ffffc; valaddr_reg:x3; val_offset:106875*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106875*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7ffffe; valaddr_reg:x3; val_offset:106878*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106878*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xf8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xfc7fffff; valaddr_reg:x3; val_offset:106881*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106881*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff000001; valaddr_reg:x3; val_offset:106884*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106884*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff000003; valaddr_reg:x3; val_offset:106887*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106887*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff000007; valaddr_reg:x3; val_offset:106890*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106890*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff199999; valaddr_reg:x3; val_offset:106893*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106893*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff249249; valaddr_reg:x3; val_offset:106896*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106896*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff333333; valaddr_reg:x3; val_offset:106899*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106899*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:106902*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106902*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:106905*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106905*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff444444; valaddr_reg:x3; val_offset:106908*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106908*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:106911*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106911*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:106914*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106914*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff666666; valaddr_reg:x3; val_offset:106917*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106917*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:106920*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106920*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:106923*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106923*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:106926*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106926*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30a2c2 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x3982fc and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30a2c2; op2val:0xbfb982fc; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:106929*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106929*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:106932*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106932*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:106935*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106935*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:106938*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106938*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:106941*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106941*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:106944*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106944*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:106947*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106947*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:106950*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106950*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:106953*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106953*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:106956*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106956*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:106959*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106959*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:106962*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106962*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:106965*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106965*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:106968*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106968*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:106971*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106971*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:106974*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106974*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:106977*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106977*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81000000; valaddr_reg:x3; val_offset:106980*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106980*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81000001; valaddr_reg:x3; val_offset:106983*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106983*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81000003; valaddr_reg:x3; val_offset:106986*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106986*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81000007; valaddr_reg:x3; val_offset:106989*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106989*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8100000f; valaddr_reg:x3; val_offset:106992*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106992*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8100001f; valaddr_reg:x3; val_offset:106995*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106995*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8100003f; valaddr_reg:x3; val_offset:106998*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 106998*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8100007f; valaddr_reg:x3; val_offset:107001*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107001*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x810000ff; valaddr_reg:x3; val_offset:107004*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107004*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x810001ff; valaddr_reg:x3; val_offset:107007*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107007*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x810003ff; valaddr_reg:x3; val_offset:107010*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107010*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x810007ff; valaddr_reg:x3; val_offset:107013*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107013*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81000fff; valaddr_reg:x3; val_offset:107016*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107016*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81001fff; valaddr_reg:x3; val_offset:107019*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107019*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81003fff; valaddr_reg:x3; val_offset:107022*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107022*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81007fff; valaddr_reg:x3; val_offset:107025*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107025*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8100ffff; valaddr_reg:x3; val_offset:107028*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107028*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8101ffff; valaddr_reg:x3; val_offset:107031*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107031*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8103ffff; valaddr_reg:x3; val_offset:107034*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107034*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x8107ffff; valaddr_reg:x3; val_offset:107037*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107037*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x810fffff; valaddr_reg:x3; val_offset:107040*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107040*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x811fffff; valaddr_reg:x3; val_offset:107043*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107043*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x813fffff; valaddr_reg:x3; val_offset:107046*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107046*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81400000; valaddr_reg:x3; val_offset:107049*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107049*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81600000; valaddr_reg:x3; val_offset:107052*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107052*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81700000; valaddr_reg:x3; val_offset:107055*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107055*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x81780000; valaddr_reg:x3; val_offset:107058*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107058*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817c0000; valaddr_reg:x3; val_offset:107061*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107061*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817e0000; valaddr_reg:x3; val_offset:107064*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107064*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817f0000; valaddr_reg:x3; val_offset:107067*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107067*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817f8000; valaddr_reg:x3; val_offset:107070*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107070*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817fc000; valaddr_reg:x3; val_offset:107073*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107073*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817fe000; valaddr_reg:x3; val_offset:107076*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107076*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817ff000; valaddr_reg:x3; val_offset:107079*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107079*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817ff800; valaddr_reg:x3; val_offset:107082*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107082*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817ffc00; valaddr_reg:x3; val_offset:107085*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107085*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817ffe00; valaddr_reg:x3; val_offset:107088*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107088*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817fff00; valaddr_reg:x3; val_offset:107091*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107091*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817fff80; valaddr_reg:x3; val_offset:107094*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107094*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817fffc0; valaddr_reg:x3; val_offset:107097*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107097*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817fffe0; valaddr_reg:x3; val_offset:107100*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107100*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817ffff0; valaddr_reg:x3; val_offset:107103*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107103*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817ffff8; valaddr_reg:x3; val_offset:107106*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107106*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817ffffc; valaddr_reg:x3; val_offset:107109*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107109*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817ffffe; valaddr_reg:x3; val_offset:107112*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107112*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30ab57 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30ab57; op2val:0x80000000; +op3val:0x817fffff; valaddr_reg:x3; val_offset:107115*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107115*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3f800001; valaddr_reg:x3; val_offset:107118*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107118*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3f800003; valaddr_reg:x3; val_offset:107121*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107121*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3f800007; valaddr_reg:x3; val_offset:107124*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107124*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3f999999; valaddr_reg:x3; val_offset:107127*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107127*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:107130*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107130*0 + 3*278*FLEN/8, x4, x1, x2) + +inst_35711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:107133*0 + 3*278*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107133*0 + 3*278*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858435,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858439,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858447,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858463,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858495,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858559,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858687,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227858943,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227859455,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227860479,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227862527,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227866623,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227874815,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227891199,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227923967,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4227989503,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4228120575,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4228382719,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4228907007,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4229955583,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4232052735,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4232052736,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4234149888,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4235198464,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4235722752,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4235984896,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236115968,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236181504,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236214272,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236230656,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236238848,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236242944,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236244992,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236246016,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236246528,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236246784,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236246912,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236246976,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236247008,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236247024,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236247032,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236247036,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236247038,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4236247039,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2133893826,32,FLEN) +NAN_BOXED(3216605948,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260864,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260865,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260867,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260871,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260879,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260895,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260927,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260991,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261119,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261375,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261887,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164262911,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164264959,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164269055,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164277247,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164293631,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164326399,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164391935,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164523007,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164785151,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2165309439,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2166358015,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2168455167,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2168455168,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2170552320,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2171600896,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172125184,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172387328,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172518400,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172583936,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172616704,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172633088,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172641280,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172645376,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172647424,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172648448,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172648960,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649216,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649344,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649408,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649440,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649456,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649464,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649468,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649470,32,FLEN) +NAN_BOXED(2133896023,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649471,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-28.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-28.S new file mode 100644 index 000000000..d075a16e0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-28.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_3456: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:10368*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10368*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3457: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:10371*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10371*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3458: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:10374*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10374*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3459: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:10377*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10377*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3460: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:10380*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10380*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3461: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:10383*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10383*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3462: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:10386*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10386*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3463: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:10389*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10389*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3464: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:10392*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10392*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3465: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:10395*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10395*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3466: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:10398*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10398*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3467: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:10401*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10401*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3468: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:10404*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10404*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3469: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:10407*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10407*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3470: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83000000; valaddr_reg:x3; val_offset:10410*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10410*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3471: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83000001; valaddr_reg:x3; val_offset:10413*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10413*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3472: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83000003; valaddr_reg:x3; val_offset:10416*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10416*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3473: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83000007; valaddr_reg:x3; val_offset:10419*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10419*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3474: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8300000f; valaddr_reg:x3; val_offset:10422*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10422*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3475: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8300001f; valaddr_reg:x3; val_offset:10425*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10425*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3476: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8300003f; valaddr_reg:x3; val_offset:10428*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10428*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3477: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8300007f; valaddr_reg:x3; val_offset:10431*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10431*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3478: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x830000ff; valaddr_reg:x3; val_offset:10434*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10434*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3479: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x830001ff; valaddr_reg:x3; val_offset:10437*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10437*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3480: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x830003ff; valaddr_reg:x3; val_offset:10440*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10440*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3481: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x830007ff; valaddr_reg:x3; val_offset:10443*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10443*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3482: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83000fff; valaddr_reg:x3; val_offset:10446*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10446*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3483: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83001fff; valaddr_reg:x3; val_offset:10449*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10449*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3484: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83003fff; valaddr_reg:x3; val_offset:10452*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10452*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3485: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83007fff; valaddr_reg:x3; val_offset:10455*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10455*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3486: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8300ffff; valaddr_reg:x3; val_offset:10458*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10458*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3487: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8301ffff; valaddr_reg:x3; val_offset:10461*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10461*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3488: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8303ffff; valaddr_reg:x3; val_offset:10464*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10464*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3489: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x8307ffff; valaddr_reg:x3; val_offset:10467*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10467*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3490: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x830fffff; valaddr_reg:x3; val_offset:10470*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10470*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3491: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x831fffff; valaddr_reg:x3; val_offset:10473*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10473*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3492: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x833fffff; valaddr_reg:x3; val_offset:10476*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10476*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3493: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83400000; valaddr_reg:x3; val_offset:10479*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10479*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3494: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83600000; valaddr_reg:x3; val_offset:10482*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10482*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3495: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83700000; valaddr_reg:x3; val_offset:10485*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10485*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3496: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x83780000; valaddr_reg:x3; val_offset:10488*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10488*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3497: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837c0000; valaddr_reg:x3; val_offset:10491*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10491*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3498: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837e0000; valaddr_reg:x3; val_offset:10494*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10494*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3499: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837f0000; valaddr_reg:x3; val_offset:10497*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10497*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3500: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837f8000; valaddr_reg:x3; val_offset:10500*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10500*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3501: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837fc000; valaddr_reg:x3; val_offset:10503*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10503*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3502: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837fe000; valaddr_reg:x3; val_offset:10506*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10506*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3503: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837ff000; valaddr_reg:x3; val_offset:10509*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10509*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3504: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837ff800; valaddr_reg:x3; val_offset:10512*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10512*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3505: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837ffc00; valaddr_reg:x3; val_offset:10515*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10515*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3506: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837ffe00; valaddr_reg:x3; val_offset:10518*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10518*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3507: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837fff00; valaddr_reg:x3; val_offset:10521*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10521*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3508: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837fff80; valaddr_reg:x3; val_offset:10524*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10524*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3509: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837fffc0; valaddr_reg:x3; val_offset:10527*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10527*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3510: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837fffe0; valaddr_reg:x3; val_offset:10530*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10530*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3511: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837ffff0; valaddr_reg:x3; val_offset:10533*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10533*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3512: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837ffff8; valaddr_reg:x3; val_offset:10536*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10536*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3513: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837ffffc; valaddr_reg:x3; val_offset:10539*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10539*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3514: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837ffffe; valaddr_reg:x3; val_offset:10542*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10542*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3515: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0081b9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8081b9; op2val:0x80000000; +op3val:0x837fffff; valaddr_reg:x3; val_offset:10545*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10545*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3516: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:10548*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10548*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3517: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:10551*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10551*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3518: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:10554*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10554*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3519: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:10557*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10557*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3520: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:10560*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10560*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3521: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:10563*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10563*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3522: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:10566*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10566*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3523: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:10569*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10569*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3524: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:10572*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10572*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3525: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:10575*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10575*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3526: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:10578*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10578*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3527: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:10581*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10581*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3528: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:10584*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10584*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3529: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:10587*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10587*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3530: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:10590*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10590*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3531: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:10593*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10593*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3532: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb000000; valaddr_reg:x3; val_offset:10596*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10596*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3533: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb000001; valaddr_reg:x3; val_offset:10599*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10599*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3534: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb000003; valaddr_reg:x3; val_offset:10602*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10602*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3535: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb000007; valaddr_reg:x3; val_offset:10605*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10605*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3536: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb00000f; valaddr_reg:x3; val_offset:10608*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10608*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3537: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb00001f; valaddr_reg:x3; val_offset:10611*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10611*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3538: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb00003f; valaddr_reg:x3; val_offset:10614*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10614*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3539: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb00007f; valaddr_reg:x3; val_offset:10617*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10617*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3540: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb0000ff; valaddr_reg:x3; val_offset:10620*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10620*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3541: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb0001ff; valaddr_reg:x3; val_offset:10623*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10623*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3542: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb0003ff; valaddr_reg:x3; val_offset:10626*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10626*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3543: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb0007ff; valaddr_reg:x3; val_offset:10629*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10629*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3544: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb000fff; valaddr_reg:x3; val_offset:10632*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10632*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3545: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb001fff; valaddr_reg:x3; val_offset:10635*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10635*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3546: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb003fff; valaddr_reg:x3; val_offset:10638*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10638*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3547: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb007fff; valaddr_reg:x3; val_offset:10641*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10641*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3548: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb00ffff; valaddr_reg:x3; val_offset:10644*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10644*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3549: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb01ffff; valaddr_reg:x3; val_offset:10647*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10647*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3550: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb03ffff; valaddr_reg:x3; val_offset:10650*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10650*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3551: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb07ffff; valaddr_reg:x3; val_offset:10653*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10653*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3552: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb0fffff; valaddr_reg:x3; val_offset:10656*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10656*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3553: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb1fffff; valaddr_reg:x3; val_offset:10659*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10659*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3554: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb3fffff; valaddr_reg:x3; val_offset:10662*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10662*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3555: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb400000; valaddr_reg:x3; val_offset:10665*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10665*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3556: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb600000; valaddr_reg:x3; val_offset:10668*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10668*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3557: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb700000; valaddr_reg:x3; val_offset:10671*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10671*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3558: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb780000; valaddr_reg:x3; val_offset:10674*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10674*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3559: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7c0000; valaddr_reg:x3; val_offset:10677*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10677*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3560: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7e0000; valaddr_reg:x3; val_offset:10680*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10680*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3561: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7f0000; valaddr_reg:x3; val_offset:10683*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10683*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3562: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7f8000; valaddr_reg:x3; val_offset:10686*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10686*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3563: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7fc000; valaddr_reg:x3; val_offset:10689*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10689*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3564: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7fe000; valaddr_reg:x3; val_offset:10692*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10692*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3565: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7ff000; valaddr_reg:x3; val_offset:10695*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10695*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3566: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7ff800; valaddr_reg:x3; val_offset:10698*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10698*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3567: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7ffc00; valaddr_reg:x3; val_offset:10701*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10701*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3568: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7ffe00; valaddr_reg:x3; val_offset:10704*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10704*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3569: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7fff00; valaddr_reg:x3; val_offset:10707*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10707*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3570: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7fff80; valaddr_reg:x3; val_offset:10710*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10710*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3571: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7fffc0; valaddr_reg:x3; val_offset:10713*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10713*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3572: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7fffe0; valaddr_reg:x3; val_offset:10716*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10716*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3573: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7ffff0; valaddr_reg:x3; val_offset:10719*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10719*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3574: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7ffff8; valaddr_reg:x3; val_offset:10722*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10722*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3575: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7ffffc; valaddr_reg:x3; val_offset:10725*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10725*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3576: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7ffffe; valaddr_reg:x3; val_offset:10728*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10728*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3577: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020308 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820308; op2val:0x0; +op3val:0xb7fffff; valaddr_reg:x3; val_offset:10731*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10731*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3578: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:10734*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10734*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3579: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:10737*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10737*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3580: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:10740*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10740*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3581: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:10743*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10743*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3582: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:10746*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10746*0 + 3*27*FLEN/8, x4, x1, x2) + +inst_3583: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:10749*0 + 3*27*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10749*0 + 3*27*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815296,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815297,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815299,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815303,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815311,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815327,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815359,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815423,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815551,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815807,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197816319,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197817343,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197819391,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197823487,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197831679,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197848063,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197880831,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197946367,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198077439,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198339583,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2198863871,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2199912447,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2202009599,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2202009600,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2204106752,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205155328,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205679616,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2205941760,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206072832,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206138368,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206171136,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206187520,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206195712,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206199808,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206201856,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206202880,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203392,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203648,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203776,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203840,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203872,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203888,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203896,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203900,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203902,32,FLEN) +NAN_BOXED(2105573817,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203903,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549376,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549377,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549379,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549383,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549391,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549407,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549439,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549503,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549631,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549887,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184550399,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184551423,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184553471,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184557567,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184565759,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184582143,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184614911,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184680447,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184811519,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(185073663,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(185597951,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(186646527,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(188743679,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(188743680,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(190840832,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(191889408,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192413696,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192675840,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192806912,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192872448,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192905216,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192921600,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192929792,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192933888,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192935936,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192936960,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937472,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937728,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937856,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937920,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937952,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937968,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937976,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937980,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937982,32,FLEN) +NAN_BOXED(2105672456,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937983,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-280.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-280.S new file mode 100644 index 000000000..398cecce7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-280.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_35712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:107136*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107136*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:107139*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107139*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:107142*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107142*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:107145*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107145*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:107148*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107148*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:107151*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107151*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:107154*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107154*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:107157*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107157*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:107160*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107160*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:107163*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107163*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48800000; valaddr_reg:x3; val_offset:107166*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107166*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48800001; valaddr_reg:x3; val_offset:107169*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107169*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48800003; valaddr_reg:x3; val_offset:107172*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107172*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48800007; valaddr_reg:x3; val_offset:107175*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107175*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x4880000f; valaddr_reg:x3; val_offset:107178*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107178*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x4880001f; valaddr_reg:x3; val_offset:107181*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107181*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x4880003f; valaddr_reg:x3; val_offset:107184*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107184*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x4880007f; valaddr_reg:x3; val_offset:107187*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107187*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x488000ff; valaddr_reg:x3; val_offset:107190*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107190*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x488001ff; valaddr_reg:x3; val_offset:107193*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107193*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x488003ff; valaddr_reg:x3; val_offset:107196*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107196*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x488007ff; valaddr_reg:x3; val_offset:107199*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107199*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48800fff; valaddr_reg:x3; val_offset:107202*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107202*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48801fff; valaddr_reg:x3; val_offset:107205*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107205*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48803fff; valaddr_reg:x3; val_offset:107208*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107208*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48807fff; valaddr_reg:x3; val_offset:107211*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107211*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x4880ffff; valaddr_reg:x3; val_offset:107214*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107214*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x4881ffff; valaddr_reg:x3; val_offset:107217*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107217*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x4883ffff; valaddr_reg:x3; val_offset:107220*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107220*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x4887ffff; valaddr_reg:x3; val_offset:107223*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107223*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x488fffff; valaddr_reg:x3; val_offset:107226*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107226*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x489fffff; valaddr_reg:x3; val_offset:107229*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107229*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48bfffff; valaddr_reg:x3; val_offset:107232*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107232*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48c00000; valaddr_reg:x3; val_offset:107235*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107235*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48e00000; valaddr_reg:x3; val_offset:107238*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107238*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48f00000; valaddr_reg:x3; val_offset:107241*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107241*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48f80000; valaddr_reg:x3; val_offset:107244*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107244*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fc0000; valaddr_reg:x3; val_offset:107247*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107247*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fe0000; valaddr_reg:x3; val_offset:107250*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107250*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ff0000; valaddr_reg:x3; val_offset:107253*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107253*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ff8000; valaddr_reg:x3; val_offset:107256*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107256*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ffc000; valaddr_reg:x3; val_offset:107259*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107259*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ffe000; valaddr_reg:x3; val_offset:107262*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107262*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fff000; valaddr_reg:x3; val_offset:107265*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107265*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fff800; valaddr_reg:x3; val_offset:107268*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107268*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fffc00; valaddr_reg:x3; val_offset:107271*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107271*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fffe00; valaddr_reg:x3; val_offset:107274*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107274*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ffff00; valaddr_reg:x3; val_offset:107277*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107277*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ffff80; valaddr_reg:x3; val_offset:107280*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107280*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ffffc0; valaddr_reg:x3; val_offset:107283*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107283*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ffffe0; valaddr_reg:x3; val_offset:107286*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107286*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fffff0; valaddr_reg:x3; val_offset:107289*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107289*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fffff8; valaddr_reg:x3; val_offset:107292*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107292*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fffffc; valaddr_reg:x3; val_offset:107295*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107295*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48fffffe; valaddr_reg:x3; val_offset:107298*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107298*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x30e98e and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2e4e30 and fs3 == 0 and fe3 == 0x91 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f30e98e; op2val:0x2e4e30; +op3val:0x48ffffff; valaddr_reg:x3; val_offset:107301*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107301*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd000000; valaddr_reg:x3; val_offset:107304*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107304*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd000001; valaddr_reg:x3; val_offset:107307*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107307*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd000003; valaddr_reg:x3; val_offset:107310*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107310*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd000007; valaddr_reg:x3; val_offset:107313*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107313*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd00000f; valaddr_reg:x3; val_offset:107316*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107316*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd00001f; valaddr_reg:x3; val_offset:107319*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107319*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd00003f; valaddr_reg:x3; val_offset:107322*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107322*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd00007f; valaddr_reg:x3; val_offset:107325*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107325*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd0000ff; valaddr_reg:x3; val_offset:107328*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107328*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd0001ff; valaddr_reg:x3; val_offset:107331*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107331*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd0003ff; valaddr_reg:x3; val_offset:107334*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107334*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd0007ff; valaddr_reg:x3; val_offset:107337*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107337*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd000fff; valaddr_reg:x3; val_offset:107340*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107340*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd001fff; valaddr_reg:x3; val_offset:107343*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107343*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd003fff; valaddr_reg:x3; val_offset:107346*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107346*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd007fff; valaddr_reg:x3; val_offset:107349*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107349*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd00ffff; valaddr_reg:x3; val_offset:107352*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107352*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd01ffff; valaddr_reg:x3; val_offset:107355*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107355*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd03ffff; valaddr_reg:x3; val_offset:107358*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107358*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd07ffff; valaddr_reg:x3; val_offset:107361*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107361*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd0fffff; valaddr_reg:x3; val_offset:107364*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107364*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd1fffff; valaddr_reg:x3; val_offset:107367*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107367*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd3fffff; valaddr_reg:x3; val_offset:107370*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107370*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd400000; valaddr_reg:x3; val_offset:107373*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107373*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd600000; valaddr_reg:x3; val_offset:107376*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107376*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd700000; valaddr_reg:x3; val_offset:107379*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107379*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd780000; valaddr_reg:x3; val_offset:107382*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107382*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7c0000; valaddr_reg:x3; val_offset:107385*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107385*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7e0000; valaddr_reg:x3; val_offset:107388*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107388*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7f0000; valaddr_reg:x3; val_offset:107391*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107391*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7f8000; valaddr_reg:x3; val_offset:107394*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107394*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7fc000; valaddr_reg:x3; val_offset:107397*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107397*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7fe000; valaddr_reg:x3; val_offset:107400*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107400*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7ff000; valaddr_reg:x3; val_offset:107403*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107403*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7ff800; valaddr_reg:x3; val_offset:107406*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107406*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7ffc00; valaddr_reg:x3; val_offset:107409*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107409*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7ffe00; valaddr_reg:x3; val_offset:107412*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107412*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7fff00; valaddr_reg:x3; val_offset:107415*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107415*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7fff80; valaddr_reg:x3; val_offset:107418*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107418*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7fffc0; valaddr_reg:x3; val_offset:107421*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107421*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7fffe0; valaddr_reg:x3; val_offset:107424*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107424*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7ffff0; valaddr_reg:x3; val_offset:107427*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107427*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7ffff8; valaddr_reg:x3; val_offset:107430*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107430*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7ffffc; valaddr_reg:x3; val_offset:107433*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107433*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7ffffe; valaddr_reg:x3; val_offset:107436*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107436*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbd7fffff; valaddr_reg:x3; val_offset:107439*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107439*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbf800001; valaddr_reg:x3; val_offset:107442*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107442*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbf800003; valaddr_reg:x3; val_offset:107445*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107445*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbf800007; valaddr_reg:x3; val_offset:107448*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107448*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbf999999; valaddr_reg:x3; val_offset:107451*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107451*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:107454*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107454*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:107457*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107457*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:107460*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107460*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:107463*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107463*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:107466*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107466*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:107469*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107469*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:107472*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107472*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:107475*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107475*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:107478*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107478*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:107481*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107481*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:107484*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107484*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x312bf9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2e3cd4 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f312bf9; op2val:0x802e3cd4; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:107487*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107487*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:107490*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107490*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:107493*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107493*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:107496*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107496*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:107499*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107499*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:107502*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107502*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:107505*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107505*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:107508*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107508*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:107511*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107511*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:107514*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107514*0 + 3*279*FLEN/8, x4, x1, x2) + +inst_35839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:107517*0 + 3*279*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107517*0 + 3*279*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348160,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348161,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348163,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348167,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348175,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348191,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348223,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348287,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348415,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216348671,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216349183,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216350207,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216352255,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216356351,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216364543,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216380927,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216413695,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216479231,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216610303,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1216872447,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1217396735,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1218445311,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1220542463,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1220542464,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1222639616,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1223688192,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224212480,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224474624,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224605696,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224671232,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224704000,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224720384,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224728576,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224732672,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224734720,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224735744,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736256,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736512,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736640,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736704,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736736,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736752,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736760,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736764,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736766,32,FLEN) +NAN_BOXED(2133911950,32,FLEN) +NAN_BOXED(3034672,32,FLEN) +NAN_BOXED(1224736767,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170893824,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170893825,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170893827,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170893831,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170893839,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170893855,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170893887,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170893951,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170894079,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170894335,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170894847,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170895871,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170897919,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170902015,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170910207,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170926591,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3170959359,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3171024895,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3171155967,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3171418111,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3171942399,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3172990975,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3175088127,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3175088128,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3177185280,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3178233856,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3178758144,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179020288,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179151360,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179216896,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179249664,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179266048,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179274240,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179278336,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179280384,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179281408,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179281920,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282176,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282304,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282368,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282400,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282416,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282424,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282428,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282430,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3179282431,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2133928953,32,FLEN) +NAN_BOXED(2150513876,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-281.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-281.S new file mode 100644 index 000000000..fd653875f --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-281.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_35840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:107520*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107520*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:107523*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107523*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:107526*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107526*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:107529*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107529*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:107532*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107532*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:107535*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107535*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e800000; valaddr_reg:x3; val_offset:107538*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107538*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e800001; valaddr_reg:x3; val_offset:107541*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107541*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e800003; valaddr_reg:x3; val_offset:107544*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107544*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e800007; valaddr_reg:x3; val_offset:107547*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107547*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e80000f; valaddr_reg:x3; val_offset:107550*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107550*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e80001f; valaddr_reg:x3; val_offset:107553*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107553*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e80003f; valaddr_reg:x3; val_offset:107556*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107556*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e80007f; valaddr_reg:x3; val_offset:107559*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107559*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e8000ff; valaddr_reg:x3; val_offset:107562*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107562*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e8001ff; valaddr_reg:x3; val_offset:107565*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107565*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e8003ff; valaddr_reg:x3; val_offset:107568*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107568*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e8007ff; valaddr_reg:x3; val_offset:107571*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107571*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e800fff; valaddr_reg:x3; val_offset:107574*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107574*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e801fff; valaddr_reg:x3; val_offset:107577*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107577*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e803fff; valaddr_reg:x3; val_offset:107580*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107580*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e807fff; valaddr_reg:x3; val_offset:107583*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107583*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e80ffff; valaddr_reg:x3; val_offset:107586*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107586*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e81ffff; valaddr_reg:x3; val_offset:107589*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107589*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e83ffff; valaddr_reg:x3; val_offset:107592*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107592*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e87ffff; valaddr_reg:x3; val_offset:107595*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107595*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e8fffff; valaddr_reg:x3; val_offset:107598*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107598*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8e9fffff; valaddr_reg:x3; val_offset:107601*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107601*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8ebfffff; valaddr_reg:x3; val_offset:107604*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107604*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8ec00000; valaddr_reg:x3; val_offset:107607*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107607*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8ee00000; valaddr_reg:x3; val_offset:107610*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107610*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8ef00000; valaddr_reg:x3; val_offset:107613*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107613*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8ef80000; valaddr_reg:x3; val_offset:107616*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107616*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efc0000; valaddr_reg:x3; val_offset:107619*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107619*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efe0000; valaddr_reg:x3; val_offset:107622*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107622*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8eff0000; valaddr_reg:x3; val_offset:107625*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107625*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8eff8000; valaddr_reg:x3; val_offset:107628*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107628*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8effc000; valaddr_reg:x3; val_offset:107631*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107631*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8effe000; valaddr_reg:x3; val_offset:107634*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107634*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efff000; valaddr_reg:x3; val_offset:107637*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107637*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efff800; valaddr_reg:x3; val_offset:107640*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107640*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efffc00; valaddr_reg:x3; val_offset:107643*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107643*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efffe00; valaddr_reg:x3; val_offset:107646*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107646*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8effff00; valaddr_reg:x3; val_offset:107649*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107649*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8effff80; valaddr_reg:x3; val_offset:107652*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107652*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8effffc0; valaddr_reg:x3; val_offset:107655*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107655*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8effffe0; valaddr_reg:x3; val_offset:107658*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107658*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efffff0; valaddr_reg:x3; val_offset:107661*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107661*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efffff8; valaddr_reg:x3; val_offset:107664*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107664*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efffffc; valaddr_reg:x3; val_offset:107667*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107667*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8efffffe; valaddr_reg:x3; val_offset:107670*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107670*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31316c and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31316c; op2val:0x80000000; +op3val:0x8effffff; valaddr_reg:x3; val_offset:107673*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107673*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b800000; valaddr_reg:x3; val_offset:107676*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107676*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b800001; valaddr_reg:x3; val_offset:107679*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107679*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b800003; valaddr_reg:x3; val_offset:107682*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107682*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b800007; valaddr_reg:x3; val_offset:107685*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107685*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b80000f; valaddr_reg:x3; val_offset:107688*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107688*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b80001f; valaddr_reg:x3; val_offset:107691*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107691*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b80003f; valaddr_reg:x3; val_offset:107694*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107694*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b80007f; valaddr_reg:x3; val_offset:107697*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107697*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b8000ff; valaddr_reg:x3; val_offset:107700*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107700*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b8001ff; valaddr_reg:x3; val_offset:107703*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107703*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b8003ff; valaddr_reg:x3; val_offset:107706*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107706*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b8007ff; valaddr_reg:x3; val_offset:107709*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107709*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b800fff; valaddr_reg:x3; val_offset:107712*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107712*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b801fff; valaddr_reg:x3; val_offset:107715*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107715*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b803fff; valaddr_reg:x3; val_offset:107718*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107718*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b807fff; valaddr_reg:x3; val_offset:107721*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107721*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b80ffff; valaddr_reg:x3; val_offset:107724*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107724*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b81ffff; valaddr_reg:x3; val_offset:107727*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107727*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b83ffff; valaddr_reg:x3; val_offset:107730*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107730*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b87ffff; valaddr_reg:x3; val_offset:107733*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107733*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b8fffff; valaddr_reg:x3; val_offset:107736*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107736*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7b9fffff; valaddr_reg:x3; val_offset:107739*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107739*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bbfffff; valaddr_reg:x3; val_offset:107742*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107742*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bc00000; valaddr_reg:x3; val_offset:107745*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107745*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7be00000; valaddr_reg:x3; val_offset:107748*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107748*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bf00000; valaddr_reg:x3; val_offset:107751*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107751*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bf80000; valaddr_reg:x3; val_offset:107754*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107754*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfc0000; valaddr_reg:x3; val_offset:107757*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107757*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfe0000; valaddr_reg:x3; val_offset:107760*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107760*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bff0000; valaddr_reg:x3; val_offset:107763*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107763*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bff8000; valaddr_reg:x3; val_offset:107766*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107766*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bffc000; valaddr_reg:x3; val_offset:107769*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107769*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bffe000; valaddr_reg:x3; val_offset:107772*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107772*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfff000; valaddr_reg:x3; val_offset:107775*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107775*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfff800; valaddr_reg:x3; val_offset:107778*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107778*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfffc00; valaddr_reg:x3; val_offset:107781*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107781*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfffe00; valaddr_reg:x3; val_offset:107784*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107784*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bffff00; valaddr_reg:x3; val_offset:107787*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107787*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bffff80; valaddr_reg:x3; val_offset:107790*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107790*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bffffc0; valaddr_reg:x3; val_offset:107793*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107793*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bffffe0; valaddr_reg:x3; val_offset:107796*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107796*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfffff0; valaddr_reg:x3; val_offset:107799*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107799*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfffff8; valaddr_reg:x3; val_offset:107802*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107802*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfffffc; valaddr_reg:x3; val_offset:107805*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107805*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bfffffe; valaddr_reg:x3; val_offset:107808*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107808*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xf7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7bffffff; valaddr_reg:x3; val_offset:107811*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107811*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f000001; valaddr_reg:x3; val_offset:107814*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107814*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f000003; valaddr_reg:x3; val_offset:107817*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107817*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f000007; valaddr_reg:x3; val_offset:107820*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107820*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f199999; valaddr_reg:x3; val_offset:107823*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107823*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f249249; valaddr_reg:x3; val_offset:107826*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107826*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f333333; valaddr_reg:x3; val_offset:107829*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107829*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:107832*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107832*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:107835*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107835*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f444444; valaddr_reg:x3; val_offset:107838*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107838*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:107841*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107841*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:107844*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107844*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f666666; valaddr_reg:x3; val_offset:107847*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107847*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:107850*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107850*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:107853*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107853*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:107856*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107856*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x31de3b and fs2 == 0 and fe2 == 0x7f and fm2 == 0x3839f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f31de3b; op2val:0x3fb839f4; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:107859*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107859*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a000000; valaddr_reg:x3; val_offset:107862*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107862*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a000001; valaddr_reg:x3; val_offset:107865*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107865*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a000003; valaddr_reg:x3; val_offset:107868*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107868*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a000007; valaddr_reg:x3; val_offset:107871*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107871*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a00000f; valaddr_reg:x3; val_offset:107874*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107874*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a00001f; valaddr_reg:x3; val_offset:107877*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107877*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a00003f; valaddr_reg:x3; val_offset:107880*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107880*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a00007f; valaddr_reg:x3; val_offset:107883*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107883*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a0000ff; valaddr_reg:x3; val_offset:107886*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107886*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a0001ff; valaddr_reg:x3; val_offset:107889*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107889*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a0003ff; valaddr_reg:x3; val_offset:107892*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107892*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a0007ff; valaddr_reg:x3; val_offset:107895*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107895*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a000fff; valaddr_reg:x3; val_offset:107898*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107898*0 + 3*280*FLEN/8, x4, x1, x2) + +inst_35967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a001fff; valaddr_reg:x3; val_offset:107901*0 + 3*280*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107901*0 + 3*280*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753280,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753281,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753283,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753287,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753295,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753311,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753343,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753407,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753535,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753791,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390754303,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390755327,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390757375,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390761471,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390769663,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390786047,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390818815,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390884351,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391015423,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391277567,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391801855,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2392850431,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2394947583,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2394947584,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2397044736,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398093312,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398617600,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398879744,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399010816,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399076352,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399109120,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399125504,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399133696,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399137792,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399139840,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399140864,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141376,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141632,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141760,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141824,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141856,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141872,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141880,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141884,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141886,32,FLEN) +NAN_BOXED(2133930348,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141887,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986176,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986177,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986179,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986183,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986191,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986207,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986239,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986303,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986431,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071986687,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071987199,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071988223,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071990271,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2071994367,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2072002559,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2072018943,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2072051711,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2072117247,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2072248319,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2072510463,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2073034751,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2074083327,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2076180479,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2076180480,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2078277632,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2079326208,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2079850496,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080112640,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080243712,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080309248,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080342016,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080358400,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080366592,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080370688,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080372736,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080373760,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374272,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374528,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374656,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374720,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374752,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374768,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374776,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374780,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374782,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2080374783,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2133974587,32,FLEN) +NAN_BOXED(1069038068,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778384896,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778384897,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778384899,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778384903,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778384911,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778384927,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778384959,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778385023,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778385151,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778385407,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778385919,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778386943,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778388991,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778393087,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-282.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-282.S new file mode 100644 index 000000000..1d616161e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-282.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_35968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a003fff; valaddr_reg:x3; val_offset:107904*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107904*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a007fff; valaddr_reg:x3; val_offset:107907*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107907*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a00ffff; valaddr_reg:x3; val_offset:107910*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107910*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a01ffff; valaddr_reg:x3; val_offset:107913*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107913*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a03ffff; valaddr_reg:x3; val_offset:107916*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107916*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a07ffff; valaddr_reg:x3; val_offset:107919*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107919*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a0fffff; valaddr_reg:x3; val_offset:107922*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107922*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a1fffff; valaddr_reg:x3; val_offset:107925*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107925*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a3fffff; valaddr_reg:x3; val_offset:107928*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107928*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a400000; valaddr_reg:x3; val_offset:107931*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107931*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a600000; valaddr_reg:x3; val_offset:107934*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107934*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a700000; valaddr_reg:x3; val_offset:107937*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107937*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a780000; valaddr_reg:x3; val_offset:107940*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107940*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7c0000; valaddr_reg:x3; val_offset:107943*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107943*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7e0000; valaddr_reg:x3; val_offset:107946*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107946*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7f0000; valaddr_reg:x3; val_offset:107949*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107949*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7f8000; valaddr_reg:x3; val_offset:107952*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107952*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7fc000; valaddr_reg:x3; val_offset:107955*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107955*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7fe000; valaddr_reg:x3; val_offset:107958*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107958*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7ff000; valaddr_reg:x3; val_offset:107961*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107961*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7ff800; valaddr_reg:x3; val_offset:107964*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107964*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7ffc00; valaddr_reg:x3; val_offset:107967*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107967*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7ffe00; valaddr_reg:x3; val_offset:107970*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107970*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7fff00; valaddr_reg:x3; val_offset:107973*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107973*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7fff80; valaddr_reg:x3; val_offset:107976*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107976*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7fffc0; valaddr_reg:x3; val_offset:107979*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107979*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7fffe0; valaddr_reg:x3; val_offset:107982*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107982*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7ffff0; valaddr_reg:x3; val_offset:107985*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107985*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7ffff8; valaddr_reg:x3; val_offset:107988*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107988*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7ffffc; valaddr_reg:x3; val_offset:107991*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107991*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7ffffe; valaddr_reg:x3; val_offset:107994*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107994*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_35999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xd4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x6a7fffff; valaddr_reg:x3; val_offset:107997*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 107997*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f000001; valaddr_reg:x3; val_offset:108000*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108000*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f000003; valaddr_reg:x3; val_offset:108003*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108003*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f000007; valaddr_reg:x3; val_offset:108006*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108006*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f199999; valaddr_reg:x3; val_offset:108009*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108009*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f249249; valaddr_reg:x3; val_offset:108012*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108012*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f333333; valaddr_reg:x3; val_offset:108015*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108015*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:108018*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108018*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:108021*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108021*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f444444; valaddr_reg:x3; val_offset:108024*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108024*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:108027*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108027*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:108030*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108030*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f666666; valaddr_reg:x3; val_offset:108033*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108033*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:108036*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108036*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:108039*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108039*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:108042*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108042*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331865 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x36f6cb and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331865; op2val:0x3fb6f6cb; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:108045*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108045*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:108048*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108048*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:108051*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108051*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:108054*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108054*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:108057*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108057*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:108060*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108060*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:108063*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108063*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:108066*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108066*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:108069*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108069*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:108072*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108072*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:108075*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108075*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:108078*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108078*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:108081*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108081*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:108084*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108084*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:108087*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108087*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:108090*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108090*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:108093*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108093*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88800000; valaddr_reg:x3; val_offset:108096*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108096*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88800001; valaddr_reg:x3; val_offset:108099*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108099*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88800003; valaddr_reg:x3; val_offset:108102*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108102*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88800007; valaddr_reg:x3; val_offset:108105*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108105*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8880000f; valaddr_reg:x3; val_offset:108108*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108108*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8880001f; valaddr_reg:x3; val_offset:108111*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108111*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8880003f; valaddr_reg:x3; val_offset:108114*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108114*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8880007f; valaddr_reg:x3; val_offset:108117*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108117*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x888000ff; valaddr_reg:x3; val_offset:108120*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108120*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x888001ff; valaddr_reg:x3; val_offset:108123*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108123*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x888003ff; valaddr_reg:x3; val_offset:108126*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108126*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x888007ff; valaddr_reg:x3; val_offset:108129*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108129*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88800fff; valaddr_reg:x3; val_offset:108132*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108132*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88801fff; valaddr_reg:x3; val_offset:108135*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108135*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88803fff; valaddr_reg:x3; val_offset:108138*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108138*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88807fff; valaddr_reg:x3; val_offset:108141*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108141*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8880ffff; valaddr_reg:x3; val_offset:108144*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108144*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8881ffff; valaddr_reg:x3; val_offset:108147*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108147*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8883ffff; valaddr_reg:x3; val_offset:108150*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108150*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x8887ffff; valaddr_reg:x3; val_offset:108153*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108153*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x888fffff; valaddr_reg:x3; val_offset:108156*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108156*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x889fffff; valaddr_reg:x3; val_offset:108159*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108159*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88bfffff; valaddr_reg:x3; val_offset:108162*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108162*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88c00000; valaddr_reg:x3; val_offset:108165*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108165*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88e00000; valaddr_reg:x3; val_offset:108168*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108168*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88f00000; valaddr_reg:x3; val_offset:108171*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108171*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88f80000; valaddr_reg:x3; val_offset:108174*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108174*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fc0000; valaddr_reg:x3; val_offset:108177*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108177*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fe0000; valaddr_reg:x3; val_offset:108180*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108180*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ff0000; valaddr_reg:x3; val_offset:108183*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108183*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ff8000; valaddr_reg:x3; val_offset:108186*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108186*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ffc000; valaddr_reg:x3; val_offset:108189*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108189*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ffe000; valaddr_reg:x3; val_offset:108192*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108192*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fff000; valaddr_reg:x3; val_offset:108195*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108195*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fff800; valaddr_reg:x3; val_offset:108198*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108198*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fffc00; valaddr_reg:x3; val_offset:108201*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108201*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fffe00; valaddr_reg:x3; val_offset:108204*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108204*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ffff00; valaddr_reg:x3; val_offset:108207*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108207*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ffff80; valaddr_reg:x3; val_offset:108210*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108210*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ffffc0; valaddr_reg:x3; val_offset:108213*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108213*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ffffe0; valaddr_reg:x3; val_offset:108216*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108216*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fffff0; valaddr_reg:x3; val_offset:108219*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108219*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fffff8; valaddr_reg:x3; val_offset:108222*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108222*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fffffc; valaddr_reg:x3; val_offset:108225*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108225*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88fffffe; valaddr_reg:x3; val_offset:108228*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108228*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x331aa5 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f331aa5; op2val:0x80000000; +op3val:0x88ffffff; valaddr_reg:x3; val_offset:108231*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108231*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:108234*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108234*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:108237*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108237*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:108240*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108240*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:108243*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108243*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:108246*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108246*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:108249*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108249*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:108252*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108252*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:108255*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108255*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:108258*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108258*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:108261*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108261*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:108264*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108264*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:108267*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108267*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:108270*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108270*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:108273*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108273*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:108276*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108276*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:108279*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108279*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86000000; valaddr_reg:x3; val_offset:108282*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108282*0 + 3*281*FLEN/8, x4, x1, x2) + +inst_36095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86000001; valaddr_reg:x3; val_offset:108285*0 + 3*281*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108285*0 + 3*281*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778401279,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778417663,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778450431,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778515967,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778647039,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1778909183,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1779433471,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1780482047,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1782579199,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1782579200,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1784676352,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1785724928,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786249216,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786511360,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786642432,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786707968,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786740736,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786757120,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786765312,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786769408,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786771456,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786772480,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786772992,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773248,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773376,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773440,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773472,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773488,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773496,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773500,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773502,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(1786773503,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2134055013,32,FLEN) +NAN_BOXED(1068955339,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089984,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089985,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089987,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089991,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089999,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090015,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090047,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090111,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090239,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290090495,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290091007,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290092031,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290094079,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290098175,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290106367,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290122751,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290155519,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290221055,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290352127,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290614271,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2291138559,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2292187135,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2294284287,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2294284288,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2296381440,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2297430016,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2297954304,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298216448,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298347520,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298413056,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298445824,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298462208,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298470400,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298474496,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298476544,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298477568,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478080,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478336,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478464,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478528,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478560,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478576,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478584,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478588,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478590,32,FLEN) +NAN_BOXED(2134055589,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478591,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146944,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146945,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-283.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-283.S new file mode 100644 index 000000000..426bd5e2d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-283.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_36096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86000003; valaddr_reg:x3; val_offset:108288*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108288*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86000007; valaddr_reg:x3; val_offset:108291*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108291*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x8600000f; valaddr_reg:x3; val_offset:108294*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108294*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x8600001f; valaddr_reg:x3; val_offset:108297*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108297*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x8600003f; valaddr_reg:x3; val_offset:108300*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108300*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x8600007f; valaddr_reg:x3; val_offset:108303*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108303*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x860000ff; valaddr_reg:x3; val_offset:108306*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108306*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x860001ff; valaddr_reg:x3; val_offset:108309*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108309*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x860003ff; valaddr_reg:x3; val_offset:108312*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108312*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x860007ff; valaddr_reg:x3; val_offset:108315*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108315*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86000fff; valaddr_reg:x3; val_offset:108318*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108318*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86001fff; valaddr_reg:x3; val_offset:108321*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108321*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86003fff; valaddr_reg:x3; val_offset:108324*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108324*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86007fff; valaddr_reg:x3; val_offset:108327*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108327*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x8600ffff; valaddr_reg:x3; val_offset:108330*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108330*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x8601ffff; valaddr_reg:x3; val_offset:108333*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108333*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x8603ffff; valaddr_reg:x3; val_offset:108336*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108336*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x8607ffff; valaddr_reg:x3; val_offset:108339*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108339*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x860fffff; valaddr_reg:x3; val_offset:108342*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108342*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x861fffff; valaddr_reg:x3; val_offset:108345*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108345*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x863fffff; valaddr_reg:x3; val_offset:108348*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108348*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86400000; valaddr_reg:x3; val_offset:108351*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108351*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86600000; valaddr_reg:x3; val_offset:108354*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108354*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86700000; valaddr_reg:x3; val_offset:108357*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108357*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x86780000; valaddr_reg:x3; val_offset:108360*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108360*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867c0000; valaddr_reg:x3; val_offset:108363*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108363*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867e0000; valaddr_reg:x3; val_offset:108366*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108366*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867f0000; valaddr_reg:x3; val_offset:108369*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108369*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867f8000; valaddr_reg:x3; val_offset:108372*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108372*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867fc000; valaddr_reg:x3; val_offset:108375*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108375*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867fe000; valaddr_reg:x3; val_offset:108378*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108378*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867ff000; valaddr_reg:x3; val_offset:108381*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108381*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867ff800; valaddr_reg:x3; val_offset:108384*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108384*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867ffc00; valaddr_reg:x3; val_offset:108387*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108387*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867ffe00; valaddr_reg:x3; val_offset:108390*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108390*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867fff00; valaddr_reg:x3; val_offset:108393*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108393*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867fff80; valaddr_reg:x3; val_offset:108396*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108396*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867fffc0; valaddr_reg:x3; val_offset:108399*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108399*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867fffe0; valaddr_reg:x3; val_offset:108402*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108402*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867ffff0; valaddr_reg:x3; val_offset:108405*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108405*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867ffff8; valaddr_reg:x3; val_offset:108408*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108408*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867ffffc; valaddr_reg:x3; val_offset:108411*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108411*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867ffffe; valaddr_reg:x3; val_offset:108414*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108414*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x336233 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f336233; op2val:0x80000000; +op3val:0x867fffff; valaddr_reg:x3; val_offset:108417*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108417*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:108420*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108420*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:108423*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108423*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:108426*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108426*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:108429*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108429*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:108432*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108432*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:108435*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108435*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:108438*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108438*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:108441*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108441*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:108444*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108444*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:108447*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108447*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:108450*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108450*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:108453*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108453*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:108456*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108456*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:108459*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108459*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:108462*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108462*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:108465*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108465*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f800000; valaddr_reg:x3; val_offset:108468*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108468*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f800001; valaddr_reg:x3; val_offset:108471*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108471*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f800003; valaddr_reg:x3; val_offset:108474*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108474*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f800007; valaddr_reg:x3; val_offset:108477*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108477*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f80000f; valaddr_reg:x3; val_offset:108480*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108480*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f80001f; valaddr_reg:x3; val_offset:108483*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108483*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f80003f; valaddr_reg:x3; val_offset:108486*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108486*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f80007f; valaddr_reg:x3; val_offset:108489*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108489*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f8000ff; valaddr_reg:x3; val_offset:108492*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108492*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f8001ff; valaddr_reg:x3; val_offset:108495*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108495*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f8003ff; valaddr_reg:x3; val_offset:108498*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108498*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f8007ff; valaddr_reg:x3; val_offset:108501*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108501*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f800fff; valaddr_reg:x3; val_offset:108504*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108504*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f801fff; valaddr_reg:x3; val_offset:108507*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108507*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f803fff; valaddr_reg:x3; val_offset:108510*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108510*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f807fff; valaddr_reg:x3; val_offset:108513*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108513*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f80ffff; valaddr_reg:x3; val_offset:108516*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108516*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f81ffff; valaddr_reg:x3; val_offset:108519*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108519*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f83ffff; valaddr_reg:x3; val_offset:108522*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108522*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f87ffff; valaddr_reg:x3; val_offset:108525*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108525*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f8fffff; valaddr_reg:x3; val_offset:108528*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108528*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8f9fffff; valaddr_reg:x3; val_offset:108531*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108531*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fbfffff; valaddr_reg:x3; val_offset:108534*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108534*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fc00000; valaddr_reg:x3; val_offset:108537*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108537*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fe00000; valaddr_reg:x3; val_offset:108540*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108540*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ff00000; valaddr_reg:x3; val_offset:108543*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108543*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ff80000; valaddr_reg:x3; val_offset:108546*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108546*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffc0000; valaddr_reg:x3; val_offset:108549*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108549*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffe0000; valaddr_reg:x3; val_offset:108552*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108552*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fff0000; valaddr_reg:x3; val_offset:108555*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108555*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fff8000; valaddr_reg:x3; val_offset:108558*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108558*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fffc000; valaddr_reg:x3; val_offset:108561*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108561*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fffe000; valaddr_reg:x3; val_offset:108564*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108564*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffff000; valaddr_reg:x3; val_offset:108567*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108567*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffff800; valaddr_reg:x3; val_offset:108570*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108570*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffffc00; valaddr_reg:x3; val_offset:108573*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108573*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffffe00; valaddr_reg:x3; val_offset:108576*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108576*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fffff00; valaddr_reg:x3; val_offset:108579*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108579*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fffff80; valaddr_reg:x3; val_offset:108582*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108582*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fffffc0; valaddr_reg:x3; val_offset:108585*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108585*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fffffe0; valaddr_reg:x3; val_offset:108588*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108588*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffffff0; valaddr_reg:x3; val_offset:108591*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108591*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffffff8; valaddr_reg:x3; val_offset:108594*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108594*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffffffc; valaddr_reg:x3; val_offset:108597*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108597*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8ffffffe; valaddr_reg:x3; val_offset:108600*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108600*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x339ee3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f339ee3; op2val:0x80000000; +op3val:0x8fffffff; valaddr_reg:x3; val_offset:108603*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108603*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:108606*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108606*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:108609*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108609*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:108612*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108612*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:108615*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108615*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:108618*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108618*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:108621*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108621*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:108624*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108624*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:108627*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108627*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:108630*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108630*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:108633*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108633*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:108636*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108636*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:108639*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108639*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:108642*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108642*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:108645*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108645*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:108648*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108648*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:108651*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108651*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f000000; valaddr_reg:x3; val_offset:108654*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108654*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f000001; valaddr_reg:x3; val_offset:108657*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108657*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f000003; valaddr_reg:x3; val_offset:108660*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108660*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f000007; valaddr_reg:x3; val_offset:108663*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108663*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f00000f; valaddr_reg:x3; val_offset:108666*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108666*0 + 3*282*FLEN/8, x4, x1, x2) + +inst_36223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f00001f; valaddr_reg:x3; val_offset:108669*0 + 3*282*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108669*0 + 3*282*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146947,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146951,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146959,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146975,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147007,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147071,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147199,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147455,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147967,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248148991,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248151039,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248155135,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248163327,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248179711,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248212479,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248278015,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248409087,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248671231,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2249195519,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2250244095,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2252341247,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2252341248,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2254438400,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2255486976,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256011264,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256273408,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256404480,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256470016,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256502784,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256519168,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256527360,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256531456,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256533504,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256534528,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535040,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535296,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535424,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535488,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535520,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535536,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535544,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535548,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535550,32,FLEN) +NAN_BOXED(2134073907,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535551,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530496,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530497,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530499,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530503,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530511,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530527,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530559,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530623,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530751,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407531007,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407531519,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407532543,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407534591,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407538687,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407546879,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407563263,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407596031,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407661567,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407792639,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2408054783,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2408579071,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2409627647,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2411724799,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2411724800,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2413821952,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2414870528,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415394816,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415656960,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415788032,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415853568,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415886336,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415902720,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415910912,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415915008,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415917056,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918080,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918592,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918848,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918976,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919040,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919072,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919088,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919096,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919100,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919102,32,FLEN) +NAN_BOXED(2134089443,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919103,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141888,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141889,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141891,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141895,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141903,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141919,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-284.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-284.S new file mode 100644 index 000000000..9ba49a436 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-284.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_36224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f00003f; valaddr_reg:x3; val_offset:108672*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108672*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f00007f; valaddr_reg:x3; val_offset:108675*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108675*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f0000ff; valaddr_reg:x3; val_offset:108678*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108678*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f0001ff; valaddr_reg:x3; val_offset:108681*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108681*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f0003ff; valaddr_reg:x3; val_offset:108684*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108684*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f0007ff; valaddr_reg:x3; val_offset:108687*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108687*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f000fff; valaddr_reg:x3; val_offset:108690*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108690*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f001fff; valaddr_reg:x3; val_offset:108693*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108693*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f003fff; valaddr_reg:x3; val_offset:108696*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108696*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f007fff; valaddr_reg:x3; val_offset:108699*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108699*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f00ffff; valaddr_reg:x3; val_offset:108702*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108702*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f01ffff; valaddr_reg:x3; val_offset:108705*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108705*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f03ffff; valaddr_reg:x3; val_offset:108708*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108708*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f07ffff; valaddr_reg:x3; val_offset:108711*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108711*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f0fffff; valaddr_reg:x3; val_offset:108714*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108714*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f1fffff; valaddr_reg:x3; val_offset:108717*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108717*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f3fffff; valaddr_reg:x3; val_offset:108720*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108720*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f400000; valaddr_reg:x3; val_offset:108723*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108723*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f600000; valaddr_reg:x3; val_offset:108726*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108726*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f700000; valaddr_reg:x3; val_offset:108729*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108729*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f780000; valaddr_reg:x3; val_offset:108732*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108732*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7c0000; valaddr_reg:x3; val_offset:108735*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108735*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7e0000; valaddr_reg:x3; val_offset:108738*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108738*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7f0000; valaddr_reg:x3; val_offset:108741*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108741*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7f8000; valaddr_reg:x3; val_offset:108744*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108744*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7fc000; valaddr_reg:x3; val_offset:108747*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108747*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7fe000; valaddr_reg:x3; val_offset:108750*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108750*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7ff000; valaddr_reg:x3; val_offset:108753*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108753*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7ff800; valaddr_reg:x3; val_offset:108756*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108756*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:108759*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108759*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:108762*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108762*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7fff00; valaddr_reg:x3; val_offset:108765*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108765*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7fff80; valaddr_reg:x3; val_offset:108768*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108768*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:108771*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108771*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:108774*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108774*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:108777*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108777*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:108780*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108780*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:108783*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108783*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:108786*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108786*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33aa37 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33aa37; op2val:0x80000000; +op3val:0x8f7fffff; valaddr_reg:x3; val_offset:108789*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108789*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33000000; valaddr_reg:x3; val_offset:108792*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108792*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33000001; valaddr_reg:x3; val_offset:108795*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108795*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33000003; valaddr_reg:x3; val_offset:108798*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108798*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33000007; valaddr_reg:x3; val_offset:108801*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108801*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3300000f; valaddr_reg:x3; val_offset:108804*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108804*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3300001f; valaddr_reg:x3; val_offset:108807*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108807*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3300003f; valaddr_reg:x3; val_offset:108810*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108810*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3300007f; valaddr_reg:x3; val_offset:108813*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108813*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x330000ff; valaddr_reg:x3; val_offset:108816*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108816*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x330001ff; valaddr_reg:x3; val_offset:108819*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108819*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x330003ff; valaddr_reg:x3; val_offset:108822*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108822*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x330007ff; valaddr_reg:x3; val_offset:108825*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108825*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33000fff; valaddr_reg:x3; val_offset:108828*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108828*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33001fff; valaddr_reg:x3; val_offset:108831*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108831*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33003fff; valaddr_reg:x3; val_offset:108834*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108834*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33007fff; valaddr_reg:x3; val_offset:108837*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108837*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3300ffff; valaddr_reg:x3; val_offset:108840*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108840*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3301ffff; valaddr_reg:x3; val_offset:108843*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108843*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3303ffff; valaddr_reg:x3; val_offset:108846*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108846*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3307ffff; valaddr_reg:x3; val_offset:108849*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108849*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x330fffff; valaddr_reg:x3; val_offset:108852*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108852*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x331fffff; valaddr_reg:x3; val_offset:108855*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108855*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x333fffff; valaddr_reg:x3; val_offset:108858*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108858*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33400000; valaddr_reg:x3; val_offset:108861*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108861*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33600000; valaddr_reg:x3; val_offset:108864*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108864*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33700000; valaddr_reg:x3; val_offset:108867*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108867*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x33780000; valaddr_reg:x3; val_offset:108870*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108870*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337c0000; valaddr_reg:x3; val_offset:108873*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108873*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337e0000; valaddr_reg:x3; val_offset:108876*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108876*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337f0000; valaddr_reg:x3; val_offset:108879*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108879*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337f8000; valaddr_reg:x3; val_offset:108882*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108882*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337fc000; valaddr_reg:x3; val_offset:108885*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108885*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337fe000; valaddr_reg:x3; val_offset:108888*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108888*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337ff000; valaddr_reg:x3; val_offset:108891*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108891*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337ff800; valaddr_reg:x3; val_offset:108894*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108894*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337ffc00; valaddr_reg:x3; val_offset:108897*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108897*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337ffe00; valaddr_reg:x3; val_offset:108900*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108900*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337fff00; valaddr_reg:x3; val_offset:108903*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108903*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337fff80; valaddr_reg:x3; val_offset:108906*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108906*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337fffc0; valaddr_reg:x3; val_offset:108909*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108909*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337fffe0; valaddr_reg:x3; val_offset:108912*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108912*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337ffff0; valaddr_reg:x3; val_offset:108915*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108915*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337ffff8; valaddr_reg:x3; val_offset:108918*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108918*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337ffffc; valaddr_reg:x3; val_offset:108921*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108921*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337ffffe; valaddr_reg:x3; val_offset:108924*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108924*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x66 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x337fffff; valaddr_reg:x3; val_offset:108927*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108927*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3f800001; valaddr_reg:x3; val_offset:108930*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108930*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3f800003; valaddr_reg:x3; val_offset:108933*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108933*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3f800007; valaddr_reg:x3; val_offset:108936*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108936*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3f999999; valaddr_reg:x3; val_offset:108939*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108939*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:108942*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108942*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:108945*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108945*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:108948*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108948*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:108951*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108951*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:108954*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108954*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:108957*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108957*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:108960*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108960*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:108963*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108963*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:108966*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108966*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:108969*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108969*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:108972*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108972*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33cfd0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2d8f0a and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33cfd0; op2val:0x2d8f0a; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:108975*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108975*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7000000; valaddr_reg:x3; val_offset:108978*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108978*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7000001; valaddr_reg:x3; val_offset:108981*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108981*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7000003; valaddr_reg:x3; val_offset:108984*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108984*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7000007; valaddr_reg:x3; val_offset:108987*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108987*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe700000f; valaddr_reg:x3; val_offset:108990*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108990*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe700001f; valaddr_reg:x3; val_offset:108993*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108993*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe700003f; valaddr_reg:x3; val_offset:108996*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108996*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe700007f; valaddr_reg:x3; val_offset:108999*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 108999*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe70000ff; valaddr_reg:x3; val_offset:109002*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109002*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe70001ff; valaddr_reg:x3; val_offset:109005*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109005*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe70003ff; valaddr_reg:x3; val_offset:109008*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109008*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe70007ff; valaddr_reg:x3; val_offset:109011*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109011*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7000fff; valaddr_reg:x3; val_offset:109014*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109014*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7001fff; valaddr_reg:x3; val_offset:109017*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109017*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7003fff; valaddr_reg:x3; val_offset:109020*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109020*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7007fff; valaddr_reg:x3; val_offset:109023*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109023*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe700ffff; valaddr_reg:x3; val_offset:109026*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109026*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe701ffff; valaddr_reg:x3; val_offset:109029*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109029*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe703ffff; valaddr_reg:x3; val_offset:109032*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109032*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe707ffff; valaddr_reg:x3; val_offset:109035*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109035*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe70fffff; valaddr_reg:x3; val_offset:109038*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109038*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe71fffff; valaddr_reg:x3; val_offset:109041*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109041*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe73fffff; valaddr_reg:x3; val_offset:109044*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109044*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7400000; valaddr_reg:x3; val_offset:109047*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109047*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7600000; valaddr_reg:x3; val_offset:109050*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109050*0 + 3*283*FLEN/8, x4, x1, x2) + +inst_36351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7700000; valaddr_reg:x3; val_offset:109053*0 + 3*283*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109053*0 + 3*283*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141951,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142015,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142143,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142399,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142911,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399143935,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399145983,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399150079,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399158271,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399174655,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399207423,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399272959,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399404031,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399666175,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2400190463,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2401239039,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2403336191,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2403336192,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2405433344,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2406481920,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407006208,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407268352,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407399424,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407464960,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407497728,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407514112,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407522304,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407526400,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407528448,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407529472,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407529984,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530240,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530368,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530432,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530464,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530480,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530488,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530492,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530494,32,FLEN) +NAN_BOXED(2134092343,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530495,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638016,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638017,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638019,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638023,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638031,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638047,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638079,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638143,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638271,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855638527,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855639039,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855640063,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855642111,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855646207,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855654399,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855670783,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855703551,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855769087,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(855900159,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(856162303,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(856686591,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(857735167,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(859832319,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(859832320,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(861929472,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(862978048,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(863502336,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(863764480,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(863895552,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(863961088,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(863993856,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864010240,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864018432,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864022528,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864024576,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864025600,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026112,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026368,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026496,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026560,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026592,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026608,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026616,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026620,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026622,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(864026623,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2134101968,32,FLEN) +NAN_BOXED(2985738,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875536896,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875536897,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875536899,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875536903,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875536911,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875536927,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875536959,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875537023,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875537151,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875537407,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875537919,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875538943,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875540991,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875545087,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875553279,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875569663,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875602431,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875667967,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3875799039,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3876061183,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3876585471,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3877634047,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3879731199,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3879731200,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3881828352,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3882876928,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-285.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-285.S new file mode 100644 index 000000000..5fe21491f --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-285.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_36352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe7780000; valaddr_reg:x3; val_offset:109056*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109056*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77c0000; valaddr_reg:x3; val_offset:109059*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109059*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77e0000; valaddr_reg:x3; val_offset:109062*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109062*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77f0000; valaddr_reg:x3; val_offset:109065*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109065*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77f8000; valaddr_reg:x3; val_offset:109068*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109068*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77fc000; valaddr_reg:x3; val_offset:109071*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109071*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77fe000; valaddr_reg:x3; val_offset:109074*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109074*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77ff000; valaddr_reg:x3; val_offset:109077*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109077*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77ff800; valaddr_reg:x3; val_offset:109080*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109080*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77ffc00; valaddr_reg:x3; val_offset:109083*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109083*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77ffe00; valaddr_reg:x3; val_offset:109086*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109086*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77fff00; valaddr_reg:x3; val_offset:109089*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109089*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77fff80; valaddr_reg:x3; val_offset:109092*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109092*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77fffc0; valaddr_reg:x3; val_offset:109095*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109095*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77fffe0; valaddr_reg:x3; val_offset:109098*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109098*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77ffff0; valaddr_reg:x3; val_offset:109101*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109101*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77ffff8; valaddr_reg:x3; val_offset:109104*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109104*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77ffffc; valaddr_reg:x3; val_offset:109107*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109107*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77ffffe; valaddr_reg:x3; val_offset:109110*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109110*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xce and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xe77fffff; valaddr_reg:x3; val_offset:109113*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109113*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff000001; valaddr_reg:x3; val_offset:109116*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109116*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff000003; valaddr_reg:x3; val_offset:109119*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109119*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff000007; valaddr_reg:x3; val_offset:109122*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109122*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff199999; valaddr_reg:x3; val_offset:109125*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109125*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff249249; valaddr_reg:x3; val_offset:109128*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109128*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff333333; valaddr_reg:x3; val_offset:109131*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109131*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:109134*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109134*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:109137*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109137*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff444444; valaddr_reg:x3; val_offset:109140*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109140*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:109143*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109143*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:109146*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109146*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff666666; valaddr_reg:x3; val_offset:109149*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109149*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:109152*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109152*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:109155*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109155*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:109158*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109158*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x33ec90 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x361f09 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f33ec90; op2val:0xbfb61f09; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:109161*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109161*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:109164*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109164*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:109167*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109167*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:109170*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109170*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:109173*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109173*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:109176*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109176*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:109179*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109179*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:109182*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109182*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:109185*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109185*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:109188*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109188*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:109191*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109191*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:109194*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109194*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:109197*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109197*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:109200*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109200*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:109203*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109203*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:109206*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109206*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:109209*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109209*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87800000; valaddr_reg:x3; val_offset:109212*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109212*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87800001; valaddr_reg:x3; val_offset:109215*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109215*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87800003; valaddr_reg:x3; val_offset:109218*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109218*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87800007; valaddr_reg:x3; val_offset:109221*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109221*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x8780000f; valaddr_reg:x3; val_offset:109224*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109224*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x8780001f; valaddr_reg:x3; val_offset:109227*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109227*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x8780003f; valaddr_reg:x3; val_offset:109230*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109230*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x8780007f; valaddr_reg:x3; val_offset:109233*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109233*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x878000ff; valaddr_reg:x3; val_offset:109236*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109236*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x878001ff; valaddr_reg:x3; val_offset:109239*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109239*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x878003ff; valaddr_reg:x3; val_offset:109242*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109242*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x878007ff; valaddr_reg:x3; val_offset:109245*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109245*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87800fff; valaddr_reg:x3; val_offset:109248*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109248*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87801fff; valaddr_reg:x3; val_offset:109251*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109251*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87803fff; valaddr_reg:x3; val_offset:109254*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109254*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87807fff; valaddr_reg:x3; val_offset:109257*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109257*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x8780ffff; valaddr_reg:x3; val_offset:109260*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109260*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x8781ffff; valaddr_reg:x3; val_offset:109263*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109263*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x8783ffff; valaddr_reg:x3; val_offset:109266*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109266*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x8787ffff; valaddr_reg:x3; val_offset:109269*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109269*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x878fffff; valaddr_reg:x3; val_offset:109272*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109272*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x879fffff; valaddr_reg:x3; val_offset:109275*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109275*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87bfffff; valaddr_reg:x3; val_offset:109278*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109278*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87c00000; valaddr_reg:x3; val_offset:109281*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109281*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87e00000; valaddr_reg:x3; val_offset:109284*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109284*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87f00000; valaddr_reg:x3; val_offset:109287*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109287*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87f80000; valaddr_reg:x3; val_offset:109290*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109290*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fc0000; valaddr_reg:x3; val_offset:109293*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109293*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fe0000; valaddr_reg:x3; val_offset:109296*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109296*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ff0000; valaddr_reg:x3; val_offset:109299*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109299*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ff8000; valaddr_reg:x3; val_offset:109302*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109302*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ffc000; valaddr_reg:x3; val_offset:109305*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109305*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ffe000; valaddr_reg:x3; val_offset:109308*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109308*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fff000; valaddr_reg:x3; val_offset:109311*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109311*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fff800; valaddr_reg:x3; val_offset:109314*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109314*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fffc00; valaddr_reg:x3; val_offset:109317*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109317*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fffe00; valaddr_reg:x3; val_offset:109320*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109320*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ffff00; valaddr_reg:x3; val_offset:109323*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109323*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ffff80; valaddr_reg:x3; val_offset:109326*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109326*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ffffc0; valaddr_reg:x3; val_offset:109329*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109329*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ffffe0; valaddr_reg:x3; val_offset:109332*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109332*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fffff0; valaddr_reg:x3; val_offset:109335*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109335*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fffff8; valaddr_reg:x3; val_offset:109338*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109338*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fffffc; valaddr_reg:x3; val_offset:109341*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109341*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87fffffe; valaddr_reg:x3; val_offset:109344*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109344*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3565fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3565fc; op2val:0x80000000; +op3val:0x87ffffff; valaddr_reg:x3; val_offset:109347*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109347*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5800000; valaddr_reg:x3; val_offset:109350*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109350*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5800001; valaddr_reg:x3; val_offset:109353*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109353*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5800003; valaddr_reg:x3; val_offset:109356*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109356*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5800007; valaddr_reg:x3; val_offset:109359*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109359*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb580000f; valaddr_reg:x3; val_offset:109362*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109362*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb580001f; valaddr_reg:x3; val_offset:109365*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109365*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb580003f; valaddr_reg:x3; val_offset:109368*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109368*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb580007f; valaddr_reg:x3; val_offset:109371*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109371*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb58000ff; valaddr_reg:x3; val_offset:109374*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109374*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb58001ff; valaddr_reg:x3; val_offset:109377*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109377*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb58003ff; valaddr_reg:x3; val_offset:109380*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109380*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb58007ff; valaddr_reg:x3; val_offset:109383*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109383*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5800fff; valaddr_reg:x3; val_offset:109386*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109386*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5801fff; valaddr_reg:x3; val_offset:109389*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109389*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5803fff; valaddr_reg:x3; val_offset:109392*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109392*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5807fff; valaddr_reg:x3; val_offset:109395*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109395*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb580ffff; valaddr_reg:x3; val_offset:109398*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109398*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb581ffff; valaddr_reg:x3; val_offset:109401*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109401*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb583ffff; valaddr_reg:x3; val_offset:109404*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109404*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb587ffff; valaddr_reg:x3; val_offset:109407*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109407*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb58fffff; valaddr_reg:x3; val_offset:109410*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109410*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb59fffff; valaddr_reg:x3; val_offset:109413*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109413*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5bfffff; valaddr_reg:x3; val_offset:109416*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109416*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5c00000; valaddr_reg:x3; val_offset:109419*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109419*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5e00000; valaddr_reg:x3; val_offset:109422*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109422*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5f00000; valaddr_reg:x3; val_offset:109425*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109425*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5f80000; valaddr_reg:x3; val_offset:109428*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109428*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fc0000; valaddr_reg:x3; val_offset:109431*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109431*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fe0000; valaddr_reg:x3; val_offset:109434*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109434*0 + 3*284*FLEN/8, x4, x1, x2) + +inst_36479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ff0000; valaddr_reg:x3; val_offset:109437*0 + 3*284*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109437*0 + 3*284*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883401216,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883663360,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883794432,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883859968,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883892736,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883909120,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883917312,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883921408,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883923456,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883924480,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883924992,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925248,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925376,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925440,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925472,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925488,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925496,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925500,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925502,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(3883925503,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2134109328,32,FLEN) +NAN_BOXED(3216383753,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312768,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312769,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312771,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312775,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312783,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312799,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312831,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312895,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313023,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313279,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313791,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273314815,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273316863,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273320959,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273329151,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273345535,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273378303,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273443839,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273574911,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273837055,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2274361343,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2275409919,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2277507071,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2277507072,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2279604224,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2280652800,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281177088,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281439232,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281570304,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281635840,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281668608,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281684992,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281693184,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281697280,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281699328,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281700352,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281700864,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701120,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701248,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701312,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701344,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701360,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701368,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701372,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701374,32,FLEN) +NAN_BOXED(2134205948,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701375,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064704,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064705,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064707,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064711,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064719,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064735,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064767,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064831,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045064959,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045065215,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045065727,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045066751,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045068799,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045072895,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045081087,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045097471,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045130239,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045195775,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045326847,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3045588991,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3046113279,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3047161855,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3049259007,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3049259008,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3051356160,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3052404736,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3052929024,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053191168,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053322240,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053387776,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-286.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-286.S new file mode 100644 index 000000000..9894e1998 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-286.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_36480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ff8000; valaddr_reg:x3; val_offset:109440*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109440*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ffc000; valaddr_reg:x3; val_offset:109443*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109443*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ffe000; valaddr_reg:x3; val_offset:109446*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109446*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fff000; valaddr_reg:x3; val_offset:109449*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109449*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fff800; valaddr_reg:x3; val_offset:109452*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109452*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fffc00; valaddr_reg:x3; val_offset:109455*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109455*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fffe00; valaddr_reg:x3; val_offset:109458*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109458*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ffff00; valaddr_reg:x3; val_offset:109461*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109461*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ffff80; valaddr_reg:x3; val_offset:109464*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109464*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ffffc0; valaddr_reg:x3; val_offset:109467*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109467*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ffffe0; valaddr_reg:x3; val_offset:109470*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109470*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fffff0; valaddr_reg:x3; val_offset:109473*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109473*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fffff8; valaddr_reg:x3; val_offset:109476*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109476*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fffffc; valaddr_reg:x3; val_offset:109479*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109479*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5fffffe; valaddr_reg:x3; val_offset:109482*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109482*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x6b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xb5ffffff; valaddr_reg:x3; val_offset:109485*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109485*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbf800001; valaddr_reg:x3; val_offset:109488*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109488*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbf800003; valaddr_reg:x3; val_offset:109491*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109491*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbf800007; valaddr_reg:x3; val_offset:109494*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109494*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbf999999; valaddr_reg:x3; val_offset:109497*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109497*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:109500*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109500*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:109503*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109503*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:109506*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109506*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:109509*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109509*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:109512*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109512*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:109515*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109515*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:109518*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109518*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:109521*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109521*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:109524*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109524*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:109527*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109527*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:109530*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109530*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x365028 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2cef05 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f365028; op2val:0x802cef05; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:109533*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109533*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1000000; valaddr_reg:x3; val_offset:109536*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109536*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1000001; valaddr_reg:x3; val_offset:109539*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109539*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1000003; valaddr_reg:x3; val_offset:109542*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109542*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1000007; valaddr_reg:x3; val_offset:109545*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109545*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe100000f; valaddr_reg:x3; val_offset:109548*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109548*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe100001f; valaddr_reg:x3; val_offset:109551*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109551*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe100003f; valaddr_reg:x3; val_offset:109554*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109554*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe100007f; valaddr_reg:x3; val_offset:109557*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109557*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe10000ff; valaddr_reg:x3; val_offset:109560*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109560*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe10001ff; valaddr_reg:x3; val_offset:109563*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109563*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe10003ff; valaddr_reg:x3; val_offset:109566*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109566*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe10007ff; valaddr_reg:x3; val_offset:109569*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109569*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1000fff; valaddr_reg:x3; val_offset:109572*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109572*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1001fff; valaddr_reg:x3; val_offset:109575*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109575*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1003fff; valaddr_reg:x3; val_offset:109578*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109578*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1007fff; valaddr_reg:x3; val_offset:109581*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109581*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe100ffff; valaddr_reg:x3; val_offset:109584*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109584*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe101ffff; valaddr_reg:x3; val_offset:109587*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109587*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe103ffff; valaddr_reg:x3; val_offset:109590*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109590*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe107ffff; valaddr_reg:x3; val_offset:109593*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109593*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe10fffff; valaddr_reg:x3; val_offset:109596*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109596*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe11fffff; valaddr_reg:x3; val_offset:109599*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109599*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe13fffff; valaddr_reg:x3; val_offset:109602*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109602*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1400000; valaddr_reg:x3; val_offset:109605*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109605*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1600000; valaddr_reg:x3; val_offset:109608*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109608*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1700000; valaddr_reg:x3; val_offset:109611*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109611*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe1780000; valaddr_reg:x3; val_offset:109614*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109614*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17c0000; valaddr_reg:x3; val_offset:109617*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109617*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17e0000; valaddr_reg:x3; val_offset:109620*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109620*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17f0000; valaddr_reg:x3; val_offset:109623*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109623*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17f8000; valaddr_reg:x3; val_offset:109626*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109626*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17fc000; valaddr_reg:x3; val_offset:109629*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109629*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17fe000; valaddr_reg:x3; val_offset:109632*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109632*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17ff000; valaddr_reg:x3; val_offset:109635*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109635*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17ff800; valaddr_reg:x3; val_offset:109638*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109638*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17ffc00; valaddr_reg:x3; val_offset:109641*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109641*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17ffe00; valaddr_reg:x3; val_offset:109644*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109644*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17fff00; valaddr_reg:x3; val_offset:109647*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109647*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17fff80; valaddr_reg:x3; val_offset:109650*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109650*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17fffc0; valaddr_reg:x3; val_offset:109653*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109653*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17fffe0; valaddr_reg:x3; val_offset:109656*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109656*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17ffff0; valaddr_reg:x3; val_offset:109659*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109659*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17ffff8; valaddr_reg:x3; val_offset:109662*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109662*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17ffffc; valaddr_reg:x3; val_offset:109665*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109665*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17ffffe; valaddr_reg:x3; val_offset:109668*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109668*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xc2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xe17fffff; valaddr_reg:x3; val_offset:109671*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109671*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff000001; valaddr_reg:x3; val_offset:109674*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109674*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff000003; valaddr_reg:x3; val_offset:109677*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109677*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff000007; valaddr_reg:x3; val_offset:109680*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109680*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff199999; valaddr_reg:x3; val_offset:109683*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109683*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff249249; valaddr_reg:x3; val_offset:109686*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109686*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff333333; valaddr_reg:x3; val_offset:109689*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109689*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:109692*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109692*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:109695*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109695*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff444444; valaddr_reg:x3; val_offset:109698*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109698*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:109701*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109701*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:109704*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109704*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff666666; valaddr_reg:x3; val_offset:109707*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109707*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:109710*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109710*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:109713*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109713*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:109716*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109716*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x367396 and fs2 == 1 and fe2 == 0x7f and fm2 == 0x339930 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f367396; op2val:0xbfb39930; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:109719*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109719*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d800000; valaddr_reg:x3; val_offset:109722*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109722*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d800001; valaddr_reg:x3; val_offset:109725*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109725*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d800003; valaddr_reg:x3; val_offset:109728*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109728*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d800007; valaddr_reg:x3; val_offset:109731*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109731*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d80000f; valaddr_reg:x3; val_offset:109734*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109734*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d80001f; valaddr_reg:x3; val_offset:109737*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109737*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d80003f; valaddr_reg:x3; val_offset:109740*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109740*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d80007f; valaddr_reg:x3; val_offset:109743*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109743*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d8000ff; valaddr_reg:x3; val_offset:109746*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109746*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d8001ff; valaddr_reg:x3; val_offset:109749*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109749*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d8003ff; valaddr_reg:x3; val_offset:109752*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109752*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d8007ff; valaddr_reg:x3; val_offset:109755*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109755*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d800fff; valaddr_reg:x3; val_offset:109758*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109758*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d801fff; valaddr_reg:x3; val_offset:109761*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109761*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d803fff; valaddr_reg:x3; val_offset:109764*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109764*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d807fff; valaddr_reg:x3; val_offset:109767*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109767*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d80ffff; valaddr_reg:x3; val_offset:109770*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109770*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d81ffff; valaddr_reg:x3; val_offset:109773*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109773*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d83ffff; valaddr_reg:x3; val_offset:109776*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109776*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d87ffff; valaddr_reg:x3; val_offset:109779*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109779*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d8fffff; valaddr_reg:x3; val_offset:109782*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109782*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5d9fffff; valaddr_reg:x3; val_offset:109785*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109785*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dbfffff; valaddr_reg:x3; val_offset:109788*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109788*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dc00000; valaddr_reg:x3; val_offset:109791*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109791*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5de00000; valaddr_reg:x3; val_offset:109794*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109794*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5df00000; valaddr_reg:x3; val_offset:109797*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109797*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5df80000; valaddr_reg:x3; val_offset:109800*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109800*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfc0000; valaddr_reg:x3; val_offset:109803*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109803*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfe0000; valaddr_reg:x3; val_offset:109806*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109806*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dff0000; valaddr_reg:x3; val_offset:109809*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109809*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dff8000; valaddr_reg:x3; val_offset:109812*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109812*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dffc000; valaddr_reg:x3; val_offset:109815*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109815*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dffe000; valaddr_reg:x3; val_offset:109818*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109818*0 + 3*285*FLEN/8, x4, x1, x2) + +inst_36607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfff000; valaddr_reg:x3; val_offset:109821*0 + 3*285*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109821*0 + 3*285*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053420544,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053436928,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053445120,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053449216,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053451264,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053452288,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053452800,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453056,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453184,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453248,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453280,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453296,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453304,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453308,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453310,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3053453311,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2134265896,32,FLEN) +NAN_BOXED(2150428421,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873600,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873601,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873603,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873607,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873615,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873631,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873663,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873727,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774873855,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774874111,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774874623,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774875647,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774877695,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774881791,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774889983,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774906367,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3774939135,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3775004671,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3775135743,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3775397887,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3775922175,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3776970751,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3779067903,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3779067904,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3781165056,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3782213632,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3782737920,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783000064,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783131136,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783196672,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783229440,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783245824,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783254016,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783258112,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783260160,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783261184,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783261696,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783261952,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783262080,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783262144,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783262176,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783262192,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783262200,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783262204,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783262206,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(3783262207,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2134274966,32,FLEN) +NAN_BOXED(3216218416,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669696,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669697,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669699,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669703,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669711,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669727,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669759,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669823,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568669951,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568670207,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568670719,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568671743,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568673791,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568677887,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568686079,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568702463,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568735231,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568800767,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1568931839,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1569193983,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1569718271,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1570766847,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1572863999,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1572864000,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1574961152,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1576009728,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1576534016,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1576796160,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1576927232,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1576992768,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577025536,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577041920,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577050112,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577054208,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-287.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-287.S new file mode 100644 index 000000000..848bc1c8c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-287.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_36608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfff800; valaddr_reg:x3; val_offset:109824*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109824*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfffc00; valaddr_reg:x3; val_offset:109827*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109827*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfffe00; valaddr_reg:x3; val_offset:109830*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109830*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dffff00; valaddr_reg:x3; val_offset:109833*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109833*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dffff80; valaddr_reg:x3; val_offset:109836*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109836*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dffffc0; valaddr_reg:x3; val_offset:109839*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109839*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dffffe0; valaddr_reg:x3; val_offset:109842*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109842*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfffff0; valaddr_reg:x3; val_offset:109845*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109845*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfffff8; valaddr_reg:x3; val_offset:109848*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109848*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfffffc; valaddr_reg:x3; val_offset:109851*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109851*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dfffffe; valaddr_reg:x3; val_offset:109854*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109854*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xbb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x5dffffff; valaddr_reg:x3; val_offset:109857*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109857*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f000001; valaddr_reg:x3; val_offset:109860*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109860*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f000003; valaddr_reg:x3; val_offset:109863*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109863*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f000007; valaddr_reg:x3; val_offset:109866*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109866*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f199999; valaddr_reg:x3; val_offset:109869*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109869*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f249249; valaddr_reg:x3; val_offset:109872*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109872*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f333333; valaddr_reg:x3; val_offset:109875*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109875*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:109878*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109878*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:109881*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109881*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f444444; valaddr_reg:x3; val_offset:109884*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109884*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:109887*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109887*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:109890*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109890*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f666666; valaddr_reg:x3; val_offset:109893*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109893*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:109896*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109896*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:109899*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109899*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:109902*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109902*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x37463a and fs2 == 0 and fe2 == 0x7f and fm2 == 0x32cac5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f37463a; op2val:0x3fb2cac5; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:109905*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109905*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f000000; valaddr_reg:x3; val_offset:109908*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109908*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f000001; valaddr_reg:x3; val_offset:109911*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109911*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f000003; valaddr_reg:x3; val_offset:109914*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109914*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f000007; valaddr_reg:x3; val_offset:109917*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109917*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f00000f; valaddr_reg:x3; val_offset:109920*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109920*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f00001f; valaddr_reg:x3; val_offset:109923*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109923*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f00003f; valaddr_reg:x3; val_offset:109926*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109926*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f00007f; valaddr_reg:x3; val_offset:109929*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109929*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f0000ff; valaddr_reg:x3; val_offset:109932*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109932*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f0001ff; valaddr_reg:x3; val_offset:109935*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109935*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f0003ff; valaddr_reg:x3; val_offset:109938*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109938*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f0007ff; valaddr_reg:x3; val_offset:109941*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109941*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f000fff; valaddr_reg:x3; val_offset:109944*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109944*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f001fff; valaddr_reg:x3; val_offset:109947*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109947*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f003fff; valaddr_reg:x3; val_offset:109950*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109950*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f007fff; valaddr_reg:x3; val_offset:109953*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109953*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f00ffff; valaddr_reg:x3; val_offset:109956*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109956*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f01ffff; valaddr_reg:x3; val_offset:109959*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109959*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f03ffff; valaddr_reg:x3; val_offset:109962*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109962*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f07ffff; valaddr_reg:x3; val_offset:109965*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109965*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f0fffff; valaddr_reg:x3; val_offset:109968*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109968*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f1fffff; valaddr_reg:x3; val_offset:109971*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109971*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f3fffff; valaddr_reg:x3; val_offset:109974*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109974*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f400000; valaddr_reg:x3; val_offset:109977*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109977*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f600000; valaddr_reg:x3; val_offset:109980*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109980*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f700000; valaddr_reg:x3; val_offset:109983*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109983*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f780000; valaddr_reg:x3; val_offset:109986*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109986*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7c0000; valaddr_reg:x3; val_offset:109989*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109989*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7e0000; valaddr_reg:x3; val_offset:109992*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109992*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7f0000; valaddr_reg:x3; val_offset:109995*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109995*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7f8000; valaddr_reg:x3; val_offset:109998*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 109998*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7fc000; valaddr_reg:x3; val_offset:110001*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110001*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7fe000; valaddr_reg:x3; val_offset:110004*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110004*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7ff000; valaddr_reg:x3; val_offset:110007*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110007*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7ff800; valaddr_reg:x3; val_offset:110010*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110010*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7ffc00; valaddr_reg:x3; val_offset:110013*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110013*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7ffe00; valaddr_reg:x3; val_offset:110016*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110016*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7fff00; valaddr_reg:x3; val_offset:110019*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110019*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7fff80; valaddr_reg:x3; val_offset:110022*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110022*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7fffc0; valaddr_reg:x3; val_offset:110025*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110025*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7fffe0; valaddr_reg:x3; val_offset:110028*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110028*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7ffff0; valaddr_reg:x3; val_offset:110031*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110031*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7ffff8; valaddr_reg:x3; val_offset:110034*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110034*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7ffffc; valaddr_reg:x3; val_offset:110037*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110037*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7ffffe; valaddr_reg:x3; val_offset:110040*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110040*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xde and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x6f7fffff; valaddr_reg:x3; val_offset:110043*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110043*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f000001; valaddr_reg:x3; val_offset:110046*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110046*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f000003; valaddr_reg:x3; val_offset:110049*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110049*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f000007; valaddr_reg:x3; val_offset:110052*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110052*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f199999; valaddr_reg:x3; val_offset:110055*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110055*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f249249; valaddr_reg:x3; val_offset:110058*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110058*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f333333; valaddr_reg:x3; val_offset:110061*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110061*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:110064*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110064*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:110067*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110067*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f444444; valaddr_reg:x3; val_offset:110070*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110070*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:110073*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110073*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:110076*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110076*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f666666; valaddr_reg:x3; val_offset:110079*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110079*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:110082*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110082*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:110085*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110085*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:110088*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110088*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x387e81 and fs2 == 0 and fe2 == 0x7f and fm2 == 0x319c25 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f387e81; op2val:0x3fb19c25; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:110091*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110091*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbf800001; valaddr_reg:x3; val_offset:110094*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110094*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbf800003; valaddr_reg:x3; val_offset:110097*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110097*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbf800007; valaddr_reg:x3; val_offset:110100*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110100*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbf999999; valaddr_reg:x3; val_offset:110103*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110103*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:110106*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110106*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:110109*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110109*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:110112*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110112*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:110115*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110115*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:110118*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110118*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:110121*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110121*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:110124*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110124*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:110127*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110127*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:110130*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110130*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:110133*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110133*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:110136*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110136*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:110139*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110139*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7800000; valaddr_reg:x3; val_offset:110142*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110142*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7800001; valaddr_reg:x3; val_offset:110145*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110145*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7800003; valaddr_reg:x3; val_offset:110148*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110148*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7800007; valaddr_reg:x3; val_offset:110151*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110151*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc780000f; valaddr_reg:x3; val_offset:110154*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110154*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc780001f; valaddr_reg:x3; val_offset:110157*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110157*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc780003f; valaddr_reg:x3; val_offset:110160*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110160*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc780007f; valaddr_reg:x3; val_offset:110163*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110163*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc78000ff; valaddr_reg:x3; val_offset:110166*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110166*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc78001ff; valaddr_reg:x3; val_offset:110169*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110169*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc78003ff; valaddr_reg:x3; val_offset:110172*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110172*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc78007ff; valaddr_reg:x3; val_offset:110175*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110175*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7800fff; valaddr_reg:x3; val_offset:110178*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110178*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7801fff; valaddr_reg:x3; val_offset:110181*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110181*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7803fff; valaddr_reg:x3; val_offset:110184*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110184*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7807fff; valaddr_reg:x3; val_offset:110187*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110187*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc780ffff; valaddr_reg:x3; val_offset:110190*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110190*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc781ffff; valaddr_reg:x3; val_offset:110193*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110193*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc783ffff; valaddr_reg:x3; val_offset:110196*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110196*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc787ffff; valaddr_reg:x3; val_offset:110199*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110199*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc78fffff; valaddr_reg:x3; val_offset:110202*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110202*0 + 3*286*FLEN/8, x4, x1, x2) + +inst_36735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc79fffff; valaddr_reg:x3; val_offset:110205*0 + 3*286*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110205*0 + 3*286*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577056256,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577057280,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577057792,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058048,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058176,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058240,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058272,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058288,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058296,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058300,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058302,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(1577058303,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2134328890,32,FLEN) +NAN_BOXED(1068681925,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862270976,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862270977,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862270979,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862270983,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862270991,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862271007,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862271039,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862271103,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862271231,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862271487,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862271999,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862273023,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862275071,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862279167,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862287359,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862303743,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862336511,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862402047,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862533119,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1862795263,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1863319551,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1864368127,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1866465279,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1866465280,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1868562432,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1869611008,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870135296,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870397440,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870528512,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870594048,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870626816,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870643200,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870651392,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870655488,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870657536,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870658560,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659072,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659328,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659456,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659520,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659552,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659568,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659576,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659580,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659582,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(1870659583,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2134408833,32,FLEN) +NAN_BOXED(1068604453,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054592,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054593,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054595,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054599,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054607,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054623,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054655,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054719,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347054847,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347055103,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347055615,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347056639,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347058687,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347062783,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347070975,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347087359,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347120127,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347185663,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347316735,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3347578879,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3348103167,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3349151743,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-288.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-288.S new file mode 100644 index 000000000..cc723c923 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-288.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_36736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7bfffff; valaddr_reg:x3; val_offset:110208*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110208*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7c00000; valaddr_reg:x3; val_offset:110211*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110211*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7e00000; valaddr_reg:x3; val_offset:110214*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110214*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7f00000; valaddr_reg:x3; val_offset:110217*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110217*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7f80000; valaddr_reg:x3; val_offset:110220*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110220*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fc0000; valaddr_reg:x3; val_offset:110223*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110223*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fe0000; valaddr_reg:x3; val_offset:110226*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110226*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ff0000; valaddr_reg:x3; val_offset:110229*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110229*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ff8000; valaddr_reg:x3; val_offset:110232*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110232*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ffc000; valaddr_reg:x3; val_offset:110235*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110235*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ffe000; valaddr_reg:x3; val_offset:110238*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110238*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fff000; valaddr_reg:x3; val_offset:110241*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110241*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fff800; valaddr_reg:x3; val_offset:110244*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110244*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fffc00; valaddr_reg:x3; val_offset:110247*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110247*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fffe00; valaddr_reg:x3; val_offset:110250*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110250*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ffff00; valaddr_reg:x3; val_offset:110253*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110253*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ffff80; valaddr_reg:x3; val_offset:110256*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110256*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ffffc0; valaddr_reg:x3; val_offset:110259*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110259*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ffffe0; valaddr_reg:x3; val_offset:110262*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110262*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fffff0; valaddr_reg:x3; val_offset:110265*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110265*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fffff8; valaddr_reg:x3; val_offset:110268*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110268*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fffffc; valaddr_reg:x3; val_offset:110271*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110271*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7fffffe; valaddr_reg:x3; val_offset:110274*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110274*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x388d0b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c638a and fs3 == 1 and fe3 == 0x8f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f388d0b; op2val:0x802c638a; +op3val:0xc7ffffff; valaddr_reg:x3; val_offset:110277*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110277*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:110280*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110280*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:110283*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110283*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:110286*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110286*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:110289*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110289*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:110292*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110292*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:110295*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110295*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:110298*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110298*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:110301*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110301*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:110304*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110304*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:110307*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110307*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:110310*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110310*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:110313*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110313*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:110316*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110316*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:110319*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110319*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:110322*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110322*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:110325*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110325*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5000000; valaddr_reg:x3; val_offset:110328*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110328*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5000001; valaddr_reg:x3; val_offset:110331*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110331*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5000003; valaddr_reg:x3; val_offset:110334*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110334*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5000007; valaddr_reg:x3; val_offset:110337*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110337*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x500000f; valaddr_reg:x3; val_offset:110340*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110340*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x500001f; valaddr_reg:x3; val_offset:110343*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110343*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x500003f; valaddr_reg:x3; val_offset:110346*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110346*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x500007f; valaddr_reg:x3; val_offset:110349*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110349*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x50000ff; valaddr_reg:x3; val_offset:110352*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110352*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x50001ff; valaddr_reg:x3; val_offset:110355*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110355*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x50003ff; valaddr_reg:x3; val_offset:110358*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110358*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x50007ff; valaddr_reg:x3; val_offset:110361*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110361*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5000fff; valaddr_reg:x3; val_offset:110364*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110364*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5001fff; valaddr_reg:x3; val_offset:110367*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110367*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5003fff; valaddr_reg:x3; val_offset:110370*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110370*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5007fff; valaddr_reg:x3; val_offset:110373*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110373*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x500ffff; valaddr_reg:x3; val_offset:110376*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110376*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x501ffff; valaddr_reg:x3; val_offset:110379*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110379*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x503ffff; valaddr_reg:x3; val_offset:110382*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110382*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x507ffff; valaddr_reg:x3; val_offset:110385*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110385*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x50fffff; valaddr_reg:x3; val_offset:110388*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110388*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x51fffff; valaddr_reg:x3; val_offset:110391*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110391*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x53fffff; valaddr_reg:x3; val_offset:110394*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110394*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5400000; valaddr_reg:x3; val_offset:110397*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110397*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5600000; valaddr_reg:x3; val_offset:110400*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110400*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5700000; valaddr_reg:x3; val_offset:110403*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110403*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x5780000; valaddr_reg:x3; val_offset:110406*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110406*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57c0000; valaddr_reg:x3; val_offset:110409*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110409*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57e0000; valaddr_reg:x3; val_offset:110412*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110412*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57f0000; valaddr_reg:x3; val_offset:110415*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110415*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57f8000; valaddr_reg:x3; val_offset:110418*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110418*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57fc000; valaddr_reg:x3; val_offset:110421*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110421*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57fe000; valaddr_reg:x3; val_offset:110424*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110424*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57ff000; valaddr_reg:x3; val_offset:110427*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110427*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57ff800; valaddr_reg:x3; val_offset:110430*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110430*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57ffc00; valaddr_reg:x3; val_offset:110433*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110433*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57ffe00; valaddr_reg:x3; val_offset:110436*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110436*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57fff00; valaddr_reg:x3; val_offset:110439*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110439*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57fff80; valaddr_reg:x3; val_offset:110442*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110442*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57fffc0; valaddr_reg:x3; val_offset:110445*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110445*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57fffe0; valaddr_reg:x3; val_offset:110448*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110448*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57ffff0; valaddr_reg:x3; val_offset:110451*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110451*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57ffff8; valaddr_reg:x3; val_offset:110454*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110454*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57ffffc; valaddr_reg:x3; val_offset:110457*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110457*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57ffffe; valaddr_reg:x3; val_offset:110460*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110460*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38d010 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38d010; op2val:0x0; +op3val:0x57fffff; valaddr_reg:x3; val_offset:110463*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110463*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3000000; valaddr_reg:x3; val_offset:110466*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110466*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3000001; valaddr_reg:x3; val_offset:110469*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110469*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3000003; valaddr_reg:x3; val_offset:110472*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110472*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3000007; valaddr_reg:x3; val_offset:110475*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110475*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb300000f; valaddr_reg:x3; val_offset:110478*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110478*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb300001f; valaddr_reg:x3; val_offset:110481*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110481*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb300003f; valaddr_reg:x3; val_offset:110484*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110484*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb300007f; valaddr_reg:x3; val_offset:110487*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110487*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb30000ff; valaddr_reg:x3; val_offset:110490*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110490*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb30001ff; valaddr_reg:x3; val_offset:110493*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110493*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb30003ff; valaddr_reg:x3; val_offset:110496*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110496*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb30007ff; valaddr_reg:x3; val_offset:110499*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110499*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3000fff; valaddr_reg:x3; val_offset:110502*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110502*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3001fff; valaddr_reg:x3; val_offset:110505*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110505*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3003fff; valaddr_reg:x3; val_offset:110508*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110508*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3007fff; valaddr_reg:x3; val_offset:110511*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110511*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb300ffff; valaddr_reg:x3; val_offset:110514*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110514*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb301ffff; valaddr_reg:x3; val_offset:110517*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110517*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb303ffff; valaddr_reg:x3; val_offset:110520*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110520*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb307ffff; valaddr_reg:x3; val_offset:110523*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110523*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb30fffff; valaddr_reg:x3; val_offset:110526*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110526*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb31fffff; valaddr_reg:x3; val_offset:110529*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110529*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb33fffff; valaddr_reg:x3; val_offset:110532*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110532*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3400000; valaddr_reg:x3; val_offset:110535*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110535*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3600000; valaddr_reg:x3; val_offset:110538*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110538*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3700000; valaddr_reg:x3; val_offset:110541*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110541*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb3780000; valaddr_reg:x3; val_offset:110544*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110544*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37c0000; valaddr_reg:x3; val_offset:110547*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110547*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37e0000; valaddr_reg:x3; val_offset:110550*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110550*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37f0000; valaddr_reg:x3; val_offset:110553*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110553*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37f8000; valaddr_reg:x3; val_offset:110556*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110556*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37fc000; valaddr_reg:x3; val_offset:110559*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110559*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37fe000; valaddr_reg:x3; val_offset:110562*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110562*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37ff000; valaddr_reg:x3; val_offset:110565*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110565*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37ff800; valaddr_reg:x3; val_offset:110568*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110568*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37ffc00; valaddr_reg:x3; val_offset:110571*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110571*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37ffe00; valaddr_reg:x3; val_offset:110574*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110574*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37fff00; valaddr_reg:x3; val_offset:110577*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110577*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37fff80; valaddr_reg:x3; val_offset:110580*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110580*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37fffc0; valaddr_reg:x3; val_offset:110583*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110583*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37fffe0; valaddr_reg:x3; val_offset:110586*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110586*0 + 3*287*FLEN/8, x4, x1, x2) + +inst_36863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37ffff0; valaddr_reg:x3; val_offset:110589*0 + 3*287*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110589*0 + 3*287*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3351248895,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3351248896,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3353346048,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3354394624,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3354918912,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355181056,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355312128,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355377664,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355410432,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355426816,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355435008,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355439104,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355441152,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355442176,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355442688,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355442944,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355443072,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355443136,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355443168,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355443184,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355443192,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355443196,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355443198,32,FLEN) +NAN_BOXED(2134412555,32,FLEN) +NAN_BOXED(2150392714,32,FLEN) +NAN_BOXED(3355443199,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886080,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886081,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886083,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886087,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886095,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886111,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886143,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886207,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886335,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886591,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83887103,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83888127,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83890175,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83894271,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83902463,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83918847,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83951615,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84017151,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84148223,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84410367,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84934655,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(85983231,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(88080383,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(88080384,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(90177536,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(91226112,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(91750400,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92012544,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92143616,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92209152,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92241920,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92258304,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92266496,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92270592,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92272640,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92273664,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274176,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274432,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274560,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274624,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274656,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274672,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274680,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274684,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274686,32,FLEN) +NAN_BOXED(2134429712,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274687,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121664,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121665,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121667,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121671,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121679,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121695,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121727,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121791,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003121919,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003122175,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003122687,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003123711,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003125759,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003129855,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003138047,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003154431,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003187199,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003252735,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003383807,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3003645951,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3004170239,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3005218815,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3007315967,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3007315968,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3009413120,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3010461696,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3010985984,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011248128,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011379200,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011444736,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011477504,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011493888,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011502080,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011506176,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011508224,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011509248,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011509760,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510016,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510144,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510208,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510240,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510256,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-289.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-289.S new file mode 100644 index 000000000..c01a2e171 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-289.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_36864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37ffff8; valaddr_reg:x3; val_offset:110592*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110592*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37ffffc; valaddr_reg:x3; val_offset:110595*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110595*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37ffffe; valaddr_reg:x3; val_offset:110598*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110598*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x66 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xb37fffff; valaddr_reg:x3; val_offset:110601*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110601*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbf800001; valaddr_reg:x3; val_offset:110604*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110604*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbf800003; valaddr_reg:x3; val_offset:110607*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110607*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbf800007; valaddr_reg:x3; val_offset:110610*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110610*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbf999999; valaddr_reg:x3; val_offset:110613*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110613*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:110616*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110616*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:110619*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110619*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:110622*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110622*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:110625*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110625*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:110628*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110628*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:110631*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110631*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:110634*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110634*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:110637*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110637*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:110640*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110640*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:110643*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110643*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:110646*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110646*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x38e73b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2c4de3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f38e73b; op2val:0x802c4de3; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:110649*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110649*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:110652*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110652*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:110655*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110655*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:110658*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110658*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:110661*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110661*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:110664*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110664*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:110667*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110667*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:110670*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110670*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:110673*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110673*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:110676*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110676*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:110679*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110679*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:110682*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110682*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:110685*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110685*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:110688*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110688*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:110691*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110691*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:110694*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110694*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:110697*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110697*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c000000; valaddr_reg:x3; val_offset:110700*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110700*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c000001; valaddr_reg:x3; val_offset:110703*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110703*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c000003; valaddr_reg:x3; val_offset:110706*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110706*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c000007; valaddr_reg:x3; val_offset:110709*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110709*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c00000f; valaddr_reg:x3; val_offset:110712*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110712*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c00001f; valaddr_reg:x3; val_offset:110715*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110715*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c00003f; valaddr_reg:x3; val_offset:110718*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110718*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c00007f; valaddr_reg:x3; val_offset:110721*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110721*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c0000ff; valaddr_reg:x3; val_offset:110724*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110724*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c0001ff; valaddr_reg:x3; val_offset:110727*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110727*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c0003ff; valaddr_reg:x3; val_offset:110730*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110730*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c0007ff; valaddr_reg:x3; val_offset:110733*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110733*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c000fff; valaddr_reg:x3; val_offset:110736*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110736*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c001fff; valaddr_reg:x3; val_offset:110739*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110739*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c003fff; valaddr_reg:x3; val_offset:110742*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110742*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c007fff; valaddr_reg:x3; val_offset:110745*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110745*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c00ffff; valaddr_reg:x3; val_offset:110748*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110748*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c01ffff; valaddr_reg:x3; val_offset:110751*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110751*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c03ffff; valaddr_reg:x3; val_offset:110754*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110754*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c07ffff; valaddr_reg:x3; val_offset:110757*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110757*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c0fffff; valaddr_reg:x3; val_offset:110760*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110760*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c1fffff; valaddr_reg:x3; val_offset:110763*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110763*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c3fffff; valaddr_reg:x3; val_offset:110766*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110766*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c400000; valaddr_reg:x3; val_offset:110769*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110769*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c600000; valaddr_reg:x3; val_offset:110772*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110772*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c700000; valaddr_reg:x3; val_offset:110775*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110775*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c780000; valaddr_reg:x3; val_offset:110778*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110778*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7c0000; valaddr_reg:x3; val_offset:110781*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110781*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7e0000; valaddr_reg:x3; val_offset:110784*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110784*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7f0000; valaddr_reg:x3; val_offset:110787*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110787*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7f8000; valaddr_reg:x3; val_offset:110790*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110790*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7fc000; valaddr_reg:x3; val_offset:110793*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110793*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7fe000; valaddr_reg:x3; val_offset:110796*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110796*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7ff000; valaddr_reg:x3; val_offset:110799*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110799*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7ff800; valaddr_reg:x3; val_offset:110802*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110802*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7ffc00; valaddr_reg:x3; val_offset:110805*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110805*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7ffe00; valaddr_reg:x3; val_offset:110808*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110808*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7fff00; valaddr_reg:x3; val_offset:110811*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110811*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7fff80; valaddr_reg:x3; val_offset:110814*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110814*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7fffc0; valaddr_reg:x3; val_offset:110817*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110817*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7fffe0; valaddr_reg:x3; val_offset:110820*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110820*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7ffff0; valaddr_reg:x3; val_offset:110823*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110823*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7ffff8; valaddr_reg:x3; val_offset:110826*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110826*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7ffffc; valaddr_reg:x3; val_offset:110829*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110829*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7ffffe; valaddr_reg:x3; val_offset:110832*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110832*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x390e97 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f390e97; op2val:0x80000000; +op3val:0x8c7fffff; valaddr_reg:x3; val_offset:110835*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110835*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:110838*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110838*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:110841*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110841*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:110844*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110844*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:110847*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110847*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:110850*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110850*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:110853*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110853*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:110856*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110856*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:110859*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110859*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:110862*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110862*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:110865*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110865*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:110868*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110868*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:110871*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110871*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:110874*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110874*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:110877*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110877*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:110880*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110880*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:110883*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110883*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x800000; valaddr_reg:x3; val_offset:110886*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110886*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:110889*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110889*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:110892*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110892*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:110895*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110895*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x80000f; valaddr_reg:x3; val_offset:110898*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110898*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x80001f; valaddr_reg:x3; val_offset:110901*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110901*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x80003f; valaddr_reg:x3; val_offset:110904*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110904*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x80007f; valaddr_reg:x3; val_offset:110907*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110907*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x8000ff; valaddr_reg:x3; val_offset:110910*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110910*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x8001ff; valaddr_reg:x3; val_offset:110913*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110913*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x8003ff; valaddr_reg:x3; val_offset:110916*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110916*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x8007ff; valaddr_reg:x3; val_offset:110919*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110919*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x800fff; valaddr_reg:x3; val_offset:110922*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110922*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x801fff; valaddr_reg:x3; val_offset:110925*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110925*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x803fff; valaddr_reg:x3; val_offset:110928*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110928*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x807fff; valaddr_reg:x3; val_offset:110931*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110931*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x80ffff; valaddr_reg:x3; val_offset:110934*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110934*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x81ffff; valaddr_reg:x3; val_offset:110937*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110937*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x83ffff; valaddr_reg:x3; val_offset:110940*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110940*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x87ffff; valaddr_reg:x3; val_offset:110943*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110943*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x8fffff; valaddr_reg:x3; val_offset:110946*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110946*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0x9fffff; valaddr_reg:x3; val_offset:110949*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110949*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xbfffff; valaddr_reg:x3; val_offset:110952*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110952*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xc00000; valaddr_reg:x3; val_offset:110955*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110955*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xe00000; valaddr_reg:x3; val_offset:110958*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110958*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xf00000; valaddr_reg:x3; val_offset:110961*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110961*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xf80000; valaddr_reg:x3; val_offset:110964*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110964*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfc0000; valaddr_reg:x3; val_offset:110967*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110967*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfe0000; valaddr_reg:x3; val_offset:110970*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110970*0 + 3*288*FLEN/8, x4, x1, x2) + +inst_36991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xff0000; valaddr_reg:x3; val_offset:110973*0 + 3*288*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110973*0 + 3*288*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510264,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510268,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510270,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3011510271,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2134435643,32,FLEN) +NAN_BOXED(2150387171,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810240,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810241,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810243,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810247,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810255,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810271,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810303,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810367,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810495,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348810751,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348811263,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348812287,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348814335,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348818431,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348826623,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348843007,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348875775,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2348941311,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349072383,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349334527,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2349858815,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2350907391,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2353004543,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2353004544,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2355101696,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356150272,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356674560,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2356936704,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357067776,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357133312,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357166080,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357182464,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357190656,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357194752,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357196800,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357197824,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198336,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198592,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198720,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198784,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198816,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198832,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198840,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198844,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198846,32,FLEN) +NAN_BOXED(2134445719,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198847,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388608,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388623,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388639,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388671,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388735,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388863,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8389119,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8389631,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8390655,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8392703,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8396799,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8404991,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8421375,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8454143,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8519679,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8650751,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8912895,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(9437183,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10485759,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12582911,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12582912,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14680064,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15728640,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16252928,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16515072,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16646144,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16711680,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-29.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-29.S new file mode 100644 index 000000000..2c76456a9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-29.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_3584: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:10752*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10752*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3585: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:10755*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10755*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3586: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:10758*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10758*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3587: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:10761*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10761*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3588: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:10764*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10764*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3589: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:10767*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10767*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3590: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:10770*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10770*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3591: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:10773*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10773*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3592: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:10776*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10776*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3593: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:10779*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10779*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3594: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf800000; valaddr_reg:x3; val_offset:10782*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10782*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3595: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf800001; valaddr_reg:x3; val_offset:10785*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10785*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3596: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf800003; valaddr_reg:x3; val_offset:10788*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10788*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3597: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf800007; valaddr_reg:x3; val_offset:10791*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10791*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3598: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf80000f; valaddr_reg:x3; val_offset:10794*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10794*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3599: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf80001f; valaddr_reg:x3; val_offset:10797*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10797*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3600: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf80003f; valaddr_reg:x3; val_offset:10800*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10800*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3601: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf80007f; valaddr_reg:x3; val_offset:10803*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10803*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3602: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf8000ff; valaddr_reg:x3; val_offset:10806*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10806*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3603: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf8001ff; valaddr_reg:x3; val_offset:10809*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10809*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3604: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf8003ff; valaddr_reg:x3; val_offset:10812*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10812*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3605: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf8007ff; valaddr_reg:x3; val_offset:10815*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10815*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3606: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf800fff; valaddr_reg:x3; val_offset:10818*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10818*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3607: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf801fff; valaddr_reg:x3; val_offset:10821*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10821*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3608: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf803fff; valaddr_reg:x3; val_offset:10824*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10824*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3609: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf807fff; valaddr_reg:x3; val_offset:10827*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10827*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3610: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf80ffff; valaddr_reg:x3; val_offset:10830*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10830*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3611: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf81ffff; valaddr_reg:x3; val_offset:10833*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10833*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3612: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf83ffff; valaddr_reg:x3; val_offset:10836*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10836*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3613: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf87ffff; valaddr_reg:x3; val_offset:10839*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10839*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3614: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf8fffff; valaddr_reg:x3; val_offset:10842*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10842*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3615: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xf9fffff; valaddr_reg:x3; val_offset:10845*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10845*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3616: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfbfffff; valaddr_reg:x3; val_offset:10848*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10848*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3617: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfc00000; valaddr_reg:x3; val_offset:10851*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10851*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3618: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfe00000; valaddr_reg:x3; val_offset:10854*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10854*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3619: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xff00000; valaddr_reg:x3; val_offset:10857*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10857*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3620: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xff80000; valaddr_reg:x3; val_offset:10860*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10860*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3621: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffc0000; valaddr_reg:x3; val_offset:10863*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10863*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3622: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffe0000; valaddr_reg:x3; val_offset:10866*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10866*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3623: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfff0000; valaddr_reg:x3; val_offset:10869*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10869*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3624: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfff8000; valaddr_reg:x3; val_offset:10872*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10872*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3625: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfffc000; valaddr_reg:x3; val_offset:10875*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10875*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3626: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfffe000; valaddr_reg:x3; val_offset:10878*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10878*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3627: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffff000; valaddr_reg:x3; val_offset:10881*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10881*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3628: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffff800; valaddr_reg:x3; val_offset:10884*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10884*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3629: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffffc00; valaddr_reg:x3; val_offset:10887*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10887*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3630: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffffe00; valaddr_reg:x3; val_offset:10890*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10890*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3631: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfffff00; valaddr_reg:x3; val_offset:10893*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10893*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3632: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfffff80; valaddr_reg:x3; val_offset:10896*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10896*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3633: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfffffc0; valaddr_reg:x3; val_offset:10899*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10899*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3634: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfffffe0; valaddr_reg:x3; val_offset:10902*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10902*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3635: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffffff0; valaddr_reg:x3; val_offset:10905*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10905*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3636: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffffff8; valaddr_reg:x3; val_offset:10908*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10908*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3637: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffffffc; valaddr_reg:x3; val_offset:10911*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10911*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3638: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xffffffe; valaddr_reg:x3; val_offset:10914*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10914*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3639: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x020d6d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d820d6d; op2val:0x0; +op3val:0xfffffff; valaddr_reg:x3; val_offset:10917*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10917*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3640: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:10920*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10920*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3641: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:10923*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10923*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3642: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:10926*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10926*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3643: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:10929*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10929*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3644: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:10932*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10932*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3645: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:10935*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10935*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3646: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:10938*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10938*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3647: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:10941*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10941*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3648: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:10944*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10944*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3649: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:10947*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10947*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3650: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:10950*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10950*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3651: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:10953*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10953*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3652: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:10956*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10956*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3653: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:10959*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10959*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3654: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:10962*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10962*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3655: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:10965*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10965*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3656: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81000000; valaddr_reg:x3; val_offset:10968*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10968*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3657: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81000001; valaddr_reg:x3; val_offset:10971*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10971*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3658: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81000003; valaddr_reg:x3; val_offset:10974*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10974*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3659: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81000007; valaddr_reg:x3; val_offset:10977*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10977*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3660: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8100000f; valaddr_reg:x3; val_offset:10980*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10980*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3661: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8100001f; valaddr_reg:x3; val_offset:10983*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10983*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3662: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8100003f; valaddr_reg:x3; val_offset:10986*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10986*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3663: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8100007f; valaddr_reg:x3; val_offset:10989*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10989*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3664: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x810000ff; valaddr_reg:x3; val_offset:10992*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10992*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3665: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x810001ff; valaddr_reg:x3; val_offset:10995*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10995*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3666: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x810003ff; valaddr_reg:x3; val_offset:10998*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 10998*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3667: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x810007ff; valaddr_reg:x3; val_offset:11001*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11001*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3668: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81000fff; valaddr_reg:x3; val_offset:11004*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11004*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3669: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81001fff; valaddr_reg:x3; val_offset:11007*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11007*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3670: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81003fff; valaddr_reg:x3; val_offset:11010*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11010*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3671: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81007fff; valaddr_reg:x3; val_offset:11013*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11013*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3672: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8100ffff; valaddr_reg:x3; val_offset:11016*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11016*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3673: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8101ffff; valaddr_reg:x3; val_offset:11019*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11019*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3674: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8103ffff; valaddr_reg:x3; val_offset:11022*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11022*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3675: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x8107ffff; valaddr_reg:x3; val_offset:11025*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11025*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3676: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x810fffff; valaddr_reg:x3; val_offset:11028*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11028*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3677: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x811fffff; valaddr_reg:x3; val_offset:11031*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11031*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3678: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x813fffff; valaddr_reg:x3; val_offset:11034*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11034*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3679: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81400000; valaddr_reg:x3; val_offset:11037*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11037*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3680: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81600000; valaddr_reg:x3; val_offset:11040*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11040*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3681: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81700000; valaddr_reg:x3; val_offset:11043*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11043*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3682: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x81780000; valaddr_reg:x3; val_offset:11046*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11046*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3683: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817c0000; valaddr_reg:x3; val_offset:11049*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11049*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3684: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817e0000; valaddr_reg:x3; val_offset:11052*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11052*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3685: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817f0000; valaddr_reg:x3; val_offset:11055*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11055*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3686: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817f8000; valaddr_reg:x3; val_offset:11058*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11058*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3687: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817fc000; valaddr_reg:x3; val_offset:11061*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11061*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3688: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817fe000; valaddr_reg:x3; val_offset:11064*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11064*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3689: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817ff000; valaddr_reg:x3; val_offset:11067*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11067*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3690: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817ff800; valaddr_reg:x3; val_offset:11070*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11070*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3691: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817ffc00; valaddr_reg:x3; val_offset:11073*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11073*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3692: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817ffe00; valaddr_reg:x3; val_offset:11076*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11076*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3693: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817fff00; valaddr_reg:x3; val_offset:11079*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11079*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3694: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817fff80; valaddr_reg:x3; val_offset:11082*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11082*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3695: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817fffc0; valaddr_reg:x3; val_offset:11085*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11085*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3696: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817fffe0; valaddr_reg:x3; val_offset:11088*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11088*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3697: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817ffff0; valaddr_reg:x3; val_offset:11091*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11091*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3698: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817ffff8; valaddr_reg:x3; val_offset:11094*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11094*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3699: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817ffffc; valaddr_reg:x3; val_offset:11097*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11097*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3700: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817ffffe; valaddr_reg:x3; val_offset:11100*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11100*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3701: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0b3bce and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x02 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8b3bce; op2val:0x80000000; +op3val:0x817fffff; valaddr_reg:x3; val_offset:11103*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11103*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3702: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36800000; valaddr_reg:x3; val_offset:11106*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11106*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3703: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36800001; valaddr_reg:x3; val_offset:11109*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11109*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3704: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36800003; valaddr_reg:x3; val_offset:11112*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11112*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3705: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36800007; valaddr_reg:x3; val_offset:11115*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11115*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3706: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3680000f; valaddr_reg:x3; val_offset:11118*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11118*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3707: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3680001f; valaddr_reg:x3; val_offset:11121*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11121*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3708: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3680003f; valaddr_reg:x3; val_offset:11124*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11124*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3709: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3680007f; valaddr_reg:x3; val_offset:11127*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11127*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3710: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x368000ff; valaddr_reg:x3; val_offset:11130*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11130*0 + 3*28*FLEN/8, x4, x1, x2) + +inst_3711: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x368001ff; valaddr_reg:x3; val_offset:11133*0 + 3*28*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11133*0 + 3*28*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046848,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046849,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046851,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046855,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046863,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046879,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046911,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046975,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047103,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047359,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047871,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260048895,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260050943,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260055039,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260063231,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260079615,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260112383,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260177919,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260308991,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260571135,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(261095423,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143999,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(264241151,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(264241152,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(266338304,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(267386880,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(267911168,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268173312,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268304384,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268369920,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268402688,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268419072,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268427264,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268431360,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268433408,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268434432,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268434944,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435200,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435328,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435392,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435424,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435440,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435448,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435452,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435454,32,FLEN) +NAN_BOXED(2105675117,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435455,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260864,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260865,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260867,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260871,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260879,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260895,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260927,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260991,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261119,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261375,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164261887,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164262911,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164264959,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164269055,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164277247,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164293631,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164326399,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164391935,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164523007,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164785151,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2165309439,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2166358015,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2168455167,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2168455168,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2170552320,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2171600896,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172125184,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172387328,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172518400,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172583936,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172616704,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172633088,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172641280,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172645376,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172647424,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172648448,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172648960,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649216,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649344,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649408,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649440,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649456,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649464,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649468,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649470,32,FLEN) +NAN_BOXED(2106276814,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2172649471,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358272,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358273,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358275,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358279,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358287,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358303,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358335,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358399,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358527,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914358783,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-290.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-290.S new file mode 100644 index 000000000..f9be27d5c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-290.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_36992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xff8000; valaddr_reg:x3; val_offset:110976*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110976*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_36993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xffc000; valaddr_reg:x3; val_offset:110979*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110979*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_36994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xffe000; valaddr_reg:x3; val_offset:110982*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110982*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_36995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfff000; valaddr_reg:x3; val_offset:110985*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110985*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_36996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfff800; valaddr_reg:x3; val_offset:110988*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110988*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_36997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfffc00; valaddr_reg:x3; val_offset:110991*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110991*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_36998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfffe00; valaddr_reg:x3; val_offset:110994*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110994*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_36999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xffff00; valaddr_reg:x3; val_offset:110997*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 110997*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xffff80; valaddr_reg:x3; val_offset:111000*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111000*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xffffc0; valaddr_reg:x3; val_offset:111003*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111003*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xffffe0; valaddr_reg:x3; val_offset:111006*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111006*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfffff0; valaddr_reg:x3; val_offset:111009*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111009*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:111012*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111012*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:111015*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111015*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:111018*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111018*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x395e87 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f395e87; op2val:0x0; +op3val:0xffffff; valaddr_reg:x3; val_offset:111021*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111021*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:111024*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111024*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:111027*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111027*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:111030*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111030*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:111033*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111033*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:111036*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111036*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:111039*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111039*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:111042*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111042*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:111045*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111045*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:111048*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111048*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:111051*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111051*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:111054*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111054*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:111057*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111057*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:111060*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111060*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:111063*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111063*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:111066*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111066*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:111069*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111069*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85800000; valaddr_reg:x3; val_offset:111072*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111072*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85800001; valaddr_reg:x3; val_offset:111075*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111075*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85800003; valaddr_reg:x3; val_offset:111078*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111078*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85800007; valaddr_reg:x3; val_offset:111081*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111081*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8580000f; valaddr_reg:x3; val_offset:111084*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111084*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8580001f; valaddr_reg:x3; val_offset:111087*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111087*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8580003f; valaddr_reg:x3; val_offset:111090*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111090*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8580007f; valaddr_reg:x3; val_offset:111093*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111093*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x858000ff; valaddr_reg:x3; val_offset:111096*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111096*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x858001ff; valaddr_reg:x3; val_offset:111099*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111099*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x858003ff; valaddr_reg:x3; val_offset:111102*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111102*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x858007ff; valaddr_reg:x3; val_offset:111105*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111105*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85800fff; valaddr_reg:x3; val_offset:111108*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111108*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85801fff; valaddr_reg:x3; val_offset:111111*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111111*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85803fff; valaddr_reg:x3; val_offset:111114*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111114*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85807fff; valaddr_reg:x3; val_offset:111117*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111117*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8580ffff; valaddr_reg:x3; val_offset:111120*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111120*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8581ffff; valaddr_reg:x3; val_offset:111123*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111123*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8583ffff; valaddr_reg:x3; val_offset:111126*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111126*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x8587ffff; valaddr_reg:x3; val_offset:111129*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111129*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x858fffff; valaddr_reg:x3; val_offset:111132*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111132*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x859fffff; valaddr_reg:x3; val_offset:111135*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111135*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85bfffff; valaddr_reg:x3; val_offset:111138*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111138*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85c00000; valaddr_reg:x3; val_offset:111141*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111141*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85e00000; valaddr_reg:x3; val_offset:111144*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111144*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85f00000; valaddr_reg:x3; val_offset:111147*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111147*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85f80000; valaddr_reg:x3; val_offset:111150*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111150*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fc0000; valaddr_reg:x3; val_offset:111153*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111153*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fe0000; valaddr_reg:x3; val_offset:111156*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111156*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ff0000; valaddr_reg:x3; val_offset:111159*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111159*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ff8000; valaddr_reg:x3; val_offset:111162*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111162*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ffc000; valaddr_reg:x3; val_offset:111165*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111165*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ffe000; valaddr_reg:x3; val_offset:111168*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111168*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fff000; valaddr_reg:x3; val_offset:111171*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111171*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fff800; valaddr_reg:x3; val_offset:111174*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111174*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fffc00; valaddr_reg:x3; val_offset:111177*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111177*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fffe00; valaddr_reg:x3; val_offset:111180*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111180*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ffff00; valaddr_reg:x3; val_offset:111183*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111183*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ffff80; valaddr_reg:x3; val_offset:111186*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111186*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ffffc0; valaddr_reg:x3; val_offset:111189*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111189*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ffffe0; valaddr_reg:x3; val_offset:111192*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111192*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fffff0; valaddr_reg:x3; val_offset:111195*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111195*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fffff8; valaddr_reg:x3; val_offset:111198*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111198*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fffffc; valaddr_reg:x3; val_offset:111201*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111201*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85fffffe; valaddr_reg:x3; val_offset:111204*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111204*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39c489 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39c489; op2val:0x80000000; +op3val:0x85ffffff; valaddr_reg:x3; val_offset:111207*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111207*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:111210*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111210*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:111213*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111213*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:111216*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111216*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:111219*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111219*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:111222*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111222*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:111225*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111225*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:111228*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111228*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:111231*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111231*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:111234*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111234*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:111237*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111237*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:111240*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111240*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:111243*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111243*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:111246*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111246*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:111249*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111249*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:111252*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111252*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:111255*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111255*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2800000; valaddr_reg:x3; val_offset:111258*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111258*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2800001; valaddr_reg:x3; val_offset:111261*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111261*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2800003; valaddr_reg:x3; val_offset:111264*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111264*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2800007; valaddr_reg:x3; val_offset:111267*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111267*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x280000f; valaddr_reg:x3; val_offset:111270*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111270*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x280001f; valaddr_reg:x3; val_offset:111273*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111273*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x280003f; valaddr_reg:x3; val_offset:111276*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111276*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x280007f; valaddr_reg:x3; val_offset:111279*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111279*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x28000ff; valaddr_reg:x3; val_offset:111282*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111282*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x28001ff; valaddr_reg:x3; val_offset:111285*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111285*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x28003ff; valaddr_reg:x3; val_offset:111288*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111288*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x28007ff; valaddr_reg:x3; val_offset:111291*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111291*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2800fff; valaddr_reg:x3; val_offset:111294*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111294*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2801fff; valaddr_reg:x3; val_offset:111297*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111297*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2803fff; valaddr_reg:x3; val_offset:111300*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111300*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2807fff; valaddr_reg:x3; val_offset:111303*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111303*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x280ffff; valaddr_reg:x3; val_offset:111306*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111306*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x281ffff; valaddr_reg:x3; val_offset:111309*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111309*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x283ffff; valaddr_reg:x3; val_offset:111312*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111312*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x287ffff; valaddr_reg:x3; val_offset:111315*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111315*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x28fffff; valaddr_reg:x3; val_offset:111318*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111318*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x29fffff; valaddr_reg:x3; val_offset:111321*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111321*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2bfffff; valaddr_reg:x3; val_offset:111324*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111324*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2c00000; valaddr_reg:x3; val_offset:111327*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111327*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2e00000; valaddr_reg:x3; val_offset:111330*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111330*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2f00000; valaddr_reg:x3; val_offset:111333*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111333*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2f80000; valaddr_reg:x3; val_offset:111336*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111336*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fc0000; valaddr_reg:x3; val_offset:111339*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111339*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fe0000; valaddr_reg:x3; val_offset:111342*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111342*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ff0000; valaddr_reg:x3; val_offset:111345*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111345*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ff8000; valaddr_reg:x3; val_offset:111348*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111348*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ffc000; valaddr_reg:x3; val_offset:111351*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111351*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37118: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ffe000; valaddr_reg:x3; val_offset:111354*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111354*0 + 3*289*FLEN/8, x4, x1, x2) + +inst_37119: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fff000; valaddr_reg:x3; val_offset:111357*0 + 3*289*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111357*0 + 3*289*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16744448,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16760832,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16769024,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16773120,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16775168,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776192,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776704,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16776960,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777088,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777152,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777184,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777200,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2134466183,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777215,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758336,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758337,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758339,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758343,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758351,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758367,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758399,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758463,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758591,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758847,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239759359,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239760383,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239762431,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239766527,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239774719,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239791103,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239823871,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239889407,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240020479,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240282623,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240806911,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2241855487,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2243952639,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2243952640,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2246049792,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247098368,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247622656,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247884800,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248015872,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248081408,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248114176,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248130560,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248138752,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248142848,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248144896,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248145920,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146432,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146688,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146816,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146880,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146912,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146928,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146936,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146940,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146942,32,FLEN) +NAN_BOXED(2134492297,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146943,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943040,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943041,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943043,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943047,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943055,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943071,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943103,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943167,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943295,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943551,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41944063,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41945087,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41947135,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41951231,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41959423,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41975807,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42008575,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42074111,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42205183,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42467327,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42991615,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(44040191,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(46137343,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(46137344,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(48234496,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(49283072,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(49807360,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50069504,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50200576,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50266112,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50298880,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50315264,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50323456,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50327552,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-291.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-291.S new file mode 100644 index 000000000..44efab00e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-291.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_37120: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fff800; valaddr_reg:x3; val_offset:111360*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111360*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37121: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fffc00; valaddr_reg:x3; val_offset:111363*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111363*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37122: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fffe00; valaddr_reg:x3; val_offset:111366*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111366*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37123: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ffff00; valaddr_reg:x3; val_offset:111369*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111369*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37124: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ffff80; valaddr_reg:x3; val_offset:111372*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111372*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37125: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ffffc0; valaddr_reg:x3; val_offset:111375*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111375*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37126: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ffffe0; valaddr_reg:x3; val_offset:111378*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111378*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37127: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fffff0; valaddr_reg:x3; val_offset:111381*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111381*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37128: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fffff8; valaddr_reg:x3; val_offset:111384*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111384*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37129: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fffffc; valaddr_reg:x3; val_offset:111387*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111387*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37130: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2fffffe; valaddr_reg:x3; val_offset:111390*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111390*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37131: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39d14d and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39d14d; op2val:0x0; +op3val:0x2ffffff; valaddr_reg:x3; val_offset:111393*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111393*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37132: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80000000; valaddr_reg:x3; val_offset:111396*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111396*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37133: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:111399*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111399*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37134: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:111402*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111402*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37135: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:111405*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111405*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37136: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8000000f; valaddr_reg:x3; val_offset:111408*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111408*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37137: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8000001f; valaddr_reg:x3; val_offset:111411*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111411*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37138: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8000003f; valaddr_reg:x3; val_offset:111414*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111414*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37139: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8000007f; valaddr_reg:x3; val_offset:111417*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111417*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37140: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x800000ff; valaddr_reg:x3; val_offset:111420*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111420*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37141: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x800001ff; valaddr_reg:x3; val_offset:111423*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111423*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37142: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x800003ff; valaddr_reg:x3; val_offset:111426*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111426*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37143: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x800007ff; valaddr_reg:x3; val_offset:111429*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111429*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37144: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80000fff; valaddr_reg:x3; val_offset:111432*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111432*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37145: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80001fff; valaddr_reg:x3; val_offset:111435*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111435*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37146: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80003fff; valaddr_reg:x3; val_offset:111438*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111438*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37147: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80007fff; valaddr_reg:x3; val_offset:111441*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111441*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37148: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8000ffff; valaddr_reg:x3; val_offset:111444*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111444*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37149: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8001ffff; valaddr_reg:x3; val_offset:111447*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111447*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37150: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8003ffff; valaddr_reg:x3; val_offset:111450*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111450*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37151: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8007ffff; valaddr_reg:x3; val_offset:111453*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111453*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37152: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x800fffff; valaddr_reg:x3; val_offset:111456*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111456*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37153: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:111459*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111459*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37154: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x801fffff; valaddr_reg:x3; val_offset:111462*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111462*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37155: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:111465*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111465*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37156: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:111468*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111468*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37157: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:111471*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111471*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37158: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:111474*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111474*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37159: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x803fffff; valaddr_reg:x3; val_offset:111477*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111477*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37160: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80400000; valaddr_reg:x3; val_offset:111480*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111480*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37161: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:111483*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111483*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37162: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:111486*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111486*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37163: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:111489*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111489*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37164: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80600000; valaddr_reg:x3; val_offset:111492*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111492*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37165: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:111495*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111495*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37166: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:111498*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111498*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37167: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80700000; valaddr_reg:x3; val_offset:111501*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111501*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37168: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x80780000; valaddr_reg:x3; val_offset:111504*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111504*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37169: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807c0000; valaddr_reg:x3; val_offset:111507*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111507*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37170: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807e0000; valaddr_reg:x3; val_offset:111510*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111510*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37171: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807f0000; valaddr_reg:x3; val_offset:111513*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111513*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37172: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807f8000; valaddr_reg:x3; val_offset:111516*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111516*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37173: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807fc000; valaddr_reg:x3; val_offset:111519*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111519*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37174: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807fe000; valaddr_reg:x3; val_offset:111522*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111522*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37175: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807ff000; valaddr_reg:x3; val_offset:111525*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111525*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37176: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807ff800; valaddr_reg:x3; val_offset:111528*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111528*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37177: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807ffc00; valaddr_reg:x3; val_offset:111531*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111531*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37178: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807ffe00; valaddr_reg:x3; val_offset:111534*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111534*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37179: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807fff00; valaddr_reg:x3; val_offset:111537*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111537*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37180: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807fff80; valaddr_reg:x3; val_offset:111540*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111540*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37181: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807fffc0; valaddr_reg:x3; val_offset:111543*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111543*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37182: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807fffe0; valaddr_reg:x3; val_offset:111546*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111546*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37183: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807ffff0; valaddr_reg:x3; val_offset:111549*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111549*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37184: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:111552*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111552*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37185: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:111555*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111555*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37186: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:111558*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111558*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37187: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x39f88a and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f39f88a; op2val:0x80000000; +op3val:0x807fffff; valaddr_reg:x3; val_offset:111561*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111561*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37188: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39000000; valaddr_reg:x3; val_offset:111564*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111564*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37189: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39000001; valaddr_reg:x3; val_offset:111567*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111567*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37190: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39000003; valaddr_reg:x3; val_offset:111570*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111570*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37191: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39000007; valaddr_reg:x3; val_offset:111573*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111573*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37192: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3900000f; valaddr_reg:x3; val_offset:111576*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111576*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37193: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3900001f; valaddr_reg:x3; val_offset:111579*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111579*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37194: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3900003f; valaddr_reg:x3; val_offset:111582*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111582*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37195: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3900007f; valaddr_reg:x3; val_offset:111585*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111585*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37196: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x390000ff; valaddr_reg:x3; val_offset:111588*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111588*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37197: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x390001ff; valaddr_reg:x3; val_offset:111591*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111591*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37198: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x390003ff; valaddr_reg:x3; val_offset:111594*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111594*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37199: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x390007ff; valaddr_reg:x3; val_offset:111597*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111597*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37200: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39000fff; valaddr_reg:x3; val_offset:111600*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111600*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37201: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39001fff; valaddr_reg:x3; val_offset:111603*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111603*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37202: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39003fff; valaddr_reg:x3; val_offset:111606*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111606*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37203: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39007fff; valaddr_reg:x3; val_offset:111609*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111609*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37204: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3900ffff; valaddr_reg:x3; val_offset:111612*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111612*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37205: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3901ffff; valaddr_reg:x3; val_offset:111615*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111615*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37206: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3903ffff; valaddr_reg:x3; val_offset:111618*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111618*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37207: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3907ffff; valaddr_reg:x3; val_offset:111621*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111621*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37208: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x390fffff; valaddr_reg:x3; val_offset:111624*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111624*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37209: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x391fffff; valaddr_reg:x3; val_offset:111627*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111627*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37210: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x393fffff; valaddr_reg:x3; val_offset:111630*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111630*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37211: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39400000; valaddr_reg:x3; val_offset:111633*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111633*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37212: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39600000; valaddr_reg:x3; val_offset:111636*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111636*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37213: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39700000; valaddr_reg:x3; val_offset:111639*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111639*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37214: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x39780000; valaddr_reg:x3; val_offset:111642*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111642*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37215: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397c0000; valaddr_reg:x3; val_offset:111645*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111645*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37216: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397e0000; valaddr_reg:x3; val_offset:111648*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111648*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37217: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397f0000; valaddr_reg:x3; val_offset:111651*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111651*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37218: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397f8000; valaddr_reg:x3; val_offset:111654*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111654*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37219: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397fc000; valaddr_reg:x3; val_offset:111657*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111657*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37220: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397fe000; valaddr_reg:x3; val_offset:111660*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111660*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37221: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397ff000; valaddr_reg:x3; val_offset:111663*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111663*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37222: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397ff800; valaddr_reg:x3; val_offset:111666*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111666*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37223: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397ffc00; valaddr_reg:x3; val_offset:111669*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111669*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37224: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397ffe00; valaddr_reg:x3; val_offset:111672*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111672*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37225: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397fff00; valaddr_reg:x3; val_offset:111675*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111675*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37226: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397fff80; valaddr_reg:x3; val_offset:111678*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111678*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37227: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397fffc0; valaddr_reg:x3; val_offset:111681*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111681*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37228: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397fffe0; valaddr_reg:x3; val_offset:111684*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111684*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37229: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397ffff0; valaddr_reg:x3; val_offset:111687*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111687*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37230: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397ffff8; valaddr_reg:x3; val_offset:111690*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111690*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37231: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397ffffc; valaddr_reg:x3; val_offset:111693*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111693*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37232: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397ffffe; valaddr_reg:x3; val_offset:111696*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111696*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37233: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x72 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x397fffff; valaddr_reg:x3; val_offset:111699*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111699*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37234: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3f800001; valaddr_reg:x3; val_offset:111702*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111702*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37235: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3f800003; valaddr_reg:x3; val_offset:111705*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111705*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37236: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3f800007; valaddr_reg:x3; val_offset:111708*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111708*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37237: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3f999999; valaddr_reg:x3; val_offset:111711*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111711*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37238: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:111714*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111714*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37239: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:111717*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111717*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37240: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:111720*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111720*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37241: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:111723*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111723*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37242: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:111726*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111726*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37243: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:111729*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111729*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37244: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:111732*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111732*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37245: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:111735*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111735*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37246: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:111738*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111738*0 + 3*290*FLEN/8, x4, x1, x2) + +inst_37247: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:111741*0 + 3*290*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111741*0 + 3*290*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50329600,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50330624,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331136,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331392,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331520,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331584,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331616,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331632,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331640,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331644,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331646,32,FLEN) +NAN_BOXED(2134495565,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331647,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483663,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483679,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483711,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483775,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483903,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484159,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484671,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147485695,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147487743,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147491839,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147500031,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147516415,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147549183,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147614719,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147745791,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148007935,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148532223,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149580799,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677951,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677952,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153775104,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154823680,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155347968,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155610112,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155741184,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155806720,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155839488,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155855872,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155864064,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155868160,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155870208,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871232,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871744,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872000,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872128,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872192,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872224,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872240,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134505610,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872255,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301312,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301313,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301315,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301319,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301327,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301343,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301375,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301439,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301567,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956301823,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956302335,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956303359,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956305407,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956309503,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956317695,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956334079,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956366847,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956432383,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956563455,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(956825599,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(957349887,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(958398463,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(960495615,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(960495616,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(962592768,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(963641344,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964165632,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964427776,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964558848,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964624384,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964657152,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964673536,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964681728,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964685824,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964687872,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964688896,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689408,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689664,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689792,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689856,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689888,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689904,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689912,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689916,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689918,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(964689919,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-292.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-292.S new file mode 100644 index 000000000..f5a432e32 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-292.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_37248: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:111744*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111744*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37249: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3a5f72 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2bf474 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3a5f72; op2val:0x2bf474; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:111747*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111747*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37250: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:111750*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111750*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37251: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:111753*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111753*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37252: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:111756*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111756*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37253: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:111759*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111759*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37254: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:111762*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111762*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37255: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:111765*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111765*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37256: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:111768*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111768*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37257: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:111771*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111771*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37258: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:111774*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111774*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37259: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:111777*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111777*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37260: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:111780*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111780*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37261: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:111783*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111783*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37262: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:111786*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111786*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37263: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:111789*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111789*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37264: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:111792*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111792*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37265: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:111795*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111795*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37266: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87000000; valaddr_reg:x3; val_offset:111798*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111798*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37267: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87000001; valaddr_reg:x3; val_offset:111801*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111801*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37268: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87000003; valaddr_reg:x3; val_offset:111804*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111804*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37269: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87000007; valaddr_reg:x3; val_offset:111807*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111807*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37270: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8700000f; valaddr_reg:x3; val_offset:111810*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111810*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37271: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8700001f; valaddr_reg:x3; val_offset:111813*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111813*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37272: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8700003f; valaddr_reg:x3; val_offset:111816*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111816*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37273: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8700007f; valaddr_reg:x3; val_offset:111819*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111819*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37274: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x870000ff; valaddr_reg:x3; val_offset:111822*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111822*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37275: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x870001ff; valaddr_reg:x3; val_offset:111825*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111825*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37276: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x870003ff; valaddr_reg:x3; val_offset:111828*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111828*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37277: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x870007ff; valaddr_reg:x3; val_offset:111831*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111831*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37278: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87000fff; valaddr_reg:x3; val_offset:111834*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111834*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37279: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87001fff; valaddr_reg:x3; val_offset:111837*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111837*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37280: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87003fff; valaddr_reg:x3; val_offset:111840*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111840*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37281: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87007fff; valaddr_reg:x3; val_offset:111843*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111843*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37282: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8700ffff; valaddr_reg:x3; val_offset:111846*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111846*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37283: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8701ffff; valaddr_reg:x3; val_offset:111849*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111849*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37284: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8703ffff; valaddr_reg:x3; val_offset:111852*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111852*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37285: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x8707ffff; valaddr_reg:x3; val_offset:111855*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111855*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37286: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x870fffff; valaddr_reg:x3; val_offset:111858*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111858*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37287: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x871fffff; valaddr_reg:x3; val_offset:111861*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111861*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37288: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x873fffff; valaddr_reg:x3; val_offset:111864*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111864*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37289: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87400000; valaddr_reg:x3; val_offset:111867*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111867*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37290: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87600000; valaddr_reg:x3; val_offset:111870*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111870*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37291: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87700000; valaddr_reg:x3; val_offset:111873*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111873*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37292: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x87780000; valaddr_reg:x3; val_offset:111876*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111876*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37293: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877c0000; valaddr_reg:x3; val_offset:111879*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111879*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37294: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877e0000; valaddr_reg:x3; val_offset:111882*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111882*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37295: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877f0000; valaddr_reg:x3; val_offset:111885*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111885*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37296: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877f8000; valaddr_reg:x3; val_offset:111888*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111888*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37297: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877fc000; valaddr_reg:x3; val_offset:111891*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111891*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37298: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877fe000; valaddr_reg:x3; val_offset:111894*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111894*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37299: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877ff000; valaddr_reg:x3; val_offset:111897*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111897*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37300: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877ff800; valaddr_reg:x3; val_offset:111900*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111900*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37301: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877ffc00; valaddr_reg:x3; val_offset:111903*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111903*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37302: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877ffe00; valaddr_reg:x3; val_offset:111906*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111906*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37303: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877fff00; valaddr_reg:x3; val_offset:111909*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111909*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37304: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877fff80; valaddr_reg:x3; val_offset:111912*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111912*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37305: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877fffc0; valaddr_reg:x3; val_offset:111915*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111915*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37306: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877fffe0; valaddr_reg:x3; val_offset:111918*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111918*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37307: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877ffff0; valaddr_reg:x3; val_offset:111921*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111921*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37308: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877ffff8; valaddr_reg:x3; val_offset:111924*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111924*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37309: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877ffffc; valaddr_reg:x3; val_offset:111927*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111927*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37310: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877ffffe; valaddr_reg:x3; val_offset:111930*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111930*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37311: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3aab3b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3aab3b; op2val:0x80000000; +op3val:0x877fffff; valaddr_reg:x3; val_offset:111933*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111933*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37312: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:111936*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111936*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37313: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:111939*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111939*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37314: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:111942*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111942*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37315: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:111945*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111945*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37316: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:111948*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111948*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37317: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:111951*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111951*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37318: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:111954*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111954*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37319: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:111957*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111957*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37320: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:111960*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111960*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37321: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:111963*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111963*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37322: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:111966*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111966*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37323: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:111969*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111969*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37324: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:111972*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111972*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37325: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:111975*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111975*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37326: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:111978*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111978*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37327: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:111981*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111981*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37328: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86000000; valaddr_reg:x3; val_offset:111984*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111984*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37329: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86000001; valaddr_reg:x3; val_offset:111987*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111987*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37330: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86000003; valaddr_reg:x3; val_offset:111990*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111990*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37331: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86000007; valaddr_reg:x3; val_offset:111993*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111993*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37332: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8600000f; valaddr_reg:x3; val_offset:111996*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111996*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37333: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8600001f; valaddr_reg:x3; val_offset:111999*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 111999*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37334: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8600003f; valaddr_reg:x3; val_offset:112002*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112002*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37335: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8600007f; valaddr_reg:x3; val_offset:112005*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112005*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37336: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x860000ff; valaddr_reg:x3; val_offset:112008*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112008*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37337: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x860001ff; valaddr_reg:x3; val_offset:112011*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112011*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37338: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x860003ff; valaddr_reg:x3; val_offset:112014*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112014*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37339: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x860007ff; valaddr_reg:x3; val_offset:112017*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112017*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37340: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86000fff; valaddr_reg:x3; val_offset:112020*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112020*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37341: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86001fff; valaddr_reg:x3; val_offset:112023*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112023*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37342: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86003fff; valaddr_reg:x3; val_offset:112026*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112026*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37343: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86007fff; valaddr_reg:x3; val_offset:112029*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112029*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37344: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8600ffff; valaddr_reg:x3; val_offset:112032*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112032*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37345: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8601ffff; valaddr_reg:x3; val_offset:112035*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112035*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37346: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8603ffff; valaddr_reg:x3; val_offset:112038*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112038*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37347: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x8607ffff; valaddr_reg:x3; val_offset:112041*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112041*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37348: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x860fffff; valaddr_reg:x3; val_offset:112044*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112044*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37349: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x861fffff; valaddr_reg:x3; val_offset:112047*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112047*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37350: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x863fffff; valaddr_reg:x3; val_offset:112050*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112050*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37351: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86400000; valaddr_reg:x3; val_offset:112053*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112053*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37352: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86600000; valaddr_reg:x3; val_offset:112056*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112056*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37353: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86700000; valaddr_reg:x3; val_offset:112059*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112059*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37354: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x86780000; valaddr_reg:x3; val_offset:112062*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112062*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37355: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867c0000; valaddr_reg:x3; val_offset:112065*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112065*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37356: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867e0000; valaddr_reg:x3; val_offset:112068*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112068*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37357: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867f0000; valaddr_reg:x3; val_offset:112071*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112071*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37358: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867f8000; valaddr_reg:x3; val_offset:112074*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112074*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37359: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867fc000; valaddr_reg:x3; val_offset:112077*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112077*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37360: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867fe000; valaddr_reg:x3; val_offset:112080*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112080*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37361: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867ff000; valaddr_reg:x3; val_offset:112083*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112083*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37362: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867ff800; valaddr_reg:x3; val_offset:112086*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112086*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37363: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867ffc00; valaddr_reg:x3; val_offset:112089*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112089*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37364: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867ffe00; valaddr_reg:x3; val_offset:112092*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112092*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37365: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867fff00; valaddr_reg:x3; val_offset:112095*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112095*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37366: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867fff80; valaddr_reg:x3; val_offset:112098*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112098*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37367: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867fffc0; valaddr_reg:x3; val_offset:112101*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112101*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37368: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867fffe0; valaddr_reg:x3; val_offset:112104*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112104*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37369: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867ffff0; valaddr_reg:x3; val_offset:112107*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112107*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37370: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867ffff8; valaddr_reg:x3; val_offset:112110*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112110*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37371: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867ffffc; valaddr_reg:x3; val_offset:112113*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112113*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37372: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867ffffe; valaddr_reg:x3; val_offset:112116*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112116*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37373: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3abab3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3abab3; op2val:0x80000000; +op3val:0x867fffff; valaddr_reg:x3; val_offset:112119*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112119*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37374: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1800000; valaddr_reg:x3; val_offset:112122*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112122*0 + 3*291*FLEN/8, x4, x1, x2) + +inst_37375: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1800001; valaddr_reg:x3; val_offset:112125*0 + 3*291*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112125*0 + 3*291*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2134531954,32,FLEN) +NAN_BOXED(2880628,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924160,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924161,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924163,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924167,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924175,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924191,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924223,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924287,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924415,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264924671,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264925183,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264926207,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264928255,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264932351,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264940543,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264956927,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2264989695,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265055231,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265186303,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265448447,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2265972735,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2267021311,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2269118463,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2269118464,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2271215616,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2272264192,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2272788480,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273050624,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273181696,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273247232,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273280000,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273296384,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273304576,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273308672,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273310720,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273311744,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312256,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312512,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312640,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312704,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312736,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312752,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312760,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312764,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312766,32,FLEN) +NAN_BOXED(2134551355,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312767,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146944,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146945,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146947,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146951,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146959,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146975,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147007,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147071,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147199,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147455,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147967,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248148991,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248151039,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248155135,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248163327,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248179711,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248212479,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248278015,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248409087,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248671231,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2249195519,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2250244095,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2252341247,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2252341248,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2254438400,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2255486976,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256011264,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256273408,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256404480,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256470016,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256502784,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256519168,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256527360,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256531456,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256533504,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256534528,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535040,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535296,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535424,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535488,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535520,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535536,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535544,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535548,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535550,32,FLEN) +NAN_BOXED(2134555315,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535551,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977955840,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977955841,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-293.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-293.S new file mode 100644 index 000000000..014e6d1f3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-293.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_37376: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1800003; valaddr_reg:x3; val_offset:112128*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112128*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37377: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1800007; valaddr_reg:x3; val_offset:112131*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112131*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37378: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb180000f; valaddr_reg:x3; val_offset:112134*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112134*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37379: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb180001f; valaddr_reg:x3; val_offset:112137*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112137*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37380: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb180003f; valaddr_reg:x3; val_offset:112140*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112140*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37381: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb180007f; valaddr_reg:x3; val_offset:112143*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112143*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37382: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb18000ff; valaddr_reg:x3; val_offset:112146*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112146*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37383: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb18001ff; valaddr_reg:x3; val_offset:112149*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112149*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37384: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb18003ff; valaddr_reg:x3; val_offset:112152*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112152*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37385: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb18007ff; valaddr_reg:x3; val_offset:112155*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112155*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37386: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1800fff; valaddr_reg:x3; val_offset:112158*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112158*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37387: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1801fff; valaddr_reg:x3; val_offset:112161*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112161*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37388: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1803fff; valaddr_reg:x3; val_offset:112164*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112164*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37389: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1807fff; valaddr_reg:x3; val_offset:112167*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112167*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37390: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb180ffff; valaddr_reg:x3; val_offset:112170*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112170*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37391: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb181ffff; valaddr_reg:x3; val_offset:112173*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112173*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37392: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb183ffff; valaddr_reg:x3; val_offset:112176*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112176*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37393: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb187ffff; valaddr_reg:x3; val_offset:112179*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112179*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37394: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb18fffff; valaddr_reg:x3; val_offset:112182*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112182*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37395: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb19fffff; valaddr_reg:x3; val_offset:112185*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112185*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37396: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1bfffff; valaddr_reg:x3; val_offset:112188*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112188*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37397: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1c00000; valaddr_reg:x3; val_offset:112191*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112191*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37398: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1e00000; valaddr_reg:x3; val_offset:112194*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112194*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37399: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1f00000; valaddr_reg:x3; val_offset:112197*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112197*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37400: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1f80000; valaddr_reg:x3; val_offset:112200*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112200*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37401: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fc0000; valaddr_reg:x3; val_offset:112203*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112203*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37402: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fe0000; valaddr_reg:x3; val_offset:112206*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112206*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37403: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ff0000; valaddr_reg:x3; val_offset:112209*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112209*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37404: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ff8000; valaddr_reg:x3; val_offset:112212*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112212*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37405: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ffc000; valaddr_reg:x3; val_offset:112215*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112215*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37406: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ffe000; valaddr_reg:x3; val_offset:112218*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112218*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37407: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fff000; valaddr_reg:x3; val_offset:112221*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112221*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37408: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fff800; valaddr_reg:x3; val_offset:112224*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112224*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37409: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fffc00; valaddr_reg:x3; val_offset:112227*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112227*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37410: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fffe00; valaddr_reg:x3; val_offset:112230*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112230*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37411: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ffff00; valaddr_reg:x3; val_offset:112233*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112233*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37412: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ffff80; valaddr_reg:x3; val_offset:112236*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112236*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37413: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ffffc0; valaddr_reg:x3; val_offset:112239*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112239*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37414: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ffffe0; valaddr_reg:x3; val_offset:112242*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112242*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37415: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fffff0; valaddr_reg:x3; val_offset:112245*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112245*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37416: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fffff8; valaddr_reg:x3; val_offset:112248*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112248*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37417: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fffffc; valaddr_reg:x3; val_offset:112251*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112251*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37418: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1fffffe; valaddr_reg:x3; val_offset:112254*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112254*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37419: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x63 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xb1ffffff; valaddr_reg:x3; val_offset:112257*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112257*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37420: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbf800001; valaddr_reg:x3; val_offset:112260*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112260*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37421: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbf800003; valaddr_reg:x3; val_offset:112263*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112263*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37422: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbf800007; valaddr_reg:x3; val_offset:112266*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112266*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37423: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbf999999; valaddr_reg:x3; val_offset:112269*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112269*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37424: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:112272*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112272*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37425: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:112275*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112275*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37426: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:112278*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112278*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37427: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:112281*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112281*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37428: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:112284*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112284*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37429: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:112287*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112287*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37430: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:112290*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112290*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37431: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:112293*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112293*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37432: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:112296*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112296*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37433: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:112299*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112299*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37434: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:112302*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112302*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37435: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b0abd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2bcc33 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b0abd; op2val:0x802bcc33; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:112305*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112305*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37436: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:112308*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112308*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37437: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:112311*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112311*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37438: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:112314*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112314*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37439: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:112317*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112317*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37440: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:112320*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112320*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37441: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:112323*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112323*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37442: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:112326*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112326*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37443: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:112329*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112329*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37444: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:112332*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112332*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37445: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:112335*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112335*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37446: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:112338*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112338*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37447: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:112341*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112341*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37448: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:112344*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112344*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37449: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:112347*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112347*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37450: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:112350*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112350*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37451: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:112353*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112353*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37452: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe000000; valaddr_reg:x3; val_offset:112356*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112356*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37453: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe000001; valaddr_reg:x3; val_offset:112359*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112359*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37454: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe000003; valaddr_reg:x3; val_offset:112362*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112362*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37455: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe000007; valaddr_reg:x3; val_offset:112365*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112365*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37456: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe00000f; valaddr_reg:x3; val_offset:112368*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112368*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37457: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe00001f; valaddr_reg:x3; val_offset:112371*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112371*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37458: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe00003f; valaddr_reg:x3; val_offset:112374*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112374*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37459: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe00007f; valaddr_reg:x3; val_offset:112377*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112377*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37460: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe0000ff; valaddr_reg:x3; val_offset:112380*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112380*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37461: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe0001ff; valaddr_reg:x3; val_offset:112383*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112383*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37462: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe0003ff; valaddr_reg:x3; val_offset:112386*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112386*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37463: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe0007ff; valaddr_reg:x3; val_offset:112389*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112389*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37464: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe000fff; valaddr_reg:x3; val_offset:112392*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112392*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37465: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe001fff; valaddr_reg:x3; val_offset:112395*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112395*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37466: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe003fff; valaddr_reg:x3; val_offset:112398*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112398*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37467: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe007fff; valaddr_reg:x3; val_offset:112401*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112401*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37468: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe00ffff; valaddr_reg:x3; val_offset:112404*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112404*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37469: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe01ffff; valaddr_reg:x3; val_offset:112407*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112407*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37470: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe03ffff; valaddr_reg:x3; val_offset:112410*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112410*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37471: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe07ffff; valaddr_reg:x3; val_offset:112413*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112413*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37472: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe0fffff; valaddr_reg:x3; val_offset:112416*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112416*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37473: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe1fffff; valaddr_reg:x3; val_offset:112419*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112419*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37474: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe3fffff; valaddr_reg:x3; val_offset:112422*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112422*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37475: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe400000; valaddr_reg:x3; val_offset:112425*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112425*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37476: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe600000; valaddr_reg:x3; val_offset:112428*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112428*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37477: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe700000; valaddr_reg:x3; val_offset:112431*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112431*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37478: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe780000; valaddr_reg:x3; val_offset:112434*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112434*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37479: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7c0000; valaddr_reg:x3; val_offset:112437*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112437*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37480: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7e0000; valaddr_reg:x3; val_offset:112440*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112440*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37481: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7f0000; valaddr_reg:x3; val_offset:112443*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112443*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37482: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7f8000; valaddr_reg:x3; val_offset:112446*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112446*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37483: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7fc000; valaddr_reg:x3; val_offset:112449*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112449*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37484: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7fe000; valaddr_reg:x3; val_offset:112452*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112452*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37485: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7ff000; valaddr_reg:x3; val_offset:112455*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112455*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37486: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7ff800; valaddr_reg:x3; val_offset:112458*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112458*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37487: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7ffc00; valaddr_reg:x3; val_offset:112461*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112461*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37488: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7ffe00; valaddr_reg:x3; val_offset:112464*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112464*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37489: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7fff00; valaddr_reg:x3; val_offset:112467*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112467*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37490: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7fff80; valaddr_reg:x3; val_offset:112470*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112470*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37491: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7fffc0; valaddr_reg:x3; val_offset:112473*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112473*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37492: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7fffe0; valaddr_reg:x3; val_offset:112476*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112476*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37493: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7ffff0; valaddr_reg:x3; val_offset:112479*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112479*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37494: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7ffff8; valaddr_reg:x3; val_offset:112482*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112482*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37495: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7ffffc; valaddr_reg:x3; val_offset:112485*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112485*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37496: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7ffffe; valaddr_reg:x3; val_offset:112488*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112488*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37497: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b1d98 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b1d98; op2val:0x0; +op3val:0xe7fffff; valaddr_reg:x3; val_offset:112491*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112491*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37498: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:112494*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112494*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37499: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:112497*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112497*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37500: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:112500*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112500*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37501: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:112503*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112503*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37502: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:112506*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112506*0 + 3*292*FLEN/8, x4, x1, x2) + +inst_37503: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:112509*0 + 3*292*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112509*0 + 3*292*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977955843,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977955847,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977955855,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977955871,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977955903,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977955967,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977956095,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977956351,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977956863,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977957887,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977959935,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977964031,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977972223,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2977988607,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2978021375,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2978086911,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2978217983,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2978480127,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2979004415,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2980052991,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2982150143,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2982150144,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2984247296,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2985295872,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2985820160,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986082304,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986213376,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986278912,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986311680,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986328064,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986336256,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986340352,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986342400,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986343424,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986343936,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344192,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344320,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344384,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344416,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344432,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344440,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344444,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344446,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(2986344447,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2134575805,32,FLEN) +NAN_BOXED(2150353971,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881024,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881025,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881027,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881031,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881039,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881055,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881087,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881151,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881279,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881535,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234882047,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234883071,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234885119,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234889215,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234897407,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234913791,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234946559,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235012095,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235143167,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235405311,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235929599,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(236978175,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(239075327,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(239075328,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(241172480,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(242221056,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(242745344,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243007488,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243138560,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243204096,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243236864,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243253248,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243261440,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243265536,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243267584,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243268608,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269120,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269376,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269504,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269568,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269600,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269616,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269624,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269628,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269630,32,FLEN) +NAN_BOXED(2134580632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269631,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-294.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-294.S new file mode 100644 index 000000000..97205e597 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-294.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_37504: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:112512*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112512*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37505: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:112515*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112515*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37506: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:112518*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112518*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37507: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:112521*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112521*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37508: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:112524*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112524*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37509: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:112527*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112527*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37510: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:112530*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112530*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37511: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:112533*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112533*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37512: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:112536*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112536*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37513: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:112539*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112539*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37514: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8800000; valaddr_reg:x3; val_offset:112542*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112542*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37515: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8800001; valaddr_reg:x3; val_offset:112545*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112545*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37516: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8800003; valaddr_reg:x3; val_offset:112548*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112548*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37517: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8800007; valaddr_reg:x3; val_offset:112551*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112551*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37518: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x880000f; valaddr_reg:x3; val_offset:112554*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112554*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37519: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x880001f; valaddr_reg:x3; val_offset:112557*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112557*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37520: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x880003f; valaddr_reg:x3; val_offset:112560*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112560*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37521: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x880007f; valaddr_reg:x3; val_offset:112563*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112563*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37522: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x88000ff; valaddr_reg:x3; val_offset:112566*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112566*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37523: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x88001ff; valaddr_reg:x3; val_offset:112569*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112569*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37524: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x88003ff; valaddr_reg:x3; val_offset:112572*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112572*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37525: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x88007ff; valaddr_reg:x3; val_offset:112575*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112575*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37526: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8800fff; valaddr_reg:x3; val_offset:112578*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112578*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37527: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8801fff; valaddr_reg:x3; val_offset:112581*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112581*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37528: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8803fff; valaddr_reg:x3; val_offset:112584*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112584*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37529: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8807fff; valaddr_reg:x3; val_offset:112587*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112587*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37530: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x880ffff; valaddr_reg:x3; val_offset:112590*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112590*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37531: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x881ffff; valaddr_reg:x3; val_offset:112593*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112593*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37532: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x883ffff; valaddr_reg:x3; val_offset:112596*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112596*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37533: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x887ffff; valaddr_reg:x3; val_offset:112599*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112599*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37534: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x88fffff; valaddr_reg:x3; val_offset:112602*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112602*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37535: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x89fffff; valaddr_reg:x3; val_offset:112605*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112605*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37536: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8bfffff; valaddr_reg:x3; val_offset:112608*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112608*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37537: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8c00000; valaddr_reg:x3; val_offset:112611*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112611*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37538: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8e00000; valaddr_reg:x3; val_offset:112614*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112614*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37539: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8f00000; valaddr_reg:x3; val_offset:112617*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112617*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37540: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8f80000; valaddr_reg:x3; val_offset:112620*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112620*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37541: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fc0000; valaddr_reg:x3; val_offset:112623*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112623*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37542: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fe0000; valaddr_reg:x3; val_offset:112626*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112626*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37543: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ff0000; valaddr_reg:x3; val_offset:112629*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112629*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37544: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ff8000; valaddr_reg:x3; val_offset:112632*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112632*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37545: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ffc000; valaddr_reg:x3; val_offset:112635*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112635*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37546: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ffe000; valaddr_reg:x3; val_offset:112638*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112638*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37547: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fff000; valaddr_reg:x3; val_offset:112641*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112641*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37548: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fff800; valaddr_reg:x3; val_offset:112644*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112644*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37549: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fffc00; valaddr_reg:x3; val_offset:112647*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112647*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37550: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fffe00; valaddr_reg:x3; val_offset:112650*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112650*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37551: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ffff00; valaddr_reg:x3; val_offset:112653*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112653*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37552: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ffff80; valaddr_reg:x3; val_offset:112656*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112656*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37553: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ffffc0; valaddr_reg:x3; val_offset:112659*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112659*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37554: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ffffe0; valaddr_reg:x3; val_offset:112662*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112662*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37555: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fffff0; valaddr_reg:x3; val_offset:112665*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112665*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37556: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fffff8; valaddr_reg:x3; val_offset:112668*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112668*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37557: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fffffc; valaddr_reg:x3; val_offset:112671*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112671*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37558: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8fffffe; valaddr_reg:x3; val_offset:112674*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112674*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37559: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3b6fa0 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3b6fa0; op2val:0x0; +op3val:0x8ffffff; valaddr_reg:x3; val_offset:112677*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112677*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37560: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3800000; valaddr_reg:x3; val_offset:112680*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112680*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37561: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3800001; valaddr_reg:x3; val_offset:112683*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112683*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37562: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3800003; valaddr_reg:x3; val_offset:112686*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112686*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37563: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3800007; valaddr_reg:x3; val_offset:112689*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112689*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37564: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb380000f; valaddr_reg:x3; val_offset:112692*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112692*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37565: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb380001f; valaddr_reg:x3; val_offset:112695*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112695*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37566: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb380003f; valaddr_reg:x3; val_offset:112698*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112698*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37567: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb380007f; valaddr_reg:x3; val_offset:112701*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112701*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37568: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb38000ff; valaddr_reg:x3; val_offset:112704*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112704*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37569: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb38001ff; valaddr_reg:x3; val_offset:112707*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112707*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37570: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb38003ff; valaddr_reg:x3; val_offset:112710*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112710*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37571: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb38007ff; valaddr_reg:x3; val_offset:112713*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112713*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37572: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3800fff; valaddr_reg:x3; val_offset:112716*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112716*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37573: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3801fff; valaddr_reg:x3; val_offset:112719*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112719*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37574: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3803fff; valaddr_reg:x3; val_offset:112722*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112722*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37575: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3807fff; valaddr_reg:x3; val_offset:112725*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112725*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37576: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb380ffff; valaddr_reg:x3; val_offset:112728*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112728*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37577: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb381ffff; valaddr_reg:x3; val_offset:112731*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112731*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37578: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb383ffff; valaddr_reg:x3; val_offset:112734*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112734*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37579: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb387ffff; valaddr_reg:x3; val_offset:112737*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112737*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37580: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb38fffff; valaddr_reg:x3; val_offset:112740*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112740*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37581: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb39fffff; valaddr_reg:x3; val_offset:112743*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112743*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37582: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3bfffff; valaddr_reg:x3; val_offset:112746*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112746*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37583: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3c00000; valaddr_reg:x3; val_offset:112749*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112749*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37584: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3e00000; valaddr_reg:x3; val_offset:112752*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112752*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37585: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3f00000; valaddr_reg:x3; val_offset:112755*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112755*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37586: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3f80000; valaddr_reg:x3; val_offset:112758*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112758*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37587: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fc0000; valaddr_reg:x3; val_offset:112761*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112761*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37588: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fe0000; valaddr_reg:x3; val_offset:112764*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112764*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37589: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ff0000; valaddr_reg:x3; val_offset:112767*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112767*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37590: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ff8000; valaddr_reg:x3; val_offset:112770*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112770*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37591: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ffc000; valaddr_reg:x3; val_offset:112773*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112773*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37592: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ffe000; valaddr_reg:x3; val_offset:112776*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112776*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37593: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fff000; valaddr_reg:x3; val_offset:112779*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112779*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37594: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fff800; valaddr_reg:x3; val_offset:112782*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112782*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37595: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fffc00; valaddr_reg:x3; val_offset:112785*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112785*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37596: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fffe00; valaddr_reg:x3; val_offset:112788*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112788*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37597: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ffff00; valaddr_reg:x3; val_offset:112791*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112791*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37598: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ffff80; valaddr_reg:x3; val_offset:112794*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112794*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37599: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ffffc0; valaddr_reg:x3; val_offset:112797*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112797*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37600: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ffffe0; valaddr_reg:x3; val_offset:112800*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112800*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37601: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fffff0; valaddr_reg:x3; val_offset:112803*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112803*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37602: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fffff8; valaddr_reg:x3; val_offset:112806*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112806*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37603: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fffffc; valaddr_reg:x3; val_offset:112809*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112809*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37604: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3fffffe; valaddr_reg:x3; val_offset:112812*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112812*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37605: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x67 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xb3ffffff; valaddr_reg:x3; val_offset:112815*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112815*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37606: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbf800001; valaddr_reg:x3; val_offset:112818*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112818*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37607: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbf800003; valaddr_reg:x3; val_offset:112821*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112821*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37608: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbf800007; valaddr_reg:x3; val_offset:112824*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112824*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37609: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbf999999; valaddr_reg:x3; val_offset:112827*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112827*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37610: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:112830*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112830*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37611: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:112833*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112833*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37612: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:112836*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112836*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37613: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:112839*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112839*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37614: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:112842*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112842*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37615: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:112845*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112845*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37616: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:112848*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112848*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37617: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:112851*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112851*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37618: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:112854*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112854*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37619: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:112857*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112857*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37620: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:112860*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112860*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37621: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3be2c1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b99d8 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3be2c1; op2val:0x802b99d8; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:112863*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112863*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37622: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8000000; valaddr_reg:x3; val_offset:112866*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112866*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37623: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8000001; valaddr_reg:x3; val_offset:112869*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112869*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37624: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8000003; valaddr_reg:x3; val_offset:112872*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112872*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37625: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8000007; valaddr_reg:x3; val_offset:112875*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112875*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37626: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb800000f; valaddr_reg:x3; val_offset:112878*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112878*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37627: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb800001f; valaddr_reg:x3; val_offset:112881*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112881*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37628: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb800003f; valaddr_reg:x3; val_offset:112884*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112884*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37629: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb800007f; valaddr_reg:x3; val_offset:112887*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112887*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37630: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb80000ff; valaddr_reg:x3; val_offset:112890*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112890*0 + 3*293*FLEN/8, x4, x1, x2) + +inst_37631: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb80001ff; valaddr_reg:x3; val_offset:112893*0 + 3*293*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112893*0 + 3*293*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606336,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606337,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606339,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606343,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606351,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606367,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606399,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606463,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606591,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606847,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142607359,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142608383,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142610431,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142614527,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142622719,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142639103,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142671871,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142737407,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142868479,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(143130623,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(143654911,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(144703487,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(146800639,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(146800640,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(148897792,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(149946368,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150470656,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150732800,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150863872,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150929408,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150962176,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150978560,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150986752,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150990848,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150992896,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150993920,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994432,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994688,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994816,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994880,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994912,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994928,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994936,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994940,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994942,32,FLEN) +NAN_BOXED(2134601632,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994943,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510272,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510273,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510275,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510279,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510287,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510303,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510335,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510399,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510527,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011510783,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011511295,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011512319,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011514367,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011518463,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011526655,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011543039,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011575807,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011641343,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3011772415,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3012034559,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3012558847,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3013607423,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3015704575,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3015704576,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3017801728,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3018850304,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019374592,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019636736,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019767808,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019833344,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019866112,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019882496,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019890688,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019894784,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019896832,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019897856,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898368,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898624,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898752,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898816,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898848,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898864,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898872,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898876,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898878,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3019898879,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2134631105,32,FLEN) +NAN_BOXED(2150341080,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007744,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007745,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007747,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007751,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007759,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007775,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007807,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007871,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087007999,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087008255,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-295.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-295.S new file mode 100644 index 000000000..800a6ff09 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-295.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_37632: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb80003ff; valaddr_reg:x3; val_offset:112896*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112896*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37633: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb80007ff; valaddr_reg:x3; val_offset:112899*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112899*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37634: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8000fff; valaddr_reg:x3; val_offset:112902*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112902*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37635: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8001fff; valaddr_reg:x3; val_offset:112905*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112905*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37636: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8003fff; valaddr_reg:x3; val_offset:112908*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112908*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37637: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8007fff; valaddr_reg:x3; val_offset:112911*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112911*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37638: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb800ffff; valaddr_reg:x3; val_offset:112914*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112914*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37639: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb801ffff; valaddr_reg:x3; val_offset:112917*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112917*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37640: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb803ffff; valaddr_reg:x3; val_offset:112920*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112920*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37641: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb807ffff; valaddr_reg:x3; val_offset:112923*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112923*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37642: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb80fffff; valaddr_reg:x3; val_offset:112926*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112926*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37643: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb81fffff; valaddr_reg:x3; val_offset:112929*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112929*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37644: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb83fffff; valaddr_reg:x3; val_offset:112932*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112932*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37645: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8400000; valaddr_reg:x3; val_offset:112935*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112935*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37646: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8600000; valaddr_reg:x3; val_offset:112938*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112938*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37647: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8700000; valaddr_reg:x3; val_offset:112941*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112941*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37648: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb8780000; valaddr_reg:x3; val_offset:112944*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112944*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37649: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87c0000; valaddr_reg:x3; val_offset:112947*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112947*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37650: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87e0000; valaddr_reg:x3; val_offset:112950*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112950*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37651: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87f0000; valaddr_reg:x3; val_offset:112953*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112953*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37652: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87f8000; valaddr_reg:x3; val_offset:112956*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112956*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37653: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87fc000; valaddr_reg:x3; val_offset:112959*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112959*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37654: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87fe000; valaddr_reg:x3; val_offset:112962*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112962*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37655: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87ff000; valaddr_reg:x3; val_offset:112965*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112965*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37656: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87ff800; valaddr_reg:x3; val_offset:112968*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112968*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37657: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87ffc00; valaddr_reg:x3; val_offset:112971*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112971*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37658: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87ffe00; valaddr_reg:x3; val_offset:112974*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112974*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37659: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87fff00; valaddr_reg:x3; val_offset:112977*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112977*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37660: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87fff80; valaddr_reg:x3; val_offset:112980*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112980*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37661: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87fffc0; valaddr_reg:x3; val_offset:112983*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112983*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37662: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87fffe0; valaddr_reg:x3; val_offset:112986*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112986*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37663: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87ffff0; valaddr_reg:x3; val_offset:112989*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112989*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37664: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87ffff8; valaddr_reg:x3; val_offset:112992*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112992*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37665: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87ffffc; valaddr_reg:x3; val_offset:112995*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112995*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37666: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87ffffe; valaddr_reg:x3; val_offset:112998*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 112998*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37667: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x70 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xb87fffff; valaddr_reg:x3; val_offset:113001*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113001*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37668: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbf800001; valaddr_reg:x3; val_offset:113004*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113004*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37669: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbf800003; valaddr_reg:x3; val_offset:113007*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113007*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37670: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbf800007; valaddr_reg:x3; val_offset:113010*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113010*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37671: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbf999999; valaddr_reg:x3; val_offset:113013*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113013*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37672: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:113016*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113016*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37673: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:113019*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113019*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37674: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:113022*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113022*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37675: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:113025*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113025*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37676: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:113028*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113028*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37677: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:113031*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113031*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37678: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:113034*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113034*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37679: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:113037*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113037*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37680: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:113040*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113040*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37681: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:113043*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113043*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37682: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:113046*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113046*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37683: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c34fb and fs2 == 1 and fe2 == 0x00 and fm2 == 0x2b86cc and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c34fb; op2val:0x802b86cc; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:113049*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113049*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37684: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:113052*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113052*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37685: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:113055*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113055*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37686: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:113058*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113058*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37687: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:113061*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113061*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37688: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:113064*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113064*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37689: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:113067*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113067*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37690: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:113070*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113070*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37691: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:113073*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113073*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37692: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:113076*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113076*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37693: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:113079*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113079*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37694: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:113082*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113082*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37695: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:113085*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113085*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37696: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:113088*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113088*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37697: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:113091*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113091*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37698: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:113094*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113094*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37699: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:113097*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113097*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37700: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23800000; valaddr_reg:x3; val_offset:113100*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113100*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37701: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23800001; valaddr_reg:x3; val_offset:113103*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113103*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37702: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23800003; valaddr_reg:x3; val_offset:113106*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113106*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37703: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23800007; valaddr_reg:x3; val_offset:113109*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113109*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37704: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x2380000f; valaddr_reg:x3; val_offset:113112*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113112*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37705: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x2380001f; valaddr_reg:x3; val_offset:113115*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113115*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37706: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x2380003f; valaddr_reg:x3; val_offset:113118*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113118*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37707: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x2380007f; valaddr_reg:x3; val_offset:113121*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113121*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37708: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x238000ff; valaddr_reg:x3; val_offset:113124*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113124*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37709: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x238001ff; valaddr_reg:x3; val_offset:113127*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113127*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37710: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x238003ff; valaddr_reg:x3; val_offset:113130*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113130*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37711: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x238007ff; valaddr_reg:x3; val_offset:113133*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113133*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37712: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23800fff; valaddr_reg:x3; val_offset:113136*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113136*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37713: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23801fff; valaddr_reg:x3; val_offset:113139*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113139*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37714: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23803fff; valaddr_reg:x3; val_offset:113142*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113142*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37715: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23807fff; valaddr_reg:x3; val_offset:113145*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113145*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37716: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x2380ffff; valaddr_reg:x3; val_offset:113148*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113148*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37717: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x2381ffff; valaddr_reg:x3; val_offset:113151*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113151*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37718: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x2383ffff; valaddr_reg:x3; val_offset:113154*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113154*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37719: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x2387ffff; valaddr_reg:x3; val_offset:113157*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113157*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37720: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x238fffff; valaddr_reg:x3; val_offset:113160*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113160*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37721: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x239fffff; valaddr_reg:x3; val_offset:113163*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113163*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37722: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23bfffff; valaddr_reg:x3; val_offset:113166*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113166*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37723: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23c00000; valaddr_reg:x3; val_offset:113169*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113169*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37724: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23e00000; valaddr_reg:x3; val_offset:113172*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113172*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37725: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23f00000; valaddr_reg:x3; val_offset:113175*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113175*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37726: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23f80000; valaddr_reg:x3; val_offset:113178*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113178*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37727: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fc0000; valaddr_reg:x3; val_offset:113181*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113181*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37728: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fe0000; valaddr_reg:x3; val_offset:113184*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113184*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37729: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ff0000; valaddr_reg:x3; val_offset:113187*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113187*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37730: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ff8000; valaddr_reg:x3; val_offset:113190*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113190*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37731: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ffc000; valaddr_reg:x3; val_offset:113193*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113193*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37732: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ffe000; valaddr_reg:x3; val_offset:113196*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113196*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37733: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fff000; valaddr_reg:x3; val_offset:113199*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113199*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37734: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fff800; valaddr_reg:x3; val_offset:113202*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113202*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37735: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fffc00; valaddr_reg:x3; val_offset:113205*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113205*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37736: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fffe00; valaddr_reg:x3; val_offset:113208*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113208*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37737: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ffff00; valaddr_reg:x3; val_offset:113211*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113211*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37738: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ffff80; valaddr_reg:x3; val_offset:113214*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113214*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37739: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ffffc0; valaddr_reg:x3; val_offset:113217*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113217*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37740: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ffffe0; valaddr_reg:x3; val_offset:113220*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113220*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37741: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fffff0; valaddr_reg:x3; val_offset:113223*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113223*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37742: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fffff8; valaddr_reg:x3; val_offset:113226*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113226*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37743: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fffffc; valaddr_reg:x3; val_offset:113229*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113229*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37744: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23fffffe; valaddr_reg:x3; val_offset:113232*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113232*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37745: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3c8709 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x47 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3c8709; op2val:0x0; +op3val:0x23ffffff; valaddr_reg:x3; val_offset:113235*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113235*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37746: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29800000; valaddr_reg:x3; val_offset:113238*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113238*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37747: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29800001; valaddr_reg:x3; val_offset:113241*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113241*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37748: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29800003; valaddr_reg:x3; val_offset:113244*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113244*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37749: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29800007; valaddr_reg:x3; val_offset:113247*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113247*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37750: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x2980000f; valaddr_reg:x3; val_offset:113250*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113250*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37751: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x2980001f; valaddr_reg:x3; val_offset:113253*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113253*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37752: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x2980003f; valaddr_reg:x3; val_offset:113256*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113256*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37753: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x2980007f; valaddr_reg:x3; val_offset:113259*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113259*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37754: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x298000ff; valaddr_reg:x3; val_offset:113262*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113262*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37755: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x298001ff; valaddr_reg:x3; val_offset:113265*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113265*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37756: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x298003ff; valaddr_reg:x3; val_offset:113268*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113268*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37757: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x298007ff; valaddr_reg:x3; val_offset:113271*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113271*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37758: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29800fff; valaddr_reg:x3; val_offset:113274*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113274*0 + 3*294*FLEN/8, x4, x1, x2) + +inst_37759: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29801fff; valaddr_reg:x3; val_offset:113277*0 + 3*294*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113277*0 + 3*294*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087008767,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087009791,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087011839,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087015935,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087024127,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087040511,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087073279,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087138815,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087269887,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3087532031,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3088056319,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3089104895,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3091202047,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3091202048,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3093299200,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3094347776,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3094872064,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095134208,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095265280,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095330816,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095363584,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095379968,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095388160,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095392256,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095394304,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095395328,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095395840,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396096,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396224,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396288,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396320,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396336,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396344,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396348,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396350,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3095396351,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2134652155,32,FLEN) +NAN_BOXED(2150336204,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591168,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591169,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591171,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591175,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591183,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591199,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591231,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591295,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591423,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595591679,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595592191,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595593215,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595595263,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595599359,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595607551,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595623935,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595656703,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595722239,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(595853311,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(596115455,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(596639743,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(597688319,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(599785471,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(599785472,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(601882624,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(602931200,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603455488,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603717632,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603848704,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603914240,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603947008,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603963392,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603971584,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603975680,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603977728,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603978752,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979264,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979520,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979648,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979712,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979744,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979760,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979768,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979772,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979774,32,FLEN) +NAN_BOXED(2134673161,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(603979775,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254464,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254465,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254467,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254471,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254479,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254495,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254527,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254591,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254719,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696254975,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696255487,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696256511,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696258559,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696262655,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-296.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-296.S new file mode 100644 index 000000000..ff27a3a60 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-296.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_37760: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29803fff; valaddr_reg:x3; val_offset:113280*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113280*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37761: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29807fff; valaddr_reg:x3; val_offset:113283*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113283*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37762: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x2980ffff; valaddr_reg:x3; val_offset:113286*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113286*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37763: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x2981ffff; valaddr_reg:x3; val_offset:113289*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113289*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37764: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x2983ffff; valaddr_reg:x3; val_offset:113292*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113292*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37765: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x2987ffff; valaddr_reg:x3; val_offset:113295*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113295*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37766: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x298fffff; valaddr_reg:x3; val_offset:113298*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113298*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37767: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x299fffff; valaddr_reg:x3; val_offset:113301*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113301*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37768: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29bfffff; valaddr_reg:x3; val_offset:113304*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113304*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37769: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29c00000; valaddr_reg:x3; val_offset:113307*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113307*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37770: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29e00000; valaddr_reg:x3; val_offset:113310*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113310*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37771: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29f00000; valaddr_reg:x3; val_offset:113313*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113313*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37772: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29f80000; valaddr_reg:x3; val_offset:113316*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113316*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37773: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fc0000; valaddr_reg:x3; val_offset:113319*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113319*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37774: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fe0000; valaddr_reg:x3; val_offset:113322*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113322*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37775: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ff0000; valaddr_reg:x3; val_offset:113325*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113325*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37776: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ff8000; valaddr_reg:x3; val_offset:113328*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113328*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37777: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ffc000; valaddr_reg:x3; val_offset:113331*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113331*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37778: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ffe000; valaddr_reg:x3; val_offset:113334*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113334*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37779: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fff000; valaddr_reg:x3; val_offset:113337*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113337*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37780: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fff800; valaddr_reg:x3; val_offset:113340*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113340*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37781: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fffc00; valaddr_reg:x3; val_offset:113343*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113343*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37782: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fffe00; valaddr_reg:x3; val_offset:113346*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113346*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37783: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ffff00; valaddr_reg:x3; val_offset:113349*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113349*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37784: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ffff80; valaddr_reg:x3; val_offset:113352*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113352*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37785: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ffffc0; valaddr_reg:x3; val_offset:113355*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113355*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37786: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ffffe0; valaddr_reg:x3; val_offset:113358*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113358*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37787: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fffff0; valaddr_reg:x3; val_offset:113361*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113361*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37788: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fffff8; valaddr_reg:x3; val_offset:113364*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113364*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37789: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fffffc; valaddr_reg:x3; val_offset:113367*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113367*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37790: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29fffffe; valaddr_reg:x3; val_offset:113370*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113370*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37791: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x53 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x29ffffff; valaddr_reg:x3; val_offset:113373*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113373*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37792: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3f800001; valaddr_reg:x3; val_offset:113376*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113376*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37793: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3f800003; valaddr_reg:x3; val_offset:113379*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113379*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37794: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3f800007; valaddr_reg:x3; val_offset:113382*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113382*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37795: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3f999999; valaddr_reg:x3; val_offset:113385*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113385*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37796: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:113388*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113388*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37797: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:113391*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113391*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37798: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:113394*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113394*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37799: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:113397*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113397*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37800: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:113400*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113400*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37801: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:113403*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113403*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37802: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:113406*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113406*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37803: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:113409*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113409*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37804: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:113412*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113412*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37805: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:113415*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113415*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37806: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:113418*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113418*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37807: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3ca1e4 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x2b6daa and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3ca1e4; op2val:0x2b6daa; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:113421*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113421*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37808: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2000000; valaddr_reg:x3; val_offset:113424*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113424*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37809: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2000001; valaddr_reg:x3; val_offset:113427*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113427*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37810: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2000003; valaddr_reg:x3; val_offset:113430*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113430*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37811: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2000007; valaddr_reg:x3; val_offset:113433*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113433*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37812: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf200000f; valaddr_reg:x3; val_offset:113436*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113436*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37813: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf200001f; valaddr_reg:x3; val_offset:113439*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113439*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37814: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf200003f; valaddr_reg:x3; val_offset:113442*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113442*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37815: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf200007f; valaddr_reg:x3; val_offset:113445*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113445*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37816: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf20000ff; valaddr_reg:x3; val_offset:113448*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113448*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37817: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf20001ff; valaddr_reg:x3; val_offset:113451*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113451*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37818: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf20003ff; valaddr_reg:x3; val_offset:113454*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113454*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37819: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf20007ff; valaddr_reg:x3; val_offset:113457*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113457*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37820: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2000fff; valaddr_reg:x3; val_offset:113460*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113460*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37821: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2001fff; valaddr_reg:x3; val_offset:113463*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113463*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37822: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2003fff; valaddr_reg:x3; val_offset:113466*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113466*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37823: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2007fff; valaddr_reg:x3; val_offset:113469*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113469*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37824: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf200ffff; valaddr_reg:x3; val_offset:113472*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113472*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37825: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf201ffff; valaddr_reg:x3; val_offset:113475*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113475*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37826: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf203ffff; valaddr_reg:x3; val_offset:113478*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113478*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37827: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf207ffff; valaddr_reg:x3; val_offset:113481*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113481*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37828: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf20fffff; valaddr_reg:x3; val_offset:113484*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113484*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37829: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf21fffff; valaddr_reg:x3; val_offset:113487*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113487*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37830: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf23fffff; valaddr_reg:x3; val_offset:113490*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113490*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37831: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2400000; valaddr_reg:x3; val_offset:113493*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113493*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37832: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2600000; valaddr_reg:x3; val_offset:113496*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113496*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37833: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2700000; valaddr_reg:x3; val_offset:113499*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113499*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37834: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf2780000; valaddr_reg:x3; val_offset:113502*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113502*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37835: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27c0000; valaddr_reg:x3; val_offset:113505*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113505*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37836: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27e0000; valaddr_reg:x3; val_offset:113508*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113508*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37837: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27f0000; valaddr_reg:x3; val_offset:113511*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113511*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37838: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27f8000; valaddr_reg:x3; val_offset:113514*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113514*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37839: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27fc000; valaddr_reg:x3; val_offset:113517*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113517*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37840: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27fe000; valaddr_reg:x3; val_offset:113520*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113520*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37841: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27ff000; valaddr_reg:x3; val_offset:113523*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113523*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37842: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27ff800; valaddr_reg:x3; val_offset:113526*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113526*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37843: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27ffc00; valaddr_reg:x3; val_offset:113529*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113529*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37844: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27ffe00; valaddr_reg:x3; val_offset:113532*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113532*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37845: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27fff00; valaddr_reg:x3; val_offset:113535*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113535*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37846: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27fff80; valaddr_reg:x3; val_offset:113538*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113538*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37847: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27fffc0; valaddr_reg:x3; val_offset:113541*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113541*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37848: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27fffe0; valaddr_reg:x3; val_offset:113544*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113544*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37849: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27ffff0; valaddr_reg:x3; val_offset:113547*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113547*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37850: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27ffff8; valaddr_reg:x3; val_offset:113550*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113550*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37851: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27ffffc; valaddr_reg:x3; val_offset:113553*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113553*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37852: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27ffffe; valaddr_reg:x3; val_offset:113556*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113556*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37853: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xe4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xf27fffff; valaddr_reg:x3; val_offset:113559*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113559*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37854: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff000001; valaddr_reg:x3; val_offset:113562*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113562*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37855: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff000003; valaddr_reg:x3; val_offset:113565*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113565*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37856: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff000007; valaddr_reg:x3; val_offset:113568*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113568*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37857: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff199999; valaddr_reg:x3; val_offset:113571*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113571*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37858: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff249249; valaddr_reg:x3; val_offset:113574*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113574*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37859: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff333333; valaddr_reg:x3; val_offset:113577*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113577*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37860: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:113580*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113580*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37861: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:113583*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113583*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37862: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff444444; valaddr_reg:x3; val_offset:113586*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113586*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37863: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:113589*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113589*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37864: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:113592*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113592*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37865: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff666666; valaddr_reg:x3; val_offset:113595*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113595*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37866: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:113598*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113598*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37867: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:113601*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113601*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37868: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:113604*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113604*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37869: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3cee4f and fs2 == 1 and fe2 == 0x7f and fm2 == 0x2d7066 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3cee4f; op2val:0xbfad7066; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:113607*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113607*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37870: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:113610*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113610*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37871: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:113613*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113613*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37872: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:113616*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113616*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37873: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:113619*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113619*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37874: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:113622*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113622*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37875: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:113625*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113625*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37876: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:113628*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113628*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37877: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:113631*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113631*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37878: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:113634*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113634*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37879: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:113637*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113637*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37880: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:113640*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113640*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37881: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:113643*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113643*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37882: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:113646*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113646*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37883: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:113649*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113649*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37884: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:113652*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113652*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37885: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:113655*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113655*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37886: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3800000; valaddr_reg:x3; val_offset:113658*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113658*0 + 3*295*FLEN/8, x4, x1, x2) + +inst_37887: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3800001; valaddr_reg:x3; val_offset:113661*0 + 3*295*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113661*0 + 3*295*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696270847,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696287231,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696319999,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696385535,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696516607,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(696778751,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(697303039,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(698351615,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(700448767,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(700448768,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(702545920,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(703594496,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704118784,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704380928,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704512000,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704577536,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704610304,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704626688,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704634880,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704638976,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704641024,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704642048,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704642560,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704642816,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704642944,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704643008,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704643040,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704643056,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704643064,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704643068,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704643070,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(704643071,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2134680036,32,FLEN) +NAN_BOXED(2846122,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086272,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086273,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086275,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086279,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086287,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086303,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086335,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086399,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086527,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060086783,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060087295,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060088319,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060090367,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060094463,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060102655,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060119039,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060151807,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060217343,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060348415,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4060610559,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4061134847,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4062183423,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4064280575,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4064280576,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4066377728,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4067426304,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4067950592,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068212736,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068343808,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068409344,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068442112,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068458496,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068466688,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068470784,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068472832,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068473856,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474368,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474624,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474752,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474816,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474848,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474864,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474872,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474876,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474878,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4068474879,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2134699599,32,FLEN) +NAN_BOXED(3215814758,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720256,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720257,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-297.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-297.S new file mode 100644 index 000000000..e34010faa --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-297.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_37888: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3800003; valaddr_reg:x3; val_offset:113664*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113664*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37889: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3800007; valaddr_reg:x3; val_offset:113667*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113667*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37890: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x380000f; valaddr_reg:x3; val_offset:113670*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113670*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37891: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x380001f; valaddr_reg:x3; val_offset:113673*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113673*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37892: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x380003f; valaddr_reg:x3; val_offset:113676*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113676*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37893: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x380007f; valaddr_reg:x3; val_offset:113679*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113679*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37894: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x38000ff; valaddr_reg:x3; val_offset:113682*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113682*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37895: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x38001ff; valaddr_reg:x3; val_offset:113685*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113685*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37896: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x38003ff; valaddr_reg:x3; val_offset:113688*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113688*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37897: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x38007ff; valaddr_reg:x3; val_offset:113691*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113691*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37898: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3800fff; valaddr_reg:x3; val_offset:113694*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113694*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37899: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3801fff; valaddr_reg:x3; val_offset:113697*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113697*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37900: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3803fff; valaddr_reg:x3; val_offset:113700*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113700*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37901: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3807fff; valaddr_reg:x3; val_offset:113703*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113703*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37902: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x380ffff; valaddr_reg:x3; val_offset:113706*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113706*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37903: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x381ffff; valaddr_reg:x3; val_offset:113709*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113709*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37904: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x383ffff; valaddr_reg:x3; val_offset:113712*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113712*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37905: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x387ffff; valaddr_reg:x3; val_offset:113715*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113715*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37906: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x38fffff; valaddr_reg:x3; val_offset:113718*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113718*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37907: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x39fffff; valaddr_reg:x3; val_offset:113721*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113721*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37908: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3bfffff; valaddr_reg:x3; val_offset:113724*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113724*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37909: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3c00000; valaddr_reg:x3; val_offset:113727*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113727*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37910: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3e00000; valaddr_reg:x3; val_offset:113730*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113730*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37911: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3f00000; valaddr_reg:x3; val_offset:113733*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113733*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37912: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3f80000; valaddr_reg:x3; val_offset:113736*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113736*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37913: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fc0000; valaddr_reg:x3; val_offset:113739*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113739*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37914: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fe0000; valaddr_reg:x3; val_offset:113742*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113742*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37915: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ff0000; valaddr_reg:x3; val_offset:113745*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113745*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37916: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ff8000; valaddr_reg:x3; val_offset:113748*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113748*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37917: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ffc000; valaddr_reg:x3; val_offset:113751*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113751*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37918: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ffe000; valaddr_reg:x3; val_offset:113754*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113754*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37919: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fff000; valaddr_reg:x3; val_offset:113757*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113757*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37920: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fff800; valaddr_reg:x3; val_offset:113760*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113760*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37921: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fffc00; valaddr_reg:x3; val_offset:113763*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113763*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37922: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fffe00; valaddr_reg:x3; val_offset:113766*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113766*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37923: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ffff00; valaddr_reg:x3; val_offset:113769*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113769*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37924: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ffff80; valaddr_reg:x3; val_offset:113772*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113772*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37925: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ffffc0; valaddr_reg:x3; val_offset:113775*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113775*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37926: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ffffe0; valaddr_reg:x3; val_offset:113778*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113778*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37927: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fffff0; valaddr_reg:x3; val_offset:113781*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113781*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37928: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fffff8; valaddr_reg:x3; val_offset:113784*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113784*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37929: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fffffc; valaddr_reg:x3; val_offset:113787*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113787*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37930: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3fffffe; valaddr_reg:x3; val_offset:113790*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113790*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37931: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d7291 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d7291; op2val:0x0; +op3val:0x3ffffff; valaddr_reg:x3; val_offset:113793*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113793*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37932: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:113796*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113796*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37933: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:113799*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113799*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37934: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:113802*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113802*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37935: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:113805*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113805*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37936: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:113808*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113808*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37937: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:113811*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113811*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37938: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:113814*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113814*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37939: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:113817*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113817*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37940: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:113820*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113820*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37941: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:113823*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113823*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37942: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:113826*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113826*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37943: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:113829*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113829*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37944: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:113832*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113832*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37945: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:113835*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113835*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37946: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:113838*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113838*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37947: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:113841*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113841*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37948: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6800000; valaddr_reg:x3; val_offset:113844*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113844*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37949: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6800001; valaddr_reg:x3; val_offset:113847*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113847*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37950: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6800003; valaddr_reg:x3; val_offset:113850*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113850*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37951: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6800007; valaddr_reg:x3; val_offset:113853*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113853*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37952: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x680000f; valaddr_reg:x3; val_offset:113856*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113856*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37953: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x680001f; valaddr_reg:x3; val_offset:113859*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113859*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37954: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x680003f; valaddr_reg:x3; val_offset:113862*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113862*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37955: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x680007f; valaddr_reg:x3; val_offset:113865*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113865*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37956: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x68000ff; valaddr_reg:x3; val_offset:113868*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113868*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37957: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x68001ff; valaddr_reg:x3; val_offset:113871*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113871*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37958: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x68003ff; valaddr_reg:x3; val_offset:113874*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113874*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37959: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x68007ff; valaddr_reg:x3; val_offset:113877*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113877*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37960: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6800fff; valaddr_reg:x3; val_offset:113880*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113880*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37961: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6801fff; valaddr_reg:x3; val_offset:113883*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113883*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37962: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6803fff; valaddr_reg:x3; val_offset:113886*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113886*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37963: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6807fff; valaddr_reg:x3; val_offset:113889*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113889*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37964: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x680ffff; valaddr_reg:x3; val_offset:113892*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113892*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37965: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x681ffff; valaddr_reg:x3; val_offset:113895*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113895*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37966: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x683ffff; valaddr_reg:x3; val_offset:113898*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113898*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37967: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x687ffff; valaddr_reg:x3; val_offset:113901*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113901*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37968: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x68fffff; valaddr_reg:x3; val_offset:113904*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113904*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37969: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x69fffff; valaddr_reg:x3; val_offset:113907*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113907*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37970: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6bfffff; valaddr_reg:x3; val_offset:113910*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113910*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37971: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6c00000; valaddr_reg:x3; val_offset:113913*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113913*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37972: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6e00000; valaddr_reg:x3; val_offset:113916*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113916*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37973: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6f00000; valaddr_reg:x3; val_offset:113919*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113919*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37974: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6f80000; valaddr_reg:x3; val_offset:113922*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113922*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37975: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fc0000; valaddr_reg:x3; val_offset:113925*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113925*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37976: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fe0000; valaddr_reg:x3; val_offset:113928*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113928*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37977: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ff0000; valaddr_reg:x3; val_offset:113931*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113931*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37978: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ff8000; valaddr_reg:x3; val_offset:113934*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113934*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37979: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ffc000; valaddr_reg:x3; val_offset:113937*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113937*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37980: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ffe000; valaddr_reg:x3; val_offset:113940*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113940*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37981: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fff000; valaddr_reg:x3; val_offset:113943*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113943*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37982: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fff800; valaddr_reg:x3; val_offset:113946*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113946*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37983: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fffc00; valaddr_reg:x3; val_offset:113949*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113949*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37984: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fffe00; valaddr_reg:x3; val_offset:113952*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113952*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37985: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ffff00; valaddr_reg:x3; val_offset:113955*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113955*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37986: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ffff80; valaddr_reg:x3; val_offset:113958*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113958*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37987: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ffffc0; valaddr_reg:x3; val_offset:113961*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113961*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37988: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ffffe0; valaddr_reg:x3; val_offset:113964*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113964*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37989: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fffff0; valaddr_reg:x3; val_offset:113967*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113967*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37990: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fffff8; valaddr_reg:x3; val_offset:113970*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113970*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37991: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fffffc; valaddr_reg:x3; val_offset:113973*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113973*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37992: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6fffffe; valaddr_reg:x3; val_offset:113976*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113976*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37993: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3d8dc3 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3d8dc3; op2val:0x0; +op3val:0x6ffffff; valaddr_reg:x3; val_offset:113979*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113979*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37994: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:113982*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113982*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37995: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:113985*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113985*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37996: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:113988*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113988*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37997: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:113991*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113991*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37998: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:113994*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113994*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_37999: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:113997*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 113997*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38000: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:114000*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114000*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38001: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:114003*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114003*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38002: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:114006*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114006*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38003: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:114009*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114009*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38004: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:114012*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114012*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38005: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:114015*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114015*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38006: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:114018*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114018*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38007: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:114021*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114021*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38008: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:114024*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114024*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38009: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:114027*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114027*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38010: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b000000; valaddr_reg:x3; val_offset:114030*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114030*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38011: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b000001; valaddr_reg:x3; val_offset:114033*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114033*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38012: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b000003; valaddr_reg:x3; val_offset:114036*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114036*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38013: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b000007; valaddr_reg:x3; val_offset:114039*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114039*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38014: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b00000f; valaddr_reg:x3; val_offset:114042*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114042*0 + 3*296*FLEN/8, x4, x1, x2) + +inst_38015: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b00001f; valaddr_reg:x3; val_offset:114045*0 + 3*296*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114045*0 + 3*296*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720259,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720263,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720271,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720287,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720319,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720383,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720511,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720767,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58721279,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58722303,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58724351,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58728447,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58736639,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58753023,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58785791,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58851327,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58982399,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(59244543,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(59768831,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(60817407,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(62914559,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(62914560,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65011712,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66060288,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66584576,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66846720,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66977792,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67043328,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67076096,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67092480,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67100672,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67104768,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67106816,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67107840,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108352,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108608,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108736,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108800,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108832,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108848,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108856,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108860,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108862,32,FLEN) +NAN_BOXED(2134733457,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108863,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051904,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051905,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051907,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051911,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051919,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051935,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051967,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052031,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052159,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052415,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052927,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109053951,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109055999,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109060095,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109068287,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109084671,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109117439,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109182975,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109314047,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109576191,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(110100479,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(111149055,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(113246207,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(113246208,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(115343360,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(116391936,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(116916224,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117178368,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117309440,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117374976,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117407744,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117424128,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117432320,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117436416,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117438464,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117439488,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440000,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440256,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440384,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440448,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440480,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440496,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440504,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440508,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440510,32,FLEN) +NAN_BOXED(2134740419,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440511,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033024,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033025,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033027,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033031,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033039,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033055,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-298.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-298.S new file mode 100644 index 000000000..4ac6e385b --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-298.S @@ -0,0 +1,1222 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_38016: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b00003f; valaddr_reg:x3; val_offset:114048*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114048*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38017: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b00007f; valaddr_reg:x3; val_offset:114051*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114051*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38018: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b0000ff; valaddr_reg:x3; val_offset:114054*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114054*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38019: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b0001ff; valaddr_reg:x3; val_offset:114057*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114057*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38020: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b0003ff; valaddr_reg:x3; val_offset:114060*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114060*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38021: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b0007ff; valaddr_reg:x3; val_offset:114063*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114063*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38022: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b000fff; valaddr_reg:x3; val_offset:114066*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114066*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38023: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b001fff; valaddr_reg:x3; val_offset:114069*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114069*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38024: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b003fff; valaddr_reg:x3; val_offset:114072*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114072*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38025: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b007fff; valaddr_reg:x3; val_offset:114075*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114075*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38026: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b00ffff; valaddr_reg:x3; val_offset:114078*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114078*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38027: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b01ffff; valaddr_reg:x3; val_offset:114081*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114081*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38028: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b03ffff; valaddr_reg:x3; val_offset:114084*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114084*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38029: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b07ffff; valaddr_reg:x3; val_offset:114087*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114087*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38030: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b0fffff; valaddr_reg:x3; val_offset:114090*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114090*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38031: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b1fffff; valaddr_reg:x3; val_offset:114093*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114093*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38032: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b3fffff; valaddr_reg:x3; val_offset:114096*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114096*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38033: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b400000; valaddr_reg:x3; val_offset:114099*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114099*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38034: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b600000; valaddr_reg:x3; val_offset:114102*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114102*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38035: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b700000; valaddr_reg:x3; val_offset:114105*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114105*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38036: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b780000; valaddr_reg:x3; val_offset:114108*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114108*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38037: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7c0000; valaddr_reg:x3; val_offset:114111*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114111*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38038: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7e0000; valaddr_reg:x3; val_offset:114114*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114114*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38039: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7f0000; valaddr_reg:x3; val_offset:114117*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114117*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38040: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7f8000; valaddr_reg:x3; val_offset:114120*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114120*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38041: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7fc000; valaddr_reg:x3; val_offset:114123*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114123*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38042: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7fe000; valaddr_reg:x3; val_offset:114126*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114126*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38043: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7ff000; valaddr_reg:x3; val_offset:114129*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114129*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38044: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7ff800; valaddr_reg:x3; val_offset:114132*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114132*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38045: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7ffc00; valaddr_reg:x3; val_offset:114135*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114135*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38046: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7ffe00; valaddr_reg:x3; val_offset:114138*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114138*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38047: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7fff00; valaddr_reg:x3; val_offset:114141*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114141*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38048: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7fff80; valaddr_reg:x3; val_offset:114144*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114144*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38049: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7fffc0; valaddr_reg:x3; val_offset:114147*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114147*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38050: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7fffe0; valaddr_reg:x3; val_offset:114150*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114150*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38051: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7ffff0; valaddr_reg:x3; val_offset:114153*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114153*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38052: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7ffff8; valaddr_reg:x3; val_offset:114156*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114156*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38053: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7ffffc; valaddr_reg:x3; val_offset:114159*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114159*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38054: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7ffffe; valaddr_reg:x3; val_offset:114162*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114162*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38055: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3f6e88 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3f6e88; op2val:0x80000000; +op3val:0x8b7fffff; valaddr_reg:x3; val_offset:114165*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114165*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38056: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:114168*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114168*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38057: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:114171*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114171*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38058: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:114174*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114174*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38059: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:114177*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114177*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38060: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:114180*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114180*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38061: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:114183*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114183*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38062: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:114186*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114186*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38063: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:114189*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114189*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38064: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:114192*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114192*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38065: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:114195*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114195*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38066: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:114198*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114198*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38067: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:114201*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114201*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38068: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:114204*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114204*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38069: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:114207*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114207*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38070: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:114210*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114210*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38071: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:114213*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114213*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38072: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84000000; valaddr_reg:x3; val_offset:114216*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114216*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38073: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84000001; valaddr_reg:x3; val_offset:114219*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114219*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38074: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84000003; valaddr_reg:x3; val_offset:114222*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114222*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38075: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84000007; valaddr_reg:x3; val_offset:114225*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114225*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38076: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8400000f; valaddr_reg:x3; val_offset:114228*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114228*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38077: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8400001f; valaddr_reg:x3; val_offset:114231*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114231*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38078: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8400003f; valaddr_reg:x3; val_offset:114234*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114234*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38079: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8400007f; valaddr_reg:x3; val_offset:114237*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114237*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38080: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x840000ff; valaddr_reg:x3; val_offset:114240*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114240*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38081: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x840001ff; valaddr_reg:x3; val_offset:114243*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114243*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38082: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x840003ff; valaddr_reg:x3; val_offset:114246*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114246*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38083: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x840007ff; valaddr_reg:x3; val_offset:114249*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114249*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38084: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84000fff; valaddr_reg:x3; val_offset:114252*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114252*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38085: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84001fff; valaddr_reg:x3; val_offset:114255*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114255*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38086: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84003fff; valaddr_reg:x3; val_offset:114258*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114258*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38087: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84007fff; valaddr_reg:x3; val_offset:114261*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114261*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38088: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8400ffff; valaddr_reg:x3; val_offset:114264*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114264*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38089: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8401ffff; valaddr_reg:x3; val_offset:114267*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114267*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38090: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8403ffff; valaddr_reg:x3; val_offset:114270*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114270*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38091: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x8407ffff; valaddr_reg:x3; val_offset:114273*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114273*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38092: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x840fffff; valaddr_reg:x3; val_offset:114276*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114276*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38093: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x841fffff; valaddr_reg:x3; val_offset:114279*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114279*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38094: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x843fffff; valaddr_reg:x3; val_offset:114282*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114282*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38095: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84400000; valaddr_reg:x3; val_offset:114285*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114285*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38096: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84600000; valaddr_reg:x3; val_offset:114288*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114288*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38097: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84700000; valaddr_reg:x3; val_offset:114291*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114291*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38098: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x84780000; valaddr_reg:x3; val_offset:114294*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114294*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38099: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847c0000; valaddr_reg:x3; val_offset:114297*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114297*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38100: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847e0000; valaddr_reg:x3; val_offset:114300*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114300*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38101: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847f0000; valaddr_reg:x3; val_offset:114303*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114303*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38102: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847f8000; valaddr_reg:x3; val_offset:114306*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114306*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38103: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847fc000; valaddr_reg:x3; val_offset:114309*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114309*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38104: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847fe000; valaddr_reg:x3; val_offset:114312*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114312*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38105: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847ff000; valaddr_reg:x3; val_offset:114315*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114315*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38106: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847ff800; valaddr_reg:x3; val_offset:114318*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114318*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38107: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847ffc00; valaddr_reg:x3; val_offset:114321*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114321*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38108: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847ffe00; valaddr_reg:x3; val_offset:114324*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114324*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38109: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847fff00; valaddr_reg:x3; val_offset:114327*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114327*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38110: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847fff80; valaddr_reg:x3; val_offset:114330*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114330*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38111: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847fffc0; valaddr_reg:x3; val_offset:114333*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114333*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38112: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847fffe0; valaddr_reg:x3; val_offset:114336*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114336*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38113: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847ffff0; valaddr_reg:x3; val_offset:114339*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114339*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38114: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847ffff8; valaddr_reg:x3; val_offset:114342*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114342*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38115: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847ffffc; valaddr_reg:x3; val_offset:114345*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114345*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38116: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847ffffe; valaddr_reg:x3; val_offset:114348*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114348*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38117: +// fs1 == 0 and fe1 == 0xfe and fm1 == 0x3fd416 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7f3fd416; op2val:0x80000000; +op3val:0x847fffff; valaddr_reg:x3; val_offset:114351*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114351*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38118: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae800000; valaddr_reg:x3; val_offset:114354*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114354*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38119: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae800001; valaddr_reg:x3; val_offset:114357*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114357*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38120: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae800003; valaddr_reg:x3; val_offset:114360*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114360*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38121: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae80000f; valaddr_reg:x3; val_offset:114363*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114363*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38122: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae80001f; valaddr_reg:x3; val_offset:114366*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114366*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38123: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae80003f; valaddr_reg:x3; val_offset:114369*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114369*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38124: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae80007f; valaddr_reg:x3; val_offset:114372*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114372*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38125: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae8000ff; valaddr_reg:x3; val_offset:114375*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114375*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38126: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae8001ff; valaddr_reg:x3; val_offset:114378*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114378*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38127: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae8003ff; valaddr_reg:x3; val_offset:114381*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114381*0 + 3*297*FLEN/8, x4, x1, x2) + +inst_38128: +// fs1 == 0 and fe1 == 0xf0 and fm1 == 0x59914d and fs2 == 1 and fe2 == 0x0d and fm2 == 0x169c55 and fs3 == 1 and fe3 == 0x5d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7859914d; op2val:0x86969c55; +op3val:0xae8007ff; valaddr_reg:x3; val_offset:114384*0 + 3*297*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 114384*0 + 3*297*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033087,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033151,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033279,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033535,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332034047,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332035071,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332037119,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332041215,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332049407,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332065791,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332098559,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332164095,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332295167,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332557311,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2333081599,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2334130175,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2336227327,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2336227328,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2338324480,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2339373056,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2339897344,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340159488,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340290560,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340356096,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340388864,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340405248,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340413440,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340417536,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340419584,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340420608,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421120,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421376,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421504,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421568,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421600,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421616,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421624,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421628,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421630,32,FLEN) +NAN_BOXED(2134863496,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2340421631,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592512,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592513,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592515,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592519,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592527,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592543,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592575,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592639,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592767,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214593023,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214593535,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214594559,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214596607,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214600703,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214608895,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214625279,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214658047,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214723583,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214854655,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2215116799,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2215641087,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2216689663,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2218786815,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2218786816,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2220883968,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2221932544,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222456832,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222718976,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222850048,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222915584,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222948352,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222964736,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222972928,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222977024,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222979072,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980096,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980608,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980864,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980992,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981056,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981088,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981104,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981112,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981116,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981118,32,FLEN) +NAN_BOXED(2134889494,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981119,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624192,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624193,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624195,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624207,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624223,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624255,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624319,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624447,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927624703,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927625215,32,FLEN) +NAN_BOXED(2019135821,32,FLEN) +NAN_BOXED(2258017365,32,FLEN) +NAN_BOXED(2927626239,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-30.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-30.S new file mode 100644 index 000000000..8efcb1127 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-30.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_3712: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x368003ff; valaddr_reg:x3; val_offset:11136*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11136*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3713: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x368007ff; valaddr_reg:x3; val_offset:11139*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11139*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3714: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36800fff; valaddr_reg:x3; val_offset:11142*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11142*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3715: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36801fff; valaddr_reg:x3; val_offset:11145*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11145*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3716: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36803fff; valaddr_reg:x3; val_offset:11148*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11148*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3717: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36807fff; valaddr_reg:x3; val_offset:11151*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11151*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3718: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3680ffff; valaddr_reg:x3; val_offset:11154*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11154*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3719: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3681ffff; valaddr_reg:x3; val_offset:11157*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11157*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3720: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3683ffff; valaddr_reg:x3; val_offset:11160*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11160*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3721: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3687ffff; valaddr_reg:x3; val_offset:11163*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11163*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3722: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x368fffff; valaddr_reg:x3; val_offset:11166*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11166*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3723: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x369fffff; valaddr_reg:x3; val_offset:11169*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11169*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3724: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36bfffff; valaddr_reg:x3; val_offset:11172*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11172*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3725: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36c00000; valaddr_reg:x3; val_offset:11175*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11175*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3726: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36e00000; valaddr_reg:x3; val_offset:11178*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11178*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3727: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36f00000; valaddr_reg:x3; val_offset:11181*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11181*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3728: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36f80000; valaddr_reg:x3; val_offset:11184*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11184*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3729: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fc0000; valaddr_reg:x3; val_offset:11187*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11187*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3730: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fe0000; valaddr_reg:x3; val_offset:11190*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11190*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3731: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ff0000; valaddr_reg:x3; val_offset:11193*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11193*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3732: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ff8000; valaddr_reg:x3; val_offset:11196*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11196*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3733: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ffc000; valaddr_reg:x3; val_offset:11199*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11199*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3734: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ffe000; valaddr_reg:x3; val_offset:11202*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11202*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3735: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fff000; valaddr_reg:x3; val_offset:11205*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11205*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3736: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fff800; valaddr_reg:x3; val_offset:11208*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11208*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3737: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fffc00; valaddr_reg:x3; val_offset:11211*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11211*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3738: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fffe00; valaddr_reg:x3; val_offset:11214*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11214*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3739: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ffff00; valaddr_reg:x3; val_offset:11217*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11217*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3740: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ffff80; valaddr_reg:x3; val_offset:11220*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11220*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3741: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ffffc0; valaddr_reg:x3; val_offset:11223*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11223*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3742: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ffffe0; valaddr_reg:x3; val_offset:11226*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11226*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3743: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fffff0; valaddr_reg:x3; val_offset:11229*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11229*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3744: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fffff8; valaddr_reg:x3; val_offset:11232*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11232*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3745: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fffffc; valaddr_reg:x3; val_offset:11235*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11235*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3746: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36fffffe; valaddr_reg:x3; val_offset:11238*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11238*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3747: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x6d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x36ffffff; valaddr_reg:x3; val_offset:11241*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11241*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3748: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3f800001; valaddr_reg:x3; val_offset:11244*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11244*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3749: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3f800003; valaddr_reg:x3; val_offset:11247*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11247*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3750: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3f800007; valaddr_reg:x3; val_offset:11250*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11250*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3751: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3f999999; valaddr_reg:x3; val_offset:11253*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11253*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3752: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:11256*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11256*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3753: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:11259*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11259*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3754: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:11262*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11262*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3755: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:11265*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11265*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3756: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:11268*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11268*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3757: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:11271*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11271*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3758: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:11274*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11274*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3759: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:11277*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11277*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3760: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:11280*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11280*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3761: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:11283*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11283*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3762: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:11286*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11286*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3763: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0c97c9 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x6911ef and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8c97c9; op2val:0x16911ef; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:11289*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11289*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3764: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80000000; valaddr_reg:x3; val_offset:11292*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11292*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3765: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:11295*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11295*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3766: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:11298*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11298*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3767: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:11301*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11301*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3768: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8000000f; valaddr_reg:x3; val_offset:11304*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11304*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3769: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8000001f; valaddr_reg:x3; val_offset:11307*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11307*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3770: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8000003f; valaddr_reg:x3; val_offset:11310*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11310*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3771: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8000007f; valaddr_reg:x3; val_offset:11313*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11313*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3772: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x800000ff; valaddr_reg:x3; val_offset:11316*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11316*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3773: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x800001ff; valaddr_reg:x3; val_offset:11319*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11319*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3774: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x800003ff; valaddr_reg:x3; val_offset:11322*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11322*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3775: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x800007ff; valaddr_reg:x3; val_offset:11325*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11325*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3776: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80000fff; valaddr_reg:x3; val_offset:11328*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11328*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3777: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80001fff; valaddr_reg:x3; val_offset:11331*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11331*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3778: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80003fff; valaddr_reg:x3; val_offset:11334*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11334*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3779: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80007fff; valaddr_reg:x3; val_offset:11337*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11337*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3780: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8000ffff; valaddr_reg:x3; val_offset:11340*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11340*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3781: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8001ffff; valaddr_reg:x3; val_offset:11343*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11343*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3782: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8003ffff; valaddr_reg:x3; val_offset:11346*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11346*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3783: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8007ffff; valaddr_reg:x3; val_offset:11349*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11349*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3784: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x800fffff; valaddr_reg:x3; val_offset:11352*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11352*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3785: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:11355*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11355*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3786: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x801fffff; valaddr_reg:x3; val_offset:11358*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11358*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3787: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:11361*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11361*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3788: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:11364*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11364*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3789: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:11367*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11367*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3790: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:11370*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11370*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3791: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x803fffff; valaddr_reg:x3; val_offset:11373*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11373*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3792: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80400000; valaddr_reg:x3; val_offset:11376*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11376*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3793: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:11379*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11379*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3794: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:11382*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11382*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3795: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:11385*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11385*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3796: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80600000; valaddr_reg:x3; val_offset:11388*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11388*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3797: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:11391*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11391*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3798: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:11394*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11394*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3799: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80700000; valaddr_reg:x3; val_offset:11397*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11397*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3800: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x80780000; valaddr_reg:x3; val_offset:11400*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11400*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3801: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807c0000; valaddr_reg:x3; val_offset:11403*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11403*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3802: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807e0000; valaddr_reg:x3; val_offset:11406*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11406*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3803: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807f0000; valaddr_reg:x3; val_offset:11409*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11409*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3804: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807f8000; valaddr_reg:x3; val_offset:11412*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11412*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3805: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807fc000; valaddr_reg:x3; val_offset:11415*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11415*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3806: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807fe000; valaddr_reg:x3; val_offset:11418*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11418*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3807: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807ff000; valaddr_reg:x3; val_offset:11421*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11421*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3808: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807ff800; valaddr_reg:x3; val_offset:11424*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11424*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3809: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807ffc00; valaddr_reg:x3; val_offset:11427*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11427*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3810: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807ffe00; valaddr_reg:x3; val_offset:11430*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11430*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3811: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807fff00; valaddr_reg:x3; val_offset:11433*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11433*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3812: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807fff80; valaddr_reg:x3; val_offset:11436*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11436*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3813: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807fffc0; valaddr_reg:x3; val_offset:11439*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11439*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3814: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807fffe0; valaddr_reg:x3; val_offset:11442*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11442*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3815: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807ffff0; valaddr_reg:x3; val_offset:11445*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11445*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3816: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:11448*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11448*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3817: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:11451*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11451*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3818: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:11454*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11454*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3819: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f43fc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f43fc; op2val:0x80000000; +op3val:0x807fffff; valaddr_reg:x3; val_offset:11457*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11457*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3820: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:11460*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11460*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3821: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:11463*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11463*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3822: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:11466*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11466*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3823: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:11469*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11469*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3824: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:11472*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11472*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3825: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:11475*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11475*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3826: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:11478*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11478*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3827: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:11481*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11481*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3828: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:11484*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11484*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3829: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:11487*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11487*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3830: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:11490*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11490*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3831: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:11493*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11493*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3832: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:11496*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11496*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3833: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:11499*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11499*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3834: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:11502*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11502*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3835: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:11505*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11505*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3836: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89800000; valaddr_reg:x3; val_offset:11508*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11508*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3837: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89800001; valaddr_reg:x3; val_offset:11511*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11511*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3838: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89800003; valaddr_reg:x3; val_offset:11514*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11514*0 + 3*29*FLEN/8, x4, x1, x2) + +inst_3839: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89800007; valaddr_reg:x3; val_offset:11517*0 + 3*29*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11517*0 + 3*29*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914359295,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914360319,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914362367,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914366463,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914374655,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914391039,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914423807,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914489343,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914620415,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(914882559,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(915406847,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(916455423,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(918552575,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(918552576,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(920649728,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(921698304,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922222592,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922484736,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922615808,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922681344,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922714112,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922730496,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922738688,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922742784,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922744832,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922745856,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746368,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746624,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746752,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746816,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746848,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746864,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746872,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746876,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746878,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(922746879,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2106365897,32,FLEN) +NAN_BOXED(23663087,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483663,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483679,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483711,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483775,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483903,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484159,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147484671,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147485695,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147487743,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147491839,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147500031,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147516415,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147549183,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147614719,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147745791,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148007935,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2148532223,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149580799,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677951,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151677952,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153775104,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154823680,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155347968,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155610112,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155741184,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155806720,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155839488,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155855872,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155864064,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155868160,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155870208,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871232,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155871744,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872000,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872128,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872192,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872224,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872240,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2106541052,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872255,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867200,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867201,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867203,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867207,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-31.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-31.S new file mode 100644 index 000000000..a508539e3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-31.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_3840: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x8980000f; valaddr_reg:x3; val_offset:11520*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11520*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3841: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x8980001f; valaddr_reg:x3; val_offset:11523*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11523*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3842: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x8980003f; valaddr_reg:x3; val_offset:11526*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11526*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3843: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x8980007f; valaddr_reg:x3; val_offset:11529*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11529*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3844: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x898000ff; valaddr_reg:x3; val_offset:11532*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11532*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3845: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x898001ff; valaddr_reg:x3; val_offset:11535*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11535*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3846: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x898003ff; valaddr_reg:x3; val_offset:11538*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11538*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3847: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x898007ff; valaddr_reg:x3; val_offset:11541*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11541*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3848: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89800fff; valaddr_reg:x3; val_offset:11544*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11544*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3849: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89801fff; valaddr_reg:x3; val_offset:11547*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11547*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3850: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89803fff; valaddr_reg:x3; val_offset:11550*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11550*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3851: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89807fff; valaddr_reg:x3; val_offset:11553*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11553*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3852: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x8980ffff; valaddr_reg:x3; val_offset:11556*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11556*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3853: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x8981ffff; valaddr_reg:x3; val_offset:11559*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11559*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3854: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x8983ffff; valaddr_reg:x3; val_offset:11562*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11562*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3855: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x8987ffff; valaddr_reg:x3; val_offset:11565*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11565*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3856: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x898fffff; valaddr_reg:x3; val_offset:11568*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11568*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3857: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x899fffff; valaddr_reg:x3; val_offset:11571*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11571*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3858: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89bfffff; valaddr_reg:x3; val_offset:11574*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11574*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3859: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89c00000; valaddr_reg:x3; val_offset:11577*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11577*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3860: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89e00000; valaddr_reg:x3; val_offset:11580*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11580*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3861: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89f00000; valaddr_reg:x3; val_offset:11583*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11583*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3862: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89f80000; valaddr_reg:x3; val_offset:11586*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11586*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3863: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fc0000; valaddr_reg:x3; val_offset:11589*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11589*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3864: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fe0000; valaddr_reg:x3; val_offset:11592*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11592*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3865: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ff0000; valaddr_reg:x3; val_offset:11595*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11595*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3866: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ff8000; valaddr_reg:x3; val_offset:11598*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11598*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3867: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ffc000; valaddr_reg:x3; val_offset:11601*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11601*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3868: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ffe000; valaddr_reg:x3; val_offset:11604*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11604*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3869: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fff000; valaddr_reg:x3; val_offset:11607*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11607*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3870: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fff800; valaddr_reg:x3; val_offset:11610*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11610*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3871: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fffc00; valaddr_reg:x3; val_offset:11613*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11613*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3872: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fffe00; valaddr_reg:x3; val_offset:11616*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11616*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3873: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ffff00; valaddr_reg:x3; val_offset:11619*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11619*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3874: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ffff80; valaddr_reg:x3; val_offset:11622*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11622*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3875: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ffffc0; valaddr_reg:x3; val_offset:11625*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11625*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3876: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ffffe0; valaddr_reg:x3; val_offset:11628*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11628*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3877: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fffff0; valaddr_reg:x3; val_offset:11631*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11631*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3878: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fffff8; valaddr_reg:x3; val_offset:11634*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11634*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3879: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fffffc; valaddr_reg:x3; val_offset:11637*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11637*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3880: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89fffffe; valaddr_reg:x3; val_offset:11640*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11640*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3881: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0f9457 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x13 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8f9457; op2val:0x80000000; +op3val:0x89ffffff; valaddr_reg:x3; val_offset:11643*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11643*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3882: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbf800001; valaddr_reg:x3; val_offset:11646*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11646*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3883: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbf800003; valaddr_reg:x3; val_offset:11649*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11649*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3884: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbf800007; valaddr_reg:x3; val_offset:11652*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11652*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3885: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbf999999; valaddr_reg:x3; val_offset:11655*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11655*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3886: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:11658*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11658*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3887: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:11661*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11661*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3888: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:11664*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11664*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3889: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:11667*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11667*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3890: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:11670*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11670*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3891: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:11673*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11673*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3892: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:11676*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11676*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3893: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:11679*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11679*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3894: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:11682*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11682*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3895: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:11685*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11685*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3896: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:11688*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11688*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3897: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:11691*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11691*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3898: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce800000; valaddr_reg:x3; val_offset:11694*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11694*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3899: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce800001; valaddr_reg:x3; val_offset:11697*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11697*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3900: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce800003; valaddr_reg:x3; val_offset:11700*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11700*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3901: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce800007; valaddr_reg:x3; val_offset:11703*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11703*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3902: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce80000f; valaddr_reg:x3; val_offset:11706*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11706*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3903: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce80001f; valaddr_reg:x3; val_offset:11709*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11709*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3904: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce80003f; valaddr_reg:x3; val_offset:11712*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11712*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3905: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce80007f; valaddr_reg:x3; val_offset:11715*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11715*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3906: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce8000ff; valaddr_reg:x3; val_offset:11718*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11718*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3907: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce8001ff; valaddr_reg:x3; val_offset:11721*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11721*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3908: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce8003ff; valaddr_reg:x3; val_offset:11724*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11724*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3909: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce8007ff; valaddr_reg:x3; val_offset:11727*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11727*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3910: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce800fff; valaddr_reg:x3; val_offset:11730*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11730*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3911: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce801fff; valaddr_reg:x3; val_offset:11733*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11733*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3912: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce803fff; valaddr_reg:x3; val_offset:11736*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11736*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3913: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce807fff; valaddr_reg:x3; val_offset:11739*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11739*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3914: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce80ffff; valaddr_reg:x3; val_offset:11742*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11742*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3915: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce81ffff; valaddr_reg:x3; val_offset:11745*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11745*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3916: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce83ffff; valaddr_reg:x3; val_offset:11748*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11748*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3917: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce87ffff; valaddr_reg:x3; val_offset:11751*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11751*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3918: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce8fffff; valaddr_reg:x3; val_offset:11754*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11754*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3919: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xce9fffff; valaddr_reg:x3; val_offset:11757*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11757*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3920: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcebfffff; valaddr_reg:x3; val_offset:11760*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11760*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3921: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcec00000; valaddr_reg:x3; val_offset:11763*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11763*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3922: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcee00000; valaddr_reg:x3; val_offset:11766*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11766*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3923: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcef00000; valaddr_reg:x3; val_offset:11769*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11769*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3924: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcef80000; valaddr_reg:x3; val_offset:11772*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11772*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3925: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefc0000; valaddr_reg:x3; val_offset:11775*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11775*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3926: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefe0000; valaddr_reg:x3; val_offset:11778*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11778*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3927: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceff0000; valaddr_reg:x3; val_offset:11781*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11781*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3928: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceff8000; valaddr_reg:x3; val_offset:11784*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11784*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3929: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceffc000; valaddr_reg:x3; val_offset:11787*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11787*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3930: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceffe000; valaddr_reg:x3; val_offset:11790*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11790*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3931: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefff000; valaddr_reg:x3; val_offset:11793*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11793*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3932: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefff800; valaddr_reg:x3; val_offset:11796*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11796*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3933: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefffc00; valaddr_reg:x3; val_offset:11799*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11799*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3934: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefffe00; valaddr_reg:x3; val_offset:11802*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11802*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3935: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceffff00; valaddr_reg:x3; val_offset:11805*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11805*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3936: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceffff80; valaddr_reg:x3; val_offset:11808*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11808*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3937: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceffffc0; valaddr_reg:x3; val_offset:11811*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11811*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3938: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceffffe0; valaddr_reg:x3; val_offset:11814*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11814*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3939: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefffff0; valaddr_reg:x3; val_offset:11817*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11817*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3940: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefffff8; valaddr_reg:x3; val_offset:11820*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11820*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3941: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefffffc; valaddr_reg:x3; val_offset:11823*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11823*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3942: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xcefffffe; valaddr_reg:x3; val_offset:11826*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11826*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3943: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x0fef4a and fs2 == 1 and fe2 == 0x02 and fm2 == 0x63a8a3 and fs3 == 1 and fe3 == 0x9d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d8fef4a; op2val:0x8163a8a3; +op3val:0xceffffff; valaddr_reg:x3; val_offset:11829*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11829*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3944: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:11832*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11832*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3945: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:11835*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11835*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3946: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:11838*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11838*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3947: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:11841*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11841*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3948: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:11844*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11844*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3949: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:11847*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11847*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3950: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:11850*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11850*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3951: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:11853*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11853*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3952: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:11856*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11856*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3953: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:11859*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11859*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3954: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:11862*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11862*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3955: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:11865*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11865*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3956: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:11868*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11868*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3957: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:11871*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11871*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3958: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:11874*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11874*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3959: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:11877*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11877*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3960: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5800000; valaddr_reg:x3; val_offset:11880*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11880*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3961: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5800001; valaddr_reg:x3; val_offset:11883*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11883*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3962: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5800003; valaddr_reg:x3; val_offset:11886*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11886*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3963: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5800007; valaddr_reg:x3; val_offset:11889*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11889*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3964: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x580000f; valaddr_reg:x3; val_offset:11892*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11892*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3965: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x580001f; valaddr_reg:x3; val_offset:11895*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11895*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3966: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x580003f; valaddr_reg:x3; val_offset:11898*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11898*0 + 3*30*FLEN/8, x4, x1, x2) + +inst_3967: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x580007f; valaddr_reg:x3; val_offset:11901*0 + 3*30*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11901*0 + 3*30*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867215,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867231,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867263,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867327,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867455,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867711,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306868223,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306869247,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306871295,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306875391,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306883583,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306899967,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306932735,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306998271,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307129343,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307391487,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2307915775,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2308964351,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2311061503,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2311061504,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2313158656,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314207232,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314731520,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2314993664,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315124736,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315190272,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315223040,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315239424,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315247616,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315251712,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315253760,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315254784,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255296,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255552,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255680,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255744,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255776,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255792,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255800,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255804,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255806,32,FLEN) +NAN_BOXED(2106561623,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255807,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495104,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495105,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495107,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495111,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495119,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495135,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495167,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495231,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495359,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464495615,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464496127,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464497151,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464499199,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464503295,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464511487,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464527871,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464560639,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464626175,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3464757247,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3465019391,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3465543679,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3466592255,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3468689407,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3468689408,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3470786560,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3471835136,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472359424,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472621568,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472752640,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472818176,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472850944,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472867328,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472875520,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472879616,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472881664,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472882688,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883200,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883456,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883584,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883648,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883680,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883696,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883704,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883708,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883710,32,FLEN) +NAN_BOXED(2106584906,32,FLEN) +NAN_BOXED(2170792099,32,FLEN) +NAN_BOXED(3472883711,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274688,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274689,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274691,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274695,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274703,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274719,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274751,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274815,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-32.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-32.S new file mode 100644 index 000000000..985ed7061 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-32.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_3968: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x58000ff; valaddr_reg:x3; val_offset:11904*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11904*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3969: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x58001ff; valaddr_reg:x3; val_offset:11907*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11907*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3970: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x58003ff; valaddr_reg:x3; val_offset:11910*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11910*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3971: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x58007ff; valaddr_reg:x3; val_offset:11913*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11913*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3972: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5800fff; valaddr_reg:x3; val_offset:11916*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11916*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3973: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5801fff; valaddr_reg:x3; val_offset:11919*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11919*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3974: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5803fff; valaddr_reg:x3; val_offset:11922*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11922*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3975: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5807fff; valaddr_reg:x3; val_offset:11925*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11925*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3976: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x580ffff; valaddr_reg:x3; val_offset:11928*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11928*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3977: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x581ffff; valaddr_reg:x3; val_offset:11931*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11931*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3978: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x583ffff; valaddr_reg:x3; val_offset:11934*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11934*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3979: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x587ffff; valaddr_reg:x3; val_offset:11937*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11937*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3980: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x58fffff; valaddr_reg:x3; val_offset:11940*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11940*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3981: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x59fffff; valaddr_reg:x3; val_offset:11943*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11943*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3982: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5bfffff; valaddr_reg:x3; val_offset:11946*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11946*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3983: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5c00000; valaddr_reg:x3; val_offset:11949*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11949*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3984: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5e00000; valaddr_reg:x3; val_offset:11952*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11952*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3985: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5f00000; valaddr_reg:x3; val_offset:11955*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11955*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3986: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5f80000; valaddr_reg:x3; val_offset:11958*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11958*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3987: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fc0000; valaddr_reg:x3; val_offset:11961*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11961*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3988: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fe0000; valaddr_reg:x3; val_offset:11964*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11964*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3989: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ff0000; valaddr_reg:x3; val_offset:11967*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11967*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3990: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ff8000; valaddr_reg:x3; val_offset:11970*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11970*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3991: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ffc000; valaddr_reg:x3; val_offset:11973*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11973*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3992: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ffe000; valaddr_reg:x3; val_offset:11976*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11976*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3993: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fff000; valaddr_reg:x3; val_offset:11979*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11979*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3994: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fff800; valaddr_reg:x3; val_offset:11982*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11982*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3995: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fffc00; valaddr_reg:x3; val_offset:11985*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11985*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3996: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fffe00; valaddr_reg:x3; val_offset:11988*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11988*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3997: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ffff00; valaddr_reg:x3; val_offset:11991*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11991*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3998: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ffff80; valaddr_reg:x3; val_offset:11994*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11994*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_3999: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ffffc0; valaddr_reg:x3; val_offset:11997*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 11997*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4000: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ffffe0; valaddr_reg:x3; val_offset:12000*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12000*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4001: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fffff0; valaddr_reg:x3; val_offset:12003*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12003*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4002: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fffff8; valaddr_reg:x3; val_offset:12006*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12006*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4003: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fffffc; valaddr_reg:x3; val_offset:12009*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12009*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4004: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5fffffe; valaddr_reg:x3; val_offset:12012*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12012*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4005: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x11a8f8 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d91a8f8; op2val:0x0; +op3val:0x5ffffff; valaddr_reg:x3; val_offset:12015*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12015*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4006: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:12018*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12018*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4007: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:12021*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12021*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4008: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:12024*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12024*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4009: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:12027*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12027*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4010: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:12030*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12030*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4011: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:12033*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12033*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4012: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:12036*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12036*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4013: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:12039*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12039*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4014: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:12042*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12042*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4015: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:12045*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12045*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4016: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:12048*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12048*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4017: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:12051*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12051*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4018: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:12054*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12054*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4019: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:12057*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12057*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4020: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:12060*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12060*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4021: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:12063*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12063*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4022: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91800000; valaddr_reg:x3; val_offset:12066*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12066*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4023: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91800001; valaddr_reg:x3; val_offset:12069*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12069*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4024: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91800003; valaddr_reg:x3; val_offset:12072*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12072*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4025: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91800007; valaddr_reg:x3; val_offset:12075*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12075*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4026: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x9180000f; valaddr_reg:x3; val_offset:12078*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12078*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4027: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x9180001f; valaddr_reg:x3; val_offset:12081*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12081*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4028: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x9180003f; valaddr_reg:x3; val_offset:12084*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12084*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4029: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x9180007f; valaddr_reg:x3; val_offset:12087*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12087*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4030: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x918000ff; valaddr_reg:x3; val_offset:12090*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12090*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4031: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x918001ff; valaddr_reg:x3; val_offset:12093*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12093*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4032: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x918003ff; valaddr_reg:x3; val_offset:12096*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12096*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4033: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x918007ff; valaddr_reg:x3; val_offset:12099*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12099*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4034: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91800fff; valaddr_reg:x3; val_offset:12102*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12102*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4035: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91801fff; valaddr_reg:x3; val_offset:12105*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12105*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4036: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91803fff; valaddr_reg:x3; val_offset:12108*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12108*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4037: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91807fff; valaddr_reg:x3; val_offset:12111*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12111*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4038: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x9180ffff; valaddr_reg:x3; val_offset:12114*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12114*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4039: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x9181ffff; valaddr_reg:x3; val_offset:12117*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12117*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4040: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x9183ffff; valaddr_reg:x3; val_offset:12120*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12120*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4041: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x9187ffff; valaddr_reg:x3; val_offset:12123*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12123*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4042: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x918fffff; valaddr_reg:x3; val_offset:12126*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12126*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4043: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x919fffff; valaddr_reg:x3; val_offset:12129*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12129*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4044: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91bfffff; valaddr_reg:x3; val_offset:12132*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12132*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4045: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91c00000; valaddr_reg:x3; val_offset:12135*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12135*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4046: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91e00000; valaddr_reg:x3; val_offset:12138*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12138*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4047: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91f00000; valaddr_reg:x3; val_offset:12141*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12141*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4048: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91f80000; valaddr_reg:x3; val_offset:12144*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12144*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4049: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fc0000; valaddr_reg:x3; val_offset:12147*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12147*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4050: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fe0000; valaddr_reg:x3; val_offset:12150*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12150*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4051: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ff0000; valaddr_reg:x3; val_offset:12153*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12153*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4052: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ff8000; valaddr_reg:x3; val_offset:12156*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12156*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4053: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ffc000; valaddr_reg:x3; val_offset:12159*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12159*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4054: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ffe000; valaddr_reg:x3; val_offset:12162*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12162*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4055: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fff000; valaddr_reg:x3; val_offset:12165*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12165*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4056: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fff800; valaddr_reg:x3; val_offset:12168*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12168*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4057: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fffc00; valaddr_reg:x3; val_offset:12171*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12171*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4058: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fffe00; valaddr_reg:x3; val_offset:12174*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12174*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4059: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ffff00; valaddr_reg:x3; val_offset:12177*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12177*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4060: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ffff80; valaddr_reg:x3; val_offset:12180*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12180*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4061: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ffffc0; valaddr_reg:x3; val_offset:12183*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12183*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4062: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ffffe0; valaddr_reg:x3; val_offset:12186*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12186*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4063: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fffff0; valaddr_reg:x3; val_offset:12189*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12189*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4064: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fffff8; valaddr_reg:x3; val_offset:12192*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12192*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4065: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fffffc; valaddr_reg:x3; val_offset:12195*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12195*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4066: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91fffffe; valaddr_reg:x3; val_offset:12198*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12198*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4067: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x16a540 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x23 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d96a540; op2val:0x80000000; +op3val:0x91ffffff; valaddr_reg:x3; val_offset:12201*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12201*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4068: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:12204*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12204*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4069: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:12207*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12207*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4070: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:12210*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12210*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4071: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:12213*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12213*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4072: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:12216*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12216*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4073: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:12219*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12219*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4074: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:12222*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12222*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4075: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:12225*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12225*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4076: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:12228*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12228*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4077: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:12231*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12231*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4078: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:12234*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12234*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4079: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:12237*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12237*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4080: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:12240*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12240*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4081: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:12243*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12243*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4082: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:12246*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12246*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4083: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:12249*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12249*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4084: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9000000; valaddr_reg:x3; val_offset:12252*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12252*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4085: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9000001; valaddr_reg:x3; val_offset:12255*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12255*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4086: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9000003; valaddr_reg:x3; val_offset:12258*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12258*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4087: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9000007; valaddr_reg:x3; val_offset:12261*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12261*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4088: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x900000f; valaddr_reg:x3; val_offset:12264*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12264*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4089: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x900001f; valaddr_reg:x3; val_offset:12267*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12267*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4090: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x900003f; valaddr_reg:x3; val_offset:12270*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12270*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4091: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x900007f; valaddr_reg:x3; val_offset:12273*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12273*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4092: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x90000ff; valaddr_reg:x3; val_offset:12276*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12276*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4093: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x90001ff; valaddr_reg:x3; val_offset:12279*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12279*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4094: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x90003ff; valaddr_reg:x3; val_offset:12282*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12282*0 + 3*31*FLEN/8, x4, x1, x2) + +inst_4095: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x90007ff; valaddr_reg:x3; val_offset:12285*0 + 3*31*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12285*0 + 3*31*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274943,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92275199,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92275711,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92276735,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92278783,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92282879,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92291071,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92307455,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92340223,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92405759,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92536831,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92798975,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(93323263,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(94371839,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(96468991,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(96468992,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(98566144,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(99614720,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100139008,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100401152,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100532224,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100597760,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100630528,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100646912,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100655104,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100659200,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100661248,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100662272,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100662784,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663040,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663168,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663232,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663264,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663280,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663288,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663292,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663294,32,FLEN) +NAN_BOXED(2106697976,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(100663295,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441084928,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441084929,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441084931,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441084935,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441084943,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441084959,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441084991,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441085055,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441085183,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441085439,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441085951,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441086975,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441089023,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441093119,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441101311,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441117695,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441150463,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441215999,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441347071,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2441609215,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2442133503,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2443182079,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2445279231,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2445279232,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2447376384,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2448424960,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2448949248,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449211392,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449342464,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449408000,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449440768,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449457152,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449465344,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449469440,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449471488,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449472512,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473024,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473280,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473408,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473472,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473504,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473520,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473528,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473532,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473534,32,FLEN) +NAN_BOXED(2107024704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2449473535,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994944,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994945,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994947,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994951,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994959,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994975,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995007,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995071,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995199,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995455,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150995967,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150996991,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-33.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-33.S new file mode 100644 index 000000000..1c336a4bc --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-33.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_4096: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9000fff; valaddr_reg:x3; val_offset:12288*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12288*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4097: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9001fff; valaddr_reg:x3; val_offset:12291*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12291*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4098: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9003fff; valaddr_reg:x3; val_offset:12294*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12294*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4099: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9007fff; valaddr_reg:x3; val_offset:12297*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12297*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4100: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x900ffff; valaddr_reg:x3; val_offset:12300*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12300*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4101: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x901ffff; valaddr_reg:x3; val_offset:12303*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12303*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4102: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x903ffff; valaddr_reg:x3; val_offset:12306*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12306*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4103: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x907ffff; valaddr_reg:x3; val_offset:12309*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12309*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4104: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x90fffff; valaddr_reg:x3; val_offset:12312*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12312*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4105: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x91fffff; valaddr_reg:x3; val_offset:12315*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12315*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4106: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x93fffff; valaddr_reg:x3; val_offset:12318*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12318*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4107: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9400000; valaddr_reg:x3; val_offset:12321*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12321*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4108: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9600000; valaddr_reg:x3; val_offset:12324*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12324*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4109: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9700000; valaddr_reg:x3; val_offset:12327*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12327*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4110: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x9780000; valaddr_reg:x3; val_offset:12330*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12330*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4111: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97c0000; valaddr_reg:x3; val_offset:12333*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12333*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4112: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97e0000; valaddr_reg:x3; val_offset:12336*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12336*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4113: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97f0000; valaddr_reg:x3; val_offset:12339*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12339*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4114: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97f8000; valaddr_reg:x3; val_offset:12342*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12342*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4115: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97fc000; valaddr_reg:x3; val_offset:12345*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12345*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4116: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97fe000; valaddr_reg:x3; val_offset:12348*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12348*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4117: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97ff000; valaddr_reg:x3; val_offset:12351*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12351*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4118: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97ff800; valaddr_reg:x3; val_offset:12354*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12354*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4119: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97ffc00; valaddr_reg:x3; val_offset:12357*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12357*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4120: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97ffe00; valaddr_reg:x3; val_offset:12360*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12360*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4121: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97fff00; valaddr_reg:x3; val_offset:12363*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12363*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4122: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97fff80; valaddr_reg:x3; val_offset:12366*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12366*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4123: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97fffc0; valaddr_reg:x3; val_offset:12369*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12369*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4124: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97fffe0; valaddr_reg:x3; val_offset:12372*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12372*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4125: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97ffff0; valaddr_reg:x3; val_offset:12375*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12375*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4126: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97ffff8; valaddr_reg:x3; val_offset:12378*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12378*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4127: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97ffffc; valaddr_reg:x3; val_offset:12381*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12381*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4128: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97ffffe; valaddr_reg:x3; val_offset:12384*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12384*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4129: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x17b353 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d97b353; op2val:0x0; +op3val:0x97fffff; valaddr_reg:x3; val_offset:12387*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12387*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4130: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:12390*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12390*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4131: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:12393*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12393*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4132: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:12396*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12396*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4133: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:12399*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12399*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4134: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:12402*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12402*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4135: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:12405*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12405*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4136: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:12408*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12408*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4137: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:12411*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12411*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4138: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:12414*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12414*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4139: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:12417*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12417*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4140: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:12420*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12420*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4141: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:12423*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12423*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4142: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:12426*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12426*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4143: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:12429*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12429*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4144: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:12432*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12432*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4145: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:12435*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12435*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4146: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90000000; valaddr_reg:x3; val_offset:12438*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12438*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4147: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90000001; valaddr_reg:x3; val_offset:12441*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12441*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4148: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90000003; valaddr_reg:x3; val_offset:12444*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12444*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4149: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90000007; valaddr_reg:x3; val_offset:12447*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12447*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4150: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x9000000f; valaddr_reg:x3; val_offset:12450*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12450*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4151: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x9000001f; valaddr_reg:x3; val_offset:12453*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12453*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4152: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x9000003f; valaddr_reg:x3; val_offset:12456*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12456*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4153: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x9000007f; valaddr_reg:x3; val_offset:12459*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12459*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4154: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x900000ff; valaddr_reg:x3; val_offset:12462*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12462*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4155: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x900001ff; valaddr_reg:x3; val_offset:12465*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12465*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4156: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x900003ff; valaddr_reg:x3; val_offset:12468*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12468*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4157: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x900007ff; valaddr_reg:x3; val_offset:12471*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12471*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4158: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90000fff; valaddr_reg:x3; val_offset:12474*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12474*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4159: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90001fff; valaddr_reg:x3; val_offset:12477*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12477*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4160: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90003fff; valaddr_reg:x3; val_offset:12480*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12480*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4161: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90007fff; valaddr_reg:x3; val_offset:12483*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12483*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4162: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x9000ffff; valaddr_reg:x3; val_offset:12486*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12486*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4163: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x9001ffff; valaddr_reg:x3; val_offset:12489*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12489*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4164: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x9003ffff; valaddr_reg:x3; val_offset:12492*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12492*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4165: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x9007ffff; valaddr_reg:x3; val_offset:12495*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12495*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4166: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x900fffff; valaddr_reg:x3; val_offset:12498*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12498*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4167: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x901fffff; valaddr_reg:x3; val_offset:12501*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12501*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4168: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x903fffff; valaddr_reg:x3; val_offset:12504*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12504*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4169: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90400000; valaddr_reg:x3; val_offset:12507*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12507*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4170: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90600000; valaddr_reg:x3; val_offset:12510*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12510*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4171: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90700000; valaddr_reg:x3; val_offset:12513*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12513*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4172: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x90780000; valaddr_reg:x3; val_offset:12516*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12516*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4173: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907c0000; valaddr_reg:x3; val_offset:12519*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12519*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4174: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907e0000; valaddr_reg:x3; val_offset:12522*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12522*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4175: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907f0000; valaddr_reg:x3; val_offset:12525*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12525*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4176: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907f8000; valaddr_reg:x3; val_offset:12528*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12528*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4177: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907fc000; valaddr_reg:x3; val_offset:12531*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12531*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4178: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907fe000; valaddr_reg:x3; val_offset:12534*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12534*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4179: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907ff000; valaddr_reg:x3; val_offset:12537*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12537*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4180: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907ff800; valaddr_reg:x3; val_offset:12540*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12540*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4181: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907ffc00; valaddr_reg:x3; val_offset:12543*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12543*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4182: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907ffe00; valaddr_reg:x3; val_offset:12546*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12546*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4183: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907fff00; valaddr_reg:x3; val_offset:12549*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12549*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4184: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907fff80; valaddr_reg:x3; val_offset:12552*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12552*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4185: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907fffc0; valaddr_reg:x3; val_offset:12555*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12555*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4186: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907fffe0; valaddr_reg:x3; val_offset:12558*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12558*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4187: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907ffff0; valaddr_reg:x3; val_offset:12561*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12561*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4188: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907ffff8; valaddr_reg:x3; val_offset:12564*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12564*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4189: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907ffffc; valaddr_reg:x3; val_offset:12567*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12567*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4190: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907ffffe; valaddr_reg:x3; val_offset:12570*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12570*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4191: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x186358 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d986358; op2val:0x80000000; +op3val:0x907fffff; valaddr_reg:x3; val_offset:12573*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12573*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4192: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:12576*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12576*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4193: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:12579*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12579*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4194: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:12582*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12582*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4195: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:12585*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12585*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4196: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:12588*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12588*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4197: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:12591*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12591*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4198: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:12594*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12594*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4199: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:12597*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12597*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4200: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:12600*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12600*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4201: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:12603*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12603*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4202: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:12606*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12606*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4203: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:12609*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12609*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4204: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:12612*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12612*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4205: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:12615*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12615*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4206: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:12618*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12618*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4207: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:12621*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12621*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4208: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6800000; valaddr_reg:x3; val_offset:12624*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12624*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4209: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6800001; valaddr_reg:x3; val_offset:12627*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12627*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4210: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6800003; valaddr_reg:x3; val_offset:12630*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12630*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4211: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6800007; valaddr_reg:x3; val_offset:12633*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12633*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4212: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x680000f; valaddr_reg:x3; val_offset:12636*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12636*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4213: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x680001f; valaddr_reg:x3; val_offset:12639*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12639*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4214: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x680003f; valaddr_reg:x3; val_offset:12642*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12642*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4215: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x680007f; valaddr_reg:x3; val_offset:12645*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12645*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4216: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x68000ff; valaddr_reg:x3; val_offset:12648*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12648*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4217: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x68001ff; valaddr_reg:x3; val_offset:12651*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12651*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4218: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x68003ff; valaddr_reg:x3; val_offset:12654*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12654*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4219: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x68007ff; valaddr_reg:x3; val_offset:12657*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12657*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4220: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6800fff; valaddr_reg:x3; val_offset:12660*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12660*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4221: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6801fff; valaddr_reg:x3; val_offset:12663*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12663*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4222: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6803fff; valaddr_reg:x3; val_offset:12666*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12666*0 + 3*32*FLEN/8, x4, x1, x2) + +inst_4223: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6807fff; valaddr_reg:x3; val_offset:12669*0 + 3*32*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12669*0 + 3*32*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150999039,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151003135,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151011327,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151027711,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151060479,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151126015,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151257087,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(151519231,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(152043519,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(153092095,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(155189247,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(155189248,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(157286400,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(158334976,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(158859264,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159121408,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159252480,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159318016,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159350784,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159367168,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159375360,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159379456,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159381504,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159382528,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383040,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383296,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383424,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383488,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383520,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383536,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383544,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383548,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383550,32,FLEN) +NAN_BOXED(2107093843,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(159383551,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919104,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919105,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919107,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919111,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919119,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919135,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919167,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919231,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919359,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919615,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415920127,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415921151,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415923199,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415927295,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415935487,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415951871,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415984639,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416050175,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416181247,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416443391,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416967679,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2418016255,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2420113407,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2420113408,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2422210560,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2423259136,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2423783424,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424045568,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424176640,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424242176,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424274944,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424291328,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424299520,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424303616,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424305664,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424306688,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307200,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307456,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307584,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307648,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307680,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307696,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307704,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307708,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307710,32,FLEN) +NAN_BOXED(2107138904,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307711,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051904,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051905,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051907,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051911,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051919,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051935,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051967,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052031,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052159,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052415,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052927,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109053951,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109055999,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109060095,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109068287,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109084671,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-34.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-34.S new file mode 100644 index 000000000..8a7d6ed1d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-34.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_4224: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x680ffff; valaddr_reg:x3; val_offset:12672*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12672*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4225: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x681ffff; valaddr_reg:x3; val_offset:12675*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12675*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4226: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x683ffff; valaddr_reg:x3; val_offset:12678*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12678*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4227: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x687ffff; valaddr_reg:x3; val_offset:12681*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12681*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4228: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x68fffff; valaddr_reg:x3; val_offset:12684*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12684*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4229: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x69fffff; valaddr_reg:x3; val_offset:12687*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12687*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4230: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6bfffff; valaddr_reg:x3; val_offset:12690*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12690*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4231: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6c00000; valaddr_reg:x3; val_offset:12693*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12693*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4232: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6e00000; valaddr_reg:x3; val_offset:12696*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12696*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4233: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6f00000; valaddr_reg:x3; val_offset:12699*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12699*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4234: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6f80000; valaddr_reg:x3; val_offset:12702*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12702*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4235: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fc0000; valaddr_reg:x3; val_offset:12705*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12705*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4236: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fe0000; valaddr_reg:x3; val_offset:12708*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12708*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4237: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ff0000; valaddr_reg:x3; val_offset:12711*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12711*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4238: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ff8000; valaddr_reg:x3; val_offset:12714*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12714*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4239: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ffc000; valaddr_reg:x3; val_offset:12717*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12717*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4240: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ffe000; valaddr_reg:x3; val_offset:12720*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12720*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4241: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fff000; valaddr_reg:x3; val_offset:12723*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12723*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4242: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fff800; valaddr_reg:x3; val_offset:12726*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12726*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4243: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fffc00; valaddr_reg:x3; val_offset:12729*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12729*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4244: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fffe00; valaddr_reg:x3; val_offset:12732*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12732*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4245: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ffff00; valaddr_reg:x3; val_offset:12735*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12735*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4246: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ffff80; valaddr_reg:x3; val_offset:12738*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12738*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4247: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ffffc0; valaddr_reg:x3; val_offset:12741*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12741*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4248: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ffffe0; valaddr_reg:x3; val_offset:12744*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12744*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4249: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fffff0; valaddr_reg:x3; val_offset:12747*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12747*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4250: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fffff8; valaddr_reg:x3; val_offset:12750*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12750*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4251: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fffffc; valaddr_reg:x3; val_offset:12753*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12753*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4252: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6fffffe; valaddr_reg:x3; val_offset:12756*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12756*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4253: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x18adcd and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d98adcd; op2val:0x0; +op3val:0x6ffffff; valaddr_reg:x3; val_offset:12759*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12759*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4254: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6000000; valaddr_reg:x3; val_offset:12762*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12762*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4255: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6000001; valaddr_reg:x3; val_offset:12765*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12765*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4256: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6000003; valaddr_reg:x3; val_offset:12768*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12768*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4257: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6000007; valaddr_reg:x3; val_offset:12771*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12771*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4258: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf600000f; valaddr_reg:x3; val_offset:12774*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12774*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4259: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf600001f; valaddr_reg:x3; val_offset:12777*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12777*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4260: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf600003f; valaddr_reg:x3; val_offset:12780*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12780*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4261: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf600007f; valaddr_reg:x3; val_offset:12783*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12783*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4262: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf60000ff; valaddr_reg:x3; val_offset:12786*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12786*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4263: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf60001ff; valaddr_reg:x3; val_offset:12789*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12789*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4264: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf60003ff; valaddr_reg:x3; val_offset:12792*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12792*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4265: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf60007ff; valaddr_reg:x3; val_offset:12795*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12795*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4266: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6000fff; valaddr_reg:x3; val_offset:12798*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12798*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4267: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6001fff; valaddr_reg:x3; val_offset:12801*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12801*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4268: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6003fff; valaddr_reg:x3; val_offset:12804*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12804*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4269: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6007fff; valaddr_reg:x3; val_offset:12807*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12807*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4270: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf600ffff; valaddr_reg:x3; val_offset:12810*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12810*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4271: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf601ffff; valaddr_reg:x3; val_offset:12813*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12813*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4272: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf603ffff; valaddr_reg:x3; val_offset:12816*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12816*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4273: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf607ffff; valaddr_reg:x3; val_offset:12819*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12819*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4274: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf60fffff; valaddr_reg:x3; val_offset:12822*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12822*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4275: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf61fffff; valaddr_reg:x3; val_offset:12825*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12825*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4276: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf63fffff; valaddr_reg:x3; val_offset:12828*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12828*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4277: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6400000; valaddr_reg:x3; val_offset:12831*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12831*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4278: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6600000; valaddr_reg:x3; val_offset:12834*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12834*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4279: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6700000; valaddr_reg:x3; val_offset:12837*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12837*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4280: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf6780000; valaddr_reg:x3; val_offset:12840*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12840*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4281: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67c0000; valaddr_reg:x3; val_offset:12843*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12843*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4282: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67e0000; valaddr_reg:x3; val_offset:12846*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12846*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4283: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67f0000; valaddr_reg:x3; val_offset:12849*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12849*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4284: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67f8000; valaddr_reg:x3; val_offset:12852*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12852*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4285: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67fc000; valaddr_reg:x3; val_offset:12855*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12855*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4286: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67fe000; valaddr_reg:x3; val_offset:12858*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12858*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4287: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67ff000; valaddr_reg:x3; val_offset:12861*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12861*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4288: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67ff800; valaddr_reg:x3; val_offset:12864*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12864*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4289: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67ffc00; valaddr_reg:x3; val_offset:12867*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12867*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4290: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67ffe00; valaddr_reg:x3; val_offset:12870*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12870*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4291: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67fff00; valaddr_reg:x3; val_offset:12873*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12873*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4292: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67fff80; valaddr_reg:x3; val_offset:12876*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12876*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4293: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67fffc0; valaddr_reg:x3; val_offset:12879*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12879*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4294: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67fffe0; valaddr_reg:x3; val_offset:12882*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12882*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4295: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67ffff0; valaddr_reg:x3; val_offset:12885*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12885*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4296: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67ffff8; valaddr_reg:x3; val_offset:12888*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12888*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4297: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67ffffc; valaddr_reg:x3; val_offset:12891*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12891*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4298: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67ffffe; valaddr_reg:x3; val_offset:12894*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12894*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4299: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xec and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xf67fffff; valaddr_reg:x3; val_offset:12897*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12897*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4300: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff000001; valaddr_reg:x3; val_offset:12900*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12900*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4301: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff000003; valaddr_reg:x3; val_offset:12903*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12903*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4302: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff000007; valaddr_reg:x3; val_offset:12906*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12906*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4303: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff199999; valaddr_reg:x3; val_offset:12909*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12909*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4304: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff249249; valaddr_reg:x3; val_offset:12912*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12912*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4305: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff333333; valaddr_reg:x3; val_offset:12915*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12915*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4306: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:12918*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12918*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4307: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:12921*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12921*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4308: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff444444; valaddr_reg:x3; val_offset:12924*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12924*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4309: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:12927*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12927*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4310: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:12930*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12930*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4311: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff666666; valaddr_reg:x3; val_offset:12933*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12933*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4312: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:12936*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12936*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4313: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:12939*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12939*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4314: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:12942*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12942*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4315: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x1cb881 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x5115d5 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7d9cb881; op2val:0xc15115d5; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:12945*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12945*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4316: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:12948*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12948*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4317: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:12951*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12951*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4318: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:12954*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12954*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4319: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:12957*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12957*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4320: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:12960*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12960*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4321: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:12963*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12963*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4322: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:12966*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12966*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4323: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:12969*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12969*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4324: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:12972*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12972*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4325: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:12975*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12975*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4326: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:12978*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12978*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4327: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:12981*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12981*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4328: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:12984*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12984*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4329: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:12987*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12987*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4330: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:12990*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12990*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4331: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:12993*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12993*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4332: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c800000; valaddr_reg:x3; val_offset:12996*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12996*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4333: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c800001; valaddr_reg:x3; val_offset:12999*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 12999*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4334: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c800003; valaddr_reg:x3; val_offset:13002*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13002*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4335: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c800007; valaddr_reg:x3; val_offset:13005*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13005*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4336: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c80000f; valaddr_reg:x3; val_offset:13008*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13008*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4337: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c80001f; valaddr_reg:x3; val_offset:13011*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13011*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4338: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c80003f; valaddr_reg:x3; val_offset:13014*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13014*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4339: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c80007f; valaddr_reg:x3; val_offset:13017*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13017*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4340: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c8000ff; valaddr_reg:x3; val_offset:13020*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13020*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4341: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c8001ff; valaddr_reg:x3; val_offset:13023*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13023*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4342: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c8003ff; valaddr_reg:x3; val_offset:13026*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13026*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4343: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c8007ff; valaddr_reg:x3; val_offset:13029*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13029*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4344: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c800fff; valaddr_reg:x3; val_offset:13032*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13032*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4345: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c801fff; valaddr_reg:x3; val_offset:13035*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13035*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4346: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c803fff; valaddr_reg:x3; val_offset:13038*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13038*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4347: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c807fff; valaddr_reg:x3; val_offset:13041*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13041*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4348: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c80ffff; valaddr_reg:x3; val_offset:13044*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13044*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4349: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c81ffff; valaddr_reg:x3; val_offset:13047*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13047*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4350: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c83ffff; valaddr_reg:x3; val_offset:13050*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13050*0 + 3*33*FLEN/8, x4, x1, x2) + +inst_4351: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c87ffff; valaddr_reg:x3; val_offset:13053*0 + 3*33*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13053*0 + 3*33*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109117439,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109182975,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109314047,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109576191,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(110100479,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(111149055,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(113246207,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(113246208,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(115343360,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(116391936,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(116916224,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117178368,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117309440,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117374976,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117407744,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117424128,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117432320,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117436416,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117438464,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117439488,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440000,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440256,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440384,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440448,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440480,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440496,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440504,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440508,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440510,32,FLEN) +NAN_BOXED(2107157965,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440511,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195136,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195137,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195139,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195143,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195151,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195167,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195199,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195263,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195391,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127195647,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127196159,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127197183,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127199231,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127203327,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127211519,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127227903,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127260671,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127326207,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127457279,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4127719423,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4128243711,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4129292287,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4131389439,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4131389440,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4133486592,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4134535168,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135059456,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135321600,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135452672,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135518208,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135550976,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135567360,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135575552,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135579648,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135581696,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135582720,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583232,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583488,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583616,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583680,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583712,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583728,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583736,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583740,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583742,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4135583743,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2107422849,32,FLEN) +NAN_BOXED(3243316693,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198848,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198849,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198851,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198855,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198863,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198879,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198911,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198975,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199103,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199359,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199871,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357200895,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357202943,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357207039,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357215231,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357231615,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357264383,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357329919,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357460991,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357723135,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-35.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-35.S new file mode 100644 index 000000000..719965793 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-35.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_4352: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c8fffff; valaddr_reg:x3; val_offset:13056*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13056*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4353: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8c9fffff; valaddr_reg:x3; val_offset:13059*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13059*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4354: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cbfffff; valaddr_reg:x3; val_offset:13062*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13062*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4355: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cc00000; valaddr_reg:x3; val_offset:13065*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13065*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4356: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8ce00000; valaddr_reg:x3; val_offset:13068*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13068*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4357: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cf00000; valaddr_reg:x3; val_offset:13071*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13071*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4358: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cf80000; valaddr_reg:x3; val_offset:13074*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13074*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4359: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfc0000; valaddr_reg:x3; val_offset:13077*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13077*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4360: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfe0000; valaddr_reg:x3; val_offset:13080*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13080*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4361: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cff0000; valaddr_reg:x3; val_offset:13083*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13083*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4362: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cff8000; valaddr_reg:x3; val_offset:13086*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13086*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4363: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cffc000; valaddr_reg:x3; val_offset:13089*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13089*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4364: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cffe000; valaddr_reg:x3; val_offset:13092*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13092*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4365: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfff000; valaddr_reg:x3; val_offset:13095*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13095*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4366: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfff800; valaddr_reg:x3; val_offset:13098*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13098*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4367: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfffc00; valaddr_reg:x3; val_offset:13101*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13101*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4368: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfffe00; valaddr_reg:x3; val_offset:13104*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13104*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4369: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cffff00; valaddr_reg:x3; val_offset:13107*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13107*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4370: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cffff80; valaddr_reg:x3; val_offset:13110*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13110*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4371: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cffffc0; valaddr_reg:x3; val_offset:13113*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13113*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4372: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cffffe0; valaddr_reg:x3; val_offset:13116*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13116*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4373: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfffff0; valaddr_reg:x3; val_offset:13119*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13119*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4374: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfffff8; valaddr_reg:x3; val_offset:13122*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13122*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4375: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfffffc; valaddr_reg:x3; val_offset:13125*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13125*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4376: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cfffffe; valaddr_reg:x3; val_offset:13128*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13128*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4377: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20b610 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0b610; op2val:0x80000000; +op3val:0x8cffffff; valaddr_reg:x3; val_offset:13131*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13131*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4378: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:13134*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13134*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4379: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:13137*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13137*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4380: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:13140*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13140*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4381: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:13143*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13143*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4382: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:13146*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13146*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4383: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:13149*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13149*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4384: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:13152*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13152*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4385: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:13155*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13155*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4386: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:13158*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13158*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4387: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:13161*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13161*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4388: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:13164*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13164*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4389: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:13167*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13167*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4390: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:13170*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13170*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4391: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:13173*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13173*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4392: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:13176*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13176*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4393: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:13179*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13179*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4394: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e800000; valaddr_reg:x3; val_offset:13182*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13182*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4395: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e800001; valaddr_reg:x3; val_offset:13185*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13185*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4396: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e800003; valaddr_reg:x3; val_offset:13188*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13188*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4397: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e800007; valaddr_reg:x3; val_offset:13191*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13191*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4398: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e80000f; valaddr_reg:x3; val_offset:13194*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13194*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4399: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e80001f; valaddr_reg:x3; val_offset:13197*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13197*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4400: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e80003f; valaddr_reg:x3; val_offset:13200*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13200*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4401: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e80007f; valaddr_reg:x3; val_offset:13203*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13203*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4402: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e8000ff; valaddr_reg:x3; val_offset:13206*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13206*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4403: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e8001ff; valaddr_reg:x3; val_offset:13209*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13209*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4404: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e8003ff; valaddr_reg:x3; val_offset:13212*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13212*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4405: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e8007ff; valaddr_reg:x3; val_offset:13215*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13215*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4406: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e800fff; valaddr_reg:x3; val_offset:13218*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13218*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4407: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e801fff; valaddr_reg:x3; val_offset:13221*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13221*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4408: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e803fff; valaddr_reg:x3; val_offset:13224*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13224*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4409: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e807fff; valaddr_reg:x3; val_offset:13227*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13227*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4410: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e80ffff; valaddr_reg:x3; val_offset:13230*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13230*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4411: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e81ffff; valaddr_reg:x3; val_offset:13233*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13233*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4412: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e83ffff; valaddr_reg:x3; val_offset:13236*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13236*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4413: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e87ffff; valaddr_reg:x3; val_offset:13239*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13239*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4414: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e8fffff; valaddr_reg:x3; val_offset:13242*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13242*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4415: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8e9fffff; valaddr_reg:x3; val_offset:13245*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13245*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4416: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8ebfffff; valaddr_reg:x3; val_offset:13248*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13248*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4417: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8ec00000; valaddr_reg:x3; val_offset:13251*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13251*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4418: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8ee00000; valaddr_reg:x3; val_offset:13254*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13254*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4419: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8ef00000; valaddr_reg:x3; val_offset:13257*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13257*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4420: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8ef80000; valaddr_reg:x3; val_offset:13260*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13260*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4421: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efc0000; valaddr_reg:x3; val_offset:13263*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13263*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4422: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efe0000; valaddr_reg:x3; val_offset:13266*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13266*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4423: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8eff0000; valaddr_reg:x3; val_offset:13269*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13269*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4424: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8eff8000; valaddr_reg:x3; val_offset:13272*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13272*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4425: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8effc000; valaddr_reg:x3; val_offset:13275*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13275*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4426: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8effe000; valaddr_reg:x3; val_offset:13278*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13278*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4427: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efff000; valaddr_reg:x3; val_offset:13281*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13281*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4428: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efff800; valaddr_reg:x3; val_offset:13284*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13284*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4429: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efffc00; valaddr_reg:x3; val_offset:13287*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13287*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4430: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efffe00; valaddr_reg:x3; val_offset:13290*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13290*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4431: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8effff00; valaddr_reg:x3; val_offset:13293*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13293*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4432: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8effff80; valaddr_reg:x3; val_offset:13296*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13296*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4433: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8effffc0; valaddr_reg:x3; val_offset:13299*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13299*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4434: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8effffe0; valaddr_reg:x3; val_offset:13302*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13302*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4435: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efffff0; valaddr_reg:x3; val_offset:13305*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13305*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4436: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efffff8; valaddr_reg:x3; val_offset:13308*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13308*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4437: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efffffc; valaddr_reg:x3; val_offset:13311*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13311*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4438: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8efffffe; valaddr_reg:x3; val_offset:13314*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13314*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4439: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x20e3e9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da0e3e9; op2val:0x80000000; +op3val:0x8effffff; valaddr_reg:x3; val_offset:13317*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13317*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4440: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:13320*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13320*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4441: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:13323*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13323*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4442: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:13326*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13326*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4443: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:13329*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13329*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4444: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:13332*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13332*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4445: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:13335*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13335*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4446: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:13338*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13338*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4447: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:13341*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13341*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4448: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:13344*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13344*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4449: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:13347*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13347*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4450: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:13350*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13350*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4451: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:13353*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13353*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4452: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:13356*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13356*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4453: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:13359*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13359*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4454: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:13362*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13362*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4455: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:13365*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13365*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4456: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8800000; valaddr_reg:x3; val_offset:13368*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13368*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4457: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8800001; valaddr_reg:x3; val_offset:13371*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13371*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4458: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8800003; valaddr_reg:x3; val_offset:13374*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13374*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4459: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8800007; valaddr_reg:x3; val_offset:13377*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13377*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4460: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x880000f; valaddr_reg:x3; val_offset:13380*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13380*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4461: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x880001f; valaddr_reg:x3; val_offset:13383*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13383*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4462: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x880003f; valaddr_reg:x3; val_offset:13386*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13386*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4463: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x880007f; valaddr_reg:x3; val_offset:13389*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13389*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4464: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x88000ff; valaddr_reg:x3; val_offset:13392*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13392*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4465: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x88001ff; valaddr_reg:x3; val_offset:13395*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13395*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4466: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x88003ff; valaddr_reg:x3; val_offset:13398*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13398*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4467: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x88007ff; valaddr_reg:x3; val_offset:13401*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13401*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4468: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8800fff; valaddr_reg:x3; val_offset:13404*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13404*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4469: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8801fff; valaddr_reg:x3; val_offset:13407*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13407*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4470: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8803fff; valaddr_reg:x3; val_offset:13410*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13410*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4471: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8807fff; valaddr_reg:x3; val_offset:13413*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13413*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4472: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x880ffff; valaddr_reg:x3; val_offset:13416*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13416*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4473: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x881ffff; valaddr_reg:x3; val_offset:13419*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13419*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4474: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x883ffff; valaddr_reg:x3; val_offset:13422*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13422*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4475: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x887ffff; valaddr_reg:x3; val_offset:13425*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13425*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4476: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x88fffff; valaddr_reg:x3; val_offset:13428*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13428*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4477: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x89fffff; valaddr_reg:x3; val_offset:13431*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13431*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4478: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8bfffff; valaddr_reg:x3; val_offset:13434*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13434*0 + 3*34*FLEN/8, x4, x1, x2) + +inst_4479: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8c00000; valaddr_reg:x3; val_offset:13437*0 + 3*34*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13437*0 + 3*34*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2358247423,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2359295999,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2361393151,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2361393152,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2363490304,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2364538880,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365063168,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365325312,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365456384,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365521920,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365554688,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365571072,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365579264,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365583360,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365585408,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365586432,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365586944,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587200,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587328,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587392,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587424,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587440,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587448,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587452,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587454,32,FLEN) +NAN_BOXED(2107684368,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587455,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753280,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753281,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753283,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753287,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753295,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753311,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753343,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753407,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753535,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390753791,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390754303,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390755327,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390757375,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390761471,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390769663,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390786047,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390818815,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2390884351,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391015423,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391277567,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2391801855,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2392850431,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2394947583,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2394947584,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2397044736,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398093312,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398617600,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2398879744,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399010816,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399076352,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399109120,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399125504,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399133696,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399137792,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399139840,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399140864,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141376,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141632,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141760,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141824,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141856,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141872,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141880,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141884,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141886,32,FLEN) +NAN_BOXED(2107696105,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141887,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606336,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606337,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606339,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606343,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606351,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606367,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606399,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606463,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606591,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606847,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142607359,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142608383,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142610431,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142614527,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142622719,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142639103,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142671871,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142737407,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142868479,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(143130623,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(143654911,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(144703487,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(146800639,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(146800640,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-36.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-36.S new file mode 100644 index 000000000..7b3f41be7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-36.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_4480: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8e00000; valaddr_reg:x3; val_offset:13440*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13440*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4481: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8f00000; valaddr_reg:x3; val_offset:13443*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13443*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4482: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8f80000; valaddr_reg:x3; val_offset:13446*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13446*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4483: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fc0000; valaddr_reg:x3; val_offset:13449*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13449*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4484: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fe0000; valaddr_reg:x3; val_offset:13452*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13452*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4485: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ff0000; valaddr_reg:x3; val_offset:13455*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13455*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4486: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ff8000; valaddr_reg:x3; val_offset:13458*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13458*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4487: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ffc000; valaddr_reg:x3; val_offset:13461*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13461*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4488: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ffe000; valaddr_reg:x3; val_offset:13464*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13464*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4489: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fff000; valaddr_reg:x3; val_offset:13467*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13467*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4490: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fff800; valaddr_reg:x3; val_offset:13470*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13470*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4491: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fffc00; valaddr_reg:x3; val_offset:13473*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13473*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4492: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fffe00; valaddr_reg:x3; val_offset:13476*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13476*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4493: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ffff00; valaddr_reg:x3; val_offset:13479*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13479*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4494: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ffff80; valaddr_reg:x3; val_offset:13482*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13482*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4495: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ffffc0; valaddr_reg:x3; val_offset:13485*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13485*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4496: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ffffe0; valaddr_reg:x3; val_offset:13488*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13488*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4497: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fffff0; valaddr_reg:x3; val_offset:13491*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13491*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4498: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fffff8; valaddr_reg:x3; val_offset:13494*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13494*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4499: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fffffc; valaddr_reg:x3; val_offset:13497*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13497*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4500: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8fffffe; valaddr_reg:x3; val_offset:13500*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13500*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4501: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x21bad2 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da1bad2; op2val:0x0; +op3val:0x8ffffff; valaddr_reg:x3; val_offset:13503*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13503*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4502: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:13506*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13506*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4503: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:13509*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13509*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4504: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:13512*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13512*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4505: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:13515*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13515*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4506: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:13518*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13518*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4507: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:13521*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13521*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4508: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:13524*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13524*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4509: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:13527*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13527*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4510: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:13530*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13530*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4511: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:13533*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13533*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4512: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:13536*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13536*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4513: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:13539*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13539*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4514: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:13542*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13542*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4515: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:13545*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13545*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4516: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:13548*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13548*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4517: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:13551*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13551*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4518: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89000000; valaddr_reg:x3; val_offset:13554*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13554*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4519: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89000001; valaddr_reg:x3; val_offset:13557*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13557*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4520: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89000003; valaddr_reg:x3; val_offset:13560*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13560*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4521: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89000007; valaddr_reg:x3; val_offset:13563*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13563*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4522: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8900000f; valaddr_reg:x3; val_offset:13566*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13566*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4523: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8900001f; valaddr_reg:x3; val_offset:13569*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13569*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4524: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8900003f; valaddr_reg:x3; val_offset:13572*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13572*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4525: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8900007f; valaddr_reg:x3; val_offset:13575*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13575*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4526: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x890000ff; valaddr_reg:x3; val_offset:13578*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13578*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4527: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x890001ff; valaddr_reg:x3; val_offset:13581*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13581*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4528: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x890003ff; valaddr_reg:x3; val_offset:13584*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13584*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4529: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x890007ff; valaddr_reg:x3; val_offset:13587*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13587*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4530: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89000fff; valaddr_reg:x3; val_offset:13590*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13590*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4531: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89001fff; valaddr_reg:x3; val_offset:13593*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13593*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4532: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89003fff; valaddr_reg:x3; val_offset:13596*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13596*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4533: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89007fff; valaddr_reg:x3; val_offset:13599*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13599*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4534: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8900ffff; valaddr_reg:x3; val_offset:13602*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13602*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4535: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8901ffff; valaddr_reg:x3; val_offset:13605*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13605*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4536: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8903ffff; valaddr_reg:x3; val_offset:13608*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13608*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4537: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x8907ffff; valaddr_reg:x3; val_offset:13611*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13611*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4538: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x890fffff; valaddr_reg:x3; val_offset:13614*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13614*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4539: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x891fffff; valaddr_reg:x3; val_offset:13617*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13617*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4540: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x893fffff; valaddr_reg:x3; val_offset:13620*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13620*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4541: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89400000; valaddr_reg:x3; val_offset:13623*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13623*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4542: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89600000; valaddr_reg:x3; val_offset:13626*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13626*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4543: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89700000; valaddr_reg:x3; val_offset:13629*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13629*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4544: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x89780000; valaddr_reg:x3; val_offset:13632*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13632*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4545: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897c0000; valaddr_reg:x3; val_offset:13635*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13635*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4546: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897e0000; valaddr_reg:x3; val_offset:13638*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13638*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4547: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897f0000; valaddr_reg:x3; val_offset:13641*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13641*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4548: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897f8000; valaddr_reg:x3; val_offset:13644*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13644*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4549: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897fc000; valaddr_reg:x3; val_offset:13647*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13647*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4550: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897fe000; valaddr_reg:x3; val_offset:13650*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13650*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4551: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897ff000; valaddr_reg:x3; val_offset:13653*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13653*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4552: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897ff800; valaddr_reg:x3; val_offset:13656*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13656*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4553: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897ffc00; valaddr_reg:x3; val_offset:13659*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13659*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4554: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897ffe00; valaddr_reg:x3; val_offset:13662*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13662*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4555: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897fff00; valaddr_reg:x3; val_offset:13665*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13665*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4556: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897fff80; valaddr_reg:x3; val_offset:13668*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13668*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4557: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897fffc0; valaddr_reg:x3; val_offset:13671*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13671*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4558: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897fffe0; valaddr_reg:x3; val_offset:13674*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13674*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4559: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897ffff0; valaddr_reg:x3; val_offset:13677*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13677*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4560: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897ffff8; valaddr_reg:x3; val_offset:13680*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13680*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4561: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897ffffc; valaddr_reg:x3; val_offset:13683*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13683*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4562: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897ffffe; valaddr_reg:x3; val_offset:13686*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13686*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4563: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x278349 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7da78349; op2val:0x80000000; +op3val:0x897fffff; valaddr_reg:x3; val_offset:13689*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13689*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4564: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:13692*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13692*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4565: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:13695*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13695*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4566: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:13698*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13698*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4567: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:13701*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13701*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4568: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:13704*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13704*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4569: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:13707*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13707*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4570: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:13710*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13710*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4571: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:13713*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13713*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4572: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:13716*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13716*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4573: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:13719*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13719*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4574: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:13722*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13722*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4575: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:13725*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13725*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4576: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:13728*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13728*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4577: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:13731*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13731*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4578: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:13734*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13734*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4579: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:13737*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13737*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4580: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d000000; valaddr_reg:x3; val_offset:13740*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13740*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4581: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d000001; valaddr_reg:x3; val_offset:13743*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13743*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4582: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d000003; valaddr_reg:x3; val_offset:13746*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13746*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4583: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d000007; valaddr_reg:x3; val_offset:13749*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13749*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4584: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d00000f; valaddr_reg:x3; val_offset:13752*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13752*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4585: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d00001f; valaddr_reg:x3; val_offset:13755*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13755*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4586: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d00003f; valaddr_reg:x3; val_offset:13758*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13758*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4587: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d00007f; valaddr_reg:x3; val_offset:13761*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13761*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4588: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d0000ff; valaddr_reg:x3; val_offset:13764*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13764*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4589: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d0001ff; valaddr_reg:x3; val_offset:13767*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13767*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4590: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d0003ff; valaddr_reg:x3; val_offset:13770*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13770*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4591: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d0007ff; valaddr_reg:x3; val_offset:13773*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13773*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4592: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d000fff; valaddr_reg:x3; val_offset:13776*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13776*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4593: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d001fff; valaddr_reg:x3; val_offset:13779*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13779*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4594: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d003fff; valaddr_reg:x3; val_offset:13782*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13782*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4595: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d007fff; valaddr_reg:x3; val_offset:13785*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13785*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4596: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d00ffff; valaddr_reg:x3; val_offset:13788*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13788*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4597: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d01ffff; valaddr_reg:x3; val_offset:13791*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13791*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4598: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d03ffff; valaddr_reg:x3; val_offset:13794*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13794*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4599: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d07ffff; valaddr_reg:x3; val_offset:13797*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13797*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4600: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d0fffff; valaddr_reg:x3; val_offset:13800*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13800*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4601: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d1fffff; valaddr_reg:x3; val_offset:13803*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13803*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4602: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d3fffff; valaddr_reg:x3; val_offset:13806*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13806*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4603: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d400000; valaddr_reg:x3; val_offset:13809*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13809*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4604: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d600000; valaddr_reg:x3; val_offset:13812*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13812*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4605: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d700000; valaddr_reg:x3; val_offset:13815*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13815*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4606: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d780000; valaddr_reg:x3; val_offset:13818*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13818*0 + 3*35*FLEN/8, x4, x1, x2) + +inst_4607: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7c0000; valaddr_reg:x3; val_offset:13821*0 + 3*35*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13821*0 + 3*35*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(148897792,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(149946368,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150470656,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150732800,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150863872,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150929408,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150962176,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150978560,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150986752,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150990848,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150992896,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150993920,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994432,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994688,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994816,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994880,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994912,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994928,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994936,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994940,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994942,32,FLEN) +NAN_BOXED(2107751122,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994943,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478592,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478593,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478595,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478599,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478607,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478623,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478655,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478719,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478847,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298479103,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298479615,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298480639,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298482687,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298486783,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298494975,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298511359,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298544127,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298609663,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298740735,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2299002879,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2299527167,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2300575743,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2302672895,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2302672896,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2304770048,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2305818624,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306342912,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306605056,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306736128,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306801664,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306834432,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306850816,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306859008,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306863104,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306865152,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866176,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866688,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866944,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867072,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867136,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867168,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867184,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867192,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867196,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867198,32,FLEN) +NAN_BOXED(2108130121,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867199,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587456,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587457,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587459,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587463,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587471,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587487,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587519,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587583,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587711,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587967,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365588479,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365589503,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365591551,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365595647,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365603839,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365620223,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365652991,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365718527,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365849599,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2366111743,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2366636031,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2367684607,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2369781759,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2369781760,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2371878912,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2372927488,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373451776,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373713920,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-37.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-37.S new file mode 100644 index 000000000..358e802ec --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-37.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_4608: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7e0000; valaddr_reg:x3; val_offset:13824*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13824*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4609: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7f0000; valaddr_reg:x3; val_offset:13827*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13827*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4610: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7f8000; valaddr_reg:x3; val_offset:13830*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13830*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4611: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7fc000; valaddr_reg:x3; val_offset:13833*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13833*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4612: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7fe000; valaddr_reg:x3; val_offset:13836*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13836*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4613: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7ff000; valaddr_reg:x3; val_offset:13839*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13839*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4614: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7ff800; valaddr_reg:x3; val_offset:13842*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13842*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4615: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7ffc00; valaddr_reg:x3; val_offset:13845*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13845*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4616: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7ffe00; valaddr_reg:x3; val_offset:13848*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13848*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4617: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7fff00; valaddr_reg:x3; val_offset:13851*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13851*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4618: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7fff80; valaddr_reg:x3; val_offset:13854*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13854*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4619: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7fffc0; valaddr_reg:x3; val_offset:13857*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13857*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4620: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7fffe0; valaddr_reg:x3; val_offset:13860*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13860*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4621: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7ffff0; valaddr_reg:x3; val_offset:13863*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13863*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4622: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7ffff8; valaddr_reg:x3; val_offset:13866*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13866*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4623: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7ffffc; valaddr_reg:x3; val_offset:13869*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13869*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4624: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7ffffe; valaddr_reg:x3; val_offset:13872*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13872*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4625: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x2e4058 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dae4058; op2val:0x80000000; +op3val:0x8d7fffff; valaddr_reg:x3; val_offset:13875*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13875*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4626: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:13878*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13878*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4627: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:13881*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13881*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4628: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:13884*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13884*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4629: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:13887*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13887*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4630: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:13890*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13890*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4631: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:13893*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13893*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4632: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:13896*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13896*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4633: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:13899*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13899*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4634: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:13902*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13902*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4635: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:13905*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13905*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4636: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:13908*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13908*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4637: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:13911*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13911*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4638: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:13914*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13914*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4639: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:13917*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13917*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4640: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:13920*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13920*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4641: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:13923*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13923*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4642: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86000000; valaddr_reg:x3; val_offset:13926*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13926*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4643: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86000001; valaddr_reg:x3; val_offset:13929*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13929*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4644: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86000003; valaddr_reg:x3; val_offset:13932*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13932*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4645: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86000007; valaddr_reg:x3; val_offset:13935*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13935*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4646: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8600000f; valaddr_reg:x3; val_offset:13938*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13938*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4647: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8600001f; valaddr_reg:x3; val_offset:13941*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13941*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4648: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8600003f; valaddr_reg:x3; val_offset:13944*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13944*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4649: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8600007f; valaddr_reg:x3; val_offset:13947*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13947*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4650: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x860000ff; valaddr_reg:x3; val_offset:13950*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13950*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4651: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x860001ff; valaddr_reg:x3; val_offset:13953*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13953*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4652: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x860003ff; valaddr_reg:x3; val_offset:13956*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13956*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4653: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x860007ff; valaddr_reg:x3; val_offset:13959*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13959*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4654: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86000fff; valaddr_reg:x3; val_offset:13962*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13962*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4655: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86001fff; valaddr_reg:x3; val_offset:13965*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13965*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4656: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86003fff; valaddr_reg:x3; val_offset:13968*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13968*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4657: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86007fff; valaddr_reg:x3; val_offset:13971*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13971*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4658: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8600ffff; valaddr_reg:x3; val_offset:13974*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13974*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4659: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8601ffff; valaddr_reg:x3; val_offset:13977*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13977*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4660: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8603ffff; valaddr_reg:x3; val_offset:13980*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13980*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4661: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x8607ffff; valaddr_reg:x3; val_offset:13983*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13983*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4662: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x860fffff; valaddr_reg:x3; val_offset:13986*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13986*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4663: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x861fffff; valaddr_reg:x3; val_offset:13989*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13989*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4664: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x863fffff; valaddr_reg:x3; val_offset:13992*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13992*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4665: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86400000; valaddr_reg:x3; val_offset:13995*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13995*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4666: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86600000; valaddr_reg:x3; val_offset:13998*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 13998*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4667: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86700000; valaddr_reg:x3; val_offset:14001*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14001*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4668: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x86780000; valaddr_reg:x3; val_offset:14004*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14004*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4669: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867c0000; valaddr_reg:x3; val_offset:14007*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14007*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4670: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867e0000; valaddr_reg:x3; val_offset:14010*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14010*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4671: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867f0000; valaddr_reg:x3; val_offset:14013*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14013*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4672: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867f8000; valaddr_reg:x3; val_offset:14016*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14016*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4673: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867fc000; valaddr_reg:x3; val_offset:14019*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14019*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4674: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867fe000; valaddr_reg:x3; val_offset:14022*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14022*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4675: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867ff000; valaddr_reg:x3; val_offset:14025*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14025*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4676: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867ff800; valaddr_reg:x3; val_offset:14028*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14028*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4677: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867ffc00; valaddr_reg:x3; val_offset:14031*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14031*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4678: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867ffe00; valaddr_reg:x3; val_offset:14034*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14034*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4679: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867fff00; valaddr_reg:x3; val_offset:14037*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14037*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4680: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867fff80; valaddr_reg:x3; val_offset:14040*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14040*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4681: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867fffc0; valaddr_reg:x3; val_offset:14043*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14043*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4682: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867fffe0; valaddr_reg:x3; val_offset:14046*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14046*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4683: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867ffff0; valaddr_reg:x3; val_offset:14049*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14049*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4684: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867ffff8; valaddr_reg:x3; val_offset:14052*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14052*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4685: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867ffffc; valaddr_reg:x3; val_offset:14055*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14055*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4686: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867ffffe; valaddr_reg:x3; val_offset:14058*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14058*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4687: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30a8b6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0a8b6; op2val:0x80000000; +op3val:0x867fffff; valaddr_reg:x3; val_offset:14061*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14061*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4688: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbf800001; valaddr_reg:x3; val_offset:14064*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14064*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4689: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbf800003; valaddr_reg:x3; val_offset:14067*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14067*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4690: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbf800007; valaddr_reg:x3; val_offset:14070*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14070*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4691: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbf999999; valaddr_reg:x3; val_offset:14073*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14073*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4692: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:14076*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14076*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4693: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:14079*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14079*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4694: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:14082*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14082*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4695: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:14085*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14085*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4696: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:14088*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14088*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4697: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:14091*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14091*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4698: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:14094*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14094*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4699: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:14097*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14097*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4700: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:14100*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14100*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4701: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:14103*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14103*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4702: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:14106*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14106*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4703: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:14109*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14109*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4704: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2000000; valaddr_reg:x3; val_offset:14112*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14112*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4705: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2000001; valaddr_reg:x3; val_offset:14115*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14115*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4706: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2000003; valaddr_reg:x3; val_offset:14118*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14118*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4707: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2000007; valaddr_reg:x3; val_offset:14121*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14121*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4708: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc200000f; valaddr_reg:x3; val_offset:14124*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14124*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4709: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc200001f; valaddr_reg:x3; val_offset:14127*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14127*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4710: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc200003f; valaddr_reg:x3; val_offset:14130*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14130*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4711: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc200007f; valaddr_reg:x3; val_offset:14133*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14133*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4712: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc20000ff; valaddr_reg:x3; val_offset:14136*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14136*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4713: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc20001ff; valaddr_reg:x3; val_offset:14139*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14139*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4714: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc20003ff; valaddr_reg:x3; val_offset:14142*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14142*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4715: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc20007ff; valaddr_reg:x3; val_offset:14145*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14145*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4716: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2000fff; valaddr_reg:x3; val_offset:14148*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14148*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4717: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2001fff; valaddr_reg:x3; val_offset:14151*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14151*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4718: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2003fff; valaddr_reg:x3; val_offset:14154*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14154*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4719: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2007fff; valaddr_reg:x3; val_offset:14157*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14157*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4720: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc200ffff; valaddr_reg:x3; val_offset:14160*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14160*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4721: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc201ffff; valaddr_reg:x3; val_offset:14163*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14163*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4722: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc203ffff; valaddr_reg:x3; val_offset:14166*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14166*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4723: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc207ffff; valaddr_reg:x3; val_offset:14169*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14169*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4724: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc20fffff; valaddr_reg:x3; val_offset:14172*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14172*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4725: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc21fffff; valaddr_reg:x3; val_offset:14175*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14175*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4726: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc23fffff; valaddr_reg:x3; val_offset:14178*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14178*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4727: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2400000; valaddr_reg:x3; val_offset:14181*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14181*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4728: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2600000; valaddr_reg:x3; val_offset:14184*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14184*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4729: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2700000; valaddr_reg:x3; val_offset:14187*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14187*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4730: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc2780000; valaddr_reg:x3; val_offset:14190*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14190*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4731: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27c0000; valaddr_reg:x3; val_offset:14193*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14193*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4732: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27e0000; valaddr_reg:x3; val_offset:14196*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14196*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4733: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27f0000; valaddr_reg:x3; val_offset:14199*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14199*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4734: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27f8000; valaddr_reg:x3; val_offset:14202*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14202*0 + 3*36*FLEN/8, x4, x1, x2) + +inst_4735: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27fc000; valaddr_reg:x3; val_offset:14205*0 + 3*36*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14205*0 + 3*36*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373844992,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373910528,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373943296,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373959680,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373967872,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373971968,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373974016,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975040,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975552,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975808,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373975936,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976000,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976032,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976048,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976056,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976060,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976062,32,FLEN) +NAN_BOXED(2108571736,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2373976063,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146944,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146945,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146947,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146951,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146959,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146975,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147007,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147071,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147199,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147455,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248147967,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248148991,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248151039,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248155135,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248163327,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248179711,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248212479,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248278015,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248409087,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248671231,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2249195519,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2250244095,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2252341247,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2252341248,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2254438400,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2255486976,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256011264,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256273408,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256404480,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256470016,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256502784,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256519168,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256527360,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256531456,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256533504,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256534528,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535040,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535296,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535424,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535488,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535520,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535536,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535544,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535548,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535550,32,FLEN) +NAN_BOXED(2108729526,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2256535551,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254779904,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254779905,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254779907,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254779911,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254779919,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254779935,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254779967,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254780031,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254780159,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254780415,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254780927,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254781951,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254783999,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254788095,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254796287,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254812671,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254845439,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3254910975,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3255042047,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3255304191,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3255828479,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3256877055,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3258974207,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3258974208,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3261071360,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3262119936,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3262644224,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3262906368,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263037440,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263102976,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263135744,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263152128,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-38.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-38.S new file mode 100644 index 000000000..285ea4b27 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-38.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_4736: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27fe000; valaddr_reg:x3; val_offset:14208*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14208*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4737: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27ff000; valaddr_reg:x3; val_offset:14211*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14211*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4738: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27ff800; valaddr_reg:x3; val_offset:14214*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14214*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4739: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27ffc00; valaddr_reg:x3; val_offset:14217*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14217*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4740: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27ffe00; valaddr_reg:x3; val_offset:14220*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14220*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4741: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27fff00; valaddr_reg:x3; val_offset:14223*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14223*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4742: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27fff80; valaddr_reg:x3; val_offset:14226*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14226*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4743: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27fffc0; valaddr_reg:x3; val_offset:14229*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14229*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4744: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27fffe0; valaddr_reg:x3; val_offset:14232*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14232*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4745: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27ffff0; valaddr_reg:x3; val_offset:14235*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14235*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4746: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27ffff8; valaddr_reg:x3; val_offset:14238*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14238*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4747: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27ffffc; valaddr_reg:x3; val_offset:14241*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14241*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4748: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27ffffe; valaddr_reg:x3; val_offset:14244*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14244*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4749: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x30ced5 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x3954be and fs3 == 1 and fe3 == 0x84 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db0ced5; op2val:0x813954be; +op3val:0xc27fffff; valaddr_reg:x3; val_offset:14247*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14247*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4750: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b000000; valaddr_reg:x3; val_offset:14250*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14250*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4751: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b000001; valaddr_reg:x3; val_offset:14253*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14253*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4752: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b000003; valaddr_reg:x3; val_offset:14256*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14256*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4753: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b000007; valaddr_reg:x3; val_offset:14259*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14259*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4754: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b00000f; valaddr_reg:x3; val_offset:14262*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14262*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4755: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b00001f; valaddr_reg:x3; val_offset:14265*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14265*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4756: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b00003f; valaddr_reg:x3; val_offset:14268*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14268*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4757: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b00007f; valaddr_reg:x3; val_offset:14271*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14271*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4758: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b0000ff; valaddr_reg:x3; val_offset:14274*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14274*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4759: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b0001ff; valaddr_reg:x3; val_offset:14277*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14277*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4760: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b0003ff; valaddr_reg:x3; val_offset:14280*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14280*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4761: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b0007ff; valaddr_reg:x3; val_offset:14283*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14283*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4762: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b000fff; valaddr_reg:x3; val_offset:14286*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14286*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4763: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b001fff; valaddr_reg:x3; val_offset:14289*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14289*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4764: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b003fff; valaddr_reg:x3; val_offset:14292*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14292*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4765: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b007fff; valaddr_reg:x3; val_offset:14295*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14295*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4766: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b00ffff; valaddr_reg:x3; val_offset:14298*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14298*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4767: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b01ffff; valaddr_reg:x3; val_offset:14301*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14301*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4768: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b03ffff; valaddr_reg:x3; val_offset:14304*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14304*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4769: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b07ffff; valaddr_reg:x3; val_offset:14307*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14307*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4770: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b0fffff; valaddr_reg:x3; val_offset:14310*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14310*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4771: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b1fffff; valaddr_reg:x3; val_offset:14313*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14313*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4772: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b3fffff; valaddr_reg:x3; val_offset:14316*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14316*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4773: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b400000; valaddr_reg:x3; val_offset:14319*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14319*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4774: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b600000; valaddr_reg:x3; val_offset:14322*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14322*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4775: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b700000; valaddr_reg:x3; val_offset:14325*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14325*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4776: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b780000; valaddr_reg:x3; val_offset:14328*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14328*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4777: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7c0000; valaddr_reg:x3; val_offset:14331*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14331*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4778: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7e0000; valaddr_reg:x3; val_offset:14334*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14334*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4779: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7f0000; valaddr_reg:x3; val_offset:14337*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14337*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4780: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7f8000; valaddr_reg:x3; val_offset:14340*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14340*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4781: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7fc000; valaddr_reg:x3; val_offset:14343*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14343*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4782: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7fe000; valaddr_reg:x3; val_offset:14346*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14346*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4783: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7ff000; valaddr_reg:x3; val_offset:14349*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14349*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4784: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7ff800; valaddr_reg:x3; val_offset:14352*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14352*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4785: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7ffc00; valaddr_reg:x3; val_offset:14355*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14355*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4786: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7ffe00; valaddr_reg:x3; val_offset:14358*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14358*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4787: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7fff00; valaddr_reg:x3; val_offset:14361*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14361*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4788: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7fff80; valaddr_reg:x3; val_offset:14364*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14364*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4789: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7fffc0; valaddr_reg:x3; val_offset:14367*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14367*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4790: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7fffe0; valaddr_reg:x3; val_offset:14370*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14370*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4791: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7ffff0; valaddr_reg:x3; val_offset:14373*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14373*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4792: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7ffff8; valaddr_reg:x3; val_offset:14376*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14376*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4793: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7ffffc; valaddr_reg:x3; val_offset:14379*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14379*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4794: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7ffffe; valaddr_reg:x3; val_offset:14382*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14382*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4795: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x56 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x2b7fffff; valaddr_reg:x3; val_offset:14385*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14385*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4796: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3f800001; valaddr_reg:x3; val_offset:14388*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14388*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4797: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3f800003; valaddr_reg:x3; val_offset:14391*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14391*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4798: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3f800007; valaddr_reg:x3; val_offset:14394*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14394*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4799: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3f999999; valaddr_reg:x3; val_offset:14397*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14397*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4800: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:14400*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14400*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4801: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:14403*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14403*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4802: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:14406*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14406*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4803: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:14409*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14409*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4804: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:14412*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14412*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4805: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:14415*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14415*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4806: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:14418*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14418*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4807: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:14421*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14421*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4808: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:14424*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14424*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4809: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:14427*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14427*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4810: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:14430*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14430*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4811: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x312d5c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x38f1dd and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db12d5c; op2val:0x138f1dd; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:14433*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14433*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4812: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf800000; valaddr_reg:x3; val_offset:14436*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14436*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4813: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf800001; valaddr_reg:x3; val_offset:14439*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14439*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4814: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf800003; valaddr_reg:x3; val_offset:14442*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14442*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4815: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf800007; valaddr_reg:x3; val_offset:14445*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14445*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4816: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf80000f; valaddr_reg:x3; val_offset:14448*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14448*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4817: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf80001f; valaddr_reg:x3; val_offset:14451*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14451*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4818: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf80003f; valaddr_reg:x3; val_offset:14454*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14454*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4819: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf80007f; valaddr_reg:x3; val_offset:14457*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14457*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4820: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf8000ff; valaddr_reg:x3; val_offset:14460*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14460*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4821: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf8001ff; valaddr_reg:x3; val_offset:14463*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14463*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4822: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf8003ff; valaddr_reg:x3; val_offset:14466*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14466*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4823: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf8007ff; valaddr_reg:x3; val_offset:14469*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14469*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4824: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf800fff; valaddr_reg:x3; val_offset:14472*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14472*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4825: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf801fff; valaddr_reg:x3; val_offset:14475*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14475*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4826: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf803fff; valaddr_reg:x3; val_offset:14478*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14478*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4827: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf807fff; valaddr_reg:x3; val_offset:14481*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14481*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4828: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf80ffff; valaddr_reg:x3; val_offset:14484*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14484*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4829: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf81ffff; valaddr_reg:x3; val_offset:14487*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14487*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4830: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf83ffff; valaddr_reg:x3; val_offset:14490*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14490*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4831: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf87ffff; valaddr_reg:x3; val_offset:14493*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14493*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4832: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf8fffff; valaddr_reg:x3; val_offset:14496*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14496*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4833: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf999999; valaddr_reg:x3; val_offset:14499*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14499*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4834: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbf9fffff; valaddr_reg:x3; val_offset:14502*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14502*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4835: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:14505*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14505*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4836: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:14508*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14508*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4837: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:14511*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14511*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4838: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:14514*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14514*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4839: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfbfffff; valaddr_reg:x3; val_offset:14517*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14517*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4840: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfc00000; valaddr_reg:x3; val_offset:14520*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14520*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4841: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:14523*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14523*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4842: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:14526*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14526*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4843: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:14529*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14529*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4844: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfe00000; valaddr_reg:x3; val_offset:14532*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14532*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4845: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:14535*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14535*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4846: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:14538*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14538*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4847: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbff00000; valaddr_reg:x3; val_offset:14541*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14541*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4848: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbff80000; valaddr_reg:x3; val_offset:14544*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14544*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4849: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffc0000; valaddr_reg:x3; val_offset:14547*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14547*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4850: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffe0000; valaddr_reg:x3; val_offset:14550*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14550*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4851: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfff0000; valaddr_reg:x3; val_offset:14553*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14553*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4852: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfff8000; valaddr_reg:x3; val_offset:14556*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14556*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4853: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfffc000; valaddr_reg:x3; val_offset:14559*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14559*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4854: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfffe000; valaddr_reg:x3; val_offset:14562*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14562*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4855: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffff000; valaddr_reg:x3; val_offset:14565*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14565*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4856: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffff800; valaddr_reg:x3; val_offset:14568*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14568*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4857: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffffc00; valaddr_reg:x3; val_offset:14571*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14571*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4858: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffffe00; valaddr_reg:x3; val_offset:14574*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14574*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4859: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfffff00; valaddr_reg:x3; val_offset:14577*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14577*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4860: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfffff80; valaddr_reg:x3; val_offset:14580*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14580*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4861: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfffffc0; valaddr_reg:x3; val_offset:14583*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14583*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4862: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfffffe0; valaddr_reg:x3; val_offset:14586*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14586*0 + 3*37*FLEN/8, x4, x1, x2) + +inst_4863: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffffff0; valaddr_reg:x3; val_offset:14589*0 + 3*37*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14589*0 + 3*37*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263160320,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263164416,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263166464,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263167488,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168000,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168256,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168384,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168448,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168480,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168496,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168504,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168508,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168510,32,FLEN) +NAN_BOXED(2108739285,32,FLEN) +NAN_BOXED(2168018110,32,FLEN) +NAN_BOXED(3263168511,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420288,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420289,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420291,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420295,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420303,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420319,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420351,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420415,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420543,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721420799,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721421311,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721422335,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721424383,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721428479,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721436671,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721453055,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721485823,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721551359,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721682431,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(721944575,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(722468863,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(723517439,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(725614591,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(725614592,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(727711744,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(728760320,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729284608,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729546752,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729677824,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729743360,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729776128,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729792512,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729800704,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729804800,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729806848,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729807872,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808384,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808640,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808768,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808832,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808864,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808880,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808888,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808892,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808894,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(729808895,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2108763484,32,FLEN) +NAN_BOXED(20509149,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212836864,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212836879,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212836895,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212836927,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212836991,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212837119,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212837375,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212837887,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212838911,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212840959,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212845055,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212853247,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212869631,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212902399,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3212967935,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3213099007,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3213361151,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3213885439,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3214934015,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3217031167,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3217031168,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3219128320,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3220176896,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3220701184,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3220963328,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221094400,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221159936,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221192704,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221209088,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221217280,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221221376,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221223424,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221224448,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221224960,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225216,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225344,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225408,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225440,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225456,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-39.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-39.S new file mode 100644 index 000000000..d02ff6990 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-39.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_4864: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:14592*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14592*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4865: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:14595*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14595*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4866: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:14598*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14598*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4867: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x31d64f and fs2 == 1 and fe2 == 0x02 and fm2 == 0x38422a and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db1d64f; op2val:0x8138422a; +op3val:0xbfffffff; valaddr_reg:x3; val_offset:14601*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14601*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4868: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37800000; valaddr_reg:x3; val_offset:14604*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14604*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4869: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37800001; valaddr_reg:x3; val_offset:14607*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14607*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4870: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37800003; valaddr_reg:x3; val_offset:14610*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14610*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4871: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37800007; valaddr_reg:x3; val_offset:14613*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14613*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4872: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3780000f; valaddr_reg:x3; val_offset:14616*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14616*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4873: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3780001f; valaddr_reg:x3; val_offset:14619*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14619*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4874: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3780003f; valaddr_reg:x3; val_offset:14622*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14622*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4875: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3780007f; valaddr_reg:x3; val_offset:14625*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14625*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4876: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x378000ff; valaddr_reg:x3; val_offset:14628*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14628*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4877: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x378001ff; valaddr_reg:x3; val_offset:14631*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14631*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4878: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x378003ff; valaddr_reg:x3; val_offset:14634*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14634*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4879: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x378007ff; valaddr_reg:x3; val_offset:14637*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14637*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4880: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37800fff; valaddr_reg:x3; val_offset:14640*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14640*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4881: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37801fff; valaddr_reg:x3; val_offset:14643*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14643*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4882: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37803fff; valaddr_reg:x3; val_offset:14646*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14646*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4883: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37807fff; valaddr_reg:x3; val_offset:14649*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14649*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4884: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3780ffff; valaddr_reg:x3; val_offset:14652*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14652*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4885: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3781ffff; valaddr_reg:x3; val_offset:14655*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14655*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4886: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3783ffff; valaddr_reg:x3; val_offset:14658*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14658*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4887: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3787ffff; valaddr_reg:x3; val_offset:14661*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14661*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4888: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x378fffff; valaddr_reg:x3; val_offset:14664*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14664*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4889: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x379fffff; valaddr_reg:x3; val_offset:14667*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14667*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4890: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37bfffff; valaddr_reg:x3; val_offset:14670*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14670*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4891: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37c00000; valaddr_reg:x3; val_offset:14673*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14673*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4892: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37e00000; valaddr_reg:x3; val_offset:14676*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14676*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4893: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37f00000; valaddr_reg:x3; val_offset:14679*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14679*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4894: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37f80000; valaddr_reg:x3; val_offset:14682*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14682*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4895: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fc0000; valaddr_reg:x3; val_offset:14685*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14685*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4896: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fe0000; valaddr_reg:x3; val_offset:14688*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14688*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4897: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ff0000; valaddr_reg:x3; val_offset:14691*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14691*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4898: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ff8000; valaddr_reg:x3; val_offset:14694*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14694*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4899: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ffc000; valaddr_reg:x3; val_offset:14697*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14697*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4900: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ffe000; valaddr_reg:x3; val_offset:14700*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14700*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4901: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fff000; valaddr_reg:x3; val_offset:14703*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14703*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4902: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fff800; valaddr_reg:x3; val_offset:14706*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14706*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4903: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fffc00; valaddr_reg:x3; val_offset:14709*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14709*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4904: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fffe00; valaddr_reg:x3; val_offset:14712*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14712*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4905: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ffff00; valaddr_reg:x3; val_offset:14715*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14715*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4906: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ffff80; valaddr_reg:x3; val_offset:14718*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14718*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4907: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ffffc0; valaddr_reg:x3; val_offset:14721*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14721*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4908: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ffffe0; valaddr_reg:x3; val_offset:14724*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14724*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4909: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fffff0; valaddr_reg:x3; val_offset:14727*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14727*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4910: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fffff8; valaddr_reg:x3; val_offset:14730*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14730*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4911: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fffffc; valaddr_reg:x3; val_offset:14733*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14733*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4912: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37fffffe; valaddr_reg:x3; val_offset:14736*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14736*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4913: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x6f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x37ffffff; valaddr_reg:x3; val_offset:14739*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14739*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4914: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3f800001; valaddr_reg:x3; val_offset:14742*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14742*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4915: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3f800003; valaddr_reg:x3; val_offset:14745*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14745*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4916: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3f800007; valaddr_reg:x3; val_offset:14748*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14748*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4917: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3f999999; valaddr_reg:x3; val_offset:14751*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14751*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4918: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:14754*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14754*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4919: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:14757*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14757*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4920: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:14760*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14760*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4921: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:14763*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14763*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4922: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:14766*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14766*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4923: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:14769*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14769*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4924: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:14772*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14772*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4925: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:14775*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14775*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4926: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:14778*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14778*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4927: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:14781*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14781*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4928: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:14784*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14784*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4929: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x323f32 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x37d5be and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db23f32; op2val:0x137d5be; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:14787*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14787*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4930: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:14790*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14790*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4931: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:14793*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14793*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4932: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:14796*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14796*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4933: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:14799*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14799*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4934: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:14802*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14802*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4935: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:14805*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14805*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4936: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:14808*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14808*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4937: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:14811*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14811*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4938: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:14814*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14814*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4939: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:14817*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14817*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4940: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:14820*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14820*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4941: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:14823*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14823*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4942: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:14826*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14826*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4943: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:14829*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14829*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4944: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:14832*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14832*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4945: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:14835*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14835*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4946: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48000000; valaddr_reg:x3; val_offset:14838*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14838*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4947: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48000001; valaddr_reg:x3; val_offset:14841*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14841*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4948: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48000003; valaddr_reg:x3; val_offset:14844*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14844*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4949: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48000007; valaddr_reg:x3; val_offset:14847*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14847*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4950: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x4800000f; valaddr_reg:x3; val_offset:14850*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14850*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4951: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x4800001f; valaddr_reg:x3; val_offset:14853*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14853*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4952: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x4800003f; valaddr_reg:x3; val_offset:14856*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14856*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4953: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x4800007f; valaddr_reg:x3; val_offset:14859*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14859*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4954: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x480000ff; valaddr_reg:x3; val_offset:14862*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14862*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4955: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x480001ff; valaddr_reg:x3; val_offset:14865*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14865*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4956: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x480003ff; valaddr_reg:x3; val_offset:14868*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14868*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4957: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x480007ff; valaddr_reg:x3; val_offset:14871*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14871*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4958: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48000fff; valaddr_reg:x3; val_offset:14874*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14874*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4959: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48001fff; valaddr_reg:x3; val_offset:14877*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14877*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4960: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48003fff; valaddr_reg:x3; val_offset:14880*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14880*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4961: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48007fff; valaddr_reg:x3; val_offset:14883*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14883*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4962: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x4800ffff; valaddr_reg:x3; val_offset:14886*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14886*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4963: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x4801ffff; valaddr_reg:x3; val_offset:14889*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14889*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4964: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x4803ffff; valaddr_reg:x3; val_offset:14892*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14892*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4965: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x4807ffff; valaddr_reg:x3; val_offset:14895*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14895*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4966: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x480fffff; valaddr_reg:x3; val_offset:14898*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14898*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4967: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x481fffff; valaddr_reg:x3; val_offset:14901*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14901*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4968: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x483fffff; valaddr_reg:x3; val_offset:14904*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14904*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4969: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48400000; valaddr_reg:x3; val_offset:14907*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14907*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4970: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48600000; valaddr_reg:x3; val_offset:14910*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14910*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4971: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48700000; valaddr_reg:x3; val_offset:14913*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14913*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4972: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x48780000; valaddr_reg:x3; val_offset:14916*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14916*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4973: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487c0000; valaddr_reg:x3; val_offset:14919*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14919*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4974: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487e0000; valaddr_reg:x3; val_offset:14922*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14922*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4975: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487f0000; valaddr_reg:x3; val_offset:14925*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14925*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4976: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487f8000; valaddr_reg:x3; val_offset:14928*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14928*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4977: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487fc000; valaddr_reg:x3; val_offset:14931*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14931*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4978: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487fe000; valaddr_reg:x3; val_offset:14934*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14934*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4979: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487ff000; valaddr_reg:x3; val_offset:14937*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14937*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4980: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487ff800; valaddr_reg:x3; val_offset:14940*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14940*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4981: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487ffc00; valaddr_reg:x3; val_offset:14943*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14943*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4982: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487ffe00; valaddr_reg:x3; val_offset:14946*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14946*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4983: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487fff00; valaddr_reg:x3; val_offset:14949*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14949*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4984: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487fff80; valaddr_reg:x3; val_offset:14952*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14952*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4985: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487fffc0; valaddr_reg:x3; val_offset:14955*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14955*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4986: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487fffe0; valaddr_reg:x3; val_offset:14958*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14958*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4987: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487ffff0; valaddr_reg:x3; val_offset:14961*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14961*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4988: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487ffff8; valaddr_reg:x3; val_offset:14964*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14964*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4989: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487ffffc; valaddr_reg:x3; val_offset:14967*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14967*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4990: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487ffffe; valaddr_reg:x3; val_offset:14970*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14970*0 + 3*38*FLEN/8, x4, x1, x2) + +inst_4991: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3409f6 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x36014d and fs3 == 0 and fe3 == 0x90 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db409f6; op2val:0x136014d; +op3val:0x487fffff; valaddr_reg:x3; val_offset:14973*0 + 3*38*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14973*0 + 3*38*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2108806735,32,FLEN) +NAN_BOXED(2167947818,32,FLEN) +NAN_BOXED(3221225471,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135488,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135489,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135491,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135495,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135503,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135519,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135551,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135615,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135743,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931135999,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931136511,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931137535,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931139583,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931143679,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931151871,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931168255,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931201023,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931266559,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931397631,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(931659775,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(932184063,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(933232639,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(935329791,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(935329792,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(937426944,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(938475520,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(938999808,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939261952,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939393024,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939458560,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939491328,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939507712,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939515904,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939520000,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939522048,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939523072,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939523584,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939523840,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939523968,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939524032,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939524064,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939524080,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939524088,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939524092,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939524094,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(939524095,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2108833586,32,FLEN) +NAN_BOXED(20436414,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959552,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959553,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959555,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959559,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959567,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959583,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959615,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959679,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207959807,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207960063,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207960575,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207961599,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207963647,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207967743,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207975935,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1207992319,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1208025087,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1208090623,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1208221695,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1208483839,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1209008127,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1210056703,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1212153855,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1212153856,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1214251008,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1215299584,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1215823872,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216086016,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216217088,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216282624,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216315392,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216331776,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216339968,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216344064,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216346112,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216347136,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216347648,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216347904,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216348032,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216348096,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216348128,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216348144,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216348152,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216348156,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216348158,32,FLEN) +NAN_BOXED(2108951030,32,FLEN) +NAN_BOXED(20316493,32,FLEN) +NAN_BOXED(1216348159,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-40.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-40.S new file mode 100644 index 000000000..a9f9ad1f1 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-40.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_4992: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36000000; valaddr_reg:x3; val_offset:14976*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14976*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_4993: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36000001; valaddr_reg:x3; val_offset:14979*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14979*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_4994: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36000003; valaddr_reg:x3; val_offset:14982*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14982*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_4995: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36000007; valaddr_reg:x3; val_offset:14985*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14985*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_4996: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3600000f; valaddr_reg:x3; val_offset:14988*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14988*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_4997: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3600001f; valaddr_reg:x3; val_offset:14991*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14991*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_4998: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3600003f; valaddr_reg:x3; val_offset:14994*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14994*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_4999: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3600007f; valaddr_reg:x3; val_offset:14997*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 14997*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5000: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x360000ff; valaddr_reg:x3; val_offset:15000*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15000*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5001: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x360001ff; valaddr_reg:x3; val_offset:15003*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15003*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5002: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x360003ff; valaddr_reg:x3; val_offset:15006*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15006*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5003: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x360007ff; valaddr_reg:x3; val_offset:15009*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15009*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5004: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36000fff; valaddr_reg:x3; val_offset:15012*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15012*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5005: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36001fff; valaddr_reg:x3; val_offset:15015*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15015*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5006: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36003fff; valaddr_reg:x3; val_offset:15018*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15018*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5007: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36007fff; valaddr_reg:x3; val_offset:15021*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15021*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5008: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3600ffff; valaddr_reg:x3; val_offset:15024*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15024*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5009: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3601ffff; valaddr_reg:x3; val_offset:15027*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15027*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5010: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3603ffff; valaddr_reg:x3; val_offset:15030*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15030*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5011: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3607ffff; valaddr_reg:x3; val_offset:15033*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15033*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5012: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x360fffff; valaddr_reg:x3; val_offset:15036*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15036*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5013: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x361fffff; valaddr_reg:x3; val_offset:15039*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15039*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5014: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x363fffff; valaddr_reg:x3; val_offset:15042*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15042*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5015: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36400000; valaddr_reg:x3; val_offset:15045*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15045*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5016: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36600000; valaddr_reg:x3; val_offset:15048*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15048*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5017: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36700000; valaddr_reg:x3; val_offset:15051*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15051*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5018: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x36780000; valaddr_reg:x3; val_offset:15054*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15054*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5019: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367c0000; valaddr_reg:x3; val_offset:15057*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15057*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5020: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367e0000; valaddr_reg:x3; val_offset:15060*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15060*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5021: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367f0000; valaddr_reg:x3; val_offset:15063*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15063*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5022: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367f8000; valaddr_reg:x3; val_offset:15066*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15066*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5023: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367fc000; valaddr_reg:x3; val_offset:15069*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15069*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5024: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367fe000; valaddr_reg:x3; val_offset:15072*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15072*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5025: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367ff000; valaddr_reg:x3; val_offset:15075*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15075*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5026: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367ff800; valaddr_reg:x3; val_offset:15078*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15078*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5027: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367ffc00; valaddr_reg:x3; val_offset:15081*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15081*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5028: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367ffe00; valaddr_reg:x3; val_offset:15084*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15084*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5029: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367fff00; valaddr_reg:x3; val_offset:15087*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15087*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5030: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367fff80; valaddr_reg:x3; val_offset:15090*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15090*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5031: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367fffc0; valaddr_reg:x3; val_offset:15093*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15093*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5032: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367fffe0; valaddr_reg:x3; val_offset:15096*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15096*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5033: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367ffff0; valaddr_reg:x3; val_offset:15099*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15099*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5034: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367ffff8; valaddr_reg:x3; val_offset:15102*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15102*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5035: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367ffffc; valaddr_reg:x3; val_offset:15105*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15105*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5036: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367ffffe; valaddr_reg:x3; val_offset:15108*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15108*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5037: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x6c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x367fffff; valaddr_reg:x3; val_offset:15111*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15111*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5038: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3f800001; valaddr_reg:x3; val_offset:15114*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15114*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5039: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3f800003; valaddr_reg:x3; val_offset:15117*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15117*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5040: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3f800007; valaddr_reg:x3; val_offset:15120*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15120*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5041: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3f999999; valaddr_reg:x3; val_offset:15123*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15123*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5042: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:15126*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15126*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5043: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:15129*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15129*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5044: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:15132*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15132*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5045: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:15135*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15135*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5046: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:15138*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15138*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5047: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:15141*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15141*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5048: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:15144*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15144*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5049: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:15147*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15147*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5050: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:15150*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15150*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5051: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:15153*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15153*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5052: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:15156*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15156*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5053: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x37da2c and fs2 == 0 and fe2 == 0x02 and fm2 == 0x323ae6 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db7da2c; op2val:0x1323ae6; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:15159*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15159*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5054: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2800000; valaddr_reg:x3; val_offset:15162*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15162*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5055: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2800001; valaddr_reg:x3; val_offset:15165*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15165*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5056: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2800003; valaddr_reg:x3; val_offset:15168*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15168*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5057: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2800007; valaddr_reg:x3; val_offset:15171*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15171*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5058: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf280000f; valaddr_reg:x3; val_offset:15174*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15174*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5059: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf280001f; valaddr_reg:x3; val_offset:15177*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15177*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5060: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf280003f; valaddr_reg:x3; val_offset:15180*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15180*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5061: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf280007f; valaddr_reg:x3; val_offset:15183*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15183*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5062: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf28000ff; valaddr_reg:x3; val_offset:15186*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15186*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5063: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf28001ff; valaddr_reg:x3; val_offset:15189*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15189*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5064: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf28003ff; valaddr_reg:x3; val_offset:15192*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15192*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5065: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf28007ff; valaddr_reg:x3; val_offset:15195*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15195*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5066: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2800fff; valaddr_reg:x3; val_offset:15198*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15198*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5067: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2801fff; valaddr_reg:x3; val_offset:15201*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15201*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5068: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2803fff; valaddr_reg:x3; val_offset:15204*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15204*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5069: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2807fff; valaddr_reg:x3; val_offset:15207*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15207*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5070: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf280ffff; valaddr_reg:x3; val_offset:15210*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15210*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5071: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf281ffff; valaddr_reg:x3; val_offset:15213*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15213*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5072: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf283ffff; valaddr_reg:x3; val_offset:15216*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15216*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5073: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf287ffff; valaddr_reg:x3; val_offset:15219*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15219*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5074: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf28fffff; valaddr_reg:x3; val_offset:15222*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15222*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5075: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf29fffff; valaddr_reg:x3; val_offset:15225*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15225*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5076: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2bfffff; valaddr_reg:x3; val_offset:15228*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15228*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5077: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2c00000; valaddr_reg:x3; val_offset:15231*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15231*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5078: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2e00000; valaddr_reg:x3; val_offset:15234*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15234*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5079: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2f00000; valaddr_reg:x3; val_offset:15237*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15237*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5080: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2f80000; valaddr_reg:x3; val_offset:15240*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15240*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5081: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fc0000; valaddr_reg:x3; val_offset:15243*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15243*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5082: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fe0000; valaddr_reg:x3; val_offset:15246*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15246*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5083: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ff0000; valaddr_reg:x3; val_offset:15249*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15249*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5084: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ff8000; valaddr_reg:x3; val_offset:15252*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15252*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5085: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ffc000; valaddr_reg:x3; val_offset:15255*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15255*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5086: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ffe000; valaddr_reg:x3; val_offset:15258*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15258*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5087: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fff000; valaddr_reg:x3; val_offset:15261*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15261*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5088: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fff800; valaddr_reg:x3; val_offset:15264*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15264*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5089: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fffc00; valaddr_reg:x3; val_offset:15267*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15267*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5090: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fffe00; valaddr_reg:x3; val_offset:15270*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15270*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5091: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ffff00; valaddr_reg:x3; val_offset:15273*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15273*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5092: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ffff80; valaddr_reg:x3; val_offset:15276*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15276*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5093: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ffffc0; valaddr_reg:x3; val_offset:15279*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15279*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5094: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ffffe0; valaddr_reg:x3; val_offset:15282*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15282*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5095: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fffff0; valaddr_reg:x3; val_offset:15285*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15285*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5096: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fffff8; valaddr_reg:x3; val_offset:15288*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15288*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5097: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fffffc; valaddr_reg:x3; val_offset:15291*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15291*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5098: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2fffffe; valaddr_reg:x3; val_offset:15294*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15294*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5099: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xe5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xf2ffffff; valaddr_reg:x3; val_offset:15297*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15297*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5100: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff000001; valaddr_reg:x3; val_offset:15300*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15300*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5101: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff000003; valaddr_reg:x3; val_offset:15303*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15303*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5102: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff000007; valaddr_reg:x3; val_offset:15306*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15306*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5103: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff199999; valaddr_reg:x3; val_offset:15309*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15309*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5104: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff249249; valaddr_reg:x3; val_offset:15312*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15312*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5105: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff333333; valaddr_reg:x3; val_offset:15315*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15315*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5106: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:15318*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15318*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5107: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:15321*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15321*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5108: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff444444; valaddr_reg:x3; val_offset:15324*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15324*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5109: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:15327*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15327*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5110: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:15330*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15330*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5111: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff666666; valaddr_reg:x3; val_offset:15333*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15333*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5112: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:15336*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15336*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5113: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:15339*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15339*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5114: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:15342*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15342*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5115: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3998eb and fs2 == 1 and fe2 == 0x82 and fm2 == 0x308de2 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7db998eb; op2val:0xc1308de2; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:15345*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15345*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5116: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62000000; valaddr_reg:x3; val_offset:15348*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15348*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5117: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62000001; valaddr_reg:x3; val_offset:15351*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15351*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5118: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62000003; valaddr_reg:x3; val_offset:15354*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15354*0 + 3*39*FLEN/8, x4, x1, x2) + +inst_5119: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62000007; valaddr_reg:x3; val_offset:15357*0 + 3*39*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15357*0 + 3*39*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969664,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969665,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969667,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969671,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969679,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969695,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969727,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969791,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905969919,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905970175,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905970687,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905971711,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905973759,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905977855,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(905986047,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(906002431,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(906035199,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(906100735,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(906231807,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(906493951,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(907018239,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(908066815,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(910163967,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(910163968,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(912261120,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(913309696,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(913833984,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914096128,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914227200,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914292736,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914325504,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914341888,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914350080,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914354176,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914356224,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914357248,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914357760,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358016,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358144,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358208,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358240,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358256,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358264,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358268,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358270,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(914358271,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2109200940,32,FLEN) +NAN_BOXED(20069094,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068474880,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068474881,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068474883,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068474887,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068474895,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068474911,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068474943,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068475007,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068475135,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068475391,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068475903,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068476927,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068478975,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068483071,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068491263,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068507647,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068540415,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068605951,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068737023,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4068999167,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4069523455,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4070572031,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4072669183,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4072669184,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4074766336,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4075814912,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076339200,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076601344,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076732416,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076797952,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076830720,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076847104,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076855296,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076859392,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076861440,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076862464,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076862976,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863232,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863360,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863424,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863456,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863472,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863480,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863484,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863486,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4076863487,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2109315307,32,FLEN) +NAN_BOXED(3241184738,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167168,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167169,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167171,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167175,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-41.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-41.S new file mode 100644 index 000000000..b15741cda --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-41.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_5120: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x6200000f; valaddr_reg:x3; val_offset:15360*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15360*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5121: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x6200001f; valaddr_reg:x3; val_offset:15363*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15363*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5122: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x6200003f; valaddr_reg:x3; val_offset:15366*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15366*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5123: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x6200007f; valaddr_reg:x3; val_offset:15369*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15369*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5124: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x620000ff; valaddr_reg:x3; val_offset:15372*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15372*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5125: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x620001ff; valaddr_reg:x3; val_offset:15375*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15375*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5126: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x620003ff; valaddr_reg:x3; val_offset:15378*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15378*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5127: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x620007ff; valaddr_reg:x3; val_offset:15381*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15381*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5128: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62000fff; valaddr_reg:x3; val_offset:15384*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15384*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5129: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62001fff; valaddr_reg:x3; val_offset:15387*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15387*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5130: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62003fff; valaddr_reg:x3; val_offset:15390*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15390*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5131: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62007fff; valaddr_reg:x3; val_offset:15393*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15393*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5132: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x6200ffff; valaddr_reg:x3; val_offset:15396*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15396*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5133: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x6201ffff; valaddr_reg:x3; val_offset:15399*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15399*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5134: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x6203ffff; valaddr_reg:x3; val_offset:15402*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15402*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5135: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x6207ffff; valaddr_reg:x3; val_offset:15405*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15405*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5136: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x620fffff; valaddr_reg:x3; val_offset:15408*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15408*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5137: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x621fffff; valaddr_reg:x3; val_offset:15411*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15411*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5138: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x623fffff; valaddr_reg:x3; val_offset:15414*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15414*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5139: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62400000; valaddr_reg:x3; val_offset:15417*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15417*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5140: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62600000; valaddr_reg:x3; val_offset:15420*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15420*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5141: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62700000; valaddr_reg:x3; val_offset:15423*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15423*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5142: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x62780000; valaddr_reg:x3; val_offset:15426*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15426*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5143: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627c0000; valaddr_reg:x3; val_offset:15429*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15429*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5144: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627e0000; valaddr_reg:x3; val_offset:15432*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15432*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5145: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627f0000; valaddr_reg:x3; val_offset:15435*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15435*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5146: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627f8000; valaddr_reg:x3; val_offset:15438*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15438*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5147: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627fc000; valaddr_reg:x3; val_offset:15441*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15441*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5148: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627fe000; valaddr_reg:x3; val_offset:15444*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15444*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5149: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627ff000; valaddr_reg:x3; val_offset:15447*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15447*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5150: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627ff800; valaddr_reg:x3; val_offset:15450*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15450*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5151: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627ffc00; valaddr_reg:x3; val_offset:15453*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15453*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5152: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627ffe00; valaddr_reg:x3; val_offset:15456*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15456*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5153: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627fff00; valaddr_reg:x3; val_offset:15459*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15459*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5154: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627fff80; valaddr_reg:x3; val_offset:15462*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15462*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5155: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627fffc0; valaddr_reg:x3; val_offset:15465*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15465*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5156: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627fffe0; valaddr_reg:x3; val_offset:15468*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15468*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5157: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627ffff0; valaddr_reg:x3; val_offset:15471*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15471*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5158: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627ffff8; valaddr_reg:x3; val_offset:15474*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15474*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5159: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627ffffc; valaddr_reg:x3; val_offset:15477*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15477*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5160: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627ffffe; valaddr_reg:x3; val_offset:15480*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15480*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5161: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xc4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x627fffff; valaddr_reg:x3; val_offset:15483*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15483*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5162: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f000001; valaddr_reg:x3; val_offset:15486*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15486*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5163: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f000003; valaddr_reg:x3; val_offset:15489*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15489*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5164: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f000007; valaddr_reg:x3; val_offset:15492*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15492*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5165: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f199999; valaddr_reg:x3; val_offset:15495*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15495*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5166: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f249249; valaddr_reg:x3; val_offset:15498*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15498*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5167: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f333333; valaddr_reg:x3; val_offset:15501*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15501*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5168: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:15504*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15504*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5169: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:15507*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15507*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5170: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f444444; valaddr_reg:x3; val_offset:15510*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15510*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5171: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:15513*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15513*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5172: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:15516*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15516*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5173: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f666666; valaddr_reg:x3; val_offset:15519*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15519*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5174: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:15522*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15522*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5175: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:15525*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15525*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5176: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:15528*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15528*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5177: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3a6fc5 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2fc26c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dba6fc5; op2val:0x412fc26c; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:15531*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15531*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5178: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:15534*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15534*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5179: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:15537*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15537*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5180: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:15540*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15540*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5181: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:15543*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15543*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5182: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:15546*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15546*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5183: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:15549*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15549*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5184: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:15552*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15552*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5185: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:15555*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15555*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5186: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:15558*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15558*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5187: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:15561*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15561*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5188: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:15564*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15564*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5189: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:15567*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15567*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5190: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:15570*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15570*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5191: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:15573*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15573*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5192: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:15576*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15576*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5193: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:15579*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15579*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5194: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe000000; valaddr_reg:x3; val_offset:15582*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15582*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5195: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe000001; valaddr_reg:x3; val_offset:15585*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15585*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5196: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe000003; valaddr_reg:x3; val_offset:15588*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15588*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5197: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe000007; valaddr_reg:x3; val_offset:15591*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15591*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5198: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe00000f; valaddr_reg:x3; val_offset:15594*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15594*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5199: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe00001f; valaddr_reg:x3; val_offset:15597*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15597*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5200: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe00003f; valaddr_reg:x3; val_offset:15600*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15600*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5201: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe00007f; valaddr_reg:x3; val_offset:15603*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15603*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5202: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe0000ff; valaddr_reg:x3; val_offset:15606*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15606*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5203: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe0001ff; valaddr_reg:x3; val_offset:15609*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15609*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5204: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe0003ff; valaddr_reg:x3; val_offset:15612*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15612*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5205: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe0007ff; valaddr_reg:x3; val_offset:15615*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15615*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5206: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe000fff; valaddr_reg:x3; val_offset:15618*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15618*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5207: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe001fff; valaddr_reg:x3; val_offset:15621*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15621*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5208: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe003fff; valaddr_reg:x3; val_offset:15624*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15624*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5209: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe007fff; valaddr_reg:x3; val_offset:15627*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15627*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5210: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe00ffff; valaddr_reg:x3; val_offset:15630*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15630*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5211: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe01ffff; valaddr_reg:x3; val_offset:15633*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15633*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5212: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe03ffff; valaddr_reg:x3; val_offset:15636*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15636*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5213: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe07ffff; valaddr_reg:x3; val_offset:15639*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15639*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5214: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe0fffff; valaddr_reg:x3; val_offset:15642*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15642*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5215: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe1fffff; valaddr_reg:x3; val_offset:15645*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15645*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5216: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe3fffff; valaddr_reg:x3; val_offset:15648*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15648*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5217: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe400000; valaddr_reg:x3; val_offset:15651*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15651*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5218: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe600000; valaddr_reg:x3; val_offset:15654*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15654*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5219: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe700000; valaddr_reg:x3; val_offset:15657*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15657*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5220: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe780000; valaddr_reg:x3; val_offset:15660*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15660*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5221: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7c0000; valaddr_reg:x3; val_offset:15663*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15663*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5222: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7e0000; valaddr_reg:x3; val_offset:15666*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15666*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5223: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7f0000; valaddr_reg:x3; val_offset:15669*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15669*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5224: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7f8000; valaddr_reg:x3; val_offset:15672*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15672*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5225: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7fc000; valaddr_reg:x3; val_offset:15675*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15675*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5226: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7fe000; valaddr_reg:x3; val_offset:15678*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15678*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5227: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7ff000; valaddr_reg:x3; val_offset:15681*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15681*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5228: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7ff800; valaddr_reg:x3; val_offset:15684*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15684*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5229: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7ffc00; valaddr_reg:x3; val_offset:15687*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15687*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5230: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7ffe00; valaddr_reg:x3; val_offset:15690*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15690*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5231: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7fff00; valaddr_reg:x3; val_offset:15693*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15693*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5232: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7fff80; valaddr_reg:x3; val_offset:15696*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15696*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5233: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7fffc0; valaddr_reg:x3; val_offset:15699*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15699*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5234: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7fffe0; valaddr_reg:x3; val_offset:15702*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15702*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5235: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7ffff0; valaddr_reg:x3; val_offset:15705*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15705*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5236: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7ffff8; valaddr_reg:x3; val_offset:15708*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15708*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5237: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7ffffc; valaddr_reg:x3; val_offset:15711*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15711*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5238: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7ffffe; valaddr_reg:x3; val_offset:15714*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15714*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5239: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3ef61a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbef61a; op2val:0x0; +op3val:0xe7fffff; valaddr_reg:x3; val_offset:15717*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15717*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5240: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34800000; valaddr_reg:x3; val_offset:15720*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15720*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5241: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34800001; valaddr_reg:x3; val_offset:15723*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15723*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5242: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34800003; valaddr_reg:x3; val_offset:15726*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15726*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5243: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34800007; valaddr_reg:x3; val_offset:15729*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15729*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5244: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3480000f; valaddr_reg:x3; val_offset:15732*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15732*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5245: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3480001f; valaddr_reg:x3; val_offset:15735*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15735*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5246: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3480003f; valaddr_reg:x3; val_offset:15738*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15738*0 + 3*40*FLEN/8, x4, x1, x2) + +inst_5247: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3480007f; valaddr_reg:x3; val_offset:15741*0 + 3*40*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15741*0 + 3*40*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167183,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167199,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167231,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167295,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167423,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644167679,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644168191,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644169215,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644171263,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644175359,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644183551,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644199935,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644232703,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644298239,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644429311,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1644691455,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1645215743,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1646264319,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1648361471,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1648361472,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1650458624,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1651507200,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652031488,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652293632,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652424704,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652490240,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652523008,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652539392,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652547584,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652551680,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652553728,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652554752,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555264,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555520,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555648,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555712,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555744,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555760,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555768,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555772,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555774,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(1652555775,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2109370309,32,FLEN) +NAN_BOXED(1093649004,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881024,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881025,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881027,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881031,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881039,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881055,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881087,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881151,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881279,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234881535,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234882047,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234883071,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234885119,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234889215,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234897407,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234913791,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(234946559,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235012095,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235143167,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235405311,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(235929599,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(236978175,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(239075327,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(239075328,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(241172480,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(242221056,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(242745344,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243007488,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243138560,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243204096,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243236864,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243253248,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243261440,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243265536,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243267584,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243268608,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269120,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269376,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269504,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269568,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269600,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269616,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269624,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269628,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269630,32,FLEN) +NAN_BOXED(2109666842,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(243269631,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880803840,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880803841,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880803843,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880803847,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880803855,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880803871,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880803903,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880803967,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-42.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-42.S new file mode 100644 index 000000000..26e2d3ffc --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-42.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_5248: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x348000ff; valaddr_reg:x3; val_offset:15744*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15744*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5249: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x348001ff; valaddr_reg:x3; val_offset:15747*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15747*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5250: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x348003ff; valaddr_reg:x3; val_offset:15750*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15750*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5251: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x348007ff; valaddr_reg:x3; val_offset:15753*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15753*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5252: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34800fff; valaddr_reg:x3; val_offset:15756*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15756*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5253: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34801fff; valaddr_reg:x3; val_offset:15759*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15759*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5254: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34803fff; valaddr_reg:x3; val_offset:15762*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15762*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5255: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34807fff; valaddr_reg:x3; val_offset:15765*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15765*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5256: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3480ffff; valaddr_reg:x3; val_offset:15768*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15768*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5257: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3481ffff; valaddr_reg:x3; val_offset:15771*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15771*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5258: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3483ffff; valaddr_reg:x3; val_offset:15774*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15774*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5259: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3487ffff; valaddr_reg:x3; val_offset:15777*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15777*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5260: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x348fffff; valaddr_reg:x3; val_offset:15780*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15780*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5261: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x349fffff; valaddr_reg:x3; val_offset:15783*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15783*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5262: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34bfffff; valaddr_reg:x3; val_offset:15786*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15786*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5263: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34c00000; valaddr_reg:x3; val_offset:15789*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15789*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5264: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34e00000; valaddr_reg:x3; val_offset:15792*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15792*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5265: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34f00000; valaddr_reg:x3; val_offset:15795*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15795*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5266: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34f80000; valaddr_reg:x3; val_offset:15798*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15798*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5267: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fc0000; valaddr_reg:x3; val_offset:15801*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15801*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5268: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fe0000; valaddr_reg:x3; val_offset:15804*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15804*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5269: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ff0000; valaddr_reg:x3; val_offset:15807*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15807*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5270: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ff8000; valaddr_reg:x3; val_offset:15810*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15810*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5271: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ffc000; valaddr_reg:x3; val_offset:15813*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15813*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5272: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ffe000; valaddr_reg:x3; val_offset:15816*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15816*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5273: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fff000; valaddr_reg:x3; val_offset:15819*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15819*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5274: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fff800; valaddr_reg:x3; val_offset:15822*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15822*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5275: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fffc00; valaddr_reg:x3; val_offset:15825*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15825*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5276: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fffe00; valaddr_reg:x3; val_offset:15828*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15828*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5277: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ffff00; valaddr_reg:x3; val_offset:15831*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15831*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5278: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ffff80; valaddr_reg:x3; val_offset:15834*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15834*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5279: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ffffc0; valaddr_reg:x3; val_offset:15837*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15837*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5280: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ffffe0; valaddr_reg:x3; val_offset:15840*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15840*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5281: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fffff0; valaddr_reg:x3; val_offset:15843*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15843*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5282: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fffff8; valaddr_reg:x3; val_offset:15846*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15846*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5283: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fffffc; valaddr_reg:x3; val_offset:15849*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15849*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5284: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34fffffe; valaddr_reg:x3; val_offset:15852*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15852*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5285: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x69 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x34ffffff; valaddr_reg:x3; val_offset:15855*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15855*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5286: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3f800001; valaddr_reg:x3; val_offset:15858*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15858*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5287: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3f800003; valaddr_reg:x3; val_offset:15861*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15861*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5288: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3f800007; valaddr_reg:x3; val_offset:15864*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15864*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5289: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3f999999; valaddr_reg:x3; val_offset:15867*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15867*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5290: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:15870*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15870*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5291: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:15873*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15873*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5292: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:15876*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15876*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5293: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:15879*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15879*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5294: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:15882*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15882*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5295: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:15885*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15885*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5296: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:15888*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15888*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5297: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:15891*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15891*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5298: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:15894*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15894*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5299: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:15897*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15897*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5300: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:15900*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15900*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5301: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x3f2542 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x2b6df8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dbf2542; op2val:0x12b6df8; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:15903*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15903*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5302: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74800000; valaddr_reg:x3; val_offset:15906*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15906*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5303: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74800001; valaddr_reg:x3; val_offset:15909*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15909*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5304: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74800003; valaddr_reg:x3; val_offset:15912*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15912*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5305: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74800007; valaddr_reg:x3; val_offset:15915*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15915*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5306: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7480000f; valaddr_reg:x3; val_offset:15918*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15918*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5307: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7480001f; valaddr_reg:x3; val_offset:15921*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15921*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5308: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7480003f; valaddr_reg:x3; val_offset:15924*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15924*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5309: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7480007f; valaddr_reg:x3; val_offset:15927*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15927*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5310: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x748000ff; valaddr_reg:x3; val_offset:15930*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15930*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5311: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x748001ff; valaddr_reg:x3; val_offset:15933*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15933*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5312: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x748003ff; valaddr_reg:x3; val_offset:15936*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15936*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5313: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x748007ff; valaddr_reg:x3; val_offset:15939*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15939*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5314: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74800fff; valaddr_reg:x3; val_offset:15942*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15942*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5315: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74801fff; valaddr_reg:x3; val_offset:15945*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15945*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5316: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74803fff; valaddr_reg:x3; val_offset:15948*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15948*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5317: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74807fff; valaddr_reg:x3; val_offset:15951*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15951*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5318: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7480ffff; valaddr_reg:x3; val_offset:15954*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15954*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5319: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7481ffff; valaddr_reg:x3; val_offset:15957*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15957*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5320: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7483ffff; valaddr_reg:x3; val_offset:15960*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15960*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5321: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7487ffff; valaddr_reg:x3; val_offset:15963*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15963*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5322: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x748fffff; valaddr_reg:x3; val_offset:15966*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15966*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5323: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x749fffff; valaddr_reg:x3; val_offset:15969*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15969*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5324: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74bfffff; valaddr_reg:x3; val_offset:15972*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15972*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5325: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74c00000; valaddr_reg:x3; val_offset:15975*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15975*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5326: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74e00000; valaddr_reg:x3; val_offset:15978*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15978*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5327: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74f00000; valaddr_reg:x3; val_offset:15981*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15981*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5328: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74f80000; valaddr_reg:x3; val_offset:15984*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15984*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5329: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fc0000; valaddr_reg:x3; val_offset:15987*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15987*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5330: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fe0000; valaddr_reg:x3; val_offset:15990*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15990*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5331: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ff0000; valaddr_reg:x3; val_offset:15993*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15993*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5332: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ff8000; valaddr_reg:x3; val_offset:15996*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15996*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5333: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ffc000; valaddr_reg:x3; val_offset:15999*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 15999*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5334: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ffe000; valaddr_reg:x3; val_offset:16002*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16002*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5335: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fff000; valaddr_reg:x3; val_offset:16005*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16005*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5336: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fff800; valaddr_reg:x3; val_offset:16008*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16008*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5337: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fffc00; valaddr_reg:x3; val_offset:16011*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16011*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5338: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fffe00; valaddr_reg:x3; val_offset:16014*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16014*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5339: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ffff00; valaddr_reg:x3; val_offset:16017*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16017*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5340: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ffff80; valaddr_reg:x3; val_offset:16020*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16020*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5341: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ffffc0; valaddr_reg:x3; val_offset:16023*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16023*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5342: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ffffe0; valaddr_reg:x3; val_offset:16026*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16026*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5343: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fffff0; valaddr_reg:x3; val_offset:16029*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16029*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5344: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fffff8; valaddr_reg:x3; val_offset:16032*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16032*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5345: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fffffc; valaddr_reg:x3; val_offset:16035*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16035*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5346: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74fffffe; valaddr_reg:x3; val_offset:16038*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16038*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5347: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xe9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x74ffffff; valaddr_reg:x3; val_offset:16041*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16041*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5348: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f000001; valaddr_reg:x3; val_offset:16044*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16044*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5349: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f000003; valaddr_reg:x3; val_offset:16047*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16047*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5350: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f000007; valaddr_reg:x3; val_offset:16050*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16050*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5351: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f199999; valaddr_reg:x3; val_offset:16053*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16053*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5352: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f249249; valaddr_reg:x3; val_offset:16056*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16056*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5353: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f333333; valaddr_reg:x3; val_offset:16059*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16059*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5354: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:16062*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16062*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5355: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:16065*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16065*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5356: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f444444; valaddr_reg:x3; val_offset:16068*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16068*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5357: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:16071*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16071*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5358: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:16074*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16074*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5359: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f666666; valaddr_reg:x3; val_offset:16077*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16077*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5360: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:16080*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16080*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5361: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:16083*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16083*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5362: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:16086*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16086*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5363: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x405ccb and fs2 == 0 and fe2 == 0x82 and fm2 == 0x2a5855 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc05ccb; op2val:0x412a5855; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:16089*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16089*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5364: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:16092*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16092*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5365: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:16095*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16095*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5366: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:16098*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16098*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5367: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:16101*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16101*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5368: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:16104*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16104*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5369: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:16107*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16107*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5370: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:16110*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16110*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5371: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:16113*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16113*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5372: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:16116*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16116*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5373: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:16119*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16119*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5374: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:16122*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16122*0 + 3*41*FLEN/8, x4, x1, x2) + +inst_5375: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:16125*0 + 3*41*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16125*0 + 3*41*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880804095,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880804351,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880804863,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880805887,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880807935,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880812031,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880820223,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880836607,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880869375,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(880934911,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(881065983,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(881328127,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(881852415,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(882900991,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(884998143,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(884998144,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(887095296,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(888143872,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(888668160,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(888930304,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889061376,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889126912,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889159680,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889176064,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889184256,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889188352,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889190400,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889191424,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889191936,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192192,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192320,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192384,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192416,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192432,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192440,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192444,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192446,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(889192447,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2109678914,32,FLEN) +NAN_BOXED(19623416,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545664,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545665,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545667,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545671,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545679,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545695,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545727,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545791,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954545919,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954546175,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954546687,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954547711,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954549759,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954553855,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954562047,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954578431,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954611199,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954676735,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1954807807,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1955069951,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1955594239,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1956642815,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1958739967,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1958739968,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1960837120,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1961885696,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962409984,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962672128,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962803200,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962868736,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962901504,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962917888,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962926080,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962930176,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962932224,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962933248,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962933760,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934016,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934144,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934208,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934240,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934256,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934264,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934268,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934270,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(1962934271,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2109758667,32,FLEN) +NAN_BOXED(1093294165,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-43.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-43.S new file mode 100644 index 000000000..f650c5739 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-43.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_5376: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:16128*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16128*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5377: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:16131*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16131*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5378: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:16134*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16134*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5379: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:16137*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16137*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5380: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10000000; valaddr_reg:x3; val_offset:16140*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16140*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5381: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10000001; valaddr_reg:x3; val_offset:16143*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16143*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5382: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10000003; valaddr_reg:x3; val_offset:16146*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16146*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5383: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10000007; valaddr_reg:x3; val_offset:16149*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16149*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5384: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x1000000f; valaddr_reg:x3; val_offset:16152*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16152*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5385: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x1000001f; valaddr_reg:x3; val_offset:16155*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16155*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5386: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x1000003f; valaddr_reg:x3; val_offset:16158*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16158*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5387: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x1000007f; valaddr_reg:x3; val_offset:16161*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16161*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5388: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x100000ff; valaddr_reg:x3; val_offset:16164*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16164*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5389: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x100001ff; valaddr_reg:x3; val_offset:16167*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16167*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5390: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x100003ff; valaddr_reg:x3; val_offset:16170*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16170*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5391: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x100007ff; valaddr_reg:x3; val_offset:16173*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16173*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5392: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10000fff; valaddr_reg:x3; val_offset:16176*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16176*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5393: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10001fff; valaddr_reg:x3; val_offset:16179*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16179*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5394: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10003fff; valaddr_reg:x3; val_offset:16182*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16182*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5395: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10007fff; valaddr_reg:x3; val_offset:16185*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16185*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5396: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x1000ffff; valaddr_reg:x3; val_offset:16188*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16188*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5397: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x1001ffff; valaddr_reg:x3; val_offset:16191*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16191*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5398: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x1003ffff; valaddr_reg:x3; val_offset:16194*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16194*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5399: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x1007ffff; valaddr_reg:x3; val_offset:16197*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16197*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5400: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x100fffff; valaddr_reg:x3; val_offset:16200*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16200*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5401: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x101fffff; valaddr_reg:x3; val_offset:16203*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16203*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5402: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x103fffff; valaddr_reg:x3; val_offset:16206*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16206*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5403: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10400000; valaddr_reg:x3; val_offset:16209*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16209*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5404: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10600000; valaddr_reg:x3; val_offset:16212*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16212*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5405: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10700000; valaddr_reg:x3; val_offset:16215*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16215*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5406: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x10780000; valaddr_reg:x3; val_offset:16218*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16218*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5407: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107c0000; valaddr_reg:x3; val_offset:16221*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16221*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5408: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107e0000; valaddr_reg:x3; val_offset:16224*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16224*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5409: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107f0000; valaddr_reg:x3; val_offset:16227*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16227*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5410: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107f8000; valaddr_reg:x3; val_offset:16230*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16230*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5411: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107fc000; valaddr_reg:x3; val_offset:16233*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16233*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5412: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107fe000; valaddr_reg:x3; val_offset:16236*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16236*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5413: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107ff000; valaddr_reg:x3; val_offset:16239*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16239*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5414: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107ff800; valaddr_reg:x3; val_offset:16242*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16242*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5415: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107ffc00; valaddr_reg:x3; val_offset:16245*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16245*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5416: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107ffe00; valaddr_reg:x3; val_offset:16248*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16248*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5417: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107fff00; valaddr_reg:x3; val_offset:16251*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16251*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5418: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107fff80; valaddr_reg:x3; val_offset:16254*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16254*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5419: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107fffc0; valaddr_reg:x3; val_offset:16257*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16257*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5420: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107fffe0; valaddr_reg:x3; val_offset:16260*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16260*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5421: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107ffff0; valaddr_reg:x3; val_offset:16263*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16263*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5422: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107ffff8; valaddr_reg:x3; val_offset:16266*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16266*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5423: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107ffffc; valaddr_reg:x3; val_offset:16269*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16269*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5424: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107ffffe; valaddr_reg:x3; val_offset:16272*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16272*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5425: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x433d56 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc33d56; op2val:0x0; +op3val:0x107fffff; valaddr_reg:x3; val_offset:16275*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16275*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5426: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20000000; valaddr_reg:x3; val_offset:16278*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16278*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5427: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20000001; valaddr_reg:x3; val_offset:16281*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16281*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5428: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20000003; valaddr_reg:x3; val_offset:16284*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16284*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5429: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20000007; valaddr_reg:x3; val_offset:16287*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16287*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5430: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x2000000f; valaddr_reg:x3; val_offset:16290*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16290*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5431: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x2000001f; valaddr_reg:x3; val_offset:16293*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16293*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5432: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x2000003f; valaddr_reg:x3; val_offset:16296*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16296*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5433: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x2000007f; valaddr_reg:x3; val_offset:16299*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16299*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5434: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x200000ff; valaddr_reg:x3; val_offset:16302*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16302*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5435: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x200001ff; valaddr_reg:x3; val_offset:16305*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16305*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5436: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x200003ff; valaddr_reg:x3; val_offset:16308*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16308*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5437: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x200007ff; valaddr_reg:x3; val_offset:16311*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16311*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5438: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20000fff; valaddr_reg:x3; val_offset:16314*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16314*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5439: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20001fff; valaddr_reg:x3; val_offset:16317*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16317*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5440: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20003fff; valaddr_reg:x3; val_offset:16320*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16320*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5441: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20007fff; valaddr_reg:x3; val_offset:16323*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16323*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5442: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x2000ffff; valaddr_reg:x3; val_offset:16326*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16326*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5443: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x2001ffff; valaddr_reg:x3; val_offset:16329*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16329*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5444: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x2003ffff; valaddr_reg:x3; val_offset:16332*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16332*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5445: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x2007ffff; valaddr_reg:x3; val_offset:16335*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16335*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5446: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x200fffff; valaddr_reg:x3; val_offset:16338*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16338*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5447: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x201fffff; valaddr_reg:x3; val_offset:16341*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16341*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5448: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x203fffff; valaddr_reg:x3; val_offset:16344*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16344*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5449: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20400000; valaddr_reg:x3; val_offset:16347*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16347*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5450: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20600000; valaddr_reg:x3; val_offset:16350*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16350*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5451: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20700000; valaddr_reg:x3; val_offset:16353*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16353*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5452: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x20780000; valaddr_reg:x3; val_offset:16356*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16356*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5453: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207c0000; valaddr_reg:x3; val_offset:16359*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16359*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5454: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207e0000; valaddr_reg:x3; val_offset:16362*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16362*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5455: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207f0000; valaddr_reg:x3; val_offset:16365*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16365*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5456: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207f8000; valaddr_reg:x3; val_offset:16368*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16368*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5457: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207fc000; valaddr_reg:x3; val_offset:16371*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16371*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5458: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207fe000; valaddr_reg:x3; val_offset:16374*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16374*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5459: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207ff000; valaddr_reg:x3; val_offset:16377*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16377*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5460: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207ff800; valaddr_reg:x3; val_offset:16380*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16380*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5461: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207ffc00; valaddr_reg:x3; val_offset:16383*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16383*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5462: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207ffe00; valaddr_reg:x3; val_offset:16386*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16386*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5463: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207fff00; valaddr_reg:x3; val_offset:16389*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16389*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5464: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207fff80; valaddr_reg:x3; val_offset:16392*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16392*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5465: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207fffc0; valaddr_reg:x3; val_offset:16395*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16395*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5466: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207fffe0; valaddr_reg:x3; val_offset:16398*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16398*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5467: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207ffff0; valaddr_reg:x3; val_offset:16401*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16401*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5468: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207ffff8; valaddr_reg:x3; val_offset:16404*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16404*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5469: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207ffffc; valaddr_reg:x3; val_offset:16407*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16407*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5470: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207ffffe; valaddr_reg:x3; val_offset:16410*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16410*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5471: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x40 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x207fffff; valaddr_reg:x3; val_offset:16413*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16413*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5472: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3f800001; valaddr_reg:x3; val_offset:16416*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16416*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5473: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3f800003; valaddr_reg:x3; val_offset:16419*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16419*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5474: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3f800007; valaddr_reg:x3; val_offset:16422*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16422*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5475: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3f999999; valaddr_reg:x3; val_offset:16425*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16425*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5476: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:16428*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16428*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5477: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:16431*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16431*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5478: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:16434*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16434*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5479: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:16437*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16437*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5480: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:16440*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16440*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5481: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:16443*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16443*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5482: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:16446*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16446*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5483: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:16449*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16449*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5484: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:16452*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16452*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5485: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:16455*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16455*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5486: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:16458*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16458*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5487: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x480655 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x23d1d9 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc80655; op2val:0x123d1d9; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:16461*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16461*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5488: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4800000; valaddr_reg:x3; val_offset:16464*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16464*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5489: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4800001; valaddr_reg:x3; val_offset:16467*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16467*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5490: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4800003; valaddr_reg:x3; val_offset:16470*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16470*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5491: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4800007; valaddr_reg:x3; val_offset:16473*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16473*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5492: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb480000f; valaddr_reg:x3; val_offset:16476*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16476*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5493: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb480001f; valaddr_reg:x3; val_offset:16479*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16479*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5494: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb480003f; valaddr_reg:x3; val_offset:16482*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16482*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5495: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb480007f; valaddr_reg:x3; val_offset:16485*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16485*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5496: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb48000ff; valaddr_reg:x3; val_offset:16488*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16488*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5497: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb48001ff; valaddr_reg:x3; val_offset:16491*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16491*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5498: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb48003ff; valaddr_reg:x3; val_offset:16494*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16494*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5499: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb48007ff; valaddr_reg:x3; val_offset:16497*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16497*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5500: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4800fff; valaddr_reg:x3; val_offset:16500*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16500*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5501: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4801fff; valaddr_reg:x3; val_offset:16503*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16503*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5502: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4803fff; valaddr_reg:x3; val_offset:16506*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16506*0 + 3*42*FLEN/8, x4, x1, x2) + +inst_5503: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4807fff; valaddr_reg:x3; val_offset:16509*0 + 3*42*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16509*0 + 3*42*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435456,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435457,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435459,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435463,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435471,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435487,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435519,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435583,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435711,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435967,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268436479,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268437503,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268439551,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268443647,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268451839,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268468223,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268500991,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268566527,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268697599,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268959743,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(269484031,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(270532607,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(272629759,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(272629760,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(274726912,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(275775488,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276299776,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276561920,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276692992,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276758528,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276791296,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276807680,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276815872,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276819968,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276822016,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823040,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823552,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823808,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276823936,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824000,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824032,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824048,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824056,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824060,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824062,32,FLEN) +NAN_BOXED(2109947222,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(276824063,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536870912,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536870913,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536870915,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536870919,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536870927,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536870943,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536870975,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536871039,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536871167,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536871423,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536871935,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536872959,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536875007,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536879103,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536887295,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536903679,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(536936447,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(537001983,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(537133055,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(537395199,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(537919487,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(538968063,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(541065215,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(541065216,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(543162368,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(544210944,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(544735232,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(544997376,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545128448,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545193984,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545226752,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545243136,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545251328,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545255424,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545257472,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545258496,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259008,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259264,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259392,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259456,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259488,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259504,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259512,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259516,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259518,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(545259519,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2110260821,32,FLEN) +NAN_BOXED(19124697,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287488,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287489,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287491,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287495,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287503,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287519,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287551,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287615,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287743,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028287999,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028288511,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028289535,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028291583,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028295679,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028303871,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028320255,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-44.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-44.S new file mode 100644 index 000000000..eb2ec2405 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-44.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_5504: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb480ffff; valaddr_reg:x3; val_offset:16512*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16512*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5505: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb481ffff; valaddr_reg:x3; val_offset:16515*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16515*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5506: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb483ffff; valaddr_reg:x3; val_offset:16518*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16518*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5507: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb487ffff; valaddr_reg:x3; val_offset:16521*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16521*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5508: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb48fffff; valaddr_reg:x3; val_offset:16524*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16524*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5509: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb49fffff; valaddr_reg:x3; val_offset:16527*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16527*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5510: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4bfffff; valaddr_reg:x3; val_offset:16530*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16530*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5511: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4c00000; valaddr_reg:x3; val_offset:16533*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16533*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5512: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4e00000; valaddr_reg:x3; val_offset:16536*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16536*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5513: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4f00000; valaddr_reg:x3; val_offset:16539*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16539*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5514: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4f80000; valaddr_reg:x3; val_offset:16542*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16542*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5515: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fc0000; valaddr_reg:x3; val_offset:16545*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16545*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5516: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fe0000; valaddr_reg:x3; val_offset:16548*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16548*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5517: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ff0000; valaddr_reg:x3; val_offset:16551*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16551*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5518: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ff8000; valaddr_reg:x3; val_offset:16554*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16554*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5519: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ffc000; valaddr_reg:x3; val_offset:16557*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16557*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5520: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ffe000; valaddr_reg:x3; val_offset:16560*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16560*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5521: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fff000; valaddr_reg:x3; val_offset:16563*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16563*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5522: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fff800; valaddr_reg:x3; val_offset:16566*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16566*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5523: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fffc00; valaddr_reg:x3; val_offset:16569*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16569*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5524: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fffe00; valaddr_reg:x3; val_offset:16572*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16572*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5525: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ffff00; valaddr_reg:x3; val_offset:16575*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16575*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5526: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ffff80; valaddr_reg:x3; val_offset:16578*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16578*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5527: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ffffc0; valaddr_reg:x3; val_offset:16581*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16581*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5528: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ffffe0; valaddr_reg:x3; val_offset:16584*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16584*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5529: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fffff0; valaddr_reg:x3; val_offset:16587*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16587*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5530: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fffff8; valaddr_reg:x3; val_offset:16590*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16590*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5531: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fffffc; valaddr_reg:x3; val_offset:16593*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16593*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5532: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4fffffe; valaddr_reg:x3; val_offset:16596*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16596*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5533: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x69 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xb4ffffff; valaddr_reg:x3; val_offset:16599*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16599*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5534: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbf800001; valaddr_reg:x3; val_offset:16602*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16602*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5535: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbf800003; valaddr_reg:x3; val_offset:16605*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16605*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5536: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbf800007; valaddr_reg:x3; val_offset:16608*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16608*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5537: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbf999999; valaddr_reg:x3; val_offset:16611*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16611*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5538: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:16614*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16614*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5539: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:16617*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16617*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5540: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:16620*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16620*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5541: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:16623*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16623*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5542: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:16626*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16626*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5543: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:16629*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16629*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5544: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:16632*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16632*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5545: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:16635*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16635*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5546: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:16638*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16638*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5547: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:16641*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16641*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5548: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:16644*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16644*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5549: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x487b3d and fs2 == 1 and fe2 == 0x02 and fm2 == 0x237253 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dc87b3d; op2val:0x81237253; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:16647*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16647*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5550: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a000000; valaddr_reg:x3; val_offset:16650*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16650*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5551: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a000001; valaddr_reg:x3; val_offset:16653*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16653*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5552: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a000003; valaddr_reg:x3; val_offset:16656*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16656*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5553: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a000007; valaddr_reg:x3; val_offset:16659*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16659*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5554: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a00000f; valaddr_reg:x3; val_offset:16662*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16662*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5555: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a00001f; valaddr_reg:x3; val_offset:16665*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16665*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5556: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a00003f; valaddr_reg:x3; val_offset:16668*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16668*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5557: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a00007f; valaddr_reg:x3; val_offset:16671*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16671*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5558: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a0000ff; valaddr_reg:x3; val_offset:16674*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16674*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5559: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a0001ff; valaddr_reg:x3; val_offset:16677*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16677*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5560: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a0003ff; valaddr_reg:x3; val_offset:16680*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16680*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5561: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a0007ff; valaddr_reg:x3; val_offset:16683*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16683*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5562: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a000fff; valaddr_reg:x3; val_offset:16686*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16686*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5563: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a001fff; valaddr_reg:x3; val_offset:16689*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16689*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5564: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a003fff; valaddr_reg:x3; val_offset:16692*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16692*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5565: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a007fff; valaddr_reg:x3; val_offset:16695*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16695*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5566: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a00ffff; valaddr_reg:x3; val_offset:16698*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16698*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5567: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a01ffff; valaddr_reg:x3; val_offset:16701*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16701*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5568: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a03ffff; valaddr_reg:x3; val_offset:16704*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16704*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5569: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a07ffff; valaddr_reg:x3; val_offset:16707*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16707*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5570: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a0fffff; valaddr_reg:x3; val_offset:16710*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16710*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5571: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a1fffff; valaddr_reg:x3; val_offset:16713*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16713*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5572: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a3fffff; valaddr_reg:x3; val_offset:16716*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16716*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5573: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a400000; valaddr_reg:x3; val_offset:16719*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16719*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5574: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a600000; valaddr_reg:x3; val_offset:16722*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16722*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5575: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a700000; valaddr_reg:x3; val_offset:16725*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16725*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5576: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a780000; valaddr_reg:x3; val_offset:16728*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16728*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5577: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7c0000; valaddr_reg:x3; val_offset:16731*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16731*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5578: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7e0000; valaddr_reg:x3; val_offset:16734*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16734*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5579: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7f0000; valaddr_reg:x3; val_offset:16737*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16737*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5580: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7f8000; valaddr_reg:x3; val_offset:16740*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16740*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5581: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7fc000; valaddr_reg:x3; val_offset:16743*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16743*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5582: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7fe000; valaddr_reg:x3; val_offset:16746*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16746*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5583: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7ff000; valaddr_reg:x3; val_offset:16749*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16749*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5584: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7ff800; valaddr_reg:x3; val_offset:16752*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16752*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5585: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7ffc00; valaddr_reg:x3; val_offset:16755*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16755*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5586: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7ffe00; valaddr_reg:x3; val_offset:16758*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16758*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5587: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7fff00; valaddr_reg:x3; val_offset:16761*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16761*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5588: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7fff80; valaddr_reg:x3; val_offset:16764*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16764*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5589: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7fffc0; valaddr_reg:x3; val_offset:16767*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16767*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5590: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7fffe0; valaddr_reg:x3; val_offset:16770*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16770*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5591: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7ffff0; valaddr_reg:x3; val_offset:16773*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16773*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5592: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7ffff8; valaddr_reg:x3; val_offset:16776*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16776*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5593: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7ffffc; valaddr_reg:x3; val_offset:16779*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16779*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5594: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7ffffe; valaddr_reg:x3; val_offset:16782*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16782*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5595: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7a7fffff; valaddr_reg:x3; val_offset:16785*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16785*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5596: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f000001; valaddr_reg:x3; val_offset:16788*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16788*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5597: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f000003; valaddr_reg:x3; val_offset:16791*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16791*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5598: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f000007; valaddr_reg:x3; val_offset:16794*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16794*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5599: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f199999; valaddr_reg:x3; val_offset:16797*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16797*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5600: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f249249; valaddr_reg:x3; val_offset:16800*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16800*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5601: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f333333; valaddr_reg:x3; val_offset:16803*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16803*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5602: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:16806*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16806*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5603: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:16809*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16809*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5604: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f444444; valaddr_reg:x3; val_offset:16812*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16812*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5605: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:16815*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16815*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5606: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:16818*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16818*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5607: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f666666; valaddr_reg:x3; val_offset:16821*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16821*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5608: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:16824*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16824*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5609: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:16827*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16827*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5610: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:16830*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16830*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5611: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4ac87b and fs2 == 0 and fe2 == 0x82 and fm2 == 0x219761 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcac87b; op2val:0x41219761; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:16833*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16833*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5612: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2000000; valaddr_reg:x3; val_offset:16836*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16836*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5613: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2000001; valaddr_reg:x3; val_offset:16839*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16839*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5614: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2000003; valaddr_reg:x3; val_offset:16842*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16842*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5615: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2000007; valaddr_reg:x3; val_offset:16845*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16845*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5616: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa200000f; valaddr_reg:x3; val_offset:16848*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16848*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5617: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa200001f; valaddr_reg:x3; val_offset:16851*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16851*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5618: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa200003f; valaddr_reg:x3; val_offset:16854*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16854*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5619: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa200007f; valaddr_reg:x3; val_offset:16857*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16857*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5620: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa20000ff; valaddr_reg:x3; val_offset:16860*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16860*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5621: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa20001ff; valaddr_reg:x3; val_offset:16863*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16863*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5622: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa20003ff; valaddr_reg:x3; val_offset:16866*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16866*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5623: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa20007ff; valaddr_reg:x3; val_offset:16869*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16869*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5624: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2000fff; valaddr_reg:x3; val_offset:16872*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16872*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5625: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2001fff; valaddr_reg:x3; val_offset:16875*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16875*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5626: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2003fff; valaddr_reg:x3; val_offset:16878*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16878*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5627: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2007fff; valaddr_reg:x3; val_offset:16881*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16881*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5628: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa200ffff; valaddr_reg:x3; val_offset:16884*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16884*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5629: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa201ffff; valaddr_reg:x3; val_offset:16887*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16887*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5630: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa203ffff; valaddr_reg:x3; val_offset:16890*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16890*0 + 3*43*FLEN/8, x4, x1, x2) + +inst_5631: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa207ffff; valaddr_reg:x3; val_offset:16893*0 + 3*43*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16893*0 + 3*43*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028353023,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028418559,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028549631,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3028811775,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3029336063,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3030384639,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3032481791,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3032481792,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3034578944,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3035627520,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036151808,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036413952,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036545024,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036610560,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036643328,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036659712,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036667904,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036672000,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036674048,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036675072,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036675584,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036675840,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036675968,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036676032,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036676064,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036676080,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036676088,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036676092,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036676094,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3036676095,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2110290749,32,FLEN) +NAN_BOXED(2166583891,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820352,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820353,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820355,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820359,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820367,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820383,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820415,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820479,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820607,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046820863,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046821375,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046822399,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046824447,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046828543,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046836735,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046853119,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046885887,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2046951423,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2047082495,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2047344639,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2047868927,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2048917503,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2051014655,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2051014656,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2053111808,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2054160384,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2054684672,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2054946816,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055077888,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055143424,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055176192,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055192576,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055200768,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055204864,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055206912,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055207936,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208448,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208704,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208832,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208896,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208928,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208944,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208952,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208956,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208958,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2055208959,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2110441595,32,FLEN) +NAN_BOXED(1092720481,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717908992,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717908993,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717908995,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717908999,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717909007,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717909023,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717909055,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717909119,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717909247,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717909503,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717910015,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717911039,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717913087,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717917183,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717925375,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717941759,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2717974527,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2718040063,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2718171135,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2718433279,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-45.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-45.S new file mode 100644 index 000000000..5b69028c6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-45.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_5632: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa20fffff; valaddr_reg:x3; val_offset:16896*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16896*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5633: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa21fffff; valaddr_reg:x3; val_offset:16899*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16899*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5634: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa23fffff; valaddr_reg:x3; val_offset:16902*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16902*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5635: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2400000; valaddr_reg:x3; val_offset:16905*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16905*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5636: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2600000; valaddr_reg:x3; val_offset:16908*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16908*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5637: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2700000; valaddr_reg:x3; val_offset:16911*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16911*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5638: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa2780000; valaddr_reg:x3; val_offset:16914*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16914*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5639: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27c0000; valaddr_reg:x3; val_offset:16917*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16917*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5640: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27e0000; valaddr_reg:x3; val_offset:16920*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16920*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5641: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27f0000; valaddr_reg:x3; val_offset:16923*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16923*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5642: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27f8000; valaddr_reg:x3; val_offset:16926*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16926*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5643: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27fc000; valaddr_reg:x3; val_offset:16929*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16929*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5644: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27fe000; valaddr_reg:x3; val_offset:16932*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16932*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5645: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27ff000; valaddr_reg:x3; val_offset:16935*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16935*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5646: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27ff800; valaddr_reg:x3; val_offset:16938*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16938*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5647: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27ffc00; valaddr_reg:x3; val_offset:16941*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16941*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5648: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27ffe00; valaddr_reg:x3; val_offset:16944*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16944*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5649: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27fff00; valaddr_reg:x3; val_offset:16947*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16947*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5650: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27fff80; valaddr_reg:x3; val_offset:16950*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16950*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5651: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27fffc0; valaddr_reg:x3; val_offset:16953*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16953*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5652: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27fffe0; valaddr_reg:x3; val_offset:16956*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16956*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5653: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27ffff0; valaddr_reg:x3; val_offset:16959*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16959*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5654: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27ffff8; valaddr_reg:x3; val_offset:16962*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16962*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5655: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27ffffc; valaddr_reg:x3; val_offset:16965*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16965*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5656: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27ffffe; valaddr_reg:x3; val_offset:16968*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16968*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5657: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x44 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xa27fffff; valaddr_reg:x3; val_offset:16971*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16971*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5658: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbf800001; valaddr_reg:x3; val_offset:16974*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16974*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5659: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbf800003; valaddr_reg:x3; val_offset:16977*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16977*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5660: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbf800007; valaddr_reg:x3; val_offset:16980*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16980*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5661: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbf999999; valaddr_reg:x3; val_offset:16983*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16983*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5662: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:16986*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16986*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5663: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:16989*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16989*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5664: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:16992*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16992*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5665: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:16995*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16995*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5666: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:16998*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 16998*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5667: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:17001*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17001*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5668: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:17004*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17004*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5669: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:17007*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17007*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5670: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:17010*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17010*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5671: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:17013*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17013*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5672: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:17016*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17016*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5673: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x4b47e3 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x21321b and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dcb47e3; op2val:0x8121321b; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:17019*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17019*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5674: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbf800001; valaddr_reg:x3; val_offset:17022*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17022*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5675: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbf800003; valaddr_reg:x3; val_offset:17025*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17025*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5676: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbf800007; valaddr_reg:x3; val_offset:17028*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17028*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5677: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbf999999; valaddr_reg:x3; val_offset:17031*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17031*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5678: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:17034*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17034*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5679: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:17037*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17037*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5680: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:17040*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17040*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5681: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:17043*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17043*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5682: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:17046*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17046*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5683: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:17049*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17049*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5684: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:17052*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17052*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5685: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:17055*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17055*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5686: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:17058*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17058*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5687: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:17061*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17061*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5688: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:17064*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17064*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5689: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:17067*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17067*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5690: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc800000; valaddr_reg:x3; val_offset:17070*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17070*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5691: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc800001; valaddr_reg:x3; val_offset:17073*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17073*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5692: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc800003; valaddr_reg:x3; val_offset:17076*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17076*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5693: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc800007; valaddr_reg:x3; val_offset:17079*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17079*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5694: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc80000f; valaddr_reg:x3; val_offset:17082*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17082*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5695: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc80001f; valaddr_reg:x3; val_offset:17085*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17085*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5696: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc80003f; valaddr_reg:x3; val_offset:17088*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17088*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5697: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc80007f; valaddr_reg:x3; val_offset:17091*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17091*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5698: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc8000ff; valaddr_reg:x3; val_offset:17094*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17094*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5699: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc8001ff; valaddr_reg:x3; val_offset:17097*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17097*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5700: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc8003ff; valaddr_reg:x3; val_offset:17100*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17100*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5701: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc8007ff; valaddr_reg:x3; val_offset:17103*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17103*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5702: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc800fff; valaddr_reg:x3; val_offset:17106*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17106*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5703: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc801fff; valaddr_reg:x3; val_offset:17109*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17109*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5704: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc803fff; valaddr_reg:x3; val_offset:17112*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17112*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5705: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc807fff; valaddr_reg:x3; val_offset:17115*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17115*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5706: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc80ffff; valaddr_reg:x3; val_offset:17118*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17118*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5707: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc81ffff; valaddr_reg:x3; val_offset:17121*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17121*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5708: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc83ffff; valaddr_reg:x3; val_offset:17124*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17124*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5709: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc87ffff; valaddr_reg:x3; val_offset:17127*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17127*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5710: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc8fffff; valaddr_reg:x3; val_offset:17130*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17130*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5711: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcc9fffff; valaddr_reg:x3; val_offset:17133*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17133*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5712: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccbfffff; valaddr_reg:x3; val_offset:17136*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17136*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5713: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccc00000; valaddr_reg:x3; val_offset:17139*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17139*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5714: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xcce00000; valaddr_reg:x3; val_offset:17142*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17142*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5715: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccf00000; valaddr_reg:x3; val_offset:17145*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17145*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5716: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccf80000; valaddr_reg:x3; val_offset:17148*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17148*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5717: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfc0000; valaddr_reg:x3; val_offset:17151*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17151*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5718: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfe0000; valaddr_reg:x3; val_offset:17154*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17154*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5719: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccff0000; valaddr_reg:x3; val_offset:17157*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17157*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5720: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccff8000; valaddr_reg:x3; val_offset:17160*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17160*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5721: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccffc000; valaddr_reg:x3; val_offset:17163*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17163*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5722: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccffe000; valaddr_reg:x3; val_offset:17166*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17166*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5723: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfff000; valaddr_reg:x3; val_offset:17169*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17169*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5724: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfff800; valaddr_reg:x3; val_offset:17172*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17172*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5725: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfffc00; valaddr_reg:x3; val_offset:17175*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17175*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5726: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfffe00; valaddr_reg:x3; val_offset:17178*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17178*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5727: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccffff00; valaddr_reg:x3; val_offset:17181*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17181*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5728: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccffff80; valaddr_reg:x3; val_offset:17184*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17184*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5729: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccffffc0; valaddr_reg:x3; val_offset:17187*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17187*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5730: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccffffe0; valaddr_reg:x3; val_offset:17190*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17190*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5731: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfffff0; valaddr_reg:x3; val_offset:17193*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17193*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5732: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfffff8; valaddr_reg:x3; val_offset:17196*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17196*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5733: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfffffc; valaddr_reg:x3; val_offset:17199*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17199*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5734: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccfffffe; valaddr_reg:x3; val_offset:17202*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17202*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5735: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x54ab7c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x1a1445 and fs3 == 1 and fe3 == 0x99 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd4ab7c; op2val:0x811a1445; +op3val:0xccffffff; valaddr_reg:x3; val_offset:17205*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17205*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5736: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:17208*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17208*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5737: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:17211*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17211*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5738: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:17214*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17214*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5739: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:17217*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17217*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5740: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:17220*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17220*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5741: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:17223*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17223*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5742: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:17226*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17226*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5743: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:17229*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17229*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5744: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:17232*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17232*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5745: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:17235*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17235*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5746: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:17238*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17238*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5747: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:17241*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17241*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5748: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:17244*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17244*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5749: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:17247*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17247*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5750: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:17250*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17250*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5751: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:17253*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17253*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5752: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4800000; valaddr_reg:x3; val_offset:17256*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17256*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5753: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4800001; valaddr_reg:x3; val_offset:17259*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17259*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5754: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4800003; valaddr_reg:x3; val_offset:17262*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17262*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5755: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4800007; valaddr_reg:x3; val_offset:17265*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17265*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5756: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x480000f; valaddr_reg:x3; val_offset:17268*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17268*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5757: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x480001f; valaddr_reg:x3; val_offset:17271*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17271*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5758: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x480003f; valaddr_reg:x3; val_offset:17274*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17274*0 + 3*44*FLEN/8, x4, x1, x2) + +inst_5759: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x480007f; valaddr_reg:x3; val_offset:17277*0 + 3*44*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17277*0 + 3*44*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2718957567,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2720006143,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2722103295,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2722103296,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2724200448,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2725249024,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2725773312,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726035456,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726166528,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726232064,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726264832,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726281216,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726289408,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726293504,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726295552,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726296576,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297088,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297344,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297472,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297536,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297568,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297584,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297592,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297596,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297598,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(2726297599,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2110474211,32,FLEN) +NAN_BOXED(2166436379,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940672,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940673,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940675,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940679,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940687,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940703,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940735,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940799,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430940927,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430941183,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430941695,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430942719,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430944767,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430948863,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430957055,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3430973439,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3431006207,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3431071743,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3431202815,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3431464959,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3431989247,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3433037823,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3435134975,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3435134976,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3437232128,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3438280704,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3438804992,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439067136,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439198208,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439263744,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439296512,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439312896,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439321088,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439325184,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439327232,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439328256,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439328768,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329024,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329152,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329216,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329248,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329264,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329272,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329276,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329278,32,FLEN) +NAN_BOXED(2111089532,32,FLEN) +NAN_BOXED(2165969989,32,FLEN) +NAN_BOXED(3439329279,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497472,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497473,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497475,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497479,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497487,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497503,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497535,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497599,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-46.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-46.S new file mode 100644 index 000000000..61217e2db --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-46.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_5760: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x48000ff; valaddr_reg:x3; val_offset:17280*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17280*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5761: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x48001ff; valaddr_reg:x3; val_offset:17283*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17283*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5762: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x48003ff; valaddr_reg:x3; val_offset:17286*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17286*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5763: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x48007ff; valaddr_reg:x3; val_offset:17289*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17289*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5764: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4800fff; valaddr_reg:x3; val_offset:17292*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17292*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5765: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4801fff; valaddr_reg:x3; val_offset:17295*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17295*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5766: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4803fff; valaddr_reg:x3; val_offset:17298*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17298*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5767: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4807fff; valaddr_reg:x3; val_offset:17301*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17301*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5768: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x480ffff; valaddr_reg:x3; val_offset:17304*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17304*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5769: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x481ffff; valaddr_reg:x3; val_offset:17307*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17307*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5770: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x483ffff; valaddr_reg:x3; val_offset:17310*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17310*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5771: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x487ffff; valaddr_reg:x3; val_offset:17313*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17313*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5772: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x48fffff; valaddr_reg:x3; val_offset:17316*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17316*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5773: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x49fffff; valaddr_reg:x3; val_offset:17319*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17319*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5774: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4bfffff; valaddr_reg:x3; val_offset:17322*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17322*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5775: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4c00000; valaddr_reg:x3; val_offset:17325*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17325*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5776: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4e00000; valaddr_reg:x3; val_offset:17328*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17328*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5777: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4f00000; valaddr_reg:x3; val_offset:17331*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17331*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5778: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4f80000; valaddr_reg:x3; val_offset:17334*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17334*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5779: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fc0000; valaddr_reg:x3; val_offset:17337*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17337*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5780: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fe0000; valaddr_reg:x3; val_offset:17340*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17340*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5781: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ff0000; valaddr_reg:x3; val_offset:17343*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17343*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5782: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ff8000; valaddr_reg:x3; val_offset:17346*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17346*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5783: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ffc000; valaddr_reg:x3; val_offset:17349*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17349*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5784: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ffe000; valaddr_reg:x3; val_offset:17352*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17352*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5785: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fff000; valaddr_reg:x3; val_offset:17355*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17355*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5786: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fff800; valaddr_reg:x3; val_offset:17358*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17358*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5787: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fffc00; valaddr_reg:x3; val_offset:17361*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17361*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5788: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fffe00; valaddr_reg:x3; val_offset:17364*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17364*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5789: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ffff00; valaddr_reg:x3; val_offset:17367*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17367*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5790: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ffff80; valaddr_reg:x3; val_offset:17370*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17370*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5791: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ffffc0; valaddr_reg:x3; val_offset:17373*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17373*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5792: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ffffe0; valaddr_reg:x3; val_offset:17376*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17376*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5793: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fffff0; valaddr_reg:x3; val_offset:17379*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17379*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5794: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fffff8; valaddr_reg:x3; val_offset:17382*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17382*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5795: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fffffc; valaddr_reg:x3; val_offset:17385*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17385*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5796: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4fffffe; valaddr_reg:x3; val_offset:17388*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17388*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5797: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x55eca5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd5eca5; op2val:0x0; +op3val:0x4ffffff; valaddr_reg:x3; val_offset:17391*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17391*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5798: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:17394*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17394*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5799: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:17397*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17397*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5800: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:17400*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17400*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5801: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:17403*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17403*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5802: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:17406*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17406*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5803: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:17409*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17409*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5804: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:17412*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17412*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5805: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:17415*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17415*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5806: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:17418*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17418*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5807: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:17421*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17421*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5808: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:17424*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17424*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5809: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:17427*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17427*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5810: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:17430*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17430*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5811: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:17433*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17433*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5812: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:17436*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17436*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5813: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:17439*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17439*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5814: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5000000; valaddr_reg:x3; val_offset:17442*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17442*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5815: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5000001; valaddr_reg:x3; val_offset:17445*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17445*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5816: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5000003; valaddr_reg:x3; val_offset:17448*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17448*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5817: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5000007; valaddr_reg:x3; val_offset:17451*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17451*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5818: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x500000f; valaddr_reg:x3; val_offset:17454*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17454*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5819: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x500001f; valaddr_reg:x3; val_offset:17457*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17457*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5820: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x500003f; valaddr_reg:x3; val_offset:17460*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17460*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5821: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x500007f; valaddr_reg:x3; val_offset:17463*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17463*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5822: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x50000ff; valaddr_reg:x3; val_offset:17466*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17466*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5823: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x50001ff; valaddr_reg:x3; val_offset:17469*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17469*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5824: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x50003ff; valaddr_reg:x3; val_offset:17472*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17472*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5825: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x50007ff; valaddr_reg:x3; val_offset:17475*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17475*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5826: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5000fff; valaddr_reg:x3; val_offset:17478*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17478*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5827: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5001fff; valaddr_reg:x3; val_offset:17481*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17481*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5828: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5003fff; valaddr_reg:x3; val_offset:17484*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17484*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5829: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5007fff; valaddr_reg:x3; val_offset:17487*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17487*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5830: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x500ffff; valaddr_reg:x3; val_offset:17490*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17490*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5831: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x501ffff; valaddr_reg:x3; val_offset:17493*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17493*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5832: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x503ffff; valaddr_reg:x3; val_offset:17496*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17496*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5833: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x507ffff; valaddr_reg:x3; val_offset:17499*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17499*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5834: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x50fffff; valaddr_reg:x3; val_offset:17502*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17502*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5835: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x51fffff; valaddr_reg:x3; val_offset:17505*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17505*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5836: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x53fffff; valaddr_reg:x3; val_offset:17508*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17508*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5837: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5400000; valaddr_reg:x3; val_offset:17511*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17511*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5838: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5600000; valaddr_reg:x3; val_offset:17514*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17514*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5839: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5700000; valaddr_reg:x3; val_offset:17517*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17517*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5840: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x5780000; valaddr_reg:x3; val_offset:17520*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17520*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5841: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57c0000; valaddr_reg:x3; val_offset:17523*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17523*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5842: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57e0000; valaddr_reg:x3; val_offset:17526*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17526*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5843: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57f0000; valaddr_reg:x3; val_offset:17529*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17529*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5844: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57f8000; valaddr_reg:x3; val_offset:17532*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17532*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5845: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57fc000; valaddr_reg:x3; val_offset:17535*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17535*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5846: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57fe000; valaddr_reg:x3; val_offset:17538*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17538*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5847: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57ff000; valaddr_reg:x3; val_offset:17541*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17541*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5848: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57ff800; valaddr_reg:x3; val_offset:17544*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17544*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5849: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57ffc00; valaddr_reg:x3; val_offset:17547*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17547*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5850: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57ffe00; valaddr_reg:x3; val_offset:17550*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17550*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5851: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57fff00; valaddr_reg:x3; val_offset:17553*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17553*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5852: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57fff80; valaddr_reg:x3; val_offset:17556*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17556*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5853: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57fffc0; valaddr_reg:x3; val_offset:17559*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17559*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5854: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57fffe0; valaddr_reg:x3; val_offset:17562*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17562*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5855: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57ffff0; valaddr_reg:x3; val_offset:17565*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17565*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5856: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57ffff8; valaddr_reg:x3; val_offset:17568*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17568*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5857: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57ffffc; valaddr_reg:x3; val_offset:17571*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17571*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5858: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57ffffe; valaddr_reg:x3; val_offset:17574*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17574*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5859: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x56a646 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd6a646; op2val:0x0; +op3val:0x57fffff; valaddr_reg:x3; val_offset:17577*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17577*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5860: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b000000; valaddr_reg:x3; val_offset:17580*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17580*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5861: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b000001; valaddr_reg:x3; val_offset:17583*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17583*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5862: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b000003; valaddr_reg:x3; val_offset:17586*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17586*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5863: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b000007; valaddr_reg:x3; val_offset:17589*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17589*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5864: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b00000f; valaddr_reg:x3; val_offset:17592*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17592*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5865: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b00001f; valaddr_reg:x3; val_offset:17595*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17595*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5866: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b00003f; valaddr_reg:x3; val_offset:17598*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17598*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5867: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b00007f; valaddr_reg:x3; val_offset:17601*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17601*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5868: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b0000ff; valaddr_reg:x3; val_offset:17604*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17604*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5869: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b0001ff; valaddr_reg:x3; val_offset:17607*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17607*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5870: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b0003ff; valaddr_reg:x3; val_offset:17610*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17610*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5871: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b0007ff; valaddr_reg:x3; val_offset:17613*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17613*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5872: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b000fff; valaddr_reg:x3; val_offset:17616*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17616*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5873: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b001fff; valaddr_reg:x3; val_offset:17619*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17619*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5874: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b003fff; valaddr_reg:x3; val_offset:17622*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17622*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5875: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b007fff; valaddr_reg:x3; val_offset:17625*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17625*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5876: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b00ffff; valaddr_reg:x3; val_offset:17628*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17628*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5877: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b01ffff; valaddr_reg:x3; val_offset:17631*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17631*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5878: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b03ffff; valaddr_reg:x3; val_offset:17634*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17634*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5879: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b07ffff; valaddr_reg:x3; val_offset:17637*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17637*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5880: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b0fffff; valaddr_reg:x3; val_offset:17640*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17640*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5881: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b1fffff; valaddr_reg:x3; val_offset:17643*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17643*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5882: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b3fffff; valaddr_reg:x3; val_offset:17646*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17646*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5883: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b400000; valaddr_reg:x3; val_offset:17649*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17649*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5884: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b600000; valaddr_reg:x3; val_offset:17652*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17652*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5885: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b700000; valaddr_reg:x3; val_offset:17655*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17655*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5886: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b780000; valaddr_reg:x3; val_offset:17658*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17658*0 + 3*45*FLEN/8, x4, x1, x2) + +inst_5887: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7c0000; valaddr_reg:x3; val_offset:17661*0 + 3*45*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17661*0 + 3*45*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497727,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497983,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75498495,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75499519,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75501567,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75505663,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75513855,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75530239,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75563007,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75628543,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75759615,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(76021759,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(76546047,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(77594623,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(79691775,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(79691776,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(81788928,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(82837504,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83361792,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83623936,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83755008,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83820544,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83853312,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83869696,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83877888,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83881984,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83884032,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885056,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885568,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885824,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83885952,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886016,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886048,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886064,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886072,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886076,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886078,32,FLEN) +NAN_BOXED(2111171749,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886079,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886080,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886081,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886083,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886087,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886095,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886111,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886143,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886207,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886335,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83886591,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83887103,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83888127,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83890175,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83894271,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83902463,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83918847,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(83951615,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84017151,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84148223,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84410367,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(84934655,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(85983231,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(88080383,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(88080384,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(90177536,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(91226112,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(91750400,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92012544,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92143616,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92209152,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92241920,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92258304,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92266496,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92270592,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92272640,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92273664,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274176,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274432,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274560,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274624,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274656,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274672,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274680,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274684,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274686,32,FLEN) +NAN_BOXED(2111219270,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(92274687,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162112,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162113,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162115,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162119,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162127,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162143,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162175,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162239,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162367,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795162623,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795163135,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795164159,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795166207,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795170303,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795178495,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795194879,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795227647,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795293183,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795424255,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1795686399,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1796210687,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1797259263,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1799356415,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1799356416,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1801453568,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1802502144,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803026432,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803288576,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-47.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-47.S new file mode 100644 index 000000000..c4a7a3410 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-47.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_5888: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7e0000; valaddr_reg:x3; val_offset:17664*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17664*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5889: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7f0000; valaddr_reg:x3; val_offset:17667*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17667*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5890: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7f8000; valaddr_reg:x3; val_offset:17670*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17670*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5891: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7fc000; valaddr_reg:x3; val_offset:17673*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17673*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5892: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7fe000; valaddr_reg:x3; val_offset:17676*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17676*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5893: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7ff000; valaddr_reg:x3; val_offset:17679*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17679*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5894: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7ff800; valaddr_reg:x3; val_offset:17682*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17682*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5895: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7ffc00; valaddr_reg:x3; val_offset:17685*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17685*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5896: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7ffe00; valaddr_reg:x3; val_offset:17688*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17688*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5897: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7fff00; valaddr_reg:x3; val_offset:17691*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17691*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5898: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7fff80; valaddr_reg:x3; val_offset:17694*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17694*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5899: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7fffc0; valaddr_reg:x3; val_offset:17697*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17697*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5900: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7fffe0; valaddr_reg:x3; val_offset:17700*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17700*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5901: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7ffff0; valaddr_reg:x3; val_offset:17703*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17703*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5902: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7ffff8; valaddr_reg:x3; val_offset:17706*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17706*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5903: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7ffffc; valaddr_reg:x3; val_offset:17709*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17709*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5904: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7ffffe; valaddr_reg:x3; val_offset:17712*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17712*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5905: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xd6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x6b7fffff; valaddr_reg:x3; val_offset:17715*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17715*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5906: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f000001; valaddr_reg:x3; val_offset:17718*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17718*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5907: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f000003; valaddr_reg:x3; val_offset:17721*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17721*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5908: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f000007; valaddr_reg:x3; val_offset:17724*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17724*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5909: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f199999; valaddr_reg:x3; val_offset:17727*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17727*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5910: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f249249; valaddr_reg:x3; val_offset:17730*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17730*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5911: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f333333; valaddr_reg:x3; val_offset:17733*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17733*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5912: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:17736*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17736*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5913: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:17739*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17739*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5914: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f444444; valaddr_reg:x3; val_offset:17742*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17742*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5915: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:17745*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17745*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5916: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:17748*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17748*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5917: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f666666; valaddr_reg:x3; val_offset:17751*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17751*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5918: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:17754*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17754*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5919: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:17757*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17757*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5920: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:17760*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17760*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5921: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x59f068 and fs2 == 0 and fe2 == 0x82 and fm2 == 0x165a9a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dd9f068; op2val:0x41165a9a; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:17763*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17763*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5922: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7800000; valaddr_reg:x3; val_offset:17766*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17766*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5923: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7800001; valaddr_reg:x3; val_offset:17769*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17769*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5924: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7800003; valaddr_reg:x3; val_offset:17772*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17772*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5925: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7800007; valaddr_reg:x3; val_offset:17775*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17775*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5926: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe780000f; valaddr_reg:x3; val_offset:17778*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17778*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5927: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe780001f; valaddr_reg:x3; val_offset:17781*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17781*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5928: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe780003f; valaddr_reg:x3; val_offset:17784*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17784*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5929: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe780007f; valaddr_reg:x3; val_offset:17787*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17787*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5930: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe78000ff; valaddr_reg:x3; val_offset:17790*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17790*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5931: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe78001ff; valaddr_reg:x3; val_offset:17793*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17793*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5932: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe78003ff; valaddr_reg:x3; val_offset:17796*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17796*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5933: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe78007ff; valaddr_reg:x3; val_offset:17799*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17799*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5934: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7800fff; valaddr_reg:x3; val_offset:17802*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17802*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5935: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7801fff; valaddr_reg:x3; val_offset:17805*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17805*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5936: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7803fff; valaddr_reg:x3; val_offset:17808*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17808*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5937: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7807fff; valaddr_reg:x3; val_offset:17811*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17811*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5938: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe780ffff; valaddr_reg:x3; val_offset:17814*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17814*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5939: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe781ffff; valaddr_reg:x3; val_offset:17817*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17817*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5940: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe783ffff; valaddr_reg:x3; val_offset:17820*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17820*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5941: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe787ffff; valaddr_reg:x3; val_offset:17823*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17823*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5942: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe78fffff; valaddr_reg:x3; val_offset:17826*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17826*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5943: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe79fffff; valaddr_reg:x3; val_offset:17829*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17829*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5944: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7bfffff; valaddr_reg:x3; val_offset:17832*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17832*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5945: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7c00000; valaddr_reg:x3; val_offset:17835*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17835*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5946: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7e00000; valaddr_reg:x3; val_offset:17838*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17838*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5947: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7f00000; valaddr_reg:x3; val_offset:17841*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17841*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5948: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7f80000; valaddr_reg:x3; val_offset:17844*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17844*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5949: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fc0000; valaddr_reg:x3; val_offset:17847*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17847*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5950: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fe0000; valaddr_reg:x3; val_offset:17850*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17850*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5951: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ff0000; valaddr_reg:x3; val_offset:17853*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17853*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5952: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ff8000; valaddr_reg:x3; val_offset:17856*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17856*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5953: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ffc000; valaddr_reg:x3; val_offset:17859*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17859*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5954: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ffe000; valaddr_reg:x3; val_offset:17862*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17862*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5955: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fff000; valaddr_reg:x3; val_offset:17865*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17865*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5956: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fff800; valaddr_reg:x3; val_offset:17868*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17868*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5957: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fffc00; valaddr_reg:x3; val_offset:17871*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17871*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5958: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fffe00; valaddr_reg:x3; val_offset:17874*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17874*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5959: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ffff00; valaddr_reg:x3; val_offset:17877*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17877*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5960: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ffff80; valaddr_reg:x3; val_offset:17880*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17880*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5961: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ffffc0; valaddr_reg:x3; val_offset:17883*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17883*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5962: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ffffe0; valaddr_reg:x3; val_offset:17886*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17886*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5963: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fffff0; valaddr_reg:x3; val_offset:17889*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17889*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5964: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fffff8; valaddr_reg:x3; val_offset:17892*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17892*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5965: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fffffc; valaddr_reg:x3; val_offset:17895*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17895*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5966: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7fffffe; valaddr_reg:x3; val_offset:17898*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17898*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5967: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xcf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xe7ffffff; valaddr_reg:x3; val_offset:17901*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17901*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5968: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff000001; valaddr_reg:x3; val_offset:17904*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17904*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5969: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff000003; valaddr_reg:x3; val_offset:17907*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17907*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5970: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff000007; valaddr_reg:x3; val_offset:17910*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17910*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5971: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff199999; valaddr_reg:x3; val_offset:17913*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17913*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5972: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff249249; valaddr_reg:x3; val_offset:17916*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17916*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5973: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff333333; valaddr_reg:x3; val_offset:17919*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17919*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5974: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:17922*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17922*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5975: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:17925*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17925*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5976: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff444444; valaddr_reg:x3; val_offset:17928*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17928*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5977: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:17931*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17931*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5978: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:17934*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17934*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5979: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff666666; valaddr_reg:x3; val_offset:17937*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17937*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5980: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:17940*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17940*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5981: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:17943*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17943*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5982: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:17946*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17946*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5983: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5afbd0 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x15a300 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddafbd0; op2val:0xc115a300; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:17949*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17949*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5984: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66000000; valaddr_reg:x3; val_offset:17952*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17952*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5985: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66000001; valaddr_reg:x3; val_offset:17955*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17955*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5986: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66000003; valaddr_reg:x3; val_offset:17958*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17958*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5987: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66000007; valaddr_reg:x3; val_offset:17961*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17961*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5988: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x6600000f; valaddr_reg:x3; val_offset:17964*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17964*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5989: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x6600001f; valaddr_reg:x3; val_offset:17967*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17967*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5990: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x6600003f; valaddr_reg:x3; val_offset:17970*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17970*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5991: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x6600007f; valaddr_reg:x3; val_offset:17973*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17973*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5992: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x660000ff; valaddr_reg:x3; val_offset:17976*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17976*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5993: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x660001ff; valaddr_reg:x3; val_offset:17979*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17979*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5994: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x660003ff; valaddr_reg:x3; val_offset:17982*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17982*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5995: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x660007ff; valaddr_reg:x3; val_offset:17985*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17985*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5996: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66000fff; valaddr_reg:x3; val_offset:17988*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17988*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5997: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66001fff; valaddr_reg:x3; val_offset:17991*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17991*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5998: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66003fff; valaddr_reg:x3; val_offset:17994*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17994*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_5999: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66007fff; valaddr_reg:x3; val_offset:17997*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 17997*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6000: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x6600ffff; valaddr_reg:x3; val_offset:18000*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18000*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6001: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x6601ffff; valaddr_reg:x3; val_offset:18003*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18003*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6002: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x6603ffff; valaddr_reg:x3; val_offset:18006*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18006*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6003: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x6607ffff; valaddr_reg:x3; val_offset:18009*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18009*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6004: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x660fffff; valaddr_reg:x3; val_offset:18012*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18012*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6005: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x661fffff; valaddr_reg:x3; val_offset:18015*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18015*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6006: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x663fffff; valaddr_reg:x3; val_offset:18018*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18018*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6007: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66400000; valaddr_reg:x3; val_offset:18021*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18021*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6008: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66600000; valaddr_reg:x3; val_offset:18024*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18024*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6009: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66700000; valaddr_reg:x3; val_offset:18027*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18027*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6010: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x66780000; valaddr_reg:x3; val_offset:18030*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18030*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6011: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667c0000; valaddr_reg:x3; val_offset:18033*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18033*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6012: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667e0000; valaddr_reg:x3; val_offset:18036*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18036*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6013: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667f0000; valaddr_reg:x3; val_offset:18039*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18039*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6014: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667f8000; valaddr_reg:x3; val_offset:18042*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18042*0 + 3*46*FLEN/8, x4, x1, x2) + +inst_6015: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667fc000; valaddr_reg:x3; val_offset:18045*0 + 3*46*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18045*0 + 3*46*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803419648,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803485184,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803517952,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803534336,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803542528,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803546624,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803548672,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803549696,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550208,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550464,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550592,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550656,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550688,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550704,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550712,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550716,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550718,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(1803550719,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2111434856,32,FLEN) +NAN_BOXED(1091984026,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925504,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925505,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925507,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925511,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925519,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925535,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925567,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925631,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883925759,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883926015,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883926527,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883927551,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883929599,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883933695,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883941887,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883958271,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3883991039,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3884056575,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3884187647,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3884449791,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3884974079,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3886022655,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3888119807,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3888119808,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3890216960,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3891265536,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3891789824,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892051968,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892183040,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892248576,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892281344,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892297728,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892305920,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892310016,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892312064,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892313088,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892313600,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892313856,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892313984,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892314048,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892314080,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892314096,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892314104,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892314108,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892314110,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(3892314111,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2111503312,32,FLEN) +NAN_BOXED(3239420672,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276032,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276033,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276035,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276039,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276047,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276063,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276095,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276159,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276287,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711276543,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711277055,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711278079,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711280127,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711284223,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711292415,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711308799,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711341567,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711407103,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711538175,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1711800319,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1712324607,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1713373183,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1715470335,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1715470336,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1717567488,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1718616064,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719140352,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719402496,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719533568,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719599104,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719631872,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719648256,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-48.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-48.S new file mode 100644 index 000000000..0e738cc62 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-48.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_6016: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667fe000; valaddr_reg:x3; val_offset:18048*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18048*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6017: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667ff000; valaddr_reg:x3; val_offset:18051*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18051*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6018: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667ff800; valaddr_reg:x3; val_offset:18054*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18054*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6019: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667ffc00; valaddr_reg:x3; val_offset:18057*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18057*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6020: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667ffe00; valaddr_reg:x3; val_offset:18060*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18060*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6021: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667fff00; valaddr_reg:x3; val_offset:18063*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18063*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6022: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667fff80; valaddr_reg:x3; val_offset:18066*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18066*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6023: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667fffc0; valaddr_reg:x3; val_offset:18069*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18069*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6024: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667fffe0; valaddr_reg:x3; val_offset:18072*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18072*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6025: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667ffff0; valaddr_reg:x3; val_offset:18075*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18075*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6026: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667ffff8; valaddr_reg:x3; val_offset:18078*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18078*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6027: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667ffffc; valaddr_reg:x3; val_offset:18081*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18081*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6028: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667ffffe; valaddr_reg:x3; val_offset:18084*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18084*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6029: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xcc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x667fffff; valaddr_reg:x3; val_offset:18087*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18087*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6030: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f000001; valaddr_reg:x3; val_offset:18090*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18090*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6031: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f000003; valaddr_reg:x3; val_offset:18093*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18093*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6032: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f000007; valaddr_reg:x3; val_offset:18096*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18096*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6033: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f199999; valaddr_reg:x3; val_offset:18099*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18099*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6034: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f249249; valaddr_reg:x3; val_offset:18102*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18102*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6035: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f333333; valaddr_reg:x3; val_offset:18105*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18105*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6036: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:18108*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18108*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6037: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:18111*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18111*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6038: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f444444; valaddr_reg:x3; val_offset:18114*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18114*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6039: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:18117*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18117*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6040: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:18120*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18120*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6041: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f666666; valaddr_reg:x3; val_offset:18123*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18123*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6042: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:18126*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18126*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6043: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:18129*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18129*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6044: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:18132*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18132*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6045: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x5c185d and fs2 == 0 and fe2 == 0x82 and fm2 == 0x14e18b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ddc185d; op2val:0x4114e18b; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:18135*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18135*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6046: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74000000; valaddr_reg:x3; val_offset:18138*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18138*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6047: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74000001; valaddr_reg:x3; val_offset:18141*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18141*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6048: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74000003; valaddr_reg:x3; val_offset:18144*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18144*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6049: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74000007; valaddr_reg:x3; val_offset:18147*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18147*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6050: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7400000f; valaddr_reg:x3; val_offset:18150*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18150*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6051: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7400001f; valaddr_reg:x3; val_offset:18153*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18153*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6052: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7400003f; valaddr_reg:x3; val_offset:18156*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18156*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6053: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7400007f; valaddr_reg:x3; val_offset:18159*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18159*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6054: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x740000ff; valaddr_reg:x3; val_offset:18162*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18162*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6055: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x740001ff; valaddr_reg:x3; val_offset:18165*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18165*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6056: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x740003ff; valaddr_reg:x3; val_offset:18168*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18168*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6057: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x740007ff; valaddr_reg:x3; val_offset:18171*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18171*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6058: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74000fff; valaddr_reg:x3; val_offset:18174*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18174*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6059: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74001fff; valaddr_reg:x3; val_offset:18177*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18177*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6060: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74003fff; valaddr_reg:x3; val_offset:18180*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18180*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6061: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74007fff; valaddr_reg:x3; val_offset:18183*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18183*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6062: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7400ffff; valaddr_reg:x3; val_offset:18186*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18186*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6063: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7401ffff; valaddr_reg:x3; val_offset:18189*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18189*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6064: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7403ffff; valaddr_reg:x3; val_offset:18192*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18192*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6065: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7407ffff; valaddr_reg:x3; val_offset:18195*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18195*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6066: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x740fffff; valaddr_reg:x3; val_offset:18198*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18198*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6067: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x741fffff; valaddr_reg:x3; val_offset:18201*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18201*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6068: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x743fffff; valaddr_reg:x3; val_offset:18204*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18204*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6069: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74400000; valaddr_reg:x3; val_offset:18207*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18207*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6070: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74600000; valaddr_reg:x3; val_offset:18210*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18210*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6071: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74700000; valaddr_reg:x3; val_offset:18213*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18213*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6072: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x74780000; valaddr_reg:x3; val_offset:18216*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18216*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6073: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747c0000; valaddr_reg:x3; val_offset:18219*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18219*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6074: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747e0000; valaddr_reg:x3; val_offset:18222*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18222*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6075: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747f0000; valaddr_reg:x3; val_offset:18225*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18225*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6076: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747f8000; valaddr_reg:x3; val_offset:18228*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18228*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6077: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747fc000; valaddr_reg:x3; val_offset:18231*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18231*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6078: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747fe000; valaddr_reg:x3; val_offset:18234*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18234*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6079: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747ff000; valaddr_reg:x3; val_offset:18237*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18237*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6080: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747ff800; valaddr_reg:x3; val_offset:18240*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18240*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6081: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747ffc00; valaddr_reg:x3; val_offset:18243*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18243*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6082: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747ffe00; valaddr_reg:x3; val_offset:18246*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18246*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6083: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747fff00; valaddr_reg:x3; val_offset:18249*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18249*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6084: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747fff80; valaddr_reg:x3; val_offset:18252*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18252*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6085: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747fffc0; valaddr_reg:x3; val_offset:18255*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18255*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6086: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747fffe0; valaddr_reg:x3; val_offset:18258*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18258*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6087: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747ffff0; valaddr_reg:x3; val_offset:18261*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18261*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6088: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747ffff8; valaddr_reg:x3; val_offset:18264*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18264*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6089: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747ffffc; valaddr_reg:x3; val_offset:18267*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18267*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6090: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747ffffe; valaddr_reg:x3; val_offset:18270*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18270*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6091: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xe8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x747fffff; valaddr_reg:x3; val_offset:18273*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18273*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6092: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f000001; valaddr_reg:x3; val_offset:18276*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18276*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6093: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f000003; valaddr_reg:x3; val_offset:18279*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18279*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6094: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f000007; valaddr_reg:x3; val_offset:18282*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18282*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6095: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f199999; valaddr_reg:x3; val_offset:18285*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18285*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6096: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f249249; valaddr_reg:x3; val_offset:18288*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18288*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6097: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f333333; valaddr_reg:x3; val_offset:18291*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18291*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6098: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:18294*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18294*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6099: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:18297*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18297*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6100: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f444444; valaddr_reg:x3; val_offset:18300*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18300*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6101: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:18303*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18303*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6102: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:18306*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18306*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6103: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f666666; valaddr_reg:x3; val_offset:18309*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18309*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6104: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:18312*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18312*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6105: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:18315*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18315*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6106: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:18318*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18318*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6107: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61adfd and fs2 == 0 and fe2 == 0x82 and fm2 == 0x11326b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1adfd; op2val:0x4111326b; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:18321*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18321*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6108: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:18324*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18324*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6109: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:18327*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18327*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6110: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:18330*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18330*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6111: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:18333*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18333*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6112: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:18336*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18336*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6113: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:18339*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18339*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6114: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:18342*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18342*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6115: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:18345*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18345*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6116: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:18348*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18348*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6117: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:18351*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18351*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6118: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:18354*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18354*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6119: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:18357*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18357*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6120: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:18360*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18360*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6121: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:18363*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18363*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6122: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:18366*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18366*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6123: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:18369*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18369*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6124: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8800000; valaddr_reg:x3; val_offset:18372*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18372*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6125: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8800001; valaddr_reg:x3; val_offset:18375*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18375*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6126: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8800003; valaddr_reg:x3; val_offset:18378*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18378*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6127: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8800007; valaddr_reg:x3; val_offset:18381*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18381*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6128: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x880000f; valaddr_reg:x3; val_offset:18384*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18384*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6129: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x880001f; valaddr_reg:x3; val_offset:18387*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18387*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6130: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x880003f; valaddr_reg:x3; val_offset:18390*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18390*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6131: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x880007f; valaddr_reg:x3; val_offset:18393*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18393*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6132: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x88000ff; valaddr_reg:x3; val_offset:18396*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18396*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6133: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x88001ff; valaddr_reg:x3; val_offset:18399*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18399*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6134: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x88003ff; valaddr_reg:x3; val_offset:18402*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18402*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6135: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x88007ff; valaddr_reg:x3; val_offset:18405*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18405*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6136: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8800fff; valaddr_reg:x3; val_offset:18408*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18408*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6137: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8801fff; valaddr_reg:x3; val_offset:18411*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18411*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6138: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8803fff; valaddr_reg:x3; val_offset:18414*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18414*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6139: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8807fff; valaddr_reg:x3; val_offset:18417*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18417*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6140: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x880ffff; valaddr_reg:x3; val_offset:18420*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18420*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6141: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x881ffff; valaddr_reg:x3; val_offset:18423*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18423*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6142: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x883ffff; valaddr_reg:x3; val_offset:18426*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18426*0 + 3*47*FLEN/8, x4, x1, x2) + +inst_6143: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x887ffff; valaddr_reg:x3; val_offset:18429*0 + 3*47*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18429*0 + 3*47*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719656448,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719660544,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719662592,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719663616,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664128,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664384,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664512,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664576,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664608,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664624,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664632,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664636,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664638,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(1719664639,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2111576157,32,FLEN) +NAN_BOXED(1091887499,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157056,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157057,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157059,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157063,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157071,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157087,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157119,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157183,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157311,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946157567,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946158079,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946159103,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946161151,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946165247,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946173439,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946189823,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946222591,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946288127,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946419199,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1946681343,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1947205631,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1948254207,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1950351359,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1950351360,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1952448512,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1953497088,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954021376,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954283520,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954414592,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954480128,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954512896,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954529280,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954537472,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954541568,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954543616,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954544640,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545152,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545408,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545536,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545600,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545632,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545648,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545656,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545660,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545662,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(1954545663,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2111942141,32,FLEN) +NAN_BOXED(1091646059,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606336,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606337,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606339,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606343,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606351,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606367,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606399,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606463,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606591,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142606847,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142607359,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142608383,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142610431,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142614527,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142622719,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142639103,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142671871,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142737407,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(142868479,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(143130623,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-49.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-49.S new file mode 100644 index 000000000..19f8b6cd3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-49.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_6144: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x88fffff; valaddr_reg:x3; val_offset:18432*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18432*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6145: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x89fffff; valaddr_reg:x3; val_offset:18435*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18435*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6146: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8bfffff; valaddr_reg:x3; val_offset:18438*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18438*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6147: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8c00000; valaddr_reg:x3; val_offset:18441*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18441*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6148: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8e00000; valaddr_reg:x3; val_offset:18444*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18444*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6149: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8f00000; valaddr_reg:x3; val_offset:18447*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18447*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6150: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8f80000; valaddr_reg:x3; val_offset:18450*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18450*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6151: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fc0000; valaddr_reg:x3; val_offset:18453*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18453*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6152: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fe0000; valaddr_reg:x3; val_offset:18456*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18456*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6153: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ff0000; valaddr_reg:x3; val_offset:18459*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18459*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6154: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ff8000; valaddr_reg:x3; val_offset:18462*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18462*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6155: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ffc000; valaddr_reg:x3; val_offset:18465*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18465*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6156: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ffe000; valaddr_reg:x3; val_offset:18468*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18468*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6157: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fff000; valaddr_reg:x3; val_offset:18471*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18471*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6158: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fff800; valaddr_reg:x3; val_offset:18474*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18474*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6159: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fffc00; valaddr_reg:x3; val_offset:18477*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18477*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6160: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fffe00; valaddr_reg:x3; val_offset:18480*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18480*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6161: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ffff00; valaddr_reg:x3; val_offset:18483*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18483*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6162: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ffff80; valaddr_reg:x3; val_offset:18486*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18486*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6163: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ffffc0; valaddr_reg:x3; val_offset:18489*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18489*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6164: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ffffe0; valaddr_reg:x3; val_offset:18492*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18492*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6165: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fffff0; valaddr_reg:x3; val_offset:18495*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18495*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6166: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fffff8; valaddr_reg:x3; val_offset:18498*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18498*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6167: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fffffc; valaddr_reg:x3; val_offset:18501*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18501*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6168: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8fffffe; valaddr_reg:x3; val_offset:18504*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18504*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6169: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x61bb92 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x11 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de1bb92; op2val:0x0; +op3val:0x8ffffff; valaddr_reg:x3; val_offset:18507*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18507*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6170: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:18510*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18510*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6171: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:18513*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18513*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6172: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:18516*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18516*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6173: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:18519*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18519*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6174: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:18522*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18522*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6175: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:18525*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18525*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6176: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:18528*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18528*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6177: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:18531*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18531*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6178: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:18534*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18534*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6179: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:18537*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18537*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6180: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:18540*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18540*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6181: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:18543*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18543*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6182: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:18546*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18546*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6183: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:18549*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18549*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6184: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:18552*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18552*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6185: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:18555*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18555*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6186: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7000000; valaddr_reg:x3; val_offset:18558*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18558*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6187: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7000001; valaddr_reg:x3; val_offset:18561*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18561*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6188: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7000003; valaddr_reg:x3; val_offset:18564*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18564*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6189: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7000007; valaddr_reg:x3; val_offset:18567*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18567*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6190: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x700000f; valaddr_reg:x3; val_offset:18570*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18570*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6191: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x700001f; valaddr_reg:x3; val_offset:18573*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18573*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6192: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x700003f; valaddr_reg:x3; val_offset:18576*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18576*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6193: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x700007f; valaddr_reg:x3; val_offset:18579*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18579*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6194: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x70000ff; valaddr_reg:x3; val_offset:18582*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18582*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6195: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x70001ff; valaddr_reg:x3; val_offset:18585*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18585*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6196: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x70003ff; valaddr_reg:x3; val_offset:18588*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18588*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6197: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x70007ff; valaddr_reg:x3; val_offset:18591*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18591*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6198: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7000fff; valaddr_reg:x3; val_offset:18594*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18594*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6199: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7001fff; valaddr_reg:x3; val_offset:18597*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18597*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6200: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7003fff; valaddr_reg:x3; val_offset:18600*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18600*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6201: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7007fff; valaddr_reg:x3; val_offset:18603*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18603*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6202: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x700ffff; valaddr_reg:x3; val_offset:18606*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18606*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6203: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x701ffff; valaddr_reg:x3; val_offset:18609*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18609*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6204: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x703ffff; valaddr_reg:x3; val_offset:18612*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18612*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6205: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x707ffff; valaddr_reg:x3; val_offset:18615*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18615*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6206: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x70fffff; valaddr_reg:x3; val_offset:18618*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18618*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6207: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x71fffff; valaddr_reg:x3; val_offset:18621*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18621*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6208: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x73fffff; valaddr_reg:x3; val_offset:18624*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18624*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6209: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7400000; valaddr_reg:x3; val_offset:18627*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18627*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6210: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7600000; valaddr_reg:x3; val_offset:18630*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18630*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6211: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7700000; valaddr_reg:x3; val_offset:18633*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18633*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6212: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x7780000; valaddr_reg:x3; val_offset:18636*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18636*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6213: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77c0000; valaddr_reg:x3; val_offset:18639*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18639*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6214: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77e0000; valaddr_reg:x3; val_offset:18642*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18642*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6215: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77f0000; valaddr_reg:x3; val_offset:18645*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18645*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6216: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77f8000; valaddr_reg:x3; val_offset:18648*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18648*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6217: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77fc000; valaddr_reg:x3; val_offset:18651*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18651*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6218: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77fe000; valaddr_reg:x3; val_offset:18654*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18654*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6219: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77ff000; valaddr_reg:x3; val_offset:18657*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18657*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6220: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77ff800; valaddr_reg:x3; val_offset:18660*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18660*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6221: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77ffc00; valaddr_reg:x3; val_offset:18663*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18663*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6222: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77ffe00; valaddr_reg:x3; val_offset:18666*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18666*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6223: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77fff00; valaddr_reg:x3; val_offset:18669*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18669*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6224: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77fff80; valaddr_reg:x3; val_offset:18672*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18672*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6225: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77fffc0; valaddr_reg:x3; val_offset:18675*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18675*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6226: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77fffe0; valaddr_reg:x3; val_offset:18678*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18678*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6227: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77ffff0; valaddr_reg:x3; val_offset:18681*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18681*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6228: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77ffff8; valaddr_reg:x3; val_offset:18684*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18684*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6229: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77ffffc; valaddr_reg:x3; val_offset:18687*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18687*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6230: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77ffffe; valaddr_reg:x3; val_offset:18690*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18690*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6231: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x63e43a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de3e43a; op2val:0x0; +op3val:0x77fffff; valaddr_reg:x3; val_offset:18693*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18693*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6232: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:18696*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18696*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6233: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:18699*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18699*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6234: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:18702*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18702*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6235: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:18705*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18705*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6236: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:18708*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18708*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6237: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:18711*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18711*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6238: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:18714*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18714*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6239: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:18717*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18717*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6240: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:18720*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18720*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6241: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:18723*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18723*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6242: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:18726*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18726*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6243: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:18729*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18729*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6244: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:18732*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18732*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6245: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:18735*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18735*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6246: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:18738*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18738*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6247: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:18741*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18741*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6248: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf800000; valaddr_reg:x3; val_offset:18744*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18744*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6249: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf800001; valaddr_reg:x3; val_offset:18747*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18747*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6250: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf800003; valaddr_reg:x3; val_offset:18750*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18750*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6251: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf800007; valaddr_reg:x3; val_offset:18753*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18753*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6252: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf80000f; valaddr_reg:x3; val_offset:18756*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18756*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6253: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf80001f; valaddr_reg:x3; val_offset:18759*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18759*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6254: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf80003f; valaddr_reg:x3; val_offset:18762*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18762*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6255: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf80007f; valaddr_reg:x3; val_offset:18765*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18765*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6256: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf8000ff; valaddr_reg:x3; val_offset:18768*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18768*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6257: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf8001ff; valaddr_reg:x3; val_offset:18771*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18771*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6258: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf8003ff; valaddr_reg:x3; val_offset:18774*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18774*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6259: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf8007ff; valaddr_reg:x3; val_offset:18777*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18777*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6260: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf800fff; valaddr_reg:x3; val_offset:18780*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18780*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6261: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf801fff; valaddr_reg:x3; val_offset:18783*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18783*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6262: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf803fff; valaddr_reg:x3; val_offset:18786*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18786*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6263: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf807fff; valaddr_reg:x3; val_offset:18789*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18789*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6264: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf80ffff; valaddr_reg:x3; val_offset:18792*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18792*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6265: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf81ffff; valaddr_reg:x3; val_offset:18795*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18795*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6266: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf83ffff; valaddr_reg:x3; val_offset:18798*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18798*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6267: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf87ffff; valaddr_reg:x3; val_offset:18801*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18801*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6268: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf8fffff; valaddr_reg:x3; val_offset:18804*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18804*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6269: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xf9fffff; valaddr_reg:x3; val_offset:18807*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18807*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6270: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfbfffff; valaddr_reg:x3; val_offset:18810*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18810*0 + 3*48*FLEN/8, x4, x1, x2) + +inst_6271: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfc00000; valaddr_reg:x3; val_offset:18813*0 + 3*48*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18813*0 + 3*48*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(143654911,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(144703487,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(146800639,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(146800640,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(148897792,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(149946368,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150470656,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150732800,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150863872,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150929408,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150962176,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150978560,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150986752,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150990848,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150992896,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150993920,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994432,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994688,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994816,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994880,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994912,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994928,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994936,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994940,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994942,32,FLEN) +NAN_BOXED(2111945618,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(150994943,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440512,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440513,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440515,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440519,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440527,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440543,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440575,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440639,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440767,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117441023,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117441535,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117442559,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117444607,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117448703,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117456895,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117473279,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117506047,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117571583,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117702655,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117964799,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(118489087,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(119537663,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(121634815,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(121634816,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(123731968,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(124780544,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125304832,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125566976,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125698048,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125763584,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125796352,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125812736,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125820928,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125825024,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125827072,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828096,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828608,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828864,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125828992,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829056,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829088,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829104,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829112,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829116,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829118,32,FLEN) +NAN_BOXED(2112087098,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829119,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046848,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046849,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046851,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046855,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046863,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046879,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046911,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046975,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047103,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047359,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260047871,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260048895,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260050943,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260055039,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260063231,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260079615,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260112383,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260177919,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260308991,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260571135,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(261095423,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143999,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(264241151,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(264241152,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-50.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-50.S new file mode 100644 index 000000000..c9569051c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-50.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_6272: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfe00000; valaddr_reg:x3; val_offset:18816*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18816*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6273: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xff00000; valaddr_reg:x3; val_offset:18819*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18819*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6274: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xff80000; valaddr_reg:x3; val_offset:18822*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18822*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6275: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffc0000; valaddr_reg:x3; val_offset:18825*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18825*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6276: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffe0000; valaddr_reg:x3; val_offset:18828*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18828*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6277: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfff0000; valaddr_reg:x3; val_offset:18831*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18831*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6278: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfff8000; valaddr_reg:x3; val_offset:18834*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18834*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6279: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfffc000; valaddr_reg:x3; val_offset:18837*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18837*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6280: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfffe000; valaddr_reg:x3; val_offset:18840*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18840*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6281: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffff000; valaddr_reg:x3; val_offset:18843*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18843*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6282: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffff800; valaddr_reg:x3; val_offset:18846*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18846*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6283: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffffc00; valaddr_reg:x3; val_offset:18849*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18849*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6284: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffffe00; valaddr_reg:x3; val_offset:18852*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18852*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6285: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfffff00; valaddr_reg:x3; val_offset:18855*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18855*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6286: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfffff80; valaddr_reg:x3; val_offset:18858*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18858*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6287: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfffffc0; valaddr_reg:x3; val_offset:18861*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18861*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6288: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfffffe0; valaddr_reg:x3; val_offset:18864*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18864*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6289: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffffff0; valaddr_reg:x3; val_offset:18867*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18867*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6290: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffffff8; valaddr_reg:x3; val_offset:18870*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18870*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6291: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffffffc; valaddr_reg:x3; val_offset:18873*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18873*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6292: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xffffffe; valaddr_reg:x3; val_offset:18876*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18876*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6293: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x649633 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de49633; op2val:0x0; +op3val:0xfffffff; valaddr_reg:x3; val_offset:18879*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18879*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6294: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20800000; valaddr_reg:x3; val_offset:18882*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18882*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6295: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20800001; valaddr_reg:x3; val_offset:18885*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18885*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6296: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20800003; valaddr_reg:x3; val_offset:18888*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18888*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6297: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20800007; valaddr_reg:x3; val_offset:18891*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18891*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6298: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x2080000f; valaddr_reg:x3; val_offset:18894*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18894*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6299: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x2080001f; valaddr_reg:x3; val_offset:18897*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18897*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6300: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x2080003f; valaddr_reg:x3; val_offset:18900*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18900*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6301: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x2080007f; valaddr_reg:x3; val_offset:18903*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18903*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6302: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x208000ff; valaddr_reg:x3; val_offset:18906*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18906*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6303: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x208001ff; valaddr_reg:x3; val_offset:18909*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18909*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6304: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x208003ff; valaddr_reg:x3; val_offset:18912*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18912*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6305: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x208007ff; valaddr_reg:x3; val_offset:18915*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18915*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6306: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20800fff; valaddr_reg:x3; val_offset:18918*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18918*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6307: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20801fff; valaddr_reg:x3; val_offset:18921*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18921*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6308: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20803fff; valaddr_reg:x3; val_offset:18924*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18924*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6309: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20807fff; valaddr_reg:x3; val_offset:18927*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18927*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6310: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x2080ffff; valaddr_reg:x3; val_offset:18930*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18930*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6311: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x2081ffff; valaddr_reg:x3; val_offset:18933*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18933*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6312: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x2083ffff; valaddr_reg:x3; val_offset:18936*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18936*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6313: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x2087ffff; valaddr_reg:x3; val_offset:18939*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18939*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6314: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x208fffff; valaddr_reg:x3; val_offset:18942*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18942*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6315: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x209fffff; valaddr_reg:x3; val_offset:18945*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18945*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6316: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20bfffff; valaddr_reg:x3; val_offset:18948*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18948*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6317: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20c00000; valaddr_reg:x3; val_offset:18951*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18951*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6318: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20e00000; valaddr_reg:x3; val_offset:18954*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18954*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6319: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20f00000; valaddr_reg:x3; val_offset:18957*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18957*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6320: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20f80000; valaddr_reg:x3; val_offset:18960*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18960*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6321: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fc0000; valaddr_reg:x3; val_offset:18963*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18963*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6322: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fe0000; valaddr_reg:x3; val_offset:18966*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18966*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6323: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ff0000; valaddr_reg:x3; val_offset:18969*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18969*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6324: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ff8000; valaddr_reg:x3; val_offset:18972*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18972*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6325: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ffc000; valaddr_reg:x3; val_offset:18975*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18975*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6326: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ffe000; valaddr_reg:x3; val_offset:18978*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18978*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6327: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fff000; valaddr_reg:x3; val_offset:18981*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18981*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6328: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fff800; valaddr_reg:x3; val_offset:18984*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18984*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6329: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fffc00; valaddr_reg:x3; val_offset:18987*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18987*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6330: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fffe00; valaddr_reg:x3; val_offset:18990*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18990*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6331: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ffff00; valaddr_reg:x3; val_offset:18993*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18993*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6332: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ffff80; valaddr_reg:x3; val_offset:18996*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18996*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6333: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ffffc0; valaddr_reg:x3; val_offset:18999*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 18999*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6334: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ffffe0; valaddr_reg:x3; val_offset:19002*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19002*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6335: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fffff0; valaddr_reg:x3; val_offset:19005*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19005*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6336: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fffff8; valaddr_reg:x3; val_offset:19008*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19008*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6337: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fffffc; valaddr_reg:x3; val_offset:19011*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19011*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6338: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20fffffe; valaddr_reg:x3; val_offset:19014*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19014*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6339: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x41 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x20ffffff; valaddr_reg:x3; val_offset:19017*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19017*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6340: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:19020*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19020*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6341: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:19023*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19023*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6342: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:19026*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19026*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6343: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:19029*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19029*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6344: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:19032*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19032*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6345: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:19035*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19035*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6346: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:19038*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19038*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6347: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:19041*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19041*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6348: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:19044*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19044*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6349: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:19047*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19047*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6350: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:19050*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19050*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6351: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:19053*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19053*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6352: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:19056*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19056*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6353: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:19059*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19059*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6354: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:19062*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19062*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6355: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x65b594 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0ea65d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de5b594; op2val:0x10ea65d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:19065*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19065*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6356: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:19068*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19068*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6357: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:19071*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19071*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6358: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:19074*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19074*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6359: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:19077*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19077*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6360: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:19080*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19080*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6361: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:19083*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19083*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6362: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:19086*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19086*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6363: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:19089*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19089*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6364: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:19092*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19092*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6365: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:19095*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19095*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6366: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:19098*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19098*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6367: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:19101*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19101*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6368: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:19104*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19104*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6369: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:19107*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19107*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6370: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:19110*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19110*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6371: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:19113*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19113*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6372: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6800000; valaddr_reg:x3; val_offset:19116*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19116*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6373: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6800001; valaddr_reg:x3; val_offset:19119*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19119*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6374: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6800003; valaddr_reg:x3; val_offset:19122*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19122*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6375: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6800007; valaddr_reg:x3; val_offset:19125*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19125*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6376: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x680000f; valaddr_reg:x3; val_offset:19128*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19128*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6377: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x680001f; valaddr_reg:x3; val_offset:19131*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19131*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6378: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x680003f; valaddr_reg:x3; val_offset:19134*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19134*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6379: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x680007f; valaddr_reg:x3; val_offset:19137*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19137*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6380: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x68000ff; valaddr_reg:x3; val_offset:19140*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19140*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6381: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x68001ff; valaddr_reg:x3; val_offset:19143*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19143*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6382: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x68003ff; valaddr_reg:x3; val_offset:19146*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19146*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6383: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x68007ff; valaddr_reg:x3; val_offset:19149*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19149*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6384: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6800fff; valaddr_reg:x3; val_offset:19152*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19152*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6385: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6801fff; valaddr_reg:x3; val_offset:19155*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19155*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6386: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6803fff; valaddr_reg:x3; val_offset:19158*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19158*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6387: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6807fff; valaddr_reg:x3; val_offset:19161*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19161*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6388: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x680ffff; valaddr_reg:x3; val_offset:19164*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19164*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6389: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x681ffff; valaddr_reg:x3; val_offset:19167*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19167*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6390: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x683ffff; valaddr_reg:x3; val_offset:19170*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19170*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6391: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x687ffff; valaddr_reg:x3; val_offset:19173*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19173*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6392: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x68fffff; valaddr_reg:x3; val_offset:19176*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19176*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6393: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x69fffff; valaddr_reg:x3; val_offset:19179*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19179*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6394: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6bfffff; valaddr_reg:x3; val_offset:19182*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19182*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6395: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6c00000; valaddr_reg:x3; val_offset:19185*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19185*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6396: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6e00000; valaddr_reg:x3; val_offset:19188*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19188*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6397: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6f00000; valaddr_reg:x3; val_offset:19191*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19191*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6398: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6f80000; valaddr_reg:x3; val_offset:19194*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19194*0 + 3*49*FLEN/8, x4, x1, x2) + +inst_6399: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fc0000; valaddr_reg:x3; val_offset:19197*0 + 3*49*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19197*0 + 3*49*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(266338304,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(267386880,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(267911168,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268173312,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268304384,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268369920,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268402688,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268419072,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268427264,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268431360,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268433408,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268434432,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268434944,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435200,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435328,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435392,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435424,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435440,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435448,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435452,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435454,32,FLEN) +NAN_BOXED(2112132659,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(268435455,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259520,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259521,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259523,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259527,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259535,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259551,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259583,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259647,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545259775,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545260031,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545260543,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545261567,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545263615,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545267711,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545275903,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545292287,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545325055,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545390591,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545521663,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(545783807,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(546308095,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(547356671,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(549453823,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(549453824,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(551550976,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(552599552,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553123840,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553385984,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553517056,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553582592,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553615360,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553631744,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553639936,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553644032,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553646080,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553647104,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553647616,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553647872,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553648000,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553648064,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553648096,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553648112,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553648120,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553648124,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553648126,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(553648127,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2112206228,32,FLEN) +NAN_BOXED(17737309,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051904,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051905,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051907,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051911,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051919,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051935,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109051967,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052031,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052159,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052415,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109052927,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109053951,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109055999,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109060095,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109068287,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109084671,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109117439,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109182975,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109314047,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(109576191,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(110100479,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(111149055,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(113246207,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(113246208,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(115343360,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(116391936,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(116916224,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117178368,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-51.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-51.S new file mode 100644 index 000000000..8cceb9823 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-51.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_6400: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fe0000; valaddr_reg:x3; val_offset:19200*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19200*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6401: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ff0000; valaddr_reg:x3; val_offset:19203*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19203*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6402: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ff8000; valaddr_reg:x3; val_offset:19206*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19206*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6403: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ffc000; valaddr_reg:x3; val_offset:19209*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19209*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6404: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ffe000; valaddr_reg:x3; val_offset:19212*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19212*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6405: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fff000; valaddr_reg:x3; val_offset:19215*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19215*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6406: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fff800; valaddr_reg:x3; val_offset:19218*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19218*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6407: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fffc00; valaddr_reg:x3; val_offset:19221*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19221*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6408: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fffe00; valaddr_reg:x3; val_offset:19224*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19224*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6409: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ffff00; valaddr_reg:x3; val_offset:19227*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19227*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6410: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ffff80; valaddr_reg:x3; val_offset:19230*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19230*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6411: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ffffc0; valaddr_reg:x3; val_offset:19233*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19233*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6412: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ffffe0; valaddr_reg:x3; val_offset:19236*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19236*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6413: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fffff0; valaddr_reg:x3; val_offset:19239*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19239*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6414: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fffff8; valaddr_reg:x3; val_offset:19242*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19242*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6415: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fffffc; valaddr_reg:x3; val_offset:19245*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19245*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6416: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6fffffe; valaddr_reg:x3; val_offset:19248*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19248*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6417: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688038 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88038; op2val:0x0; +op3val:0x6ffffff; valaddr_reg:x3; val_offset:19251*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19251*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6418: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x800001; valaddr_reg:x3; val_offset:19254*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19254*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6419: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x800003; valaddr_reg:x3; val_offset:19257*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19257*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6420: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x800007; valaddr_reg:x3; val_offset:19260*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19260*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6421: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x999999; valaddr_reg:x3; val_offset:19263*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19263*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6422: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xa49249; valaddr_reg:x3; val_offset:19266*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19266*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6423: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xb33333; valaddr_reg:x3; val_offset:19269*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19269*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6424: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xb6db6d; valaddr_reg:x3; val_offset:19272*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19272*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6425: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xbbbbbb; valaddr_reg:x3; val_offset:19275*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19275*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6426: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xc44444; valaddr_reg:x3; val_offset:19278*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19278*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6427: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xcccccc; valaddr_reg:x3; val_offset:19281*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19281*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6428: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xdb6db6; valaddr_reg:x3; val_offset:19284*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19284*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6429: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xe66666; valaddr_reg:x3; val_offset:19287*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19287*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6430: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xedb6db; valaddr_reg:x3; val_offset:19290*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19290*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6431: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xfffff8; valaddr_reg:x3; val_offset:19293*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19293*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6432: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xfffffc; valaddr_reg:x3; val_offset:19296*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19296*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6433: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0xfffffe; valaddr_reg:x3; val_offset:19299*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19299*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6434: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3000000; valaddr_reg:x3; val_offset:19302*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19302*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6435: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3000001; valaddr_reg:x3; val_offset:19305*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19305*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6436: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3000003; valaddr_reg:x3; val_offset:19308*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19308*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6437: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3000007; valaddr_reg:x3; val_offset:19311*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19311*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6438: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x300000f; valaddr_reg:x3; val_offset:19314*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19314*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6439: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x300001f; valaddr_reg:x3; val_offset:19317*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19317*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6440: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x300003f; valaddr_reg:x3; val_offset:19320*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19320*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6441: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x300007f; valaddr_reg:x3; val_offset:19323*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19323*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6442: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x30000ff; valaddr_reg:x3; val_offset:19326*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19326*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6443: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x30001ff; valaddr_reg:x3; val_offset:19329*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19329*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6444: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x30003ff; valaddr_reg:x3; val_offset:19332*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19332*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6445: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x30007ff; valaddr_reg:x3; val_offset:19335*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19335*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6446: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3000fff; valaddr_reg:x3; val_offset:19338*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19338*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6447: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3001fff; valaddr_reg:x3; val_offset:19341*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19341*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6448: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3003fff; valaddr_reg:x3; val_offset:19344*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19344*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6449: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3007fff; valaddr_reg:x3; val_offset:19347*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19347*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6450: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x300ffff; valaddr_reg:x3; val_offset:19350*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19350*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6451: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x301ffff; valaddr_reg:x3; val_offset:19353*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19353*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6452: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x303ffff; valaddr_reg:x3; val_offset:19356*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19356*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6453: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x307ffff; valaddr_reg:x3; val_offset:19359*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19359*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6454: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x30fffff; valaddr_reg:x3; val_offset:19362*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19362*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6455: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x31fffff; valaddr_reg:x3; val_offset:19365*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19365*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6456: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x33fffff; valaddr_reg:x3; val_offset:19368*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19368*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6457: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3400000; valaddr_reg:x3; val_offset:19371*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19371*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6458: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3600000; valaddr_reg:x3; val_offset:19374*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19374*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6459: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3700000; valaddr_reg:x3; val_offset:19377*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19377*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6460: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x3780000; valaddr_reg:x3; val_offset:19380*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19380*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6461: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37c0000; valaddr_reg:x3; val_offset:19383*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19383*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6462: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37e0000; valaddr_reg:x3; val_offset:19386*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19386*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6463: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37f0000; valaddr_reg:x3; val_offset:19389*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19389*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6464: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37f8000; valaddr_reg:x3; val_offset:19392*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19392*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6465: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37fc000; valaddr_reg:x3; val_offset:19395*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19395*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6466: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37fe000; valaddr_reg:x3; val_offset:19398*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19398*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6467: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37ff000; valaddr_reg:x3; val_offset:19401*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19401*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6468: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37ff800; valaddr_reg:x3; val_offset:19404*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19404*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6469: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37ffc00; valaddr_reg:x3; val_offset:19407*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19407*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6470: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37ffe00; valaddr_reg:x3; val_offset:19410*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19410*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6471: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37fff00; valaddr_reg:x3; val_offset:19413*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19413*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6472: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37fff80; valaddr_reg:x3; val_offset:19416*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19416*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6473: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37fffc0; valaddr_reg:x3; val_offset:19419*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19419*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6474: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37fffe0; valaddr_reg:x3; val_offset:19422*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19422*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6475: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37ffff0; valaddr_reg:x3; val_offset:19425*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19425*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6476: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37ffff8; valaddr_reg:x3; val_offset:19428*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19428*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6477: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37ffffc; valaddr_reg:x3; val_offset:19431*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19431*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6478: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37ffffe; valaddr_reg:x3; val_offset:19434*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19434*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6479: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x688296 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7de88296; op2val:0x0; +op3val:0x37fffff; valaddr_reg:x3; val_offset:19437*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19437*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6480: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3f800001; valaddr_reg:x3; val_offset:19440*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19440*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6481: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3f800003; valaddr_reg:x3; val_offset:19443*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19443*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6482: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3f800007; valaddr_reg:x3; val_offset:19446*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19446*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6483: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3f999999; valaddr_reg:x3; val_offset:19449*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19449*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6484: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:19452*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19452*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6485: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:19455*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19455*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6486: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:19458*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19458*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6487: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:19461*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19461*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6488: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:19464*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19464*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6489: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:19467*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19467*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6490: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:19470*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19470*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6491: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:19473*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19473*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6492: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:19476*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19476*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6493: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:19479*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19479*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6494: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:19482*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19482*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6495: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:19485*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19485*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6496: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d800000; valaddr_reg:x3; val_offset:19488*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19488*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6497: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d800001; valaddr_reg:x3; val_offset:19491*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19491*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6498: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d800003; valaddr_reg:x3; val_offset:19494*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19494*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6499: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d800007; valaddr_reg:x3; val_offset:19497*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19497*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6500: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d80000f; valaddr_reg:x3; val_offset:19500*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19500*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6501: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d80001f; valaddr_reg:x3; val_offset:19503*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19503*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6502: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d80003f; valaddr_reg:x3; val_offset:19506*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19506*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6503: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d80007f; valaddr_reg:x3; val_offset:19509*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19509*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6504: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d8000ff; valaddr_reg:x3; val_offset:19512*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19512*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6505: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d8001ff; valaddr_reg:x3; val_offset:19515*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19515*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6506: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d8003ff; valaddr_reg:x3; val_offset:19518*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19518*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6507: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d8007ff; valaddr_reg:x3; val_offset:19521*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19521*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6508: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d800fff; valaddr_reg:x3; val_offset:19524*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19524*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6509: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d801fff; valaddr_reg:x3; val_offset:19527*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19527*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6510: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d803fff; valaddr_reg:x3; val_offset:19530*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19530*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6511: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d807fff; valaddr_reg:x3; val_offset:19533*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19533*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6512: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d80ffff; valaddr_reg:x3; val_offset:19536*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19536*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6513: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d81ffff; valaddr_reg:x3; val_offset:19539*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19539*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6514: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d83ffff; valaddr_reg:x3; val_offset:19542*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19542*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6515: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d87ffff; valaddr_reg:x3; val_offset:19545*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19545*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6516: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d8fffff; valaddr_reg:x3; val_offset:19548*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19548*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6517: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4d9fffff; valaddr_reg:x3; val_offset:19551*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19551*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6518: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dbfffff; valaddr_reg:x3; val_offset:19554*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19554*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6519: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dc00000; valaddr_reg:x3; val_offset:19557*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19557*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6520: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4de00000; valaddr_reg:x3; val_offset:19560*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19560*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6521: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4df00000; valaddr_reg:x3; val_offset:19563*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19563*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6522: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4df80000; valaddr_reg:x3; val_offset:19566*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19566*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6523: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfc0000; valaddr_reg:x3; val_offset:19569*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19569*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6524: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfe0000; valaddr_reg:x3; val_offset:19572*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19572*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6525: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dff0000; valaddr_reg:x3; val_offset:19575*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19575*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6526: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dff8000; valaddr_reg:x3; val_offset:19578*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19578*0 + 3*50*FLEN/8, x4, x1, x2) + +inst_6527: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dffc000; valaddr_reg:x3; val_offset:19581*0 + 3*50*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19581*0 + 3*50*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117309440,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117374976,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117407744,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117424128,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117432320,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117436416,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117438464,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117439488,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440000,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440256,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440384,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440448,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440480,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440496,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440504,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440508,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440510,32,FLEN) +NAN_BOXED(2112389176,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(117440511,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388609,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388611,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388615,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10066329,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(10785353,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11744051,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(11983725,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12303291,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(12862532,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(13421772,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(14380470,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15099494,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15578843,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777208,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777212,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16777214,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331648,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331649,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331651,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331655,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331663,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331679,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331711,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331775,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331903,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50332159,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50332671,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50333695,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50335743,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50339839,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50348031,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50364415,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50397183,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50462719,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50593791,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50855935,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(51380223,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(52428799,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(54525951,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(54525952,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(56623104,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(57671680,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58195968,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58458112,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58589184,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58654720,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58687488,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58703872,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58712064,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58716160,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58718208,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58719232,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58719744,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720000,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720128,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720192,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720224,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720240,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720248,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720252,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720254,32,FLEN) +NAN_BOXED(2112389782,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720255,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234240,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234241,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234243,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234247,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234255,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234271,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234303,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234367,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234495,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300234751,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300235263,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300236287,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300238335,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300242431,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300250623,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300267007,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300299775,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300365311,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300496383,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1300758527,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1301282815,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1302331391,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1304428543,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1304428544,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1306525696,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1307574272,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308098560,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308360704,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308491776,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308557312,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308590080,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308606464,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-52.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-52.S new file mode 100644 index 000000000..6019eb63a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-52.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_6528: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dffe000; valaddr_reg:x3; val_offset:19584*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19584*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6529: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfff000; valaddr_reg:x3; val_offset:19587*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19587*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6530: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfff800; valaddr_reg:x3; val_offset:19590*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19590*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6531: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfffc00; valaddr_reg:x3; val_offset:19593*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19593*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6532: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfffe00; valaddr_reg:x3; val_offset:19596*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19596*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6533: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dffff00; valaddr_reg:x3; val_offset:19599*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19599*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6534: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dffff80; valaddr_reg:x3; val_offset:19602*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19602*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6535: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dffffc0; valaddr_reg:x3; val_offset:19605*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19605*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6536: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dffffe0; valaddr_reg:x3; val_offset:19608*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19608*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6537: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfffff0; valaddr_reg:x3; val_offset:19611*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19611*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6538: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfffff8; valaddr_reg:x3; val_offset:19614*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19614*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6539: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfffffc; valaddr_reg:x3; val_offset:19617*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19617*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6540: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dfffffe; valaddr_reg:x3; val_offset:19620*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19620*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6541: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ba45a and fs2 == 0 and fe2 == 0x02 and fm2 == 0x0b0ef3 and fs3 == 0 and fe3 == 0x9b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deba45a; op2val:0x10b0ef3; +op3val:0x4dffffff; valaddr_reg:x3; val_offset:19623*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19623*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6542: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbf800001; valaddr_reg:x3; val_offset:19626*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19626*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6543: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbf800003; valaddr_reg:x3; val_offset:19629*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19629*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6544: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbf800007; valaddr_reg:x3; val_offset:19632*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19632*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6545: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbf999999; valaddr_reg:x3; val_offset:19635*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19635*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6546: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:19638*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19638*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6547: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:19641*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19641*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6548: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:19644*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19644*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6549: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:19647*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19647*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6550: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:19650*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19650*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6551: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:19653*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19653*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6552: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:19656*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19656*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6553: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:19659*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19659*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6554: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:19662*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19662*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6555: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:19665*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19665*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6556: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:19668*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19668*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6557: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:19671*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19671*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6558: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2800000; valaddr_reg:x3; val_offset:19674*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19674*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6559: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2800001; valaddr_reg:x3; val_offset:19677*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19677*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6560: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2800003; valaddr_reg:x3; val_offset:19680*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19680*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6561: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2800007; valaddr_reg:x3; val_offset:19683*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19683*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6562: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc280000f; valaddr_reg:x3; val_offset:19686*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19686*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6563: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc280001f; valaddr_reg:x3; val_offset:19689*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19689*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6564: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc280003f; valaddr_reg:x3; val_offset:19692*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19692*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6565: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc280007f; valaddr_reg:x3; val_offset:19695*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19695*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6566: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc28000ff; valaddr_reg:x3; val_offset:19698*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19698*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6567: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc28001ff; valaddr_reg:x3; val_offset:19701*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19701*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6568: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc28003ff; valaddr_reg:x3; val_offset:19704*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19704*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6569: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc28007ff; valaddr_reg:x3; val_offset:19707*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19707*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6570: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2800fff; valaddr_reg:x3; val_offset:19710*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19710*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6571: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2801fff; valaddr_reg:x3; val_offset:19713*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19713*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6572: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2803fff; valaddr_reg:x3; val_offset:19716*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19716*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6573: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2807fff; valaddr_reg:x3; val_offset:19719*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19719*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6574: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc280ffff; valaddr_reg:x3; val_offset:19722*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19722*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6575: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc281ffff; valaddr_reg:x3; val_offset:19725*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19725*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6576: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc283ffff; valaddr_reg:x3; val_offset:19728*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19728*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6577: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc287ffff; valaddr_reg:x3; val_offset:19731*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19731*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6578: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc28fffff; valaddr_reg:x3; val_offset:19734*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19734*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6579: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc29fffff; valaddr_reg:x3; val_offset:19737*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19737*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6580: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2bfffff; valaddr_reg:x3; val_offset:19740*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19740*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6581: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2c00000; valaddr_reg:x3; val_offset:19743*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19743*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6582: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2e00000; valaddr_reg:x3; val_offset:19746*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19746*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6583: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2f00000; valaddr_reg:x3; val_offset:19749*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19749*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6584: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2f80000; valaddr_reg:x3; val_offset:19752*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19752*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6585: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fc0000; valaddr_reg:x3; val_offset:19755*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19755*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6586: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fe0000; valaddr_reg:x3; val_offset:19758*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19758*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6587: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ff0000; valaddr_reg:x3; val_offset:19761*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19761*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6588: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ff8000; valaddr_reg:x3; val_offset:19764*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19764*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6589: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ffc000; valaddr_reg:x3; val_offset:19767*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19767*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6590: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ffe000; valaddr_reg:x3; val_offset:19770*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19770*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6591: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fff000; valaddr_reg:x3; val_offset:19773*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19773*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6592: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fff800; valaddr_reg:x3; val_offset:19776*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19776*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6593: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fffc00; valaddr_reg:x3; val_offset:19779*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19779*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6594: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fffe00; valaddr_reg:x3; val_offset:19782*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19782*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6595: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ffff00; valaddr_reg:x3; val_offset:19785*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19785*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6596: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ffff80; valaddr_reg:x3; val_offset:19788*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19788*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6597: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ffffc0; valaddr_reg:x3; val_offset:19791*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19791*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6598: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ffffe0; valaddr_reg:x3; val_offset:19794*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19794*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6599: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fffff0; valaddr_reg:x3; val_offset:19797*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19797*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6600: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fffff8; valaddr_reg:x3; val_offset:19800*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19800*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6601: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fffffc; valaddr_reg:x3; val_offset:19803*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19803*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6602: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2fffffe; valaddr_reg:x3; val_offset:19806*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19806*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6603: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6d3854 and fs2 == 1 and fe2 == 0x02 and fm2 == 0x0a2223 and fs3 == 1 and fe3 == 0x85 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7ded3854; op2val:0x810a2223; +op3val:0xc2ffffff; valaddr_reg:x3; val_offset:19809*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19809*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6604: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee000000; valaddr_reg:x3; val_offset:19812*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19812*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6605: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee000001; valaddr_reg:x3; val_offset:19815*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19815*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6606: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee000003; valaddr_reg:x3; val_offset:19818*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19818*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6607: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee000007; valaddr_reg:x3; val_offset:19821*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19821*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6608: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee00000f; valaddr_reg:x3; val_offset:19824*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19824*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6609: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee00001f; valaddr_reg:x3; val_offset:19827*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19827*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6610: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee00003f; valaddr_reg:x3; val_offset:19830*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19830*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6611: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee00007f; valaddr_reg:x3; val_offset:19833*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19833*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6612: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee0000ff; valaddr_reg:x3; val_offset:19836*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19836*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6613: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee0001ff; valaddr_reg:x3; val_offset:19839*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19839*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6614: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee0003ff; valaddr_reg:x3; val_offset:19842*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19842*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6615: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee0007ff; valaddr_reg:x3; val_offset:19845*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19845*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6616: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee000fff; valaddr_reg:x3; val_offset:19848*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19848*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6617: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee001fff; valaddr_reg:x3; val_offset:19851*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19851*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6618: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee003fff; valaddr_reg:x3; val_offset:19854*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19854*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6619: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee007fff; valaddr_reg:x3; val_offset:19857*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19857*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6620: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee00ffff; valaddr_reg:x3; val_offset:19860*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19860*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6621: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee01ffff; valaddr_reg:x3; val_offset:19863*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19863*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6622: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee03ffff; valaddr_reg:x3; val_offset:19866*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19866*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6623: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee07ffff; valaddr_reg:x3; val_offset:19869*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19869*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6624: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee0fffff; valaddr_reg:x3; val_offset:19872*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19872*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6625: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee1fffff; valaddr_reg:x3; val_offset:19875*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19875*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6626: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee3fffff; valaddr_reg:x3; val_offset:19878*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19878*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6627: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee400000; valaddr_reg:x3; val_offset:19881*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19881*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6628: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee600000; valaddr_reg:x3; val_offset:19884*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19884*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6629: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee700000; valaddr_reg:x3; val_offset:19887*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19887*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6630: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee780000; valaddr_reg:x3; val_offset:19890*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19890*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6631: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7c0000; valaddr_reg:x3; val_offset:19893*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19893*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6632: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7e0000; valaddr_reg:x3; val_offset:19896*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19896*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6633: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7f0000; valaddr_reg:x3; val_offset:19899*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19899*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6634: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7f8000; valaddr_reg:x3; val_offset:19902*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19902*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6635: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7fc000; valaddr_reg:x3; val_offset:19905*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19905*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6636: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7fe000; valaddr_reg:x3; val_offset:19908*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19908*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6637: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7ff000; valaddr_reg:x3; val_offset:19911*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19911*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6638: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7ff800; valaddr_reg:x3; val_offset:19914*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19914*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6639: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7ffc00; valaddr_reg:x3; val_offset:19917*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19917*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6640: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7ffe00; valaddr_reg:x3; val_offset:19920*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19920*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6641: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7fff00; valaddr_reg:x3; val_offset:19923*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19923*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6642: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7fff80; valaddr_reg:x3; val_offset:19926*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19926*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6643: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7fffc0; valaddr_reg:x3; val_offset:19929*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19929*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6644: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7fffe0; valaddr_reg:x3; val_offset:19932*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19932*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6645: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7ffff0; valaddr_reg:x3; val_offset:19935*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19935*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6646: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7ffff8; valaddr_reg:x3; val_offset:19938*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19938*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6647: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7ffffc; valaddr_reg:x3; val_offset:19941*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19941*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6648: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7ffffe; valaddr_reg:x3; val_offset:19944*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19944*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6649: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xdc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xee7fffff; valaddr_reg:x3; val_offset:19947*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19947*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6650: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff000001; valaddr_reg:x3; val_offset:19950*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19950*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6651: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff000003; valaddr_reg:x3; val_offset:19953*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19953*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6652: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff000007; valaddr_reg:x3; val_offset:19956*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19956*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6653: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff199999; valaddr_reg:x3; val_offset:19959*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19959*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6654: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff249249; valaddr_reg:x3; val_offset:19962*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19962*0 + 3*51*FLEN/8, x4, x1, x2) + +inst_6655: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff333333; valaddr_reg:x3; val_offset:19965*0 + 3*51*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19965*0 + 3*51*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308614656,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308618752,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308620800,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308621824,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622336,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622592,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622720,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622784,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622816,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622832,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622840,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622844,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622846,32,FLEN) +NAN_BOXED(2112595034,32,FLEN) +NAN_BOXED(17501939,32,FLEN) +NAN_BOXED(1308622847,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168512,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168513,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168515,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168519,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168527,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168543,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168575,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168639,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263168767,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263169023,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263169535,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263170559,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263172607,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263176703,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263184895,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263201279,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263234047,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263299583,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263430655,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3263692799,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3264217087,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3265265663,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3267362815,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3267362816,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3269459968,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3270508544,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271032832,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271294976,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271426048,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271491584,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271524352,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271540736,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271548928,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271553024,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271555072,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271556096,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271556608,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271556864,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271556992,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271557056,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271557088,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271557104,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271557112,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271557116,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271557118,32,FLEN) +NAN_BOXED(2112698452,32,FLEN) +NAN_BOXED(2164924963,32,FLEN) +NAN_BOXED(3271557119,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977408,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977409,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977411,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977415,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977423,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977439,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977471,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977535,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977663,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992977919,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992978431,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992979455,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992981503,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992985599,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3992993791,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3993010175,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3993042943,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3993108479,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3993239551,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3993501695,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3994025983,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3995074559,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3997171711,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3997171712,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(3999268864,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4000317440,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4000841728,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001103872,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001234944,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001300480,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001333248,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001349632,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001357824,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001361920,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001363968,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001364992,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001365504,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001365760,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001365888,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001365952,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001365984,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001366000,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001366008,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001366012,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001366014,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4001366015,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-53.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-53.S new file mode 100644 index 000000000..78631e085 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-53.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_6656: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:19968*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19968*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6657: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:19971*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19971*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6658: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff444444; valaddr_reg:x3; val_offset:19974*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19974*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6659: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:19977*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19977*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6660: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:19980*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19980*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6661: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff666666; valaddr_reg:x3; val_offset:19983*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19983*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6662: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:19986*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19986*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6663: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:19989*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19989*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6664: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:19992*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19992*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6665: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x6ff4a3 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x088eff and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7deff4a3; op2val:0xc1088eff; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:19995*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19995*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6666: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3f800001; valaddr_reg:x3; val_offset:19998*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 19998*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6667: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3f800003; valaddr_reg:x3; val_offset:20001*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20001*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6668: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3f800007; valaddr_reg:x3; val_offset:20004*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20004*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6669: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3f999999; valaddr_reg:x3; val_offset:20007*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20007*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6670: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:20010*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20010*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6671: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:20013*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20013*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6672: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:20016*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20016*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6673: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:20019*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20019*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6674: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:20022*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20022*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6675: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:20025*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20025*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6676: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:20028*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20028*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6677: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:20031*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20031*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6678: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:20034*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20034*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6679: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:20037*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20037*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6680: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:20040*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20040*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6681: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:20043*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20043*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6682: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46800000; valaddr_reg:x3; val_offset:20046*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20046*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6683: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46800001; valaddr_reg:x3; val_offset:20049*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20049*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6684: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46800003; valaddr_reg:x3; val_offset:20052*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20052*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6685: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46800007; valaddr_reg:x3; val_offset:20055*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20055*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6686: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x4680000f; valaddr_reg:x3; val_offset:20058*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20058*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6687: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x4680001f; valaddr_reg:x3; val_offset:20061*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20061*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6688: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x4680003f; valaddr_reg:x3; val_offset:20064*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20064*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6689: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x4680007f; valaddr_reg:x3; val_offset:20067*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20067*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6690: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x468000ff; valaddr_reg:x3; val_offset:20070*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20070*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6691: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x468001ff; valaddr_reg:x3; val_offset:20073*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20073*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6692: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x468003ff; valaddr_reg:x3; val_offset:20076*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20076*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6693: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x468007ff; valaddr_reg:x3; val_offset:20079*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20079*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6694: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46800fff; valaddr_reg:x3; val_offset:20082*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20082*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6695: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46801fff; valaddr_reg:x3; val_offset:20085*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20085*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6696: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46803fff; valaddr_reg:x3; val_offset:20088*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20088*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6697: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46807fff; valaddr_reg:x3; val_offset:20091*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20091*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6698: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x4680ffff; valaddr_reg:x3; val_offset:20094*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20094*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6699: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x4681ffff; valaddr_reg:x3; val_offset:20097*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20097*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6700: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x4683ffff; valaddr_reg:x3; val_offset:20100*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20100*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6701: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x4687ffff; valaddr_reg:x3; val_offset:20103*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20103*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6702: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x468fffff; valaddr_reg:x3; val_offset:20106*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20106*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6703: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x469fffff; valaddr_reg:x3; val_offset:20109*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20109*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6704: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46bfffff; valaddr_reg:x3; val_offset:20112*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20112*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6705: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46c00000; valaddr_reg:x3; val_offset:20115*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20115*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6706: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46e00000; valaddr_reg:x3; val_offset:20118*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20118*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6707: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46f00000; valaddr_reg:x3; val_offset:20121*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20121*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6708: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46f80000; valaddr_reg:x3; val_offset:20124*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20124*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6709: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fc0000; valaddr_reg:x3; val_offset:20127*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20127*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6710: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fe0000; valaddr_reg:x3; val_offset:20130*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20130*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6711: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ff0000; valaddr_reg:x3; val_offset:20133*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20133*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6712: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ff8000; valaddr_reg:x3; val_offset:20136*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20136*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6713: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ffc000; valaddr_reg:x3; val_offset:20139*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20139*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6714: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ffe000; valaddr_reg:x3; val_offset:20142*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20142*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6715: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fff000; valaddr_reg:x3; val_offset:20145*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20145*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6716: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fff800; valaddr_reg:x3; val_offset:20148*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20148*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6717: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fffc00; valaddr_reg:x3; val_offset:20151*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20151*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6718: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fffe00; valaddr_reg:x3; val_offset:20154*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20154*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6719: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ffff00; valaddr_reg:x3; val_offset:20157*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20157*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6720: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ffff80; valaddr_reg:x3; val_offset:20160*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20160*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6721: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ffffc0; valaddr_reg:x3; val_offset:20163*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20163*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6722: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ffffe0; valaddr_reg:x3; val_offset:20166*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20166*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6723: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fffff0; valaddr_reg:x3; val_offset:20169*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20169*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6724: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fffff8; valaddr_reg:x3; val_offset:20172*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20172*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6725: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fffffc; valaddr_reg:x3; val_offset:20175*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20175*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6726: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46fffffe; valaddr_reg:x3; val_offset:20178*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20178*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6727: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x730229 and fs2 == 0 and fe2 == 0x02 and fm2 == 0x06d7d2 and fs3 == 0 and fe3 == 0x8d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df30229; op2val:0x106d7d2; +op3val:0x46ffffff; valaddr_reg:x3; val_offset:20181*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20181*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6728: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5800000; valaddr_reg:x3; val_offset:20184*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20184*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6729: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5800001; valaddr_reg:x3; val_offset:20187*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20187*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6730: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5800003; valaddr_reg:x3; val_offset:20190*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20190*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6731: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5800007; valaddr_reg:x3; val_offset:20193*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20193*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6732: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa580000f; valaddr_reg:x3; val_offset:20196*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20196*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6733: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa580001f; valaddr_reg:x3; val_offset:20199*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20199*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6734: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa580003f; valaddr_reg:x3; val_offset:20202*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20202*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6735: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa580007f; valaddr_reg:x3; val_offset:20205*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20205*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6736: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa58000ff; valaddr_reg:x3; val_offset:20208*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20208*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6737: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa58001ff; valaddr_reg:x3; val_offset:20211*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20211*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6738: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa58003ff; valaddr_reg:x3; val_offset:20214*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20214*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6739: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa58007ff; valaddr_reg:x3; val_offset:20217*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20217*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6740: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5800fff; valaddr_reg:x3; val_offset:20220*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20220*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6741: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5801fff; valaddr_reg:x3; val_offset:20223*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20223*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6742: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5803fff; valaddr_reg:x3; val_offset:20226*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20226*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6743: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5807fff; valaddr_reg:x3; val_offset:20229*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20229*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6744: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa580ffff; valaddr_reg:x3; val_offset:20232*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20232*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6745: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa581ffff; valaddr_reg:x3; val_offset:20235*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20235*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6746: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa583ffff; valaddr_reg:x3; val_offset:20238*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20238*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6747: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa587ffff; valaddr_reg:x3; val_offset:20241*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20241*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6748: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa58fffff; valaddr_reg:x3; val_offset:20244*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20244*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6749: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa59fffff; valaddr_reg:x3; val_offset:20247*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20247*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6750: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5bfffff; valaddr_reg:x3; val_offset:20250*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20250*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6751: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5c00000; valaddr_reg:x3; val_offset:20253*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20253*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6752: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5e00000; valaddr_reg:x3; val_offset:20256*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20256*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6753: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5f00000; valaddr_reg:x3; val_offset:20259*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20259*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6754: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5f80000; valaddr_reg:x3; val_offset:20262*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20262*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6755: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fc0000; valaddr_reg:x3; val_offset:20265*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20265*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6756: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fe0000; valaddr_reg:x3; val_offset:20268*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20268*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6757: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ff0000; valaddr_reg:x3; val_offset:20271*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20271*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6758: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ff8000; valaddr_reg:x3; val_offset:20274*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20274*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6759: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ffc000; valaddr_reg:x3; val_offset:20277*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20277*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6760: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ffe000; valaddr_reg:x3; val_offset:20280*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20280*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6761: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fff000; valaddr_reg:x3; val_offset:20283*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20283*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6762: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fff800; valaddr_reg:x3; val_offset:20286*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20286*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6763: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fffc00; valaddr_reg:x3; val_offset:20289*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20289*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6764: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fffe00; valaddr_reg:x3; val_offset:20292*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20292*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6765: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ffff00; valaddr_reg:x3; val_offset:20295*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20295*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6766: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ffff80; valaddr_reg:x3; val_offset:20298*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20298*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6767: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ffffc0; valaddr_reg:x3; val_offset:20301*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20301*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6768: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ffffe0; valaddr_reg:x3; val_offset:20304*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20304*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6769: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fffff0; valaddr_reg:x3; val_offset:20307*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20307*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6770: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fffff8; valaddr_reg:x3; val_offset:20310*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20310*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6771: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fffffc; valaddr_reg:x3; val_offset:20313*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20313*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6772: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5fffffe; valaddr_reg:x3; val_offset:20316*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20316*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6773: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x4b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xa5ffffff; valaddr_reg:x3; val_offset:20319*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20319*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6774: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbf800001; valaddr_reg:x3; val_offset:20322*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20322*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6775: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbf800003; valaddr_reg:x3; val_offset:20325*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20325*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6776: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbf800007; valaddr_reg:x3; val_offset:20328*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20328*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6777: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbf999999; valaddr_reg:x3; val_offset:20331*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20331*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6778: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:20334*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20334*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6779: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:20337*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20337*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6780: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:20340*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20340*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6781: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:20343*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20343*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6782: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:20346*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20346*0 + 3*52*FLEN/8, x4, x1, x2) + +inst_6783: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:20349*0 + 3*52*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20349*0 + 3*52*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2112877731,32,FLEN) +NAN_BOXED(3238563583,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793728,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793729,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793731,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793735,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793743,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793759,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793791,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793855,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182793983,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182794239,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182794751,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182795775,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182797823,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182801919,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182810111,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182826495,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182859263,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1182924799,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1183055871,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1183318015,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1183842303,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1184890879,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1186988031,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1186988032,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1189085184,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1190133760,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1190658048,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1190920192,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191051264,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191116800,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191149568,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191165952,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191174144,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191178240,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191180288,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191181312,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191181824,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182080,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182208,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182272,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182304,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182320,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182328,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182332,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182334,32,FLEN) +NAN_BOXED(2113077801,32,FLEN) +NAN_BOXED(17225682,32,FLEN) +NAN_BOXED(1191182335,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629248,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629249,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629251,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629255,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629263,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629279,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629311,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629375,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629503,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776629759,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776630271,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776631295,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776633343,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776637439,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776645631,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776662015,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776694783,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776760319,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2776891391,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2777153535,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2777677823,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2778726399,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2780823551,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2780823552,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2782920704,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2783969280,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2784493568,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2784755712,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2784886784,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2784952320,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2784985088,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785001472,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785009664,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785013760,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785015808,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785016832,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017344,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017600,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017728,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017792,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017824,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017840,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017848,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017852,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017854,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(2785017855,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-54.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-54.S new file mode 100644 index 000000000..20ef511a2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-54.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_6784: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:20352*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20352*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6785: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:20355*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20355*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6786: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:20358*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20358*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6787: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:20361*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20361*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6788: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:20364*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20364*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6789: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x75e1ed and fs2 == 1 and fe2 == 0x02 and fm2 == 0x054452 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df5e1ed; op2val:0x81054452; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:20367*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20367*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6790: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:20370*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20370*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6791: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:20373*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20373*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6792: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:20376*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20376*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6793: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:20379*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20379*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6794: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:20382*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20382*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6795: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:20385*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20385*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6796: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:20388*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20388*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6797: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:20391*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20391*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6798: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:20394*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20394*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6799: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:20397*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20397*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6800: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:20400*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20400*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6801: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:20403*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20403*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6802: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:20406*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20406*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6803: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:20409*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20409*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6804: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:20412*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20412*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6805: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:20415*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20415*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6806: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf000000; valaddr_reg:x3; val_offset:20418*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20418*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6807: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf000001; valaddr_reg:x3; val_offset:20421*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20421*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6808: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf000003; valaddr_reg:x3; val_offset:20424*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20424*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6809: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf000007; valaddr_reg:x3; val_offset:20427*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20427*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6810: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf00000f; valaddr_reg:x3; val_offset:20430*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20430*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6811: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf00001f; valaddr_reg:x3; val_offset:20433*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20433*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6812: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf00003f; valaddr_reg:x3; val_offset:20436*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20436*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6813: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf00007f; valaddr_reg:x3; val_offset:20439*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20439*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6814: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf0000ff; valaddr_reg:x3; val_offset:20442*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20442*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6815: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf0001ff; valaddr_reg:x3; val_offset:20445*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20445*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6816: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf0003ff; valaddr_reg:x3; val_offset:20448*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20448*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6817: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf0007ff; valaddr_reg:x3; val_offset:20451*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20451*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6818: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf000fff; valaddr_reg:x3; val_offset:20454*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20454*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6819: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf001fff; valaddr_reg:x3; val_offset:20457*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20457*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6820: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf003fff; valaddr_reg:x3; val_offset:20460*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20460*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6821: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf007fff; valaddr_reg:x3; val_offset:20463*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20463*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6822: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf00ffff; valaddr_reg:x3; val_offset:20466*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20466*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6823: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf01ffff; valaddr_reg:x3; val_offset:20469*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20469*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6824: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf03ffff; valaddr_reg:x3; val_offset:20472*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20472*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6825: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf07ffff; valaddr_reg:x3; val_offset:20475*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20475*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6826: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf0fffff; valaddr_reg:x3; val_offset:20478*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20478*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6827: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf1fffff; valaddr_reg:x3; val_offset:20481*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20481*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6828: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf3fffff; valaddr_reg:x3; val_offset:20484*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20484*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6829: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf400000; valaddr_reg:x3; val_offset:20487*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20487*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6830: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf600000; valaddr_reg:x3; val_offset:20490*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20490*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6831: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf700000; valaddr_reg:x3; val_offset:20493*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20493*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6832: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf780000; valaddr_reg:x3; val_offset:20496*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20496*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6833: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7c0000; valaddr_reg:x3; val_offset:20499*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20499*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6834: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7e0000; valaddr_reg:x3; val_offset:20502*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20502*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6835: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7f0000; valaddr_reg:x3; val_offset:20505*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20505*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6836: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7f8000; valaddr_reg:x3; val_offset:20508*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20508*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6837: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7fc000; valaddr_reg:x3; val_offset:20511*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20511*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6838: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7fe000; valaddr_reg:x3; val_offset:20514*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20514*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6839: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7ff000; valaddr_reg:x3; val_offset:20517*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20517*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6840: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7ff800; valaddr_reg:x3; val_offset:20520*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20520*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6841: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7ffc00; valaddr_reg:x3; val_offset:20523*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20523*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6842: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7ffe00; valaddr_reg:x3; val_offset:20526*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20526*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6843: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7fff00; valaddr_reg:x3; val_offset:20529*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20529*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6844: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7fff80; valaddr_reg:x3; val_offset:20532*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20532*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6845: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7fffc0; valaddr_reg:x3; val_offset:20535*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20535*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6846: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7fffe0; valaddr_reg:x3; val_offset:20538*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20538*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6847: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7ffff0; valaddr_reg:x3; val_offset:20541*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20541*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6848: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7ffff8; valaddr_reg:x3; val_offset:20544*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20544*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6849: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7ffffc; valaddr_reg:x3; val_offset:20547*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20547*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6850: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7ffffe; valaddr_reg:x3; val_offset:20550*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20550*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6851: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x76d1e6 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df6d1e6; op2val:0x0; +op3val:0xf7fffff; valaddr_reg:x3; val_offset:20553*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20553*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6852: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3f800001; valaddr_reg:x3; val_offset:20556*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20556*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6853: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3f800003; valaddr_reg:x3; val_offset:20559*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20559*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6854: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3f800007; valaddr_reg:x3; val_offset:20562*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20562*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6855: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3f999999; valaddr_reg:x3; val_offset:20565*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20565*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6856: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:20568*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20568*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6857: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:20571*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20571*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6858: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:20574*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20574*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6859: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:20577*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20577*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6860: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:20580*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20580*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6861: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:20583*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20583*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6862: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:20586*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20586*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6863: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:20589*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20589*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6864: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:20592*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20592*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6865: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:20595*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20595*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6866: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:20598*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20598*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6867: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:20601*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20601*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6868: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47000000; valaddr_reg:x3; val_offset:20604*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20604*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6869: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47000001; valaddr_reg:x3; val_offset:20607*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20607*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6870: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47000003; valaddr_reg:x3; val_offset:20610*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20610*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6871: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47000007; valaddr_reg:x3; val_offset:20613*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20613*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6872: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x4700000f; valaddr_reg:x3; val_offset:20616*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20616*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6873: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x4700001f; valaddr_reg:x3; val_offset:20619*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20619*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6874: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x4700003f; valaddr_reg:x3; val_offset:20622*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20622*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6875: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x4700007f; valaddr_reg:x3; val_offset:20625*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20625*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6876: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x470000ff; valaddr_reg:x3; val_offset:20628*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20628*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6877: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x470001ff; valaddr_reg:x3; val_offset:20631*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20631*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6878: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x470003ff; valaddr_reg:x3; val_offset:20634*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20634*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6879: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x470007ff; valaddr_reg:x3; val_offset:20637*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20637*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6880: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47000fff; valaddr_reg:x3; val_offset:20640*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20640*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6881: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47001fff; valaddr_reg:x3; val_offset:20643*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20643*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6882: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47003fff; valaddr_reg:x3; val_offset:20646*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20646*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6883: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47007fff; valaddr_reg:x3; val_offset:20649*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20649*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6884: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x4700ffff; valaddr_reg:x3; val_offset:20652*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20652*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6885: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x4701ffff; valaddr_reg:x3; val_offset:20655*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20655*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6886: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x4703ffff; valaddr_reg:x3; val_offset:20658*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20658*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6887: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x4707ffff; valaddr_reg:x3; val_offset:20661*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20661*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6888: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x470fffff; valaddr_reg:x3; val_offset:20664*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20664*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6889: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x471fffff; valaddr_reg:x3; val_offset:20667*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20667*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6890: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x473fffff; valaddr_reg:x3; val_offset:20670*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20670*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6891: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47400000; valaddr_reg:x3; val_offset:20673*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20673*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6892: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47600000; valaddr_reg:x3; val_offset:20676*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20676*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6893: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47700000; valaddr_reg:x3; val_offset:20679*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20679*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6894: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x47780000; valaddr_reg:x3; val_offset:20682*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20682*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6895: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477c0000; valaddr_reg:x3; val_offset:20685*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20685*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6896: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477e0000; valaddr_reg:x3; val_offset:20688*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20688*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6897: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477f0000; valaddr_reg:x3; val_offset:20691*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20691*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6898: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477f8000; valaddr_reg:x3; val_offset:20694*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20694*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6899: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477fc000; valaddr_reg:x3; val_offset:20697*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20697*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6900: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477fe000; valaddr_reg:x3; val_offset:20700*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20700*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6901: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477ff000; valaddr_reg:x3; val_offset:20703*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20703*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6902: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477ff800; valaddr_reg:x3; val_offset:20706*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20706*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6903: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477ffc00; valaddr_reg:x3; val_offset:20709*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20709*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6904: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477ffe00; valaddr_reg:x3; val_offset:20712*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20712*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6905: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477fff00; valaddr_reg:x3; val_offset:20715*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20715*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6906: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477fff80; valaddr_reg:x3; val_offset:20718*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20718*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6907: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477fffc0; valaddr_reg:x3; val_offset:20721*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20721*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6908: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477fffe0; valaddr_reg:x3; val_offset:20724*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20724*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6909: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477ffff0; valaddr_reg:x3; val_offset:20727*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20727*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6910: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477ffff8; valaddr_reg:x3; val_offset:20730*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20730*0 + 3*53*FLEN/8, x4, x1, x2) + +inst_6911: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477ffffc; valaddr_reg:x3; val_offset:20733*0 + 3*53*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20733*0 + 3*53*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2113266157,32,FLEN) +NAN_BOXED(2164606034,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658240,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658241,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658243,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658247,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658255,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658271,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658303,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658367,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658495,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251658751,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251659263,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251660287,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251662335,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251666431,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251674623,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251691007,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251723775,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251789311,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(251920383,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(252182527,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(252706815,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(253755391,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255852543,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255852544,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(257949696,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(258998272,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259522560,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259784704,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259915776,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(259981312,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260014080,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260030464,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260038656,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260042752,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260044800,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260045824,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046336,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046592,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046720,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046784,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046816,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046832,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046840,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046844,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046846,32,FLEN) +NAN_BOXED(2113327590,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(260046847,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182336,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182337,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182339,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182343,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182351,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182367,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182399,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182463,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182591,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191182847,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191183359,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191184383,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191186431,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191190527,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191198719,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191215103,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191247871,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191313407,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191444479,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1191706623,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1192230911,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1193279487,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1195376639,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1195376640,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1197473792,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1198522368,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199046656,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199308800,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199439872,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199505408,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199538176,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199554560,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199562752,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199566848,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199568896,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199569920,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570432,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570688,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570816,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570880,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570912,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570928,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570936,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570940,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-55.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-55.S new file mode 100644 index 000000000..e922cf6f3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-55.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_6912: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477ffffe; valaddr_reg:x3; val_offset:20736*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20736*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6913: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x78c2ed and fs2 == 0 and fe2 == 0x02 and fm2 == 0x03b97f and fs3 == 0 and fe3 == 0x8e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7df8c2ed; op2val:0x103b97f; +op3val:0x477fffff; valaddr_reg:x3; val_offset:20739*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20739*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6914: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc800000; valaddr_reg:x3; val_offset:20742*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20742*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6915: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc800001; valaddr_reg:x3; val_offset:20745*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20745*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6916: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc800003; valaddr_reg:x3; val_offset:20748*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20748*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6917: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc800007; valaddr_reg:x3; val_offset:20751*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20751*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6918: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc80000f; valaddr_reg:x3; val_offset:20754*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20754*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6919: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc80001f; valaddr_reg:x3; val_offset:20757*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20757*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6920: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc80003f; valaddr_reg:x3; val_offset:20760*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20760*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6921: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc80007f; valaddr_reg:x3; val_offset:20763*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20763*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6922: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc8000ff; valaddr_reg:x3; val_offset:20766*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20766*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6923: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc8001ff; valaddr_reg:x3; val_offset:20769*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20769*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6924: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc8003ff; valaddr_reg:x3; val_offset:20772*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20772*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6925: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc8007ff; valaddr_reg:x3; val_offset:20775*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20775*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6926: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc800fff; valaddr_reg:x3; val_offset:20778*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20778*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6927: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc801fff; valaddr_reg:x3; val_offset:20781*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20781*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6928: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc803fff; valaddr_reg:x3; val_offset:20784*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20784*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6929: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc807fff; valaddr_reg:x3; val_offset:20787*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20787*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6930: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc80ffff; valaddr_reg:x3; val_offset:20790*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20790*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6931: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc81ffff; valaddr_reg:x3; val_offset:20793*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20793*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6932: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc83ffff; valaddr_reg:x3; val_offset:20796*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20796*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6933: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc87ffff; valaddr_reg:x3; val_offset:20799*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20799*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6934: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc8fffff; valaddr_reg:x3; val_offset:20802*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20802*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6935: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfc9fffff; valaddr_reg:x3; val_offset:20805*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20805*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6936: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcbfffff; valaddr_reg:x3; val_offset:20808*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20808*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6937: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcc00000; valaddr_reg:x3; val_offset:20811*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20811*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6938: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfce00000; valaddr_reg:x3; val_offset:20814*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20814*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6939: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcf00000; valaddr_reg:x3; val_offset:20817*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20817*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6940: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcf80000; valaddr_reg:x3; val_offset:20820*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20820*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6941: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfc0000; valaddr_reg:x3; val_offset:20823*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20823*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6942: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfe0000; valaddr_reg:x3; val_offset:20826*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20826*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6943: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcff0000; valaddr_reg:x3; val_offset:20829*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20829*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6944: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcff8000; valaddr_reg:x3; val_offset:20832*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20832*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6945: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcffc000; valaddr_reg:x3; val_offset:20835*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20835*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6946: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcffe000; valaddr_reg:x3; val_offset:20838*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20838*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6947: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfff000; valaddr_reg:x3; val_offset:20841*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20841*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6948: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfff800; valaddr_reg:x3; val_offset:20844*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20844*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6949: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfffc00; valaddr_reg:x3; val_offset:20847*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20847*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6950: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfffe00; valaddr_reg:x3; val_offset:20850*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20850*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6951: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcffff00; valaddr_reg:x3; val_offset:20853*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20853*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6952: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcffff80; valaddr_reg:x3; val_offset:20856*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20856*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6953: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcffffc0; valaddr_reg:x3; val_offset:20859*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20859*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6954: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcffffe0; valaddr_reg:x3; val_offset:20862*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20862*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6955: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfffff0; valaddr_reg:x3; val_offset:20865*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20865*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6956: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfffff8; valaddr_reg:x3; val_offset:20868*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20868*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6957: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfffffc; valaddr_reg:x3; val_offset:20871*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20871*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6958: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcfffffe; valaddr_reg:x3; val_offset:20874*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20874*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6959: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xf9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xfcffffff; valaddr_reg:x3; val_offset:20877*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20877*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6960: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff000001; valaddr_reg:x3; val_offset:20880*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20880*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6961: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff000003; valaddr_reg:x3; val_offset:20883*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20883*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6962: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff000007; valaddr_reg:x3; val_offset:20886*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20886*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6963: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff199999; valaddr_reg:x3; val_offset:20889*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20889*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6964: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff249249; valaddr_reg:x3; val_offset:20892*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20892*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6965: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff333333; valaddr_reg:x3; val_offset:20895*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20895*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6966: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:20898*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20898*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6967: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:20901*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20901*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6968: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff444444; valaddr_reg:x3; val_offset:20904*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20904*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6969: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:20907*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20907*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6970: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:20910*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20910*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6971: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff666666; valaddr_reg:x3; val_offset:20913*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20913*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6972: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:20916*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20916*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6973: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:20919*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20919*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6974: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:20922*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20922*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6975: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b3858 and fs2 == 1 and fe2 == 0x82 and fm2 == 0x026f77 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb3858; op2val:0xc1026f77; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:20925*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20925*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6976: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:20928*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20928*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6977: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:20931*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20931*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6978: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:20934*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20934*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6979: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:20937*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20937*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6980: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:20940*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20940*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6981: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:20943*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20943*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6982: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:20946*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20946*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6983: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:20949*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20949*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6984: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:20952*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20952*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6985: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:20955*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20955*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6986: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:20958*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20958*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6987: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:20961*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20961*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6988: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:20964*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20964*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6989: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:20967*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20967*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6990: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:20970*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20970*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6991: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:20973*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20973*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6992: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f000000; valaddr_reg:x3; val_offset:20976*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20976*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6993: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f000001; valaddr_reg:x3; val_offset:20979*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20979*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6994: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f000003; valaddr_reg:x3; val_offset:20982*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20982*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6995: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f000007; valaddr_reg:x3; val_offset:20985*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20985*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6996: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f00000f; valaddr_reg:x3; val_offset:20988*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20988*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6997: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f00001f; valaddr_reg:x3; val_offset:20991*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20991*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6998: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f00003f; valaddr_reg:x3; val_offset:20994*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20994*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_6999: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f00007f; valaddr_reg:x3; val_offset:20997*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 20997*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7000: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f0000ff; valaddr_reg:x3; val_offset:21000*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21000*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7001: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f0001ff; valaddr_reg:x3; val_offset:21003*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21003*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7002: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f0003ff; valaddr_reg:x3; val_offset:21006*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21006*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7003: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f0007ff; valaddr_reg:x3; val_offset:21009*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21009*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7004: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f000fff; valaddr_reg:x3; val_offset:21012*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21012*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7005: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f001fff; valaddr_reg:x3; val_offset:21015*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21015*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7006: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f003fff; valaddr_reg:x3; val_offset:21018*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21018*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7007: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f007fff; valaddr_reg:x3; val_offset:21021*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21021*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7008: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f00ffff; valaddr_reg:x3; val_offset:21024*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21024*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7009: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f01ffff; valaddr_reg:x3; val_offset:21027*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21027*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7010: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f03ffff; valaddr_reg:x3; val_offset:21030*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21030*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7011: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f07ffff; valaddr_reg:x3; val_offset:21033*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21033*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7012: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f0fffff; valaddr_reg:x3; val_offset:21036*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21036*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7013: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f1fffff; valaddr_reg:x3; val_offset:21039*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21039*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7014: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f3fffff; valaddr_reg:x3; val_offset:21042*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21042*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7015: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f400000; valaddr_reg:x3; val_offset:21045*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21045*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7016: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f600000; valaddr_reg:x3; val_offset:21048*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21048*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7017: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f700000; valaddr_reg:x3; val_offset:21051*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21051*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7018: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f780000; valaddr_reg:x3; val_offset:21054*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21054*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7019: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7c0000; valaddr_reg:x3; val_offset:21057*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21057*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7020: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7e0000; valaddr_reg:x3; val_offset:21060*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21060*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7021: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7f0000; valaddr_reg:x3; val_offset:21063*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21063*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7022: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7f8000; valaddr_reg:x3; val_offset:21066*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21066*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7023: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7fc000; valaddr_reg:x3; val_offset:21069*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21069*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7024: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7fe000; valaddr_reg:x3; val_offset:21072*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21072*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7025: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7ff000; valaddr_reg:x3; val_offset:21075*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21075*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7026: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7ff800; valaddr_reg:x3; val_offset:21078*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21078*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7027: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7ffc00; valaddr_reg:x3; val_offset:21081*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21081*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7028: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7ffe00; valaddr_reg:x3; val_offset:21084*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21084*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7029: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7fff00; valaddr_reg:x3; val_offset:21087*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21087*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7030: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7fff80; valaddr_reg:x3; val_offset:21090*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21090*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7031: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7fffc0; valaddr_reg:x3; val_offset:21093*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21093*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7032: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7fffe0; valaddr_reg:x3; val_offset:21096*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21096*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7033: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7ffff0; valaddr_reg:x3; val_offset:21099*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21099*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7034: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7ffff8; valaddr_reg:x3; val_offset:21102*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21102*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7035: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7ffffc; valaddr_reg:x3; val_offset:21105*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21105*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7036: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7ffffe; valaddr_reg:x3; val_offset:21108*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21108*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7037: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7b96fa and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfb96fa; op2val:0x80000000; +op3val:0x8f7fffff; valaddr_reg:x3; val_offset:21111*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21111*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7038: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab000000; valaddr_reg:x3; val_offset:21114*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21114*0 + 3*54*FLEN/8, x4, x1, x2) + +inst_7039: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab000001; valaddr_reg:x3; val_offset:21117*0 + 3*54*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21117*0 + 3*54*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570942,32,FLEN) +NAN_BOXED(2113454829,32,FLEN) +NAN_BOXED(17021311,32,FLEN) +NAN_BOXED(1199570943,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247040,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247041,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247043,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247047,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247055,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247071,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247103,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247167,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247295,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236247551,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236248063,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236249087,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236251135,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236255231,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236263423,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236279807,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236312575,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236378111,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236509183,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4236771327,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4237295615,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4238344191,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4240441343,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4240441344,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4242538496,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4243587072,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244111360,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244373504,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244504576,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244570112,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244602880,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244619264,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244627456,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244631552,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244633600,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244634624,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635136,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635392,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635520,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635584,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635616,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635632,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635640,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635644,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635646,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4244635647,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2113615960,32,FLEN) +NAN_BOXED(3238162295,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141888,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141889,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141891,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141895,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141903,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141919,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399141951,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142015,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142143,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142399,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399142911,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399143935,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399145983,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399150079,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399158271,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399174655,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399207423,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399272959,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399404031,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2399666175,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2400190463,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2401239039,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2403336191,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2403336192,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2405433344,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2406481920,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407006208,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407268352,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407399424,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407464960,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407497728,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407514112,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407522304,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407526400,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407528448,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407529472,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407529984,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530240,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530368,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530432,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530464,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530480,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530488,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530492,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530494,32,FLEN) +NAN_BOXED(2113640186,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530495,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868903936,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868903937,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-56.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-56.S new file mode 100644 index 000000000..67f873419 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-56.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_7040: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab000003; valaddr_reg:x3; val_offset:21120*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21120*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7041: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab000007; valaddr_reg:x3; val_offset:21123*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21123*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7042: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab00000f; valaddr_reg:x3; val_offset:21126*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21126*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7043: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab00001f; valaddr_reg:x3; val_offset:21129*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21129*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7044: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab00003f; valaddr_reg:x3; val_offset:21132*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21132*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7045: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab00007f; valaddr_reg:x3; val_offset:21135*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21135*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7046: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab0000ff; valaddr_reg:x3; val_offset:21138*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21138*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7047: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab0001ff; valaddr_reg:x3; val_offset:21141*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21141*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7048: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab0003ff; valaddr_reg:x3; val_offset:21144*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21144*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7049: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab0007ff; valaddr_reg:x3; val_offset:21147*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21147*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7050: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab000fff; valaddr_reg:x3; val_offset:21150*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21150*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7051: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab001fff; valaddr_reg:x3; val_offset:21153*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21153*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7052: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab003fff; valaddr_reg:x3; val_offset:21156*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21156*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7053: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab007fff; valaddr_reg:x3; val_offset:21159*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21159*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7054: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab00ffff; valaddr_reg:x3; val_offset:21162*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21162*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7055: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab01ffff; valaddr_reg:x3; val_offset:21165*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21165*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7056: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab03ffff; valaddr_reg:x3; val_offset:21168*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21168*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7057: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab07ffff; valaddr_reg:x3; val_offset:21171*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21171*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7058: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab0fffff; valaddr_reg:x3; val_offset:21174*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21174*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7059: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab1fffff; valaddr_reg:x3; val_offset:21177*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21177*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7060: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab3fffff; valaddr_reg:x3; val_offset:21180*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21180*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7061: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab400000; valaddr_reg:x3; val_offset:21183*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21183*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7062: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab600000; valaddr_reg:x3; val_offset:21186*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21186*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7063: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab700000; valaddr_reg:x3; val_offset:21189*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21189*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7064: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab780000; valaddr_reg:x3; val_offset:21192*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21192*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7065: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7c0000; valaddr_reg:x3; val_offset:21195*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21195*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7066: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7e0000; valaddr_reg:x3; val_offset:21198*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21198*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7067: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7f0000; valaddr_reg:x3; val_offset:21201*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21201*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7068: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7f8000; valaddr_reg:x3; val_offset:21204*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21204*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7069: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7fc000; valaddr_reg:x3; val_offset:21207*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21207*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7070: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7fe000; valaddr_reg:x3; val_offset:21210*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21210*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7071: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7ff000; valaddr_reg:x3; val_offset:21213*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21213*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7072: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7ff800; valaddr_reg:x3; val_offset:21216*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21216*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7073: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7ffc00; valaddr_reg:x3; val_offset:21219*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21219*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7074: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7ffe00; valaddr_reg:x3; val_offset:21222*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21222*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7075: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7fff00; valaddr_reg:x3; val_offset:21225*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21225*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7076: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7fff80; valaddr_reg:x3; val_offset:21228*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21228*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7077: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7fffc0; valaddr_reg:x3; val_offset:21231*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21231*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7078: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7fffe0; valaddr_reg:x3; val_offset:21234*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21234*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7079: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7ffff0; valaddr_reg:x3; val_offset:21237*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21237*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7080: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7ffff8; valaddr_reg:x3; val_offset:21240*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21240*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7081: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7ffffc; valaddr_reg:x3; val_offset:21243*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21243*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7082: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7ffffe; valaddr_reg:x3; val_offset:21246*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21246*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7083: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x56 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xab7fffff; valaddr_reg:x3; val_offset:21249*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21249*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7084: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbf800001; valaddr_reg:x3; val_offset:21252*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21252*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7085: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbf800003; valaddr_reg:x3; val_offset:21255*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21255*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7086: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbf800007; valaddr_reg:x3; val_offset:21258*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21258*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7087: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbf999999; valaddr_reg:x3; val_offset:21261*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21261*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7088: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:21264*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21264*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7089: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:21267*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21267*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7090: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:21270*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21270*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7091: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:21273*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21273*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7092: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:21276*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21276*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7093: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:21279*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21279*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7094: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:21282*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21282*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7095: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:21285*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21285*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7096: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:21288*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21288*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7097: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:21291*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21291*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7098: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:21294*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21294*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7099: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7e7a0c and fs2 == 1 and fe2 == 0x02 and fm2 == 0x00c424 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dfe7a0c; op2val:0x8100c424; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:21297*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21297*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7100: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:21300*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21300*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7101: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:21303*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21303*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7102: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:21306*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21306*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7103: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:21309*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21309*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7104: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:21312*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21312*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7105: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:21315*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21315*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7106: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:21318*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21318*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7107: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:21321*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21321*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7108: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:21324*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21324*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7109: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:21327*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21327*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7110: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:21330*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21330*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7111: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:21333*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21333*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7112: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:21336*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21336*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7113: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:21339*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21339*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7114: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:21342*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21342*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7115: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:21345*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21345*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7116: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85000000; valaddr_reg:x3; val_offset:21348*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21348*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7117: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85000001; valaddr_reg:x3; val_offset:21351*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21351*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7118: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85000003; valaddr_reg:x3; val_offset:21354*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21354*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7119: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85000007; valaddr_reg:x3; val_offset:21357*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21357*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7120: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8500000f; valaddr_reg:x3; val_offset:21360*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21360*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7121: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8500001f; valaddr_reg:x3; val_offset:21363*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21363*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7122: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8500003f; valaddr_reg:x3; val_offset:21366*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21366*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7123: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8500007f; valaddr_reg:x3; val_offset:21369*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21369*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7124: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x850000ff; valaddr_reg:x3; val_offset:21372*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21372*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7125: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x850001ff; valaddr_reg:x3; val_offset:21375*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21375*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7126: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x850003ff; valaddr_reg:x3; val_offset:21378*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21378*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7127: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x850007ff; valaddr_reg:x3; val_offset:21381*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21381*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7128: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85000fff; valaddr_reg:x3; val_offset:21384*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21384*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7129: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85001fff; valaddr_reg:x3; val_offset:21387*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21387*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7130: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85003fff; valaddr_reg:x3; val_offset:21390*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21390*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7131: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85007fff; valaddr_reg:x3; val_offset:21393*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21393*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7132: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8500ffff; valaddr_reg:x3; val_offset:21396*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21396*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7133: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8501ffff; valaddr_reg:x3; val_offset:21399*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21399*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7134: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8503ffff; valaddr_reg:x3; val_offset:21402*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21402*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7135: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x8507ffff; valaddr_reg:x3; val_offset:21405*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21405*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7136: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x850fffff; valaddr_reg:x3; val_offset:21408*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21408*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7137: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x851fffff; valaddr_reg:x3; val_offset:21411*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21411*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7138: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x853fffff; valaddr_reg:x3; val_offset:21414*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21414*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7139: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85400000; valaddr_reg:x3; val_offset:21417*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21417*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7140: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85600000; valaddr_reg:x3; val_offset:21420*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21420*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7141: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85700000; valaddr_reg:x3; val_offset:21423*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21423*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7142: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x85780000; valaddr_reg:x3; val_offset:21426*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21426*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7143: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857c0000; valaddr_reg:x3; val_offset:21429*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21429*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7144: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857e0000; valaddr_reg:x3; val_offset:21432*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21432*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7145: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857f0000; valaddr_reg:x3; val_offset:21435*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21435*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7146: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857f8000; valaddr_reg:x3; val_offset:21438*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21438*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7147: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857fc000; valaddr_reg:x3; val_offset:21441*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21441*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7148: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857fe000; valaddr_reg:x3; val_offset:21444*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21444*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7149: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857ff000; valaddr_reg:x3; val_offset:21447*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21447*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7150: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857ff800; valaddr_reg:x3; val_offset:21450*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21450*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7151: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857ffc00; valaddr_reg:x3; val_offset:21453*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21453*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7152: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857ffe00; valaddr_reg:x3; val_offset:21456*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21456*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7153: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857fff00; valaddr_reg:x3; val_offset:21459*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21459*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7154: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857fff80; valaddr_reg:x3; val_offset:21462*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21462*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7155: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857fffc0; valaddr_reg:x3; val_offset:21465*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21465*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7156: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857fffe0; valaddr_reg:x3; val_offset:21468*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21468*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7157: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857ffff0; valaddr_reg:x3; val_offset:21471*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21471*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7158: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857ffff8; valaddr_reg:x3; val_offset:21474*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21474*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7159: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857ffffc; valaddr_reg:x3; val_offset:21477*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21477*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7160: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857ffffe; valaddr_reg:x3; val_offset:21480*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21480*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7161: +// fs1 == 0 and fe1 == 0xfb and fm1 == 0x7fde5b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7dffde5b; op2val:0x80000000; +op3val:0x857fffff; valaddr_reg:x3; val_offset:21483*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21483*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7162: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f000000; valaddr_reg:x3; val_offset:21486*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21486*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7163: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f000001; valaddr_reg:x3; val_offset:21489*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21489*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7164: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f000003; valaddr_reg:x3; val_offset:21492*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21492*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7165: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f000007; valaddr_reg:x3; val_offset:21495*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21495*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7166: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f00000f; valaddr_reg:x3; val_offset:21498*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21498*0 + 3*55*FLEN/8, x4, x1, x2) + +inst_7167: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f00001f; valaddr_reg:x3; val_offset:21501*0 + 3*55*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21501*0 + 3*55*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868903939,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868903943,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868903951,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868903967,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868903999,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868904063,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868904191,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868904447,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868904959,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868905983,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868908031,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868912127,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868920319,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868936703,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2868969471,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2869035007,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2869166079,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2869428223,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2869952511,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2871001087,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2873098239,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2873098240,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2875195392,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2876243968,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2876768256,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877030400,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877161472,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877227008,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877259776,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877276160,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877284352,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877288448,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877290496,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877291520,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292032,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292288,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292416,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292480,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292512,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292528,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292536,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292540,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292542,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(2877292543,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2113829388,32,FLEN) +NAN_BOXED(2164311076,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369728,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369729,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369731,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369735,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369743,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369759,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369791,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369855,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369983,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231370239,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231370751,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231371775,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231373823,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231377919,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231386111,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231402495,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231435263,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231500799,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231631871,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231894015,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2232418303,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2233466879,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2235564031,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2235564032,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2237661184,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2238709760,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239234048,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239496192,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239627264,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239692800,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239725568,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239741952,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239750144,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239754240,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239756288,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239757312,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239757824,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758080,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758208,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758272,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758304,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758320,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758328,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758332,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758334,32,FLEN) +NAN_BOXED(2113920603,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758335,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529152,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529153,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529155,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529159,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529167,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529183,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-57.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-57.S new file mode 100644 index 000000000..d75ea6c0e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-57.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_7168: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f00003f; valaddr_reg:x3; val_offset:21504*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21504*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7169: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f00007f; valaddr_reg:x3; val_offset:21507*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21507*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7170: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f0000ff; valaddr_reg:x3; val_offset:21510*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21510*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7171: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f0001ff; valaddr_reg:x3; val_offset:21513*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21513*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7172: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f0003ff; valaddr_reg:x3; val_offset:21516*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21516*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7173: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f0007ff; valaddr_reg:x3; val_offset:21519*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21519*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7174: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f000fff; valaddr_reg:x3; val_offset:21522*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21522*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7175: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f001fff; valaddr_reg:x3; val_offset:21525*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21525*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7176: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f003fff; valaddr_reg:x3; val_offset:21528*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21528*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7177: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f007fff; valaddr_reg:x3; val_offset:21531*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21531*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7178: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f00ffff; valaddr_reg:x3; val_offset:21534*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21534*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7179: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f01ffff; valaddr_reg:x3; val_offset:21537*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21537*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7180: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f03ffff; valaddr_reg:x3; val_offset:21540*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21540*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7181: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f07ffff; valaddr_reg:x3; val_offset:21543*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21543*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7182: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f0fffff; valaddr_reg:x3; val_offset:21546*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21546*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7183: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f1fffff; valaddr_reg:x3; val_offset:21549*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21549*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7184: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f3fffff; valaddr_reg:x3; val_offset:21552*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21552*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7185: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f400000; valaddr_reg:x3; val_offset:21555*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21555*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7186: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f600000; valaddr_reg:x3; val_offset:21558*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21558*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7187: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f700000; valaddr_reg:x3; val_offset:21561*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21561*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7188: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f780000; valaddr_reg:x3; val_offset:21564*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21564*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7189: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7c0000; valaddr_reg:x3; val_offset:21567*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21567*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7190: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7e0000; valaddr_reg:x3; val_offset:21570*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21570*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7191: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7f0000; valaddr_reg:x3; val_offset:21573*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21573*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7192: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7f8000; valaddr_reg:x3; val_offset:21576*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21576*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7193: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7fc000; valaddr_reg:x3; val_offset:21579*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21579*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7194: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7fe000; valaddr_reg:x3; val_offset:21582*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21582*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7195: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7ff000; valaddr_reg:x3; val_offset:21585*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21585*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7196: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7ff800; valaddr_reg:x3; val_offset:21588*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21588*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7197: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7ffc00; valaddr_reg:x3; val_offset:21591*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21591*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7198: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7ffe00; valaddr_reg:x3; val_offset:21594*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21594*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7199: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7fff00; valaddr_reg:x3; val_offset:21597*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21597*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7200: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7fff80; valaddr_reg:x3; val_offset:21600*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21600*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7201: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7fffc0; valaddr_reg:x3; val_offset:21603*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21603*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7202: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7fffe0; valaddr_reg:x3; val_offset:21606*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21606*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7203: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7ffff0; valaddr_reg:x3; val_offset:21609*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21609*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7204: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7ffff8; valaddr_reg:x3; val_offset:21612*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21612*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7205: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7ffffc; valaddr_reg:x3; val_offset:21615*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21615*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7206: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7ffffe; valaddr_reg:x3; val_offset:21618*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21618*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7207: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x5e and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x2f7fffff; valaddr_reg:x3; val_offset:21621*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21621*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7208: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3f800001; valaddr_reg:x3; val_offset:21624*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21624*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7209: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3f800003; valaddr_reg:x3; val_offset:21627*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21627*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7210: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3f800007; valaddr_reg:x3; val_offset:21630*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21630*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7211: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3f999999; valaddr_reg:x3; val_offset:21633*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21633*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7212: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:21636*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21636*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7213: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:21639*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21639*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7214: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:21642*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21642*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7215: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:21645*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21645*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7216: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:21648*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21648*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7217: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:21651*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21651*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7218: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:21654*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21654*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7219: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:21657*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21657*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7220: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:21660*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21660*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7221: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:21663*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21663*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7222: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:21666*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21666*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7223: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x02ee14 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x7a4569 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e02ee14; op2val:0xfa4569; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:21669*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21669*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7224: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63800000; valaddr_reg:x3; val_offset:21672*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21672*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7225: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63800001; valaddr_reg:x3; val_offset:21675*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21675*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7226: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63800003; valaddr_reg:x3; val_offset:21678*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21678*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7227: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63800007; valaddr_reg:x3; val_offset:21681*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21681*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7228: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x6380000f; valaddr_reg:x3; val_offset:21684*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21684*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7229: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x6380001f; valaddr_reg:x3; val_offset:21687*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21687*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7230: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x6380003f; valaddr_reg:x3; val_offset:21690*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21690*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7231: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x6380007f; valaddr_reg:x3; val_offset:21693*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21693*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7232: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x638000ff; valaddr_reg:x3; val_offset:21696*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21696*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7233: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x638001ff; valaddr_reg:x3; val_offset:21699*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21699*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7234: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x638003ff; valaddr_reg:x3; val_offset:21702*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21702*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7235: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x638007ff; valaddr_reg:x3; val_offset:21705*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21705*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7236: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63800fff; valaddr_reg:x3; val_offset:21708*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21708*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7237: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63801fff; valaddr_reg:x3; val_offset:21711*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21711*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7238: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63803fff; valaddr_reg:x3; val_offset:21714*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21714*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7239: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63807fff; valaddr_reg:x3; val_offset:21717*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21717*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7240: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x6380ffff; valaddr_reg:x3; val_offset:21720*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21720*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7241: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x6381ffff; valaddr_reg:x3; val_offset:21723*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21723*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7242: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x6383ffff; valaddr_reg:x3; val_offset:21726*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21726*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7243: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x6387ffff; valaddr_reg:x3; val_offset:21729*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21729*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7244: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x638fffff; valaddr_reg:x3; val_offset:21732*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21732*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7245: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x639fffff; valaddr_reg:x3; val_offset:21735*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21735*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7246: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63bfffff; valaddr_reg:x3; val_offset:21738*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21738*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7247: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63c00000; valaddr_reg:x3; val_offset:21741*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21741*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7248: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63e00000; valaddr_reg:x3; val_offset:21744*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21744*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7249: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63f00000; valaddr_reg:x3; val_offset:21747*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21747*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7250: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63f80000; valaddr_reg:x3; val_offset:21750*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21750*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7251: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fc0000; valaddr_reg:x3; val_offset:21753*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21753*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7252: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fe0000; valaddr_reg:x3; val_offset:21756*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21756*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7253: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ff0000; valaddr_reg:x3; val_offset:21759*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21759*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7254: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ff8000; valaddr_reg:x3; val_offset:21762*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21762*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7255: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ffc000; valaddr_reg:x3; val_offset:21765*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21765*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7256: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ffe000; valaddr_reg:x3; val_offset:21768*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21768*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7257: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fff000; valaddr_reg:x3; val_offset:21771*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21771*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7258: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fff800; valaddr_reg:x3; val_offset:21774*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21774*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7259: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fffc00; valaddr_reg:x3; val_offset:21777*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21777*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7260: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fffe00; valaddr_reg:x3; val_offset:21780*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21780*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7261: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ffff00; valaddr_reg:x3; val_offset:21783*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21783*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7262: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ffff80; valaddr_reg:x3; val_offset:21786*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21786*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7263: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ffffc0; valaddr_reg:x3; val_offset:21789*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21789*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7264: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ffffe0; valaddr_reg:x3; val_offset:21792*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21792*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7265: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fffff0; valaddr_reg:x3; val_offset:21795*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21795*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7266: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fffff8; valaddr_reg:x3; val_offset:21798*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21798*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7267: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fffffc; valaddr_reg:x3; val_offset:21801*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21801*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7268: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63fffffe; valaddr_reg:x3; val_offset:21804*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21804*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7269: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xc7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x63ffffff; valaddr_reg:x3; val_offset:21807*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21807*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7270: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f000001; valaddr_reg:x3; val_offset:21810*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21810*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7271: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f000003; valaddr_reg:x3; val_offset:21813*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21813*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7272: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f000007; valaddr_reg:x3; val_offset:21816*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21816*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7273: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f199999; valaddr_reg:x3; val_offset:21819*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21819*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7274: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f249249; valaddr_reg:x3; val_offset:21822*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21822*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7275: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f333333; valaddr_reg:x3; val_offset:21825*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21825*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7276: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:21828*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21828*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7277: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:21831*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21831*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7278: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f444444; valaddr_reg:x3; val_offset:21834*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21834*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7279: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:21837*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21837*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7280: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:21840*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21840*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7281: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f666666; valaddr_reg:x3; val_offset:21843*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21843*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7282: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:21846*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21846*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7283: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:21849*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21849*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7284: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:21852*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21852*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7285: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08a211 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x6fd324 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08a211; op2val:0x40efd324; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:21855*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21855*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7286: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbf800001; valaddr_reg:x3; val_offset:21858*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21858*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7287: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbf800003; valaddr_reg:x3; val_offset:21861*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21861*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7288: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbf800007; valaddr_reg:x3; val_offset:21864*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21864*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7289: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbf999999; valaddr_reg:x3; val_offset:21867*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21867*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7290: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:21870*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21870*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7291: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:21873*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21873*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7292: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:21876*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21876*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7293: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:21879*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21879*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7294: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:21882*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21882*0 + 3*56*FLEN/8, x4, x1, x2) + +inst_7295: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:21885*0 + 3*56*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21885*0 + 3*56*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529215,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529279,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529407,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788529663,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788530175,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788531199,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788533247,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788537343,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788545535,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788561919,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788594687,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788660223,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(788791295,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(789053439,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(789577727,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(790626303,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(792723455,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(792723456,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(794820608,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(795869184,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796393472,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796655616,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796786688,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796852224,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796884992,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796901376,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796909568,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796913664,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796915712,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796916736,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917248,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917504,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917632,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917696,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917728,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917744,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917752,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917756,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917758,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(796917759,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2114121236,32,FLEN) +NAN_BOXED(16401769,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669332992,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669332993,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669332995,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669332999,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669333007,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669333023,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669333055,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669333119,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669333247,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669333503,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669334015,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669335039,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669337087,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669341183,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669349375,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669365759,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669398527,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669464063,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669595135,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1669857279,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1670381567,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1671430143,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1673527295,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1673527296,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1675624448,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1676673024,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677197312,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677459456,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677590528,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677656064,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677688832,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677705216,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677713408,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677717504,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677719552,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677720576,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721088,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721344,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721472,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721536,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721568,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721584,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721592,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721596,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721598,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(1677721599,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2114494993,32,FLEN) +NAN_BOXED(1089458980,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-58.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-58.S new file mode 100644 index 000000000..8d29c7d43 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-58.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_7296: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:21888*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21888*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7297: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:21891*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21891*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7298: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:21894*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21894*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7299: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:21897*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21897*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7300: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:21900*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21900*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7301: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:21903*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21903*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7302: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb000000; valaddr_reg:x3; val_offset:21906*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21906*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7303: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb000001; valaddr_reg:x3; val_offset:21909*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21909*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7304: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb000003; valaddr_reg:x3; val_offset:21912*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21912*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7305: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb000007; valaddr_reg:x3; val_offset:21915*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21915*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7306: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb00000f; valaddr_reg:x3; val_offset:21918*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21918*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7307: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb00001f; valaddr_reg:x3; val_offset:21921*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21921*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7308: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb00003f; valaddr_reg:x3; val_offset:21924*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21924*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7309: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb00007f; valaddr_reg:x3; val_offset:21927*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21927*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7310: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb0000ff; valaddr_reg:x3; val_offset:21930*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21930*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7311: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb0001ff; valaddr_reg:x3; val_offset:21933*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21933*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7312: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb0003ff; valaddr_reg:x3; val_offset:21936*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21936*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7313: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb0007ff; valaddr_reg:x3; val_offset:21939*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21939*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7314: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb000fff; valaddr_reg:x3; val_offset:21942*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21942*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7315: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb001fff; valaddr_reg:x3; val_offset:21945*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21945*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7316: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb003fff; valaddr_reg:x3; val_offset:21948*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21948*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7317: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb007fff; valaddr_reg:x3; val_offset:21951*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21951*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7318: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb00ffff; valaddr_reg:x3; val_offset:21954*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21954*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7319: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb01ffff; valaddr_reg:x3; val_offset:21957*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21957*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7320: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb03ffff; valaddr_reg:x3; val_offset:21960*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21960*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7321: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb07ffff; valaddr_reg:x3; val_offset:21963*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21963*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7322: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb0fffff; valaddr_reg:x3; val_offset:21966*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21966*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7323: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb1fffff; valaddr_reg:x3; val_offset:21969*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21969*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7324: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb3fffff; valaddr_reg:x3; val_offset:21972*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21972*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7325: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb400000; valaddr_reg:x3; val_offset:21975*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21975*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7326: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb600000; valaddr_reg:x3; val_offset:21978*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21978*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7327: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb700000; valaddr_reg:x3; val_offset:21981*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21981*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7328: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb780000; valaddr_reg:x3; val_offset:21984*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21984*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7329: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7c0000; valaddr_reg:x3; val_offset:21987*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21987*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7330: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7e0000; valaddr_reg:x3; val_offset:21990*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21990*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7331: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7f0000; valaddr_reg:x3; val_offset:21993*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21993*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7332: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7f8000; valaddr_reg:x3; val_offset:21996*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21996*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7333: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7fc000; valaddr_reg:x3; val_offset:21999*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 21999*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7334: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7fe000; valaddr_reg:x3; val_offset:22002*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22002*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7335: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7ff000; valaddr_reg:x3; val_offset:22005*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22005*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7336: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7ff800; valaddr_reg:x3; val_offset:22008*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22008*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7337: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7ffc00; valaddr_reg:x3; val_offset:22011*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22011*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7338: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7ffe00; valaddr_reg:x3; val_offset:22014*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22014*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7339: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7fff00; valaddr_reg:x3; val_offset:22017*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22017*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7340: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7fff80; valaddr_reg:x3; val_offset:22020*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22020*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7341: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7fffc0; valaddr_reg:x3; val_offset:22023*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22023*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7342: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7fffe0; valaddr_reg:x3; val_offset:22026*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22026*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7343: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7ffff0; valaddr_reg:x3; val_offset:22029*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22029*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7344: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7ffff8; valaddr_reg:x3; val_offset:22032*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22032*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7345: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7ffffc; valaddr_reg:x3; val_offset:22035*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22035*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7346: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7ffffe; valaddr_reg:x3; val_offset:22038*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22038*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7347: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x08ece8 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6f5010 and fs3 == 1 and fe3 == 0x96 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e08ece8; op2val:0x80ef5010; +op3val:0xcb7fffff; valaddr_reg:x3; val_offset:22041*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22041*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7348: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:22044*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22044*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7349: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:22047*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22047*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7350: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:22050*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22050*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7351: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:22053*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22053*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7352: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:22056*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22056*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7353: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:22059*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22059*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7354: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:22062*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22062*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7355: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:22065*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22065*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7356: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:22068*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22068*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7357: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:22071*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22071*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7358: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:22074*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22074*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7359: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:22077*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22077*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7360: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:22080*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22080*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7361: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:22083*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22083*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7362: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:22086*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22086*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7363: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:22089*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22089*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7364: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3800000; valaddr_reg:x3; val_offset:22092*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22092*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7365: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3800001; valaddr_reg:x3; val_offset:22095*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22095*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7366: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3800003; valaddr_reg:x3; val_offset:22098*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22098*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7367: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3800007; valaddr_reg:x3; val_offset:22101*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22101*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7368: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x380000f; valaddr_reg:x3; val_offset:22104*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22104*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7369: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x380001f; valaddr_reg:x3; val_offset:22107*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22107*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7370: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x380003f; valaddr_reg:x3; val_offset:22110*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22110*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7371: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x380007f; valaddr_reg:x3; val_offset:22113*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22113*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7372: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x38000ff; valaddr_reg:x3; val_offset:22116*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22116*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7373: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x38001ff; valaddr_reg:x3; val_offset:22119*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22119*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7374: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x38003ff; valaddr_reg:x3; val_offset:22122*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22122*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7375: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x38007ff; valaddr_reg:x3; val_offset:22125*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22125*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7376: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3800fff; valaddr_reg:x3; val_offset:22128*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22128*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7377: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3801fff; valaddr_reg:x3; val_offset:22131*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22131*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7378: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3803fff; valaddr_reg:x3; val_offset:22134*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22134*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7379: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3807fff; valaddr_reg:x3; val_offset:22137*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22137*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7380: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x380ffff; valaddr_reg:x3; val_offset:22140*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22140*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7381: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x381ffff; valaddr_reg:x3; val_offset:22143*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22143*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7382: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x383ffff; valaddr_reg:x3; val_offset:22146*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22146*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7383: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x387ffff; valaddr_reg:x3; val_offset:22149*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22149*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7384: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x38fffff; valaddr_reg:x3; val_offset:22152*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22152*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7385: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x39fffff; valaddr_reg:x3; val_offset:22155*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22155*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7386: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3bfffff; valaddr_reg:x3; val_offset:22158*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22158*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7387: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3c00000; valaddr_reg:x3; val_offset:22161*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22161*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7388: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3e00000; valaddr_reg:x3; val_offset:22164*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22164*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7389: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3f00000; valaddr_reg:x3; val_offset:22167*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22167*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7390: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3f80000; valaddr_reg:x3; val_offset:22170*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22170*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7391: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fc0000; valaddr_reg:x3; val_offset:22173*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22173*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7392: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fe0000; valaddr_reg:x3; val_offset:22176*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22176*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7393: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ff0000; valaddr_reg:x3; val_offset:22179*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22179*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7394: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ff8000; valaddr_reg:x3; val_offset:22182*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22182*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7395: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ffc000; valaddr_reg:x3; val_offset:22185*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22185*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7396: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ffe000; valaddr_reg:x3; val_offset:22188*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22188*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7397: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fff000; valaddr_reg:x3; val_offset:22191*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22191*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7398: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fff800; valaddr_reg:x3; val_offset:22194*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22194*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7399: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fffc00; valaddr_reg:x3; val_offset:22197*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22197*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7400: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fffe00; valaddr_reg:x3; val_offset:22200*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22200*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7401: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ffff00; valaddr_reg:x3; val_offset:22203*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22203*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7402: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ffff80; valaddr_reg:x3; val_offset:22206*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22206*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7403: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ffffc0; valaddr_reg:x3; val_offset:22209*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22209*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7404: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ffffe0; valaddr_reg:x3; val_offset:22212*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22212*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7405: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fffff0; valaddr_reg:x3; val_offset:22215*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22215*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7406: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fffff8; valaddr_reg:x3; val_offset:22218*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22218*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7407: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fffffc; valaddr_reg:x3; val_offset:22221*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22221*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7408: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3fffffe; valaddr_reg:x3; val_offset:22224*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22224*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7409: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x09ec35 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e09ec35; op2val:0x0; +op3val:0x3ffffff; valaddr_reg:x3; val_offset:22227*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22227*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7410: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc000000; valaddr_reg:x3; val_offset:22230*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22230*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7411: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc000001; valaddr_reg:x3; val_offset:22233*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22233*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7412: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc000003; valaddr_reg:x3; val_offset:22236*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22236*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7413: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc000007; valaddr_reg:x3; val_offset:22239*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22239*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7414: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc00000f; valaddr_reg:x3; val_offset:22242*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22242*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7415: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc00001f; valaddr_reg:x3; val_offset:22245*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22245*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7416: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc00003f; valaddr_reg:x3; val_offset:22248*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22248*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7417: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc00007f; valaddr_reg:x3; val_offset:22251*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22251*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7418: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc0000ff; valaddr_reg:x3; val_offset:22254*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22254*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7419: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc0001ff; valaddr_reg:x3; val_offset:22257*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22257*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7420: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc0003ff; valaddr_reg:x3; val_offset:22260*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22260*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7421: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc0007ff; valaddr_reg:x3; val_offset:22263*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22263*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7422: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc000fff; valaddr_reg:x3; val_offset:22266*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22266*0 + 3*57*FLEN/8, x4, x1, x2) + +inst_7423: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc001fff; valaddr_reg:x3; val_offset:22269*0 + 3*57*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22269*0 + 3*57*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405774848,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405774849,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405774851,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405774855,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405774863,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405774879,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405774911,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405774975,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405775103,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405775359,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405775871,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405776895,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405778943,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405783039,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405791231,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405807615,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405840383,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3405905919,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3406036991,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3406299135,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3406823423,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3407871999,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3409969151,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3409969152,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3412066304,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3413114880,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3413639168,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3413901312,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414032384,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414097920,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414130688,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414147072,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414155264,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414159360,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414161408,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414162432,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414162944,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163200,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163328,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163392,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163424,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163440,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163448,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163452,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163454,32,FLEN) +NAN_BOXED(2114514152,32,FLEN) +NAN_BOXED(2163167248,32,FLEN) +NAN_BOXED(3414163455,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720256,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720257,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720259,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720263,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720271,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720287,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720319,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720383,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720511,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720767,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58721279,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58722303,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58724351,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58728447,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58736639,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58753023,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58785791,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58851327,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58982399,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(59244543,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(59768831,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(60817407,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(62914559,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(62914560,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65011712,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66060288,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66584576,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66846720,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(66977792,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67043328,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67076096,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67092480,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67100672,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67104768,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67106816,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67107840,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108352,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108608,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108736,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108800,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108832,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108848,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108856,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108860,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108862,32,FLEN) +NAN_BOXED(2114579509,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108863,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116608,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116609,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116611,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116615,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116623,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116639,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116671,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116735,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154116863,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154117119,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154117631,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154118655,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154120703,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154124799,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-59.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-59.S new file mode 100644 index 000000000..83b774dd0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-59.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_7424: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc003fff; valaddr_reg:x3; val_offset:22272*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22272*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7425: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc007fff; valaddr_reg:x3; val_offset:22275*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22275*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7426: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc00ffff; valaddr_reg:x3; val_offset:22278*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22278*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7427: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc01ffff; valaddr_reg:x3; val_offset:22281*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22281*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7428: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc03ffff; valaddr_reg:x3; val_offset:22284*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22284*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7429: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc07ffff; valaddr_reg:x3; val_offset:22287*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22287*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7430: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc0fffff; valaddr_reg:x3; val_offset:22290*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22290*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7431: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc1fffff; valaddr_reg:x3; val_offset:22293*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22293*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7432: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc3fffff; valaddr_reg:x3; val_offset:22296*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22296*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7433: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc400000; valaddr_reg:x3; val_offset:22299*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22299*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7434: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc600000; valaddr_reg:x3; val_offset:22302*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22302*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7435: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc700000; valaddr_reg:x3; val_offset:22305*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22305*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7436: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc780000; valaddr_reg:x3; val_offset:22308*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22308*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7437: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7c0000; valaddr_reg:x3; val_offset:22311*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22311*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7438: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7e0000; valaddr_reg:x3; val_offset:22314*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22314*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7439: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7f0000; valaddr_reg:x3; val_offset:22317*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22317*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7440: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7f8000; valaddr_reg:x3; val_offset:22320*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22320*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7441: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7fc000; valaddr_reg:x3; val_offset:22323*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22323*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7442: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7fe000; valaddr_reg:x3; val_offset:22326*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22326*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7443: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7ff000; valaddr_reg:x3; val_offset:22329*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22329*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7444: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7ff800; valaddr_reg:x3; val_offset:22332*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22332*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7445: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7ffc00; valaddr_reg:x3; val_offset:22335*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22335*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7446: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7ffe00; valaddr_reg:x3; val_offset:22338*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22338*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7447: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7fff00; valaddr_reg:x3; val_offset:22341*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22341*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7448: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7fff80; valaddr_reg:x3; val_offset:22344*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22344*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7449: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7fffc0; valaddr_reg:x3; val_offset:22347*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22347*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7450: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7fffe0; valaddr_reg:x3; val_offset:22350*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22350*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7451: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7ffff0; valaddr_reg:x3; val_offset:22353*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22353*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7452: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7ffff8; valaddr_reg:x3; val_offset:22356*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22356*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7453: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7ffffc; valaddr_reg:x3; val_offset:22359*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22359*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7454: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7ffffe; valaddr_reg:x3; val_offset:22362*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22362*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7455: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x78 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbc7fffff; valaddr_reg:x3; val_offset:22365*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22365*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7456: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbf800001; valaddr_reg:x3; val_offset:22368*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22368*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7457: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbf800003; valaddr_reg:x3; val_offset:22371*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22371*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7458: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbf800007; valaddr_reg:x3; val_offset:22374*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22374*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7459: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbf999999; valaddr_reg:x3; val_offset:22377*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22377*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7460: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:22380*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22380*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7461: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:22383*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22383*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7462: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:22386*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22386*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7463: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:22389*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22389*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7464: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:22392*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22392*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7465: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:22395*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22395*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7466: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:22398*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22398*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7467: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:22401*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22401*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7468: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:22404*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22404*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7469: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:22407*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22407*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7470: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:22410*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22410*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7471: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0bf222 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6a25d1 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0bf222; op2val:0x80ea25d1; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:22413*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22413*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7472: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76800000; valaddr_reg:x3; val_offset:22416*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22416*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7473: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76800001; valaddr_reg:x3; val_offset:22419*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22419*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7474: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76800003; valaddr_reg:x3; val_offset:22422*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22422*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7475: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76800007; valaddr_reg:x3; val_offset:22425*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22425*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7476: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7680000f; valaddr_reg:x3; val_offset:22428*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22428*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7477: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7680001f; valaddr_reg:x3; val_offset:22431*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22431*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7478: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7680003f; valaddr_reg:x3; val_offset:22434*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22434*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7479: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7680007f; valaddr_reg:x3; val_offset:22437*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22437*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7480: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x768000ff; valaddr_reg:x3; val_offset:22440*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22440*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7481: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x768001ff; valaddr_reg:x3; val_offset:22443*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22443*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7482: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x768003ff; valaddr_reg:x3; val_offset:22446*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22446*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7483: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x768007ff; valaddr_reg:x3; val_offset:22449*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22449*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7484: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76800fff; valaddr_reg:x3; val_offset:22452*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22452*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7485: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76801fff; valaddr_reg:x3; val_offset:22455*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22455*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7486: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76803fff; valaddr_reg:x3; val_offset:22458*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22458*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7487: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76807fff; valaddr_reg:x3; val_offset:22461*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22461*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7488: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7680ffff; valaddr_reg:x3; val_offset:22464*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22464*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7489: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7681ffff; valaddr_reg:x3; val_offset:22467*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22467*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7490: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7683ffff; valaddr_reg:x3; val_offset:22470*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22470*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7491: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7687ffff; valaddr_reg:x3; val_offset:22473*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22473*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7492: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x768fffff; valaddr_reg:x3; val_offset:22476*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22476*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7493: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x769fffff; valaddr_reg:x3; val_offset:22479*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22479*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7494: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76bfffff; valaddr_reg:x3; val_offset:22482*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22482*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7495: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76c00000; valaddr_reg:x3; val_offset:22485*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22485*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7496: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76e00000; valaddr_reg:x3; val_offset:22488*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22488*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7497: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76f00000; valaddr_reg:x3; val_offset:22491*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22491*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7498: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76f80000; valaddr_reg:x3; val_offset:22494*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22494*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7499: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fc0000; valaddr_reg:x3; val_offset:22497*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22497*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7500: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fe0000; valaddr_reg:x3; val_offset:22500*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22500*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7501: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ff0000; valaddr_reg:x3; val_offset:22503*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22503*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7502: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ff8000; valaddr_reg:x3; val_offset:22506*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22506*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7503: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ffc000; valaddr_reg:x3; val_offset:22509*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22509*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7504: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ffe000; valaddr_reg:x3; val_offset:22512*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22512*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7505: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fff000; valaddr_reg:x3; val_offset:22515*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22515*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7506: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fff800; valaddr_reg:x3; val_offset:22518*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22518*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7507: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fffc00; valaddr_reg:x3; val_offset:22521*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22521*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7508: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fffe00; valaddr_reg:x3; val_offset:22524*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22524*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7509: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ffff00; valaddr_reg:x3; val_offset:22527*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22527*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7510: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ffff80; valaddr_reg:x3; val_offset:22530*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22530*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7511: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ffffc0; valaddr_reg:x3; val_offset:22533*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22533*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7512: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ffffe0; valaddr_reg:x3; val_offset:22536*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22536*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7513: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fffff0; valaddr_reg:x3; val_offset:22539*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22539*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7514: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fffff8; valaddr_reg:x3; val_offset:22542*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22542*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7515: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fffffc; valaddr_reg:x3; val_offset:22545*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22545*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7516: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76fffffe; valaddr_reg:x3; val_offset:22548*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22548*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7517: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xed and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x76ffffff; valaddr_reg:x3; val_offset:22551*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22551*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7518: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f000001; valaddr_reg:x3; val_offset:22554*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22554*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7519: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f000003; valaddr_reg:x3; val_offset:22557*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22557*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7520: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f000007; valaddr_reg:x3; val_offset:22560*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22560*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7521: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f199999; valaddr_reg:x3; val_offset:22563*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22563*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7522: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f249249; valaddr_reg:x3; val_offset:22566*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22566*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7523: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f333333; valaddr_reg:x3; val_offset:22569*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22569*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7524: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:22572*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22572*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7525: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:22575*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22575*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7526: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f444444; valaddr_reg:x3; val_offset:22578*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22578*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7527: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:22581*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22581*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7528: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:22584*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22584*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7529: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f666666; valaddr_reg:x3; val_offset:22587*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22587*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7530: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:22590*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22590*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7531: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:22593*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22593*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7532: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:22596*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22596*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7533: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x0d44f1 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x67f441 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e0d44f1; op2val:0x40e7f441; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:22599*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22599*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7534: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35000000; valaddr_reg:x3; val_offset:22602*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22602*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7535: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35000001; valaddr_reg:x3; val_offset:22605*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22605*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7536: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35000003; valaddr_reg:x3; val_offset:22608*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22608*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7537: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35000007; valaddr_reg:x3; val_offset:22611*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22611*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7538: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3500000f; valaddr_reg:x3; val_offset:22614*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22614*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7539: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3500001f; valaddr_reg:x3; val_offset:22617*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22617*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7540: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3500003f; valaddr_reg:x3; val_offset:22620*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22620*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7541: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3500007f; valaddr_reg:x3; val_offset:22623*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22623*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7542: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x350000ff; valaddr_reg:x3; val_offset:22626*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22626*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7543: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x350001ff; valaddr_reg:x3; val_offset:22629*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22629*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7544: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x350003ff; valaddr_reg:x3; val_offset:22632*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22632*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7545: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x350007ff; valaddr_reg:x3; val_offset:22635*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22635*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7546: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35000fff; valaddr_reg:x3; val_offset:22638*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22638*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7547: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35001fff; valaddr_reg:x3; val_offset:22641*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22641*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7548: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35003fff; valaddr_reg:x3; val_offset:22644*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22644*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7549: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35007fff; valaddr_reg:x3; val_offset:22647*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22647*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7550: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3500ffff; valaddr_reg:x3; val_offset:22650*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22650*0 + 3*58*FLEN/8, x4, x1, x2) + +inst_7551: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3501ffff; valaddr_reg:x3; val_offset:22653*0 + 3*58*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22653*0 + 3*58*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154132991,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154149375,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154182143,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154247679,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154378751,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3154640895,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3155165183,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3156213759,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3158310911,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3158310912,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3160408064,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3161456640,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3161980928,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162243072,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162374144,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162439680,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162472448,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162488832,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162497024,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162501120,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162503168,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162504192,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162504704,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162504960,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162505088,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162505152,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162505184,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162505200,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162505208,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162505212,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162505214,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3162505215,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2114712098,32,FLEN) +NAN_BOXED(2162828753,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100096,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100097,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100099,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100103,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100111,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100127,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100159,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100223,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100351,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988100607,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988101119,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988102143,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988104191,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988108287,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988116479,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988132863,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988165631,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988231167,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988362239,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1988624383,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1989148671,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1990197247,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1992294399,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1992294400,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1994391552,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1995440128,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1995964416,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996226560,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996357632,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996423168,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996455936,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996472320,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996480512,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996484608,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996486656,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996487680,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488192,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488448,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488576,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488640,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488672,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488688,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488696,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488700,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488702,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(1996488703,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2114798833,32,FLEN) +NAN_BOXED(1088943169,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192448,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192449,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192451,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192455,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192463,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192479,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192511,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192575,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192703,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889192959,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889193471,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889194495,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889196543,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889200639,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889208831,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889225215,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889257983,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889323519,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-60.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-60.S new file mode 100644 index 000000000..9299ea001 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-60.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_7552: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3503ffff; valaddr_reg:x3; val_offset:22656*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22656*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7553: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3507ffff; valaddr_reg:x3; val_offset:22659*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22659*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7554: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x350fffff; valaddr_reg:x3; val_offset:22662*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22662*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7555: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x351fffff; valaddr_reg:x3; val_offset:22665*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22665*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7556: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x353fffff; valaddr_reg:x3; val_offset:22668*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22668*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7557: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35400000; valaddr_reg:x3; val_offset:22671*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22671*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7558: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35600000; valaddr_reg:x3; val_offset:22674*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22674*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7559: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35700000; valaddr_reg:x3; val_offset:22677*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22677*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7560: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x35780000; valaddr_reg:x3; val_offset:22680*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22680*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7561: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357c0000; valaddr_reg:x3; val_offset:22683*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22683*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7562: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357e0000; valaddr_reg:x3; val_offset:22686*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22686*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7563: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357f0000; valaddr_reg:x3; val_offset:22689*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22689*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7564: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357f8000; valaddr_reg:x3; val_offset:22692*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22692*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7565: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357fc000; valaddr_reg:x3; val_offset:22695*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22695*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7566: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357fe000; valaddr_reg:x3; val_offset:22698*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22698*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7567: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357ff000; valaddr_reg:x3; val_offset:22701*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22701*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7568: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357ff800; valaddr_reg:x3; val_offset:22704*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22704*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7569: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357ffc00; valaddr_reg:x3; val_offset:22707*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22707*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7570: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357ffe00; valaddr_reg:x3; val_offset:22710*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22710*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7571: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357fff00; valaddr_reg:x3; val_offset:22713*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22713*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7572: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357fff80; valaddr_reg:x3; val_offset:22716*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22716*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7573: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357fffc0; valaddr_reg:x3; val_offset:22719*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22719*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7574: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357fffe0; valaddr_reg:x3; val_offset:22722*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22722*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7575: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357ffff0; valaddr_reg:x3; val_offset:22725*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22725*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7576: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357ffff8; valaddr_reg:x3; val_offset:22728*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22728*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7577: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357ffffc; valaddr_reg:x3; val_offset:22731*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22731*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7578: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357ffffe; valaddr_reg:x3; val_offset:22734*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22734*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7579: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x6a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x357fffff; valaddr_reg:x3; val_offset:22737*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22737*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7580: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3f800001; valaddr_reg:x3; val_offset:22740*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22740*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7581: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3f800003; valaddr_reg:x3; val_offset:22743*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22743*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7582: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3f800007; valaddr_reg:x3; val_offset:22746*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22746*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7583: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3f999999; valaddr_reg:x3; val_offset:22749*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22749*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7584: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:22752*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22752*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7585: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:22755*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22755*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7586: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:22758*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22758*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7587: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:22761*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22761*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7588: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:22764*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22764*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7589: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:22767*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22767*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7590: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:22770*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22770*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7591: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:22773*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22773*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7592: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:22776*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22776*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7593: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:22779*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22779*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7594: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:22782*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22782*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7595: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x10c8a9 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x6252d8 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e10c8a9; op2val:0xe252d8; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:22785*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22785*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7596: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:22788*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22788*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7597: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:22791*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22791*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7598: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:22794*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22794*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7599: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:22797*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22797*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7600: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:22800*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22800*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7601: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:22803*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22803*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7602: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:22806*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22806*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7603: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:22809*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22809*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7604: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:22812*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22812*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7605: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:22815*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22815*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7606: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:22818*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22818*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7607: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:22821*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22821*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7608: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:22824*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22824*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7609: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:22827*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22827*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7610: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:22830*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22830*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7611: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:22833*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22833*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7612: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82000000; valaddr_reg:x3; val_offset:22836*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22836*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7613: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82000001; valaddr_reg:x3; val_offset:22839*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22839*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7614: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82000003; valaddr_reg:x3; val_offset:22842*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22842*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7615: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82000007; valaddr_reg:x3; val_offset:22845*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22845*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7616: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x8200000f; valaddr_reg:x3; val_offset:22848*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22848*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7617: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x8200001f; valaddr_reg:x3; val_offset:22851*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22851*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7618: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x8200003f; valaddr_reg:x3; val_offset:22854*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22854*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7619: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x8200007f; valaddr_reg:x3; val_offset:22857*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22857*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7620: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x820000ff; valaddr_reg:x3; val_offset:22860*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22860*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7621: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x820001ff; valaddr_reg:x3; val_offset:22863*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22863*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7622: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x820003ff; valaddr_reg:x3; val_offset:22866*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22866*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7623: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x820007ff; valaddr_reg:x3; val_offset:22869*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22869*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7624: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82000fff; valaddr_reg:x3; val_offset:22872*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22872*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7625: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82001fff; valaddr_reg:x3; val_offset:22875*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22875*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7626: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82003fff; valaddr_reg:x3; val_offset:22878*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22878*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7627: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82007fff; valaddr_reg:x3; val_offset:22881*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22881*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7628: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x8200ffff; valaddr_reg:x3; val_offset:22884*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22884*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7629: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x8201ffff; valaddr_reg:x3; val_offset:22887*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22887*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7630: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x8203ffff; valaddr_reg:x3; val_offset:22890*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22890*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7631: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x8207ffff; valaddr_reg:x3; val_offset:22893*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22893*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7632: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x820fffff; valaddr_reg:x3; val_offset:22896*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22896*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7633: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x821fffff; valaddr_reg:x3; val_offset:22899*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22899*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7634: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x823fffff; valaddr_reg:x3; val_offset:22902*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22902*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7635: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82400000; valaddr_reg:x3; val_offset:22905*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22905*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7636: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82600000; valaddr_reg:x3; val_offset:22908*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22908*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7637: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82700000; valaddr_reg:x3; val_offset:22911*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22911*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7638: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x82780000; valaddr_reg:x3; val_offset:22914*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22914*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7639: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827c0000; valaddr_reg:x3; val_offset:22917*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22917*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7640: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827e0000; valaddr_reg:x3; val_offset:22920*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22920*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7641: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827f0000; valaddr_reg:x3; val_offset:22923*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22923*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7642: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827f8000; valaddr_reg:x3; val_offset:22926*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22926*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7643: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827fc000; valaddr_reg:x3; val_offset:22929*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22929*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7644: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827fe000; valaddr_reg:x3; val_offset:22932*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22932*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7645: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827ff000; valaddr_reg:x3; val_offset:22935*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22935*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7646: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827ff800; valaddr_reg:x3; val_offset:22938*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22938*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7647: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827ffc00; valaddr_reg:x3; val_offset:22941*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22941*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7648: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827ffe00; valaddr_reg:x3; val_offset:22944*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22944*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7649: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827fff00; valaddr_reg:x3; val_offset:22947*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22947*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7650: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827fff80; valaddr_reg:x3; val_offset:22950*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22950*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7651: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827fffc0; valaddr_reg:x3; val_offset:22953*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22953*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7652: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827fffe0; valaddr_reg:x3; val_offset:22956*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22956*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7653: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827ffff0; valaddr_reg:x3; val_offset:22959*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22959*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7654: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827ffff8; valaddr_reg:x3; val_offset:22962*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22962*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7655: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827ffffc; valaddr_reg:x3; val_offset:22965*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22965*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7656: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827ffffe; valaddr_reg:x3; val_offset:22968*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22968*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7657: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x113ff8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x04 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e113ff8; op2val:0x80000000; +op3val:0x827fffff; valaddr_reg:x3; val_offset:22971*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22971*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7658: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:22974*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22974*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7659: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:22977*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22977*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7660: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:22980*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22980*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7661: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:22983*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22983*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7662: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:22986*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22986*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7663: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:22989*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22989*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7664: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:22992*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22992*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7665: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:22995*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22995*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7666: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:22998*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 22998*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7667: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:23001*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23001*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7668: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:23004*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23004*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7669: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:23007*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23007*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7670: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:23010*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23010*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7671: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:23013*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23013*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7672: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:23016*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23016*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7673: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:23019*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23019*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7674: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90000000; valaddr_reg:x3; val_offset:23022*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23022*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7675: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90000001; valaddr_reg:x3; val_offset:23025*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23025*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7676: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90000003; valaddr_reg:x3; val_offset:23028*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23028*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7677: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90000007; valaddr_reg:x3; val_offset:23031*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23031*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7678: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x9000000f; valaddr_reg:x3; val_offset:23034*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23034*0 + 3*59*FLEN/8, x4, x1, x2) + +inst_7679: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x9000001f; valaddr_reg:x3; val_offset:23037*0 + 3*59*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23037*0 + 3*59*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889454591,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(889716735,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(890241023,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(891289599,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(893386751,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(893386752,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(895483904,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(896532480,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897056768,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897318912,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897449984,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897515520,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897548288,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897564672,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897572864,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897576960,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897579008,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897580032,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897580544,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897580800,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897580928,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897580992,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897581024,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897581040,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897581048,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897581052,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897581054,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(897581055,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2115029161,32,FLEN) +NAN_BOXED(14832344,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038080,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038081,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038083,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038087,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038095,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038111,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038143,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038207,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038335,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181038591,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181039103,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181040127,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181042175,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181046271,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181054463,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181070847,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181103615,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181169151,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181300223,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2181562367,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2182086655,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2183135231,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2185232383,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2185232384,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2187329536,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2188378112,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2188902400,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189164544,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189295616,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189361152,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189393920,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189410304,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189418496,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189422592,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189424640,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189425664,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426176,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426432,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426560,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426624,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426656,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426672,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426680,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426684,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426686,32,FLEN) +NAN_BOXED(2115059704,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426687,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919104,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919105,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919107,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919111,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919119,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919135,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-61.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-61.S new file mode 100644 index 000000000..5f6c0e336 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-61.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_7680: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x9000003f; valaddr_reg:x3; val_offset:23040*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23040*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7681: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x9000007f; valaddr_reg:x3; val_offset:23043*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23043*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7682: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x900000ff; valaddr_reg:x3; val_offset:23046*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23046*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7683: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x900001ff; valaddr_reg:x3; val_offset:23049*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23049*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7684: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x900003ff; valaddr_reg:x3; val_offset:23052*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23052*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7685: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x900007ff; valaddr_reg:x3; val_offset:23055*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23055*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7686: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90000fff; valaddr_reg:x3; val_offset:23058*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23058*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7687: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90001fff; valaddr_reg:x3; val_offset:23061*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23061*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7688: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90003fff; valaddr_reg:x3; val_offset:23064*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23064*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7689: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90007fff; valaddr_reg:x3; val_offset:23067*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23067*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7690: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x9000ffff; valaddr_reg:x3; val_offset:23070*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23070*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7691: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x9001ffff; valaddr_reg:x3; val_offset:23073*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23073*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7692: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x9003ffff; valaddr_reg:x3; val_offset:23076*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23076*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7693: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x9007ffff; valaddr_reg:x3; val_offset:23079*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23079*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7694: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x900fffff; valaddr_reg:x3; val_offset:23082*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23082*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7695: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x901fffff; valaddr_reg:x3; val_offset:23085*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23085*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7696: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x903fffff; valaddr_reg:x3; val_offset:23088*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23088*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7697: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90400000; valaddr_reg:x3; val_offset:23091*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23091*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7698: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90600000; valaddr_reg:x3; val_offset:23094*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23094*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7699: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90700000; valaddr_reg:x3; val_offset:23097*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23097*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7700: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x90780000; valaddr_reg:x3; val_offset:23100*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23100*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7701: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907c0000; valaddr_reg:x3; val_offset:23103*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23103*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7702: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907e0000; valaddr_reg:x3; val_offset:23106*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23106*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7703: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907f0000; valaddr_reg:x3; val_offset:23109*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23109*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7704: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907f8000; valaddr_reg:x3; val_offset:23112*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23112*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7705: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907fc000; valaddr_reg:x3; val_offset:23115*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23115*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7706: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907fe000; valaddr_reg:x3; val_offset:23118*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23118*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7707: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907ff000; valaddr_reg:x3; val_offset:23121*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23121*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7708: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907ff800; valaddr_reg:x3; val_offset:23124*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23124*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7709: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907ffc00; valaddr_reg:x3; val_offset:23127*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23127*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7710: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907ffe00; valaddr_reg:x3; val_offset:23130*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23130*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7711: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907fff00; valaddr_reg:x3; val_offset:23133*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23133*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7712: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907fff80; valaddr_reg:x3; val_offset:23136*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23136*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7713: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907fffc0; valaddr_reg:x3; val_offset:23139*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23139*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7714: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907fffe0; valaddr_reg:x3; val_offset:23142*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23142*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7715: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907ffff0; valaddr_reg:x3; val_offset:23145*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23145*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7716: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907ffff8; valaddr_reg:x3; val_offset:23148*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23148*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7717: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907ffffc; valaddr_reg:x3; val_offset:23151*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23151*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7718: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907ffffe; valaddr_reg:x3; val_offset:23154*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23154*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7719: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1173d9 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1173d9; op2val:0x80000000; +op3val:0x907fffff; valaddr_reg:x3; val_offset:23157*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23157*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7720: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c800000; valaddr_reg:x3; val_offset:23160*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23160*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7721: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c800001; valaddr_reg:x3; val_offset:23163*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23163*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7722: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c800003; valaddr_reg:x3; val_offset:23166*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23166*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7723: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c800007; valaddr_reg:x3; val_offset:23169*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23169*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7724: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c80000f; valaddr_reg:x3; val_offset:23172*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23172*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7725: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c80001f; valaddr_reg:x3; val_offset:23175*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23175*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7726: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c80003f; valaddr_reg:x3; val_offset:23178*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23178*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7727: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c80007f; valaddr_reg:x3; val_offset:23181*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23181*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7728: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c8000ff; valaddr_reg:x3; val_offset:23184*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23184*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7729: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c8001ff; valaddr_reg:x3; val_offset:23187*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23187*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7730: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c8003ff; valaddr_reg:x3; val_offset:23190*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23190*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7731: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c8007ff; valaddr_reg:x3; val_offset:23193*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23193*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7732: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c800fff; valaddr_reg:x3; val_offset:23196*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23196*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7733: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c801fff; valaddr_reg:x3; val_offset:23199*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23199*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7734: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c803fff; valaddr_reg:x3; val_offset:23202*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23202*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7735: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c807fff; valaddr_reg:x3; val_offset:23205*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23205*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7736: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c80ffff; valaddr_reg:x3; val_offset:23208*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23208*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7737: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c81ffff; valaddr_reg:x3; val_offset:23211*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23211*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7738: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c83ffff; valaddr_reg:x3; val_offset:23214*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23214*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7739: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c87ffff; valaddr_reg:x3; val_offset:23217*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23217*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7740: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c8fffff; valaddr_reg:x3; val_offset:23220*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23220*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7741: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2c9fffff; valaddr_reg:x3; val_offset:23223*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23223*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7742: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cbfffff; valaddr_reg:x3; val_offset:23226*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23226*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7743: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cc00000; valaddr_reg:x3; val_offset:23229*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23229*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7744: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2ce00000; valaddr_reg:x3; val_offset:23232*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23232*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7745: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cf00000; valaddr_reg:x3; val_offset:23235*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23235*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7746: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cf80000; valaddr_reg:x3; val_offset:23238*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23238*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7747: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfc0000; valaddr_reg:x3; val_offset:23241*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23241*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7748: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfe0000; valaddr_reg:x3; val_offset:23244*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23244*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7749: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cff0000; valaddr_reg:x3; val_offset:23247*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23247*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7750: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cff8000; valaddr_reg:x3; val_offset:23250*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23250*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7751: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cffc000; valaddr_reg:x3; val_offset:23253*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23253*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7752: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cffe000; valaddr_reg:x3; val_offset:23256*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23256*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7753: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfff000; valaddr_reg:x3; val_offset:23259*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23259*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7754: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfff800; valaddr_reg:x3; val_offset:23262*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23262*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7755: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfffc00; valaddr_reg:x3; val_offset:23265*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23265*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7756: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfffe00; valaddr_reg:x3; val_offset:23268*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23268*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7757: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cffff00; valaddr_reg:x3; val_offset:23271*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23271*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7758: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cffff80; valaddr_reg:x3; val_offset:23274*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23274*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7759: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cffffc0; valaddr_reg:x3; val_offset:23277*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23277*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7760: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cffffe0; valaddr_reg:x3; val_offset:23280*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23280*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7761: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfffff0; valaddr_reg:x3; val_offset:23283*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23283*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7762: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfffff8; valaddr_reg:x3; val_offset:23286*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23286*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7763: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfffffc; valaddr_reg:x3; val_offset:23289*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23289*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7764: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cfffffe; valaddr_reg:x3; val_offset:23292*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23292*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7765: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x59 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x2cffffff; valaddr_reg:x3; val_offset:23295*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23295*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7766: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3f800001; valaddr_reg:x3; val_offset:23298*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23298*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7767: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3f800003; valaddr_reg:x3; val_offset:23301*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23301*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7768: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3f800007; valaddr_reg:x3; val_offset:23304*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23304*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7769: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3f999999; valaddr_reg:x3; val_offset:23307*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23307*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7770: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:23310*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23310*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7771: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:23313*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23313*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7772: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:23316*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23316*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7773: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:23319*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23319*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7774: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:23322*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23322*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7775: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:23325*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23325*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7776: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:23328*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23328*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7777: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:23331*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23331*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7778: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:23334*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23334*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7779: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:23337*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23337*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7780: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:23340*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23340*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7781: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x123600 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x601d52 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e123600; op2val:0xe01d52; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:23343*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23343*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7782: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9800000; valaddr_reg:x3; val_offset:23346*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23346*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7783: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9800001; valaddr_reg:x3; val_offset:23349*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23349*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7784: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9800003; valaddr_reg:x3; val_offset:23352*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23352*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7785: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9800007; valaddr_reg:x3; val_offset:23355*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23355*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7786: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb980000f; valaddr_reg:x3; val_offset:23358*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23358*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7787: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb980001f; valaddr_reg:x3; val_offset:23361*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23361*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7788: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb980003f; valaddr_reg:x3; val_offset:23364*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23364*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7789: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb980007f; valaddr_reg:x3; val_offset:23367*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23367*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7790: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb98000ff; valaddr_reg:x3; val_offset:23370*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23370*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7791: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb98001ff; valaddr_reg:x3; val_offset:23373*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23373*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7792: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb98003ff; valaddr_reg:x3; val_offset:23376*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23376*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7793: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb98007ff; valaddr_reg:x3; val_offset:23379*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23379*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7794: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9800fff; valaddr_reg:x3; val_offset:23382*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23382*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7795: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9801fff; valaddr_reg:x3; val_offset:23385*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23385*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7796: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9803fff; valaddr_reg:x3; val_offset:23388*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23388*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7797: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9807fff; valaddr_reg:x3; val_offset:23391*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23391*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7798: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb980ffff; valaddr_reg:x3; val_offset:23394*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23394*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7799: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb981ffff; valaddr_reg:x3; val_offset:23397*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23397*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7800: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb983ffff; valaddr_reg:x3; val_offset:23400*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23400*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7801: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb987ffff; valaddr_reg:x3; val_offset:23403*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23403*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7802: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb98fffff; valaddr_reg:x3; val_offset:23406*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23406*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7803: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb99fffff; valaddr_reg:x3; val_offset:23409*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23409*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7804: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9bfffff; valaddr_reg:x3; val_offset:23412*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23412*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7805: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9c00000; valaddr_reg:x3; val_offset:23415*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23415*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7806: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9e00000; valaddr_reg:x3; val_offset:23418*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23418*0 + 3*60*FLEN/8, x4, x1, x2) + +inst_7807: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9f00000; valaddr_reg:x3; val_offset:23421*0 + 3*60*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23421*0 + 3*60*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919167,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919231,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919359,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919615,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415920127,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415921151,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415923199,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415927295,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415935487,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415951871,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415984639,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416050175,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416181247,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416443391,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416967679,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2418016255,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2420113407,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2420113408,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2422210560,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2423259136,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2423783424,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424045568,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424176640,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424242176,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424274944,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424291328,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424299520,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424303616,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424305664,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424306688,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307200,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307456,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307584,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307648,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307680,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307696,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307704,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307708,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307710,32,FLEN) +NAN_BOXED(2115072985,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307711,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586112,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586113,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586115,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586119,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586127,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586143,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586175,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586239,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586367,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746586623,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746587135,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746588159,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746590207,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746594303,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746602495,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746618879,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746651647,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746717183,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(746848255,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(747110399,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(747634687,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(748683263,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(750780415,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(750780416,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(752877568,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(753926144,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754450432,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754712576,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754843648,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754909184,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754941952,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754958336,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754966528,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754970624,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754972672,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754973696,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974208,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974464,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974592,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974656,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974688,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974704,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974712,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974716,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974718,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(754974719,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2115122688,32,FLEN) +NAN_BOXED(14687570,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173568,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173569,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173571,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173575,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173583,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173599,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173631,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173695,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112173823,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112174079,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112174591,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112175615,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112177663,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112181759,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112189951,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112206335,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112239103,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112304639,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112435711,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3112697855,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3113222143,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3114270719,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3116367871,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3116367872,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3118465024,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3119513600,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-62.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-62.S new file mode 100644 index 000000000..08fc9d5d0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-62.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_7808: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9f80000; valaddr_reg:x3; val_offset:23424*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23424*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7809: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fc0000; valaddr_reg:x3; val_offset:23427*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23427*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7810: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fe0000; valaddr_reg:x3; val_offset:23430*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23430*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7811: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ff0000; valaddr_reg:x3; val_offset:23433*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23433*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7812: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ff8000; valaddr_reg:x3; val_offset:23436*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23436*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7813: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ffc000; valaddr_reg:x3; val_offset:23439*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23439*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7814: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ffe000; valaddr_reg:x3; val_offset:23442*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23442*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7815: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fff000; valaddr_reg:x3; val_offset:23445*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23445*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7816: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fff800; valaddr_reg:x3; val_offset:23448*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23448*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7817: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fffc00; valaddr_reg:x3; val_offset:23451*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23451*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7818: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fffe00; valaddr_reg:x3; val_offset:23454*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23454*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7819: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ffff00; valaddr_reg:x3; val_offset:23457*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23457*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7820: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ffff80; valaddr_reg:x3; val_offset:23460*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23460*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7821: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ffffc0; valaddr_reg:x3; val_offset:23463*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23463*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7822: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ffffe0; valaddr_reg:x3; val_offset:23466*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23466*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7823: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fffff0; valaddr_reg:x3; val_offset:23469*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23469*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7824: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fffff8; valaddr_reg:x3; val_offset:23472*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23472*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7825: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fffffc; valaddr_reg:x3; val_offset:23475*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23475*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7826: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9fffffe; valaddr_reg:x3; val_offset:23478*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23478*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7827: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x73 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xb9ffffff; valaddr_reg:x3; val_offset:23481*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23481*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7828: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbf800001; valaddr_reg:x3; val_offset:23484*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23484*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7829: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbf800003; valaddr_reg:x3; val_offset:23487*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23487*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7830: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbf800007; valaddr_reg:x3; val_offset:23490*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23490*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7831: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbf999999; valaddr_reg:x3; val_offset:23493*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23493*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7832: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:23496*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23496*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7833: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:23499*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23499*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7834: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:23502*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23502*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7835: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:23505*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23505*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7836: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:23508*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23508*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7837: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:23511*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23511*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7838: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:23514*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23514*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7839: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:23517*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23517*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7840: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:23520*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23520*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7841: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:23523*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23523*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7842: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:23526*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23526*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7843: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1245f1 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x6004e5 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1245f1; op2val:0x80e004e5; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:23529*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23529*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7844: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:23532*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23532*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7845: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:23535*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23535*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7846: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:23538*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23538*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7847: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:23541*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23541*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7848: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:23544*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23544*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7849: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:23547*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23547*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7850: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:23550*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23550*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7851: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:23553*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23553*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7852: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:23556*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23556*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7853: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:23559*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23559*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7854: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:23562*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23562*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7855: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:23565*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23565*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7856: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:23568*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23568*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7857: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:23571*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23571*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7858: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:23574*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23574*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7859: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:23577*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23577*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7860: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84000000; valaddr_reg:x3; val_offset:23580*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23580*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7861: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84000001; valaddr_reg:x3; val_offset:23583*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23583*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7862: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84000003; valaddr_reg:x3; val_offset:23586*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23586*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7863: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84000007; valaddr_reg:x3; val_offset:23589*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23589*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7864: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8400000f; valaddr_reg:x3; val_offset:23592*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23592*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7865: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8400001f; valaddr_reg:x3; val_offset:23595*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23595*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7866: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8400003f; valaddr_reg:x3; val_offset:23598*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23598*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7867: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8400007f; valaddr_reg:x3; val_offset:23601*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23601*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7868: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x840000ff; valaddr_reg:x3; val_offset:23604*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23604*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7869: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x840001ff; valaddr_reg:x3; val_offset:23607*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23607*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7870: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x840003ff; valaddr_reg:x3; val_offset:23610*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23610*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7871: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x840007ff; valaddr_reg:x3; val_offset:23613*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23613*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7872: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84000fff; valaddr_reg:x3; val_offset:23616*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23616*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7873: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84001fff; valaddr_reg:x3; val_offset:23619*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23619*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7874: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84003fff; valaddr_reg:x3; val_offset:23622*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23622*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7875: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84007fff; valaddr_reg:x3; val_offset:23625*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23625*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7876: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8400ffff; valaddr_reg:x3; val_offset:23628*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23628*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7877: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8401ffff; valaddr_reg:x3; val_offset:23631*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23631*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7878: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8403ffff; valaddr_reg:x3; val_offset:23634*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23634*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7879: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x8407ffff; valaddr_reg:x3; val_offset:23637*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23637*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7880: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x840fffff; valaddr_reg:x3; val_offset:23640*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23640*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7881: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x841fffff; valaddr_reg:x3; val_offset:23643*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23643*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7882: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x843fffff; valaddr_reg:x3; val_offset:23646*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23646*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7883: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84400000; valaddr_reg:x3; val_offset:23649*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23649*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7884: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84600000; valaddr_reg:x3; val_offset:23652*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23652*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7885: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84700000; valaddr_reg:x3; val_offset:23655*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23655*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7886: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x84780000; valaddr_reg:x3; val_offset:23658*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23658*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7887: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847c0000; valaddr_reg:x3; val_offset:23661*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23661*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7888: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847e0000; valaddr_reg:x3; val_offset:23664*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23664*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7889: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847f0000; valaddr_reg:x3; val_offset:23667*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23667*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7890: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847f8000; valaddr_reg:x3; val_offset:23670*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23670*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7891: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847fc000; valaddr_reg:x3; val_offset:23673*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23673*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7892: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847fe000; valaddr_reg:x3; val_offset:23676*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23676*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7893: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847ff000; valaddr_reg:x3; val_offset:23679*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23679*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7894: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847ff800; valaddr_reg:x3; val_offset:23682*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23682*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7895: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847ffc00; valaddr_reg:x3; val_offset:23685*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23685*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7896: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847ffe00; valaddr_reg:x3; val_offset:23688*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23688*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7897: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847fff00; valaddr_reg:x3; val_offset:23691*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23691*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7898: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847fff80; valaddr_reg:x3; val_offset:23694*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23694*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7899: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847fffc0; valaddr_reg:x3; val_offset:23697*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23697*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7900: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847fffe0; valaddr_reg:x3; val_offset:23700*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23700*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7901: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847ffff0; valaddr_reg:x3; val_offset:23703*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23703*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7902: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847ffff8; valaddr_reg:x3; val_offset:23706*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23706*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7903: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847ffffc; valaddr_reg:x3; val_offset:23709*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23709*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7904: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847ffffe; valaddr_reg:x3; val_offset:23712*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23712*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7905: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x12bd51 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e12bd51; op2val:0x80000000; +op3val:0x847fffff; valaddr_reg:x3; val_offset:23715*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23715*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7906: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:23718*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23718*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7907: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:23721*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23721*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7908: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:23724*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23724*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7909: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:23727*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23727*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7910: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:23730*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23730*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7911: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:23733*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23733*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7912: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:23736*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23736*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7913: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:23739*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23739*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7914: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:23742*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23742*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7915: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:23745*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23745*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7916: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:23748*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23748*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7917: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:23751*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23751*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7918: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:23754*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23754*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7919: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:23757*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23757*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7920: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:23760*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23760*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7921: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:23763*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23763*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7922: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85800000; valaddr_reg:x3; val_offset:23766*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23766*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7923: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85800001; valaddr_reg:x3; val_offset:23769*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23769*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7924: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85800003; valaddr_reg:x3; val_offset:23772*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23772*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7925: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85800007; valaddr_reg:x3; val_offset:23775*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23775*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7926: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8580000f; valaddr_reg:x3; val_offset:23778*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23778*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7927: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8580001f; valaddr_reg:x3; val_offset:23781*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23781*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7928: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8580003f; valaddr_reg:x3; val_offset:23784*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23784*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7929: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8580007f; valaddr_reg:x3; val_offset:23787*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23787*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7930: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x858000ff; valaddr_reg:x3; val_offset:23790*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23790*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7931: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x858001ff; valaddr_reg:x3; val_offset:23793*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23793*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7932: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x858003ff; valaddr_reg:x3; val_offset:23796*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23796*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7933: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x858007ff; valaddr_reg:x3; val_offset:23799*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23799*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7934: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85800fff; valaddr_reg:x3; val_offset:23802*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23802*0 + 3*61*FLEN/8, x4, x1, x2) + +inst_7935: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85801fff; valaddr_reg:x3; val_offset:23805*0 + 3*61*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23805*0 + 3*61*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120037888,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120300032,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120431104,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120496640,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120529408,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120545792,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120553984,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120558080,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120560128,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120561152,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120561664,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120561920,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120562048,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120562112,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120562144,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120562160,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120562168,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120562172,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120562174,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3120562175,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2115126769,32,FLEN) +NAN_BOXED(2162164965,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592512,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592513,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592515,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592519,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592527,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592543,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592575,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592639,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592767,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214593023,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214593535,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214594559,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214596607,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214600703,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214608895,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214625279,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214658047,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214723583,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214854655,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2215116799,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2215641087,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2216689663,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2218786815,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2218786816,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2220883968,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2221932544,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222456832,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222718976,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222850048,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222915584,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222948352,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222964736,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222972928,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222977024,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222979072,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980096,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980608,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980864,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222980992,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981056,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981088,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981104,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981112,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981116,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981118,32,FLEN) +NAN_BOXED(2115157329,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981119,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758336,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758337,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758339,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758343,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758351,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758367,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758399,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758463,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758591,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758847,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239759359,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239760383,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239762431,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239766527,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-63.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-63.S new file mode 100644 index 000000000..9554bfb39 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-63.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_7936: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85803fff; valaddr_reg:x3; val_offset:23808*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23808*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7937: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85807fff; valaddr_reg:x3; val_offset:23811*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23811*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7938: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8580ffff; valaddr_reg:x3; val_offset:23814*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23814*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7939: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8581ffff; valaddr_reg:x3; val_offset:23817*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23817*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7940: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8583ffff; valaddr_reg:x3; val_offset:23820*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23820*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7941: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x8587ffff; valaddr_reg:x3; val_offset:23823*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23823*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7942: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x858fffff; valaddr_reg:x3; val_offset:23826*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23826*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7943: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x859fffff; valaddr_reg:x3; val_offset:23829*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23829*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7944: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85bfffff; valaddr_reg:x3; val_offset:23832*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23832*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7945: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85c00000; valaddr_reg:x3; val_offset:23835*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23835*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7946: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85e00000; valaddr_reg:x3; val_offset:23838*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23838*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7947: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85f00000; valaddr_reg:x3; val_offset:23841*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23841*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7948: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85f80000; valaddr_reg:x3; val_offset:23844*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23844*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7949: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fc0000; valaddr_reg:x3; val_offset:23847*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23847*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7950: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fe0000; valaddr_reg:x3; val_offset:23850*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23850*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7951: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ff0000; valaddr_reg:x3; val_offset:23853*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23853*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7952: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ff8000; valaddr_reg:x3; val_offset:23856*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23856*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7953: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ffc000; valaddr_reg:x3; val_offset:23859*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23859*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7954: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ffe000; valaddr_reg:x3; val_offset:23862*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23862*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7955: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fff000; valaddr_reg:x3; val_offset:23865*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23865*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7956: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fff800; valaddr_reg:x3; val_offset:23868*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23868*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7957: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fffc00; valaddr_reg:x3; val_offset:23871*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23871*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7958: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fffe00; valaddr_reg:x3; val_offset:23874*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23874*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7959: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ffff00; valaddr_reg:x3; val_offset:23877*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23877*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7960: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ffff80; valaddr_reg:x3; val_offset:23880*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23880*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7961: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ffffc0; valaddr_reg:x3; val_offset:23883*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23883*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7962: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ffffe0; valaddr_reg:x3; val_offset:23886*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23886*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7963: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fffff0; valaddr_reg:x3; val_offset:23889*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23889*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7964: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fffff8; valaddr_reg:x3; val_offset:23892*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23892*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7965: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fffffc; valaddr_reg:x3; val_offset:23895*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23895*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7966: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85fffffe; valaddr_reg:x3; val_offset:23898*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23898*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7967: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1369ec and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1369ec; op2val:0x80000000; +op3val:0x85ffffff; valaddr_reg:x3; val_offset:23901*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23901*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7968: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38800000; valaddr_reg:x3; val_offset:23904*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23904*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7969: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38800001; valaddr_reg:x3; val_offset:23907*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23907*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7970: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38800003; valaddr_reg:x3; val_offset:23910*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23910*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7971: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38800007; valaddr_reg:x3; val_offset:23913*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23913*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7972: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3880000f; valaddr_reg:x3; val_offset:23916*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23916*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7973: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3880001f; valaddr_reg:x3; val_offset:23919*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23919*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7974: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3880003f; valaddr_reg:x3; val_offset:23922*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23922*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7975: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3880007f; valaddr_reg:x3; val_offset:23925*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23925*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7976: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x388000ff; valaddr_reg:x3; val_offset:23928*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23928*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7977: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x388001ff; valaddr_reg:x3; val_offset:23931*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23931*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7978: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x388003ff; valaddr_reg:x3; val_offset:23934*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23934*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7979: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x388007ff; valaddr_reg:x3; val_offset:23937*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23937*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7980: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38800fff; valaddr_reg:x3; val_offset:23940*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23940*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7981: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38801fff; valaddr_reg:x3; val_offset:23943*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23943*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7982: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38803fff; valaddr_reg:x3; val_offset:23946*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23946*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7983: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38807fff; valaddr_reg:x3; val_offset:23949*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23949*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7984: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3880ffff; valaddr_reg:x3; val_offset:23952*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23952*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7985: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3881ffff; valaddr_reg:x3; val_offset:23955*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23955*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7986: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3883ffff; valaddr_reg:x3; val_offset:23958*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23958*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7987: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3887ffff; valaddr_reg:x3; val_offset:23961*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23961*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7988: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x388fffff; valaddr_reg:x3; val_offset:23964*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23964*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7989: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x389fffff; valaddr_reg:x3; val_offset:23967*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23967*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7990: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38bfffff; valaddr_reg:x3; val_offset:23970*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23970*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7991: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38c00000; valaddr_reg:x3; val_offset:23973*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23973*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7992: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38e00000; valaddr_reg:x3; val_offset:23976*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23976*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7993: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38f00000; valaddr_reg:x3; val_offset:23979*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23979*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7994: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38f80000; valaddr_reg:x3; val_offset:23982*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23982*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7995: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fc0000; valaddr_reg:x3; val_offset:23985*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23985*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7996: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fe0000; valaddr_reg:x3; val_offset:23988*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23988*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7997: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ff0000; valaddr_reg:x3; val_offset:23991*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23991*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7998: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ff8000; valaddr_reg:x3; val_offset:23994*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23994*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_7999: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ffc000; valaddr_reg:x3; val_offset:23997*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 23997*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8000: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ffe000; valaddr_reg:x3; val_offset:24000*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24000*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8001: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fff000; valaddr_reg:x3; val_offset:24003*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24003*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8002: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fff800; valaddr_reg:x3; val_offset:24006*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24006*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8003: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fffc00; valaddr_reg:x3; val_offset:24009*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24009*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8004: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fffe00; valaddr_reg:x3; val_offset:24012*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24012*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8005: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ffff00; valaddr_reg:x3; val_offset:24015*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24015*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8006: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ffff80; valaddr_reg:x3; val_offset:24018*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24018*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8007: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ffffc0; valaddr_reg:x3; val_offset:24021*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24021*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8008: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ffffe0; valaddr_reg:x3; val_offset:24024*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24024*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8009: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fffff0; valaddr_reg:x3; val_offset:24027*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24027*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8010: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fffff8; valaddr_reg:x3; val_offset:24030*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24030*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8011: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fffffc; valaddr_reg:x3; val_offset:24033*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24033*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8012: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38fffffe; valaddr_reg:x3; val_offset:24036*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24036*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8013: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x71 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x38ffffff; valaddr_reg:x3; val_offset:24039*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24039*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8014: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3f800001; valaddr_reg:x3; val_offset:24042*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24042*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8015: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3f800003; valaddr_reg:x3; val_offset:24045*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24045*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8016: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3f800007; valaddr_reg:x3; val_offset:24048*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24048*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8017: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3f999999; valaddr_reg:x3; val_offset:24051*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24051*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8018: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:24054*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24054*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8019: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:24057*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24057*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8020: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:24060*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24060*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8021: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:24063*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24063*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8022: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:24066*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24066*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8023: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:24069*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24069*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8024: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:24072*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24072*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8025: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:24075*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24075*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8026: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:24078*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24078*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8027: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:24081*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24081*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8028: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:24084*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24084*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8029: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x157223 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x5b436c and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e157223; op2val:0xdb436c; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:24087*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24087*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8030: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba800000; valaddr_reg:x3; val_offset:24090*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24090*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8031: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba800001; valaddr_reg:x3; val_offset:24093*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24093*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8032: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba800003; valaddr_reg:x3; val_offset:24096*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24096*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8033: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba800007; valaddr_reg:x3; val_offset:24099*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24099*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8034: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba80000f; valaddr_reg:x3; val_offset:24102*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24102*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8035: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba80001f; valaddr_reg:x3; val_offset:24105*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24105*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8036: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba80003f; valaddr_reg:x3; val_offset:24108*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24108*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8037: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba80007f; valaddr_reg:x3; val_offset:24111*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24111*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8038: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba8000ff; valaddr_reg:x3; val_offset:24114*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24114*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8039: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba8001ff; valaddr_reg:x3; val_offset:24117*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24117*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8040: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba8003ff; valaddr_reg:x3; val_offset:24120*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24120*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8041: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba8007ff; valaddr_reg:x3; val_offset:24123*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24123*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8042: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba800fff; valaddr_reg:x3; val_offset:24126*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24126*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8043: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba801fff; valaddr_reg:x3; val_offset:24129*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24129*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8044: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba803fff; valaddr_reg:x3; val_offset:24132*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24132*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8045: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba807fff; valaddr_reg:x3; val_offset:24135*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24135*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8046: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba80ffff; valaddr_reg:x3; val_offset:24138*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24138*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8047: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba81ffff; valaddr_reg:x3; val_offset:24141*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24141*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8048: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba83ffff; valaddr_reg:x3; val_offset:24144*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24144*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8049: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba87ffff; valaddr_reg:x3; val_offset:24147*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24147*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8050: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba8fffff; valaddr_reg:x3; val_offset:24150*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24150*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8051: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xba9fffff; valaddr_reg:x3; val_offset:24153*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24153*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8052: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbabfffff; valaddr_reg:x3; val_offset:24156*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24156*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8053: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbac00000; valaddr_reg:x3; val_offset:24159*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24159*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8054: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbae00000; valaddr_reg:x3; val_offset:24162*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24162*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8055: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaf00000; valaddr_reg:x3; val_offset:24165*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24165*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8056: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaf80000; valaddr_reg:x3; val_offset:24168*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24168*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8057: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafc0000; valaddr_reg:x3; val_offset:24171*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24171*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8058: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafe0000; valaddr_reg:x3; val_offset:24174*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24174*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8059: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaff0000; valaddr_reg:x3; val_offset:24177*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24177*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8060: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaff8000; valaddr_reg:x3; val_offset:24180*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24180*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8061: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaffc000; valaddr_reg:x3; val_offset:24183*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24183*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8062: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaffe000; valaddr_reg:x3; val_offset:24186*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24186*0 + 3*62*FLEN/8, x4, x1, x2) + +inst_8063: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafff000; valaddr_reg:x3; val_offset:24189*0 + 3*62*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24189*0 + 3*62*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239774719,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239791103,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239823871,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239889407,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240020479,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240282623,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2240806911,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2241855487,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2243952639,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2243952640,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2246049792,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247098368,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247622656,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2247884800,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248015872,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248081408,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248114176,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248130560,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248138752,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248142848,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248144896,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248145920,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146432,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146688,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146816,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146880,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146912,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146928,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146936,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146940,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146942,32,FLEN) +NAN_BOXED(2115201516,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2248146943,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912704,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912705,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912707,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912711,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912719,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912735,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912767,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912831,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947912959,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947913215,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947913727,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947914751,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947916799,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947920895,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947929087,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947945471,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(947978239,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(948043775,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(948174847,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(948436991,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(948961279,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(950009855,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(952107007,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(952107008,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(954204160,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(955252736,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(955777024,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956039168,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956170240,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956235776,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956268544,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956284928,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956293120,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956297216,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956299264,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956300288,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956300800,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301056,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301184,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301248,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301280,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301296,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301304,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301308,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301310,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(956301311,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2115334691,32,FLEN) +NAN_BOXED(14369644,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128950784,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128950785,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128950787,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128950791,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128950799,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128950815,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128950847,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128950911,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128951039,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128951295,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128951807,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128952831,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128954879,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128958975,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128967167,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3128983551,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3129016319,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3129081855,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3129212927,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3129475071,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3129999359,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3131047935,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3133145087,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3133145088,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3135242240,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3136290816,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3136815104,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137077248,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137208320,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137273856,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137306624,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137323008,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137331200,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137335296,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-64.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-64.S new file mode 100644 index 000000000..d16baff56 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-64.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_8064: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafff800; valaddr_reg:x3; val_offset:24192*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24192*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8065: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafffc00; valaddr_reg:x3; val_offset:24195*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24195*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8066: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafffe00; valaddr_reg:x3; val_offset:24198*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24198*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8067: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaffff00; valaddr_reg:x3; val_offset:24201*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24201*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8068: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaffff80; valaddr_reg:x3; val_offset:24204*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24204*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8069: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaffffc0; valaddr_reg:x3; val_offset:24207*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24207*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8070: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaffffe0; valaddr_reg:x3; val_offset:24210*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24210*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8071: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafffff0; valaddr_reg:x3; val_offset:24213*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24213*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8072: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafffff8; valaddr_reg:x3; val_offset:24216*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24216*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8073: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafffffc; valaddr_reg:x3; val_offset:24219*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24219*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8074: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbafffffe; valaddr_reg:x3; val_offset:24222*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24222*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8075: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x75 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbaffffff; valaddr_reg:x3; val_offset:24225*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24225*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8076: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbf800001; valaddr_reg:x3; val_offset:24228*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24228*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8077: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbf800003; valaddr_reg:x3; val_offset:24231*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24231*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8078: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbf800007; valaddr_reg:x3; val_offset:24234*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24234*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8079: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbf999999; valaddr_reg:x3; val_offset:24237*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24237*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8080: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:24240*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24240*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8081: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:24243*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24243*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8082: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:24246*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24246*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8083: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:24249*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24249*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8084: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:24252*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24252*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8085: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:24255*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24255*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8086: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:24258*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24258*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8087: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:24261*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24261*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8088: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:24264*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24264*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8089: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:24267*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24267*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8090: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:24270*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24270*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8091: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1875e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x56ed7d and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1875e7; op2val:0x80d6ed7d; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:24273*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24273*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8092: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:24276*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24276*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8093: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:24279*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24279*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8094: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:24282*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24282*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8095: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:24285*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24285*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8096: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:24288*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24288*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8097: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:24291*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24291*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8098: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:24294*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24294*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8099: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:24297*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24297*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8100: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:24300*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24300*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8101: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:24303*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24303*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8102: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:24306*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24306*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8103: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:24309*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24309*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8104: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:24312*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24312*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8105: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:24315*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24315*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8106: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:24318*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24318*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8107: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:24321*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24321*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8108: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89000000; valaddr_reg:x3; val_offset:24324*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24324*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8109: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89000001; valaddr_reg:x3; val_offset:24327*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24327*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8110: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89000003; valaddr_reg:x3; val_offset:24330*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24330*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8111: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89000007; valaddr_reg:x3; val_offset:24333*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24333*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8112: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8900000f; valaddr_reg:x3; val_offset:24336*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24336*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8113: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8900001f; valaddr_reg:x3; val_offset:24339*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24339*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8114: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8900003f; valaddr_reg:x3; val_offset:24342*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24342*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8115: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8900007f; valaddr_reg:x3; val_offset:24345*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24345*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8116: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x890000ff; valaddr_reg:x3; val_offset:24348*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24348*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8117: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x890001ff; valaddr_reg:x3; val_offset:24351*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24351*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8118: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x890003ff; valaddr_reg:x3; val_offset:24354*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24354*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8119: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x890007ff; valaddr_reg:x3; val_offset:24357*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24357*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8120: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89000fff; valaddr_reg:x3; val_offset:24360*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24360*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8121: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89001fff; valaddr_reg:x3; val_offset:24363*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24363*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8122: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89003fff; valaddr_reg:x3; val_offset:24366*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24366*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8123: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89007fff; valaddr_reg:x3; val_offset:24369*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24369*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8124: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8900ffff; valaddr_reg:x3; val_offset:24372*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24372*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8125: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8901ffff; valaddr_reg:x3; val_offset:24375*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24375*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8126: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8903ffff; valaddr_reg:x3; val_offset:24378*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24378*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8127: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x8907ffff; valaddr_reg:x3; val_offset:24381*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24381*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8128: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x890fffff; valaddr_reg:x3; val_offset:24384*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24384*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8129: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x891fffff; valaddr_reg:x3; val_offset:24387*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24387*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8130: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x893fffff; valaddr_reg:x3; val_offset:24390*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24390*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8131: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89400000; valaddr_reg:x3; val_offset:24393*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24393*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8132: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89600000; valaddr_reg:x3; val_offset:24396*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24396*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8133: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89700000; valaddr_reg:x3; val_offset:24399*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24399*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8134: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x89780000; valaddr_reg:x3; val_offset:24402*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24402*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8135: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897c0000; valaddr_reg:x3; val_offset:24405*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24405*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8136: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897e0000; valaddr_reg:x3; val_offset:24408*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24408*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8137: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897f0000; valaddr_reg:x3; val_offset:24411*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24411*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8138: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897f8000; valaddr_reg:x3; val_offset:24414*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24414*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8139: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897fc000; valaddr_reg:x3; val_offset:24417*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24417*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8140: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897fe000; valaddr_reg:x3; val_offset:24420*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24420*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8141: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897ff000; valaddr_reg:x3; val_offset:24423*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24423*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8142: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897ff800; valaddr_reg:x3; val_offset:24426*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24426*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8143: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897ffc00; valaddr_reg:x3; val_offset:24429*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24429*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8144: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897ffe00; valaddr_reg:x3; val_offset:24432*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24432*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8145: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897fff00; valaddr_reg:x3; val_offset:24435*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24435*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8146: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897fff80; valaddr_reg:x3; val_offset:24438*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24438*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8147: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897fffc0; valaddr_reg:x3; val_offset:24441*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24441*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8148: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897fffe0; valaddr_reg:x3; val_offset:24444*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24444*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8149: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897ffff0; valaddr_reg:x3; val_offset:24447*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24447*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8150: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897ffff8; valaddr_reg:x3; val_offset:24450*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24450*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8151: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897ffffc; valaddr_reg:x3; val_offset:24453*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24453*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8152: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897ffffe; valaddr_reg:x3; val_offset:24456*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24456*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8153: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1ae574 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1ae574; op2val:0x80000000; +op3val:0x897fffff; valaddr_reg:x3; val_offset:24459*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24459*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8154: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:24462*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24462*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8155: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:24465*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24465*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8156: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:24468*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24468*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8157: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:24471*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24471*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8158: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:24474*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24474*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8159: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:24477*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24477*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8160: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:24480*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24480*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8161: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:24483*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24483*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8162: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:24486*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24486*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8163: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:24489*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24489*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8164: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:24492*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24492*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8165: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:24495*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24495*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8166: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:24498*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24498*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8167: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:24501*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24501*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8168: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:24504*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24504*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8169: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:24507*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24507*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8170: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3000000; valaddr_reg:x3; val_offset:24510*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24510*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8171: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3000001; valaddr_reg:x3; val_offset:24513*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24513*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8172: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3000003; valaddr_reg:x3; val_offset:24516*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24516*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8173: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3000007; valaddr_reg:x3; val_offset:24519*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24519*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8174: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x300000f; valaddr_reg:x3; val_offset:24522*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24522*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8175: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x300001f; valaddr_reg:x3; val_offset:24525*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24525*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8176: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x300003f; valaddr_reg:x3; val_offset:24528*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24528*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8177: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x300007f; valaddr_reg:x3; val_offset:24531*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24531*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8178: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x30000ff; valaddr_reg:x3; val_offset:24534*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24534*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8179: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x30001ff; valaddr_reg:x3; val_offset:24537*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24537*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8180: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x30003ff; valaddr_reg:x3; val_offset:24540*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24540*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8181: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x30007ff; valaddr_reg:x3; val_offset:24543*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24543*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8182: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3000fff; valaddr_reg:x3; val_offset:24546*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24546*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8183: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3001fff; valaddr_reg:x3; val_offset:24549*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24549*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8184: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3003fff; valaddr_reg:x3; val_offset:24552*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24552*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8185: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3007fff; valaddr_reg:x3; val_offset:24555*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24555*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8186: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x300ffff; valaddr_reg:x3; val_offset:24558*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24558*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8187: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x301ffff; valaddr_reg:x3; val_offset:24561*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24561*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8188: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x303ffff; valaddr_reg:x3; val_offset:24564*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24564*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8189: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x307ffff; valaddr_reg:x3; val_offset:24567*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24567*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8190: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x30fffff; valaddr_reg:x3; val_offset:24570*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24570*0 + 3*63*FLEN/8, x4, x1, x2) + +inst_8191: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x31fffff; valaddr_reg:x3; val_offset:24573*0 + 3*63*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24573*0 + 3*63*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137337344,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137338368,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137338880,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339136,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339264,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339328,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339360,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339376,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339384,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339388,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339390,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3137339391,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2115532263,32,FLEN) +NAN_BOXED(2161569149,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478592,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478593,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478595,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478599,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478607,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478623,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478655,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478719,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478847,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298479103,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298479615,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298480639,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298482687,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298486783,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298494975,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298511359,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298544127,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298609663,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298740735,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2299002879,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2299527167,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2300575743,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2302672895,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2302672896,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2304770048,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2305818624,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306342912,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306605056,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306736128,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306801664,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306834432,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306850816,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306859008,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306863104,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306865152,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866176,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866688,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866944,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867072,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867136,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867168,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867184,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867192,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867196,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867198,32,FLEN) +NAN_BOXED(2115691892,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867199,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331648,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331649,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331651,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331655,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331663,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331679,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331711,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331775,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331903,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50332159,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50332671,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50333695,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50335743,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50339839,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50348031,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50364415,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50397183,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50462719,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50593791,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50855935,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(51380223,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(52428799,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-65.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-65.S new file mode 100644 index 000000000..e2860b62d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-65.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_8192: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x33fffff; valaddr_reg:x3; val_offset:24576*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24576*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8193: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3400000; valaddr_reg:x3; val_offset:24579*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24579*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8194: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3600000; valaddr_reg:x3; val_offset:24582*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24582*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8195: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3700000; valaddr_reg:x3; val_offset:24585*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24585*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8196: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x3780000; valaddr_reg:x3; val_offset:24588*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24588*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8197: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37c0000; valaddr_reg:x3; val_offset:24591*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24591*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8198: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37e0000; valaddr_reg:x3; val_offset:24594*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24594*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8199: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37f0000; valaddr_reg:x3; val_offset:24597*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24597*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8200: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37f8000; valaddr_reg:x3; val_offset:24600*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24600*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8201: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37fc000; valaddr_reg:x3; val_offset:24603*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24603*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8202: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37fe000; valaddr_reg:x3; val_offset:24606*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24606*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8203: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37ff000; valaddr_reg:x3; val_offset:24609*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24609*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8204: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37ff800; valaddr_reg:x3; val_offset:24612*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24612*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8205: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37ffc00; valaddr_reg:x3; val_offset:24615*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24615*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8206: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37ffe00; valaddr_reg:x3; val_offset:24618*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24618*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8207: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37fff00; valaddr_reg:x3; val_offset:24621*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24621*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8208: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37fff80; valaddr_reg:x3; val_offset:24624*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24624*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8209: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37fffc0; valaddr_reg:x3; val_offset:24627*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24627*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8210: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37fffe0; valaddr_reg:x3; val_offset:24630*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24630*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8211: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37ffff0; valaddr_reg:x3; val_offset:24633*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24633*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8212: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37ffff8; valaddr_reg:x3; val_offset:24636*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24636*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8213: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37ffffc; valaddr_reg:x3; val_offset:24639*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24639*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8214: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37ffffe; valaddr_reg:x3; val_offset:24642*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24642*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8215: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1b211b and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x06 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1b211b; op2val:0x0; +op3val:0x37fffff; valaddr_reg:x3; val_offset:24645*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24645*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8216: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:24648*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24648*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8217: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:24651*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24651*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8218: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:24654*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24654*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8219: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:24657*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24657*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8220: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:24660*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24660*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8221: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:24663*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24663*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8222: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:24666*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24666*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8223: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:24669*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24669*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8224: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:24672*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24672*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8225: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:24675*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24675*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8226: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:24678*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24678*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8227: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:24681*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24681*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8228: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:24684*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24684*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8229: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:24687*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24687*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8230: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:24690*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24690*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8231: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:24693*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24693*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8232: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45000000; valaddr_reg:x3; val_offset:24696*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24696*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8233: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45000001; valaddr_reg:x3; val_offset:24699*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24699*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8234: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45000003; valaddr_reg:x3; val_offset:24702*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24702*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8235: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45000007; valaddr_reg:x3; val_offset:24705*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24705*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8236: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x4500000f; valaddr_reg:x3; val_offset:24708*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24708*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8237: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x4500001f; valaddr_reg:x3; val_offset:24711*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24711*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8238: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x4500003f; valaddr_reg:x3; val_offset:24714*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24714*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8239: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x4500007f; valaddr_reg:x3; val_offset:24717*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24717*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8240: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x450000ff; valaddr_reg:x3; val_offset:24720*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24720*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8241: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x450001ff; valaddr_reg:x3; val_offset:24723*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24723*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8242: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x450003ff; valaddr_reg:x3; val_offset:24726*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24726*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8243: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x450007ff; valaddr_reg:x3; val_offset:24729*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24729*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8244: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45000fff; valaddr_reg:x3; val_offset:24732*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24732*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8245: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45001fff; valaddr_reg:x3; val_offset:24735*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24735*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8246: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45003fff; valaddr_reg:x3; val_offset:24738*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24738*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8247: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45007fff; valaddr_reg:x3; val_offset:24741*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24741*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8248: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x4500ffff; valaddr_reg:x3; val_offset:24744*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24744*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8249: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x4501ffff; valaddr_reg:x3; val_offset:24747*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24747*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8250: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x4503ffff; valaddr_reg:x3; val_offset:24750*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24750*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8251: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x4507ffff; valaddr_reg:x3; val_offset:24753*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24753*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8252: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x450fffff; valaddr_reg:x3; val_offset:24756*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24756*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8253: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x451fffff; valaddr_reg:x3; val_offset:24759*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24759*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8254: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x453fffff; valaddr_reg:x3; val_offset:24762*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24762*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8255: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45400000; valaddr_reg:x3; val_offset:24765*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24765*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8256: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45600000; valaddr_reg:x3; val_offset:24768*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24768*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8257: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45700000; valaddr_reg:x3; val_offset:24771*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24771*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8258: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x45780000; valaddr_reg:x3; val_offset:24774*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24774*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8259: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457c0000; valaddr_reg:x3; val_offset:24777*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24777*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8260: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457e0000; valaddr_reg:x3; val_offset:24780*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24780*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8261: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457f0000; valaddr_reg:x3; val_offset:24783*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24783*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8262: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457f8000; valaddr_reg:x3; val_offset:24786*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24786*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8263: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457fc000; valaddr_reg:x3; val_offset:24789*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24789*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8264: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457fe000; valaddr_reg:x3; val_offset:24792*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24792*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8265: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457ff000; valaddr_reg:x3; val_offset:24795*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24795*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8266: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457ff800; valaddr_reg:x3; val_offset:24798*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24798*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8267: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457ffc00; valaddr_reg:x3; val_offset:24801*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24801*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8268: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457ffe00; valaddr_reg:x3; val_offset:24804*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24804*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8269: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457fff00; valaddr_reg:x3; val_offset:24807*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24807*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8270: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457fff80; valaddr_reg:x3; val_offset:24810*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24810*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8271: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457fffc0; valaddr_reg:x3; val_offset:24813*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24813*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8272: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457fffe0; valaddr_reg:x3; val_offset:24816*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24816*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8273: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457ffff0; valaddr_reg:x3; val_offset:24819*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24819*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8274: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457ffff8; valaddr_reg:x3; val_offset:24822*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24822*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8275: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457ffffc; valaddr_reg:x3; val_offset:24825*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24825*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8276: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457ffffe; valaddr_reg:x3; val_offset:24828*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24828*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8277: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c38f3 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x51c08d and fs3 == 0 and fe3 == 0x8a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c38f3; op2val:0xd1c08d; +op3val:0x457fffff; valaddr_reg:x3; val_offset:24831*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24831*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8278: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9800000; valaddr_reg:x3; val_offset:24834*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24834*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8279: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9800001; valaddr_reg:x3; val_offset:24837*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24837*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8280: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9800003; valaddr_reg:x3; val_offset:24840*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24840*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8281: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9800007; valaddr_reg:x3; val_offset:24843*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24843*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8282: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe980000f; valaddr_reg:x3; val_offset:24846*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24846*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8283: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe980001f; valaddr_reg:x3; val_offset:24849*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24849*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8284: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe980003f; valaddr_reg:x3; val_offset:24852*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24852*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8285: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe980007f; valaddr_reg:x3; val_offset:24855*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24855*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8286: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe98000ff; valaddr_reg:x3; val_offset:24858*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24858*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8287: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe98001ff; valaddr_reg:x3; val_offset:24861*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24861*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8288: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe98003ff; valaddr_reg:x3; val_offset:24864*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24864*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8289: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe98007ff; valaddr_reg:x3; val_offset:24867*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24867*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8290: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9800fff; valaddr_reg:x3; val_offset:24870*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24870*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8291: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9801fff; valaddr_reg:x3; val_offset:24873*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24873*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8292: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9803fff; valaddr_reg:x3; val_offset:24876*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24876*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8293: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9807fff; valaddr_reg:x3; val_offset:24879*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24879*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8294: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe980ffff; valaddr_reg:x3; val_offset:24882*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24882*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8295: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe981ffff; valaddr_reg:x3; val_offset:24885*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24885*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8296: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe983ffff; valaddr_reg:x3; val_offset:24888*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24888*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8297: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe987ffff; valaddr_reg:x3; val_offset:24891*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24891*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8298: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe98fffff; valaddr_reg:x3; val_offset:24894*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24894*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8299: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe99fffff; valaddr_reg:x3; val_offset:24897*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24897*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8300: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9bfffff; valaddr_reg:x3; val_offset:24900*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24900*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8301: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9c00000; valaddr_reg:x3; val_offset:24903*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24903*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8302: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9e00000; valaddr_reg:x3; val_offset:24906*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24906*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8303: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9f00000; valaddr_reg:x3; val_offset:24909*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24909*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8304: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9f80000; valaddr_reg:x3; val_offset:24912*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24912*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8305: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fc0000; valaddr_reg:x3; val_offset:24915*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24915*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8306: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fe0000; valaddr_reg:x3; val_offset:24918*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24918*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8307: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ff0000; valaddr_reg:x3; val_offset:24921*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24921*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8308: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ff8000; valaddr_reg:x3; val_offset:24924*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24924*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8309: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ffc000; valaddr_reg:x3; val_offset:24927*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24927*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8310: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ffe000; valaddr_reg:x3; val_offset:24930*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24930*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8311: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fff000; valaddr_reg:x3; val_offset:24933*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24933*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8312: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fff800; valaddr_reg:x3; val_offset:24936*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24936*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8313: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fffc00; valaddr_reg:x3; val_offset:24939*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24939*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8314: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fffe00; valaddr_reg:x3; val_offset:24942*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24942*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8315: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ffff00; valaddr_reg:x3; val_offset:24945*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24945*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8316: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ffff80; valaddr_reg:x3; val_offset:24948*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24948*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8317: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ffffc0; valaddr_reg:x3; val_offset:24951*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24951*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8318: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ffffe0; valaddr_reg:x3; val_offset:24954*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24954*0 + 3*64*FLEN/8, x4, x1, x2) + +inst_8319: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fffff0; valaddr_reg:x3; val_offset:24957*0 + 3*64*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24957*0 + 3*64*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(54525951,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(54525952,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(56623104,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(57671680,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58195968,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58458112,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58589184,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58654720,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58687488,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58703872,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58712064,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58716160,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58718208,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58719232,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58719744,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720000,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720128,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720192,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720224,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720240,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720248,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720252,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720254,32,FLEN) +NAN_BOXED(2115707163,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(58720255,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157627904,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157627905,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157627907,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157627911,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157627919,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157627935,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157627967,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157628031,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157628159,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157628415,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157628927,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157629951,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157631999,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157636095,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157644287,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157660671,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157693439,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157758975,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1157890047,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1158152191,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1158676479,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1159725055,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1161822207,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1161822208,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1163919360,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1164967936,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1165492224,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1165754368,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1165885440,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1165950976,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1165983744,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166000128,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166008320,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166012416,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166014464,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166015488,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016000,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016256,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016384,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016448,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016480,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016496,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016504,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016508,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016510,32,FLEN) +NAN_BOXED(2115778803,32,FLEN) +NAN_BOXED(13746317,32,FLEN) +NAN_BOXED(1166016511,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917479936,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917479937,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917479939,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917479943,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917479951,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917479967,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917479999,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917480063,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917480191,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917480447,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917480959,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917481983,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917484031,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917488127,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917496319,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917512703,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917545471,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917611007,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3917742079,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3918004223,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3918528511,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3919577087,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3921674239,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3921674240,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3923771392,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3924819968,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925344256,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925606400,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925737472,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925803008,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925835776,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925852160,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925860352,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925864448,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925866496,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925867520,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868032,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868288,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868416,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868480,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868512,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868528,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-66.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-66.S new file mode 100644 index 000000000..63c135886 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-66.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_8320: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fffff8; valaddr_reg:x3; val_offset:24960*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24960*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8321: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fffffc; valaddr_reg:x3; val_offset:24963*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24963*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8322: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9fffffe; valaddr_reg:x3; val_offset:24966*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24966*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8323: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xd3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xe9ffffff; valaddr_reg:x3; val_offset:24969*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24969*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8324: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff000001; valaddr_reg:x3; val_offset:24972*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24972*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8325: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff000003; valaddr_reg:x3; val_offset:24975*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24975*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8326: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff000007; valaddr_reg:x3; val_offset:24978*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24978*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8327: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff199999; valaddr_reg:x3; val_offset:24981*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24981*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8328: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff249249; valaddr_reg:x3; val_offset:24984*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24984*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8329: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff333333; valaddr_reg:x3; val_offset:24987*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24987*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8330: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:24990*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24990*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8331: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:24993*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24993*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8332: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff444444; valaddr_reg:x3; val_offset:24996*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24996*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8333: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:24999*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 24999*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8334: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:25002*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25002*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8335: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff666666; valaddr_reg:x3; val_offset:25005*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25005*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8336: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:25008*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25008*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8337: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:25011*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25011*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8338: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:25014*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25014*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8339: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1c653b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x518529 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1c653b; op2val:0xc0d18529; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:25017*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25017*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8340: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf800000; valaddr_reg:x3; val_offset:25020*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25020*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8341: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf800001; valaddr_reg:x3; val_offset:25023*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25023*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8342: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf800003; valaddr_reg:x3; val_offset:25026*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25026*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8343: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf800007; valaddr_reg:x3; val_offset:25029*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25029*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8344: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf80000f; valaddr_reg:x3; val_offset:25032*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25032*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8345: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf80001f; valaddr_reg:x3; val_offset:25035*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25035*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8346: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf80003f; valaddr_reg:x3; val_offset:25038*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25038*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8347: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf80007f; valaddr_reg:x3; val_offset:25041*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25041*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8348: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf8000ff; valaddr_reg:x3; val_offset:25044*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25044*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8349: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf8001ff; valaddr_reg:x3; val_offset:25047*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25047*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8350: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf8003ff; valaddr_reg:x3; val_offset:25050*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25050*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8351: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf8007ff; valaddr_reg:x3; val_offset:25053*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25053*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8352: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf800fff; valaddr_reg:x3; val_offset:25056*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25056*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8353: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf801fff; valaddr_reg:x3; val_offset:25059*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25059*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8354: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf803fff; valaddr_reg:x3; val_offset:25062*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25062*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8355: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf807fff; valaddr_reg:x3; val_offset:25065*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25065*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8356: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf80ffff; valaddr_reg:x3; val_offset:25068*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25068*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8357: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf81ffff; valaddr_reg:x3; val_offset:25071*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25071*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8358: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf83ffff; valaddr_reg:x3; val_offset:25074*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25074*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8359: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf87ffff; valaddr_reg:x3; val_offset:25077*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25077*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8360: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf8fffff; valaddr_reg:x3; val_offset:25080*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25080*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8361: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdf9fffff; valaddr_reg:x3; val_offset:25083*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25083*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8362: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfbfffff; valaddr_reg:x3; val_offset:25086*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25086*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8363: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfc00000; valaddr_reg:x3; val_offset:25089*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25089*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8364: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfe00000; valaddr_reg:x3; val_offset:25092*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25092*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8365: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdff00000; valaddr_reg:x3; val_offset:25095*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25095*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8366: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdff80000; valaddr_reg:x3; val_offset:25098*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25098*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8367: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffc0000; valaddr_reg:x3; val_offset:25101*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25101*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8368: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffe0000; valaddr_reg:x3; val_offset:25104*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25104*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8369: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfff0000; valaddr_reg:x3; val_offset:25107*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25107*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8370: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfff8000; valaddr_reg:x3; val_offset:25110*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25110*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8371: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfffc000; valaddr_reg:x3; val_offset:25113*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25113*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8372: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfffe000; valaddr_reg:x3; val_offset:25116*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25116*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8373: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffff000; valaddr_reg:x3; val_offset:25119*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25119*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8374: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffff800; valaddr_reg:x3; val_offset:25122*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25122*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8375: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffffc00; valaddr_reg:x3; val_offset:25125*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25125*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8376: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffffe00; valaddr_reg:x3; val_offset:25128*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25128*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8377: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfffff00; valaddr_reg:x3; val_offset:25131*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25131*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8378: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfffff80; valaddr_reg:x3; val_offset:25134*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25134*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8379: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfffffc0; valaddr_reg:x3; val_offset:25137*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25137*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8380: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfffffe0; valaddr_reg:x3; val_offset:25140*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25140*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8381: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffffff0; valaddr_reg:x3; val_offset:25143*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25143*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8382: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffffff8; valaddr_reg:x3; val_offset:25146*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25146*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8383: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffffffc; valaddr_reg:x3; val_offset:25149*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25149*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8384: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdffffffe; valaddr_reg:x3; val_offset:25152*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25152*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8385: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xbf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xdfffffff; valaddr_reg:x3; val_offset:25155*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25155*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8386: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff000001; valaddr_reg:x3; val_offset:25158*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25158*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8387: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff000003; valaddr_reg:x3; val_offset:25161*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25161*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8388: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff000007; valaddr_reg:x3; val_offset:25164*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25164*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8389: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff199999; valaddr_reg:x3; val_offset:25167*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25167*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8390: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff249249; valaddr_reg:x3; val_offset:25170*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25170*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8391: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff333333; valaddr_reg:x3; val_offset:25173*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25173*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8392: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:25176*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25176*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8393: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:25179*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25179*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8394: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff444444; valaddr_reg:x3; val_offset:25182*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25182*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8395: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:25185*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25185*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8396: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:25188*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25188*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8397: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff666666; valaddr_reg:x3; val_offset:25191*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25191*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8398: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:25194*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25194*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8399: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:25197*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25197*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8400: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:25200*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25200*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8401: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1caa1e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x512908 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1caa1e; op2val:0xc0d12908; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:25203*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25203*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8402: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:25206*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25206*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8403: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:25209*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25209*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8404: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:25212*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25212*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8405: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:25215*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25215*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8406: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:25218*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25218*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8407: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:25221*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25221*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8408: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:25224*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25224*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8409: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:25227*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25227*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8410: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:25230*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25230*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8411: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:25233*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25233*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8412: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:25236*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25236*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8413: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:25239*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25239*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8414: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:25242*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25242*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8415: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:25245*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25245*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8416: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:25248*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25248*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8417: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:25251*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25251*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8418: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd000000; valaddr_reg:x3; val_offset:25254*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25254*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8419: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd000001; valaddr_reg:x3; val_offset:25257*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25257*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8420: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd000003; valaddr_reg:x3; val_offset:25260*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25260*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8421: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd000007; valaddr_reg:x3; val_offset:25263*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25263*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8422: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd00000f; valaddr_reg:x3; val_offset:25266*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25266*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8423: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd00001f; valaddr_reg:x3; val_offset:25269*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25269*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8424: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd00003f; valaddr_reg:x3; val_offset:25272*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25272*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8425: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd00007f; valaddr_reg:x3; val_offset:25275*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25275*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8426: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd0000ff; valaddr_reg:x3; val_offset:25278*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25278*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8427: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd0001ff; valaddr_reg:x3; val_offset:25281*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25281*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8428: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd0003ff; valaddr_reg:x3; val_offset:25284*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25284*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8429: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd0007ff; valaddr_reg:x3; val_offset:25287*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25287*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8430: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd000fff; valaddr_reg:x3; val_offset:25290*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25290*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8431: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd001fff; valaddr_reg:x3; val_offset:25293*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25293*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8432: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd003fff; valaddr_reg:x3; val_offset:25296*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25296*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8433: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd007fff; valaddr_reg:x3; val_offset:25299*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25299*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8434: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd00ffff; valaddr_reg:x3; val_offset:25302*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25302*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8435: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd01ffff; valaddr_reg:x3; val_offset:25305*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25305*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8436: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd03ffff; valaddr_reg:x3; val_offset:25308*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25308*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8437: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd07ffff; valaddr_reg:x3; val_offset:25311*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25311*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8438: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd0fffff; valaddr_reg:x3; val_offset:25314*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25314*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8439: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd1fffff; valaddr_reg:x3; val_offset:25317*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25317*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8440: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd3fffff; valaddr_reg:x3; val_offset:25320*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25320*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8441: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd400000; valaddr_reg:x3; val_offset:25323*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25323*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8442: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd600000; valaddr_reg:x3; val_offset:25326*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25326*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8443: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd700000; valaddr_reg:x3; val_offset:25329*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25329*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8444: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd780000; valaddr_reg:x3; val_offset:25332*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25332*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8445: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7c0000; valaddr_reg:x3; val_offset:25335*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25335*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8446: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7e0000; valaddr_reg:x3; val_offset:25338*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25338*0 + 3*65*FLEN/8, x4, x1, x2) + +inst_8447: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7f0000; valaddr_reg:x3; val_offset:25341*0 + 3*65*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25341*0 + 3*65*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868536,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868540,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868542,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(3925868543,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2115790139,32,FLEN) +NAN_BOXED(3234956585,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749707776,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749707777,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749707779,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749707783,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749707791,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749707807,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749707839,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749707903,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749708031,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749708287,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749708799,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749709823,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749711871,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749715967,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749724159,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749740543,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749773311,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749838847,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3749969919,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3750232063,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3750756351,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3751804927,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3753902079,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3753902080,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3755999232,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3757047808,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3757572096,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3757834240,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3757965312,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758030848,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758063616,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758080000,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758088192,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758092288,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758094336,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758095360,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758095872,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096128,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096256,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096320,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096352,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096368,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096376,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096380,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096382,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(3758096383,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2115807774,32,FLEN) +NAN_BOXED(3234933000,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103808,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103809,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103811,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103815,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103823,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103839,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103871,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103935,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104063,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104319,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218104831,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218105855,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218107903,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218111999,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218120191,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218136575,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218169343,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218234879,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218365951,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218628095,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(219152383,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(220200959,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(222298111,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(222298112,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(224395264,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(225443840,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(225968128,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226230272,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226361344,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226426880,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-67.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-67.S new file mode 100644 index 000000000..80dee3161 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-67.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_8448: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7f8000; valaddr_reg:x3; val_offset:25344*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25344*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8449: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7fc000; valaddr_reg:x3; val_offset:25347*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25347*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8450: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7fe000; valaddr_reg:x3; val_offset:25350*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25350*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8451: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7ff000; valaddr_reg:x3; val_offset:25353*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25353*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8452: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7ff800; valaddr_reg:x3; val_offset:25356*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25356*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8453: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7ffc00; valaddr_reg:x3; val_offset:25359*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25359*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8454: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7ffe00; valaddr_reg:x3; val_offset:25362*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25362*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8455: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7fff00; valaddr_reg:x3; val_offset:25365*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25365*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8456: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7fff80; valaddr_reg:x3; val_offset:25368*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25368*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8457: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7fffc0; valaddr_reg:x3; val_offset:25371*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25371*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8458: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7fffe0; valaddr_reg:x3; val_offset:25374*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25374*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8459: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7ffff0; valaddr_reg:x3; val_offset:25377*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25377*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8460: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7ffff8; valaddr_reg:x3; val_offset:25380*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25380*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8461: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7ffffc; valaddr_reg:x3; val_offset:25383*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25383*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8462: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7ffffe; valaddr_reg:x3; val_offset:25386*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25386*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8463: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1d09f5 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x1a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1d09f5; op2val:0x0; +op3val:0xd7fffff; valaddr_reg:x3; val_offset:25389*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25389*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8464: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbf800001; valaddr_reg:x3; val_offset:25392*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25392*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8465: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbf800003; valaddr_reg:x3; val_offset:25395*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25395*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8466: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbf800007; valaddr_reg:x3; val_offset:25398*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25398*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8467: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbf999999; valaddr_reg:x3; val_offset:25401*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25401*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8468: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:25404*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25404*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8469: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:25407*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25407*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8470: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:25410*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25410*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8471: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:25413*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25413*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8472: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:25416*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25416*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8473: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:25419*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25419*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8474: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:25422*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25422*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8475: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:25425*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25425*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8476: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:25428*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25428*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8477: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:25431*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25431*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8478: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:25434*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25434*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8479: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:25437*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25437*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8480: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4000000; valaddr_reg:x3; val_offset:25440*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25440*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8481: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4000001; valaddr_reg:x3; val_offset:25443*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25443*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8482: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4000003; valaddr_reg:x3; val_offset:25446*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25446*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8483: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4000007; valaddr_reg:x3; val_offset:25449*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25449*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8484: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc400000f; valaddr_reg:x3; val_offset:25452*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25452*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8485: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc400001f; valaddr_reg:x3; val_offset:25455*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25455*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8486: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc400003f; valaddr_reg:x3; val_offset:25458*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25458*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8487: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc400007f; valaddr_reg:x3; val_offset:25461*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25461*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8488: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc40000ff; valaddr_reg:x3; val_offset:25464*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25464*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8489: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc40001ff; valaddr_reg:x3; val_offset:25467*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25467*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8490: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc40003ff; valaddr_reg:x3; val_offset:25470*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25470*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8491: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc40007ff; valaddr_reg:x3; val_offset:25473*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25473*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8492: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4000fff; valaddr_reg:x3; val_offset:25476*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25476*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8493: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4001fff; valaddr_reg:x3; val_offset:25479*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25479*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8494: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4003fff; valaddr_reg:x3; val_offset:25482*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25482*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8495: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4007fff; valaddr_reg:x3; val_offset:25485*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25485*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8496: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc400ffff; valaddr_reg:x3; val_offset:25488*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25488*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8497: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc401ffff; valaddr_reg:x3; val_offset:25491*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25491*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8498: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc403ffff; valaddr_reg:x3; val_offset:25494*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25494*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8499: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc407ffff; valaddr_reg:x3; val_offset:25497*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25497*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8500: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc40fffff; valaddr_reg:x3; val_offset:25500*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25500*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8501: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc41fffff; valaddr_reg:x3; val_offset:25503*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25503*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8502: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc43fffff; valaddr_reg:x3; val_offset:25506*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25506*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8503: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4400000; valaddr_reg:x3; val_offset:25509*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25509*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8504: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4600000; valaddr_reg:x3; val_offset:25512*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25512*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8505: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4700000; valaddr_reg:x3; val_offset:25515*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25515*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8506: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc4780000; valaddr_reg:x3; val_offset:25518*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25518*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8507: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47c0000; valaddr_reg:x3; val_offset:25521*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25521*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8508: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47e0000; valaddr_reg:x3; val_offset:25524*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25524*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8509: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47f0000; valaddr_reg:x3; val_offset:25527*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25527*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8510: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47f8000; valaddr_reg:x3; val_offset:25530*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25530*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8511: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47fc000; valaddr_reg:x3; val_offset:25533*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25533*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8512: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47fe000; valaddr_reg:x3; val_offset:25536*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25536*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8513: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47ff000; valaddr_reg:x3; val_offset:25539*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25539*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8514: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47ff800; valaddr_reg:x3; val_offset:25542*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25542*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8515: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47ffc00; valaddr_reg:x3; val_offset:25545*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25545*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8516: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47ffe00; valaddr_reg:x3; val_offset:25548*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25548*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8517: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47fff00; valaddr_reg:x3; val_offset:25551*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25551*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8518: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47fff80; valaddr_reg:x3; val_offset:25554*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25554*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8519: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47fffc0; valaddr_reg:x3; val_offset:25557*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25557*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8520: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47fffe0; valaddr_reg:x3; val_offset:25560*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25560*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8521: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47ffff0; valaddr_reg:x3; val_offset:25563*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25563*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8522: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47ffff8; valaddr_reg:x3; val_offset:25566*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25566*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8523: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47ffffc; valaddr_reg:x3; val_offset:25569*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25569*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8524: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47ffffe; valaddr_reg:x3; val_offset:25572*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25572*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8525: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1e014a and fs2 == 1 and fe2 == 0x01 and fm2 == 0x4f62c2 and fs3 == 1 and fe3 == 0x88 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1e014a; op2val:0x80cf62c2; +op3val:0xc47fffff; valaddr_reg:x3; val_offset:25575*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25575*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8526: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e000000; valaddr_reg:x3; val_offset:25578*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25578*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8527: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e000001; valaddr_reg:x3; val_offset:25581*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25581*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8528: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e000003; valaddr_reg:x3; val_offset:25584*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25584*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8529: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e000007; valaddr_reg:x3; val_offset:25587*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25587*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8530: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e00000f; valaddr_reg:x3; val_offset:25590*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25590*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8531: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e00001f; valaddr_reg:x3; val_offset:25593*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25593*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8532: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e00003f; valaddr_reg:x3; val_offset:25596*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25596*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8533: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e00007f; valaddr_reg:x3; val_offset:25599*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25599*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8534: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e0000ff; valaddr_reg:x3; val_offset:25602*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25602*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8535: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e0001ff; valaddr_reg:x3; val_offset:25605*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25605*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8536: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e0003ff; valaddr_reg:x3; val_offset:25608*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25608*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8537: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e0007ff; valaddr_reg:x3; val_offset:25611*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25611*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8538: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e000fff; valaddr_reg:x3; val_offset:25614*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25614*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8539: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e001fff; valaddr_reg:x3; val_offset:25617*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25617*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8540: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e003fff; valaddr_reg:x3; val_offset:25620*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25620*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8541: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e007fff; valaddr_reg:x3; val_offset:25623*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25623*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8542: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e00ffff; valaddr_reg:x3; val_offset:25626*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25626*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8543: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e01ffff; valaddr_reg:x3; val_offset:25629*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25629*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8544: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e03ffff; valaddr_reg:x3; val_offset:25632*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25632*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8545: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e07ffff; valaddr_reg:x3; val_offset:25635*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25635*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8546: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e0fffff; valaddr_reg:x3; val_offset:25638*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25638*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8547: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e1fffff; valaddr_reg:x3; val_offset:25641*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25641*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8548: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e3fffff; valaddr_reg:x3; val_offset:25644*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25644*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8549: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e400000; valaddr_reg:x3; val_offset:25647*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25647*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8550: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e600000; valaddr_reg:x3; val_offset:25650*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25650*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8551: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e700000; valaddr_reg:x3; val_offset:25653*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25653*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8552: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e780000; valaddr_reg:x3; val_offset:25656*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25656*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8553: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7c0000; valaddr_reg:x3; val_offset:25659*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25659*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8554: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7e0000; valaddr_reg:x3; val_offset:25662*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25662*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8555: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7f0000; valaddr_reg:x3; val_offset:25665*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25665*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8556: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7f8000; valaddr_reg:x3; val_offset:25668*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25668*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8557: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7fc000; valaddr_reg:x3; val_offset:25671*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25671*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8558: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7fe000; valaddr_reg:x3; val_offset:25674*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25674*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8559: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7ff000; valaddr_reg:x3; val_offset:25677*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25677*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8560: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7ff800; valaddr_reg:x3; val_offset:25680*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25680*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8561: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7ffc00; valaddr_reg:x3; val_offset:25683*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25683*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8562: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7ffe00; valaddr_reg:x3; val_offset:25686*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25686*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8563: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7fff00; valaddr_reg:x3; val_offset:25689*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25689*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8564: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7fff80; valaddr_reg:x3; val_offset:25692*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25692*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8565: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7fffc0; valaddr_reg:x3; val_offset:25695*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25695*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8566: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7fffe0; valaddr_reg:x3; val_offset:25698*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25698*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8567: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7ffff0; valaddr_reg:x3; val_offset:25701*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25701*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8568: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7ffff8; valaddr_reg:x3; val_offset:25704*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25704*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8569: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7ffffc; valaddr_reg:x3; val_offset:25707*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25707*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8570: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7ffffe; valaddr_reg:x3; val_offset:25710*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25710*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8571: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xdc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x6e7fffff; valaddr_reg:x3; val_offset:25713*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25713*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8572: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f000001; valaddr_reg:x3; val_offset:25716*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25716*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8573: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f000003; valaddr_reg:x3; val_offset:25719*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25719*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8574: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f000007; valaddr_reg:x3; val_offset:25722*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25722*0 + 3*66*FLEN/8, x4, x1, x2) + +inst_8575: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f199999; valaddr_reg:x3; val_offset:25725*0 + 3*66*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25725*0 + 3*66*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226459648,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226476032,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226484224,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226488320,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226490368,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226491392,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226491904,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492160,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492288,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492352,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492384,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492400,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492408,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492412,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492414,32,FLEN) +NAN_BOXED(2115832309,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(226492415,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334336,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334337,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334339,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334343,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334351,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334367,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334399,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334463,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334591,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288334847,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288335359,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288336383,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288338431,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288342527,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288350719,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288367103,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288399871,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288465407,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288596479,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3288858623,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3289382911,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3290431487,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3292528639,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3292528640,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3294625792,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3295674368,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296198656,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296460800,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296591872,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296657408,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296690176,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296706560,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296714752,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296718848,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296720896,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296721920,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722432,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722688,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722816,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722880,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722912,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722928,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722936,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722940,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722942,32,FLEN) +NAN_BOXED(2115895626,32,FLEN) +NAN_BOXED(2161074882,32,FLEN) +NAN_BOXED(3296722943,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845493760,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845493761,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845493763,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845493767,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845493775,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845493791,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845493823,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845493887,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845494015,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845494271,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845494783,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845495807,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845497855,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845501951,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845510143,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845526527,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845559295,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845624831,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1845755903,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1846018047,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1846542335,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1847590911,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1849688063,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1849688064,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1851785216,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1852833792,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853358080,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853620224,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853751296,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853816832,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853849600,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853865984,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853874176,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853878272,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853880320,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853881344,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853881856,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882112,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882240,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882304,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882336,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882352,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882360,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882364,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882366,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(1853882367,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-68.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-68.S new file mode 100644 index 000000000..d75ce3a1e --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-68.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_8576: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f249249; valaddr_reg:x3; val_offset:25728*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25728*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8577: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f333333; valaddr_reg:x3; val_offset:25731*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25731*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8578: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:25734*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25734*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8579: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:25737*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25737*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8580: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f444444; valaddr_reg:x3; val_offset:25740*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25740*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8581: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:25743*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25743*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8582: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:25746*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25746*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8583: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f666666; valaddr_reg:x3; val_offset:25749*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25749*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8584: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:25752*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25752*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8585: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:25755*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25755*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8586: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:25758*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25758*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8587: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x1fd614 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x4d0282 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e1fd614; op2val:0x40cd0282; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:25761*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25761*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8588: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25800000; valaddr_reg:x3; val_offset:25764*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25764*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8589: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25800001; valaddr_reg:x3; val_offset:25767*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25767*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8590: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25800003; valaddr_reg:x3; val_offset:25770*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25770*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8591: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25800007; valaddr_reg:x3; val_offset:25773*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25773*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8592: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x2580000f; valaddr_reg:x3; val_offset:25776*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25776*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8593: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x2580001f; valaddr_reg:x3; val_offset:25779*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25779*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8594: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x2580003f; valaddr_reg:x3; val_offset:25782*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25782*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8595: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x2580007f; valaddr_reg:x3; val_offset:25785*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25785*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8596: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x258000ff; valaddr_reg:x3; val_offset:25788*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25788*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8597: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x258001ff; valaddr_reg:x3; val_offset:25791*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25791*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8598: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x258003ff; valaddr_reg:x3; val_offset:25794*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25794*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8599: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x258007ff; valaddr_reg:x3; val_offset:25797*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25797*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8600: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25800fff; valaddr_reg:x3; val_offset:25800*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25800*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8601: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25801fff; valaddr_reg:x3; val_offset:25803*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25803*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8602: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25803fff; valaddr_reg:x3; val_offset:25806*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25806*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8603: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25807fff; valaddr_reg:x3; val_offset:25809*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25809*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8604: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x2580ffff; valaddr_reg:x3; val_offset:25812*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25812*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8605: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x2581ffff; valaddr_reg:x3; val_offset:25815*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25815*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8606: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x2583ffff; valaddr_reg:x3; val_offset:25818*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25818*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8607: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x2587ffff; valaddr_reg:x3; val_offset:25821*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25821*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8608: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x258fffff; valaddr_reg:x3; val_offset:25824*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25824*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8609: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x259fffff; valaddr_reg:x3; val_offset:25827*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25827*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8610: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25bfffff; valaddr_reg:x3; val_offset:25830*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25830*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8611: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25c00000; valaddr_reg:x3; val_offset:25833*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25833*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8612: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25e00000; valaddr_reg:x3; val_offset:25836*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25836*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8613: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25f00000; valaddr_reg:x3; val_offset:25839*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25839*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8614: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25f80000; valaddr_reg:x3; val_offset:25842*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25842*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8615: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fc0000; valaddr_reg:x3; val_offset:25845*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25845*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8616: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fe0000; valaddr_reg:x3; val_offset:25848*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25848*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8617: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ff0000; valaddr_reg:x3; val_offset:25851*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25851*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8618: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ff8000; valaddr_reg:x3; val_offset:25854*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25854*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8619: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ffc000; valaddr_reg:x3; val_offset:25857*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25857*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8620: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ffe000; valaddr_reg:x3; val_offset:25860*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25860*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8621: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fff000; valaddr_reg:x3; val_offset:25863*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25863*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8622: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fff800; valaddr_reg:x3; val_offset:25866*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25866*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8623: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fffc00; valaddr_reg:x3; val_offset:25869*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25869*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8624: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fffe00; valaddr_reg:x3; val_offset:25872*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25872*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8625: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ffff00; valaddr_reg:x3; val_offset:25875*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25875*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8626: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ffff80; valaddr_reg:x3; val_offset:25878*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25878*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8627: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ffffc0; valaddr_reg:x3; val_offset:25881*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25881*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8628: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ffffe0; valaddr_reg:x3; val_offset:25884*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25884*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8629: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fffff0; valaddr_reg:x3; val_offset:25887*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25887*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8630: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fffff8; valaddr_reg:x3; val_offset:25890*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25890*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8631: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fffffc; valaddr_reg:x3; val_offset:25893*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25893*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8632: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25fffffe; valaddr_reg:x3; val_offset:25896*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25896*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8633: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x4b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x25ffffff; valaddr_reg:x3; val_offset:25899*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25899*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8634: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3f800001; valaddr_reg:x3; val_offset:25902*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25902*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8635: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3f800003; valaddr_reg:x3; val_offset:25905*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25905*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8636: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3f800007; valaddr_reg:x3; val_offset:25908*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25908*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8637: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3f999999; valaddr_reg:x3; val_offset:25911*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25911*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8638: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:25914*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25914*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8639: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:25917*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25917*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8640: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:25920*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25920*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8641: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:25923*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25923*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8642: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:25926*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25926*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8643: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:25929*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25929*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8644: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:25932*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25932*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8645: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:25935*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25935*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8646: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:25938*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25938*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8647: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:25941*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25941*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8648: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:25944*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25944*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8649: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25464b and fs2 == 0 and fe2 == 0x01 and fm2 == 0x464395 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25464b; op2val:0xc64395; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:25947*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25947*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8650: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:25950*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25950*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8651: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:25953*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25953*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8652: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:25956*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25956*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8653: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:25959*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25959*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8654: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:25962*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25962*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8655: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:25965*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25965*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8656: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:25968*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25968*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8657: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:25971*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25971*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8658: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:25974*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25974*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8659: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:25977*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25977*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8660: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:25980*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25980*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8661: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:25983*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25983*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8662: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:25986*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25986*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8663: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:25989*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25989*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8664: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:25992*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25992*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8665: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:25995*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25995*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8666: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89000000; valaddr_reg:x3; val_offset:25998*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 25998*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8667: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89000001; valaddr_reg:x3; val_offset:26001*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26001*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8668: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89000003; valaddr_reg:x3; val_offset:26004*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26004*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8669: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89000007; valaddr_reg:x3; val_offset:26007*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26007*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8670: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x8900000f; valaddr_reg:x3; val_offset:26010*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26010*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8671: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x8900001f; valaddr_reg:x3; val_offset:26013*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26013*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8672: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x8900003f; valaddr_reg:x3; val_offset:26016*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26016*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8673: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x8900007f; valaddr_reg:x3; val_offset:26019*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26019*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8674: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x890000ff; valaddr_reg:x3; val_offset:26022*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26022*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8675: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x890001ff; valaddr_reg:x3; val_offset:26025*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26025*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8676: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x890003ff; valaddr_reg:x3; val_offset:26028*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26028*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8677: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x890007ff; valaddr_reg:x3; val_offset:26031*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26031*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8678: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89000fff; valaddr_reg:x3; val_offset:26034*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26034*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8679: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89001fff; valaddr_reg:x3; val_offset:26037*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26037*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8680: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89003fff; valaddr_reg:x3; val_offset:26040*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26040*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8681: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89007fff; valaddr_reg:x3; val_offset:26043*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26043*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8682: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x8900ffff; valaddr_reg:x3; val_offset:26046*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26046*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8683: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x8901ffff; valaddr_reg:x3; val_offset:26049*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26049*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8684: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x8903ffff; valaddr_reg:x3; val_offset:26052*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26052*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8685: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x8907ffff; valaddr_reg:x3; val_offset:26055*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26055*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8686: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x890fffff; valaddr_reg:x3; val_offset:26058*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26058*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8687: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x891fffff; valaddr_reg:x3; val_offset:26061*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26061*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8688: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x893fffff; valaddr_reg:x3; val_offset:26064*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26064*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8689: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89400000; valaddr_reg:x3; val_offset:26067*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26067*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8690: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89600000; valaddr_reg:x3; val_offset:26070*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26070*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8691: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89700000; valaddr_reg:x3; val_offset:26073*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26073*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8692: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x89780000; valaddr_reg:x3; val_offset:26076*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26076*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8693: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897c0000; valaddr_reg:x3; val_offset:26079*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26079*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8694: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897e0000; valaddr_reg:x3; val_offset:26082*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26082*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8695: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897f0000; valaddr_reg:x3; val_offset:26085*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26085*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8696: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897f8000; valaddr_reg:x3; val_offset:26088*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26088*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8697: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897fc000; valaddr_reg:x3; val_offset:26091*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26091*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8698: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897fe000; valaddr_reg:x3; val_offset:26094*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26094*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8699: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897ff000; valaddr_reg:x3; val_offset:26097*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26097*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8700: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897ff800; valaddr_reg:x3; val_offset:26100*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26100*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8701: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897ffc00; valaddr_reg:x3; val_offset:26103*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26103*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8702: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897ffe00; valaddr_reg:x3; val_offset:26106*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26106*0 + 3*67*FLEN/8, x4, x1, x2) + +inst_8703: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897fff00; valaddr_reg:x3; val_offset:26109*0 + 3*67*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26109*0 + 3*67*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2116015636,32,FLEN) +NAN_BOXED(1087177346,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145600,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145601,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145603,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145607,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145615,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145631,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145663,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145727,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629145855,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629146111,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629146623,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629147647,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629149695,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629153791,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629161983,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629178367,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629211135,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629276671,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629407743,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(629669887,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(630194175,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(631242751,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(633339903,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(633339904,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(635437056,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(636485632,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637009920,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637272064,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637403136,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637468672,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637501440,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637517824,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637526016,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637530112,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637532160,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637533184,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637533696,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637533952,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637534080,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637534144,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637534176,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637534192,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637534200,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637534204,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637534206,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(637534207,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2116372043,32,FLEN) +NAN_BOXED(12993429,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478592,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478593,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478595,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478599,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478607,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478623,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478655,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478719,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298478847,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298479103,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298479615,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298480639,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298482687,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298486783,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298494975,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298511359,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298544127,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298609663,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2298740735,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2299002879,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2299527167,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2300575743,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2302672895,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2302672896,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2304770048,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2305818624,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306342912,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306605056,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306736128,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306801664,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306834432,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306850816,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306859008,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306863104,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306865152,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866176,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866688,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306866944,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-69.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-69.S new file mode 100644 index 000000000..8c7c8ae82 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-69.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_8704: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897fff80; valaddr_reg:x3; val_offset:26112*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26112*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8705: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897fffc0; valaddr_reg:x3; val_offset:26115*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26115*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8706: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897fffe0; valaddr_reg:x3; val_offset:26118*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26118*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8707: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897ffff0; valaddr_reg:x3; val_offset:26121*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26121*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8708: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897ffff8; valaddr_reg:x3; val_offset:26124*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26124*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8709: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897ffffc; valaddr_reg:x3; val_offset:26127*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26127*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8710: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897ffffe; valaddr_reg:x3; val_offset:26130*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26130*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8711: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x25df45 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x12 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e25df45; op2val:0x80000000; +op3val:0x897fffff; valaddr_reg:x3; val_offset:26133*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26133*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8712: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:26136*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26136*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8713: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:26139*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26139*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8714: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:26142*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26142*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8715: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:26145*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26145*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8716: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:26148*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26148*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8717: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:26151*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26151*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8718: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:26154*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26154*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8719: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:26157*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26157*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8720: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:26160*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26160*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8721: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:26163*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26163*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8722: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:26166*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26166*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8723: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:26169*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26169*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8724: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:26172*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26172*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8725: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:26175*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26175*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8726: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:26178*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26178*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8727: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:26181*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26181*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8728: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82800000; valaddr_reg:x3; val_offset:26184*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26184*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8729: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82800001; valaddr_reg:x3; val_offset:26187*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26187*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8730: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82800003; valaddr_reg:x3; val_offset:26190*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26190*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8731: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82800007; valaddr_reg:x3; val_offset:26193*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26193*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8732: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8280000f; valaddr_reg:x3; val_offset:26196*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26196*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8733: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8280001f; valaddr_reg:x3; val_offset:26199*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26199*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8734: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8280003f; valaddr_reg:x3; val_offset:26202*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26202*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8735: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8280007f; valaddr_reg:x3; val_offset:26205*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26205*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8736: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x828000ff; valaddr_reg:x3; val_offset:26208*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26208*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8737: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x828001ff; valaddr_reg:x3; val_offset:26211*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26211*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8738: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x828003ff; valaddr_reg:x3; val_offset:26214*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26214*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8739: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x828007ff; valaddr_reg:x3; val_offset:26217*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26217*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8740: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82800fff; valaddr_reg:x3; val_offset:26220*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26220*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8741: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82801fff; valaddr_reg:x3; val_offset:26223*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26223*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8742: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82803fff; valaddr_reg:x3; val_offset:26226*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26226*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8743: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82807fff; valaddr_reg:x3; val_offset:26229*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26229*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8744: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8280ffff; valaddr_reg:x3; val_offset:26232*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26232*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8745: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8281ffff; valaddr_reg:x3; val_offset:26235*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26235*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8746: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8283ffff; valaddr_reg:x3; val_offset:26238*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26238*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8747: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x8287ffff; valaddr_reg:x3; val_offset:26241*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26241*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8748: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x828fffff; valaddr_reg:x3; val_offset:26244*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26244*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8749: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x829fffff; valaddr_reg:x3; val_offset:26247*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26247*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8750: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82bfffff; valaddr_reg:x3; val_offset:26250*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26250*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8751: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82c00000; valaddr_reg:x3; val_offset:26253*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26253*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8752: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82e00000; valaddr_reg:x3; val_offset:26256*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26256*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8753: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82f00000; valaddr_reg:x3; val_offset:26259*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26259*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8754: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82f80000; valaddr_reg:x3; val_offset:26262*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26262*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8755: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fc0000; valaddr_reg:x3; val_offset:26265*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26265*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8756: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fe0000; valaddr_reg:x3; val_offset:26268*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26268*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8757: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ff0000; valaddr_reg:x3; val_offset:26271*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26271*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8758: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ff8000; valaddr_reg:x3; val_offset:26274*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26274*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8759: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ffc000; valaddr_reg:x3; val_offset:26277*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26277*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8760: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ffe000; valaddr_reg:x3; val_offset:26280*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26280*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8761: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fff000; valaddr_reg:x3; val_offset:26283*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26283*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8762: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fff800; valaddr_reg:x3; val_offset:26286*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26286*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8763: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fffc00; valaddr_reg:x3; val_offset:26289*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26289*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8764: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fffe00; valaddr_reg:x3; val_offset:26292*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26292*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8765: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ffff00; valaddr_reg:x3; val_offset:26295*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26295*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8766: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ffff80; valaddr_reg:x3; val_offset:26298*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26298*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8767: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ffffc0; valaddr_reg:x3; val_offset:26301*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26301*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8768: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ffffe0; valaddr_reg:x3; val_offset:26304*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26304*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8769: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fffff0; valaddr_reg:x3; val_offset:26307*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26307*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8770: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fffff8; valaddr_reg:x3; val_offset:26310*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26310*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8771: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fffffc; valaddr_reg:x3; val_offset:26313*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26313*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8772: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82fffffe; valaddr_reg:x3; val_offset:26316*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26316*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8773: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x26d9c8 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e26d9c8; op2val:0x80000000; +op3val:0x82ffffff; valaddr_reg:x3; val_offset:26319*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26319*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8774: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:26322*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26322*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8775: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:26325*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26325*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8776: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:26328*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26328*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8777: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:26331*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26331*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8778: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:26334*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26334*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8779: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:26337*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26337*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8780: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:26340*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26340*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8781: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:26343*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26343*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8782: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:26346*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26346*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8783: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:26349*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26349*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8784: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:26352*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26352*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8785: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:26355*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26355*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8786: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:26358*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26358*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8787: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:26361*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26361*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8788: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:26364*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26364*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8789: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:26367*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26367*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8790: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4000000; valaddr_reg:x3; val_offset:26370*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26370*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8791: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4000001; valaddr_reg:x3; val_offset:26373*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26373*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8792: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4000003; valaddr_reg:x3; val_offset:26376*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26376*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8793: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4000007; valaddr_reg:x3; val_offset:26379*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26379*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8794: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x400000f; valaddr_reg:x3; val_offset:26382*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26382*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8795: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x400001f; valaddr_reg:x3; val_offset:26385*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26385*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8796: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x400003f; valaddr_reg:x3; val_offset:26388*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26388*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8797: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x400007f; valaddr_reg:x3; val_offset:26391*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26391*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8798: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x40000ff; valaddr_reg:x3; val_offset:26394*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26394*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8799: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x40001ff; valaddr_reg:x3; val_offset:26397*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26397*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8800: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x40003ff; valaddr_reg:x3; val_offset:26400*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26400*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8801: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x40007ff; valaddr_reg:x3; val_offset:26403*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26403*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8802: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4000fff; valaddr_reg:x3; val_offset:26406*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26406*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8803: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4001fff; valaddr_reg:x3; val_offset:26409*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26409*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8804: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4003fff; valaddr_reg:x3; val_offset:26412*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26412*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8805: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4007fff; valaddr_reg:x3; val_offset:26415*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26415*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8806: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x400ffff; valaddr_reg:x3; val_offset:26418*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26418*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8807: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x401ffff; valaddr_reg:x3; val_offset:26421*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26421*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8808: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x403ffff; valaddr_reg:x3; val_offset:26424*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26424*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8809: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x407ffff; valaddr_reg:x3; val_offset:26427*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26427*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8810: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x40fffff; valaddr_reg:x3; val_offset:26430*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26430*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8811: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x41fffff; valaddr_reg:x3; val_offset:26433*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26433*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8812: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x43fffff; valaddr_reg:x3; val_offset:26436*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26436*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8813: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4400000; valaddr_reg:x3; val_offset:26439*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26439*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8814: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4600000; valaddr_reg:x3; val_offset:26442*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26442*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8815: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4700000; valaddr_reg:x3; val_offset:26445*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26445*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8816: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x4780000; valaddr_reg:x3; val_offset:26448*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26448*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8817: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47c0000; valaddr_reg:x3; val_offset:26451*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26451*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8818: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47e0000; valaddr_reg:x3; val_offset:26454*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26454*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8819: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47f0000; valaddr_reg:x3; val_offset:26457*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26457*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8820: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47f8000; valaddr_reg:x3; val_offset:26460*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26460*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8821: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47fc000; valaddr_reg:x3; val_offset:26463*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26463*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8822: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47fe000; valaddr_reg:x3; val_offset:26466*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26466*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8823: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47ff000; valaddr_reg:x3; val_offset:26469*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26469*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8824: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47ff800; valaddr_reg:x3; val_offset:26472*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26472*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8825: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47ffc00; valaddr_reg:x3; val_offset:26475*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26475*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8826: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47ffe00; valaddr_reg:x3; val_offset:26478*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26478*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8827: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47fff00; valaddr_reg:x3; val_offset:26481*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26481*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8828: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47fff80; valaddr_reg:x3; val_offset:26484*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26484*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8829: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47fffc0; valaddr_reg:x3; val_offset:26487*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26487*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8830: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47fffe0; valaddr_reg:x3; val_offset:26490*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26490*0 + 3*68*FLEN/8, x4, x1, x2) + +inst_8831: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47ffff0; valaddr_reg:x3; val_offset:26493*0 + 3*68*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26493*0 + 3*68*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867072,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867136,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867168,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867184,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867192,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867196,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867198,32,FLEN) +NAN_BOXED(2116411205,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2306867199,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426688,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426689,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426691,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426695,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426703,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426719,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426751,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426815,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426943,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189427199,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189427711,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189428735,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189430783,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189434879,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189443071,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189459455,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189492223,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189557759,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189688831,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189950975,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2190475263,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2191523839,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2193620991,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2193620992,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2195718144,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2196766720,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197291008,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197553152,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197684224,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197749760,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197782528,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197798912,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197807104,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197811200,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197813248,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197814272,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197814784,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815040,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815168,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815232,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815264,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815280,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815288,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815292,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815294,32,FLEN) +NAN_BOXED(2116475336,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815295,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108864,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108865,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108867,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108871,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108879,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108895,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108927,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108991,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109119,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109375,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109887,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67110911,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67112959,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67117055,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67125247,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67141631,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67174399,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67239935,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67371007,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67633151,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(68157439,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(69206015,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(71303167,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(71303168,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(73400320,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(74448896,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(74973184,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75235328,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75366400,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75431936,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75464704,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75481088,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75489280,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75493376,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75495424,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75496448,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75496960,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497216,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497344,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497408,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497440,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497456,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-70.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-70.S new file mode 100644 index 000000000..4a25bf0d3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-70.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_8832: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47ffff8; valaddr_reg:x3; val_offset:26496*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26496*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8833: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47ffffc; valaddr_reg:x3; val_offset:26499*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26499*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8834: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47ffffe; valaddr_reg:x3; val_offset:26502*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26502*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8835: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x27c396 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e27c396; op2val:0x0; +op3val:0x47fffff; valaddr_reg:x3; val_offset:26505*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26505*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8836: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:26508*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26508*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8837: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:26511*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26511*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8838: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:26514*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26514*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8839: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:26517*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26517*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8840: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:26520*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26520*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8841: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:26523*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26523*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8842: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:26526*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26526*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8843: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:26529*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26529*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8844: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:26532*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26532*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8845: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:26535*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26535*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8846: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:26538*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26538*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8847: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:26541*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26541*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8848: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:26544*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26544*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8849: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:26547*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26547*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8850: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:26550*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26550*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8851: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:26553*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26553*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8852: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4000000; valaddr_reg:x3; val_offset:26556*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26556*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8853: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4000001; valaddr_reg:x3; val_offset:26559*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26559*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8854: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4000003; valaddr_reg:x3; val_offset:26562*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26562*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8855: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4000007; valaddr_reg:x3; val_offset:26565*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26565*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8856: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x400000f; valaddr_reg:x3; val_offset:26568*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26568*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8857: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x400001f; valaddr_reg:x3; val_offset:26571*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26571*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8858: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x400003f; valaddr_reg:x3; val_offset:26574*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26574*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8859: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x400007f; valaddr_reg:x3; val_offset:26577*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26577*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8860: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x40000ff; valaddr_reg:x3; val_offset:26580*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26580*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8861: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x40001ff; valaddr_reg:x3; val_offset:26583*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26583*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8862: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x40003ff; valaddr_reg:x3; val_offset:26586*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26586*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8863: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x40007ff; valaddr_reg:x3; val_offset:26589*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26589*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8864: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4000fff; valaddr_reg:x3; val_offset:26592*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26592*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8865: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4001fff; valaddr_reg:x3; val_offset:26595*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26595*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8866: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4003fff; valaddr_reg:x3; val_offset:26598*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26598*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8867: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4007fff; valaddr_reg:x3; val_offset:26601*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26601*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8868: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x400ffff; valaddr_reg:x3; val_offset:26604*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26604*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8869: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x401ffff; valaddr_reg:x3; val_offset:26607*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26607*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8870: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x403ffff; valaddr_reg:x3; val_offset:26610*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26610*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8871: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x407ffff; valaddr_reg:x3; val_offset:26613*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26613*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8872: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x40fffff; valaddr_reg:x3; val_offset:26616*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26616*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8873: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x41fffff; valaddr_reg:x3; val_offset:26619*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26619*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8874: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x43fffff; valaddr_reg:x3; val_offset:26622*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26622*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8875: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4400000; valaddr_reg:x3; val_offset:26625*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26625*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8876: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4600000; valaddr_reg:x3; val_offset:26628*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26628*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8877: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4700000; valaddr_reg:x3; val_offset:26631*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26631*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8878: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x4780000; valaddr_reg:x3; val_offset:26634*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26634*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8879: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47c0000; valaddr_reg:x3; val_offset:26637*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26637*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8880: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47e0000; valaddr_reg:x3; val_offset:26640*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26640*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8881: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47f0000; valaddr_reg:x3; val_offset:26643*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26643*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8882: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47f8000; valaddr_reg:x3; val_offset:26646*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26646*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8883: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47fc000; valaddr_reg:x3; val_offset:26649*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26649*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8884: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47fe000; valaddr_reg:x3; val_offset:26652*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26652*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8885: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47ff000; valaddr_reg:x3; val_offset:26655*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26655*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8886: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47ff800; valaddr_reg:x3; val_offset:26658*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26658*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8887: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47ffc00; valaddr_reg:x3; val_offset:26661*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26661*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8888: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47ffe00; valaddr_reg:x3; val_offset:26664*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26664*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8889: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47fff00; valaddr_reg:x3; val_offset:26667*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26667*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8890: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47fff80; valaddr_reg:x3; val_offset:26670*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26670*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8891: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47fffc0; valaddr_reg:x3; val_offset:26673*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26673*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8892: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47fffe0; valaddr_reg:x3; val_offset:26676*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26676*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8893: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47ffff0; valaddr_reg:x3; val_offset:26679*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26679*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8894: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47ffff8; valaddr_reg:x3; val_offset:26682*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26682*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8895: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47ffffc; valaddr_reg:x3; val_offset:26685*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26685*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8896: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47ffffe; valaddr_reg:x3; val_offset:26688*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26688*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8897: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x28048a and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x08 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e28048a; op2val:0x0; +op3val:0x47fffff; valaddr_reg:x3; val_offset:26691*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26691*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8898: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31800000; valaddr_reg:x3; val_offset:26694*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26694*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8899: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31800001; valaddr_reg:x3; val_offset:26697*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26697*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8900: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31800003; valaddr_reg:x3; val_offset:26700*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26700*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8901: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31800007; valaddr_reg:x3; val_offset:26703*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26703*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8902: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3180000f; valaddr_reg:x3; val_offset:26706*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26706*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8903: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3180001f; valaddr_reg:x3; val_offset:26709*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26709*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8904: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3180003f; valaddr_reg:x3; val_offset:26712*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26712*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8905: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3180007f; valaddr_reg:x3; val_offset:26715*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26715*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8906: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x318000ff; valaddr_reg:x3; val_offset:26718*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26718*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8907: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x318001ff; valaddr_reg:x3; val_offset:26721*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26721*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8908: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x318003ff; valaddr_reg:x3; val_offset:26724*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26724*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8909: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x318007ff; valaddr_reg:x3; val_offset:26727*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26727*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8910: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31800fff; valaddr_reg:x3; val_offset:26730*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26730*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8911: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31801fff; valaddr_reg:x3; val_offset:26733*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26733*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8912: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31803fff; valaddr_reg:x3; val_offset:26736*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26736*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8913: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31807fff; valaddr_reg:x3; val_offset:26739*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26739*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8914: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3180ffff; valaddr_reg:x3; val_offset:26742*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26742*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8915: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3181ffff; valaddr_reg:x3; val_offset:26745*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26745*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8916: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3183ffff; valaddr_reg:x3; val_offset:26748*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26748*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8917: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3187ffff; valaddr_reg:x3; val_offset:26751*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26751*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8918: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x318fffff; valaddr_reg:x3; val_offset:26754*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26754*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8919: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x319fffff; valaddr_reg:x3; val_offset:26757*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26757*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8920: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31bfffff; valaddr_reg:x3; val_offset:26760*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26760*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8921: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31c00000; valaddr_reg:x3; val_offset:26763*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26763*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8922: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31e00000; valaddr_reg:x3; val_offset:26766*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26766*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8923: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31f00000; valaddr_reg:x3; val_offset:26769*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26769*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8924: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31f80000; valaddr_reg:x3; val_offset:26772*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26772*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8925: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fc0000; valaddr_reg:x3; val_offset:26775*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26775*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8926: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fe0000; valaddr_reg:x3; val_offset:26778*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26778*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8927: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ff0000; valaddr_reg:x3; val_offset:26781*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26781*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8928: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ff8000; valaddr_reg:x3; val_offset:26784*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26784*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8929: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ffc000; valaddr_reg:x3; val_offset:26787*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26787*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8930: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ffe000; valaddr_reg:x3; val_offset:26790*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26790*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8931: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fff000; valaddr_reg:x3; val_offset:26793*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26793*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8932: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fff800; valaddr_reg:x3; val_offset:26796*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26796*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8933: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fffc00; valaddr_reg:x3; val_offset:26799*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26799*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8934: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fffe00; valaddr_reg:x3; val_offset:26802*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26802*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8935: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ffff00; valaddr_reg:x3; val_offset:26805*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26805*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8936: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ffff80; valaddr_reg:x3; val_offset:26808*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26808*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8937: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ffffc0; valaddr_reg:x3; val_offset:26811*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26811*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8938: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ffffe0; valaddr_reg:x3; val_offset:26814*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26814*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8939: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fffff0; valaddr_reg:x3; val_offset:26817*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26817*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8940: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fffff8; valaddr_reg:x3; val_offset:26820*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26820*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8941: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fffffc; valaddr_reg:x3; val_offset:26823*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26823*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8942: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31fffffe; valaddr_reg:x3; val_offset:26826*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26826*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8943: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x63 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x31ffffff; valaddr_reg:x3; val_offset:26829*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26829*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8944: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3f800001; valaddr_reg:x3; val_offset:26832*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26832*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8945: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3f800003; valaddr_reg:x3; val_offset:26835*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26835*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8946: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3f800007; valaddr_reg:x3; val_offset:26838*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26838*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8947: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3f999999; valaddr_reg:x3; val_offset:26841*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26841*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8948: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:26844*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26844*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8949: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:26847*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26847*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8950: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:26850*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26850*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8951: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:26853*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26853*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8952: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:26856*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26856*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8953: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:26859*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26859*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8954: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:26862*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26862*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8955: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:26865*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26865*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8956: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:26868*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26868*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8957: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:26871*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26871*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8958: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:26874*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26874*0 + 3*69*FLEN/8, x4, x1, x2) + +inst_8959: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2804a1 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x4306d0 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2804a1; op2val:0xc306d0; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:26877*0 + 3*69*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26877*0 + 3*69*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497464,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497468,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497470,32,FLEN) +NAN_BOXED(2116535190,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497471,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108864,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108865,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108867,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108871,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108879,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108895,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108927,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67108991,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109119,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109375,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67109887,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67110911,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67112959,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67117055,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67125247,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67141631,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67174399,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67239935,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67371007,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(67633151,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(68157439,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(69206015,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(71303167,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(71303168,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(73400320,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(74448896,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(74973184,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75235328,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75366400,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75431936,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75464704,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75481088,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75489280,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75493376,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75495424,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75496448,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75496960,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497216,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497344,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497408,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497440,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497456,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497464,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497468,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497470,32,FLEN) +NAN_BOXED(2116551818,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(75497471,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472192,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472193,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472195,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472199,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472207,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472223,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472255,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472319,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472447,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830472703,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830473215,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830474239,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830476287,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830480383,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830488575,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830504959,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830537727,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830603263,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830734335,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(830996479,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(831520767,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(832569343,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(834666495,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(834666496,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(836763648,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(837812224,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838336512,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838598656,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838729728,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838795264,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838828032,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838844416,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838852608,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838856704,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838858752,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838859776,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860288,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860544,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860672,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860736,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860768,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860784,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860792,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860796,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860798,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(838860799,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2116551841,32,FLEN) +NAN_BOXED(12781264,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-71.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-71.S new file mode 100644 index 000000000..f9b4135b5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-71.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_8960: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:26880*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26880*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8961: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:26883*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26883*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8962: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:26886*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26886*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8963: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:26889*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26889*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8964: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:26892*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26892*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8965: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:26895*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26895*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8966: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:26898*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26898*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8967: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:26901*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26901*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8968: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:26904*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26904*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8969: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:26907*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26907*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8970: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:26910*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26910*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8971: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:26913*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26913*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8972: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:26916*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26916*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8973: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:26919*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26919*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8974: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:26922*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26922*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8975: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:26925*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26925*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8976: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83800000; valaddr_reg:x3; val_offset:26928*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26928*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8977: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83800001; valaddr_reg:x3; val_offset:26931*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26931*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8978: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83800003; valaddr_reg:x3; val_offset:26934*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26934*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8979: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83800007; valaddr_reg:x3; val_offset:26937*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26937*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8980: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8380000f; valaddr_reg:x3; val_offset:26940*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26940*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8981: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8380001f; valaddr_reg:x3; val_offset:26943*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26943*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8982: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8380003f; valaddr_reg:x3; val_offset:26946*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26946*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8983: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8380007f; valaddr_reg:x3; val_offset:26949*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26949*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8984: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x838000ff; valaddr_reg:x3; val_offset:26952*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26952*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8985: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x838001ff; valaddr_reg:x3; val_offset:26955*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26955*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8986: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x838003ff; valaddr_reg:x3; val_offset:26958*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26958*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8987: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x838007ff; valaddr_reg:x3; val_offset:26961*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26961*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8988: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83800fff; valaddr_reg:x3; val_offset:26964*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26964*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8989: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83801fff; valaddr_reg:x3; val_offset:26967*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26967*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8990: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83803fff; valaddr_reg:x3; val_offset:26970*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26970*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8991: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83807fff; valaddr_reg:x3; val_offset:26973*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26973*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8992: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8380ffff; valaddr_reg:x3; val_offset:26976*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26976*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8993: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8381ffff; valaddr_reg:x3; val_offset:26979*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26979*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8994: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8383ffff; valaddr_reg:x3; val_offset:26982*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26982*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8995: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x8387ffff; valaddr_reg:x3; val_offset:26985*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26985*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8996: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x838fffff; valaddr_reg:x3; val_offset:26988*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26988*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8997: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x839fffff; valaddr_reg:x3; val_offset:26991*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26991*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8998: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83bfffff; valaddr_reg:x3; val_offset:26994*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26994*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_8999: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83c00000; valaddr_reg:x3; val_offset:26997*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 26997*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9000: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83e00000; valaddr_reg:x3; val_offset:27000*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27000*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9001: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83f00000; valaddr_reg:x3; val_offset:27003*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27003*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9002: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83f80000; valaddr_reg:x3; val_offset:27006*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27006*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9003: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fc0000; valaddr_reg:x3; val_offset:27009*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27009*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9004: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fe0000; valaddr_reg:x3; val_offset:27012*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27012*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9005: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ff0000; valaddr_reg:x3; val_offset:27015*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27015*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9006: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ff8000; valaddr_reg:x3; val_offset:27018*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27018*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9007: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ffc000; valaddr_reg:x3; val_offset:27021*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27021*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9008: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ffe000; valaddr_reg:x3; val_offset:27024*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27024*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9009: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fff000; valaddr_reg:x3; val_offset:27027*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27027*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9010: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fff800; valaddr_reg:x3; val_offset:27030*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27030*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9011: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fffc00; valaddr_reg:x3; val_offset:27033*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27033*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9012: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fffe00; valaddr_reg:x3; val_offset:27036*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27036*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9013: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ffff00; valaddr_reg:x3; val_offset:27039*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27039*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9014: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ffff80; valaddr_reg:x3; val_offset:27042*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27042*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9015: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ffffc0; valaddr_reg:x3; val_offset:27045*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27045*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9016: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ffffe0; valaddr_reg:x3; val_offset:27048*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27048*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9017: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fffff0; valaddr_reg:x3; val_offset:27051*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27051*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9018: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fffff8; valaddr_reg:x3; val_offset:27054*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27054*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9019: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fffffc; valaddr_reg:x3; val_offset:27057*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27057*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9020: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83fffffe; valaddr_reg:x3; val_offset:27060*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27060*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9021: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2910dd and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x07 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2910dd; op2val:0x80000000; +op3val:0x83ffffff; valaddr_reg:x3; val_offset:27063*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27063*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9022: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75000000; valaddr_reg:x3; val_offset:27066*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27066*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9023: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75000001; valaddr_reg:x3; val_offset:27069*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27069*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9024: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75000003; valaddr_reg:x3; val_offset:27072*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27072*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9025: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75000007; valaddr_reg:x3; val_offset:27075*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27075*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9026: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7500000f; valaddr_reg:x3; val_offset:27078*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27078*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9027: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7500001f; valaddr_reg:x3; val_offset:27081*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27081*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9028: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7500003f; valaddr_reg:x3; val_offset:27084*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27084*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9029: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7500007f; valaddr_reg:x3; val_offset:27087*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27087*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9030: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x750000ff; valaddr_reg:x3; val_offset:27090*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27090*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9031: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x750001ff; valaddr_reg:x3; val_offset:27093*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27093*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9032: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x750003ff; valaddr_reg:x3; val_offset:27096*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27096*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9033: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x750007ff; valaddr_reg:x3; val_offset:27099*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27099*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9034: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75000fff; valaddr_reg:x3; val_offset:27102*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27102*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9035: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75001fff; valaddr_reg:x3; val_offset:27105*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27105*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9036: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75003fff; valaddr_reg:x3; val_offset:27108*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27108*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9037: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75007fff; valaddr_reg:x3; val_offset:27111*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27111*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9038: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7500ffff; valaddr_reg:x3; val_offset:27114*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27114*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9039: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7501ffff; valaddr_reg:x3; val_offset:27117*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27117*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9040: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7503ffff; valaddr_reg:x3; val_offset:27120*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27120*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9041: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7507ffff; valaddr_reg:x3; val_offset:27123*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27123*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9042: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x750fffff; valaddr_reg:x3; val_offset:27126*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27126*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9043: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x751fffff; valaddr_reg:x3; val_offset:27129*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27129*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9044: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x753fffff; valaddr_reg:x3; val_offset:27132*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27132*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9045: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75400000; valaddr_reg:x3; val_offset:27135*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27135*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9046: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75600000; valaddr_reg:x3; val_offset:27138*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27138*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9047: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75700000; valaddr_reg:x3; val_offset:27141*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27141*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9048: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x75780000; valaddr_reg:x3; val_offset:27144*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27144*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9049: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757c0000; valaddr_reg:x3; val_offset:27147*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27147*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9050: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757e0000; valaddr_reg:x3; val_offset:27150*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27150*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9051: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757f0000; valaddr_reg:x3; val_offset:27153*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27153*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9052: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757f8000; valaddr_reg:x3; val_offset:27156*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27156*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9053: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757fc000; valaddr_reg:x3; val_offset:27159*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27159*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9054: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757fe000; valaddr_reg:x3; val_offset:27162*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27162*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9055: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757ff000; valaddr_reg:x3; val_offset:27165*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27165*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9056: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757ff800; valaddr_reg:x3; val_offset:27168*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27168*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9057: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757ffc00; valaddr_reg:x3; val_offset:27171*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27171*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9058: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757ffe00; valaddr_reg:x3; val_offset:27174*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27174*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9059: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757fff00; valaddr_reg:x3; val_offset:27177*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27177*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9060: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757fff80; valaddr_reg:x3; val_offset:27180*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27180*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9061: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757fffc0; valaddr_reg:x3; val_offset:27183*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27183*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9062: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757fffe0; valaddr_reg:x3; val_offset:27186*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27186*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9063: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757ffff0; valaddr_reg:x3; val_offset:27189*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27189*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9064: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757ffff8; valaddr_reg:x3; val_offset:27192*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27192*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9065: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757ffffc; valaddr_reg:x3; val_offset:27195*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27195*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9066: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757ffffe; valaddr_reg:x3; val_offset:27198*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27198*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9067: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xea and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x757fffff; valaddr_reg:x3; val_offset:27201*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27201*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9068: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f000001; valaddr_reg:x3; val_offset:27204*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27204*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9069: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f000003; valaddr_reg:x3; val_offset:27207*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27207*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9070: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f000007; valaddr_reg:x3; val_offset:27210*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27210*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9071: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f199999; valaddr_reg:x3; val_offset:27213*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27213*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9072: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f249249; valaddr_reg:x3; val_offset:27216*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27216*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9073: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f333333; valaddr_reg:x3; val_offset:27219*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27219*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9074: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:27222*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27222*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9075: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:27225*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27225*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9076: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f444444; valaddr_reg:x3; val_offset:27228*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27228*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9077: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:27231*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27231*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9078: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:27234*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27234*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9079: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f666666; valaddr_reg:x3; val_offset:27237*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27237*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9080: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:27240*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27240*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9081: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:27243*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27243*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9082: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:27246*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27246*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9083: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b1faf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3f7cb3 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b1faf; op2val:0x40bf7cb3; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:27249*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27249*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9084: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6000000; valaddr_reg:x3; val_offset:27252*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27252*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9085: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6000001; valaddr_reg:x3; val_offset:27255*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27255*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9086: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6000003; valaddr_reg:x3; val_offset:27258*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27258*0 + 3*70*FLEN/8, x4, x1, x2) + +inst_9087: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6000007; valaddr_reg:x3; val_offset:27261*0 + 3*70*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27261*0 + 3*70*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203904,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203905,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203907,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203911,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203919,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203935,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206203967,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204031,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204159,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204415,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206204927,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206205951,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206207999,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206212095,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206220287,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206236671,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206269439,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206334975,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206466047,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2206728191,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2207252479,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2208301055,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2210398207,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2210398208,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2212495360,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2213543936,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214068224,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214330368,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214461440,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214526976,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214559744,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214576128,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214584320,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214588416,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214590464,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214591488,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592000,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592256,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592384,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592448,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592480,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592496,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592504,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592508,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592510,32,FLEN) +NAN_BOXED(2116620509,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2214592511,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934272,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934273,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934275,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934279,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934287,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934303,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934335,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934399,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934527,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962934783,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962935295,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962936319,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962938367,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962942463,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962950655,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962967039,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1962999807,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1963065343,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1963196415,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1963458559,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1963982847,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1965031423,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1967128575,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1967128576,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1969225728,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1970274304,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1970798592,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971060736,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971191808,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971257344,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971290112,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971306496,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971314688,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971318784,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971320832,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971321856,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322368,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322624,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322752,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322816,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322848,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322864,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322872,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322876,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322878,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(1971322879,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2116755375,32,FLEN) +NAN_BOXED(1086291123,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785017856,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785017857,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785017859,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785017863,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-72.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-72.S new file mode 100644 index 000000000..b2ec0ce30 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-72.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_9088: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa600000f; valaddr_reg:x3; val_offset:27264*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27264*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9089: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa600001f; valaddr_reg:x3; val_offset:27267*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27267*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9090: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa600003f; valaddr_reg:x3; val_offset:27270*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27270*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9091: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa600007f; valaddr_reg:x3; val_offset:27273*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27273*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9092: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa60000ff; valaddr_reg:x3; val_offset:27276*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27276*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9093: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa60001ff; valaddr_reg:x3; val_offset:27279*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27279*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9094: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa60003ff; valaddr_reg:x3; val_offset:27282*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27282*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9095: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa60007ff; valaddr_reg:x3; val_offset:27285*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27285*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9096: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6000fff; valaddr_reg:x3; val_offset:27288*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27288*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9097: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6001fff; valaddr_reg:x3; val_offset:27291*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27291*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9098: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6003fff; valaddr_reg:x3; val_offset:27294*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27294*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9099: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6007fff; valaddr_reg:x3; val_offset:27297*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27297*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9100: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa600ffff; valaddr_reg:x3; val_offset:27300*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27300*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9101: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa601ffff; valaddr_reg:x3; val_offset:27303*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27303*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9102: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa603ffff; valaddr_reg:x3; val_offset:27306*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27306*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9103: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa607ffff; valaddr_reg:x3; val_offset:27309*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27309*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9104: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa60fffff; valaddr_reg:x3; val_offset:27312*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27312*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9105: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa61fffff; valaddr_reg:x3; val_offset:27315*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27315*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9106: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa63fffff; valaddr_reg:x3; val_offset:27318*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27318*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9107: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6400000; valaddr_reg:x3; val_offset:27321*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27321*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9108: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6600000; valaddr_reg:x3; val_offset:27324*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27324*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9109: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6700000; valaddr_reg:x3; val_offset:27327*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27327*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9110: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa6780000; valaddr_reg:x3; val_offset:27330*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27330*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9111: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67c0000; valaddr_reg:x3; val_offset:27333*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27333*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9112: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67e0000; valaddr_reg:x3; val_offset:27336*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27336*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9113: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67f0000; valaddr_reg:x3; val_offset:27339*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27339*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9114: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67f8000; valaddr_reg:x3; val_offset:27342*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27342*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9115: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67fc000; valaddr_reg:x3; val_offset:27345*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27345*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9116: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67fe000; valaddr_reg:x3; val_offset:27348*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27348*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9117: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67ff000; valaddr_reg:x3; val_offset:27351*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27351*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9118: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67ff800; valaddr_reg:x3; val_offset:27354*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27354*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9119: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67ffc00; valaddr_reg:x3; val_offset:27357*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27357*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9120: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67ffe00; valaddr_reg:x3; val_offset:27360*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27360*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9121: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67fff00; valaddr_reg:x3; val_offset:27363*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27363*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9122: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67fff80; valaddr_reg:x3; val_offset:27366*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27366*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9123: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67fffc0; valaddr_reg:x3; val_offset:27369*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27369*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9124: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67fffe0; valaddr_reg:x3; val_offset:27372*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27372*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9125: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67ffff0; valaddr_reg:x3; val_offset:27375*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27375*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9126: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67ffff8; valaddr_reg:x3; val_offset:27378*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27378*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9127: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67ffffc; valaddr_reg:x3; val_offset:27381*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27381*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9128: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67ffffe; valaddr_reg:x3; val_offset:27384*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27384*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9129: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x4c and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xa67fffff; valaddr_reg:x3; val_offset:27387*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27387*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9130: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbf800001; valaddr_reg:x3; val_offset:27390*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27390*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9131: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbf800003; valaddr_reg:x3; val_offset:27393*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27393*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9132: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbf800007; valaddr_reg:x3; val_offset:27396*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27396*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9133: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbf999999; valaddr_reg:x3; val_offset:27399*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27399*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9134: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:27402*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27402*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9135: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:27405*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27405*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9136: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:27408*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27408*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9137: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:27411*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27411*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9138: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:27414*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27414*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9139: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:27417*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27417*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9140: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:27420*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27420*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9141: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:27423*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27423*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9142: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:27426*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27426*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9143: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:27429*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27429*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9144: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:27432*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27432*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9145: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2b56d0 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x3f3f17 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2b56d0; op2val:0x80bf3f17; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:27435*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27435*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9146: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:27438*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27438*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9147: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:27441*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27441*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9148: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:27444*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27444*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9149: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:27447*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27447*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9150: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:27450*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27450*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9151: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:27453*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27453*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9152: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:27456*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27456*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9153: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:27459*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27459*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9154: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:27462*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27462*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9155: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:27465*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27465*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9156: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:27468*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27468*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9157: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:27471*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27471*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9158: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:27474*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27474*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9159: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:27477*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27477*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9160: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:27480*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27480*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9161: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:27483*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27483*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9162: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc800000; valaddr_reg:x3; val_offset:27486*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27486*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9163: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc800001; valaddr_reg:x3; val_offset:27489*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27489*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9164: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc800003; valaddr_reg:x3; val_offset:27492*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27492*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9165: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc800007; valaddr_reg:x3; val_offset:27495*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27495*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9166: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc80000f; valaddr_reg:x3; val_offset:27498*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27498*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9167: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc80001f; valaddr_reg:x3; val_offset:27501*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27501*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9168: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc80003f; valaddr_reg:x3; val_offset:27504*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27504*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9169: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc80007f; valaddr_reg:x3; val_offset:27507*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27507*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9170: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc8000ff; valaddr_reg:x3; val_offset:27510*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27510*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9171: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc8001ff; valaddr_reg:x3; val_offset:27513*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27513*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9172: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc8003ff; valaddr_reg:x3; val_offset:27516*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27516*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9173: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc8007ff; valaddr_reg:x3; val_offset:27519*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27519*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9174: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc800fff; valaddr_reg:x3; val_offset:27522*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27522*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9175: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc801fff; valaddr_reg:x3; val_offset:27525*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27525*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9176: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc803fff; valaddr_reg:x3; val_offset:27528*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27528*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9177: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc807fff; valaddr_reg:x3; val_offset:27531*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27531*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9178: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc80ffff; valaddr_reg:x3; val_offset:27534*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27534*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9179: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc81ffff; valaddr_reg:x3; val_offset:27537*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27537*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9180: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc83ffff; valaddr_reg:x3; val_offset:27540*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27540*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9181: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc87ffff; valaddr_reg:x3; val_offset:27543*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27543*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9182: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc8fffff; valaddr_reg:x3; val_offset:27546*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27546*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9183: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xc9fffff; valaddr_reg:x3; val_offset:27549*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27549*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9184: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcbfffff; valaddr_reg:x3; val_offset:27552*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27552*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9185: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcc00000; valaddr_reg:x3; val_offset:27555*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27555*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9186: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xce00000; valaddr_reg:x3; val_offset:27558*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27558*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9187: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcf00000; valaddr_reg:x3; val_offset:27561*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27561*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9188: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcf80000; valaddr_reg:x3; val_offset:27564*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27564*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9189: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfc0000; valaddr_reg:x3; val_offset:27567*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27567*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9190: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfe0000; valaddr_reg:x3; val_offset:27570*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27570*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9191: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcff0000; valaddr_reg:x3; val_offset:27573*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27573*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9192: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcff8000; valaddr_reg:x3; val_offset:27576*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27576*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9193: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcffc000; valaddr_reg:x3; val_offset:27579*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27579*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9194: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcffe000; valaddr_reg:x3; val_offset:27582*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27582*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9195: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfff000; valaddr_reg:x3; val_offset:27585*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27585*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9196: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfff800; valaddr_reg:x3; val_offset:27588*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27588*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9197: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfffc00; valaddr_reg:x3; val_offset:27591*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27591*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9198: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfffe00; valaddr_reg:x3; val_offset:27594*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27594*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9199: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcffff00; valaddr_reg:x3; val_offset:27597*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27597*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9200: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcffff80; valaddr_reg:x3; val_offset:27600*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27600*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9201: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcffffc0; valaddr_reg:x3; val_offset:27603*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27603*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9202: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcffffe0; valaddr_reg:x3; val_offset:27606*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27606*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9203: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfffff0; valaddr_reg:x3; val_offset:27609*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27609*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9204: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfffff8; valaddr_reg:x3; val_offset:27612*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27612*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9205: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfffffc; valaddr_reg:x3; val_offset:27615*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27615*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9206: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcfffffe; valaddr_reg:x3; val_offset:27618*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27618*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9207: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x2cde9f and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e2cde9f; op2val:0x0; +op3val:0xcffffff; valaddr_reg:x3; val_offset:27621*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27621*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9208: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64800000; valaddr_reg:x3; val_offset:27624*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27624*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9209: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64800001; valaddr_reg:x3; val_offset:27627*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27627*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9210: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64800003; valaddr_reg:x3; val_offset:27630*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27630*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9211: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64800007; valaddr_reg:x3; val_offset:27633*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27633*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9212: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x6480000f; valaddr_reg:x3; val_offset:27636*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27636*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9213: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x6480001f; valaddr_reg:x3; val_offset:27639*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27639*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9214: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x6480003f; valaddr_reg:x3; val_offset:27642*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27642*0 + 3*71*FLEN/8, x4, x1, x2) + +inst_9215: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x6480007f; valaddr_reg:x3; val_offset:27645*0 + 3*71*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27645*0 + 3*71*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785017871,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785017887,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785017919,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785017983,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785018111,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785018367,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785018879,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785019903,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785021951,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785026047,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785034239,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785050623,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785083391,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785148927,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785279999,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2785542143,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2786066431,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2787115007,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2789212159,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2789212160,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2791309312,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2792357888,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2792882176,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793144320,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793275392,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793340928,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793373696,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793390080,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793398272,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793402368,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793404416,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793405440,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793405952,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406208,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406336,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406400,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406432,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406448,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406456,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406460,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406462,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(2793406463,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2116769488,32,FLEN) +NAN_BOXED(2160017175,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715200,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715201,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715203,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715207,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715215,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715231,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715263,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715327,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715455,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715711,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209716223,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209717247,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209719295,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209723391,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209731583,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209747967,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209780735,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209846271,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209977343,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(210239487,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(210763775,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(211812351,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(213909503,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(213909504,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(216006656,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217055232,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217579520,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217841664,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(217972736,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218038272,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218071040,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218087424,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218095616,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218099712,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218101760,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218102784,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103296,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103552,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103680,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103744,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103776,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103792,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103800,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103804,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103806,32,FLEN) +NAN_BOXED(2116869791,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(218103807,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110208,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110209,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110211,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110215,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110223,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110239,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110271,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110335,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-73.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-73.S new file mode 100644 index 000000000..c879792f7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-73.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_9216: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x648000ff; valaddr_reg:x3; val_offset:27648*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27648*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9217: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x648001ff; valaddr_reg:x3; val_offset:27651*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27651*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9218: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x648003ff; valaddr_reg:x3; val_offset:27654*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27654*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9219: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x648007ff; valaddr_reg:x3; val_offset:27657*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27657*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9220: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64800fff; valaddr_reg:x3; val_offset:27660*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27660*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9221: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64801fff; valaddr_reg:x3; val_offset:27663*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27663*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9222: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64803fff; valaddr_reg:x3; val_offset:27666*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27666*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9223: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64807fff; valaddr_reg:x3; val_offset:27669*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27669*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9224: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x6480ffff; valaddr_reg:x3; val_offset:27672*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27672*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9225: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x6481ffff; valaddr_reg:x3; val_offset:27675*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27675*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9226: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x6483ffff; valaddr_reg:x3; val_offset:27678*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27678*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9227: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x6487ffff; valaddr_reg:x3; val_offset:27681*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27681*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9228: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x648fffff; valaddr_reg:x3; val_offset:27684*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27684*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9229: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x649fffff; valaddr_reg:x3; val_offset:27687*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27687*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9230: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64bfffff; valaddr_reg:x3; val_offset:27690*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27690*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9231: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64c00000; valaddr_reg:x3; val_offset:27693*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27693*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9232: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64e00000; valaddr_reg:x3; val_offset:27696*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27696*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9233: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64f00000; valaddr_reg:x3; val_offset:27699*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27699*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9234: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64f80000; valaddr_reg:x3; val_offset:27702*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27702*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9235: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fc0000; valaddr_reg:x3; val_offset:27705*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27705*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9236: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fe0000; valaddr_reg:x3; val_offset:27708*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27708*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9237: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ff0000; valaddr_reg:x3; val_offset:27711*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27711*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9238: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ff8000; valaddr_reg:x3; val_offset:27714*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27714*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9239: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ffc000; valaddr_reg:x3; val_offset:27717*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27717*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9240: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ffe000; valaddr_reg:x3; val_offset:27720*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27720*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9241: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fff000; valaddr_reg:x3; val_offset:27723*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27723*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9242: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fff800; valaddr_reg:x3; val_offset:27726*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27726*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9243: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fffc00; valaddr_reg:x3; val_offset:27729*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27729*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9244: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fffe00; valaddr_reg:x3; val_offset:27732*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27732*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9245: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ffff00; valaddr_reg:x3; val_offset:27735*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27735*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9246: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ffff80; valaddr_reg:x3; val_offset:27738*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27738*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9247: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ffffc0; valaddr_reg:x3; val_offset:27741*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27741*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9248: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ffffe0; valaddr_reg:x3; val_offset:27744*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27744*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9249: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fffff0; valaddr_reg:x3; val_offset:27747*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27747*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9250: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fffff8; valaddr_reg:x3; val_offset:27750*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27750*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9251: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fffffc; valaddr_reg:x3; val_offset:27753*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27753*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9252: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64fffffe; valaddr_reg:x3; val_offset:27756*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27756*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9253: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xc9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x64ffffff; valaddr_reg:x3; val_offset:27759*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27759*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9254: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f000001; valaddr_reg:x3; val_offset:27762*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27762*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9255: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f000003; valaddr_reg:x3; val_offset:27765*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27765*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9256: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f000007; valaddr_reg:x3; val_offset:27768*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27768*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9257: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f199999; valaddr_reg:x3; val_offset:27771*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27771*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9258: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f249249; valaddr_reg:x3; val_offset:27774*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27774*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9259: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f333333; valaddr_reg:x3; val_offset:27777*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27777*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9260: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:27780*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27780*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9261: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:27783*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27783*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9262: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f444444; valaddr_reg:x3; val_offset:27786*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27786*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9263: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:27789*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27789*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9264: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:27792*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27792*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9265: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f666666; valaddr_reg:x3; val_offset:27795*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27795*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9266: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:27798*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27798*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9267: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:27801*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27801*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9268: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:27804*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27804*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9269: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3104df and fs2 == 0 and fe2 == 0x81 and fm2 == 0x391c2b and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3104df; op2val:0x40b91c2b; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:27807*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27807*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9270: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0800000; valaddr_reg:x3; val_offset:27810*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27810*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9271: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0800001; valaddr_reg:x3; val_offset:27813*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27813*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9272: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0800003; valaddr_reg:x3; val_offset:27816*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27816*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9273: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0800007; valaddr_reg:x3; val_offset:27819*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27819*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9274: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf080000f; valaddr_reg:x3; val_offset:27822*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27822*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9275: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf080001f; valaddr_reg:x3; val_offset:27825*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27825*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9276: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf080003f; valaddr_reg:x3; val_offset:27828*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27828*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9277: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf080007f; valaddr_reg:x3; val_offset:27831*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27831*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9278: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf08000ff; valaddr_reg:x3; val_offset:27834*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27834*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9279: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf08001ff; valaddr_reg:x3; val_offset:27837*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27837*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9280: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf08003ff; valaddr_reg:x3; val_offset:27840*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27840*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9281: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf08007ff; valaddr_reg:x3; val_offset:27843*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27843*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9282: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0800fff; valaddr_reg:x3; val_offset:27846*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27846*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9283: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0801fff; valaddr_reg:x3; val_offset:27849*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27849*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9284: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0803fff; valaddr_reg:x3; val_offset:27852*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27852*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9285: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0807fff; valaddr_reg:x3; val_offset:27855*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27855*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9286: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf080ffff; valaddr_reg:x3; val_offset:27858*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27858*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9287: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf081ffff; valaddr_reg:x3; val_offset:27861*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27861*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9288: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf083ffff; valaddr_reg:x3; val_offset:27864*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27864*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9289: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf087ffff; valaddr_reg:x3; val_offset:27867*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27867*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9290: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf08fffff; valaddr_reg:x3; val_offset:27870*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27870*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9291: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf09fffff; valaddr_reg:x3; val_offset:27873*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27873*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9292: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0bfffff; valaddr_reg:x3; val_offset:27876*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27876*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9293: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0c00000; valaddr_reg:x3; val_offset:27879*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27879*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9294: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0e00000; valaddr_reg:x3; val_offset:27882*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27882*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9295: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0f00000; valaddr_reg:x3; val_offset:27885*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27885*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9296: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0f80000; valaddr_reg:x3; val_offset:27888*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27888*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9297: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fc0000; valaddr_reg:x3; val_offset:27891*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27891*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9298: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fe0000; valaddr_reg:x3; val_offset:27894*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27894*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9299: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ff0000; valaddr_reg:x3; val_offset:27897*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27897*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9300: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ff8000; valaddr_reg:x3; val_offset:27900*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27900*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9301: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ffc000; valaddr_reg:x3; val_offset:27903*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27903*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9302: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ffe000; valaddr_reg:x3; val_offset:27906*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27906*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9303: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fff000; valaddr_reg:x3; val_offset:27909*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27909*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9304: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fff800; valaddr_reg:x3; val_offset:27912*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27912*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9305: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fffc00; valaddr_reg:x3; val_offset:27915*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27915*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9306: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fffe00; valaddr_reg:x3; val_offset:27918*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27918*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9307: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ffff00; valaddr_reg:x3; val_offset:27921*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27921*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9308: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ffff80; valaddr_reg:x3; val_offset:27924*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27924*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9309: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ffffc0; valaddr_reg:x3; val_offset:27927*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27927*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9310: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ffffe0; valaddr_reg:x3; val_offset:27930*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27930*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9311: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fffff0; valaddr_reg:x3; val_offset:27933*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27933*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9312: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fffff8; valaddr_reg:x3; val_offset:27936*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27936*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9313: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fffffc; valaddr_reg:x3; val_offset:27939*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27939*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9314: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0fffffe; valaddr_reg:x3; val_offset:27942*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27942*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9315: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xe1 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xf0ffffff; valaddr_reg:x3; val_offset:27945*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27945*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9316: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff000001; valaddr_reg:x3; val_offset:27948*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27948*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9317: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff000003; valaddr_reg:x3; val_offset:27951*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27951*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9318: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff000007; valaddr_reg:x3; val_offset:27954*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27954*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9319: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff199999; valaddr_reg:x3; val_offset:27957*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27957*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9320: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff249249; valaddr_reg:x3; val_offset:27960*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27960*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9321: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff333333; valaddr_reg:x3; val_offset:27963*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27963*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9322: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:27966*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27966*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9323: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:27969*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27969*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9324: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff444444; valaddr_reg:x3; val_offset:27972*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27972*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9325: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:27975*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27975*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9326: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:27978*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27978*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9327: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff666666; valaddr_reg:x3; val_offset:27981*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27981*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9328: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:27984*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27984*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9329: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:27987*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27987*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9330: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:27990*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27990*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9331: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32745e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x379ef7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32745e; op2val:0xc0b79ef7; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:27993*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27993*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9332: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a800000; valaddr_reg:x3; val_offset:27996*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27996*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9333: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a800001; valaddr_reg:x3; val_offset:27999*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 27999*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9334: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a800003; valaddr_reg:x3; val_offset:28002*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28002*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9335: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a800007; valaddr_reg:x3; val_offset:28005*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28005*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9336: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a80000f; valaddr_reg:x3; val_offset:28008*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28008*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9337: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a80001f; valaddr_reg:x3; val_offset:28011*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28011*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9338: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a80003f; valaddr_reg:x3; val_offset:28014*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28014*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9339: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a80007f; valaddr_reg:x3; val_offset:28017*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28017*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9340: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a8000ff; valaddr_reg:x3; val_offset:28020*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28020*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9341: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a8001ff; valaddr_reg:x3; val_offset:28023*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28023*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9342: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a8003ff; valaddr_reg:x3; val_offset:28026*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28026*0 + 3*72*FLEN/8, x4, x1, x2) + +inst_9343: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a8007ff; valaddr_reg:x3; val_offset:28029*0 + 3*72*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28029*0 + 3*72*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110463,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686110719,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686111231,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686112255,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686114303,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686118399,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686126591,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686142975,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686175743,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686241279,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686372351,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1686634495,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1687158783,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1688207359,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1690304511,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1690304512,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1692401664,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1693450240,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1693974528,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694236672,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694367744,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694433280,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694466048,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694482432,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694490624,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694494720,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694496768,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694497792,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498304,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498560,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498688,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498752,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498784,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498800,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498808,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498812,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498814,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(1694498815,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2117141727,32,FLEN) +NAN_BOXED(1085873195,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920448,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920449,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920451,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920455,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920463,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920479,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920511,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920575,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920703,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034920959,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034921471,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034922495,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034924543,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034928639,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034936831,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034953215,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4034985983,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4035051519,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4035182591,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4035444735,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4035969023,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4037017599,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4039114751,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4039114752,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4041211904,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4042260480,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4042784768,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043046912,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043177984,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043243520,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043276288,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043292672,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043300864,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043304960,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043307008,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043308032,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043308544,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043308800,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043308928,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043308992,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043309024,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043309040,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043309048,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043309052,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043309054,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4043309055,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2117235806,32,FLEN) +NAN_BOXED(3233259255,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773504,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773505,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773507,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773511,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773519,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773535,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773567,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773631,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786773759,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786774015,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786774527,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786775551,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-74.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-74.S new file mode 100644 index 000000000..dec3d28f7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-74.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_9344: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a800fff; valaddr_reg:x3; val_offset:28032*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28032*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9345: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a801fff; valaddr_reg:x3; val_offset:28035*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28035*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9346: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a803fff; valaddr_reg:x3; val_offset:28038*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28038*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9347: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a807fff; valaddr_reg:x3; val_offset:28041*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28041*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9348: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a80ffff; valaddr_reg:x3; val_offset:28044*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28044*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9349: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a81ffff; valaddr_reg:x3; val_offset:28047*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28047*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9350: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a83ffff; valaddr_reg:x3; val_offset:28050*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28050*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9351: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a87ffff; valaddr_reg:x3; val_offset:28053*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28053*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9352: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a8fffff; valaddr_reg:x3; val_offset:28056*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28056*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9353: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6a9fffff; valaddr_reg:x3; val_offset:28059*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28059*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9354: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6abfffff; valaddr_reg:x3; val_offset:28062*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28062*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9355: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6ac00000; valaddr_reg:x3; val_offset:28065*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28065*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9356: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6ae00000; valaddr_reg:x3; val_offset:28068*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28068*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9357: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6af00000; valaddr_reg:x3; val_offset:28071*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28071*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9358: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6af80000; valaddr_reg:x3; val_offset:28074*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28074*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9359: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afc0000; valaddr_reg:x3; val_offset:28077*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28077*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9360: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afe0000; valaddr_reg:x3; val_offset:28080*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28080*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9361: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6aff0000; valaddr_reg:x3; val_offset:28083*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28083*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9362: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6aff8000; valaddr_reg:x3; val_offset:28086*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28086*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9363: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6affc000; valaddr_reg:x3; val_offset:28089*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28089*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9364: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6affe000; valaddr_reg:x3; val_offset:28092*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28092*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9365: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afff000; valaddr_reg:x3; val_offset:28095*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28095*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9366: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afff800; valaddr_reg:x3; val_offset:28098*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28098*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9367: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afffc00; valaddr_reg:x3; val_offset:28101*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28101*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9368: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afffe00; valaddr_reg:x3; val_offset:28104*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28104*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9369: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6affff00; valaddr_reg:x3; val_offset:28107*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28107*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9370: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6affff80; valaddr_reg:x3; val_offset:28110*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28110*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9371: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6affffc0; valaddr_reg:x3; val_offset:28113*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28113*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9372: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6affffe0; valaddr_reg:x3; val_offset:28116*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28116*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9373: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afffff0; valaddr_reg:x3; val_offset:28119*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28119*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9374: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afffff8; valaddr_reg:x3; val_offset:28122*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28122*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9375: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afffffc; valaddr_reg:x3; val_offset:28125*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28125*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9376: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6afffffe; valaddr_reg:x3; val_offset:28128*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28128*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9377: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xd5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x6affffff; valaddr_reg:x3; val_offset:28131*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28131*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9378: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f000001; valaddr_reg:x3; val_offset:28134*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28134*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9379: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f000003; valaddr_reg:x3; val_offset:28137*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28137*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9380: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f000007; valaddr_reg:x3; val_offset:28140*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28140*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9381: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f199999; valaddr_reg:x3; val_offset:28143*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28143*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9382: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f249249; valaddr_reg:x3; val_offset:28146*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28146*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9383: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f333333; valaddr_reg:x3; val_offset:28149*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28149*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9384: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:28152*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28152*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9385: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:28155*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28155*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9386: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f444444; valaddr_reg:x3; val_offset:28158*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28158*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9387: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:28161*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28161*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9388: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:28164*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28164*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9389: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f666666; valaddr_reg:x3; val_offset:28167*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28167*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9390: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:28170*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28170*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9391: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:28173*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28173*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9392: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:28176*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28176*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9393: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x32d6bf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3739f4 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e32d6bf; op2val:0x40b739f4; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:28179*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28179*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9394: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:28182*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28182*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9395: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:28185*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28185*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9396: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:28188*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28188*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9397: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:28191*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28191*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9398: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:28194*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28194*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9399: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:28197*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28197*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9400: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:28200*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28200*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9401: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:28203*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28203*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9402: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:28206*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28206*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9403: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:28209*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28209*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9404: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:28212*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28212*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9405: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:28215*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28215*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9406: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:28218*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28218*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9407: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:28221*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28221*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9408: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:28224*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28224*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9409: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:28227*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28227*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9410: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88000000; valaddr_reg:x3; val_offset:28230*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28230*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9411: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88000001; valaddr_reg:x3; val_offset:28233*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28233*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9412: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88000003; valaddr_reg:x3; val_offset:28236*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28236*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9413: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88000007; valaddr_reg:x3; val_offset:28239*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28239*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9414: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8800000f; valaddr_reg:x3; val_offset:28242*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28242*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9415: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8800001f; valaddr_reg:x3; val_offset:28245*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28245*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9416: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8800003f; valaddr_reg:x3; val_offset:28248*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28248*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9417: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8800007f; valaddr_reg:x3; val_offset:28251*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28251*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9418: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x880000ff; valaddr_reg:x3; val_offset:28254*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28254*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9419: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x880001ff; valaddr_reg:x3; val_offset:28257*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28257*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9420: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x880003ff; valaddr_reg:x3; val_offset:28260*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28260*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9421: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x880007ff; valaddr_reg:x3; val_offset:28263*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28263*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9422: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88000fff; valaddr_reg:x3; val_offset:28266*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28266*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9423: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88001fff; valaddr_reg:x3; val_offset:28269*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28269*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9424: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88003fff; valaddr_reg:x3; val_offset:28272*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28272*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9425: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88007fff; valaddr_reg:x3; val_offset:28275*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28275*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9426: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8800ffff; valaddr_reg:x3; val_offset:28278*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28278*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9427: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8801ffff; valaddr_reg:x3; val_offset:28281*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28281*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9428: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8803ffff; valaddr_reg:x3; val_offset:28284*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28284*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9429: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x8807ffff; valaddr_reg:x3; val_offset:28287*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28287*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9430: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x880fffff; valaddr_reg:x3; val_offset:28290*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28290*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9431: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x881fffff; valaddr_reg:x3; val_offset:28293*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28293*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9432: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x883fffff; valaddr_reg:x3; val_offset:28296*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28296*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9433: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88400000; valaddr_reg:x3; val_offset:28299*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28299*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9434: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88600000; valaddr_reg:x3; val_offset:28302*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28302*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9435: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88700000; valaddr_reg:x3; val_offset:28305*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28305*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9436: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x88780000; valaddr_reg:x3; val_offset:28308*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28308*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9437: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887c0000; valaddr_reg:x3; val_offset:28311*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28311*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9438: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887e0000; valaddr_reg:x3; val_offset:28314*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28314*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9439: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887f0000; valaddr_reg:x3; val_offset:28317*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28317*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9440: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887f8000; valaddr_reg:x3; val_offset:28320*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28320*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9441: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887fc000; valaddr_reg:x3; val_offset:28323*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28323*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9442: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887fe000; valaddr_reg:x3; val_offset:28326*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28326*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9443: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887ff000; valaddr_reg:x3; val_offset:28329*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28329*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9444: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887ff800; valaddr_reg:x3; val_offset:28332*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28332*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9445: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887ffc00; valaddr_reg:x3; val_offset:28335*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28335*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9446: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887ffe00; valaddr_reg:x3; val_offset:28338*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28338*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9447: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887fff00; valaddr_reg:x3; val_offset:28341*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28341*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9448: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887fff80; valaddr_reg:x3; val_offset:28344*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28344*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9449: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887fffc0; valaddr_reg:x3; val_offset:28347*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28347*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9450: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887fffe0; valaddr_reg:x3; val_offset:28350*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28350*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9451: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887ffff0; valaddr_reg:x3; val_offset:28353*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28353*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9452: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887ffff8; valaddr_reg:x3; val_offset:28356*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28356*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9453: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887ffffc; valaddr_reg:x3; val_offset:28359*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28359*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9454: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887ffffe; valaddr_reg:x3; val_offset:28362*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28362*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9455: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3361f1 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x10 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3361f1; op2val:0x80000000; +op3val:0x887fffff; valaddr_reg:x3; val_offset:28365*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28365*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9456: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25000000; valaddr_reg:x3; val_offset:28368*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28368*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9457: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25000001; valaddr_reg:x3; val_offset:28371*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28371*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9458: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25000003; valaddr_reg:x3; val_offset:28374*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28374*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9459: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25000007; valaddr_reg:x3; val_offset:28377*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28377*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9460: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x2500000f; valaddr_reg:x3; val_offset:28380*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28380*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9461: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x2500001f; valaddr_reg:x3; val_offset:28383*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28383*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9462: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x2500003f; valaddr_reg:x3; val_offset:28386*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28386*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9463: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x2500007f; valaddr_reg:x3; val_offset:28389*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28389*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9464: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x250000ff; valaddr_reg:x3; val_offset:28392*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28392*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9465: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x250001ff; valaddr_reg:x3; val_offset:28395*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28395*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9466: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x250003ff; valaddr_reg:x3; val_offset:28398*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28398*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9467: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x250007ff; valaddr_reg:x3; val_offset:28401*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28401*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9468: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25000fff; valaddr_reg:x3; val_offset:28404*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28404*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9469: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25001fff; valaddr_reg:x3; val_offset:28407*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28407*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9470: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25003fff; valaddr_reg:x3; val_offset:28410*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28410*0 + 3*73*FLEN/8, x4, x1, x2) + +inst_9471: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25007fff; valaddr_reg:x3; val_offset:28413*0 + 3*73*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28413*0 + 3*73*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786777599,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786781695,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786789887,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786806271,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786839039,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1786904575,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1787035647,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1787297791,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1787822079,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1788870655,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1790967807,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1790967808,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1793064960,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1794113536,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1794637824,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1794899968,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795031040,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795096576,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795129344,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795145728,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795153920,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795158016,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795160064,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795161088,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795161600,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795161856,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795161984,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795162048,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795162080,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795162096,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795162104,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795162108,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795162110,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(1795162111,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2117260991,32,FLEN) +NAN_BOXED(1085749748,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701376,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701377,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701379,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701383,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701391,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701407,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701439,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701503,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701631,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701887,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281702399,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281703423,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281705471,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281709567,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281717759,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281734143,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281766911,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281832447,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281963519,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2282225663,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2282749951,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2283798527,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2285895679,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2285895680,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2287992832,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289041408,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289565696,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289827840,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2289958912,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290024448,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290057216,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290073600,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290081792,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290085888,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290087936,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290088960,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089472,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089728,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089856,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089920,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089952,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089968,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089976,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089980,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089982,32,FLEN) +NAN_BOXED(2117296625,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2290089983,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620756992,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620756993,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620756995,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620756999,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620757007,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620757023,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620757055,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620757119,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620757247,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620757503,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620758015,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620759039,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620761087,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620765183,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620773375,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620789759,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-75.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-75.S new file mode 100644 index 000000000..66652ff25 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-75.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_9472: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x2500ffff; valaddr_reg:x3; val_offset:28416*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28416*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9473: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x2501ffff; valaddr_reg:x3; val_offset:28419*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28419*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9474: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x2503ffff; valaddr_reg:x3; val_offset:28422*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28422*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9475: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x2507ffff; valaddr_reg:x3; val_offset:28425*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28425*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9476: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x250fffff; valaddr_reg:x3; val_offset:28428*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28428*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9477: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x251fffff; valaddr_reg:x3; val_offset:28431*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28431*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9478: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x253fffff; valaddr_reg:x3; val_offset:28434*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28434*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9479: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25400000; valaddr_reg:x3; val_offset:28437*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28437*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9480: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25600000; valaddr_reg:x3; val_offset:28440*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28440*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9481: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25700000; valaddr_reg:x3; val_offset:28443*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28443*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9482: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x25780000; valaddr_reg:x3; val_offset:28446*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28446*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9483: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257c0000; valaddr_reg:x3; val_offset:28449*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28449*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9484: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257e0000; valaddr_reg:x3; val_offset:28452*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28452*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9485: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257f0000; valaddr_reg:x3; val_offset:28455*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28455*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9486: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257f8000; valaddr_reg:x3; val_offset:28458*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28458*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9487: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257fc000; valaddr_reg:x3; val_offset:28461*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28461*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9488: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257fe000; valaddr_reg:x3; val_offset:28464*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28464*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9489: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257ff000; valaddr_reg:x3; val_offset:28467*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28467*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9490: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257ff800; valaddr_reg:x3; val_offset:28470*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28470*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9491: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257ffc00; valaddr_reg:x3; val_offset:28473*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28473*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9492: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257ffe00; valaddr_reg:x3; val_offset:28476*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28476*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9493: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257fff00; valaddr_reg:x3; val_offset:28479*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28479*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9494: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257fff80; valaddr_reg:x3; val_offset:28482*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28482*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9495: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257fffc0; valaddr_reg:x3; val_offset:28485*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28485*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9496: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257fffe0; valaddr_reg:x3; val_offset:28488*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28488*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9497: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257ffff0; valaddr_reg:x3; val_offset:28491*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28491*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9498: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257ffff8; valaddr_reg:x3; val_offset:28494*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28494*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9499: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257ffffc; valaddr_reg:x3; val_offset:28497*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28497*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9500: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257ffffe; valaddr_reg:x3; val_offset:28500*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28500*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9501: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x4a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x257fffff; valaddr_reg:x3; val_offset:28503*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28503*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9502: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3f800001; valaddr_reg:x3; val_offset:28506*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28506*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9503: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3f800003; valaddr_reg:x3; val_offset:28509*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28509*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9504: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3f800007; valaddr_reg:x3; val_offset:28512*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28512*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9505: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3f999999; valaddr_reg:x3; val_offset:28515*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28515*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9506: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:28518*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28518*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9507: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:28521*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28521*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9508: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:28524*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28524*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9509: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:28527*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28527*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9510: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:28530*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28530*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9511: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:28533*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28533*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9512: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:28536*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28536*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9513: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:28539*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28539*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9514: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:28542*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28542*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9515: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:28545*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28545*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9516: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:28548*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28548*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9517: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x34dd85 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x352c69 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e34dd85; op2val:0xb52c69; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:28551*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28551*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9518: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76000000; valaddr_reg:x3; val_offset:28554*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28554*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9519: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76000001; valaddr_reg:x3; val_offset:28557*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28557*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9520: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76000003; valaddr_reg:x3; val_offset:28560*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28560*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9521: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76000007; valaddr_reg:x3; val_offset:28563*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28563*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9522: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7600000f; valaddr_reg:x3; val_offset:28566*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28566*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9523: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7600001f; valaddr_reg:x3; val_offset:28569*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28569*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9524: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7600003f; valaddr_reg:x3; val_offset:28572*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28572*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9525: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7600007f; valaddr_reg:x3; val_offset:28575*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28575*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9526: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x760000ff; valaddr_reg:x3; val_offset:28578*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28578*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9527: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x760001ff; valaddr_reg:x3; val_offset:28581*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28581*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9528: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x760003ff; valaddr_reg:x3; val_offset:28584*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28584*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9529: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x760007ff; valaddr_reg:x3; val_offset:28587*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28587*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9530: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76000fff; valaddr_reg:x3; val_offset:28590*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28590*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9531: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76001fff; valaddr_reg:x3; val_offset:28593*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28593*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9532: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76003fff; valaddr_reg:x3; val_offset:28596*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28596*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9533: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76007fff; valaddr_reg:x3; val_offset:28599*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28599*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9534: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7600ffff; valaddr_reg:x3; val_offset:28602*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28602*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9535: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7601ffff; valaddr_reg:x3; val_offset:28605*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28605*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9536: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7603ffff; valaddr_reg:x3; val_offset:28608*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28608*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9537: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7607ffff; valaddr_reg:x3; val_offset:28611*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28611*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9538: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x760fffff; valaddr_reg:x3; val_offset:28614*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28614*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9539: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x761fffff; valaddr_reg:x3; val_offset:28617*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28617*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9540: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x763fffff; valaddr_reg:x3; val_offset:28620*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28620*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9541: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76400000; valaddr_reg:x3; val_offset:28623*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28623*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9542: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76600000; valaddr_reg:x3; val_offset:28626*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28626*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9543: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76700000; valaddr_reg:x3; val_offset:28629*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28629*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9544: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x76780000; valaddr_reg:x3; val_offset:28632*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28632*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9545: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767c0000; valaddr_reg:x3; val_offset:28635*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28635*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9546: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767e0000; valaddr_reg:x3; val_offset:28638*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28638*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9547: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767f0000; valaddr_reg:x3; val_offset:28641*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28641*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9548: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767f8000; valaddr_reg:x3; val_offset:28644*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28644*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9549: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767fc000; valaddr_reg:x3; val_offset:28647*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28647*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9550: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767fe000; valaddr_reg:x3; val_offset:28650*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28650*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9551: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767ff000; valaddr_reg:x3; val_offset:28653*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28653*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9552: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767ff800; valaddr_reg:x3; val_offset:28656*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28656*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9553: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767ffc00; valaddr_reg:x3; val_offset:28659*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28659*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9554: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767ffe00; valaddr_reg:x3; val_offset:28662*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28662*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9555: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767fff00; valaddr_reg:x3; val_offset:28665*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28665*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9556: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767fff80; valaddr_reg:x3; val_offset:28668*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28668*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9557: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767fffc0; valaddr_reg:x3; val_offset:28671*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28671*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9558: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767fffe0; valaddr_reg:x3; val_offset:28674*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28674*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9559: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767ffff0; valaddr_reg:x3; val_offset:28677*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28677*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9560: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767ffff8; valaddr_reg:x3; val_offset:28680*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28680*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9561: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767ffffc; valaddr_reg:x3; val_offset:28683*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28683*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9562: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767ffffe; valaddr_reg:x3; val_offset:28686*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28686*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9563: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xec and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x767fffff; valaddr_reg:x3; val_offset:28689*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28689*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9564: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f000001; valaddr_reg:x3; val_offset:28692*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28692*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9565: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f000003; valaddr_reg:x3; val_offset:28695*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28695*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9566: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f000007; valaddr_reg:x3; val_offset:28698*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28698*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9567: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f199999; valaddr_reg:x3; val_offset:28701*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28701*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9568: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f249249; valaddr_reg:x3; val_offset:28704*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28704*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9569: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f333333; valaddr_reg:x3; val_offset:28707*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28707*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9570: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:28710*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28710*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9571: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:28713*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28713*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9572: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f444444; valaddr_reg:x3; val_offset:28716*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28716*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9573: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:28719*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28719*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9574: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:28722*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28722*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9575: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f666666; valaddr_reg:x3; val_offset:28725*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28725*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9576: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:28728*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28728*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9577: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:28731*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28731*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9578: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:28734*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28734*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9579: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x35c0b2 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x3449f5 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e35c0b2; op2val:0x40b449f5; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:28737*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28737*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9580: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:28740*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28740*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9581: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:28743*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28743*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9582: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:28746*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28746*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9583: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:28749*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28749*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9584: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:28752*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28752*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9585: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:28755*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28755*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9586: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:28758*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28758*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9587: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:28761*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28761*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9588: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:28764*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28764*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9589: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:28767*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28767*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9590: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:28770*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28770*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9591: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:28773*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28773*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9592: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:28776*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28776*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9593: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:28779*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28779*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9594: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:28782*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28782*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9595: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:28785*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28785*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9596: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85000000; valaddr_reg:x3; val_offset:28788*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28788*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9597: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85000001; valaddr_reg:x3; val_offset:28791*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28791*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9598: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85000003; valaddr_reg:x3; val_offset:28794*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28794*0 + 3*74*FLEN/8, x4, x1, x2) + +inst_9599: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85000007; valaddr_reg:x3; val_offset:28797*0 + 3*74*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28797*0 + 3*74*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620822527,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(620888063,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(621019135,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(621281279,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(621805567,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(622854143,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(624951295,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(624951296,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(627048448,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(628097024,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(628621312,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(628883456,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629014528,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629080064,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629112832,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629129216,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629137408,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629141504,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629143552,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629144576,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145088,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145344,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145472,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145536,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145568,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145584,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145592,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145596,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145598,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(629145599,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2117393797,32,FLEN) +NAN_BOXED(11873385,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711488,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711489,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711491,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711495,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711503,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711519,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711551,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711615,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711743,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979711999,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979712511,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979713535,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979715583,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979719679,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979727871,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979744255,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979777023,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979842559,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1979973631,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1980235775,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1980760063,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1981808639,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1983905791,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1983905792,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1986002944,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1987051520,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1987575808,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1987837952,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1987969024,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988034560,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988067328,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988083712,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988091904,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988096000,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988098048,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988099072,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988099584,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988099840,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988099968,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988100032,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988100064,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988100080,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988100088,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988100092,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988100094,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(1988100095,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2117451954,32,FLEN) +NAN_BOXED(1085557237,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369728,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369729,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369731,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369735,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-76.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-76.S new file mode 100644 index 000000000..731b2e7b2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-76.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_9600: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8500000f; valaddr_reg:x3; val_offset:28800*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28800*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9601: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8500001f; valaddr_reg:x3; val_offset:28803*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28803*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9602: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8500003f; valaddr_reg:x3; val_offset:28806*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28806*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9603: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8500007f; valaddr_reg:x3; val_offset:28809*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28809*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9604: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x850000ff; valaddr_reg:x3; val_offset:28812*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28812*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9605: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x850001ff; valaddr_reg:x3; val_offset:28815*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28815*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9606: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x850003ff; valaddr_reg:x3; val_offset:28818*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28818*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9607: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x850007ff; valaddr_reg:x3; val_offset:28821*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28821*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9608: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85000fff; valaddr_reg:x3; val_offset:28824*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28824*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9609: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85001fff; valaddr_reg:x3; val_offset:28827*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28827*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9610: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85003fff; valaddr_reg:x3; val_offset:28830*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28830*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9611: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85007fff; valaddr_reg:x3; val_offset:28833*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28833*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9612: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8500ffff; valaddr_reg:x3; val_offset:28836*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28836*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9613: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8501ffff; valaddr_reg:x3; val_offset:28839*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28839*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9614: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8503ffff; valaddr_reg:x3; val_offset:28842*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28842*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9615: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x8507ffff; valaddr_reg:x3; val_offset:28845*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28845*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9616: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x850fffff; valaddr_reg:x3; val_offset:28848*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28848*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9617: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x851fffff; valaddr_reg:x3; val_offset:28851*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28851*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9618: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x853fffff; valaddr_reg:x3; val_offset:28854*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28854*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9619: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85400000; valaddr_reg:x3; val_offset:28857*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28857*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9620: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85600000; valaddr_reg:x3; val_offset:28860*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28860*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9621: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85700000; valaddr_reg:x3; val_offset:28863*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28863*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9622: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x85780000; valaddr_reg:x3; val_offset:28866*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28866*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9623: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857c0000; valaddr_reg:x3; val_offset:28869*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28869*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9624: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857e0000; valaddr_reg:x3; val_offset:28872*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28872*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9625: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857f0000; valaddr_reg:x3; val_offset:28875*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28875*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9626: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857f8000; valaddr_reg:x3; val_offset:28878*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28878*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9627: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857fc000; valaddr_reg:x3; val_offset:28881*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28881*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9628: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857fe000; valaddr_reg:x3; val_offset:28884*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28884*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9629: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857ff000; valaddr_reg:x3; val_offset:28887*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28887*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9630: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857ff800; valaddr_reg:x3; val_offset:28890*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28890*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9631: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857ffc00; valaddr_reg:x3; val_offset:28893*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28893*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9632: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857ffe00; valaddr_reg:x3; val_offset:28896*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28896*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9633: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857fff00; valaddr_reg:x3; val_offset:28899*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28899*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9634: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857fff80; valaddr_reg:x3; val_offset:28902*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28902*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9635: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857fffc0; valaddr_reg:x3; val_offset:28905*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28905*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9636: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857fffe0; valaddr_reg:x3; val_offset:28908*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28908*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9637: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857ffff0; valaddr_reg:x3; val_offset:28911*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28911*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9638: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857ffff8; valaddr_reg:x3; val_offset:28914*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28914*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9639: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857ffffc; valaddr_reg:x3; val_offset:28917*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28917*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9640: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857ffffe; valaddr_reg:x3; val_offset:28920*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28920*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9641: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3741cc and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3741cc; op2val:0x80000000; +op3val:0x857fffff; valaddr_reg:x3; val_offset:28923*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28923*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9642: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:28926*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28926*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9643: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:28929*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28929*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9644: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:28932*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28932*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9645: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:28935*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28935*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9646: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:28938*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28938*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9647: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:28941*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28941*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9648: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:28944*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28944*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9649: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:28947*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28947*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9650: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:28950*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28950*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9651: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:28953*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28953*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9652: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:28956*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28956*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9653: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:28959*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28959*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9654: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:28962*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28962*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9655: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:28965*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28965*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9656: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:28968*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28968*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9657: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:28971*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28971*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9658: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90000000; valaddr_reg:x3; val_offset:28974*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28974*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9659: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90000001; valaddr_reg:x3; val_offset:28977*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28977*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9660: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90000003; valaddr_reg:x3; val_offset:28980*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28980*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9661: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90000007; valaddr_reg:x3; val_offset:28983*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28983*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9662: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x9000000f; valaddr_reg:x3; val_offset:28986*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28986*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9663: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x9000001f; valaddr_reg:x3; val_offset:28989*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28989*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9664: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x9000003f; valaddr_reg:x3; val_offset:28992*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28992*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9665: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x9000007f; valaddr_reg:x3; val_offset:28995*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28995*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9666: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x900000ff; valaddr_reg:x3; val_offset:28998*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 28998*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9667: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x900001ff; valaddr_reg:x3; val_offset:29001*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29001*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9668: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x900003ff; valaddr_reg:x3; val_offset:29004*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29004*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9669: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x900007ff; valaddr_reg:x3; val_offset:29007*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29007*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9670: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90000fff; valaddr_reg:x3; val_offset:29010*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29010*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9671: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90001fff; valaddr_reg:x3; val_offset:29013*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29013*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9672: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90003fff; valaddr_reg:x3; val_offset:29016*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29016*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9673: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90007fff; valaddr_reg:x3; val_offset:29019*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29019*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9674: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x9000ffff; valaddr_reg:x3; val_offset:29022*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29022*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9675: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x9001ffff; valaddr_reg:x3; val_offset:29025*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29025*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9676: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x9003ffff; valaddr_reg:x3; val_offset:29028*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29028*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9677: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x9007ffff; valaddr_reg:x3; val_offset:29031*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29031*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9678: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x900fffff; valaddr_reg:x3; val_offset:29034*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29034*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9679: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x901fffff; valaddr_reg:x3; val_offset:29037*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29037*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9680: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x903fffff; valaddr_reg:x3; val_offset:29040*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29040*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9681: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90400000; valaddr_reg:x3; val_offset:29043*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29043*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9682: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90600000; valaddr_reg:x3; val_offset:29046*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29046*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9683: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90700000; valaddr_reg:x3; val_offset:29049*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29049*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9684: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x90780000; valaddr_reg:x3; val_offset:29052*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29052*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9685: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907c0000; valaddr_reg:x3; val_offset:29055*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29055*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9686: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907e0000; valaddr_reg:x3; val_offset:29058*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29058*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9687: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907f0000; valaddr_reg:x3; val_offset:29061*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29061*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9688: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907f8000; valaddr_reg:x3; val_offset:29064*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29064*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9689: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907fc000; valaddr_reg:x3; val_offset:29067*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29067*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9690: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907fe000; valaddr_reg:x3; val_offset:29070*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29070*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9691: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907ff000; valaddr_reg:x3; val_offset:29073*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29073*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9692: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907ff800; valaddr_reg:x3; val_offset:29076*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29076*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9693: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907ffc00; valaddr_reg:x3; val_offset:29079*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29079*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9694: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907ffe00; valaddr_reg:x3; val_offset:29082*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29082*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9695: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907fff00; valaddr_reg:x3; val_offset:29085*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29085*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9696: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907fff80; valaddr_reg:x3; val_offset:29088*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29088*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9697: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907fffc0; valaddr_reg:x3; val_offset:29091*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29091*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9698: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907fffe0; valaddr_reg:x3; val_offset:29094*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29094*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9699: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907ffff0; valaddr_reg:x3; val_offset:29097*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29097*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9700: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907ffff8; valaddr_reg:x3; val_offset:29100*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29100*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9701: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907ffffc; valaddr_reg:x3; val_offset:29103*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29103*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9702: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907ffffe; valaddr_reg:x3; val_offset:29106*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29106*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9703: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3783d0 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x20 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3783d0; op2val:0x80000000; +op3val:0x907fffff; valaddr_reg:x3; val_offset:29109*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29109*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9704: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:29112*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29112*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9705: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:29115*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29115*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9706: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:29118*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29118*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9707: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:29121*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29121*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9708: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:29124*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29124*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9709: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:29127*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29127*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9710: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:29130*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29130*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9711: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:29133*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29133*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9712: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:29136*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29136*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9713: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:29139*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29139*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9714: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:29142*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29142*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9715: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:29145*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29145*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9716: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:29148*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29148*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9717: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:29151*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29151*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9718: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:29154*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29154*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9719: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:29157*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29157*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9720: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2800000; valaddr_reg:x3; val_offset:29160*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29160*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9721: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2800001; valaddr_reg:x3; val_offset:29163*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29163*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9722: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2800003; valaddr_reg:x3; val_offset:29166*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29166*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9723: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2800007; valaddr_reg:x3; val_offset:29169*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29169*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9724: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x280000f; valaddr_reg:x3; val_offset:29172*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29172*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9725: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x280001f; valaddr_reg:x3; val_offset:29175*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29175*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9726: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x280003f; valaddr_reg:x3; val_offset:29178*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29178*0 + 3*75*FLEN/8, x4, x1, x2) + +inst_9727: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x280007f; valaddr_reg:x3; val_offset:29181*0 + 3*75*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29181*0 + 3*75*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369743,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369759,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369791,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369855,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369983,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231370239,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231370751,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231371775,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231373823,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231377919,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231386111,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231402495,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231435263,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231500799,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231631871,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231894015,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2232418303,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2233466879,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2235564031,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2235564032,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2237661184,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2238709760,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239234048,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239496192,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239627264,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239692800,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239725568,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239741952,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239750144,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239754240,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239756288,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239757312,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239757824,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758080,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758208,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758272,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758304,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758320,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758328,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758332,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758334,32,FLEN) +NAN_BOXED(2117550540,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2239758335,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919104,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919105,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919107,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919111,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919119,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919135,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919167,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919231,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919359,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919615,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415920127,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415921151,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415923199,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415927295,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415935487,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415951871,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415984639,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416050175,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416181247,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416443391,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2416967679,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2418016255,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2420113407,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2420113408,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2422210560,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2423259136,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2423783424,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424045568,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424176640,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424242176,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424274944,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424291328,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424299520,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424303616,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424305664,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424306688,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307200,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307456,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307584,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307648,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307680,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307696,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307704,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307708,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307710,32,FLEN) +NAN_BOXED(2117567440,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2424307711,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943040,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943041,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943043,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943047,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943055,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943071,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943103,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943167,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-77.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-77.S new file mode 100644 index 000000000..953008680 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-77.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_9728: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x28000ff; valaddr_reg:x3; val_offset:29184*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29184*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9729: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x28001ff; valaddr_reg:x3; val_offset:29187*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29187*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9730: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x28003ff; valaddr_reg:x3; val_offset:29190*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29190*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9731: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x28007ff; valaddr_reg:x3; val_offset:29193*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29193*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9732: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2800fff; valaddr_reg:x3; val_offset:29196*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29196*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9733: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2801fff; valaddr_reg:x3; val_offset:29199*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29199*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9734: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2803fff; valaddr_reg:x3; val_offset:29202*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29202*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9735: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2807fff; valaddr_reg:x3; val_offset:29205*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29205*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9736: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x280ffff; valaddr_reg:x3; val_offset:29208*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29208*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9737: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x281ffff; valaddr_reg:x3; val_offset:29211*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29211*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9738: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x283ffff; valaddr_reg:x3; val_offset:29214*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29214*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9739: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x287ffff; valaddr_reg:x3; val_offset:29217*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29217*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9740: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x28fffff; valaddr_reg:x3; val_offset:29220*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29220*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9741: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x29fffff; valaddr_reg:x3; val_offset:29223*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29223*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9742: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2bfffff; valaddr_reg:x3; val_offset:29226*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29226*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9743: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2c00000; valaddr_reg:x3; val_offset:29229*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29229*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9744: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2e00000; valaddr_reg:x3; val_offset:29232*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29232*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9745: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2f00000; valaddr_reg:x3; val_offset:29235*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29235*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9746: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2f80000; valaddr_reg:x3; val_offset:29238*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29238*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9747: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fc0000; valaddr_reg:x3; val_offset:29241*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29241*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9748: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fe0000; valaddr_reg:x3; val_offset:29244*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29244*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9749: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ff0000; valaddr_reg:x3; val_offset:29247*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29247*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9750: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ff8000; valaddr_reg:x3; val_offset:29250*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29250*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9751: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ffc000; valaddr_reg:x3; val_offset:29253*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29253*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9752: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ffe000; valaddr_reg:x3; val_offset:29256*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29256*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9753: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fff000; valaddr_reg:x3; val_offset:29259*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29259*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9754: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fff800; valaddr_reg:x3; val_offset:29262*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29262*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9755: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fffc00; valaddr_reg:x3; val_offset:29265*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29265*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9756: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fffe00; valaddr_reg:x3; val_offset:29268*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29268*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9757: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ffff00; valaddr_reg:x3; val_offset:29271*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29271*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9758: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ffff80; valaddr_reg:x3; val_offset:29274*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29274*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9759: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ffffc0; valaddr_reg:x3; val_offset:29277*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29277*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9760: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ffffe0; valaddr_reg:x3; val_offset:29280*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29280*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9761: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fffff0; valaddr_reg:x3; val_offset:29283*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29283*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9762: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fffff8; valaddr_reg:x3; val_offset:29286*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29286*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9763: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fffffc; valaddr_reg:x3; val_offset:29289*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29289*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9764: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2fffffe; valaddr_reg:x3; val_offset:29292*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29292*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9765: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x381821 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e381821; op2val:0x0; +op3val:0x2ffffff; valaddr_reg:x3; val_offset:29295*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29295*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9766: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:29298*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29298*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9767: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:29301*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29301*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9768: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:29304*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29304*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9769: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:29307*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29307*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9770: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:29310*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29310*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9771: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:29313*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29313*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9772: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:29316*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29316*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9773: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:29319*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29319*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9774: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:29322*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29322*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9775: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:29325*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29325*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9776: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:29328*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29328*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9777: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:29331*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29331*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9778: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:29334*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29334*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9779: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:29337*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29337*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9780: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:29340*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29340*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9781: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:29343*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29343*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9782: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82800000; valaddr_reg:x3; val_offset:29346*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29346*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9783: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82800001; valaddr_reg:x3; val_offset:29349*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29349*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9784: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82800003; valaddr_reg:x3; val_offset:29352*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29352*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9785: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82800007; valaddr_reg:x3; val_offset:29355*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29355*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9786: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8280000f; valaddr_reg:x3; val_offset:29358*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29358*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9787: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8280001f; valaddr_reg:x3; val_offset:29361*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29361*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9788: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8280003f; valaddr_reg:x3; val_offset:29364*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29364*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9789: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8280007f; valaddr_reg:x3; val_offset:29367*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29367*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9790: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x828000ff; valaddr_reg:x3; val_offset:29370*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29370*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9791: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x828001ff; valaddr_reg:x3; val_offset:29373*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29373*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9792: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x828003ff; valaddr_reg:x3; val_offset:29376*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29376*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9793: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x828007ff; valaddr_reg:x3; val_offset:29379*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29379*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9794: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82800fff; valaddr_reg:x3; val_offset:29382*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29382*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9795: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82801fff; valaddr_reg:x3; val_offset:29385*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29385*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9796: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82803fff; valaddr_reg:x3; val_offset:29388*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29388*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9797: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82807fff; valaddr_reg:x3; val_offset:29391*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29391*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9798: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8280ffff; valaddr_reg:x3; val_offset:29394*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29394*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9799: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8281ffff; valaddr_reg:x3; val_offset:29397*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29397*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9800: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8283ffff; valaddr_reg:x3; val_offset:29400*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29400*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9801: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x8287ffff; valaddr_reg:x3; val_offset:29403*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29403*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9802: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x828fffff; valaddr_reg:x3; val_offset:29406*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29406*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9803: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x829fffff; valaddr_reg:x3; val_offset:29409*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29409*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9804: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82bfffff; valaddr_reg:x3; val_offset:29412*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29412*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9805: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82c00000; valaddr_reg:x3; val_offset:29415*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29415*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9806: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82e00000; valaddr_reg:x3; val_offset:29418*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29418*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9807: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82f00000; valaddr_reg:x3; val_offset:29421*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29421*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9808: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82f80000; valaddr_reg:x3; val_offset:29424*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29424*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9809: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fc0000; valaddr_reg:x3; val_offset:29427*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29427*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9810: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fe0000; valaddr_reg:x3; val_offset:29430*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29430*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9811: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ff0000; valaddr_reg:x3; val_offset:29433*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29433*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9812: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ff8000; valaddr_reg:x3; val_offset:29436*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29436*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9813: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ffc000; valaddr_reg:x3; val_offset:29439*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29439*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9814: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ffe000; valaddr_reg:x3; val_offset:29442*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29442*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9815: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fff000; valaddr_reg:x3; val_offset:29445*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29445*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9816: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fff800; valaddr_reg:x3; val_offset:29448*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29448*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9817: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fffc00; valaddr_reg:x3; val_offset:29451*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29451*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9818: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fffe00; valaddr_reg:x3; val_offset:29454*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29454*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9819: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ffff00; valaddr_reg:x3; val_offset:29457*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29457*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9820: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ffff80; valaddr_reg:x3; val_offset:29460*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29460*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9821: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ffffc0; valaddr_reg:x3; val_offset:29463*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29463*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9822: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ffffe0; valaddr_reg:x3; val_offset:29466*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29466*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9823: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fffff0; valaddr_reg:x3; val_offset:29469*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29469*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9824: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fffff8; valaddr_reg:x3; val_offset:29472*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29472*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9825: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fffffc; valaddr_reg:x3; val_offset:29475*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29475*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9826: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82fffffe; valaddr_reg:x3; val_offset:29478*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29478*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9827: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3b52d3 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x05 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3b52d3; op2val:0x80000000; +op3val:0x82ffffff; valaddr_reg:x3; val_offset:29481*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29481*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9828: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6000000; valaddr_reg:x3; val_offset:29484*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29484*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9829: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6000001; valaddr_reg:x3; val_offset:29487*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29487*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9830: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6000003; valaddr_reg:x3; val_offset:29490*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29490*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9831: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6000007; valaddr_reg:x3; val_offset:29493*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29493*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9832: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe600000f; valaddr_reg:x3; val_offset:29496*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29496*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9833: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe600001f; valaddr_reg:x3; val_offset:29499*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29499*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9834: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe600003f; valaddr_reg:x3; val_offset:29502*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29502*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9835: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe600007f; valaddr_reg:x3; val_offset:29505*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29505*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9836: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe60000ff; valaddr_reg:x3; val_offset:29508*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29508*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9837: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe60001ff; valaddr_reg:x3; val_offset:29511*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29511*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9838: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe60003ff; valaddr_reg:x3; val_offset:29514*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29514*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9839: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe60007ff; valaddr_reg:x3; val_offset:29517*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29517*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9840: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6000fff; valaddr_reg:x3; val_offset:29520*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29520*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9841: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6001fff; valaddr_reg:x3; val_offset:29523*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29523*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9842: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6003fff; valaddr_reg:x3; val_offset:29526*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29526*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9843: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6007fff; valaddr_reg:x3; val_offset:29529*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29529*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9844: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe600ffff; valaddr_reg:x3; val_offset:29532*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29532*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9845: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe601ffff; valaddr_reg:x3; val_offset:29535*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29535*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9846: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe603ffff; valaddr_reg:x3; val_offset:29538*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29538*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9847: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe607ffff; valaddr_reg:x3; val_offset:29541*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29541*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9848: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe60fffff; valaddr_reg:x3; val_offset:29544*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29544*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9849: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe61fffff; valaddr_reg:x3; val_offset:29547*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29547*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9850: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe63fffff; valaddr_reg:x3; val_offset:29550*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29550*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9851: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6400000; valaddr_reg:x3; val_offset:29553*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29553*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9852: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6600000; valaddr_reg:x3; val_offset:29556*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29556*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9853: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6700000; valaddr_reg:x3; val_offset:29559*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29559*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9854: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe6780000; valaddr_reg:x3; val_offset:29562*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29562*0 + 3*76*FLEN/8, x4, x1, x2) + +inst_9855: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67c0000; valaddr_reg:x3; val_offset:29565*0 + 3*76*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29565*0 + 3*76*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943295,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41943551,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41944063,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41945087,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41947135,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41951231,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41959423,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(41975807,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42008575,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42074111,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42205183,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42467327,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(42991615,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(44040191,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(46137343,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(46137344,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(48234496,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(49283072,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(49807360,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50069504,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50200576,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50266112,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50298880,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50315264,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50323456,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50327552,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50329600,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50330624,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331136,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331392,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331520,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331584,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331616,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331632,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331640,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331644,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331646,32,FLEN) +NAN_BOXED(2117605409,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(50331647,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426688,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426689,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426691,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426695,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426703,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426719,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426751,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426815,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189426943,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189427199,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189427711,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189428735,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189430783,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189434879,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189443071,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189459455,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189492223,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189557759,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189688831,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2189950975,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2190475263,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2191523839,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2193620991,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2193620992,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2195718144,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2196766720,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197291008,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197553152,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197684224,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197749760,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197782528,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197798912,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197807104,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197811200,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197813248,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197814272,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197814784,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815040,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815168,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815232,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815264,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815280,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815288,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815292,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815294,32,FLEN) +NAN_BOXED(2117817043,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2197815295,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759680,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759681,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759683,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759687,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759695,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759711,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759743,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759807,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858759935,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858760191,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858760703,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858761727,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858763775,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858767871,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858776063,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858792447,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858825215,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3858890751,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3859021823,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3859283967,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3859808255,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3860856831,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3862953983,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3862953984,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3865051136,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3866099712,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3866624000,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3866886144,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-78.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-78.S new file mode 100644 index 000000000..1468f6bc4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-78.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_9856: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67e0000; valaddr_reg:x3; val_offset:29568*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29568*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9857: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67f0000; valaddr_reg:x3; val_offset:29571*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29571*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9858: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67f8000; valaddr_reg:x3; val_offset:29574*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29574*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9859: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67fc000; valaddr_reg:x3; val_offset:29577*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29577*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9860: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67fe000; valaddr_reg:x3; val_offset:29580*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29580*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9861: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67ff000; valaddr_reg:x3; val_offset:29583*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29583*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9862: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67ff800; valaddr_reg:x3; val_offset:29586*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29586*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9863: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67ffc00; valaddr_reg:x3; val_offset:29589*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29589*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9864: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67ffe00; valaddr_reg:x3; val_offset:29592*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29592*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9865: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67fff00; valaddr_reg:x3; val_offset:29595*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29595*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9866: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67fff80; valaddr_reg:x3; val_offset:29598*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29598*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9867: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67fffc0; valaddr_reg:x3; val_offset:29601*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29601*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9868: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67fffe0; valaddr_reg:x3; val_offset:29604*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29604*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9869: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67ffff0; valaddr_reg:x3; val_offset:29607*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29607*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9870: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67ffff8; valaddr_reg:x3; val_offset:29610*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29610*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9871: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67ffffc; valaddr_reg:x3; val_offset:29613*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29613*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9872: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67ffffe; valaddr_reg:x3; val_offset:29616*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29616*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9873: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xcc and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xe67fffff; valaddr_reg:x3; val_offset:29619*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29619*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9874: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff000001; valaddr_reg:x3; val_offset:29622*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29622*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9875: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff000003; valaddr_reg:x3; val_offset:29625*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29625*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9876: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff000007; valaddr_reg:x3; val_offset:29628*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29628*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9877: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff199999; valaddr_reg:x3; val_offset:29631*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29631*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9878: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff249249; valaddr_reg:x3; val_offset:29634*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29634*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9879: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff333333; valaddr_reg:x3; val_offset:29637*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29637*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9880: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:29640*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29640*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9881: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:29643*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29643*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9882: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff444444; valaddr_reg:x3; val_offset:29646*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29646*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9883: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:29649*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29649*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9884: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:29652*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29652*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9885: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff666666; valaddr_reg:x3; val_offset:29655*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29655*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9886: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:29658*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29658*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9887: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:29661*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29661*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9888: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:29664*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29664*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9889: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e6e75 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2c1287 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e6e75; op2val:0xc0ac1287; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:29667*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29667*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9890: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d800000; valaddr_reg:x3; val_offset:29670*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29670*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9891: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d800001; valaddr_reg:x3; val_offset:29673*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29673*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9892: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d800003; valaddr_reg:x3; val_offset:29676*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29676*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9893: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d800007; valaddr_reg:x3; val_offset:29679*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29679*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9894: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d80000f; valaddr_reg:x3; val_offset:29682*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29682*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9895: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d80001f; valaddr_reg:x3; val_offset:29685*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29685*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9896: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d80003f; valaddr_reg:x3; val_offset:29688*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29688*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9897: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d80007f; valaddr_reg:x3; val_offset:29691*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29691*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9898: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d8000ff; valaddr_reg:x3; val_offset:29694*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29694*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9899: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d8001ff; valaddr_reg:x3; val_offset:29697*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29697*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9900: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d8003ff; valaddr_reg:x3; val_offset:29700*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29700*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9901: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d8007ff; valaddr_reg:x3; val_offset:29703*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29703*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9902: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d800fff; valaddr_reg:x3; val_offset:29706*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29706*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9903: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d801fff; valaddr_reg:x3; val_offset:29709*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29709*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9904: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d803fff; valaddr_reg:x3; val_offset:29712*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29712*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9905: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d807fff; valaddr_reg:x3; val_offset:29715*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29715*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9906: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d80ffff; valaddr_reg:x3; val_offset:29718*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29718*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9907: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d81ffff; valaddr_reg:x3; val_offset:29721*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29721*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9908: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d83ffff; valaddr_reg:x3; val_offset:29724*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29724*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9909: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d87ffff; valaddr_reg:x3; val_offset:29727*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29727*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9910: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d8fffff; valaddr_reg:x3; val_offset:29730*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29730*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9911: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7d9fffff; valaddr_reg:x3; val_offset:29733*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29733*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9912: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dbfffff; valaddr_reg:x3; val_offset:29736*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29736*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9913: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dc00000; valaddr_reg:x3; val_offset:29739*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29739*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9914: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7de00000; valaddr_reg:x3; val_offset:29742*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29742*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9915: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7df00000; valaddr_reg:x3; val_offset:29745*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29745*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9916: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7df80000; valaddr_reg:x3; val_offset:29748*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29748*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9917: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfc0000; valaddr_reg:x3; val_offset:29751*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29751*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9918: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfe0000; valaddr_reg:x3; val_offset:29754*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29754*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9919: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dff0000; valaddr_reg:x3; val_offset:29757*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29757*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9920: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dff8000; valaddr_reg:x3; val_offset:29760*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29760*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9921: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dffc000; valaddr_reg:x3; val_offset:29763*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29763*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9922: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dffe000; valaddr_reg:x3; val_offset:29766*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29766*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9923: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfff000; valaddr_reg:x3; val_offset:29769*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29769*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9924: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfff800; valaddr_reg:x3; val_offset:29772*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29772*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9925: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfffc00; valaddr_reg:x3; val_offset:29775*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29775*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9926: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfffe00; valaddr_reg:x3; val_offset:29778*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29778*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9927: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dffff00; valaddr_reg:x3; val_offset:29781*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29781*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9928: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dffff80; valaddr_reg:x3; val_offset:29784*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29784*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9929: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dffffc0; valaddr_reg:x3; val_offset:29787*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29787*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9930: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dffffe0; valaddr_reg:x3; val_offset:29790*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29790*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9931: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfffff0; valaddr_reg:x3; val_offset:29793*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29793*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9932: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfffff8; valaddr_reg:x3; val_offset:29796*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29796*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9933: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfffffc; valaddr_reg:x3; val_offset:29799*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29799*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9934: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dfffffe; valaddr_reg:x3; val_offset:29802*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29802*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9935: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7dffffff; valaddr_reg:x3; val_offset:29805*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29805*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9936: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f000001; valaddr_reg:x3; val_offset:29808*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29808*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9937: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f000003; valaddr_reg:x3; val_offset:29811*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29811*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9938: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f000007; valaddr_reg:x3; val_offset:29814*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29814*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9939: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f199999; valaddr_reg:x3; val_offset:29817*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29817*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9940: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f249249; valaddr_reg:x3; val_offset:29820*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29820*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9941: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f333333; valaddr_reg:x3; val_offset:29823*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29823*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9942: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:29826*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29826*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9943: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:29829*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29829*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9944: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f444444; valaddr_reg:x3; val_offset:29832*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29832*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9945: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:29835*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29835*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9946: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:29838*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29838*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9947: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f666666; valaddr_reg:x3; val_offset:29841*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29841*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9948: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:29844*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29844*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9949: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:29847*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29847*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9950: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:29850*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29850*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9951: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3e8248 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x2c009f and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3e8248; op2val:0x40ac009f; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:29853*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29853*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9952: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb800000; valaddr_reg:x3; val_offset:29856*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29856*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9953: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb800001; valaddr_reg:x3; val_offset:29859*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29859*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9954: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb800003; valaddr_reg:x3; val_offset:29862*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29862*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9955: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb800007; valaddr_reg:x3; val_offset:29865*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29865*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9956: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb80000f; valaddr_reg:x3; val_offset:29868*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29868*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9957: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb80001f; valaddr_reg:x3; val_offset:29871*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29871*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9958: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb80003f; valaddr_reg:x3; val_offset:29874*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29874*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9959: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb80007f; valaddr_reg:x3; val_offset:29877*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29877*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9960: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb8000ff; valaddr_reg:x3; val_offset:29880*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29880*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9961: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb8001ff; valaddr_reg:x3; val_offset:29883*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29883*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9962: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb8003ff; valaddr_reg:x3; val_offset:29886*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29886*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9963: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb8007ff; valaddr_reg:x3; val_offset:29889*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29889*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9964: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb800fff; valaddr_reg:x3; val_offset:29892*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29892*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9965: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb801fff; valaddr_reg:x3; val_offset:29895*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29895*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9966: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb803fff; valaddr_reg:x3; val_offset:29898*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29898*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9967: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb807fff; valaddr_reg:x3; val_offset:29901*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29901*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9968: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb80ffff; valaddr_reg:x3; val_offset:29904*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29904*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9969: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb81ffff; valaddr_reg:x3; val_offset:29907*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29907*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9970: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb83ffff; valaddr_reg:x3; val_offset:29910*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29910*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9971: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb87ffff; valaddr_reg:x3; val_offset:29913*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29913*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9972: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb8fffff; valaddr_reg:x3; val_offset:29916*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29916*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9973: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfb9fffff; valaddr_reg:x3; val_offset:29919*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29919*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9974: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbbfffff; valaddr_reg:x3; val_offset:29922*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29922*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9975: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbc00000; valaddr_reg:x3; val_offset:29925*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29925*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9976: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbe00000; valaddr_reg:x3; val_offset:29928*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29928*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9977: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbf00000; valaddr_reg:x3; val_offset:29931*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29931*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9978: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbf80000; valaddr_reg:x3; val_offset:29934*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29934*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9979: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfc0000; valaddr_reg:x3; val_offset:29937*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29937*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9980: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfe0000; valaddr_reg:x3; val_offset:29940*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29940*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9981: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbff0000; valaddr_reg:x3; val_offset:29943*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29943*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9982: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbff8000; valaddr_reg:x3; val_offset:29946*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29946*0 + 3*77*FLEN/8, x4, x1, x2) + +inst_9983: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbffc000; valaddr_reg:x3; val_offset:29949*0 + 3*77*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29949*0 + 3*77*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867017216,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867082752,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867115520,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867131904,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867140096,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867144192,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867146240,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867147264,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867147776,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148032,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148160,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148224,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148256,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148272,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148280,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148284,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148286,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(3867148287,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2118020725,32,FLEN) +NAN_BOXED(3232502407,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540608,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540609,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540611,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540615,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540623,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540639,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540671,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540735,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105540863,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105541119,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105541631,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105542655,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105544703,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105548799,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105556991,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105573375,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105606143,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105671679,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2105802751,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2106064895,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2106589183,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2107637759,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2109734911,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2109734912,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2111832064,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2112880640,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113404928,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113667072,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113798144,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113863680,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113896448,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113912832,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113921024,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113925120,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113927168,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113928192,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113928704,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113928960,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113929088,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113929152,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113929184,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113929200,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113929208,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113929212,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113929214,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2113929215,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2118025800,32,FLEN) +NAN_BOXED(1085014175,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219469824,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219469825,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219469827,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219469831,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219469839,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219469855,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219469887,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219469951,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219470079,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219470335,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219470847,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219471871,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219473919,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219478015,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219486207,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219502591,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219535359,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219600895,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219731967,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4219994111,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4220518399,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4221566975,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4223664127,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4223664128,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4225761280,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4226809856,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227334144,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227596288,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227727360,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227792896,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227825664,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227842048,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-79.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-79.S new file mode 100644 index 000000000..5e24b3376 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-79.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_9984: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbffe000; valaddr_reg:x3; val_offset:29952*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29952*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9985: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfff000; valaddr_reg:x3; val_offset:29955*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29955*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9986: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfff800; valaddr_reg:x3; val_offset:29958*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29958*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9987: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfffc00; valaddr_reg:x3; val_offset:29961*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29961*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9988: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfffe00; valaddr_reg:x3; val_offset:29964*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29964*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9989: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbffff00; valaddr_reg:x3; val_offset:29967*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29967*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9990: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbffff80; valaddr_reg:x3; val_offset:29970*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29970*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9991: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbffffc0; valaddr_reg:x3; val_offset:29973*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29973*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9992: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbffffe0; valaddr_reg:x3; val_offset:29976*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29976*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9993: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfffff0; valaddr_reg:x3; val_offset:29979*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29979*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9994: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfffff8; valaddr_reg:x3; val_offset:29982*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29982*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9995: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfffffc; valaddr_reg:x3; val_offset:29985*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29985*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9996: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbfffffe; valaddr_reg:x3; val_offset:29988*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29988*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9997: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xf7 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xfbffffff; valaddr_reg:x3; val_offset:29991*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29991*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9998: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff000001; valaddr_reg:x3; val_offset:29994*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29994*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_9999: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff000003; valaddr_reg:x3; val_offset:29997*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 29997*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10000: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff000007; valaddr_reg:x3; val_offset:30000*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30000*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10001: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff199999; valaddr_reg:x3; val_offset:30003*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30003*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10002: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff249249; valaddr_reg:x3; val_offset:30006*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30006*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10003: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff333333; valaddr_reg:x3; val_offset:30009*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30009*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10004: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:30012*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30012*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10005: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:30015*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30015*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10006: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff444444; valaddr_reg:x3; val_offset:30018*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30018*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10007: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:30021*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30021*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10008: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:30024*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30024*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10009: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff666666; valaddr_reg:x3; val_offset:30027*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30027*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10010: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:30030*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30030*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10011: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:30033*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30033*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10012: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:30036*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30036*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10013: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x3f44a3 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x2b51d7 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e3f44a3; op2val:0xc0ab51d7; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:30039*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30039*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10014: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61000000; valaddr_reg:x3; val_offset:30042*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30042*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10015: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61000001; valaddr_reg:x3; val_offset:30045*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30045*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10016: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61000003; valaddr_reg:x3; val_offset:30048*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30048*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10017: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61000007; valaddr_reg:x3; val_offset:30051*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30051*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10018: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x6100000f; valaddr_reg:x3; val_offset:30054*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30054*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10019: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x6100001f; valaddr_reg:x3; val_offset:30057*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30057*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10020: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x6100003f; valaddr_reg:x3; val_offset:30060*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30060*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10021: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x6100007f; valaddr_reg:x3; val_offset:30063*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30063*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10022: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x610000ff; valaddr_reg:x3; val_offset:30066*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30066*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10023: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x610001ff; valaddr_reg:x3; val_offset:30069*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30069*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10024: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x610003ff; valaddr_reg:x3; val_offset:30072*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30072*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10025: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x610007ff; valaddr_reg:x3; val_offset:30075*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30075*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10026: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61000fff; valaddr_reg:x3; val_offset:30078*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30078*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10027: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61001fff; valaddr_reg:x3; val_offset:30081*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30081*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10028: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61003fff; valaddr_reg:x3; val_offset:30084*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30084*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10029: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61007fff; valaddr_reg:x3; val_offset:30087*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30087*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10030: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x6100ffff; valaddr_reg:x3; val_offset:30090*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30090*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10031: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x6101ffff; valaddr_reg:x3; val_offset:30093*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30093*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10032: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x6103ffff; valaddr_reg:x3; val_offset:30096*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30096*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10033: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x6107ffff; valaddr_reg:x3; val_offset:30099*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30099*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10034: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x610fffff; valaddr_reg:x3; val_offset:30102*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30102*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10035: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x611fffff; valaddr_reg:x3; val_offset:30105*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30105*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10036: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x613fffff; valaddr_reg:x3; val_offset:30108*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30108*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10037: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61400000; valaddr_reg:x3; val_offset:30111*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30111*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10038: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61600000; valaddr_reg:x3; val_offset:30114*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30114*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10039: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61700000; valaddr_reg:x3; val_offset:30117*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30117*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10040: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x61780000; valaddr_reg:x3; val_offset:30120*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30120*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10041: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617c0000; valaddr_reg:x3; val_offset:30123*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30123*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10042: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617e0000; valaddr_reg:x3; val_offset:30126*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30126*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10043: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617f0000; valaddr_reg:x3; val_offset:30129*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30129*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10044: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617f8000; valaddr_reg:x3; val_offset:30132*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30132*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10045: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617fc000; valaddr_reg:x3; val_offset:30135*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30135*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10046: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617fe000; valaddr_reg:x3; val_offset:30138*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30138*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10047: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617ff000; valaddr_reg:x3; val_offset:30141*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30141*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10048: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617ff800; valaddr_reg:x3; val_offset:30144*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30144*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10049: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617ffc00; valaddr_reg:x3; val_offset:30147*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30147*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10050: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617ffe00; valaddr_reg:x3; val_offset:30150*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30150*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10051: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617fff00; valaddr_reg:x3; val_offset:30153*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30153*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10052: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617fff80; valaddr_reg:x3; val_offset:30156*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30156*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10053: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617fffc0; valaddr_reg:x3; val_offset:30159*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30159*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10054: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617fffe0; valaddr_reg:x3; val_offset:30162*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30162*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10055: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617ffff0; valaddr_reg:x3; val_offset:30165*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30165*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10056: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617ffff8; valaddr_reg:x3; val_offset:30168*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30168*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10057: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617ffffc; valaddr_reg:x3; val_offset:30171*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30171*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10058: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617ffffe; valaddr_reg:x3; val_offset:30174*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30174*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10059: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xc2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x617fffff; valaddr_reg:x3; val_offset:30177*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30177*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10060: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f000001; valaddr_reg:x3; val_offset:30180*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30180*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10061: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f000003; valaddr_reg:x3; val_offset:30183*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30183*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10062: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f000007; valaddr_reg:x3; val_offset:30186*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30186*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10063: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f199999; valaddr_reg:x3; val_offset:30189*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30189*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10064: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f249249; valaddr_reg:x3; val_offset:30192*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30192*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10065: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f333333; valaddr_reg:x3; val_offset:30195*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30195*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10066: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:30198*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30198*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10067: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:30201*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30201*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10068: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f444444; valaddr_reg:x3; val_offset:30204*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30204*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10069: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:30207*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30207*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10070: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:30210*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30210*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10071: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f666666; valaddr_reg:x3; val_offset:30213*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30213*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10072: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:30216*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30216*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10073: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:30219*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30219*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10074: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:30222*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30222*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10075: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x41fc69 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x28eb5e and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e41fc69; op2val:0x40a8eb5e; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:30225*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30225*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10076: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6800000; valaddr_reg:x3; val_offset:30228*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30228*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10077: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6800001; valaddr_reg:x3; val_offset:30231*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30231*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10078: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6800003; valaddr_reg:x3; val_offset:30234*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30234*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10079: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6800007; valaddr_reg:x3; val_offset:30237*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30237*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10080: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf680000f; valaddr_reg:x3; val_offset:30240*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30240*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10081: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf680001f; valaddr_reg:x3; val_offset:30243*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30243*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10082: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf680003f; valaddr_reg:x3; val_offset:30246*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30246*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10083: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf680007f; valaddr_reg:x3; val_offset:30249*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30249*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10084: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf68000ff; valaddr_reg:x3; val_offset:30252*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30252*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10085: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf68001ff; valaddr_reg:x3; val_offset:30255*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30255*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10086: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf68003ff; valaddr_reg:x3; val_offset:30258*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30258*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10087: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf68007ff; valaddr_reg:x3; val_offset:30261*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30261*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10088: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6800fff; valaddr_reg:x3; val_offset:30264*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30264*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10089: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6801fff; valaddr_reg:x3; val_offset:30267*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30267*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10090: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6803fff; valaddr_reg:x3; val_offset:30270*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30270*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10091: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6807fff; valaddr_reg:x3; val_offset:30273*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30273*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10092: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf680ffff; valaddr_reg:x3; val_offset:30276*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30276*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10093: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf681ffff; valaddr_reg:x3; val_offset:30279*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30279*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10094: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf683ffff; valaddr_reg:x3; val_offset:30282*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30282*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10095: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf687ffff; valaddr_reg:x3; val_offset:30285*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30285*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10096: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf68fffff; valaddr_reg:x3; val_offset:30288*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30288*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10097: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf69fffff; valaddr_reg:x3; val_offset:30291*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30291*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10098: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6bfffff; valaddr_reg:x3; val_offset:30294*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30294*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10099: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6c00000; valaddr_reg:x3; val_offset:30297*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30297*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10100: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6e00000; valaddr_reg:x3; val_offset:30300*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30300*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10101: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6f00000; valaddr_reg:x3; val_offset:30303*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30303*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10102: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6f80000; valaddr_reg:x3; val_offset:30306*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30306*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10103: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fc0000; valaddr_reg:x3; val_offset:30309*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30309*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10104: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fe0000; valaddr_reg:x3; val_offset:30312*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30312*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10105: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ff0000; valaddr_reg:x3; val_offset:30315*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30315*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10106: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ff8000; valaddr_reg:x3; val_offset:30318*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30318*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10107: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ffc000; valaddr_reg:x3; val_offset:30321*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30321*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10108: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ffe000; valaddr_reg:x3; val_offset:30324*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30324*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10109: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fff000; valaddr_reg:x3; val_offset:30327*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30327*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10110: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fff800; valaddr_reg:x3; val_offset:30330*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30330*0 + 3*78*FLEN/8, x4, x1, x2) + +inst_10111: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fffc00; valaddr_reg:x3; val_offset:30333*0 + 3*78*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30333*0 + 3*78*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227850240,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227854336,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227856384,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227857408,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227857920,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858176,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858304,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858368,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858400,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858416,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858424,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858428,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858430,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4227858431,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2118075555,32,FLEN) +NAN_BOXED(3232453079,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627389952,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627389953,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627389955,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627389959,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627389967,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627389983,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627390015,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627390079,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627390207,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627390463,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627390975,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627391999,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627394047,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627398143,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627406335,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627422719,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627455487,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627521023,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627652095,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1627914239,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1628438527,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1629487103,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1631584255,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1631584256,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1633681408,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1634729984,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635254272,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635516416,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635647488,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635713024,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635745792,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635762176,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635770368,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635774464,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635776512,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635777536,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778048,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778304,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778432,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778496,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778528,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778544,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778552,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778556,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778558,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(1635778559,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2118253673,32,FLEN) +NAN_BOXED(1084812126,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583744,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583745,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583747,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583751,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583759,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583775,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583807,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583871,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135583999,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135584255,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135584767,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135585791,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135587839,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135591935,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135600127,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135616511,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135649279,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135714815,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4135845887,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4136108031,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4136632319,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4137680895,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4139778047,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4139778048,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4141875200,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4142923776,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143448064,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143710208,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143841280,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143906816,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143939584,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143955968,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143964160,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143968256,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143970304,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143971328,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-80.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-80.S new file mode 100644 index 000000000..0e3fcacbc --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-80.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_10112: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fffe00; valaddr_reg:x3; val_offset:30336*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30336*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10113: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ffff00; valaddr_reg:x3; val_offset:30339*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30339*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10114: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ffff80; valaddr_reg:x3; val_offset:30342*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30342*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10115: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ffffc0; valaddr_reg:x3; val_offset:30345*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30345*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10116: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ffffe0; valaddr_reg:x3; val_offset:30348*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30348*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10117: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fffff0; valaddr_reg:x3; val_offset:30351*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30351*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10118: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fffff8; valaddr_reg:x3; val_offset:30354*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30354*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10119: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fffffc; valaddr_reg:x3; val_offset:30357*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30357*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10120: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6fffffe; valaddr_reg:x3; val_offset:30360*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30360*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10121: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xed and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xf6ffffff; valaddr_reg:x3; val_offset:30363*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30363*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10122: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff000001; valaddr_reg:x3; val_offset:30366*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30366*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10123: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff000003; valaddr_reg:x3; val_offset:30369*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30369*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10124: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff000007; valaddr_reg:x3; val_offset:30372*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30372*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10125: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff199999; valaddr_reg:x3; val_offset:30375*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30375*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10126: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff249249; valaddr_reg:x3; val_offset:30378*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30378*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10127: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff333333; valaddr_reg:x3; val_offset:30381*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30381*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10128: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:30384*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30384*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10129: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:30387*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30387*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10130: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff444444; valaddr_reg:x3; val_offset:30390*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30390*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10131: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:30393*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30393*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10132: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:30396*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30396*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10133: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff666666; valaddr_reg:x3; val_offset:30399*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30399*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10134: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:30402*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30402*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10135: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:30405*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30405*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10136: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:30408*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30408*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10137: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4200c4 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x28e793 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4200c4; op2val:0xc0a8e793; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:30411*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30411*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10138: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:30414*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30414*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10139: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:30417*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30417*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10140: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:30420*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30420*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10141: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:30423*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30423*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10142: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:30426*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30426*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10143: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:30429*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30429*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10144: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:30432*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30432*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10145: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:30435*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30435*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10146: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:30438*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30438*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10147: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:30441*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30441*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10148: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:30444*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30444*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10149: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:30447*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30447*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10150: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:30450*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30450*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10151: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:30453*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30453*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10152: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:30456*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30456*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10153: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:30459*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30459*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10154: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a000000; valaddr_reg:x3; val_offset:30462*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30462*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10155: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a000001; valaddr_reg:x3; val_offset:30465*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30465*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10156: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a000003; valaddr_reg:x3; val_offset:30468*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30468*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10157: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a000007; valaddr_reg:x3; val_offset:30471*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30471*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10158: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a00000f; valaddr_reg:x3; val_offset:30474*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30474*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10159: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a00001f; valaddr_reg:x3; val_offset:30477*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30477*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10160: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a00003f; valaddr_reg:x3; val_offset:30480*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30480*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10161: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a00007f; valaddr_reg:x3; val_offset:30483*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30483*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10162: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a0000ff; valaddr_reg:x3; val_offset:30486*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30486*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10163: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a0001ff; valaddr_reg:x3; val_offset:30489*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30489*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10164: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a0003ff; valaddr_reg:x3; val_offset:30492*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30492*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10165: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a0007ff; valaddr_reg:x3; val_offset:30495*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30495*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10166: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a000fff; valaddr_reg:x3; val_offset:30498*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30498*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10167: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a001fff; valaddr_reg:x3; val_offset:30501*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30501*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10168: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a003fff; valaddr_reg:x3; val_offset:30504*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30504*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10169: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a007fff; valaddr_reg:x3; val_offset:30507*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30507*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10170: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a00ffff; valaddr_reg:x3; val_offset:30510*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30510*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10171: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a01ffff; valaddr_reg:x3; val_offset:30513*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30513*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10172: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a03ffff; valaddr_reg:x3; val_offset:30516*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30516*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10173: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a07ffff; valaddr_reg:x3; val_offset:30519*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30519*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10174: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a0fffff; valaddr_reg:x3; val_offset:30522*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30522*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10175: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a1fffff; valaddr_reg:x3; val_offset:30525*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30525*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10176: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a3fffff; valaddr_reg:x3; val_offset:30528*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30528*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10177: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a400000; valaddr_reg:x3; val_offset:30531*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30531*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10178: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a600000; valaddr_reg:x3; val_offset:30534*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30534*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10179: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a700000; valaddr_reg:x3; val_offset:30537*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30537*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10180: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a780000; valaddr_reg:x3; val_offset:30540*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30540*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10181: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7c0000; valaddr_reg:x3; val_offset:30543*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30543*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10182: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7e0000; valaddr_reg:x3; val_offset:30546*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30546*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10183: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7f0000; valaddr_reg:x3; val_offset:30549*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30549*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10184: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7f8000; valaddr_reg:x3; val_offset:30552*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30552*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10185: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7fc000; valaddr_reg:x3; val_offset:30555*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30555*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10186: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7fe000; valaddr_reg:x3; val_offset:30558*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30558*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10187: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7ff000; valaddr_reg:x3; val_offset:30561*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30561*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10188: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7ff800; valaddr_reg:x3; val_offset:30564*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30564*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10189: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7ffc00; valaddr_reg:x3; val_offset:30567*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30567*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10190: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7ffe00; valaddr_reg:x3; val_offset:30570*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30570*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10191: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7fff00; valaddr_reg:x3; val_offset:30573*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30573*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10192: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7fff80; valaddr_reg:x3; val_offset:30576*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30576*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10193: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7fffc0; valaddr_reg:x3; val_offset:30579*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30579*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10194: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7fffe0; valaddr_reg:x3; val_offset:30582*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30582*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10195: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7ffff0; valaddr_reg:x3; val_offset:30585*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30585*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10196: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7ffff8; valaddr_reg:x3; val_offset:30588*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30588*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10197: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7ffffc; valaddr_reg:x3; val_offset:30591*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30591*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10198: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7ffffe; valaddr_reg:x3; val_offset:30594*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30594*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10199: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44f9f4 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x14 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44f9f4; op2val:0x80000000; +op3val:0x8a7fffff; valaddr_reg:x3; val_offset:30597*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30597*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10200: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbf800001; valaddr_reg:x3; val_offset:30600*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30600*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10201: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbf800003; valaddr_reg:x3; val_offset:30603*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30603*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10202: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbf800007; valaddr_reg:x3; val_offset:30606*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30606*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10203: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbf999999; valaddr_reg:x3; val_offset:30609*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30609*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10204: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:30612*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30612*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10205: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:30615*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30615*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10206: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:30618*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30618*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10207: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:30621*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30621*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10208: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:30624*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30624*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10209: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:30627*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30627*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10210: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:30630*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30630*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10211: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:30633*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30633*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10212: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:30636*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30636*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10213: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:30639*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30639*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10214: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:30642*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30642*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10215: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:30645*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30645*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10216: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0000000; valaddr_reg:x3; val_offset:30648*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30648*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10217: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0000001; valaddr_reg:x3; val_offset:30651*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30651*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10218: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0000003; valaddr_reg:x3; val_offset:30654*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30654*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10219: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0000007; valaddr_reg:x3; val_offset:30657*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30657*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10220: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc000000f; valaddr_reg:x3; val_offset:30660*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30660*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10221: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc000001f; valaddr_reg:x3; val_offset:30663*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30663*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10222: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc000003f; valaddr_reg:x3; val_offset:30666*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30666*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10223: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc000007f; valaddr_reg:x3; val_offset:30669*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30669*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10224: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc00000ff; valaddr_reg:x3; val_offset:30672*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30672*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10225: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc00001ff; valaddr_reg:x3; val_offset:30675*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30675*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10226: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc00003ff; valaddr_reg:x3; val_offset:30678*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30678*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10227: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc00007ff; valaddr_reg:x3; val_offset:30681*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30681*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10228: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0000fff; valaddr_reg:x3; val_offset:30684*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30684*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10229: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0001fff; valaddr_reg:x3; val_offset:30687*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30687*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10230: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0003fff; valaddr_reg:x3; val_offset:30690*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30690*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10231: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0007fff; valaddr_reg:x3; val_offset:30693*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30693*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10232: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc000ffff; valaddr_reg:x3; val_offset:30696*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30696*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10233: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc001ffff; valaddr_reg:x3; val_offset:30699*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30699*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10234: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc003ffff; valaddr_reg:x3; val_offset:30702*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30702*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10235: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc007ffff; valaddr_reg:x3; val_offset:30705*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30705*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10236: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc00fffff; valaddr_reg:x3; val_offset:30708*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30708*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10237: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc01fffff; valaddr_reg:x3; val_offset:30711*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30711*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10238: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc03fffff; valaddr_reg:x3; val_offset:30714*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30714*0 + 3*79*FLEN/8, x4, x1, x2) + +inst_10239: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0400000; valaddr_reg:x3; val_offset:30717*0 + 3*79*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30717*0 + 3*79*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143971840,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972096,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972224,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972288,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972320,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972336,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972344,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972348,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972350,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4143972351,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2118254788,32,FLEN) +NAN_BOXED(3232294803,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255808,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255809,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255811,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255815,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255823,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255839,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255871,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315255935,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256063,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256319,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315256831,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315257855,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315259903,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315263999,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315272191,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315288575,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315321343,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315386879,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315517951,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2315780095,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2316304383,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2317352959,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2319450111,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2319450112,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2321547264,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2322595840,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323120128,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323382272,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323513344,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323578880,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323611648,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323628032,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323636224,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323640320,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323642368,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323643392,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323643904,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644160,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644288,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644352,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644384,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644400,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644408,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644412,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644414,32,FLEN) +NAN_BOXED(2118449652,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644415,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225472,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225473,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225475,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225479,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225487,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225503,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225535,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225599,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225727,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221225983,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221226495,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221227519,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221229567,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221233663,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221241855,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221258239,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221291007,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221356543,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221487615,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3221749759,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3222274047,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3223322623,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3225419775,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3225419776,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-81.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-81.S new file mode 100644 index 000000000..a5f11fe77 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-81.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_10240: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0600000; valaddr_reg:x3; val_offset:30720*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30720*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10241: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0700000; valaddr_reg:x3; val_offset:30723*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30723*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10242: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc0780000; valaddr_reg:x3; val_offset:30726*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30726*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10243: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07c0000; valaddr_reg:x3; val_offset:30729*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30729*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10244: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07e0000; valaddr_reg:x3; val_offset:30732*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30732*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10245: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07f0000; valaddr_reg:x3; val_offset:30735*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30735*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10246: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07f8000; valaddr_reg:x3; val_offset:30738*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30738*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10247: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07fc000; valaddr_reg:x3; val_offset:30741*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30741*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10248: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07fe000; valaddr_reg:x3; val_offset:30744*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30744*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10249: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07ff000; valaddr_reg:x3; val_offset:30747*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30747*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10250: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07ff800; valaddr_reg:x3; val_offset:30750*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30750*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10251: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07ffc00; valaddr_reg:x3; val_offset:30753*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30753*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10252: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07ffe00; valaddr_reg:x3; val_offset:30756*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30756*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10253: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07fff00; valaddr_reg:x3; val_offset:30759*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30759*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10254: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07fff80; valaddr_reg:x3; val_offset:30762*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30762*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10255: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07fffc0; valaddr_reg:x3; val_offset:30765*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30765*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10256: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07fffe0; valaddr_reg:x3; val_offset:30768*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30768*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10257: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07ffff0; valaddr_reg:x3; val_offset:30771*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30771*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10258: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07ffff8; valaddr_reg:x3; val_offset:30774*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30774*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10259: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07ffffc; valaddr_reg:x3; val_offset:30777*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30777*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10260: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07ffffe; valaddr_reg:x3; val_offset:30780*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30780*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10261: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x44fbbe and fs2 == 1 and fe2 == 0x01 and fm2 == 0x26595c and fs3 == 1 and fe3 == 0x80 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e44fbbe; op2val:0x80a6595c; +op3val:0xc07fffff; valaddr_reg:x3; val_offset:30783*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30783*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10262: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4000000; valaddr_reg:x3; val_offset:30786*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30786*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10263: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4000001; valaddr_reg:x3; val_offset:30789*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30789*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10264: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4000003; valaddr_reg:x3; val_offset:30792*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30792*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10265: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4000007; valaddr_reg:x3; val_offset:30795*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30795*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10266: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf400000f; valaddr_reg:x3; val_offset:30798*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30798*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10267: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf400001f; valaddr_reg:x3; val_offset:30801*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30801*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10268: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf400003f; valaddr_reg:x3; val_offset:30804*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30804*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10269: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf400007f; valaddr_reg:x3; val_offset:30807*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30807*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10270: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf40000ff; valaddr_reg:x3; val_offset:30810*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30810*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10271: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf40001ff; valaddr_reg:x3; val_offset:30813*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30813*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10272: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf40003ff; valaddr_reg:x3; val_offset:30816*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30816*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10273: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf40007ff; valaddr_reg:x3; val_offset:30819*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30819*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10274: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4000fff; valaddr_reg:x3; val_offset:30822*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30822*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10275: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4001fff; valaddr_reg:x3; val_offset:30825*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30825*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10276: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4003fff; valaddr_reg:x3; val_offset:30828*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30828*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10277: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4007fff; valaddr_reg:x3; val_offset:30831*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30831*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10278: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf400ffff; valaddr_reg:x3; val_offset:30834*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30834*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10279: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf401ffff; valaddr_reg:x3; val_offset:30837*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30837*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10280: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf403ffff; valaddr_reg:x3; val_offset:30840*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30840*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10281: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf407ffff; valaddr_reg:x3; val_offset:30843*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30843*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10282: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf40fffff; valaddr_reg:x3; val_offset:30846*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30846*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10283: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf41fffff; valaddr_reg:x3; val_offset:30849*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30849*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10284: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf43fffff; valaddr_reg:x3; val_offset:30852*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30852*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10285: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4400000; valaddr_reg:x3; val_offset:30855*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30855*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10286: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4600000; valaddr_reg:x3; val_offset:30858*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30858*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10287: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4700000; valaddr_reg:x3; val_offset:30861*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30861*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10288: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf4780000; valaddr_reg:x3; val_offset:30864*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30864*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10289: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47c0000; valaddr_reg:x3; val_offset:30867*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30867*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10290: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47e0000; valaddr_reg:x3; val_offset:30870*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30870*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10291: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47f0000; valaddr_reg:x3; val_offset:30873*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30873*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10292: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47f8000; valaddr_reg:x3; val_offset:30876*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30876*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10293: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47fc000; valaddr_reg:x3; val_offset:30879*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30879*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10294: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47fe000; valaddr_reg:x3; val_offset:30882*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30882*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10295: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47ff000; valaddr_reg:x3; val_offset:30885*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30885*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10296: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47ff800; valaddr_reg:x3; val_offset:30888*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30888*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10297: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47ffc00; valaddr_reg:x3; val_offset:30891*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30891*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10298: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47ffe00; valaddr_reg:x3; val_offset:30894*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30894*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10299: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47fff00; valaddr_reg:x3; val_offset:30897*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30897*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10300: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47fff80; valaddr_reg:x3; val_offset:30900*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30900*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10301: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47fffc0; valaddr_reg:x3; val_offset:30903*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30903*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10302: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47fffe0; valaddr_reg:x3; val_offset:30906*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30906*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10303: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47ffff0; valaddr_reg:x3; val_offset:30909*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30909*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10304: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47ffff8; valaddr_reg:x3; val_offset:30912*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30912*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10305: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47ffffc; valaddr_reg:x3; val_offset:30915*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30915*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10306: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47ffffe; valaddr_reg:x3; val_offset:30918*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30918*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10307: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xe8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xf47fffff; valaddr_reg:x3; val_offset:30921*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30921*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10308: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff000001; valaddr_reg:x3; val_offset:30924*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30924*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10309: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff000003; valaddr_reg:x3; val_offset:30927*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30927*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10310: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff000007; valaddr_reg:x3; val_offset:30930*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30930*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10311: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff199999; valaddr_reg:x3; val_offset:30933*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30933*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10312: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff249249; valaddr_reg:x3; val_offset:30936*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30936*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10313: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff333333; valaddr_reg:x3; val_offset:30939*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30939*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10314: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:30942*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30942*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10315: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:30945*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30945*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10316: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff444444; valaddr_reg:x3; val_offset:30948*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30948*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10317: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:30951*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30951*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10318: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:30954*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30954*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10319: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff666666; valaddr_reg:x3; val_offset:30957*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30957*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10320: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:30960*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30960*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10321: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:30963*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30963*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10322: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:30966*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30966*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10323: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x450cdb and fs2 == 1 and fe2 == 0x81 and fm2 == 0x264ae9 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e450cdb; op2val:0xc0a64ae9; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:30969*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30969*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10324: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:30972*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30972*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10325: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:30975*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30975*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10326: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:30978*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30978*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10327: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:30981*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30981*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10328: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:30984*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30984*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10329: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:30987*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30987*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10330: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:30990*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30990*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10331: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:30993*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30993*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10332: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:30996*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30996*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10333: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:30999*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 30999*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10334: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:31002*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31002*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10335: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:31005*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31005*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10336: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:31008*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31008*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10337: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:31011*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31011*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10338: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:31014*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31014*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10339: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:31017*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31017*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10340: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7800000; valaddr_reg:x3; val_offset:31020*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31020*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10341: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7800001; valaddr_reg:x3; val_offset:31023*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31023*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10342: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7800003; valaddr_reg:x3; val_offset:31026*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31026*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10343: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7800007; valaddr_reg:x3; val_offset:31029*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31029*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10344: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x780000f; valaddr_reg:x3; val_offset:31032*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31032*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10345: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x780001f; valaddr_reg:x3; val_offset:31035*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31035*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10346: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x780003f; valaddr_reg:x3; val_offset:31038*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31038*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10347: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x780007f; valaddr_reg:x3; val_offset:31041*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31041*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10348: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x78000ff; valaddr_reg:x3; val_offset:31044*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31044*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10349: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x78001ff; valaddr_reg:x3; val_offset:31047*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31047*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10350: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x78003ff; valaddr_reg:x3; val_offset:31050*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31050*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10351: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x78007ff; valaddr_reg:x3; val_offset:31053*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31053*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10352: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7800fff; valaddr_reg:x3; val_offset:31056*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31056*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10353: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7801fff; valaddr_reg:x3; val_offset:31059*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31059*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10354: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7803fff; valaddr_reg:x3; val_offset:31062*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31062*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10355: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7807fff; valaddr_reg:x3; val_offset:31065*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31065*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10356: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x780ffff; valaddr_reg:x3; val_offset:31068*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31068*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10357: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x781ffff; valaddr_reg:x3; val_offset:31071*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31071*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10358: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x783ffff; valaddr_reg:x3; val_offset:31074*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31074*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10359: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x787ffff; valaddr_reg:x3; val_offset:31077*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31077*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10360: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x78fffff; valaddr_reg:x3; val_offset:31080*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31080*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10361: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x79fffff; valaddr_reg:x3; val_offset:31083*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31083*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10362: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7bfffff; valaddr_reg:x3; val_offset:31086*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31086*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10363: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7c00000; valaddr_reg:x3; val_offset:31089*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31089*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10364: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7e00000; valaddr_reg:x3; val_offset:31092*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31092*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10365: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7f00000; valaddr_reg:x3; val_offset:31095*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31095*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10366: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7f80000; valaddr_reg:x3; val_offset:31098*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31098*0 + 3*80*FLEN/8, x4, x1, x2) + +inst_10367: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fc0000; valaddr_reg:x3; val_offset:31101*0 + 3*80*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31101*0 + 3*80*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3227516928,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3228565504,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229089792,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229351936,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229483008,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229548544,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229581312,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229597696,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229605888,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229609984,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229612032,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229613056,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229613568,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229613824,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229613952,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229614016,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229614048,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229614064,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229614072,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229614076,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229614078,32,FLEN) +NAN_BOXED(2118450110,32,FLEN) +NAN_BOXED(2158385500,32,FLEN) +NAN_BOXED(3229614079,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640704,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640705,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640707,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640711,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640719,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640735,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640767,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640831,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093640959,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093641215,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093641727,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093642751,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093644799,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093648895,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093657087,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093673471,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093706239,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093771775,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4093902847,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4094164991,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4094689279,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4095737855,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4097835007,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4097835008,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4099932160,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4100980736,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4101505024,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4101767168,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4101898240,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4101963776,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4101996544,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102012928,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102021120,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102025216,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102027264,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102028288,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102028800,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029056,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029184,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029248,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029280,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029296,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029304,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029308,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029310,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4102029311,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2118454491,32,FLEN) +NAN_BOXED(3232123625,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829120,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829121,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829123,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829127,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829135,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829151,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829183,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829247,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829375,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125829631,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125830143,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125831167,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125833215,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125837311,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125845503,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125861887,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125894655,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(125960191,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126091263,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126353407,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(126877695,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127926271,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(130023423,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(130023424,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(132120576,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133169152,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133693440,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(133955584,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-82.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-82.S new file mode 100644 index 000000000..938d70d25 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-82.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_10368: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fe0000; valaddr_reg:x3; val_offset:31104*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31104*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10369: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ff0000; valaddr_reg:x3; val_offset:31107*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31107*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10370: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ff8000; valaddr_reg:x3; val_offset:31110*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31110*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10371: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffc000; valaddr_reg:x3; val_offset:31113*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31113*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10372: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffe000; valaddr_reg:x3; val_offset:31116*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31116*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10373: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fff000; valaddr_reg:x3; val_offset:31119*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31119*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10374: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fff800; valaddr_reg:x3; val_offset:31122*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31122*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10375: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fffc00; valaddr_reg:x3; val_offset:31125*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31125*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10376: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fffe00; valaddr_reg:x3; val_offset:31128*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31128*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10377: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffff00; valaddr_reg:x3; val_offset:31131*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31131*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10378: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffff80; valaddr_reg:x3; val_offset:31134*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31134*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10379: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffffc0; valaddr_reg:x3; val_offset:31137*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31137*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10380: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffffe0; valaddr_reg:x3; val_offset:31140*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31140*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10381: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fffff0; valaddr_reg:x3; val_offset:31143*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31143*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10382: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fffff8; valaddr_reg:x3; val_offset:31146*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31146*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10383: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fffffc; valaddr_reg:x3; val_offset:31149*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31149*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10384: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7fffffe; valaddr_reg:x3; val_offset:31152*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31152*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10385: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x454909 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e454909; op2val:0x0; +op3val:0x7ffffff; valaddr_reg:x3; val_offset:31155*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31155*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10386: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d000000; valaddr_reg:x3; val_offset:31158*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31158*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10387: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d000001; valaddr_reg:x3; val_offset:31161*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31161*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10388: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d000003; valaddr_reg:x3; val_offset:31164*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31164*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10389: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d000007; valaddr_reg:x3; val_offset:31167*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31167*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10390: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d00000f; valaddr_reg:x3; val_offset:31170*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31170*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10391: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d00001f; valaddr_reg:x3; val_offset:31173*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31173*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10392: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d00003f; valaddr_reg:x3; val_offset:31176*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31176*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10393: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d00007f; valaddr_reg:x3; val_offset:31179*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31179*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10394: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d0000ff; valaddr_reg:x3; val_offset:31182*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31182*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10395: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d0001ff; valaddr_reg:x3; val_offset:31185*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31185*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10396: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d0003ff; valaddr_reg:x3; val_offset:31188*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31188*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10397: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d0007ff; valaddr_reg:x3; val_offset:31191*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31191*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10398: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d000fff; valaddr_reg:x3; val_offset:31194*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31194*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10399: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d001fff; valaddr_reg:x3; val_offset:31197*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31197*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10400: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d003fff; valaddr_reg:x3; val_offset:31200*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31200*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10401: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d007fff; valaddr_reg:x3; val_offset:31203*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31203*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10402: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d00ffff; valaddr_reg:x3; val_offset:31206*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31206*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10403: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d01ffff; valaddr_reg:x3; val_offset:31209*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31209*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10404: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d03ffff; valaddr_reg:x3; val_offset:31212*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31212*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10405: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d07ffff; valaddr_reg:x3; val_offset:31215*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31215*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10406: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d0fffff; valaddr_reg:x3; val_offset:31218*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31218*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10407: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d1fffff; valaddr_reg:x3; val_offset:31221*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31221*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10408: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d3fffff; valaddr_reg:x3; val_offset:31224*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31224*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10409: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d400000; valaddr_reg:x3; val_offset:31227*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31227*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10410: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d600000; valaddr_reg:x3; val_offset:31230*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31230*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10411: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d700000; valaddr_reg:x3; val_offset:31233*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31233*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10412: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d780000; valaddr_reg:x3; val_offset:31236*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31236*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10413: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7c0000; valaddr_reg:x3; val_offset:31239*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31239*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10414: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7e0000; valaddr_reg:x3; val_offset:31242*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31242*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10415: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7f0000; valaddr_reg:x3; val_offset:31245*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31245*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10416: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7f8000; valaddr_reg:x3; val_offset:31248*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31248*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10417: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7fc000; valaddr_reg:x3; val_offset:31251*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31251*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10418: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7fe000; valaddr_reg:x3; val_offset:31254*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31254*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10419: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7ff000; valaddr_reg:x3; val_offset:31257*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31257*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10420: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7ff800; valaddr_reg:x3; val_offset:31260*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31260*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10421: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7ffc00; valaddr_reg:x3; val_offset:31263*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31263*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10422: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7ffe00; valaddr_reg:x3; val_offset:31266*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31266*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10423: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7fff00; valaddr_reg:x3; val_offset:31269*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31269*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10424: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7fff80; valaddr_reg:x3; val_offset:31272*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31272*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10425: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7fffc0; valaddr_reg:x3; val_offset:31275*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31275*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10426: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7fffe0; valaddr_reg:x3; val_offset:31278*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31278*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10427: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7ffff0; valaddr_reg:x3; val_offset:31281*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31281*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10428: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7ffff8; valaddr_reg:x3; val_offset:31284*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31284*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10429: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7ffffc; valaddr_reg:x3; val_offset:31287*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31287*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10430: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7ffffe; valaddr_reg:x3; val_offset:31290*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31290*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10431: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xda and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x6d7fffff; valaddr_reg:x3; val_offset:31293*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31293*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10432: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f000001; valaddr_reg:x3; val_offset:31296*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31296*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10433: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f000003; valaddr_reg:x3; val_offset:31299*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31299*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10434: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f000007; valaddr_reg:x3; val_offset:31302*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31302*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10435: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f199999; valaddr_reg:x3; val_offset:31305*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31305*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10436: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f249249; valaddr_reg:x3; val_offset:31308*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31308*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10437: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f333333; valaddr_reg:x3; val_offset:31311*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31311*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10438: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:31314*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31314*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10439: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:31317*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31317*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10440: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f444444; valaddr_reg:x3; val_offset:31320*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31320*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10441: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:31323*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31323*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10442: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:31326*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31326*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10443: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f666666; valaddr_reg:x3; val_offset:31329*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31329*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10444: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:31332*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31332*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10445: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:31335*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31335*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10446: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:31338*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31338*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10447: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x464fe3 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x253c09 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e464fe3; op2val:0x40a53c09; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:31341*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31341*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10448: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbf800001; valaddr_reg:x3; val_offset:31344*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31344*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10449: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbf800003; valaddr_reg:x3; val_offset:31347*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31347*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10450: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbf800007; valaddr_reg:x3; val_offset:31350*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31350*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10451: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbf999999; valaddr_reg:x3; val_offset:31353*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31353*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10452: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:31356*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31356*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10453: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:31359*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31359*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10454: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:31362*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31362*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10455: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:31365*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31365*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10456: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:31368*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31368*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10457: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:31371*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31371*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10458: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:31374*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31374*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10459: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:31377*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31377*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10460: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:31380*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31380*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10461: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:31383*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31383*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10462: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:31386*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31386*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10463: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:31389*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31389*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10464: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4800000; valaddr_reg:x3; val_offset:31392*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31392*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10465: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4800001; valaddr_reg:x3; val_offset:31395*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31395*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10466: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4800003; valaddr_reg:x3; val_offset:31398*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31398*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10467: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4800007; valaddr_reg:x3; val_offset:31401*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31401*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10468: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc480000f; valaddr_reg:x3; val_offset:31404*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31404*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10469: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc480001f; valaddr_reg:x3; val_offset:31407*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31407*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10470: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc480003f; valaddr_reg:x3; val_offset:31410*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31410*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10471: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc480007f; valaddr_reg:x3; val_offset:31413*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31413*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10472: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc48000ff; valaddr_reg:x3; val_offset:31416*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31416*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10473: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc48001ff; valaddr_reg:x3; val_offset:31419*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31419*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10474: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc48003ff; valaddr_reg:x3; val_offset:31422*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31422*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10475: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc48007ff; valaddr_reg:x3; val_offset:31425*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31425*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10476: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4800fff; valaddr_reg:x3; val_offset:31428*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31428*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10477: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4801fff; valaddr_reg:x3; val_offset:31431*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31431*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10478: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4803fff; valaddr_reg:x3; val_offset:31434*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31434*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10479: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4807fff; valaddr_reg:x3; val_offset:31437*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31437*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10480: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc480ffff; valaddr_reg:x3; val_offset:31440*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31440*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10481: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc481ffff; valaddr_reg:x3; val_offset:31443*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31443*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10482: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc483ffff; valaddr_reg:x3; val_offset:31446*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31446*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10483: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc487ffff; valaddr_reg:x3; val_offset:31449*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31449*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10484: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc48fffff; valaddr_reg:x3; val_offset:31452*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31452*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10485: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc49fffff; valaddr_reg:x3; val_offset:31455*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31455*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10486: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4bfffff; valaddr_reg:x3; val_offset:31458*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31458*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10487: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4c00000; valaddr_reg:x3; val_offset:31461*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31461*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10488: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4e00000; valaddr_reg:x3; val_offset:31464*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31464*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10489: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4f00000; valaddr_reg:x3; val_offset:31467*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31467*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10490: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4f80000; valaddr_reg:x3; val_offset:31470*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31470*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10491: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fc0000; valaddr_reg:x3; val_offset:31473*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31473*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10492: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fe0000; valaddr_reg:x3; val_offset:31476*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31476*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10493: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ff0000; valaddr_reg:x3; val_offset:31479*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31479*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10494: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ff8000; valaddr_reg:x3; val_offset:31482*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31482*0 + 3*81*FLEN/8, x4, x1, x2) + +inst_10495: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ffc000; valaddr_reg:x3; val_offset:31485*0 + 3*81*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31485*0 + 3*81*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134086656,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134152192,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134184960,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134201344,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134209536,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134213632,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134215680,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134216704,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217216,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217472,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217600,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217664,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217696,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217712,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217720,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217724,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217726,32,FLEN) +NAN_BOXED(2118469897,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(134217727,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716544,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716545,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716547,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716551,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716559,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716575,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716607,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716671,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828716799,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828717055,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828717567,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828718591,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828720639,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828724735,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828732927,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828749311,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828782079,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828847615,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1828978687,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1829240831,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1829765119,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1830813695,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1832910847,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1832910848,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1835008000,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1836056576,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1836580864,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1836843008,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1836974080,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837039616,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837072384,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837088768,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837096960,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837101056,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837103104,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837104128,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837104640,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837104896,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837105024,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837105088,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837105120,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837105136,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837105144,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837105148,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837105150,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(1837105151,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2118537187,32,FLEN) +NAN_BOXED(1084570633,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296722944,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296722945,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296722947,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296722951,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296722959,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296722975,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296723007,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296723071,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296723199,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296723455,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296723967,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296724991,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296727039,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296731135,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296739327,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296755711,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296788479,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296854015,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3296985087,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3297247231,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3297771519,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3298820095,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3300917247,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3300917248,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3303014400,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3304062976,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3304587264,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3304849408,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3304980480,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305046016,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305078784,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305095168,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-83.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-83.S new file mode 100644 index 000000000..655a24a2a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-83.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_10496: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ffe000; valaddr_reg:x3; val_offset:31488*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31488*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10497: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fff000; valaddr_reg:x3; val_offset:31491*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31491*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10498: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fff800; valaddr_reg:x3; val_offset:31494*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31494*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10499: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fffc00; valaddr_reg:x3; val_offset:31497*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31497*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10500: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fffe00; valaddr_reg:x3; val_offset:31500*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31500*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10501: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ffff00; valaddr_reg:x3; val_offset:31503*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31503*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10502: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ffff80; valaddr_reg:x3; val_offset:31506*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31506*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10503: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ffffc0; valaddr_reg:x3; val_offset:31509*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31509*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10504: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ffffe0; valaddr_reg:x3; val_offset:31512*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31512*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10505: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fffff0; valaddr_reg:x3; val_offset:31515*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31515*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10506: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fffff8; valaddr_reg:x3; val_offset:31518*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31518*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10507: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fffffc; valaddr_reg:x3; val_offset:31521*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31521*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10508: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4fffffe; valaddr_reg:x3; val_offset:31524*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31524*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10509: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x476d13 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x244fbf and fs3 == 1 and fe3 == 0x89 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e476d13; op2val:0x80a44fbf; +op3val:0xc4ffffff; valaddr_reg:x3; val_offset:31527*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31527*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10510: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:31530*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31530*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10511: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:31533*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31533*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10512: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:31536*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31536*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10513: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:31539*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31539*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10514: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:31542*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31542*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10515: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:31545*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31545*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10516: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:31548*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31548*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10517: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:31551*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31551*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10518: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:31554*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31554*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10519: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:31557*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31557*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10520: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:31560*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31560*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10521: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:31563*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31563*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10522: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:31566*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31566*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10523: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:31569*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31569*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10524: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:31572*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31572*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10525: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:31575*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31575*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10526: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a000000; valaddr_reg:x3; val_offset:31578*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31578*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10527: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a000001; valaddr_reg:x3; val_offset:31581*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31581*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10528: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a000003; valaddr_reg:x3; val_offset:31584*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31584*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10529: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a000007; valaddr_reg:x3; val_offset:31587*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31587*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10530: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a00000f; valaddr_reg:x3; val_offset:31590*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31590*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10531: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a00001f; valaddr_reg:x3; val_offset:31593*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31593*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10532: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a00003f; valaddr_reg:x3; val_offset:31596*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31596*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10533: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a00007f; valaddr_reg:x3; val_offset:31599*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31599*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10534: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a0000ff; valaddr_reg:x3; val_offset:31602*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31602*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10535: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a0001ff; valaddr_reg:x3; val_offset:31605*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31605*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10536: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a0003ff; valaddr_reg:x3; val_offset:31608*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31608*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10537: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a0007ff; valaddr_reg:x3; val_offset:31611*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31611*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10538: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a000fff; valaddr_reg:x3; val_offset:31614*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31614*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10539: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a001fff; valaddr_reg:x3; val_offset:31617*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31617*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10540: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a003fff; valaddr_reg:x3; val_offset:31620*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31620*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10541: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a007fff; valaddr_reg:x3; val_offset:31623*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31623*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10542: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a00ffff; valaddr_reg:x3; val_offset:31626*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31626*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10543: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a01ffff; valaddr_reg:x3; val_offset:31629*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31629*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10544: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a03ffff; valaddr_reg:x3; val_offset:31632*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31632*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10545: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a07ffff; valaddr_reg:x3; val_offset:31635*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31635*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10546: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a0fffff; valaddr_reg:x3; val_offset:31638*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31638*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10547: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a1fffff; valaddr_reg:x3; val_offset:31641*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31641*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10548: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a3fffff; valaddr_reg:x3; val_offset:31644*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31644*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10549: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a400000; valaddr_reg:x3; val_offset:31647*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31647*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10550: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a600000; valaddr_reg:x3; val_offset:31650*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31650*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10551: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a700000; valaddr_reg:x3; val_offset:31653*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31653*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10552: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a780000; valaddr_reg:x3; val_offset:31656*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31656*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10553: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7c0000; valaddr_reg:x3; val_offset:31659*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31659*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10554: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7e0000; valaddr_reg:x3; val_offset:31662*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31662*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10555: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7f0000; valaddr_reg:x3; val_offset:31665*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31665*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10556: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7f8000; valaddr_reg:x3; val_offset:31668*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31668*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10557: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7fc000; valaddr_reg:x3; val_offset:31671*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31671*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10558: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7fe000; valaddr_reg:x3; val_offset:31674*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31674*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10559: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7ff000; valaddr_reg:x3; val_offset:31677*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31677*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10560: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7ff800; valaddr_reg:x3; val_offset:31680*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31680*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10561: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7ffc00; valaddr_reg:x3; val_offset:31683*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31683*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10562: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7ffe00; valaddr_reg:x3; val_offset:31686*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31686*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10563: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7fff00; valaddr_reg:x3; val_offset:31689*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31689*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10564: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7fff80; valaddr_reg:x3; val_offset:31692*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31692*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10565: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7fffc0; valaddr_reg:x3; val_offset:31695*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31695*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10566: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7fffe0; valaddr_reg:x3; val_offset:31698*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31698*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10567: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7ffff0; valaddr_reg:x3; val_offset:31701*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31701*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10568: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7ffff8; valaddr_reg:x3; val_offset:31704*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31704*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10569: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7ffffc; valaddr_reg:x3; val_offset:31707*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31707*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10570: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7ffffe; valaddr_reg:x3; val_offset:31710*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31710*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10571: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47b921 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x24112d and fs3 == 0 and fe3 == 0xf4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47b921; op2val:0xa4112d; +op3val:0x7a7fffff; valaddr_reg:x3; val_offset:31713*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31713*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10572: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3f800001; valaddr_reg:x3; val_offset:31716*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31716*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10573: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3f800003; valaddr_reg:x3; val_offset:31719*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31719*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10574: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3f800007; valaddr_reg:x3; val_offset:31722*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31722*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10575: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3f999999; valaddr_reg:x3; val_offset:31725*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31725*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10576: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:31728*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31728*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10577: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:31731*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31731*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10578: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:31734*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31734*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10579: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:31737*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31737*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10580: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:31740*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31740*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10581: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:31743*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31743*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10582: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:31746*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31746*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10583: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:31749*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31749*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10584: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:31752*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31752*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10585: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:31755*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31755*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10586: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:31758*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31758*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10587: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:31761*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31761*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10588: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42000000; valaddr_reg:x3; val_offset:31764*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31764*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10589: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42000001; valaddr_reg:x3; val_offset:31767*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31767*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10590: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42000003; valaddr_reg:x3; val_offset:31770*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31770*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10591: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42000007; valaddr_reg:x3; val_offset:31773*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31773*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10592: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x4200000f; valaddr_reg:x3; val_offset:31776*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31776*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10593: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x4200001f; valaddr_reg:x3; val_offset:31779*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31779*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10594: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x4200003f; valaddr_reg:x3; val_offset:31782*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31782*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10595: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x4200007f; valaddr_reg:x3; val_offset:31785*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31785*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10596: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x420000ff; valaddr_reg:x3; val_offset:31788*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31788*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10597: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x420001ff; valaddr_reg:x3; val_offset:31791*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31791*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10598: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x420003ff; valaddr_reg:x3; val_offset:31794*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31794*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10599: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x420007ff; valaddr_reg:x3; val_offset:31797*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31797*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10600: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42000fff; valaddr_reg:x3; val_offset:31800*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31800*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10601: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42001fff; valaddr_reg:x3; val_offset:31803*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31803*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10602: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42003fff; valaddr_reg:x3; val_offset:31806*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31806*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10603: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42007fff; valaddr_reg:x3; val_offset:31809*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31809*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10604: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x4200ffff; valaddr_reg:x3; val_offset:31812*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31812*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10605: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x4201ffff; valaddr_reg:x3; val_offset:31815*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31815*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10606: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x4203ffff; valaddr_reg:x3; val_offset:31818*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31818*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10607: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x4207ffff; valaddr_reg:x3; val_offset:31821*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31821*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10608: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x420fffff; valaddr_reg:x3; val_offset:31824*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31824*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10609: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x421fffff; valaddr_reg:x3; val_offset:31827*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31827*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10610: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x423fffff; valaddr_reg:x3; val_offset:31830*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31830*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10611: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42400000; valaddr_reg:x3; val_offset:31833*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31833*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10612: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42600000; valaddr_reg:x3; val_offset:31836*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31836*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10613: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42700000; valaddr_reg:x3; val_offset:31839*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31839*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10614: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x42780000; valaddr_reg:x3; val_offset:31842*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31842*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10615: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427c0000; valaddr_reg:x3; val_offset:31845*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31845*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10616: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427e0000; valaddr_reg:x3; val_offset:31848*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31848*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10617: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427f0000; valaddr_reg:x3; val_offset:31851*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31851*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10618: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427f8000; valaddr_reg:x3; val_offset:31854*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31854*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10619: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427fc000; valaddr_reg:x3; val_offset:31857*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31857*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10620: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427fe000; valaddr_reg:x3; val_offset:31860*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31860*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10621: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427ff000; valaddr_reg:x3; val_offset:31863*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31863*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10622: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427ff800; valaddr_reg:x3; val_offset:31866*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31866*0 + 3*82*FLEN/8, x4, x1, x2) + +inst_10623: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427ffc00; valaddr_reg:x3; val_offset:31869*0 + 3*82*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31869*0 + 3*82*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305103360,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305107456,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305109504,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305110528,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111040,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111296,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111424,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111488,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111520,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111536,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111544,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111548,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111550,32,FLEN) +NAN_BOXED(2118610195,32,FLEN) +NAN_BOXED(2158251967,32,FLEN) +NAN_BOXED(3305111551,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820352,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820353,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820355,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820359,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820367,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820383,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820415,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820479,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820607,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046820863,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046821375,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046822399,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046824447,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046828543,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046836735,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046853119,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046885887,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2046951423,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2047082495,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2047344639,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2047868927,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2048917503,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2051014655,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2051014656,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2053111808,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2054160384,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2054684672,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2054946816,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055077888,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055143424,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055176192,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055192576,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055200768,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055204864,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055206912,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055207936,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208448,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208704,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208832,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208896,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208928,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208944,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208952,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208956,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208958,32,FLEN) +NAN_BOXED(2118629665,32,FLEN) +NAN_BOXED(10752301,32,FLEN) +NAN_BOXED(2055208959,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296256,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296257,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296259,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296263,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296271,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296287,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296319,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296383,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296511,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107296767,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107297279,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107298303,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107300351,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107304447,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107312639,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107329023,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107361791,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107427327,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107558399,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1107820543,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1108344831,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1109393407,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1111490559,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1111490560,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1113587712,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1114636288,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115160576,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115422720,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115553792,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115619328,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115652096,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115668480,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115676672,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115680768,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115682816,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115683840,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-84.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-84.S new file mode 100644 index 000000000..e2515f0ba --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-84.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_10624: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427ffe00; valaddr_reg:x3; val_offset:31872*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31872*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10625: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427fff00; valaddr_reg:x3; val_offset:31875*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31875*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10626: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427fff80; valaddr_reg:x3; val_offset:31878*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31878*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10627: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427fffc0; valaddr_reg:x3; val_offset:31881*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31881*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10628: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427fffe0; valaddr_reg:x3; val_offset:31884*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31884*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10629: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427ffff0; valaddr_reg:x3; val_offset:31887*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31887*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10630: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427ffff8; valaddr_reg:x3; val_offset:31890*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31890*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10631: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427ffffc; valaddr_reg:x3; val_offset:31893*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31893*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10632: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427ffffe; valaddr_reg:x3; val_offset:31896*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31896*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10633: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x47c846 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x2404bc and fs3 == 0 and fe3 == 0x84 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e47c846; op2val:0xa404bc; +op3val:0x427fffff; valaddr_reg:x3; val_offset:31899*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31899*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10634: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:31902*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31902*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10635: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:31905*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31905*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10636: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:31908*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31908*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10637: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:31911*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31911*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10638: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:31914*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31914*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10639: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:31917*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31917*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10640: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:31920*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31920*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10641: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:31923*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31923*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10642: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:31926*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31926*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10643: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:31929*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31929*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10644: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:31932*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31932*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10645: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:31935*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31935*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10646: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:31938*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31938*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10647: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:31941*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31941*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10648: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:31944*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31944*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10649: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:31947*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31947*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10650: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c800000; valaddr_reg:x3; val_offset:31950*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31950*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10651: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c800001; valaddr_reg:x3; val_offset:31953*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31953*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10652: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c800003; valaddr_reg:x3; val_offset:31956*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31956*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10653: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c800007; valaddr_reg:x3; val_offset:31959*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31959*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10654: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c80000f; valaddr_reg:x3; val_offset:31962*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31962*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10655: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c80001f; valaddr_reg:x3; val_offset:31965*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31965*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10656: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c80003f; valaddr_reg:x3; val_offset:31968*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31968*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10657: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c80007f; valaddr_reg:x3; val_offset:31971*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31971*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10658: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c8000ff; valaddr_reg:x3; val_offset:31974*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31974*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10659: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c8001ff; valaddr_reg:x3; val_offset:31977*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31977*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10660: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c8003ff; valaddr_reg:x3; val_offset:31980*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31980*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10661: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c8007ff; valaddr_reg:x3; val_offset:31983*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31983*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10662: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c800fff; valaddr_reg:x3; val_offset:31986*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31986*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10663: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c801fff; valaddr_reg:x3; val_offset:31989*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31989*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10664: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c803fff; valaddr_reg:x3; val_offset:31992*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31992*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10665: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c807fff; valaddr_reg:x3; val_offset:31995*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31995*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10666: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c80ffff; valaddr_reg:x3; val_offset:31998*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 31998*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10667: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c81ffff; valaddr_reg:x3; val_offset:32001*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32001*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10668: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c83ffff; valaddr_reg:x3; val_offset:32004*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32004*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10669: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c87ffff; valaddr_reg:x3; val_offset:32007*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32007*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10670: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c8fffff; valaddr_reg:x3; val_offset:32010*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32010*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10671: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8c9fffff; valaddr_reg:x3; val_offset:32013*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32013*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10672: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cbfffff; valaddr_reg:x3; val_offset:32016*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32016*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10673: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cc00000; valaddr_reg:x3; val_offset:32019*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32019*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10674: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8ce00000; valaddr_reg:x3; val_offset:32022*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32022*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10675: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cf00000; valaddr_reg:x3; val_offset:32025*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32025*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10676: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cf80000; valaddr_reg:x3; val_offset:32028*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32028*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10677: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfc0000; valaddr_reg:x3; val_offset:32031*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32031*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10678: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfe0000; valaddr_reg:x3; val_offset:32034*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32034*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10679: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cff0000; valaddr_reg:x3; val_offset:32037*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32037*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10680: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cff8000; valaddr_reg:x3; val_offset:32040*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32040*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10681: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cffc000; valaddr_reg:x3; val_offset:32043*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32043*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10682: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cffe000; valaddr_reg:x3; val_offset:32046*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32046*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10683: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfff000; valaddr_reg:x3; val_offset:32049*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32049*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10684: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfff800; valaddr_reg:x3; val_offset:32052*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32052*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10685: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfffc00; valaddr_reg:x3; val_offset:32055*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32055*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10686: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfffe00; valaddr_reg:x3; val_offset:32058*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32058*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10687: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cffff00; valaddr_reg:x3; val_offset:32061*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32061*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10688: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cffff80; valaddr_reg:x3; val_offset:32064*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32064*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10689: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cffffc0; valaddr_reg:x3; val_offset:32067*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32067*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10690: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cffffe0; valaddr_reg:x3; val_offset:32070*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32070*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10691: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfffff0; valaddr_reg:x3; val_offset:32073*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32073*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10692: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfffff8; valaddr_reg:x3; val_offset:32076*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32076*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10693: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfffffc; valaddr_reg:x3; val_offset:32079*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32079*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10694: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cfffffe; valaddr_reg:x3; val_offset:32082*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32082*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10695: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4938c6 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4938c6; op2val:0x80000000; +op3val:0x8cffffff; valaddr_reg:x3; val_offset:32085*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32085*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10696: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x0; valaddr_reg:x3; val_offset:32088*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32088*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10697: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:32091*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32091*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10698: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:32094*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32094*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10699: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:32097*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32097*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10700: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0xf; valaddr_reg:x3; val_offset:32100*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32100*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10701: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x1f; valaddr_reg:x3; val_offset:32103*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32103*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10702: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x3f; valaddr_reg:x3; val_offset:32106*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32106*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10703: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7f; valaddr_reg:x3; val_offset:32109*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32109*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10704: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0xff; valaddr_reg:x3; val_offset:32112*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32112*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10705: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x1ff; valaddr_reg:x3; val_offset:32115*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32115*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10706: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x3ff; valaddr_reg:x3; val_offset:32118*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32118*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10707: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ff; valaddr_reg:x3; val_offset:32121*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32121*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10708: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0xfff; valaddr_reg:x3; val_offset:32124*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32124*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10709: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x1fff; valaddr_reg:x3; val_offset:32127*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32127*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10710: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x3fff; valaddr_reg:x3; val_offset:32130*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32130*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10711: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7fff; valaddr_reg:x3; val_offset:32133*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32133*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10712: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0xffff; valaddr_reg:x3; val_offset:32136*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32136*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10713: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x1ffff; valaddr_reg:x3; val_offset:32139*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32139*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10714: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x3ffff; valaddr_reg:x3; val_offset:32142*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32142*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10715: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ffff; valaddr_reg:x3; val_offset:32145*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32145*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10716: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0xfffff; valaddr_reg:x3; val_offset:32148*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32148*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10717: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:32151*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32151*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10718: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x1fffff; valaddr_reg:x3; val_offset:32154*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32154*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10719: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:32157*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32157*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10720: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:32160*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32160*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10721: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:32163*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32163*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10722: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:32166*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32166*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10723: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x3fffff; valaddr_reg:x3; val_offset:32169*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32169*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10724: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x400000; valaddr_reg:x3; val_offset:32172*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32172*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10725: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:32175*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32175*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10726: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:32178*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32178*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10727: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:32181*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32181*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10728: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x600000; valaddr_reg:x3; val_offset:32184*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32184*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10729: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:32187*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32187*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10730: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:32190*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32190*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10731: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x700000; valaddr_reg:x3; val_offset:32193*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32193*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10732: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x780000; valaddr_reg:x3; val_offset:32196*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32196*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10733: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7c0000; valaddr_reg:x3; val_offset:32199*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32199*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10734: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7e0000; valaddr_reg:x3; val_offset:32202*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32202*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10735: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7f0000; valaddr_reg:x3; val_offset:32205*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32205*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10736: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7f8000; valaddr_reg:x3; val_offset:32208*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32208*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10737: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7fc000; valaddr_reg:x3; val_offset:32211*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32211*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10738: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7fe000; valaddr_reg:x3; val_offset:32214*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32214*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10739: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ff000; valaddr_reg:x3; val_offset:32217*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32217*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10740: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ff800; valaddr_reg:x3; val_offset:32220*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32220*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10741: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ffc00; valaddr_reg:x3; val_offset:32223*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32223*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10742: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ffe00; valaddr_reg:x3; val_offset:32226*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32226*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10743: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7fff00; valaddr_reg:x3; val_offset:32229*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32229*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10744: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7fff80; valaddr_reg:x3; val_offset:32232*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32232*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10745: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7fffc0; valaddr_reg:x3; val_offset:32235*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32235*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10746: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7fffe0; valaddr_reg:x3; val_offset:32238*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32238*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10747: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ffff0; valaddr_reg:x3; val_offset:32241*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32241*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10748: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:32244*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32244*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10749: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:32247*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32247*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10750: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:32250*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32250*0 + 3*83*FLEN/8, x4, x1, x2) + +inst_10751: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x4f11de and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e4f11de; op2val:0x0; +op3val:0x7fffff; valaddr_reg:x3; val_offset:32253*0 + 3*83*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32253*0 + 3*83*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684352,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684608,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684736,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684800,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684832,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684848,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684856,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684860,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684862,32,FLEN) +NAN_BOXED(2118633542,32,FLEN) +NAN_BOXED(10749116,32,FLEN) +NAN_BOXED(1115684863,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198848,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198849,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198851,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198855,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198863,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198879,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198911,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198975,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199103,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199359,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199871,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357200895,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357202943,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357207039,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357215231,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357231615,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357264383,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357329919,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357460991,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357723135,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2358247423,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2359295999,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2361393151,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2361393152,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2363490304,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2364538880,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365063168,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365325312,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365456384,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365521920,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365554688,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365571072,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365579264,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365583360,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365585408,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365586432,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365586944,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587200,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587328,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587392,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587424,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587440,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587448,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587452,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587454,32,FLEN) +NAN_BOXED(2118727878,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587455,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(63,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(511,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1023,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2047,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4095,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8191,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16383,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32767,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65535,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(131071,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(524287,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1048575,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2097151,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194303,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194304,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6291456,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7340032,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7864320,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8126464,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8257536,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8323072,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8355840,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8372224,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8380416,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8384512,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8386560,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8387584,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388096,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388352,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388480,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388544,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388576,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388592,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2119111134,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388607,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-85.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-85.S new file mode 100644 index 000000000..706dd331d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-85.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_10752: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d800000; valaddr_reg:x3; val_offset:32256*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32256*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10753: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d800001; valaddr_reg:x3; val_offset:32259*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32259*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10754: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d800003; valaddr_reg:x3; val_offset:32262*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32262*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10755: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d800007; valaddr_reg:x3; val_offset:32265*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32265*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10756: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d80000f; valaddr_reg:x3; val_offset:32268*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32268*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10757: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d80001f; valaddr_reg:x3; val_offset:32271*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32271*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10758: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d80003f; valaddr_reg:x3; val_offset:32274*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32274*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10759: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d80007f; valaddr_reg:x3; val_offset:32277*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32277*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10760: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d8000ff; valaddr_reg:x3; val_offset:32280*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32280*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10761: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d8001ff; valaddr_reg:x3; val_offset:32283*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32283*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10762: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d8003ff; valaddr_reg:x3; val_offset:32286*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32286*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10763: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d8007ff; valaddr_reg:x3; val_offset:32289*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32289*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10764: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d800fff; valaddr_reg:x3; val_offset:32292*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32292*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10765: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d801fff; valaddr_reg:x3; val_offset:32295*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32295*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10766: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d803fff; valaddr_reg:x3; val_offset:32298*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32298*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10767: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d807fff; valaddr_reg:x3; val_offset:32301*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32301*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10768: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d80ffff; valaddr_reg:x3; val_offset:32304*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32304*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10769: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d81ffff; valaddr_reg:x3; val_offset:32307*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32307*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10770: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d83ffff; valaddr_reg:x3; val_offset:32310*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32310*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10771: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d87ffff; valaddr_reg:x3; val_offset:32313*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32313*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10772: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d8fffff; valaddr_reg:x3; val_offset:32316*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32316*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10773: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2d9fffff; valaddr_reg:x3; val_offset:32319*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32319*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10774: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dbfffff; valaddr_reg:x3; val_offset:32322*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32322*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10775: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dc00000; valaddr_reg:x3; val_offset:32325*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32325*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10776: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2de00000; valaddr_reg:x3; val_offset:32328*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32328*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10777: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2df00000; valaddr_reg:x3; val_offset:32331*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32331*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10778: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2df80000; valaddr_reg:x3; val_offset:32334*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32334*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10779: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfc0000; valaddr_reg:x3; val_offset:32337*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32337*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10780: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfe0000; valaddr_reg:x3; val_offset:32340*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32340*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10781: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dff0000; valaddr_reg:x3; val_offset:32343*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32343*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10782: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dff8000; valaddr_reg:x3; val_offset:32346*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32346*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10783: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dffc000; valaddr_reg:x3; val_offset:32349*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32349*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10784: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dffe000; valaddr_reg:x3; val_offset:32352*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32352*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10785: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfff000; valaddr_reg:x3; val_offset:32355*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32355*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10786: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfff800; valaddr_reg:x3; val_offset:32358*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32358*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10787: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfffc00; valaddr_reg:x3; val_offset:32361*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32361*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10788: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfffe00; valaddr_reg:x3; val_offset:32364*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32364*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10789: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dffff00; valaddr_reg:x3; val_offset:32367*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32367*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10790: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dffff80; valaddr_reg:x3; val_offset:32370*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32370*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10791: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dffffc0; valaddr_reg:x3; val_offset:32373*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32373*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10792: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dffffe0; valaddr_reg:x3; val_offset:32376*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32376*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10793: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfffff0; valaddr_reg:x3; val_offset:32379*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32379*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10794: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfffff8; valaddr_reg:x3; val_offset:32382*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32382*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10795: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfffffc; valaddr_reg:x3; val_offset:32385*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32385*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10796: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dfffffe; valaddr_reg:x3; val_offset:32388*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32388*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10797: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x5b and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x2dffffff; valaddr_reg:x3; val_offset:32391*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32391*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10798: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3f800001; valaddr_reg:x3; val_offset:32394*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32394*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10799: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3f800003; valaddr_reg:x3; val_offset:32397*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32397*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10800: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3f800007; valaddr_reg:x3; val_offset:32400*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32400*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10801: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3f999999; valaddr_reg:x3; val_offset:32403*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32403*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10802: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:32406*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32406*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10803: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:32409*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32409*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10804: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:32412*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32412*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10805: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:32415*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32415*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10806: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:32418*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32418*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10807: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:32421*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32421*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10808: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:32424*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32424*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10809: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:32427*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32427*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10810: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:32430*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32430*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10811: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:32433*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32433*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10812: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:32436*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32436*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10813: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x50283a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1d6b66 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e50283a; op2val:0x9d6b66; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:32439*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32439*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10814: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbf800001; valaddr_reg:x3; val_offset:32442*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32442*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10815: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbf800003; valaddr_reg:x3; val_offset:32445*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32445*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10816: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbf800007; valaddr_reg:x3; val_offset:32448*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32448*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10817: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbf999999; valaddr_reg:x3; val_offset:32451*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32451*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10818: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:32454*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32454*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10819: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:32457*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32457*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10820: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:32460*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32460*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10821: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:32463*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32463*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10822: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:32466*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32466*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10823: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:32469*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32469*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10824: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:32472*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32472*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10825: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:32475*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32475*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10826: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:32478*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32478*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10827: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:32481*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32481*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10828: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:32484*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32484*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10829: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:32487*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32487*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10830: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd000000; valaddr_reg:x3; val_offset:32490*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32490*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10831: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd000001; valaddr_reg:x3; val_offset:32493*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32493*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10832: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd000003; valaddr_reg:x3; val_offset:32496*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32496*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10833: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd000007; valaddr_reg:x3; val_offset:32499*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32499*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10834: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd00000f; valaddr_reg:x3; val_offset:32502*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32502*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10835: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd00001f; valaddr_reg:x3; val_offset:32505*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32505*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10836: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd00003f; valaddr_reg:x3; val_offset:32508*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32508*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10837: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd00007f; valaddr_reg:x3; val_offset:32511*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32511*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10838: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd0000ff; valaddr_reg:x3; val_offset:32514*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32514*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10839: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd0001ff; valaddr_reg:x3; val_offset:32517*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32517*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10840: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd0003ff; valaddr_reg:x3; val_offset:32520*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32520*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10841: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd0007ff; valaddr_reg:x3; val_offset:32523*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32523*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10842: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd000fff; valaddr_reg:x3; val_offset:32526*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32526*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10843: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd001fff; valaddr_reg:x3; val_offset:32529*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32529*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10844: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd003fff; valaddr_reg:x3; val_offset:32532*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32532*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10845: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd007fff; valaddr_reg:x3; val_offset:32535*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32535*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10846: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd00ffff; valaddr_reg:x3; val_offset:32538*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32538*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10847: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd01ffff; valaddr_reg:x3; val_offset:32541*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32541*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10848: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd03ffff; valaddr_reg:x3; val_offset:32544*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32544*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10849: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd07ffff; valaddr_reg:x3; val_offset:32547*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32547*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10850: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd0fffff; valaddr_reg:x3; val_offset:32550*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32550*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10851: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd1fffff; valaddr_reg:x3; val_offset:32553*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32553*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10852: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd3fffff; valaddr_reg:x3; val_offset:32556*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32556*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10853: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd400000; valaddr_reg:x3; val_offset:32559*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32559*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10854: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd600000; valaddr_reg:x3; val_offset:32562*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32562*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10855: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd700000; valaddr_reg:x3; val_offset:32565*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32565*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10856: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd780000; valaddr_reg:x3; val_offset:32568*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32568*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10857: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7c0000; valaddr_reg:x3; val_offset:32571*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32571*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10858: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7e0000; valaddr_reg:x3; val_offset:32574*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32574*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10859: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7f0000; valaddr_reg:x3; val_offset:32577*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32577*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10860: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7f8000; valaddr_reg:x3; val_offset:32580*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32580*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10861: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7fc000; valaddr_reg:x3; val_offset:32583*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32583*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10862: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7fe000; valaddr_reg:x3; val_offset:32586*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32586*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10863: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7ff000; valaddr_reg:x3; val_offset:32589*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32589*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10864: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7ff800; valaddr_reg:x3; val_offset:32592*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32592*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10865: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7ffc00; valaddr_reg:x3; val_offset:32595*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32595*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10866: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7ffe00; valaddr_reg:x3; val_offset:32598*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32598*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10867: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7fff00; valaddr_reg:x3; val_offset:32601*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32601*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10868: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7fff80; valaddr_reg:x3; val_offset:32604*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32604*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10869: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7fffc0; valaddr_reg:x3; val_offset:32607*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32607*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10870: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7fffe0; valaddr_reg:x3; val_offset:32610*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32610*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10871: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7ffff0; valaddr_reg:x3; val_offset:32613*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32613*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10872: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7ffff8; valaddr_reg:x3; val_offset:32616*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32616*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10873: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7ffffc; valaddr_reg:x3; val_offset:32619*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32619*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10874: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7ffffe; valaddr_reg:x3; val_offset:32622*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32622*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10875: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x506a2f and fs2 == 1 and fe2 == 0x01 and fm2 == 0x1d3994 and fs3 == 1 and fe3 == 0x9a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e506a2f; op2val:0x809d3994; +op3val:0xcd7fffff; valaddr_reg:x3; val_offset:32625*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32625*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10876: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27800000; valaddr_reg:x3; val_offset:32628*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32628*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10877: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27800001; valaddr_reg:x3; val_offset:32631*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32631*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10878: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27800003; valaddr_reg:x3; val_offset:32634*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32634*0 + 3*84*FLEN/8, x4, x1, x2) + +inst_10879: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27800007; valaddr_reg:x3; val_offset:32637*0 + 3*84*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32637*0 + 3*84*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363328,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363329,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363331,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363335,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363343,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363359,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363391,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363455,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363583,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763363839,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763364351,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763365375,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763367423,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763371519,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763379711,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763396095,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763428863,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763494399,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763625471,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(763887615,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(764411903,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(765460479,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(767557631,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(767557632,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(769654784,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(770703360,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771227648,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771489792,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771620864,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771686400,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771719168,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771735552,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771743744,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771747840,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771749888,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771750912,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751424,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751680,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751808,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751872,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751904,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751920,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751928,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751932,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751934,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(771751935,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2119182394,32,FLEN) +NAN_BOXED(10316646,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329280,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329281,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329283,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329287,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329295,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329311,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329343,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329407,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329535,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439329791,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439330303,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439331327,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439333375,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439337471,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439345663,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439362047,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439394815,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439460351,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439591423,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3439853567,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3440377855,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3441426431,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3443523583,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3443523584,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3445620736,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3446669312,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447193600,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447455744,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447586816,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447652352,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447685120,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447701504,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447709696,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447713792,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447715840,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447716864,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717376,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717632,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717760,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717824,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717856,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717872,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717880,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717884,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717886,32,FLEN) +NAN_BOXED(2119199279,32,FLEN) +NAN_BOXED(2157787540,32,FLEN) +NAN_BOXED(3447717887,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700032,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700033,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700035,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700039,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-86.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-86.S new file mode 100644 index 000000000..2854d426c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-86.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_10880: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x2780000f; valaddr_reg:x3; val_offset:32640*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32640*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10881: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x2780001f; valaddr_reg:x3; val_offset:32643*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32643*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10882: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x2780003f; valaddr_reg:x3; val_offset:32646*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32646*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10883: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x2780007f; valaddr_reg:x3; val_offset:32649*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32649*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10884: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x278000ff; valaddr_reg:x3; val_offset:32652*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32652*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10885: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x278001ff; valaddr_reg:x3; val_offset:32655*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32655*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10886: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x278003ff; valaddr_reg:x3; val_offset:32658*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32658*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10887: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x278007ff; valaddr_reg:x3; val_offset:32661*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32661*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10888: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27800fff; valaddr_reg:x3; val_offset:32664*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32664*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10889: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27801fff; valaddr_reg:x3; val_offset:32667*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32667*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10890: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27803fff; valaddr_reg:x3; val_offset:32670*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32670*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10891: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27807fff; valaddr_reg:x3; val_offset:32673*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32673*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10892: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x2780ffff; valaddr_reg:x3; val_offset:32676*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32676*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10893: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x2781ffff; valaddr_reg:x3; val_offset:32679*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32679*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10894: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x2783ffff; valaddr_reg:x3; val_offset:32682*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32682*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10895: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x2787ffff; valaddr_reg:x3; val_offset:32685*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32685*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10896: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x278fffff; valaddr_reg:x3; val_offset:32688*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32688*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10897: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x279fffff; valaddr_reg:x3; val_offset:32691*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32691*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10898: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27bfffff; valaddr_reg:x3; val_offset:32694*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32694*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10899: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27c00000; valaddr_reg:x3; val_offset:32697*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32697*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10900: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27e00000; valaddr_reg:x3; val_offset:32700*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32700*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10901: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27f00000; valaddr_reg:x3; val_offset:32703*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32703*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10902: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27f80000; valaddr_reg:x3; val_offset:32706*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32706*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10903: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fc0000; valaddr_reg:x3; val_offset:32709*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32709*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10904: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fe0000; valaddr_reg:x3; val_offset:32712*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32712*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10905: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ff0000; valaddr_reg:x3; val_offset:32715*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32715*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10906: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ff8000; valaddr_reg:x3; val_offset:32718*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32718*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10907: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ffc000; valaddr_reg:x3; val_offset:32721*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32721*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10908: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ffe000; valaddr_reg:x3; val_offset:32724*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32724*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10909: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fff000; valaddr_reg:x3; val_offset:32727*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32727*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10910: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fff800; valaddr_reg:x3; val_offset:32730*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32730*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10911: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fffc00; valaddr_reg:x3; val_offset:32733*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32733*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10912: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fffe00; valaddr_reg:x3; val_offset:32736*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32736*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10913: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ffff00; valaddr_reg:x3; val_offset:32739*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32739*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10914: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ffff80; valaddr_reg:x3; val_offset:32742*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32742*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10915: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ffffc0; valaddr_reg:x3; val_offset:32745*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32745*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10916: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ffffe0; valaddr_reg:x3; val_offset:32748*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32748*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10917: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fffff0; valaddr_reg:x3; val_offset:32751*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32751*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10918: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fffff8; valaddr_reg:x3; val_offset:32754*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32754*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10919: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fffffc; valaddr_reg:x3; val_offset:32757*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32757*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10920: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27fffffe; valaddr_reg:x3; val_offset:32760*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32760*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10921: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x4f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x27ffffff; valaddr_reg:x3; val_offset:32763*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32763*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10922: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3f800001; valaddr_reg:x3; val_offset:32766*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32766*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10923: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3f800003; valaddr_reg:x3; val_offset:32769*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32769*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10924: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3f800007; valaddr_reg:x3; val_offset:32772*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32772*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10925: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3f999999; valaddr_reg:x3; val_offset:32775*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32775*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10926: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:32778*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32778*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10927: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:32781*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32781*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10928: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:32784*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32784*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10929: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:32787*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32787*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10930: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:32790*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32790*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10931: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:32793*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32793*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10932: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:32796*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32796*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10933: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:32799*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32799*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10934: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:32802*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32802*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10935: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:32805*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32805*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10936: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:32808*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32808*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10937: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x535ca5 and fs2 == 0 and fe2 == 0x01 and fm2 == 0x1b085d and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e535ca5; op2val:0x9b085d; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:32811*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32811*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10938: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2000000; valaddr_reg:x3; val_offset:32814*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32814*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10939: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2000001; valaddr_reg:x3; val_offset:32817*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32817*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10940: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2000003; valaddr_reg:x3; val_offset:32820*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32820*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10941: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2000007; valaddr_reg:x3; val_offset:32823*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32823*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10942: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe200000f; valaddr_reg:x3; val_offset:32826*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32826*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10943: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe200001f; valaddr_reg:x3; val_offset:32829*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32829*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10944: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe200003f; valaddr_reg:x3; val_offset:32832*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32832*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10945: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe200007f; valaddr_reg:x3; val_offset:32835*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32835*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10946: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe20000ff; valaddr_reg:x3; val_offset:32838*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32838*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10947: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe20001ff; valaddr_reg:x3; val_offset:32841*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32841*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10948: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe20003ff; valaddr_reg:x3; val_offset:32844*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32844*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10949: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe20007ff; valaddr_reg:x3; val_offset:32847*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32847*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10950: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2000fff; valaddr_reg:x3; val_offset:32850*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32850*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10951: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2001fff; valaddr_reg:x3; val_offset:32853*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32853*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10952: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2003fff; valaddr_reg:x3; val_offset:32856*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32856*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10953: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2007fff; valaddr_reg:x3; val_offset:32859*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32859*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10954: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe200ffff; valaddr_reg:x3; val_offset:32862*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32862*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10955: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe201ffff; valaddr_reg:x3; val_offset:32865*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32865*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10956: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe203ffff; valaddr_reg:x3; val_offset:32868*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32868*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10957: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe207ffff; valaddr_reg:x3; val_offset:32871*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32871*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10958: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe20fffff; valaddr_reg:x3; val_offset:32874*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32874*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10959: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe21fffff; valaddr_reg:x3; val_offset:32877*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32877*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10960: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe23fffff; valaddr_reg:x3; val_offset:32880*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32880*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10961: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2400000; valaddr_reg:x3; val_offset:32883*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32883*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10962: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2600000; valaddr_reg:x3; val_offset:32886*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32886*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10963: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2700000; valaddr_reg:x3; val_offset:32889*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32889*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10964: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe2780000; valaddr_reg:x3; val_offset:32892*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32892*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10965: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27c0000; valaddr_reg:x3; val_offset:32895*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32895*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10966: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27e0000; valaddr_reg:x3; val_offset:32898*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32898*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10967: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27f0000; valaddr_reg:x3; val_offset:32901*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32901*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10968: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27f8000; valaddr_reg:x3; val_offset:32904*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32904*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10969: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27fc000; valaddr_reg:x3; val_offset:32907*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32907*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10970: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27fe000; valaddr_reg:x3; val_offset:32910*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32910*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10971: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27ff000; valaddr_reg:x3; val_offset:32913*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32913*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10972: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27ff800; valaddr_reg:x3; val_offset:32916*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32916*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10973: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27ffc00; valaddr_reg:x3; val_offset:32919*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32919*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10974: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27ffe00; valaddr_reg:x3; val_offset:32922*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32922*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10975: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27fff00; valaddr_reg:x3; val_offset:32925*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32925*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10976: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27fff80; valaddr_reg:x3; val_offset:32928*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32928*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10977: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27fffc0; valaddr_reg:x3; val_offset:32931*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32931*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10978: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27fffe0; valaddr_reg:x3; val_offset:32934*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32934*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10979: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27ffff0; valaddr_reg:x3; val_offset:32937*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32937*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10980: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27ffff8; valaddr_reg:x3; val_offset:32940*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32940*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10981: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27ffffc; valaddr_reg:x3; val_offset:32943*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32943*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10982: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27ffffe; valaddr_reg:x3; val_offset:32946*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32946*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10983: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xc4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xe27fffff; valaddr_reg:x3; val_offset:32949*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32949*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10984: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff000001; valaddr_reg:x3; val_offset:32952*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32952*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10985: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff000003; valaddr_reg:x3; val_offset:32955*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32955*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10986: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff000007; valaddr_reg:x3; val_offset:32958*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32958*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10987: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff199999; valaddr_reg:x3; val_offset:32961*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32961*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10988: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff249249; valaddr_reg:x3; val_offset:32964*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32964*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10989: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff333333; valaddr_reg:x3; val_offset:32967*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32967*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10990: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:32970*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32970*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10991: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:32973*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32973*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10992: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff444444; valaddr_reg:x3; val_offset:32976*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32976*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10993: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:32979*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32979*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10994: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:32982*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32982*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10995: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff666666; valaddr_reg:x3; val_offset:32985*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32985*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10996: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:32988*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32988*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10997: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:32991*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32991*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10998: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:32994*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32994*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_10999: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x54b690 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x1a0c3e and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e54b690; op2val:0xc09a0c3e; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:32997*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 32997*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_11000: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1800000; valaddr_reg:x3; val_offset:33000*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33000*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_11001: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1800001; valaddr_reg:x3; val_offset:33003*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33003*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_11002: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1800003; valaddr_reg:x3; val_offset:33006*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33006*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_11003: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1800007; valaddr_reg:x3; val_offset:33009*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33009*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_11004: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf180000f; valaddr_reg:x3; val_offset:33012*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33012*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_11005: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf180001f; valaddr_reg:x3; val_offset:33015*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33015*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_11006: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf180003f; valaddr_reg:x3; val_offset:33018*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33018*0 + 3*85*FLEN/8, x4, x1, x2) + +inst_11007: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf180007f; valaddr_reg:x3; val_offset:33021*0 + 3*85*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33021*0 + 3*85*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700047,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700063,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700095,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700159,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700287,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662700543,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662701055,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662702079,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662704127,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662708223,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662716415,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662732799,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662765567,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662831103,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(662962175,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(663224319,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(663748607,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(664797183,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(666894335,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(666894336,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(668991488,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(670040064,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(670564352,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(670826496,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(670957568,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671023104,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671055872,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671072256,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671080448,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671084544,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671086592,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671087616,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088128,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088384,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088512,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088576,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088608,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088624,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088632,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088636,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088638,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(671088639,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2119392421,32,FLEN) +NAN_BOXED(10160221,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791650816,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791650817,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791650819,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791650823,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791650831,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791650847,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791650879,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791650943,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791651071,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791651327,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791651839,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791652863,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791654911,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791659007,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791667199,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791683583,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791716351,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791781887,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3791912959,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3792175103,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3792699391,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3793747967,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3795845119,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3795845120,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3797942272,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3798990848,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3799515136,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3799777280,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3799908352,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3799973888,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800006656,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800023040,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800031232,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800035328,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800037376,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800038400,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800038912,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039168,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039296,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039360,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039392,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039408,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039416,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039420,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039422,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(3800039423,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2119480976,32,FLEN) +NAN_BOXED(3231321150,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697664,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697665,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697667,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697671,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697679,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697695,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697727,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697791,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-87.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-87.S new file mode 100644 index 000000000..ea68a943f --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-87.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_11008: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf18000ff; valaddr_reg:x3; val_offset:33024*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33024*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11009: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf18001ff; valaddr_reg:x3; val_offset:33027*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33027*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11010: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf18003ff; valaddr_reg:x3; val_offset:33030*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33030*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11011: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf18007ff; valaddr_reg:x3; val_offset:33033*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33033*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11012: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1800fff; valaddr_reg:x3; val_offset:33036*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33036*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11013: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1801fff; valaddr_reg:x3; val_offset:33039*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33039*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11014: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1803fff; valaddr_reg:x3; val_offset:33042*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33042*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11015: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1807fff; valaddr_reg:x3; val_offset:33045*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33045*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11016: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf180ffff; valaddr_reg:x3; val_offset:33048*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33048*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11017: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf181ffff; valaddr_reg:x3; val_offset:33051*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33051*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11018: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf183ffff; valaddr_reg:x3; val_offset:33054*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33054*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11019: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf187ffff; valaddr_reg:x3; val_offset:33057*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33057*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11020: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf18fffff; valaddr_reg:x3; val_offset:33060*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33060*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11021: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf19fffff; valaddr_reg:x3; val_offset:33063*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33063*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11022: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1bfffff; valaddr_reg:x3; val_offset:33066*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33066*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11023: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1c00000; valaddr_reg:x3; val_offset:33069*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33069*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11024: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1e00000; valaddr_reg:x3; val_offset:33072*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33072*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11025: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1f00000; valaddr_reg:x3; val_offset:33075*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33075*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11026: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1f80000; valaddr_reg:x3; val_offset:33078*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33078*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11027: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fc0000; valaddr_reg:x3; val_offset:33081*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33081*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11028: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fe0000; valaddr_reg:x3; val_offset:33084*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33084*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11029: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ff0000; valaddr_reg:x3; val_offset:33087*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33087*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11030: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ff8000; valaddr_reg:x3; val_offset:33090*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33090*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11031: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ffc000; valaddr_reg:x3; val_offset:33093*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33093*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11032: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ffe000; valaddr_reg:x3; val_offset:33096*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33096*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11033: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fff000; valaddr_reg:x3; val_offset:33099*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33099*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11034: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fff800; valaddr_reg:x3; val_offset:33102*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33102*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11035: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fffc00; valaddr_reg:x3; val_offset:33105*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33105*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11036: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fffe00; valaddr_reg:x3; val_offset:33108*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33108*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11037: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ffff00; valaddr_reg:x3; val_offset:33111*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33111*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11038: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ffff80; valaddr_reg:x3; val_offset:33114*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33114*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11039: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ffffc0; valaddr_reg:x3; val_offset:33117*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33117*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11040: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ffffe0; valaddr_reg:x3; val_offset:33120*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33120*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11041: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fffff0; valaddr_reg:x3; val_offset:33123*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33123*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11042: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fffff8; valaddr_reg:x3; val_offset:33126*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33126*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11043: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fffffc; valaddr_reg:x3; val_offset:33129*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33129*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11044: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1fffffe; valaddr_reg:x3; val_offset:33132*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33132*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11045: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xe3 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xf1ffffff; valaddr_reg:x3; val_offset:33135*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33135*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11046: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff000001; valaddr_reg:x3; val_offset:33138*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33138*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11047: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff000003; valaddr_reg:x3; val_offset:33141*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33141*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11048: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff000007; valaddr_reg:x3; val_offset:33144*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33144*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11049: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff199999; valaddr_reg:x3; val_offset:33147*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33147*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11050: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff249249; valaddr_reg:x3; val_offset:33150*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33150*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11051: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff333333; valaddr_reg:x3; val_offset:33153*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33153*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11052: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:33156*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33156*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11053: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:33159*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33159*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11054: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff444444; valaddr_reg:x3; val_offset:33162*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33162*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11055: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:33165*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33165*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11056: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:33168*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33168*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11057: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff666666; valaddr_reg:x3; val_offset:33171*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33171*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11058: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:33174*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33174*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11059: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:33177*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33177*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11060: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:33180*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33180*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11061: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x571b9d and fs2 == 1 and fe2 == 0x81 and fm2 == 0x185536 and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e571b9d; op2val:0xc0985536; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:33183*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33183*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11062: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91000000; valaddr_reg:x3; val_offset:33186*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33186*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11063: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91000001; valaddr_reg:x3; val_offset:33189*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33189*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11064: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91000003; valaddr_reg:x3; val_offset:33192*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33192*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11065: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91000007; valaddr_reg:x3; val_offset:33195*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33195*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11066: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x9100000f; valaddr_reg:x3; val_offset:33198*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33198*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11067: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x9100001f; valaddr_reg:x3; val_offset:33201*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33201*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11068: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x9100003f; valaddr_reg:x3; val_offset:33204*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33204*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11069: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x9100007f; valaddr_reg:x3; val_offset:33207*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33207*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11070: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x910000ff; valaddr_reg:x3; val_offset:33210*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33210*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11071: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x910001ff; valaddr_reg:x3; val_offset:33213*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33213*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11072: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x910003ff; valaddr_reg:x3; val_offset:33216*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33216*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11073: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x910007ff; valaddr_reg:x3; val_offset:33219*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33219*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11074: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91000fff; valaddr_reg:x3; val_offset:33222*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33222*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11075: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91001fff; valaddr_reg:x3; val_offset:33225*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33225*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11076: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91003fff; valaddr_reg:x3; val_offset:33228*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33228*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11077: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91007fff; valaddr_reg:x3; val_offset:33231*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33231*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11078: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x9100ffff; valaddr_reg:x3; val_offset:33234*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33234*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11079: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x9101ffff; valaddr_reg:x3; val_offset:33237*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33237*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11080: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x9103ffff; valaddr_reg:x3; val_offset:33240*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33240*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11081: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x9107ffff; valaddr_reg:x3; val_offset:33243*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33243*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11082: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x910fffff; valaddr_reg:x3; val_offset:33246*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33246*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11083: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x911fffff; valaddr_reg:x3; val_offset:33249*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33249*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11084: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x913fffff; valaddr_reg:x3; val_offset:33252*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33252*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11085: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91400000; valaddr_reg:x3; val_offset:33255*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33255*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11086: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91600000; valaddr_reg:x3; val_offset:33258*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33258*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11087: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91700000; valaddr_reg:x3; val_offset:33261*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33261*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11088: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x91780000; valaddr_reg:x3; val_offset:33264*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33264*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11089: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917c0000; valaddr_reg:x3; val_offset:33267*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33267*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11090: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917e0000; valaddr_reg:x3; val_offset:33270*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33270*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11091: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917f0000; valaddr_reg:x3; val_offset:33273*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33273*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11092: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917f8000; valaddr_reg:x3; val_offset:33276*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33276*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11093: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917fc000; valaddr_reg:x3; val_offset:33279*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33279*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11094: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917fe000; valaddr_reg:x3; val_offset:33282*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33282*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11095: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917ff000; valaddr_reg:x3; val_offset:33285*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33285*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11096: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917ff800; valaddr_reg:x3; val_offset:33288*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33288*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11097: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917ffc00; valaddr_reg:x3; val_offset:33291*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33291*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11098: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917ffe00; valaddr_reg:x3; val_offset:33294*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33294*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11099: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917fff00; valaddr_reg:x3; val_offset:33297*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33297*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11100: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917fff80; valaddr_reg:x3; val_offset:33300*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33300*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11101: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917fffc0; valaddr_reg:x3; val_offset:33303*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33303*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11102: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917fffe0; valaddr_reg:x3; val_offset:33306*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33306*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11103: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917ffff0; valaddr_reg:x3; val_offset:33309*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33309*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11104: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917ffff8; valaddr_reg:x3; val_offset:33312*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33312*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11105: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917ffffc; valaddr_reg:x3; val_offset:33315*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33315*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11106: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917ffffe; valaddr_reg:x3; val_offset:33318*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33318*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11107: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x22 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0x917fffff; valaddr_reg:x3; val_offset:33321*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33321*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11108: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbf800001; valaddr_reg:x3; val_offset:33324*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33324*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11109: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbf800003; valaddr_reg:x3; val_offset:33327*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33327*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11110: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbf800007; valaddr_reg:x3; val_offset:33330*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33330*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11111: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbf999999; valaddr_reg:x3; val_offset:33333*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33333*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11112: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:33336*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33336*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11113: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:33339*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33339*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11114: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:33342*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33342*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11115: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:33345*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33345*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11116: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:33348*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33348*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11117: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:33351*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33351*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11118: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:33354*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33354*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11119: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:33357*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33357*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11120: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:33360*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33360*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11121: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:33363*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33363*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11122: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:33366*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33366*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11123: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x57b7df and fs2 == 1 and fe2 == 0x01 and fm2 == 0x17e6de and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e57b7df; op2val:0x8097e6de; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:33369*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33369*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11124: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7000000; valaddr_reg:x3; val_offset:33372*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33372*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11125: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7000001; valaddr_reg:x3; val_offset:33375*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33375*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11126: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7000003; valaddr_reg:x3; val_offset:33378*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33378*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11127: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7000007; valaddr_reg:x3; val_offset:33381*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33381*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11128: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf700000f; valaddr_reg:x3; val_offset:33384*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33384*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11129: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf700001f; valaddr_reg:x3; val_offset:33387*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33387*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11130: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf700003f; valaddr_reg:x3; val_offset:33390*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33390*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11131: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf700007f; valaddr_reg:x3; val_offset:33393*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33393*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11132: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf70000ff; valaddr_reg:x3; val_offset:33396*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33396*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11133: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf70001ff; valaddr_reg:x3; val_offset:33399*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33399*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11134: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf70003ff; valaddr_reg:x3; val_offset:33402*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33402*0 + 3*86*FLEN/8, x4, x1, x2) + +inst_11135: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf70007ff; valaddr_reg:x3; val_offset:33405*0 + 3*86*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33405*0 + 3*86*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051697919,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051698175,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051698687,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051699711,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051701759,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051705855,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051714047,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051730431,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051763199,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051828735,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4051959807,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4052221951,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4052746239,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4053794815,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4055891967,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4055891968,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4057989120,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4059037696,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4059561984,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4059824128,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4059955200,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060020736,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060053504,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060069888,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060078080,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060082176,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060084224,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060085248,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060085760,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086016,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086144,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086208,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086240,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086256,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086264,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086268,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086270,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4060086271,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2119637917,32,FLEN) +NAN_BOXED(3231208758,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696320,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696321,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696323,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696327,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696335,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696351,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696383,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696447,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696575,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432696831,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432697343,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432698367,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432700415,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432704511,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432712703,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432729087,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432761855,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432827391,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2432958463,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2433220607,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2433744895,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2434793471,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2436890623,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2436890624,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2438987776,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2440036352,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2440560640,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2440822784,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2440953856,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441019392,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441052160,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441068544,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441076736,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441080832,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441082880,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441083904,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084416,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084672,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084800,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084864,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084896,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084912,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084920,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084924,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084926,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(2441084927,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2119677919,32,FLEN) +NAN_BOXED(2157438686,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972352,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972353,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972355,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972359,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972367,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972383,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972415,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972479,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972607,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143972863,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143973375,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143974399,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-88.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-88.S new file mode 100644 index 000000000..8496891bd --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-88.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_11136: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7000fff; valaddr_reg:x3; val_offset:33408*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33408*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11137: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7001fff; valaddr_reg:x3; val_offset:33411*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33411*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11138: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7003fff; valaddr_reg:x3; val_offset:33414*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33414*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11139: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7007fff; valaddr_reg:x3; val_offset:33417*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33417*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11140: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf700ffff; valaddr_reg:x3; val_offset:33420*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33420*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11141: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf701ffff; valaddr_reg:x3; val_offset:33423*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33423*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11142: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf703ffff; valaddr_reg:x3; val_offset:33426*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33426*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11143: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf707ffff; valaddr_reg:x3; val_offset:33429*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33429*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11144: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf70fffff; valaddr_reg:x3; val_offset:33432*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33432*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11145: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf71fffff; valaddr_reg:x3; val_offset:33435*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33435*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11146: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf73fffff; valaddr_reg:x3; val_offset:33438*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33438*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11147: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7400000; valaddr_reg:x3; val_offset:33441*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33441*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11148: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7600000; valaddr_reg:x3; val_offset:33444*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33444*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11149: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7700000; valaddr_reg:x3; val_offset:33447*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33447*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11150: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf7780000; valaddr_reg:x3; val_offset:33450*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33450*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11151: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77c0000; valaddr_reg:x3; val_offset:33453*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33453*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11152: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77e0000; valaddr_reg:x3; val_offset:33456*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33456*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11153: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77f0000; valaddr_reg:x3; val_offset:33459*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33459*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11154: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77f8000; valaddr_reg:x3; val_offset:33462*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33462*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11155: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77fc000; valaddr_reg:x3; val_offset:33465*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33465*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11156: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77fe000; valaddr_reg:x3; val_offset:33468*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33468*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11157: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77ff000; valaddr_reg:x3; val_offset:33471*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33471*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11158: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77ff800; valaddr_reg:x3; val_offset:33474*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33474*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11159: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77ffc00; valaddr_reg:x3; val_offset:33477*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33477*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11160: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77ffe00; valaddr_reg:x3; val_offset:33480*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33480*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11161: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77fff00; valaddr_reg:x3; val_offset:33483*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33483*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11162: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77fff80; valaddr_reg:x3; val_offset:33486*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33486*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11163: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77fffc0; valaddr_reg:x3; val_offset:33489*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33489*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11164: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77fffe0; valaddr_reg:x3; val_offset:33492*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33492*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11165: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77ffff0; valaddr_reg:x3; val_offset:33495*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33495*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11166: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77ffff8; valaddr_reg:x3; val_offset:33498*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33498*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11167: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77ffffc; valaddr_reg:x3; val_offset:33501*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33501*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11168: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77ffffe; valaddr_reg:x3; val_offset:33504*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33504*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11169: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xee and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xf77fffff; valaddr_reg:x3; val_offset:33507*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33507*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11170: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff000001; valaddr_reg:x3; val_offset:33510*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33510*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11171: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff000003; valaddr_reg:x3; val_offset:33513*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33513*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11172: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff000007; valaddr_reg:x3; val_offset:33516*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33516*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11173: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff199999; valaddr_reg:x3; val_offset:33519*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33519*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11174: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff249249; valaddr_reg:x3; val_offset:33522*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33522*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11175: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff333333; valaddr_reg:x3; val_offset:33525*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33525*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11176: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:33528*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33528*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11177: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:33531*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33531*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11178: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff444444; valaddr_reg:x3; val_offset:33534*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33534*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11179: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:33537*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33537*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11180: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:33540*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33540*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11181: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff666666; valaddr_reg:x3; val_offset:33543*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33543*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11182: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:33546*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33546*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11183: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:33549*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33549*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11184: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:33552*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33552*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11185: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x59a604 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x168dfe and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e59a604; op2val:0xc0968dfe; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:33555*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33555*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11186: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x0; valaddr_reg:x3; val_offset:33558*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33558*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11187: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:33561*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33561*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11188: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:33564*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33564*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11189: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:33567*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33567*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11190: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0xf; valaddr_reg:x3; val_offset:33570*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33570*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11191: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x1f; valaddr_reg:x3; val_offset:33573*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33573*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11192: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x3f; valaddr_reg:x3; val_offset:33576*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33576*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11193: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7f; valaddr_reg:x3; val_offset:33579*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33579*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11194: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0xff; valaddr_reg:x3; val_offset:33582*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33582*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11195: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x1ff; valaddr_reg:x3; val_offset:33585*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33585*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11196: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x3ff; valaddr_reg:x3; val_offset:33588*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33588*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11197: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ff; valaddr_reg:x3; val_offset:33591*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33591*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11198: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0xfff; valaddr_reg:x3; val_offset:33594*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33594*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11199: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x1fff; valaddr_reg:x3; val_offset:33597*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33597*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11200: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x3fff; valaddr_reg:x3; val_offset:33600*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33600*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11201: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7fff; valaddr_reg:x3; val_offset:33603*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33603*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11202: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0xffff; valaddr_reg:x3; val_offset:33606*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33606*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11203: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x1ffff; valaddr_reg:x3; val_offset:33609*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33609*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11204: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x3ffff; valaddr_reg:x3; val_offset:33612*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33612*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11205: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ffff; valaddr_reg:x3; val_offset:33615*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33615*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11206: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0xfffff; valaddr_reg:x3; val_offset:33618*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33618*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11207: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:33621*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33621*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11208: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x1fffff; valaddr_reg:x3; val_offset:33624*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33624*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11209: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:33627*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33627*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11210: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:33630*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33630*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11211: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:33633*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33633*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11212: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:33636*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33636*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11213: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x3fffff; valaddr_reg:x3; val_offset:33639*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33639*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11214: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x400000; valaddr_reg:x3; val_offset:33642*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33642*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11215: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:33645*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33645*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11216: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:33648*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33648*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11217: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:33651*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33651*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11218: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x600000; valaddr_reg:x3; val_offset:33654*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33654*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11219: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:33657*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33657*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11220: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:33660*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33660*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11221: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x700000; valaddr_reg:x3; val_offset:33663*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33663*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11222: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x780000; valaddr_reg:x3; val_offset:33666*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33666*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11223: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7c0000; valaddr_reg:x3; val_offset:33669*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33669*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11224: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7e0000; valaddr_reg:x3; val_offset:33672*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33672*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11225: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7f0000; valaddr_reg:x3; val_offset:33675*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33675*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11226: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7f8000; valaddr_reg:x3; val_offset:33678*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33678*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11227: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7fc000; valaddr_reg:x3; val_offset:33681*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33681*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11228: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7fe000; valaddr_reg:x3; val_offset:33684*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33684*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11229: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ff000; valaddr_reg:x3; val_offset:33687*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33687*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11230: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ff800; valaddr_reg:x3; val_offset:33690*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33690*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11231: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ffc00; valaddr_reg:x3; val_offset:33693*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33693*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11232: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ffe00; valaddr_reg:x3; val_offset:33696*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33696*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11233: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7fff00; valaddr_reg:x3; val_offset:33699*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33699*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11234: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7fff80; valaddr_reg:x3; val_offset:33702*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33702*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11235: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7fffc0; valaddr_reg:x3; val_offset:33705*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33705*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11236: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7fffe0; valaddr_reg:x3; val_offset:33708*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33708*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11237: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ffff0; valaddr_reg:x3; val_offset:33711*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33711*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11238: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:33714*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33714*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11239: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:33717*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33717*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11240: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:33720*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33720*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11241: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e5c14 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e5c14; op2val:0x0; +op3val:0x7fffff; valaddr_reg:x3; val_offset:33723*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33723*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11242: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:33726*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33726*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11243: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:33729*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33729*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11244: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:33732*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33732*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11245: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:33735*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33735*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11246: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:33738*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33738*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11247: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:33741*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33741*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11248: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:33744*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33744*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11249: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:33747*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33747*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11250: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:33750*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33750*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11251: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:33753*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33753*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11252: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:33756*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33756*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11253: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:33759*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33759*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11254: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:33762*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33762*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11255: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:33765*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33765*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11256: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:33768*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33768*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11257: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:33771*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33771*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11258: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84800000; valaddr_reg:x3; val_offset:33774*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33774*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11259: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84800001; valaddr_reg:x3; val_offset:33777*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33777*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11260: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84800003; valaddr_reg:x3; val_offset:33780*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33780*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11261: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84800007; valaddr_reg:x3; val_offset:33783*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33783*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11262: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8480000f; valaddr_reg:x3; val_offset:33786*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33786*0 + 3*87*FLEN/8, x4, x1, x2) + +inst_11263: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8480001f; valaddr_reg:x3; val_offset:33789*0 + 3*87*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33789*0 + 3*87*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143976447,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143980543,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4143988735,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4144005119,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4144037887,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4144103423,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4144234495,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4144496639,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4145020927,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4146069503,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4148166655,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4148166656,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4150263808,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4151312384,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4151836672,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152098816,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152229888,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152295424,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152328192,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152344576,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152352768,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152356864,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152358912,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152359936,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360448,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360704,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360832,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360896,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360928,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360944,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360952,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360956,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360958,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4152360959,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2119804420,32,FLEN) +NAN_BOXED(3231092222,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(15,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(63,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(127,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(255,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(511,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1023,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2047,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4095,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8191,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(16383,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32767,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(65535,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(131071,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(262143,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(524287,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1048575,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2097151,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194303,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4194304,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6291456,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7340032,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7864320,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8126464,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8257536,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8323072,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8355840,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8372224,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8380416,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8384512,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8386560,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8387584,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388096,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388352,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388480,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388544,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388576,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388592,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2120113172,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388607,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981120,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981121,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981123,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981127,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981135,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981151,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-89.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-89.S new file mode 100644 index 000000000..d2a735969 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-89.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_11264: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8480003f; valaddr_reg:x3; val_offset:33792*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33792*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11265: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8480007f; valaddr_reg:x3; val_offset:33795*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33795*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11266: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x848000ff; valaddr_reg:x3; val_offset:33798*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33798*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11267: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x848001ff; valaddr_reg:x3; val_offset:33801*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33801*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11268: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x848003ff; valaddr_reg:x3; val_offset:33804*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33804*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11269: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x848007ff; valaddr_reg:x3; val_offset:33807*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33807*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11270: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84800fff; valaddr_reg:x3; val_offset:33810*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33810*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11271: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84801fff; valaddr_reg:x3; val_offset:33813*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33813*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11272: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84803fff; valaddr_reg:x3; val_offset:33816*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33816*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11273: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84807fff; valaddr_reg:x3; val_offset:33819*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33819*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11274: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8480ffff; valaddr_reg:x3; val_offset:33822*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33822*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11275: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8481ffff; valaddr_reg:x3; val_offset:33825*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33825*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11276: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8483ffff; valaddr_reg:x3; val_offset:33828*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33828*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11277: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x8487ffff; valaddr_reg:x3; val_offset:33831*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33831*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11278: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x848fffff; valaddr_reg:x3; val_offset:33834*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33834*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11279: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x849fffff; valaddr_reg:x3; val_offset:33837*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33837*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11280: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84bfffff; valaddr_reg:x3; val_offset:33840*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33840*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11281: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84c00000; valaddr_reg:x3; val_offset:33843*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33843*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11282: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84e00000; valaddr_reg:x3; val_offset:33846*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33846*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11283: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84f00000; valaddr_reg:x3; val_offset:33849*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33849*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11284: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84f80000; valaddr_reg:x3; val_offset:33852*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33852*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11285: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fc0000; valaddr_reg:x3; val_offset:33855*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33855*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11286: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fe0000; valaddr_reg:x3; val_offset:33858*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33858*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11287: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ff0000; valaddr_reg:x3; val_offset:33861*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33861*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11288: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ff8000; valaddr_reg:x3; val_offset:33864*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33864*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11289: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ffc000; valaddr_reg:x3; val_offset:33867*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33867*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11290: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ffe000; valaddr_reg:x3; val_offset:33870*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33870*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11291: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fff000; valaddr_reg:x3; val_offset:33873*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33873*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11292: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fff800; valaddr_reg:x3; val_offset:33876*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33876*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11293: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fffc00; valaddr_reg:x3; val_offset:33879*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33879*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11294: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fffe00; valaddr_reg:x3; val_offset:33882*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33882*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11295: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ffff00; valaddr_reg:x3; val_offset:33885*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33885*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11296: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ffff80; valaddr_reg:x3; val_offset:33888*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33888*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11297: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ffffc0; valaddr_reg:x3; val_offset:33891*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33891*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11298: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ffffe0; valaddr_reg:x3; val_offset:33894*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33894*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11299: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fffff0; valaddr_reg:x3; val_offset:33897*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33897*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11300: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fffff8; valaddr_reg:x3; val_offset:33900*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33900*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11301: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fffffc; valaddr_reg:x3; val_offset:33903*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33903*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11302: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84fffffe; valaddr_reg:x3; val_offset:33906*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33906*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11303: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7648 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x09 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7648; op2val:0x80000000; +op3val:0x84ffffff; valaddr_reg:x3; val_offset:33909*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33909*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11304: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd800000; valaddr_reg:x3; val_offset:33912*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33912*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11305: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd800001; valaddr_reg:x3; val_offset:33915*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33915*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11306: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd800003; valaddr_reg:x3; val_offset:33918*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33918*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11307: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd800007; valaddr_reg:x3; val_offset:33921*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33921*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11308: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd80000f; valaddr_reg:x3; val_offset:33924*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33924*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11309: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd80001f; valaddr_reg:x3; val_offset:33927*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33927*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11310: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd80003f; valaddr_reg:x3; val_offset:33930*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33930*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11311: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd80007f; valaddr_reg:x3; val_offset:33933*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33933*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11312: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd8000ff; valaddr_reg:x3; val_offset:33936*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33936*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11313: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd8001ff; valaddr_reg:x3; val_offset:33939*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33939*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11314: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd8003ff; valaddr_reg:x3; val_offset:33942*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33942*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11315: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd8007ff; valaddr_reg:x3; val_offset:33945*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33945*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11316: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd800fff; valaddr_reg:x3; val_offset:33948*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33948*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11317: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd801fff; valaddr_reg:x3; val_offset:33951*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33951*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11318: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd803fff; valaddr_reg:x3; val_offset:33954*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33954*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11319: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd807fff; valaddr_reg:x3; val_offset:33957*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33957*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11320: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd80ffff; valaddr_reg:x3; val_offset:33960*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33960*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11321: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd81ffff; valaddr_reg:x3; val_offset:33963*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33963*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11322: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd83ffff; valaddr_reg:x3; val_offset:33966*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33966*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11323: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd87ffff; valaddr_reg:x3; val_offset:33969*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33969*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11324: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd8fffff; valaddr_reg:x3; val_offset:33972*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33972*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11325: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfd9fffff; valaddr_reg:x3; val_offset:33975*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33975*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11326: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdbfffff; valaddr_reg:x3; val_offset:33978*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33978*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11327: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdc00000; valaddr_reg:x3; val_offset:33981*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33981*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11328: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfde00000; valaddr_reg:x3; val_offset:33984*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33984*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11329: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdf00000; valaddr_reg:x3; val_offset:33987*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33987*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11330: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdf80000; valaddr_reg:x3; val_offset:33990*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33990*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11331: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfc0000; valaddr_reg:x3; val_offset:33993*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33993*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11332: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfe0000; valaddr_reg:x3; val_offset:33996*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33996*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11333: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdff0000; valaddr_reg:x3; val_offset:33999*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 33999*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11334: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdff8000; valaddr_reg:x3; val_offset:34002*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34002*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11335: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdffc000; valaddr_reg:x3; val_offset:34005*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34005*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11336: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdffe000; valaddr_reg:x3; val_offset:34008*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34008*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11337: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfff000; valaddr_reg:x3; val_offset:34011*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34011*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11338: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfff800; valaddr_reg:x3; val_offset:34014*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34014*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11339: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfffc00; valaddr_reg:x3; val_offset:34017*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34017*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11340: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfffe00; valaddr_reg:x3; val_offset:34020*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34020*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11341: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdffff00; valaddr_reg:x3; val_offset:34023*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34023*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11342: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdffff80; valaddr_reg:x3; val_offset:34026*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34026*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11343: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdffffc0; valaddr_reg:x3; val_offset:34029*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34029*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11344: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdffffe0; valaddr_reg:x3; val_offset:34032*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34032*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11345: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfffff0; valaddr_reg:x3; val_offset:34035*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34035*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11346: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfffff8; valaddr_reg:x3; val_offset:34038*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34038*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11347: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfffffc; valaddr_reg:x3; val_offset:34041*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34041*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11348: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdfffffe; valaddr_reg:x3; val_offset:34044*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34044*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11349: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfb and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xfdffffff; valaddr_reg:x3; val_offset:34047*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34047*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11350: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff000001; valaddr_reg:x3; val_offset:34050*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34050*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11351: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff000003; valaddr_reg:x3; val_offset:34053*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34053*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11352: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff000007; valaddr_reg:x3; val_offset:34056*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34056*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11353: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff199999; valaddr_reg:x3; val_offset:34059*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34059*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11354: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff249249; valaddr_reg:x3; val_offset:34062*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34062*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11355: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff333333; valaddr_reg:x3; val_offset:34065*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34065*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11356: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:34068*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34068*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11357: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:34071*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34071*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11358: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff444444; valaddr_reg:x3; val_offset:34074*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34074*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11359: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:34077*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34077*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11360: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:34080*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34080*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11361: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff666666; valaddr_reg:x3; val_offset:34083*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34083*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11362: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:34086*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34086*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11363: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:34089*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34089*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11364: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:34092*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34092*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11365: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e7bc0 and fs2 == 1 and fe2 == 0x81 and fm2 == 0x13486b and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e7bc0; op2val:0xc093486b; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:34095*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34095*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11366: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:34098*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34098*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11367: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:34101*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34101*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11368: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:34104*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34104*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11369: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:34107*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34107*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11370: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:34110*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34110*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11371: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:34113*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34113*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11372: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:34116*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34116*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11373: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:34119*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34119*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11374: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:34122*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34122*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11375: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:34125*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34125*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11376: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:34128*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34128*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11377: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:34131*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34131*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11378: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:34134*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34134*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11379: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:34137*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34137*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11380: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:34140*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34140*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11381: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:34143*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34143*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11382: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80800000; valaddr_reg:x3; val_offset:34146*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34146*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11383: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:34149*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34149*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11384: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:34152*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34152*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11385: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:34155*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34155*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11386: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8080000f; valaddr_reg:x3; val_offset:34158*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34158*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11387: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8080001f; valaddr_reg:x3; val_offset:34161*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34161*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11388: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8080003f; valaddr_reg:x3; val_offset:34164*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34164*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11389: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8080007f; valaddr_reg:x3; val_offset:34167*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34167*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11390: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x808000ff; valaddr_reg:x3; val_offset:34170*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34170*0 + 3*88*FLEN/8, x4, x1, x2) + +inst_11391: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x808001ff; valaddr_reg:x3; val_offset:34173*0 + 3*88*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34173*0 + 3*88*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981183,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981247,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981375,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222981631,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222982143,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222983167,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222985215,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222989311,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2222997503,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223013887,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223046655,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223112191,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223243263,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2223505407,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2224029695,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2225078271,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2227175423,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2227175424,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2229272576,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2230321152,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2230845440,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231107584,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231238656,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231304192,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231336960,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231353344,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231361536,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231365632,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231367680,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231368704,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369216,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369472,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369600,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369664,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369696,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369712,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369720,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369724,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369726,32,FLEN) +NAN_BOXED(2120119880,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2231369727,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024256,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024257,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024259,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024263,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024271,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024287,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024319,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024383,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024511,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253024767,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253025279,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253026303,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253028351,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253032447,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253040639,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253057023,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253089791,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253155327,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253286399,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4253548543,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4254072831,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4255121407,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4257218559,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4257218560,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4259315712,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4260364288,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4260888576,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261150720,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261281792,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261347328,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261380096,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261396480,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261404672,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261408768,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261410816,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261411840,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412352,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412608,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412736,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412800,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412832,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412848,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412856,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412860,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412862,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4261412863,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2120121280,32,FLEN) +NAN_BOXED(3230877803,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872256,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872271,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872287,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872319,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872383,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872511,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872767,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-90.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-90.S new file mode 100644 index 000000000..8ec96a17a --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-90.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_11392: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x808003ff; valaddr_reg:x3; val_offset:34176*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34176*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11393: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x808007ff; valaddr_reg:x3; val_offset:34179*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34179*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11394: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80800fff; valaddr_reg:x3; val_offset:34182*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34182*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11395: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80801fff; valaddr_reg:x3; val_offset:34185*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34185*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11396: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80803fff; valaddr_reg:x3; val_offset:34188*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34188*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11397: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80807fff; valaddr_reg:x3; val_offset:34191*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34191*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11398: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8080ffff; valaddr_reg:x3; val_offset:34194*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34194*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11399: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8081ffff; valaddr_reg:x3; val_offset:34197*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34197*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11400: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8083ffff; valaddr_reg:x3; val_offset:34200*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34200*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11401: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x8087ffff; valaddr_reg:x3; val_offset:34203*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34203*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11402: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x808fffff; valaddr_reg:x3; val_offset:34206*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34206*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11403: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x809fffff; valaddr_reg:x3; val_offset:34209*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34209*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11404: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80bfffff; valaddr_reg:x3; val_offset:34212*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34212*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11405: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80c00000; valaddr_reg:x3; val_offset:34215*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34215*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11406: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80e00000; valaddr_reg:x3; val_offset:34218*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34218*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11407: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80f00000; valaddr_reg:x3; val_offset:34221*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34221*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11408: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80f80000; valaddr_reg:x3; val_offset:34224*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34224*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11409: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fc0000; valaddr_reg:x3; val_offset:34227*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34227*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11410: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fe0000; valaddr_reg:x3; val_offset:34230*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34230*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11411: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ff0000; valaddr_reg:x3; val_offset:34233*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34233*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11412: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ff8000; valaddr_reg:x3; val_offset:34236*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34236*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11413: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ffc000; valaddr_reg:x3; val_offset:34239*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34239*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11414: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ffe000; valaddr_reg:x3; val_offset:34242*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34242*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11415: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fff000; valaddr_reg:x3; val_offset:34245*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34245*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11416: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fff800; valaddr_reg:x3; val_offset:34248*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34248*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11417: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fffc00; valaddr_reg:x3; val_offset:34251*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34251*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11418: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fffe00; valaddr_reg:x3; val_offset:34254*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34254*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11419: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ffff00; valaddr_reg:x3; val_offset:34257*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34257*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11420: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ffff80; valaddr_reg:x3; val_offset:34260*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34260*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11421: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ffffc0; valaddr_reg:x3; val_offset:34263*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34263*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11422: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ffffe0; valaddr_reg:x3; val_offset:34266*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34266*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11423: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fffff0; valaddr_reg:x3; val_offset:34269*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34269*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11424: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:34272*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34272*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11425: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:34275*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34275*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11426: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:34278*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34278*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11427: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5e9516 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5e9516; op2val:0x80000000; +op3val:0x80ffffff; valaddr_reg:x3; val_offset:34281*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34281*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11428: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:34284*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34284*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11429: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:34287*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34287*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11430: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:34290*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34290*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11431: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:34293*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34293*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11432: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:34296*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34296*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11433: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:34299*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34299*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11434: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:34302*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34302*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11435: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:34305*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34305*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11436: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:34308*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34308*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11437: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:34311*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34311*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11438: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:34314*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34314*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11439: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:34317*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34317*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11440: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:34320*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34320*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11441: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:34323*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34323*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11442: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:34326*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34326*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11443: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:34329*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34329*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11444: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f800000; valaddr_reg:x3; val_offset:34332*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34332*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11445: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f800001; valaddr_reg:x3; val_offset:34335*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34335*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11446: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f800003; valaddr_reg:x3; val_offset:34338*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34338*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11447: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f800007; valaddr_reg:x3; val_offset:34341*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34341*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11448: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f80000f; valaddr_reg:x3; val_offset:34344*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34344*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11449: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f80001f; valaddr_reg:x3; val_offset:34347*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34347*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11450: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f80003f; valaddr_reg:x3; val_offset:34350*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34350*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11451: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f80007f; valaddr_reg:x3; val_offset:34353*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34353*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11452: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f8000ff; valaddr_reg:x3; val_offset:34356*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34356*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11453: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f8001ff; valaddr_reg:x3; val_offset:34359*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34359*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11454: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f8003ff; valaddr_reg:x3; val_offset:34362*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34362*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11455: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f8007ff; valaddr_reg:x3; val_offset:34365*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34365*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11456: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f800fff; valaddr_reg:x3; val_offset:34368*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34368*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11457: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f801fff; valaddr_reg:x3; val_offset:34371*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34371*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11458: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f803fff; valaddr_reg:x3; val_offset:34374*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34374*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11459: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f807fff; valaddr_reg:x3; val_offset:34377*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34377*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11460: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f80ffff; valaddr_reg:x3; val_offset:34380*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34380*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11461: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f81ffff; valaddr_reg:x3; val_offset:34383*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34383*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11462: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f83ffff; valaddr_reg:x3; val_offset:34386*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34386*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11463: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f87ffff; valaddr_reg:x3; val_offset:34389*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34389*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11464: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f8fffff; valaddr_reg:x3; val_offset:34392*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34392*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11465: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8f9fffff; valaddr_reg:x3; val_offset:34395*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34395*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11466: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fbfffff; valaddr_reg:x3; val_offset:34398*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34398*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11467: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fc00000; valaddr_reg:x3; val_offset:34401*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34401*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11468: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fe00000; valaddr_reg:x3; val_offset:34404*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34404*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11469: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ff00000; valaddr_reg:x3; val_offset:34407*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34407*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11470: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ff80000; valaddr_reg:x3; val_offset:34410*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34410*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11471: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffc0000; valaddr_reg:x3; val_offset:34413*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34413*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11472: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffe0000; valaddr_reg:x3; val_offset:34416*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34416*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11473: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fff0000; valaddr_reg:x3; val_offset:34419*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34419*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11474: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fff8000; valaddr_reg:x3; val_offset:34422*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34422*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11475: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fffc000; valaddr_reg:x3; val_offset:34425*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34425*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11476: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fffe000; valaddr_reg:x3; val_offset:34428*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34428*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11477: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffff000; valaddr_reg:x3; val_offset:34431*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34431*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11478: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffff800; valaddr_reg:x3; val_offset:34434*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34434*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11479: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffffc00; valaddr_reg:x3; val_offset:34437*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34437*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11480: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffffe00; valaddr_reg:x3; val_offset:34440*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34440*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11481: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fffff00; valaddr_reg:x3; val_offset:34443*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34443*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11482: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fffff80; valaddr_reg:x3; val_offset:34446*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34446*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11483: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fffffc0; valaddr_reg:x3; val_offset:34449*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34449*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11484: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fffffe0; valaddr_reg:x3; val_offset:34452*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34452*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11485: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffffff0; valaddr_reg:x3; val_offset:34455*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34455*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11486: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffffff8; valaddr_reg:x3; val_offset:34458*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34458*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11487: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffffffc; valaddr_reg:x3; val_offset:34461*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34461*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11488: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8ffffffe; valaddr_reg:x3; val_offset:34464*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34464*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11489: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5ef919 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x1f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5ef919; op2val:0x80000000; +op3val:0x8fffffff; valaddr_reg:x3; val_offset:34467*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34467*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11490: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbf800001; valaddr_reg:x3; val_offset:34470*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34470*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11491: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbf800003; valaddr_reg:x3; val_offset:34473*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34473*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11492: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbf800007; valaddr_reg:x3; val_offset:34476*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34476*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11493: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbf999999; valaddr_reg:x3; val_offset:34479*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34479*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11494: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:34482*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34482*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11495: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:34485*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34485*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11496: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:34488*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34488*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11497: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:34491*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34491*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11498: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:34494*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34494*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11499: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:34497*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34497*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11500: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:34500*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34500*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11501: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:34503*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34503*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11502: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:34506*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34506*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11503: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:34509*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34509*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11504: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:34512*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34512*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11505: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:34515*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34515*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11506: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc000000; valaddr_reg:x3; val_offset:34518*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34518*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11507: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc000001; valaddr_reg:x3; val_offset:34521*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34521*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11508: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc000003; valaddr_reg:x3; val_offset:34524*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34524*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11509: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc000007; valaddr_reg:x3; val_offset:34527*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34527*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11510: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc00000f; valaddr_reg:x3; val_offset:34530*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34530*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11511: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc00001f; valaddr_reg:x3; val_offset:34533*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34533*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11512: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc00003f; valaddr_reg:x3; val_offset:34536*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34536*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11513: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc00007f; valaddr_reg:x3; val_offset:34539*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34539*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11514: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc0000ff; valaddr_reg:x3; val_offset:34542*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34542*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11515: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc0001ff; valaddr_reg:x3; val_offset:34545*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34545*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11516: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc0003ff; valaddr_reg:x3; val_offset:34548*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34548*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11517: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc0007ff; valaddr_reg:x3; val_offset:34551*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34551*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11518: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc000fff; valaddr_reg:x3; val_offset:34554*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34554*0 + 3*89*FLEN/8, x4, x1, x2) + +inst_11519: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc001fff; valaddr_reg:x3; val_offset:34557*0 + 3*89*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34557*0 + 3*89*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155873279,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155874303,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155876351,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155880447,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155888639,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155905023,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155937791,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156003327,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156134399,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156396543,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2156920831,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157969407,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160066559,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160066560,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162163712,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163212288,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163736576,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163998720,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164129792,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164195328,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164228096,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164244480,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164252672,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164256768,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164258816,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164259840,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260352,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260608,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260736,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260800,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260832,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260848,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2120127766,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260863,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530496,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530497,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530499,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530503,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530511,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530527,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530559,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530623,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407530751,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407531007,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407531519,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407532543,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407534591,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407538687,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407546879,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407563263,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407596031,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407661567,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2407792639,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2408054783,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2408579071,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2409627647,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2411724799,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2411724800,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2413821952,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2414870528,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415394816,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415656960,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415788032,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415853568,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415886336,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415902720,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415910912,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415915008,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415917056,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918080,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918592,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918848,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415918976,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919040,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919072,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919088,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919096,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919100,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919102,32,FLEN) +NAN_BOXED(2120153369,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2415919103,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552064,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552065,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552067,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552071,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552079,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552095,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552127,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552191,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552319,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422552575,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422553087,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422554111,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422556159,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422560255,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-91.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-91.S new file mode 100644 index 000000000..bf9f4b15d --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-91.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_11520: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc003fff; valaddr_reg:x3; val_offset:34560*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34560*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11521: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc007fff; valaddr_reg:x3; val_offset:34563*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34563*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11522: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc00ffff; valaddr_reg:x3; val_offset:34566*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34566*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11523: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc01ffff; valaddr_reg:x3; val_offset:34569*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34569*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11524: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc03ffff; valaddr_reg:x3; val_offset:34572*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34572*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11525: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc07ffff; valaddr_reg:x3; val_offset:34575*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34575*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11526: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc0fffff; valaddr_reg:x3; val_offset:34578*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34578*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11527: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc1fffff; valaddr_reg:x3; val_offset:34581*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34581*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11528: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc3fffff; valaddr_reg:x3; val_offset:34584*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34584*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11529: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc400000; valaddr_reg:x3; val_offset:34587*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34587*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11530: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc600000; valaddr_reg:x3; val_offset:34590*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34590*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11531: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc700000; valaddr_reg:x3; val_offset:34593*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34593*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11532: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc780000; valaddr_reg:x3; val_offset:34596*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34596*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11533: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7c0000; valaddr_reg:x3; val_offset:34599*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34599*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11534: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7e0000; valaddr_reg:x3; val_offset:34602*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34602*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11535: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7f0000; valaddr_reg:x3; val_offset:34605*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34605*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11536: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7f8000; valaddr_reg:x3; val_offset:34608*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34608*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11537: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7fc000; valaddr_reg:x3; val_offset:34611*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34611*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11538: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7fe000; valaddr_reg:x3; val_offset:34614*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34614*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11539: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7ff000; valaddr_reg:x3; val_offset:34617*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34617*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11540: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7ff800; valaddr_reg:x3; val_offset:34620*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34620*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11541: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7ffc00; valaddr_reg:x3; val_offset:34623*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34623*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11542: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7ffe00; valaddr_reg:x3; val_offset:34626*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34626*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11543: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7fff00; valaddr_reg:x3; val_offset:34629*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34629*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11544: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7fff80; valaddr_reg:x3; val_offset:34632*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34632*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11545: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7fffc0; valaddr_reg:x3; val_offset:34635*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34635*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11546: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7fffe0; valaddr_reg:x3; val_offset:34638*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34638*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11547: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7ffff0; valaddr_reg:x3; val_offset:34641*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34641*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11548: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7ffff8; valaddr_reg:x3; val_offset:34644*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34644*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11549: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7ffffc; valaddr_reg:x3; val_offset:34647*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34647*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11550: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7ffffe; valaddr_reg:x3; val_offset:34650*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34650*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11551: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x5f83e7 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x129a5c and fs3 == 1 and fe3 == 0x98 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e5f83e7; op2val:0x80929a5c; +op3val:0xcc7fffff; valaddr_reg:x3; val_offset:34653*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34653*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11552: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69000000; valaddr_reg:x3; val_offset:34656*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34656*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11553: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69000001; valaddr_reg:x3; val_offset:34659*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34659*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11554: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69000003; valaddr_reg:x3; val_offset:34662*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34662*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11555: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69000007; valaddr_reg:x3; val_offset:34665*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34665*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11556: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x6900000f; valaddr_reg:x3; val_offset:34668*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34668*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11557: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x6900001f; valaddr_reg:x3; val_offset:34671*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34671*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11558: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x6900003f; valaddr_reg:x3; val_offset:34674*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34674*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11559: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x6900007f; valaddr_reg:x3; val_offset:34677*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34677*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11560: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x690000ff; valaddr_reg:x3; val_offset:34680*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34680*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11561: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x690001ff; valaddr_reg:x3; val_offset:34683*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34683*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11562: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x690003ff; valaddr_reg:x3; val_offset:34686*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34686*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11563: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x690007ff; valaddr_reg:x3; val_offset:34689*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34689*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11564: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69000fff; valaddr_reg:x3; val_offset:34692*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34692*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11565: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69001fff; valaddr_reg:x3; val_offset:34695*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34695*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11566: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69003fff; valaddr_reg:x3; val_offset:34698*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34698*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11567: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69007fff; valaddr_reg:x3; val_offset:34701*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34701*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11568: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x6900ffff; valaddr_reg:x3; val_offset:34704*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34704*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11569: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x6901ffff; valaddr_reg:x3; val_offset:34707*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34707*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11570: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x6903ffff; valaddr_reg:x3; val_offset:34710*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34710*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11571: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x6907ffff; valaddr_reg:x3; val_offset:34713*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34713*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11572: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x690fffff; valaddr_reg:x3; val_offset:34716*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34716*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11573: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x691fffff; valaddr_reg:x3; val_offset:34719*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34719*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11574: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x693fffff; valaddr_reg:x3; val_offset:34722*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34722*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11575: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69400000; valaddr_reg:x3; val_offset:34725*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34725*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11576: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69600000; valaddr_reg:x3; val_offset:34728*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34728*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11577: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69700000; valaddr_reg:x3; val_offset:34731*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34731*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11578: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x69780000; valaddr_reg:x3; val_offset:34734*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34734*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11579: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697c0000; valaddr_reg:x3; val_offset:34737*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34737*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11580: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697e0000; valaddr_reg:x3; val_offset:34740*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34740*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11581: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697f0000; valaddr_reg:x3; val_offset:34743*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34743*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11582: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697f8000; valaddr_reg:x3; val_offset:34746*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34746*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11583: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697fc000; valaddr_reg:x3; val_offset:34749*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34749*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11584: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697fe000; valaddr_reg:x3; val_offset:34752*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34752*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11585: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697ff000; valaddr_reg:x3; val_offset:34755*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34755*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11586: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697ff800; valaddr_reg:x3; val_offset:34758*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34758*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11587: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697ffc00; valaddr_reg:x3; val_offset:34761*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34761*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11588: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697ffe00; valaddr_reg:x3; val_offset:34764*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34764*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11589: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697fff00; valaddr_reg:x3; val_offset:34767*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34767*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11590: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697fff80; valaddr_reg:x3; val_offset:34770*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34770*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11591: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697fffc0; valaddr_reg:x3; val_offset:34773*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34773*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11592: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697fffe0; valaddr_reg:x3; val_offset:34776*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34776*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11593: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697ffff0; valaddr_reg:x3; val_offset:34779*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34779*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11594: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697ffff8; valaddr_reg:x3; val_offset:34782*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34782*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11595: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697ffffc; valaddr_reg:x3; val_offset:34785*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34785*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11596: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697ffffe; valaddr_reg:x3; val_offset:34788*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34788*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11597: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xd2 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x697fffff; valaddr_reg:x3; val_offset:34791*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34791*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11598: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f000001; valaddr_reg:x3; val_offset:34794*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34794*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11599: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f000003; valaddr_reg:x3; val_offset:34797*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34797*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11600: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f000007; valaddr_reg:x3; val_offset:34800*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34800*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11601: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f199999; valaddr_reg:x3; val_offset:34803*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34803*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11602: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f249249; valaddr_reg:x3; val_offset:34806*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34806*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11603: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f333333; valaddr_reg:x3; val_offset:34809*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34809*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11604: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:34812*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34812*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11605: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:34815*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34815*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11606: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f444444; valaddr_reg:x3; val_offset:34818*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34818*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11607: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:34821*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34821*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11608: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:34824*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34824*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11609: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f666666; valaddr_reg:x3; val_offset:34827*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34827*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11610: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:34830*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34830*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11611: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:34833*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34833*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11612: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:34836*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34836*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11613: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6139d7 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x117d4c and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6139d7; op2val:0x40917d4c; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:34839*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34839*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11614: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0000000; valaddr_reg:x3; val_offset:34842*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34842*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11615: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0000001; valaddr_reg:x3; val_offset:34845*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34845*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11616: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0000003; valaddr_reg:x3; val_offset:34848*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34848*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11617: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0000007; valaddr_reg:x3; val_offset:34851*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34851*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11618: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe000000f; valaddr_reg:x3; val_offset:34854*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34854*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11619: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe000001f; valaddr_reg:x3; val_offset:34857*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34857*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11620: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe000003f; valaddr_reg:x3; val_offset:34860*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34860*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11621: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe000007f; valaddr_reg:x3; val_offset:34863*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34863*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11622: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe00000ff; valaddr_reg:x3; val_offset:34866*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34866*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11623: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe00001ff; valaddr_reg:x3; val_offset:34869*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34869*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11624: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe00003ff; valaddr_reg:x3; val_offset:34872*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34872*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11625: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe00007ff; valaddr_reg:x3; val_offset:34875*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34875*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11626: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0000fff; valaddr_reg:x3; val_offset:34878*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34878*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11627: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0001fff; valaddr_reg:x3; val_offset:34881*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34881*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11628: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0003fff; valaddr_reg:x3; val_offset:34884*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34884*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11629: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0007fff; valaddr_reg:x3; val_offset:34887*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34887*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11630: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe000ffff; valaddr_reg:x3; val_offset:34890*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34890*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11631: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe001ffff; valaddr_reg:x3; val_offset:34893*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34893*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11632: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe003ffff; valaddr_reg:x3; val_offset:34896*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34896*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11633: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe007ffff; valaddr_reg:x3; val_offset:34899*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34899*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11634: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe00fffff; valaddr_reg:x3; val_offset:34902*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34902*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11635: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe01fffff; valaddr_reg:x3; val_offset:34905*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34905*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11636: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe03fffff; valaddr_reg:x3; val_offset:34908*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34908*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11637: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0400000; valaddr_reg:x3; val_offset:34911*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34911*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11638: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0600000; valaddr_reg:x3; val_offset:34914*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34914*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11639: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0700000; valaddr_reg:x3; val_offset:34917*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34917*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11640: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe0780000; valaddr_reg:x3; val_offset:34920*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34920*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11641: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07c0000; valaddr_reg:x3; val_offset:34923*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34923*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11642: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07e0000; valaddr_reg:x3; val_offset:34926*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34926*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11643: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07f0000; valaddr_reg:x3; val_offset:34929*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34929*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11644: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07f8000; valaddr_reg:x3; val_offset:34932*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34932*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11645: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07fc000; valaddr_reg:x3; val_offset:34935*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34935*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11646: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07fe000; valaddr_reg:x3; val_offset:34938*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34938*0 + 3*90*FLEN/8, x4, x1, x2) + +inst_11647: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07ff000; valaddr_reg:x3; val_offset:34941*0 + 3*90*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34941*0 + 3*90*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422568447,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422584831,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422617599,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422683135,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3422814207,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3423076351,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3423600639,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3424649215,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3426746367,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3426746368,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3428843520,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3429892096,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430416384,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430678528,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430809600,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430875136,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430907904,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430924288,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430932480,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430936576,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430938624,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430939648,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940160,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940416,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940544,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940608,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940640,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940656,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940664,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940668,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940670,32,FLEN) +NAN_BOXED(2120188903,32,FLEN) +NAN_BOXED(2157091420,32,FLEN) +NAN_BOXED(3430940671,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607680,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607681,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607683,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607687,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607695,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607711,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607743,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607807,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761607935,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761608191,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761608703,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761609727,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761611775,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761615871,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761624063,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761640447,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761673215,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761738751,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1761869823,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1762131967,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1762656255,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1763704831,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1765801983,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1765801984,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1767899136,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1768947712,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769472000,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769734144,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769865216,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769930752,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769963520,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769979904,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769988096,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769992192,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769994240,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769995264,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769995776,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996032,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996160,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996224,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996256,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996272,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996280,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996284,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996286,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(1769996287,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2120301015,32,FLEN) +NAN_BOXED(1083276620,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096384,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096385,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096387,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096391,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096399,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096415,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096447,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096511,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096639,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758096895,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758097407,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758098431,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758100479,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758104575,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758112767,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758129151,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758161919,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758227455,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758358527,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3758620671,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3759144959,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3760193535,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3762290687,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3762290688,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3764387840,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3765436416,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3765960704,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766222848,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766353920,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766419456,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766452224,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766468608,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766476800,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766480896,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-92.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-92.S new file mode 100644 index 000000000..31feb30c5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-92.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_11648: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07ff800; valaddr_reg:x3; val_offset:34944*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34944*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11649: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07ffc00; valaddr_reg:x3; val_offset:34947*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34947*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11650: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07ffe00; valaddr_reg:x3; val_offset:34950*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34950*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11651: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07fff00; valaddr_reg:x3; val_offset:34953*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34953*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11652: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07fff80; valaddr_reg:x3; val_offset:34956*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34956*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11653: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07fffc0; valaddr_reg:x3; val_offset:34959*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34959*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11654: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07fffe0; valaddr_reg:x3; val_offset:34962*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34962*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11655: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07ffff0; valaddr_reg:x3; val_offset:34965*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34965*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11656: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07ffff8; valaddr_reg:x3; val_offset:34968*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34968*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11657: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07ffffc; valaddr_reg:x3; val_offset:34971*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34971*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11658: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07ffffe; valaddr_reg:x3; val_offset:34974*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34974*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11659: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xc0 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xe07fffff; valaddr_reg:x3; val_offset:34977*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34977*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11660: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff000001; valaddr_reg:x3; val_offset:34980*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34980*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11661: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff000003; valaddr_reg:x3; val_offset:34983*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34983*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11662: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff000007; valaddr_reg:x3; val_offset:34986*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34986*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11663: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff199999; valaddr_reg:x3; val_offset:34989*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34989*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11664: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff249249; valaddr_reg:x3; val_offset:34992*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34992*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11665: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff333333; valaddr_reg:x3; val_offset:34995*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34995*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11666: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:34998*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 34998*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11667: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:35001*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35001*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11668: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff444444; valaddr_reg:x3; val_offset:35004*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35004*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11669: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:35007*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35007*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11670: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:35010*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35010*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11671: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff666666; valaddr_reg:x3; val_offset:35013*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35013*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11672: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:35016*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35016*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11673: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:35019*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35019*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11674: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:35022*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35022*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11675: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x61436a and fs2 == 1 and fe2 == 0x81 and fm2 == 0x11771d and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e61436a; op2val:0xc091771d; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:35025*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35025*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11676: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:35028*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35028*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11677: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:35031*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35031*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11678: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:35034*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35034*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11679: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:35037*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35037*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11680: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:35040*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35040*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11681: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:35043*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35043*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11682: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:35046*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35046*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11683: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:35049*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35049*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11684: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:35052*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35052*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11685: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:35055*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35055*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11686: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:35058*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35058*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11687: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:35061*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35061*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11688: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:35064*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35064*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11689: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:35067*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35067*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11690: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:35070*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35070*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11691: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:35073*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35073*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11692: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1800000; valaddr_reg:x3; val_offset:35076*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35076*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11693: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1800001; valaddr_reg:x3; val_offset:35079*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35079*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11694: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1800003; valaddr_reg:x3; val_offset:35082*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35082*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11695: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1800007; valaddr_reg:x3; val_offset:35085*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35085*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11696: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x180000f; valaddr_reg:x3; val_offset:35088*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35088*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11697: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x180001f; valaddr_reg:x3; val_offset:35091*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35091*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11698: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x180003f; valaddr_reg:x3; val_offset:35094*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35094*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11699: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x180007f; valaddr_reg:x3; val_offset:35097*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35097*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11700: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x18000ff; valaddr_reg:x3; val_offset:35100*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35100*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11701: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x18001ff; valaddr_reg:x3; val_offset:35103*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35103*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11702: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x18003ff; valaddr_reg:x3; val_offset:35106*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35106*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11703: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x18007ff; valaddr_reg:x3; val_offset:35109*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35109*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11704: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1800fff; valaddr_reg:x3; val_offset:35112*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35112*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11705: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1801fff; valaddr_reg:x3; val_offset:35115*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35115*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11706: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1803fff; valaddr_reg:x3; val_offset:35118*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35118*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11707: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1807fff; valaddr_reg:x3; val_offset:35121*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35121*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11708: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x180ffff; valaddr_reg:x3; val_offset:35124*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35124*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11709: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x181ffff; valaddr_reg:x3; val_offset:35127*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35127*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11710: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x183ffff; valaddr_reg:x3; val_offset:35130*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35130*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11711: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x187ffff; valaddr_reg:x3; val_offset:35133*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35133*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11712: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x18fffff; valaddr_reg:x3; val_offset:35136*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35136*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11713: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x19fffff; valaddr_reg:x3; val_offset:35139*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35139*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11714: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1bfffff; valaddr_reg:x3; val_offset:35142*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35142*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11715: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1c00000; valaddr_reg:x3; val_offset:35145*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35145*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11716: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1e00000; valaddr_reg:x3; val_offset:35148*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35148*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11717: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1f00000; valaddr_reg:x3; val_offset:35151*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35151*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11718: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1f80000; valaddr_reg:x3; val_offset:35154*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35154*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11719: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fc0000; valaddr_reg:x3; val_offset:35157*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35157*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11720: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fe0000; valaddr_reg:x3; val_offset:35160*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35160*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11721: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ff0000; valaddr_reg:x3; val_offset:35163*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35163*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11722: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ff8000; valaddr_reg:x3; val_offset:35166*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35166*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11723: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ffc000; valaddr_reg:x3; val_offset:35169*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35169*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11724: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ffe000; valaddr_reg:x3; val_offset:35172*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35172*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11725: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fff000; valaddr_reg:x3; val_offset:35175*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35175*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11726: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fff800; valaddr_reg:x3; val_offset:35178*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35178*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11727: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fffc00; valaddr_reg:x3; val_offset:35181*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35181*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11728: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fffe00; valaddr_reg:x3; val_offset:35184*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35184*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11729: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ffff00; valaddr_reg:x3; val_offset:35187*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35187*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11730: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ffff80; valaddr_reg:x3; val_offset:35190*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35190*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11731: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ffffc0; valaddr_reg:x3; val_offset:35193*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35193*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11732: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ffffe0; valaddr_reg:x3; val_offset:35196*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35196*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11733: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fffff0; valaddr_reg:x3; val_offset:35199*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35199*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11734: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fffff8; valaddr_reg:x3; val_offset:35202*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35202*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11735: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fffffc; valaddr_reg:x3; val_offset:35205*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35205*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11736: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1fffffe; valaddr_reg:x3; val_offset:35208*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35208*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11737: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x615629 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x03 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e615629; op2val:0x0; +op3val:0x1ffffff; valaddr_reg:x3; val_offset:35211*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35211*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11738: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f800000; valaddr_reg:x3; val_offset:35214*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35214*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11739: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f800001; valaddr_reg:x3; val_offset:35217*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35217*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11740: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f800003; valaddr_reg:x3; val_offset:35220*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35220*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11741: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f800007; valaddr_reg:x3; val_offset:35223*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35223*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11742: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f80000f; valaddr_reg:x3; val_offset:35226*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35226*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11743: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f80001f; valaddr_reg:x3; val_offset:35229*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35229*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11744: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f80003f; valaddr_reg:x3; val_offset:35232*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35232*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11745: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f80007f; valaddr_reg:x3; val_offset:35235*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35235*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11746: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f8000ff; valaddr_reg:x3; val_offset:35238*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35238*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11747: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f8001ff; valaddr_reg:x3; val_offset:35241*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35241*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11748: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f8003ff; valaddr_reg:x3; val_offset:35244*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35244*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11749: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f8007ff; valaddr_reg:x3; val_offset:35247*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35247*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11750: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f800fff; valaddr_reg:x3; val_offset:35250*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35250*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11751: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f801fff; valaddr_reg:x3; val_offset:35253*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35253*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11752: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f803fff; valaddr_reg:x3; val_offset:35256*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35256*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11753: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f807fff; valaddr_reg:x3; val_offset:35259*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35259*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11754: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f80ffff; valaddr_reg:x3; val_offset:35262*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35262*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11755: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f81ffff; valaddr_reg:x3; val_offset:35265*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35265*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11756: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f83ffff; valaddr_reg:x3; val_offset:35268*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35268*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11757: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f87ffff; valaddr_reg:x3; val_offset:35271*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35271*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11758: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f8fffff; valaddr_reg:x3; val_offset:35274*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35274*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11759: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6f9fffff; valaddr_reg:x3; val_offset:35277*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35277*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11760: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fbfffff; valaddr_reg:x3; val_offset:35280*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35280*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11761: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fc00000; valaddr_reg:x3; val_offset:35283*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35283*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11762: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fe00000; valaddr_reg:x3; val_offset:35286*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35286*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11763: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ff00000; valaddr_reg:x3; val_offset:35289*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35289*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11764: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ff80000; valaddr_reg:x3; val_offset:35292*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35292*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11765: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffc0000; valaddr_reg:x3; val_offset:35295*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35295*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11766: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffe0000; valaddr_reg:x3; val_offset:35298*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35298*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11767: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fff0000; valaddr_reg:x3; val_offset:35301*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35301*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11768: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fff8000; valaddr_reg:x3; val_offset:35304*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35304*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11769: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fffc000; valaddr_reg:x3; val_offset:35307*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35307*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11770: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fffe000; valaddr_reg:x3; val_offset:35310*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35310*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11771: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffff000; valaddr_reg:x3; val_offset:35313*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35313*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11772: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffff800; valaddr_reg:x3; val_offset:35316*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35316*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11773: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffffc00; valaddr_reg:x3; val_offset:35319*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35319*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11774: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffffe00; valaddr_reg:x3; val_offset:35322*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35322*0 + 3*91*FLEN/8, x4, x1, x2) + +inst_11775: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fffff00; valaddr_reg:x3; val_offset:35325*0 + 3*91*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35325*0 + 3*91*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766482944,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766483968,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484480,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484736,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484864,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484928,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484960,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484976,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484984,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484988,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484990,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(3766484991,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2120303466,32,FLEN) +NAN_BOXED(3230758685,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165824,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165825,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165827,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165831,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165839,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165855,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165887,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25165951,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166079,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166335,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25166847,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25167871,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25169919,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25174015,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25182207,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25198591,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25231359,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25296895,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25427967,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(25690111,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(26214399,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(27262975,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(29360127,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(29360128,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(31457280,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(32505856,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33030144,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33292288,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33423360,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33488896,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33521664,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33538048,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33546240,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33550336,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33552384,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33553408,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33553920,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554176,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554304,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554368,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554400,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554416,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554424,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554428,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554430,32,FLEN) +NAN_BOXED(2120308265,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(33554431,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659584,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659585,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659587,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659591,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659599,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659615,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659647,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659711,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870659839,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870660095,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870660607,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870661631,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870663679,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870667775,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870675967,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870692351,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870725119,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870790655,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1870921727,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1871183871,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1871708159,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1872756735,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1874853887,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1874853888,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1876951040,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1877999616,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1878523904,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1878786048,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1878917120,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1878982656,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879015424,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879031808,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879040000,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879044096,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879046144,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879047168,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879047680,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879047936,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-93.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-93.S new file mode 100644 index 000000000..6bf5578e9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-93.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_11776: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fffff80; valaddr_reg:x3; val_offset:35328*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35328*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11777: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fffffc0; valaddr_reg:x3; val_offset:35331*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35331*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11778: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fffffe0; valaddr_reg:x3; val_offset:35334*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35334*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11779: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffffff0; valaddr_reg:x3; val_offset:35337*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35337*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11780: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffffff8; valaddr_reg:x3; val_offset:35340*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35340*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11781: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffffffc; valaddr_reg:x3; val_offset:35343*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35343*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11782: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6ffffffe; valaddr_reg:x3; val_offset:35346*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35346*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11783: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xdf and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x6fffffff; valaddr_reg:x3; val_offset:35349*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35349*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11784: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f000001; valaddr_reg:x3; val_offset:35352*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35352*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11785: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f000003; valaddr_reg:x3; val_offset:35355*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35355*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11786: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f000007; valaddr_reg:x3; val_offset:35358*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35358*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11787: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f199999; valaddr_reg:x3; val_offset:35361*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35361*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11788: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f249249; valaddr_reg:x3; val_offset:35364*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35364*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11789: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f333333; valaddr_reg:x3; val_offset:35367*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35367*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11790: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:35370*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35370*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11791: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:35373*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35373*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11792: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f444444; valaddr_reg:x3; val_offset:35376*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35376*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11793: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:35379*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35379*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11794: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:35382*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35382*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11795: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f666666; valaddr_reg:x3; val_offset:35385*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35385*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11796: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:35388*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35388*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11797: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:35391*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35391*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11798: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:35394*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35394*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11799: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x63981e and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0ff9bc and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e63981e; op2val:0x408ff9bc; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:35397*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35397*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11800: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c800000; valaddr_reg:x3; val_offset:35400*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35400*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11801: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c800001; valaddr_reg:x3; val_offset:35403*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35403*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11802: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c800003; valaddr_reg:x3; val_offset:35406*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35406*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11803: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c800007; valaddr_reg:x3; val_offset:35409*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35409*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11804: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c80000f; valaddr_reg:x3; val_offset:35412*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35412*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11805: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c80001f; valaddr_reg:x3; val_offset:35415*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35415*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11806: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c80003f; valaddr_reg:x3; val_offset:35418*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35418*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11807: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c80007f; valaddr_reg:x3; val_offset:35421*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35421*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11808: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c8000ff; valaddr_reg:x3; val_offset:35424*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35424*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11809: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c8001ff; valaddr_reg:x3; val_offset:35427*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35427*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11810: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c8003ff; valaddr_reg:x3; val_offset:35430*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35430*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11811: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c8007ff; valaddr_reg:x3; val_offset:35433*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35433*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11812: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c800fff; valaddr_reg:x3; val_offset:35436*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35436*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11813: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c801fff; valaddr_reg:x3; val_offset:35439*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35439*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11814: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c803fff; valaddr_reg:x3; val_offset:35442*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35442*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11815: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c807fff; valaddr_reg:x3; val_offset:35445*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35445*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11816: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c80ffff; valaddr_reg:x3; val_offset:35448*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35448*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11817: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c81ffff; valaddr_reg:x3; val_offset:35451*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35451*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11818: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c83ffff; valaddr_reg:x3; val_offset:35454*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35454*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11819: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c87ffff; valaddr_reg:x3; val_offset:35457*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35457*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11820: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c8fffff; valaddr_reg:x3; val_offset:35460*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35460*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11821: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7c9fffff; valaddr_reg:x3; val_offset:35463*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35463*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11822: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cbfffff; valaddr_reg:x3; val_offset:35466*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35466*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11823: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cc00000; valaddr_reg:x3; val_offset:35469*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35469*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11824: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7ce00000; valaddr_reg:x3; val_offset:35472*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35472*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11825: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cf00000; valaddr_reg:x3; val_offset:35475*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35475*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11826: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cf80000; valaddr_reg:x3; val_offset:35478*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35478*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11827: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfc0000; valaddr_reg:x3; val_offset:35481*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35481*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11828: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfe0000; valaddr_reg:x3; val_offset:35484*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35484*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11829: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cff0000; valaddr_reg:x3; val_offset:35487*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35487*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11830: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cff8000; valaddr_reg:x3; val_offset:35490*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35490*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11831: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cffc000; valaddr_reg:x3; val_offset:35493*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35493*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11832: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cffe000; valaddr_reg:x3; val_offset:35496*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35496*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11833: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfff000; valaddr_reg:x3; val_offset:35499*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35499*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11834: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfff800; valaddr_reg:x3; val_offset:35502*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35502*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11835: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfffc00; valaddr_reg:x3; val_offset:35505*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35505*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11836: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfffe00; valaddr_reg:x3; val_offset:35508*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35508*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11837: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cffff00; valaddr_reg:x3; val_offset:35511*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35511*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11838: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cffff80; valaddr_reg:x3; val_offset:35514*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35514*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11839: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cffffc0; valaddr_reg:x3; val_offset:35517*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35517*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11840: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cffffe0; valaddr_reg:x3; val_offset:35520*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35520*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11841: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfffff0; valaddr_reg:x3; val_offset:35523*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35523*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11842: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfffff8; valaddr_reg:x3; val_offset:35526*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35526*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11843: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfffffc; valaddr_reg:x3; val_offset:35529*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35529*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11844: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cfffffe; valaddr_reg:x3; val_offset:35532*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35532*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11845: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xf9 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7cffffff; valaddr_reg:x3; val_offset:35535*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35535*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11846: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f000001; valaddr_reg:x3; val_offset:35538*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35538*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11847: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f000003; valaddr_reg:x3; val_offset:35541*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35541*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11848: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f000007; valaddr_reg:x3; val_offset:35544*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35544*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11849: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f199999; valaddr_reg:x3; val_offset:35547*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35547*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11850: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f249249; valaddr_reg:x3; val_offset:35550*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35550*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11851: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f333333; valaddr_reg:x3; val_offset:35553*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35553*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11852: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:35556*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35556*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11853: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:35559*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35559*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11854: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f444444; valaddr_reg:x3; val_offset:35562*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35562*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11855: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:35565*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35565*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11856: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:35568*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35568*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11857: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f666666; valaddr_reg:x3; val_offset:35571*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35571*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11858: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:35574*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35574*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11859: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:35577*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35577*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11860: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:35580*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35580*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11861: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x64e2b5 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0f29c9 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e64e2b5; op2val:0x408f29c9; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:35583*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35583*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11862: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec000000; valaddr_reg:x3; val_offset:35586*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35586*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11863: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec000001; valaddr_reg:x3; val_offset:35589*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35589*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11864: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec000003; valaddr_reg:x3; val_offset:35592*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35592*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11865: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec000007; valaddr_reg:x3; val_offset:35595*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35595*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11866: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec00000f; valaddr_reg:x3; val_offset:35598*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35598*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11867: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec00001f; valaddr_reg:x3; val_offset:35601*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35601*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11868: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec00003f; valaddr_reg:x3; val_offset:35604*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35604*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11869: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec00007f; valaddr_reg:x3; val_offset:35607*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35607*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11870: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec0000ff; valaddr_reg:x3; val_offset:35610*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35610*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11871: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec0001ff; valaddr_reg:x3; val_offset:35613*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35613*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11872: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec0003ff; valaddr_reg:x3; val_offset:35616*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35616*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11873: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec0007ff; valaddr_reg:x3; val_offset:35619*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35619*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11874: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec000fff; valaddr_reg:x3; val_offset:35622*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35622*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11875: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec001fff; valaddr_reg:x3; val_offset:35625*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35625*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11876: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec003fff; valaddr_reg:x3; val_offset:35628*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35628*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11877: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec007fff; valaddr_reg:x3; val_offset:35631*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35631*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11878: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec00ffff; valaddr_reg:x3; val_offset:35634*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35634*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11879: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec01ffff; valaddr_reg:x3; val_offset:35637*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35637*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11880: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec03ffff; valaddr_reg:x3; val_offset:35640*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35640*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11881: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec07ffff; valaddr_reg:x3; val_offset:35643*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35643*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11882: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec0fffff; valaddr_reg:x3; val_offset:35646*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35646*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11883: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec1fffff; valaddr_reg:x3; val_offset:35649*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35649*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11884: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec3fffff; valaddr_reg:x3; val_offset:35652*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35652*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11885: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec400000; valaddr_reg:x3; val_offset:35655*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35655*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11886: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec600000; valaddr_reg:x3; val_offset:35658*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35658*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11887: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec700000; valaddr_reg:x3; val_offset:35661*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35661*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11888: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec780000; valaddr_reg:x3; val_offset:35664*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35664*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11889: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7c0000; valaddr_reg:x3; val_offset:35667*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35667*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11890: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7e0000; valaddr_reg:x3; val_offset:35670*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35670*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11891: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7f0000; valaddr_reg:x3; val_offset:35673*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35673*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11892: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7f8000; valaddr_reg:x3; val_offset:35676*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35676*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11893: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7fc000; valaddr_reg:x3; val_offset:35679*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35679*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11894: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7fe000; valaddr_reg:x3; val_offset:35682*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35682*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11895: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7ff000; valaddr_reg:x3; val_offset:35685*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35685*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11896: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7ff800; valaddr_reg:x3; val_offset:35688*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35688*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11897: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7ffc00; valaddr_reg:x3; val_offset:35691*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35691*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11898: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7ffe00; valaddr_reg:x3; val_offset:35694*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35694*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11899: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7fff00; valaddr_reg:x3; val_offset:35697*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35697*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11900: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7fff80; valaddr_reg:x3; val_offset:35700*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35700*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11901: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7fffc0; valaddr_reg:x3; val_offset:35703*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35703*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11902: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7fffe0; valaddr_reg:x3; val_offset:35706*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35706*0 + 3*92*FLEN/8, x4, x1, x2) + +inst_11903: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7ffff0; valaddr_reg:x3; val_offset:35709*0 + 3*92*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35709*0 + 3*92*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879048064,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879048128,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879048160,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879048176,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879048184,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879048188,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879048190,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(1879048191,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2120456222,32,FLEN) +NAN_BOXED(1083177404,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763392,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763393,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763395,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763399,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763407,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763423,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763455,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763519,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763647,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088763903,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088764415,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088765439,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088767487,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088771583,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088779775,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088796159,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088828927,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2088894463,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2089025535,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2089287679,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2089811967,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2090860543,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2092957695,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2092957696,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2095054848,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2096103424,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2096627712,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2096889856,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097020928,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097086464,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097119232,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097135616,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097143808,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097147904,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097149952,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097150976,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151488,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151744,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151872,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151936,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151968,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151984,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151992,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151996,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151998,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2097151999,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2120540853,32,FLEN) +NAN_BOXED(1083124169,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959422976,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959422977,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959422979,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959422983,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959422991,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959423007,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959423039,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959423103,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959423231,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959423487,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959423999,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959425023,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959427071,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959431167,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959439359,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959455743,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959488511,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959554047,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959685119,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3959947263,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3960471551,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3961520127,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3963617279,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3963617280,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3965714432,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3966763008,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967287296,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967549440,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967680512,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967746048,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967778816,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967795200,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967803392,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967807488,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967809536,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967810560,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811072,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811328,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811456,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811520,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811552,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811568,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-94.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-94.S new file mode 100644 index 000000000..90485bf08 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-94.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_11904: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7ffff8; valaddr_reg:x3; val_offset:35712*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35712*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11905: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7ffffc; valaddr_reg:x3; val_offset:35715*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35715*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11906: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7ffffe; valaddr_reg:x3; val_offset:35718*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35718*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11907: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xd8 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xec7fffff; valaddr_reg:x3; val_offset:35721*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35721*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11908: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff000001; valaddr_reg:x3; val_offset:35724*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35724*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11909: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff000003; valaddr_reg:x3; val_offset:35727*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35727*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11910: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff000007; valaddr_reg:x3; val_offset:35730*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35730*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11911: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff199999; valaddr_reg:x3; val_offset:35733*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35733*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11912: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff249249; valaddr_reg:x3; val_offset:35736*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35736*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11913: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff333333; valaddr_reg:x3; val_offset:35739*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35739*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11914: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:35742*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35742*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11915: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:35745*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35745*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11916: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff444444; valaddr_reg:x3; val_offset:35748*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35748*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11917: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:35751*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35751*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11918: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:35754*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35754*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11919: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff666666; valaddr_reg:x3; val_offset:35757*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35757*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11920: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:35760*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35760*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11921: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:35763*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35763*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11922: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:35766*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35766*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11923: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x654b4e and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0ee87a and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e654b4e; op2val:0xc08ee87a; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:35769*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35769*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11924: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a800000; valaddr_reg:x3; val_offset:35772*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35772*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11925: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a800001; valaddr_reg:x3; val_offset:35775*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35775*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11926: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a800003; valaddr_reg:x3; val_offset:35778*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35778*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11927: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a800007; valaddr_reg:x3; val_offset:35781*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35781*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11928: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a80000f; valaddr_reg:x3; val_offset:35784*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35784*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11929: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a80001f; valaddr_reg:x3; val_offset:35787*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35787*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11930: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a80003f; valaddr_reg:x3; val_offset:35790*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35790*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11931: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a80007f; valaddr_reg:x3; val_offset:35793*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35793*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11932: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a8000ff; valaddr_reg:x3; val_offset:35796*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35796*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11933: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a8001ff; valaddr_reg:x3; val_offset:35799*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35799*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11934: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a8003ff; valaddr_reg:x3; val_offset:35802*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35802*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11935: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a8007ff; valaddr_reg:x3; val_offset:35805*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35805*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11936: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a800fff; valaddr_reg:x3; val_offset:35808*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35808*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11937: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a801fff; valaddr_reg:x3; val_offset:35811*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35811*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11938: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a803fff; valaddr_reg:x3; val_offset:35814*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35814*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11939: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a807fff; valaddr_reg:x3; val_offset:35817*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35817*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11940: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a80ffff; valaddr_reg:x3; val_offset:35820*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35820*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11941: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a81ffff; valaddr_reg:x3; val_offset:35823*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35823*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11942: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a83ffff; valaddr_reg:x3; val_offset:35826*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35826*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11943: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a87ffff; valaddr_reg:x3; val_offset:35829*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35829*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11944: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a8fffff; valaddr_reg:x3; val_offset:35832*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35832*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11945: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7a9fffff; valaddr_reg:x3; val_offset:35835*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35835*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11946: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7abfffff; valaddr_reg:x3; val_offset:35838*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35838*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11947: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7ac00000; valaddr_reg:x3; val_offset:35841*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35841*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11948: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7ae00000; valaddr_reg:x3; val_offset:35844*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35844*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11949: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7af00000; valaddr_reg:x3; val_offset:35847*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35847*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11950: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7af80000; valaddr_reg:x3; val_offset:35850*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35850*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11951: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afc0000; valaddr_reg:x3; val_offset:35853*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35853*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11952: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afe0000; valaddr_reg:x3; val_offset:35856*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35856*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11953: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7aff0000; valaddr_reg:x3; val_offset:35859*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35859*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11954: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7aff8000; valaddr_reg:x3; val_offset:35862*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35862*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11955: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7affc000; valaddr_reg:x3; val_offset:35865*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35865*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11956: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7affe000; valaddr_reg:x3; val_offset:35868*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35868*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11957: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afff000; valaddr_reg:x3; val_offset:35871*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35871*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11958: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afff800; valaddr_reg:x3; val_offset:35874*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35874*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11959: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afffc00; valaddr_reg:x3; val_offset:35877*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35877*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11960: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afffe00; valaddr_reg:x3; val_offset:35880*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35880*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11961: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7affff00; valaddr_reg:x3; val_offset:35883*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35883*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11962: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7affff80; valaddr_reg:x3; val_offset:35886*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35886*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11963: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7affffc0; valaddr_reg:x3; val_offset:35889*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35889*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11964: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7affffe0; valaddr_reg:x3; val_offset:35892*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35892*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11965: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afffff0; valaddr_reg:x3; val_offset:35895*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35895*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11966: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afffff8; valaddr_reg:x3; val_offset:35898*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35898*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11967: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afffffc; valaddr_reg:x3; val_offset:35901*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35901*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11968: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7afffffe; valaddr_reg:x3; val_offset:35904*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35904*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11969: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xf5 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7affffff; valaddr_reg:x3; val_offset:35907*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35907*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11970: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f000001; valaddr_reg:x3; val_offset:35910*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35910*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11971: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f000003; valaddr_reg:x3; val_offset:35913*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35913*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11972: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f000007; valaddr_reg:x3; val_offset:35916*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35916*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11973: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f199999; valaddr_reg:x3; val_offset:35919*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35919*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11974: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f249249; valaddr_reg:x3; val_offset:35922*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35922*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11975: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f333333; valaddr_reg:x3; val_offset:35925*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35925*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11976: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:35928*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35928*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11977: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:35931*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35931*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11978: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f444444; valaddr_reg:x3; val_offset:35934*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35934*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11979: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:35937*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35937*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11980: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:35940*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35940*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11981: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f666666; valaddr_reg:x3; val_offset:35943*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35943*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11982: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:35946*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35946*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11983: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:35949*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35949*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11984: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:35952*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35952*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11985: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x65edcf and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0e837a and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e65edcf; op2val:0x408e837a; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:35955*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35955*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11986: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e800000; valaddr_reg:x3; val_offset:35958*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35958*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11987: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e800001; valaddr_reg:x3; val_offset:35961*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35961*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11988: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e800003; valaddr_reg:x3; val_offset:35964*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35964*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11989: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e800007; valaddr_reg:x3; val_offset:35967*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35967*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11990: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e80000f; valaddr_reg:x3; val_offset:35970*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35970*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11991: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e80001f; valaddr_reg:x3; val_offset:35973*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35973*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11992: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e80003f; valaddr_reg:x3; val_offset:35976*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35976*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11993: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e80007f; valaddr_reg:x3; val_offset:35979*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35979*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11994: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e8000ff; valaddr_reg:x3; val_offset:35982*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35982*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11995: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e8001ff; valaddr_reg:x3; val_offset:35985*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35985*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11996: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e8003ff; valaddr_reg:x3; val_offset:35988*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35988*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11997: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e8007ff; valaddr_reg:x3; val_offset:35991*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35991*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11998: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e800fff; valaddr_reg:x3; val_offset:35994*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35994*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_11999: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e801fff; valaddr_reg:x3; val_offset:35997*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 35997*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12000: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e803fff; valaddr_reg:x3; val_offset:36000*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36000*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12001: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e807fff; valaddr_reg:x3; val_offset:36003*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36003*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12002: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e80ffff; valaddr_reg:x3; val_offset:36006*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36006*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12003: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e81ffff; valaddr_reg:x3; val_offset:36009*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36009*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12004: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e83ffff; valaddr_reg:x3; val_offset:36012*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36012*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12005: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e87ffff; valaddr_reg:x3; val_offset:36015*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36015*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12006: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e8fffff; valaddr_reg:x3; val_offset:36018*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36018*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12007: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3e9fffff; valaddr_reg:x3; val_offset:36021*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36021*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12008: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3ebfffff; valaddr_reg:x3; val_offset:36024*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36024*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12009: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3ec00000; valaddr_reg:x3; val_offset:36027*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36027*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12010: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3ee00000; valaddr_reg:x3; val_offset:36030*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36030*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12011: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3ef00000; valaddr_reg:x3; val_offset:36033*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36033*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12012: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3ef80000; valaddr_reg:x3; val_offset:36036*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36036*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12013: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efc0000; valaddr_reg:x3; val_offset:36039*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36039*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12014: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efe0000; valaddr_reg:x3; val_offset:36042*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36042*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12015: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3eff0000; valaddr_reg:x3; val_offset:36045*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36045*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12016: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3eff8000; valaddr_reg:x3; val_offset:36048*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36048*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12017: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3effc000; valaddr_reg:x3; val_offset:36051*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36051*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12018: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3effe000; valaddr_reg:x3; val_offset:36054*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36054*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12019: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efff000; valaddr_reg:x3; val_offset:36057*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36057*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12020: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efff800; valaddr_reg:x3; val_offset:36060*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36060*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12021: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efffc00; valaddr_reg:x3; val_offset:36063*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36063*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12022: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efffe00; valaddr_reg:x3; val_offset:36066*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36066*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12023: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3effff00; valaddr_reg:x3; val_offset:36069*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36069*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12024: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3effff80; valaddr_reg:x3; val_offset:36072*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36072*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12025: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3effffc0; valaddr_reg:x3; val_offset:36075*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36075*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12026: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3effffe0; valaddr_reg:x3; val_offset:36078*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36078*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12027: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efffff0; valaddr_reg:x3; val_offset:36081*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36081*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12028: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efffff8; valaddr_reg:x3; val_offset:36084*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36084*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12029: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efffffc; valaddr_reg:x3; val_offset:36087*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36087*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12030: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3efffffe; valaddr_reg:x3; val_offset:36090*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36090*0 + 3*93*FLEN/8, x4, x1, x2) + +inst_12031: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7d and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3effffff; valaddr_reg:x3; val_offset:36093*0 + 3*93*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36093*0 + 3*93*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811576,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811580,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811582,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(3967811583,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2120567630,32,FLEN) +NAN_BOXED(3230591098,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055208960,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055208961,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055208963,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055208967,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055208975,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055208991,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055209023,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055209087,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055209215,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055209471,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055209983,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055211007,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055213055,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055217151,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055225343,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055241727,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055274495,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055340031,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055471103,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2055733247,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2056257535,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2057306111,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2059403263,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2059403264,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2061500416,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2062548992,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063073280,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063335424,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063466496,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063532032,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063564800,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063581184,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063589376,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063593472,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063595520,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063596544,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597056,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597312,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597440,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597504,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597536,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597552,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597560,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597564,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597566,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2063597567,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2120609231,32,FLEN) +NAN_BOXED(1083081594,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576000,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576001,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576003,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576007,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576015,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576031,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576063,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576127,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576255,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048576511,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048577023,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048578047,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048580095,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048584191,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048592383,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048608767,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048641535,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048707071,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1048838143,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1049100287,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1049624575,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1050673151,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1052770303,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1052770304,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1054867456,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1055916032,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056440320,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056702464,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056833536,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056899072,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056931840,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056948224,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056956416,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056960512,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056962560,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056963584,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964096,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964352,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964480,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964544,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964576,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964592,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964600,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964604,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964606,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1056964607,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-95.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-95.S new file mode 100644 index 000000000..ddc5e715c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-95.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_12032: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3f800001; valaddr_reg:x3; val_offset:36096*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36096*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12033: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3f800003; valaddr_reg:x3; val_offset:36099*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36099*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12034: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3f800007; valaddr_reg:x3; val_offset:36102*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36102*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12035: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3f999999; valaddr_reg:x3; val_offset:36105*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36105*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12036: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fa49249; valaddr_reg:x3; val_offset:36108*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36108*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12037: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fb33333; valaddr_reg:x3; val_offset:36111*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36111*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12038: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fb6db6d; valaddr_reg:x3; val_offset:36114*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36114*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12039: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fbbbbbb; valaddr_reg:x3; val_offset:36117*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36117*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12040: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fc44444; valaddr_reg:x3; val_offset:36120*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36120*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12041: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fcccccc; valaddr_reg:x3; val_offset:36123*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36123*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12042: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fdb6db6; valaddr_reg:x3; val_offset:36126*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36126*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12043: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fe66666; valaddr_reg:x3; val_offset:36129*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36129*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12044: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3fedb6db; valaddr_reg:x3; val_offset:36132*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36132*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12045: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3ffffff8; valaddr_reg:x3; val_offset:36135*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36135*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12046: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3ffffffc; valaddr_reg:x3; val_offset:36138*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36138*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12047: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67371a and fs2 == 0 and fe2 == 0x01 and fm2 == 0x0db883 and fs3 == 0 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67371a; op2val:0x8db883; +op3val:0x3ffffffe; valaddr_reg:x3; val_offset:36141*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36141*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12048: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:36144*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36144*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12049: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:36147*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36147*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12050: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:36150*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36150*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12051: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:36153*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36153*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12052: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:36156*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36156*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12053: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:36159*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36159*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12054: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:36162*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36162*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12055: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:36165*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36165*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12056: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:36168*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36168*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12057: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:36171*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36171*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12058: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:36174*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36174*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12059: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:36177*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36177*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12060: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:36180*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36180*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12061: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:36183*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36183*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12062: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:36186*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36186*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12063: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:36189*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36189*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12064: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb000000; valaddr_reg:x3; val_offset:36192*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36192*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12065: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb000001; valaddr_reg:x3; val_offset:36195*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36195*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12066: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb000003; valaddr_reg:x3; val_offset:36198*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36198*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12067: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb000007; valaddr_reg:x3; val_offset:36201*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36201*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12068: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb00000f; valaddr_reg:x3; val_offset:36204*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36204*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12069: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb00001f; valaddr_reg:x3; val_offset:36207*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36207*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12070: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb00003f; valaddr_reg:x3; val_offset:36210*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36210*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12071: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb00007f; valaddr_reg:x3; val_offset:36213*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36213*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12072: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb0000ff; valaddr_reg:x3; val_offset:36216*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36216*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12073: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb0001ff; valaddr_reg:x3; val_offset:36219*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36219*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12074: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb0003ff; valaddr_reg:x3; val_offset:36222*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36222*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12075: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb0007ff; valaddr_reg:x3; val_offset:36225*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36225*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12076: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb000fff; valaddr_reg:x3; val_offset:36228*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36228*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12077: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb001fff; valaddr_reg:x3; val_offset:36231*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36231*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12078: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb003fff; valaddr_reg:x3; val_offset:36234*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36234*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12079: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb007fff; valaddr_reg:x3; val_offset:36237*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36237*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12080: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb00ffff; valaddr_reg:x3; val_offset:36240*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36240*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12081: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb01ffff; valaddr_reg:x3; val_offset:36243*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36243*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12082: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb03ffff; valaddr_reg:x3; val_offset:36246*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36246*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12083: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb07ffff; valaddr_reg:x3; val_offset:36249*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36249*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12084: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb0fffff; valaddr_reg:x3; val_offset:36252*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36252*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12085: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb1fffff; valaddr_reg:x3; val_offset:36255*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36255*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12086: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb3fffff; valaddr_reg:x3; val_offset:36258*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36258*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12087: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb400000; valaddr_reg:x3; val_offset:36261*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36261*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12088: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb600000; valaddr_reg:x3; val_offset:36264*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36264*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12089: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb700000; valaddr_reg:x3; val_offset:36267*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36267*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12090: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb780000; valaddr_reg:x3; val_offset:36270*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36270*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12091: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7c0000; valaddr_reg:x3; val_offset:36273*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36273*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12092: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7e0000; valaddr_reg:x3; val_offset:36276*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36276*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12093: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7f0000; valaddr_reg:x3; val_offset:36279*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36279*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12094: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7f8000; valaddr_reg:x3; val_offset:36282*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36282*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12095: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7fc000; valaddr_reg:x3; val_offset:36285*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36285*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12096: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7fe000; valaddr_reg:x3; val_offset:36288*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36288*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12097: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7ff000; valaddr_reg:x3; val_offset:36291*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36291*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12098: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7ff800; valaddr_reg:x3; val_offset:36294*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36294*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12099: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7ffc00; valaddr_reg:x3; val_offset:36297*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36297*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12100: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7ffe00; valaddr_reg:x3; val_offset:36300*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36300*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12101: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7fff00; valaddr_reg:x3; val_offset:36303*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36303*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12102: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7fff80; valaddr_reg:x3; val_offset:36306*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36306*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12103: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7fffc0; valaddr_reg:x3; val_offset:36309*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36309*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12104: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7fffe0; valaddr_reg:x3; val_offset:36312*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36312*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12105: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7ffff0; valaddr_reg:x3; val_offset:36315*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36315*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12106: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7ffff8; valaddr_reg:x3; val_offset:36318*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36318*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12107: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7ffffc; valaddr_reg:x3; val_offset:36321*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36321*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12108: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7ffffe; valaddr_reg:x3; val_offset:36324*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36324*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12109: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x67dc90 and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x16 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e67dc90; op2val:0x0; +op3val:0xb7fffff; valaddr_reg:x3; val_offset:36327*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36327*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12110: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb000000; valaddr_reg:x3; val_offset:36330*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36330*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12111: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb000001; valaddr_reg:x3; val_offset:36333*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36333*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12112: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb000003; valaddr_reg:x3; val_offset:36336*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36336*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12113: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb000007; valaddr_reg:x3; val_offset:36339*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36339*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12114: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb00000f; valaddr_reg:x3; val_offset:36342*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36342*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12115: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb00001f; valaddr_reg:x3; val_offset:36345*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36345*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12116: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb00003f; valaddr_reg:x3; val_offset:36348*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36348*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12117: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb00007f; valaddr_reg:x3; val_offset:36351*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36351*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12118: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb0000ff; valaddr_reg:x3; val_offset:36354*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36354*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12119: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb0001ff; valaddr_reg:x3; val_offset:36357*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36357*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12120: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb0003ff; valaddr_reg:x3; val_offset:36360*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36360*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12121: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb0007ff; valaddr_reg:x3; val_offset:36363*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36363*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12122: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb000fff; valaddr_reg:x3; val_offset:36366*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36366*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12123: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb001fff; valaddr_reg:x3; val_offset:36369*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36369*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12124: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb003fff; valaddr_reg:x3; val_offset:36372*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36372*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12125: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb007fff; valaddr_reg:x3; val_offset:36375*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36375*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12126: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb00ffff; valaddr_reg:x3; val_offset:36378*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36378*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12127: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb01ffff; valaddr_reg:x3; val_offset:36381*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36381*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12128: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb03ffff; valaddr_reg:x3; val_offset:36384*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36384*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12129: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb07ffff; valaddr_reg:x3; val_offset:36387*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36387*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12130: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb0fffff; valaddr_reg:x3; val_offset:36390*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36390*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12131: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb1fffff; valaddr_reg:x3; val_offset:36393*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36393*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12132: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb3fffff; valaddr_reg:x3; val_offset:36396*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36396*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12133: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb400000; valaddr_reg:x3; val_offset:36399*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36399*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12134: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb600000; valaddr_reg:x3; val_offset:36402*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36402*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12135: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb700000; valaddr_reg:x3; val_offset:36405*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36405*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12136: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb780000; valaddr_reg:x3; val_offset:36408*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36408*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12137: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7c0000; valaddr_reg:x3; val_offset:36411*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36411*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12138: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7e0000; valaddr_reg:x3; val_offset:36414*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36414*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12139: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7f0000; valaddr_reg:x3; val_offset:36417*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36417*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12140: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7f8000; valaddr_reg:x3; val_offset:36420*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36420*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12141: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7fc000; valaddr_reg:x3; val_offset:36423*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36423*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12142: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7fe000; valaddr_reg:x3; val_offset:36426*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36426*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12143: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7ff000; valaddr_reg:x3; val_offset:36429*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36429*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12144: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7ff800; valaddr_reg:x3; val_offset:36432*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36432*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12145: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7ffc00; valaddr_reg:x3; val_offset:36435*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36435*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12146: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7ffe00; valaddr_reg:x3; val_offset:36438*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36438*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12147: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7fff00; valaddr_reg:x3; val_offset:36441*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36441*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12148: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7fff80; valaddr_reg:x3; val_offset:36444*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36444*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12149: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7fffc0; valaddr_reg:x3; val_offset:36447*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36447*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12150: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7fffe0; valaddr_reg:x3; val_offset:36450*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36450*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12151: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7ffff0; valaddr_reg:x3; val_offset:36453*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36453*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12152: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7ffff8; valaddr_reg:x3; val_offset:36456*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36456*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12153: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7ffffc; valaddr_reg:x3; val_offset:36459*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36459*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12154: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7ffffe; valaddr_reg:x3; val_offset:36462*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36462*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12155: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x76 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbb7fffff; valaddr_reg:x3; val_offset:36465*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36465*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12156: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbf800001; valaddr_reg:x3; val_offset:36468*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36468*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12157: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbf800003; valaddr_reg:x3; val_offset:36471*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36471*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12158: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbf800007; valaddr_reg:x3; val_offset:36474*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36474*0 + 3*94*FLEN/8, x4, x1, x2) + +inst_12159: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbf999999; valaddr_reg:x3; val_offset:36477*0 + 3*94*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36477*0 + 3*94*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1065353217,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1065353219,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1065353223,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1067030937,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1067749961,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1068708659,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1068948333,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1069267899,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1069827140,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1070386380,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1071345078,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1072064102,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1072543451,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1073741816,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1073741820,32,FLEN) +NAN_BOXED(2120693530,32,FLEN) +NAN_BOXED(9287811,32,FLEN) +NAN_BOXED(1073741822,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549376,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549377,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549379,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549383,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549391,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549407,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549439,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549503,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549631,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184549887,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184550399,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184551423,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184553471,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184557567,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184565759,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184582143,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184614911,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184680447,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(184811519,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(185073663,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(185597951,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(186646527,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(188743679,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(188743680,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(190840832,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(191889408,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192413696,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192675840,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192806912,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192872448,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192905216,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192921600,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192929792,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192933888,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192935936,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192936960,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937472,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937728,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937856,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937920,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937952,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937968,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937976,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937980,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937982,32,FLEN) +NAN_BOXED(2120735888,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(192937983,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339392,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339393,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339395,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339399,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339407,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339423,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339455,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339519,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339647,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137339903,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137340415,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137341439,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137343487,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137347583,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137355775,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137372159,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137404927,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137470463,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137601535,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3137863679,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3138387967,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3139436543,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3141533695,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3141533696,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3143630848,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3144679424,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145203712,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145465856,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145596928,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145662464,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145695232,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145711616,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145719808,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145723904,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145725952,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145726976,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727488,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727744,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727872,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727936,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727968,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727984,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727992,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727996,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727998,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3145727999,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-96.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-96.S new file mode 100644 index 000000000..5a03ab9c1 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-96.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_12160: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:36480*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36480*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12161: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:36483*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36483*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12162: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:36486*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36486*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12163: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:36489*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36489*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12164: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:36492*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36492*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12165: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:36495*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36495*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12166: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:36498*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36498*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12167: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:36501*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36501*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12168: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:36504*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36504*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12169: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:36507*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36507*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12170: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:36510*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36510*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12171: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684169 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0d1603 and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684169; op2val:0x808d1603; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:36513*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36513*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12172: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:36516*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36516*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12173: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:36519*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36519*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12174: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:36522*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36522*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12175: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:36525*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36525*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12176: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:36528*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36528*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12177: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:36531*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36531*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12178: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:36534*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36534*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12179: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:36537*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36537*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12180: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:36540*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36540*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12181: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:36543*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36543*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12182: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:36546*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36546*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12183: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:36549*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36549*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12184: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:36552*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36552*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12185: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:36555*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36555*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12186: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:36558*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36558*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12187: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:36561*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36561*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12188: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a800000; valaddr_reg:x3; val_offset:36564*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36564*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12189: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a800001; valaddr_reg:x3; val_offset:36567*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36567*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12190: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a800003; valaddr_reg:x3; val_offset:36570*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36570*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12191: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a800007; valaddr_reg:x3; val_offset:36573*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36573*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12192: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a80000f; valaddr_reg:x3; val_offset:36576*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36576*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12193: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a80001f; valaddr_reg:x3; val_offset:36579*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36579*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12194: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a80003f; valaddr_reg:x3; val_offset:36582*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36582*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12195: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a80007f; valaddr_reg:x3; val_offset:36585*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36585*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12196: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a8000ff; valaddr_reg:x3; val_offset:36588*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36588*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12197: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a8001ff; valaddr_reg:x3; val_offset:36591*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36591*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12198: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a8003ff; valaddr_reg:x3; val_offset:36594*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36594*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12199: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a8007ff; valaddr_reg:x3; val_offset:36597*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36597*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12200: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a800fff; valaddr_reg:x3; val_offset:36600*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36600*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12201: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a801fff; valaddr_reg:x3; val_offset:36603*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36603*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12202: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a803fff; valaddr_reg:x3; val_offset:36606*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36606*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12203: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a807fff; valaddr_reg:x3; val_offset:36609*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36609*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12204: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a80ffff; valaddr_reg:x3; val_offset:36612*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36612*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12205: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a81ffff; valaddr_reg:x3; val_offset:36615*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36615*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12206: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a83ffff; valaddr_reg:x3; val_offset:36618*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36618*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12207: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a87ffff; valaddr_reg:x3; val_offset:36621*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36621*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12208: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a8fffff; valaddr_reg:x3; val_offset:36624*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36624*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12209: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8a9fffff; valaddr_reg:x3; val_offset:36627*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36627*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12210: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8abfffff; valaddr_reg:x3; val_offset:36630*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36630*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12211: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8ac00000; valaddr_reg:x3; val_offset:36633*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36633*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12212: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8ae00000; valaddr_reg:x3; val_offset:36636*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36636*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12213: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8af00000; valaddr_reg:x3; val_offset:36639*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36639*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12214: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8af80000; valaddr_reg:x3; val_offset:36642*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36642*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12215: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afc0000; valaddr_reg:x3; val_offset:36645*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36645*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12216: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afe0000; valaddr_reg:x3; val_offset:36648*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36648*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12217: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8aff0000; valaddr_reg:x3; val_offset:36651*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36651*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12218: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8aff8000; valaddr_reg:x3; val_offset:36654*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36654*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12219: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8affc000; valaddr_reg:x3; val_offset:36657*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36657*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12220: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8affe000; valaddr_reg:x3; val_offset:36660*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36660*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12221: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afff000; valaddr_reg:x3; val_offset:36663*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36663*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12222: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afff800; valaddr_reg:x3; val_offset:36666*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36666*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12223: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afffc00; valaddr_reg:x3; val_offset:36669*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36669*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12224: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afffe00; valaddr_reg:x3; val_offset:36672*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36672*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12225: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8affff00; valaddr_reg:x3; val_offset:36675*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36675*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12226: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8affff80; valaddr_reg:x3; val_offset:36678*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36678*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12227: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8affffc0; valaddr_reg:x3; val_offset:36681*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36681*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12228: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8affffe0; valaddr_reg:x3; val_offset:36684*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36684*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12229: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afffff0; valaddr_reg:x3; val_offset:36687*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36687*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12230: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afffff8; valaddr_reg:x3; val_offset:36690*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36690*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12231: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afffffc; valaddr_reg:x3; val_offset:36693*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36693*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12232: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8afffffe; valaddr_reg:x3; val_offset:36696*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36696*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12233: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x684686 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x15 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e684686; op2val:0x80000000; +op3val:0x8affffff; valaddr_reg:x3; val_offset:36699*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36699*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12234: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80800001; valaddr_reg:x3; val_offset:36702*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36702*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12235: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80800003; valaddr_reg:x3; val_offset:36705*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36705*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12236: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80800007; valaddr_reg:x3; val_offset:36708*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36708*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12237: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80999999; valaddr_reg:x3; val_offset:36711*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36711*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12238: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80a49249; valaddr_reg:x3; val_offset:36714*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36714*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12239: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80b33333; valaddr_reg:x3; val_offset:36717*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36717*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12240: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80b6db6d; valaddr_reg:x3; val_offset:36720*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36720*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12241: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80bbbbbb; valaddr_reg:x3; val_offset:36723*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36723*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12242: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80c44444; valaddr_reg:x3; val_offset:36726*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36726*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12243: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80cccccc; valaddr_reg:x3; val_offset:36729*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36729*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12244: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80db6db6; valaddr_reg:x3; val_offset:36732*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36732*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12245: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80e66666; valaddr_reg:x3; val_offset:36735*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36735*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12246: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80edb6db; valaddr_reg:x3; val_offset:36738*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36738*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12247: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80fffff8; valaddr_reg:x3; val_offset:36741*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36741*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12248: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80fffffc; valaddr_reg:x3; val_offset:36744*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36744*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12249: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x01 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x80fffffe; valaddr_reg:x3; val_offset:36747*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36747*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12250: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c800000; valaddr_reg:x3; val_offset:36750*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36750*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12251: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c800001; valaddr_reg:x3; val_offset:36753*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36753*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12252: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c800003; valaddr_reg:x3; val_offset:36756*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36756*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12253: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c800007; valaddr_reg:x3; val_offset:36759*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36759*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12254: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c80000f; valaddr_reg:x3; val_offset:36762*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36762*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12255: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c80001f; valaddr_reg:x3; val_offset:36765*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36765*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12256: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c80003f; valaddr_reg:x3; val_offset:36768*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36768*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12257: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c80007f; valaddr_reg:x3; val_offset:36771*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36771*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12258: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c8000ff; valaddr_reg:x3; val_offset:36774*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36774*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12259: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c8001ff; valaddr_reg:x3; val_offset:36777*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36777*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12260: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c8003ff; valaddr_reg:x3; val_offset:36780*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36780*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12261: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c8007ff; valaddr_reg:x3; val_offset:36783*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36783*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12262: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c800fff; valaddr_reg:x3; val_offset:36786*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36786*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12263: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c801fff; valaddr_reg:x3; val_offset:36789*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36789*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12264: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c803fff; valaddr_reg:x3; val_offset:36792*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36792*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12265: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c807fff; valaddr_reg:x3; val_offset:36795*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36795*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12266: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c80ffff; valaddr_reg:x3; val_offset:36798*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36798*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12267: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c81ffff; valaddr_reg:x3; val_offset:36801*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36801*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12268: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c83ffff; valaddr_reg:x3; val_offset:36804*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36804*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12269: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c87ffff; valaddr_reg:x3; val_offset:36807*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36807*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12270: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c8fffff; valaddr_reg:x3; val_offset:36810*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36810*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12271: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8c9fffff; valaddr_reg:x3; val_offset:36813*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36813*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12272: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cbfffff; valaddr_reg:x3; val_offset:36816*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36816*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12273: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cc00000; valaddr_reg:x3; val_offset:36819*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36819*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12274: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8ce00000; valaddr_reg:x3; val_offset:36822*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36822*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12275: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cf00000; valaddr_reg:x3; val_offset:36825*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36825*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12276: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cf80000; valaddr_reg:x3; val_offset:36828*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36828*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12277: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfc0000; valaddr_reg:x3; val_offset:36831*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36831*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12278: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfe0000; valaddr_reg:x3; val_offset:36834*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36834*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12279: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cff0000; valaddr_reg:x3; val_offset:36837*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36837*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12280: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cff8000; valaddr_reg:x3; val_offset:36840*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36840*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12281: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cffc000; valaddr_reg:x3; val_offset:36843*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36843*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12282: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cffe000; valaddr_reg:x3; val_offset:36846*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36846*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12283: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfff000; valaddr_reg:x3; val_offset:36849*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36849*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12284: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfff800; valaddr_reg:x3; val_offset:36852*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36852*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12285: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfffc00; valaddr_reg:x3; val_offset:36855*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36855*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12286: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfffe00; valaddr_reg:x3; val_offset:36858*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36858*0 + 3*95*FLEN/8, x4, x1, x2) + +inst_12287: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cffff00; valaddr_reg:x3; val_offset:36861*0 + 3*95*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36861*0 + 3*95*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2120761705,32,FLEN) +NAN_BOXED(2156729859,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644416,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644417,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644419,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644423,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644431,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644447,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644479,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644543,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644671,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323644927,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323645439,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323646463,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323648511,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323652607,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323660799,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323677183,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323709951,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323775487,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2323906559,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2324168703,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2324692991,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2325741567,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2327838719,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2327838720,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2329935872,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2330984448,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331508736,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331770880,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331901952,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2331967488,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332000256,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332016640,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332024832,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332028928,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332030976,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032000,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032512,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032768,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032896,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032960,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332032992,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033008,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033016,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033020,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033022,32,FLEN) +NAN_BOXED(2120763014,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2332033023,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872257,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872259,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872263,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2157549977,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2158269001,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159227699,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159467373,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2159786939,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160346180,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2160905420,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2161864118,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2162583142,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2163062491,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260856,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260860,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2164260862,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198848,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198849,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198851,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198855,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198863,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198879,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198911,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357198975,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199103,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199359,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357199871,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357200895,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357202943,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357207039,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357215231,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357231615,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357264383,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357329919,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357460991,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2357723135,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2358247423,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2359295999,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2361393151,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2361393152,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2363490304,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2364538880,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365063168,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365325312,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365456384,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365521920,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365554688,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365571072,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365579264,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365583360,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365585408,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365586432,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365586944,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587200,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-97.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-97.S new file mode 100644 index 000000000..2e7a7aa63 --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-97.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_12288: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cffff80; valaddr_reg:x3; val_offset:36864*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36864*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12289: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cffffc0; valaddr_reg:x3; val_offset:36867*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36867*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12290: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cffffe0; valaddr_reg:x3; val_offset:36870*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36870*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12291: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfffff0; valaddr_reg:x3; val_offset:36873*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36873*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12292: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfffff8; valaddr_reg:x3; val_offset:36876*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36876*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12293: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfffffc; valaddr_reg:x3; val_offset:36879*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36879*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12294: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cfffffe; valaddr_reg:x3; val_offset:36882*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36882*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12295: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6a7ab2 and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x19 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6a7ab2; op2val:0x80000000; +op3val:0x8cffffff; valaddr_reg:x3; val_offset:36885*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36885*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12296: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa000000; valaddr_reg:x3; val_offset:36888*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36888*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12297: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa000001; valaddr_reg:x3; val_offset:36891*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36891*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12298: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa000003; valaddr_reg:x3; val_offset:36894*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36894*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12299: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa000007; valaddr_reg:x3; val_offset:36897*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36897*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12300: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa00000f; valaddr_reg:x3; val_offset:36900*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36900*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12301: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa00001f; valaddr_reg:x3; val_offset:36903*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36903*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12302: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa00003f; valaddr_reg:x3; val_offset:36906*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36906*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12303: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa00007f; valaddr_reg:x3; val_offset:36909*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36909*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12304: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa0000ff; valaddr_reg:x3; val_offset:36912*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36912*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12305: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa0001ff; valaddr_reg:x3; val_offset:36915*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36915*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12306: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa0003ff; valaddr_reg:x3; val_offset:36918*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36918*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12307: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa0007ff; valaddr_reg:x3; val_offset:36921*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36921*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12308: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa000fff; valaddr_reg:x3; val_offset:36924*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36924*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12309: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa001fff; valaddr_reg:x3; val_offset:36927*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36927*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12310: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa003fff; valaddr_reg:x3; val_offset:36930*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36930*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12311: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa007fff; valaddr_reg:x3; val_offset:36933*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36933*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12312: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa00ffff; valaddr_reg:x3; val_offset:36936*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36936*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12313: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa01ffff; valaddr_reg:x3; val_offset:36939*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36939*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12314: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa03ffff; valaddr_reg:x3; val_offset:36942*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36942*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12315: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa07ffff; valaddr_reg:x3; val_offset:36945*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36945*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12316: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa0fffff; valaddr_reg:x3; val_offset:36948*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36948*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12317: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa1fffff; valaddr_reg:x3; val_offset:36951*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36951*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12318: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa3fffff; valaddr_reg:x3; val_offset:36954*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36954*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12319: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa400000; valaddr_reg:x3; val_offset:36957*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36957*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12320: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa600000; valaddr_reg:x3; val_offset:36960*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36960*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12321: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa700000; valaddr_reg:x3; val_offset:36963*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36963*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12322: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa780000; valaddr_reg:x3; val_offset:36966*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36966*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12323: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7c0000; valaddr_reg:x3; val_offset:36969*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36969*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12324: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7e0000; valaddr_reg:x3; val_offset:36972*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36972*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12325: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7f0000; valaddr_reg:x3; val_offset:36975*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36975*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12326: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7f8000; valaddr_reg:x3; val_offset:36978*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36978*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12327: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7fc000; valaddr_reg:x3; val_offset:36981*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36981*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12328: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7fe000; valaddr_reg:x3; val_offset:36984*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36984*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12329: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7ff000; valaddr_reg:x3; val_offset:36987*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36987*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12330: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7ff800; valaddr_reg:x3; val_offset:36990*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36990*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12331: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7ffc00; valaddr_reg:x3; val_offset:36993*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36993*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12332: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7ffe00; valaddr_reg:x3; val_offset:36996*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36996*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12333: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7fff00; valaddr_reg:x3; val_offset:36999*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 36999*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12334: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7fff80; valaddr_reg:x3; val_offset:37002*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37002*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12335: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7fffc0; valaddr_reg:x3; val_offset:37005*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37005*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12336: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7fffe0; valaddr_reg:x3; val_offset:37008*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37008*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12337: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7ffff0; valaddr_reg:x3; val_offset:37011*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37011*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12338: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7ffff8; valaddr_reg:x3; val_offset:37014*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37014*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12339: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7ffffc; valaddr_reg:x3; val_offset:37017*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37017*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12340: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7ffffe; valaddr_reg:x3; val_offset:37020*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37020*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12341: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xf4 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xfa7fffff; valaddr_reg:x3; val_offset:37023*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37023*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12342: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff000001; valaddr_reg:x3; val_offset:37026*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37026*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12343: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff000003; valaddr_reg:x3; val_offset:37029*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37029*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12344: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff000007; valaddr_reg:x3; val_offset:37032*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37032*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12345: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff199999; valaddr_reg:x3; val_offset:37035*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37035*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12346: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff249249; valaddr_reg:x3; val_offset:37038*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37038*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12347: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff333333; valaddr_reg:x3; val_offset:37041*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37041*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12348: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff36db6d; valaddr_reg:x3; val_offset:37044*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37044*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12349: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff3bbbbb; valaddr_reg:x3; val_offset:37047*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37047*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12350: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff444444; valaddr_reg:x3; val_offset:37050*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37050*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12351: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff4ccccc; valaddr_reg:x3; val_offset:37053*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37053*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12352: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff5b6db6; valaddr_reg:x3; val_offset:37056*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37056*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12353: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff666666; valaddr_reg:x3; val_offset:37059*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37059*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12354: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff6db6db; valaddr_reg:x3; val_offset:37062*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37062*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12355: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff7ffff8; valaddr_reg:x3; val_offset:37065*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37065*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12356: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff7ffffc; valaddr_reg:x3; val_offset:37068*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37068*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12357: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6ab42c and fs2 == 1 and fe2 == 0x81 and fm2 == 0x0b9d3f and fs3 == 1 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6ab42c; op2val:0xc08b9d3f; +op3val:0xff7ffffe; valaddr_reg:x3; val_offset:37071*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37071*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12358: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73000000; valaddr_reg:x3; val_offset:37074*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37074*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12359: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73000001; valaddr_reg:x3; val_offset:37077*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37077*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12360: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73000003; valaddr_reg:x3; val_offset:37080*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37080*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12361: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73000007; valaddr_reg:x3; val_offset:37083*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37083*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12362: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7300000f; valaddr_reg:x3; val_offset:37086*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37086*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12363: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7300001f; valaddr_reg:x3; val_offset:37089*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37089*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12364: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7300003f; valaddr_reg:x3; val_offset:37092*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37092*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12365: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7300007f; valaddr_reg:x3; val_offset:37095*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37095*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12366: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x730000ff; valaddr_reg:x3; val_offset:37098*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37098*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12367: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x730001ff; valaddr_reg:x3; val_offset:37101*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37101*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12368: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x730003ff; valaddr_reg:x3; val_offset:37104*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37104*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12369: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x730007ff; valaddr_reg:x3; val_offset:37107*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37107*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12370: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73000fff; valaddr_reg:x3; val_offset:37110*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37110*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12371: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73001fff; valaddr_reg:x3; val_offset:37113*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37113*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12372: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73003fff; valaddr_reg:x3; val_offset:37116*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37116*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12373: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73007fff; valaddr_reg:x3; val_offset:37119*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37119*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12374: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7300ffff; valaddr_reg:x3; val_offset:37122*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37122*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12375: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7301ffff; valaddr_reg:x3; val_offset:37125*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37125*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12376: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7303ffff; valaddr_reg:x3; val_offset:37128*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37128*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12377: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7307ffff; valaddr_reg:x3; val_offset:37131*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37131*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12378: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x730fffff; valaddr_reg:x3; val_offset:37134*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37134*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12379: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x731fffff; valaddr_reg:x3; val_offset:37137*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37137*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12380: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x733fffff; valaddr_reg:x3; val_offset:37140*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37140*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12381: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73400000; valaddr_reg:x3; val_offset:37143*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37143*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12382: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73600000; valaddr_reg:x3; val_offset:37146*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37146*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12383: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73700000; valaddr_reg:x3; val_offset:37149*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37149*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12384: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x73780000; valaddr_reg:x3; val_offset:37152*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37152*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12385: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737c0000; valaddr_reg:x3; val_offset:37155*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37155*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12386: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737e0000; valaddr_reg:x3; val_offset:37158*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37158*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12387: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737f0000; valaddr_reg:x3; val_offset:37161*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37161*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12388: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737f8000; valaddr_reg:x3; val_offset:37164*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37164*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12389: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737fc000; valaddr_reg:x3; val_offset:37167*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37167*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12390: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737fe000; valaddr_reg:x3; val_offset:37170*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37170*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12391: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737ff000; valaddr_reg:x3; val_offset:37173*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37173*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12392: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737ff800; valaddr_reg:x3; val_offset:37176*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37176*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12393: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737ffc00; valaddr_reg:x3; val_offset:37179*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37179*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12394: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737ffe00; valaddr_reg:x3; val_offset:37182*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37182*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12395: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737fff00; valaddr_reg:x3; val_offset:37185*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37185*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12396: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737fff80; valaddr_reg:x3; val_offset:37188*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37188*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12397: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737fffc0; valaddr_reg:x3; val_offset:37191*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37191*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12398: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737fffe0; valaddr_reg:x3; val_offset:37194*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37194*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12399: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737ffff0; valaddr_reg:x3; val_offset:37197*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37197*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12400: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737ffff8; valaddr_reg:x3; val_offset:37200*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37200*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12401: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737ffffc; valaddr_reg:x3; val_offset:37203*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37203*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12402: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737ffffe; valaddr_reg:x3; val_offset:37206*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37206*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12403: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xe6 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x737fffff; valaddr_reg:x3; val_offset:37209*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37209*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12404: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f000001; valaddr_reg:x3; val_offset:37212*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37212*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12405: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f000003; valaddr_reg:x3; val_offset:37215*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37215*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12406: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f000007; valaddr_reg:x3; val_offset:37218*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37218*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12407: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f199999; valaddr_reg:x3; val_offset:37221*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37221*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12408: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f249249; valaddr_reg:x3; val_offset:37224*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37224*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12409: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f333333; valaddr_reg:x3; val_offset:37227*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37227*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12410: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f36db6d; valaddr_reg:x3; val_offset:37230*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37230*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12411: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f3bbbbb; valaddr_reg:x3; val_offset:37233*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37233*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12412: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f444444; valaddr_reg:x3; val_offset:37236*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37236*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12413: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f4ccccc; valaddr_reg:x3; val_offset:37239*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37239*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12414: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f5b6db6; valaddr_reg:x3; val_offset:37242*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37242*0 + 3*96*FLEN/8, x4, x1, x2) + +inst_12415: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f666666; valaddr_reg:x3; val_offset:37245*0 + 3*96*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37245*0 + 3*96*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587328,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587392,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587424,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587440,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587448,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587452,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587454,32,FLEN) +NAN_BOXED(2120907442,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2365587455,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304000,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304001,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304003,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304007,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304015,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304031,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304063,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304127,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304255,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194304511,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194305023,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194306047,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194308095,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194312191,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194320383,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194336767,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194369535,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194435071,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194566143,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4194828287,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4195352575,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4196401151,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4198498303,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4198498304,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4200595456,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4201644032,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202168320,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202430464,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202561536,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202627072,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202659840,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202676224,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202684416,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202688512,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202690560,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202691584,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692096,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692352,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692480,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692544,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692576,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692592,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692600,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692604,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692606,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4202692607,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4278190081,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4278190083,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4278190087,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4279867801,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4280586825,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4281545523,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4281785197,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4282104763,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4282664004,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4283223244,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4284181942,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4284900966,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4285380315,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4286578680,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4286578684,32,FLEN) +NAN_BOXED(2120922156,32,FLEN) +NAN_BOXED(3230375231,32,FLEN) +NAN_BOXED(4286578686,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929379840,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929379841,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929379843,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929379847,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929379855,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929379871,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929379903,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929379967,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929380095,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929380351,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929380863,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929381887,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929383935,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929388031,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929396223,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929412607,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929445375,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929510911,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929641983,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1929904127,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1930428415,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1931476991,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1933574143,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1933574144,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1935671296,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1936719872,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937244160,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937506304,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937637376,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937702912,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937735680,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937752064,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937760256,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937764352,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937766400,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937767424,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937767936,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768192,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768320,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768384,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768416,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768432,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768440,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768444,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768446,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(1937768447,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2130706433,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2130706435,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2130706439,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2132384153,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2133103177,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2134061875,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2134301549,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2134621115,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2135180356,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2135739596,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2136698294,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2137417318,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-98.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-98.S new file mode 100644 index 000000000..25a92694c --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-98.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_12416: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f6db6db; valaddr_reg:x3; val_offset:37248*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37248*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12417: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f7ffff8; valaddr_reg:x3; val_offset:37251*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37251*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12418: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f7ffffc; valaddr_reg:x3; val_offset:37254*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37254*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12419: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6c5c91 and fs2 == 0 and fe2 == 0x81 and fm2 == 0x0aa291 and fs3 == 0 and fe3 == 0xfe and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6c5c91; op2val:0x408aa291; +op3val:0x7f7ffffe; valaddr_reg:x3; val_offset:37257*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37257*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12420: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2800000; valaddr_reg:x3; val_offset:37260*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37260*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12421: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2800001; valaddr_reg:x3; val_offset:37263*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37263*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12422: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2800003; valaddr_reg:x3; val_offset:37266*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37266*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12423: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2800007; valaddr_reg:x3; val_offset:37269*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37269*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12424: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa280000f; valaddr_reg:x3; val_offset:37272*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37272*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12425: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa280001f; valaddr_reg:x3; val_offset:37275*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37275*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12426: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa280003f; valaddr_reg:x3; val_offset:37278*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37278*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12427: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa280007f; valaddr_reg:x3; val_offset:37281*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37281*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12428: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa28000ff; valaddr_reg:x3; val_offset:37284*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37284*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12429: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa28001ff; valaddr_reg:x3; val_offset:37287*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37287*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12430: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa28003ff; valaddr_reg:x3; val_offset:37290*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37290*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12431: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa28007ff; valaddr_reg:x3; val_offset:37293*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37293*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12432: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2800fff; valaddr_reg:x3; val_offset:37296*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37296*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12433: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2801fff; valaddr_reg:x3; val_offset:37299*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37299*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12434: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2803fff; valaddr_reg:x3; val_offset:37302*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37302*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12435: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2807fff; valaddr_reg:x3; val_offset:37305*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37305*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12436: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa280ffff; valaddr_reg:x3; val_offset:37308*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37308*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12437: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa281ffff; valaddr_reg:x3; val_offset:37311*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37311*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12438: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa283ffff; valaddr_reg:x3; val_offset:37314*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37314*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12439: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa287ffff; valaddr_reg:x3; val_offset:37317*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37317*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12440: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa28fffff; valaddr_reg:x3; val_offset:37320*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37320*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12441: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa29fffff; valaddr_reg:x3; val_offset:37323*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37323*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12442: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2bfffff; valaddr_reg:x3; val_offset:37326*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37326*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12443: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2c00000; valaddr_reg:x3; val_offset:37329*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37329*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12444: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2e00000; valaddr_reg:x3; val_offset:37332*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37332*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12445: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2f00000; valaddr_reg:x3; val_offset:37335*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37335*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12446: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2f80000; valaddr_reg:x3; val_offset:37338*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37338*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12447: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fc0000; valaddr_reg:x3; val_offset:37341*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37341*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12448: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fe0000; valaddr_reg:x3; val_offset:37344*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37344*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12449: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ff0000; valaddr_reg:x3; val_offset:37347*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37347*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12450: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ff8000; valaddr_reg:x3; val_offset:37350*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37350*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12451: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ffc000; valaddr_reg:x3; val_offset:37353*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37353*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12452: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ffe000; valaddr_reg:x3; val_offset:37356*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37356*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12453: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fff000; valaddr_reg:x3; val_offset:37359*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37359*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12454: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fff800; valaddr_reg:x3; val_offset:37362*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37362*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12455: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fffc00; valaddr_reg:x3; val_offset:37365*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37365*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12456: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fffe00; valaddr_reg:x3; val_offset:37368*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37368*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12457: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ffff00; valaddr_reg:x3; val_offset:37371*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37371*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12458: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ffff80; valaddr_reg:x3; val_offset:37374*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37374*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12459: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ffffc0; valaddr_reg:x3; val_offset:37377*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37377*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12460: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ffffe0; valaddr_reg:x3; val_offset:37380*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37380*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12461: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fffff0; valaddr_reg:x3; val_offset:37383*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37383*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12462: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fffff8; valaddr_reg:x3; val_offset:37386*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37386*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12463: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fffffc; valaddr_reg:x3; val_offset:37389*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37389*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12464: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2fffffe; valaddr_reg:x3; val_offset:37392*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37392*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12465: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x45 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xa2ffffff; valaddr_reg:x3; val_offset:37395*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37395*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12466: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbf800001; valaddr_reg:x3; val_offset:37398*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37398*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12467: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbf800003; valaddr_reg:x3; val_offset:37401*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37401*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12468: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbf800007; valaddr_reg:x3; val_offset:37404*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37404*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12469: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbf999999; valaddr_reg:x3; val_offset:37407*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37407*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12470: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:37410*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37410*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12471: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:37413*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37413*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12472: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:37416*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37416*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12473: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:37419*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37419*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12474: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:37422*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37422*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12475: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:37425*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37425*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12476: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:37428*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37428*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12477: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:37431*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37431*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12478: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:37434*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37434*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12479: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:37437*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37437*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12480: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:37440*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37440*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12481: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x6e4efc and fs2 == 1 and fe2 == 0x01 and fm2 == 0x09809e and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e6e4efc; op2val:0x8089809e; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:37443*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37443*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12482: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbf800001; valaddr_reg:x3; val_offset:37446*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37446*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12483: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbf800003; valaddr_reg:x3; val_offset:37449*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37449*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12484: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbf800007; valaddr_reg:x3; val_offset:37452*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37452*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12485: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbf999999; valaddr_reg:x3; val_offset:37455*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37455*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12486: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfa49249; valaddr_reg:x3; val_offset:37458*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37458*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12487: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfb33333; valaddr_reg:x3; val_offset:37461*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37461*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12488: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfb6db6d; valaddr_reg:x3; val_offset:37464*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37464*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12489: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfbbbbbb; valaddr_reg:x3; val_offset:37467*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37467*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12490: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfc44444; valaddr_reg:x3; val_offset:37470*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37470*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12491: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfcccccc; valaddr_reg:x3; val_offset:37473*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37473*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12492: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfdb6db6; valaddr_reg:x3; val_offset:37476*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37476*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12493: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfe66666; valaddr_reg:x3; val_offset:37479*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37479*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12494: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbfedb6db; valaddr_reg:x3; val_offset:37482*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37482*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12495: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbffffff8; valaddr_reg:x3; val_offset:37485*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37485*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12496: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbffffffc; valaddr_reg:x3; val_offset:37488*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37488*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12497: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x7f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xbffffffe; valaddr_reg:x3; val_offset:37491*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37491*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12498: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5000000; valaddr_reg:x3; val_offset:37494*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37494*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12499: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5000001; valaddr_reg:x3; val_offset:37497*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37497*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12500: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5000003; valaddr_reg:x3; val_offset:37500*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37500*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12501: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5000007; valaddr_reg:x3; val_offset:37503*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37503*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12502: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc500000f; valaddr_reg:x3; val_offset:37506*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37506*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12503: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc500001f; valaddr_reg:x3; val_offset:37509*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37509*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12504: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc500003f; valaddr_reg:x3; val_offset:37512*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37512*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12505: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc500007f; valaddr_reg:x3; val_offset:37515*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37515*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12506: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc50000ff; valaddr_reg:x3; val_offset:37518*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37518*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12507: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc50001ff; valaddr_reg:x3; val_offset:37521*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37521*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12508: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc50003ff; valaddr_reg:x3; val_offset:37524*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37524*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12509: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc50007ff; valaddr_reg:x3; val_offset:37527*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37527*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12510: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5000fff; valaddr_reg:x3; val_offset:37530*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37530*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12511: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5001fff; valaddr_reg:x3; val_offset:37533*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37533*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12512: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5003fff; valaddr_reg:x3; val_offset:37536*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37536*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12513: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5007fff; valaddr_reg:x3; val_offset:37539*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37539*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12514: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc500ffff; valaddr_reg:x3; val_offset:37542*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37542*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12515: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc501ffff; valaddr_reg:x3; val_offset:37545*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37545*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12516: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc503ffff; valaddr_reg:x3; val_offset:37548*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37548*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12517: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc507ffff; valaddr_reg:x3; val_offset:37551*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37551*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12518: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc50fffff; valaddr_reg:x3; val_offset:37554*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37554*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12519: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc51fffff; valaddr_reg:x3; val_offset:37557*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37557*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12520: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc53fffff; valaddr_reg:x3; val_offset:37560*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37560*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12521: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5400000; valaddr_reg:x3; val_offset:37563*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37563*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12522: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5600000; valaddr_reg:x3; val_offset:37566*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37566*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12523: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5700000; valaddr_reg:x3; val_offset:37569*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37569*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12524: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc5780000; valaddr_reg:x3; val_offset:37572*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37572*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12525: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57c0000; valaddr_reg:x3; val_offset:37575*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37575*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12526: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57e0000; valaddr_reg:x3; val_offset:37578*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37578*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12527: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57f0000; valaddr_reg:x3; val_offset:37581*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37581*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12528: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57f8000; valaddr_reg:x3; val_offset:37584*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37584*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12529: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57fc000; valaddr_reg:x3; val_offset:37587*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37587*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12530: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57fe000; valaddr_reg:x3; val_offset:37590*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37590*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12531: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57ff000; valaddr_reg:x3; val_offset:37593*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37593*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12532: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57ff800; valaddr_reg:x3; val_offset:37596*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37596*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12533: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57ffc00; valaddr_reg:x3; val_offset:37599*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37599*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12534: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57ffe00; valaddr_reg:x3; val_offset:37602*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37602*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12535: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57fff00; valaddr_reg:x3; val_offset:37605*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37605*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12536: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57fff80; valaddr_reg:x3; val_offset:37608*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37608*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12537: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57fffc0; valaddr_reg:x3; val_offset:37611*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37611*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12538: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57fffe0; valaddr_reg:x3; val_offset:37614*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37614*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12539: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57ffff0; valaddr_reg:x3; val_offset:37617*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37617*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12540: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57ffff8; valaddr_reg:x3; val_offset:37620*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37620*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12541: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57ffffc; valaddr_reg:x3; val_offset:37623*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37623*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12542: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57ffffe; valaddr_reg:x3; val_offset:37626*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37626*0 + 3*97*FLEN/8, x4, x1, x2) + +inst_12543: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x71b322 and fs2 == 1 and fe2 == 0x01 and fm2 == 0x0792ba and fs3 == 1 and fe3 == 0x8a and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e71b322; op2val:0x808792ba; +op3val:0xc57fffff; valaddr_reg:x3; val_offset:37629*0 + 3*97*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37629*0 + 3*97*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2137896667,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2139095032,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2139095036,32,FLEN) +NAN_BOXED(2121030801,32,FLEN) +NAN_BOXED(1082827409,32,FLEN) +NAN_BOXED(2139095038,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297600,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297601,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297603,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297607,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297615,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297631,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297663,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297727,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726297855,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726298111,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726298623,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726299647,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726301695,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726305791,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726313983,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726330367,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726363135,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726428671,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726559743,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2726821887,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2727346175,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2728394751,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2730491903,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2730491904,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2732589056,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2733637632,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734161920,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734424064,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734555136,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734620672,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734653440,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734669824,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734678016,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734682112,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734684160,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734685184,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734685696,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734685952,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734686080,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734686144,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734686176,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734686192,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734686200,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734686204,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734686206,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(2734686207,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2121158396,32,FLEN) +NAN_BOXED(2156495006,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3212836865,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3212836867,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3212836871,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3214514585,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3215233609,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3216192307,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3216431981,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3216751547,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3217310788,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3217870028,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3218828726,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3219547750,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3220027099,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3221225464,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3221225468,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3221225470,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111552,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111553,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111555,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111559,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111567,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111583,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111615,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111679,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305111807,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305112063,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305112575,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305113599,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305115647,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305119743,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305127935,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305144319,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305177087,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305242623,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305373695,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3305635839,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3306160127,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3307208703,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3309305855,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3309305856,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3311403008,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3312451584,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3312975872,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313238016,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313369088,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313434624,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313467392,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313483776,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313491968,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313496064,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313498112,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313499136,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313499648,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313499904,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313500032,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313500096,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313500128,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313500144,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313500152,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313500156,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313500158,32,FLEN) +NAN_BOXED(2121380642,32,FLEN) +NAN_BOXED(2156368570,32,FLEN) +NAN_BOXED(3313500159,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/F/src/fmadd_b15-99.S b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-99.S new file mode 100644 index 000000000..ddb345ecf --- /dev/null +++ b/riscv-test-suite/rv32i_m/F/src/fmadd_b15-99.S @@ -0,0 +1,1372 @@ + +// ----------- +// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg) +// version : 0.7.1 +// timestamp : Fri Jun 17 14:17:59 2022 GMT +// usage : riscv_ctg \ +// -- cgf // --cgf /scratch/pawan/work/normalised/RV32F/fmadd.s.cgf \ + \ +// -- xlen 32 \ +// --randomize \ +// ----------- +// +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This assembly file tests the fmadd.s instruction of the RISC-V RV32F_Zicsr,RV32FD_Zicsr,RV64F_Zicsr,RV64FD_Zicsr extension for the fmadd_b15 covergroup. +// +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32IF_Zicsr,RV32IFD_Zicsr,RV64IF_Zicsr,RV64IFD_Zicsr,RV32EF_Zicsr,RV32EFD_Zicsr,RV64EF_Zicsr,RV64EFD_Zicsr") + +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN + +#ifdef TEST_CASE_1 + +RVTEST_CASE(0,"//check ISA:=regex(.*I.*F.*);def TEST_CASE_1=True;",fmadd_b15) +RVTEST_CASE(1,"//check ISA:=regex(.*E.*F.*);def TEST_CASE_1=True;",fnmsub_b15) +RVTEST_FP_ENABLE() +RVTEST_VALBASEUPD(x3,test_dataset_0) +RVTEST_SIGBASE(x1,signature_x1_1) + +inst_12544: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x1; valaddr_reg:x3; val_offset:37632*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37632*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12545: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x3; valaddr_reg:x3; val_offset:37635*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37635*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12546: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x7; valaddr_reg:x3; val_offset:37638*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37638*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12547: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x199999; valaddr_reg:x3; val_offset:37641*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37641*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12548: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x249249; valaddr_reg:x3; val_offset:37644*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37644*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12549: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x333333; valaddr_reg:x3; val_offset:37647*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37647*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12550: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x36db6d; valaddr_reg:x3; val_offset:37650*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37650*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12551: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x3bbbbb; valaddr_reg:x3; val_offset:37653*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37653*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12552: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x444444; valaddr_reg:x3; val_offset:37656*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37656*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12553: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x4ccccc; valaddr_reg:x3; val_offset:37659*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37659*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12554: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x5b6db6; valaddr_reg:x3; val_offset:37662*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37662*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12555: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x666666; valaddr_reg:x3; val_offset:37665*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37665*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12556: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x6db6db; valaddr_reg:x3; val_offset:37668*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37668*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12557: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x7ffff8; valaddr_reg:x3; val_offset:37671*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37671*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12558: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x7ffffc; valaddr_reg:x3; val_offset:37674*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37674*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12559: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0x7ffffe; valaddr_reg:x3; val_offset:37677*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37677*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12560: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc000000; valaddr_reg:x3; val_offset:37680*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37680*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12561: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc000001; valaddr_reg:x3; val_offset:37683*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37683*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12562: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc000003; valaddr_reg:x3; val_offset:37686*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37686*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12563: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc000007; valaddr_reg:x3; val_offset:37689*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37689*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12564: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc00000f; valaddr_reg:x3; val_offset:37692*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37692*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12565: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc00001f; valaddr_reg:x3; val_offset:37695*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37695*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12566: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc00003f; valaddr_reg:x3; val_offset:37698*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37698*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12567: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc00007f; valaddr_reg:x3; val_offset:37701*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37701*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12568: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc0000ff; valaddr_reg:x3; val_offset:37704*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37704*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12569: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc0001ff; valaddr_reg:x3; val_offset:37707*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37707*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12570: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc0003ff; valaddr_reg:x3; val_offset:37710*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37710*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12571: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc0007ff; valaddr_reg:x3; val_offset:37713*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37713*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12572: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc000fff; valaddr_reg:x3; val_offset:37716*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37716*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12573: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc001fff; valaddr_reg:x3; val_offset:37719*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37719*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12574: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc003fff; valaddr_reg:x3; val_offset:37722*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37722*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12575: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc007fff; valaddr_reg:x3; val_offset:37725*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37725*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12576: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc00ffff; valaddr_reg:x3; val_offset:37728*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37728*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12577: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc01ffff; valaddr_reg:x3; val_offset:37731*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37731*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12578: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc03ffff; valaddr_reg:x3; val_offset:37734*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37734*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12579: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc07ffff; valaddr_reg:x3; val_offset:37737*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37737*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12580: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc0fffff; valaddr_reg:x3; val_offset:37740*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37740*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12581: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc1fffff; valaddr_reg:x3; val_offset:37743*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37743*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12582: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc3fffff; valaddr_reg:x3; val_offset:37746*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37746*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12583: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc400000; valaddr_reg:x3; val_offset:37749*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37749*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12584: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc600000; valaddr_reg:x3; val_offset:37752*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37752*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12585: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc700000; valaddr_reg:x3; val_offset:37755*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37755*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12586: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc780000; valaddr_reg:x3; val_offset:37758*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37758*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12587: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7c0000; valaddr_reg:x3; val_offset:37761*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37761*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12588: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7e0000; valaddr_reg:x3; val_offset:37764*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37764*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12589: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7f0000; valaddr_reg:x3; val_offset:37767*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37767*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12590: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7f8000; valaddr_reg:x3; val_offset:37770*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37770*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12591: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7fc000; valaddr_reg:x3; val_offset:37773*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37773*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12592: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7fe000; valaddr_reg:x3; val_offset:37776*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37776*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12593: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7ff000; valaddr_reg:x3; val_offset:37779*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37779*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12594: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7ff800; valaddr_reg:x3; val_offset:37782*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37782*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12595: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7ffc00; valaddr_reg:x3; val_offset:37785*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37785*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12596: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7ffe00; valaddr_reg:x3; val_offset:37788*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37788*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12597: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7fff00; valaddr_reg:x3; val_offset:37791*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37791*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12598: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7fff80; valaddr_reg:x3; val_offset:37794*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37794*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12599: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7fffc0; valaddr_reg:x3; val_offset:37797*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37797*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12600: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7fffe0; valaddr_reg:x3; val_offset:37800*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37800*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12601: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7ffff0; valaddr_reg:x3; val_offset:37803*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37803*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12602: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7ffff8; valaddr_reg:x3; val_offset:37806*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37806*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12603: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7ffffc; valaddr_reg:x3; val_offset:37809*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37809*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12604: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7ffffe; valaddr_reg:x3; val_offset:37812*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37812*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12605: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x72d6cc and fs2 == 0 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 0 and fe3 == 0x18 and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e72d6cc; op2val:0x0; +op3val:0xc7fffff; valaddr_reg:x3; val_offset:37815*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37815*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12606: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x80000001; valaddr_reg:x3; val_offset:37818*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37818*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12607: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x80000003; valaddr_reg:x3; val_offset:37821*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37821*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12608: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x80000007; valaddr_reg:x3; val_offset:37824*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37824*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12609: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x199999 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x80199999; valaddr_reg:x3; val_offset:37827*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37827*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12610: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x249249 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x80249249; valaddr_reg:x3; val_offset:37830*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37830*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12611: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x333333 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x80333333; valaddr_reg:x3; val_offset:37833*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37833*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12612: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x36db6d and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8036db6d; valaddr_reg:x3; val_offset:37836*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37836*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12613: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x3bbbbb and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x803bbbbb; valaddr_reg:x3; val_offset:37839*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37839*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12614: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x444444 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x80444444; valaddr_reg:x3; val_offset:37842*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37842*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12615: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x4ccccc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x804ccccc; valaddr_reg:x3; val_offset:37845*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37845*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12616: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x5b6db6 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x805b6db6; valaddr_reg:x3; val_offset:37848*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37848*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12617: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x666666 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x80666666; valaddr_reg:x3; val_offset:37851*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37851*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12618: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x6db6db and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x806db6db; valaddr_reg:x3; val_offset:37854*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37854*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12619: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x807ffff8; valaddr_reg:x3; val_offset:37857*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37857*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12620: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x807ffffc; valaddr_reg:x3; val_offset:37860*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37860*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12621: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x00 and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x807ffffe; valaddr_reg:x3; val_offset:37863*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37863*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12622: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87800000; valaddr_reg:x3; val_offset:37866*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37866*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12623: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87800001; valaddr_reg:x3; val_offset:37869*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37869*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12624: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87800003; valaddr_reg:x3; val_offset:37872*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37872*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12625: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87800007; valaddr_reg:x3; val_offset:37875*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37875*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12626: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00000f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8780000f; valaddr_reg:x3; val_offset:37878*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37878*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12627: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00001f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8780001f; valaddr_reg:x3; val_offset:37881*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37881*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12628: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00003f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8780003f; valaddr_reg:x3; val_offset:37884*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37884*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12629: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00007f and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8780007f; valaddr_reg:x3; val_offset:37887*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37887*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12630: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0000ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x878000ff; valaddr_reg:x3; val_offset:37890*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37890*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12631: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0001ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x878001ff; valaddr_reg:x3; val_offset:37893*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37893*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12632: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0003ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x878003ff; valaddr_reg:x3; val_offset:37896*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37896*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12633: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0007ff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x878007ff; valaddr_reg:x3; val_offset:37899*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37899*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12634: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x000fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87800fff; valaddr_reg:x3; val_offset:37902*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37902*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12635: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x001fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87801fff; valaddr_reg:x3; val_offset:37905*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37905*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12636: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x003fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87803fff; valaddr_reg:x3; val_offset:37908*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37908*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12637: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x007fff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87807fff; valaddr_reg:x3; val_offset:37911*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37911*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12638: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x00ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8780ffff; valaddr_reg:x3; val_offset:37914*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37914*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12639: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x01ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8781ffff; valaddr_reg:x3; val_offset:37917*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37917*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12640: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x03ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8783ffff; valaddr_reg:x3; val_offset:37920*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37920*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12641: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x07ffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x8787ffff; valaddr_reg:x3; val_offset:37923*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37923*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12642: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x0fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x878fffff; valaddr_reg:x3; val_offset:37926*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37926*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12643: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x1fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x879fffff; valaddr_reg:x3; val_offset:37929*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37929*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12644: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x3fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87bfffff; valaddr_reg:x3; val_offset:37932*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37932*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12645: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x400000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87c00000; valaddr_reg:x3; val_offset:37935*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37935*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12646: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x600000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87e00000; valaddr_reg:x3; val_offset:37938*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37938*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12647: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x700000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87f00000; valaddr_reg:x3; val_offset:37941*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37941*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12648: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x780000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87f80000; valaddr_reg:x3; val_offset:37944*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37944*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12649: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7c0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fc0000; valaddr_reg:x3; val_offset:37947*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37947*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12650: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7e0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fe0000; valaddr_reg:x3; val_offset:37950*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37950*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12651: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f0000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ff0000; valaddr_reg:x3; val_offset:37953*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37953*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12652: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7f8000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ff8000; valaddr_reg:x3; val_offset:37956*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37956*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12653: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fc000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ffc000; valaddr_reg:x3; val_offset:37959*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37959*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12654: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fe000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ffe000; valaddr_reg:x3; val_offset:37962*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37962*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12655: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fff000; valaddr_reg:x3; val_offset:37965*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37965*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12656: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ff800 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fff800; valaddr_reg:x3; val_offset:37968*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37968*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12657: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffc00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fffc00; valaddr_reg:x3; val_offset:37971*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37971*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12658: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffe00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fffe00; valaddr_reg:x3; val_offset:37974*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37974*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12659: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff00 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ffff00; valaddr_reg:x3; val_offset:37977*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37977*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12660: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fff80 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ffff80; valaddr_reg:x3; val_offset:37980*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37980*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12661: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffc0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ffffc0; valaddr_reg:x3; val_offset:37983*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37983*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12662: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffe0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ffffe0; valaddr_reg:x3; val_offset:37986*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37986*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12663: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff0 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fffff0; valaddr_reg:x3; val_offset:37989*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37989*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12664: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffff8 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fffff8; valaddr_reg:x3; val_offset:37992*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37992*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12665: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffc and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fffffc; valaddr_reg:x3; val_offset:37995*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37995*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12666: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7ffffe and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87fffffe; valaddr_reg:x3; val_offset:37998*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 37998*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12667: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x75cd4b and fs2 == 1 and fe2 == 0x00 and fm2 == 0x000000 and fs3 == 1 and fe3 == 0x0f and fm3 == 0x7fffff and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e75cd4b; op2val:0x80000000; +op3val:0x87ffffff; valaddr_reg:x3; val_offset:38001*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38001*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12668: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000000 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf000000; valaddr_reg:x3; val_offset:38004*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38004*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12669: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000001 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf000001; valaddr_reg:x3; val_offset:38007*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38007*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12670: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000003 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf000003; valaddr_reg:x3; val_offset:38010*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38010*0 + 3*98*FLEN/8, x4, x1, x2) + +inst_12671: +// fs1 == 0 and fe1 == 0xfc and fm1 == 0x76467b and fs2 == 1 and fe2 == 0x81 and fm2 == 0x050de8 and fs3 == 1 and fe3 == 0xbe and fm3 == 0x000007 and fcsr == 0x0 and rm_val == 7 +/* opcode: fmadd.s ; op1:f30; op2:f29; op3:f28; dest:f31; op1val:0x7e76467b; op2val:0xc0850de8; +op3val:0xdf000007; valaddr_reg:x3; val_offset:38013*0 + 3*98*FLEN/8; rmval:dyn; +testreg:x2; fcsr_val:0 */ +TEST_FPR4_OP(fmadd.s, f31, f30, f29, f28, dyn, 0, 0, x3, 38013*0 + 3*98*FLEN/8, x4, x1, x2) +#endif + + +RVTEST_CODE_END +RVMODEL_HALT + +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xbabecafe +.word 0xabecafeb +.word 0xbecafeba +.word 0xecafebab +test_dataset_0: +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(1677721,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(2396745,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3355443,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3595117,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(3914683,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(4473924,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5033164,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(5991862,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(6710886,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(7190235,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388600,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388604,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(8388606,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326592,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326593,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326595,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326599,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326607,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326623,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326655,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326719,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201326847,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201327103,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201327615,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201328639,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201330687,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201334783,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201342975,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201359359,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201392127,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201457663,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201588735,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(201850879,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(202375167,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(203423743,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(205520895,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(205520896,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(207618048,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(208666624,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209190912,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209453056,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209584128,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209649664,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209682432,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209698816,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209707008,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209711104,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209713152,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714176,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714688,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209714944,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715072,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715136,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715168,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715184,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715192,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715196,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715198,32,FLEN) +NAN_BOXED(2121455308,32,FLEN) +NAN_BOXED(0,32,FLEN) +NAN_BOXED(209715199,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483649,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483651,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2147483655,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149161369,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2149880393,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2150839091,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151078765,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151398331,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2151957572,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2152516812,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2153475510,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154194534,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2154673883,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872248,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872252,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2155872254,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312768,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312769,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312771,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312775,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312783,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312799,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312831,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273312895,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313023,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313279,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273313791,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273314815,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273316863,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273320959,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273329151,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273345535,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273378303,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273443839,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273574911,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2273837055,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2274361343,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2275409919,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2277507071,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2277507072,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2279604224,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2280652800,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281177088,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281439232,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281570304,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281635840,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281668608,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281684992,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281693184,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281697280,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281699328,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281700352,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281700864,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701120,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701248,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701312,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701344,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701360,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701368,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701372,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701374,32,FLEN) +NAN_BOXED(2121649483,32,FLEN) +NAN_BOXED(2147483648,32,FLEN) +NAN_BOXED(2281701375,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319168,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319169,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319171,32,FLEN) +NAN_BOXED(2121680507,32,FLEN) +NAN_BOXED(3229945320,32,FLEN) +NAN_BOXED(3741319175,32,FLEN) +RVTEST_DATA_END + +RVMODEL_DATA_BEGIN +rvtest_sig_begin: +sig_begin_canary: +CANARY; + + +signature_x1_0: + .fill 0*((SIGALIGN)/4),4,0xdeadbeef + + +signature_x1_1: + .fill 256*((SIGALIGN)/4),4,0xdeadbeef + + +#ifdef rvtest_mtrap_routine + +tsig_begin_canary: +CANARY; +tsig_begin_canary: +CANARY; +mtrap_sigptr: + .fill 64*(XLEN/32),4,0xdeadbeef +tsig_end_canary: +CANARY; +tsig_end_canary: +CANARY; + +#endif + +#ifdef rvtest_gpr_save + +gpr_save: + .fill 32*XLEN/32,4,0xdeadbeef + +#endif + +sig_end_canary: +CANARY; +rvtest_sig_end: +RVMODEL_DATA_END